diff --git a/kernel/kernel/files/configs/kernel-x86_64-config b/kernel/kernel/files/configs/kernel-x86_64-config index 4776cea4..b2b211b7 100644 --- a/kernel/kernel/files/configs/kernel-x86_64-config +++ b/kernel/kernel/files/configs/kernel-x86_64-config @@ -1,6 +1,6 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/x86_64 4.8.4 Kernel Configuration +# Linux/x86_64 4.8.5 Kernel Configuration # CONFIG_64BIT=y CONFIG_X86_64=y @@ -2256,7 +2256,7 @@ CONFIG_NET_TEAM_MODE_ACTIVEBACKUP=m CONFIG_NET_TEAM_MODE_LOADBALANCE=m CONFIG_MACVLAN=m CONFIG_MACVTAP=m -# CONFIG_IPVLAN is not set +CONFIG_IPVLAN=m CONFIG_VXLAN=m CONFIG_GENEVE=m # CONFIG_GTP is not set diff --git a/kernel/kernel/files/patches/linux/patch-4.8.5.xz b/kernel/kernel/files/patches/linux/patch-4.8.5.xz new file mode 100644 index 00000000..d3cf432b Binary files /dev/null and b/kernel/kernel/files/patches/linux/patch-4.8.5.xz differ diff --git a/kernel/kernel/files/patches/mageia/kernel-governor-cpupower-Correct-return-type-of-cpu_power_is_cpu_onl.patch b/kernel/kernel/files/patches/mageia/kernel-governor-cpupower-Correct-return-type-of-cpu_power_is_cpu_onl.patch new file mode 100644 index 00000000..05b8cf99 --- /dev/null +++ b/kernel/kernel/files/patches/mageia/kernel-governor-cpupower-Correct-return-type-of-cpu_power_is_cpu_onl.patch @@ -0,0 +1,49 @@ +From 9f692cbe4a01dd9e3c3e954ec6b59662b68f9ce4 Mon Sep 17 00:00:00 2001 +From: Laura Abbott +Date: Fri, 9 Sep 2016 10:19:02 -0700 +Subject: [PATCH] cpupower: Correct return type of cpu_power_is_cpu_online in + cpufreq +To: Thomas Renninger +Cc: linux-pm@vger.kernel.org +Cc: linux-kernel@vger.kernel.org + +When converting to a shared library in ac5a181d065d ("cpupower: Add +cpuidle parts into library"), cpu_freq_cpu_exists was converted to +cpupower_is_cpu_online. cpu_req_cpu_exists returned 0 on success and +-ENOSYS on failure whereas cpupower_is_cpu_online returns 1 on success. +Check for the correct return value in cpufreq-set. + +See https://bugzilla.redhat.com/show_bug.cgi?id=1374212 + +Fixes: ac5a181d065d ("cpupower: Add cpuidle parts into library") +Reported-by: Julian Seward +Signed-off-by: Laura Abbott +--- + tools/power/cpupower/utils/cpufreq-set.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/tools/power/cpupower/utils/cpufreq-set.c b/tools/power/cpupower/utils/cpufreq-set.c +index b4bf769..8971d71 100644 +--- a/tools/power/cpupower/utils/cpufreq-set.c ++++ b/tools/power/cpupower/utils/cpufreq-set.c +@@ -296,7 +296,7 @@ int cmd_freq_set(int argc, char **argv) + struct cpufreq_affected_cpus *cpus; + + if (!bitmask_isbitset(cpus_chosen, cpu) || +- cpupower_is_cpu_online(cpu)) ++ cpupower_is_cpu_online(cpu) != 1) + continue; + + cpus = cpufreq_get_related_cpus(cpu); +@@ -316,7 +316,7 @@ int cmd_freq_set(int argc, char **argv) + cpu <= bitmask_last(cpus_chosen); cpu++) { + + if (!bitmask_isbitset(cpus_chosen, cpu) || +- cpupower_is_cpu_online(cpu)) ++ cpupower_is_cpu_online(cpu) != 1) + continue; + + if (cpupower_is_cpu_online(cpu) != 1) +-- +2.10.0 + diff --git a/kernel/kernel/files/patches/mageia/kernel-sched-fair-Fix-incorrect-task-group-load_avg.patch b/kernel/kernel/files/patches/mageia/kernel-sched-fair-Fix-incorrect-task-group-load_avg.patch deleted file mode 100644 index 3c7c7279..00000000 --- a/kernel/kernel/files/patches/mageia/kernel-sched-fair-Fix-incorrect-task-group-load_avg.patch +++ /dev/null @@ -1,73 +0,0 @@ -From b5a9b340789b2b24c6896bcf7a065c31a4db671c Mon Sep 17 00:00:00 2001 -From: Vincent Guittot -Date: Wed, 19 Oct 2016 14:45:23 +0200 -Subject: [PATCH] sched/fair: Fix incorrect task group ->load_avg - -A scheduler performance regression has been reported by Joseph Salisbury, -which he bisected back to: - - 3d30544f0212 ("sched/fair: Apply more PELT fixes) - -The regression triggers when several levels of task groups are involved -(read: SystemD) and cpu_possible_mask != cpu_present_mask. - -The root cause is that group entity's load (tg_child->se[i]->avg.load_avg) -is initialized to scale_load_down(se->load.weight). During the creation of -a child task group, its group entities on possible CPUs are attached to -parent's cfs_rq (tg_parent) and their loads are added to the parent's load -(tg_parent->load_avg) with update_tg_load_avg(). - -But only the load on online CPUs will then be updated to reflect real load, -whereas load on other CPUs will stay at the initial value. - -The result is a tg_parent->load_avg that is higher than the real load, the -weight of group entities (tg_parent->se[i]->load.weight) on online CPUs is -smaller than it should be, and the task group gets a less running time than -what it could expect. - -( This situation can be detected with /proc/sched_debug. The ".tg_load_avg" - of the task group will be much higher than sum of ".tg_load_avg_contrib" - of online cfs_rqs of the task group. ) - -The load of group entities don't have to be intialized to something else -than 0 because their load will increase when an entity is attached. - -Reported-by: Joseph Salisbury -Tested-by: Dietmar Eggemann -Signed-off-by: Vincent Guittot -Acked-by: Peter Zijlstra -Cc: # 4.8.x -Cc: Linus Torvalds -Cc: Peter Zijlstra -Cc: Thomas Gleixner -Cc: joonwoop@codeaurora.org -Fixes: 3d30544f0212 ("sched/fair: Apply more PELT fixes) -Link: http://lkml.kernel.org/r/1476881123-10159-1-git-send-email-vincent.guittot@linaro.org -Signed-off-by: Ingo Molnar ---- - kernel/sched/fair.c | 9 ++++++++- - 1 file changed, 8 insertions(+), 1 deletion(-) - -diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c -index 76ee7de..d941c97 100644 ---- a/kernel/sched/fair.c -+++ b/kernel/sched/fair.c -@@ -690,7 +690,14 @@ void init_entity_runnable_average(struct sched_entity *se) - * will definitely be update (after enqueue). - */ - sa->period_contrib = 1023; -- sa->load_avg = scale_load_down(se->load.weight); -+ /* -+ * Tasks are intialized with full load to be seen as heavy tasks until -+ * they get a chance to stabilize to their real load level. -+ * Group entities are intialized with zero load to reflect the fact that -+ * nothing has been attached to the task group yet. -+ */ -+ if (entity_is_task(se)) -+ sa->load_avg = scale_load_down(se->load.weight); - sa->load_sum = sa->load_avg * LOAD_AVG_MAX; - /* - * At this point, util_avg won't be used in select_task_rq_fair anyway --- -2.10.1 - diff --git a/kernel/kernel/files/patches/mageia/series b/kernel/kernel/files/patches/mageia/series index 8906ee33..5f3d0487 100644 --- a/kernel/kernel/files/patches/mageia/series +++ b/kernel/kernel/files/patches/mageia/series @@ -14,6 +14,86 @@ ### ### Stable Queue ### +stable-drm-vc4-fix-races-when-the-cs-reads-from-render-targets.patch +stable-drm-prime-pass-the-right-module-owner-through-to-dma_buf_export.patch +stable-drm-i915-backlight-setup-and-cache-pwm-alternate-increment-value.patch +stable-drm-i915-backlight-setup-backlight-pwm-alternate-increment-on-backlight-enable.patch +stable-drm-amdgpu-fix-ib-alignment-for-uvd.patch +stable-drm-amdgpu-dce10-disable-hpd-on-local-panels.patch +stable-drm-amdgpu-dce8-disable-hpd-on-local-panels.patch +stable-drm-amdgpu-dce11-disable-hpd-on-local-panels.patch +stable-drm-amdgpu-dce11-add-missing-drm_mode_config_cleanup-call.patch +stable-drm-amdgpu-initialize-the-context-reset_counter-in-amdgpu_ctx_init.patch +stable-drm-amdgpu-change-vblank_time-s-calculation-method-to-reduce-computational-error.patch +stable-drm-radeon-narrow-asic_init-for-virtualization.patch +stable-drm-radeon-si-dpm-fix-phase-shedding-setup.patch +stable-drm-radeon-change-vblank_time-s-calculation-method-to-reduce-computational-error.patch +stable-drm-vmwgfx-limit-the-user-space-command-buffer-size.patch +stable-drm-fsl-dcu-fix-endian-issue-when-using-clk_register_divider.patch +stable-drm-amd-powerplay-fix-mclk-not-switching-back-after-multi-head-was-disabled.patch +stable-hid-add-quirk-for-akai-midimix.patch +stable-drm-i915-skl-update-plane-watermarks-atomically-during-plane-updates.patch +stable-drm-i915-move-crtc-updating-in-atomic_commit-into-it-s-own-hook.patch +stable-drm-i915-skl-update-ddb-values-atomically-with-wms-plane-attrs.patch +stable-drm-i915-skl-don-t-try-to-update-plane-watermarks-if-they-haven-t-changed.patch +stable-drm-i915-gen9-only-add-the-planes-actually-affected-by-ddb-changes.patch +stable-drm-i915-gen9-fix-the-wawmmemoryreadlatency-implementation.patch +stable-drm-i915-gen9-minimum-scanlines-for-y-tile-is-not-always-4.patch +stable-drm-i915-gen9-fix-plane_blocks_per_line-on-watermarks-calculations.patch +stable-drm-i915-gen9-fix-the-watermark-res_blocks-value.patch +stable-drm-i915-sagv-is-not-skl-only-so-rename-a-few-things.patch +stable-drm-i915-introduce-intel_has_sagv.patch +stable-drm-i915-kbl-kbl-also-needs-to-run-the-sagv-code.patch +stable-revert-drm-i915-check-live-status-before-reading-edid.patch +stable-drm-i915-account-for-tseg-size-when-determining-865g-stolen-base.patch +stable-drm-i915-skl-ensure-pipes-with-changed-wms-get-added-to-the-state.patch +stable-drm-i915-allow-pch-dpll-sharing-regardless-of-dpll_sdvo_high_speed.patch +stable-drm-i915-move-long-hpd-handling-into-the-hotplug-work.patch +stable-drm-i915-allow-dp-to-work-w-o-edid.patch +stable-drm-i915-just-clear-the-mmiodebug-before-a-register-access.patch +stable-drm-i915-unalias-obj-phys_handle-and-obj-userptr.patch +stable-posix_acl-clear-sgid-bit-when-setting-file-permissions.patch +stable-rt2x00usb-fix-error-return-code.patch +stable-scsi-cxlflash-remove-the-device-cleanly-in-the-system-shutdown-path.patch +stable-genirq-generic_chip-add-irq_unmap-callback.patch +stable-coresight-remove-erroneous-dma_free_coherent-in-tmc_probe.patch +stable-uio-fix-dmem_region_start-computation.patch +stable-arm-clk-imx35-fix-name-for-ckil-clk.patch +stable-spi-spi-fsl-dspi-drop-extra-spi_master_put-in-device-remove-function.patch +stable-i40e-remove-a-stray-unlock.patch +stable-i40e-fix-broken-i40e_config_rss_aq-function.patch +stable-mwifiex-correct-aid-value-during-tdls-setup.patch +stable-mwifiex-fix-failed-to-reconnect-after-interface-disabled-enabled.patch +stable-ath10k-add-wmi_service_periodic_chan_stat_support-wmi-service.patch +stable-ath10k-fix-sending-frame-in-management-path-in-push-txq-logic.patch +stable-ath10k-fix-reporting-channel-survey-data.patch +stable-ath10k-fix-throughput-regression-in-multi-client-mode.patch +stable-crypto-marvell-don-t-overwrite-default-creq-state-during-initialization.patch +stable-crypto-gcm-fix-iv-buffer-size-in-crypto_gcm_setkey.patch +stable-crypto-marvell-update-transformation-context-for-each-dequeued-req.patch +stable-crypto-arm-ghash-ce-add-missing-async-import-export.patch +stable-crypto-ccp-fix-return-value-check-in-ccp_dmaengine_register.patch +stable-hwrng-omap-only-fail-if-pm_runtime_get_sync-returns-0.patch +stable-asoc-topology-fix-error-return-code-in-soc_tplg_dapm_widget_create.patch +stable-asoc-dapm-fix-possible-uninitialized-variable-in-snd_soc_dapm_get_volsw.patch +stable-asoc-dapm-fix-value-setting-for-_enum_double-mux-s-second-channel.patch +stable-asoc-dapm-fix-kcontrol-creation-for-output-driver-widget.patch +stable-asoc-sst-bxt-rt298-fix-obsoleted-initializers-for-array.patch +stable-asoc-sst-bxt-da7219_max98357a-fix-obsoleted-initializers-for-array.patch +stable-iio-ad5755-fix-off-by-one-on-devnr-limit-check.patch +stable-iio-light-us5182d-add-missing-error-code-assignment-before-test.patch +stable-staging-android-ion-hisi-fix-dependencies.patch +stable-staging-sm750fb-correctly-set-clock_phase-bit-of-display-controller.patch +stable-staging-r8188eu-fix-scheduling-while-atomic-splat.patch +stable-staging-ks7010-fix-wait_for_completion_interruptible_timeout-return-handling.patch +stable-staging-ks7010-declare-private-functions-static.patch +stable-ib-hfi1-move-iowait_init-to-priv-allocate.patch +stable-ib-rdmavt-correct-sparse-annotation.patch +stable-ib-qib-remove-qpt_mask-global.patch +stable-ib-mlx5-fix-steering-resource-leak.patch +stable-power-bq24257-fix-use-of-uninitialized-pointer-bq-charger.patch +stable-dmaengine-ipu-remove-bogus-no_irq-reference.patch +stable-mm-hugetlb-check-for-reserved-hugepages-during-memory-offline.patch ### ### Arch x86 @@ -46,7 +126,10 @@ Revert-x86-mm-mtrr-Remove-kernel-internal-MTRR-inter.patch ### base-cacheinfo-silence-DT-warnings.patch -kernel-sched-fair-Fix-incorrect-task-group-load_avg.patch +# Patch for having the cpupower setting the governor +# (from https://bugzilla.kernel.org/show_bug.cgi?id=135391, same as +# https://bugzilla.redhat.com/show_bug.cgi?id=1374212) +kernel-governor-cpupower-Correct-return-type-of-cpu_power_is_cpu_onl.patch ### ### i2c @@ -184,11 +267,10 @@ gpu-drm-mach64-3.18-buildfix.patch # Attempt to fix FIFO underrun problems: # (from https://patchwork.freedesktop.org/patch/113642/ and -# from https://bugs.freedesktop.org/attachment.cgi?id=127264, reference from +# also from https://bugs.freedesktop.org/attachment.cgi?id=127264, first reference from # https://bugs.freedesktop.org/show_bug.cgi?id=97450). Does not completely resolve the # issues but reduce. drm-i915-gen9-fix-DDB-partitioning-for-multi-screen-cases.patch -skl_uncondition_memory_bandwitdth_WA_n_adjusted_mode_in_SAGV_check_on_a7fac751ddba.patch ### ### Hardware Monitoring diff --git a/kernel/kernel/files/patches/mageia/skl_uncondition_memory_bandwitdth_WA_n_adjusted_mode_in_SAGV_check_on_a7fac751ddba.patch b/kernel/kernel/files/patches/mageia/skl_uncondition_memory_bandwitdth_WA_n_adjusted_mode_in_SAGV_check_on_a7fac751ddba.patch deleted file mode 100644 index 1b819dea..00000000 --- a/kernel/kernel/files/patches/mageia/skl_uncondition_memory_bandwitdth_WA_n_adjusted_mode_in_SAGV_check_on_a7fac751ddba.patch +++ /dev/null @@ -1,110 +0,0 @@ -diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c -index 2d24813..498ded6 100644 ---- a/drivers/gpu/drm/i915/intel_pm.c -+++ b/drivers/gpu/drm/i915/intel_pm.c -@@ -2877,6 +2877,21 @@ skl_wm_plane_id(const struct intel_plane *plane) - } - - /* -+ * FIXME: We still don't have the proper code detect if we need to apply the WA, -+ * so assume we'll always need it in order to avoid underruns. -+ */ -+static bool skl_needs_memory_bw_wa(struct intel_atomic_state *state) -+{ -+ struct drm_i915_private *dev_priv = to_i915(state->base.dev); -+ -+ if (IS_SKYLAKE(dev_priv) || IS_BROXTON(dev_priv) || -+ IS_KABYLAKE(dev_priv)) -+ return true; -+ -+ return false; -+} -+ -+/* - * SAGV dynamically adjusts the system agent voltage and clock frequencies - * depending on power and performance requirements. The display engine access - * to system memory is blocked during the adjustment time. Because of the -@@ -2979,9 +2994,10 @@ bool skl_can_enable_sagv(struct drm_atomic_state *state) - struct drm_device *dev = state->dev; - struct drm_i915_private *dev_priv = to_i915(dev); - struct intel_atomic_state *intel_state = to_intel_atomic_state(state); -- struct drm_crtc *crtc; -+ struct intel_crtc *crtc; -+ struct intel_plane *plane; - enum pipe pipe; -- int level, plane; -+ int level, id, latency; - - /* - * SKL workaround: bspec recommends we disable the SAGV when we have -@@ -2996,27 +3012,35 @@ bool skl_can_enable_sagv(struct drm_atomic_state *state) - - /* Since we're now guaranteed to only have one active CRTC... */ - pipe = ffs(intel_state->active_crtcs) - 1; -- crtc = dev_priv->pipe_to_crtc_mapping[pipe]; -+ crtc = to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]); - -- if (crtc->state->mode.flags & DRM_MODE_FLAG_INTERLACE) -+ if (crtc->base.state->adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE) - return false; -+ for_each_intel_plane_on_crtc(dev, crtc, plane) { -+ id = skl_wm_plane_id(plane); - -- for_each_plane(dev_priv, pipe, plane) { - /* Skip this plane if it's not enabled */ -- if (intel_state->wm_results.plane[pipe][plane][0] == 0) -+ if (intel_state->wm_results.plane[pipe][id][0] == 0) - continue; - - /* Find the highest enabled wm level for this plane */ - for (level = ilk_wm_max_level(dev); -- intel_state->wm_results.plane[pipe][plane][level] == 0; --level) -+ intel_state->wm_results.plane[pipe][id][level] == 0; --level) - { } - -+ latency = dev_priv->wm.skl_latency[level]; -+ -+ if (skl_needs_memory_bw_wa(intel_state) && -+ plane->base.state->fb->modifier[0] == -+ I915_FORMAT_MOD_X_TILED) -+ latency += 15; -+ - /* - * If any of the planes on this pipe don't enable wm levels - * that incur memory latencies higher then 30µs we can't enable - * the SAGV - */ -- if (dev_priv->wm.skl_latency[level] < SKL_SAGV_BLOCK_TIME) -+ if (latency < SKL_SAGV_BLOCK_TIME) - return false; - } - -@@ -3546,12 +3570,18 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv, - uint8_t cpp; - uint32_t width = 0, height = 0; - uint32_t plane_pixel_rate; -+ struct intel_atomic_state *state = -+ to_intel_atomic_state(cstate->base.state); -+ bool apply_memory_bw_wa = skl_needs_memory_bw_wa(state); - - if (latency == 0 || !cstate->base.active || !intel_pstate->visible) { - *enabled = false; - return 0; - } - -+ if (apply_memory_bw_wa && fb->modifier[0] == I915_FORMAT_MOD_X_TILED) -+ latency += 15; -+ - width = drm_rect_width(&intel_pstate->src) >> 16; - height = drm_rect_height(&intel_pstate->src) >> 16; - -@@ -3593,6 +3623,9 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv, - } - } - y_tile_minimum = plane_blocks_per_line * min_scanlines; -+ if (apply_memory_bw_wa) -+ y_tile_minimum *= 2; -+ - selected_result = max(method2, y_tile_minimum); - } else { - if ((ddb_allocation / plane_blocks_per_line) >= 1) diff --git a/kernel/kernel/files/patches/mageia/stable-arm-clk-imx35-fix-name-for-ckil-clk.patch b/kernel/kernel/files/patches/mageia/stable-arm-clk-imx35-fix-name-for-ckil-clk.patch new file mode 100644 index 00000000..04c91a98 --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-arm-clk-imx35-fix-name-for-ckil-clk.patch @@ -0,0 +1,37 @@ +From fcff03813a7c612873303037cef5ba0329850c35 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= +Date: Thu, 8 Sep 2016 11:30:21 +0200 +Subject: ARM: clk-imx35: fix name for ckil clk +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Uwe Kleine-König + +commit fcff03813a7c612873303037cef5ba0329850c35 upstream. + +This fixes + [ 0.000000] i.MX clk 82: register failed with -17 +because the name is duplicated. + +Signed-off-by: Uwe Kleine-König +Fixes: 3713e3f5e927 ("clk: imx35: define two clocks for rtc") +Acked-by: Shawn Guo +Signed-off-by: Stephen Boyd +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/clk/imx/clk-imx35.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/clk/imx/clk-imx35.c ++++ b/drivers/clk/imx/clk-imx35.c +@@ -115,7 +115,7 @@ static void __init _mx35_clocks_init(voi + } + + clk[ckih] = imx_clk_fixed("ckih", 24000000); +- clk[ckil] = imx_clk_fixed("ckih", 32768); ++ clk[ckil] = imx_clk_fixed("ckil", 32768); + clk[mpll] = imx_clk_pllv1(IMX_PLLV1_IMX35, "mpll", "ckih", base + MX35_CCM_MPCTL); + clk[ppll] = imx_clk_pllv1(IMX_PLLV1_IMX35, "ppll", "ckih", base + MX35_CCM_PPCTL); + diff --git a/kernel/kernel/files/patches/mageia/stable-asoc-dapm-fix-kcontrol-creation-for-output-driver-widget.patch b/kernel/kernel/files/patches/mageia/stable-asoc-dapm-fix-kcontrol-creation-for-output-driver-widget.patch new file mode 100644 index 00000000..d7cd051d --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-asoc-dapm-fix-kcontrol-creation-for-output-driver-widget.patch @@ -0,0 +1,41 @@ +From a3930ed060df4ccf2a06cf0b68738dec3e6ff89a Mon Sep 17 00:00:00 2001 +From: Chen-Yu Tsai +Date: Sat, 27 Aug 2016 19:28:00 +0800 +Subject: ASoC: dapm: Fix kcontrol creation for output driver widget + +From: Chen-Yu Tsai + +commit a3930ed060df4ccf2a06cf0b68738dec3e6ff89a upstream. + +Commit d88429a695a4 ("ASoC: dapm: Add output driver widget") added +the snd_soc_dapm_out_drv ID for the output driver widget, which is +the same as the PGA widget, with a later power sequence number. + +Commit 19a2557b76d6 ("ASoC: dapm: Add kcontrol support for PGAs") +then added kcontrol support for PGA widgets, but failed to account +for output driver widgets. Attempts to use kcontrols with output +driver widgets result in silent failures, with the developer having +little idea about what went on. + +Add snd_soc_dapm_out_drv to the switch/case block under snd_soc_dapm_pga +in dapm_create_or_share_kcontrol, since they are essentially the same. + +Fixes: 19a2557b76d6 (ASoC: dapm: Add kcontrol support for PGAs) +Signed-off-by: Chen-Yu Tsai +Signed-off-by: Mark Brown +Signed-off-by: Greg Kroah-Hartman + +--- + sound/soc/soc-dapm.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/sound/soc/soc-dapm.c ++++ b/sound/soc/soc-dapm.c +@@ -823,6 +823,7 @@ static int dapm_create_or_share_kcontrol + case snd_soc_dapm_switch: + case snd_soc_dapm_mixer: + case snd_soc_dapm_pga: ++ case snd_soc_dapm_out_drv: + wname_in_long_name = true; + kcname_in_long_name = true; + break; diff --git a/kernel/kernel/files/patches/mageia/stable-asoc-dapm-fix-possible-uninitialized-variable-in-snd_soc_dapm_get_volsw.patch b/kernel/kernel/files/patches/mageia/stable-asoc-dapm-fix-possible-uninitialized-variable-in-snd_soc_dapm_get_volsw.patch new file mode 100644 index 00000000..014bcdc0 --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-asoc-dapm-fix-possible-uninitialized-variable-in-snd_soc_dapm_get_volsw.patch @@ -0,0 +1,42 @@ +From 01ad5e7de67b408d9b48b437b06a9938ddf460b5 Mon Sep 17 00:00:00 2001 +From: Chen-Yu Tsai +Date: Sat, 27 Aug 2016 19:27:58 +0800 +Subject: ASoC: dapm: Fix possible uninitialized variable in snd_soc_dapm_get_volsw() + +From: Chen-Yu Tsai + +commit 01ad5e7de67b408d9b48b437b06a9938ddf460b5 upstream. + +If soc_dapm_read() fails, val will be uninitialized, and bogus values +will be written later: + + ret = soc_dapm_read(dapm, reg, &val); + val = (val >> shift) & mask; + +However, the compiler does not give a warning. Return on error before +val is really used to avoid this. + +This is similar to the commit 6912831623c5 ("ASoC: dapm: Fix +uninitialized variable in snd_soc_dapm_get_enum_double()") + +Fixes: ce0fc93ae56e (ASoC: Add DAPM support at the component level) +Signed-off-by: Chen-Yu Tsai +Signed-off-by: Mark Brown +Signed-off-by: Greg Kroah-Hartman + +--- + sound/soc/soc-dapm.c | 3 +++ + 1 file changed, 3 insertions(+) + +--- a/sound/soc/soc-dapm.c ++++ b/sound/soc/soc-dapm.c +@@ -3049,6 +3049,9 @@ int snd_soc_dapm_get_volsw(struct snd_kc + } + mutex_unlock(&card->dapm_mutex); + ++ if (ret) ++ return ret; ++ + if (invert) + ucontrol->value.integer.value[0] = max - val; + else diff --git a/kernel/kernel/files/patches/mageia/stable-asoc-dapm-fix-value-setting-for-_enum_double-mux-s-second-channel.patch b/kernel/kernel/files/patches/mageia/stable-asoc-dapm-fix-value-setting-for-_enum_double-mux-s-second-channel.patch new file mode 100644 index 00000000..737cd33e --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-asoc-dapm-fix-value-setting-for-_enum_double-mux-s-second-channel.patch @@ -0,0 +1,35 @@ +From 071133a209354f39d4e5785d5a6a390e03241841 Mon Sep 17 00:00:00 2001 +From: Chen-Yu Tsai +Date: Sat, 27 Aug 2016 19:27:59 +0800 +Subject: ASoC: dapm: Fix value setting for _ENUM_DOUBLE MUX's second channel + +From: Chen-Yu Tsai + +commit 071133a209354f39d4e5785d5a6a390e03241841 upstream. + +The value for the second channel in _ENUM_DOUBLE (double channel) MUXs +is not correctly updated, due to using the wrong bit shift. + +Use the correct bit shift, so both channels toggle together. + +Fixes: 3727b4968453 (ASoC: dapm: Consolidate MUXs and value MUXs) +Signed-off-by: Chen-Yu Tsai +Reviewed-by: Charles Keepax +Signed-off-by: Mark Brown +Signed-off-by: Greg Kroah-Hartman + +--- + sound/soc/soc-dapm.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/sound/soc/soc-dapm.c ++++ b/sound/soc/soc-dapm.c +@@ -3203,7 +3203,7 @@ int snd_soc_dapm_put_enum_double(struct + if (e->shift_l != e->shift_r) { + if (item[1] > e->items) + return -EINVAL; +- val |= snd_soc_enum_item_to_val(e, item[1]) << e->shift_l; ++ val |= snd_soc_enum_item_to_val(e, item[1]) << e->shift_r; + mask |= e->mask << e->shift_r; + } + diff --git a/kernel/kernel/files/patches/mageia/stable-asoc-sst-bxt-da7219_max98357a-fix-obsoleted-initializers-for-array.patch b/kernel/kernel/files/patches/mageia/stable-asoc-sst-bxt-da7219_max98357a-fix-obsoleted-initializers-for-array.patch new file mode 100644 index 00000000..610d3216 --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-asoc-sst-bxt-da7219_max98357a-fix-obsoleted-initializers-for-array.patch @@ -0,0 +1,85 @@ +From 43d443dc257c00ef3a3f940b6abfb7537c4fcbe8 Mon Sep 17 00:00:00 2001 +From: Takashi Sakamoto +Date: Tue, 27 Sep 2016 07:45:09 +0900 +Subject: ASoC: sst-bxt-da7219_max98357a: fix obsoleted initializers for array + +From: Takashi Sakamoto + +commit 43d443dc257c00ef3a3f940b6abfb7537c4fcbe8 upstream. + +Sparse reports below warnings. + +bxt_da7219_max98357a.c:250:9: warning: obsolete array initializer, use C99 syntax +bxt_da7219_max98357a.c:275:9: warning: obsolete array initializer, use C99 syntax +bxt_da7219_max98357a.c:290:9: warning: obsolete array initializer, use C99 syntax +bxt_da7219_max98357a.c:304:9: warning: obsolete array initializer, use C99 syntax +bxt_da7219_max98357a.c:317:9: warning: obsolete array initializer, use C99 syntax + +There's no need to use obsoleted way. This commit fixes it. + +Fixes: 723bad3fef8b (ASoC: Intel: Add Broxton-P Dialog Maxim machine driver) +Signed-off-by: Takashi Sakamoto +Acked-by: Vinod Koul +Signed-off-by: Mark Brown +Signed-off-by: Greg Kroah-Hartman + +--- + sound/soc/intel/boards/bxt_da7219_max98357a.c | 12 ++++++------ + 1 file changed, 6 insertions(+), 6 deletions(-) + +--- a/sound/soc/intel/boards/bxt_da7219_max98357a.c ++++ b/sound/soc/intel/boards/bxt_da7219_max98357a.c +@@ -255,7 +255,7 @@ static struct snd_soc_ops broxton_da7219 + /* broxton digital audio interface glue - connects codec <--> CPU */ + static struct snd_soc_dai_link broxton_dais[] = { + /* Front End DAI links */ +- [BXT_DPCM_AUDIO_PB] ++ [BXT_DPCM_AUDIO_PB] = + { + .name = "Bxt Audio Port", + .stream_name = "Audio", +@@ -271,7 +271,7 @@ static struct snd_soc_dai_link broxton_d + .dpcm_playback = 1, + .ops = &broxton_da7219_fe_ops, + }, +- [BXT_DPCM_AUDIO_CP] ++ [BXT_DPCM_AUDIO_CP] = + { + .name = "Bxt Audio Capture Port", + .stream_name = "Audio Record", +@@ -286,7 +286,7 @@ static struct snd_soc_dai_link broxton_d + .dpcm_capture = 1, + .ops = &broxton_da7219_fe_ops, + }, +- [BXT_DPCM_AUDIO_REF_CP] ++ [BXT_DPCM_AUDIO_REF_CP] = + { + .name = "Bxt Audio Reference cap", + .stream_name = "Refcap", +@@ -300,7 +300,7 @@ static struct snd_soc_dai_link broxton_d + .nonatomic = 1, + .dynamic = 1, + }, +- [BXT_DPCM_AUDIO_HDMI1_PB] ++ [BXT_DPCM_AUDIO_HDMI1_PB] = + { + .name = "Bxt HDMI Port1", + .stream_name = "Hdmi1", +@@ -313,7 +313,7 @@ static struct snd_soc_dai_link broxton_d + .nonatomic = 1, + .dynamic = 1, + }, +- [BXT_DPCM_AUDIO_HDMI2_PB] ++ [BXT_DPCM_AUDIO_HDMI2_PB] = + { + .name = "Bxt HDMI Port2", + .stream_name = "Hdmi2", +@@ -326,7 +326,7 @@ static struct snd_soc_dai_link broxton_d + .nonatomic = 1, + .dynamic = 1, + }, +- [BXT_DPCM_AUDIO_HDMI3_PB] ++ [BXT_DPCM_AUDIO_HDMI3_PB] = + { + .name = "Bxt HDMI Port3", + .stream_name = "Hdmi3", diff --git a/kernel/kernel/files/patches/mageia/stable-asoc-sst-bxt-rt298-fix-obsoleted-initializers-for-array.patch b/kernel/kernel/files/patches/mageia/stable-asoc-sst-bxt-rt298-fix-obsoleted-initializers-for-array.patch new file mode 100644 index 00000000..9d9c7243 --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-asoc-sst-bxt-rt298-fix-obsoleted-initializers-for-array.patch @@ -0,0 +1,96 @@ +From 5919a3898136aae4d2cb4b18b44f70f7b185aa47 Mon Sep 17 00:00:00 2001 +From: Takashi Sakamoto +Date: Tue, 27 Sep 2016 07:45:08 +0900 +Subject: ASoC: sst-bxt-rt298: fix obsoleted initializers for array + +From: Takashi Sakamoto + +commit 5919a3898136aae4d2cb4b18b44f70f7b185aa47 upstream. + +Sparse reports below warnings. + +bxt_rt298.c:275:9: warning: obsolete array initializer, use C99 syntax +bxt_rt298.c:290:9: warning: obsolete array initializer, use C99 syntax +bxt_rt298.c:304:9: warning: obsolete array initializer, use C99 syntax +bxt_rt298.c:317:9: warning: obsolete array initializer, use C99 syntax +bxt_rt298.c:331:9: warning: obsolete array initializer, use C99 syntax +bxt_rt298.c:344:9: warning: obsolete array initializer, use C99 syntax +bxt_rt298.c:357:9: warning: obsolete array initializer, use C99 syntax + +There's no need to use obsoleted way. This commit fixes it. + +Fixes: 76016322ec56 (ASoC: Intel: Add Broxton-P machine driver) +Signed-off-by: Takashi Sakamoto +Acked-by: Vinod Koul +Signed-off-by: Mark Brown +Signed-off-by: Greg Kroah-Hartman + +--- + sound/soc/intel/boards/bxt_rt298.c | 14 +++++++------- + 1 file changed, 7 insertions(+), 7 deletions(-) + +--- a/sound/soc/intel/boards/bxt_rt298.c ++++ b/sound/soc/intel/boards/bxt_rt298.c +@@ -271,7 +271,7 @@ static const struct snd_soc_ops broxton_ + /* broxton digital audio interface glue - connects codec <--> CPU */ + static struct snd_soc_dai_link broxton_rt298_dais[] = { + /* Front End DAI links */ +- [BXT_DPCM_AUDIO_PB] ++ [BXT_DPCM_AUDIO_PB] = + { + .name = "Bxt Audio Port", + .stream_name = "Audio", +@@ -286,7 +286,7 @@ static struct snd_soc_dai_link broxton_r + .dpcm_playback = 1, + .ops = &broxton_rt286_fe_ops, + }, +- [BXT_DPCM_AUDIO_CP] ++ [BXT_DPCM_AUDIO_CP] = + { + .name = "Bxt Audio Capture Port", + .stream_name = "Audio Record", +@@ -300,7 +300,7 @@ static struct snd_soc_dai_link broxton_r + .dpcm_capture = 1, + .ops = &broxton_rt286_fe_ops, + }, +- [BXT_DPCM_AUDIO_REF_CP] ++ [BXT_DPCM_AUDIO_REF_CP] = + { + .name = "Bxt Audio Reference cap", + .stream_name = "refcap", +@@ -313,7 +313,7 @@ static struct snd_soc_dai_link broxton_r + .nonatomic = 1, + .dynamic = 1, + }, +- [BXT_DPCM_AUDIO_DMIC_CP] ++ [BXT_DPCM_AUDIO_DMIC_CP] = + { + .name = "Bxt Audio DMIC cap", + .stream_name = "dmiccap", +@@ -327,7 +327,7 @@ static struct snd_soc_dai_link broxton_r + .dynamic = 1, + .ops = &broxton_dmic_ops, + }, +- [BXT_DPCM_AUDIO_HDMI1_PB] ++ [BXT_DPCM_AUDIO_HDMI1_PB] = + { + .name = "Bxt HDMI Port1", + .stream_name = "Hdmi1", +@@ -340,7 +340,7 @@ static struct snd_soc_dai_link broxton_r + .nonatomic = 1, + .dynamic = 1, + }, +- [BXT_DPCM_AUDIO_HDMI2_PB] ++ [BXT_DPCM_AUDIO_HDMI2_PB] = + { + .name = "Bxt HDMI Port2", + .stream_name = "Hdmi2", +@@ -353,7 +353,7 @@ static struct snd_soc_dai_link broxton_r + .nonatomic = 1, + .dynamic = 1, + }, +- [BXT_DPCM_AUDIO_HDMI3_PB] ++ [BXT_DPCM_AUDIO_HDMI3_PB] = + { + .name = "Bxt HDMI Port3", + .stream_name = "Hdmi3", diff --git a/kernel/kernel/files/patches/mageia/stable-asoc-topology-fix-error-return-code-in-soc_tplg_dapm_widget_create.patch b/kernel/kernel/files/patches/mageia/stable-asoc-topology-fix-error-return-code-in-soc_tplg_dapm_widget_create.patch new file mode 100644 index 00000000..f029224c --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-asoc-topology-fix-error-return-code-in-soc_tplg_dapm_widget_create.patch @@ -0,0 +1,31 @@ +From 8ae3ea48df0d746b663057cf0b972a18d0777b7b Mon Sep 17 00:00:00 2001 +From: Wei Yongjun +Date: Wed, 10 Aug 2016 13:43:12 +0000 +Subject: ASoC: topology: Fix error return code in soc_tplg_dapm_widget_create() + +From: Wei Yongjun + +commit 8ae3ea48df0d746b663057cf0b972a18d0777b7b upstream. + +Fix to return error code -ENOMEM instead of 0 when failed to create +widget, as done elsewhere in this function. + +Fixes: 8a9782346dcc ("ASoC: topology: Add topology core") +Signed-off-by: Wei Yongjun +Signed-off-by: Mark Brown +Signed-off-by: Greg Kroah-Hartman + +--- + sound/soc/soc-topology.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/sound/soc/soc-topology.c ++++ b/sound/soc/soc-topology.c +@@ -1475,6 +1475,7 @@ widget: + if (widget == NULL) { + dev_err(tplg->dev, "ASoC: failed to create widget %s controls\n", + w->name); ++ ret = -ENOMEM; + goto hdr_err; + } + diff --git a/kernel/kernel/files/patches/mageia/stable-ath10k-add-wmi_service_periodic_chan_stat_support-wmi-service.patch b/kernel/kernel/files/patches/mageia/stable-ath10k-add-wmi_service_periodic_chan_stat_support-wmi-service.patch new file mode 100644 index 00000000..d29be132 --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-ath10k-add-wmi_service_periodic_chan_stat_support-wmi-service.patch @@ -0,0 +1,58 @@ +From 64ed5771aca2fcfb8ea440fc679741054011fd7e Mon Sep 17 00:00:00 2001 +From: Tamizh chelvam +Date: Tue, 2 Aug 2016 16:13:14 +0530 +Subject: ath10k: Add WMI_SERVICE_PERIODIC_CHAN_STAT_SUPPORT wmi service + +From: Tamizh chelvam + +commit 64ed5771aca2fcfb8ea440fc679741054011fd7e upstream. + +WMI_SERVICE_PERIODIC_CHAN_STAT_SUPPORT service has missed in +the commit 7e247a9e88dc ("ath10k: add dynamic tx mode switch +config support for qca4019"). This patch adds the service to +avoid mismatch between host and target. + +Fixes: 7e247a9e88dc ("ath10k: add dynamic tx mode switch config support for qca4019") +Signed-off-by: Tamizh chelvam +Signed-off-by: Kalle Valo +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/net/wireless/ath/ath10k/wmi.h | 5 +++++ + 1 file changed, 5 insertions(+) + +--- a/drivers/net/wireless/ath/ath10k/wmi.h ++++ b/drivers/net/wireless/ath/ath10k/wmi.h +@@ -180,6 +180,7 @@ enum wmi_service { + WMI_SERVICE_MESH_NON_11S, + WMI_SERVICE_PEER_STATS, + WMI_SERVICE_RESTRT_CHNL_SUPPORT, ++ WMI_SERVICE_PERIODIC_CHAN_STAT_SUPPORT, + WMI_SERVICE_TX_MODE_PUSH_ONLY, + WMI_SERVICE_TX_MODE_PUSH_PULL, + WMI_SERVICE_TX_MODE_DYNAMIC, +@@ -305,6 +306,7 @@ enum wmi_10_4_service { + WMI_10_4_SERVICE_RESTRT_CHNL_SUPPORT, + WMI_10_4_SERVICE_PEER_STATS, + WMI_10_4_SERVICE_MESH_11S, ++ WMI_10_4_SERVICE_PERIODIC_CHAN_STAT_SUPPORT, + WMI_10_4_SERVICE_TX_MODE_PUSH_ONLY, + WMI_10_4_SERVICE_TX_MODE_PUSH_PULL, + WMI_10_4_SERVICE_TX_MODE_DYNAMIC, +@@ -402,6 +404,7 @@ static inline char *wmi_service_name(int + SVCSTR(WMI_SERVICE_MESH_NON_11S); + SVCSTR(WMI_SERVICE_PEER_STATS); + SVCSTR(WMI_SERVICE_RESTRT_CHNL_SUPPORT); ++ SVCSTR(WMI_SERVICE_PERIODIC_CHAN_STAT_SUPPORT); + SVCSTR(WMI_SERVICE_TX_MODE_PUSH_ONLY); + SVCSTR(WMI_SERVICE_TX_MODE_PUSH_PULL); + SVCSTR(WMI_SERVICE_TX_MODE_DYNAMIC); +@@ -652,6 +655,8 @@ static inline void wmi_10_4_svc_map(cons + WMI_SERVICE_PEER_STATS, len); + SVCMAP(WMI_10_4_SERVICE_MESH_11S, + WMI_SERVICE_MESH_11S, len); ++ SVCMAP(WMI_10_4_SERVICE_PERIODIC_CHAN_STAT_SUPPORT, ++ WMI_SERVICE_PERIODIC_CHAN_STAT_SUPPORT, len); + SVCMAP(WMI_10_4_SERVICE_TX_MODE_PUSH_ONLY, + WMI_SERVICE_TX_MODE_PUSH_ONLY, len); + SVCMAP(WMI_10_4_SERVICE_TX_MODE_PUSH_PULL, diff --git a/kernel/kernel/files/patches/mageia/stable-ath10k-fix-reporting-channel-survey-data.patch b/kernel/kernel/files/patches/mageia/stable-ath10k-fix-reporting-channel-survey-data.patch new file mode 100644 index 00000000..463c00aa --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-ath10k-fix-reporting-channel-survey-data.patch @@ -0,0 +1,37 @@ +From 77eb3d693182b4eaa88c6ba406fbb92b1f1bd636 Mon Sep 17 00:00:00 2001 +From: Ashok Raj Nagarajan +Date: Fri, 2 Sep 2016 10:59:53 +0530 +Subject: ath10k: fix reporting channel survey data + +From: Ashok Raj Nagarajan + +commit 77eb3d693182b4eaa88c6ba406fbb92b1f1bd636 upstream. + +When user requests for survey dump data, driver is providing wrong survey +information. This information we sent is the survey data that we have +collected during previous user request. + +This issue occurs because we request survey dump for wrong channel. With +this change, we correctly display the correct and current survey +information to userspace. + +Fixes: fa7937e3d5c2 ("ath10k: update bss channel survey information") +Signed-off-by: Ashok Raj Nagarajan +Signed-off-by: Kalle Valo +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/net/wireless/ath/ath10k/mac.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/net/wireless/ath/ath10k/mac.c ++++ b/drivers/net/wireless/ath/ath10k/mac.c +@@ -6558,7 +6558,7 @@ static int ath10k_get_survey(struct ieee + goto exit; + } + +- ath10k_mac_update_bss_chan_survey(ar, survey->channel); ++ ath10k_mac_update_bss_chan_survey(ar, &sband->channels[idx]); + + spin_lock_bh(&ar->data_lock); + memcpy(survey, ar_survey, sizeof(*survey)); diff --git a/kernel/kernel/files/patches/mageia/stable-ath10k-fix-sending-frame-in-management-path-in-push-txq-logic.patch b/kernel/kernel/files/patches/mageia/stable-ath10k-fix-sending-frame-in-management-path-in-push-txq-logic.patch new file mode 100644 index 00000000..4e94923d --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-ath10k-fix-sending-frame-in-management-path-in-push-txq-logic.patch @@ -0,0 +1,81 @@ +From e4fd726f21cdae0dc9cea6cbfcb7e27f21393f88 Mon Sep 17 00:00:00 2001 +From: Ashok Raj Nagarajan +Date: Thu, 18 Aug 2016 15:30:04 +0530 +Subject: ath10k: fix sending frame in management path in push txq logic + +From: Ashok Raj Nagarajan + +commit e4fd726f21cdae0dc9cea6cbfcb7e27f21393f88 upstream. + +In the wake tx queue path, we are not checking if the frame to be sent +takes management path or not. For eg. QOS null func frame coming here will +take the management path. Since we are not incrementing the descriptor +counter (num_pending_mgmt_tx) w.r.t tx management, on tx completion it is +possible to see negative values. + +When the above counter reaches a negative value, we will not be sending a +probe response out. + + if (is_presp && + ar->hw_params.max_probe_resp_desc_thres < htt->num_pending_mgmt_tx) + +For IPQ4019, max_probe_resp_desc_thres (u32) is 24 is compared against +num_pending_mgmt_tx (int) and the above condtions comes true if the counter +is negative and we drop the probe response. + +To avoid this, check on the wake tx queue path as well for the tx path of +the frame and increment the appropriate counters + +Fixes: cac085524cf1 "ath10k: move mgmt descriptor limit handle under mgmt_tx" +Signed-off-by: Ashok Raj Nagarajan +Signed-off-by: Kalle Valo +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/net/wireless/ath/ath10k/mac.c | 20 ++++++++++++++++++++ + 1 file changed, 20 insertions(+) + +--- a/drivers/net/wireless/ath/ath10k/mac.c ++++ b/drivers/net/wireless/ath/ath10k/mac.c +@@ -3777,7 +3777,9 @@ int ath10k_mac_tx_push_txq(struct ieee80 + enum ath10k_hw_txrx_mode txmode; + enum ath10k_mac_tx_path txpath; + struct sk_buff *skb; ++ struct ieee80211_hdr *hdr; + size_t skb_len; ++ bool is_mgmt, is_presp; + int ret; + + spin_lock_bh(&ar->htt.tx_lock); +@@ -3801,6 +3803,22 @@ int ath10k_mac_tx_push_txq(struct ieee80 + skb_len = skb->len; + txmode = ath10k_mac_tx_h_get_txmode(ar, vif, sta, skb); + txpath = ath10k_mac_tx_h_get_txpath(ar, skb, txmode); ++ is_mgmt = (txpath == ATH10K_MAC_TX_HTT_MGMT); ++ ++ if (is_mgmt) { ++ hdr = (struct ieee80211_hdr *)skb->data; ++ is_presp = ieee80211_is_probe_resp(hdr->frame_control); ++ ++ spin_lock_bh(&ar->htt.tx_lock); ++ ret = ath10k_htt_tx_mgmt_inc_pending(htt, is_mgmt, is_presp); ++ ++ if (ret) { ++ ath10k_htt_tx_dec_pending(htt); ++ spin_unlock_bh(&ar->htt.tx_lock); ++ return ret; ++ } ++ spin_unlock_bh(&ar->htt.tx_lock); ++ } + + ret = ath10k_mac_tx(ar, vif, sta, txmode, txpath, skb); + if (unlikely(ret)) { +@@ -3808,6 +3826,8 @@ int ath10k_mac_tx_push_txq(struct ieee80 + + spin_lock_bh(&ar->htt.tx_lock); + ath10k_htt_tx_dec_pending(htt); ++ if (is_mgmt) ++ ath10k_htt_tx_mgmt_dec_pending(htt); + spin_unlock_bh(&ar->htt.tx_lock); + + return ret; diff --git a/kernel/kernel/files/patches/mageia/stable-ath10k-fix-throughput-regression-in-multi-client-mode.patch b/kernel/kernel/files/patches/mageia/stable-ath10k-fix-throughput-regression-in-multi-client-mode.patch new file mode 100644 index 00000000..965cd1a1 --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-ath10k-fix-throughput-regression-in-multi-client-mode.patch @@ -0,0 +1,54 @@ +From 18f53fe0f30331e826b075709ed7b26b9283235e Mon Sep 17 00:00:00 2001 +From: Rajkumar Manoharan +Date: Fri, 2 Sep 2016 19:46:10 +0300 +Subject: ath10k: fix throughput regression in multi client mode + +From: Rajkumar Manoharan + +commit 18f53fe0f30331e826b075709ed7b26b9283235e upstream. + +commit 7a0adc83f34d ("ath10k: improve tx scheduling") is causing +severe throughput drop in multi client mode. This issue is originally +reported in veriwave setup with 50 clients with TCP downlink traffic. +While increasing number of clients, the average throughput drops +gradually. With 50 clients, the combined peak throughput is decreased +to 98 Mbps whereas reverting given commit restored it to 550 Mbps. + +Processing txqs for every tx completion is causing overhead. Ideally for +management frame tx completion, pending txqs processing can be avoided. +The change partly reverts the commit "ath10k: improve tx scheduling". +Processing pending txqs after all skbs tx completion will yeild enough +room to burst tx frames. + +Fixes: 7a0adc83f34d ("ath10k: improve tx scheduling") +Signed-off-by: Rajkumar Manoharan +Signed-off-by: Kalle Valo +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/net/wireless/ath/ath10k/htt_rx.c | 2 ++ + drivers/net/wireless/ath/ath10k/txrx.c | 2 -- + 2 files changed, 2 insertions(+), 2 deletions(-) + +--- a/drivers/net/wireless/ath/ath10k/htt_rx.c ++++ b/drivers/net/wireless/ath/ath10k/htt_rx.c +@@ -2394,6 +2394,8 @@ static void ath10k_htt_txrx_compl_task(u + skb_queue_splice_init(&htt->rx_in_ord_compl_q, &rx_ind_q); + spin_unlock_irqrestore(&htt->rx_in_ord_compl_q.lock, flags); + ++ ath10k_mac_tx_push_pending(ar); ++ + spin_lock_irqsave(&htt->tx_fetch_ind_q.lock, flags); + skb_queue_splice_init(&htt->tx_fetch_ind_q, &tx_ind_q); + spin_unlock_irqrestore(&htt->tx_fetch_ind_q.lock, flags); +--- a/drivers/net/wireless/ath/ath10k/txrx.c ++++ b/drivers/net/wireless/ath/ath10k/txrx.c +@@ -119,8 +119,6 @@ int ath10k_txrx_tx_unref(struct ath10k_h + ieee80211_tx_status(htt->ar->hw, msdu); + /* we do not own the msdu anymore */ + +- ath10k_mac_tx_push_pending(ar); +- + return 0; + } + diff --git a/kernel/kernel/files/patches/mageia/stable-coresight-remove-erroneous-dma_free_coherent-in-tmc_probe.patch b/kernel/kernel/files/patches/mageia/stable-coresight-remove-erroneous-dma_free_coherent-in-tmc_probe.patch new file mode 100644 index 00000000..b3e6eb41 --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-coresight-remove-erroneous-dma_free_coherent-in-tmc_probe.patch @@ -0,0 +1,37 @@ +From 481e46fe7a88557b66330cbb047b25cc13eff4b9 Mon Sep 17 00:00:00 2001 +From: Suzuki K Poulose +Date: Thu, 25 Aug 2016 15:18:54 -0600 +Subject: coresight: Remove erroneous dma_free_coherent in tmc_probe + +From: Suzuki K Poulose + +commit 481e46fe7a88557b66330cbb047b25cc13eff4b9 upstream. + +commit de5461970b3e9e194 ("coresight: tmc: allocating memory when needed") +removed the static allocation of buffer for the trace data in ETR mode in +tmc_probe. However it failed to remove the "devm_free_coherent" in +tmc_probe when the probe fails due to other reasons. This patch gets +rid of the incorrect dma_free_coherent() call. + +Fixes: commit de5461970b3e9e194 ("coresight: tmc: allocating memory when needed") +Cc: Mathieu Poirier +Signed-off-by: Suzuki K Poulose +Signed-off-by: Mathieu Poirier +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/hwtracing/coresight/coresight-tmc.c | 3 --- + 1 file changed, 3 deletions(-) + +--- a/drivers/hwtracing/coresight/coresight-tmc.c ++++ b/drivers/hwtracing/coresight/coresight-tmc.c +@@ -388,9 +388,6 @@ static int tmc_probe(struct amba_device + err_misc_register: + coresight_unregister(drvdata->csdev); + err_devm_kzalloc: +- if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) +- dma_free_coherent(dev, drvdata->size, +- drvdata->vaddr, drvdata->paddr); + return ret; + } + diff --git a/kernel/kernel/files/patches/mageia/stable-crypto-arm-ghash-ce-add-missing-async-import-export.patch b/kernel/kernel/files/patches/mageia/stable-crypto-arm-ghash-ce-add-missing-async-import-export.patch new file mode 100644 index 00000000..5253ef79 --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-crypto-arm-ghash-ce-add-missing-async-import-export.patch @@ -0,0 +1,64 @@ +From ed4767d612fd2c39e2c4c69eba484c1219dcddb6 Mon Sep 17 00:00:00 2001 +From: Ard Biesheuvel +Date: Thu, 1 Sep 2016 14:25:42 +0100 +Subject: crypto: arm/ghash-ce - add missing async import/export + +From: Ard Biesheuvel + +commit ed4767d612fd2c39e2c4c69eba484c1219dcddb6 upstream. + +Since commit 8996eafdcbad ("crypto: ahash - ensure statesize is non-zero"), +all ahash drivers are required to implement import()/export(), and must have +a non-zero statesize. Fix this for the ARM Crypto Extensions GHASH +implementation. + +Fixes: 8996eafdcbad ("crypto: ahash - ensure statesize is non-zero") +Signed-off-by: Ard Biesheuvel +Signed-off-by: Herbert Xu +Signed-off-by: Greg Kroah-Hartman + +--- + arch/arm/crypto/ghash-ce-glue.c | 24 ++++++++++++++++++++++++ + 1 file changed, 24 insertions(+) + +--- a/arch/arm/crypto/ghash-ce-glue.c ++++ b/arch/arm/crypto/ghash-ce-glue.c +@@ -220,6 +220,27 @@ static int ghash_async_digest(struct aha + } + } + ++static int ghash_async_import(struct ahash_request *req, const void *in) ++{ ++ struct ahash_request *cryptd_req = ahash_request_ctx(req); ++ struct crypto_ahash *tfm = crypto_ahash_reqtfm(req); ++ struct ghash_async_ctx *ctx = crypto_ahash_ctx(tfm); ++ struct shash_desc *desc = cryptd_shash_desc(cryptd_req); ++ ++ desc->tfm = cryptd_ahash_child(ctx->cryptd_tfm); ++ desc->flags = req->base.flags; ++ ++ return crypto_shash_import(desc, in); ++} ++ ++static int ghash_async_export(struct ahash_request *req, void *out) ++{ ++ struct ahash_request *cryptd_req = ahash_request_ctx(req); ++ struct shash_desc *desc = cryptd_shash_desc(cryptd_req); ++ ++ return crypto_shash_export(desc, out); ++} ++ + static int ghash_async_setkey(struct crypto_ahash *tfm, const u8 *key, + unsigned int keylen) + { +@@ -268,7 +289,10 @@ static struct ahash_alg ghash_async_alg + .final = ghash_async_final, + .setkey = ghash_async_setkey, + .digest = ghash_async_digest, ++ .import = ghash_async_import, ++ .export = ghash_async_export, + .halg.digestsize = GHASH_DIGEST_SIZE, ++ .halg.statesize = sizeof(struct ghash_desc_ctx), + .halg.base = { + .cra_name = "ghash", + .cra_driver_name = "ghash-ce", diff --git a/kernel/kernel/files/patches/mageia/stable-crypto-ccp-fix-return-value-check-in-ccp_dmaengine_register.patch b/kernel/kernel/files/patches/mageia/stable-crypto-ccp-fix-return-value-check-in-ccp_dmaengine_register.patch new file mode 100644 index 00000000..2685ecb5 --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-crypto-ccp-fix-return-value-check-in-ccp_dmaengine_register.patch @@ -0,0 +1,33 @@ +From 7514e3688811e610640ec2201ca14dfebfe13442 Mon Sep 17 00:00:00 2001 +From: Wei Yongjun +Date: Sat, 17 Sep 2016 16:01:22 +0000 +Subject: crypto: ccp - Fix return value check in ccp_dmaengine_register() + +From: Wei Yongjun + +commit 7514e3688811e610640ec2201ca14dfebfe13442 upstream. + +Fix the retrn value check which testing the wrong variable +in ccp_dmaengine_register(). + +Fixes: 58ea8abf4904 ("crypto: ccp - Register the CCP as a DMA resource") +Signed-off-by: Wei Yongjun +Acked-by: Gary R Hook +Signed-off-by: Herbert Xu +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/crypto/ccp/ccp-dmaengine.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/crypto/ccp/ccp-dmaengine.c ++++ b/drivers/crypto/ccp/ccp-dmaengine.c +@@ -650,7 +650,7 @@ int ccp_dmaengine_register(struct ccp_de + dma_desc_cache_name = devm_kasprintf(ccp->dev, GFP_KERNEL, + "%s-dmaengine-desc-cache", + ccp->name); +- if (!dma_cmd_cache_name) ++ if (!dma_desc_cache_name) + return -ENOMEM; + ccp->dma_desc_cache = kmem_cache_create(dma_desc_cache_name, + sizeof(struct ccp_dma_desc), diff --git a/kernel/kernel/files/patches/mageia/stable-crypto-gcm-fix-iv-buffer-size-in-crypto_gcm_setkey.patch b/kernel/kernel/files/patches/mageia/stable-crypto-gcm-fix-iv-buffer-size-in-crypto_gcm_setkey.patch new file mode 100644 index 00000000..7a66373f --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-crypto-gcm-fix-iv-buffer-size-in-crypto_gcm_setkey.patch @@ -0,0 +1,35 @@ +From 50d2e6dc1f83db0563c7d6603967bf9585ce934b Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ondrej=20Mosn=C3=A1=C4=8Dek?= +Date: Fri, 23 Sep 2016 10:47:32 +0200 +Subject: crypto: gcm - Fix IV buffer size in crypto_gcm_setkey + +From: Ondrej Mosnáček + +commit 50d2e6dc1f83db0563c7d6603967bf9585ce934b upstream. + +The cipher block size for GCM is 16 bytes, and thus the CTR transform +used in crypto_gcm_setkey() will also expect a 16-byte IV. However, +the code currently reserves only 8 bytes for the IV, causing +an out-of-bounds access in the CTR transform. This patch fixes +the issue by setting the size of the IV buffer to 16 bytes. + +Fixes: 84c911523020 ("[CRYPTO] gcm: Add support for async ciphers") +Signed-off-by: Ondrej Mosnacek +Signed-off-by: Herbert Xu +Signed-off-by: Greg Kroah-Hartman + +--- + crypto/gcm.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/crypto/gcm.c ++++ b/crypto/gcm.c +@@ -117,7 +117,7 @@ static int crypto_gcm_setkey(struct cryp + struct crypto_skcipher *ctr = ctx->ctr; + struct { + be128 hash; +- u8 iv[8]; ++ u8 iv[16]; + + struct crypto_gcm_setkey_result result; + diff --git a/kernel/kernel/files/patches/mageia/stable-crypto-marvell-don-t-overwrite-default-creq-state-during-initialization.patch b/kernel/kernel/files/patches/mageia/stable-crypto-marvell-don-t-overwrite-default-creq-state-during-initialization.patch new file mode 100644 index 00000000..6d98c6f5 --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-crypto-marvell-don-t-overwrite-default-creq-state-during-initialization.patch @@ -0,0 +1,80 @@ +From 57cfda1ac74e58767f6305bd1ea3449177425460 Mon Sep 17 00:00:00 2001 +From: Romain Perier +Date: Tue, 9 Aug 2016 11:03:19 +0200 +Subject: crypto: marvell - Don't overwrite default creq->state during initialization + +From: Romain Perier + +commit 57cfda1ac74e58767f6305bd1ea3449177425460 upstream. + +Currently, in mv_cesa_{md5,sha1,sha256}_init creq->state is initialized +before the call to mv_cesa_ahash_init. This is wrong because this +function fills creq with zero by using memset, so its 'state' that +contains the default DIGEST is overwritten. This commit fixes the issue +by initializing creq->state just after the call to mv_cesa_ahash_init. + +Fixes: commit b0ef51067cb4 ("crypto: marvell/cesa - initialize hash...") +Signed-off-by: Romain Perier +Signed-off-by: Herbert Xu +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/crypto/marvell/hash.c | 15 +++++++++------ + 1 file changed, 9 insertions(+), 6 deletions(-) + +--- a/drivers/crypto/marvell/hash.c ++++ b/drivers/crypto/marvell/hash.c +@@ -805,13 +805,14 @@ static int mv_cesa_md5_init(struct ahash + struct mv_cesa_op_ctx tmpl = { }; + + mv_cesa_set_op_cfg(&tmpl, CESA_SA_DESC_CFG_MACM_MD5); ++ ++ mv_cesa_ahash_init(req, &tmpl, true); ++ + creq->state[0] = MD5_H0; + creq->state[1] = MD5_H1; + creq->state[2] = MD5_H2; + creq->state[3] = MD5_H3; + +- mv_cesa_ahash_init(req, &tmpl, true); +- + return 0; + } + +@@ -873,14 +874,15 @@ static int mv_cesa_sha1_init(struct ahas + struct mv_cesa_op_ctx tmpl = { }; + + mv_cesa_set_op_cfg(&tmpl, CESA_SA_DESC_CFG_MACM_SHA1); ++ ++ mv_cesa_ahash_init(req, &tmpl, false); ++ + creq->state[0] = SHA1_H0; + creq->state[1] = SHA1_H1; + creq->state[2] = SHA1_H2; + creq->state[3] = SHA1_H3; + creq->state[4] = SHA1_H4; + +- mv_cesa_ahash_init(req, &tmpl, false); +- + return 0; + } + +@@ -942,6 +944,9 @@ static int mv_cesa_sha256_init(struct ah + struct mv_cesa_op_ctx tmpl = { }; + + mv_cesa_set_op_cfg(&tmpl, CESA_SA_DESC_CFG_MACM_SHA256); ++ ++ mv_cesa_ahash_init(req, &tmpl, false); ++ + creq->state[0] = SHA256_H0; + creq->state[1] = SHA256_H1; + creq->state[2] = SHA256_H2; +@@ -951,8 +956,6 @@ static int mv_cesa_sha256_init(struct ah + creq->state[6] = SHA256_H6; + creq->state[7] = SHA256_H7; + +- mv_cesa_ahash_init(req, &tmpl, false); +- + return 0; + } + diff --git a/kernel/kernel/files/patches/mageia/stable-crypto-marvell-update-transformation-context-for-each-dequeued-req.patch b/kernel/kernel/files/patches/mageia/stable-crypto-marvell-update-transformation-context-for-each-dequeued-req.patch new file mode 100644 index 00000000..18fb155e --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-crypto-marvell-update-transformation-context-for-each-dequeued-req.patch @@ -0,0 +1,40 @@ +From 09951d83fc58a6f772de09c08e370f6d9970dbb6 Mon Sep 17 00:00:00 2001 +From: Romain Perier +Date: Tue, 9 Aug 2016 11:03:18 +0200 +Subject: crypto: marvell - Update transformation context for each dequeued req + +From: Romain Perier + +commit 09951d83fc58a6f772de09c08e370f6d9970dbb6 upstream. + +So far, sub part of mv_cesa_int was responsible of dequeuing complete +requests, then call the 'cleanup' operation on these reqs and call the +crypto api callback 'complete'. The problem is that the transformation +context 'ctx' is retrieved only once before the while loop. Which means +that the wrong 'cleanup' operation might be called on the wrong type of +cesa requests, it can lead to memory corruptions with this message: + +marvell-cesa f1090000.crypto: dma_pool_free cesa_padding, 5a5a5a5a/5a5a5a5a (bad dma) + +This commit fixes the issue, by updating the transformation context for +each dequeued cesa request. + +Fixes: commit 85030c5168f1 ("crypto: marvell - Add support for chai...") +Signed-off-by: Romain Perier +Signed-off-by: Herbert Xu +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/crypto/marvell/cesa.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/crypto/marvell/cesa.c ++++ b/drivers/crypto/marvell/cesa.c +@@ -166,6 +166,7 @@ static irqreturn_t mv_cesa_int(int irq, + if (!req) + break; + ++ ctx = crypto_tfm_ctx(req->tfm); + mv_cesa_complete_req(ctx, req, 0); + } + } diff --git a/kernel/kernel/files/patches/mageia/stable-dmaengine-ipu-remove-bogus-no_irq-reference.patch b/kernel/kernel/files/patches/mageia/stable-dmaengine-ipu-remove-bogus-no_irq-reference.patch new file mode 100644 index 00000000..dda0b6d5 --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-dmaengine-ipu-remove-bogus-no_irq-reference.patch @@ -0,0 +1,56 @@ +From 86c7e6836479c4045a9a81ed5ea76c51d719f9c1 Mon Sep 17 00:00:00 2001 +From: Arnd Bergmann +Date: Sat, 3 Sep 2016 01:22:02 +0200 +Subject: dmaengine: ipu: remove bogus NO_IRQ reference + +From: Arnd Bergmann + +commit 86c7e6836479c4045a9a81ed5ea76c51d719f9c1 upstream. + +A workaround for a warning introduced a use of the NO_IRQ +macro that should have been gone for a long time. + +It is clear from the code that the value cannot actually +be used, but apparently there was a configuration at +some point that caused a warning, so instead of just +reverting that patch, this rearranges the code in a way that +the warning cannot reappear. + +Signed-off-by: Arnd Bergmann +Fixes: 6ef41cf6f721 ("dmaengine :ipu: change ipu_irq_handler() to remove compile warning") +Signed-off-by: Vinod Koul +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/dma/ipu/ipu_irq.c | 9 ++++----- + 1 file changed, 4 insertions(+), 5 deletions(-) + +--- a/drivers/dma/ipu/ipu_irq.c ++++ b/drivers/dma/ipu/ipu_irq.c +@@ -286,22 +286,21 @@ static void ipu_irq_handler(struct irq_d + raw_spin_unlock(&bank_lock); + while ((line = ffs(status))) { + struct ipu_irq_map *map; +- unsigned int irq = NO_IRQ; ++ unsigned int irq; + + line--; + status &= ~(1UL << line); + + raw_spin_lock(&bank_lock); + map = src2map(32 * i + line); +- if (map) +- irq = map->irq; +- raw_spin_unlock(&bank_lock); +- + if (!map) { ++ raw_spin_unlock(&bank_lock); + pr_err("IPU: Interrupt on unmapped source %u bank %d\n", + line, i); + continue; + } ++ irq = map->irq; ++ raw_spin_unlock(&bank_lock); + generic_handle_irq(irq); + } + } diff --git a/kernel/kernel/files/patches/mageia/stable-drm-amd-powerplay-fix-mclk-not-switching-back-after-multi-head-was-disabled.patch b/kernel/kernel/files/patches/mageia/stable-drm-amd-powerplay-fix-mclk-not-switching-back-after-multi-head-was-disabled.patch new file mode 100644 index 00000000..849b1ee5 --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-drm-amd-powerplay-fix-mclk-not-switching-back-after-multi-head-was-disabled.patch @@ -0,0 +1,46 @@ +From 9716ebc38dfabe6c8e5e3c809e9f3c61dd3740f9 Mon Sep 17 00:00:00 2001 +From: Rex Zhu +Date: Wed, 14 Sep 2016 13:20:34 +0800 +Subject: drm/amd/powerplay: fix mclk not switching back after multi-head was disabled + +From: Rex Zhu + +commit 9716ebc38dfabe6c8e5e3c809e9f3c61dd3740f9 upstream. + +Signed-off-by: Rex Zhu +Reviewed-by: Alex Deucher +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/amd/powerplay/eventmgr/eventactionchains.c | 2 ++ + drivers/gpu/drm/amd/powerplay/eventmgr/psm.c | 3 ++- + 2 files changed, 4 insertions(+), 1 deletion(-) + +--- a/drivers/gpu/drm/amd/powerplay/eventmgr/eventactionchains.c ++++ b/drivers/gpu/drm/amd/powerplay/eventmgr/eventactionchains.c +@@ -262,6 +262,8 @@ static const pem_event_action * const di + unblock_adjust_power_state_tasks, + set_cpu_power_state, + notify_hw_power_source_tasks, ++ get_2d_performance_state_tasks, ++ set_performance_state_tasks, + /* updateDALConfigurationTasks, + variBrightDisplayConfigurationChangeTasks, */ + adjust_power_state_tasks, +--- a/drivers/gpu/drm/amd/powerplay/eventmgr/psm.c ++++ b/drivers/gpu/drm/amd/powerplay/eventmgr/psm.c +@@ -100,11 +100,12 @@ int psm_adjust_power_state_dynamic(struc + if (requested == NULL) + return 0; + ++ phm_apply_state_adjust_rules(hwmgr, requested, pcurrent); ++ + if (pcurrent == NULL || (0 != phm_check_states_equal(hwmgr, &pcurrent->hardware, &requested->hardware, &equal))) + equal = false; + + if (!equal || phm_check_smc_update_required_for_display_configuration(hwmgr)) { +- phm_apply_state_adjust_rules(hwmgr, requested, pcurrent); + phm_set_power_state(hwmgr, &pcurrent->hardware, &requested->hardware); + hwmgr->current_ps = requested; + } diff --git a/kernel/kernel/files/patches/mageia/stable-drm-amdgpu-change-vblank_time-s-calculation-method-to-reduce-computational-error.patch b/kernel/kernel/files/patches/mageia/stable-drm-amdgpu-change-vblank_time-s-calculation-method-to-reduce-computational-error.patch new file mode 100644 index 00000000..a99ae3e7 --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-drm-amdgpu-change-vblank_time-s-calculation-method-to-reduce-computational-error.patch @@ -0,0 +1,53 @@ +From dc8184aa8621ee8048652496884d9f40d4bb407f Mon Sep 17 00:00:00 2001 +From: Rex Zhu +Date: Mon, 10 Oct 2016 15:57:21 +0800 +Subject: drm/amdgpu: change vblank_time's calculation method to reduce computational error. + +From: Rex Zhu + +commit dc8184aa8621ee8048652496884d9f40d4bb407f upstream. + +Signed-off-by: Rex Zhu +Reviewed-by: Alex Deucher +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c | 14 ++++++++------ + 1 file changed, 8 insertions(+), 6 deletions(-) + +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c +@@ -113,24 +113,26 @@ void amdgpu_dpm_print_ps_status(struct a + printk("\n"); + } + ++ + u32 amdgpu_dpm_get_vblank_time(struct amdgpu_device *adev) + { + struct drm_device *dev = adev->ddev; + struct drm_crtc *crtc; + struct amdgpu_crtc *amdgpu_crtc; +- u32 line_time_us, vblank_lines; ++ u32 vblank_in_pixels; + u32 vblank_time_us = 0xffffffff; /* if the displays are off, vblank time is max */ + + if (adev->mode_info.num_crtc && adev->mode_info.mode_config_initialized) { + list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { + amdgpu_crtc = to_amdgpu_crtc(crtc); + if (crtc->enabled && amdgpu_crtc->enabled && amdgpu_crtc->hw_mode.clock) { +- line_time_us = (amdgpu_crtc->hw_mode.crtc_htotal * 1000) / +- amdgpu_crtc->hw_mode.clock; +- vblank_lines = amdgpu_crtc->hw_mode.crtc_vblank_end - ++ vblank_in_pixels = ++ amdgpu_crtc->hw_mode.crtc_htotal * ++ (amdgpu_crtc->hw_mode.crtc_vblank_end - + amdgpu_crtc->hw_mode.crtc_vdisplay + +- (amdgpu_crtc->v_border * 2); +- vblank_time_us = vblank_lines * line_time_us; ++ (amdgpu_crtc->v_border * 2)); ++ ++ vblank_time_us = vblank_in_pixels * 1000 / amdgpu_crtc->hw_mode.clock; + break; + } + } diff --git a/kernel/kernel/files/patches/mageia/stable-drm-amdgpu-dce10-disable-hpd-on-local-panels.patch b/kernel/kernel/files/patches/mageia/stable-drm-amdgpu-dce10-disable-hpd-on-local-panels.patch new file mode 100644 index 00000000..7a7aa723 --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-drm-amdgpu-dce10-disable-hpd-on-local-panels.patch @@ -0,0 +1,62 @@ +From e96ec90f496603c48e0945f8bdeb4cdf3088cbba Mon Sep 17 00:00:00 2001 +From: Alex Deucher +Date: Wed, 28 Sep 2016 12:41:50 -0400 +Subject: drm/amdgpu/dce10: disable hpd on local panels + +From: Alex Deucher + +commit e96ec90f496603c48e0945f8bdeb4cdf3088cbba upstream. + +Otherwise we can get a hotplug interrupt storm when +we turn the panel off if hpd interrupts were enabled +by the bios. + +bug: +https://bugs.freedesktop.org/show_bug.cgi?id=97471 + +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/amd/amdgpu/dce_v10_0.c | 23 +++++++++++++---------- + 1 file changed, 13 insertions(+), 10 deletions(-) + +--- a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c +@@ -425,16 +425,6 @@ static void dce_v10_0_hpd_init(struct am + list_for_each_entry(connector, &dev->mode_config.connector_list, head) { + struct amdgpu_connector *amdgpu_connector = to_amdgpu_connector(connector); + +- if (connector->connector_type == DRM_MODE_CONNECTOR_eDP || +- connector->connector_type == DRM_MODE_CONNECTOR_LVDS) { +- /* don't try to enable hpd on eDP or LVDS avoid breaking the +- * aux dp channel on imac and help (but not completely fix) +- * https://bugzilla.redhat.com/show_bug.cgi?id=726143 +- * also avoid interrupt storms during dpms. +- */ +- continue; +- } +- + switch (amdgpu_connector->hpd.hpd) { + case AMDGPU_HPD_1: + idx = 0; +@@ -458,6 +448,19 @@ static void dce_v10_0_hpd_init(struct am + continue; + } + ++ if (connector->connector_type == DRM_MODE_CONNECTOR_eDP || ++ connector->connector_type == DRM_MODE_CONNECTOR_LVDS) { ++ /* don't try to enable hpd on eDP or LVDS avoid breaking the ++ * aux dp channel on imac and help (but not completely fix) ++ * https://bugzilla.redhat.com/show_bug.cgi?id=726143 ++ * also avoid interrupt storms during dpms. ++ */ ++ tmp = RREG32(mmDC_HPD_INT_CONTROL + hpd_offsets[idx]); ++ tmp = REG_SET_FIELD(tmp, DC_HPD_INT_CONTROL, DC_HPD_INT_EN, 0); ++ WREG32(mmDC_HPD_INT_CONTROL + hpd_offsets[idx], tmp); ++ continue; ++ } ++ + tmp = RREG32(mmDC_HPD_CONTROL + hpd_offsets[idx]); + tmp = REG_SET_FIELD(tmp, DC_HPD_CONTROL, DC_HPD_EN, 1); + WREG32(mmDC_HPD_CONTROL + hpd_offsets[idx], tmp); diff --git a/kernel/kernel/files/patches/mageia/stable-drm-amdgpu-dce11-add-missing-drm_mode_config_cleanup-call.patch b/kernel/kernel/files/patches/mageia/stable-drm-amdgpu-dce11-add-missing-drm_mode_config_cleanup-call.patch new file mode 100644 index 00000000..de149bf4 --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-drm-amdgpu-dce11-add-missing-drm_mode_config_cleanup-call.patch @@ -0,0 +1,31 @@ +From 140c94da3c3338c0ff4cc127cf9bec87905ca83c Mon Sep 17 00:00:00 2001 +From: Grazvydas Ignotas +Date: Mon, 3 Oct 2016 00:06:45 +0300 +Subject: drm/amdgpu/dce11: add missing drm_mode_config_cleanup call + +From: Grazvydas Ignotas + +commit 140c94da3c3338c0ff4cc127cf9bec87905ca83c upstream. + +All other amdgpu/dce_v* files have this call, it's only mysteriously +missing from dce_v11_0.c since the file was added and causes leaks. + +Fixes: aaa36a976bbb ("drm/amdgpu: Add initial VI support") +Signed-off-by: Grazvydas Ignotas +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/amd/amdgpu/dce_v11_0.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c +@@ -3112,6 +3112,7 @@ static int dce_v11_0_sw_fini(void *handl + + dce_v11_0_afmt_fini(adev); + ++ drm_mode_config_cleanup(adev->ddev); + adev->mode_info.mode_config_initialized = false; + + return 0; diff --git a/kernel/kernel/files/patches/mageia/stable-drm-amdgpu-dce11-disable-hpd-on-local-panels.patch b/kernel/kernel/files/patches/mageia/stable-drm-amdgpu-dce11-disable-hpd-on-local-panels.patch new file mode 100644 index 00000000..a6a83cd3 --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-drm-amdgpu-dce11-disable-hpd-on-local-panels.patch @@ -0,0 +1,62 @@ +From 3a9d993ee9809c217f4322623a9b78c8d17fdd1f Mon Sep 17 00:00:00 2001 +From: Alex Deucher +Date: Wed, 28 Sep 2016 12:43:33 -0400 +Subject: drm/amdgpu/dce11: disable hpd on local panels + +From: Alex Deucher + +commit 3a9d993ee9809c217f4322623a9b78c8d17fdd1f upstream. + +Otherwise we can get a hotplug interrupt storm when +we turn the panel off if hpd interrupts were enabled +by the bios. + +bug: +https://bugs.freedesktop.org/show_bug.cgi?id=97471 + +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/amd/amdgpu/dce_v11_0.c | 23 +++++++++++++---------- + 1 file changed, 13 insertions(+), 10 deletions(-) + +--- a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c +@@ -443,16 +443,6 @@ static void dce_v11_0_hpd_init(struct am + list_for_each_entry(connector, &dev->mode_config.connector_list, head) { + struct amdgpu_connector *amdgpu_connector = to_amdgpu_connector(connector); + +- if (connector->connector_type == DRM_MODE_CONNECTOR_eDP || +- connector->connector_type == DRM_MODE_CONNECTOR_LVDS) { +- /* don't try to enable hpd on eDP or LVDS avoid breaking the +- * aux dp channel on imac and help (but not completely fix) +- * https://bugzilla.redhat.com/show_bug.cgi?id=726143 +- * also avoid interrupt storms during dpms. +- */ +- continue; +- } +- + switch (amdgpu_connector->hpd.hpd) { + case AMDGPU_HPD_1: + idx = 0; +@@ -476,6 +466,19 @@ static void dce_v11_0_hpd_init(struct am + continue; + } + ++ if (connector->connector_type == DRM_MODE_CONNECTOR_eDP || ++ connector->connector_type == DRM_MODE_CONNECTOR_LVDS) { ++ /* don't try to enable hpd on eDP or LVDS avoid breaking the ++ * aux dp channel on imac and help (but not completely fix) ++ * https://bugzilla.redhat.com/show_bug.cgi?id=726143 ++ * also avoid interrupt storms during dpms. ++ */ ++ tmp = RREG32(mmDC_HPD_INT_CONTROL + hpd_offsets[idx]); ++ tmp = REG_SET_FIELD(tmp, DC_HPD_INT_CONTROL, DC_HPD_INT_EN, 0); ++ WREG32(mmDC_HPD_INT_CONTROL + hpd_offsets[idx], tmp); ++ continue; ++ } ++ + tmp = RREG32(mmDC_HPD_CONTROL + hpd_offsets[idx]); + tmp = REG_SET_FIELD(tmp, DC_HPD_CONTROL, DC_HPD_EN, 1); + WREG32(mmDC_HPD_CONTROL + hpd_offsets[idx], tmp); diff --git a/kernel/kernel/files/patches/mageia/stable-drm-amdgpu-dce8-disable-hpd-on-local-panels.patch b/kernel/kernel/files/patches/mageia/stable-drm-amdgpu-dce8-disable-hpd-on-local-panels.patch new file mode 100644 index 00000000..63cda139 --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-drm-amdgpu-dce8-disable-hpd-on-local-panels.patch @@ -0,0 +1,87 @@ +From 324082586cc5918e3230f0b2f326656c653201eb Mon Sep 17 00:00:00 2001 +From: Alex Deucher +Date: Wed, 28 Sep 2016 12:44:20 -0400 +Subject: drm/amdgpu/dce8: disable hpd on local panels + +From: Alex Deucher + +commit 324082586cc5918e3230f0b2f326656c653201eb upstream. + +Otherwise we can get a hotplug interrupt storm when +we turn the panel off if hpd interrupts were enabled +by the bios. + +bug: +https://bugs.freedesktop.org/show_bug.cgi?id=97471 + +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/amd/amdgpu/dce_v8_0.c | 48 +++++++++++++++++++++++++++------- + 1 file changed, 39 insertions(+), 9 deletions(-) + +--- a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c +@@ -395,15 +395,6 @@ static void dce_v8_0_hpd_init(struct amd + list_for_each_entry(connector, &dev->mode_config.connector_list, head) { + struct amdgpu_connector *amdgpu_connector = to_amdgpu_connector(connector); + +- if (connector->connector_type == DRM_MODE_CONNECTOR_eDP || +- connector->connector_type == DRM_MODE_CONNECTOR_LVDS) { +- /* don't try to enable hpd on eDP or LVDS avoid breaking the +- * aux dp channel on imac and help (but not completely fix) +- * https://bugzilla.redhat.com/show_bug.cgi?id=726143 +- * also avoid interrupt storms during dpms. +- */ +- continue; +- } + switch (amdgpu_connector->hpd.hpd) { + case AMDGPU_HPD_1: + WREG32(mmDC_HPD1_CONTROL, tmp); +@@ -426,6 +417,45 @@ static void dce_v8_0_hpd_init(struct amd + default: + break; + } ++ ++ if (connector->connector_type == DRM_MODE_CONNECTOR_eDP || ++ connector->connector_type == DRM_MODE_CONNECTOR_LVDS) { ++ /* don't try to enable hpd on eDP or LVDS avoid breaking the ++ * aux dp channel on imac and help (but not completely fix) ++ * https://bugzilla.redhat.com/show_bug.cgi?id=726143 ++ * also avoid interrupt storms during dpms. ++ */ ++ u32 dc_hpd_int_cntl_reg, dc_hpd_int_cntl; ++ ++ switch (amdgpu_connector->hpd.hpd) { ++ case AMDGPU_HPD_1: ++ dc_hpd_int_cntl_reg = mmDC_HPD1_INT_CONTROL; ++ break; ++ case AMDGPU_HPD_2: ++ dc_hpd_int_cntl_reg = mmDC_HPD2_INT_CONTROL; ++ break; ++ case AMDGPU_HPD_3: ++ dc_hpd_int_cntl_reg = mmDC_HPD3_INT_CONTROL; ++ break; ++ case AMDGPU_HPD_4: ++ dc_hpd_int_cntl_reg = mmDC_HPD4_INT_CONTROL; ++ break; ++ case AMDGPU_HPD_5: ++ dc_hpd_int_cntl_reg = mmDC_HPD5_INT_CONTROL; ++ break; ++ case AMDGPU_HPD_6: ++ dc_hpd_int_cntl_reg = mmDC_HPD6_INT_CONTROL; ++ break; ++ default: ++ continue; ++ } ++ ++ dc_hpd_int_cntl = RREG32(dc_hpd_int_cntl_reg); ++ dc_hpd_int_cntl &= ~DC_HPD1_INT_CONTROL__DC_HPD1_INT_EN_MASK; ++ WREG32(dc_hpd_int_cntl_reg, dc_hpd_int_cntl); ++ continue; ++ } ++ + dce_v8_0_hpd_set_polarity(adev, amdgpu_connector->hpd.hpd); + amdgpu_irq_get(adev, &adev->hpd_irq, amdgpu_connector->hpd.hpd); + } diff --git a/kernel/kernel/files/patches/mageia/stable-drm-amdgpu-fix-ib-alignment-for-uvd.patch b/kernel/kernel/files/patches/mageia/stable-drm-amdgpu-fix-ib-alignment-for-uvd.patch new file mode 100644 index 00000000..6e9010ec --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-drm-amdgpu-fix-ib-alignment-for-uvd.patch @@ -0,0 +1,30 @@ +From c4795ca642b8bd76b5b6ffba41ba909543273d43 Mon Sep 17 00:00:00 2001 +From: Alex Deucher +Date: Mon, 22 Aug 2016 16:31:36 -0400 +Subject: drm/amdgpu: fix IB alignment for UVD + +From: Alex Deucher + +commit c4795ca642b8bd76b5b6ffba41ba909543273d43 upstream. + +According to the hw team, it should be 16, not 8. + +Cc: Peter Fang +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c +@@ -292,7 +292,7 @@ static int amdgpu_info_ioctl(struct drm_ + type = AMD_IP_BLOCK_TYPE_UVD; + ring_mask = adev->uvd.ring.ready ? 1 : 0; + ib_start_alignment = AMDGPU_GPU_PAGE_SIZE; +- ib_size_alignment = 8; ++ ib_size_alignment = 16; + break; + case AMDGPU_HW_IP_VCE: + type = AMD_IP_BLOCK_TYPE_VCE; diff --git a/kernel/kernel/files/patches/mageia/stable-drm-amdgpu-initialize-the-context-reset_counter-in-amdgpu_ctx_init.patch b/kernel/kernel/files/patches/mageia/stable-drm-amdgpu-initialize-the-context-reset_counter-in-amdgpu_ctx_init.patch new file mode 100644 index 00000000..4343c2f3 --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-drm-amdgpu-initialize-the-context-reset_counter-in-amdgpu_ctx_init.patch @@ -0,0 +1,37 @@ +From ce199ad690bd0a6ac6bf9e4df2c87b59d76f84da Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Nicolai=20H=C3=A4hnle?= +Date: Tue, 4 Oct 2016 09:43:30 +0200 +Subject: drm/amdgpu: initialize the context reset_counter in amdgpu_ctx_init +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Nicolai Hähnle + +commit ce199ad690bd0a6ac6bf9e4df2c87b59d76f84da upstream. + +Ensure that we really only report a GPU reset if one has happened since the +creation of the context. + +Signed-off-by: Nicolai Hähnle +Reviewed-by: Christian König +Signed-off-by: Alex Deucher +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 3 +++ + 1 file changed, 3 insertions(+) + +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c +@@ -43,6 +43,9 @@ static int amdgpu_ctx_init(struct amdgpu + ctx->rings[i].sequence = 1; + ctx->rings[i].fences = &ctx->fences[amdgpu_sched_jobs * i]; + } ++ ++ ctx->reset_counter = atomic_read(&adev->gpu_reset_counter); ++ + /* create context entity for each ring */ + for (i = 0; i < adev->num_rings; i++) { + struct amdgpu_ring *ring = adev->rings[i]; diff --git a/kernel/kernel/files/patches/mageia/stable-drm-fsl-dcu-fix-endian-issue-when-using-clk_register_divider.patch b/kernel/kernel/files/patches/mageia/stable-drm-fsl-dcu-fix-endian-issue-when-using-clk_register_divider.patch new file mode 100644 index 00000000..92192a36 --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-drm-fsl-dcu-fix-endian-issue-when-using-clk_register_divider.patch @@ -0,0 +1,50 @@ +From 6cc4758ae91c0582f07e3c94c7de1ad0975feff5 Mon Sep 17 00:00:00 2001 +From: Stefan Agner +Date: Fri, 2 Sep 2016 11:23:37 -0700 +Subject: drm/fsl-dcu: fix endian issue when using clk_register_divider + +From: Stefan Agner + +commit 6cc4758ae91c0582f07e3c94c7de1ad0975feff5 upstream. + +Since using clk_register_divider to setup the pixel clock, regmap +is no longer used. Regmap did take care of DCU using different +endianness. Check endianness using the device-tree property +"big-endian" to determine the location of DIV_RATIO. + +Fixes: 2d701449bce1 ("drm/fsl-dcu: use common clock framework for pixel clock divider") +Reported-by: Meng Yi +Signed-off-by: Stefan Agner +Tested-by: Meng Yi +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c | 6 +++++- + 1 file changed, 5 insertions(+), 1 deletion(-) + +--- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c ++++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c +@@ -330,6 +330,7 @@ static int fsl_dcu_drm_probe(struct plat + const char *pix_clk_in_name; + const struct of_device_id *id; + int ret; ++ u8 div_ratio_shift = 0; + + fsl_dev = devm_kzalloc(dev, sizeof(*fsl_dev), GFP_KERNEL); + if (!fsl_dev) +@@ -382,11 +383,14 @@ static int fsl_dcu_drm_probe(struct plat + pix_clk_in = fsl_dev->clk; + } + ++ if (of_property_read_bool(dev->of_node, "big-endian")) ++ div_ratio_shift = 24; ++ + pix_clk_in_name = __clk_get_name(pix_clk_in); + snprintf(pix_clk_name, sizeof(pix_clk_name), "%s_pix", pix_clk_in_name); + fsl_dev->pix_clk = clk_register_divider(dev, pix_clk_name, + pix_clk_in_name, 0, base + DCU_DIV_RATIO, +- 0, 8, CLK_DIVIDER_ROUND_CLOSEST, NULL); ++ div_ratio_shift, 8, CLK_DIVIDER_ROUND_CLOSEST, NULL); + if (IS_ERR(fsl_dev->pix_clk)) { + dev_err(dev, "failed to register pix clk\n"); + ret = PTR_ERR(fsl_dev->pix_clk); diff --git a/kernel/kernel/files/patches/mageia/stable-drm-i915-account-for-tseg-size-when-determining-865g-stolen-base.patch b/kernel/kernel/files/patches/mageia/stable-drm-i915-account-for-tseg-size-when-determining-865g-stolen-base.patch new file mode 100644 index 00000000..70ad7ba4 --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-drm-i915-account-for-tseg-size-when-determining-865g-stolen-base.patch @@ -0,0 +1,118 @@ +From d721b02fd00bf133580f431b82ef37f3b746dfb2 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= +Date: Mon, 8 Aug 2016 13:58:39 +0300 +Subject: drm/i915: Account for TSEG size when determining 865G stolen base +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Ville Syrjälä + +commit d721b02fd00bf133580f431b82ef37f3b746dfb2 upstream. + +Looks like the TSEG lives just above TOUD, stolen comes after TSEG. + +The spec seems somewhat self-contradictory in places, in the ESMRAMC +register desctription it says: + TSEG Size: + 10=(TOUD + 512 KB) to TOUD + 11 =(TOUD + 1 MB) to TOUD + +so that agrees with TSEG being at TOUD. But the example given +elsehwere in the spec says: + + TOUD equals 62.5 MB = 03E7FFFFh + TSEG selected as 512 KB in size, + Graphics local memory selected as 1 MB in size + General System RAM available in system = 62.5 MB + General system RAM range00000000h to 03E7FFFFh + TSEG address range03F80000h to 03FFFFFFh + TSEG pre-allocated from03F80000h to 03FFFFFFh + Graphics local memory pre-allocated from03E80000h to 03F7FFFFh + +so here we have TSEG above stolen. + +Real world evidence agrees with the TOUD->TSEG->stolen order however, so +let's fix up the code to account for the TSEG size. + +Cc: Taketo Kabe +Cc: Chris Wilson +Cc: Daniel Vetter +Cc: Thomas Gleixner +Cc: Ingo Molnar +Cc: "H. Peter Anvin" +Cc: x86@kernel.org +Fixes: 0ad98c74e093 ("drm/i915: Determine the stolen memory base address on gen2") +Fixes: a4dff76924fe ("x86/gpu: Add Intel graphics stolen memory quirk for gen2 platforms") +Reported-by: Taketo Kabe +Tested-by: Taketo Kabe +Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96473 +Signed-off-by: Ville Syrjälä +Link: http://patchwork.freedesktop.org/patch/msgid/1470653919-27251-1-git-send-email-ville.syrjala@linux.intel.com +Link: http://download.intel.com/design/chipsets/datashts/25251405.pdf +Reviewed-by: Chris Wilson +Signed-off-by: Greg Kroah-Hartman + +--- + arch/x86/kernel/early-quirks.c | 9 ++------- + drivers/gpu/drm/i915/i915_gem_stolen.c | 23 +++++++++++++++++------ + 2 files changed, 19 insertions(+), 13 deletions(-) + +--- a/arch/x86/kernel/early-quirks.c ++++ b/arch/x86/kernel/early-quirks.c +@@ -317,16 +317,11 @@ static phys_addr_t __init i85x_stolen_ba + static phys_addr_t __init i865_stolen_base(int num, int slot, int func, + size_t stolen_size) + { +- u16 toud; ++ u16 toud = 0; + +- /* +- * FIXME is the graphics stolen memory region +- * always at TOUD? Ie. is it always the last +- * one to be allocated by the BIOS? +- */ + toud = read_pci_config_16(0, 0, 0, I865_TOUD); + +- return (phys_addr_t)toud << 16; ++ return (phys_addr_t)(toud << 16) + i845_tseg_size(); + } + + static phys_addr_t __init gen3_stolen_base(int num, int slot, int func, +--- a/drivers/gpu/drm/i915/i915_gem_stolen.c ++++ b/drivers/gpu/drm/i915/i915_gem_stolen.c +@@ -115,17 +115,28 @@ static unsigned long i915_stolen_to_phys + + base = bsm & INTEL_BSM_MASK; + } else if (IS_I865G(dev)) { ++ u32 tseg_size = 0; + u16 toud = 0; ++ u8 tmp; ++ ++ pci_bus_read_config_byte(dev->pdev->bus, PCI_DEVFN(0, 0), ++ I845_ESMRAMC, &tmp); ++ ++ if (tmp & TSEG_ENABLE) { ++ switch (tmp & I845_TSEG_SIZE_MASK) { ++ case I845_TSEG_SIZE_512K: ++ tseg_size = KB(512); ++ break; ++ case I845_TSEG_SIZE_1M: ++ tseg_size = MB(1); ++ break; ++ } ++ } + +- /* +- * FIXME is the graphics stolen memory region +- * always at TOUD? Ie. is it always the last +- * one to be allocated by the BIOS? +- */ + pci_bus_read_config_word(dev->pdev->bus, PCI_DEVFN(0, 0), + I865_TOUD, &toud); + +- base = toud << 16; ++ base = (toud << 16) + tseg_size; + } else if (IS_I85X(dev)) { + u32 tseg_size = 0; + u32 tom; diff --git a/kernel/kernel/files/patches/mageia/stable-drm-i915-allow-dp-to-work-w-o-edid.patch b/kernel/kernel/files/patches/mageia/stable-drm-i915-allow-dp-to-work-w-o-edid.patch new file mode 100644 index 00000000..418c1e77 --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-drm-i915-allow-dp-to-work-w-o-edid.patch @@ -0,0 +1,111 @@ +From 16c83fad79ca912b8b5bbdcb5272794a2be41262 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= +Date: Mon, 3 Oct 2016 10:55:16 +0300 +Subject: drm/i915: Allow DP to work w/o EDID +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Ville Syrjälä + +commit 16c83fad79ca912b8b5bbdcb5272794a2be41262 upstream. + +Allow returning "connected" or "unknown" connector status for DP branch +devices that don't have an EDID. Currently we'd claim the thing as +"disconnected" if there is no EDID. + +This stuff used to broken already, I think, but it got more broken by +commit f21a21983ef1 ("drm/i915: Splitting intel_dp_detect") + +Cc: Damien Cassou +Cc: freedesktop.org@gp.mailgun.org +Cc: Arno +Cc: Shubhangi Shrivastava +Cc: Sivakumar Thulasimani +Cc: Ander Conselvan de Oliveira +Tested-by: Arno +Fixes: f21a21983ef1 ("drm/i915: Splitting intel_dp_detect") +Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83348 +Signed-off-by: Ville Syrjälä +Link: http://patchwork.freedesktop.org/patch/msgid/1475481316-8194-2-git-send-email-ville.syrjala@linux.intel.com +Reviewed-by: Ander Conselvan de Oliveira +(cherry picked from commit 5cb651a7959310ef4dbb0b93f005b10286789656) +Signed-off-by: Jani Nikula +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/i915/intel_dp.c | 22 +++++++++------------- + 1 file changed, 9 insertions(+), 13 deletions(-) + +--- a/drivers/gpu/drm/i915/intel_dp.c ++++ b/drivers/gpu/drm/i915/intel_dp.c +@@ -4207,7 +4207,7 @@ intel_dp_unset_edid(struct intel_dp *int + intel_dp->has_audio = false; + } + +-static void ++static enum drm_connector_status + intel_dp_long_pulse(struct intel_connector *intel_connector) + { + struct drm_connector *connector = &intel_connector->base; +@@ -4232,7 +4232,7 @@ intel_dp_long_pulse(struct intel_connect + else + status = connector_status_disconnected; + +- if (status != connector_status_connected) { ++ if (status == connector_status_disconnected) { + intel_dp->compliance_test_active = 0; + intel_dp->compliance_test_type = 0; + intel_dp->compliance_test_data = 0; +@@ -4284,8 +4284,8 @@ intel_dp_long_pulse(struct intel_connect + intel_dp->aux.i2c_defer_count = 0; + + intel_dp_set_edid(intel_dp); +- +- status = connector_status_connected; ++ if (is_edp(intel_dp) || intel_connector->detect_edid) ++ status = connector_status_connected; + intel_dp->detect_done = true; + + /* Try to read the source of the interrupt */ +@@ -4303,12 +4303,11 @@ intel_dp_long_pulse(struct intel_connect + } + + out: +- if ((status != connector_status_connected) && +- (intel_dp->is_mst == false)) ++ if (status != connector_status_connected && !intel_dp->is_mst) + intel_dp_unset_edid(intel_dp); + + intel_display_power_put(to_i915(dev), power_domain); +- return; ++ return status; + } + + static enum drm_connector_status +@@ -4317,7 +4316,7 @@ intel_dp_detect(struct drm_connector *co + struct intel_dp *intel_dp = intel_attached_dp(connector); + struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); + struct intel_encoder *intel_encoder = &intel_dig_port->base; +- struct intel_connector *intel_connector = to_intel_connector(connector); ++ enum drm_connector_status status = connector->status; + + DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", + connector->base.id, connector->name); +@@ -4332,14 +4331,11 @@ intel_dp_detect(struct drm_connector *co + + /* If full detect is not performed yet, do a full detect */ + if (!intel_dp->detect_done) +- intel_dp_long_pulse(intel_dp->attached_connector); ++ status = intel_dp_long_pulse(intel_dp->attached_connector); + + intel_dp->detect_done = false; + +- if (is_edp(intel_dp) || intel_connector->detect_edid) +- return connector_status_connected; +- else +- return connector_status_disconnected; ++ return status; + } + + static void diff --git a/kernel/kernel/files/patches/mageia/stable-drm-i915-allow-pch-dpll-sharing-regardless-of-dpll_sdvo_high_speed.patch b/kernel/kernel/files/patches/mageia/stable-drm-i915-allow-pch-dpll-sharing-regardless-of-dpll_sdvo_high_speed.patch new file mode 100644 index 00000000..4cf6873a --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-drm-i915-allow-pch-dpll-sharing-regardless-of-dpll_sdvo_high_speed.patch @@ -0,0 +1,76 @@ +From a3fd4c67af3d8a81d241b3d51b3525f36f1d68bb Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= +Date: Mon, 26 Sep 2016 11:30:46 +0300 +Subject: drm/i915: Allow PCH DPLL sharing regardless of DPLL_SDVO_HIGH_SPEED +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Ville Syrjälä + +commit a3fd4c67af3d8a81d241b3d51b3525f36f1d68bb upstream. + +DPLL_SDVO_HIGH_SPEED must be set for SDVO/HDMI/DP, but nowhere is it +forbidden to set it for LVDS/CRT as well. So let's also set it on +CRT to make it possible to share the DPLL between HDMI and CRT. + +What that bit apparently does is enable the x5 clock to the port, +which then pumps out the bits on both edges of the clock. The DAC +doesn't need that clock since it's not pumping out bits, but I don't +think it hurts to have the DPLL output that clock anyway. + +This is fairly important on IVB since it has only two DPLLs with three +pipes. So trying to drive three or more PCH ports with three pipes +is only possible when at least one of the DPLLs gets shared between +two of the pipes. + +SNB doesn't really need to do this since it has only two pipes. It could +be done to avoid enabling the second DPLL at all in certain cases, but +I'm not sure that's such a huge win. So let's not do it for SNB, at +least for now. On ILK it never makes sense as the DPLLs can't be shared. + +v2: Just always enable the high speed clock to keep things simple (Daniel) + Beef up the commit message a bit (Daniel) + +Cc: Nick Yamane +Cc: Daniel Vetter +Tested-by: Nick Yamane +Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97204 +Signed-off-by: Ville Syrjälä +Link: http://patchwork.freedesktop.org/patch/msgid/1474878646-17711-1-git-send-email-ville.syrjala@linux.intel.com +Reviewed-by: Ander Conselvan de Oliveira +(cherry picked from commit 7d7f8633a82763577727762ff3ac1df3017cb8fe) +Signed-off-by: Jani Nikula +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/i915/intel_display.c | 18 ++++++++++++++++++ + 1 file changed, 18 insertions(+) + +--- a/drivers/gpu/drm/i915/intel_display.c ++++ b/drivers/gpu/drm/i915/intel_display.c +@@ -9007,6 +9007,24 @@ static void ironlake_compute_dpll(struct + if (intel_crtc_has_dp_encoder(crtc_state)) + dpll |= DPLL_SDVO_HIGH_SPEED; + ++ /* ++ * The high speed IO clock is only really required for ++ * SDVO/HDMI/DP, but we also enable it for CRT to make it ++ * possible to share the DPLL between CRT and HDMI. Enabling ++ * the clock needlessly does no real harm, except use up a ++ * bit of power potentially. ++ * ++ * We'll limit this to IVB with 3 pipes, since it has only two ++ * DPLLs and so DPLL sharing is the only way to get three pipes ++ * driving PCH ports at the same time. On SNB we could do this, ++ * and potentially avoid enabling the second DPLL, but it's not ++ * clear if it''s a win or loss power wise. No point in doing ++ * this on ILK at all since it has a fixed DPLL<->pipe mapping. ++ */ ++ if (INTEL_INFO(dev_priv)->num_pipes == 3 && ++ intel_crtc_has_type(crtc_state, INTEL_OUTPUT_ANALOG)) ++ dpll |= DPLL_SDVO_HIGH_SPEED; ++ + /* compute bitmask from p1 value */ + dpll |= (1 << (crtc_state->dpll.p1 - 1)) << DPLL_FPA01_P1_POST_DIV_SHIFT; + /* also FPA1 */ diff --git a/kernel/kernel/files/patches/mageia/stable-drm-i915-backlight-setup-and-cache-pwm-alternate-increment-value.patch b/kernel/kernel/files/patches/mageia/stable-drm-i915-backlight-setup-and-cache-pwm-alternate-increment-value.patch new file mode 100644 index 00000000..800bedae --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-drm-i915-backlight-setup-and-cache-pwm-alternate-increment-value.patch @@ -0,0 +1,79 @@ +From 16e1203db8ab740c912ea62761fdf27d7811b886 Mon Sep 17 00:00:00 2001 +From: Jani Nikula +Date: Mon, 19 Sep 2016 13:35:25 +0300 +Subject: drm/i915/backlight: setup and cache pwm alternate increment value +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Jani Nikula + +commit 16e1203db8ab740c912ea62761fdf27d7811b886 upstream. + +This will also be needed later on when setting up the alternate +increment in backlight enable. + +Cc: Shawn Lee +Reviewed-by: Ville Syrjälä +Signed-off-by: Jani Nikula +Link: http://patchwork.freedesktop.org/patch/msgid/9984b20bc59aee90b83caf59ce91f3fb122c9627.1474281249.git.jani.nikula@intel.com +(cherry picked from commit 32b421e79e6b546da1d469f1229403ac9142d695) +Signed-off-by: Jani Nikula +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/i915/intel_drv.h | 1 + + drivers/gpu/drm/i915/intel_panel.c | 14 +++++++++++--- + 2 files changed, 12 insertions(+), 3 deletions(-) + +--- a/drivers/gpu/drm/i915/intel_drv.h ++++ b/drivers/gpu/drm/i915/intel_drv.h +@@ -236,6 +236,7 @@ struct intel_panel { + bool enabled; + bool combination_mode; /* gen 2/4 only */ + bool active_low_pwm; ++ bool alternate_pwm_increment; /* lpt+ */ + + /* PWM chip */ + bool util_pin_active_low; /* bxt+ */ +--- a/drivers/gpu/drm/i915/intel_panel.c ++++ b/drivers/gpu/drm/i915/intel_panel.c +@@ -1242,10 +1242,10 @@ static u32 bxt_hz_to_pwm(struct intel_co + */ + static u32 spt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) + { +- struct drm_i915_private *dev_priv = to_i915(connector->base.dev); ++ struct intel_panel *panel = &connector->panel; + u32 mul; + +- if (I915_READ(SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY) ++ if (panel->backlight.alternate_pwm_increment) + mul = 128; + else + mul = 16; +@@ -1261,9 +1261,10 @@ static u32 spt_hz_to_pwm(struct intel_co + static u32 lpt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) + { + struct drm_i915_private *dev_priv = to_i915(connector->base.dev); ++ struct intel_panel *panel = &connector->panel; + u32 mul, clock; + +- if (I915_READ(SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY) ++ if (panel->backlight.alternate_pwm_increment) + mul = 16; + else + mul = 128; +@@ -1414,6 +1415,13 @@ static int lpt_setup_backlight(struct in + struct drm_i915_private *dev_priv = to_i915(connector->base.dev); + struct intel_panel *panel = &connector->panel; + u32 pch_ctl1, pch_ctl2, val; ++ bool alt; ++ ++ if (HAS_PCH_LPT(dev_priv)) ++ alt = I915_READ(SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY; ++ else ++ alt = I915_READ(SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY; ++ panel->backlight.alternate_pwm_increment = alt; + + pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1); + panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY; diff --git a/kernel/kernel/files/patches/mageia/stable-drm-i915-backlight-setup-backlight-pwm-alternate-increment-on-backlight-enable.patch b/kernel/kernel/files/patches/mageia/stable-drm-i915-backlight-setup-backlight-pwm-alternate-increment-on-backlight-enable.patch new file mode 100644 index 00000000..97d4e08a --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-drm-i915-backlight-setup-backlight-pwm-alternate-increment-on-backlight-enable.patch @@ -0,0 +1,70 @@ +From 915b417946030e1f365c63728875cffd8db8e880 Mon Sep 17 00:00:00 2001 +From: Shawn Lee +Date: Mon, 19 Sep 2016 13:35:26 +0300 +Subject: drm/i915/backlight: setup backlight pwm alternate increment on backlight enable +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Shawn Lee + +commit 915b417946030e1f365c63728875cffd8db8e880 upstream. + +Backlight enable is supposed to do a full setup of the backlight. We +were missing the PWM alternate increment bit in the south chicken +registers on lpt+ pch. This potentially caused a PWM frequency change +when the chicken register value was lost e.g. on suspend. + +v2 by Jani, rebase on the patch caching alt increment + +Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97486 +References: https://bugs.freedesktop.org/show_bug.cgi?id=67454 +Cc: Cooper Chiou +Cc: Wei Shun Chen +Cc: Gary C Wang +Reviewed-by: Ville Syrjälä +Signed-off-by: Shawn Lee +Signed-off-by: Jani Nikula +Link: http://patchwork.freedesktop.org/patch/msgid/8265f5935bd31c039ddfc82819d26c2ca1ae9cba.1474281249.git.jani.nikula@intel.com +(cherry picked from commit e29aff05f239f8dd24e9ee7816fd96726e20105a) +Signed-off-by: Jani Nikula +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/i915/intel_panel.c | 18 +++++++++++++++++- + 1 file changed, 17 insertions(+), 1 deletion(-) + +--- a/drivers/gpu/drm/i915/intel_panel.c ++++ b/drivers/gpu/drm/i915/intel_panel.c +@@ -841,7 +841,7 @@ static void lpt_enable_backlight(struct + { + struct drm_i915_private *dev_priv = to_i915(connector->base.dev); + struct intel_panel *panel = &connector->panel; +- u32 pch_ctl1, pch_ctl2; ++ u32 pch_ctl1, pch_ctl2, schicken; + + pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1); + if (pch_ctl1 & BLM_PCH_PWM_ENABLE) { +@@ -850,6 +850,22 @@ static void lpt_enable_backlight(struct + I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1); + } + ++ if (HAS_PCH_LPT(dev_priv)) { ++ schicken = I915_READ(SOUTH_CHICKEN2); ++ if (panel->backlight.alternate_pwm_increment) ++ schicken |= LPT_PWM_GRANULARITY; ++ else ++ schicken &= ~LPT_PWM_GRANULARITY; ++ I915_WRITE(SOUTH_CHICKEN2, schicken); ++ } else { ++ schicken = I915_READ(SOUTH_CHICKEN1); ++ if (panel->backlight.alternate_pwm_increment) ++ schicken |= SPT_PWM_GRANULARITY; ++ else ++ schicken &= ~SPT_PWM_GRANULARITY; ++ I915_WRITE(SOUTH_CHICKEN1, schicken); ++ } ++ + pch_ctl2 = panel->backlight.max << 16; + I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2); + diff --git a/kernel/kernel/files/patches/mageia/stable-drm-i915-gen9-fix-plane_blocks_per_line-on-watermarks-calculations.patch b/kernel/kernel/files/patches/mageia/stable-drm-i915-gen9-fix-plane_blocks_per_line-on-watermarks-calculations.patch new file mode 100644 index 00000000..0b3edb20 --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-drm-i915-gen9-fix-plane_blocks_per_line-on-watermarks-calculations.patch @@ -0,0 +1,111 @@ +From cf6c525a31fac11b0775b8c06c00a508c6356d9b Mon Sep 17 00:00:00 2001 +From: Paulo Zanoni +Date: Thu, 22 Sep 2016 18:00:32 -0300 +Subject: drm/i915/gen9: fix plane_blocks_per_line on watermarks calculations + +From: Paulo Zanoni + +commit cf6c525a31fac11b0775b8c06c00a508c6356d9b upstream. + +The confusing thing is that plane_blocks_per_line is listed as part of +the method 2 calculation but is also used for other things. We +calculated it in two different places and different ways: one inside +skl_wm_method2() and the other inside skl_compute_plane_wm(). The +skl_wm_method2() implementation is the one that matches the +specification. + +With this patch we fix the skl_compute_plane_wm() calculation and just +pass it as a parameter to skl_wm_method2(). We also take care to not +modify the value of plane_bytes_per_line since we're going to rely on +it having a correct value in later patches. + +This should affect the watermarks for Linear and Y-tiled. + +From my analysis, it looks like the two plane_blocks_per_line +variables got out of sync on 0fda65680e92, but we can't really say +that commit was a regression, it looks like just an incomplete fix. +There's always the possibility that 0fda65680e92 matched our +specification at that time, and then later the specification changed. + +v2: Try to add a "Fixes" tag (Maarten). + +Fixes: 0fda65680e92 ("drm/i915/skl: Update watermarks for Y tiling") +Cc: Tvrtko Ursulin +Reviewed-by: Lyude +Reviewed-by: Maarten Lankhorst +Signed-off-by: Paulo Zanoni +Link: http://patchwork.freedesktop.org/patch/msgid/1474578035-424-7-git-send-email-paulo.r.zanoni@intel.com +(cherry picked from commit 7a1a8aed67e0a60772defe3f6499eb340da48634) +Signed-off-by: Jani Nikula +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/i915/intel_pm.c | 39 +++++++++++++++------------------------ + 1 file changed, 15 insertions(+), 24 deletions(-) + +--- a/drivers/gpu/drm/i915/intel_pm.c ++++ b/drivers/gpu/drm/i915/intel_pm.c +@@ -3475,30 +3475,14 @@ static uint32_t skl_wm_method1(uint32_t + } + + static uint32_t skl_wm_method2(uint32_t pixel_rate, uint32_t pipe_htotal, +- uint32_t horiz_pixels, uint8_t cpp, +- uint64_t tiling, uint32_t latency, +- uint32_t y_min_scanlines) ++ uint32_t latency, uint32_t plane_blocks_per_line) + { + uint32_t ret; +- uint32_t plane_bytes_per_line, plane_blocks_per_line; + uint32_t wm_intermediate_val; + + if (latency == 0) + return UINT_MAX; + +- plane_bytes_per_line = horiz_pixels * cpp; +- +- if (tiling == I915_FORMAT_MOD_Y_TILED || +- tiling == I915_FORMAT_MOD_Yf_TILED) { +- plane_bytes_per_line *= y_min_scanlines; +- plane_blocks_per_line = DIV_ROUND_UP(plane_bytes_per_line, 512); +- plane_blocks_per_line /= y_min_scanlines; +- } else if (tiling == DRM_FORMAT_MOD_NONE) { +- plane_blocks_per_line = DIV_ROUND_UP(plane_bytes_per_line, 512) + 1; +- } else { +- plane_blocks_per_line = DIV_ROUND_UP(plane_bytes_per_line, 512); +- } +- + wm_intermediate_val = latency * pixel_rate; + ret = DIV_ROUND_UP(wm_intermediate_val, pipe_htotal * 1000) * + plane_blocks_per_line; +@@ -3587,17 +3571,24 @@ static int skl_compute_plane_wm(const st + y_min_scanlines = 4; + } + ++ plane_bytes_per_line = width * cpp; ++ if (fb->modifier[0] == I915_FORMAT_MOD_Y_TILED || ++ fb->modifier[0] == I915_FORMAT_MOD_Yf_TILED) { ++ plane_blocks_per_line = ++ DIV_ROUND_UP(plane_bytes_per_line * y_min_scanlines, 512); ++ plane_blocks_per_line /= y_min_scanlines; ++ } else if (fb->modifier[0] == DRM_FORMAT_MOD_NONE) { ++ plane_blocks_per_line = DIV_ROUND_UP(plane_bytes_per_line, 512) ++ + 1; ++ } else { ++ plane_blocks_per_line = DIV_ROUND_UP(plane_bytes_per_line, 512); ++ } ++ + method1 = skl_wm_method1(plane_pixel_rate, cpp, latency); + method2 = skl_wm_method2(plane_pixel_rate, + cstate->base.adjusted_mode.crtc_htotal, +- width, +- cpp, +- fb->modifier[0], + latency, +- y_min_scanlines); +- +- plane_bytes_per_line = width * cpp; +- plane_blocks_per_line = DIV_ROUND_UP(plane_bytes_per_line, 512); ++ plane_blocks_per_line); + + if (fb->modifier[0] == I915_FORMAT_MOD_Y_TILED || + fb->modifier[0] == I915_FORMAT_MOD_Yf_TILED) { diff --git a/kernel/kernel/files/patches/mageia/stable-drm-i915-gen9-fix-the-watermark-res_blocks-value.patch b/kernel/kernel/files/patches/mageia/stable-drm-i915-gen9-fix-the-watermark-res_blocks-value.patch new file mode 100644 index 00000000..9cd60dd2 --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-drm-i915-gen9-fix-the-watermark-res_blocks-value.patch @@ -0,0 +1,75 @@ +From 73fed0ef8567f1e1cba079994353e60208ded964 Mon Sep 17 00:00:00 2001 +From: Paulo Zanoni +Date: Thu, 22 Sep 2016 18:00:33 -0300 +Subject: drm/i915/gen9: fix the watermark res_blocks value + +From: Paulo Zanoni + +commit 73fed0ef8567f1e1cba079994353e60208ded964 upstream. + +We forgot the "res_blocks += y_tile_minimum" that's described on step +V of our documentation. + +Again, this should only affect the Y tiling cases. + +It looks like the relevant code was introduced in 0fda65680e92, but +there's always the possibility that it matched our specification when +it was introduced, and then the specification changed while the code +stayed the same. So we can't really say this was a regression, but +let's try to add a "Fixes" tag anyway to help backporting. + +v2: Try to add a "Fixes" tag (Maarten). + +Fixes: 0fda65680e92 ("drm/i915/skl: Update watermarks for Y tiling") +Cc: Tvrtko Ursulin +Reviewed-by: Lyude +Reviewed-by: Maarten Lankhorst +Signed-off-by: Paulo Zanoni +Link: http://patchwork.freedesktop.org/patch/msgid/1474578035-424-8-git-send-email-paulo.r.zanoni@intel.com +(cherry picked from commit 75676ed423a6acf9e2b1df52fbc036a51e11fb7a) +Signed-off-by: Jani Nikula +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/i915/intel_pm.c | 12 +++++++----- + 1 file changed, 7 insertions(+), 5 deletions(-) + +--- a/drivers/gpu/drm/i915/intel_pm.c ++++ b/drivers/gpu/drm/i915/intel_pm.c +@@ -3533,7 +3533,7 @@ static int skl_compute_plane_wm(const st + uint8_t cpp; + uint32_t width = 0, height = 0; + uint32_t plane_pixel_rate; +- uint32_t y_min_scanlines; ++ uint32_t y_tile_minimum, y_min_scanlines; + + if (latency == 0 || !cstate->base.active || !intel_pstate->visible) { + *enabled = false; +@@ -3590,10 +3590,10 @@ static int skl_compute_plane_wm(const st + latency, + plane_blocks_per_line); + ++ y_tile_minimum = plane_blocks_per_line * y_min_scanlines; ++ + if (fb->modifier[0] == I915_FORMAT_MOD_Y_TILED || + fb->modifier[0] == I915_FORMAT_MOD_Yf_TILED) { +- uint32_t y_tile_minimum = plane_blocks_per_line * +- y_min_scanlines; + selected_result = max(method2, y_tile_minimum); + } else { + if ((ddb_allocation / plane_blocks_per_line) >= 1) +@@ -3607,10 +3607,12 @@ static int skl_compute_plane_wm(const st + + if (level >= 1 && level <= 7) { + if (fb->modifier[0] == I915_FORMAT_MOD_Y_TILED || +- fb->modifier[0] == I915_FORMAT_MOD_Yf_TILED) ++ fb->modifier[0] == I915_FORMAT_MOD_Yf_TILED) { ++ res_blocks += y_tile_minimum; + res_lines += y_min_scanlines; +- else ++ } else { + res_blocks++; ++ } + } + + if (res_blocks >= ddb_allocation || res_lines > 31) { diff --git a/kernel/kernel/files/patches/mageia/stable-drm-i915-gen9-fix-the-wawmmemoryreadlatency-implementation.patch b/kernel/kernel/files/patches/mageia/stable-drm-i915-gen9-fix-the-wawmmemoryreadlatency-implementation.patch new file mode 100644 index 00000000..54ffa0ea --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-drm-i915-gen9-fix-the-wawmmemoryreadlatency-implementation.patch @@ -0,0 +1,91 @@ +From 4e4d3814a9bb4d71cd3ff0701d8d7041edefd8f0 Mon Sep 17 00:00:00 2001 +From: Paulo Zanoni +Date: Thu, 22 Sep 2016 18:00:30 -0300 +Subject: drm/i915/gen9: fix the WaWmMemoryReadLatency implementation + +From: Paulo Zanoni + +commit 4e4d3814a9bb4d71cd3ff0701d8d7041edefd8f0 upstream. + +Bspec says: + "The mailbox response data may not account for memory read latency. + If the mailbox response data for level 0 is 0us, add 2 microseconds + to the result for each valid level." + +This means we should only do the +2 in case wm[0] == 0, not always. + +So split the sanitizing implementation from the WA implementation and +fix the WA implementation. + +v2: Add Fixes tag (Maarten). + +Fixes: 367294be7c25 ("drm/i915/gen9: Add 2us read latency to WM level") +Cc: Vandana Kannan +Reviewed-by: Maarten Lankhorst +Signed-off-by: Paulo Zanoni +Link: http://patchwork.freedesktop.org/patch/msgid/1474578035-424-5-git-send-email-paulo.r.zanoni@intel.com +(cherry picked from commit 0727e40a48a1d08cf54ce2c01e120864b92e59bf) +Signed-off-by: Jani Nikula +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/i915/intel_pm.c | 42 ++++++++++++++++++++-------------------- + 1 file changed, 22 insertions(+), 20 deletions(-) + +--- a/drivers/gpu/drm/i915/intel_pm.c ++++ b/drivers/gpu/drm/i915/intel_pm.c +@@ -2119,32 +2119,34 @@ static void intel_read_wm_latency(struct + GEN9_MEM_LATENCY_LEVEL_MASK; + + /* ++ * If a level n (n > 1) has a 0us latency, all levels m (m >= n) ++ * need to be disabled. We make sure to sanitize the values out ++ * of the punit to satisfy this requirement. ++ */ ++ for (level = 1; level <= max_level; level++) { ++ if (wm[level] == 0) { ++ for (i = level + 1; i <= max_level; i++) ++ wm[i] = 0; ++ break; ++ } ++ } ++ ++ /* + * WaWmMemoryReadLatency:skl + * + * punit doesn't take into account the read latency so we need +- * to add 2us to the various latency levels we retrieve from +- * the punit. +- * - W0 is a bit special in that it's the only level that +- * can't be disabled if we want to have display working, so +- * we always add 2us there. +- * - For levels >=1, punit returns 0us latency when they are +- * disabled, so we respect that and don't add 2us then +- * +- * Additionally, if a level n (n > 1) has a 0us latency, all +- * levels m (m >= n) need to be disabled. We make sure to +- * sanitize the values out of the punit to satisfy this +- * requirement. ++ * to add 2us to the various latency levels we retrieve from the ++ * punit when level 0 response data us 0us. + */ +- wm[0] += 2; +- for (level = 1; level <= max_level; level++) +- if (wm[level] != 0) ++ if (wm[0] == 0) { ++ wm[0] += 2; ++ for (level = 1; level <= max_level; level++) { ++ if (wm[level] == 0) ++ break; + wm[level] += 2; +- else { +- for (i = level + 1; i <= max_level; i++) +- wm[i] = 0; +- +- break; + } ++ } ++ + } else if (IS_HASWELL(dev) || IS_BROADWELL(dev)) { + uint64_t sskpd = I915_READ64(MCH_SSKPD); + diff --git a/kernel/kernel/files/patches/mageia/stable-drm-i915-gen9-minimum-scanlines-for-y-tile-is-not-always-4.patch b/kernel/kernel/files/patches/mageia/stable-drm-i915-gen9-minimum-scanlines-for-y-tile-is-not-always-4.patch new file mode 100644 index 00000000..43111119 --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-drm-i915-gen9-minimum-scanlines-for-y-tile-is-not-always-4.patch @@ -0,0 +1,133 @@ +From ccc1057477bc99678896b51adce6b6ee4019dc37 Mon Sep 17 00:00:00 2001 +From: Paulo Zanoni +Date: Thu, 22 Sep 2016 18:00:31 -0300 +Subject: drm/i915/gen9: minimum scanlines for Y tile is not always 4 + +From: Paulo Zanoni + +commit ccc1057477bc99678896b51adce6b6ee4019dc37 upstream. + +During watermarks calculations, this value is used in 3 different +places. Only one of them was not using a hardcoded 4. Move the code up +so everybody can benefit from the actual value. + +This should only help on situations with Y tiling + 90/270 rotation + +1 or 2 bpp or NV12. + +Reviewed-by: Maarten Lankhorst +Signed-off-by: Paulo Zanoni +Link: http://patchwork.freedesktop.org/patch/msgid/1474578035-424-6-git-send-email-paulo.r.zanoni@intel.com +(cherry picked from commit 1186fa85eb9b3cc0589990fbc39617e50e38759a) +Signed-off-by: Jani Nikula +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/i915/intel_pm.c | 56 ++++++++++++++++++++++------------------ + 1 file changed, 32 insertions(+), 24 deletions(-) + +--- a/drivers/gpu/drm/i915/intel_pm.c ++++ b/drivers/gpu/drm/i915/intel_pm.c +@@ -3476,7 +3476,8 @@ static uint32_t skl_wm_method1(uint32_t + + static uint32_t skl_wm_method2(uint32_t pixel_rate, uint32_t pipe_htotal, + uint32_t horiz_pixels, uint8_t cpp, +- uint64_t tiling, uint32_t latency) ++ uint64_t tiling, uint32_t latency, ++ uint32_t y_min_scanlines) + { + uint32_t ret; + uint32_t plane_bytes_per_line, plane_blocks_per_line; +@@ -3489,9 +3490,9 @@ static uint32_t skl_wm_method2(uint32_t + + if (tiling == I915_FORMAT_MOD_Y_TILED || + tiling == I915_FORMAT_MOD_Yf_TILED) { +- plane_bytes_per_line *= 4; ++ plane_bytes_per_line *= y_min_scanlines; + plane_blocks_per_line = DIV_ROUND_UP(plane_bytes_per_line, 512); +- plane_blocks_per_line /= 4; ++ plane_blocks_per_line /= y_min_scanlines; + } else if (tiling == DRM_FORMAT_MOD_NONE) { + plane_blocks_per_line = DIV_ROUND_UP(plane_bytes_per_line, 512) + 1; + } else { +@@ -3548,6 +3549,7 @@ static int skl_compute_plane_wm(const st + uint8_t cpp; + uint32_t width = 0, height = 0; + uint32_t plane_pixel_rate; ++ uint32_t y_min_scanlines; + + if (latency == 0 || !cstate->base.active || !intel_pstate->visible) { + *enabled = false; +@@ -3563,38 +3565,44 @@ static int skl_compute_plane_wm(const st + cpp = drm_format_plane_cpp(fb->pixel_format, 0); + plane_pixel_rate = skl_adjusted_plane_pixel_rate(cstate, intel_pstate); + ++ if (intel_rotation_90_or_270(pstate->rotation)) { ++ int cpp = (fb->pixel_format == DRM_FORMAT_NV12) ? ++ drm_format_plane_cpp(fb->pixel_format, 1) : ++ drm_format_plane_cpp(fb->pixel_format, 0); ++ ++ switch (cpp) { ++ case 1: ++ y_min_scanlines = 16; ++ break; ++ case 2: ++ y_min_scanlines = 8; ++ break; ++ default: ++ WARN(1, "Unsupported pixel depth for rotation"); ++ case 4: ++ y_min_scanlines = 4; ++ break; ++ } ++ } else { ++ y_min_scanlines = 4; ++ } ++ + method1 = skl_wm_method1(plane_pixel_rate, cpp, latency); + method2 = skl_wm_method2(plane_pixel_rate, + cstate->base.adjusted_mode.crtc_htotal, + width, + cpp, + fb->modifier[0], +- latency); ++ latency, ++ y_min_scanlines); + + plane_bytes_per_line = width * cpp; + plane_blocks_per_line = DIV_ROUND_UP(plane_bytes_per_line, 512); + + if (fb->modifier[0] == I915_FORMAT_MOD_Y_TILED || + fb->modifier[0] == I915_FORMAT_MOD_Yf_TILED) { +- uint32_t min_scanlines = 4; +- uint32_t y_tile_minimum; +- if (intel_rotation_90_or_270(pstate->rotation)) { +- int cpp = (fb->pixel_format == DRM_FORMAT_NV12) ? +- drm_format_plane_cpp(fb->pixel_format, 1) : +- drm_format_plane_cpp(fb->pixel_format, 0); +- +- switch (cpp) { +- case 1: +- min_scanlines = 16; +- break; +- case 2: +- min_scanlines = 8; +- break; +- case 8: +- WARN(1, "Unsupported pixel depth for rotation"); +- } +- } +- y_tile_minimum = plane_blocks_per_line * min_scanlines; ++ uint32_t y_tile_minimum = plane_blocks_per_line * ++ y_min_scanlines; + selected_result = max(method2, y_tile_minimum); + } else { + if ((ddb_allocation / plane_blocks_per_line) >= 1) +@@ -3609,7 +3617,7 @@ static int skl_compute_plane_wm(const st + if (level >= 1 && level <= 7) { + if (fb->modifier[0] == I915_FORMAT_MOD_Y_TILED || + fb->modifier[0] == I915_FORMAT_MOD_Yf_TILED) +- res_lines += 4; ++ res_lines += y_min_scanlines; + else + res_blocks++; + } diff --git a/kernel/kernel/files/patches/mageia/stable-drm-i915-gen9-only-add-the-planes-actually-affected-by-ddb-changes.patch b/kernel/kernel/files/patches/mageia/stable-drm-i915-gen9-only-add-the-planes-actually-affected-by-ddb-changes.patch new file mode 100644 index 00000000..8fec07d2 --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-drm-i915-gen9-only-add-the-planes-actually-affected-by-ddb-changes.patch @@ -0,0 +1,92 @@ +From be5c571b2ff3a164d2e14ccc100cb5b2b3d3fb7c Mon Sep 17 00:00:00 2001 +From: Paulo Zanoni +Date: Thu, 29 Sep 2016 16:36:48 -0300 +Subject: drm/i915/gen9: only add the planes actually affected by ddb changes + +From: Paulo Zanoni + +commit be5c571b2ff3a164d2e14ccc100cb5b2b3d3fb7c upstream. + +We were previously adding all the planes owned by the CRTC even when +the ddb partitioning didn't change for them. As a consequence, a lot +of functions were being called when we were just moving the cursor +around the screen, such as skylake_update_primary_plane(). + +This was causing flickering on the primary plane when moving the +cursor. I'm not 100% sure which operation caused the flickering, but +we were writing to a lot of registers, so it could be any of these +writes. With this patch, just moving the mouse won't add the primary +plane to the commit since it won't trigger a change in DDB +partitioning. + +v2: Use skl_ddb_entry_equal() (Lyude). +v3: Change Reported-and-bisected-by: to Reported-by: for checkpatch + +Fixes: 05a76d3d6ad1 ("drm/i915/skl: Ensure pipes with changed wms get added to the state") +Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97888 +Cc: Mike Lothian +Reported-by: Mike Lothian +Signed-off-by: Paulo Zanoni +Signed-off-by: Lyude +Link: http://patchwork.freedesktop.org/patch/msgid/1475177808-29955-1-git-send-email-paulo.r.zanoni@intel.com +(cherry picked from commit 7f60e200e254cd53ad1bd74a56bdd23e813ac4b7) +Signed-off-by: Jani Nikula +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/i915/intel_pm.c | 37 ++++++++++++++++++++++++++++++++++++- + 1 file changed, 36 insertions(+), 1 deletion(-) + +--- a/drivers/gpu/drm/i915/intel_pm.c ++++ b/drivers/gpu/drm/i915/intel_pm.c +@@ -3940,6 +3940,41 @@ pipes_modified(struct drm_atomic_state * + return ret; + } + ++int ++skl_ddb_add_affected_planes(struct intel_crtc_state *cstate) ++{ ++ struct drm_atomic_state *state = cstate->base.state; ++ struct drm_device *dev = state->dev; ++ struct drm_crtc *crtc = cstate->base.crtc; ++ struct intel_crtc *intel_crtc = to_intel_crtc(crtc); ++ struct drm_i915_private *dev_priv = to_i915(dev); ++ struct intel_atomic_state *intel_state = to_intel_atomic_state(state); ++ struct skl_ddb_allocation *new_ddb = &intel_state->wm_results.ddb; ++ struct skl_ddb_allocation *cur_ddb = &dev_priv->wm.skl_hw.ddb; ++ struct drm_plane_state *plane_state; ++ struct drm_plane *plane; ++ enum pipe pipe = intel_crtc->pipe; ++ int id; ++ ++ WARN_ON(!drm_atomic_get_existing_crtc_state(state, crtc)); ++ ++ drm_for_each_plane_mask(plane, dev, crtc->state->plane_mask) { ++ id = skl_wm_plane_id(to_intel_plane(plane)); ++ ++ if (skl_ddb_entry_equal(&cur_ddb->plane[pipe][id], ++ &new_ddb->plane[pipe][id]) && ++ skl_ddb_entry_equal(&cur_ddb->y_plane[pipe][id], ++ &new_ddb->y_plane[pipe][id])) ++ continue; ++ ++ plane_state = drm_atomic_get_plane_state(state, plane); ++ if (IS_ERR(plane_state)) ++ return PTR_ERR(plane_state); ++ } ++ ++ return 0; ++} ++ + static int + skl_compute_ddb(struct drm_atomic_state *state) + { +@@ -4004,7 +4039,7 @@ skl_compute_ddb(struct drm_atomic_state + if (ret) + return ret; + +- ret = drm_atomic_add_affected_planes(state, &intel_crtc->base); ++ ret = skl_ddb_add_affected_planes(cstate); + if (ret) + return ret; + } diff --git a/kernel/kernel/files/patches/mageia/stable-drm-i915-introduce-intel_has_sagv.patch b/kernel/kernel/files/patches/mageia/stable-drm-i915-introduce-intel_has_sagv.patch new file mode 100644 index 00000000..c25ade40 --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-drm-i915-introduce-intel_has_sagv.patch @@ -0,0 +1,103 @@ +From 6e7fdb873d6255ca3c999dd5c6c18962a769ed3e Mon Sep 17 00:00:00 2001 +From: Paulo Zanoni +Date: Thu, 22 Sep 2016 18:00:28 -0300 +Subject: drm/i915: introduce intel_has_sagv() + +From: Paulo Zanoni + +commit 6e7fdb873d6255ca3c999dd5c6c18962a769ed3e upstream. + +And use it to move knowledge about the SAGV-supporting platforms from +the callers to the SAGV code. + +We'll add more platforms to intel_has_sagv(), so IMHO it makes more +sense to move all this to a single function instead of patching all +the callers every time we add SAGV support to a new platform. + +v2: Move I915_SAGV_NOT_CONTROLLED to the new function (Lyude). + +Reviewed-by: Maarten Lankhorst +Signed-off-by: Paulo Zanoni +Link: http://patchwork.freedesktop.org/patch/msgid/1474578035-424-3-git-send-email-paulo.r.zanoni@intel.com +(cherry picked from commit 56feca91973459d0b62cbb2610b62d341025ed89) +Signed-off-by: Jani Nikula +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/i915/intel_display.c | 5 ++--- + drivers/gpu/drm/i915/intel_pm.c | 22 ++++++++++++++++++---- + 2 files changed, 20 insertions(+), 7 deletions(-) + +--- a/drivers/gpu/drm/i915/intel_display.c ++++ b/drivers/gpu/drm/i915/intel_display.c +@@ -13891,7 +13891,7 @@ static void intel_atomic_commit_tail(str + * SKL workaround: bspec recommends we disable the SAGV when we + * have more then one pipe enabled + */ +- if (IS_SKYLAKE(dev_priv) && !intel_can_enable_sagv(state)) ++ if (!intel_can_enable_sagv(state)) + intel_disable_sagv(dev_priv); + + intel_modeset_verify_disabled(dev); +@@ -13949,8 +13949,7 @@ static void intel_atomic_commit_tail(str + intel_modeset_verify_crtc(crtc, old_crtc_state, crtc->state); + } + +- if (IS_SKYLAKE(dev_priv) && intel_state->modeset && +- intel_can_enable_sagv(state)) ++ if (intel_state->modeset && intel_can_enable_sagv(state)) + intel_enable_sagv(dev_priv); + + drm_atomic_helper_commit_hw_done(state); +--- a/drivers/gpu/drm/i915/intel_pm.c ++++ b/drivers/gpu/drm/i915/intel_pm.c +@@ -2878,6 +2878,13 @@ skl_wm_plane_id(const struct intel_plane + } + } + ++static bool ++intel_has_sagv(struct drm_i915_private *dev_priv) ++{ ++ return IS_SKYLAKE(dev_priv) && ++ dev_priv->sagv_status != I915_SAGV_NOT_CONTROLLED; ++} ++ + /* + * SAGV dynamically adjusts the system agent voltage and clock frequencies + * depending on power and performance requirements. The display engine access +@@ -2894,8 +2901,10 @@ intel_enable_sagv(struct drm_i915_privat + { + int ret; + +- if (dev_priv->sagv_status == I915_SAGV_NOT_CONTROLLED || +- dev_priv->sagv_status == I915_SAGV_ENABLED) ++ if (!intel_has_sagv(dev_priv)) ++ return 0; ++ ++ if (dev_priv->sagv_status == I915_SAGV_ENABLED) + return 0; + + DRM_DEBUG_KMS("Enabling the SAGV\n"); +@@ -2943,8 +2952,10 @@ intel_disable_sagv(struct drm_i915_priva + { + int ret, result; + +- if (dev_priv->sagv_status == I915_SAGV_NOT_CONTROLLED || +- dev_priv->sagv_status == I915_SAGV_DISABLED) ++ if (!intel_has_sagv(dev_priv)) ++ return 0; ++ ++ if (dev_priv->sagv_status == I915_SAGV_DISABLED) + return 0; + + DRM_DEBUG_KMS("Disabling the SAGV\n"); +@@ -2985,6 +2996,9 @@ bool intel_can_enable_sagv(struct drm_at + enum pipe pipe; + int level, plane; + ++ if (!intel_has_sagv(dev_priv)) ++ return false; ++ + /* + * SKL workaround: bspec recommends we disable the SAGV when we have + * more then one pipe enabled diff --git a/kernel/kernel/files/patches/mageia/stable-drm-i915-just-clear-the-mmiodebug-before-a-register-access.patch b/kernel/kernel/files/patches/mageia/stable-drm-i915-just-clear-the-mmiodebug-before-a-register-access.patch new file mode 100644 index 00000000..85b64a22 --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-drm-i915-just-clear-the-mmiodebug-before-a-register-access.patch @@ -0,0 +1,43 @@ +From f856f847b22c52be82f712ea6ada946c6db884d7 Mon Sep 17 00:00:00 2001 +From: Chris Wilson +Date: Mon, 3 Oct 2016 13:45:14 +0100 +Subject: drm/i915: Just clear the mmiodebug before a register access + +From: Chris Wilson + +commit f856f847b22c52be82f712ea6ada946c6db884d7 upstream. + +When we enable the per-register access mmiodebug, it is to detect which +access is illegal. Reporting on earlier untraced access outside of the +mmiodebug does not help debugging (as the suspicion is immediately put +upon the current register which is not at fault)! + +References: https://bugs.freedesktop.org/show_bug.cgi?id=97985 +Signed-off-by: Chris Wilson +Cc: Mika Kuoppala +Reviewed-by: Mika Kuoppala +Link: http://patchwork.freedesktop.org/patch/msgid/20161003124516.12388-1-chris@chris-wilson.co.uk +(cherry picked from commit dda960335e020835f7f1c12760e7f0b525b451e2) +Signed-off-by: Jani Nikula +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/i915/intel_uncore.c | 7 +++---- + 1 file changed, 3 insertions(+), 4 deletions(-) + +--- a/drivers/gpu/drm/i915/intel_uncore.c ++++ b/drivers/gpu/drm/i915/intel_uncore.c +@@ -796,10 +796,9 @@ __unclaimed_reg_debug(struct drm_i915_pr + const bool read, + const bool before) + { +- if (WARN(check_for_unclaimed_mmio(dev_priv), +- "Unclaimed register detected %s %s register 0x%x\n", +- before ? "before" : "after", +- read ? "reading" : "writing to", ++ if (WARN(check_for_unclaimed_mmio(dev_priv) && !before, ++ "Unclaimed %s register 0x%x\n", ++ read ? "read from" : "write to", + i915_mmio_reg_offset(reg))) + i915.mmio_debug--; /* Only report the first N failures */ + } diff --git a/kernel/kernel/files/patches/mageia/stable-drm-i915-kbl-kbl-also-needs-to-run-the-sagv-code.patch b/kernel/kernel/files/patches/mageia/stable-drm-i915-kbl-kbl-also-needs-to-run-the-sagv-code.patch new file mode 100644 index 00000000..ef3c31b9 --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-drm-i915-kbl-kbl-also-needs-to-run-the-sagv-code.patch @@ -0,0 +1,64 @@ +From 17777d61f4a87d7b6d5585e8fdffa83773c594e7 Mon Sep 17 00:00:00 2001 +From: Paulo Zanoni +Date: Thu, 22 Sep 2016 18:00:29 -0300 +Subject: drm/i915/kbl: KBL also needs to run the SAGV code + +From: Paulo Zanoni + +commit 17777d61f4a87d7b6d5585e8fdffa83773c594e7 upstream. + +According to BSpec, it's the "core CPUs" that need the code, which +means SKL and KBL, but not BXT. + +I don't have a KBL to test this patch on it. + +v2: Only SKL should have I915_SAGV_NOT_CONTROLLED. + +Reviewed-by: Maarten Lankhorst +Signed-off-by: Paulo Zanoni +Link: http://patchwork.freedesktop.org/patch/msgid/1474578035-424-4-git-send-email-paulo.r.zanoni@intel.com +(cherry picked from commit 6e3100ec21e7c774a0fc01e36a1e0739530c2f71) +Signed-off-by: Jani Nikula +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/i915/intel_pm.c | 14 ++++++++++---- + 1 file changed, 10 insertions(+), 4 deletions(-) + +--- a/drivers/gpu/drm/i915/intel_pm.c ++++ b/drivers/gpu/drm/i915/intel_pm.c +@@ -2881,8 +2881,14 @@ skl_wm_plane_id(const struct intel_plane + static bool + intel_has_sagv(struct drm_i915_private *dev_priv) + { +- return IS_SKYLAKE(dev_priv) && +- dev_priv->sagv_status != I915_SAGV_NOT_CONTROLLED; ++ if (IS_KABYLAKE(dev_priv)) ++ return true; ++ ++ if (IS_SKYLAKE(dev_priv) && ++ dev_priv->sagv_status != I915_SAGV_NOT_CONTROLLED) ++ return true; ++ ++ return false; + } + + /* +@@ -2920,7 +2926,7 @@ intel_enable_sagv(struct drm_i915_privat + * Some skl systems, pre-release machines in particular, + * don't actually have an SAGV. + */ +- if (ret == -ENXIO) { ++ if (IS_SKYLAKE(dev_priv) && ret == -ENXIO) { + DRM_DEBUG_DRIVER("No SAGV found on system, ignoring\n"); + dev_priv->sagv_status = I915_SAGV_NOT_CONTROLLED; + return 0; +@@ -2974,7 +2980,7 @@ intel_disable_sagv(struct drm_i915_priva + * Some skl systems, pre-release machines in particular, + * don't actually have an SAGV. + */ +- if (result == -ENXIO) { ++ if (IS_SKYLAKE(dev_priv) && result == -ENXIO) { + DRM_DEBUG_DRIVER("No SAGV found on system, ignoring\n"); + dev_priv->sagv_status = I915_SAGV_NOT_CONTROLLED; + return 0; diff --git a/kernel/kernel/files/patches/mageia/stable-drm-i915-move-crtc-updating-in-atomic_commit-into-it-s-own-hook.patch b/kernel/kernel/files/patches/mageia/stable-drm-i915-move-crtc-updating-in-atomic_commit-into-it-s-own-hook.patch new file mode 100644 index 00000000..e4402b0b --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-drm-i915-move-crtc-updating-in-atomic_commit-into-it-s-own-hook.patch @@ -0,0 +1,162 @@ +From 896e5bb022bce64e29ce2e1b2fc2a7476d311a15 Mon Sep 17 00:00:00 2001 +From: Lyude +Date: Wed, 24 Aug 2016 07:48:09 +0200 +Subject: drm/i915: Move CRTC updating in atomic_commit into it's own hook +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Lyude + +commit 896e5bb022bce64e29ce2e1b2fc2a7476d311a15 upstream. + +Since we have to write ddb allocations at the same time as we do other +plane updates, we're going to need to be able to control the order in +which we execute modesets on each pipe. The easiest way to do this is to +just factor this section of intel_atomic_commit_tail() +(intel_atomic_commit() for stable branches) into it's own function, and +add an appropriate display function hook for it. + +Based off of Matt Rope's suggestions + +Changes since v1: + - Drop pipe_config->base.active check in intel_update_crtcs() since we + check that before calling the function + +Signed-off-by: Lyude +Reviewed-by: Matt Roper +[omitting CC for stable, since this patch will need to be changed for +such backports first] +Cc: Ville Syrjälä +Cc: Daniel Vetter +Cc: Radhakrishna Sripada +Cc: Hans de Goede +Signed-off-by: Lyude +Signed-off-by: Maarten Lankhorst +Link: http://patchwork.freedesktop.org/patch/msgid/1471961565-28540-1-git-send-email-cpaul@redhat.com +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/i915/i915_drv.h | 2 + drivers/gpu/drm/i915/intel_display.c | 74 ++++++++++++++++++++++++----------- + 2 files changed, 54 insertions(+), 22 deletions(-) + +--- a/drivers/gpu/drm/i915/i915_drv.h ++++ b/drivers/gpu/drm/i915/i915_drv.h +@@ -631,6 +631,8 @@ struct drm_i915_display_funcs { + struct intel_crtc_state *crtc_state); + void (*crtc_enable)(struct drm_crtc *crtc); + void (*crtc_disable)(struct drm_crtc *crtc); ++ void (*update_crtcs)(struct drm_atomic_state *state, ++ unsigned int *crtc_vblank_mask); + void (*audio_codec_enable)(struct drm_connector *connector, + struct intel_encoder *encoder, + const struct drm_display_mode *adjusted_mode); +--- a/drivers/gpu/drm/i915/intel_display.c ++++ b/drivers/gpu/drm/i915/intel_display.c +@@ -13682,6 +13682,52 @@ static bool needs_vblank_wait(struct int + return false; + } + ++static void intel_update_crtc(struct drm_crtc *crtc, ++ struct drm_atomic_state *state, ++ struct drm_crtc_state *old_crtc_state, ++ unsigned int *crtc_vblank_mask) ++{ ++ struct drm_device *dev = crtc->dev; ++ struct drm_i915_private *dev_priv = to_i915(dev); ++ struct intel_crtc *intel_crtc = to_intel_crtc(crtc); ++ struct intel_crtc_state *pipe_config = to_intel_crtc_state(crtc->state); ++ bool modeset = needs_modeset(crtc->state); ++ ++ if (modeset) { ++ update_scanline_offset(intel_crtc); ++ dev_priv->display.crtc_enable(crtc); ++ } else { ++ intel_pre_plane_update(to_intel_crtc_state(old_crtc_state)); ++ } ++ ++ if (drm_atomic_get_existing_plane_state(state, crtc->primary)) { ++ intel_fbc_enable( ++ intel_crtc, pipe_config, ++ to_intel_plane_state(crtc->primary->state)); ++ } ++ ++ drm_atomic_helper_commit_planes_on_crtc(old_crtc_state); ++ ++ if (needs_vblank_wait(pipe_config)) ++ *crtc_vblank_mask |= drm_crtc_mask(crtc); ++} ++ ++static void intel_update_crtcs(struct drm_atomic_state *state, ++ unsigned int *crtc_vblank_mask) ++{ ++ struct drm_crtc *crtc; ++ struct drm_crtc_state *old_crtc_state; ++ int i; ++ ++ for_each_crtc_in_state(state, crtc, old_crtc_state, i) { ++ if (!crtc->state->active) ++ continue; ++ ++ intel_update_crtc(crtc, state, old_crtc_state, ++ crtc_vblank_mask); ++ } ++} ++ + static void intel_atomic_commit_tail(struct drm_atomic_state *state) + { + struct drm_device *dev = state->dev; +@@ -13780,17 +13826,9 @@ static void intel_atomic_commit_tail(str + intel_modeset_verify_disabled(dev); + } + +- /* Now enable the clocks, plane, pipe, and connectors that we set up. */ ++ /* Complete the events for pipes that have now been disabled */ + for_each_crtc_in_state(state, crtc, old_crtc_state, i) { +- struct intel_crtc *intel_crtc = to_intel_crtc(crtc); + bool modeset = needs_modeset(crtc->state); +- struct intel_crtc_state *pipe_config = +- to_intel_crtc_state(crtc->state); +- +- if (modeset && crtc->state->active) { +- update_scanline_offset(to_intel_crtc(crtc)); +- dev_priv->display.crtc_enable(crtc); +- } + + /* Complete events for now disable pipes here. */ + if (modeset && !crtc->state->active && crtc->state->event) { +@@ -13800,21 +13838,11 @@ static void intel_atomic_commit_tail(str + + crtc->state->event = NULL; + } +- +- if (!modeset) +- intel_pre_plane_update(to_intel_crtc_state(old_crtc_state)); +- +- if (crtc->state->active && +- drm_atomic_get_existing_plane_state(state, crtc->primary)) +- intel_fbc_enable(intel_crtc, pipe_config, to_intel_plane_state(crtc->primary->state)); +- +- if (crtc->state->active) +- drm_atomic_helper_commit_planes_on_crtc(old_crtc_state); +- +- if (pipe_config->base.active && needs_vblank_wait(pipe_config)) +- crtc_vblank_mask |= 1 << i; + } + ++ /* Now enable the clocks, plane, pipe, and connectors that we set up. */ ++ dev_priv->display.update_crtcs(state, &crtc_vblank_mask); ++ + /* FIXME: We should call drm_atomic_helper_commit_hw_done() here + * already, but still need the state for the delayed optimization. To + * fix this: +@@ -15275,6 +15303,8 @@ void intel_init_display_hooks(struct drm + dev_priv->display.crtc_disable = i9xx_crtc_disable; + } + ++ dev_priv->display.update_crtcs = intel_update_crtcs; ++ + /* Returns the core display clock speed */ + if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) + dev_priv->display.get_display_clock_speed = diff --git a/kernel/kernel/files/patches/mageia/stable-drm-i915-move-long-hpd-handling-into-the-hotplug-work.patch b/kernel/kernel/files/patches/mageia/stable-drm-i915-move-long-hpd-handling-into-the-hotplug-work.patch new file mode 100644 index 00000000..5cb94eba --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-drm-i915-move-long-hpd-handling-into-the-hotplug-work.patch @@ -0,0 +1,102 @@ +From 1015811609c0328b5ed670d07748591b837e74eb Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= +Date: Mon, 3 Oct 2016 10:55:15 +0300 +Subject: drm/i915: Move long hpd handling into the hotplug work +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Ville Syrjälä + +commit 1015811609c0328b5ed670d07748591b837e74eb upstream. + +We can't rely on connector->status in the detect() hook if the long hpd +was already handled by the dig_port_work as that won't update +connector->status. Thus we have to defer the long hpd handling entirely +until the hotplug work runs to avoid the double long hpd handling +the "detect_done" flag is trying to prevent. + +We'll start to depend on connector->status being up to date in a +following patch. + +Cc: Damien Cassou +Cc: freedesktop.org@gp.mailgun.org +Cc: Arno +Cc: Shubhangi Shrivastava +Cc: Sivakumar Thulasimani +Cc: Ander Conselvan de Oliveira +Tested-by: Arno +Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83348 +Signed-off-by: Ville Syrjälä +Link: http://patchwork.freedesktop.org/patch/msgid/1475481316-8194-1-git-send-email-ville.syrjala@linux.intel.com +Reviewed-by: Ander Conselvan de Oliveira +(cherry picked from commit 27d4efc5591a5853de54713bc717de73c8951e17) +Signed-off-by: Jani Nikula +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/i915/intel_dp.c | 48 +++++++++++++++++++--------------------- + 1 file changed, 23 insertions(+), 25 deletions(-) + +--- a/drivers/gpu/drm/i915/intel_dp.c ++++ b/drivers/gpu/drm/i915/intel_dp.c +@@ -4696,36 +4696,34 @@ intel_dp_hpd_pulse(struct intel_digital_ + port_name(intel_dig_port->port), + long_hpd ? "long" : "short"); + ++ if (long_hpd) { ++ intel_dp->detect_done = false; ++ return IRQ_NONE; ++ } ++ + power_domain = intel_display_port_aux_power_domain(intel_encoder); + intel_display_power_get(dev_priv, power_domain); + +- if (long_hpd) { +- intel_dp_long_pulse(intel_dp->attached_connector); +- if (intel_dp->is_mst) +- ret = IRQ_HANDLED; +- goto put_power; +- +- } else { +- if (intel_dp->is_mst) { +- if (intel_dp_check_mst_status(intel_dp) == -EINVAL) { +- /* +- * If we were in MST mode, and device is not +- * there, get out of MST mode +- */ +- DRM_DEBUG_KMS("MST device may have disappeared %d vs %d\n", +- intel_dp->is_mst, intel_dp->mst_mgr.mst_state); +- intel_dp->is_mst = false; +- drm_dp_mst_topology_mgr_set_mst(&intel_dp->mst_mgr, +- intel_dp->is_mst); +- goto put_power; +- } ++ if (intel_dp->is_mst) { ++ if (intel_dp_check_mst_status(intel_dp) == -EINVAL) { ++ /* ++ * If we were in MST mode, and device is not ++ * there, get out of MST mode ++ */ ++ DRM_DEBUG_KMS("MST device may have disappeared %d vs %d\n", ++ intel_dp->is_mst, intel_dp->mst_mgr.mst_state); ++ intel_dp->is_mst = false; ++ drm_dp_mst_topology_mgr_set_mst(&intel_dp->mst_mgr, ++ intel_dp->is_mst); ++ intel_dp->detect_done = false; ++ goto put_power; + } ++ } + +- if (!intel_dp->is_mst) { +- if (!intel_dp_short_pulse(intel_dp)) { +- intel_dp_long_pulse(intel_dp->attached_connector); +- goto put_power; +- } ++ if (!intel_dp->is_mst) { ++ if (!intel_dp_short_pulse(intel_dp)) { ++ intel_dp->detect_done = false; ++ goto put_power; + } + } + diff --git a/kernel/kernel/files/patches/mageia/stable-drm-i915-sagv-is-not-skl-only-so-rename-a-few-things.patch b/kernel/kernel/files/patches/mageia/stable-drm-i915-sagv-is-not-skl-only-so-rename-a-few-things.patch new file mode 100644 index 00000000..0397a5f6 --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-drm-i915-sagv-is-not-skl-only-so-rename-a-few-things.patch @@ -0,0 +1,179 @@ +From 674f823b455cdb94d5773406c1caac170f87e1c4 Mon Sep 17 00:00:00 2001 +From: Paulo Zanoni +Date: Thu, 22 Sep 2016 18:00:27 -0300 +Subject: drm/i915: SAGV is not SKL-only, so rename a few things + +From: Paulo Zanoni + +commit 674f823b455cdb94d5773406c1caac170f87e1c4 upstream. + +The plan is to introduce intel_has_sagv() and then use it to discover +which platforms actually support it. + +I thought about keeping the functions with their current skl names, +but found two problems: (i) skl_has_sagv() would become a very +confusing name, and (ii) intel_atomic_commit_tail() doesn't seem to be +calling any functions whose name start with a platform name, so the +"intel_" naming scheme seems make more sense than the "firstplatorm_" +naming scheme here. + +Reviewed-by: Lyude +Reviewed-by: Maarten Lankhorst +Signed-off-by: Paulo Zanoni +Link: http://patchwork.freedesktop.org/patch/msgid/1474578035-424-2-git-send-email-paulo.r.zanoni@intel.com +(cherry picked from commit 16dcdc4edbcf5cb130004737f2548401776170f1) +Signed-off-by: Jani Nikula +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/i915/i915_drv.h | 10 +++++----- + drivers/gpu/drm/i915/intel_display.c | 8 ++++---- + drivers/gpu/drm/i915/intel_drv.h | 6 +++--- + drivers/gpu/drm/i915/intel_pm.c | 26 +++++++++++++------------- + 4 files changed, 25 insertions(+), 25 deletions(-) + +--- a/drivers/gpu/drm/i915/i915_drv.h ++++ b/drivers/gpu/drm/i915/i915_drv.h +@@ -1967,11 +1967,11 @@ struct drm_i915_private { + struct vlv_s0ix_state vlv_s0ix_state; + + enum { +- I915_SKL_SAGV_UNKNOWN = 0, +- I915_SKL_SAGV_DISABLED, +- I915_SKL_SAGV_ENABLED, +- I915_SKL_SAGV_NOT_CONTROLLED +- } skl_sagv_status; ++ I915_SAGV_UNKNOWN = 0, ++ I915_SAGV_DISABLED, ++ I915_SAGV_ENABLED, ++ I915_SAGV_NOT_CONTROLLED ++ } sagv_status; + + struct { + /* +--- a/drivers/gpu/drm/i915/intel_display.c ++++ b/drivers/gpu/drm/i915/intel_display.c +@@ -13891,8 +13891,8 @@ static void intel_atomic_commit_tail(str + * SKL workaround: bspec recommends we disable the SAGV when we + * have more then one pipe enabled + */ +- if (IS_SKYLAKE(dev_priv) && !skl_can_enable_sagv(state)) +- skl_disable_sagv(dev_priv); ++ if (IS_SKYLAKE(dev_priv) && !intel_can_enable_sagv(state)) ++ intel_disable_sagv(dev_priv); + + intel_modeset_verify_disabled(dev); + } +@@ -13950,8 +13950,8 @@ static void intel_atomic_commit_tail(str + } + + if (IS_SKYLAKE(dev_priv) && intel_state->modeset && +- skl_can_enable_sagv(state)) +- skl_enable_sagv(dev_priv); ++ intel_can_enable_sagv(state)) ++ intel_enable_sagv(dev_priv); + + drm_atomic_helper_commit_hw_done(state); + +--- a/drivers/gpu/drm/i915/intel_drv.h ++++ b/drivers/gpu/drm/i915/intel_drv.h +@@ -1717,9 +1717,9 @@ void ilk_wm_get_hw_state(struct drm_devi + void skl_wm_get_hw_state(struct drm_device *dev); + void skl_ddb_get_hw_state(struct drm_i915_private *dev_priv, + struct skl_ddb_allocation *ddb /* out */); +-bool skl_can_enable_sagv(struct drm_atomic_state *state); +-int skl_enable_sagv(struct drm_i915_private *dev_priv); +-int skl_disable_sagv(struct drm_i915_private *dev_priv); ++bool intel_can_enable_sagv(struct drm_atomic_state *state); ++int intel_enable_sagv(struct drm_i915_private *dev_priv); ++int intel_disable_sagv(struct drm_i915_private *dev_priv); + bool skl_ddb_allocation_equals(const struct skl_ddb_allocation *old, + const struct skl_ddb_allocation *new, + enum pipe pipe); +--- a/drivers/gpu/drm/i915/intel_pm.c ++++ b/drivers/gpu/drm/i915/intel_pm.c +@@ -2890,12 +2890,12 @@ skl_wm_plane_id(const struct intel_plane + * - We're not using an interlaced display configuration + */ + int +-skl_enable_sagv(struct drm_i915_private *dev_priv) ++intel_enable_sagv(struct drm_i915_private *dev_priv) + { + int ret; + +- if (dev_priv->skl_sagv_status == I915_SKL_SAGV_NOT_CONTROLLED || +- dev_priv->skl_sagv_status == I915_SKL_SAGV_ENABLED) ++ if (dev_priv->sagv_status == I915_SAGV_NOT_CONTROLLED || ++ dev_priv->sagv_status == I915_SAGV_ENABLED) + return 0; + + DRM_DEBUG_KMS("Enabling the SAGV\n"); +@@ -2913,19 +2913,19 @@ skl_enable_sagv(struct drm_i915_private + */ + if (ret == -ENXIO) { + DRM_DEBUG_DRIVER("No SAGV found on system, ignoring\n"); +- dev_priv->skl_sagv_status = I915_SKL_SAGV_NOT_CONTROLLED; ++ dev_priv->sagv_status = I915_SAGV_NOT_CONTROLLED; + return 0; + } else if (ret < 0) { + DRM_ERROR("Failed to enable the SAGV\n"); + return ret; + } + +- dev_priv->skl_sagv_status = I915_SKL_SAGV_ENABLED; ++ dev_priv->sagv_status = I915_SAGV_ENABLED; + return 0; + } + + static int +-skl_do_sagv_disable(struct drm_i915_private *dev_priv) ++intel_do_sagv_disable(struct drm_i915_private *dev_priv) + { + int ret; + uint32_t temp = GEN9_SAGV_DISABLE; +@@ -2939,19 +2939,19 @@ skl_do_sagv_disable(struct drm_i915_priv + } + + int +-skl_disable_sagv(struct drm_i915_private *dev_priv) ++intel_disable_sagv(struct drm_i915_private *dev_priv) + { + int ret, result; + +- if (dev_priv->skl_sagv_status == I915_SKL_SAGV_NOT_CONTROLLED || +- dev_priv->skl_sagv_status == I915_SKL_SAGV_DISABLED) ++ if (dev_priv->sagv_status == I915_SAGV_NOT_CONTROLLED || ++ dev_priv->sagv_status == I915_SAGV_DISABLED) + return 0; + + DRM_DEBUG_KMS("Disabling the SAGV\n"); + mutex_lock(&dev_priv->rps.hw_lock); + + /* bspec says to keep retrying for at least 1 ms */ +- ret = wait_for(result = skl_do_sagv_disable(dev_priv), 1); ++ ret = wait_for(result = intel_do_sagv_disable(dev_priv), 1); + mutex_unlock(&dev_priv->rps.hw_lock); + + if (ret == -ETIMEDOUT) { +@@ -2965,18 +2965,18 @@ skl_disable_sagv(struct drm_i915_private + */ + if (result == -ENXIO) { + DRM_DEBUG_DRIVER("No SAGV found on system, ignoring\n"); +- dev_priv->skl_sagv_status = I915_SKL_SAGV_NOT_CONTROLLED; ++ dev_priv->sagv_status = I915_SAGV_NOT_CONTROLLED; + return 0; + } else if (result < 0) { + DRM_ERROR("Failed to disable the SAGV\n"); + return result; + } + +- dev_priv->skl_sagv_status = I915_SKL_SAGV_DISABLED; ++ dev_priv->sagv_status = I915_SAGV_DISABLED; + return 0; + } + +-bool skl_can_enable_sagv(struct drm_atomic_state *state) ++bool intel_can_enable_sagv(struct drm_atomic_state *state) + { + struct drm_device *dev = state->dev; + struct drm_i915_private *dev_priv = to_i915(dev); diff --git a/kernel/kernel/files/patches/mageia/stable-drm-i915-skl-don-t-try-to-update-plane-watermarks-if-they-haven-t-changed.patch b/kernel/kernel/files/patches/mageia/stable-drm-i915-skl-don-t-try-to-update-plane-watermarks-if-they-haven-t-changed.patch new file mode 100644 index 00000000..4f468af0 --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-drm-i915-skl-don-t-try-to-update-plane-watermarks-if-they-haven-t-changed.patch @@ -0,0 +1,79 @@ +From ccebc23b57c313229526dc76383ce82f5e0b9001 Mon Sep 17 00:00:00 2001 +From: Lyude +Date: Mon, 29 Aug 2016 12:31:27 -0400 +Subject: drm/i915/skl: Don't try to update plane watermarks if they haven't changed + +From: Lyude + +commit ccebc23b57c313229526dc76383ce82f5e0b9001 upstream. + +i915 sometimes needs to disable planes in the middle of an atomic +commit, and then reenable them later in the same commit. Because of +this, we can't make the assumption that the state of the plane actually +changed. Since the state of the plane hasn't actually changed, neither +have it's watermarks. And if the watermarks hasn't changed then we +haven't populated skl_results with anything, which means we'll end up +zeroing out a plane's watermarks in the middle of the atomic commit +without restoring them later. + +Simple reproduction recipe: + - Get a SKL laptop, launch any kind of X session + - Get two extra monitors + - Keep hotplugging both displays (so that the display configuration + jumps from 1 active pipe to 3 active pipes and back) + - Eventually underrun + +Changes since v1: + - Fix incorrect use of "it's" +Changes since v2: + - Add reproduction recipe + +Signed-off-by: Lyude +Cc: Maarten Lankhorst +Fixes: 62e0fb880123 ("drm/i915/skl: Update plane watermarks atomically during plane updates") +Signed-off-by: Lyude +Testcase: kms_plane +Signed-off-by: Maarten Lankhorst +Link: http://patchwork.freedesktop.org/patch/msgid/1472488288-27280-1-git-send-email-cpaul@redhat.com +Cc: drm-intel-fixes@lists.freedesktop.org +Signed-off-by: Greg Kroah-Hartman + + +--- + drivers/gpu/drm/i915/intel_display.c | 7 ++++++- + drivers/gpu/drm/i915/intel_sprite.c | 8 ++++++++ + 2 files changed, 14 insertions(+), 1 deletion(-) + +--- a/drivers/gpu/drm/i915/intel_display.c ++++ b/drivers/gpu/drm/i915/intel_display.c +@@ -3068,7 +3068,12 @@ static void skylake_disable_primary_plan + struct intel_crtc *intel_crtc = to_intel_crtc(crtc); + int pipe = intel_crtc->pipe; + +- skl_write_plane_wm(intel_crtc, &dev_priv->wm.skl_results, 0); ++ /* ++ * We only populate skl_results on watermark updates, and if the ++ * plane's visiblity isn't actually changing neither is its watermarks. ++ */ ++ if (!to_intel_plane_state(crtc->primary->state)->visible) ++ skl_write_plane_wm(intel_crtc, &dev_priv->wm.skl_results, 0); + + I915_WRITE(PLANE_CTL(pipe, 0), 0); + I915_WRITE(PLANE_SURF(pipe, 0), 0); +--- a/drivers/gpu/drm/i915/intel_sprite.c ++++ b/drivers/gpu/drm/i915/intel_sprite.c +@@ -314,6 +314,14 @@ skl_disable_plane(struct drm_plane *dpla + const int pipe = intel_plane->pipe; + const int plane = intel_plane->plane + 1; + ++ /* ++ * We only populate skl_results on watermark updates, and if the ++ * plane's visiblity isn't actually changing neither is its watermarks. ++ */ ++ if (!to_intel_plane_state(dplane->state)->visible) ++ skl_write_plane_wm(to_intel_crtc(crtc), ++ &dev_priv->wm.skl_results, plane); ++ + I915_WRITE(PLANE_CTL(pipe, plane), 0); + + I915_WRITE(PLANE_SURF(pipe, plane), 0); diff --git a/kernel/kernel/files/patches/mageia/stable-drm-i915-skl-ensure-pipes-with-changed-wms-get-added-to-the-state.patch b/kernel/kernel/files/patches/mageia/stable-drm-i915-skl-ensure-pipes-with-changed-wms-get-added-to-the-state.patch new file mode 100644 index 00000000..58ac3c6a --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-drm-i915-skl-ensure-pipes-with-changed-wms-get-added-to-the-state.patch @@ -0,0 +1,43 @@ +From 05a76d3d6ad1ee9f9814f88949cc9305fc165460 Mon Sep 17 00:00:00 2001 +From: Lyude +Date: Wed, 17 Aug 2016 15:55:57 -0400 +Subject: drm/i915/skl: Ensure pipes with changed wms get added to the state +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Lyude + +commit 05a76d3d6ad1ee9f9814f88949cc9305fc165460 upstream. + +If we're enabling a pipe, we'll need to modify the watermarks on all +active planes. Since those planes won't be added to the state on +their own, we need to add them ourselves. + +Signed-off-by: Lyude +Reviewed-by: Matt Roper +Cc: Ville Syrjälä +Cc: Daniel Vetter +Cc: Radhakrishna Sripada +Cc: Hans de Goede +Signed-off-by: Maarten Lankhorst +Link: http://patchwork.freedesktop.org/patch/msgid/1471463761-26796-6-git-send-email-cpaul@redhat.com +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/i915/intel_pm.c | 4 ++++ + 1 file changed, 4 insertions(+) + +--- a/drivers/gpu/drm/i915/intel_pm.c ++++ b/drivers/gpu/drm/i915/intel_pm.c +@@ -4065,6 +4065,10 @@ skl_compute_ddb(struct drm_atomic_state + ret = skl_ddb_add_affected_planes(cstate); + if (ret) + return ret; ++ ++ ret = drm_atomic_add_affected_planes(state, &intel_crtc->base); ++ if (ret) ++ return ret; + } + + return 0; diff --git a/kernel/kernel/files/patches/mageia/stable-drm-i915-skl-update-ddb-values-atomically-with-wms-plane-attrs.patch b/kernel/kernel/files/patches/mageia/stable-drm-i915-skl-update-ddb-values-atomically-with-wms-plane-attrs.patch new file mode 100644 index 00000000..492d656f --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-drm-i915-skl-update-ddb-values-atomically-with-wms-plane-attrs.patch @@ -0,0 +1,479 @@ +From 27082493e9c6371b05370a619ab9d2877c5f4726 Mon Sep 17 00:00:00 2001 +From: Lyude +Date: Wed, 24 Aug 2016 07:48:10 +0200 +Subject: drm/i915/skl: Update DDB values atomically with wms/plane attrs +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Lyude + +commit 27082493e9c6371b05370a619ab9d2877c5f4726 upstream. + +Now that we can hook into update_crtcs and control the order in which we +update CRTCs at each modeset, we can finish the final step of fixing +Skylake's watermark handling by performing DDB updates at the same time +as plane updates and watermark updates. + +The first major change in this patch is skl_update_crtcs(), which +handles ensuring that we order each CRTC update in our atomic commits +properly so that they honor the DDB flush order. + +The second major change in this patch is the order in which we flush the +pipes. While the previous order may have worked, it can't be used in +this approach since it no longer will do the right thing. For example, +using the old ddb flush order: + +We have pipes A, B, and C enabled, and we're disabling C. Initial ddb +allocation looks like this: + +| A | B |xxxxxxx| + +Since we're performing the ddb updates after performing any CRTC +disablements in intel_atomic_commit_tail(), the space to the right of +pipe B is unallocated. + +1. Flush pipes with new allocation contained into old space. None + apply, so we skip this +2. Flush pipes having their allocation reduced, but overlapping with a + previous allocation. None apply, so we also skip this +3. Flush pipes that got more space allocated. This applies to A and B, + giving us the following update order: A, B + +This is wrong, since updating pipe A first will cause it to overlap with +B and potentially burst into flames. Our new order (see the code +comments for details) would update the pipes in the proper order: B, A. + +As well, we calculate the order for each DDB update during the check +phase, and reference it later in the commit phase when we hit +skl_update_crtcs(). + +This long overdue patch fixes the rest of the underruns on Skylake. + +Changes since v1: + - Add skl_ddb_entry_write() for cursor into skl_write_cursor_wm() +Changes since v2: + - Use the method for updating CRTCs that Ville suggested + - In skl_update_wm(), only copy the watermarks for the crtc that was + passed to us +Changes since v3: + - Small comment fix in skl_ddb_allocation_overlaps() +Changes since v4: + - Remove the second loop in intel_update_crtcs() and use Ville's + suggestion for updating the ddb allocations in the right order + - Get rid of the second loop and just use the ddb state as it updates + to determine what order to update everything in (thanks for the + suggestion Ville) + - Simplify skl_ddb_allocation_overlaps() + - Split actual overlap checking into it's own helper + +Fixes: 0e8fb7ba7ca5 ("drm/i915/skl: Flush the WM configuration") +Fixes: 8211bd5bdf5e ("drm/i915/skl: Program the DDB allocation") +[omitting CC for stable, since this patch will need to be changed for +such backports first] + +Testcase: kms_cursor_legacy +Testcase: plane-all-modeset-transition +Signed-off-by: Lyude +Cc: Ville Syrjälä +Cc: Daniel Vetter +Cc: Radhakrishna Sripada +Cc: Hans de Goede +Cc: Matt Roper +Signed-off-by: Maarten Lankhorst +Link: http://patchwork.freedesktop.org/patch/msgid/1471961565-28540-2-git-send-email-cpaul@redhat.com +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/i915/intel_display.c | 93 ++++++++++++++-- + drivers/gpu/drm/i915/intel_drv.h | 7 + + drivers/gpu/drm/i915/intel_pm.c | 200 +++++++---------------------------- + 3 files changed, 132 insertions(+), 168 deletions(-) + +--- a/drivers/gpu/drm/i915/intel_display.c ++++ b/drivers/gpu/drm/i915/intel_display.c +@@ -12967,16 +12967,23 @@ static void verify_wm_state(struct drm_c + hw_entry->start, hw_entry->end); + } + +- /* cursor */ +- hw_entry = &hw_ddb.plane[pipe][PLANE_CURSOR]; +- sw_entry = &sw_ddb->plane[pipe][PLANE_CURSOR]; +- +- if (!skl_ddb_entry_equal(hw_entry, sw_entry)) { +- DRM_ERROR("mismatch in DDB state pipe %c cursor " +- "(expected (%u,%u), found (%u,%u))\n", +- pipe_name(pipe), +- sw_entry->start, sw_entry->end, +- hw_entry->start, hw_entry->end); ++ /* ++ * cursor ++ * If the cursor plane isn't active, we may not have updated it's ddb ++ * allocation. In that case since the ddb allocation will be updated ++ * once the plane becomes visible, we can skip this check ++ */ ++ if (intel_crtc->cursor_addr) { ++ hw_entry = &hw_ddb.plane[pipe][PLANE_CURSOR]; ++ sw_entry = &sw_ddb->plane[pipe][PLANE_CURSOR]; ++ ++ if (!skl_ddb_entry_equal(hw_entry, sw_entry)) { ++ DRM_ERROR("mismatch in DDB state pipe %c cursor " ++ "(expected (%u,%u), found (%u,%u))\n", ++ pipe_name(pipe), ++ sw_entry->start, sw_entry->end, ++ hw_entry->start, hw_entry->end); ++ } + } + } + +@@ -13728,6 +13735,65 @@ static void intel_update_crtcs(struct dr + } + } + ++static void skl_update_crtcs(struct drm_atomic_state *state, ++ unsigned int *crtc_vblank_mask) ++{ ++ struct drm_device *dev = state->dev; ++ struct drm_i915_private *dev_priv = to_i915(dev); ++ struct intel_atomic_state *intel_state = to_intel_atomic_state(state); ++ struct drm_crtc *crtc; ++ struct drm_crtc_state *old_crtc_state; ++ struct skl_ddb_allocation *new_ddb = &intel_state->wm_results.ddb; ++ struct skl_ddb_allocation *cur_ddb = &dev_priv->wm.skl_hw.ddb; ++ unsigned int updated = 0; ++ bool progress; ++ enum pipe pipe; ++ ++ /* ++ * Whenever the number of active pipes changes, we need to make sure we ++ * update the pipes in the right order so that their ddb allocations ++ * never overlap with eachother inbetween CRTC updates. Otherwise we'll ++ * cause pipe underruns and other bad stuff. ++ */ ++ do { ++ int i; ++ progress = false; ++ ++ for_each_crtc_in_state(state, crtc, old_crtc_state, i) { ++ bool vbl_wait = false; ++ unsigned int cmask = drm_crtc_mask(crtc); ++ pipe = to_intel_crtc(crtc)->pipe; ++ ++ if (updated & cmask || !crtc->state->active) ++ continue; ++ if (skl_ddb_allocation_overlaps(state, cur_ddb, new_ddb, ++ pipe)) ++ continue; ++ ++ updated |= cmask; ++ ++ /* ++ * If this is an already active pipe, it's DDB changed, ++ * and this isn't the last pipe that needs updating ++ * then we need to wait for a vblank to pass for the ++ * new ddb allocation to take effect. ++ */ ++ if (!skl_ddb_allocation_equals(cur_ddb, new_ddb, pipe) && ++ !crtc->state->active_changed && ++ intel_state->wm_results.dirty_pipes != updated) ++ vbl_wait = true; ++ ++ intel_update_crtc(crtc, state, old_crtc_state, ++ crtc_vblank_mask); ++ ++ if (vbl_wait) ++ intel_wait_for_vblank(dev, pipe); ++ ++ progress = true; ++ } ++ } while (progress); ++} ++ + static void intel_atomic_commit_tail(struct drm_atomic_state *state) + { + struct drm_device *dev = state->dev; +@@ -15303,8 +15369,6 @@ void intel_init_display_hooks(struct drm + dev_priv->display.crtc_disable = i9xx_crtc_disable; + } + +- dev_priv->display.update_crtcs = intel_update_crtcs; +- + /* Returns the core display clock speed */ + if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) + dev_priv->display.get_display_clock_speed = +@@ -15394,6 +15458,11 @@ void intel_init_display_hooks(struct drm + skl_modeset_calc_cdclk; + } + ++ if (dev_priv->info.gen >= 9) ++ dev_priv->display.update_crtcs = skl_update_crtcs; ++ else ++ dev_priv->display.update_crtcs = intel_update_crtcs; ++ + switch (INTEL_INFO(dev_priv)->gen) { + case 2: + dev_priv->display.queue_flip = intel_gen2_queue_flip; +--- a/drivers/gpu/drm/i915/intel_drv.h ++++ b/drivers/gpu/drm/i915/intel_drv.h +@@ -1720,6 +1720,13 @@ void skl_ddb_get_hw_state(struct drm_i91 + bool skl_can_enable_sagv(struct drm_atomic_state *state); + int skl_enable_sagv(struct drm_i915_private *dev_priv); + int skl_disable_sagv(struct drm_i915_private *dev_priv); ++bool skl_ddb_allocation_equals(const struct skl_ddb_allocation *old, ++ const struct skl_ddb_allocation *new, ++ enum pipe pipe); ++bool skl_ddb_allocation_overlaps(struct drm_atomic_state *state, ++ const struct skl_ddb_allocation *old, ++ const struct skl_ddb_allocation *new, ++ enum pipe pipe); + void skl_write_cursor_wm(struct intel_crtc *intel_crtc, + const struct skl_wm_values *wm); + void skl_write_plane_wm(struct intel_crtc *intel_crtc, +--- a/drivers/gpu/drm/i915/intel_pm.c ++++ b/drivers/gpu/drm/i915/intel_pm.c +@@ -3843,6 +3843,11 @@ void skl_write_plane_wm(struct intel_crt + wm->plane[pipe][plane][level]); + } + I915_WRITE(PLANE_WM_TRANS(pipe, plane), wm->plane_trans[pipe][plane]); ++ ++ skl_ddb_entry_write(dev_priv, PLANE_BUF_CFG(pipe, plane), ++ &wm->ddb.plane[pipe][plane]); ++ skl_ddb_entry_write(dev_priv, PLANE_NV12_BUF_CFG(pipe, plane), ++ &wm->ddb.y_plane[pipe][plane]); + } + + void skl_write_cursor_wm(struct intel_crtc *intel_crtc, +@@ -3859,170 +3864,46 @@ void skl_write_cursor_wm(struct intel_cr + wm->plane[pipe][PLANE_CURSOR][level]); + } + I915_WRITE(CUR_WM_TRANS(pipe), wm->plane_trans[pipe][PLANE_CURSOR]); +-} +- +-static void skl_write_wm_values(struct drm_i915_private *dev_priv, +- const struct skl_wm_values *new) +-{ +- struct drm_device *dev = &dev_priv->drm; +- struct intel_crtc *crtc; +- +- for_each_intel_crtc(dev, crtc) { +- int i; +- enum pipe pipe = crtc->pipe; +- +- if ((new->dirty_pipes & drm_crtc_mask(&crtc->base)) == 0) +- continue; +- if (!crtc->active) +- continue; +- +- for (i = 0; i < intel_num_planes(crtc); i++) { +- skl_ddb_entry_write(dev_priv, +- PLANE_BUF_CFG(pipe, i), +- &new->ddb.plane[pipe][i]); +- skl_ddb_entry_write(dev_priv, +- PLANE_NV12_BUF_CFG(pipe, i), +- &new->ddb.y_plane[pipe][i]); +- } + +- skl_ddb_entry_write(dev_priv, CUR_BUF_CFG(pipe), +- &new->ddb.plane[pipe][PLANE_CURSOR]); +- } ++ skl_ddb_entry_write(dev_priv, CUR_BUF_CFG(pipe), ++ &wm->ddb.plane[pipe][PLANE_CURSOR]); + } + +-/* +- * When setting up a new DDB allocation arrangement, we need to correctly +- * sequence the times at which the new allocations for the pipes are taken into +- * account or we'll have pipes fetching from space previously allocated to +- * another pipe. +- * +- * Roughly the sequence looks like: +- * 1. re-allocate the pipe(s) with the allocation being reduced and not +- * overlapping with a previous light-up pipe (another way to put it is: +- * pipes with their new allocation strickly included into their old ones). +- * 2. re-allocate the other pipes that get their allocation reduced +- * 3. allocate the pipes having their allocation increased +- * +- * Steps 1. and 2. are here to take care of the following case: +- * - Initially DDB looks like this: +- * | B | C | +- * - enable pipe A. +- * - pipe B has a reduced DDB allocation that overlaps with the old pipe C +- * allocation +- * | A | B | C | +- * +- * We need to sequence the re-allocation: C, B, A (and not B, C, A). +- */ +- +-static void +-skl_wm_flush_pipe(struct drm_i915_private *dev_priv, enum pipe pipe, int pass) ++bool skl_ddb_allocation_equals(const struct skl_ddb_allocation *old, ++ const struct skl_ddb_allocation *new, ++ enum pipe pipe) + { +- int plane; +- +- DRM_DEBUG_KMS("flush pipe %c (pass %d)\n", pipe_name(pipe), pass); +- +- for_each_plane(dev_priv, pipe, plane) { +- I915_WRITE(PLANE_SURF(pipe, plane), +- I915_READ(PLANE_SURF(pipe, plane))); +- } +- I915_WRITE(CURBASE(pipe), I915_READ(CURBASE(pipe))); ++ return new->pipe[pipe].start == old->pipe[pipe].start && ++ new->pipe[pipe].end == old->pipe[pipe].end; + } + +-static bool +-skl_ddb_allocation_included(const struct skl_ddb_allocation *old, +- const struct skl_ddb_allocation *new, +- enum pipe pipe) ++static inline bool skl_ddb_entries_overlap(const struct skl_ddb_entry *a, ++ const struct skl_ddb_entry *b) + { +- uint16_t old_size, new_size; +- +- old_size = skl_ddb_entry_size(&old->pipe[pipe]); +- new_size = skl_ddb_entry_size(&new->pipe[pipe]); +- +- return old_size != new_size && +- new->pipe[pipe].start >= old->pipe[pipe].start && +- new->pipe[pipe].end <= old->pipe[pipe].end; ++ return a->start < b->end && b->start < a->end; + } + +-static void skl_flush_wm_values(struct drm_i915_private *dev_priv, +- struct skl_wm_values *new_values) ++bool skl_ddb_allocation_overlaps(struct drm_atomic_state *state, ++ const struct skl_ddb_allocation *old, ++ const struct skl_ddb_allocation *new, ++ enum pipe pipe) + { +- struct drm_device *dev = &dev_priv->drm; +- struct skl_ddb_allocation *cur_ddb, *new_ddb; +- bool reallocated[I915_MAX_PIPES] = {}; +- struct intel_crtc *crtc; +- enum pipe pipe; +- +- new_ddb = &new_values->ddb; +- cur_ddb = &dev_priv->wm.skl_hw.ddb; +- +- /* +- * First pass: flush the pipes with the new allocation contained into +- * the old space. +- * +- * We'll wait for the vblank on those pipes to ensure we can safely +- * re-allocate the freed space without this pipe fetching from it. +- */ +- for_each_intel_crtc(dev, crtc) { +- if (!crtc->active) +- continue; +- +- pipe = crtc->pipe; +- +- if (!skl_ddb_allocation_included(cur_ddb, new_ddb, pipe)) +- continue; +- +- skl_wm_flush_pipe(dev_priv, pipe, 1); +- intel_wait_for_vblank(dev, pipe); +- +- reallocated[pipe] = true; +- } +- +- +- /* +- * Second pass: flush the pipes that are having their allocation +- * reduced, but overlapping with a previous allocation. +- * +- * Here as well we need to wait for the vblank to make sure the freed +- * space is not used anymore. +- */ +- for_each_intel_crtc(dev, crtc) { +- if (!crtc->active) +- continue; ++ struct drm_device *dev = state->dev; ++ struct intel_crtc *intel_crtc; ++ enum pipe otherp; + +- pipe = crtc->pipe; ++ for_each_intel_crtc(dev, intel_crtc) { ++ otherp = intel_crtc->pipe; + +- if (reallocated[pipe]) ++ if (otherp == pipe) + continue; + +- if (skl_ddb_entry_size(&new_ddb->pipe[pipe]) < +- skl_ddb_entry_size(&cur_ddb->pipe[pipe])) { +- skl_wm_flush_pipe(dev_priv, pipe, 2); +- intel_wait_for_vblank(dev, pipe); +- reallocated[pipe] = true; +- } ++ if (skl_ddb_entries_overlap(&new->pipe[pipe], ++ &old->pipe[otherp])) ++ return true; + } + +- /* +- * Third pass: flush the pipes that got more space allocated. +- * +- * We don't need to actively wait for the update here, next vblank +- * will just get more DDB space with the correct WM values. +- */ +- for_each_intel_crtc(dev, crtc) { +- if (!crtc->active) +- continue; +- +- pipe = crtc->pipe; +- +- /* +- * At this point, only the pipes more space than before are +- * left to re-allocate. +- */ +- if (reallocated[pipe]) +- continue; +- +- skl_wm_flush_pipe(dev_priv, pipe, 3); +- } ++ return false; + } + + static int skl_update_pipe_wm(struct drm_crtc_state *cstate, +@@ -4224,7 +4105,7 @@ static void skl_update_wm(struct drm_crt + struct skl_wm_values *hw_vals = &dev_priv->wm.skl_hw; + struct intel_crtc_state *cstate = to_intel_crtc_state(crtc->state); + struct skl_pipe_wm *pipe_wm = &cstate->wm.skl.optimal; +- int pipe; ++ enum pipe pipe = intel_crtc->pipe; + + if ((results->dirty_pipes & drm_crtc_mask(crtc)) == 0) + return; +@@ -4233,15 +4114,22 @@ static void skl_update_wm(struct drm_crt + + mutex_lock(&dev_priv->wm.wm_mutex); + +- skl_write_wm_values(dev_priv, results); +- skl_flush_wm_values(dev_priv, results); +- + /* +- * Store the new configuration (but only for the pipes that have +- * changed; the other values weren't recomputed). ++ * If this pipe isn't active already, we're going to be enabling it ++ * very soon. Since it's safe to update a pipe's ddb allocation while ++ * the pipe's shut off, just do so here. Already active pipes will have ++ * their watermarks updated once we update their planes. + */ +- for_each_pipe_masked(dev_priv, pipe, results->dirty_pipes) +- skl_copy_wm_for_pipe(hw_vals, results, pipe); ++ if (crtc->state->active_changed) { ++ int plane; ++ ++ for (plane = 0; plane < intel_num_planes(intel_crtc); plane++) ++ skl_write_plane_wm(intel_crtc, results, plane); ++ ++ skl_write_cursor_wm(intel_crtc, results); ++ } ++ ++ skl_copy_wm_for_pipe(hw_vals, results, pipe); + + mutex_unlock(&dev_priv->wm.wm_mutex); + } diff --git a/kernel/kernel/files/patches/mageia/stable-drm-i915-skl-update-plane-watermarks-atomically-during-plane-updates.patch b/kernel/kernel/files/patches/mageia/stable-drm-i915-skl-update-plane-watermarks-atomically-during-plane-updates.patch new file mode 100644 index 00000000..d9798c44 --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-drm-i915-skl-update-plane-watermarks-atomically-during-plane-updates.patch @@ -0,0 +1,335 @@ +From 62e0fb880123c98793e5c3ba8355501b0305e92e Mon Sep 17 00:00:00 2001 +From: Lyude +Date: Mon, 22 Aug 2016 12:50:08 -0400 +Subject: drm/i915/skl: Update plane watermarks atomically during plane updates +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Lyude + +commit 62e0fb880123c98793e5c3ba8355501b0305e92e upstream. + +Thanks to Ville for suggesting this as a potential solution to pipe +underruns on Skylake. + +On Skylake all of the registers for configuring planes, including the +registers for configuring their watermarks, are double buffered. New +values written to them won't take effect until said registers are +"armed", which is done by writing to the PLANE_SURF (or in the case of +cursor planes, the CURBASE register) register. + +With this in mind, up until now we've been updating watermarks on skl +like this: + + non-modeset { + - calculate (during atomic check phase) + - finish_atomic_commit: + - intel_pre_plane_update: + - intel_update_watermarks() + - {vblank happens; new watermarks + old plane values => underrun } + - drm_atomic_helper_commit_planes_on_crtc: + - start vblank evasion + - write new plane registers + - end vblank evasion + } + + or + + modeset { + - calculate (during atomic check phase) + - finish_atomic_commit: + - crtc_enable: + - intel_update_watermarks() + - {vblank happens; new watermarks + old plane values => underrun } + - drm_atomic_helper_commit_planes_on_crtc: + - start vblank evasion + - write new plane registers + - end vblank evasion + } + +Now we update watermarks atomically like this: + + non-modeset { + - calculate (during atomic check phase) + - finish_atomic_commit: + - intel_pre_plane_update: + - intel_update_watermarks() (wm values aren't written yet) + - drm_atomic_helper_commit_planes_on_crtc: + - start vblank evasion + - write new plane registers + - write new wm values + - end vblank evasion + } + + modeset { + - calculate (during atomic check phase) + - finish_atomic_commit: + - crtc_enable: + - intel_update_watermarks() (actual wm values aren't written + yet) + - drm_atomic_helper_commit_planes_on_crtc: + - start vblank evasion + - write new plane registers + - write new wm values + - end vblank evasion + } + +So this patch moves all of the watermark writes into the right place; +inside of the vblank evasion where we update all of the registers for +each plane. While this patch doesn't fix everything, it does allow us to +update the watermark values in the way the hardware expects us to. + +Changes since original patch series: + - Remove mutex_lock/mutex_unlock since they don't do anything and we're + not touching global state + - Move skl_write_cursor_wm/skl_write_plane_wm functions into + intel_pm.c, make externally visible + - Add skl_write_plane_wm calls to skl_update_plane + - Fix conditional for for loop in skl_write_plane_wm (level < max_level + should be level <= max_level) + - Make diagram in commit more accurate to what's actually happening + - Add Fixes: + +Changes since v1: + - Use IS_GEN9() instead of IS_SKYLAKE() since these fixes apply to more + then just Skylake + - Update description to make it clear this patch doesn't fix everything + - Check if pipes were actually changed before writing watermarks + +Changes since v2: + - Write PIPE_WM_LINETIME during vblank evasion + +Changes since v3: + - Rebase against new SAGV patch changes + +Changes since v4: + - Add a parameter to choose what skl_wm_values struct to use when + writing new plane watermarks + +Changes since v5: + - Remove cursor ddb entry write in skl_write_cursor_wm(), defer until + patch 6 + - Write WM_LINETIME in intel_begin_crtc_commit() + +Changes since v6: + - Remove redundant dirty_pipes check in skl_write_plane_wm (we check + this in all places where we call this function, and it was supposed + to have been removed earlier anyway) + - In i9xx_update_cursor(), use dev_priv->info.gen >= 9 instead of + IS_GEN9(dev_priv). We do this everywhere else and I'd imagine this + needs to be done for gen10 as well + +Changes since v7: + - Fix rebase fail (unused variable obj) + - Make struct skl_wm_values *wm const + - Fix indenting + - Use INTEL_GEN() instead of dev_priv->info.gen + +Changes since v8: + - Don't forget calls to skl_write_plane_wm() when disabling planes + - Use INTEL_GEN(), not INTEL_INFO()->gen in intel_begin_crtc_commit() + +Fixes: 2d41c0b59afc ("drm/i915/skl: SKL Watermark Computation") +Signed-off-by: Lyude +Reviewed-by: Matt Roper +Cc: stable@vger.kernel.org +Cc: Ville Syrjälä +Cc: Daniel Vetter +Cc: Radhakrishna Sripada +Cc: Hans de Goede +Signed-off-by: Maarten Lankhorst +Link: http://patchwork.freedesktop.org/patch/msgid/1471884608-10671-1-git-send-email-cpaul@redhat.com +Link: http://patchwork.freedesktop.org/patch/msgid/1471884608-10671-1-git-send-email-cpaul@redhat.com +Signed-off-by: Greg Kroah-Hartman + + +--- + drivers/gpu/drm/i915/intel_display.c | 21 +++++++++++++- + drivers/gpu/drm/i915/intel_drv.h | 5 +++ + drivers/gpu/drm/i915/intel_pm.c | 50 +++++++++++++++++++++++------------ + drivers/gpu/drm/i915/intel_sprite.c | 6 ++++ + 4 files changed, 64 insertions(+), 18 deletions(-) + +--- a/drivers/gpu/drm/i915/intel_display.c ++++ b/drivers/gpu/drm/i915/intel_display.c +@@ -2980,6 +2980,7 @@ static void skylake_update_primary_plane + struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); + struct drm_framebuffer *fb = plane_state->base.fb; + struct drm_i915_gem_object *obj = intel_fb_obj(fb); ++ const struct skl_wm_values *wm = &dev_priv->wm.skl_results; + int pipe = intel_crtc->pipe; + u32 plane_ctl, stride_div, stride; + u32 tile_height, plane_offset, plane_size; +@@ -3031,6 +3032,9 @@ static void skylake_update_primary_plane + intel_crtc->adjusted_x = x_offset; + intel_crtc->adjusted_y = y_offset; + ++ if (wm->dirty_pipes & drm_crtc_mask(&intel_crtc->base)) ++ skl_write_plane_wm(intel_crtc, wm, 0); ++ + I915_WRITE(PLANE_CTL(pipe, 0), plane_ctl); + I915_WRITE(PLANE_OFFSET(pipe, 0), plane_offset); + I915_WRITE(PLANE_SIZE(pipe, 0), plane_size); +@@ -3061,7 +3065,10 @@ static void skylake_disable_primary_plan + { + struct drm_device *dev = crtc->dev; + struct drm_i915_private *dev_priv = to_i915(dev); +- int pipe = to_intel_crtc(crtc)->pipe; ++ struct intel_crtc *intel_crtc = to_intel_crtc(crtc); ++ int pipe = intel_crtc->pipe; ++ ++ skl_write_plane_wm(intel_crtc, &dev_priv->wm.skl_results, 0); + + I915_WRITE(PLANE_CTL(pipe, 0), 0); + I915_WRITE(PLANE_SURF(pipe, 0), 0); +@@ -10306,9 +10313,13 @@ static void i9xx_update_cursor(struct dr + struct drm_device *dev = crtc->dev; + struct drm_i915_private *dev_priv = to_i915(dev); + struct intel_crtc *intel_crtc = to_intel_crtc(crtc); ++ const struct skl_wm_values *wm = &dev_priv->wm.skl_results; + int pipe = intel_crtc->pipe; + uint32_t cntl = 0; + ++ if (INTEL_GEN(dev_priv) >= 9 && wm->dirty_pipes & drm_crtc_mask(crtc)) ++ skl_write_cursor_wm(intel_crtc, wm); ++ + if (plane_state && plane_state->visible) { + cntl = MCURSOR_GAMMA_ENABLE; + switch (plane_state->base.crtc_w) { +@@ -14221,10 +14232,12 @@ static void intel_begin_crtc_commit(stru + struct drm_crtc_state *old_crtc_state) + { + struct drm_device *dev = crtc->dev; ++ struct drm_i915_private *dev_priv = to_i915(dev); + struct intel_crtc *intel_crtc = to_intel_crtc(crtc); + struct intel_crtc_state *old_intel_state = + to_intel_crtc_state(old_crtc_state); + bool modeset = needs_modeset(crtc->state); ++ enum pipe pipe = intel_crtc->pipe; + + /* Perform vblank evasion around commit operation */ + intel_pipe_update_start(intel_crtc); +@@ -14239,8 +14252,12 @@ static void intel_begin_crtc_commit(stru + + if (to_intel_crtc_state(crtc->state)->update_pipe) + intel_update_pipe_config(intel_crtc, old_intel_state); +- else if (INTEL_INFO(dev)->gen >= 9) ++ else if (INTEL_GEN(dev_priv) >= 9) { + skl_detach_scalers(intel_crtc); ++ ++ I915_WRITE(PIPE_WM_LINETIME(pipe), ++ dev_priv->wm.skl_hw.wm_linetime[pipe]); ++ } + } + + static void intel_finish_crtc_commit(struct drm_crtc *crtc, +--- a/drivers/gpu/drm/i915/intel_drv.h ++++ b/drivers/gpu/drm/i915/intel_drv.h +@@ -1720,6 +1720,11 @@ void skl_ddb_get_hw_state(struct drm_i91 + bool skl_can_enable_sagv(struct drm_atomic_state *state); + int skl_enable_sagv(struct drm_i915_private *dev_priv); + int skl_disable_sagv(struct drm_i915_private *dev_priv); ++void skl_write_cursor_wm(struct intel_crtc *intel_crtc, ++ const struct skl_wm_values *wm); ++void skl_write_plane_wm(struct intel_crtc *intel_crtc, ++ const struct skl_wm_values *wm, ++ int plane); + uint32_t ilk_pipe_pixel_rate(const struct intel_crtc_state *pipe_config); + bool ilk_disable_lp_wm(struct drm_device *dev); + int sanitize_rc6_option(struct drm_i915_private *dev_priv, int enable_rc6); +--- a/drivers/gpu/drm/i915/intel_pm.c ++++ b/drivers/gpu/drm/i915/intel_pm.c +@@ -3828,6 +3828,39 @@ static void skl_ddb_entry_write(struct d + I915_WRITE(reg, 0); + } + ++void skl_write_plane_wm(struct intel_crtc *intel_crtc, ++ const struct skl_wm_values *wm, ++ int plane) ++{ ++ struct drm_crtc *crtc = &intel_crtc->base; ++ struct drm_device *dev = crtc->dev; ++ struct drm_i915_private *dev_priv = to_i915(dev); ++ int level, max_level = ilk_wm_max_level(dev); ++ enum pipe pipe = intel_crtc->pipe; ++ ++ for (level = 0; level <= max_level; level++) { ++ I915_WRITE(PLANE_WM(pipe, plane, level), ++ wm->plane[pipe][plane][level]); ++ } ++ I915_WRITE(PLANE_WM_TRANS(pipe, plane), wm->plane_trans[pipe][plane]); ++} ++ ++void skl_write_cursor_wm(struct intel_crtc *intel_crtc, ++ const struct skl_wm_values *wm) ++{ ++ struct drm_crtc *crtc = &intel_crtc->base; ++ struct drm_device *dev = crtc->dev; ++ struct drm_i915_private *dev_priv = to_i915(dev); ++ int level, max_level = ilk_wm_max_level(dev); ++ enum pipe pipe = intel_crtc->pipe; ++ ++ for (level = 0; level <= max_level; level++) { ++ I915_WRITE(CUR_WM(pipe, level), ++ wm->plane[pipe][PLANE_CURSOR][level]); ++ } ++ I915_WRITE(CUR_WM_TRANS(pipe), wm->plane_trans[pipe][PLANE_CURSOR]); ++} ++ + static void skl_write_wm_values(struct drm_i915_private *dev_priv, + const struct skl_wm_values *new) + { +@@ -3835,7 +3868,7 @@ static void skl_write_wm_values(struct d + struct intel_crtc *crtc; + + for_each_intel_crtc(dev, crtc) { +- int i, level, max_level = ilk_wm_max_level(dev); ++ int i; + enum pipe pipe = crtc->pipe; + + if ((new->dirty_pipes & drm_crtc_mask(&crtc->base)) == 0) +@@ -3843,21 +3876,6 @@ static void skl_write_wm_values(struct d + if (!crtc->active) + continue; + +- I915_WRITE(PIPE_WM_LINETIME(pipe), new->wm_linetime[pipe]); +- +- for (level = 0; level <= max_level; level++) { +- for (i = 0; i < intel_num_planes(crtc); i++) +- I915_WRITE(PLANE_WM(pipe, i, level), +- new->plane[pipe][i][level]); +- I915_WRITE(CUR_WM(pipe, level), +- new->plane[pipe][PLANE_CURSOR][level]); +- } +- for (i = 0; i < intel_num_planes(crtc); i++) +- I915_WRITE(PLANE_WM_TRANS(pipe, i), +- new->plane_trans[pipe][i]); +- I915_WRITE(CUR_WM_TRANS(pipe), +- new->plane_trans[pipe][PLANE_CURSOR]); +- + for (i = 0; i < intel_num_planes(crtc); i++) { + skl_ddb_entry_write(dev_priv, + PLANE_BUF_CFG(pipe, i), +--- a/drivers/gpu/drm/i915/intel_sprite.c ++++ b/drivers/gpu/drm/i915/intel_sprite.c +@@ -203,6 +203,9 @@ skl_update_plane(struct drm_plane *drm_p + struct intel_plane *intel_plane = to_intel_plane(drm_plane); + struct drm_framebuffer *fb = plane_state->base.fb; + struct drm_i915_gem_object *obj = intel_fb_obj(fb); ++ const struct skl_wm_values *wm = &dev_priv->wm.skl_results; ++ struct drm_crtc *crtc = crtc_state->base.crtc; ++ struct intel_crtc *intel_crtc = to_intel_crtc(crtc); + const int pipe = intel_plane->pipe; + const int plane = intel_plane->plane + 1; + u32 plane_ctl, stride_div, stride; +@@ -238,6 +241,9 @@ skl_update_plane(struct drm_plane *drm_p + crtc_w--; + crtc_h--; + ++ if (wm->dirty_pipes & drm_crtc_mask(crtc)) ++ skl_write_plane_wm(intel_crtc, wm, plane); ++ + if (key->flags) { + I915_WRITE(PLANE_KEYVAL(pipe, plane), key->min_value); + I915_WRITE(PLANE_KEYMAX(pipe, plane), key->max_value); diff --git a/kernel/kernel/files/patches/mageia/stable-drm-i915-unalias-obj-phys_handle-and-obj-userptr.patch b/kernel/kernel/files/patches/mageia/stable-drm-i915-unalias-obj-phys_handle-and-obj-userptr.patch new file mode 100644 index 00000000..53219119 --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-drm-i915-unalias-obj-phys_handle-and-obj-userptr.patch @@ -0,0 +1,61 @@ +From ca5732c53bf66ad755284786897e0dd10330de87 Mon Sep 17 00:00:00 2001 +From: Chris Wilson +Date: Mon, 3 Oct 2016 13:45:15 +0100 +Subject: drm/i915: Unalias obj->phys_handle and obj->userptr + +From: Chris Wilson + +commit ca5732c53bf66ad755284786897e0dd10330de87 upstream. + +We use obj->phys_handle to choose the pread/pwrite path, but as +obj->phys_handle is a union with obj->userptr, we then mistakenly use +the phys_handle path for userptr objects within pread/pwrite. + +Testcase: igt/gem_userptr_blits/forbidden-operations +Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97519 +Signed-off-by: Chris Wilson +Reviewed-by: Joonas Lahtinen +Link: http://patchwork.freedesktop.org/patch/msgid/20161003124516.12388-2-chris@chris-wilson.co.uk +(cherry picked from commit 5f12b80a0b42da253691ca03828033014bb786eb) +Signed-off-by: Jani Nikula +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/i915/i915_drv.h | 24 +++++++++++------------- + 1 file changed, 11 insertions(+), 13 deletions(-) + +--- a/drivers/gpu/drm/i915/i915_drv.h ++++ b/drivers/gpu/drm/i915/i915_drv.h +@@ -2282,21 +2282,19 @@ struct drm_i915_gem_object { + /** Record of address bit 17 of each page at last unbind. */ + unsigned long *bit_17; + +- union { +- /** for phy allocated objects */ +- struct drm_dma_handle *phys_handle; +- +- struct i915_gem_userptr { +- uintptr_t ptr; +- unsigned read_only :1; +- unsigned workers :4; ++ struct i915_gem_userptr { ++ uintptr_t ptr; ++ unsigned read_only :1; ++ unsigned workers :4; + #define I915_GEM_USERPTR_MAX_WORKERS 15 + +- struct i915_mm_struct *mm; +- struct i915_mmu_object *mmu_object; +- struct work_struct *work; +- } userptr; +- }; ++ struct i915_mm_struct *mm; ++ struct i915_mmu_object *mmu_object; ++ struct work_struct *work; ++ } userptr; ++ ++ /** for phys allocated objects */ ++ struct drm_dma_handle *phys_handle; + }; + #define to_intel_bo(x) container_of(x, struct drm_i915_gem_object, base) + diff --git a/kernel/kernel/files/patches/mageia/stable-drm-prime-pass-the-right-module-owner-through-to-dma_buf_export.patch b/kernel/kernel/files/patches/mageia/stable-drm-prime-pass-the-right-module-owner-through-to-dma_buf_export.patch new file mode 100644 index 00000000..242e1f81 --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-drm-prime-pass-the-right-module-owner-through-to-dma_buf_export.patch @@ -0,0 +1,78 @@ +From 56a76c0123d6cb034975901c80fce2627338ef9e Mon Sep 17 00:00:00 2001 +From: Chris Wilson +Date: Wed, 5 Oct 2016 13:21:43 +0100 +Subject: drm/prime: Pass the right module owner through to dma_buf_export() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Chris Wilson + +commit 56a76c0123d6cb034975901c80fce2627338ef9e upstream. + +dma_buf_export() adds a reference to the owning module to the dmabuf (to +prevent the driver from being unloaded whilst a third party still refers +to the dmabuf). However, drm_gem_prime_export() was passing its own +THIS_MODULE (i.e. drm.ko) rather than the driver. Extract the right +owner from the device->fops instead. + +v2: Use C99 initializers to zero out unset elements of +dma_buf_export_info +v3: Extract the right module from dev->fops. + +Testcase: igt/vgem_basic/unload +Reported-by: Petri Latvala +Signed-off-by: Chris Wilson +Cc: Petri Latvala +Cc: Christian König +Tested-by: Petri Latvala +Reviewed-by: Petri Latvala +Reviewed-by: Christian König +Signed-off-by: Daniel Vetter +Link: http://patchwork.freedesktop.org/patch/msgid/20161005122145.1507-1-chris@chris-wilson.co.uk +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/drm_prime.c | 17 ++++++++++------- + include/drm/drmP.h | 3 ++- + 2 files changed, 12 insertions(+), 8 deletions(-) + +--- a/drivers/gpu/drm/drm_prime.c ++++ b/drivers/gpu/drm/drm_prime.c +@@ -335,14 +335,17 @@ static const struct dma_buf_ops drm_gem_ + * using the PRIME helpers. + */ + struct dma_buf *drm_gem_prime_export(struct drm_device *dev, +- struct drm_gem_object *obj, int flags) ++ struct drm_gem_object *obj, ++ int flags) + { +- DEFINE_DMA_BUF_EXPORT_INFO(exp_info); +- +- exp_info.ops = &drm_gem_prime_dmabuf_ops; +- exp_info.size = obj->size; +- exp_info.flags = flags; +- exp_info.priv = obj; ++ struct dma_buf_export_info exp_info = { ++ .exp_name = KBUILD_MODNAME, /* white lie for debug */ ++ .owner = dev->driver->fops->owner, ++ .ops = &drm_gem_prime_dmabuf_ops, ++ .size = obj->size, ++ .flags = flags, ++ .priv = obj, ++ }; + + if (dev->driver->gem_prime_res_obj) + exp_info.resv = dev->driver->gem_prime_res_obj(obj); +--- a/include/drm/drmP.h ++++ b/include/drm/drmP.h +@@ -938,7 +938,8 @@ static inline int drm_debugfs_remove_fil + #endif + + extern struct dma_buf *drm_gem_prime_export(struct drm_device *dev, +- struct drm_gem_object *obj, int flags); ++ struct drm_gem_object *obj, ++ int flags); + extern int drm_gem_prime_handle_to_fd(struct drm_device *dev, + struct drm_file *file_priv, uint32_t handle, uint32_t flags, + int *prime_fd); diff --git a/kernel/kernel/files/patches/mageia/stable-drm-radeon-change-vblank_time-s-calculation-method-to-reduce-computational-error.patch b/kernel/kernel/files/patches/mageia/stable-drm-radeon-change-vblank_time-s-calculation-method-to-reduce-computational-error.patch new file mode 100644 index 00000000..aae96954 --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-drm-radeon-change-vblank_time-s-calculation-method-to-reduce-computational-error.patch @@ -0,0 +1,48 @@ +From 02cfb5fccb0f9f968f0e208d89d9769aa16267bc Mon Sep 17 00:00:00 2001 +From: Alex Deucher +Date: Wed, 12 Oct 2016 15:28:55 -0400 +Subject: drm/radeon: change vblank_time's calculation method to reduce computational error. + +From: Alex Deucher + +commit 02cfb5fccb0f9f968f0e208d89d9769aa16267bc upstream. + +Ported from Rex's amdgpu change. + +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/radeon/r600_dpm.c | 15 ++++++++------- + 1 file changed, 8 insertions(+), 7 deletions(-) + +--- a/drivers/gpu/drm/radeon/r600_dpm.c ++++ b/drivers/gpu/drm/radeon/r600_dpm.c +@@ -156,19 +156,20 @@ u32 r600_dpm_get_vblank_time(struct rade + struct drm_device *dev = rdev->ddev; + struct drm_crtc *crtc; + struct radeon_crtc *radeon_crtc; +- u32 line_time_us, vblank_lines; ++ u32 vblank_in_pixels; + u32 vblank_time_us = 0xffffffff; /* if the displays are off, vblank time is max */ + + if (rdev->num_crtc && rdev->mode_info.mode_config_initialized) { + list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { + radeon_crtc = to_radeon_crtc(crtc); + if (crtc->enabled && radeon_crtc->enabled && radeon_crtc->hw_mode.clock) { +- line_time_us = (radeon_crtc->hw_mode.crtc_htotal * 1000) / +- radeon_crtc->hw_mode.clock; +- vblank_lines = radeon_crtc->hw_mode.crtc_vblank_end - +- radeon_crtc->hw_mode.crtc_vdisplay + +- (radeon_crtc->v_border * 2); +- vblank_time_us = vblank_lines * line_time_us; ++ vblank_in_pixels = ++ radeon_crtc->hw_mode.crtc_htotal * ++ (radeon_crtc->hw_mode.crtc_vblank_end - ++ radeon_crtc->hw_mode.crtc_vdisplay + ++ (radeon_crtc->v_border * 2)); ++ ++ vblank_time_us = vblank_in_pixels * 1000 / radeon_crtc->hw_mode.clock; + break; + } + } diff --git a/kernel/kernel/files/patches/mageia/stable-drm-radeon-narrow-asic_init-for-virtualization.patch b/kernel/kernel/files/patches/mageia/stable-drm-radeon-narrow-asic_init-for-virtualization.patch new file mode 100644 index 00000000..0574fb0f --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-drm-radeon-narrow-asic_init-for-virtualization.patch @@ -0,0 +1,33 @@ +From 884031f0aacf57dad1575f96714efc80de9b19cc Mon Sep 17 00:00:00 2001 +From: Alex Deucher +Date: Mon, 19 Sep 2016 12:35:22 -0400 +Subject: drm/radeon: narrow asic_init for virtualization + +From: Alex Deucher + +commit 884031f0aacf57dad1575f96714efc80de9b19cc upstream. + +Only needed on CIK+ due to the way pci reset is handled +by the GPU. + +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/radeon/radeon_device.c | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +--- a/drivers/gpu/drm/radeon/radeon_device.c ++++ b/drivers/gpu/drm/radeon/radeon_device.c +@@ -661,8 +661,9 @@ bool radeon_card_posted(struct radeon_de + { + uint32_t reg; + +- /* for pass through, always force asic_init */ +- if (radeon_device_is_virtual()) ++ /* for pass through, always force asic_init for CI */ ++ if (rdev->family >= CHIP_BONAIRE && ++ radeon_device_is_virtual()) + return false; + + /* required for EFI mode on macbook2,1 which uses an r5xx asic */ diff --git a/kernel/kernel/files/patches/mageia/stable-drm-radeon-si-dpm-fix-phase-shedding-setup.patch b/kernel/kernel/files/patches/mageia/stable-drm-radeon-si-dpm-fix-phase-shedding-setup.patch new file mode 100644 index 00000000..26bc118e --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-drm-radeon-si-dpm-fix-phase-shedding-setup.patch @@ -0,0 +1,40 @@ +From 427920292b00474d978d632bc03a8e4e50029af3 Mon Sep 17 00:00:00 2001 +From: Alex Deucher +Date: Tue, 27 Sep 2016 14:51:53 -0400 +Subject: drm/radeon/si/dpm: fix phase shedding setup + +From: Alex Deucher + +commit 427920292b00474d978d632bc03a8e4e50029af3 upstream. + +Used the wrong index to setup the phase shedding mask. + +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/radeon/si_dpm.c | 2 +- + drivers/gpu/drm/radeon/sislands_smc.h | 1 + + 2 files changed, 2 insertions(+), 1 deletion(-) + +--- a/drivers/gpu/drm/radeon/si_dpm.c ++++ b/drivers/gpu/drm/radeon/si_dpm.c +@@ -4112,7 +4112,7 @@ static int si_populate_smc_voltage_table + &rdev->pm.dpm.dyn_state.phase_shedding_limits_table)) { + si_populate_smc_voltage_table(rdev, &si_pi->vddc_phase_shed_table, table); + +- table->phaseMaskTable.lowMask[SISLANDS_SMC_VOLTAGEMASK_VDDC] = ++ table->phaseMaskTable.lowMask[SISLANDS_SMC_VOLTAGEMASK_VDDC_PHASE_SHEDDING] = + cpu_to_be32(si_pi->vddc_phase_shed_table.mask_low); + + si_write_smc_soft_register(rdev, SI_SMC_SOFT_REGISTER_phase_shedding_delay, +--- a/drivers/gpu/drm/radeon/sislands_smc.h ++++ b/drivers/gpu/drm/radeon/sislands_smc.h +@@ -194,6 +194,7 @@ typedef struct SISLANDS_SMC_SWSTATE SISL + #define SISLANDS_SMC_VOLTAGEMASK_VDDC 0 + #define SISLANDS_SMC_VOLTAGEMASK_MVDD 1 + #define SISLANDS_SMC_VOLTAGEMASK_VDDCI 2 ++#define SISLANDS_SMC_VOLTAGEMASK_VDDC_PHASE_SHEDDING 3 + #define SISLANDS_SMC_VOLTAGEMASK_MAX 4 + + struct SISLANDS_SMC_VOLTAGEMASKTABLE diff --git a/kernel/kernel/files/patches/mageia/stable-drm-vc4-fix-races-when-the-cs-reads-from-render-targets.patch b/kernel/kernel/files/patches/mageia/stable-drm-vc4-fix-races-when-the-cs-reads-from-render-targets.patch new file mode 100644 index 00000000..a4734007 --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-drm-vc4-fix-races-when-the-cs-reads-from-render-targets.patch @@ -0,0 +1,225 @@ +From 7edabee06a5622190d59689a64f5e17d1c343cc3 Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Tue, 27 Sep 2016 09:03:13 -0700 +Subject: drm/vc4: Fix races when the CS reads from render targets. + +From: Eric Anholt + +commit 7edabee06a5622190d59689a64f5e17d1c343cc3 upstream. + +With the introduction of bin/render pipelining, the previous job may +not be completed when we start binning the next one. If the previous +job wrote our VBO, IB, or CS textures, then the binning stage might +get stale or uninitialized results. + +Fixes the major rendering failure in glmark2 -b terrain. + +Signed-off-by: Eric Anholt +Fixes: ca26d28bbaa3 ("drm/vc4: improve throughput by pipelining binning and rendering jobs") +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/vc4/vc4_drv.h | 19 ++++++++++++++++++- + drivers/gpu/drm/vc4/vc4_gem.c | 13 +++++++++++++ + drivers/gpu/drm/vc4/vc4_render_cl.c | 21 +++++++++++++++++---- + drivers/gpu/drm/vc4/vc4_validate.c | 17 ++++++++++++++--- + 4 files changed, 62 insertions(+), 8 deletions(-) + +--- a/drivers/gpu/drm/vc4/vc4_drv.h ++++ b/drivers/gpu/drm/vc4/vc4_drv.h +@@ -122,9 +122,16 @@ to_vc4_dev(struct drm_device *dev) + struct vc4_bo { + struct drm_gem_cma_object base; + +- /* seqno of the last job to render to this BO. */ ++ /* seqno of the last job to render using this BO. */ + uint64_t seqno; + ++ /* seqno of the last job to use the RCL to write to this BO. ++ * ++ * Note that this doesn't include binner overflow memory ++ * writes. ++ */ ++ uint64_t write_seqno; ++ + /* List entry for the BO's position in either + * vc4_exec_info->unref_list or vc4_dev->bo_cache.time_list + */ +@@ -216,6 +223,9 @@ struct vc4_exec_info { + /* Sequence number for this bin/render job. */ + uint64_t seqno; + ++ /* Latest write_seqno of any BO that binning depends on. */ ++ uint64_t bin_dep_seqno; ++ + /* Last current addresses the hardware was processing when the + * hangcheck timer checked on us. + */ +@@ -230,6 +240,13 @@ struct vc4_exec_info { + struct drm_gem_cma_object **bo; + uint32_t bo_count; + ++ /* List of BOs that are being written by the RCL. Other than ++ * the binner temporary storage, this is all the BOs written ++ * by the job. ++ */ ++ struct drm_gem_cma_object *rcl_write_bo[4]; ++ uint32_t rcl_write_bo_count; ++ + /* Pointers for our position in vc4->job_list */ + struct list_head head; + +--- a/drivers/gpu/drm/vc4/vc4_gem.c ++++ b/drivers/gpu/drm/vc4/vc4_gem.c +@@ -471,6 +471,11 @@ vc4_update_bo_seqnos(struct vc4_exec_inf + list_for_each_entry(bo, &exec->unref_list, unref_head) { + bo->seqno = seqno; + } ++ ++ for (i = 0; i < exec->rcl_write_bo_count; i++) { ++ bo = to_vc4_bo(&exec->rcl_write_bo[i]->base); ++ bo->write_seqno = seqno; ++ } + } + + /* Queues a struct vc4_exec_info for execution. If no job is +@@ -673,6 +678,14 @@ vc4_get_bcl(struct drm_device *dev, stru + goto fail; + + ret = vc4_validate_shader_recs(dev, exec); ++ if (ret) ++ goto fail; ++ ++ /* Block waiting on any previous rendering into the CS's VBO, ++ * IB, or textures, so that pixels are actually written by the ++ * time we try to read them. ++ */ ++ ret = vc4_wait_for_seqno(dev, exec->bin_dep_seqno, ~0ull, true); + + fail: + drm_free_large(temp); +--- a/drivers/gpu/drm/vc4/vc4_render_cl.c ++++ b/drivers/gpu/drm/vc4/vc4_render_cl.c +@@ -45,6 +45,8 @@ struct vc4_rcl_setup { + + struct drm_gem_cma_object *rcl; + u32 next_offset; ++ ++ u32 next_write_bo_index; + }; + + static inline void rcl_u8(struct vc4_rcl_setup *setup, u8 val) +@@ -407,6 +409,8 @@ static int vc4_rcl_msaa_surface_setup(st + if (!*obj) + return -EINVAL; + ++ exec->rcl_write_bo[exec->rcl_write_bo_count++] = *obj; ++ + if (surf->offset & 0xf) { + DRM_ERROR("MSAA write must be 16b aligned.\n"); + return -EINVAL; +@@ -417,7 +421,8 @@ static int vc4_rcl_msaa_surface_setup(st + + static int vc4_rcl_surface_setup(struct vc4_exec_info *exec, + struct drm_gem_cma_object **obj, +- struct drm_vc4_submit_rcl_surface *surf) ++ struct drm_vc4_submit_rcl_surface *surf, ++ bool is_write) + { + uint8_t tiling = VC4_GET_FIELD(surf->bits, + VC4_LOADSTORE_TILE_BUFFER_TILING); +@@ -440,6 +445,9 @@ static int vc4_rcl_surface_setup(struct + if (!*obj) + return -EINVAL; + ++ if (is_write) ++ exec->rcl_write_bo[exec->rcl_write_bo_count++] = *obj; ++ + if (surf->flags & VC4_SUBMIT_RCL_SURFACE_READ_IS_FULL_RES) { + if (surf == &exec->args->zs_write) { + DRM_ERROR("general zs write may not be a full-res.\n"); +@@ -542,6 +550,8 @@ vc4_rcl_render_config_surface_setup(stru + if (!*obj) + return -EINVAL; + ++ exec->rcl_write_bo[exec->rcl_write_bo_count++] = *obj; ++ + if (tiling > VC4_TILING_FORMAT_LT) { + DRM_ERROR("Bad tiling format\n"); + return -EINVAL; +@@ -599,15 +609,18 @@ int vc4_get_rcl(struct drm_device *dev, + if (ret) + return ret; + +- ret = vc4_rcl_surface_setup(exec, &setup.color_read, &args->color_read); ++ ret = vc4_rcl_surface_setup(exec, &setup.color_read, &args->color_read, ++ false); + if (ret) + return ret; + +- ret = vc4_rcl_surface_setup(exec, &setup.zs_read, &args->zs_read); ++ ret = vc4_rcl_surface_setup(exec, &setup.zs_read, &args->zs_read, ++ false); + if (ret) + return ret; + +- ret = vc4_rcl_surface_setup(exec, &setup.zs_write, &args->zs_write); ++ ret = vc4_rcl_surface_setup(exec, &setup.zs_write, &args->zs_write, ++ true); + if (ret) + return ret; + +--- a/drivers/gpu/drm/vc4/vc4_validate.c ++++ b/drivers/gpu/drm/vc4/vc4_validate.c +@@ -267,6 +267,9 @@ validate_indexed_prim_list(VALIDATE_ARGS + if (!ib) + return -EINVAL; + ++ exec->bin_dep_seqno = max(exec->bin_dep_seqno, ++ to_vc4_bo(&ib->base)->write_seqno); ++ + if (offset > ib->base.size || + (ib->base.size - offset) / index_size < length) { + DRM_ERROR("IB access overflow (%d + %d*%d > %zd)\n", +@@ -555,8 +558,7 @@ static bool + reloc_tex(struct vc4_exec_info *exec, + void *uniform_data_u, + struct vc4_texture_sample_info *sample, +- uint32_t texture_handle_index) +- ++ uint32_t texture_handle_index, bool is_cs) + { + struct drm_gem_cma_object *tex; + uint32_t p0 = *(uint32_t *)(uniform_data_u + sample->p_offset[0]); +@@ -714,6 +716,11 @@ reloc_tex(struct vc4_exec_info *exec, + + *validated_p0 = tex->paddr + p0; + ++ if (is_cs) { ++ exec->bin_dep_seqno = max(exec->bin_dep_seqno, ++ to_vc4_bo(&tex->base)->write_seqno); ++ } ++ + return true; + fail: + DRM_INFO("Texture p0 at %d: 0x%08x\n", sample->p_offset[0], p0); +@@ -835,7 +842,8 @@ validate_gl_shader_rec(struct drm_device + if (!reloc_tex(exec, + uniform_data_u, + &validated_shader->texture_samples[tex], +- texture_handles_u[tex])) { ++ texture_handles_u[tex], ++ i == 2)) { + return -EINVAL; + } + } +@@ -867,6 +875,9 @@ validate_gl_shader_rec(struct drm_device + uint32_t stride = *(uint8_t *)(pkt_u + o + 5); + uint32_t max_index; + ++ exec->bin_dep_seqno = max(exec->bin_dep_seqno, ++ to_vc4_bo(&vbo->base)->write_seqno); ++ + if (state->addr & 0x8) + stride |= (*(uint32_t *)(pkt_u + 100 + i * 4)) & ~0xff; + diff --git a/kernel/kernel/files/patches/mageia/stable-drm-vmwgfx-limit-the-user-space-command-buffer-size.patch b/kernel/kernel/files/patches/mageia/stable-drm-vmwgfx-limit-the-user-space-command-buffer-size.patch new file mode 100644 index 00000000..c3ae1473 --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-drm-vmwgfx-limit-the-user-space-command-buffer-size.patch @@ -0,0 +1,42 @@ +From 51ab70bed997f64f091a639dbe22b629725a7faf Mon Sep 17 00:00:00 2001 +From: Thomas Hellstrom +Date: Mon, 10 Oct 2016 10:51:24 -0700 +Subject: drm/vmwgfx: Limit the user-space command buffer size + +From: Thomas Hellstrom + +commit 51ab70bed997f64f091a639dbe22b629725a7faf upstream. + +With older hardware versions, the user could specify arbitrarily large +command buffer sizes, causing a vmalloc / vmap space exhaustion. + +Signed-off-by: Thomas Hellstrom +Reviewed-by: Brian Paul +Reviewed-by: Sinclair Yeh +Signed-off-by: Sinclair Yeh +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +--- a/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c ++++ b/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c +@@ -3848,14 +3848,14 @@ static void *vmw_execbuf_cmdbuf(struct v + int ret; + + *header = NULL; +- if (!dev_priv->cman || kernel_commands) +- return kernel_commands; +- + if (command_size > SVGA_CB_MAX_SIZE) { + DRM_ERROR("Command buffer is too large.\n"); + return ERR_PTR(-EINVAL); + } + ++ if (!dev_priv->cman || kernel_commands) ++ return kernel_commands; ++ + /* If possible, add a little space for fencing. */ + cmdbuf_size = command_size + 512; + cmdbuf_size = min_t(size_t, cmdbuf_size, SVGA_CB_MAX_SIZE); diff --git a/kernel/kernel/files/patches/mageia/stable-genirq-generic_chip-add-irq_unmap-callback.patch b/kernel/kernel/files/patches/mageia/stable-genirq-generic_chip-add-irq_unmap-callback.patch new file mode 100644 index 00000000..9505a731 --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-genirq-generic_chip-add-irq_unmap-callback.patch @@ -0,0 +1,68 @@ +From ee26c013cdee0b947e29d6cadfb9ff3341c69ff9 Mon Sep 17 00:00:00 2001 +From: Sebastian Frias +Date: Mon, 1 Aug 2016 16:27:38 +0200 +Subject: genirq/generic_chip: Add irq_unmap callback + +From: Sebastian Frias + +commit ee26c013cdee0b947e29d6cadfb9ff3341c69ff9 upstream. + +Without this patch irq_domain_disassociate() cannot properly release the +interrupt. In fact, irq_map_generic_chip() checks a bit on 'gc->installed' +but said bit is never cleared, only set. + +Commit 088f40b7b027 ("genirq: Generic chip: Add linear irq domain support") +added irq_map_generic_chip() function and also stated "This lacks a removal +function for now". + +This commit provides an implementation of an unmap function that can be +called by irq_domain_disassociate(). + +[ tglx: Made the function static and removed the export as we have neither + a prototype nor a modular user. ] + +Fixes: 088f40b7b027 ("genirq: Generic chip: Add linear irq domain support") +Signed-off-by: Sebastian Frias +Cc: Marc Zyngier +Cc: Mason +Cc: Jason Cooper +Link: http://lkml.kernel.org/r/579F5C5A.2070507@laposte.net +Signed-off-by: Thomas Gleixner +Signed-off-by: Greg Kroah-Hartman + +--- + kernel/irq/generic-chip.c | 21 +++++++++++++++++++++ + 1 file changed, 21 insertions(+) + +--- a/kernel/irq/generic-chip.c ++++ b/kernel/irq/generic-chip.c +@@ -411,8 +411,29 @@ int irq_map_generic_chip(struct irq_doma + } + EXPORT_SYMBOL_GPL(irq_map_generic_chip); + ++static void irq_unmap_generic_chip(struct irq_domain *d, unsigned int virq) ++{ ++ struct irq_data *data = irq_domain_get_irq_data(d, virq); ++ struct irq_domain_chip_generic *dgc = d->gc; ++ unsigned int hw_irq = data->hwirq; ++ struct irq_chip_generic *gc; ++ int irq_idx; ++ ++ gc = irq_get_domain_generic_chip(d, hw_irq); ++ if (!gc) ++ return; ++ ++ irq_idx = hw_irq % dgc->irqs_per_chip; ++ ++ clear_bit(irq_idx, &gc->installed); ++ irq_domain_set_info(d, virq, hw_irq, &no_irq_chip, NULL, NULL, NULL, ++ NULL); ++ ++} ++ + struct irq_domain_ops irq_generic_chip_ops = { + .map = irq_map_generic_chip, ++ .unmap = irq_unmap_generic_chip, + .xlate = irq_domain_xlate_onetwocell, + }; + EXPORT_SYMBOL_GPL(irq_generic_chip_ops); diff --git a/kernel/kernel/files/patches/mageia/stable-hid-add-quirk-for-akai-midimix.patch b/kernel/kernel/files/patches/mageia/stable-hid-add-quirk-for-akai-midimix.patch new file mode 100644 index 00000000..487050c3 --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-hid-add-quirk-for-akai-midimix.patch @@ -0,0 +1,50 @@ +From 4973ca9a01e2354b159acedec1b9b8eb8de02ab7 Mon Sep 17 00:00:00 2001 +From: "Steinar H. Gunderson" +Date: Sun, 9 Oct 2016 14:21:50 +0200 +Subject: HID: add quirk for Akai MIDImix. + +From: Steinar H. Gunderson + +commit 4973ca9a01e2354b159acedec1b9b8eb8de02ab7 upstream. + +The Akai MIDImix (09e8:0031) is a MIDI fader controller that speaks +regular MIDI and works well with Linux. However, initialization gets +delayed due to reports timeout: + + [3643645.631124] hid-generic 0003:09E8:0031.0020: timeout initializing reports + [3643645.632416] hid-generic 0003:09E8:0031.0020: hiddev0: USB HID v1.11 Device [AKAI MIDI Mix] on usb-0000:00:14.0-2/input0 + +Adding "usbhid.quirks=0x09e8:0x0031:0x20000000" on the kernel +command line makes the issues go away. + +Signed-off-by: Steinar H. Gunderson +Signed-off-by: Jiri Kosina +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/hid/hid-ids.h | 3 +++ + drivers/hid/usbhid/hid-quirks.c | 1 + + 2 files changed, 4 insertions(+) + +--- a/drivers/hid/hid-ids.h ++++ b/drivers/hid/hid-ids.h +@@ -64,6 +64,9 @@ + #define USB_VENDOR_ID_AKAI 0x2011 + #define USB_DEVICE_ID_AKAI_MPKMINI2 0x0715 + ++#define USB_VENDOR_ID_AKAI_09E8 0x09E8 ++#define USB_DEVICE_ID_AKAI_09E8_MIDIMIX 0x0031 ++ + #define USB_VENDOR_ID_ALCOR 0x058f + #define USB_DEVICE_ID_ALCOR_USBRS232 0x9720 + +--- a/drivers/hid/usbhid/hid-quirks.c ++++ b/drivers/hid/usbhid/hid-quirks.c +@@ -56,6 +56,7 @@ static const struct hid_blacklist { + + { USB_VENDOR_ID_AIREN, USB_DEVICE_ID_AIREN_SLIMPLUS, HID_QUIRK_NOGET }, + { USB_VENDOR_ID_AKAI, USB_DEVICE_ID_AKAI_MPKMINI2, HID_QUIRK_NO_INIT_REPORTS }, ++ { USB_VENDOR_ID_AKAI_09E8, USB_DEVICE_ID_AKAI_09E8_MIDIMIX, HID_QUIRK_NO_INIT_REPORTS }, + { USB_VENDOR_ID_ATEN, USB_DEVICE_ID_ATEN_UC100KM, HID_QUIRK_NOGET }, + { USB_VENDOR_ID_ATEN, USB_DEVICE_ID_ATEN_CS124U, HID_QUIRK_NOGET }, + { USB_VENDOR_ID_ATEN, USB_DEVICE_ID_ATEN_2PORTKVM, HID_QUIRK_NOGET }, diff --git a/kernel/kernel/files/patches/mageia/stable-hwrng-omap-only-fail-if-pm_runtime_get_sync-returns-0.patch b/kernel/kernel/files/patches/mageia/stable-hwrng-omap-only-fail-if-pm_runtime_get_sync-returns-0.patch new file mode 100644 index 00000000..0b54b3d5 --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-hwrng-omap-only-fail-if-pm_runtime_get_sync-returns-0.patch @@ -0,0 +1,44 @@ +From ad8529fde9e3601180a839867a8ab041109aebb5 Mon Sep 17 00:00:00 2001 +From: Dave Gerlach +Date: Tue, 20 Sep 2016 10:25:40 -0500 +Subject: hwrng: omap - Only fail if pm_runtime_get_sync returns < 0 + +From: Dave Gerlach + +commit ad8529fde9e3601180a839867a8ab041109aebb5 upstream. + +Currently omap-rng checks the return value of pm_runtime_get_sync and +reports failure if anything is returned, however it should be checking +if ret < 0 as pm_runtime_get_sync return 0 on success but also can return +1 if the device was already active which is not a failure case. Only +values < 0 are actual failures. + +Fixes: 61dc0a446e5d ("hwrng: omap - Fix assumption that runtime_get_sync will always succeed") +Signed-off-by: Dave Gerlach +Signed-off-by: Herbert Xu +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/char/hw_random/omap-rng.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/drivers/char/hw_random/omap-rng.c ++++ b/drivers/char/hw_random/omap-rng.c +@@ -385,7 +385,7 @@ static int omap_rng_probe(struct platfor + + pm_runtime_enable(&pdev->dev); + ret = pm_runtime_get_sync(&pdev->dev); +- if (ret) { ++ if (ret < 0) { + dev_err(&pdev->dev, "Failed to runtime_get device: %d\n", ret); + pm_runtime_put_noidle(&pdev->dev); + goto err_ioremap; +@@ -443,7 +443,7 @@ static int __maybe_unused omap_rng_resum + int ret; + + ret = pm_runtime_get_sync(dev); +- if (ret) { ++ if (ret < 0) { + dev_err(dev, "Failed to runtime_get device: %d\n", ret); + pm_runtime_put_noidle(dev); + return ret; diff --git a/kernel/kernel/files/patches/mageia/stable-i40e-fix-broken-i40e_config_rss_aq-function.patch b/kernel/kernel/files/patches/mageia/stable-i40e-fix-broken-i40e_config_rss_aq-function.patch new file mode 100644 index 00000000..d74fe900 --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-i40e-fix-broken-i40e_config_rss_aq-function.patch @@ -0,0 +1,155 @@ +From 776b2e15f8af7900409456292efd45af6de97172 Mon Sep 17 00:00:00 2001 +From: Jacob Keller +Date: Tue, 19 Jul 2016 16:23:30 -0700 +Subject: i40e: fix broken i40e_config_rss_aq function + +From: Jacob Keller + +commit 776b2e15f8af7900409456292efd45af6de97172 upstream. + +X722 hardware requires using the admin queue to configure RSS. This +function was previously re-written in commit e69ff813af35 ("i40e: rework +the functions to configure RSS with similar parameters"). +However, the previous refactor did not work correctly for a few reasons + +(a) it does not check whether seed is NULL before using it, resulting in +a NULL pointer dereference + +[ 402.954721] BUG: unable to handle kernel NULL pointer dereference at (null) +[ 402.955568] IP: [] i40e_config_rss_aq.constprop.65+0x2f/0x1c0 [i40e] +[ 402.956402] PGD ad610067 PUD accc0067 PMD 0 +[ 402.957235] Oops: 0000 [#1] SMP +[ 402.958064] Modules linked in: ip6t_rpfilter ip6t_REJECT nf_reject_ipv6 xt_conntrack ip_set nfnetlink ebtable_filter ebtable_ +broute bridge stp llc ebtable_nat ebtables ip6table_mangle ip6table_raw ip6table_nat nf_conntrack_ipv6 nf_defrag_ipv6 nf_nat_ipv +6 ip6table_security ip6table_filter ip6_tables iptable_mangle iptable_raw iptable_nat nf_conntrack_ipv4_ nf_defrag_ipv4_ nf_nat_ip +v4_ nf_nat nf_conntrack iptable_security intel_rapl i86_kg_temp_thermal coretemp kvm_intel kvm irqbypass crct10dif_clMl crc32_ +pclMl ghash_clMlni_intel iTCO_wdt iTCO_vendor_support shpchp sb_edac dcdbas pcspkr joydev ipmi_devintf wmi edac_core ipmi_ssif + acpi_ad acpi_ower_meter ipmi_si ipmi_msghandler mei_me nfsd lpc_ich mei ioatdma tpm_tis auth_rpcgss tpm nfs_acl lockd grace s +unrpc ifs nngag200 i2c_algo_bit drm_kms_helper ttm drm iigbe bnx2x i40e dca mdio ptp pps_core libcrc32c fjes crc32c_intel +[ 402.965563] CPU: 22 PID: 2461 Conm: ethtool Not tainted 4.6.0-rc7_1.2-ABNidQ+ #20 +[ 402.966719] Hardware name: Dell Inc. PowerEdge R720/0C4Y3R, BIOS 2.5.2 01/28/2015 +[ 402.967862] task: ffff880219b51dc0 ti: ffff8800b3408000 task.ti: ffff8800b3408000 +[ 402.969046] RIP: 0010:[] [] i40e_config_rss_aq.constprop.65+0x2f/0x1c0 [i40e] +[ 402.970339] RSP: 0018:ffff8800b340ba90 EFLAGS: 00010246 +[ 402.971616] RAX: 0000000000000000 RBX: ffff88042ec14000 RCX: 0000000000000200 +[ 402.972961] RDX: ffff880428eb9200 RSI: 0000000000000000 RDI: ffff88042ec14000 +[ 402.974312] RBP: ffff8800b340baf8 R08: ffff880237ada8f0 R09: ffff880428eb9200 +[ 402.975709] R10: ffff880428eb9200 R11: 0000000000000000 R12: ffff88042ec2e000 +[ 402.977104] R13: ffff88042ec2e000 R14: ffff88042ec14000 R15: ffff88022ea00800 +[ 402.978541] FS: 00007f84fd054700(0000) GS:ffff880237ac0000(0000) knlGS:0000000000000000 +[ 402.980003] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 +[ 402.981508] CR2: 0000000000000000 CR3: 000000003289e000 CR4: 00000000000406e0 +[ 402.983028] Stack: +[ 402.984578] 0000000002000200 0000000000000000 ffff88023ffeda68 ffff88023ffef000 +[ 402.986187] 0000000000000268 ffff8800b340bbf8 ffff88023ffedd80 0000000088ce4f1d +[ 402.987844] ffff88042ec14000 ffff88022ea00800 ffff88042ec2e000 ffff88042ec14000 +[ 402.989509] Call Trace: +[ 402.991200] [] i40e_config_rss+0x11f/0x1c0 [i40e] +[ 402.992924] [] i40e_set_rifh+0ic0/0x130 [i40e] +[ 402.994684] [] ethtool_set_rifh+0x1f7/0x300 +[ 402.996446] [] ? cred_has_capability+0io6b/0x100 +[ 402.998203] [] ? selinux_capable+0x12/0x20 +[ 402.999968] [] ? security_capable+0x4b/0x70 +[ 403.001707] [] dev_ethtool+0x1423/0x2290 +[ 403.003461] [] dev_ioctl+0x191/0io630 +[ 403.005186] [] ? lru_cache_add+0x3a/0i80 +[ 403.006942] [] ? _raw_spin_unlock+0ie/0x20 +[ 403.008691] [] sock_do_ioctl+0x45/0i50 +[ 403.010421] [] sock_ioctl+0x209/0x2d0 +[ 403.012173] [] do_vfs_ioctl+0u4/0io6c0 +[ 403.013911] [] SyS_ioctl+0x79/0x90 +[ 403.015710] [] entry_SYSCALL_64_fastpath+0x1a/0u4 +[ 403.017500] Code: 90 55 48 89 e5 41 57 41 56 41 55 41 54 53 48 89 fb 48 83 ec 40 4c 8b a7 e0 05 00 00 65 48 8b 04 25 28 00 00 00 48 89 45 d0 31 c0 <48> 8b 06 41 0f b7 bc 24 f2 0f 00 00 48 89 45 9c 48 8b 46 08 48 +[ 403.021454] RIP [] i40e_config_rss_aq.constprop.65+0x2f/0x1c0 [i40e] +[ 403.023395] RSP +[ 403.025271] CR2: 0000000000000000 +[ 403.027169] ---[ end trace 64561b528cf61cf0 ]--- + +(b) it does not even bother to use the passed in *lut parameter which +defines the requested lookup table. Instead it uses its own round robin +table. + +Fix these issues by re-writing it to be similar to i40e_config_rss_reg +and i40e_get_rss_aq. + +Fixes: e69ff813af35 ("i40e: rework the functions to configure RSS with similar parameters", 2015-10-21) +Signed-off-by: Jacob Keller +Tested-by: Andrew Bowers +Signed-off-by: Jeff Kirsher +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/net/ethernet/intel/i40e/i40e_main.c | 57 +++++++++++----------------- + 1 file changed, 23 insertions(+), 34 deletions(-) + +--- a/drivers/net/ethernet/intel/i40e/i40e_main.c ++++ b/drivers/net/ethernet/intel/i40e/i40e_main.c +@@ -7990,45 +7990,34 @@ static int i40e_setup_misc_vector(struct + static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed, + u8 *lut, u16 lut_size) + { +- struct i40e_aqc_get_set_rss_key_data rss_key; + struct i40e_pf *pf = vsi->back; + struct i40e_hw *hw = &pf->hw; +- bool pf_lut = false; +- u8 *rss_lut; +- int ret, i; ++ int ret = 0; + +- memcpy(&rss_key, seed, sizeof(rss_key)); +- +- rss_lut = kzalloc(pf->rss_table_size, GFP_KERNEL); +- if (!rss_lut) +- return -ENOMEM; +- +- /* Populate the LUT with max no. of queues in round robin fashion */ +- for (i = 0; i < vsi->rss_table_size; i++) +- rss_lut[i] = i % vsi->rss_size; +- +- ret = i40e_aq_set_rss_key(hw, vsi->id, &rss_key); +- if (ret) { +- dev_info(&pf->pdev->dev, +- "Cannot set RSS key, err %s aq_err %s\n", +- i40e_stat_str(&pf->hw, ret), +- i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); +- goto config_rss_aq_out; ++ if (seed) { ++ struct i40e_aqc_get_set_rss_key_data *seed_dw = ++ (struct i40e_aqc_get_set_rss_key_data *)seed; ++ ret = i40e_aq_set_rss_key(hw, vsi->id, seed_dw); ++ if (ret) { ++ dev_info(&pf->pdev->dev, ++ "Cannot set RSS key, err %s aq_err %s\n", ++ i40e_stat_str(hw, ret), ++ i40e_aq_str(hw, hw->aq.asq_last_status)); ++ return ret; ++ } + } ++ if (lut) { ++ bool pf_lut = vsi->type == I40E_VSI_MAIN ? true : false; + +- if (vsi->type == I40E_VSI_MAIN) +- pf_lut = true; +- +- ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, rss_lut, +- vsi->rss_table_size); +- if (ret) +- dev_info(&pf->pdev->dev, +- "Cannot set RSS lut, err %s aq_err %s\n", +- i40e_stat_str(&pf->hw, ret), +- i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); +- +-config_rss_aq_out: +- kfree(rss_lut); ++ ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, lut, lut_size); ++ if (ret) { ++ dev_info(&pf->pdev->dev, ++ "Cannot set RSS lut, err %s aq_err %s\n", ++ i40e_stat_str(hw, ret), ++ i40e_aq_str(hw, hw->aq.asq_last_status)); ++ return ret; ++ } ++ } + return ret; + } + diff --git a/kernel/kernel/files/patches/mageia/stable-i40e-remove-a-stray-unlock.patch b/kernel/kernel/files/patches/mageia/stable-i40e-remove-a-stray-unlock.patch new file mode 100644 index 00000000..045b5d78 --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-i40e-remove-a-stray-unlock.patch @@ -0,0 +1,32 @@ +From be0cb0a66a1d426f7cd9b170c008725044ae147a Mon Sep 17 00:00:00 2001 +From: Dan Carpenter +Date: Wed, 3 Aug 2016 22:01:07 +0300 +Subject: i40e: remove a stray unlock + +From: Dan Carpenter + +commit be0cb0a66a1d426f7cd9b170c008725044ae147a upstream. + +We shifted the locking around a bit but forgot to delete this unlock so +now it can unlock twice. + +Fixes: cd3be169a5ff ('i40e: Move the mutex lock in i40e_client_unregister') +Signed-off-by: Dan Carpenter +Tested-by: Andrew Bowers +Signed-off-by: Jeff Kirsher +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/net/ethernet/intel/i40e/i40e_client.c | 1 - + 1 file changed, 1 deletion(-) + +--- a/drivers/net/ethernet/intel/i40e/i40e_client.c ++++ b/drivers/net/ethernet/intel/i40e/i40e_client.c +@@ -1009,7 +1009,6 @@ int i40e_unregister_client(struct i40e_c + if (!i40e_client_is_registered(client)) { + pr_info("i40e: Client %s has not been registered\n", + client->name); +- mutex_unlock(&i40e_client_mutex); + ret = -ENODEV; + goto out; + } diff --git a/kernel/kernel/files/patches/mageia/stable-ib-hfi1-move-iowait_init-to-priv-allocate.patch b/kernel/kernel/files/patches/mageia/stable-ib-hfi1-move-iowait_init-to-priv-allocate.patch new file mode 100644 index 00000000..f2d43851 --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-ib-hfi1-move-iowait_init-to-priv-allocate.patch @@ -0,0 +1,55 @@ +From 5a648dfad033bf5f945795c4e56ee7577f24f3e9 Mon Sep 17 00:00:00 2001 +From: Mike Marciniszyn +Date: Tue, 6 Sep 2016 04:36:53 -0700 +Subject: IB/hfi1: Move iowait_init() to priv allocate + +From: Mike Marciniszyn + +commit 5a648dfad033bf5f945795c4e56ee7577f24f3e9 upstream. + +The call is misplaced in the reset calldown function +and causes issues with lockdep assertions that are to +be added. + +Fixes: Commit a2c2d608957c ("staging/rdma/hfi1: Remove create_qp functionality") +Reviewed-by: Ira Weiny +Reviewed-by: Dennis Dalessandro +Signed-off-by: Mike Marciniszyn +Signed-off-by: Dennis Dalessandro +Signed-off-by: Doug Ledford +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/infiniband/hw/hfi1/qp.c | 14 +++++++------- + 1 file changed, 7 insertions(+), 7 deletions(-) + +--- a/drivers/infiniband/hw/hfi1/qp.c ++++ b/drivers/infiniband/hw/hfi1/qp.c +@@ -808,6 +808,13 @@ void *qp_priv_alloc(struct rvt_dev_info + kfree(priv); + return ERR_PTR(-ENOMEM); + } ++ iowait_init( ++ &priv->s_iowait, ++ 1, ++ _hfi1_do_send, ++ iowait_sleep, ++ iowait_wakeup, ++ iowait_sdma_drained); + setup_timer(&priv->s_rnr_timer, hfi1_rc_rnr_retry, (unsigned long)qp); + qp->s_timer.function = hfi1_rc_timeout; + return priv; +@@ -873,13 +880,6 @@ void notify_qp_reset(struct rvt_qp *qp) + { + struct hfi1_qp_priv *priv = qp->priv; + +- iowait_init( +- &priv->s_iowait, +- 1, +- _hfi1_do_send, +- iowait_sleep, +- iowait_wakeup, +- iowait_sdma_drained); + priv->r_adefered = 0; + clear_ahg(qp); + } diff --git a/kernel/kernel/files/patches/mageia/stable-ib-mlx5-fix-steering-resource-leak.patch b/kernel/kernel/files/patches/mageia/stable-ib-mlx5-fix-steering-resource-leak.patch new file mode 100644 index 00000000..5ef7c7a4 --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-ib-mlx5-fix-steering-resource-leak.patch @@ -0,0 +1,31 @@ +From 7055a29471eebf4b62687944694222635ed44b09 Mon Sep 17 00:00:00 2001 +From: Maor Gottlieb +Date: Sun, 28 Aug 2016 14:16:30 +0300 +Subject: IB/mlx5: Fix steering resource leak + +From: Maor Gottlieb + +commit 7055a29471eebf4b62687944694222635ed44b09 upstream. + +Fix multicast flow rule leak on adding unicast rule failure. + +Fixes: 038d2ef87572 ('IB/mlx5: Add flow steering support') +Signed-off-by: Maor Gottlieb +Signed-off-by: Leon Romanovsky +Signed-off-by: Doug Ledford +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/infiniband/hw/mlx5/main.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/infiniband/hw/mlx5/main.c ++++ b/drivers/infiniband/hw/mlx5/main.c +@@ -1843,6 +1843,7 @@ static struct mlx5_ib_flow_handler *crea + &leftovers_specs[LEFTOVERS_UC].flow_attr, + dst); + if (IS_ERR(handler_ucast)) { ++ mlx5_del_flow_rule(handler->rule); + kfree(handler); + handler = handler_ucast; + } else { diff --git a/kernel/kernel/files/patches/mageia/stable-ib-qib-remove-qpt_mask-global.patch b/kernel/kernel/files/patches/mageia/stable-ib-qib-remove-qpt_mask-global.patch new file mode 100644 index 00000000..9ecc8063 --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-ib-qib-remove-qpt_mask-global.patch @@ -0,0 +1,89 @@ +From 84b3adc2430eafd2eb703570075c3c141ea0ff13 Mon Sep 17 00:00:00 2001 +From: Dennis Dalessandro +Date: Sun, 25 Sep 2016 07:41:05 -0700 +Subject: IB/qib: Remove qpt_mask global + +From: Dennis Dalessandro + +commit 84b3adc2430eafd2eb703570075c3c141ea0ff13 upstream. + +There is no need to have a global qpt_mask as that does not support the +multiple chip model which qib has. Instead rely on the value which +exists already in the device data (dd). + +Fixes: 898fa52b4ac3 "IB/qib: Remove qpn, qp tables and related variables from qib" +Reviewed-by: Mike Marciniszyn +Signed-off-by: Dennis Dalessandro +Signed-off-by: Doug Ledford +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/infiniband/hw/qib/qib.h | 1 - + drivers/infiniband/hw/qib/qib_qp.c | 13 +++---------- + drivers/infiniband/hw/qib/qib_verbs.c | 2 -- + 3 files changed, 3 insertions(+), 13 deletions(-) + +--- a/drivers/infiniband/hw/qib/qib.h ++++ b/drivers/infiniband/hw/qib/qib.h +@@ -1131,7 +1131,6 @@ extern spinlock_t qib_devs_lock; + extern struct qib_devdata *qib_lookup(int unit); + extern u32 qib_cpulist_count; + extern unsigned long *qib_cpulist; +-extern u16 qpt_mask; + extern unsigned qib_cc_table_size; + + int qib_init(struct qib_devdata *, int); +--- a/drivers/infiniband/hw/qib/qib_qp.c ++++ b/drivers/infiniband/hw/qib/qib_qp.c +@@ -41,14 +41,6 @@ + + #include "qib.h" + +-/* +- * mask field which was present in now deleted qib_qpn_table +- * is not present in rvt_qpn_table. Defining the same field +- * as qpt_mask here instead of adding the mask field to +- * rvt_qpn_table. +- */ +-u16 qpt_mask; +- + static inline unsigned mk_qpn(struct rvt_qpn_table *qpt, + struct rvt_qpn_map *map, unsigned off) + { +@@ -57,7 +49,7 @@ static inline unsigned mk_qpn(struct rvt + + static inline unsigned find_next_offset(struct rvt_qpn_table *qpt, + struct rvt_qpn_map *map, unsigned off, +- unsigned n) ++ unsigned n, u16 qpt_mask) + { + if (qpt_mask) { + off++; +@@ -179,6 +171,7 @@ int qib_alloc_qpn(struct rvt_dev_info *r + struct qib_ibdev *verbs_dev = container_of(rdi, struct qib_ibdev, rdi); + struct qib_devdata *dd = container_of(verbs_dev, struct qib_devdata, + verbs_dev); ++ u16 qpt_mask = dd->qpn_mask; + + if (type == IB_QPT_SMI || type == IB_QPT_GSI) { + unsigned n; +@@ -215,7 +208,7 @@ int qib_alloc_qpn(struct rvt_dev_info *r + goto bail; + } + offset = find_next_offset(qpt, map, offset, +- dd->n_krcv_queues); ++ dd->n_krcv_queues, qpt_mask); + qpn = mk_qpn(qpt, map, offset); + /* + * This test differs from alloc_pidmap(). +--- a/drivers/infiniband/hw/qib/qib_verbs.c ++++ b/drivers/infiniband/hw/qib/qib_verbs.c +@@ -1606,8 +1606,6 @@ int qib_register_ib_device(struct qib_de + /* Only need to initialize non-zero fields. */ + setup_timer(&dev->mem_timer, mem_timer, (unsigned long)dev); + +- qpt_mask = dd->qpn_mask; +- + INIT_LIST_HEAD(&dev->piowait); + INIT_LIST_HEAD(&dev->dmawait); + INIT_LIST_HEAD(&dev->txwait); diff --git a/kernel/kernel/files/patches/mageia/stable-ib-rdmavt-correct-sparse-annotation.patch b/kernel/kernel/files/patches/mageia/stable-ib-rdmavt-correct-sparse-annotation.patch new file mode 100644 index 00000000..cb694653 --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-ib-rdmavt-correct-sparse-annotation.patch @@ -0,0 +1,44 @@ +From eefa1d8961584c5b76afded94960ca4344bc638b Mon Sep 17 00:00:00 2001 +From: Mike Marciniszyn +Date: Tue, 6 Sep 2016 04:36:33 -0700 +Subject: IB/rdmavt: Correct sparse annotation + +From: Mike Marciniszyn + +commit eefa1d8961584c5b76afded94960ca4344bc638b upstream. + +The __must_hold() is sufficent to correct the sparse +context imbalance inside a function. + +Per Documentation/sparse.txt: +__must_hold - The specified lock is held on function entry and exit. + +Fixes: Commit c0a67f6ba356 ("IB/rdmavt: Annotate rvt_reset_qp()") +Reviewed-by: Dennis Dalessandro +Signed-off-by: Mike Marciniszyn +Signed-off-by: Dennis Dalessandro +Signed-off-by: Doug Ledford +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/infiniband/sw/rdmavt/qp.c | 9 +++------ + 1 file changed, 3 insertions(+), 6 deletions(-) + +--- a/drivers/infiniband/sw/rdmavt/qp.c ++++ b/drivers/infiniband/sw/rdmavt/qp.c +@@ -501,12 +501,9 @@ static void rvt_remove_qp(struct rvt_dev + */ + static void rvt_reset_qp(struct rvt_dev_info *rdi, struct rvt_qp *qp, + enum ib_qp_type type) +- __releases(&qp->s_lock) +- __releases(&qp->s_hlock) +- __releases(&qp->r_lock) +- __acquires(&qp->r_lock) +- __acquires(&qp->s_hlock) +- __acquires(&qp->s_lock) ++ __must_hold(&qp->r_lock) ++ __must_hold(&qp->s_hlock) ++ __must_hold(&qp->s_lock) + { + if (qp->state != IB_QPS_RESET) { + qp->state = IB_QPS_RESET; diff --git a/kernel/kernel/files/patches/mageia/stable-iio-ad5755-fix-off-by-one-on-devnr-limit-check.patch b/kernel/kernel/files/patches/mageia/stable-iio-ad5755-fix-off-by-one-on-devnr-limit-check.patch new file mode 100644 index 00000000..039a4f3a --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-iio-ad5755-fix-off-by-one-on-devnr-limit-check.patch @@ -0,0 +1,35 @@ +From 9d47964bfd471f0dd4c89f28556aec68bffa0020 Mon Sep 17 00:00:00 2001 +From: Colin Ian King +Date: Mon, 25 Jul 2016 23:40:01 +0100 +Subject: iio: ad5755: fix off-by-one on devnr limit check + +From: Colin Ian King + +commit 9d47964bfd471f0dd4c89f28556aec68bffa0020 upstream. + +The comparison for devnr limits is off-by-one, the current check +allows 0 to AD5755_NUM_CHANNELS and the limit should be in fact +0 to AD5755_NUM_CHANNELS - 1. This can lead to an out of bounds +write to pdata->dac[devnr]. Fix this by replacing > with >= on the +comparison. + +Signed-off-by: Colin Ian King +Fixes: c947459979c6 ("iio: ad5755: add support for dt bindings") +Signed-off-by: Jonathan Cameron +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/iio/dac/ad5755.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/iio/dac/ad5755.c ++++ b/drivers/iio/dac/ad5755.c +@@ -655,7 +655,7 @@ static struct ad5755_platform_data *ad57 + + devnr = 0; + for_each_child_of_node(np, pp) { +- if (devnr > AD5755_NUM_CHANNELS) { ++ if (devnr >= AD5755_NUM_CHANNELS) { + dev_err(dev, + "There is to many channels defined in DT\n"); + goto error_out; diff --git a/kernel/kernel/files/patches/mageia/stable-iio-light-us5182d-add-missing-error-code-assignment-before-test.patch b/kernel/kernel/files/patches/mageia/stable-iio-light-us5182d-add-missing-error-code-assignment-before-test.patch new file mode 100644 index 00000000..1187350f --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-iio-light-us5182d-add-missing-error-code-assignment-before-test.patch @@ -0,0 +1,33 @@ +From 281269f8a0b00f5c95de5158e8595ed51bdb4b0a Mon Sep 17 00:00:00 2001 +From: Christophe JAILLET +Date: Wed, 10 Aug 2016 07:18:16 +0200 +Subject: iio: light: us5182d: Add missing error code assignment before test + +From: Christophe JAILLET + +commit 281269f8a0b00f5c95de5158e8595ed51bdb4b0a upstream. + +It is likely that checking the result of 'pm_runtime_set_active' is +expected here. + +Fixes: f0e5f57d3ac2 ("iio: light: us8152d: Add power management support") + +Signed-off-by: Christophe JAILLET +Signed-off-by: Jonathan Cameron +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/iio/light/us5182d.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/iio/light/us5182d.c ++++ b/drivers/iio/light/us5182d.c +@@ -894,7 +894,7 @@ static int us5182d_probe(struct i2c_clie + goto out_err; + + if (data->default_continuous) { +- pm_runtime_set_active(&client->dev); ++ ret = pm_runtime_set_active(&client->dev); + if (ret < 0) + goto out_err; + } diff --git a/kernel/kernel/files/patches/mageia/stable-mm-hugetlb-check-for-reserved-hugepages-during-memory-offline.patch b/kernel/kernel/files/patches/mageia/stable-mm-hugetlb-check-for-reserved-hugepages-during-memory-offline.patch new file mode 100644 index 00000000..b2dff957 --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-mm-hugetlb-check-for-reserved-hugepages-during-memory-offline.patch @@ -0,0 +1,140 @@ +From 082d5b6b60e9f25e1511557fcfcb21eedd267446 Mon Sep 17 00:00:00 2001 +From: Gerald Schaefer +Date: Fri, 7 Oct 2016 17:01:10 -0700 +Subject: mm/hugetlb: check for reserved hugepages during memory offline + +From: Gerald Schaefer + +commit 082d5b6b60e9f25e1511557fcfcb21eedd267446 upstream. + +In dissolve_free_huge_pages(), free hugepages will be dissolved without +making sure that there are enough of them left to satisfy hugepage +reservations. + +Fix this by adding a return value to dissolve_free_huge_pages() and +checking h->free_huge_pages vs. h->resv_huge_pages. Note that this may +lead to the situation where dissolve_free_huge_page() returns an error +and all free hugepages that were dissolved before that error are lost, +while the memory block still cannot be set offline. + +Fixes: c8721bbb ("mm: memory-hotplug: enable memory hotplug to handle hugepage") +Link: http://lkml.kernel.org/r/20160926172811.94033-3-gerald.schaefer@de.ibm.com +Signed-off-by: Gerald Schaefer +Acked-by: Michal Hocko +Acked-by: Naoya Horiguchi +Cc: "Kirill A . Shutemov" +Cc: Vlastimil Babka +Cc: Mike Kravetz +Cc: "Aneesh Kumar K . V" +Cc: Martin Schwidefsky +Cc: Heiko Carstens +Cc: Rui Teng +Cc: Dave Hansen +Signed-off-by: Andrew Morton +Signed-off-by: Linus Torvalds +Signed-off-by: Greg Kroah-Hartman + +--- + include/linux/hugetlb.h | 6 +++--- + mm/hugetlb.c | 26 +++++++++++++++++++++----- + mm/memory_hotplug.c | 4 +++- + 3 files changed, 27 insertions(+), 9 deletions(-) + +--- a/include/linux/hugetlb.h ++++ b/include/linux/hugetlb.h +@@ -450,8 +450,8 @@ static inline pgoff_t basepage_index(str + return __basepage_index(page); + } + +-extern void dissolve_free_huge_pages(unsigned long start_pfn, +- unsigned long end_pfn); ++extern int dissolve_free_huge_pages(unsigned long start_pfn, ++ unsigned long end_pfn); + static inline bool hugepage_migration_supported(struct hstate *h) + { + #ifdef CONFIG_ARCH_ENABLE_HUGEPAGE_MIGRATION +@@ -518,7 +518,7 @@ static inline pgoff_t basepage_index(str + { + return page->index; + } +-#define dissolve_free_huge_pages(s, e) do {} while (0) ++#define dissolve_free_huge_pages(s, e) 0 + #define hugepage_migration_supported(h) false + + static inline spinlock_t *huge_pte_lockptr(struct hstate *h, +--- a/mm/hugetlb.c ++++ b/mm/hugetlb.c +@@ -1437,22 +1437,32 @@ static int free_pool_huge_page(struct hs + + /* + * Dissolve a given free hugepage into free buddy pages. This function does +- * nothing for in-use (including surplus) hugepages. ++ * nothing for in-use (including surplus) hugepages. Returns -EBUSY if the ++ * number of free hugepages would be reduced below the number of reserved ++ * hugepages. + */ +-static void dissolve_free_huge_page(struct page *page) ++static int dissolve_free_huge_page(struct page *page) + { ++ int rc = 0; ++ + spin_lock(&hugetlb_lock); + if (PageHuge(page) && !page_count(page)) { + struct page *head = compound_head(page); + struct hstate *h = page_hstate(head); + int nid = page_to_nid(head); ++ if (h->free_huge_pages - h->resv_huge_pages == 0) { ++ rc = -EBUSY; ++ goto out; ++ } + list_del(&head->lru); + h->free_huge_pages--; + h->free_huge_pages_node[nid]--; + h->max_huge_pages--; + update_and_free_page(h, head); + } ++out: + spin_unlock(&hugetlb_lock); ++ return rc; + } + + /* +@@ -1460,16 +1470,22 @@ static void dissolve_free_huge_page(stru + * make specified memory blocks removable from the system. + * Note that this will dissolve a free gigantic hugepage completely, if any + * part of it lies within the given range. ++ * Also note that if dissolve_free_huge_page() returns with an error, all ++ * free hugepages that were dissolved before that error are lost. + */ +-void dissolve_free_huge_pages(unsigned long start_pfn, unsigned long end_pfn) ++int dissolve_free_huge_pages(unsigned long start_pfn, unsigned long end_pfn) + { + unsigned long pfn; ++ int rc = 0; + + if (!hugepages_supported()) +- return; ++ return rc; + + for (pfn = start_pfn; pfn < end_pfn; pfn += 1 << minimum_order) +- dissolve_free_huge_page(pfn_to_page(pfn)); ++ if (rc = dissolve_free_huge_page(pfn_to_page(pfn))) ++ break; ++ ++ return rc; + } + + /* +--- a/mm/memory_hotplug.c ++++ b/mm/memory_hotplug.c +@@ -1945,7 +1945,9 @@ repeat: + * dissolve free hugepages in the memory block before doing offlining + * actually in order to make hugetlbfs's object counting consistent. + */ +- dissolve_free_huge_pages(start_pfn, end_pfn); ++ ret = dissolve_free_huge_pages(start_pfn, end_pfn); ++ if (ret) ++ goto failed_removal; + /* check again */ + offlined_pages = check_pages_isolated(start_pfn, end_pfn); + if (offlined_pages < 0) { diff --git a/kernel/kernel/files/patches/mageia/stable-mwifiex-correct-aid-value-during-tdls-setup.patch b/kernel/kernel/files/patches/mageia/stable-mwifiex-correct-aid-value-during-tdls-setup.patch new file mode 100644 index 00000000..cf253222 --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-mwifiex-correct-aid-value-during-tdls-setup.patch @@ -0,0 +1,36 @@ +From b64db1b252e9974a43a51ba083fa7d03e4716167 Mon Sep 17 00:00:00 2001 +From: Xinming Hu +Date: Tue, 9 Aug 2016 20:20:44 +0530 +Subject: mwifiex: correct aid value during tdls setup + +From: Xinming Hu + +commit b64db1b252e9974a43a51ba083fa7d03e4716167 upstream. + +AID gets updated during TDLS setup, but modified value isn't reflected +in "priv->assoc_rsp_buf". This causes TDLS setup failure. The problem is +fixed here. + +Fixes: 4aff53ef18e4a4 ("mwifiex: parsing aid while receiving..") +Signed-off-by: Xinming Hu +Signed-off-by: Amitkumar Karwar +Signed-off-by: Kalle Valo +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/net/wireless/marvell/mwifiex/join.c | 3 +-- + 1 file changed, 1 insertion(+), 2 deletions(-) + +--- a/drivers/net/wireless/marvell/mwifiex/join.c ++++ b/drivers/net/wireless/marvell/mwifiex/join.c +@@ -669,9 +669,8 @@ int mwifiex_ret_802_11_associate(struct + priv->assoc_rsp_size = min(le16_to_cpu(resp->size) - S_DS_GEN, + sizeof(priv->assoc_rsp_buf)); + +- memcpy(priv->assoc_rsp_buf, &resp->params, priv->assoc_rsp_size); +- + assoc_rsp->a_id = cpu_to_le16(aid); ++ memcpy(priv->assoc_rsp_buf, &resp->params, priv->assoc_rsp_size); + + if (status_code) { + priv->adapter->dbg.num_cmd_assoc_failure++; diff --git a/kernel/kernel/files/patches/mageia/stable-mwifiex-fix-failed-to-reconnect-after-interface-disabled-enabled.patch b/kernel/kernel/files/patches/mageia/stable-mwifiex-fix-failed-to-reconnect-after-interface-disabled-enabled.patch new file mode 100644 index 00000000..4eafe773 --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-mwifiex-fix-failed-to-reconnect-after-interface-disabled-enabled.patch @@ -0,0 +1,39 @@ +From c8ccf3ade7851054f82bf88f5fcd393a394038a3 Mon Sep 17 00:00:00 2001 +From: Amitkumar Karwar +Date: Mon, 25 Jul 2016 21:21:06 +0530 +Subject: mwifiex: fix failed to reconnect after interface disabled/enabled + +From: Amitkumar Karwar + +commit c8ccf3ade7851054f82bf88f5fcd393a394038a3 upstream. + +Recent patch "mwifiex: fix NULL pointer" skips extended scan event +handling when suspend is in progress. It created a problem for scan +after interface disabled/enabled case. + +This patch solves the problem by checking netif_running() status. + +Fixes:16d25da94f3d654 ("mwifiex: fix NULL pointer dereference during suspend") +Signed-off-by: Amitkumar Karwar +Signed-off-by: Kalle Valo +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/net/wireless/marvell/mwifiex/sta_event.c | 6 +++++- + 1 file changed, 5 insertions(+), 1 deletion(-) + +--- a/drivers/net/wireless/marvell/mwifiex/sta_event.c ++++ b/drivers/net/wireless/marvell/mwifiex/sta_event.c +@@ -708,7 +708,11 @@ int mwifiex_process_sta_event(struct mwi + + case EVENT_EXT_SCAN_REPORT: + mwifiex_dbg(adapter, EVENT, "event: EXT_SCAN Report\n"); +- if (adapter->ext_scan && !priv->scan_aborting) ++ /* We intend to skip this event during suspend, but handle ++ * it in interface disabled case ++ */ ++ if (adapter->ext_scan && (!priv->scan_aborting || ++ !netif_running(priv->netdev))) + ret = mwifiex_handle_event_ext_scan_report(priv, + adapter->event_skb->data); + diff --git a/kernel/kernel/files/patches/mageia/stable-posix_acl-clear-sgid-bit-when-setting-file-permissions.patch b/kernel/kernel/files/patches/mageia/stable-posix_acl-clear-sgid-bit-when-setting-file-permissions.patch new file mode 100644 index 00000000..f5d12375 --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-posix_acl-clear-sgid-bit-when-setting-file-permissions.patch @@ -0,0 +1,408 @@ +From 073931017b49d9458aa351605b43a7e34598caef Mon Sep 17 00:00:00 2001 +From: Jan Kara +Date: Mon, 19 Sep 2016 17:39:09 +0200 +Subject: posix_acl: Clear SGID bit when setting file permissions + +From: Jan Kara + +commit 073931017b49d9458aa351605b43a7e34598caef upstream. + +When file permissions are modified via chmod(2) and the user is not in +the owning group or capable of CAP_FSETID, the setgid bit is cleared in +inode_change_ok(). Setting a POSIX ACL via setxattr(2) sets the file +permissions as well as the new ACL, but doesn't clear the setgid bit in +a similar way; this allows to bypass the check in chmod(2). Fix that. + +References: CVE-2016-7097 +Reviewed-by: Christoph Hellwig +Reviewed-by: Jeff Layton +Signed-off-by: Jan Kara +Signed-off-by: Andreas Gruenbacher +Signed-off-by: Juerg Haefliger +Signed-off-by: Greg Kroah-Hartman + +--- + fs/9p/acl.c | 40 +++++++++++++++++----------------------- + fs/btrfs/acl.c | 6 ++---- + fs/ceph/acl.c | 6 ++---- + fs/ext2/acl.c | 12 ++++-------- + fs/ext4/acl.c | 12 ++++-------- + fs/f2fs/acl.c | 6 ++---- + fs/gfs2/acl.c | 12 +++--------- + fs/hfsplus/posix_acl.c | 4 ++-- + fs/jffs2/acl.c | 9 ++++----- + fs/jfs/acl.c | 6 ++---- + fs/ocfs2/acl.c | 10 ++++------ + fs/orangefs/acl.c | 15 +++++---------- + fs/posix_acl.c | 31 +++++++++++++++++++++++++++++++ + fs/reiserfs/xattr_acl.c | 8 ++------ + fs/xfs/xfs_acl.c | 13 ++++--------- + include/linux/posix_acl.h | 1 + + 16 files changed, 89 insertions(+), 102 deletions(-) + +--- a/fs/9p/acl.c ++++ b/fs/9p/acl.c +@@ -276,32 +276,26 @@ static int v9fs_xattr_set_acl(const stru + switch (handler->flags) { + case ACL_TYPE_ACCESS: + if (acl) { +- umode_t mode = inode->i_mode; +- retval = posix_acl_equiv_mode(acl, &mode); +- if (retval < 0) ++ struct iattr iattr; ++ ++ retval = posix_acl_update_mode(inode, &iattr.ia_mode, &acl); ++ if (retval) + goto err_out; +- else { +- struct iattr iattr; +- if (retval == 0) { +- /* +- * ACL can be represented +- * by the mode bits. So don't +- * update ACL. +- */ +- acl = NULL; +- value = NULL; +- size = 0; +- } +- /* Updte the mode bits */ +- iattr.ia_mode = ((mode & S_IALLUGO) | +- (inode->i_mode & ~S_IALLUGO)); +- iattr.ia_valid = ATTR_MODE; +- /* FIXME should we update ctime ? +- * What is the following setxattr update the +- * mode ? ++ if (!acl) { ++ /* ++ * ACL can be represented ++ * by the mode bits. So don't ++ * update ACL. + */ +- v9fs_vfs_setattr_dotl(dentry, &iattr); ++ value = NULL; ++ size = 0; + } ++ iattr.ia_valid = ATTR_MODE; ++ /* FIXME should we update ctime ? ++ * What is the following setxattr update the ++ * mode ? ++ */ ++ v9fs_vfs_setattr_dotl(dentry, &iattr); + } + break; + case ACL_TYPE_DEFAULT: +--- a/fs/btrfs/acl.c ++++ b/fs/btrfs/acl.c +@@ -79,11 +79,9 @@ static int __btrfs_set_acl(struct btrfs_ + case ACL_TYPE_ACCESS: + name = XATTR_NAME_POSIX_ACL_ACCESS; + if (acl) { +- ret = posix_acl_equiv_mode(acl, &inode->i_mode); +- if (ret < 0) ++ ret = posix_acl_update_mode(inode, &inode->i_mode, &acl); ++ if (ret) + return ret; +- if (ret == 0) +- acl = NULL; + } + ret = 0; + break; +--- a/fs/ceph/acl.c ++++ b/fs/ceph/acl.c +@@ -95,11 +95,9 @@ int ceph_set_acl(struct inode *inode, st + case ACL_TYPE_ACCESS: + name = XATTR_NAME_POSIX_ACL_ACCESS; + if (acl) { +- ret = posix_acl_equiv_mode(acl, &new_mode); +- if (ret < 0) ++ ret = posix_acl_update_mode(inode, &new_mode, &acl); ++ if (ret) + goto out; +- if (ret == 0) +- acl = NULL; + } + break; + case ACL_TYPE_DEFAULT: +--- a/fs/ext2/acl.c ++++ b/fs/ext2/acl.c +@@ -190,15 +190,11 @@ ext2_set_acl(struct inode *inode, struct + case ACL_TYPE_ACCESS: + name_index = EXT2_XATTR_INDEX_POSIX_ACL_ACCESS; + if (acl) { +- error = posix_acl_equiv_mode(acl, &inode->i_mode); +- if (error < 0) ++ error = posix_acl_update_mode(inode, &inode->i_mode, &acl); ++ if (error) + return error; +- else { +- inode->i_ctime = CURRENT_TIME_SEC; +- mark_inode_dirty(inode); +- if (error == 0) +- acl = NULL; +- } ++ inode->i_ctime = CURRENT_TIME_SEC; ++ mark_inode_dirty(inode); + } + break; + +--- a/fs/ext4/acl.c ++++ b/fs/ext4/acl.c +@@ -193,15 +193,11 @@ __ext4_set_acl(handle_t *handle, struct + case ACL_TYPE_ACCESS: + name_index = EXT4_XATTR_INDEX_POSIX_ACL_ACCESS; + if (acl) { +- error = posix_acl_equiv_mode(acl, &inode->i_mode); +- if (error < 0) ++ error = posix_acl_update_mode(inode, &inode->i_mode, &acl); ++ if (error) + return error; +- else { +- inode->i_ctime = ext4_current_time(inode); +- ext4_mark_inode_dirty(handle, inode); +- if (error == 0) +- acl = NULL; +- } ++ inode->i_ctime = ext4_current_time(inode); ++ ext4_mark_inode_dirty(handle, inode); + } + break; + +--- a/fs/f2fs/acl.c ++++ b/fs/f2fs/acl.c +@@ -210,12 +210,10 @@ static int __f2fs_set_acl(struct inode * + case ACL_TYPE_ACCESS: + name_index = F2FS_XATTR_INDEX_POSIX_ACL_ACCESS; + if (acl) { +- error = posix_acl_equiv_mode(acl, &inode->i_mode); +- if (error < 0) ++ error = posix_acl_update_mode(inode, &inode->i_mode, &acl); ++ if (error) + return error; + set_acl_inode(inode, inode->i_mode); +- if (error == 0) +- acl = NULL; + } + break; + +--- a/fs/gfs2/acl.c ++++ b/fs/gfs2/acl.c +@@ -92,17 +92,11 @@ int __gfs2_set_acl(struct inode *inode, + if (type == ACL_TYPE_ACCESS) { + umode_t mode = inode->i_mode; + +- error = posix_acl_equiv_mode(acl, &mode); +- if (error < 0) ++ error = posix_acl_update_mode(inode, &inode->i_mode, &acl); ++ if (error) + return error; +- +- if (error == 0) +- acl = NULL; +- +- if (mode != inode->i_mode) { +- inode->i_mode = mode; ++ if (mode != inode->i_mode) + mark_inode_dirty(inode); +- } + } + + if (acl) { +--- a/fs/hfsplus/posix_acl.c ++++ b/fs/hfsplus/posix_acl.c +@@ -65,8 +65,8 @@ int hfsplus_set_posix_acl(struct inode * + case ACL_TYPE_ACCESS: + xattr_name = XATTR_NAME_POSIX_ACL_ACCESS; + if (acl) { +- err = posix_acl_equiv_mode(acl, &inode->i_mode); +- if (err < 0) ++ err = posix_acl_update_mode(inode, &inode->i_mode, &acl); ++ if (err) + return err; + } + err = 0; +--- a/fs/jffs2/acl.c ++++ b/fs/jffs2/acl.c +@@ -233,9 +233,10 @@ int jffs2_set_acl(struct inode *inode, s + case ACL_TYPE_ACCESS: + xprefix = JFFS2_XPREFIX_ACL_ACCESS; + if (acl) { +- umode_t mode = inode->i_mode; +- rc = posix_acl_equiv_mode(acl, &mode); +- if (rc < 0) ++ umode_t mode; ++ ++ rc = posix_acl_update_mode(inode, &mode, &acl); ++ if (rc) + return rc; + if (inode->i_mode != mode) { + struct iattr attr; +@@ -247,8 +248,6 @@ int jffs2_set_acl(struct inode *inode, s + if (rc < 0) + return rc; + } +- if (rc == 0) +- acl = NULL; + } + break; + case ACL_TYPE_DEFAULT: +--- a/fs/jfs/acl.c ++++ b/fs/jfs/acl.c +@@ -78,13 +78,11 @@ static int __jfs_set_acl(tid_t tid, stru + case ACL_TYPE_ACCESS: + ea_name = XATTR_NAME_POSIX_ACL_ACCESS; + if (acl) { +- rc = posix_acl_equiv_mode(acl, &inode->i_mode); +- if (rc < 0) ++ rc = posix_acl_update_mode(inode, &inode->i_mode, &acl); ++ if (rc) + return rc; + inode->i_ctime = CURRENT_TIME; + mark_inode_dirty(inode); +- if (rc == 0) +- acl = NULL; + } + break; + case ACL_TYPE_DEFAULT: +--- a/fs/ocfs2/acl.c ++++ b/fs/ocfs2/acl.c +@@ -241,13 +241,11 @@ int ocfs2_set_acl(handle_t *handle, + case ACL_TYPE_ACCESS: + name_index = OCFS2_XATTR_INDEX_POSIX_ACL_ACCESS; + if (acl) { +- umode_t mode = inode->i_mode; +- ret = posix_acl_equiv_mode(acl, &mode); +- if (ret < 0) +- return ret; ++ umode_t mode; + +- if (ret == 0) +- acl = NULL; ++ ret = posix_acl_update_mode(inode, &mode, &acl); ++ if (ret) ++ return ret; + + ret = ocfs2_acl_set_mode(inode, di_bh, + handle, mode); +--- a/fs/orangefs/acl.c ++++ b/fs/orangefs/acl.c +@@ -73,14 +73,11 @@ int orangefs_set_acl(struct inode *inode + case ACL_TYPE_ACCESS: + name = XATTR_NAME_POSIX_ACL_ACCESS; + if (acl) { +- umode_t mode = inode->i_mode; +- /* +- * can we represent this with the traditional file +- * mode permission bits? +- */ +- error = posix_acl_equiv_mode(acl, &mode); +- if (error < 0) { +- gossip_err("%s: posix_acl_equiv_mode err: %d\n", ++ umode_t mode; ++ ++ error = posix_acl_update_mode(inode, &mode, &acl); ++ if (error) { ++ gossip_err("%s: posix_acl_update_mode err: %d\n", + __func__, + error); + return error; +@@ -90,8 +87,6 @@ int orangefs_set_acl(struct inode *inode + SetModeFlag(orangefs_inode); + inode->i_mode = mode; + mark_inode_dirty_sync(inode); +- if (error == 0) +- acl = NULL; + } + break; + case ACL_TYPE_DEFAULT: +--- a/fs/posix_acl.c ++++ b/fs/posix_acl.c +@@ -626,6 +626,37 @@ no_mem: + } + EXPORT_SYMBOL_GPL(posix_acl_create); + ++/** ++ * posix_acl_update_mode - update mode in set_acl ++ * ++ * Update the file mode when setting an ACL: compute the new file permission ++ * bits based on the ACL. In addition, if the ACL is equivalent to the new ++ * file mode, set *acl to NULL to indicate that no ACL should be set. ++ * ++ * As with chmod, clear the setgit bit if the caller is not in the owning group ++ * or capable of CAP_FSETID (see inode_change_ok). ++ * ++ * Called from set_acl inode operations. ++ */ ++int posix_acl_update_mode(struct inode *inode, umode_t *mode_p, ++ struct posix_acl **acl) ++{ ++ umode_t mode = inode->i_mode; ++ int error; ++ ++ error = posix_acl_equiv_mode(*acl, &mode); ++ if (error < 0) ++ return error; ++ if (error == 0) ++ *acl = NULL; ++ if (!in_group_p(inode->i_gid) && ++ !capable_wrt_inode_uidgid(inode, CAP_FSETID)) ++ mode &= ~S_ISGID; ++ *mode_p = mode; ++ return 0; ++} ++EXPORT_SYMBOL(posix_acl_update_mode); ++ + /* + * Fix up the uids and gids in posix acl extended attributes in place. + */ +--- a/fs/reiserfs/xattr_acl.c ++++ b/fs/reiserfs/xattr_acl.c +@@ -242,13 +242,9 @@ __reiserfs_set_acl(struct reiserfs_trans + case ACL_TYPE_ACCESS: + name = XATTR_NAME_POSIX_ACL_ACCESS; + if (acl) { +- error = posix_acl_equiv_mode(acl, &inode->i_mode); +- if (error < 0) ++ error = posix_acl_update_mode(inode, &inode->i_mode, &acl); ++ if (error) + return error; +- else { +- if (error == 0) +- acl = NULL; +- } + } + break; + case ACL_TYPE_DEFAULT: +--- a/fs/xfs/xfs_acl.c ++++ b/fs/xfs/xfs_acl.c +@@ -257,16 +257,11 @@ xfs_set_acl(struct inode *inode, struct + return error; + + if (type == ACL_TYPE_ACCESS) { +- umode_t mode = inode->i_mode; +- error = posix_acl_equiv_mode(acl, &mode); +- +- if (error <= 0) { +- acl = NULL; +- +- if (error < 0) +- return error; +- } ++ umode_t mode; + ++ error = posix_acl_update_mode(inode, &mode, &acl); ++ if (error) ++ return error; + error = xfs_set_mode(inode, mode); + if (error) + return error; +--- a/include/linux/posix_acl.h ++++ b/include/linux/posix_acl.h +@@ -93,6 +93,7 @@ extern int set_posix_acl(struct inode *, + extern int posix_acl_chmod(struct inode *, umode_t); + extern int posix_acl_create(struct inode *, umode_t *, struct posix_acl **, + struct posix_acl **); ++extern int posix_acl_update_mode(struct inode *, umode_t *, struct posix_acl **); + + extern int simple_set_acl(struct inode *, struct posix_acl *, int); + extern int simple_acl_create(struct inode *, struct inode *); diff --git a/kernel/kernel/files/patches/mageia/stable-power-bq24257-fix-use-of-uninitialized-pointer-bq-charger.patch b/kernel/kernel/files/patches/mageia/stable-power-bq24257-fix-use-of-uninitialized-pointer-bq-charger.patch new file mode 100644 index 00000000..c02dec4e --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-power-bq24257-fix-use-of-uninitialized-pointer-bq-charger.patch @@ -0,0 +1,55 @@ +From 0610735928ee47870e083d5901caa371089216f1 Mon Sep 17 00:00:00 2001 +From: Georges Savoundararadj +Date: Wed, 7 Sep 2016 18:38:15 -0700 +Subject: power: bq24257: Fix use of uninitialized pointer bq->charger + +From: Georges Savoundararadj + +commit 0610735928ee47870e083d5901caa371089216f1 upstream. + +bq->charger is initialized in bq24257_power_supply_init. +Therefore, bq24257_power_supply_init should be called before the +registration of the IRQ handler bq24257_irq_handler_thread that calls +power_supply_changed(bq->charger). + +Signed-off-by: Georges Savoundararadj +Cc: Aurelien Chanot +Cc: Andreas Dannenberg +Cc: Sebastian Reichel +Cc: David Woodhouse +Fixes: 2219a935963e ("power_supply: Add TI BQ24257 charger driver") +Signed-off-by: Sebastian Reichel +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/power/bq24257_charger.c | 12 ++++++------ + 1 file changed, 6 insertions(+), 6 deletions(-) + +--- a/drivers/power/bq24257_charger.c ++++ b/drivers/power/bq24257_charger.c +@@ -1068,6 +1068,12 @@ static int bq24257_probe(struct i2c_clie + return ret; + } + ++ ret = bq24257_power_supply_init(bq); ++ if (ret < 0) { ++ dev_err(dev, "Failed to register power supply\n"); ++ return ret; ++ } ++ + ret = devm_request_threaded_irq(dev, client->irq, NULL, + bq24257_irq_handler_thread, + IRQF_TRIGGER_FALLING | +@@ -1078,12 +1084,6 @@ static int bq24257_probe(struct i2c_clie + return ret; + } + +- ret = bq24257_power_supply_init(bq); +- if (ret < 0) { +- dev_err(dev, "Failed to register power supply\n"); +- return ret; +- } +- + ret = sysfs_create_group(&bq->charger->dev.kobj, &bq24257_attr_group); + if (ret < 0) { + dev_err(dev, "Can't create sysfs entries\n"); diff --git a/kernel/kernel/files/patches/mageia/stable-revert-drm-i915-check-live-status-before-reading-edid.patch b/kernel/kernel/files/patches/mageia/stable-revert-drm-i915-check-live-status-before-reading-edid.patch new file mode 100644 index 00000000..238b9566 --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-revert-drm-i915-check-live-status-before-reading-edid.patch @@ -0,0 +1,142 @@ +From 23f889bdf6ee5cfff012d8b09f6bec920c691696 Mon Sep 17 00:00:00 2001 +From: David Weinehall +Date: Wed, 17 Aug 2016 15:47:48 +0300 +Subject: Revert "drm/i915: Check live status before reading edid" + +From: David Weinehall + +commit 23f889bdf6ee5cfff012d8b09f6bec920c691696 upstream. + +This reverts commit 237ed86c693d8a8e4db476976aeb30df4deac74b. + +Our current implementation of live status check (repeat 9 times +with 10ms delays between each attempt as a workaround for +buggy displays) imposes a rather serious penalty, time wise, +on intel_hdmi_detect(). Since we we already skip live status +checks on platforms before gen 7, and since we seem to have +coped quite well before the live status check was introduced +for newer platforms too, the previous behaviour is probably +preferable, at least unless someone can point to a use-case +that the live status check improves (apart from "Bspec says so".) + +Signed-off-by: David Weinehall +Fixes: 237ed86c693d ("drm/i915: Check live status before reading edid") +Fixes: f8d03ea0053b ("drm/i915: increase the tries for HDMI hotplug live status checking") +Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97139 +Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94014 +Acked-by: Chris Wilson +Signed-off-by: Jani Nikula +Link: http://patchwork.freedesktop.org/patch/msgid/20160817124748.31208-1-david.weinehall@linux.intel.com +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/i915/intel_dp.c | 2 - + drivers/gpu/drm/i915/intel_drv.h | 2 - + drivers/gpu/drm/i915/intel_hdmi.c | 43 ++++++++------------------------------ + 3 files changed, 11 insertions(+), 36 deletions(-) + +--- a/drivers/gpu/drm/i915/intel_dp.c ++++ b/drivers/gpu/drm/i915/intel_dp.c +@@ -4148,7 +4148,7 @@ static bool bxt_digital_port_connected(s + * + * Return %true if @port is connected, %false otherwise. + */ +-bool intel_digital_port_connected(struct drm_i915_private *dev_priv, ++static bool intel_digital_port_connected(struct drm_i915_private *dev_priv, + struct intel_digital_port *port) + { + if (HAS_PCH_IBX(dev_priv)) +--- a/drivers/gpu/drm/i915/intel_drv.h ++++ b/drivers/gpu/drm/i915/intel_drv.h +@@ -1388,8 +1388,6 @@ void intel_edp_drrs_disable(struct intel + void intel_edp_drrs_invalidate(struct drm_device *dev, + unsigned frontbuffer_bits); + void intel_edp_drrs_flush(struct drm_device *dev, unsigned frontbuffer_bits); +-bool intel_digital_port_connected(struct drm_i915_private *dev_priv, +- struct intel_digital_port *port); + + void + intel_dp_program_link_training_pattern(struct intel_dp *intel_dp, +--- a/drivers/gpu/drm/i915/intel_hdmi.c ++++ b/drivers/gpu/drm/i915/intel_hdmi.c +@@ -1422,24 +1422,22 @@ intel_hdmi_dp_dual_mode_detect(struct dr + } + + static bool +-intel_hdmi_set_edid(struct drm_connector *connector, bool force) ++intel_hdmi_set_edid(struct drm_connector *connector) + { + struct drm_i915_private *dev_priv = to_i915(connector->dev); + struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector); +- struct edid *edid = NULL; ++ struct edid *edid; + bool connected = false; + +- if (force) { +- intel_display_power_get(dev_priv, POWER_DOMAIN_GMBUS); ++ intel_display_power_get(dev_priv, POWER_DOMAIN_GMBUS); + +- edid = drm_get_edid(connector, +- intel_gmbus_get_adapter(dev_priv, +- intel_hdmi->ddc_bus)); ++ edid = drm_get_edid(connector, ++ intel_gmbus_get_adapter(dev_priv, ++ intel_hdmi->ddc_bus)); + +- intel_hdmi_dp_dual_mode_detect(connector, edid != NULL); ++ intel_hdmi_dp_dual_mode_detect(connector, edid != NULL); + +- intel_display_power_put(dev_priv, POWER_DOMAIN_GMBUS); +- } ++ intel_display_power_put(dev_priv, POWER_DOMAIN_GMBUS); + + to_intel_connector(connector)->detect_edid = edid; + if (edid && edid->input & DRM_EDID_INPUT_DIGITAL) { +@@ -1465,37 +1463,16 @@ static enum drm_connector_status + intel_hdmi_detect(struct drm_connector *connector, bool force) + { + enum drm_connector_status status; +- struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector); + struct drm_i915_private *dev_priv = to_i915(connector->dev); +- bool live_status = false; +- unsigned int try; + + DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", + connector->base.id, connector->name); + + intel_display_power_get(dev_priv, POWER_DOMAIN_GMBUS); + +- for (try = 0; !live_status && try < 9; try++) { +- if (try) +- msleep(10); +- live_status = intel_digital_port_connected(dev_priv, +- hdmi_to_dig_port(intel_hdmi)); +- } +- +- if (!live_status) { +- DRM_DEBUG_KMS("HDMI live status down\n"); +- /* +- * Live status register is not reliable on all intel platforms. +- * So consider live_status only for certain platforms, for +- * others, read EDID to determine presence of sink. +- */ +- if (INTEL_INFO(dev_priv)->gen < 7 || IS_IVYBRIDGE(dev_priv)) +- live_status = true; +- } +- + intel_hdmi_unset_edid(connector); + +- if (intel_hdmi_set_edid(connector, live_status)) { ++ if (intel_hdmi_set_edid(connector)) { + struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector); + + hdmi_to_dig_port(intel_hdmi)->base.type = INTEL_OUTPUT_HDMI; +@@ -1521,7 +1498,7 @@ intel_hdmi_force(struct drm_connector *c + if (connector->status != connector_status_connected) + return; + +- intel_hdmi_set_edid(connector, true); ++ intel_hdmi_set_edid(connector); + hdmi_to_dig_port(intel_hdmi)->base.type = INTEL_OUTPUT_HDMI; + } + diff --git a/kernel/kernel/files/patches/mageia/stable-rt2x00usb-fix-error-return-code.patch b/kernel/kernel/files/patches/mageia/stable-rt2x00usb-fix-error-return-code.patch new file mode 100644 index 00000000..620b2a7a --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-rt2x00usb-fix-error-return-code.patch @@ -0,0 +1,37 @@ +From 410280bac6224e066f4cf0b87db08f0418a135b6 Mon Sep 17 00:00:00 2001 +From: Christophe Jaillet +Date: Thu, 11 Aug 2016 16:38:54 +0200 +Subject: rt2x00usb: Fix error return code + +From: Christophe Jaillet + +commit 410280bac6224e066f4cf0b87db08f0418a135b6 upstream. + +We know that 'retval = 0' because it has been tested a few lines above. +So, if 'devm_kmalloc' fails, 0 will be returned instead of an error code. +Return -ENOMEM instead. + +Fixes: 8b4c0009313f ("rt2x00usb: Use usb anchor to manage URB") +Signed-off-by: Christophe JAILLET +Acked-by: Stanislaw Gruszka +Signed-off-by: Kalle Valo +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/net/wireless/ralink/rt2x00/rt2x00usb.c | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +--- a/drivers/net/wireless/ralink/rt2x00/rt2x00usb.c ++++ b/drivers/net/wireless/ralink/rt2x00/rt2x00usb.c +@@ -831,8 +831,10 @@ int rt2x00usb_probe(struct usb_interface + rt2x00dev->anchor = devm_kmalloc(&usb_dev->dev, + sizeof(struct usb_anchor), + GFP_KERNEL); +- if (!rt2x00dev->anchor) ++ if (!rt2x00dev->anchor) { ++ retval = -ENOMEM; + goto exit_free_reg; ++ } + + init_usb_anchor(rt2x00dev->anchor); + return 0; diff --git a/kernel/kernel/files/patches/mageia/stable-scsi-cxlflash-remove-the-device-cleanly-in-the-system-shutdown-path.patch b/kernel/kernel/files/patches/mageia/stable-scsi-cxlflash-remove-the-device-cleanly-in-the-system-shutdown-path.patch new file mode 100644 index 00000000..a29bf7cc --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-scsi-cxlflash-remove-the-device-cleanly-in-the-system-shutdown-path.patch @@ -0,0 +1,80 @@ +From babf985d1e1b0677cb264acd01319d2b9c8f4327 Mon Sep 17 00:00:00 2001 +From: Uma Krishnan +Date: Fri, 2 Sep 2016 15:39:16 -0500 +Subject: scsi: cxlflash: Remove the device cleanly in the system shutdown path + +From: Uma Krishnan + +commit babf985d1e1b0677cb264acd01319d2b9c8f4327 upstream. + +Commit 704c4b0ddc03 ("cxlflash: Shutdown notify support for CXL Flash +cards") was recently introduced to notify the AFU when a system is going +down. Due to the position of the cxlflash driver in the device stack, +cxlflash devices are _always_ removed during a reboot/shutdown. This can +lead to a crash if the cxlflash shutdown hook is invoked _after_ the +shutdown hook for the owning virtual PHB. Furthermore, the current +implementation of shutdown/remove hooks for cxlflash are not tolerant to +being invoked when the device is not enabled. This can also lead to a +crash in situations where the remove hook is invoked after the device +has been removed via the vPHBs shutdown hook. An example of this +scenario would be an EEH reset failure while a reboot/shutdown is in +progress. + +To solve both problems, the shutdown hook for cxlflash is updated to +simply remove the device. This path already includes the AFU +notification and thus this solution will continue to perform the +original intent. At the same time, the remove hook is updated to protect +against being called when the device is not enabled. + +Fixes: 704c4b0ddc03 ("cxlflash: Shutdown notify support for CXL Flash +cards") +Signed-off-by: Uma Krishnan +Acked-by: Matthew R. Ochs +Signed-off-by: Martin K. Petersen +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/scsi/cxlflash/main.c | 18 ++++++------------ + 1 file changed, 6 insertions(+), 12 deletions(-) + +--- a/drivers/scsi/cxlflash/main.c ++++ b/drivers/scsi/cxlflash/main.c +@@ -823,17 +823,6 @@ static void notify_shutdown(struct cxlfl + } + + /** +- * cxlflash_shutdown() - shutdown handler +- * @pdev: PCI device associated with the host. +- */ +-static void cxlflash_shutdown(struct pci_dev *pdev) +-{ +- struct cxlflash_cfg *cfg = pci_get_drvdata(pdev); +- +- notify_shutdown(cfg, false); +-} +- +-/** + * cxlflash_remove() - PCI entry point to tear down host + * @pdev: PCI device associated with the host. + * +@@ -844,6 +833,11 @@ static void cxlflash_remove(struct pci_d + struct cxlflash_cfg *cfg = pci_get_drvdata(pdev); + ulong lock_flags; + ++ if (!pci_is_enabled(pdev)) { ++ pr_debug("%s: Device is disabled\n", __func__); ++ return; ++ } ++ + /* If a Task Management Function is active, wait for it to complete + * before continuing with remove. + */ +@@ -2685,7 +2679,7 @@ static struct pci_driver cxlflash_driver + .id_table = cxlflash_pci_table, + .probe = cxlflash_probe, + .remove = cxlflash_remove, +- .shutdown = cxlflash_shutdown, ++ .shutdown = cxlflash_remove, + .err_handler = &cxlflash_err_handler, + }; + diff --git a/kernel/kernel/files/patches/mageia/stable-spi-spi-fsl-dspi-drop-extra-spi_master_put-in-device-remove-function.patch b/kernel/kernel/files/patches/mageia/stable-spi-spi-fsl-dspi-drop-extra-spi_master_put-in-device-remove-function.patch new file mode 100644 index 00000000..342c96ec --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-spi-spi-fsl-dspi-drop-extra-spi_master_put-in-device-remove-function.patch @@ -0,0 +1,33 @@ +From 6999aeabbb703a81a204cb6f9f8f151759a99ac4 Mon Sep 17 00:00:00 2001 +From: Wei Yongjun +Date: Sat, 20 Aug 2016 15:25:32 +0000 +Subject: spi: spi-fsl-dspi: Drop extra spi_master_put in device remove function + +From: Wei Yongjun + +commit 6999aeabbb703a81a204cb6f9f8f151759a99ac4 upstream. + +The call sequence spi_alloc_master/spi_register_master/spi_unregister_master +is complete; it reduces the device reference count to zero, which and results +in device memory being freed. The subsequent call to spi_master_put is +unnecessary and results in an access to free memory. Drop it. + +Fixes: 9298bc727385 ("spi: spi-fsl-dspi: Remove spi-bitbang") +Signed-off-by: Wei Yongjun +Signed-off-by: Mark Brown +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/spi/spi-fsl-dspi.c | 1 - + 1 file changed, 1 deletion(-) + +--- a/drivers/spi/spi-fsl-dspi.c ++++ b/drivers/spi/spi-fsl-dspi.c +@@ -760,7 +760,6 @@ static int dspi_remove(struct platform_d + /* Disconnect from the SPI framework */ + clk_disable_unprepare(dspi->clk); + spi_unregister_master(dspi->master); +- spi_master_put(dspi->master); + + return 0; + } diff --git a/kernel/kernel/files/patches/mageia/stable-staging-android-ion-hisi-fix-dependencies.patch b/kernel/kernel/files/patches/mageia/stable-staging-android-ion-hisi-fix-dependencies.patch new file mode 100644 index 00000000..2e5bc67f --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-staging-android-ion-hisi-fix-dependencies.patch @@ -0,0 +1,40 @@ +From 4a236d01b5e0d7e6f4ee9e6c4056fce10b38e8ad Mon Sep 17 00:00:00 2001 +From: Arnd Bergmann +Date: Thu, 15 Sep 2016 17:57:40 +0200 +Subject: staging: android ion/hisi: fix dependencies + +From: Arnd Bergmann + +commit 4a236d01b5e0d7e6f4ee9e6c4056fce10b38e8ad upstream. + +The newly added Hi6220 Ion code fails to build when the ION_OF helpers +are not present: + +drivers/staging/android/ion/hisilicon/hi6220_ion.o: In function `hi6220_ion_remove': +hi6220_ion.c:(.text.hi6220_ion_remove+0x4c): undefined reference to `ion_destroy_platform_data' +drivers/staging/android/ion/hisilicon/hi6220_ion.o: In function `hi6220_ion_probe': +hi6220_ion.c:(.text.hi6220_ion_probe+0x5c): undefined reference to `ion_parse_dt' +hi6220_ion.c:(.text.hi6220_ion_probe+0xf8): undefined reference to `ion_destroy_platform_data' + +This selects the symbol when needed. + +Fixes: 2b40182a19bc ("staging: android: ion: Add ion driver for Hi6220 SoC platform") +Signed-off-by: Arnd Bergmann +Acked-by: Laura Abbott +Reviewed-by: Sumit Semwal +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/staging/android/ion/Kconfig | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/staging/android/ion/Kconfig ++++ b/drivers/staging/android/ion/Kconfig +@@ -36,6 +36,7 @@ config ION_TEGRA + config ION_HISI + tristate "Ion for Hisilicon" + depends on ARCH_HISI && ION ++ select ION_OF + help + Choose this option if you wish to use ion on Hisilicon Platform. + diff --git a/kernel/kernel/files/patches/mageia/stable-staging-ks7010-declare-private-functions-static.patch b/kernel/kernel/files/patches/mageia/stable-staging-ks7010-declare-private-functions-static.patch new file mode 100644 index 00000000..d7b8117a --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-staging-ks7010-declare-private-functions-static.patch @@ -0,0 +1,41 @@ +From 9afe11e956766eaac4643adaaf49f223dd536c92 Mon Sep 17 00:00:00 2001 +From: Nicholas Mc Guire +Date: Mon, 25 Jul 2016 21:22:27 +0200 +Subject: staging: ks7010: declare private functions static + +From: Nicholas Mc Guire + +commit 9afe11e956766eaac4643adaaf49f223dd536c92 upstream. + +Private functions in ks_hostif.c can be declared static. + +Fixes: 13a9930d15b4 ("staging: ks7010: add driver from Nanonote extra-repository") + +Signed-off-by: Nicholas Mc Guire +Reviewed-by: Wolfram Sang +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/staging/ks7010/ks_hostif.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/drivers/staging/ks7010/ks_hostif.c ++++ b/drivers/staging/ks7010/ks_hostif.c +@@ -69,7 +69,7 @@ inline u32 get_DWORD(struct ks_wlan_priv + return data; + } + +-void ks_wlan_hw_wakeup_task(struct work_struct *work) ++static void ks_wlan_hw_wakeup_task(struct work_struct *work) + { + struct ks_wlan_private *priv = + container_of(work, struct ks_wlan_private, ks_wlan_wakeup_task); +@@ -1509,7 +1509,7 @@ void hostif_infrastructure_set_request(s + ks_wlan_hw_tx(priv, pp, hif_align_size(sizeof(*pp)), NULL, NULL, NULL); + } + +-void hostif_infrastructure_set2_request(struct ks_wlan_private *priv) ++static void hostif_infrastructure_set2_request(struct ks_wlan_private *priv) + { + struct hostif_infrastructure_set2_request_t *pp; + uint16_t capability; diff --git a/kernel/kernel/files/patches/mageia/stable-staging-ks7010-fix-wait_for_completion_interruptible_timeout-return-handling.patch b/kernel/kernel/files/patches/mageia/stable-staging-ks7010-fix-wait_for_completion_interruptible_timeout-return-handling.patch new file mode 100644 index 00000000..9cdf0a7d --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-staging-ks7010-fix-wait_for_completion_interruptible_timeout-return-handling.patch @@ -0,0 +1,44 @@ +From 9d29f14db1095f52ca00b8162b242d6fce07d19f Mon Sep 17 00:00:00 2001 +From: Nicholas Mc Guire +Date: Mon, 25 Jul 2016 21:21:50 +0200 +Subject: staging: ks7010: fix wait_for_completion_interruptible_timeout return handling + +From: Nicholas Mc Guire + +commit 9d29f14db1095f52ca00b8162b242d6fce07d19f upstream. + +wait_for_completion_interruptible_timeout return 0 on timeout and +-ERESTARTSYS if interrupted. The check for +!wait_for_completion_interruptible_timeout() would report an interrupt +as timeout. Further, while HZ/50 will work most of the time it could +fail for HZ < 50, so this is switched to msecs_to_jiffies(20). + +Fixes: 13a9930d15b4 ("staging: ks7010: add driver from Nanonote extra-repository") + +Signed-off-by: Nicholas Mc Guire +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/staging/ks7010/ks_hostif.c | 8 ++++++-- + 1 file changed, 6 insertions(+), 2 deletions(-) + +--- a/drivers/staging/ks7010/ks_hostif.c ++++ b/drivers/staging/ks7010/ks_hostif.c +@@ -74,11 +74,15 @@ void ks_wlan_hw_wakeup_task(struct work_ + struct ks_wlan_private *priv = + container_of(work, struct ks_wlan_private, ks_wlan_wakeup_task); + int ps_status = atomic_read(&priv->psstatus.status); ++ long time_left; + + if (ps_status == PS_SNOOZE) { + ks_wlan_hw_wakeup_request(priv); +- if (!wait_for_completion_interruptible_timeout(&priv->psstatus.wakeup_wait, HZ / 50)) { /* 20ms timeout */ +- DPRINTK(1, "wake up timeout !!!\n"); ++ time_left = wait_for_completion_interruptible_timeout( ++ &priv->psstatus.wakeup_wait, ++ msecs_to_jiffies(20)); ++ if (time_left <= 0) { ++ DPRINTK(1, "wake up timeout or interrupted !!!\n"); + schedule_work(&priv->ks_wlan_wakeup_task); + return; + } diff --git a/kernel/kernel/files/patches/mageia/stable-staging-r8188eu-fix-scheduling-while-atomic-splat.patch b/kernel/kernel/files/patches/mageia/stable-staging-r8188eu-fix-scheduling-while-atomic-splat.patch new file mode 100644 index 00000000..ab357ae2 --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-staging-r8188eu-fix-scheduling-while-atomic-splat.patch @@ -0,0 +1,45 @@ +From 1335a9516d3d52f157ad87456efdd8dc9ae1747b Mon Sep 17 00:00:00 2001 +From: Larry Finger +Date: Sun, 5 Jun 2016 14:11:19 -0500 +Subject: staging: r8188eu: Fix scheduling while atomic splat + +From: Larry Finger + +commit 1335a9516d3d52f157ad87456efdd8dc9ae1747b upstream. + +Commit fadbe0cd5292851608e2e01b91d9295fa287b9fe ("staging: rtl8188eu: +Remove rtw_zmalloc(), wrapper for kzalloc()") changed all allocation +calls to be GFP_KERNEL even though the original wrapper was testing +to determine if the caller was in atomic mode. Most of the mistakes +were corrected with commit 33dc85c3c667209c930b2dac5ccbc2a365e06b7a +("staging: r8188eu: Fix scheduling while atomic error introduced in +commit fadbe0cd"); however, two kzalloc calls were missed as the +call only happens when the driver is shutting down. + +Fixes: fadbe0cd5292851608e2e01b91d9295fa287b9fe ("staging: rtl8188eu: Remove rtw_zmalloc(), wrapper for kzalloc()") +Signed-off-by: Larry Finger +Cc: navin patidar +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/staging/rtl8188eu/core/rtw_cmd.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/drivers/staging/rtl8188eu/core/rtw_cmd.c ++++ b/drivers/staging/rtl8188eu/core/rtw_cmd.c +@@ -670,13 +670,13 @@ u8 rtw_addbareq_cmd(struct adapter *pada + u8 res = _SUCCESS; + + +- ph2c = kzalloc(sizeof(struct cmd_obj), GFP_KERNEL); ++ ph2c = kzalloc(sizeof(struct cmd_obj), GFP_ATOMIC); + if (!ph2c) { + res = _FAIL; + goto exit; + } + +- paddbareq_parm = kzalloc(sizeof(struct addBaReq_parm), GFP_KERNEL); ++ paddbareq_parm = kzalloc(sizeof(struct addBaReq_parm), GFP_ATOMIC); + if (!paddbareq_parm) { + kfree(ph2c); + res = _FAIL; diff --git a/kernel/kernel/files/patches/mageia/stable-staging-sm750fb-correctly-set-clock_phase-bit-of-display-controller.patch b/kernel/kernel/files/patches/mageia/stable-staging-sm750fb-correctly-set-clock_phase-bit-of-display-controller.patch new file mode 100644 index 00000000..630a49f1 --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-staging-sm750fb-correctly-set-clock_phase-bit-of-display-controller.patch @@ -0,0 +1,33 @@ +From 992f961480d23e9ef9e686e512a419efef723523 Mon Sep 17 00:00:00 2001 +From: Phil Turnbull +Date: Fri, 2 Sep 2016 15:35:31 -0400 +Subject: staging: sm750fb: Correctly set CLOCK_PHASE bit of display controller. + +From: Phil Turnbull + +commit 992f961480d23e9ef9e686e512a419efef723523 upstream. + +Commit 6fba39cf32a3 ("staging: sm750fb: use BIT macro for +PANEL_DISPLAY_CTRL single-bit fields") accidentally changed the +CLOCK_PHASE logic from '|=' to '=' which clears all the previously set +bits. + +Fixes: 6fba39cf32a3 ("staging: sm750fb: use BIT macro for PANEL_DISPLAY_CTRL single-bit fields") +Signed-off-by: Phil Turnbull +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/staging/sm750fb/ddk750_mode.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/staging/sm750fb/ddk750_mode.c ++++ b/drivers/staging/sm750fb/ddk750_mode.c +@@ -63,7 +63,7 @@ static unsigned long displayControlAdjus + dispControl |= (CRT_DISPLAY_CTRL_CRTSELECT | CRT_DISPLAY_CTRL_RGBBIT); + + /* Set bit 14 of display controller */ +- dispControl = DISPLAY_CTRL_CLOCK_PHASE; ++ dispControl |= DISPLAY_CTRL_CLOCK_PHASE; + + POKE32(CRT_DISPLAY_CTRL, dispControl); + diff --git a/kernel/kernel/files/patches/mageia/stable-uio-fix-dmem_region_start-computation.patch b/kernel/kernel/files/patches/mageia/stable-uio-fix-dmem_region_start-computation.patch new file mode 100644 index 00000000..9f33eed3 --- /dev/null +++ b/kernel/kernel/files/patches/mageia/stable-uio-fix-dmem_region_start-computation.patch @@ -0,0 +1,36 @@ +From 4d31a2588ae37a5d0f61f4d956454e9504846aeb Mon Sep 17 00:00:00 2001 +From: Jan Viktorin +Date: Tue, 17 May 2016 11:22:17 +0200 +Subject: uio: fix dmem_region_start computation + +From: Jan Viktorin + +commit 4d31a2588ae37a5d0f61f4d956454e9504846aeb upstream. + +The variable i contains a total number of resources (including +IORESOURCE_IRQ). However, we want the dmem_region_start to point +after the last resource of type IORESOURCE_MEM. The original behaviour +leads (very likely) to skipping several UIO mapping regions and makes +them useless. Fix this by computing dmem_region_start from the uiomem +which points to the last used UIO mapping. + +Fixes: 0a0c3b5a24bd ("Add new uio device for dynamic memory allocation") + +Signed-off-by: Jan Viktorin +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/uio/uio_dmem_genirq.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/uio/uio_dmem_genirq.c ++++ b/drivers/uio/uio_dmem_genirq.c +@@ -229,7 +229,7 @@ static int uio_dmem_genirq_probe(struct + ++uiomem; + } + +- priv->dmem_region_start = i; ++ priv->dmem_region_start = uiomem - &uioinfo->mem[0]; + priv->num_dmem_regions = pdata->num_dynamic_regions; + + for (i = 0; i < pdata->num_dynamic_regions; ++i) { diff --git a/kernel/kernel/pspec.xml b/kernel/kernel/pspec.xml index 09eda125..55a7b2e9 100644 --- a/kernel/kernel/pspec.xml +++ b/kernel/kernel/pspec.xml @@ -28,9 +28,89 @@ - patches/linux/patch-4.8.4.xz - + patches/linux/patch-4.8.5.xz + + patches/mageia/stable-drm-vc4-fix-races-when-the-cs-reads-from-render-targets.patch + patches/mageia/stable-drm-prime-pass-the-right-module-owner-through-to-dma_buf_export.patch + patches/mageia/stable-drm-i915-backlight-setup-and-cache-pwm-alternate-increment-value.patch + patches/mageia/stable-drm-i915-backlight-setup-backlight-pwm-alternate-increment-on-backlight-enable.patch + patches/mageia/stable-drm-amdgpu-fix-ib-alignment-for-uvd.patch + patches/mageia/stable-drm-amdgpu-dce10-disable-hpd-on-local-panels.patch + patches/mageia/stable-drm-amdgpu-dce8-disable-hpd-on-local-panels.patch + patches/mageia/stable-drm-amdgpu-dce11-disable-hpd-on-local-panels.patch + patches/mageia/stable-drm-amdgpu-dce11-add-missing-drm_mode_config_cleanup-call.patch + patches/mageia/stable-drm-amdgpu-initialize-the-context-reset_counter-in-amdgpu_ctx_init.patch + patches/mageia/stable-drm-amdgpu-change-vblank_time-s-calculation-method-to-reduce-computational-error.patch + patches/mageia/stable-drm-radeon-narrow-asic_init-for-virtualization.patch + patches/mageia/stable-drm-radeon-si-dpm-fix-phase-shedding-setup.patch + patches/mageia/stable-drm-radeon-change-vblank_time-s-calculation-method-to-reduce-computational-error.patch + patches/mageia/stable-drm-vmwgfx-limit-the-user-space-command-buffer-size.patch + patches/mageia/stable-drm-fsl-dcu-fix-endian-issue-when-using-clk_register_divider.patch + patches/mageia/stable-drm-amd-powerplay-fix-mclk-not-switching-back-after-multi-head-was-disabled.patch + patches/mageia/stable-hid-add-quirk-for-akai-midimix.patch + patches/mageia/stable-drm-i915-skl-update-plane-watermarks-atomically-during-plane-updates.patch + patches/mageia/stable-drm-i915-move-crtc-updating-in-atomic_commit-into-it-s-own-hook.patch + patches/mageia/stable-drm-i915-skl-update-ddb-values-atomically-with-wms-plane-attrs.patch + patches/mageia/stable-drm-i915-skl-don-t-try-to-update-plane-watermarks-if-they-haven-t-changed.patch + patches/mageia/stable-drm-i915-gen9-only-add-the-planes-actually-affected-by-ddb-changes.patch + patches/mageia/stable-drm-i915-gen9-fix-the-wawmmemoryreadlatency-implementation.patch + patches/mageia/stable-drm-i915-gen9-minimum-scanlines-for-y-tile-is-not-always-4.patch + patches/mageia/stable-drm-i915-gen9-fix-plane_blocks_per_line-on-watermarks-calculations.patch + patches/mageia/stable-drm-i915-gen9-fix-the-watermark-res_blocks-value.patch + patches/mageia/stable-drm-i915-sagv-is-not-skl-only-so-rename-a-few-things.patch + patches/mageia/stable-drm-i915-introduce-intel_has_sagv.patch + patches/mageia/stable-drm-i915-kbl-kbl-also-needs-to-run-the-sagv-code.patch + patches/mageia/stable-revert-drm-i915-check-live-status-before-reading-edid.patch + patches/mageia/stable-drm-i915-account-for-tseg-size-when-determining-865g-stolen-base.patch + patches/mageia/stable-drm-i915-skl-ensure-pipes-with-changed-wms-get-added-to-the-state.patch + patches/mageia/stable-drm-i915-allow-pch-dpll-sharing-regardless-of-dpll_sdvo_high_speed.patch + patches/mageia/stable-drm-i915-move-long-hpd-handling-into-the-hotplug-work.patch + patches/mageia/stable-drm-i915-allow-dp-to-work-w-o-edid.patch + patches/mageia/stable-drm-i915-just-clear-the-mmiodebug-before-a-register-access.patch + patches/mageia/stable-drm-i915-unalias-obj-phys_handle-and-obj-userptr.patch + patches/mageia/stable-posix_acl-clear-sgid-bit-when-setting-file-permissions.patch + patches/mageia/stable-rt2x00usb-fix-error-return-code.patch + patches/mageia/stable-scsi-cxlflash-remove-the-device-cleanly-in-the-system-shutdown-path.patch + patches/mageia/stable-genirq-generic_chip-add-irq_unmap-callback.patch + patches/mageia/stable-coresight-remove-erroneous-dma_free_coherent-in-tmc_probe.patch + patches/mageia/stable-uio-fix-dmem_region_start-computation.patch + patches/mageia/stable-arm-clk-imx35-fix-name-for-ckil-clk.patch + patches/mageia/stable-spi-spi-fsl-dspi-drop-extra-spi_master_put-in-device-remove-function.patch + patches/mageia/stable-i40e-remove-a-stray-unlock.patch + patches/mageia/stable-i40e-fix-broken-i40e_config_rss_aq-function.patch + patches/mageia/stable-mwifiex-correct-aid-value-during-tdls-setup.patch + patches/mageia/stable-mwifiex-fix-failed-to-reconnect-after-interface-disabled-enabled.patch + patches/mageia/stable-ath10k-add-wmi_service_periodic_chan_stat_support-wmi-service.patch + patches/mageia/stable-ath10k-fix-sending-frame-in-management-path-in-push-txq-logic.patch + patches/mageia/stable-ath10k-fix-reporting-channel-survey-data.patch + patches/mageia/stable-ath10k-fix-throughput-regression-in-multi-client-mode.patch + patches/mageia/stable-crypto-marvell-don-t-overwrite-default-creq-state-during-initialization.patch + patches/mageia/stable-crypto-gcm-fix-iv-buffer-size-in-crypto_gcm_setkey.patch + patches/mageia/stable-crypto-marvell-update-transformation-context-for-each-dequeued-req.patch + patches/mageia/stable-crypto-arm-ghash-ce-add-missing-async-import-export.patch + patches/mageia/stable-crypto-ccp-fix-return-value-check-in-ccp_dmaengine_register.patch + patches/mageia/stable-hwrng-omap-only-fail-if-pm_runtime_get_sync-returns-0.patch + patches/mageia/stable-asoc-topology-fix-error-return-code-in-soc_tplg_dapm_widget_create.patch + patches/mageia/stable-asoc-dapm-fix-possible-uninitialized-variable-in-snd_soc_dapm_get_volsw.patch + patches/mageia/stable-asoc-dapm-fix-value-setting-for-_enum_double-mux-s-second-channel.patch + patches/mageia/stable-asoc-dapm-fix-kcontrol-creation-for-output-driver-widget.patch + patches/mageia/stable-asoc-sst-bxt-rt298-fix-obsoleted-initializers-for-array.patch + patches/mageia/stable-asoc-sst-bxt-da7219_max98357a-fix-obsoleted-initializers-for-array.patch + patches/mageia/stable-iio-ad5755-fix-off-by-one-on-devnr-limit-check.patch + patches/mageia/stable-iio-light-us5182d-add-missing-error-code-assignment-before-test.patch + patches/mageia/stable-staging-android-ion-hisi-fix-dependencies.patch + patches/mageia/stable-staging-sm750fb-correctly-set-clock_phase-bit-of-display-controller.patch + patches/mageia/stable-staging-r8188eu-fix-scheduling-while-atomic-splat.patch + patches/mageia/stable-staging-ks7010-fix-wait_for_completion_interruptible_timeout-return-handling.patch + patches/mageia/stable-staging-ks7010-declare-private-functions-static.patch + patches/mageia/stable-ib-hfi1-move-iowait_init-to-priv-allocate.patch + patches/mageia/stable-ib-rdmavt-correct-sparse-annotation.patch + patches/mageia/stable-ib-qib-remove-qpt_mask-global.patch + patches/mageia/stable-ib-mlx5-fix-steering-resource-leak.patch + patches/mageia/stable-power-bq24257-fix-use-of-uninitialized-pointer-bq-charger.patch + patches/mageia/stable-dmaengine-ipu-remove-bogus-no_irq-reference.patch + patches/mageia/stable-mm-hugetlb-check-for-reserved-hugepages-during-memory-offline.patch patches/mageia/Revert-ipmi-Start-the-timer-and-thread-on-internal-m.patch patches/mageia/x86-pci-toshiba-equium-a60-assign-busses.patch @@ -40,7 +120,7 @@ patches/mageia/Revert-cpufreq-pcc-Enable-autoload-of-pcc-cpufreq-fo.patch patches/mageia/Revert-x86-mm-mtrr-Remove-kernel-internal-MTRR-inter.patch patches/mageia/base-cacheinfo-silence-DT-warnings.patch - patches/mageia/kernel-sched-fair-Fix-incorrect-task-group-load_avg.patch + patches/mageia/kernel-governor-cpupower-Correct-return-type-of-cpu_power_is_cpu_onl.patch patches/mageia/pci-add-ALI-M5229-ide-compatibility-mode-quirk.patch patches/mageia/pci-quirks-drop-devinit-exit.patch patches/mageia/acpi-CLEVO-M360S-disable_acpi_irq.patch @@ -86,8 +166,7 @@ patches/mageia/gpu-drm-mach64-linux-3.14-buildfix.patch patches/mageia/gpu-drm-mach64-3.17-buildfix.patch patches/mageia/gpu-drm-mach64-3.18-buildfix.patch - patches/mageia/drm-i915-gen9-fix-DDB-partitioning-for-multi-screen-cases.patch - patches/mageia/skl_uncondition_memory_bandwitdth_WA_n_adjusted_mode_in_SAGV_check_on_a7fac751ddba.patch + patches/mageia/drm-i915-gen9-fix-DDB-partitioning-for-multi-screen-cases.patch patches/mageia/input-i8042-quirks-for-Fujitsu-Lifebook-A544-and-Lif.patch patches/mageia/net-sis190-fix-list-usage.patch patches/mageia/net-netfilter-IFWLOG.patch @@ -196,8 +275,8 @@ - 2016-10-28 - 4.8.4 + 2016-10-30 + 4.8.5 Version Bump. security