diff --git a/kernel/tools/cpupowertools/files/patches/aufs6/aufs6-base.patch b/kernel/tools/cpupowertools/files/patches/aufs6/aufs6-base.patch new file mode 100644 index 00000000..0e894341 --- /dev/null +++ b/kernel/tools/cpupowertools/files/patches/aufs6/aufs6-base.patch @@ -0,0 +1,209 @@ +SPDX-License-Identifier: GPL-2.0 +aufs6.6 base patch + +diff --git a/MAINTAINERS b/MAINTAINERS +index dd5de540ec0b..1b495555a80c 100644 +--- a/MAINTAINERS ++++ b/MAINTAINERS +@@ -3334,6 +3334,19 @@ F: include/uapi/linux/audit.h + F: kernel/audit* + F: lib/*audit.c + ++AUFS (advanced multi layered unification filesystem) FILESYSTEM ++M: "J. R. Okajima" ++L: aufs-users@lists.sourceforge.net (members only) ++L: linux-unionfs@vger.kernel.org ++S: Supported ++W: http://aufs.sourceforge.net ++T: git://github.com/sfjro/aufs4-linux.git ++F: Documentation/ABI/testing/debugfs-aufs ++F: Documentation/ABI/testing/sysfs-aufs ++F: Documentation/filesystems/aufs/ ++F: fs/aufs/ ++F: include/uapi/linux/aufs_type.h ++ + AUXILIARY BUS DRIVER + M: Greg Kroah-Hartman + R: Dave Ertman +diff --git a/drivers/block/loop.c b/drivers/block/loop.c +index 9f2d412fc560..1fefc6a8d049 100644 +--- a/drivers/block/loop.c ++++ b/drivers/block/loop.c +@@ -645,6 +645,24 @@ static int loop_change_fd(struct loop_device *lo, struct block_device *bdev, + goto done; + } + ++/* ++ * for AUFS ++ * no get/put for file. ++ */ ++struct file *loop_backing_file(struct super_block *sb) ++{ ++ struct file *ret; ++ struct loop_device *l; ++ ++ ret = NULL; ++ if (MAJOR(sb->s_dev) == LOOP_MAJOR) { ++ l = sb->s_bdev->bd_disk->private_data; ++ ret = l->lo_backing_file; ++ } ++ return ret; ++} ++EXPORT_SYMBOL_GPL(loop_backing_file); ++ + /* loop sysfs attributes */ + + static ssize_t loop_attr_show(struct device *dev, char *page, +diff --git a/fs/dcache.c b/fs/dcache.c +index 25ac74d30bff..6c930ceed526 100644 +--- a/fs/dcache.c ++++ b/fs/dcache.c +@@ -1345,7 +1345,7 @@ enum d_walk_ret { + * + * The @enter() callbacks are called with d_lock held. + */ +-static void d_walk(struct dentry *parent, void *data, ++void d_walk(struct dentry *parent, void *data, + enum d_walk_ret (*enter)(void *, struct dentry *)) + { + struct dentry *this_parent; +diff --git a/fs/fcntl.c b/fs/fcntl.c +index e871009f6c88..d62e114c1b1a 100644 +--- a/fs/fcntl.c ++++ b/fs/fcntl.c +@@ -34,7 +34,7 @@ + + #define SETFL_MASK (O_APPEND | O_NONBLOCK | O_NDELAY | O_DIRECT | O_NOATIME) + +-static int setfl(int fd, struct file * filp, unsigned int arg) ++int setfl(int fd, struct file * filp, unsigned int arg) + { + struct inode * inode = file_inode(filp); + int error = 0; +@@ -64,6 +64,8 @@ static int setfl(int fd, struct file * filp, unsigned int arg) + + if (filp->f_op->check_flags) + error = filp->f_op->check_flags(arg); ++ if (!error && filp->f_op->setfl) ++ error = filp->f_op->setfl(filp, arg); + if (error) + return error; + +diff --git a/fs/namespace.c b/fs/namespace.c +index e157efc54023..6c57487f126b 100644 +--- a/fs/namespace.c ++++ b/fs/namespace.c +@@ -872,6 +872,12 @@ static inline int check_mnt(struct mount *mnt) + return mnt->mnt_ns == current->nsproxy->mnt_ns; + } + ++/* for aufs, CONFIG_AUFS_BR_FUSE */ ++int is_current_mnt_ns(struct vfsmount *mnt) ++{ ++ return check_mnt(real_mount(mnt)); ++} ++ + /* + * vfsmount lock must be held for write + */ +diff --git a/fs/splice.c b/fs/splice.c +index d983d375ff11..7216ef993b5f 100644 +--- a/fs/splice.c ++++ b/fs/splice.c +@@ -925,8 +925,8 @@ static int warn_unsupported(struct file *file, const char *op) + /* + * Attempt to initiate a splice from pipe to file. + */ +-static long do_splice_from(struct pipe_inode_info *pipe, struct file *out, +- loff_t *ppos, size_t len, unsigned int flags) ++long do_splice_from(struct pipe_inode_info *pipe, struct file *out, ++ loff_t *ppos, size_t len, unsigned int flags) + { + if (unlikely(!out->f_op->splice_write)) + return warn_unsupported(out, "write"); +diff --git a/include/linux/fs.h b/include/linux/fs.h +index 4a40823c3c67..a46e516bfc32 100644 +--- a/include/linux/fs.h ++++ b/include/linux/fs.h +@@ -1099,6 +1099,7 @@ extern void fasync_free(struct fasync_struct *); + /* can be called from interrupts */ + extern void kill_fasync(struct fasync_struct **, int, int); + ++extern int setfl(int fd, struct file *filp, unsigned int arg); + extern void __f_setown(struct file *filp, struct pid *, enum pid_type, int force); + extern int f_setown(struct file *filp, int who, int force); + extern void f_delown(struct file *filp); +@@ -1872,6 +1873,7 @@ struct file_operations { + int (*lock) (struct file *, int, struct file_lock *); + unsigned long (*get_unmapped_area)(struct file *, unsigned long, unsigned long, unsigned long, unsigned long); + int (*check_flags)(int); ++ int (*setfl)(struct file *, unsigned long); + int (*flock) (struct file *, int, struct file_lock *); + ssize_t (*splice_write)(struct pipe_inode_info *, struct file *, loff_t *, size_t, unsigned int); + ssize_t (*splice_read)(struct file *, loff_t *, struct pipe_inode_info *, size_t, unsigned int); +diff --git a/include/linux/lockdep.h b/include/linux/lockdep.h +index dc2844b071c2..069ffb776c2c 100644 +--- a/include/linux/lockdep.h ++++ b/include/linux/lockdep.h +@@ -249,6 +249,8 @@ static inline int lockdep_match_key(struct lockdep_map *lock, + return lock->key == key; + } + ++struct lock_class *lockdep_hlock_class(struct held_lock *hlock); ++ + /* + * Acquire a lock. + * +diff --git a/include/linux/mnt_namespace.h b/include/linux/mnt_namespace.h +index 8f882f5881e8..6b9808f09843 100644 +--- a/include/linux/mnt_namespace.h ++++ b/include/linux/mnt_namespace.h +@@ -7,12 +7,15 @@ struct mnt_namespace; + struct fs_struct; + struct user_namespace; + struct ns_common; ++struct vfsmount; + + extern struct mnt_namespace *copy_mnt_ns(unsigned long, struct mnt_namespace *, + struct user_namespace *, struct fs_struct *); + extern void put_mnt_ns(struct mnt_namespace *ns); + extern struct ns_common *from_mnt_ns(struct mnt_namespace *); + ++extern int is_current_mnt_ns(struct vfsmount *mnt); ++ + extern const struct file_operations proc_mounts_operations; + extern const struct file_operations proc_mountinfo_operations; + extern const struct file_operations proc_mountstats_operations; +diff --git a/include/linux/splice.h b/include/linux/splice.h +index 6c461573434d..f08de3775987 100644 +--- a/include/linux/splice.h ++++ b/include/linux/splice.h +@@ -99,4 +99,7 @@ extern void splice_shrink_spd(struct splice_pipe_desc *); + + extern const struct pipe_buf_operations page_cache_pipe_buf_ops; + extern const struct pipe_buf_operations default_pipe_buf_ops; ++ ++extern long do_splice_from(struct pipe_inode_info *pipe, struct file *out, ++ loff_t *ppos, size_t len, unsigned int flags); + #endif +diff --git a/kernel/locking/lockdep.c b/kernel/locking/lockdep.c +index e85b5ad3e206..db4297f60bd3 100644 +--- a/kernel/locking/lockdep.c ++++ b/kernel/locking/lockdep.c +@@ -218,7 +218,7 @@ unsigned long max_lock_class_idx; + struct lock_class lock_classes[MAX_LOCKDEP_KEYS]; + DECLARE_BITMAP(lock_classes_in_use, MAX_LOCKDEP_KEYS); + +-static inline struct lock_class *hlock_class(struct held_lock *hlock) ++inline struct lock_class *lockdep_hlock_class(struct held_lock *hlock) + { + unsigned int class_idx = hlock->class_idx; + +@@ -239,6 +239,7 @@ static inline struct lock_class *hlock_class(struct held_lock *hlock) + */ + return lock_classes + class_idx; + } ++#define hlock_class(hlock) lockdep_hlock_class(hlock) + + #ifdef CONFIG_LOCK_STAT + static DEFINE_PER_CPU(struct lock_class_stats[MAX_LOCKDEP_KEYS], cpu_lock_stats); diff --git a/kernel/tools/cpupowertools/files/patches/aufs6/aufs6-kbuild.patch b/kernel/tools/cpupowertools/files/patches/aufs6/aufs6-kbuild.patch new file mode 100644 index 00000000..76b1dbae --- /dev/null +++ b/kernel/tools/cpupowertools/files/patches/aufs6/aufs6-kbuild.patch @@ -0,0 +1,24 @@ +SPDX-License-Identifier: GPL-2.0 +aufs6.6 kbuild patch + +diff --git a/fs/Kconfig b/fs/Kconfig +index aa7e03cc1941..bf780967b6c4 100644 +--- a/fs/Kconfig ++++ b/fs/Kconfig +@@ -331,6 +331,7 @@ source "fs/sysv/Kconfig" + source "fs/ufs/Kconfig" + source "fs/erofs/Kconfig" + source "fs/vboxsf/Kconfig" ++source "fs/aufs/Kconfig" + + endif # MISC_FILESYSTEMS + +diff --git a/fs/Makefile b/fs/Makefile +index f9541f40be4e..3a0e13ee39e7 100644 +--- a/fs/Makefile ++++ b/fs/Makefile +@@ -129,3 +129,4 @@ obj-$(CONFIG_EFIVAR_FS) += efivarfs/ + obj-$(CONFIG_EROFS_FS) += erofs/ + obj-$(CONFIG_VBOXSF_FS) += vboxsf/ + obj-$(CONFIG_ZONEFS_FS) += zonefs/ ++obj-$(CONFIG_AUFS_FS) += aufs/ diff --git a/kernel/tools/cpupowertools/files/patches/aufs6/aufs6-loopback.patch b/kernel/tools/cpupowertools/files/patches/aufs6/aufs6-loopback.patch new file mode 100644 index 00000000..757f1737 --- /dev/null +++ b/kernel/tools/cpupowertools/files/patches/aufs6/aufs6-loopback.patch @@ -0,0 +1,241 @@ +SPDX-License-Identifier: GPL-2.0 +aufs6.6 loopback patch + +diff --git a/drivers/block/loop.c b/drivers/block/loop.c +index 1fefc6a8d049..86f1f66305d2 100644 +--- a/drivers/block/loop.c ++++ b/drivers/block/loop.c +@@ -54,7 +54,7 @@ struct loop_device { + int lo_flags; + char lo_file_name[LO_NAME_SIZE]; + +- struct file * lo_backing_file; ++ struct file *lo_backing_file, *lo_backing_virt_file; + struct block_device *lo_device; + + gfp_t old_gfp_mask; +@@ -510,6 +510,15 @@ static inline void loop_update_dio(struct loop_device *lo) + lo->use_dio); + } + ++static struct file *loop_real_file(struct file *file) ++{ ++ struct file *f = NULL; ++ ++ if (file->f_path.dentry->d_sb->s_op->real_loop) ++ f = file->f_path.dentry->d_sb->s_op->real_loop(file); ++ return f; ++} ++ + static void loop_reread_partitions(struct loop_device *lo) + { + int rc; +@@ -567,6 +576,7 @@ static int loop_change_fd(struct loop_device *lo, struct block_device *bdev, + { + struct file *file = fget(arg); + struct file *old_file; ++ struct file *f, *virt_file = NULL, *old_virt_file; + int error; + bool partscan; + bool is_loop; +@@ -590,11 +600,19 @@ static int loop_change_fd(struct loop_device *lo, struct block_device *bdev, + if (!(lo->lo_flags & LO_FLAGS_READ_ONLY)) + goto out_err; + ++ f = loop_real_file(file); ++ if (f) { ++ virt_file = file; ++ file = f; ++ get_file(file); ++ } ++ + error = loop_validate_file(file, bdev); + if (error) + goto out_err; + + old_file = lo->lo_backing_file; ++ old_virt_file = lo->lo_backing_virt_file; + + error = -EINVAL; + +@@ -607,6 +625,7 @@ static int loop_change_fd(struct loop_device *lo, struct block_device *bdev, + blk_mq_freeze_queue(lo->lo_queue); + mapping_set_gfp_mask(old_file->f_mapping, lo->old_gfp_mask); + lo->lo_backing_file = file; ++ lo->lo_backing_virt_file = virt_file; + lo->old_gfp_mask = mapping_gfp_mask(file->f_mapping); + mapping_set_gfp_mask(file->f_mapping, + lo->old_gfp_mask & ~(__GFP_IO|__GFP_FS)); +@@ -629,6 +648,8 @@ static int loop_change_fd(struct loop_device *lo, struct block_device *bdev, + * dependency. + */ + fput(old_file); ++ if (old_virt_file) ++ fput(old_virt_file); + if (partscan) + loop_reread_partitions(lo); + +@@ -642,6 +663,8 @@ static int loop_change_fd(struct loop_device *lo, struct block_device *bdev, + loop_global_unlock(lo, is_loop); + out_putf: + fput(file); ++ if (virt_file) ++ fput(virt_file); + goto done; + } + +@@ -1013,6 +1036,7 @@ static int loop_configure(struct loop_device *lo, blk_mode_t mode, + const struct loop_config *config) + { + struct file *file = fget(config->fd); ++ struct file *f, *virt_file = NULL; + struct inode *inode; + struct address_space *mapping; + int error; +@@ -1028,6 +1052,13 @@ static int loop_configure(struct loop_device *lo, blk_mode_t mode, + /* This is safe, since we have a reference from open(). */ + __module_get(THIS_MODULE); + ++ f = loop_real_file(file); ++ if (f) { ++ virt_file = file; ++ file = f; ++ get_file(file); ++ } ++ + /* + * If we don't hold exclusive handle for the device, upgrade to it + * here to avoid changing device under exclusive owner. +@@ -1091,6 +1122,7 @@ static int loop_configure(struct loop_device *lo, blk_mode_t mode, + lo->use_dio = lo->lo_flags & LO_FLAGS_DIRECT_IO; + lo->lo_device = bdev; + lo->lo_backing_file = file; ++ lo->lo_backing_virt_file = virt_file; + lo->old_gfp_mask = mapping_gfp_mask(mapping); + mapping_set_gfp_mask(mapping, lo->old_gfp_mask & ~(__GFP_IO|__GFP_FS)); + +@@ -1146,6 +1178,8 @@ static int loop_configure(struct loop_device *lo, blk_mode_t mode, + bd_abort_claiming(bdev, loop_configure); + out_putf: + fput(file); ++ if (virt_file) ++ fput(virt_file); + /* This is safe: open() is still holding a reference. */ + module_put(THIS_MODULE); + return error; +@@ -1154,6 +1188,7 @@ static int loop_configure(struct loop_device *lo, blk_mode_t mode, + static void __loop_clr_fd(struct loop_device *lo, bool release) + { + struct file *filp; ++ struct file *virt_filp = lo->lo_backing_virt_file; + gfp_t gfp = lo->old_gfp_mask; + + if (test_bit(QUEUE_FLAG_WC, &lo->lo_queue->queue_flags)) +@@ -1170,6 +1205,7 @@ static void __loop_clr_fd(struct loop_device *lo, bool release) + spin_lock_irq(&lo->lo_lock); + filp = lo->lo_backing_file; + lo->lo_backing_file = NULL; ++ lo->lo_backing_virt_file = NULL; + spin_unlock_irq(&lo->lo_lock); + + lo->lo_device = NULL; +@@ -1232,6 +1268,8 @@ static void __loop_clr_fd(struct loop_device *lo, bool release) + * fput can take open_mutex which is usually taken before lo_mutex. + */ + fput(filp); ++ if (virt_filp) ++ fput(virt_filp); + } + + static int loop_clr_fd(struct loop_device *lo) +diff --git a/fs/aufs/f_op.c b/fs/aufs/f_op.c +index fa8a517ffd0c..c18f7bcef81b 100644 +--- a/fs/aufs/f_op.c ++++ b/fs/aufs/f_op.c +@@ -311,7 +311,7 @@ static ssize_t aufs_read_iter(struct kiocb *kio, struct iov_iter *iov_iter) + if (IS_ERR(h_file)) + goto out; + +- if (au_test_loopback_kthread()) { ++ if (0 && au_test_loopback_kthread()) { + au_warn_loopback(h_file->f_path.dentry->d_sb); + if (file->f_mapping != h_file->f_mapping) { + file->f_mapping = h_file->f_mapping; +diff --git a/fs/aufs/loop.c b/fs/aufs/loop.c +index 58043e31e5f3..e2bfae6f9d59 100644 +--- a/fs/aufs/loop.c ++++ b/fs/aufs/loop.c +@@ -133,3 +133,19 @@ void au_loopback_fin(void) + symbol_put(loop_backing_file); + au_kfree_try_rcu(au_warn_loopback_array); + } ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* support the loopback block device insude aufs */ ++ ++struct file *aufs_real_loop(struct file *file) ++{ ++ struct file *f; ++ ++ BUG_ON(!au_test_aufs(file->f_path.dentry->d_sb)); ++ fi_read_lock(file); ++ f = au_hf_top(file); ++ fi_read_unlock(file); ++ AuDebugOn(!f); ++ return f; ++} +diff --git a/fs/aufs/loop.h b/fs/aufs/loop.h +index 03d4908a6c03..34d356e181d5 100644 +--- a/fs/aufs/loop.h ++++ b/fs/aufs/loop.h +@@ -26,6 +26,8 @@ void au_warn_loopback(struct super_block *h_sb); + + int au_loopback_init(void); + void au_loopback_fin(void); ++ ++struct file *aufs_real_loop(struct file *file); + #else + AuStub(struct file *, loop_backing_file, return NULL, struct super_block *sb) + +@@ -36,6 +38,8 @@ AuStubVoid(au_warn_loopback, struct super_block *h_sb) + + AuStubInt0(au_loopback_init, void) + AuStubVoid(au_loopback_fin, void) ++ ++AuStub(struct file *, aufs_real_loop, return NULL, struct file *file) + #endif /* BLK_DEV_LOOP */ + + #endif /* __KERNEL__ */ +diff --git a/fs/aufs/super.c b/fs/aufs/super.c +index 07d3412e950f..c4a00f620e57 100644 +--- a/fs/aufs/super.c ++++ b/fs/aufs/super.c +@@ -758,7 +758,10 @@ const struct super_operations aufs_sop = { + .show_options = aufs_show_options, + .statfs = aufs_statfs, + .put_super = aufs_put_super, +- .sync_fs = aufs_sync_fs ++ .sync_fs = aufs_sync_fs, ++#ifdef CONFIG_AUFS_BDEV_LOOP ++ .real_loop = aufs_real_loop ++#endif + }; + + /* ---------------------------------------------------------------------- */ +diff --git a/include/linux/fs.h b/include/linux/fs.h +index a46e516bfc32..a0d040eef83d 100644 +--- a/include/linux/fs.h ++++ b/include/linux/fs.h +@@ -2027,6 +2027,11 @@ struct super_operations { + long (*free_cached_objects)(struct super_block *, + struct shrink_control *); + void (*shutdown)(struct super_block *sb); ++ ++#if IS_ENABLED(CONFIG_BLK_DEV_LOOP) || IS_ENABLED(CONFIG_BLK_DEV_LOOP_MODULE) ++ /* and aufs */ ++ struct file *(*real_loop)(struct file *); ++#endif + }; + + /* diff --git a/kernel/tools/cpupowertools/files/patches/aufs6/aufs6-mmap.patch b/kernel/tools/cpupowertools/files/patches/aufs6/aufs6-mmap.patch new file mode 100644 index 00000000..f1628f8a --- /dev/null +++ b/kernel/tools/cpupowertools/files/patches/aufs6/aufs6-mmap.patch @@ -0,0 +1,428 @@ +SPDX-License-Identifier: GPL-2.0 +aufs6.6 mmap patch + +diff --git a/fs/proc/base.c b/fs/proc/base.c +index ffd54617c354..29ec720c8038 100644 +--- a/fs/proc/base.c ++++ b/fs/proc/base.c +@@ -2218,7 +2218,7 @@ static int map_files_get_link(struct dentry *dentry, struct path *path) + rc = -ENOENT; + vma = find_exact_vma(mm, vm_start, vm_end); + if (vma && vma->vm_file) { +- *path = vma->vm_file->f_path; ++ *path = vma_pr_or_file(vma)->f_path; + path_get(path); + rc = 0; + } +diff --git a/fs/proc/nommu.c b/fs/proc/nommu.c +index 4d3493579458..42edd9a42c78 100644 +--- a/fs/proc/nommu.c ++++ b/fs/proc/nommu.c +@@ -39,7 +39,10 @@ static int nommu_region_show(struct seq_file *m, struct vm_region *region) + file = region->vm_file; + + if (file) { +- struct inode *inode = file_inode(region->vm_file); ++ struct inode *inode; ++ ++ file = vmr_pr_or_file(region); ++ inode = file_inode(file); + dev = inode->i_sb->s_dev; + ino = inode->i_ino; + } +diff --git a/fs/proc/task_mmu.c b/fs/proc/task_mmu.c +index 3dd5be96691b..40d9d970b308 100644 +--- a/fs/proc/task_mmu.c ++++ b/fs/proc/task_mmu.c +@@ -271,7 +271,10 @@ show_map_vma(struct seq_file *m, struct vm_area_struct *vma) + const char *name = NULL; + + if (file) { +- struct inode *inode = file_inode(vma->vm_file); ++ struct inode *inode; ++ ++ file = vma_pr_or_file(vma); ++ inode = file_inode(file); + dev = inode->i_sb->s_dev; + ino = inode->i_ino; + pgoff = ((loff_t)vma->vm_pgoff) << PAGE_SHIFT; +@@ -1943,7 +1946,7 @@ static int show_numa_map(struct seq_file *m, void *v) + struct proc_maps_private *proc_priv = &numa_priv->proc_maps; + struct vm_area_struct *vma = v; + struct numa_maps *md = &numa_priv->md; +- struct file *file = vma->vm_file; ++ struct file *file = vma_pr_or_file(vma); + struct mm_struct *mm = vma->vm_mm; + struct mempolicy *pol; + char buffer[64]; +diff --git a/fs/proc/task_nommu.c b/fs/proc/task_nommu.c +index 7cebd397cc26..81be1641c7fb 100644 +--- a/fs/proc/task_nommu.c ++++ b/fs/proc/task_nommu.c +@@ -137,7 +137,10 @@ static int nommu_vma_show(struct seq_file *m, struct vm_area_struct *vma) + file = vma->vm_file; + + if (file) { +- struct inode *inode = file_inode(vma->vm_file); ++ struct inode *inode; ++ ++ file = vma_pr_or_file(vma); ++ inode = file_inode(file); + dev = inode->i_sb->s_dev; + ino = inode->i_ino; + pgoff = (loff_t)vma->vm_pgoff << PAGE_SHIFT; +diff --git a/include/linux/mm.h b/include/linux/mm.h +index bf5d0b1b16f4..94b956eff452 100644 +--- a/include/linux/mm.h ++++ b/include/linux/mm.h +@@ -2409,6 +2409,43 @@ static inline void unmap_shared_mapping_range(struct address_space *mapping, + static inline struct vm_area_struct *vma_lookup(struct mm_struct *mm, + unsigned long addr); + ++#if 1 /* IS_ENABLED(CONFIG_AUFS_FS) */ ++extern void vma_do_file_update_time(struct vm_area_struct *, const char[], int); ++extern struct file *vma_do_pr_or_file(struct vm_area_struct *, const char[], ++ int); ++extern void vma_do_get_file(struct vm_area_struct *, const char[], int); ++extern void vma_do_fput(struct vm_area_struct *, const char[], int); ++ ++#define vma_file_update_time(vma) vma_do_file_update_time(vma, __func__, \ ++ __LINE__) ++#define vma_pr_or_file(vma) vma_do_pr_or_file(vma, __func__, \ ++ __LINE__) ++#define vma_get_file(vma) vma_do_get_file(vma, __func__, __LINE__) ++#define vma_fput(vma) vma_do_fput(vma, __func__, __LINE__) ++ ++#ifndef CONFIG_MMU ++extern struct file *vmr_do_pr_or_file(struct vm_region *, const char[], int); ++extern void vmr_do_fput(struct vm_region *, const char[], int); ++ ++#define vmr_pr_or_file(region) vmr_do_pr_or_file(region, __func__, \ ++ __LINE__) ++#define vmr_fput(region) vmr_do_fput(region, __func__, __LINE__) ++#endif /* !CONFIG_MMU */ ++ ++#else ++ ++#define vma_file_update_time(vma) file_update_time((vma)->vm_file) ++#define vma_pr_or_file(vma) (vma)->vm_file ++#define vma_get_file(vma) get_file((vma)->vm_file) ++#define vma_fput(vma) fput((vma)->vm_file) ++ ++#ifndef CONFIG_MMU ++#define vmr_pr_or_file(region) (region)->vm_file ++#define vmr_fput(region) fput((region)->vm_file) ++#endif /* !CONFIG_MMU */ ++ ++#endif /* CONFIG_AUFS_FS */ ++ + extern int access_process_vm(struct task_struct *tsk, unsigned long addr, + void *buf, int len, unsigned int gup_flags); + extern int access_remote_vm(struct mm_struct *mm, unsigned long addr, +diff --git a/include/linux/mm_types.h b/include/linux/mm_types.h +index 36c5b43999e6..ce93e97f76a6 100644 +--- a/include/linux/mm_types.h ++++ b/include/linux/mm_types.h +@@ -524,6 +524,9 @@ struct vm_region { + unsigned long vm_top; /* region allocated to here */ + unsigned long vm_pgoff; /* the offset in vm_file corresponding to vm_start */ + struct file *vm_file; /* the backing file or NULL */ ++#if 1 /* IS_ENABLED(CONFIG_AUFS_FS) */ ++ struct file *vm_prfile; /* the virtual backing file or NULL */ ++#endif + + int vm_usage; /* region usage count (access under nommu_region_sem) */ + bool vm_icache_flushed : 1; /* true if the icache has been flushed for +@@ -637,6 +640,9 @@ struct vm_area_struct { + unsigned long vm_pgoff; /* Offset (within vm_file) in PAGE_SIZE + units */ + struct file * vm_file; /* File we map to (can be NULL). */ ++#if 1 /* IS_ENABLED(CONFIG_AUFS_FS) */ ++ struct file *vm_prfile; /* shadow of vm_file */ ++#endif + void * vm_private_data; /* was vm_pte (shared mem) */ + + #ifdef CONFIG_ANON_VMA_NAME +diff --git a/kernel/fork.c b/kernel/fork.c +index 3b6d20dfb9a8..ccad0325cfa9 100644 +--- a/kernel/fork.c ++++ b/kernel/fork.c +@@ -731,7 +731,7 @@ static __latent_entropy int dup_mmap(struct mm_struct *mm, + if (file) { + struct address_space *mapping = file->f_mapping; + +- get_file(file); ++ vma_get_file(tmp); + i_mmap_lock_write(mapping); + if (tmp->vm_flags & VM_SHARED) + mapping_allow_writable(mapping); +diff --git a/mm/Makefile b/mm/Makefile +index ec65984e2ade..d59461647ccd 100644 +--- a/mm/Makefile ++++ b/mm/Makefile +@@ -138,3 +138,4 @@ obj-$(CONFIG_IO_MAPPING) += io-mapping.o + obj-$(CONFIG_HAVE_BOOTMEM_INFO_NODE) += bootmem_info.o + obj-$(CONFIG_GENERIC_IOREMAP) += ioremap.o + obj-$(CONFIG_SHRINKER_DEBUG) += shrinker_debug.o ++obj-y += prfile.o +diff --git a/mm/filemap.c b/mm/filemap.c +index f0a15ce1bd1b..a5eba9bbe416 100644 +--- a/mm/filemap.c ++++ b/mm/filemap.c +@@ -3626,7 +3626,7 @@ vm_fault_t filemap_page_mkwrite(struct vm_fault *vmf) + vm_fault_t ret = VM_FAULT_LOCKED; + + sb_start_pagefault(mapping->host->i_sb); +- file_update_time(vmf->vma->vm_file); ++ vma_file_update_time(vmf->vma); + folio_lock(folio); + if (folio->mapping != mapping) { + folio_unlock(folio); +diff --git a/mm/mmap.c b/mm/mmap.c +index 9e018d8dd7d6..047bd4a0ced8 100644 +--- a/mm/mmap.c ++++ b/mm/mmap.c +@@ -140,7 +140,7 @@ static void remove_vma(struct vm_area_struct *vma, bool unreachable) + if (vma->vm_ops && vma->vm_ops->close) + vma->vm_ops->close(vma); + if (vma->vm_file) +- fput(vma->vm_file); ++ vma_fput(vma); + mpol_put(vma_policy(vma)); + if (unreachable) + __vm_area_free(vma); +@@ -554,7 +554,7 @@ static inline void vma_complete(struct vma_prepare *vp, + if (vp->file) { + uprobe_munmap(vp->remove, vp->remove->vm_start, + vp->remove->vm_end); +- fput(vp->file); ++ vma_fput(vp->vma); + } + if (vp->remove->anon_vma) + anon_vma_merge(vp->vma, vp->remove); +@@ -2384,7 +2384,7 @@ int __split_vma(struct vma_iterator *vmi, struct vm_area_struct *vma, + goto out_free_mpol; + + if (new->vm_file) +- get_file(new->vm_file); ++ vma_get_file(new); + + if (new->vm_ops && new->vm_ops->open) + new->vm_ops->open(new); +@@ -2801,7 +2801,7 @@ unsigned long mmap_region(struct file *file, unsigned long addr, + * and cause general protection fault + * ultimately. + */ +- fput(vma->vm_file); ++ vma_fput(vma); + vm_area_free(vma); + vma = merge; + /* Update vm_flags to pick up the change. */ +@@ -2896,7 +2896,7 @@ unsigned long mmap_region(struct file *file, unsigned long addr, + + if (file || vma->vm_file) { + unmap_and_free_vma: +- fput(vma->vm_file); ++ vma_fput(vma); + vma->vm_file = NULL; + + vma_iter_set(&vmi, vma->vm_end); +@@ -2958,6 +2958,9 @@ SYSCALL_DEFINE5(remap_file_pages, unsigned long, start, unsigned long, size, + unsigned long populate = 0; + unsigned long ret = -EINVAL; + struct file *file; ++#if 1 /* IS_ENABLED(CONFIG_AUFS_FS) */ ++ struct file *prfile; ++#endif + + pr_warn_once("%s (%d) uses deprecated remap_file_pages() syscall. See Documentation/mm/remap_file_pages.rst.\n", + current->comm, current->pid); +@@ -3016,10 +3019,34 @@ SYSCALL_DEFINE5(remap_file_pages, unsigned long, start, unsigned long, size, + if (vma->vm_flags & VM_LOCKED) + flags |= MAP_LOCKED; + ++#if 1 /* IS_ENABLED(CONFIG_AUFS_FS) */ ++ vma_get_file(vma); ++ file = vma->vm_file; ++ prfile = vma->vm_prfile; ++ ret = do_mmap(vma->vm_file, start, size, ++ prot, flags, /*vm_flags*/0, pgoff, &populate, NULL); ++ if (!IS_ERR_VALUE(ret) && file && prfile) { ++ struct vm_area_struct *new_vma; ++ ++ new_vma = find_vma(mm, ret); ++ if (!new_vma->vm_prfile) ++ new_vma->vm_prfile = prfile; ++ if (prfile) ++ get_file(prfile); ++ } ++ /* ++ * two fput()s instead of vma_fput(vma), ++ * coz vma may not be available anymore. ++ */ ++ fput(file); ++ if (prfile) ++ fput(prfile); ++#else + file = get_file(vma->vm_file); + ret = do_mmap(vma->vm_file, start, size, + prot, flags, 0, pgoff, &populate, NULL); + fput(file); ++#endif /* CONFIG_AUFS_FS */ + out: + mmap_write_unlock(mm); + if (populate) +@@ -3370,7 +3397,7 @@ struct vm_area_struct *copy_vma(struct vm_area_struct **vmap, + if (anon_vma_clone(new_vma, vma)) + goto out_free_mempol; + if (new_vma->vm_file) +- get_file(new_vma->vm_file); ++ vma_get_file(new_vma); + if (new_vma->vm_ops && new_vma->vm_ops->open) + new_vma->vm_ops->open(new_vma); + if (vma_link(mm, new_vma)) +@@ -3384,7 +3411,7 @@ struct vm_area_struct *copy_vma(struct vm_area_struct **vmap, + new_vma->vm_ops->close(new_vma); + + if (new_vma->vm_file) +- fput(new_vma->vm_file); ++ vma_fput(new_vma); + + unlink_anon_vmas(new_vma); + out_free_mempol: +diff --git a/mm/nommu.c b/mm/nommu.c +index 7f9e9e5a0e12..69663f2bd4c4 100644 +--- a/mm/nommu.c ++++ b/mm/nommu.c +@@ -523,7 +523,7 @@ static void __put_nommu_region(struct vm_region *region) + up_write(&nommu_region_sem); + + if (region->vm_file) +- fput(region->vm_file); ++ vmr_fput(region); + + /* IO memory and memory shared directly out of the pagecache + * from ramfs/tmpfs mustn't be released here */ +@@ -603,7 +603,7 @@ static void delete_vma(struct mm_struct *mm, struct vm_area_struct *vma) + if (vma->vm_ops && vma->vm_ops->close) + vma->vm_ops->close(vma); + if (vma->vm_file) +- fput(vma->vm_file); ++ vma_fput(vma); + put_nommu_region(vma->vm_region); + vm_area_free(vma); + } +@@ -1135,7 +1135,7 @@ unsigned long do_mmap(struct file *file, + goto error_just_free; + } + } +- fput(region->vm_file); ++ vmr_fput(region); + kmem_cache_free(vm_region_jar, region); + region = pregion; + result = start; +@@ -1221,10 +1221,10 @@ unsigned long do_mmap(struct file *file, + error: + vma_iter_free(&vmi); + if (region->vm_file) +- fput(region->vm_file); ++ vmr_fput(region); + kmem_cache_free(vm_region_jar, region); + if (vma->vm_file) +- fput(vma->vm_file); ++ vma_fput(vma); + vm_area_free(vma); + return ret; + +diff --git a/mm/prfile.c b/mm/prfile.c +new file mode 100644 +index 000000000000..8f820a235364 +--- /dev/null ++++ b/mm/prfile.c +@@ -0,0 +1,86 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Mainly for aufs which mmap(2) different file and wants to print different ++ * path in /proc/PID/maps. ++ * Call these functions via macros defined in linux/mm.h. ++ * ++ * See Documentation/filesystems/aufs/design/06mmap.txt ++ * ++ * Copyright (c) 2014-2022 Junjro R. Okajima ++ * Copyright (c) 2014 Ian Campbell ++ */ ++ ++#include ++#include ++#include ++ ++/* #define PRFILE_TRACE */ ++static inline void prfile_trace(struct file *f, struct file *pr, ++ const char func[], int line, const char func2[]) ++{ ++#ifdef PRFILE_TRACE ++ if (pr) ++ pr_info("%s:%d: %s, %pD2\n", func, line, func2, f); ++#endif ++} ++ ++void vma_do_file_update_time(struct vm_area_struct *vma, const char func[], ++ int line) ++{ ++ struct file *f = vma->vm_file, *pr = vma->vm_prfile; ++ ++ prfile_trace(f, pr, func, line, __func__); ++ file_update_time(f); ++ if (f && pr) ++ file_update_time(pr); ++} ++ ++struct file *vma_do_pr_or_file(struct vm_area_struct *vma, const char func[], ++ int line) ++{ ++ struct file *f = vma->vm_file, *pr = vma->vm_prfile; ++ ++ prfile_trace(f, pr, func, line, __func__); ++ return (f && pr) ? pr : f; ++} ++ ++void vma_do_get_file(struct vm_area_struct *vma, const char func[], int line) ++{ ++ struct file *f = vma->vm_file, *pr = vma->vm_prfile; ++ ++ prfile_trace(f, pr, func, line, __func__); ++ get_file(f); ++ if (f && pr) ++ get_file(pr); ++} ++ ++void vma_do_fput(struct vm_area_struct *vma, const char func[], int line) ++{ ++ struct file *f = vma->vm_file, *pr = vma->vm_prfile; ++ ++ prfile_trace(f, pr, func, line, __func__); ++ fput(f); ++ if (f && pr) ++ fput(pr); ++} ++ ++#ifndef CONFIG_MMU ++struct file *vmr_do_pr_or_file(struct vm_region *region, const char func[], ++ int line) ++{ ++ struct file *f = region->vm_file, *pr = region->vm_prfile; ++ ++ prfile_trace(f, pr, func, line, __func__); ++ return (f && pr) ? pr : f; ++} ++ ++void vmr_do_fput(struct vm_region *region, const char func[], int line) ++{ ++ struct file *f = region->vm_file, *pr = region->vm_prfile; ++ ++ prfile_trace(f, pr, func, line, __func__); ++ fput(f); ++ if (f && pr) ++ fput(pr); ++} ++#endif /* !CONFIG_MMU */ diff --git a/kernel/tools/cpupowertools/files/patches/mageia/fs-aufs5.10-symbol-exports.patch b/kernel/tools/cpupowertools/files/patches/aufs6/aufs6-standalone.patch similarity index 53% rename from kernel/tools/cpupowertools/files/patches/mageia/fs-aufs5.10-symbol-exports.patch rename to kernel/tools/cpupowertools/files/patches/aufs6/aufs6-standalone.patch index 49e6ec39..a9a8644c 100644 --- a/kernel/tools/cpupowertools/files/patches/mageia/fs-aufs5.10-symbol-exports.patch +++ b/kernel/tools/cpupowertools/files/patches/aufs6/aufs6-standalone.patch @@ -1,11 +1,11 @@ SPDX-License-Identifier: GPL-2.0 -aufs5.x-rcN standalone patch +aufs6.6 standalone patch diff --git a/fs/dcache.c b/fs/dcache.c -index ddca6240e0db4..30dec552278dc 100644 +index 6c930ceed526..576ad162cdec 100644 --- a/fs/dcache.c +++ b/fs/dcache.c -@@ -1390,6 +1390,7 @@ void d_walk(struct dentry *parent, void *data, +@@ -1450,6 +1450,7 @@ void d_walk(struct dentry *parent, void *data, seq = 1; goto again; } @@ -13,7 +13,7 @@ index ddca6240e0db4..30dec552278dc 100644 struct check_mount { struct vfsmount *mnt; -@@ -2935,6 +2936,7 @@ void d_exchange(struct dentry *dentry1, struct dentry *dentry2) +@@ -3051,6 +3052,7 @@ void d_exchange(struct dentry *dentry1, struct dentry *dentry2) write_sequnlock(&rename_lock); } @@ -22,10 +22,10 @@ index ddca6240e0db4..30dec552278dc 100644 /** * d_ancestor - search for an ancestor diff --git a/fs/exec.c b/fs/exec.c -index 547a2390baf54..18d51d0face68 100644 +index 6518e33ea813..b67efac6a1ad 100644 --- a/fs/exec.c +++ b/fs/exec.c -@@ -113,6 +113,7 @@ bool path_noexec(const struct path *path) +@@ -112,6 +112,7 @@ bool path_noexec(const struct path *path) return (path->mnt->mnt_flags & MNT_NOEXEC) || (path->mnt->mnt_sb->s_iflags & SB_I_NOEXEC); } @@ -34,10 +34,10 @@ index 547a2390baf54..18d51d0face68 100644 #ifdef CONFIG_USELIB /* diff --git a/fs/fcntl.c b/fs/fcntl.c -index 073ca6af500f3..b18afdf81e762 100644 +index d62e114c1b1a..ceef001775bd 100644 --- a/fs/fcntl.c +++ b/fs/fcntl.c -@@ -85,6 +85,7 @@ int setfl(int fd, struct file *filp, unsigned long arg) +@@ -87,6 +87,7 @@ int setfl(int fd, struct file * filp, unsigned int arg) out: return error; } @@ -46,10 +46,10 @@ index 073ca6af500f3..b18afdf81e762 100644 static void f_modown(struct file *filp, struct pid *pid, enum pid_type type, int force) diff --git a/fs/file_table.c b/fs/file_table.c -index 709ada3151da5..27a3e3c9f2a82 100644 +index ee21b3da9d08..c45ac36795dd 100644 --- a/fs/file_table.c +++ b/fs/file_table.c -@@ -162,6 +162,7 @@ struct file *alloc_empty_file(int flags, const struct cred *cred) +@@ -225,6 +225,7 @@ struct file *alloc_empty_file(int flags, const struct cred *cred) } return ERR_PTR(-ENFILE); } @@ -57,31 +57,11 @@ index 709ada3151da5..27a3e3c9f2a82 100644 /* * Variant of alloc_empty_file() that doesn't check and modify nr_files. -@@ -376,6 +377,7 @@ void __fput_sync(struct file *file) - } - - EXPORT_SYMBOL(fput); -+EXPORT_SYMBOL_GPL(__fput_sync); - - void __init files_init(void) - { -diff --git a/fs/inode.c b/fs/inode.c -index e7f0c614a58f3..6fe0a92a4c93c 100644 ---- a/fs/inode.c -+++ b/fs/inode.c -@@ -1776,6 +1776,7 @@ int update_time(struct inode *inode, struct timespec64 *time, int flags) - return inode->i_op->update_time(inode, time, flags); - return generic_update_time(inode, time, flags); - } -+EXPORT_SYMBOL_GPL(update_time); - - /** - * touch_atime - update the access time diff --git a/fs/namespace.c b/fs/namespace.c -index 451dee24a546a..38078cbede431 100644 +index 6c57487f126b..16be9ac1c734 100644 --- a/fs/namespace.c +++ b/fs/namespace.c -@@ -431,6 +431,7 @@ void __mnt_drop_write(struct vfsmount *mnt) +@@ -466,6 +466,7 @@ void __mnt_drop_write(struct vfsmount *mnt) mnt_dec_writers(real_mount(mnt)); preempt_enable(); } @@ -89,7 +69,7 @@ index 451dee24a546a..38078cbede431 100644 /** * mnt_drop_write - give up write access to a mount -@@ -797,6 +798,7 @@ int is_current_mnt_ns(struct vfsmount *mnt) +@@ -877,6 +878,7 @@ int is_current_mnt_ns(struct vfsmount *mnt) { return check_mnt(real_mount(mnt)); } @@ -97,7 +77,7 @@ index 451dee24a546a..38078cbede431 100644 /* * vfsmount lock must be held for write -@@ -1961,6 +1963,7 @@ int iterate_mounts(int (*f)(struct vfsmount *, void *), void *arg, +@@ -2152,6 +2154,7 @@ int iterate_mounts(int (*f)(struct vfsmount *, void *), void *arg, } return 0; } @@ -106,7 +86,7 @@ index 451dee24a546a..38078cbede431 100644 static void lock_mnt_tree(struct mount *mnt) { diff --git a/fs/notify/group.c b/fs/notify/group.c -index a4a4b1c64d32a..86dc2efb1850c 100644 +index 1de6631a3925..3008eb37a18d 100644 --- a/fs/notify/group.c +++ b/fs/notify/group.c @@ -100,6 +100,7 @@ void fsnotify_get_group(struct fsnotify_group *group) @@ -118,10 +98,10 @@ index a4a4b1c64d32a..86dc2efb1850c 100644 /* * Drop a reference to a group. Free it if it's through. diff --git a/fs/open.c b/fs/open.c -index 9af548fb841b0..2ff09b709f7bf 100644 +index 98f6601fbac6..8624e4ffa15b 100644 --- a/fs/open.c +++ b/fs/open.c -@@ -65,6 +65,7 @@ int do_truncate(struct dentry *dentry, loff_t length, unsigned int time_attrs, +@@ -67,6 +67,7 @@ int do_truncate(struct mnt_idmap *idmap, struct dentry *dentry, inode_unlock(dentry->d_inode); return ret; } @@ -130,10 +110,10 @@ index 9af548fb841b0..2ff09b709f7bf 100644 long vfs_truncate(const struct path *path, loff_t length) { diff --git a/fs/read_write.c b/fs/read_write.c -index 75f764b434184..7582bb3fb634b 100644 +index 4771701c896b..c79270aba792 100644 --- a/fs/read_write.c +++ b/fs/read_write.c -@@ -503,6 +503,7 @@ ssize_t vfs_read(struct file *file, char __user *buf, size_t count, loff_t *pos) +@@ -477,6 +477,7 @@ ssize_t vfs_read(struct file *file, char __user *buf, size_t count, loff_t *pos) inc_syscr(current); return ret; } @@ -141,7 +121,7 @@ index 75f764b434184..7582bb3fb634b 100644 static ssize_t new_sync_write(struct file *filp, const char __user *buf, size_t len, loff_t *ppos) { -@@ -613,6 +614,7 @@ ssize_t vfs_write(struct file *file, const char __user *buf, size_t count, loff_ +@@ -592,6 +593,7 @@ ssize_t vfs_write(struct file *file, const char __user *buf, size_t count, loff_ file_end_write(file); return ret; } @@ -150,42 +130,22 @@ index 75f764b434184..7582bb3fb634b 100644 /* file_ppos returns &file->f_pos or NULL if file is stream */ static inline loff_t *file_ppos(struct file *file) diff --git a/fs/splice.c b/fs/splice.c -index 55b5356262085..c13ac0fbac318 100644 +index 7216ef993b5f..7ce1f1bc4268 100644 --- a/fs/splice.c +++ b/fs/splice.c -@@ -763,6 +763,7 @@ long do_splice_from(struct pipe_inode_info *pipe, struct file *out, +@@ -932,6 +932,7 @@ long do_splice_from(struct pipe_inode_info *pipe, struct file *out, return warn_unsupported(out, "write"); return out->f_op->splice_write(pipe, out, ppos, len, flags); } +EXPORT_SYMBOL_GPL(do_splice_from); /* - * Attempt to initiate a splice from a file to a pipe. -@@ -787,6 +788,7 @@ long do_splice_to(struct file *in, loff_t *ppos, - return warn_unsupported(in, "read"); - return in->f_op->splice_read(in, ppos, pipe, len, flags); - } -+EXPORT_SYMBOL_GPL(do_splice_to); - - /** - * splice_direct_to_actor - splices data directly between two non-pipes -diff --git a/fs/sync.c b/fs/sync.c -index b7b5a0a0df6ff..fa5c7fba7f1ba 100644 ---- a/fs/sync.c -+++ b/fs/sync.c -@@ -39,6 +39,7 @@ int __sync_filesystem(struct super_block *sb, int wait) - sb->s_op->sync_fs(sb, wait); - return __sync_blockdev(sb->s_bdev, wait); - } -+EXPORT_SYMBOL_GPL(__sync_filesystem); - - /* - * Write out and wait upon all dirty data associated with this + * Indicate to the caller that there was a premature EOF when reading from the diff --git a/fs/xattr.c b/fs/xattr.c -index cd7a563e8bcd4..7d989d57b0f0d 100644 +index efd4736bc94b..ce1a2c39ab23 100644 --- a/fs/xattr.c +++ b/fs/xattr.c -@@ -360,6 +360,7 @@ vfs_getxattr_alloc(struct dentry *dentry, const char *name, char **xattr_value, +@@ -406,6 +406,7 @@ vfs_getxattr_alloc(struct mnt_idmap *idmap, struct dentry *dentry, *xattr_value = value; return error; } @@ -194,10 +154,10 @@ index cd7a563e8bcd4..7d989d57b0f0d 100644 ssize_t __vfs_getxattr(struct dentry *dentry, struct inode *inode, const char *name, diff --git a/kernel/locking/lockdep.c b/kernel/locking/lockdep.c -index 7f006a47790cf..be002c3a30833 100644 +index db4297f60bd3..9aca18312afb 100644 --- a/kernel/locking/lockdep.c +++ b/kernel/locking/lockdep.c -@@ -209,6 +209,7 @@ inline struct lock_class *lockdep_hlock_class(struct held_lock *hlock) +@@ -239,6 +239,7 @@ inline struct lock_class *lockdep_hlock_class(struct held_lock *hlock) */ return lock_classes + class_idx; } @@ -206,79 +166,79 @@ index 7f006a47790cf..be002c3a30833 100644 #ifdef CONFIG_LOCK_STAT diff --git a/kernel/task_work.c b/kernel/task_work.c -index 8d6e1217c451c..0e73637adda86 100644 +index 95a7e1b7f1da..5053670775d3 100644 --- a/kernel/task_work.c +++ b/kernel/task_work.c -@@ -154,3 +154,4 @@ void task_work_run(void) +@@ -183,3 +183,4 @@ void task_work_run(void) } while (work); } } +EXPORT_SYMBOL_GPL(task_work_run); diff --git a/security/security.c b/security/security.c -index a28045dc9e7f6..310cf38efeec7 100644 +index 23b129d482a7..fca4c5707a1c 100644 --- a/security/security.c +++ b/security/security.c -@@ -1093,6 +1093,7 @@ int security_path_rmdir(const struct path *dir, struct dentry *dentry) +@@ -1750,6 +1750,7 @@ int security_path_rmdir(const struct path *dir, struct dentry *dentry) return 0; return call_int_hook(path_rmdir, 0, dir, dentry); } +EXPORT_SYMBOL_GPL(security_path_rmdir); - int security_path_unlink(const struct path *dir, struct dentry *dentry) - { -@@ -1109,6 +1110,7 @@ int security_path_symlink(const struct path *dir, struct dentry *dentry, + /** + * security_path_unlink() - Check if removing a hard link is allowed +@@ -1785,6 +1786,7 @@ int security_path_symlink(const struct path *dir, struct dentry *dentry, return 0; return call_int_hook(path_symlink, 0, dir, dentry, old_name); } +EXPORT_SYMBOL_GPL(security_path_symlink); - int security_path_link(struct dentry *old_dentry, const struct path *new_dir, - struct dentry *new_dentry) -@@ -1117,6 +1119,7 @@ int security_path_link(struct dentry *old_dentry, const struct path *new_dir, + /** + * security_path_link - Check if creating a hard link is allowed +@@ -1803,6 +1805,7 @@ int security_path_link(struct dentry *old_dentry, const struct path *new_dir, return 0; return call_int_hook(path_link, 0, old_dentry, new_dir, new_dentry); } +EXPORT_SYMBOL_GPL(security_path_link); - int security_path_rename(const struct path *old_dir, struct dentry *old_dentry, - const struct path *new_dir, struct dentry *new_dentry, -@@ -1144,6 +1147,7 @@ int security_path_truncate(const struct path *path) - return 0; - return call_int_hook(path_truncate, 0, path); - } -+EXPORT_SYMBOL_GPL(security_path_truncate); - - int security_path_chmod(const struct path *path, umode_t mode) - { -@@ -1151,6 +1155,7 @@ int security_path_chmod(const struct path *path, umode_t mode) + /** + * security_path_rename() - Check if renaming a file is allowed +@@ -1864,6 +1867,7 @@ int security_path_chmod(const struct path *path, umode_t mode) return 0; return call_int_hook(path_chmod, 0, path, mode); } +EXPORT_SYMBOL_GPL(security_path_chmod); - int security_path_chown(const struct path *path, kuid_t uid, kgid_t gid) - { -@@ -1158,6 +1163,7 @@ int security_path_chown(const struct path *path, kuid_t uid, kgid_t gid) + /** + * security_path_chown() - Check if changing the file's owner/group is allowed +@@ -1881,6 +1885,7 @@ int security_path_chown(const struct path *path, kuid_t uid, kgid_t gid) return 0; return call_int_hook(path_chown, 0, path, uid, gid); } +EXPORT_SYMBOL_GPL(security_path_chown); - int security_path_chroot(const struct path *path) - { -@@ -1258,6 +1264,7 @@ int security_inode_permission(struct inode *inode, int mask) + /** + * security_path_chroot() - Check if changing the root directory is allowed +@@ -2110,6 +2115,7 @@ int security_inode_permission(struct inode *inode, int mask) return 0; return call_int_hook(inode_permission, 0, inode, mask); } +EXPORT_SYMBOL_GPL(security_inode_permission); - int security_inode_setattr(struct dentry *dentry, struct iattr *attr) - { -@@ -1450,6 +1457,7 @@ int security_file_permission(struct file *file, int mask) + /** + * security_inode_setattr() - Check if setting file attributes is allowed +@@ -2588,6 +2594,7 @@ int security_file_permission(struct file *file, int mask) return fsnotify_perm(file, mask); } +EXPORT_SYMBOL_GPL(security_file_permission); - int security_file_alloc(struct file *file) + /** + * security_file_alloc() - Allocate and init a file's LSM blob +@@ -2854,6 +2861,7 @@ int security_file_truncate(struct file *file) { + return call_int_hook(file_truncate, 0, file); + } ++EXPORT_SYMBOL_GPL(security_file_truncate); + + /** + * security_task_alloc() - Allocate a task's LSM blob diff --git a/kernel/tools/cpupowertools/files/patches/mageia/fs-aufs5.15.patch b/kernel/tools/cpupowertools/files/patches/aufs6/aufs6.6-20240226.patch similarity index 90% rename from kernel/tools/cpupowertools/files/patches/mageia/fs-aufs5.15.patch rename to kernel/tools/cpupowertools/files/patches/aufs6/aufs6.6-20240226.patch index 3484d64f..25b91aa1 100644 --- a/kernel/tools/cpupowertools/files/patches/mageia/fs-aufs5.15.patch +++ b/kernel/tools/cpupowertools/files/patches/aufs6/aufs6.6-20240226.patch @@ -1,126 +1,6 @@ - - Documentation/ABI/testing/debugfs-aufs | 55 +++++ - Documentation/ABI/testing/sysfs-aufs | 31 ++ - Documentation/filesystems/aufs/README | 396 ++++++++++++++++++++++++++++++++++++ - Documentation/filesystems/aufs/design/01intro.txt | 158 ++++++++++++++ - Documentation/filesystems/aufs/design/02struct.txt | 245 ++++++++++++++++++++++ - Documentation/filesystems/aufs/design/03atomic_open.txt | 72 ++++++ - Documentation/filesystems/aufs/design/03lookup.txt | 100 +++++++++ - Documentation/filesystems/aufs/design/04branch.txt | 61 +++++ - Documentation/filesystems/aufs/design/05wbr_policy.txt | 51 ++++ - Documentation/filesystems/aufs/design/06dirren.dot | 31 ++ - Documentation/filesystems/aufs/design/06dirren.txt | 89 ++++++++ - Documentation/filesystems/aufs/design/06fhsm.txt | 105 +++++++++ - Documentation/filesystems/aufs/design/06mmap.txt | 59 +++++ - Documentation/filesystems/aufs/design/06xattr.txt | 81 +++++++ - Documentation/filesystems/aufs/design/07export.txt | 45 ++++ - Documentation/filesystems/aufs/design/08shwh.txt | 39 +++ - Documentation/filesystems/aufs/design/10dynop.txt | 34 +++ - MAINTAINERS | 13 + - drivers/block/loop.c | 18 + - fs/Kconfig | 1 - fs/Makefile | 1 - fs/aufs/Kconfig | 199 ++++++++++++++++++ - fs/aufs/Makefile | 39 +++ - fs/aufs/aufs.h | 49 ++++ - fs/aufs/branch.c | 1414 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ - fs/aufs/branch.h | 362 ++++++++++++++++++++++++++++++++ - fs/aufs/cpup.c | 1446 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ - fs/aufs/cpup.h | 87 +++++++ - fs/aufs/dbgaufs.c | 513 ++++++++++++++++++++++++++++++++++++++++++++++ - fs/aufs/dbgaufs.h | 40 +++ - fs/aufs/dcsub.c | 212 +++++++++++++++++++ - fs/aufs/dcsub.h | 124 +++++++++++ - fs/aufs/debug.c | 431 +++++++++++++++++++++++++++++++++++++++ - fs/aufs/debug.h | 213 +++++++++++++++++++ - fs/aufs/dentry.c | 1155 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ - fs/aufs/dentry.h | 256 +++++++++++++++++++++++ - fs/aufs/dinfo.c | 541 +++++++++++++++++++++++++++++++++++++++++++++++++ - fs/aufs/dir.c | 752 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ - fs/aufs/dir.h | 121 +++++++++++ - fs/aufs/dirren.c | 1302 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ - fs/aufs/dirren.h | 127 +++++++++++ - fs/aufs/dynop.c | 355 ++++++++++++++++++++++++++++++++ - fs/aufs/dynop.h | 64 +++++ - fs/aufs/export.c | 817 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ - fs/aufs/f_op.c | 758 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ - fs/aufs/fhsm.c | 413 +++++++++++++++++++++++++++++++++++++ - fs/aufs/file.c | 850 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ - fs/aufs/file.h | 329 +++++++++++++++++++++++++++++ - fs/aufs/finfo.c | 136 ++++++++++++ - fs/aufs/fsctx.c | 1229 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ - fs/aufs/fstype.h | 388 +++++++++++++++++++++++++++++++++++ - fs/aufs/hbl.h | 52 ++++ - fs/aufs/hfsnotify.c | 276 +++++++++++++++++++++++++ - fs/aufs/hfsplus.c | 47 ++++ - fs/aufs/hnotify.c | 702 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ - fs/aufs/i_op.c | 1499 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ - fs/aufs/i_op_add.c | 928 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ - fs/aufs/i_op_del.c | 509 ++++++++++++++++++++++++++++++++++++++++++++++ - fs/aufs/i_op_ren.c | 1244 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ - fs/aufs/iinfo.c | 273 ++++++++++++++++++++++++ - fs/aufs/inode.c | 518 +++++++++++++++++++++++++++++++++++++++++++++++ - fs/aufs/inode.h | 692 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ - fs/aufs/ioctl.c | 207 ++++++++++++++++++ - fs/aufs/lcnt.h | 173 +++++++++++++++ - fs/aufs/loop.c | 135 ++++++++++++ - fs/aufs/loop.h | 42 +++ - fs/aufs/magic.mk | 31 ++ - fs/aufs/module.c | 259 +++++++++++++++++++++++ - fs/aufs/module.h | 153 +++++++++++++ - fs/aufs/mvdown.c | 693 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ - fs/aufs/opts.c | 1019 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ - fs/aufs/opts.h | 250 ++++++++++++++++++++++ - fs/aufs/plink.c | 503 +++++++++++++++++++++++++++++++++++++++++++++ - fs/aufs/poll.c | 38 +++ - fs/aufs/posix_acl.c | 98 ++++++++ - fs/aufs/procfs.c | 157 ++++++++++++++ - fs/aufs/rdu.c | 371 +++++++++++++++++++++++++++++++++ - fs/aufs/rwsem.h | 72 ++++++ - fs/aufs/sbinfo.c | 303 +++++++++++++++++++++++++++ - fs/aufs/super.c | 858 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ - fs/aufs/super.h | 579 ++++++++++++++++++++++++++++++++++++++++++++++++++++ - fs/aufs/sysaufs.c | 80 +++++++ - fs/aufs/sysaufs.h | 89 ++++++++ - fs/aufs/sysfs.c | 338 ++++++++++++++++++++++++++++++ - fs/aufs/sysrq.c | 136 ++++++++++++ - fs/aufs/vdir.c | 883 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ - fs/aufs/vfsub.c | 905 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ - fs/aufs/vfsub.h | 345 +++++++++++++++++++++++++++++++ - fs/aufs/wbr_policy.c | 817 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ - fs/aufs/whout.c | 1059 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ - fs/aufs/whout.h | 74 ++++++ - fs/aufs/wkq.c | 359 ++++++++++++++++++++++++++++++++ - fs/aufs/wkq.h | 76 ++++++ - fs/aufs/xattr.c | 355 ++++++++++++++++++++++++++++++++ - fs/aufs/xino.c | 1913 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ - fs/dcache.c | 2 - fs/fcntl.c | 4 - fs/namespace.c | 6 - fs/proc/base.c | 2 - fs/proc/nommu.c | 5 - fs/proc/task_mmu.c | 7 - fs/proc/task_nommu.c | 5 - fs/splice.c | 10 - include/linux/fs.h | 4 - include/linux/lockdep.h | 2 - include/linux/mm.h | 37 +++ - include/linux/mm_types.h | 6 - include/linux/mnt_namespace.h | 3 - include/linux/splice.h | 6 - include/uapi/linux/aufs_type.h | 439 +++++++++++++++++++++++++++++++++++++++ - kernel/fork.c | 2 - kernel/locking/lockdep.c | 3 - mm/Makefile | 1 - mm/filemap.c | 2 - mm/mmap.c | 39 +++ - mm/nommu.c | 10 - mm/prfile.c | 86 +++++++ - 117 files changed, 37172 insertions(+), 26 deletions(-) - -diff -Nurp linux-5.15.37/Documentation/ABI/testing/debugfs-aufs linux-5.15.37-aufs/Documentation/ABI/testing/debugfs-aufs ---- linux-5.15.37/Documentation/ABI/testing/debugfs-aufs 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/Documentation/ABI/testing/debugfs-aufs 2022-04-08 20:22:30.608616279 +0300 +diff -Naur null/Documentation/ABI/testing/debugfs-aufs linux-6.6.4/Documentation/ABI/testing/debugfs-aufs +--- /dev/null ++++ linux-6.6.4/Documentation/ABI/testing/debugfs-aufs 2024-04-28 23:21:13.835237390 +0300 @@ -0,0 +1,55 @@ +What: /debug/aufs/si_/ +Date: March 2009 @@ -177,9 +57,9 @@ diff -Nurp linux-5.15.37/Documentation/ABI/testing/debugfs-aufs linux-5.15.37-au + be created. + When the aufs mount option 'noxino' is specified, it + will be empty. About XINO files, see the aufs manual. -diff -Nurp linux-5.15.37/Documentation/ABI/testing/sysfs-aufs linux-5.15.37-aufs/Documentation/ABI/testing/sysfs-aufs ---- linux-5.15.37/Documentation/ABI/testing/sysfs-aufs 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/Documentation/ABI/testing/sysfs-aufs 2022-04-08 20:22:30.608616279 +0300 +diff -Naur null/Documentation/ABI/testing/sysfs-aufs linux-6.6.4/Documentation/ABI/testing/sysfs-aufs +--- /dev/null ++++ linux-6.6.4/Documentation/ABI/testing/sysfs-aufs 2024-04-28 23:21:13.835237390 +0300 @@ -0,0 +1,31 @@ +What: /sys/fs/aufs/si_/ +Date: March 2009 @@ -212,12 +92,25 @@ diff -Nurp linux-5.15.37/Documentation/ABI/testing/sysfs-aufs linux-5.15.37-aufs + even if it is the default path. + When the aufs mount option 'noxino' is specified, it + will be empty. About XINO files, see the aufs manual. -diff -Nurp linux-5.15.37/Documentation/filesystems/aufs/design/01intro.txt linux-5.15.37-aufs/Documentation/filesystems/aufs/design/01intro.txt ---- linux-5.15.37/Documentation/filesystems/aufs/design/01intro.txt 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/Documentation/filesystems/aufs/design/01intro.txt 2022-04-08 20:22:30.609616328 +0300 -@@ -0,0 +1,158 @@ +diff -Naur null/Documentation/filesystems/aufs/design/01intro.txt linux-6.6.4/Documentation/filesystems/aufs/design/01intro.txt +--- /dev/null ++++ linux-6.6.4/Documentation/filesystems/aufs/design/01intro.txt 2024-04-28 23:21:13.835237390 +0300 +@@ -0,0 +1,171 @@ + -+# Copyright (C) 2005-2021 Junjiro R. Okajima ++# Copyright (C) 2005-2022 Junjiro R. Okajima ++# ++# This program is free software; you can redistribute it and/or modify ++# it under the terms of the GNU General Public License as published by ++# the Free Software Foundation; either version 2 of the License, or ++# (at your option) any later version. ++# ++# This program is distributed in the hope that it will be useful, ++# but WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++# GNU General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with this program. If not, see . + +Introduction +---------------------------------------- @@ -374,12 +267,25 @@ diff -Nurp linux-5.15.37/Documentation/filesystems/aufs/design/01intro.txt linux +Some people may think it is better to pass such work to user space +helper, instead of doing in kernel space. Actually I am still thinking +about it. But currently I have implemented it in kernel space. -diff -Nurp linux-5.15.37/Documentation/filesystems/aufs/design/02struct.txt linux-5.15.37-aufs/Documentation/filesystems/aufs/design/02struct.txt ---- linux-5.15.37/Documentation/filesystems/aufs/design/02struct.txt 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/Documentation/filesystems/aufs/design/02struct.txt 2022-04-08 20:22:30.609616328 +0300 -@@ -0,0 +1,245 @@ +diff -Naur null/Documentation/filesystems/aufs/design/02struct.txt linux-6.6.4/Documentation/filesystems/aufs/design/02struct.txt +--- /dev/null ++++ linux-6.6.4/Documentation/filesystems/aufs/design/02struct.txt 2024-04-28 23:21:13.836237377 +0300 +@@ -0,0 +1,258 @@ + -+# Copyright (C) 2005-2021 Junjiro R. Okajima ++# Copyright (C) 2005-2022 Junjiro R. Okajima ++# ++# This program is free software; you can redistribute it and/or modify ++# it under the terms of the GNU General Public License as published by ++# the Free Software Foundation; either version 2 of the License, or ++# (at your option) any later version. ++# ++# This program is distributed in the hope that it will be useful, ++# but WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++# GNU General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with this program. If not, see . + +Basic Aufs Internal Structure + @@ -623,12 +529,25 @@ diff -Nurp linux-5.15.37/Documentation/filesystems/aufs/design/02struct.txt linu +- etc. + +For this purpose, use "aumvdown" command in aufs-util.git. -diff -Nurp linux-5.15.37/Documentation/filesystems/aufs/design/03atomic_open.txt linux-5.15.37-aufs/Documentation/filesystems/aufs/design/03atomic_open.txt ---- linux-5.15.37/Documentation/filesystems/aufs/design/03atomic_open.txt 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/Documentation/filesystems/aufs/design/03atomic_open.txt 2022-04-08 20:22:30.609616328 +0300 -@@ -0,0 +1,72 @@ +diff -Naur null/Documentation/filesystems/aufs/design/03atomic_open.txt linux-6.6.4/Documentation/filesystems/aufs/design/03atomic_open.txt +--- /dev/null ++++ linux-6.6.4/Documentation/filesystems/aufs/design/03atomic_open.txt 2024-04-28 23:21:13.836237377 +0300 +@@ -0,0 +1,85 @@ + -+# Copyright (C) 2015-2021 Junjiro R. Okajima ++# Copyright (C) 2015-2022 Junjiro R. Okajima ++# ++# This program is free software; you can redistribute it and/or modify ++# it under the terms of the GNU General Public License as published by ++# the Free Software Foundation; either version 2 of the License, or ++# (at your option) any later version. ++# ++# This program is distributed in the hope that it will be useful, ++# but WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++# GNU General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with this program. If not, see . + +Support for a branch who has its ->atomic_open() +---------------------------------------------------------------------- @@ -699,12 +618,25 @@ diff -Nurp linux-5.15.37/Documentation/filesystems/aufs/design/03atomic_open.txt + ->atomic_open() are lost. in the ordinary case, the checks are + done by VFS:do_last(), lookup_open() and atomic_open(). some can + be implemented in aufs, but not all I am afraid. -diff -Nurp linux-5.15.37/Documentation/filesystems/aufs/design/03lookup.txt linux-5.15.37-aufs/Documentation/filesystems/aufs/design/03lookup.txt ---- linux-5.15.37/Documentation/filesystems/aufs/design/03lookup.txt 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/Documentation/filesystems/aufs/design/03lookup.txt 2022-04-08 20:22:30.609616328 +0300 -@@ -0,0 +1,100 @@ +diff -Naur null/Documentation/filesystems/aufs/design/03lookup.txt linux-6.6.4/Documentation/filesystems/aufs/design/03lookup.txt +--- /dev/null ++++ linux-6.6.4/Documentation/filesystems/aufs/design/03lookup.txt 2024-04-28 23:21:13.836237377 +0300 +@@ -0,0 +1,113 @@ + -+# Copyright (C) 2005-2021 Junjiro R. Okajima ++# Copyright (C) 2005-2022 Junjiro R. Okajima ++# ++# This program is free software; you can redistribute it and/or modify ++# it under the terms of the GNU General Public License as published by ++# the Free Software Foundation; either version 2 of the License, or ++# (at your option) any later version. ++# ++# This program is distributed in the hope that it will be useful, ++# but WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++# GNU General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with this program. If not, see . + +Lookup in a Branch +---------------------------------------------------------------------- @@ -803,12 +735,25 @@ diff -Nurp linux-5.15.37/Documentation/filesystems/aufs/design/03lookup.txt linu + test, and skip the revalidation in step 4. It is useful and improves + aufs performance when system surely hide the aufs branches from user, + by over-mounting something (or another method). -diff -Nurp linux-5.15.37/Documentation/filesystems/aufs/design/04branch.txt linux-5.15.37-aufs/Documentation/filesystems/aufs/design/04branch.txt ---- linux-5.15.37/Documentation/filesystems/aufs/design/04branch.txt 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/Documentation/filesystems/aufs/design/04branch.txt 2022-04-08 20:22:30.609616328 +0300 -@@ -0,0 +1,61 @@ +diff -Naur null/Documentation/filesystems/aufs/design/04branch.txt linux-6.6.4/Documentation/filesystems/aufs/design/04branch.txt +--- /dev/null ++++ linux-6.6.4/Documentation/filesystems/aufs/design/04branch.txt 2024-04-28 23:21:13.836237377 +0300 +@@ -0,0 +1,74 @@ + -+# Copyright (C) 2005-2021 Junjiro R. Okajima ++# Copyright (C) 2005-2022 Junjiro R. Okajima ++# ++# This program is free software; you can redistribute it and/or modify ++# it under the terms of the GNU General Public License as published by ++# the Free Software Foundation; either version 2 of the License, or ++# (at your option) any later version. ++# ++# This program is distributed in the hope that it will be useful, ++# but WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++# GNU General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with this program. If not, see . + +Branch Manipulation + @@ -868,12 +813,25 @@ diff -Nurp linux-5.15.37/Documentation/filesystems/aufs/design/04branch.txt linu + - a file on the branch is mmap-ed. + - a regular file on the branch is opened for write and there is no + same named entry on the upper branch. -diff -Nurp linux-5.15.37/Documentation/filesystems/aufs/design/05wbr_policy.txt linux-5.15.37-aufs/Documentation/filesystems/aufs/design/05wbr_policy.txt ---- linux-5.15.37/Documentation/filesystems/aufs/design/05wbr_policy.txt 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/Documentation/filesystems/aufs/design/05wbr_policy.txt 2022-04-08 20:22:30.609616328 +0300 -@@ -0,0 +1,51 @@ +diff -Naur null/Documentation/filesystems/aufs/design/05wbr_policy.txt linux-6.6.4/Documentation/filesystems/aufs/design/05wbr_policy.txt +--- /dev/null ++++ linux-6.6.4/Documentation/filesystems/aufs/design/05wbr_policy.txt 2024-04-28 23:21:13.836237377 +0300 +@@ -0,0 +1,64 @@ + -+# Copyright (C) 2005-2021 Junjiro R. Okajima ++# Copyright (C) 2005-2022 Junjiro R. Okajima ++# ++# This program is free software; you can redistribute it and/or modify ++# it under the terms of the GNU General Public License as published by ++# the Free Software Foundation; either version 2 of the License, or ++# (at your option) any later version. ++# ++# This program is distributed in the hope that it will be useful, ++# but WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++# GNU General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with this program. If not, see . + +Policies to Select One among Multiple Writable Branches +---------------------------------------------------------------------- @@ -923,12 +881,25 @@ diff -Nurp linux-5.15.37/Documentation/filesystems/aufs/design/05wbr_policy.txt + where the source and the target exists and selects the higher + one. If the selected branch is readonly, then aufs follows the + copyup policy. -diff -Nurp linux-5.15.37/Documentation/filesystems/aufs/design/06dirren.dot linux-5.15.37-aufs/Documentation/filesystems/aufs/design/06dirren.dot ---- linux-5.15.37/Documentation/filesystems/aufs/design/06dirren.dot 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/Documentation/filesystems/aufs/design/06dirren.dot 2022-04-08 20:22:30.609616328 +0300 -@@ -0,0 +1,31 @@ +diff -Naur null/Documentation/filesystems/aufs/design/06dirren.dot linux-6.6.4/Documentation/filesystems/aufs/design/06dirren.dot +--- /dev/null ++++ linux-6.6.4/Documentation/filesystems/aufs/design/06dirren.dot 2024-04-28 23:21:13.836237377 +0300 +@@ -0,0 +1,44 @@ + +// to view this graph, run dot(1) command in GRAPHVIZ. ++// ++// This program is free software; you can redistribute it and/or modify ++// it under the terms of the GNU General Public License as published by ++// the Free Software Foundation; either version 2 of the License, or ++// (at your option) any later version. ++// ++// This program is distributed in the hope that it will be useful, ++// but WITHOUT ANY WARRANTY; without even the implied warranty of ++// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++// GNU General Public License for more details. ++// ++// You should have received a copy of the GNU General Public License ++// along with this program. If not, see . + +digraph G { +node [shape=box]; @@ -958,12 +929,25 @@ diff -Nurp linux-5.15.37/Documentation/filesystems/aufs/design/06dirren.dot linu + +aufs_lookup -> whinfo [label="load/remove"]; +} -diff -Nurp linux-5.15.37/Documentation/filesystems/aufs/design/06dirren.txt linux-5.15.37-aufs/Documentation/filesystems/aufs/design/06dirren.txt ---- linux-5.15.37/Documentation/filesystems/aufs/design/06dirren.txt 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/Documentation/filesystems/aufs/design/06dirren.txt 2022-04-08 20:22:30.609616328 +0300 -@@ -0,0 +1,89 @@ +diff -Naur null/Documentation/filesystems/aufs/design/06dirren.txt linux-6.6.4/Documentation/filesystems/aufs/design/06dirren.txt +--- /dev/null ++++ linux-6.6.4/Documentation/filesystems/aufs/design/06dirren.txt 2024-04-28 23:21:13.836237377 +0300 +@@ -0,0 +1,102 @@ + -+# Copyright (C) 2017-2021 Junjiro R. Okajima ++# Copyright (C) 2017-2022 Junjiro R. Okajima ++# ++# This program is free software; you can redistribute it and/or modify ++# it under the terms of the GNU General Public License as published by ++# the Free Software Foundation; either version 2 of the License, or ++# (at your option) any later version. ++# ++# This program is distributed in the hope that it will be useful, ++# but WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++# GNU General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with this program. If not, see . + +Special handling for renaming a directory (DIRREN) +---------------------------------------------------------------------- @@ -1028,7 +1012,7 @@ diff -Nurp linux-5.15.37/Documentation/filesystems/aufs/design/06dirren.txt linu +simply the inode-numbers on the branch. The file is created or updated +in removing the branch, and loaded in adding the branch. Its lifetime is +equal to the branch. -+The list is refered in lookup, and when the current target inode is ++The list is referred in lookup, and when the current target inode is +found in the list, the aufs tries loading the "detailed info per +directory" and get the changed and valid name of the dir. + @@ -1051,12 +1035,25 @@ diff -Nurp linux-5.15.37/Documentation/filesystems/aufs/design/06dirren.txt linu +contains two names, before- and after-rename, the name comparision in +UDBA handler may not work correctly. In this case, the behaviour will be +equivalen to udba=reval case. -diff -Nurp linux-5.15.37/Documentation/filesystems/aufs/design/06fhsm.txt linux-5.15.37-aufs/Documentation/filesystems/aufs/design/06fhsm.txt ---- linux-5.15.37/Documentation/filesystems/aufs/design/06fhsm.txt 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/Documentation/filesystems/aufs/design/06fhsm.txt 2022-04-08 20:22:30.609616328 +0300 -@@ -0,0 +1,105 @@ +diff -Naur null/Documentation/filesystems/aufs/design/06fhsm.txt linux-6.6.4/Documentation/filesystems/aufs/design/06fhsm.txt +--- /dev/null ++++ linux-6.6.4/Documentation/filesystems/aufs/design/06fhsm.txt 2024-04-28 23:21:13.836237377 +0300 +@@ -0,0 +1,118 @@ + -+# Copyright (C) 2011-2021 Junjiro R. Okajima ++# Copyright (C) 2011-2022 Junjiro R. Okajima ++# ++# This program is free software; you can redistribute it and/or modify ++# it under the terms of the GNU General Public License as published by ++# the Free Software Foundation; either version 2 of the License, or ++# (at your option) any later version. ++# ++# This program is distributed in the hope that it will be useful, ++# but WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++# GNU General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with this program. If not, see . + +File-based Hierarchical Storage Management (FHSM) +---------------------------------------------------------------------- @@ -1160,12 +1157,25 @@ diff -Nurp linux-5.15.37/Documentation/filesystems/aufs/design/06fhsm.txt linux- + +And of course, in every step, an error may happen. So the operation +should restore the original file state after an error happens. -diff -Nurp linux-5.15.37/Documentation/filesystems/aufs/design/06mmap.txt linux-5.15.37-aufs/Documentation/filesystems/aufs/design/06mmap.txt ---- linux-5.15.37/Documentation/filesystems/aufs/design/06mmap.txt 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/Documentation/filesystems/aufs/design/06mmap.txt 2022-04-08 20:22:30.609616328 +0300 -@@ -0,0 +1,59 @@ +diff -Naur null/Documentation/filesystems/aufs/design/06mmap.txt linux-6.6.4/Documentation/filesystems/aufs/design/06mmap.txt +--- /dev/null ++++ linux-6.6.4/Documentation/filesystems/aufs/design/06mmap.txt 2024-04-28 23:21:13.836237377 +0300 +@@ -0,0 +1,72 @@ + -+# Copyright (C) 2005-2021 Junjiro R. Okajima ++# Copyright (C) 2005-2022 Junjiro R. Okajima ++# ++# This program is free software; you can redistribute it and/or modify ++# it under the terms of the GNU General Public License as published by ++# the Free Software Foundation; either version 2 of the License, or ++# (at your option) any later version. ++# ++# This program is distributed in the hope that it will be useful, ++# but WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++# GNU General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with this program. If not, see . + +mmap(2) -- File Memory Mapping +---------------------------------------------------------------------- @@ -1223,12 +1233,25 @@ diff -Nurp linux-5.15.37/Documentation/filesystems/aufs/design/06mmap.txt linux- + equivalent to vm_prfile described above. + +I have to give up this "looks-smater" approach. -diff -Nurp linux-5.15.37/Documentation/filesystems/aufs/design/06xattr.txt linux-5.15.37-aufs/Documentation/filesystems/aufs/design/06xattr.txt ---- linux-5.15.37/Documentation/filesystems/aufs/design/06xattr.txt 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/Documentation/filesystems/aufs/design/06xattr.txt 2022-04-08 20:22:30.609616328 +0300 -@@ -0,0 +1,81 @@ +diff -Naur null/Documentation/filesystems/aufs/design/06xattr.txt linux-6.6.4/Documentation/filesystems/aufs/design/06xattr.txt +--- /dev/null ++++ linux-6.6.4/Documentation/filesystems/aufs/design/06xattr.txt 2024-04-28 23:21:13.836237377 +0300 +@@ -0,0 +1,94 @@ + -+# Copyright (C) 2014-2021 Junjiro R. Okajima ++# Copyright (C) 2014-2022 Junjiro R. Okajima ++# ++# This program is free software; you can redistribute it and/or modify ++# it under the terms of the GNU General Public License as published by ++# the Free Software Foundation; either version 2 of the License, or ++# (at your option) any later version. ++# ++# This program is distributed in the hope that it will be useful, ++# but WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++# GNU General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with this program. If not, see . + +Listing XATTR/EA and getting the value +---------------------------------------------------------------------- @@ -1308,12 +1331,25 @@ diff -Nurp linux-5.15.37/Documentation/filesystems/aufs/design/06xattr.txt linux +Some contradiction may happen I am afraid. +Do we need another attribute to stop copying XATTR? I am unsure. For +now, aufs implements the branch attributes to ignore the error. -diff -Nurp linux-5.15.37/Documentation/filesystems/aufs/design/07export.txt linux-5.15.37-aufs/Documentation/filesystems/aufs/design/07export.txt ---- linux-5.15.37/Documentation/filesystems/aufs/design/07export.txt 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/Documentation/filesystems/aufs/design/07export.txt 2022-04-08 20:22:30.609616328 +0300 -@@ -0,0 +1,45 @@ +diff -Naur null/Documentation/filesystems/aufs/design/07export.txt linux-6.6.4/Documentation/filesystems/aufs/design/07export.txt +--- /dev/null ++++ linux-6.6.4/Documentation/filesystems/aufs/design/07export.txt 2024-04-28 23:21:13.836237377 +0300 +@@ -0,0 +1,58 @@ + -+# Copyright (C) 2005-2021 Junjiro R. Okajima ++# Copyright (C) 2005-2022 Junjiro R. Okajima ++# ++# This program is free software; you can redistribute it and/or modify ++# it under the terms of the GNU General Public License as published by ++# the Free Software Foundation; either version 2 of the License, or ++# (at your option) any later version. ++# ++# This program is distributed in the hope that it will be useful, ++# but WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++# GNU General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with this program. If not, see . + +Export Aufs via NFS +---------------------------------------------------------------------- @@ -1357,12 +1393,25 @@ diff -Nurp linux-5.15.37/Documentation/filesystems/aufs/design/07export.txt linu + convert it into ESTALE for NFSD. +- readdir(): call lockdep_on/off() because filldir in NFSD calls + lookup_one_len(), vfs_getattr(), encode_fh() and others. -diff -Nurp linux-5.15.37/Documentation/filesystems/aufs/design/08shwh.txt linux-5.15.37-aufs/Documentation/filesystems/aufs/design/08shwh.txt ---- linux-5.15.37/Documentation/filesystems/aufs/design/08shwh.txt 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/Documentation/filesystems/aufs/design/08shwh.txt 2022-04-08 20:22:30.609616328 +0300 -@@ -0,0 +1,39 @@ +diff -Naur null/Documentation/filesystems/aufs/design/08shwh.txt linux-6.6.4/Documentation/filesystems/aufs/design/08shwh.txt +--- /dev/null ++++ linux-6.6.4/Documentation/filesystems/aufs/design/08shwh.txt 2024-04-28 23:21:13.836237377 +0300 +@@ -0,0 +1,52 @@ + -+# Copyright (C) 2005-2021 Junjiro R. Okajima ++# Copyright (C) 2005-2022 Junjiro R. Okajima ++# ++# This program is free software; you can redistribute it and/or modify ++# it under the terms of the GNU General Public License as published by ++# the Free Software Foundation; either version 2 of the License, or ++# (at your option) any later version. ++# ++# This program is distributed in the hope that it will be useful, ++# but WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++# GNU General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with this program. If not, see . + +Show Whiteout Mode (shwh) +---------------------------------------------------------------------- @@ -1400,12 +1449,25 @@ diff -Nurp linux-5.15.37/Documentation/filesystems/aufs/design/08shwh.txt linux- + +This new squashfs archive can be stored on the boot device and the +initramfs will use it to replace the old one at the next boot. -diff -Nurp linux-5.15.37/Documentation/filesystems/aufs/design/10dynop.txt linux-5.15.37-aufs/Documentation/filesystems/aufs/design/10dynop.txt ---- linux-5.15.37/Documentation/filesystems/aufs/design/10dynop.txt 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/Documentation/filesystems/aufs/design/10dynop.txt 2022-04-08 20:22:30.609616328 +0300 -@@ -0,0 +1,34 @@ +diff -Naur null/Documentation/filesystems/aufs/design/10dynop.txt linux-6.6.4/Documentation/filesystems/aufs/design/10dynop.txt +--- /dev/null ++++ linux-6.6.4/Documentation/filesystems/aufs/design/10dynop.txt 2024-04-28 23:21:13.836237377 +0300 +@@ -0,0 +1,47 @@ + -+# Copyright (C) 2010-2021 Junjiro R. Okajima ++# Copyright (C) 2010-2022 Junjiro R. Okajima ++# ++# This program is free software; you can redistribute it and/or modify ++# it under the terms of the GNU General Public License as published by ++# the Free Software Foundation; either version 2 of the License, or ++# (at your option) any later version. ++# ++# This program is distributed in the hope that it will be useful, ++# but WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++# GNU General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with this program. If not, see . + +Dynamically customizable FS operations +---------------------------------------------------------------------- @@ -1438,12 +1500,12 @@ diff -Nurp linux-5.15.37/Documentation/filesystems/aufs/design/10dynop.txt linux +XIP (DAX) mainly. +Currently this approach is applied to address_space_operations for +regular files only. -diff -Nurp linux-5.15.37/Documentation/filesystems/aufs/README linux-5.15.37-aufs/Documentation/filesystems/aufs/README ---- linux-5.15.37/Documentation/filesystems/aufs/README 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/Documentation/filesystems/aufs/README 2022-04-08 20:22:30.608616279 +0300 -@@ -0,0 +1,396 @@ +diff -Naur null/Documentation/filesystems/aufs/README linux-6.6.4/Documentation/filesystems/aufs/README +--- /dev/null ++++ linux-6.6.4/Documentation/filesystems/aufs/README 2024-04-28 23:21:13.835237390 +0300 +@@ -0,0 +1,409 @@ + -+Aufs5 -- advanced multi layered unification filesystem version 5.x ++Aufs6 -- advanced multi layered unification filesystem version 6.x +http://aufs.sf.net +Junjiro R. Okajima + @@ -1459,13 +1521,19 @@ diff -Nurp linux-5.15.37/Documentation/filesystems/aufs/README linux-5.15.37-auf +Unionfs was being developed by Professor Erez Zadok at Stony Brook +University and his team. + -+Aufs5 supports linux-v5.0 and later, If you want older kernel version -+support, ++Aufs6 supports linux-v6.0 and later, try aufs6.0 branch in ++aufs-linux.git or aufs-standalone.git. ++If you want older kernel version support, ++- for linux-v5.x series, try aufs-linux.git or aufs-standalone.git +- for linux-v4.x series, try aufs4-linux.git or aufs4-standalone.git +- for linux-v3.x series, try aufs3-linux.git or aufs3-standalone.git +- for linux-v2.6.16 and later, try aufs2-2.6.git, aufs2-standalone.git + or aufs1 from CVS on SourceForge. + ++Note: the name of aufs5-linux.git and aufs5-standalone.git on github ++ were changed. Now they are aufs-linux.git and ++ aufs-standalone.git and they contain aufs5 and later branches. ++ +Note: it becomes clear that "Aufs was rejected. Let's give it up." + According to Christoph Hellwig, linux rejects all union-type + filesystems but UnionMount. @@ -1524,7 +1592,7 @@ diff -Nurp linux-5.15.37/Documentation/filesystems/aufs/README linux-5.15.37-auf +- userspace wrapper for pathconf(3)/fpathconf(3) with _PC_LINK_MAX. +- and more... + -+Currently these features are dropped temporary from aufs5. ++Currently these features are dropped temporary from aufs6. +See design/08plan.txt in detail. +- nested mount, i.e. aufs as readonly no-whiteout branch of another aufs + (robr) @@ -1542,64 +1610,63 @@ diff -Nurp linux-5.15.37/Documentation/filesystems/aufs/README linux-5.15.37-auf + +2. Download +---------------------------------------- -+There are three GIT trees for aufs5, aufs5-linux.git, -+aufs5-standalone.git, and aufs-util.git. Note that there is no "5" in -+"aufs-util.git." -+While the aufs-util is always necessary, you need either of aufs5-linux -+or aufs5-standalone. ++There are three GIT trees for aufs6, aufs-linux.git, ++aufs-standalone.git, and aufs-util.git. ++While the aufs-util is always necessary, you need either of aufs-linux ++or aufs-standalone. + -+The aufs5-linux tree includes the whole linux mainline GIT tree, ++The aufs-linux tree includes the whole linux mainline GIT tree, +git://git.kernel.org/.../torvalds/linux.git. +And you cannot select CONFIG_AUFS_FS=m for this version, eg. you cannot -+build aufs5 as an external kernel module. ++build aufs6 as an external kernel module. +Several extra patches are not included in this tree. Only -+aufs5-standalone tree contains them. They are described in the later ++aufs-standalone tree contains them. They are described in the later +section "Configuration and Compilation." + -+On the other hand, the aufs5-standalone tree has only aufs source files ++On the other hand, the aufs-standalone tree has only aufs source files +and necessary patches, and you can select CONFIG_AUFS_FS=m. +But you need to apply all aufs patches manually. + -+You will find GIT branches whose name is in form of "aufs5.x" where "x" -+represents the linux kernel version, "linux-5.x". For instance, -+"aufs5.0" is for linux-5.0. For latest "linux-5.x-rcN", use -+"aufs5.x-rcN" branch. ++You will find GIT branches whose name is in form of "aufs6.x" where "x" ++represents the linux kernel version, "linux-6.x". For instance, ++"aufs6.0" is for linux-6.0. For latest "linux-6.x-rcN", use ++"aufs6.x-rcN" branch. + -+o aufs5-linux tree ++o aufs-linux tree +$ git clone --reference /your/linux/git/tree \ -+ git://github.com/sfjro/aufs5-linux.git aufs5-linux.git ++ git://github.com/sfjro/aufs-linux.git aufs-linux.git +- if you don't have linux GIT tree, then remove "--reference ..." -+$ cd aufs5-linux.git -+$ git checkout origin/aufs5.0 ++$ cd aufs-linux.git ++$ git checkout origin/aufs6.0 + +Or You may want to directly git-pull aufs into your linux GIT tree, and +leave the patch-work to GIT. +$ cd /your/linux/git/tree -+$ git remote add aufs5 git://github.com/sfjro/aufs5-linux.git -+$ git fetch aufs5 -+$ git checkout -b my5.0 v5.0 ++$ git remote add aufs git://github.com/sfjro/aufs-linux.git ++$ git fetch aufs ++$ git checkout -b my6.0 v6.0 +$ (add your local change...) -+$ git pull aufs5 aufs5.0 -+- now you have v5.0 + your_changes + aufs5.0 in you my5.0 branch. ++$ git pull aufs aufs6.0 ++- now you have v6.0 + your_changes + aufs6.0 in you my6.0 branch. +- you may need to solve some conflicts between your_changes and -+ aufs5.0. in this case, git-rerere is recommended so that you can -+ solve the similar conflicts automatically when you upgrade to 5.1 or ++ aufs6.0. in this case, git-rerere is recommended so that you can ++ solve the similar conflicts automatically when you upgrade to 6.1 or + later in the future. + -+o aufs5-standalone tree -+$ git clone git://github.com/sfjro/aufs5-standalone.git aufs5-standalone.git -+$ cd aufs5-standalone.git -+$ git checkout origin/aufs5.0 ++o aufs-standalone tree ++$ git clone git://github.com/sfjro/aufs-standalone.git aufs-standalone.git ++$ cd aufs-standalone.git ++$ git checkout origin/aufs6.0 + +o aufs-util tree +$ git clone git://git.code.sf.net/p/aufs/aufs-util aufs-util.git +- note that the public aufs-util.git is on SourceForge instead of + GitHUB. +$ cd aufs-util.git -+$ git checkout origin/aufs5.0 ++$ git checkout origin/aufs6.0 + -+Note: The 5.x-rcN branch is to be used with `rc' kernel versions ONLY. -+The minor version number, 'x' in '5.x', of aufs may not always ++Note: The 6.x-rcN branch is to be used with `rc' kernel versions ONLY. ++The minor version number, 'x' in '6.x', of aufs may not always +follow the minor version number of the kernel. +Because changes in the kernel that cause the use of a new +minor version number do not always require changes to aufs-util. @@ -1611,8 +1678,8 @@ diff -Nurp linux-5.15.37/Documentation/filesystems/aufs/README linux-5.15.37-auf +nearest lower number. + +For (an unreleased) example: -+If you are using "linux-5.10" and the "aufs5.10" branch -+does not exist in aufs-util repository, then "aufs5.9", "aufs5.8" ++If you are using "linux-6.10" and the "aufs6.10" branch ++does not exist in aufs-util repository, then "aufs6.9", "aufs6.8" +or something numerically smaller is the branch for your kernel. + +Also you can view all branches by @@ -1623,7 +1690,7 @@ diff -Nurp linux-5.15.37/Documentation/filesystems/aufs/README linux-5.15.37-auf +---------------------------------------- +Make sure you have git-checkout'ed the correct branch. + -+For aufs5-linux tree, ++For aufs-linux tree, +- enable CONFIG_AUFS_FS. +- set other aufs configurations if necessary. +- for aufs5.13 and later @@ -1636,16 +1703,18 @@ diff -Nurp linux-5.15.37/Documentation/filesystems/aufs/README linux-5.15.37-auf + CONFIG_LOCKDEP_BITS=21 + CONFIG_LOCKDEP_CHAINS_BITS=21 + CONFIG_LOCKDEP_STACK_TRACE_BITS=24 ++ Also you will need to expand some constant values in LOCKDEP. Refer ++ to lockdep-debug.patch in aufs-standalone.git. + -+For aufs5-standalone tree, ++For aufs-standalone tree, +There are several ways to build. + +1. -+- apply ./aufs5-kbuild.patch to your kernel source files. -+- apply ./aufs5-base.patch too. -+- apply ./aufs5-mmap.patch too. -+- apply ./aufs5-standalone.patch too, if you have a plan to set -+ CONFIG_AUFS_FS=m. otherwise you don't need ./aufs5-standalone.patch. ++- apply ./aufs6-kbuild.patch to your kernel source files. ++- apply ./aufs6-base.patch too. ++- apply ./aufs6-mmap.patch too. ++- apply ./aufs6-standalone.patch too, if you have a plan to set ++ CONFIG_AUFS_FS=m. otherwise you don't need ./aufs-standalone.patch. +- copy ./{Documentation,fs,include/uapi/linux/aufs_type.h} files to your + kernel source tree. Never copy $PWD/include/uapi/linux/Kbuild. +- enable CONFIG_AUFS_FS, you can select either @@ -1659,9 +1728,9 @@ diff -Nurp linux-5.15.37/Documentation/filesystems/aufs/README linux-5.15.37-auf + +2. +- module only (CONFIG_AUFS_FS=m). -+- apply ./aufs5-base.patch to your kernel source files. -+- apply ./aufs5-mmap.patch too. -+- apply ./aufs5-standalone.patch too. ++- apply ./aufs6-base.patch to your kernel source files. ++- apply ./aufs6-mmap.patch too. ++- apply ./aufs6-standalone.patch too. +- build your kernel, don't forget "make headers_install", and reboot. +- edit ./config.mk and set other aufs configurations if necessary. + Note: You should read $PWD/fs/aufs/Kconfig carefully which describes @@ -1677,7 +1746,7 @@ diff -Nurp linux-5.15.37/Documentation/filesystems/aufs/README linux-5.15.37-auf + available in aufs standalone version's Makefile only), or copy + $PWD/usr/include/linux/aufs_type.h to /usr/include/linux or wherever + you like manually. By default, the target directory is $PWD/usr. -+- no need to apply aufs5-kbuild.patch, nor copying source files to your ++- no need to apply aufs6-kbuild.patch, nor copying source files to your + kernel source tree. + +Note: The header file aufs_type.h is necessary to build aufs-util @@ -1697,9 +1766,9 @@ diff -Nurp linux-5.15.37/Documentation/filesystems/aufs/README linux-5.15.37-auf + then run "make install_ulib" too. And refer to the aufs manual in + detail. + -+There several other patches in aufs5-standalone.git. They are all ++There several other patches in aufs-standalone.git. They are all +optional. When you meet some problems, they will help you. -+- aufs5-loopback.patch ++- aufs6-loopback.patch + Supports a nested loopback mount in a branch-fs. This patch is + unnecessary until aufs produces a message like "you may want to try + another patch for loopback file". @@ -1713,6 +1782,10 @@ diff -Nurp linux-5.15.37/Documentation/filesystems/aufs/README linux-5.15.37-auf + duplication of inode number, which is important for backup tools and + other utilities. When you find aufs XINO files for tmpfs branch + growing too much, try this patch. ++- lockdep-debug.patch ++ Similar to some kernel configurations for LOCKDEP (see the top of ++ this section), you will need expand some constants in LOCKDEP for ++ aufs if you enable CONFIG_LOCKDEP. + + +4. Usage @@ -1821,6 +1894,8 @@ diff -Nurp linux-5.15.37/Documentation/filesystems/aufs/README linux-5.15.37-auf +James Burry made a donation (2016/12). +Carsten Rose made a donation (2018/9). +Porteus Kiosk made a donation (2018/10). ++huronOS team: Enya Quetzalli made donations (2022/5, 2023/5 and 8). ++Vasily Mikhaylichenko made a donation (2023/5). + +Thank you very much. +Donations are always, including future donations, very important and @@ -1838,41 +1913,26 @@ diff -Nurp linux-5.15.37/Documentation/filesystems/aufs/README linux-5.15.37-auf +# Local variables: ; +# mode: text; +# End: ; -diff -Nurp linux-5.15.37/drivers/block/loop.c linux-5.15.37-aufs/drivers/block/loop.c ---- linux-5.15.37/drivers/block/loop.c 2022-04-08 20:07:30.626495709 +0300 -+++ linux-5.15.37-aufs/drivers/block/loop.c 2022-04-08 20:22:30.610616377 +0300 -@@ -636,6 +636,24 @@ out_putf: - return error; - } - -+/* -+ * for AUFS -+ * no get/put for file. -+ */ -+struct file *loop_backing_file(struct super_block *sb) -+{ -+ struct file *ret; -+ struct loop_device *l; -+ -+ ret = NULL; -+ if (MAJOR(sb->s_dev) == LOOP_MAJOR) { -+ l = sb->s_bdev->bd_disk->private_data; -+ ret = l->lo_backing_file; -+ } -+ return ret; -+} -+EXPORT_SYMBOL_GPL(loop_backing_file); -+ - /* loop sysfs attributes */ - - static ssize_t loop_attr_show(struct device *dev, char *page, -diff -Nurp linux-5.15.37/fs/aufs/aufs.h linux-5.15.37-aufs/fs/aufs/aufs.h ---- linux-5.15.37/fs/aufs/aufs.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/aufs.h 2022-04-08 20:22:30.611616426 +0300 -@@ -0,0 +1,49 @@ +diff -Naur null/fs/aufs/aufs.h linux-6.6.4/fs/aufs/aufs.h +--- /dev/null ++++ linux-6.6.4/fs/aufs/aufs.h 2024-04-28 23:21:13.837237365 +0300 +@@ -0,0 +1,62 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -1919,13 +1979,26 @@ diff -Nurp linux-5.15.37/fs/aufs/aufs.h linux-5.15.37-aufs/fs/aufs/aufs.h + +#endif /* __KERNEL__ */ +#endif /* __AUFS_H__ */ -diff -Nurp linux-5.15.37/fs/aufs/branch.c linux-5.15.37-aufs/fs/aufs/branch.c ---- linux-5.15.37/fs/aufs/branch.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/branch.c 2022-04-08 20:22:30.611616426 +0300 -@@ -0,0 +1,1414 @@ +diff -Naur null/fs/aufs/branch.c linux-6.6.4/fs/aufs/branch.c +--- /dev/null ++++ linux-6.6.4/fs/aufs/branch.c 2024-04-28 23:21:13.838237352 +0300 +@@ -0,0 +1,1427 @@ +// SPDX-License-Identifier: GPL-2.0 +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -3191,7 +3264,7 @@ diff -Nurp linux-5.15.37/fs/aufs/branch.c linux-5.15.37-aufs/fs/aufs/branch.c + * file_release_write() for each file, because the branch + * attribute in aufs world is totally different from the native + * fs rw/ro mode. -+ */ ++ */ + /* fi_read_lock(file); */ + hfile = &au_fi(file)->fi_htop; + hf = hfile->hf_file; @@ -3337,13 +3410,26 @@ diff -Nurp linux-5.15.37/fs/aufs/branch.c linux-5.15.37-aufs/fs/aufs/branch.c + + return err; +} -diff -Nurp linux-5.15.37/fs/aufs/branch.h linux-5.15.37-aufs/fs/aufs/branch.h ---- linux-5.15.37/fs/aufs/branch.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/branch.h 2022-04-08 20:22:30.611616426 +0300 -@@ -0,0 +1,362 @@ +diff -Naur null/fs/aufs/branch.h linux-6.6.4/fs/aufs/branch.h +--- /dev/null ++++ linux-6.6.4/fs/aufs/branch.h 2024-04-28 23:21:13.838237352 +0300 +@@ -0,0 +1,375 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -3476,9 +3562,9 @@ diff -Nurp linux-5.15.37/fs/aufs/branch.h linux-5.15.37-aufs/fs/aufs/branch.h + return br->br_path.dentry; +} + -+static inline struct user_namespace *au_br_userns(struct au_branch *br) ++static inline struct mnt_idmap *au_br_idmap(struct au_branch *br) +{ -+ return mnt_user_ns(br->br_path.mnt); ++ return mnt_idmap(br->br_path.mnt); +} + +static inline struct super_block *au_br_sb(struct au_branch *br) @@ -3640,9 +3726,9 @@ diff -Nurp linux-5.15.37/fs/aufs/branch.h linux-5.15.37-aufs/fs/aufs/branch.h +} + +static inline -+struct user_namespace *au_sbr_userns(struct super_block *sb, aufs_bindex_t bindex) ++struct mnt_idmap *au_sbr_idmap(struct super_block *sb, aufs_bindex_t bindex) +{ -+ return au_br_userns(au_sbr(sb, bindex)); ++ return au_br_idmap(au_sbr(sb, bindex)); +} + +static inline @@ -3703,13 +3789,70 @@ diff -Nurp linux-5.15.37/fs/aufs/branch.h linux-5.15.37-aufs/fs/aufs/branch.h + +#endif /* __KERNEL__ */ +#endif /* __AUFS_BRANCH_H__ */ -diff -Nurp linux-5.15.37/fs/aufs/cpup.c linux-5.15.37-aufs/fs/aufs/cpup.c ---- linux-5.15.37/fs/aufs/cpup.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/cpup.c 2022-04-08 20:22:30.611616426 +0300 -@@ -0,0 +1,1446 @@ +diff -Naur null/fs/aufs/conf.mk linux-6.6.4/fs/aufs/conf.mk +--- /dev/null ++++ linux-6.6.4/fs/aufs/conf.mk 2024-04-28 23:21:13.838237352 +0300 +@@ -0,0 +1,40 @@ ++# SPDX-License-Identifier: GPL-2.0 ++ ++AuConfStr = CONFIG_AUFS_FS=${CONFIG_AUFS_FS} ++ ++define AuConf ++ifdef ${1} ++AuConfStr += ${1}=${${1}} ++endif ++endef ++ ++AuConfAll = BRANCH_MAX_127 BRANCH_MAX_511 BRANCH_MAX_1023 BRANCH_MAX_32767 \ ++ SBILIST \ ++ HNOTIFY HFSNOTIFY \ ++ EXPORT INO_T_64 \ ++ XATTR \ ++ FHSM \ ++ RDU \ ++ DIRREN \ ++ SHWH \ ++ BR_RAMFS \ ++ BR_FUSE POLL \ ++ BR_HFSPLUS \ ++ BDEV_LOOP \ ++ DEBUG MAGIC_SYSRQ ++$(foreach i, ${AuConfAll}, \ ++ $(eval $(call AuConf,CONFIG_AUFS_${i}))) ++ ++AuConfName = ${obj}/conf.str ++${AuConfName}.tmp: FORCE ++ @echo ${AuConfStr} | tr ' ' '\n' | sed -e 's/^/"/' -e 's/$$/\\n"/' > $@ ++${AuConfName}: ${AuConfName}.tmp ++ @diff -q $< $@ > /dev/null 2>&1 || { \ ++ echo ' GEN ' $@; \ ++ cp -p $< $@; \ ++ } ++FORCE: ++clean-files += ${AuConfName} ${AuConfName}.tmp ++${obj}/sysfs.o: ${AuConfName} ++ ++-include ${srctree}/${src}/conf_priv.mk +diff -Naur null/fs/aufs/cpup.c linux-6.6.4/fs/aufs/cpup.c +--- /dev/null ++++ linux-6.6.4/fs/aufs/cpup.c 2024-04-28 23:21:13.838237352 +0300 +@@ -0,0 +1,1459 @@ +// SPDX-License-Identifier: GPL-2.0 +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -4285,23 +4428,23 @@ diff -Nurp linux-5.15.37/fs/aufs/cpup.c linux-5.15.37-aufs/fs/aufs/cpup.c + * regardless 'acl' option, reset all ACL. + * All ACL will be copied up later from the original entry on the lower branch. + */ -+static int au_reset_acl(struct inode *h_dir, struct path *h_path, umode_t mode) ++static int au_reset_acl(struct path *h_path, umode_t mode) +{ + int err; + struct dentry *h_dentry; -+ struct inode *h_inode; -+ struct user_namespace *h_userns; ++ /* struct inode *h_inode; */ ++ struct mnt_idmap *h_idmap; + -+ h_userns = mnt_user_ns(h_path->mnt); ++ h_idmap = mnt_idmap(h_path->mnt); + h_dentry = h_path->dentry; -+ h_inode = d_inode(h_dentry); ++ /* h_inode = d_inode(h_dentry); */ + /* forget_all_cached_acls(h_inode)); */ -+ err = vfsub_removexattr(h_userns, h_dentry, XATTR_NAME_POSIX_ACL_ACCESS); ++ err = vfsub_remove_acl(h_idmap, h_dentry, XATTR_NAME_POSIX_ACL_ACCESS); + AuTraceErr(err); + if (err == -EOPNOTSUPP) + err = 0; + if (!err) -+ err = vfsub_acl_chmod(h_userns, h_inode, mode); ++ err = vfsub_acl_chmod(h_idmap, h_dentry, mode); + + AuTraceErr(err); + return err; @@ -4312,11 +4455,11 @@ diff -Nurp linux-5.15.37/fs/aufs/cpup.c linux-5.15.37-aufs/fs/aufs/cpup.c +{ + int err; + struct inode *dir, *inode; -+ struct user_namespace *h_userns; ++ struct mnt_idmap *h_idmap; + -+ h_userns = mnt_user_ns(h_path->mnt); -+ err = vfsub_removexattr(h_userns, h_path->dentry, -+ XATTR_NAME_POSIX_ACL_DEFAULT); ++ h_idmap = mnt_idmap(h_path->mnt); ++ err = vfsub_remove_acl(h_idmap, h_path->dentry, ++ XATTR_NAME_POSIX_ACL_DEFAULT); + AuTraceErr(err); + if (err == -EOPNOTSUPP) + err = 0; @@ -4407,7 +4550,7 @@ diff -Nurp linux-5.15.37/fs/aufs/cpup.c linux-5.15.37-aufs/fs/aufs/cpup.c + err = -EIO; + } + if (!err) -+ err = au_reset_acl(h_dir, &h_path, mode); ++ err = au_reset_acl(&h_path, mode); + + mnt_flags = au_mntflags(sb); + if (!au_opt_test(mnt_flags, UDBA_NONE) @@ -4795,7 +4938,7 @@ diff -Nurp linux-5.15.37/fs/aufs/cpup.c linux-5.15.37-aufs/fs/aufs/cpup.c + struct dentry *dentry, *parent; + struct file *h_file; + struct inode *h_dir; -+ struct user_namespace *h_userns; ++ struct mnt_idmap *h_idmap; + + dentry = cpg->dentry; + h_file = NULL; @@ -4809,8 +4952,8 @@ diff -Nurp linux-5.15.37/fs/aufs/cpup.c linux-5.15.37-aufs/fs/aufs/cpup.c + + parent = dget_parent(dentry); + h_dir = au_h_iptr(d_inode(parent), cpg->bdst); -+ h_userns = au_sbr_userns(dentry->d_sb, cpg->bdst); -+ if (!au_test_h_perm_sio(h_userns, h_dir, MAY_EXEC | MAY_WRITE) ++ h_idmap = au_sbr_idmap(dentry->d_sb, cpg->bdst); ++ if (!au_test_h_perm_sio(h_idmap, h_dir, MAY_EXEC | MAY_WRITE) + && !au_cpup_sio_test(cpg->pin, d_inode(dentry)->i_mode)) + err = au_cpup_simple(cpg); + else { @@ -4980,7 +5123,7 @@ diff -Nurp linux-5.15.37/fs/aufs/cpup.c linux-5.15.37-aufs/fs/aufs/cpup.c + struct inode *dir, *h_dir, *h_tmpdir; + struct au_wbr *wbr; + struct au_pin wh_pin, *pin_orig; -+ struct user_namespace *h_userns; ++ struct mnt_idmap *h_idmap; + + dentry = cpg->dentry; + bdst = cpg->bdst; @@ -5009,8 +5152,8 @@ diff -Nurp linux-5.15.37/fs/aufs/cpup.c linux-5.15.37-aufs/fs/aufs/cpup.c + cpg->pin = &wh_pin; + } + -+ h_userns = au_sbr_userns(dentry->d_sb, bdst); -+ if (!au_test_h_perm_sio(h_userns, h_tmpdir, MAY_EXEC | MAY_WRITE) ++ h_idmap = au_sbr_idmap(dentry->d_sb, bdst); ++ if (!au_test_h_perm_sio(h_idmap, h_tmpdir, MAY_EXEC | MAY_WRITE) + && !au_cpup_sio_test(cpg->pin, d_inode(dentry)->i_mode)) + err = au_cpup_wh(cpg, file); + else { @@ -5153,13 +5296,26 @@ diff -Nurp linux-5.15.37/fs/aufs/cpup.c linux-5.15.37-aufs/fs/aufs/cpup.c + dput(parent); + return err; +} -diff -Nurp linux-5.15.37/fs/aufs/cpup.h linux-5.15.37-aufs/fs/aufs/cpup.h ---- linux-5.15.37/fs/aufs/cpup.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/cpup.h 2022-04-08 20:22:30.611616426 +0300 -@@ -0,0 +1,87 @@ +diff -Naur null/fs/aufs/cpup.h linux-6.6.4/fs/aufs/cpup.h +--- /dev/null ++++ linux-6.6.4/fs/aufs/cpup.h 2024-04-28 23:21:13.838237352 +0300 +@@ -0,0 +1,100 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -5244,13 +5400,26 @@ diff -Nurp linux-5.15.37/fs/aufs/cpup.h linux-5.15.37-aufs/fs/aufs/cpup.h + +#endif /* __KERNEL__ */ +#endif /* __AUFS_CPUP_H__ */ -diff -Nurp linux-5.15.37/fs/aufs/dbgaufs.c linux-5.15.37-aufs/fs/aufs/dbgaufs.c ---- linux-5.15.37/fs/aufs/dbgaufs.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/dbgaufs.c 2022-04-08 20:22:30.611616426 +0300 -@@ -0,0 +1,513 @@ +diff -Naur null/fs/aufs/dbgaufs.c linux-6.6.4/fs/aufs/dbgaufs.c +--- /dev/null ++++ linux-6.6.4/fs/aufs/dbgaufs.c 2024-04-28 23:21:13.838237352 +0300 +@@ -0,0 +1,526 @@ +// SPDX-License-Identifier: GPL-2.0 +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -5401,7 +5570,7 @@ diff -Nurp linux-5.15.37/fs/aufs/dbgaufs.c linux-5.15.37-aufs/fs/aufs/dbgaufs.c + } else { +#define str "1\n0\n0\n" + p->n = sizeof(str) - 1; -+ strcpy(p->a, str); ++ strscpy(p->a, str, sizeof(str)); +#undef str + } + si_read_unlock(sb); @@ -5761,13 +5930,26 @@ diff -Nurp linux-5.15.37/fs/aufs/dbgaufs.c linux-5.15.37-aufs/fs/aufs/dbgaufs.c + err = 0; + return err; +} -diff -Nurp linux-5.15.37/fs/aufs/dbgaufs.h linux-5.15.37-aufs/fs/aufs/dbgaufs.h ---- linux-5.15.37/fs/aufs/dbgaufs.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/dbgaufs.h 2022-04-08 20:22:30.611616426 +0300 -@@ -0,0 +1,40 @@ +diff -Naur null/fs/aufs/dbgaufs.h linux-6.6.4/fs/aufs/dbgaufs.h +--- /dev/null ++++ linux-6.6.4/fs/aufs/dbgaufs.h 2024-04-28 23:21:13.838237352 +0300 +@@ -0,0 +1,53 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -5805,13 +5987,26 @@ diff -Nurp linux-5.15.37/fs/aufs/dbgaufs.h linux-5.15.37-aufs/fs/aufs/dbgaufs.h + +#endif /* __KERNEL__ */ +#endif /* __DBGAUFS_H__ */ -diff -Nurp linux-5.15.37/fs/aufs/dcsub.c linux-5.15.37-aufs/fs/aufs/dcsub.c ---- linux-5.15.37/fs/aufs/dcsub.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/dcsub.c 2022-04-08 20:22:30.611616426 +0300 -@@ -0,0 +1,212 @@ +diff -Naur null/fs/aufs/dcsub.c linux-6.6.4/fs/aufs/dcsub.c +--- /dev/null ++++ linux-6.6.4/fs/aufs/dcsub.c 2024-04-28 23:21:13.838237352 +0300 +@@ -0,0 +1,225 @@ +// SPDX-License-Identifier: GPL-2.0 +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -6021,13 +6216,26 @@ diff -Nurp linux-5.15.37/fs/aufs/dcsub.c linux-5.15.37-aufs/fs/aufs/dcsub.c + + return path_is_under(path + 0, path + 1); +} -diff -Nurp linux-5.15.37/fs/aufs/dcsub.h linux-5.15.37-aufs/fs/aufs/dcsub.h ---- linux-5.15.37/fs/aufs/dcsub.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/dcsub.h 2022-04-08 20:22:30.611616426 +0300 -@@ -0,0 +1,124 @@ +diff -Naur null/fs/aufs/dcsub.h linux-6.6.4/fs/aufs/dcsub.h +--- /dev/null ++++ linux-6.6.4/fs/aufs/dcsub.h 2024-04-28 23:21:13.839237340 +0300 +@@ -0,0 +1,137 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -6149,13 +6357,26 @@ diff -Nurp linux-5.15.37/fs/aufs/dcsub.h linux-5.15.37-aufs/fs/aufs/dcsub.h + +#endif /* __KERNEL__ */ +#endif /* __AUFS_DCSUB_H__ */ -diff -Nurp linux-5.15.37/fs/aufs/debug.c linux-5.15.37-aufs/fs/aufs/debug.c ---- linux-5.15.37/fs/aufs/debug.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/debug.c 2022-04-08 20:22:30.611616426 +0300 -@@ -0,0 +1,431 @@ +diff -Naur null/fs/aufs/debug.c linux-6.6.4/fs/aufs/debug.c +--- /dev/null ++++ linux-6.6.4/fs/aufs/debug.c 2024-04-28 23:21:13.839237340 +0300 +@@ -0,0 +1,448 @@ +// SPDX-License-Identifier: GPL-2.0 +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -6189,7 +6410,7 @@ diff -Nurp linux-5.15.37/fs/aufs/debug.c linux-5.15.37-aufs/fs/aufs/debug.c + return sprintf(buffer, "%d", atomic_read(a)); +} + -+static struct kernel_param_ops param_ops_atomic_t = { ++static const struct kernel_param_ops param_ops_atomic_t = { + .set = param_atomic_t_set, + .get = param_atomic_t_get + /* void (*free)(void *arg) */ @@ -6254,6 +6475,7 @@ diff -Nurp linux-5.15.37/fs/aufs/debug.c linux-5.15.37-aufs/fs/aufs/debug.c +{ + char *n = NULL; + int l = 0; ++ struct timespec64 ctime; + + if (!inode || IS_ERR(inode)) { + dpri("i%d: err %ld\n", bindex, PTR_ERR(inode)); @@ -6268,13 +6490,16 @@ diff -Nurp linux-5.15.37/fs/aufs/debug.c linux-5.15.37-aufs/fs/aufs/debug.c + l = wh->d_name.len; + } + ++ ctime = inode_get_ctime(inode); + dpri("i%d: %p, i%lu, %s, cnt %d, nl %u, 0%o, sz %llu, blk %llu," ++ " acl %p, def_acl %p," + " hn %d, ct %lld, np %lu, st 0x%lx, f 0x%x, v %llu, g %x%s%.*s\n", + bindex, inode, + inode->i_ino, inode->i_sb ? au_sbtype(inode->i_sb) : "??", + atomic_read(&inode->i_count), inode->i_nlink, inode->i_mode, + i_size_read(inode), (unsigned long long)inode->i_blocks, -+ hn, (long long)timespec64_to_ns(&inode->i_ctime) & 0x0ffff, ++ inode->i_acl, inode->i_default_acl, ++ hn, (long long)timespec64_to_ns(&ctime) & 0x0ffff, + inode->i_mapping ? inode->i_mapping->nrpages : 0, + inode->i_state, inode->i_flags, inode_peek_iversion(inode), + inode->i_generation, @@ -6584,13 +6809,26 @@ diff -Nurp linux-5.15.37/fs/aufs/debug.c linux-5.15.37-aufs/fs/aufs/debug.c + + return 0; +} -diff -Nurp linux-5.15.37/fs/aufs/debug.h linux-5.15.37-aufs/fs/aufs/debug.h ---- linux-5.15.37/fs/aufs/debug.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/debug.h 2022-04-08 20:22:30.611616426 +0300 -@@ -0,0 +1,213 @@ +diff -Naur null/fs/aufs/debug.h linux-6.6.4/fs/aufs/debug.h +--- /dev/null ++++ linux-6.6.4/fs/aufs/debug.h 2024-04-28 23:21:13.839237340 +0300 +@@ -0,0 +1,226 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -6801,13 +7039,26 @@ diff -Nurp linux-5.15.37/fs/aufs/debug.h linux-5.15.37-aufs/fs/aufs/debug.h + +#endif /* __KERNEL__ */ +#endif /* __AUFS_DEBUG_H__ */ -diff -Nurp linux-5.15.37/fs/aufs/dentry.c linux-5.15.37-aufs/fs/aufs/dentry.c ---- linux-5.15.37/fs/aufs/dentry.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/dentry.c 2022-04-08 20:22:30.612616475 +0300 -@@ -0,0 +1,1155 @@ +diff -Naur null/fs/aufs/dentry.c linux-6.6.4/fs/aufs/dentry.c +--- /dev/null ++++ linux-6.6.4/fs/aufs/dentry.c 2024-04-28 23:21:13.839237340 +0300 +@@ -0,0 +1,1168 @@ +// SPDX-License-Identifier: GPL-2.0 +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -6828,7 +7079,7 @@ diff -Nurp linux-5.15.37/fs/aufs/dentry.c linux-5.15.37-aufs/fs/aufs/dentry.c + struct dentry *h_dentry; + struct inode *h_inode; + struct au_branch *br; -+ struct user_namespace *h_userns; ++ struct mnt_idmap *h_idmap; + struct path h_path; + int wh_found, opq; + unsigned char wh_able; @@ -6840,10 +7091,10 @@ diff -Nurp linux-5.15.37/fs/aufs/dentry.c linux-5.15.37-aufs/fs/aufs/dentry.c + br = au_sbr(dentry->d_sb, bindex); + h_path.dentry = h_parent; + h_path.mnt = au_br_mnt(br); -+ h_userns = au_br_userns(br); ++ h_idmap = au_br_idmap(br); + wh_able = !!au_br_whable(br->br_perm); + if (wh_able) -+ wh_found = au_wh_test(h_userns, &h_path, &args->whname, ++ wh_found = au_wh_test(h_idmap, &h_path, &args->whname, + ignore_perm); + h_dentry = ERR_PTR(wh_found); + if (!wh_found) @@ -6861,7 +7112,7 @@ diff -Nurp linux-5.15.37/fs/aufs/dentry.c linux-5.15.37-aufs/fs/aufs/dentry.c + if (!ignore_perm) + h_dentry = vfsub_lkup_one(args->name, &h_path); + else -+ h_dentry = au_sio_lkup_one(h_userns, args->name, &h_path); ++ h_dentry = au_sio_lkup_one(h_idmap, args->name, &h_path); + if (IS_ERR(h_dentry)) { + if (PTR_ERR(h_dentry) == -ENAMETOOLONG + && !allow_neg) @@ -6897,7 +7148,7 @@ diff -Nurp linux-5.15.37/fs/aufs/dentry.c linux-5.15.37-aufs/fs/aufs/dentry.c + + h_path.dentry = h_dentry; + inode_lock_shared_nested(h_inode, AuLsc_I_CHILD); -+ opq = au_diropq_test(h_userns, &h_path); ++ opq = au_diropq_test(h_idmap, &h_path); + inode_unlock_shared(h_inode); + if (opq > 0) + au_set_dbdiropq(dentry, bindex); @@ -7042,13 +7293,13 @@ diff -Nurp linux-5.15.37/fs/aufs/dentry.c linux-5.15.37-aufs/fs/aufs/dentry.c + return err; +} + -+struct dentry *au_sio_lkup_one(struct user_namespace *userns, struct qstr *name, ++struct dentry *au_sio_lkup_one(struct mnt_idmap *idmap, struct qstr *name, + struct path *ppath) +{ + struct dentry *dentry; + int wkq_err; + -+ if (!au_test_h_perm_sio(userns, d_inode(ppath->dentry), MAY_EXEC)) ++ if (!au_test_h_perm_sio(idmap, d_inode(ppath->dentry), MAY_EXEC)) + dentry = vfsub_lkup_one(name, ppath); + else { + struct vfsub_lkup_one_args args = { @@ -7073,18 +7324,18 @@ diff -Nurp linux-5.15.37/fs/aufs/dentry.c linux-5.15.37-aufs/fs/aufs/dentry.c + int err; + struct dentry *parent, *h_dentry; + struct au_branch *br; -+ struct user_namespace *h_userns; ++ struct mnt_idmap *h_idmap; + struct path h_ppath; + + parent = dget_parent(dentry); + br = au_sbr(dentry->d_sb, bindex); + h_ppath.dentry = au_h_dptr(parent, bindex); + h_ppath.mnt = au_br_mnt(br); -+ h_userns = au_br_userns(br); ++ h_idmap = au_br_idmap(br); + if (wh) + h_dentry = au_whtmp_lkup(h_ppath.dentry, br, &dentry->d_name); + else -+ h_dentry = au_sio_lkup_one(h_userns, &dentry->d_name, &h_ppath); ++ h_dentry = au_sio_lkup_one(h_idmap, &dentry->d_name, &h_ppath); + err = PTR_ERR(h_dentry); + if (IS_ERR(h_dentry)) + goto out; @@ -7960,13 +8211,26 @@ diff -Nurp linux-5.15.37/fs/aufs/dentry.c linux-5.15.37-aufs/fs/aufs/dentry.c +const struct dentry_operations aufs_dop_noreval = { + .d_release = aufs_d_release +}; -diff -Nurp linux-5.15.37/fs/aufs/dentry.h linux-5.15.37-aufs/fs/aufs/dentry.h ---- linux-5.15.37/fs/aufs/dentry.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/dentry.h 2022-04-08 20:22:30.612616475 +0300 -@@ -0,0 +1,256 @@ +diff -Naur null/fs/aufs/dentry.h linux-6.6.4/fs/aufs/dentry.h +--- /dev/null ++++ linux-6.6.4/fs/aufs/dentry.h 2024-04-28 23:21:13.839237340 +0300 +@@ -0,0 +1,270 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -7994,6 +8258,7 @@ diff -Nurp linux-5.15.37/fs/aufs/dentry.h linux-5.15.37-aufs/fs/aufs/dentry.h + aufs_bindex_t di_btop, di_bbot, di_bwh, di_bdiropq; + unsigned char di_tmpfile; /* to allow the different name */ + struct au_hdentry *di_hdentry; ++ struct file *di_htmpfile; + struct rcu_head rcu; +} ____cacheline_aligned_in_smp; + @@ -8026,7 +8291,7 @@ diff -Nurp linux-5.15.37/fs/aufs/dentry.h linux-5.15.37-aufs/fs/aufs/dentry.h +/* dentry.c */ +extern const struct dentry_operations aufs_dop, aufs_dop_noreval; +struct au_branch; -+struct dentry *au_sio_lkup_one(struct user_namespace *userns, struct qstr *name, ++struct dentry *au_sio_lkup_one(struct mnt_idmap *idmap, struct qstr *name, + struct path *ppath); +int au_h_verify(struct dentry *h_dentry, unsigned int udba, struct inode *h_dir, + struct dentry *h_parent, struct au_branch *br); @@ -8220,13 +8485,26 @@ diff -Nurp linux-5.15.37/fs/aufs/dentry.h linux-5.15.37-aufs/fs/aufs/dentry.h + +#endif /* __KERNEL__ */ +#endif /* __AUFS_DENTRY_H__ */ -diff -Nurp linux-5.15.37/fs/aufs/dinfo.c linux-5.15.37-aufs/fs/aufs/dinfo.c ---- linux-5.15.37/fs/aufs/dinfo.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/dinfo.c 2022-04-08 20:22:30.612616475 +0300 -@@ -0,0 +1,541 @@ +diff -Naur null/fs/aufs/dinfo.c linux-6.6.4/fs/aufs/dinfo.c +--- /dev/null ++++ linux-6.6.4/fs/aufs/dinfo.c 2024-04-28 23:21:13.839237340 +0300 +@@ -0,0 +1,555 @@ +// SPDX-License-Identifier: GPL-2.0 +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -8264,6 +8542,7 @@ diff -Nurp linux-5.15.37/fs/aufs/dinfo.c linux-5.15.37-aufs/fs/aufs/dinfo.c + dinfo->di_tmpfile = 0; + for (i = 0; i < nbr; i++) + dinfo->di_hdentry[i].hd_id = -1; ++ dinfo->di_htmpfile = NULL; + goto out; + } + @@ -8765,13 +9044,26 @@ diff -Nurp linux-5.15.37/fs/aufs/dinfo.c linux-5.15.37-aufs/fs/aufs/dinfo.c + return bindex; + return -1; +} -diff -Nurp linux-5.15.37/fs/aufs/dir.c linux-5.15.37-aufs/fs/aufs/dir.c ---- linux-5.15.37/fs/aufs/dir.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/dir.c 2022-04-08 20:22:30.612616475 +0300 -@@ -0,0 +1,752 @@ +diff -Naur null/fs/aufs/dir.c linux-6.6.4/fs/aufs/dir.c +--- /dev/null ++++ linux-6.6.4/fs/aufs/dir.c 2024-04-28 23:21:13.839237340 +0300 +@@ -0,0 +1,765 @@ +// SPDX-License-Identifier: GPL-2.0 +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -9307,9 +9599,9 @@ diff -Nurp linux-5.15.37/fs/aufs/dir.c linux-5.15.37-aufs/fs/aufs/dir.c + aufs_bindex_t bindex; +}; + -+static int test_empty_cb(struct dir_context *ctx, const char *__name, -+ int namelen, loff_t offset __maybe_unused, u64 ino, -+ unsigned int d_type) ++static bool test_empty_cb(struct dir_context *ctx, const char *__name, ++ int namelen, loff_t offset __maybe_unused, u64 ino, ++ unsigned int d_type) +{ + struct test_empty_arg *arg = container_of(ctx, struct test_empty_arg, + ctx); @@ -9340,7 +9632,7 @@ diff -Nurp linux-5.15.37/fs/aufs/dir.c linux-5.15.37-aufs/fs/aufs/dir.c +out: + /* smp_mb(); */ + AuTraceErr(arg->err); -+ return arg->err; ++ return !arg->err; +} + +static int do_test_empty(struct dentry *dentry, struct test_empty_arg *arg) @@ -9395,14 +9687,14 @@ diff -Nurp linux-5.15.37/fs/aufs/dir.c linux-5.15.37-aufs/fs/aufs/dir.c + int err, wkq_err; + struct dentry *h_dentry; + struct inode *h_inode; -+ struct user_namespace *h_userns; ++ struct mnt_idmap *h_idmap; + -+ h_userns = au_sbr_userns(dentry->d_sb, arg->bindex); ++ h_idmap = au_sbr_idmap(dentry->d_sb, arg->bindex); + h_dentry = au_h_dptr(dentry, arg->bindex); + h_inode = d_inode(h_dentry); + /* todo: i_mode changes anytime? */ + inode_lock_shared_nested(h_inode, AuLsc_I_CHILD); -+ err = au_test_h_perm_sio(h_userns, h_inode, MAY_EXEC | MAY_READ); ++ err = au_test_h_perm_sio(h_idmap, h_inode, MAY_EXEC | MAY_READ); + inode_unlock_shared(h_inode); + if (!err) + err = do_test_empty(dentry, arg); @@ -9521,13 +9813,26 @@ diff -Nurp linux-5.15.37/fs/aufs/dir.c linux-5.15.37-aufs/fs/aufs/dir.c + .flush = aufs_flush_dir, + .fsync = aufs_fsync_dir +}; -diff -Nurp linux-5.15.37/fs/aufs/dir.h linux-5.15.37-aufs/fs/aufs/dir.h ---- linux-5.15.37/fs/aufs/dir.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/dir.h 2022-04-08 20:22:30.612616475 +0300 -@@ -0,0 +1,121 @@ +diff -Naur null/fs/aufs/dir.h linux-6.6.4/fs/aufs/dir.h +--- /dev/null ++++ linux-6.6.4/fs/aufs/dir.h 2024-04-28 23:21:13.839237340 +0300 +@@ -0,0 +1,134 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -9646,13 +9951,26 @@ diff -Nurp linux-5.15.37/fs/aufs/dir.h linux-5.15.37-aufs/fs/aufs/dir.h + +#endif /* __KERNEL__ */ +#endif /* __AUFS_DIR_H__ */ -diff -Nurp linux-5.15.37/fs/aufs/dirren.c linux-5.15.37-aufs/fs/aufs/dirren.c ---- linux-5.15.37/fs/aufs/dirren.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/dirren.c 2022-04-08 20:22:30.612616475 +0300 -@@ -0,0 +1,1302 @@ +diff -Naur null/fs/aufs/dirren.c linux-6.6.4/fs/aufs/dirren.c +--- /dev/null ++++ linux-6.6.4/fs/aufs/dirren.c 2024-04-28 23:21:13.840237327 +0300 +@@ -0,0 +1,1315 @@ +// SPDX-License-Identifier: GPL-2.0 +/* -+ * Copyright (C) 2017-2021 Junjiro R. Okajima ++ * Copyright (C) 2017-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -10374,7 +10692,7 @@ diff -Nurp linux-5.15.37/fs/aufs/dirren.c linux-5.15.37-aufs/fs/aufs/dirren.c + + memset(w, 0, sizeof(*w)); + w->allocated = roundup_pow_of_two(sizeof(*w->fdata) + 40); -+ strcpy(w->whname, AUFS_WH_DR_INFO_PFX); ++ strscpy(w->whname, AUFS_WH_DR_INFO_PFX, sizeof(AUFS_WH_DR_INFO_PFX)); + w->infoname = w->whname + sizeof(AUFS_WH_DR_INFO_PFX) - 1; + w->infonamelen = sizeof(w->whname) - sizeof(AUFS_WH_DR_INFO_PFX); + w->btgt = btgt; @@ -10952,13 +11270,26 @@ diff -Nurp linux-5.15.37/fs/aufs/dirren.c linux-5.15.37-aufs/fs/aufs/dirren.c +out: + return err; +} -diff -Nurp linux-5.15.37/fs/aufs/dirren.h linux-5.15.37-aufs/fs/aufs/dirren.h ---- linux-5.15.37/fs/aufs/dirren.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/dirren.h 2022-04-08 20:22:30.612616475 +0300 -@@ -0,0 +1,127 @@ +diff -Naur null/fs/aufs/dirren.h linux-6.6.4/fs/aufs/dirren.h +--- /dev/null ++++ linux-6.6.4/fs/aufs/dirren.h 2024-04-28 23:21:13.840237327 +0300 +@@ -0,0 +1,140 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* -+ * Copyright (C) 2017-2021 Junjiro R. Okajima ++ * Copyright (C) 2017-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -11083,13 +11414,26 @@ diff -Nurp linux-5.15.37/fs/aufs/dirren.h linux-5.15.37-aufs/fs/aufs/dirren.h + +#endif /* __KERNEL__ */ +#endif /* __AUFS_DIRREN_H__ */ -diff -Nurp linux-5.15.37/fs/aufs/dynop.c linux-5.15.37-aufs/fs/aufs/dynop.c ---- linux-5.15.37/fs/aufs/dynop.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/dynop.c 2022-04-08 20:22:30.612616475 +0300 -@@ -0,0 +1,355 @@ +diff -Naur null/fs/aufs/dynop.c linux-6.6.4/fs/aufs/dynop.c +--- /dev/null ++++ linux-6.6.4/fs/aufs/dynop.c 2024-04-28 23:21:13.840237327 +0300 +@@ -0,0 +1,366 @@ +// SPDX-License-Identifier: GPL-2.0 +/* -+ * Copyright (C) 2010-2021 Junjiro R. Okajima ++ * Copyright (C) 2010-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -11252,28 +11596,26 @@ diff -Nurp linux-5.15.37/fs/aufs/dynop.c linux-5.15.37-aufs/fs/aufs/dynop.c + AuDbg("%s\n", au_sbtype(h_sb)); + + DySetAop(writepage); -+ DySetAopForce(readpage); /* force */ ++ DySetAopForce(read_folio); /* force */ + DySetAop(writepages); -+ DySetAop(set_page_dirty); -+ DySetAop(readpages); ++ DySetAop(dirty_folio); ++ DySetAop(invalidate_folio); + DySetAop(readahead); + DySetAop(write_begin); + DySetAop(write_end); + DySetAop(bmap); -+ DySetAop(invalidatepage); -+ DySetAop(releasepage); -+ DySetAop(freepage); ++ DySetAop(release_folio); ++ DySetAop(free_folio); + /* this one will be changed according to an aufs mount option */ + DySetAop(direct_IO); -+ DySetAop(migratepage); -+ DySetAop(isolate_page); -+ DySetAop(putback_page); -+ DySetAop(launder_page); ++ DySetAop(migrate_folio); ++ DySetAop(launder_folio); + DySetAop(is_partially_uptodate); + DySetAop(is_dirty_writeback); + DySetAop(error_remove_page); + DySetAop(swap_activate); + DySetAop(swap_deactivate); ++ DySetAop(swap_rw); + + DyDbgSize(cnt, *h_aop); +} @@ -11442,13 +11784,26 @@ diff -Nurp linux-5.15.37/fs/aufs/dynop.c linux-5.15.37-aufs/fs/aufs/dynop.c + for (i = 0; i < AuDyLast; i++) + WARN_ON(!hlist_bl_empty(dynop + i)); +} -diff -Nurp linux-5.15.37/fs/aufs/dynop.h linux-5.15.37-aufs/fs/aufs/dynop.h ---- linux-5.15.37/fs/aufs/dynop.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/dynop.h 2022-04-08 20:22:30.612616475 +0300 -@@ -0,0 +1,64 @@ +diff -Naur null/fs/aufs/dynop.h linux-6.6.4/fs/aufs/dynop.h +--- /dev/null ++++ linux-6.6.4/fs/aufs/dynop.h 2024-04-28 23:21:13.840237327 +0300 +@@ -0,0 +1,77 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* -+ * Copyright (C) 2010-2021 Junjiro R. Okajima ++ * Copyright (C) 2010-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -11510,13 +11865,26 @@ diff -Nurp linux-5.15.37/fs/aufs/dynop.h linux-5.15.37-aufs/fs/aufs/dynop.h + +#endif /* __KERNEL__ */ +#endif /* __AUFS_DYNOP_H__ */ -diff -Nurp linux-5.15.37/fs/aufs/export.c linux-5.15.37-aufs/fs/aufs/export.c ---- linux-5.15.37/fs/aufs/export.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/export.c 2022-04-08 20:22:30.612616475 +0300 -@@ -0,0 +1,817 @@ +diff -Naur null/fs/aufs/export.c linux-6.6.4/fs/aufs/export.c +--- /dev/null ++++ linux-6.6.4/fs/aufs/export.c 2024-04-28 23:21:13.840237327 +0300 +@@ -0,0 +1,830 @@ +// SPDX-License-Identifier: GPL-2.0 +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -11849,7 +12217,7 @@ diff -Nurp linux-5.15.37/fs/aufs/export.c linux-5.15.37-aufs/fs/aufs/export.c + int namelen; +}; + -+static int ++static bool +find_name_by_ino(struct dir_context *ctx, const char *name, int namelen, + loff_t offset, u64 ino, unsigned int d_type) +{ @@ -11858,12 +12226,12 @@ diff -Nurp linux-5.15.37/fs/aufs/export.c linux-5.15.37-aufs/fs/aufs/export.c + + a->called++; + if (a->ino != ino) -+ return 0; ++ return true; + + memcpy(a->name, name, namelen); + a->namelen = namelen; + a->found = 1; -+ return 1; ++ return false; +} + +static struct dentry *au_lkup_by_ino(struct path *path, ino_t ino, @@ -12331,13 +12699,26 @@ diff -Nurp linux-5.15.37/fs/aufs/export.c linux-5.15.37-aufs/fs/aufs/export.c + BUILD_BUG_ON(sizeof(u) != sizeof(int)); + atomic_set(&sbinfo->si_xigen_next, u); +} -diff -Nurp linux-5.15.37/fs/aufs/fhsm.c linux-5.15.37-aufs/fs/aufs/fhsm.c ---- linux-5.15.37/fs/aufs/fhsm.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/fhsm.c 2022-04-08 20:22:30.612616475 +0300 -@@ -0,0 +1,413 @@ +diff -Naur null/fs/aufs/fhsm.c linux-6.6.4/fs/aufs/fhsm.c +--- /dev/null ++++ linux-6.6.4/fs/aufs/fhsm.c 2024-04-28 23:21:13.840237327 +0300 +@@ -0,0 +1,426 @@ +// SPDX-License-Identifier: GPL-2.0 +/* -+ * Copyright (C) 2011-2021 Junjiro R. Okajima ++ * Copyright (C) 2011-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -12748,13 +13129,26 @@ diff -Nurp linux-5.15.37/fs/aufs/fhsm.c linux-5.15.37-aufs/fs/aufs/fhsm.c + if (u != AUFS_FHSM_CACHE_DEF_SEC) + seq_printf(seq, ",fhsm_sec=%u", u); +} -diff -Nurp linux-5.15.37/fs/aufs/file.c linux-5.15.37-aufs/fs/aufs/file.c ---- linux-5.15.37/fs/aufs/file.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/file.c 2022-04-08 20:22:30.613616524 +0300 -@@ -0,0 +1,850 @@ +diff -Naur null/fs/aufs/file.c linux-6.6.4/fs/aufs/file.c +--- /dev/null ++++ linux-6.6.4/fs/aufs/file.c 2024-04-28 23:21:13.841237315 +0300 +@@ -0,0 +1,865 @@ +// SPDX-License-Identifier: GPL-2.0 +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -12827,6 +13221,11 @@ diff -Nurp linux-5.15.37/fs/aufs/file.c linux-5.15.37-aufs/fs/aufs/file.c + au_lcnt_inc(&br->br_nfiles); + h_path.dentry = h_dentry; + h_path.mnt = au_br_mnt(br); ++ /* ++ * vfs::backing_file_open() looks promising since it can get rid of ++ * mm::vm_prfile approach from my mind. ++ * but I keep current approach for a while. ++ */ + h_file = vfsub_dentry_open(&h_path, flags); + if (IS_ERR(h_file)) + goto out_br; @@ -12985,18 +13384,20 @@ diff -Nurp linux-5.15.37/fs/aufs/file.c linux-5.15.37-aufs/fs/aufs/file.c + AuDebugOn(IS_ERR_OR_NULL(dentry)); + di_write_lock_child(dentry); + err = au_cmoo(dentry); -+ di_downgrade_lock(dentry, AuLock_IR); + if (!err) { -+ if (!aopen) -+ err = args->open(file, vfsub_file_flags(file), NULL); -+ else { ++ if (!aopen) { ++ err = args->open(file, vfsub_file_flags(file), ++ au_di(dentry)->di_htmpfile); ++ di_write_unlock(dentry); ++ } else { ++ di_downgrade_lock(dentry, AuLock_IR); + lockdep_off(); + err = args->open(file, vfsub_file_flags(file), + args->h_file); + lockdep_on(); ++ di_read_unlock(dentry, AuLock_IR); + } + } -+ di_read_unlock(dentry, AuLock_IR); + + finfo = au_fi(file); + if (!err) { @@ -13519,9 +13920,9 @@ diff -Nurp linux-5.15.37/fs/aufs/file.c linux-5.15.37-aufs/fs/aufs/file.c + +/* cf. aufs_nopage() */ +/* for madvise(2) */ -+static int aufs_readpage(struct file *file __maybe_unused, struct page *page) ++static int aufs_read_folio(struct file *file __maybe_unused, struct folio *folio) +{ -+ unlock_page(page); ++ folio_unlock(folio); + return 0; +} + @@ -13532,7 +13933,7 @@ diff -Nurp linux-5.15.37/fs/aufs/file.c linux-5.15.37-aufs/fs/aufs/file.c +/* they will never be called. */ +#ifdef CONFIG_AUFS_DEBUG +static int aufs_write_begin(struct file *file, struct address_space *mapping, -+ loff_t pos, unsigned len, unsigned flags, ++ loff_t pos, unsigned len, + struct page **pagep, void **fsdata) +{ AuUnsupport(); return 0; } +static int aufs_write_end(struct file *file, struct address_space *mapping, @@ -13542,29 +13943,23 @@ diff -Nurp linux-5.15.37/fs/aufs/file.c linux-5.15.37-aufs/fs/aufs/file.c +static int aufs_writepage(struct page *page, struct writeback_control *wbc) +{ AuUnsupport(); return 0; } + -+static int aufs_set_page_dirty(struct page *page) -+{ AuUnsupport(); return 0; } -+static void aufs_invalidatepage(struct page *page, unsigned int offset, -+ unsigned int length) ++static bool aufs_dirty_folio(struct address_space *mapping, struct folio *folio) ++{ AuUnsupport(); return true; } ++static void aufs_invalidate_folio(struct folio *folio, size_t offset, size_t len) +{ AuUnsupport(); } -+static int aufs_releasepage(struct page *page, gfp_t gfp) -+{ AuUnsupport(); return 0; } ++static bool aufs_release_folio(struct folio *folio, gfp_t gfp) ++{ AuUnsupport(); return true; } +#if 0 /* called by memory compaction regardless file */ -+static int aufs_migratepage(struct address_space *mapping, struct page *newpage, -+ struct page *page, enum migrate_mode mode) ++static int aufs_migrate_folio(struct address_space *mapping, struct folio *dst, ++ struct folio *src, enum migrate_mode mode) +{ AuUnsupport(); return 0; } +#endif -+static bool aufs_isolate_page(struct page *page, isolate_mode_t mode) ++static int aufs_launder_folio(struct folio *folio) ++{ AuUnsupport(); return 0; } ++static bool aufs_is_partially_uptodate(struct folio *folio, size_t from, ++ size_t count) +{ AuUnsupport(); return true; } -+static void aufs_putback_page(struct page *page) -+{ AuUnsupport(); } -+static int aufs_launder_page(struct page *page) -+{ AuUnsupport(); return 0; } -+static int aufs_is_partially_uptodate(struct page *page, -+ unsigned long from, -+ unsigned long count) -+{ AuUnsupport(); return 0; } -+static void aufs_is_dirty_writeback(struct page *page, bool *dirty, ++static void aufs_is_dirty_writeback(struct folio *folio, bool *dirty, + bool *writeback) +{ AuUnsupport(); } +static int aufs_error_remove_page(struct address_space *mapping, @@ -13575,40 +13970,54 @@ diff -Nurp linux-5.15.37/fs/aufs/file.c linux-5.15.37-aufs/fs/aufs/file.c +{ AuUnsupport(); return 0; } +static void aufs_swap_deactivate(struct file *file) +{ AuUnsupport(); } ++static int aufs_swap_rw(struct kiocb *iocb, struct iov_iter *iter) ++{ AuUnsupport(); return 0; } +#endif /* CONFIG_AUFS_DEBUG */ + +const struct address_space_operations aufs_aop = { -+ .readpage = aufs_readpage, ++ .read_folio = aufs_read_folio, + .direct_IO = aufs_direct_IO, +#ifdef CONFIG_AUFS_DEBUG + .writepage = aufs_writepage, + /* no writepages, because of writepage */ -+ .set_page_dirty = aufs_set_page_dirty, ++ .dirty_folio = aufs_dirty_folio, + /* no readpages, because of readpage */ + .write_begin = aufs_write_begin, + .write_end = aufs_write_end, + /* no bmap, no block device */ -+ .invalidatepage = aufs_invalidatepage, -+ .releasepage = aufs_releasepage, ++ .invalidate_folio = aufs_invalidate_folio, ++ .release_folio = aufs_release_folio, + /* is fallback_migrate_page ok? */ -+ /* .migratepage = aufs_migratepage, */ -+ .isolate_page = aufs_isolate_page, -+ .putback_page = aufs_putback_page, -+ .launder_page = aufs_launder_page, ++ /* .migrate_folio = aufs_migrate_folio, */ ++ .launder_folio = aufs_launder_folio, + .is_partially_uptodate = aufs_is_partially_uptodate, + .is_dirty_writeback = aufs_is_dirty_writeback, + .error_remove_page = aufs_error_remove_page, + .swap_activate = aufs_swap_activate, -+ .swap_deactivate = aufs_swap_deactivate ++ .swap_deactivate = aufs_swap_deactivate, ++ .swap_rw = aufs_swap_rw +#endif /* CONFIG_AUFS_DEBUG */ +}; -diff -Nurp linux-5.15.37/fs/aufs/file.h linux-5.15.37-aufs/fs/aufs/file.h ---- linux-5.15.37/fs/aufs/file.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/file.h 2022-04-08 20:22:30.613616524 +0300 -@@ -0,0 +1,329 @@ +diff -Naur null/fs/aufs/file.h linux-6.6.4/fs/aufs/file.h +--- /dev/null ++++ linux-6.6.4/fs/aufs/file.h 2024-04-28 23:21:13.841237315 +0300 +@@ -0,0 +1,342 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -13935,13 +14344,26 @@ diff -Nurp linux-5.15.37/fs/aufs/file.h linux-5.15.37-aufs/fs/aufs/file.h + +#endif /* __KERNEL__ */ +#endif /* __AUFS_FILE_H__ */ -diff -Nurp linux-5.15.37/fs/aufs/finfo.c linux-5.15.37-aufs/fs/aufs/finfo.c ---- linux-5.15.37/fs/aufs/finfo.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/finfo.c 2022-04-08 20:22:30.613616524 +0300 -@@ -0,0 +1,136 @@ +diff -Naur null/fs/aufs/finfo.c linux-6.6.4/fs/aufs/finfo.c +--- /dev/null ++++ linux-6.6.4/fs/aufs/finfo.c 2024-04-28 23:21:13.841237315 +0300 +@@ -0,0 +1,149 @@ +// SPDX-License-Identifier: GPL-2.0 +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -14075,13 +14497,26 @@ diff -Nurp linux-5.15.37/fs/aufs/finfo.c linux-5.15.37-aufs/fs/aufs/finfo.c +out: + return err; +} -diff -Nurp linux-5.15.37/fs/aufs/f_op.c linux-5.15.37-aufs/fs/aufs/f_op.c ---- linux-5.15.37/fs/aufs/f_op.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/f_op.c 2022-04-08 20:22:30.612616475 +0300 -@@ -0,0 +1,758 @@ +diff -Naur null/fs/aufs/f_op.c linux-6.6.4/fs/aufs/f_op.c +--- /dev/null ++++ linux-6.6.4/fs/aufs/f_op.c 2024-04-28 23:21:13.840237327 +0300 +@@ -0,0 +1,771 @@ +// SPDX-License-Identifier: GPL-2.0 +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -14129,12 +14564,17 @@ diff -Nurp linux-5.15.37/fs/aufs/f_op.c linux-5.15.37-aufs/fs/aufs/f_op.c + /* br ref is already inc-ed */ + } + -+ if ((flags & __O_TMPFILE) -+ && !(flags & O_EXCL)) { -+ h_inode = file_inode(h_file); -+ spin_lock(&h_inode->i_lock); -+ h_inode->i_state |= I_LINKABLE; -+ spin_unlock(&h_inode->i_lock); ++ if (flags & __O_TMPFILE) { ++ AuDebugOn(!h_file); ++ AuDebugOn(h_file != au_di(dentry)->di_htmpfile); ++ au_di(dentry)->di_htmpfile = NULL; ++ ++ if (!(flags & O_EXCL)) { ++ h_inode = file_inode(h_file); ++ spin_lock(&h_inode->i_lock); ++ h_inode->i_state |= I_LINKABLE; ++ spin_unlock(&h_inode->i_lock); ++ } + } + au_set_fbtop(file, bindex); + au_set_h_fptr(file, bindex, h_file); @@ -14286,6 +14726,7 @@ diff -Nurp linux-5.15.37/fs/aufs/f_op.c linux-5.15.37-aufs/fs/aufs/f_op.c + if (do_ready) + au_unpin(&pin); + di_read_unlock(dentry, /*flags*/0); ++ vfsub_file_start_write(h_file); + +out_fi: + fi_write_unlock(file); @@ -14298,6 +14739,7 @@ diff -Nurp linux-5.15.37/fs/aufs/f_op.c linux-5.15.37-aufs/fs/aufs/f_op.c +{ + struct inode *h_inode; + ++ vfsub_file_end_write(h_file); + au_cpup_attr_timesizes(inode); + AuDebugOn(au_ibtop(inode) != wpre->btop); + h_inode = file_inode(h_file); @@ -14454,7 +14896,7 @@ diff -Nurp linux-5.15.37/fs/aufs/f_op.c linux-5.15.37-aufs/fs/aufs/f_op.c + if (IS_ERR(h_file)) + goto out; + -+ err = vfsub_splice_to(h_file, ppos, pipe, len, flags); ++ err = vfsub_splice_read(h_file, ppos, pipe, len, flags); + /* todo: necessary? */ + /* file->f_ra = h_file->f_ra; */ + au_read_post(inode, h_file); @@ -14511,6 +14953,10 @@ diff -Nurp linux-5.15.37/fs/aufs/f_op.c linux-5.15.37-aufs/fs/aufs/f_op.c + lockdep_off(); + err = vfs_fallocate(h_file, mode, offset, len); + lockdep_on(); ++ /* ++ * we don't need to call file_modifed() here since au_write_post() ++ * is equivalent and copies-up all timestamps and permission bits. ++ */ + au_write_post(inode, h_file, &wpre, /*written*/1); + +out: @@ -14795,16 +15241,6 @@ diff -Nurp linux-5.15.37/fs/aufs/f_op.c linux-5.15.37-aufs/fs/aufs/f_op.c + +/* ---------------------------------------------------------------------- */ + -+/* no one supports this operation, currently */ -+#if 0 /* reserved for future use */ -+static ssize_t aufs_sendpage(struct file *file, struct page *page, int offset, -+ size_t len, loff_t *pos, int more) -+{ -+} -+#endif -+ -+/* ---------------------------------------------------------------------- */ -+ +const struct file_operations aufs_file_fop = { + .owner = THIS_MODULE, + @@ -14826,7 +15262,6 @@ diff -Nurp linux-5.15.37/fs/aufs/f_op.c linux-5.15.37-aufs/fs/aufs/f_op.c + .release = aufs_release_nondir, + .fsync = aufs_fsync_nondir, + .fasync = aufs_fasync, -+ /* .sendpage = aufs_sendpage, */ + .setfl = aufs_setfl, + .splice_write = aufs_splice_write, + .splice_read = aufs_splice_read, @@ -14837,13 +15272,26 @@ diff -Nurp linux-5.15.37/fs/aufs/f_op.c linux-5.15.37-aufs/fs/aufs/f_op.c + .fallocate = aufs_fallocate, + .copy_file_range = aufs_copy_file_range +}; -diff -Nurp linux-5.15.37/fs/aufs/fsctx.c linux-5.15.37-aufs/fs/aufs/fsctx.c ---- linux-5.15.37/fs/aufs/fsctx.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/fsctx.c 2022-04-08 20:22:30.613616524 +0300 -@@ -0,0 +1,1229 @@ +diff -Naur null/fs/aufs/fsctx.c linux-6.6.4/fs/aufs/fsctx.c +--- /dev/null ++++ linux-6.6.4/fs/aufs/fsctx.c 2024-04-28 23:21:13.841237315 +0300 +@@ -0,0 +1,1242 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -15271,7 +15719,7 @@ diff -Nurp linux-5.15.37/fs/aufs/fsctx.c linux-5.15.37-aufs/fs/aufs/fsctx.c +#ifdef CONFIG_FS_POSIX_ACL + fsparam_flag_no("acl", Opt_acl), +#else -+ au_ignore_flag("acl"), ++ au_ignore_flag("acl", Opt_ignore), +#endif + + /* internal use for the scripts */ @@ -15833,7 +16281,7 @@ diff -Nurp linux-5.15.37/fs/aufs/fsctx.c linux-5.15.37-aufs/fs/aufs/fsctx.c + case Opt_##name: \ + err = 0; \ + opt->tf = !result.negated; \ -+ break; ++ break + au_fsctx_TF(trunc_xino); + au_fsctx_TF(trunc_xib); + au_fsctx_TF(dirperm1); @@ -15910,7 +16358,7 @@ diff -Nurp linux-5.15.37/fs/aufs/fsctx.c linux-5.15.37-aufs/fs/aufs/fsctx.c +{ +#define do_test(name) \ + if (!strncmp(str, name ":", sizeof(name))) \ -+ return sizeof(name) - 1; ++ return sizeof(name) - 1 + do_test("br"); + do_test("add"); + do_test("ins"); @@ -16070,13 +16518,26 @@ diff -Nurp linux-5.15.37/fs/aufs/fsctx.c linux-5.15.37-aufs/fs/aufs/fsctx.c + AuTraceErr(err); + return err; +} -diff -Nurp linux-5.15.37/fs/aufs/fstype.h linux-5.15.37-aufs/fs/aufs/fstype.h ---- linux-5.15.37/fs/aufs/fstype.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/fstype.h 2022-04-08 20:22:30.613616524 +0300 -@@ -0,0 +1,388 @@ +diff -Naur null/fs/aufs/fstype.h linux-6.6.4/fs/aufs/fstype.h +--- /dev/null ++++ linux-6.6.4/fs/aufs/fstype.h 2024-04-28 23:21:13.841237315 +0300 +@@ -0,0 +1,401 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -16462,13 +16923,26 @@ diff -Nurp linux-5.15.37/fs/aufs/fstype.h linux-5.15.37-aufs/fs/aufs/fstype.h + +#endif /* __KERNEL__ */ +#endif /* __AUFS_FSTYPE_H__ */ -diff -Nurp linux-5.15.37/fs/aufs/hbl.h linux-5.15.37-aufs/fs/aufs/hbl.h ---- linux-5.15.37/fs/aufs/hbl.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/hbl.h 2022-04-08 20:22:30.613616524 +0300 -@@ -0,0 +1,52 @@ +diff -Naur null/fs/aufs/hbl.h linux-6.6.4/fs/aufs/hbl.h +--- /dev/null ++++ linux-6.6.4/fs/aufs/hbl.h 2024-04-28 23:21:13.841237315 +0300 +@@ -0,0 +1,65 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* -+ * Copyright (C) 2017-2021 Junjiro R. Okajima ++ * Copyright (C) 2017-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -16518,15 +16992,26 @@ diff -Nurp linux-5.15.37/fs/aufs/hbl.h linux-5.15.37-aufs/fs/aufs/hbl.h + +#endif /* __KERNEL__ */ +#endif /* __AUFS_HBL_H__ */ -diff --git a/fs/aufs/hfsnotify.c b/fs/aufs/hfsnotify.c -new file mode 100644 -index 000000000000..c2c7766d6cf1 +diff -Naur null/fs/aufs/hfsnotify.c linux-6.6.4/fs/aufs/hfsnotify.c --- /dev/null -+++ b/fs/aufs/hfsnotify.c -@@ -0,0 +1,275 @@ ++++ linux-6.6.4/fs/aufs/hfsnotify.c 2024-04-28 23:21:13.841237315 +0300 +@@ -0,0 +1,290 @@ +// SPDX-License-Identifier: GPL-2.0 +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -16683,7 +17168,8 @@ index 000000000000..c2c7766d6cf1 + struct inode *h_dir, *h_inode; + struct fsnotify_mark *inode_mark; + -+ AuDebugOn(data_type != FSNOTIFY_EVENT_INODE); ++ AuDebugOn(!(data_type == FSNOTIFY_EVENT_INODE ++ || data_type == FSNOTIFY_EVENT_DENTRY)); + + err = 0; + /* if FS_UNMOUNT happens, there must be another bug */ @@ -16695,11 +17181,11 @@ index 000000000000..c2c7766d6cf1 + h_inode = NULL; +#ifdef AuDbgHnotify + au_debug_on(); -+ if (1 || h_child_qstr.len != sizeof(AUFS_XINO_FNAME) - 1 -+ || strncmp(h_child_qstr.name, AUFS_XINO_FNAME, h_child_qstr.len)) { ++ if (1 || file_name.len != sizeof(AUFS_XINO_FNAME) - 1 ++ || strncmp(file_name.name, AUFS_XINO_FNAME, file_name.len)) { + AuDbg("i%lu, mask 0x%x %s, hcname %.*s, hi%lu\n", + h_dir->i_ino, mask, au_hfsn_name(mask), -+ AuLNPair(&h_child_qstr), h_inode ? h_inode->i_ino : 0); ++ AuLNPair(file_name), h_inode ? h_inode->i_ino : 0); + /* WARN_ON(1); */ + } + au_debug_off(); @@ -16751,7 +17237,8 @@ index 000000000000..c2c7766d6cf1 + goto out; + + err = 0; -+ group = fsnotify_alloc_group(&au_hfsn_ops); ++ group = fsnotify_alloc_group(&au_hfsn_ops, ++ /*flags - not for userspace*/0); + if (IS_ERR(group)) { + err = PTR_ERR(group); + pr_err("fsnotify_alloc_group() failed, %d\n", err); @@ -16799,13 +17286,26 @@ index 000000000000..c2c7766d6cf1 + .fin_br = au_hfsn_fin_br, + .init_br = au_hfsn_init_br +}; -diff -Nurp linux-5.15.37/fs/aufs/hfsplus.c linux-5.15.37-aufs/fs/aufs/hfsplus.c ---- linux-5.15.37/fs/aufs/hfsplus.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/hfsplus.c 2022-04-08 20:22:30.613616524 +0300 -@@ -0,0 +1,47 @@ +diff -Naur null/fs/aufs/hfsplus.c linux-6.6.4/fs/aufs/hfsplus.c +--- /dev/null ++++ linux-6.6.4/fs/aufs/hfsplus.c 2024-04-28 23:21:13.841237315 +0300 +@@ -0,0 +1,60 @@ +// SPDX-License-Identifier: GPL-2.0 +/* -+ * Copyright (C) 2010-2021 Junjiro R. Okajima ++ * Copyright (C) 2010-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -16850,13 +17350,26 @@ diff -Nurp linux-5.15.37/fs/aufs/hfsplus.c linux-5.15.37-aufs/fs/aufs/hfsplus.c + au_lcnt_dec(&br->br_nfiles); + } +} -diff -Nurp linux-5.15.37/fs/aufs/hnotify.c linux-5.15.37-aufs/fs/aufs/hnotify.c ---- linux-5.15.37/fs/aufs/hnotify.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/hnotify.c 2022-04-08 20:22:30.613616524 +0300 -@@ -0,0 +1,702 @@ +diff -Naur null/fs/aufs/hnotify.c linux-6.6.4/fs/aufs/hnotify.c +--- /dev/null ++++ linux-6.6.4/fs/aufs/hnotify.c 2024-04-28 23:21:13.841237315 +0300 +@@ -0,0 +1,715 @@ +// SPDX-License-Identifier: GPL-2.0 +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -17556,13 +18069,26 @@ diff -Nurp linux-5.15.37/fs/aufs/hnotify.c linux-5.15.37-aufs/fs/aufs/hnotify.c + if (au_cache[AuCache_HNOTIFY]) + au_hn_destroy_cache(); +} -diff -Nurp linux-5.15.37/fs/aufs/iinfo.c linux-5.15.37-aufs/fs/aufs/iinfo.c ---- linux-5.15.37/fs/aufs/iinfo.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/iinfo.c 2022-04-08 20:22:30.614616573 +0300 -@@ -0,0 +1,273 @@ +diff -Naur null/fs/aufs/iinfo.c linux-6.6.4/fs/aufs/iinfo.c +--- /dev/null ++++ linux-6.6.4/fs/aufs/iinfo.c 2024-04-28 23:21:13.842237302 +0300 +@@ -0,0 +1,286 @@ +// SPDX-License-Identifier: GPL-2.0 +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -17833,13 +18359,26 @@ diff -Nurp linux-5.15.37/fs/aufs/iinfo.c linux-5.15.37-aufs/fs/aufs/iinfo.c + au_kfree_rcu(iinfo->ii_hinode); + AuRwDestroy(&iinfo->ii_rwsem); +} -diff -Nurp linux-5.15.37/fs/aufs/inode.c linux-5.15.37-aufs/fs/aufs/inode.c ---- linux-5.15.37/fs/aufs/inode.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/inode.c 2022-04-08 20:22:30.614616573 +0300 -@@ -0,0 +1,518 @@ +diff -Naur null/fs/aufs/inode.c linux-6.6.4/fs/aufs/inode.c +--- /dev/null ++++ linux-6.6.4/fs/aufs/inode.c 2024-04-28 23:21:13.843237290 +0300 +@@ -0,0 +1,531 @@ +// SPDX-License-Identifier: GPL-2.0 +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -18100,7 +18639,7 @@ diff -Nurp linux-5.15.37/fs/aufs/inode.c linux-5.15.37-aufs/fs/aufs/inode.c + } + au_cpup_attr_all(inode, /*force*/1); + /* -+ * to force calling aufs_get_acl() every time, ++ * to force calling aufs_get_inode_acl() every time, + * do not call cache_no_acl() for aufs inode. + */ + @@ -18338,30 +18877,43 @@ diff -Nurp linux-5.15.37/fs/aufs/inode.c linux-5.15.37-aufs/fs/aufs/inode.c + return err; +} + -+int au_test_h_perm(struct user_namespace *h_userns, struct inode *h_inode, ++int au_test_h_perm(struct mnt_idmap *h_idmap, struct inode *h_inode, + int mask) +{ + if (uid_eq(current_fsuid(), GLOBAL_ROOT_UID)) + return 0; -+ return inode_permission(h_userns, h_inode, mask); ++ return inode_permission(h_idmap, h_inode, mask); +} + -+int au_test_h_perm_sio(struct user_namespace *h_userns, struct inode *h_inode, ++int au_test_h_perm_sio(struct mnt_idmap *h_idmap, struct inode *h_inode, + int mask) +{ + if (au_test_nfs(h_inode->i_sb) + && (mask & MAY_WRITE) + && S_ISDIR(h_inode->i_mode)) + mask |= MAY_READ; /* force permission check */ -+ return au_test_h_perm(h_userns, h_inode, mask); ++ return au_test_h_perm(h_idmap, h_inode, mask); +} -diff -Nurp linux-5.15.37/fs/aufs/inode.h linux-5.15.37-aufs/fs/aufs/inode.h ---- linux-5.15.37/fs/aufs/inode.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/inode.h 2022-04-08 20:22:30.614616573 +0300 -@@ -0,0 +1,692 @@ +diff -Naur null/fs/aufs/inode.h linux-6.6.4/fs/aufs/inode.h +--- /dev/null ++++ linux-6.6.4/fs/aufs/inode.h 2024-04-28 23:21:13.843237290 +0300 +@@ -0,0 +1,707 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -18485,9 +19037,9 @@ diff -Nurp linux-5.15.37/fs/aufs/inode.h linux-5.15.37-aufs/fs/aufs/inode.h +struct inode *au_new_inode(struct dentry *dentry, int must_new); +int au_test_ro(struct super_block *sb, aufs_bindex_t bindex, + struct inode *inode); -+int au_test_h_perm(struct user_namespace *h_userns, struct inode *h_inode, ++int au_test_h_perm(struct mnt_idmap *h_idmap, struct inode *h_inode, + int mask); -+int au_test_h_perm_sio(struct user_namespace *h_userns, struct inode *h_inode, ++int au_test_h_perm_sio(struct mnt_idmap *h_idmap, struct inode *h_inode, + int mask); + +static inline int au_wh_ino(struct super_block *sb, aufs_bindex_t bindex, @@ -18563,20 +19115,20 @@ diff -Nurp linux-5.15.37/fs/aufs/inode.h linux-5.15.37-aufs/fs/aufs/inode.h +/* i_op_add.c */ +int au_may_add(struct dentry *dentry, aufs_bindex_t bindex, + struct dentry *h_parent, int isdir); -+int aufs_mknod(struct user_namespace *userns, struct inode *dir, ++int aufs_mknod(struct mnt_idmap *idmap, struct inode *dir, + struct dentry *dentry, umode_t mode, dev_t dev); -+int aufs_symlink(struct user_namespace *userns, struct inode *dir, ++int aufs_symlink(struct mnt_idmap *idmap, struct inode *dir, + struct dentry *dentry, const char *symname); -+int aufs_create(struct user_namespace *userns, struct inode *dir, ++int aufs_create(struct mnt_idmap *idmap, struct inode *dir, + struct dentry *dentry, umode_t mode, bool want_excl); +struct vfsub_aopen_args; +int au_aopen_or_create(struct inode *dir, struct dentry *dentry, + struct vfsub_aopen_args *args); -+int aufs_tmpfile(struct user_namespace *userns, struct inode *dir, -+ struct dentry *dentry, umode_t mode); ++int aufs_tmpfile(struct mnt_idmap *idmap, struct inode *dir, ++ struct file *file, umode_t mode); +int aufs_link(struct dentry *src_dentry, struct inode *dir, + struct dentry *dentry); -+int aufs_mkdir(struct user_namespace *userns, struct inode *dir, ++int aufs_mkdir(struct mnt_idmap *idmap, struct inode *dir, + struct dentry *dentry, umode_t mode); + +/* i_op_del.c */ @@ -18588,7 +19140,7 @@ diff -Nurp linux-5.15.37/fs/aufs/inode.h linux-5.15.37-aufs/fs/aufs/inode.h + +/* i_op_ren.c */ +int au_wbr(struct dentry *dentry, aufs_bindex_t btgt); -+int aufs_rename(struct user_namespace *userns, ++int aufs_rename(struct mnt_idmap *idmap, + struct inode *_src_dir, struct dentry *_src_dentry, + struct inode *_dst_dir, struct dentry *_dst_dentry, + unsigned int _flags); @@ -18672,8 +19224,10 @@ diff -Nurp linux-5.15.37/fs/aufs/inode.h linux-5.15.37-aufs/fs/aufs/inode.h +#endif + +#ifdef CONFIG_FS_POSIX_ACL -+struct posix_acl *aufs_get_acl(struct inode *inode, int type, bool rcu); -+int aufs_set_acl(struct user_namespace *userns, struct inode *inode, ++struct posix_acl *aufs_get_inode_acl(struct inode *inode, int type, bool rcu); ++struct posix_acl *aufs_get_acl(struct mnt_idmap *idmap, ++ struct dentry *dentry, int type); ++int aufs_set_acl(struct mnt_idmap *idmap, struct dentry *dentry, + struct posix_acl *acl, int type); +#endif + @@ -19051,13 +19605,26 @@ diff -Nurp linux-5.15.37/fs/aufs/inode.h linux-5.15.37-aufs/fs/aufs/inode.h + +#endif /* __KERNEL__ */ +#endif /* __AUFS_INODE_H__ */ -diff -Nurp linux-5.15.37/fs/aufs/ioctl.c linux-5.15.37-aufs/fs/aufs/ioctl.c ---- linux-5.15.37/fs/aufs/ioctl.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/ioctl.c 2022-04-08 20:22:30.614616573 +0300 -@@ -0,0 +1,207 @@ +diff -Naur null/fs/aufs/ioctl.c linux-6.6.4/fs/aufs/ioctl.c +--- /dev/null ++++ linux-6.6.4/fs/aufs/ioctl.c 2024-04-28 23:21:13.843237290 +0300 +@@ -0,0 +1,220 @@ +// SPDX-License-Identifier: GPL-2.0 +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -19262,13 +19829,26 @@ diff -Nurp linux-5.15.37/fs/aufs/ioctl.c linux-5.15.37-aufs/fs/aufs/ioctl.c + return aufs_ioctl_nondir(file, cmd, (unsigned long)compat_ptr(arg)); +} +#endif -diff -Nurp linux-5.15.37/fs/aufs/i_op_add.c linux-5.15.37-aufs/fs/aufs/i_op_add.c ---- linux-5.15.37/fs/aufs/i_op_add.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/i_op_add.c 2022-04-08 20:22:30.613616524 +0300 -@@ -0,0 +1,928 @@ +diff -Naur null/fs/aufs/i_op_add.c linux-6.6.4/fs/aufs/i_op_add.c +--- /dev/null ++++ linux-6.6.4/fs/aufs/i_op_add.c 2024-04-28 23:21:13.842237302 +0300 +@@ -0,0 +1,972 @@ +// SPDX-License-Identifier: GPL-2.0 +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -19621,7 +20201,7 @@ diff -Nurp linux-5.15.37/fs/aufs/i_op_add.c linux-5.15.37-aufs/fs/aufs/i_op_add. + return err; +} + -+int aufs_mknod(struct user_namespace *userns, struct inode *dir, ++int aufs_mknod(struct mnt_idmap *idmap, struct inode *dir, + struct dentry *dentry, umode_t mode, dev_t dev) +{ + struct simple_arg arg = { @@ -19634,7 +20214,7 @@ diff -Nurp linux-5.15.37/fs/aufs/i_op_add.c linux-5.15.37-aufs/fs/aufs/i_op_add. + return add_simple(dir, dentry, &arg); +} + -+int aufs_symlink(struct user_namespace *userns, struct inode *dir, ++int aufs_symlink(struct mnt_idmap *idmap, struct inode *dir, + struct dentry *dentry, const char *symname) +{ + struct simple_arg arg = { @@ -19644,7 +20224,7 @@ diff -Nurp linux-5.15.37/fs/aufs/i_op_add.c linux-5.15.37-aufs/fs/aufs/i_op_add. + return add_simple(dir, dentry, &arg); +} + -+int aufs_create(struct user_namespace *userns, struct inode *dir, ++int aufs_create(struct mnt_idmap *idmap, struct inode *dir, + struct dentry *dentry, umode_t mode, bool want_excl) +{ + struct simple_arg arg = { @@ -19672,16 +20252,19 @@ diff -Nurp linux-5.15.37/fs/aufs/i_op_add.c linux-5.15.37-aufs/fs/aufs/i_op_add. + return add_simple(dir, dentry, &arg); +} + -+int aufs_tmpfile(struct user_namespace *userns, struct inode *dir, -+ struct dentry *dentry, umode_t mode) ++int aufs_tmpfile(struct mnt_idmap *idmap, struct inode *dir, ++ struct file *file, umode_t mode) +{ + int err; + aufs_bindex_t bindex; ++ struct path h_ppath; + struct super_block *sb; -+ struct dentry *parent, *h_parent, *h_dentry; ++ struct au_branch *br; ++ struct dentry *dentry, *parent, *h_parent, *h_dentry; + struct inode *h_dir, *inode; + struct vfsmount *h_mnt; -+ struct user_namespace *h_userns; ++ struct mnt_idmap *h_idmap; ++ struct file *h_file; + struct au_wr_dir_args wr_dir_args = { + .force_btgt = -1, + .flags = AuWrDir_TMPFILE @@ -19690,11 +20273,13 @@ diff -Nurp linux-5.15.37/fs/aufs/i_op_add.c linux-5.15.37-aufs/fs/aufs/i_op_add. + /* copy-up may happen */ + inode_lock(dir); + ++ h_file = NULL; + sb = dir->i_sb; + err = si_read_lock(sb, AuLock_FLUSH | AuLock_NOPLM); + if (unlikely(err)) + goto out; + ++ dentry = file->f_path.dentry; + err = au_di_init(dentry); + if (unlikely(err)) + goto out_si; @@ -19723,19 +20308,25 @@ diff -Nurp linux-5.15.37/fs/aufs/i_op_add.c linux-5.15.37-aufs/fs/aufs/i_op_add. + if (unlikely(!h_dir->i_op->tmpfile)) + goto out_parent; + -+ h_mnt = au_sbr_mnt(sb, bindex); ++ br = au_sbr(sb, bindex); ++ h_mnt = au_br_mnt(br); + err = vfsub_mnt_want_write(h_mnt); + if (unlikely(err)) + goto out_parent; + -+ h_userns = mnt_user_ns(h_mnt); ++ h_idmap = mnt_idmap(h_mnt); + h_parent = au_h_dptr(parent, bindex); -+ h_dentry = vfs_tmpfile(h_userns, h_parent, mode, /*open_flag*/0); -+ if (IS_ERR(h_dentry)) { -+ err = PTR_ERR(h_dentry); ++ h_ppath.mnt = h_mnt; ++ h_ppath.dentry = h_parent; ++ h_file = kernel_tmpfile_open(h_idmap, &h_ppath, mode, /*open_flag*/0, ++ current_cred()); ++ if (IS_ERR(h_file)) { ++ err = PTR_ERR(h_file); ++ h_file = NULL; + goto out_mnt; + } + ++ h_dentry = h_file->f_path.dentry; + au_set_dbtop(dentry, bindex); + au_set_dbbot(dentry, bindex); + au_set_h_dptr(dentry, bindex, dget(h_dentry)); @@ -19745,32 +20336,52 @@ diff -Nurp linux-5.15.37/fs/aufs/i_op_add.c linux-5.15.37-aufs/fs/aufs/i_op_add. + au_set_h_dptr(dentry, bindex, NULL); + au_set_dbtop(dentry, -1); + au_set_dbbot(dentry, -1); -+ } else { -+ if (!inode->i_nlink) -+ set_nlink(inode, 1); -+ d_tmpfile(dentry, inode); -+ au_di(dentry)->di_tmpfile = 1; -+ -+ /* update without i_mutex */ -+ if (au_ibtop(dir) == au_dbtop(dentry)) -+ au_cpup_attr_timesizes(dir); ++ goto out_h_file; + } -+ dput(h_dentry); + ++ if (!inode->i_nlink) ++ set_nlink(inode, 1); ++ d_tmpfile(file, inode); ++ au_di(dentry)->di_tmpfile = 1; ++ get_file(h_file); ++ au_di(dentry)->di_htmpfile = h_file; ++ ++ /* update without i_mutex */ ++ if (au_ibtop(dir) == au_dbtop(dentry)) ++ au_cpup_attr_timesizes(dir); ++ ++out_h_file: ++ fput(h_file); +out_mnt: + vfsub_mnt_drop_write(h_mnt); +out_parent: + di_write_unlock(parent); + dput(parent); + di_write_unlock(dentry); -+ if (unlikely(err)) { -+ au_di_fin(dentry); -+ dentry->d_fsdata = NULL; -+ } ++ if (!err) ++ goto out_si; ++ if (h_file) ++ fput(h_file); ++ au_di(dentry)->di_htmpfile = NULL; ++ au_di_fin(dentry); ++ dentry->d_fsdata = NULL; +out_si: + si_read_unlock(sb); ++ if (!err && h_file) { ++ /* finally... */ ++ err = finish_open_simple(file, err); ++ if (!err) ++ au_lcnt_inc(&br->br_nfiles); ++ else { ++ fput(h_file); ++ au_di(dentry)->di_htmpfile = NULL; ++ au_di_fin(dentry); ++ dentry->d_fsdata = NULL; ++ } ++ } +out: + inode_unlock(dir); ++ AuTraceErr(err); + return err; +} + @@ -20048,7 +20659,7 @@ diff -Nurp linux-5.15.37/fs/aufs/i_op_add.c linux-5.15.37-aufs/fs/aufs/i_op_add. + au_dir_ts(dir, a->bdst); + inode_inc_iversion(dir); + inc_nlink(inode); -+ inode->i_ctime = dir->i_ctime; ++ inode_set_ctime_to_ts(inode, inode_get_ctime(dir)); + d_instantiate(dentry, au_igrab(inode)); + if (d_unhashed(a->h_path.dentry)) + /* some filesystem calls d_drop() */ @@ -20086,7 +20697,7 @@ diff -Nurp linux-5.15.37/fs/aufs/i_op_add.c linux-5.15.37-aufs/fs/aufs/i_op_add. + return err; +} + -+int aufs_mkdir(struct user_namespace *userns, struct inode *dir, ++int aufs_mkdir(struct mnt_idmap *idmap, struct inode *dir, + struct dentry *dentry, umode_t mode) +{ + int err, rerr; @@ -20194,13 +20805,26 @@ diff -Nurp linux-5.15.37/fs/aufs/i_op_add.c linux-5.15.37-aufs/fs/aufs/i_op_add. +out: + return err; +} -diff -Nurp linux-5.15.37/fs/aufs/i_op.c linux-5.15.37-aufs/fs/aufs/i_op.c ---- linux-5.15.37/fs/aufs/i_op.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/i_op.c 2022-04-08 20:22:30.613616524 +0300 -@@ -0,0 +1,1499 @@ +diff -Naur null/fs/aufs/i_op.c linux-6.6.4/fs/aufs/i_op.c +--- /dev/null ++++ linux-6.6.4/fs/aufs/i_op.c 2024-04-28 23:21:13.842237302 +0300 +@@ -0,0 +1,1516 @@ +// SPDX-License-Identifier: GPL-2.0 +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -20208,6 +20832,7 @@ diff -Nurp linux-5.15.37/fs/aufs/i_op.c linux-5.15.37-aufs/fs/aufs/i_op.c + */ + +#include ++#include +#include +#include +#include @@ -20218,7 +20843,7 @@ diff -Nurp linux-5.15.37/fs/aufs/i_op.c linux-5.15.37-aufs/fs/aufs/i_op.c +{ + int err; + const unsigned char write_mask = !!(mask & (MAY_WRITE | MAY_APPEND)); -+ struct user_namespace *h_userns; ++ struct mnt_idmap *h_idmap; + + err = -EPERM; + if (write_mask && IS_IMMUTABLE(h_inode)) @@ -20238,21 +20863,22 @@ diff -Nurp linux-5.15.37/fs/aufs/i_op.c linux-5.15.37-aufs/fs/aufs/i_op.c + * - nfs always sets SB_POSIXACL regardless its mount option 'noacl.' + * in this case, generic_permission() returns -EOPNOTSUPP. + */ -+ h_userns = mnt_user_ns(h_path->mnt); ++ h_idmap = mnt_idmap(h_path->mnt); + if ((write_mask && !au_br_writable(brperm)) + || (au_test_nfs(h_inode->i_sb) && S_ISDIR(h_inode->i_mode) + && write_mask && !(mask & MAY_READ)) + || !h_inode->i_op->permission) { + /* AuLabel(generic_permission); */ -+ /* AuDbg("get_acl %ps\n", h_inode->i_op->get_acl); */ -+ err = generic_permission(h_userns, h_inode, mask); ++ /* AuDbg("get_inode_acl %ps\n", ++ h_inode->i_op->get_inode_acl); */ ++ err = generic_permission(h_idmap, h_inode, mask); + if (err == -EOPNOTSUPP && au_test_nfs_noacl(h_inode)) -+ err = h_inode->i_op->permission(h_userns, h_inode, ++ err = h_inode->i_op->permission(h_idmap, h_inode, + mask); + AuTraceErr(err); + } else { + /* AuLabel(h_inode->permission); */ -+ err = h_inode->i_op->permission(h_userns, h_inode, mask); ++ err = h_inode->i_op->permission(h_idmap, h_inode, mask); + AuTraceErr(err); + } + @@ -20265,7 +20891,7 @@ diff -Nurp linux-5.15.37/fs/aufs/i_op.c linux-5.15.37-aufs/fs/aufs/i_op.c + return err; +} + -+static int aufs_permission(struct user_namespace *userns, struct inode *inode, ++static int aufs_permission(struct mnt_idmap *idmap, struct inode *inode, + int mask) +{ + int err; @@ -21114,7 +21740,7 @@ diff -Nurp linux-5.15.37/fs/aufs/i_op.c linux-5.15.37-aufs/fs/aufs/i_op.c + return err; +} + -+static int aufs_setattr(struct user_namespace *userns, struct dentry *dentry, ++static int aufs_setattr(struct mnt_idmap *idmap, struct dentry *dentry, + struct iattr *ia) +{ + int err; @@ -21122,12 +21748,12 @@ diff -Nurp linux-5.15.37/fs/aufs/i_op.c linux-5.15.37-aufs/fs/aufs/i_op.c + struct super_block *sb; + struct file *file; + struct au_icpup_args *a; -+ struct user_namespace *h_userns; ++ struct mnt_idmap *h_idmap; + + inode = d_inode(dentry); + IMustLock(inode); + -+ err = setattr_prepare(userns, dentry, ia); ++ err = setattr_prepare(idmap, dentry, ia); + if (unlikely(err)) + goto out; + @@ -21221,8 +21847,8 @@ diff -Nurp linux-5.15.37/fs/aufs/i_op.c linux-5.15.37-aufs/fs/aufs/i_op.c + * why don't all acl-aware fs call this func from their ->setattr()? + */ + if (!err && (ia->ia_valid & ATTR_MODE)) { -+ h_userns = mnt_user_ns(a->h_path.mnt); -+ err = vfsub_acl_chmod(h_userns, a->h_inode, ia->ia_mode); ++ h_idmap = mnt_idmap(a->h_path.mnt); ++ err = vfsub_acl_chmod(h_idmap, a->h_path.dentry, ia->ia_mode); + } + if (!err) + au_cpup_attr_changeable(inode); @@ -21285,7 +21911,7 @@ diff -Nurp linux-5.15.37/fs/aufs/i_op.c linux-5.15.37-aufs/fs/aufs/i_op.c + struct super_block *sb; + struct au_icpup_args *a; + struct inode *h_inode; -+ struct user_namespace *h_userns; ++ struct mnt_idmap *h_idmap; + + IMustLock(inode); + @@ -21304,13 +21930,13 @@ diff -Nurp linux-5.15.37/fs/aufs/i_op.c linux-5.15.37-aufs/fs/aufs/i_op.c + err = au_h_path_to_set_attr(dentry, a, &h_path); + if (unlikely(err)) + goto out_di; -+ h_userns = mnt_user_ns(h_path.mnt); ++ h_idmap = mnt_idmap(h_path.mnt); + + inode_unlock(a->h_inode); + switch (arg->type) { + case AU_XATTR_SET: + AuDebugOn(d_is_negative(h_path.dentry)); -+ err = vfsub_setxattr(h_userns, h_path.dentry, ++ err = vfsub_setxattr(h_idmap, h_path.dentry, + arg->u.set.name, arg->u.set.value, + arg->u.set.size, arg->u.set.flags); + break; @@ -21319,7 +21945,7 @@ diff -Nurp linux-5.15.37/fs/aufs/i_op.c linux-5.15.37-aufs/fs/aufs/i_op.c + h_inode = d_inode(h_path.dentry); + if (h_inode->i_op->set_acl) { + /* this will call posix_acl_update_mode */ -+ err = h_inode->i_op->set_acl(h_userns, h_inode, ++ err = h_inode->i_op->set_acl(h_idmap, h_path.dentry, + arg->u.acl_set.acl, + arg->u.acl_set.type); + } @@ -21354,7 +21980,7 @@ diff -Nurp linux-5.15.37/fs/aufs/i_op.c linux-5.15.37-aufs/fs/aufs/i_op.c + inode->i_gid = st->gid; + inode->i_atime = st->atime; + inode->i_mtime = st->mtime; -+ inode->i_ctime = st->ctime; ++ inode_set_ctime_to_ts(inode, st->ctime); + + au_cpup_attr_nlink(inode, /*force*/0); + if (S_ISDIR(inode->i_mode)) { @@ -21453,7 +22079,7 @@ diff -Nurp linux-5.15.37/fs/aufs/i_op.c linux-5.15.37-aufs/fs/aufs/i_op.c + return err; +} + -+static int aufs_getattr(struct user_namespace *userns, const struct path *path, ++static int aufs_getattr(struct mnt_idmap *idmap, const struct path *path, + struct kstat *st, u32 request, unsigned int query) +{ + int err; @@ -21491,7 +22117,7 @@ diff -Nurp linux-5.15.37/fs/aufs/i_op.c linux-5.15.37-aufs/fs/aufs/i_op.c + goto out_di; + +out_fill: -+ generic_fillattr(userns, inode, st); ++ generic_fillattr(idmap, request, inode, st); +out_di: + di_read_unlock(dentry, AuLock_IR); +out_si: @@ -21573,8 +22199,7 @@ diff -Nurp linux-5.15.37/fs/aufs/i_op.c linux-5.15.37-aufs/fs/aufs/i_op.c + return (inode->i_mode & (S_IFBLK | S_IFCHR | S_IFIFO | S_IFSOCK)); +} + -+static int aufs_update_time(struct inode *inode, struct timespec64 *ts, -+ int flags) ++static int aufs_update_time(struct inode *inode, int flags) +{ + int err; + aufs_bindex_t bindex; @@ -21598,7 +22223,7 @@ diff -Nurp linux-5.15.37/fs/aufs/i_op.c linux-5.15.37-aufs/fs/aufs/i_op.c + h_mnt = au_sbr_mnt(sb, bindex); + err = vfsub_mnt_want_write(h_mnt); + if (!err) { -+ err = vfsub_update_time(h_inode, ts, flags); ++ err = vfsub_update_time(h_inode, flags); + vfsub_mnt_drop_write(h_mnt); + } + } else if (au_is_special(h_inode)) { @@ -21637,6 +22262,7 @@ diff -Nurp linux-5.15.37/fs/aufs/i_op.c linux-5.15.37-aufs/fs/aufs/i_op.c + [AuIop_SYMLINK] = { + .permission = aufs_permission, +#ifdef CONFIG_FS_POSIX_ACL ++ .get_inode_acl = aufs_get_inode_acl, + .get_acl = aufs_get_acl, + .set_acl = aufs_set_acl, /* unsupport for symlink? */ +#endif @@ -21648,7 +22274,7 @@ diff -Nurp linux-5.15.37/fs/aufs/i_op.c linux-5.15.37-aufs/fs/aufs/i_op.c + .listxattr = aufs_listxattr, +#endif + -+ .get_link = aufs_get_link, ++ .get_link = aufs_get_link + + /* .update_time = aufs_update_time */ + }, @@ -21665,6 +22291,7 @@ diff -Nurp linux-5.15.37/fs/aufs/i_op.c linux-5.15.37-aufs/fs/aufs/i_op.c + + .permission = aufs_permission, +#ifdef CONFIG_FS_POSIX_ACL ++ .get_inode_acl = aufs_get_inode_acl, + .get_acl = aufs_get_acl, + .set_acl = aufs_set_acl, +#endif @@ -21683,6 +22310,7 @@ diff -Nurp linux-5.15.37/fs/aufs/i_op.c linux-5.15.37-aufs/fs/aufs/i_op.c + [AuIop_OTHER] = { + .permission = aufs_permission, +#ifdef CONFIG_FS_POSIX_ACL ++ .get_inode_acl = aufs_get_inode_acl, + .get_acl = aufs_get_acl, + .set_acl = aufs_set_acl, +#endif @@ -21697,13 +22325,26 @@ diff -Nurp linux-5.15.37/fs/aufs/i_op.c linux-5.15.37-aufs/fs/aufs/i_op.c + .update_time = aufs_update_time + } +}; -diff -Nurp linux-5.15.37/fs/aufs/i_op_del.c linux-5.15.37-aufs/fs/aufs/i_op_del.c ---- linux-5.15.37/fs/aufs/i_op_del.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/i_op_del.c 2022-04-08 20:22:30.614616573 +0300 -@@ -0,0 +1,509 @@ +diff -Naur null/fs/aufs/i_op_del.c linux-6.6.4/fs/aufs/i_op_del.c +--- /dev/null ++++ linux-6.6.4/fs/aufs/i_op_del.c 2024-04-28 23:21:13.842237302 +0300 +@@ -0,0 +1,523 @@ +// SPDX-License-Identifier: GPL-2.0 +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -21787,7 +22428,7 @@ diff -Nurp linux-5.15.37/fs/aufs/i_op_del.c linux-5.15.37-aufs/fs/aufs/i_op_del. + struct path h_ppath; + struct super_block *sb; + struct au_branch *br; -+ struct user_namespace *h_userns; ++ struct mnt_idmap *h_idmap; + + h_dentry = au_h_dptr(dentry, bindex); + if (d_really_is_positive(dentry)) { @@ -21827,15 +22468,15 @@ diff -Nurp linux-5.15.37/fs/aufs/i_op_del.c linux-5.15.37-aufs/fs/aufs/i_op_del. + err = -EACCES; + sb = dentry->d_sb; + br = au_sbr(sb, bindex); -+ h_userns = au_br_userns(br); ++ h_idmap = au_br_idmap(br); + if (unlikely(!au_opt_test(au_mntflags(sb), DIRPERM1) -+ && au_test_h_perm(h_userns, d_inode(h_parent), ++ && au_test_h_perm(h_idmap, d_inode(h_parent), + MAY_EXEC | MAY_WRITE))) + goto out; + + h_ppath.dentry = h_parent; + h_ppath.mnt = au_br_mnt(br); -+ h_latest = au_sio_lkup_one(h_userns, &dentry->d_name, &h_ppath); ++ h_latest = au_sio_lkup_one(h_idmap, &dentry->d_name, &h_ppath); + err = -EIO; + if (IS_ERR(h_latest)) + goto out; @@ -21967,7 +22608,7 @@ diff -Nurp linux-5.15.37/fs/aufs/i_op_del.c linux-5.15.37-aufs/fs/aufs/i_op_del. + + inode = d_inode(dentry); + d_drop(dentry); -+ inode->i_ctime = dir->i_ctime; ++ inode_set_ctime_to_ts(inode, inode_get_ctime(dir)); + + au_dir_ts(dir, bindex); + inode_inc_iversion(dir); @@ -22003,7 +22644,7 @@ diff -Nurp linux-5.15.37/fs/aufs/i_op_del.c linux-5.15.37-aufs/fs/aufs/i_op_del. +{ + int err; + aufs_bindex_t bwh, bindex, btop; -+ struct inode *inode, *h_dir, *delegated; ++ struct inode *inode, *h_dir, *delegated, *h_inode; + struct dentry *parent, *wh_dentry; + /* to reduce stack size */ + struct { @@ -22069,10 +22710,11 @@ diff -Nurp linux-5.15.37/fs/aufs/i_op_del.c linux-5.15.37-aufs/fs/aufs/i_op_del. + if (bindex == btop) { + vfsub_update_h_iattr(&a->h_path, /*did*/NULL); + /*ignore*/ -+ inode->i_ctime = d_inode(a->h_path.dentry)->i_ctime; ++ h_inode = d_inode(a->h_path.dentry); ++ inode_set_ctime_to_ts(inode, inode_get_ctime(h_inode)); + } else + /* todo: this timestamp may be reverted later */ -+ inode->i_ctime = h_dir->i_ctime; ++ inode_set_ctime_to_ts(inode, inode_get_ctime(h_dir)); + goto out_unpin; /* success */ + } + @@ -22210,13 +22852,26 @@ diff -Nurp linux-5.15.37/fs/aufs/i_op_del.c linux-5.15.37-aufs/fs/aufs/i_op_del. + AuTraceErr(err); + return err; +} -diff -Nurp linux-5.15.37/fs/aufs/i_op_ren.c linux-5.15.37-aufs/fs/aufs/i_op_ren.c ---- linux-5.15.37/fs/aufs/i_op_ren.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/i_op_ren.c 2022-04-08 20:22:30.614616573 +0300 -@@ -0,0 +1,1244 @@ +diff -Naur null/fs/aufs/i_op_ren.c linux-6.6.4/fs/aufs/i_op_ren.c +--- /dev/null ++++ linux-6.6.4/fs/aufs/i_op_ren.c 2024-04-28 23:21:13.842237302 +0300 +@@ -0,0 +1,1260 @@ +// SPDX-License-Identifier: GPL-2.0 +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -22569,6 +23224,7 @@ diff -Nurp linux-5.15.37/fs/aufs/i_op_ren.c linux-5.15.37-aufs/fs/aufs/i_op_ren. +{ + int err; + struct dentry *d, *h_d; ++ struct inode *h_inode; + + if (!a->exchange) { + /* prepare workqueue args for asynchronous rmdir */ @@ -22646,12 +23302,14 @@ diff -Nurp linux-5.15.37/fs/aufs/i_op_ren.c linux-5.15.37-aufs/fs/aufs/i_op_ren. + AuDebugOn(au_dbtop(a->dst_dentry) != a->btgt); + a->h_path.dentry = au_h_dptr(a->dst_dentry, a->btgt); + vfsub_update_h_iattr(&a->h_path, /*did*/NULL); /*ignore*/ -+ a->dst_inode->i_ctime = d_inode(a->h_path.dentry)->i_ctime; ++ h_inode = d_inode(a->h_path.dentry); ++ inode_set_ctime_to_ts(a->dst_inode, inode_get_ctime(h_inode)); + } + AuDebugOn(au_dbtop(a->src_dentry) != a->btgt); + a->h_path.dentry = au_h_dptr(a->src_dentry, a->btgt); + vfsub_update_h_iattr(&a->h_path, /*did*/NULL); /*ignore*/ -+ a->src_inode->i_ctime = d_inode(a->h_path.dentry)->i_ctime; ++ h_inode = d_inode(a->h_path.dentry); ++ inode_set_ctime_to_ts(a->src_inode, inode_get_ctime(h_inode)); + + if (!a->exchange) { + /* remove whiteout for dentry */ @@ -23162,7 +23820,7 @@ diff -Nurp linux-5.15.37/fs/aufs/i_op_ren.c linux-5.15.37-aufs/fs/aufs/i_op_ren. + +/* ---------------------------------------------------------------------- */ + -+int aufs_rename(struct user_namespace *userns, ++int aufs_rename(struct mnt_idmap *idmap, + struct inode *_src_dir, struct dentry *_src_dentry, + struct inode *_dst_dir, struct dentry *_dst_dentry, + unsigned int _flags) @@ -23458,13 +24116,13 @@ diff -Nurp linux-5.15.37/fs/aufs/i_op_ren.c linux-5.15.37-aufs/fs/aufs/i_op_ren. + AuTraceErr(err); + return err; +} -diff -Nurp linux-5.15.37/fs/aufs/Kconfig linux-5.15.37-aufs/fs/aufs/Kconfig ---- linux-5.15.37/fs/aufs/Kconfig 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/Kconfig 2022-04-08 20:22:30.611616426 +0300 +diff -Naur null/fs/aufs/Kconfig linux-6.6.4/fs/aufs/Kconfig +--- /dev/null ++++ linux-6.6.4/fs/aufs/Kconfig 2024-04-28 23:21:13.837237365 +0300 @@ -0,0 +1,199 @@ +# SPDX-License-Identifier: GPL-2.0 +config AUFS_FS -+ bool "Aufs (Advanced multi layered unification filesystem) support" ++ tristate "Aufs (Advanced multi layered unification filesystem) support" + help + Aufs is a stackable unification filesystem such as Unionfs, + which unifies several directories and provides a merged single @@ -23536,7 +24194,7 @@ diff -Nurp linux-5.15.37/fs/aufs/Kconfig linux-5.15.37-aufs/fs/aufs/Kconfig + +config AUFS_EXPORT + bool "NFS-exportable aufs" -+ depends on EXPORTFS = y ++ depends on EXPORTFS + help + If you want to export your mounted aufs via NFS, then enable this + option. There are several requirements for this configuration. @@ -23588,7 +24246,7 @@ diff -Nurp linux-5.15.37/fs/aufs/Kconfig linux-5.15.37-aufs/fs/aufs/Kconfig + his child on the lower branch, since it is a bad idea to issue + rename(2) internally for every lower branch. But user may not + accept this behaviour. So here is a workaround to allow such -+ rename(2) and store some extra infromation on the writable ++ rename(2) and store some extra information on the writable + branch. Obviously this costs high (and I don't like it). + To use this feature, you need to enable this configuration AND + to specify the mount option `dirren.' @@ -23661,13 +24319,26 @@ diff -Nurp linux-5.15.37/fs/aufs/Kconfig linux-5.15.37-aufs/fs/aufs/Kconfig + Automatic configuration for internal use. + When aufs supports Magic SysRq, enabled automatically. +endif -diff -Nurp linux-5.15.37/fs/aufs/lcnt.h linux-5.15.37-aufs/fs/aufs/lcnt.h ---- linux-5.15.37/fs/aufs/lcnt.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/lcnt.h 2022-04-08 20:22:30.614616573 +0300 -@@ -0,0 +1,173 @@ +diff -Naur null/fs/aufs/lcnt.h linux-6.6.4/fs/aufs/lcnt.h +--- /dev/null ++++ linux-6.6.4/fs/aufs/lcnt.h 2024-04-28 23:21:13.843237290 +0300 +@@ -0,0 +1,186 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* -+ * Copyright (C) 2018-2021 Junjiro R. Okajima ++ * Copyright (C) 2018-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -23838,13 +24509,26 @@ diff -Nurp linux-5.15.37/fs/aufs/lcnt.h linux-5.15.37-aufs/fs/aufs/lcnt.h + +#endif /* __KERNEL__ */ +#endif /* __AUFS_LCNT_H__ */ -diff -Nurp linux-5.15.37/fs/aufs/loop.c linux-5.15.37-aufs/fs/aufs/loop.c ---- linux-5.15.37/fs/aufs/loop.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/loop.c 2022-04-08 20:22:30.614616573 +0300 -@@ -0,0 +1,135 @@ +diff -Naur null/fs/aufs/loop.c linux-6.6.4/fs/aufs/loop.c +--- /dev/null ++++ linux-6.6.4/fs/aufs/loop.c 2024-04-28 23:21:13.843237290 +0300 +@@ -0,0 +1,148 @@ +// SPDX-License-Identifier: GPL-2.0 +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -23977,13 +24661,26 @@ diff -Nurp linux-5.15.37/fs/aufs/loop.c linux-5.15.37-aufs/fs/aufs/loop.c + symbol_put(loop_backing_file); + au_kfree_try_rcu(au_warn_loopback_array); +} -diff -Nurp linux-5.15.37/fs/aufs/loop.h linux-5.15.37-aufs/fs/aufs/loop.h ---- linux-5.15.37/fs/aufs/loop.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/loop.h 2022-04-08 20:22:30.614616573 +0300 -@@ -0,0 +1,42 @@ +diff -Naur null/fs/aufs/loop.h linux-6.6.4/fs/aufs/loop.h +--- /dev/null ++++ linux-6.6.4/fs/aufs/loop.h 2024-04-28 23:21:13.843237290 +0300 +@@ -0,0 +1,55 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -24023,9 +24720,9 @@ diff -Nurp linux-5.15.37/fs/aufs/loop.h linux-5.15.37-aufs/fs/aufs/loop.h + +#endif /* __KERNEL__ */ +#endif /* __AUFS_LOOP_H__ */ -diff -Nurp linux-5.15.37/fs/aufs/magic.mk linux-5.15.37-aufs/fs/aufs/magic.mk ---- linux-5.15.37/fs/aufs/magic.mk 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/magic.mk 2022-04-08 20:22:30.614616573 +0300 +diff -Naur null/fs/aufs/magic.mk linux-6.6.4/fs/aufs/magic.mk +--- /dev/null ++++ linux-6.6.4/fs/aufs/magic.mk 2024-04-28 23:21:13.843237290 +0300 @@ -0,0 +1,31 @@ +# SPDX-License-Identifier: GPL-2.0 + @@ -24058,20 +24755,27 @@ diff -Nurp linux-5.15.37/fs/aufs/magic.mk linux-5.15.37-aufs/fs/aufs/magic.mk +ifdef CONFIG_HFSPLUS_FS +ccflags-y += -DHFSPLUS_SUPER_MAGIC=0x482b +endif -diff -Nurp linux-5.15.37/fs/aufs/Makefile linux-5.15.37-aufs/fs/aufs/Makefile ---- linux-5.15.37/fs/aufs/Makefile 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/Makefile 2022-04-08 20:22:30.611616426 +0300 -@@ -0,0 +1,39 @@ +diff -Naur null/fs/aufs/Makefile linux-6.6.4/fs/aufs/Makefile +--- /dev/null ++++ linux-6.6.4/fs/aufs/Makefile 2024-04-28 23:21:13.837237365 +0300 +@@ -0,0 +1,46 @@ +# SPDX-License-Identifier: GPL-2.0 + -+include ${srctree}/${src}/magic.mk -+-include ${srctree}/${src}/priv_def.mk ++include ${src}/magic.mk ++ifeq (${CONFIG_AUFS_FS},m) ++include ${src}/conf.mk ++endif ++-include ${src}/priv_def.mk + +# cf. include/linux/kernel.h +# enable pr_debug +ccflags-y += -DDEBUG +# sparse requires the full pathname ++ifdef M ++ccflags-y += -include ${M}/../../include/uapi/linux/aufs_type.h ++else +ccflags-y += -include ${srctree}/include/uapi/linux/aufs_type.h ++endif + +obj-$(CONFIG_AUFS_FS) += aufs.o +aufs-y := module.o sbinfo.o super.o branch.o xino.o sysaufs.o opts.o fsctx.o \ @@ -24101,13 +24805,26 @@ diff -Nurp linux-5.15.37/fs/aufs/Makefile linux-5.15.37-aufs/fs/aufs/Makefile +aufs-$(CONFIG_AUFS_BR_HFSPLUS) += hfsplus.o +aufs-$(CONFIG_AUFS_DEBUG) += debug.o +aufs-$(CONFIG_AUFS_MAGIC_SYSRQ) += sysrq.o -diff -Nurp linux-5.15.37/fs/aufs/module.c linux-5.15.37-aufs/fs/aufs/module.c ---- linux-5.15.37/fs/aufs/module.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/module.c 2022-04-08 20:22:30.614616573 +0300 -@@ -0,0 +1,259 @@ +diff -Naur null/fs/aufs/module.c linux-6.6.4/fs/aufs/module.c +--- /dev/null ++++ linux-6.6.4/fs/aufs/module.c 2024-04-28 23:21:13.843237290 +0300 +@@ -0,0 +1,273 @@ +// SPDX-License-Identifier: GPL-2.0 +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -24239,6 +24956,7 @@ diff -Nurp linux-5.15.37/fs/aufs/module.c linux-5.15.37-aufs/fs/aufs/module.c +MODULE_DESCRIPTION(AUFS_NAME + " -- Advanced multi layered unification filesystem"); +MODULE_VERSION(AUFS_VERSION); ++MODULE_ALIAS_FS(AUFS_NAME); + +/* this module parameter has no meaning when SYSFS is disabled */ +int sysaufs_brs = 1; @@ -24364,13 +25082,26 @@ diff -Nurp linux-5.15.37/fs/aufs/module.c linux-5.15.37-aufs/fs/aufs/module.c + +module_init(aufs_init); +module_exit(aufs_exit); -diff -Nurp linux-5.15.37/fs/aufs/module.h linux-5.15.37-aufs/fs/aufs/module.h ---- linux-5.15.37/fs/aufs/module.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/module.h 2022-04-08 20:22:30.614616573 +0300 -@@ -0,0 +1,153 @@ +diff -Naur null/fs/aufs/module.h linux-6.6.4/fs/aufs/module.h +--- /dev/null ++++ linux-6.6.4/fs/aufs/module.h 2024-04-28 23:21:13.843237290 +0300 +@@ -0,0 +1,180 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -24492,9 +25223,11 @@ diff -Nurp linux-5.15.37/fs/aufs/module.h linux-5.15.37-aufs/fs/aufs/module.h + kmem_cache_create(#type, sizeof(struct type), \ + __alignof__(struct type), AuCacheFlags, ctor) + -+#define AuCacheFuncs(name, index) \ ++#define AuCacheFuncAlloc(name, index) \ + static inline struct au_##name *au_cache_alloc_##name(void) \ -+ { return kmem_cache_alloc(au_cache[AuCache_##index], GFP_NOFS); } \ ++ { return kmem_cache_alloc(au_cache[AuCache_##index], GFP_NOFS); } ++ ++#define AuCacheFuncs(name, index) \ + static inline void au_cache_free_##name##_norcu(struct au_##name *p) \ + { kmem_cache_free(au_cache[AuCache_##index], p); } \ + \ @@ -24511,23 +25244,48 @@ diff -Nurp linux-5.15.37/fs/aufs/module.h linux-5.15.37-aufs/fs/aufs/module.h + au_cache_free_##name##_rcu(p); } + +AuCacheFuncs(dinfo, DINFO); ++AuCacheFuncAlloc(dinfo, DINFO); ++ +AuCacheFuncs(icntnr, ICNTNR); ++static inline struct au_icntnr *au_cache_alloc_icntnr(struct super_block *sb) ++{ return alloc_inode_sb(sb, au_cache[AuCache_ICNTNR], GFP_NOFS); } ++ +AuCacheFuncs(finfo, FINFO); ++AuCacheFuncAlloc(finfo, FINFO); ++ +AuCacheFuncs(vdir, VDIR); ++AuCacheFuncAlloc(vdir, VDIR); ++ +AuCacheFuncs(vdir_dehstr, DEHSTR); ++AuCacheFuncAlloc(vdir_dehstr, DEHSTR); ++ +#ifdef CONFIG_AUFS_HNOTIFY +AuCacheFuncs(hnotify, HNOTIFY); ++AuCacheFuncAlloc(hnotify, HNOTIFY); +#endif + +#endif /* __KERNEL__ */ +#endif /* __AUFS_MODULE_H__ */ -diff -Nurp linux-5.15.37/fs/aufs/mvdown.c linux-5.15.37-aufs/fs/aufs/mvdown.c ---- linux-5.15.37/fs/aufs/mvdown.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/mvdown.c 2022-04-08 20:22:30.614616573 +0300 -@@ -0,0 +1,693 @@ +diff -Naur null/fs/aufs/mvdown.c linux-6.6.4/fs/aufs/mvdown.c +--- /dev/null ++++ linux-6.6.4/fs/aufs/mvdown.c 2024-04-28 23:21:13.843237290 +0300 +@@ -0,0 +1,706 @@ +// SPDX-License-Identifier: GPL-2.0 +/* -+ * Copyright (C) 2011-2021 Junjiro R. Okajima ++ * Copyright (C) 2011-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -25218,13 +25976,26 @@ diff -Nurp linux-5.15.37/fs/aufs/mvdown.c linux-5.15.37-aufs/fs/aufs/mvdown.c + AuTraceErr(err); + return err; +} -diff -Nurp linux-5.15.37/fs/aufs/opts.c linux-5.15.37-aufs/fs/aufs/opts.c ---- linux-5.15.37/fs/aufs/opts.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/opts.c 2022-04-08 20:22:30.614616573 +0300 -@@ -0,0 +1,1019 @@ +diff -Naur null/fs/aufs/opts.c linux-6.6.4/fs/aufs/opts.c +--- /dev/null ++++ linux-6.6.4/fs/aufs/opts.c 2024-04-28 23:21:13.843237290 +0300 +@@ -0,0 +1,1032 @@ +// SPDX-License-Identifier: GPL-2.0 +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -25882,8 +26653,8 @@ diff -Nurp linux-5.15.37/fs/aufs/opts.c linux-5.15.37-aufs/fs/aufs/opts.c + case Opt_prepend: + opt->add.bindex = 0; + fallthrough; -+ add: /* indented label */ + case Opt_add: ++ add: /* indented label */ + err = au_br_add(sb, &opt->add, + au_ftest_opts(opts->flags, REMOUNT)); + if (!err) { @@ -26241,13 +27012,26 @@ diff -Nurp linux-5.15.37/fs/aufs/opts.c linux-5.15.37-aufs/fs/aufs/opts.c +{ + return au_mntflags(sb) & AuOptMask_UDBA; +} -diff -Nurp linux-5.15.37/fs/aufs/opts.h linux-5.15.37-aufs/fs/aufs/opts.h ---- linux-5.15.37/fs/aufs/opts.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/opts.h 2022-04-08 20:22:30.615616621 +0300 -@@ -0,0 +1,250 @@ +diff -Naur null/fs/aufs/opts.h linux-6.6.4/fs/aufs/opts.h +--- /dev/null ++++ linux-6.6.4/fs/aufs/opts.h 2024-04-28 23:21:13.844237277 +0300 +@@ -0,0 +1,263 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -26495,13 +27279,26 @@ diff -Nurp linux-5.15.37/fs/aufs/opts.h linux-5.15.37-aufs/fs/aufs/opts.h + +#endif /* __KERNEL__ */ +#endif /* __AUFS_OPTS_H__ */ -diff -Nurp linux-5.15.37/fs/aufs/plink.c linux-5.15.37-aufs/fs/aufs/plink.c ---- linux-5.15.37/fs/aufs/plink.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/plink.c 2022-04-08 20:22:30.615616621 +0300 -@@ -0,0 +1,503 @@ +diff -Naur null/fs/aufs/plink.c linux-6.6.4/fs/aufs/plink.c +--- /dev/null ++++ linux-6.6.4/fs/aufs/plink.c 2024-04-28 23:21:13.844237277 +0300 +@@ -0,0 +1,516 @@ +// SPDX-License-Identifier: GPL-2.0 +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -27002,13 +27799,26 @@ diff -Nurp linux-5.15.37/fs/aufs/plink.c linux-5.15.37-aufs/fs/aufs/plink.c + } + } +} -diff -Nurp linux-5.15.37/fs/aufs/poll.c linux-5.15.37-aufs/fs/aufs/poll.c ---- linux-5.15.37/fs/aufs/poll.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/poll.c 2022-04-08 20:22:30.615616621 +0300 -@@ -0,0 +1,38 @@ +diff -Naur null/fs/aufs/poll.c linux-6.6.4/fs/aufs/poll.c +--- /dev/null ++++ linux-6.6.4/fs/aufs/poll.c 2024-04-28 23:21:13.844237277 +0300 +@@ -0,0 +1,51 @@ +// SPDX-License-Identifier: GPL-2.0 +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -27044,13 +27854,26 @@ diff -Nurp linux-5.15.37/fs/aufs/poll.c linux-5.15.37-aufs/fs/aufs/poll.c + AuDbg("mask 0x%x\n", mask); + return mask; +} -diff -Nurp linux-5.15.37/fs/aufs/posix_acl.c linux-5.15.37-aufs/fs/aufs/posix_acl.c ---- linux-5.15.37/fs/aufs/posix_acl.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/posix_acl.c 2022-04-08 20:22:30.615616621 +0300 -@@ -0,0 +1,98 @@ +diff -Naur null/fs/aufs/posix_acl.c linux-6.6.4/fs/aufs/posix_acl.c +--- /dev/null ++++ linux-6.6.4/fs/aufs/posix_acl.c 2024-04-28 23:21:13.844237277 +0300 +@@ -0,0 +1,108 @@ +// SPDX-License-Identifier: GPL-2.0 +/* -+ * Copyright (C) 2014-2021 Junjiro R. Okajima ++ * Copyright (C) 2014-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -27060,7 +27883,7 @@ diff -Nurp linux-5.15.37/fs/aufs/posix_acl.c linux-5.15.37-aufs/fs/aufs/posix_ac +#include +#include "aufs.h" + -+struct posix_acl *aufs_get_acl(struct inode *inode, int type, bool rcu) ++struct posix_acl *aufs_get_inode_acl(struct inode *inode, int type, bool rcu) +{ + struct posix_acl *acl; + int err; @@ -27090,7 +27913,7 @@ diff -Nurp linux-5.15.37/fs/aufs/posix_acl.c linux-5.15.37-aufs/fs/aufs/posix_ac + } + + /* always topmost only */ -+ acl = get_acl(h_inode, type); ++ acl = get_inode_acl(h_inode, type); + if (IS_ERR(acl)) + forget_cached_acl(inode, type); + else @@ -27105,12 +27928,24 @@ diff -Nurp linux-5.15.37/fs/aufs/posix_acl.c linux-5.15.37-aufs/fs/aufs/posix_ac + return acl; +} + -+int aufs_set_acl(struct user_namespace *userns, struct inode *inode, ++struct posix_acl *aufs_get_acl(struct mnt_idmap *idmap, ++ struct dentry *dentry, int type) ++{ ++ struct posix_acl *acl; ++ struct inode *inode; ++ ++ inode = d_inode(dentry); ++ acl = aufs_get_inode_acl(inode, type, /*rcu*/false); ++ ++ return acl; ++} ++ ++int aufs_set_acl(struct mnt_idmap *idmap, struct dentry *dentry, + struct posix_acl *acl, int type) +{ + int err; + ssize_t ssz; -+ struct dentry *dentry; ++ struct inode *inode; + struct au_sxattr arg = { + .type = AU_ACL_SET, + .u.acl_set = { @@ -27119,40 +27954,38 @@ diff -Nurp linux-5.15.37/fs/aufs/posix_acl.c linux-5.15.37-aufs/fs/aufs/posix_ac + }, + }; + ++ inode = d_inode(dentry); + IMustLock(inode); + -+ if (inode->i_ino == AUFS_ROOT_INO) -+ dentry = dget(inode->i_sb->s_root); -+ else { -+ dentry = d_find_alias(inode); -+ if (!dentry) -+ dentry = d_find_any_alias(inode); -+ if (!dentry) { -+ pr_warn("cannot handle this inode, " -+ "please report to aufs-users ML\n"); -+ err = -ENOENT; -+ goto out; -+ } -+ } -+ + ssz = au_sxattr(dentry, inode, &arg); + /* forget even it if succeeds since the branch might set differently */ + forget_cached_acl(inode, type); -+ dput(dentry); + err = ssz; + if (ssz >= 0) + err = 0; + -+out: + return err; +} -diff -Nurp linux-5.15.37/fs/aufs/procfs.c linux-5.15.37-aufs/fs/aufs/procfs.c ---- linux-5.15.37/fs/aufs/procfs.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/procfs.c 2022-04-08 20:22:30.615616621 +0300 -@@ -0,0 +1,157 @@ +diff -Naur null/fs/aufs/procfs.c linux-6.6.4/fs/aufs/procfs.c +--- /dev/null ++++ linux-6.6.4/fs/aufs/procfs.c 2024-04-28 23:21:13.844237277 +0300 +@@ -0,0 +1,170 @@ +// SPDX-License-Identifier: GPL-2.0 +/* -+ * Copyright (C) 2010-2021 Junjiro R. Okajima ++ * Copyright (C) 2010-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -27307,13 +28140,26 @@ diff -Nurp linux-5.15.37/fs/aufs/procfs.c linux-5.15.37-aufs/fs/aufs/procfs.c +out: + return err; +} -diff -Nurp linux-5.15.37/fs/aufs/rdu.c linux-5.15.37-aufs/fs/aufs/rdu.c ---- linux-5.15.37/fs/aufs/rdu.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/rdu.c 2022-04-08 20:22:30.615616621 +0300 -@@ -0,0 +1,371 @@ +diff -Naur null/fs/aufs/rdu.c linux-6.6.4/fs/aufs/rdu.c +--- /dev/null ++++ linux-6.6.4/fs/aufs/rdu.c 2024-04-28 23:21:13.844237277 +0300 +@@ -0,0 +1,384 @@ +// SPDX-License-Identifier: GPL-2.0 +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -27345,8 +28191,8 @@ diff -Nurp linux-5.15.37/fs/aufs/rdu.c linux-5.15.37-aufs/fs/aufs/rdu.c + int err; +}; + -+static int au_rdu_fill(struct dir_context *ctx, const char *name, int nlen, -+ loff_t offset, u64 h_ino, unsigned int d_type) ++static bool au_rdu_fill(struct dir_context *ctx, const char *name, int nlen, ++ loff_t offset, u64 h_ino, unsigned int d_type) +{ + int err, len; + struct au_rdu_arg *arg = container_of(ctx, struct au_rdu_arg, ctx); @@ -27387,7 +28233,7 @@ diff -Nurp linux-5.15.37/fs/aufs/rdu.c linux-5.15.37-aufs/fs/aufs/rdu.c + +out: + /* AuTraceErr(err); */ -+ return err; ++ return !err; +} + +static int au_rdu_do(struct file *h_file, struct au_rdu_arg *arg) @@ -27450,7 +28296,7 @@ diff -Nurp linux-5.15.37/fs/aufs/rdu.c linux-5.15.37-aufs/fs/aufs/rdu.c + arg.end += rdu->sz; + + err = -ENOTDIR; -+ if (unlikely(!file->f_op->iterate && !file->f_op->iterate_shared)) ++ if (unlikely(!file->f_op->iterate_shared)) + goto out; + + err = security_file_permission(file, MAY_READ); @@ -27682,13 +28528,26 @@ diff -Nurp linux-5.15.37/fs/aufs/rdu.c linux-5.15.37-aufs/fs/aufs/rdu.c + return err; +} +#endif -diff -Nurp linux-5.15.37/fs/aufs/rwsem.h linux-5.15.37-aufs/fs/aufs/rwsem.h ---- linux-5.15.37/fs/aufs/rwsem.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/rwsem.h 2022-04-08 20:22:30.615616621 +0300 -@@ -0,0 +1,72 @@ +diff -Naur null/fs/aufs/rwsem.h linux-6.6.4/fs/aufs/rwsem.h +--- /dev/null ++++ linux-6.6.4/fs/aufs/rwsem.h 2024-04-28 23:21:13.844237277 +0300 +@@ -0,0 +1,85 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -27758,13 +28617,26 @@ diff -Nurp linux-5.15.37/fs/aufs/rwsem.h linux-5.15.37-aufs/fs/aufs/rwsem.h + +#endif /* __KERNEL__ */ +#endif /* __AUFS_RWSEM_H__ */ -diff -Nurp linux-5.15.37/fs/aufs/sbinfo.c linux-5.15.37-aufs/fs/aufs/sbinfo.c ---- linux-5.15.37/fs/aufs/sbinfo.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/sbinfo.c 2022-04-08 20:22:30.615616621 +0300 -@@ -0,0 +1,303 @@ +diff -Naur null/fs/aufs/sbinfo.c linux-6.6.4/fs/aufs/sbinfo.c +--- /dev/null ++++ linux-6.6.4/fs/aufs/sbinfo.c 2024-04-28 23:21:13.844237277 +0300 +@@ -0,0 +1,316 @@ +// SPDX-License-Identifier: GPL-2.0 +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -28065,13 +28937,26 @@ diff -Nurp linux-5.15.37/fs/aufs/sbinfo.c linux-5.15.37-aufs/fs/aufs/sbinfo.c + di_write_unlock2(d1, d2); + si_read_unlock(d1->d_sb); +} -diff -Nurp linux-5.15.37/fs/aufs/super.c linux-5.15.37-aufs/fs/aufs/super.c ---- linux-5.15.37/fs/aufs/super.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/super.c 2022-04-08 20:22:30.615616621 +0300 -@@ -0,0 +1,858 @@ +diff -Naur null/fs/aufs/super.c linux-6.6.4/fs/aufs/super.c +--- /dev/null ++++ linux-6.6.4/fs/aufs/super.c 2024-04-28 23:21:13.844237277 +0300 +@@ -0,0 +1,871 @@ +// SPDX-License-Identifier: GPL-2.0 +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -28092,7 +28977,7 @@ diff -Nurp linux-5.15.37/fs/aufs/super.c linux-5.15.37-aufs/fs/aufs/super.c +{ + struct au_icntnr *c; + -+ c = au_cache_alloc_icntnr(); ++ c = au_cache_alloc_icntnr(sb); + if (c) { + au_icntnr_init(c); + inode_set_iversion(&c->vfs_inode, 1); /* sigen(sb); */ @@ -28175,7 +29060,7 @@ diff -Nurp linux-5.15.37/fs/aufs/super.c linux-5.15.37-aufs/fs/aufs/super.c + return err; +} + -+static void au_gen_fmt(char *fmt, int len __maybe_unused, const char *pat, ++static void au_gen_fmt(char *fmt, int len, const char *pat, + const char *append) +{ + char *p; @@ -28184,7 +29069,7 @@ diff -Nurp linux-5.15.37/fs/aufs/super.c linux-5.15.37-aufs/fs/aufs/super.c + while (*pat != ':') + *p++ = *pat++; + *p++ = *pat++; -+ strcpy(p, append); ++ strscpy(p, append, len - (p - fmt)); + AuDebugOn(strlen(fmt) >= len); +} + @@ -28927,13 +29812,26 @@ diff -Nurp linux-5.15.37/fs/aufs/super.c linux-5.15.37-aufs/fs/aufs/super.c + /* no need to __module_get() and module_put(). */ + .owner = THIS_MODULE, +}; -diff -Nurp linux-5.15.37/fs/aufs/super.h linux-5.15.37-aufs/fs/aufs/super.h ---- linux-5.15.37/fs/aufs/super.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/super.h 2022-04-08 20:22:30.615616621 +0300 -@@ -0,0 +1,579 @@ +diff -Naur null/fs/aufs/super.h linux-6.6.4/fs/aufs/super.h +--- /dev/null ++++ linux-6.6.4/fs/aufs/super.h 2024-04-28 23:21:13.844237277 +0300 +@@ -0,0 +1,592 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -29510,13 +30408,26 @@ diff -Nurp linux-5.15.37/fs/aufs/super.h linux-5.15.37-aufs/fs/aufs/super.h + +#endif /* __KERNEL__ */ +#endif /* __AUFS_SUPER_H__ */ -diff -Nurp linux-5.15.37/fs/aufs/sysaufs.c linux-5.15.37-aufs/fs/aufs/sysaufs.c ---- linux-5.15.37/fs/aufs/sysaufs.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/sysaufs.c 2022-04-08 20:22:30.615616621 +0300 -@@ -0,0 +1,80 @@ +diff -Naur null/fs/aufs/sysaufs.c linux-6.6.4/fs/aufs/sysaufs.c +--- /dev/null ++++ linux-6.6.4/fs/aufs/sysaufs.c 2024-04-28 23:21:13.844237277 +0300 +@@ -0,0 +1,94 @@ +// SPDX-License-Identifier: GPL-2.0 +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -29540,15 +30451,16 @@ diff -Nurp linux-5.15.37/fs/aufs/sysaufs.c linux-5.15.37-aufs/fs/aufs/sysaufs.c + &sysaufs_si_attr_xi_path.attr, + NULL, +}; ++ATTRIBUTE_GROUPS(sysaufs_si); + +static const struct sysfs_ops au_sbi_ops = { + .show = sysaufs_si_show +}; + -+static struct kobj_type au_sbi_ktype = { ++static const struct kobj_type au_sbi_ktype = { + .release = au_si_free, + .sysfs_ops = &au_sbi_ops, -+ .default_attrs = sysaufs_si_attrs ++ .default_groups = sysaufs_si_groups +}; + +/* ---------------------------------------------------------------------- */ @@ -29594,13 +30506,26 @@ diff -Nurp linux-5.15.37/fs/aufs/sysaufs.c linux-5.15.37-aufs/fs/aufs/sysaufs.c +out: + return err; +} -diff -Nurp linux-5.15.37/fs/aufs/sysaufs.h linux-5.15.37-aufs/fs/aufs/sysaufs.h ---- linux-5.15.37/fs/aufs/sysaufs.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/sysaufs.h 2022-04-08 20:22:30.615616621 +0300 -@@ -0,0 +1,89 @@ +diff -Naur null/fs/aufs/sysaufs.h linux-6.6.4/fs/aufs/sysaufs.h +--- /dev/null ++++ linux-6.6.4/fs/aufs/sysaufs.h 2024-04-28 23:21:13.844237277 +0300 +@@ -0,0 +1,102 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -29687,13 +30612,26 @@ diff -Nurp linux-5.15.37/fs/aufs/sysaufs.h linux-5.15.37-aufs/fs/aufs/sysaufs.h + +#endif /* __KERNEL__ */ +#endif /* __SYSAUFS_H__ */ -diff -Nurp linux-5.15.37/fs/aufs/sysfs.c linux-5.15.37-aufs/fs/aufs/sysfs.c ---- linux-5.15.37/fs/aufs/sysfs.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/sysfs.c 2022-04-08 20:22:30.615616621 +0300 -@@ -0,0 +1,338 @@ +diff -Naur null/fs/aufs/sysfs.c linux-6.6.4/fs/aufs/sysfs.c +--- /dev/null ++++ linux-6.6.4/fs/aufs/sysfs.c 2024-04-28 23:21:13.845237265 +0300 +@@ -0,0 +1,374 @@ +// SPDX-License-Identifier: GPL-2.0 +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -29704,7 +30642,30 @@ diff -Nurp linux-5.15.37/fs/aufs/sysfs.c linux-5.15.37-aufs/fs/aufs/sysfs.c +#include +#include "aufs.h" + ++#ifdef CONFIG_AUFS_FS_MODULE ++/* this entry violates the "one line per file" policy of sysfs */ ++static ssize_t config_show(struct kobject *kobj, struct kobj_attribute *attr, ++ char *buf) ++{ ++ ssize_t err; ++ static char *conf = ++/* this file is generated at compiling */ ++#include "conf.str" ++ ; ++ ++ err = snprintf(buf, PAGE_SIZE, conf); ++ if (unlikely(err >= PAGE_SIZE)) ++ err = -EFBIG; ++ return err; ++} ++ ++static struct kobj_attribute au_config_attr = __ATTR_RO(config); ++#endif ++ +static struct attribute *au_attr[] = { ++#ifdef CONFIG_AUFS_FS_MODULE ++ &au_config_attr.attr, ++#endif + NULL, /* need to NULL terminate the list of attributes */ +}; + @@ -30029,13 +30990,26 @@ diff -Nurp linux-5.15.37/fs/aufs/sysfs.c linux-5.15.37-aufs/fs/aufs/sysfs.c + } + } +} -diff -Nurp linux-5.15.37/fs/aufs/sysrq.c linux-5.15.37-aufs/fs/aufs/sysrq.c ---- linux-5.15.37/fs/aufs/sysrq.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/sysrq.c 2022-04-08 20:22:30.615616621 +0300 -@@ -0,0 +1,136 @@ +diff -Naur null/fs/aufs/sysrq.c linux-6.6.4/fs/aufs/sysrq.c +--- /dev/null ++++ linux-6.6.4/fs/aufs/sysrq.c 2024-04-28 23:21:13.845237265 +0300 +@@ -0,0 +1,149 @@ +// SPDX-License-Identifier: GPL-2.0 +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -30125,7 +31099,7 @@ diff -Nurp linux-5.15.37/fs/aufs/sysrq.c linux-5.15.37-aufs/fs/aufs/sysrq.c +module_param_named(sysrq, aufs_sysrq_key, charp, 0444); +MODULE_PARM_DESC(sysrq, "MagicSysRq key for " AUFS_NAME); + -+static void au_sysrq(int key __maybe_unused) ++static void au_sysrq(u8 key __maybe_unused) +{ + struct au_sbinfo *sbinfo; + struct hlist_bl_node *pos; @@ -30169,13 +31143,26 @@ diff -Nurp linux-5.15.37/fs/aufs/sysrq.c linux-5.15.37-aufs/fs/aufs/sysrq.c + if (unlikely(err)) + pr_err("err %d (ignored)\n", err); +} -diff -Nurp linux-5.15.37/fs/aufs/vdir.c linux-5.15.37-aufs/fs/aufs/vdir.c ---- linux-5.15.37/fs/aufs/vdir.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/vdir.c 2022-04-08 20:22:30.615616621 +0300 -@@ -0,0 +1,883 @@ +diff -Naur null/fs/aufs/vdir.c linux-6.6.4/fs/aufs/vdir.c +--- /dev/null ++++ linux-6.6.4/fs/aufs/vdir.c 2024-04-28 23:21:13.845237265 +0300 +@@ -0,0 +1,896 @@ +// SPDX-License-Identifier: GPL-2.0 +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -30614,7 +31601,7 @@ diff -Nurp linux-5.15.37/fs/aufs/vdir.c linux-5.15.37-aufs/fs/aufs/vdir.c + int err; +}; + -+static int fillvdir(struct dir_context *ctx, const char *__name, int nlen, ++static bool fillvdir(struct dir_context *ctx, const char *__name, int nlen, + loff_t offset __maybe_unused, u64 h_ino, + unsigned int d_type) +{ @@ -30665,7 +31652,7 @@ diff -Nurp linux-5.15.37/fs/aufs/vdir.c linux-5.15.37-aufs/fs/aufs/vdir.c + arg->vdir->vd_jiffy = jiffies; + /* smp_mb(); */ + AuTraceErr(arg->err); -+ return arg->err; ++ return !arg->err; +} + +static int au_handle_shwh(struct super_block *sb, struct au_vdir *vdir, @@ -31056,13 +32043,26 @@ diff -Nurp linux-5.15.37/fs/aufs/vdir.c linux-5.15.37-aufs/fs/aufs/vdir.c + /* smp_mb(); */ + return 0; +} -diff -Nurp linux-5.15.37/fs/aufs/vfsub.c linux-5.15.37-aufs/fs/aufs/vfsub.c ---- linux-5.15.37/fs/aufs/vfsub.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/vfsub.c 2022-04-08 20:22:30.616616670 +0300 -@@ -0,0 +1,905 @@ +diff -Naur null/fs/aufs/vfsub.c linux-6.6.4/fs/aufs/vfsub.c +--- /dev/null ++++ linux-6.6.4/fs/aufs/vfsub.c 2024-04-28 23:21:13.845237265 +0300 +@@ -0,0 +1,918 @@ +// SPDX-License-Identifier: GPL-2.0 +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -31297,7 +32297,7 @@ diff -Nurp linux-5.15.37/fs/aufs/vfsub.c linux-5.15.37-aufs/fs/aufs/vfsub.c +{ + int err; + struct dentry *d; -+ struct user_namespace *userns; ++ struct mnt_idmap *idmap; + + IMustLock(dir); + @@ -31307,10 +32307,10 @@ diff -Nurp linux-5.15.37/fs/aufs/vfsub.c linux-5.15.37-aufs/fs/aufs/vfsub.c + path->dentry = d; + if (unlikely(err)) + goto out; -+ userns = mnt_user_ns(path->mnt); ++ idmap = mnt_idmap(path->mnt); + + lockdep_off(); -+ err = vfs_create(userns, dir, path->dentry, mode, want_excl); ++ err = vfs_create(idmap, dir, path->dentry, mode, want_excl); + lockdep_on(); + if (!err) { + struct path tmp = *path; @@ -31332,7 +32332,7 @@ diff -Nurp linux-5.15.37/fs/aufs/vfsub.c linux-5.15.37-aufs/fs/aufs/vfsub.c +{ + int err; + struct dentry *d; -+ struct user_namespace *userns; ++ struct mnt_idmap *idmap; + + IMustLock(dir); + @@ -31342,10 +32342,10 @@ diff -Nurp linux-5.15.37/fs/aufs/vfsub.c linux-5.15.37-aufs/fs/aufs/vfsub.c + path->dentry = d; + if (unlikely(err)) + goto out; -+ userns = mnt_user_ns(path->mnt); ++ idmap = mnt_idmap(path->mnt); + + lockdep_off(); -+ err = vfs_symlink(userns, dir, path->dentry, symname); ++ err = vfs_symlink(idmap, dir, path->dentry, symname); + lockdep_on(); + if (!err) { + struct path tmp = *path; @@ -31367,7 +32367,7 @@ diff -Nurp linux-5.15.37/fs/aufs/vfsub.c linux-5.15.37-aufs/fs/aufs/vfsub.c +{ + int err; + struct dentry *d; -+ struct user_namespace *userns; ++ struct mnt_idmap *idmap; + + IMustLock(dir); + @@ -31377,10 +32377,10 @@ diff -Nurp linux-5.15.37/fs/aufs/vfsub.c linux-5.15.37-aufs/fs/aufs/vfsub.c + path->dentry = d; + if (unlikely(err)) + goto out; -+ userns = mnt_user_ns(path->mnt); ++ idmap = mnt_idmap(path->mnt); + + lockdep_off(); -+ err = vfs_mknod(userns, dir, path->dentry, mode, dev); ++ err = vfs_mknod(idmap, dir, path->dentry, mode, dev); + lockdep_on(); + if (!err) { + struct path tmp = *path; @@ -31413,7 +32413,7 @@ diff -Nurp linux-5.15.37/fs/aufs/vfsub.c linux-5.15.37-aufs/fs/aufs/vfsub.c +{ + int err; + struct dentry *d; -+ struct user_namespace *userns; ++ struct mnt_idmap *idmap; + + IMustLock(dir); + @@ -31428,10 +32428,10 @@ diff -Nurp linux-5.15.37/fs/aufs/vfsub.c linux-5.15.37-aufs/fs/aufs/vfsub.c + path->dentry = d; + if (unlikely(err)) + goto out; -+ userns = mnt_user_ns(path->mnt); ++ idmap = mnt_idmap(path->mnt); + + lockdep_off(); -+ err = vfs_link(src_dentry, userns, dir, path->dentry, delegated_inode); ++ err = vfs_link(src_dentry, idmap, dir, path->dentry, delegated_inode); + lockdep_on(); + if (!err) { + struct path tmp = *path; @@ -31474,10 +32474,10 @@ diff -Nurp linux-5.15.37/fs/aufs/vfsub.c linux-5.15.37-aufs/fs/aufs/vfsub.c + if (unlikely(err)) + goto out; + -+ rd.old_mnt_userns = mnt_user_ns(path->mnt); ++ rd.old_mnt_idmap = mnt_idmap(path->mnt); + rd.old_dir = src_dir; + rd.old_dentry = src_dentry; -+ rd.new_mnt_userns = rd.old_mnt_userns; ++ rd.new_mnt_idmap = rd.old_mnt_idmap; + rd.new_dir = dir; + rd.new_dentry = path->dentry; + rd.delegated_inode = delegated_inode; @@ -31507,7 +32507,7 @@ diff -Nurp linux-5.15.37/fs/aufs/vfsub.c linux-5.15.37-aufs/fs/aufs/vfsub.c +{ + int err; + struct dentry *d; -+ struct user_namespace *userns; ++ struct mnt_idmap *idmap; + + IMustLock(dir); + @@ -31517,10 +32517,10 @@ diff -Nurp linux-5.15.37/fs/aufs/vfsub.c linux-5.15.37-aufs/fs/aufs/vfsub.c + path->dentry = d; + if (unlikely(err)) + goto out; -+ userns = mnt_user_ns(path->mnt); ++ idmap = mnt_idmap(path->mnt); + + lockdep_off(); -+ err = vfs_mkdir(userns, dir, path->dentry, mode); ++ err = vfs_mkdir(idmap, dir, path->dentry, mode); + lockdep_on(); + if (!err) { + struct path tmp = *path; @@ -31542,7 +32542,7 @@ diff -Nurp linux-5.15.37/fs/aufs/vfsub.c linux-5.15.37-aufs/fs/aufs/vfsub.c +{ + int err; + struct dentry *d; -+ struct user_namespace *userns; ++ struct mnt_idmap *idmap; + + IMustLock(dir); + @@ -31552,10 +32552,10 @@ diff -Nurp linux-5.15.37/fs/aufs/vfsub.c linux-5.15.37-aufs/fs/aufs/vfsub.c + path->dentry = d; + if (unlikely(err)) + goto out; -+ userns = mnt_user_ns(path->mnt); ++ idmap = mnt_idmap(path->mnt); + + lockdep_off(); -+ err = vfs_rmdir(userns, dir, path->dentry); ++ err = vfs_rmdir(idmap, dir, path->dentry); + lockdep_on(); + if (!err) { + struct path tmp = { @@ -31660,14 +32660,14 @@ diff -Nurp linux-5.15.37/fs/aufs/vfsub.c linux-5.15.37-aufs/fs/aufs/vfsub.c + return err; +} + -+long vfsub_splice_to(struct file *in, loff_t *ppos, -+ struct pipe_inode_info *pipe, size_t len, -+ unsigned int flags) ++long vfsub_splice_read(struct file *in, loff_t *ppos, ++ struct pipe_inode_info *pipe, size_t len, ++ unsigned int flags) +{ + long err; + + lockdep_off(); -+ err = do_splice_to(in, ppos, pipe, len, flags); ++ err = vfs_splice_read(in, ppos, pipe, len, flags); + lockdep_on(); + file_accessed(in); + if (err >= 0) @@ -31713,7 +32713,7 @@ diff -Nurp linux-5.15.37/fs/aufs/vfsub.c linux-5.15.37-aufs/fs/aufs/vfsub.c + int err; + struct inode *h_inode; + struct super_block *h_sb; -+ struct user_namespace *h_userns; ++ struct mnt_idmap *h_idmap; + + if (!h_file) { + err = vfsub_truncate(h_path, length); @@ -31725,11 +32725,11 @@ diff -Nurp linux-5.15.37/fs/aufs/vfsub.c linux-5.15.37-aufs/fs/aufs/vfsub.c + lockdep_off(); + sb_start_write(h_sb); + lockdep_on(); -+ err = security_path_truncate(h_path); ++ err = security_file_truncate(h_file); + if (!err) { -+ h_userns = mnt_user_ns(h_path->mnt); ++ h_idmap = mnt_idmap(h_path->mnt); + lockdep_off(); -+ err = do_truncate(h_userns, h_path->dentry, length, attr, ++ err = do_truncate(h_idmap, h_path->dentry, length, attr, + h_file); + lockdep_on(); + } @@ -31759,10 +32759,10 @@ diff -Nurp linux-5.15.37/fs/aufs/vfsub.c linux-5.15.37-aufs/fs/aufs/vfsub.c +int vfsub_sio_mkdir(struct inode *dir, struct path *path, int mode) +{ + int err, do_sio, wkq_err; -+ struct user_namespace *userns; ++ struct mnt_idmap *idmap; + -+ userns = mnt_user_ns(path->mnt); -+ do_sio = au_test_h_perm_sio(userns, dir, MAY_EXEC | MAY_WRITE); ++ idmap = mnt_idmap(path->mnt); ++ do_sio = au_test_h_perm_sio(idmap, dir, MAY_EXEC | MAY_WRITE); + if (!do_sio) { + lockdep_off(); + err = vfsub_mkdir(dir, path, mode); @@ -31797,10 +32797,10 @@ diff -Nurp linux-5.15.37/fs/aufs/vfsub.c linux-5.15.37-aufs/fs/aufs/vfsub.c +int vfsub_sio_rmdir(struct inode *dir, struct path *path) +{ + int err, do_sio, wkq_err; -+ struct user_namespace *userns; ++ struct mnt_idmap *idmap; + -+ userns = mnt_user_ns(path->mnt); -+ do_sio = au_test_h_perm_sio(userns, dir, MAY_EXEC | MAY_WRITE); ++ idmap = mnt_idmap(path->mnt); ++ do_sio = au_test_h_perm_sio(idmap, dir, MAY_EXEC | MAY_WRITE); + if (!do_sio) { + lockdep_off(); + err = vfsub_rmdir(dir, path); @@ -31832,16 +32832,16 @@ diff -Nurp linux-5.15.37/fs/aufs/vfsub.c linux-5.15.37-aufs/fs/aufs/vfsub.c +{ + struct notify_change_args *a = args; + struct inode *h_inode; -+ struct user_namespace *userns; ++ struct mnt_idmap *idmap; + + h_inode = d_inode(a->path->dentry); + IMustLock(h_inode); + + *a->errp = -EPERM; + if (!IS_IMMUTABLE(h_inode) && !IS_APPEND(h_inode)) { -+ userns = mnt_user_ns(a->path->mnt); ++ idmap = mnt_idmap(a->path->mnt); + lockdep_off(); -+ *a->errp = notify_change(userns, a->path->dentry, a->ia, ++ *a->errp = notify_change(idmap, a->path->dentry, a->ia, + a->delegated_inode); + lockdep_on(); + if (!*a->errp) @@ -31898,7 +32898,7 @@ diff -Nurp linux-5.15.37/fs/aufs/vfsub.c linux-5.15.37-aufs/fs/aufs/vfsub.c + struct unlink_args *a = args; + struct dentry *d = a->path->dentry; + struct inode *h_inode; -+ struct user_namespace *userns; ++ struct mnt_idmap *idmap; + const int stop_sillyrename = (au_test_nfs(d->d_sb) + && au_dcount(d) == 1); + @@ -31918,9 +32918,9 @@ diff -Nurp linux-5.15.37/fs/aufs/vfsub.c linux-5.15.37-aufs/fs/aufs/vfsub.c + ihold(h_inode); + } + -+ userns = mnt_user_ns(a->path->mnt); ++ idmap = mnt_idmap(a->path->mnt); + lockdep_off(); -+ *a->errp = vfs_unlink(userns, a->dir, d, a->delegated_inode); ++ *a->errp = vfs_unlink(idmap, a->dir, d, a->delegated_inode); + lockdep_on(); + if (!*a->errp) { + struct path tmp = { @@ -31965,13 +32965,26 @@ diff -Nurp linux-5.15.37/fs/aufs/vfsub.c linux-5.15.37-aufs/fs/aufs/vfsub.c + + return err; +} -diff -Nurp linux-5.15.37/fs/aufs/vfsub.h linux-5.15.37-aufs/fs/aufs/vfsub.h ---- linux-5.15.37/fs/aufs/vfsub.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/vfsub.h 2022-04-08 20:22:30.616616670 +0300 -@@ -0,0 +1,345 @@ +diff -Naur null/fs/aufs/vfsub.h linux-6.6.4/fs/aufs/vfsub.h +--- /dev/null ++++ linux-6.6.4/fs/aufs/vfsub.h 2024-04-28 23:21:13.845237265 +0300 +@@ -0,0 +1,403 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -32107,6 +33120,20 @@ diff -Nurp linux-5.15.37/fs/aufs/vfsub.h linux-5.15.37-aufs/fs/aufs/vfsub.h +} +#endif + ++static inline void vfsub_file_start_write(struct file *file) ++{ ++ lockdep_off(); ++ file_start_write(file); ++ lockdep_on(); ++} ++ ++static inline void vfsub_file_end_write(struct file *file) ++{ ++ lockdep_off(); ++ file_end_write(file); ++ lockdep_on(); ++} ++ +/* ---------------------------------------------------------------------- */ + +struct au_hinode; @@ -32184,32 +33211,31 @@ diff -Nurp linux-5.15.37/fs/aufs/vfsub.h linux-5.15.37-aufs/fs/aufs/vfsub.h +} +#endif + -+static inline int vfsub_update_time(struct inode *h_inode, -+ struct timespec64 *ts, int flags) ++static inline int vfsub_update_time(struct inode *h_inode, int flags) +{ -+ return inode_update_time(h_inode, ts, flags); ++ return inode_update_time(h_inode, flags); + /* no vfsub_update_h_iattr() since we don't have struct path */ +} + +#ifdef CONFIG_FS_POSIX_ACL -+static inline int vfsub_acl_chmod(struct user_namespace *h_userns, -+ struct inode *h_inode, umode_t h_mode) ++static inline int vfsub_acl_chmod(struct mnt_idmap *h_idmap, ++ struct dentry *h_dentry, umode_t h_mode) +{ + int err; + -+ err = posix_acl_chmod(h_userns, h_inode, h_mode); ++ err = posix_acl_chmod(h_idmap, h_dentry, h_mode); + if (err == -EOPNOTSUPP) + err = 0; + return err; +} +#else -+AuStubInt0(vfsub_acl_chmod, struct user_namespace *h_userns, -+ struct inode *h_inode, umode_t h_mode); ++AuStubInt0(vfsub_acl_chmod, struct mnt_idmap *h_idmap, ++ struct dentry *h_dentry, umode_t h_mode); +#endif + -+long vfsub_splice_to(struct file *in, loff_t *ppos, -+ struct pipe_inode_info *pipe, size_t len, -+ unsigned int flags); ++long vfsub_splice_read(struct file *in, loff_t *ppos, ++ struct pipe_inode_info *pipe, size_t len, ++ unsigned int flags); +long vfsub_splice_from(struct pipe_inode_info *pipe, struct file *out, + loff_t *ppos, size_t len, unsigned int flags); + @@ -32287,40 +33313,85 @@ diff -Nurp linux-5.15.37/fs/aufs/vfsub.h linux-5.15.37-aufs/fs/aufs/vfsub.h + +/* ---------------------------------------------------------------------- */ + -+static inline int vfsub_setxattr(struct user_namespace *userns, ++static inline int vfsub_setxattr(struct mnt_idmap *idmap, + struct dentry *dentry, const char *name, + const void *value, size_t size, int flags) +{ + int err; + + lockdep_off(); -+ err = vfs_setxattr(userns, dentry, name, value, size, flags); ++ err = vfs_setxattr(idmap, dentry, name, value, size, flags); + lockdep_on(); + + return err; +} + -+static inline int vfsub_removexattr(struct user_namespace *userns, ++static inline int vfsub_removexattr(struct mnt_idmap *idmap, + struct dentry *dentry, const char *name) +{ + int err; + + lockdep_off(); -+ err = vfs_removexattr(userns, dentry, name); ++ err = vfs_removexattr(idmap, dentry, name); + lockdep_on(); + + return err; +} + ++#ifdef CONFIG_FS_POSIX_ACL ++static inline int vfsub_set_acl(struct mnt_idmap *idmap, ++ struct dentry *dentry, const char *name, ++ struct posix_acl *acl) ++{ ++ int err; ++ ++ lockdep_off(); ++ err = vfs_set_acl(idmap, dentry, name, acl); ++ lockdep_on(); ++ ++ return err; ++} ++ ++static inline int vfsub_remove_acl(struct mnt_idmap *idmap, ++ struct dentry *dentry, const char *name) ++{ ++ int err; ++ ++ lockdep_off(); ++ err = vfs_remove_acl(idmap, dentry, name); ++ lockdep_on(); ++ ++ return err; ++} ++#else ++AuStubInt0(vfsub_set_acl, struct mnt_idmap *idmap, struct dentry *dentry, ++ const char *name, struct posix_acl *acl); ++AuStubInt0(vfsub_remove_acl, struct mnt_idmap *idmap, ++ struct dentry *dentry, const char *name); ++#endif ++ +#endif /* __KERNEL__ */ +#endif /* __AUFS_VFSUB_H__ */ -diff -Nurp linux-5.15.37/fs/aufs/wbr_policy.c linux-5.15.37-aufs/fs/aufs/wbr_policy.c ---- linux-5.15.37/fs/aufs/wbr_policy.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/wbr_policy.c 2022-04-08 20:22:30.616616670 +0300 -@@ -0,0 +1,817 @@ +diff -Naur null/fs/aufs/wbr_policy.c linux-6.6.4/fs/aufs/wbr_policy.c +--- /dev/null ++++ linux-6.6.4/fs/aufs/wbr_policy.c 2024-04-28 23:21:13.845237265 +0300 +@@ -0,0 +1,830 @@ +// SPDX-License-Identifier: GPL-2.0 +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -33135,13 +34206,26 @@ diff -Nurp linux-5.15.37/fs/aufs/wbr_policy.c linux-5.15.37-aufs/fs/aufs/wbr_pol + .fin = au_wbr_create_fin_mfs + } +}; -diff -Nurp linux-5.15.37/fs/aufs/whout.c linux-5.15.37-aufs/fs/aufs/whout.c ---- linux-5.15.37/fs/aufs/whout.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/whout.c 2022-04-08 20:22:30.616616670 +0300 -@@ -0,0 +1,1059 @@ +diff -Naur null/fs/aufs/whout.c linux-6.6.4/fs/aufs/whout.c +--- /dev/null ++++ linux-6.6.4/fs/aufs/whout.c 2024-04-28 23:21:13.846237252 +0300 +@@ -0,0 +1,1072 @@ +// SPDX-License-Identifier: GPL-2.0 +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -33192,7 +34276,7 @@ diff -Nurp linux-5.15.37/fs/aufs/whout.c linux-5.15.37-aufs/fs/aufs/whout.c + * test if the @wh_name exists under @h_ppath. + * @try_sio specifies the necessary of super-io. + */ -+int au_wh_test(struct user_namespace *h_userns, struct path *h_ppath, ++int au_wh_test(struct mnt_idmap *h_idmap, struct path *h_ppath, + struct qstr *wh_name, int try_sio) +{ + int err; @@ -33201,7 +34285,7 @@ diff -Nurp linux-5.15.37/fs/aufs/whout.c linux-5.15.37-aufs/fs/aufs/whout.c + if (!try_sio) + wh_dentry = vfsub_lkup_one(wh_name, h_ppath); + else -+ wh_dentry = au_sio_lkup_one(h_userns, wh_name, h_ppath); ++ wh_dentry = au_sio_lkup_one(h_idmap, wh_name, h_ppath); + err = PTR_ERR(wh_dentry); + if (IS_ERR(wh_dentry)) { + if (err == -ENAMETOOLONG) @@ -33230,14 +34314,14 @@ diff -Nurp linux-5.15.37/fs/aufs/whout.c linux-5.15.37-aufs/fs/aufs/whout.c +/* + * test if the @h_path->dentry sets opaque or not. + */ -+int au_diropq_test(struct user_namespace *h_userns, struct path *h_path) ++int au_diropq_test(struct mnt_idmap *h_idmap, struct path *h_path) +{ + int err; + struct inode *h_dir; + + h_dir = d_inode(h_path->dentry); -+ err = au_wh_test(h_userns, h_path, &diropq_name, -+ au_test_h_perm_sio(h_userns, h_dir, MAY_EXEC)); ++ err = au_wh_test(h_idmap, h_path, &diropq_name, ++ au_test_h_perm_sio(h_idmap, h_dir, MAY_EXEC)); + return err; +} + @@ -33255,7 +34339,7 @@ diff -Nurp linux-5.15.37/fs/aufs/whout.c linux-5.15.37-aufs/fs/aufs/whout.c + static unsigned short cnt; + struct qstr qs; + struct path h_ppath; -+ struct user_namespace *h_userns; ++ struct mnt_idmap *h_idmap; + + BUILD_BUG_ON(sizeof(cnt) * 2 > AUFS_WH_TMP_LEN); + @@ -33281,11 +34365,11 @@ diff -Nurp linux-5.15.37/fs/aufs/whout.c linux-5.15.37-aufs/fs/aufs/whout.c + + h_ppath.dentry = h_parent; + h_ppath.mnt = au_br_mnt(br); -+ h_userns = au_br_userns(br); ++ h_idmap = au_br_idmap(br); + qs.name = name; + for (i = 0; i < 3; i++) { + sprintf(p, "%.*x", AUFS_WH_TMP_LEN, cnt++); -+ dentry = au_sio_lkup_one(h_userns, &qs, &h_ppath); ++ dentry = au_sio_lkup_one(h_idmap, &qs, &h_ppath); + if (IS_ERR(dentry) || d_is_negative(dentry)) + goto out_name; + dput(dentry); @@ -33882,11 +34966,11 @@ diff -Nurp linux-5.15.37/fs/aufs/whout.c linux-5.15.37-aufs/fs/aufs/whout.c + unsigned int flags) +{ + struct dentry *diropq, *h_dentry; -+ struct user_namespace *h_userns; ++ struct mnt_idmap *h_idmap; + -+ h_userns = au_sbr_userns(dentry->d_sb, bindex); ++ h_idmap = au_sbr_idmap(dentry->d_sb, bindex); + h_dentry = au_h_dptr(dentry, bindex); -+ if (!au_test_h_perm_sio(h_userns, d_inode(h_dentry), ++ if (!au_test_h_perm_sio(h_idmap, d_inode(h_dentry), + MAY_EXEC | MAY_WRITE)) + diropq = do_diropq(dentry, bindex, flags); + else { @@ -34075,7 +35159,7 @@ diff -Nurp linux-5.15.37/fs/aufs/whout.c linux-5.15.37-aufs/fs/aufs/whout.c + struct path wh_path; + struct inode *wh_inode, *h_dir; + struct au_branch *br; -+ struct user_namespace *h_userns; ++ struct mnt_idmap *h_idmap; + + h_dir = d_inode(wh_dentry->d_parent); /* dir inode is locked */ + IMustLock(h_dir); @@ -34083,7 +35167,7 @@ diff -Nurp linux-5.15.37/fs/aufs/whout.c linux-5.15.37-aufs/fs/aufs/whout.c + br = au_sbr(dir->i_sb, bindex); + wh_path.dentry = wh_dentry; + wh_path.mnt = au_br_mnt(br); -+ h_userns = au_br_userns(br); ++ h_idmap = au_br_idmap(br); + wh_inode = d_inode(wh_dentry); + inode_lock_nested(wh_inode, AuLsc_I_CHILD); + @@ -34091,7 +35175,7 @@ diff -Nurp linux-5.15.37/fs/aufs/whout.c linux-5.15.37-aufs/fs/aufs/whout.c + * someone else might change some whiteouts while we were sleeping. + * it means this whlist may have an obsoleted entry. + */ -+ if (!au_test_h_perm_sio(h_userns, wh_inode, MAY_EXEC | MAY_WRITE)) ++ if (!au_test_h_perm_sio(h_idmap, wh_inode, MAY_EXEC | MAY_WRITE)) + err = del_wh_children(&wh_path, whlist, bindex); + else { + int wkq_err; @@ -34198,13 +35282,26 @@ diff -Nurp linux-5.15.37/fs/aufs/whout.c linux-5.15.37-aufs/fs/aufs/whout.c + au_whtmp_rmdir_free(args); + } +} -diff -Nurp linux-5.15.37/fs/aufs/whout.h linux-5.15.37-aufs/fs/aufs/whout.h ---- linux-5.15.37/fs/aufs/whout.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/whout.h 2022-04-08 20:22:30.616616670 +0300 -@@ -0,0 +1,74 @@ +diff -Naur null/fs/aufs/whout.h linux-6.6.4/fs/aufs/whout.h +--- /dev/null ++++ linux-6.6.4/fs/aufs/whout.h 2024-04-28 23:21:13.846237252 +0300 +@@ -0,0 +1,87 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -34220,9 +35317,9 @@ diff -Nurp linux-5.15.37/fs/aufs/whout.h linux-5.15.37-aufs/fs/aufs/whout.h + +/* whout.c */ +int au_wh_name_alloc(struct qstr *wh, const struct qstr *name); -+int au_wh_test(struct user_namespace *h_userns, struct path *h_ppath, ++int au_wh_test(struct mnt_idmap *h_idmap, struct path *h_ppath, + struct qstr *wh_name, int try_sio); -+int au_diropq_test(struct user_namespace *h_userns, struct path *h_path); ++int au_diropq_test(struct mnt_idmap *h_idmap, struct path *h_path); +struct au_branch; +struct dentry *au_whtmp_lkup(struct dentry *h_parent, struct au_branch *br, + struct qstr *prefix); @@ -34276,13 +35373,26 @@ diff -Nurp linux-5.15.37/fs/aufs/whout.h linux-5.15.37-aufs/fs/aufs/whout.h + +#endif /* __KERNEL__ */ +#endif /* __AUFS_WHOUT_H__ */ -diff -Nurp linux-5.15.37/fs/aufs/wkq.c linux-5.15.37-aufs/fs/aufs/wkq.c ---- linux-5.15.37/fs/aufs/wkq.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/wkq.c 2022-04-08 20:22:30.616616670 +0300 -@@ -0,0 +1,359 @@ +diff -Naur null/fs/aufs/wkq.c linux-6.6.4/fs/aufs/wkq.c +--- /dev/null ++++ linux-6.6.4/fs/aufs/wkq.c 2024-04-28 23:21:13.846237252 +0300 +@@ -0,0 +1,372 @@ +// SPDX-License-Identifier: GPL-2.0 +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -34639,13 +35749,26 @@ diff -Nurp linux-5.15.37/fs/aufs/wkq.c linux-5.15.37-aufs/fs/aufs/wkq.c + + return err; +} -diff -Nurp linux-5.15.37/fs/aufs/wkq.h linux-5.15.37-aufs/fs/aufs/wkq.h ---- linux-5.15.37/fs/aufs/wkq.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/wkq.h 2022-04-08 20:22:30.616616670 +0300 -@@ -0,0 +1,76 @@ +diff -Naur null/fs/aufs/wkq.h linux-6.6.4/fs/aufs/wkq.h +--- /dev/null ++++ linux-6.6.4/fs/aufs/wkq.h 2024-04-28 23:21:13.846237252 +0300 +@@ -0,0 +1,89 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -34719,13 +35842,26 @@ diff -Nurp linux-5.15.37/fs/aufs/wkq.h linux-5.15.37-aufs/fs/aufs/wkq.h + +#endif /* __KERNEL__ */ +#endif /* __AUFS_WKQ_H__ */ -diff -Nurp linux-5.15.37/fs/aufs/xattr.c linux-5.15.37-aufs/fs/aufs/xattr.c ---- linux-5.15.37/fs/aufs/xattr.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/xattr.c 2022-04-08 20:22:30.616616670 +0300 -@@ -0,0 +1,355 @@ +diff -Naur null/fs/aufs/xattr.c linux-6.6.4/fs/aufs/xattr.c +--- /dev/null ++++ linux-6.6.4/fs/aufs/xattr.c 2024-04-28 23:21:13.846237252 +0300 +@@ -0,0 +1,360 @@ +// SPDX-License-Identifier: GPL-2.0 +/* -+ * Copyright (C) 2014-2021 Junjiro R. Okajima ++ * Copyright (C) 2014-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -34733,7 +35869,6 @@ diff -Nurp linux-5.15.37/fs/aufs/xattr.c linux-5.15.37-aufs/fs/aufs/xattr.c + */ + +#include -+#include +#include +#include "aufs.h" + @@ -34780,39 +35915,57 @@ diff -Nurp linux-5.15.37/fs/aufs/xattr.c linux-5.15.37-aufs/fs/aufs/xattr.c + char *name, char **buf, unsigned int ignore_flags, + unsigned int verbose) +{ -+ int err; ++ int err, is_acl; + ssize_t ssz; + struct inode *h_idst; + struct dentry *h_dst_dentry, *h_src_dentry; -+ struct user_namespace *h_dst_userns, *h_src_userns; ++ struct mnt_idmap *h_dst_idmap, *h_src_idmap; ++ struct posix_acl *acl; + -+ h_src_userns = mnt_user_ns(h_src->mnt); ++ is_acl = !!is_posix_acl_xattr(name); ++ h_src_idmap = mnt_idmap(h_src->mnt); + h_src_dentry = h_src->dentry; -+ ssz = vfs_getxattr_alloc(h_src_userns, h_src_dentry, name, buf, 0, -+ GFP_NOFS); -+ err = ssz; -+ if (unlikely(err <= 0)) { -+ if (err == -ENODATA -+ || (err == -EOPNOTSUPP -+ && ((ignore_flags & au_xattr_out_of_list) -+ || (au_test_nfs_noacl(d_inode(h_src_dentry)) -+ && (!strcmp(name, XATTR_NAME_POSIX_ACL_ACCESS) -+ || !strcmp(name, -+ XATTR_NAME_POSIX_ACL_DEFAULT)))) -+ )) -+ err = 0; -+ if (err && (verbose || au_debug_test())) -+ pr_err("%s, err %d\n", name, err); -+ goto out; ++ if (is_acl) { ++ acl = vfs_get_acl(h_src_idmap, h_src_dentry, name); ++ AuDebugOn(!acl); ++ if (IS_ERR(acl)) { ++ err = PTR_ERR(acl); ++ if (err == -ENODATA) ++ err = 0; ++ else if (err == -EOPNOTSUPP ++ && au_test_nfs_noacl(d_inode(h_src_dentry))) ++ err = 0; ++ else if (verbose || au_debug_test()) ++ pr_err("%s, err %d\n", name, err); ++ goto out; ++ } ++ } else { ++ ssz = vfs_getxattr_alloc(h_src_idmap, h_src_dentry, name, buf, ++ 0, GFP_NOFS); ++ if (unlikely(ssz <= 0)) { ++ err = ssz; ++ if (err == -ENODATA) ++ err = 0; ++ else if (err == -EOPNOTSUPP ++ && (ignore_flags & au_xattr_out_of_list)) ++ err = 0; ++ else if (err && (verbose || au_debug_test())) ++ pr_err("%s, err %d\n", name, err); ++ goto out; ++ } + } + + /* unlock it temporary */ -+ h_dst_userns = mnt_user_ns(h_dst->mnt); ++ h_dst_idmap = mnt_idmap(h_dst->mnt); + h_dst_dentry = h_dst->dentry; + h_idst = d_inode(h_dst_dentry); + inode_unlock(h_idst); -+ err = vfsub_setxattr(h_dst_userns, h_dst_dentry, name, *buf, ssz, -+ /*flags*/0); ++ if (is_acl) { ++ err = vfsub_set_acl(h_dst_idmap, h_dst_dentry, name, acl); ++ posix_acl_release(acl); ++ } else ++ err = vfsub_setxattr(h_dst_idmap, h_dst_dentry, name, *buf, ++ ssz, /*flags*/0); + inode_lock_nested(h_idst, AuLsc_I_CHILD2); + if (unlikely(err)) { + if (verbose || au_debug_test()) @@ -34827,7 +35980,7 @@ diff -Nurp linux-5.15.37/fs/aufs/xattr.c linux-5.15.37-aufs/fs/aufs/xattr.c +int au_cpup_xattr(struct path *h_dst, struct path *h_src, int ignore_flags, + unsigned int verbose) +{ -+ int err, unlocked, acl_access, acl_default; ++ int err, unlocked; + ssize_t ssz; + struct dentry *h_dst_dentry, *h_src_dentry; + struct inode *h_isrc, *h_idst; @@ -34875,33 +36028,12 @@ diff -Nurp linux-5.15.37/fs/aufs/xattr.c linux-5.15.37-aufs/fs/aufs/xattr.c + err = 0; + e = p + ssz; + value = NULL; -+ acl_access = 0; -+ acl_default = 0; ++ ignore_flags |= au_xattr_out_of_list; + while (!err && p < e) { -+ acl_access |= !strncmp(p, XATTR_NAME_POSIX_ACL_ACCESS, -+ sizeof(XATTR_NAME_POSIX_ACL_ACCESS) - 1); -+ acl_default |= !strncmp(p, XATTR_NAME_POSIX_ACL_DEFAULT, -+ sizeof(XATTR_NAME_POSIX_ACL_DEFAULT) -+ - 1); + err = au_do_cpup_xattr(h_dst, h_src, p, &value, ignore_flags, + verbose); + p += strlen(p) + 1; + } -+ AuTraceErr(err); -+ ignore_flags |= au_xattr_out_of_list; -+ if (!err && !acl_access) { -+ err = au_do_cpup_xattr(h_dst, h_src, -+ XATTR_NAME_POSIX_ACL_ACCESS, &value, -+ ignore_flags, verbose); -+ AuTraceErr(err); -+ } -+ if (!err && !acl_default) { -+ err = au_do_cpup_xattr(h_dst, h_src, -+ XATTR_NAME_POSIX_ACL_DEFAULT, &value, -+ ignore_flags, verbose); -+ AuTraceErr(err); -+ } -+ + au_kfree_try_rcu(value); + +out_free: @@ -34978,7 +36110,7 @@ diff -Nurp linux-5.15.37/fs/aufs/xattr.c linux-5.15.37-aufs/fs/aufs/xattr.c + break; + case AU_XATTR_GET: + AuDebugOn(d_is_negative(h_path.dentry)); -+ err = vfs_getxattr(mnt_user_ns(h_path.mnt), h_path.dentry, ++ err = vfs_getxattr(mnt_idmap(h_path.mnt), h_path.dentry, + arg->u.get.name, arg->u.get.value, + arg->u.get.size); + break; @@ -35050,7 +36182,7 @@ diff -Nurp linux-5.15.37/fs/aufs/xattr.c linux-5.15.37-aufs/fs/aufs/xattr.c +} + +static int au_xattr_set(const struct xattr_handler *handler, -+ struct user_namespace *userns, ++ struct mnt_idmap *idmap, + struct dentry *dentry, struct inode *inode, + const char *name, const void *value, size_t size, + int flags) @@ -35066,10 +36198,6 @@ diff -Nurp linux-5.15.37/fs/aufs/xattr.c linux-5.15.37-aufs/fs/aufs/xattr.c +}; + +static const struct xattr_handler *au_xattr_handlers[] = { -+#ifdef CONFIG_FS_POSIX_ACL -+ &posix_acl_access_xattr_handler, -+ &posix_acl_default_xattr_handler, -+#endif + &au_xattr_handler, /* must be last */ + NULL +}; @@ -35078,13 +36206,26 @@ diff -Nurp linux-5.15.37/fs/aufs/xattr.c linux-5.15.37-aufs/fs/aufs/xattr.c +{ + sb->s_xattr = au_xattr_handlers; +} -diff -Nurp linux-5.15.37/fs/aufs/xino.c linux-5.15.37-aufs/fs/aufs/xino.c ---- linux-5.15.37/fs/aufs/xino.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/fs/aufs/xino.c 2022-04-08 20:22:30.616616670 +0300 -@@ -0,0 +1,1913 @@ +diff -Naur null/fs/aufs/xino.c linux-6.6.4/fs/aufs/xino.c +--- /dev/null ++++ linux-6.6.4/fs/aufs/xino.c 2024-04-28 23:21:13.846237252 +0300 +@@ -0,0 +1,1926 @@ +// SPDX-License-Identifier: GPL-2.0 +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +/* @@ -35330,7 +36471,7 @@ diff -Nurp linux-5.15.37/fs/aufs/xino.c linux-5.15.37-aufs/fs/aufs/xino.c + } + + /* no need to mnt_want_write() since we call dentry_open() later */ -+ err = vfs_create(mnt_user_ns(base->mnt), dir, path.dentry, 0666, NULL); ++ err = vfs_create(mnt_idmap(base->mnt), dir, path.dentry, 0666, NULL); + if (unlikely(err)) { + file = ERR_PTR(err); + pr_err("%pd create err %d\n", dentry, err); @@ -36995,324 +38136,26 @@ diff -Nurp linux-5.15.37/fs/aufs/xino.c linux-5.15.37-aufs/fs/aufs/xino.c +out: + return err; +} -diff -Nurp linux-5.15.37/fs/dcache.c linux-5.15.37-aufs/fs/dcache.c ---- linux-5.15.37/fs/dcache.c 2022-03-20 22:14:17.000000000 +0200 -+++ linux-5.15.37-aufs/fs/dcache.c 2022-04-08 20:22:30.617616719 +0300 -@@ -1345,7 +1345,7 @@ enum d_walk_ret { - * - * The @enter() callbacks are called with d_lock held. - */ --static void d_walk(struct dentry *parent, void *data, -+void d_walk(struct dentry *parent, void *data, - enum d_walk_ret (*enter)(void *, struct dentry *)) - { - struct dentry *this_parent; -diff -Nurp linux-5.15.37/fs/fcntl.c linux-5.15.37-aufs/fs/fcntl.c ---- linux-5.15.37/fs/fcntl.c 2022-03-20 22:14:17.000000000 +0200 -+++ linux-5.15.37-aufs/fs/fcntl.c 2022-04-08 20:22:30.617616719 +0300 -@@ -33,7 +33,7 @@ - - #define SETFL_MASK (O_APPEND | O_NONBLOCK | O_NDELAY | O_DIRECT | O_NOATIME) - --static int setfl(int fd, struct file * filp, unsigned long arg) -+int setfl(int fd, struct file *filp, unsigned long arg) - { - struct inode * inode = file_inode(filp); - int error = 0; -@@ -64,6 +64,8 @@ static int setfl(int fd, struct file * f - - if (filp->f_op->check_flags) - error = filp->f_op->check_flags(arg); -+ if (!error && filp->f_op->setfl) -+ error = filp->f_op->setfl(filp, arg); - if (error) - return error; - -diff -Nurp linux-5.15.37/fs/Kconfig linux-5.15.37-aufs/fs/Kconfig ---- linux-5.15.37/fs/Kconfig 2022-03-20 22:14:17.000000000 +0200 -+++ linux-5.15.37-aufs/fs/Kconfig 2022-04-08 20:22:30.610616377 +0300 -@@ -312,6 +312,7 @@ source "fs/sysv/Kconfig" - source "fs/ufs/Kconfig" - source "fs/erofs/Kconfig" - source "fs/vboxsf/Kconfig" -+source "fs/aufs/Kconfig" - - endif # MISC_FILESYSTEMS - -diff -Nurp linux-5.15.37/fs/Makefile linux-5.15.37-aufs/fs/Makefile ---- linux-5.15.37/fs/Makefile 2022-03-20 22:14:17.000000000 +0200 -+++ linux-5.15.37-aufs/fs/Makefile 2022-04-08 20:22:30.610616377 +0300 -@@ -140,3 +140,4 @@ obj-$(CONFIG_EFIVAR_FS) += efivarfs/ - obj-$(CONFIG_EROFS_FS) += erofs/ - obj-$(CONFIG_VBOXSF_FS) += vboxsf/ - obj-$(CONFIG_ZONEFS_FS) += zonefs/ -+obj-$(CONFIG_AUFS_FS) += aufs/ -diff -Nurp linux-5.15.37/fs/namespace.c linux-5.15.37-aufs/fs/namespace.c ---- linux-5.15.37/fs/namespace.c 2022-03-20 22:14:17.000000000 +0200 -+++ linux-5.15.37-aufs/fs/namespace.c 2022-04-08 20:22:30.617616719 +0300 -@@ -839,6 +839,12 @@ static inline int check_mnt(struct mount - return mnt->mnt_ns == current->nsproxy->mnt_ns; - } - -+/* for aufs, CONFIG_AUFS_BR_FUSE */ -+int is_current_mnt_ns(struct vfsmount *mnt) -+{ -+ return check_mnt(real_mount(mnt)); -+} -+ - /* - * vfsmount lock must be held for write - */ -diff -Nurp linux-5.15.37/fs/proc/base.c linux-5.15.37-aufs/fs/proc/base.c ---- linux-5.15.37/fs/proc/base.c 2022-03-20 22:14:17.000000000 +0200 -+++ linux-5.15.37-aufs/fs/proc/base.c 2022-04-08 20:22:30.617616719 +0300 -@@ -2191,7 +2191,7 @@ static int map_files_get_link(struct den - rc = -ENOENT; - vma = find_exact_vma(mm, vm_start, vm_end); - if (vma && vma->vm_file) { -- *path = vma->vm_file->f_path; -+ *path = vma_pr_or_file(vma)->f_path; - path_get(path); - rc = 0; - } -diff -Nurp linux-5.15.37/fs/proc/nommu.c linux-5.15.37-aufs/fs/proc/nommu.c ---- linux-5.15.37/fs/proc/nommu.c 2022-03-20 22:14:17.000000000 +0200 -+++ linux-5.15.37-aufs/fs/proc/nommu.c 2022-04-08 20:22:30.617616719 +0300 -@@ -40,7 +40,10 @@ static int nommu_region_show(struct seq_ - file = region->vm_file; - - if (file) { -- struct inode *inode = file_inode(region->vm_file); -+ struct inode *inode; -+ -+ file = vmr_pr_or_file(region); -+ inode = file_inode(file); - dev = inode->i_sb->s_dev; - ino = inode->i_ino; - } -diff -Nurp linux-5.15.37/fs/proc/task_mmu.c linux-5.15.37-aufs/fs/proc/task_mmu.c ---- linux-5.15.37/fs/proc/task_mmu.c 2022-03-20 22:14:17.000000000 +0200 -+++ linux-5.15.37-aufs/fs/proc/task_mmu.c 2022-04-08 20:22:30.617616719 +0300 -@@ -281,7 +281,10 @@ show_map_vma(struct seq_file *m, struct - const char *name = NULL; - - if (file) { -- struct inode *inode = file_inode(vma->vm_file); -+ struct inode *inode; -+ -+ file = vma_pr_or_file(vma); -+ inode = file_inode(file); - dev = inode->i_sb->s_dev; - ino = inode->i_ino; - pgoff = ((loff_t)vma->vm_pgoff) << PAGE_SHIFT; -@@ -1903,7 +1906,7 @@ static int show_numa_map(struct seq_file - struct proc_maps_private *proc_priv = &numa_priv->proc_maps; - struct vm_area_struct *vma = v; - struct numa_maps *md = &numa_priv->md; -- struct file *file = vma->vm_file; -+ struct file *file = vma_pr_or_file(vma); - struct mm_struct *mm = vma->vm_mm; - struct mempolicy *pol; - char buffer[64]; -diff -Nurp linux-5.15.37/fs/proc/task_nommu.c linux-5.15.37-aufs/fs/proc/task_nommu.c ---- linux-5.15.37/fs/proc/task_nommu.c 2022-03-20 22:14:17.000000000 +0200 -+++ linux-5.15.37-aufs/fs/proc/task_nommu.c 2022-04-08 20:22:30.617616719 +0300 -@@ -155,7 +155,10 @@ static int nommu_vma_show(struct seq_fil - file = vma->vm_file; - - if (file) { -- struct inode *inode = file_inode(vma->vm_file); -+ struct inode *inode; -+ -+ file = vma_pr_or_file(vma); -+ inode = file_inode(file); - dev = inode->i_sb->s_dev; - ino = inode->i_ino; - pgoff = (loff_t)vma->vm_pgoff << PAGE_SHIFT; -diff -Nurp linux-5.15.37/fs/splice.c linux-5.15.37-aufs/fs/splice.c ---- linux-5.15.37/fs/splice.c 2022-03-20 22:14:17.000000000 +0200 -+++ linux-5.15.37-aufs/fs/splice.c 2022-04-08 20:22:30.617616719 +0300 -@@ -759,8 +759,8 @@ static int warn_unsupported(struct file - /* - * Attempt to initiate a splice from pipe to file. - */ --static long do_splice_from(struct pipe_inode_info *pipe, struct file *out, -- loff_t *ppos, size_t len, unsigned int flags) -+long do_splice_from(struct pipe_inode_info *pipe, struct file *out, -+ loff_t *ppos, size_t len, unsigned int flags) - { - if (unlikely(!out->f_op->splice_write)) - return warn_unsupported(out, "write"); -@@ -770,9 +770,9 @@ static long do_splice_from(struct pipe_i - /* - * Attempt to initiate a splice from a file to a pipe. - */ --static long do_splice_to(struct file *in, loff_t *ppos, -- struct pipe_inode_info *pipe, size_t len, -- unsigned int flags) -+long do_splice_to(struct file *in, loff_t *ppos, -+ struct pipe_inode_info *pipe, size_t len, -+ unsigned int flags) - { - unsigned int p_space; - int ret; -diff -Nurp linux-5.15.37/include/linux/fs.h linux-5.15.37-aufs/include/linux/fs.h ---- linux-5.15.37/include/linux/fs.h 2022-03-20 22:14:17.000000000 +0200 -+++ linux-5.15.37-aufs/include/linux/fs.h 2022-04-08 20:22:30.617616719 +0300 -@@ -1372,6 +1372,7 @@ extern void fasync_free(struct fasync_st - /* can be called from interrupts */ - extern void kill_fasync(struct fasync_struct **, int, int); - -+extern int setfl(int fd, struct file *filp, unsigned long arg); - extern void __f_setown(struct file *filp, struct pid *, enum pid_type, int force); - extern int f_setown(struct file *filp, unsigned long arg, int force); - extern void f_delown(struct file *filp); -@@ -2003,6 +2004,7 @@ struct file_operations { - ssize_t (*sendpage) (struct file *, struct page *, int, size_t, loff_t *, int); - unsigned long (*get_unmapped_area)(struct file *, unsigned long, unsigned long, unsigned long, unsigned long); - int (*check_flags)(int); -+ int (*setfl)(struct file *, unsigned long); - int (*flock) (struct file *, int, struct file_lock *); - ssize_t (*splice_write)(struct pipe_inode_info *, struct file *, loff_t *, size_t, unsigned int); - ssize_t (*splice_read)(struct file *, loff_t *, struct pipe_inode_info *, size_t, unsigned int); -@@ -2529,6 +2531,7 @@ extern int current_umask(void); - extern void ihold(struct inode * inode); - extern void iput(struct inode *); - extern int generic_update_time(struct inode *, struct timespec64 *, int); -+extern int update_time(struct inode *, struct timespec64 *, int); - - /* /sys/fs */ - extern struct kobject *fs_kobj; -@@ -2707,6 +2710,7 @@ static inline bool sb_is_blkdev_sb(struc - } - - void emergency_thaw_all(void); -+extern int __sync_filesystem(struct super_block *, int); - extern int sync_filesystem(struct super_block *); - extern const struct file_operations def_blk_fops; - extern const struct file_operations def_chr_fops; -diff -Nurp linux-5.15.37/include/linux/lockdep.h linux-5.15.37-aufs/include/linux/lockdep.h ---- linux-5.15.37/include/linux/lockdep.h 2022-03-20 22:14:17.000000000 +0200 -+++ linux-5.15.37-aufs/include/linux/lockdep.h 2022-04-08 20:22:30.618616768 +0300 -@@ -248,6 +248,8 @@ static inline int lockdep_match_key(stru - return lock->key == key; - } - -+struct lock_class *lockdep_hlock_class(struct held_lock *hlock); -+ - /* - * Acquire a lock. - * -diff -Nurp linux-5.15.37/include/linux/mm.h linux-5.15.37-aufs/include/linux/mm.h ---- linux-5.15.37/include/linux/mm.h 2022-03-20 22:14:17.000000000 +0200 -+++ linux-5.15.37-aufs/include/linux/mm.h 2022-04-08 20:22:30.618616768 +0300 -@@ -1895,6 +1895,43 @@ static inline void unmap_shared_mapping_ - unmap_mapping_range(mapping, holebegin, holelen, 0); - } - -+#if IS_ENABLED(CONFIG_AUFS_FS) -+extern void vma_do_file_update_time(struct vm_area_struct *, const char[], int); -+extern struct file *vma_do_pr_or_file(struct vm_area_struct *, const char[], -+ int); -+extern void vma_do_get_file(struct vm_area_struct *, const char[], int); -+extern void vma_do_fput(struct vm_area_struct *, const char[], int); -+ -+#define vma_file_update_time(vma) vma_do_file_update_time(vma, __func__, \ -+ __LINE__) -+#define vma_pr_or_file(vma) vma_do_pr_or_file(vma, __func__, \ -+ __LINE__) -+#define vma_get_file(vma) vma_do_get_file(vma, __func__, __LINE__) -+#define vma_fput(vma) vma_do_fput(vma, __func__, __LINE__) -+ -+#ifndef CONFIG_MMU -+extern struct file *vmr_do_pr_or_file(struct vm_region *, const char[], int); -+extern void vmr_do_fput(struct vm_region *, const char[], int); -+ -+#define vmr_pr_or_file(region) vmr_do_pr_or_file(region, __func__, \ -+ __LINE__) -+#define vmr_fput(region) vmr_do_fput(region, __func__, __LINE__) -+#endif /* !CONFIG_MMU */ -+ -+#else -+ -+#define vma_file_update_time(vma) file_update_time((vma)->vm_file) -+#define vma_pr_or_file(vma) (vma)->vm_file -+#define vma_get_file(vma) get_file((vma)->vm_file) -+#define vma_fput(vma) fput((vma)->vm_file) -+ -+#ifndef CONFIG_MMU -+#define vmr_pr_or_file(region) (region)->vm_file -+#define vmr_fput(region) fput((region)->vm_file) -+#endif /* !CONFIG_MMU */ -+ -+#endif /* CONFIG_AUFS_FS */ -+ - extern int access_process_vm(struct task_struct *tsk, unsigned long addr, - void *buf, int len, unsigned int gup_flags); - extern int access_remote_vm(struct mm_struct *mm, unsigned long addr, -diff -Nurp linux-5.15.37/include/linux/mm_types.h linux-5.15.37-aufs/include/linux/mm_types.h ---- linux-5.15.37/include/linux/mm_types.h 2022-03-20 22:14:17.000000000 +0200 -+++ linux-5.15.37-aufs/include/linux/mm_types.h 2022-04-08 20:22:30.618616768 +0300 -@@ -344,6 +344,9 @@ struct vm_region { - unsigned long vm_top; /* region allocated to here */ - unsigned long vm_pgoff; /* the offset in vm_file corresponding to vm_start */ - struct file *vm_file; /* the backing file or NULL */ -+#if IS_ENABLED(CONFIG_AUFS_FS) -+ struct file *vm_prfile; /* the virtual backing file or NULL */ -+#endif - - int vm_usage; /* region usage count (access under nommu_region_sem) */ - bool vm_icache_flushed : 1; /* true if the icache has been flushed for -@@ -440,6 +443,9 @@ struct vm_area_struct { - unsigned long vm_pgoff; /* Offset (within vm_file) in PAGE_SIZE - units */ - struct file * vm_file; /* File we map to (can be NULL). */ -+#if IS_ENABLED(CONFIG_AUFS_FS) -+ struct file *vm_prfile; /* shadow of vm_file */ -+#endif - void * vm_private_data; /* was vm_pte (shared mem) */ - - #ifdef CONFIG_SWAP -diff -Nurp linux-5.15.37/include/linux/mnt_namespace.h linux-5.15.37-aufs/include/linux/mnt_namespace.h ---- linux-5.15.37/include/linux/mnt_namespace.h 2022-03-20 22:14:17.000000000 +0200 -+++ linux-5.15.37-aufs/include/linux/mnt_namespace.h 2022-04-08 20:22:30.618616768 +0300 -@@ -7,12 +7,15 @@ struct mnt_namespace; - struct fs_struct; - struct user_namespace; - struct ns_common; -+struct vfsmount; - - extern struct mnt_namespace *copy_mnt_ns(unsigned long, struct mnt_namespace *, - struct user_namespace *, struct fs_struct *); - extern void put_mnt_ns(struct mnt_namespace *ns); - extern struct ns_common *from_mnt_ns(struct mnt_namespace *); - -+extern int is_current_mnt_ns(struct vfsmount *mnt); -+ - extern const struct file_operations proc_mounts_operations; - extern const struct file_operations proc_mountinfo_operations; - extern const struct file_operations proc_mountstats_operations; -diff -Nurp linux-5.15.37/include/linux/splice.h linux-5.15.37-aufs/include/linux/splice.h ---- linux-5.15.37/include/linux/splice.h 2022-03-20 22:14:17.000000000 +0200 -+++ linux-5.15.37-aufs/include/linux/splice.h 2022-04-08 20:22:30.618616768 +0300 -@@ -93,4 +93,10 @@ extern void splice_shrink_spd(struct spl - - extern const struct pipe_buf_operations page_cache_pipe_buf_ops; - extern const struct pipe_buf_operations default_pipe_buf_ops; -+ -+extern long do_splice_from(struct pipe_inode_info *pipe, struct file *out, -+ loff_t *ppos, size_t len, unsigned int flags); -+extern long do_splice_to(struct file *in, loff_t *ppos, -+ struct pipe_inode_info *pipe, size_t len, -+ unsigned int flags); - #endif -diff -Nurp linux-5.15.37/include/uapi/linux/aufs_type.h linux-5.15.37-aufs/include/uapi/linux/aufs_type.h ---- linux-5.15.37/include/uapi/linux/aufs_type.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/include/uapi/linux/aufs_type.h 2022-04-08 20:22:30.618616768 +0300 -@@ -0,0 +1,439 @@ +diff -Naur null/include/uapi/linux/aufs_type.h linux-6.6.4/include/uapi/linux/aufs_type.h +--- /dev/null ++++ linux-6.6.4/include/uapi/linux/aufs_type.h 2024-04-28 23:21:13.846237252 +0300 +@@ -0,0 +1,452 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ +/* -+ * Copyright (C) 2005-2021 Junjiro R. Okajima ++ * Copyright (C) 2005-2022 Junjiro R. Okajima ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . + */ + +#ifndef __AUFS_TYPE_H__ @@ -37339,7 +38182,7 @@ diff -Nurp linux-5.15.37/include/uapi/linux/aufs_type.h linux-5.15.37-aufs/inclu +#include +#endif /* __KERNEL__ */ + -+#define AUFS_VERSION "5.17" ++#define AUFS_VERSION "6.6-20240226" + +/* todo? move this to linux-2.6.19/include/magic.h */ +#define AUFS_SUPER_MAGIC ('a' << 24 | 'u' << 16 | 'f' << 8 | 's') @@ -37749,313 +38592,3 @@ diff -Nurp linux-5.15.37/include/uapi/linux/aufs_type.h linux-5.15.37-aufs/inclu +#define AUFS_CTL_FHSM_FD _IOW(AuCtlType, AuCtl_FHSM_FD, int) + +#endif /* __AUFS_TYPE_H__ */ -diff -Nurp linux-5.15.37/kernel/fork.c linux-5.15.37-aufs/kernel/fork.c ---- linux-5.15.37/kernel/fork.c 2022-03-20 22:14:17.000000000 +0200 -+++ linux-5.15.37-aufs/kernel/fork.c 2022-04-08 20:22:30.618616768 +0300 -@@ -575,7 +575,7 @@ static __latent_entropy int dup_mmap(str - if (file) { - struct address_space *mapping = file->f_mapping; - -- get_file(file); -+ vma_get_file(tmp); - i_mmap_lock_write(mapping); - if (tmp->vm_flags & VM_SHARED) - mapping_allow_writable(mapping); -diff -Nurp linux-5.15.37/kernel/locking/lockdep.c linux-5.15.37-aufs/kernel/locking/lockdep.c ---- linux-5.15.37/kernel/locking/lockdep.c 2022-04-08 20:07:30.703499501 +0300 -+++ linux-5.15.37-aufs/kernel/locking/lockdep.c 2022-04-08 20:22:30.619616817 +0300 -@@ -187,7 +187,7 @@ unsigned long max_lock_class_idx; - struct lock_class lock_classes[MAX_LOCKDEP_KEYS]; - DECLARE_BITMAP(lock_classes_in_use, MAX_LOCKDEP_KEYS); - --static inline struct lock_class *hlock_class(struct held_lock *hlock) -+inline struct lock_class *lockdep_hlock_class(struct held_lock *hlock) - { - unsigned int class_idx = hlock->class_idx; - -@@ -208,6 +208,7 @@ static inline struct lock_class *hlock_c - */ - return lock_classes + class_idx; - } -+#define hlock_class(hlock) lockdep_hlock_class(hlock) - - #ifdef CONFIG_LOCK_STAT - static DEFINE_PER_CPU(struct lock_class_stats[MAX_LOCKDEP_KEYS], cpu_lock_stats); -diff -Nurp linux-5.15.37/MAINTAINERS linux-5.15.37-aufs/MAINTAINERS ---- linux-5.15.37/MAINTAINERS 2022-04-08 20:07:30.611494969 +0300 -+++ linux-5.15.37-aufs/MAINTAINERS 2022-04-08 20:22:30.610616377 +0300 -@@ -3235,6 +3235,19 @@ F: include/uapi/linux/audit.h - F: kernel/audit* - F: lib/*audit.c - -+AUFS (advanced multi layered unification filesystem) FILESYSTEM -+M: "J. R. Okajima" -+L: aufs-users@lists.sourceforge.net (members only) -+L: linux-unionfs@vger.kernel.org -+S: Supported -+W: http://aufs.sourceforge.net -+T: git://github.com/sfjro/aufs4-linux.git -+F: Documentation/ABI/testing/debugfs-aufs -+F: Documentation/ABI/testing/sysfs-aufs -+F: Documentation/filesystems/aufs/ -+F: fs/aufs/ -+F: include/uapi/linux/aufs_type.h -+ - AUXILIARY DISPLAY DRIVERS - M: Miguel Ojeda - S: Maintained -diff -Nurp linux-5.15.37/mm/filemap.c linux-5.15.37-aufs/mm/filemap.c ---- linux-5.15.37/mm/filemap.c 2022-03-20 22:14:17.000000000 +0200 -+++ linux-5.15.37-aufs/mm/filemap.c 2022-04-08 20:22:30.619616817 +0300 -@@ -3350,7 +3350,7 @@ vm_fault_t filemap_page_mkwrite(struct vm_fault *vmf) - vm_fault_t ret = VM_FAULT_LOCKED; - - sb_start_pagefault(mapping->host->i_sb); -- file_update_time(vmf->vma->vm_file); -+ vma_file_update_time(vmf->vma); - lock_page(page); - if (page->mapping != mapping) { - unlock_page(page); -diff -Nurp linux-5.15.37/mm/Makefile linux-5.15.37-aufs/mm/Makefile ---- linux-5.15.37/mm/Makefile 2022-03-20 22:14:17.000000000 +0200 -+++ linux-5.15.37-aufs/mm/Makefile 2022-04-08 20:22:30.619616817 +0300 -@@ -132,3 +132,4 @@ obj-$(CONFIG_PAGE_REPORTING) += page_rep - obj-$(CONFIG_IO_MAPPING) += io-mapping.o - obj-$(CONFIG_HAVE_BOOTMEM_INFO_NODE) += bootmem_info.o - obj-$(CONFIG_GENERIC_IOREMAP) += ioremap.o -+obj-$(CONFIG_AUFS_FS:m=y) += prfile.o -diff -Nurp linux-5.15.37/mm/mmap.c linux-5.15.37-aufs/mm/mmap.c ---- linux-5.15.37/mm/mmap.c 2022-04-08 20:07:30.709499796 +0300 -+++ linux-5.15.37-aufs/mm/mmap.c 2022-04-08 20:22:30.619616817 +0300 -@@ -184,7 +184,7 @@ static struct vm_area_struct *remove_vma - if (vma->vm_ops && vma->vm_ops->close) - vma->vm_ops->close(vma); - if (vma->vm_file) -- fput(vma->vm_file); -+ vma_fput(vma); - mpol_put(vma_policy(vma)); - vm_area_free(vma); - return next; -@@ -953,7 +953,7 @@ again: - if (remove_next) { - if (file) { - uprobe_munmap(next, next->vm_start, next->vm_end); -- fput(file); -+ vma_fput(vma); - } - if (next->anon_vma) - anon_vma_merge(vma, next); -@@ -1879,7 +1879,7 @@ out: - return addr; - - unmap_and_free_vma: -- fput(vma->vm_file); -+ vma_fput(vma); - vma->vm_file = NULL; - - /* Undo any partial mapping done by a device driver. */ -@@ -2737,7 +2737,7 @@ int __split_vma(struct mm_struct *mm, st - goto out_free_mpol; - - if (new->vm_file) -- get_file(new->vm_file); -+ vma_get_file(new); - - if (new->vm_ops && new->vm_ops->open) - new->vm_ops->open(new); -@@ -2756,7 +2756,7 @@ int __split_vma(struct mm_struct *mm, st - if (new->vm_ops && new->vm_ops->close) - new->vm_ops->close(new); - if (new->vm_file) -- fput(new->vm_file); -+ vma_fput(new); - unlink_anon_vmas(new); - out_free_mpol: - mpol_put(vma_policy(new)); -@@ -2951,6 +2951,9 @@ SYSCALL_DEFINE5(remap_file_pages, unsign - unsigned long populate = 0; - unsigned long ret = -EINVAL; - struct file *file; -+#if IS_ENABLED(CONFIG_AUFS_FS) -+ struct file *prfile; -+#endif - - pr_warn_once("%s (%d) uses deprecated remap_file_pages() syscall. See Documentation/vm/remap_file_pages.rst.\n", - current->comm, current->pid); -@@ -3006,10 +3009,34 @@ SYSCALL_DEFINE5(remap_file_pages, unsign - if (vma->vm_flags & VM_LOCKED) - flags |= MAP_LOCKED; - -+#if IS_ENABLED(CONFIG_AUFS_FS) -+ vma_get_file(vma); -+ file = vma->vm_file; -+ prfile = vma->vm_prfile; -+ ret = do_mmap(vma->vm_file, start, size, -+ prot, flags, pgoff, &populate, NULL); -+ if (!IS_ERR_VALUE(ret) && file && prfile) { -+ struct vm_area_struct *new_vma; -+ -+ new_vma = find_vma(mm, ret); -+ if (!new_vma->vm_prfile) -+ new_vma->vm_prfile = prfile; -+ if (new_vma != vma) -+ get_file(prfile); -+ } -+ /* -+ * two fput()s instead of vma_fput(vma), -+ * coz vma may not be available anymore. -+ */ -+ fput(file); -+ if (prfile) -+ fput(prfile); -+#else - file = get_file(vma->vm_file); - ret = do_mmap(vma->vm_file, start, size, - prot, flags, pgoff, &populate, NULL); - fput(file); -+#endif /* CONFIG_AUFS_FS */ - out: - mmap_write_unlock(mm); - if (populate) -@@ -3291,7 +3318,7 @@ struct vm_area_struct *copy_vma(struct v - if (anon_vma_clone(new_vma, vma)) - goto out_free_mempol; - if (new_vma->vm_file) -- get_file(new_vma->vm_file); -+ vma_get_file(new_vma); - if (new_vma->vm_ops && new_vma->vm_ops->open) - new_vma->vm_ops->open(new_vma); - vma_link(mm, new_vma, prev, rb_link, rb_parent); -diff -Nurp linux-5.15.37/mm/nommu.c linux-5.15.37-aufs/mm/nommu.c ---- linux-5.15.37/mm/nommu.c 2022-03-20 22:14:17.000000000 +0200 -+++ linux-5.15.37-aufs/mm/nommu.c 2022-04-08 20:22:30.619616817 +0300 -@@ -522,7 +522,7 @@ static void __put_nommu_region(struct vm - up_write(&nommu_region_sem); - - if (region->vm_file) -- fput(region->vm_file); -+ vmr_fput(region); - - /* IO memory and memory shared directly out of the pagecache - * from ramfs/tmpfs mustn't be released here */ -@@ -654,7 +654,7 @@ static void delete_vma(struct mm_struct - if (vma->vm_ops && vma->vm_ops->close) - vma->vm_ops->close(vma); - if (vma->vm_file) -- fput(vma->vm_file); -+ vma_fput(vma); - put_nommu_region(vma->vm_region); - vm_area_free(vma); - } -@@ -1174,7 +1174,7 @@ unsigned long do_mmap(struct file *file, - goto error_just_free; - } - } -- fput(region->vm_file); -+ vmr_fput(region); - kmem_cache_free(vm_region_jar, region); - region = pregion; - result = start; -@@ -1251,10 +1251,10 @@ error_just_free: - up_write(&nommu_region_sem); - error: - if (region->vm_file) -- fput(region->vm_file); -+ vmr_fput(region); - kmem_cache_free(vm_region_jar, region); - if (vma->vm_file) -- fput(vma->vm_file); -+ vma_fput(vma); - vm_area_free(vma); - return ret; - -diff -Nurp linux-5.15.37/mm/prfile.c linux-5.15.37-aufs/mm/prfile.c ---- linux-5.15.37/mm/prfile.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.15.37-aufs/mm/prfile.c 2022-04-08 20:22:30.619616817 +0300 -@@ -0,0 +1,86 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Mainly for aufs which mmap(2) different file and wants to print different -+ * path in /proc/PID/maps. -+ * Call these functions via macros defined in linux/mm.h. -+ * -+ * See Documentation/filesystems/aufs/design/06mmap.txt -+ * -+ * Copyright (c) 2014-2021 Junjro R. Okajima -+ * Copyright (c) 2014 Ian Campbell -+ */ -+ -+#include -+#include -+#include -+ -+/* #define PRFILE_TRACE */ -+static inline void prfile_trace(struct file *f, struct file *pr, -+ const char func[], int line, const char func2[]) -+{ -+#ifdef PRFILE_TRACE -+ if (pr) -+ pr_info("%s:%d: %s, %pD2\n", func, line, func2, f); -+#endif -+} -+ -+void vma_do_file_update_time(struct vm_area_struct *vma, const char func[], -+ int line) -+{ -+ struct file *f = vma->vm_file, *pr = vma->vm_prfile; -+ -+ prfile_trace(f, pr, func, line, __func__); -+ file_update_time(f); -+ if (f && pr) -+ file_update_time(pr); -+} -+ -+struct file *vma_do_pr_or_file(struct vm_area_struct *vma, const char func[], -+ int line) -+{ -+ struct file *f = vma->vm_file, *pr = vma->vm_prfile; -+ -+ prfile_trace(f, pr, func, line, __func__); -+ return (f && pr) ? pr : f; -+} -+ -+void vma_do_get_file(struct vm_area_struct *vma, const char func[], int line) -+{ -+ struct file *f = vma->vm_file, *pr = vma->vm_prfile; -+ -+ prfile_trace(f, pr, func, line, __func__); -+ get_file(f); -+ if (f && pr) -+ get_file(pr); -+} -+ -+void vma_do_fput(struct vm_area_struct *vma, const char func[], int line) -+{ -+ struct file *f = vma->vm_file, *pr = vma->vm_prfile; -+ -+ prfile_trace(f, pr, func, line, __func__); -+ fput(f); -+ if (f && pr) -+ fput(pr); -+} -+ -+#ifndef CONFIG_MMU -+struct file *vmr_do_pr_or_file(struct vm_region *region, const char func[], -+ int line) -+{ -+ struct file *f = region->vm_file, *pr = region->vm_prfile; -+ -+ prfile_trace(f, pr, func, line, __func__); -+ return (f && pr) ? pr : f; -+} -+ -+void vmr_do_fput(struct vm_region *region, const char func[], int line) -+{ -+ struct file *f = region->vm_file, *pr = region->vm_prfile; -+ -+ prfile_trace(f, pr, func, line, __func__); -+ fput(f); -+ if (f && pr) -+ fput(pr); -+} -+#endif /* !CONFIG_MMU */ diff --git a/kernel/tools/cpupowertools/files/patches/aufs6/lockdep-debug.patch b/kernel/tools/cpupowertools/files/patches/aufs6/lockdep-debug.patch new file mode 100644 index 00000000..3bd461c9 --- /dev/null +++ b/kernel/tools/cpupowertools/files/patches/aufs6/lockdep-debug.patch @@ -0,0 +1,16 @@ +SPDX-License-Identifier: GPL-2.0 +aufs6.6 lockdep patch + +diff --git a/include/linux/lockdep_types.h b/include/linux/lockdep_types.h +index 2ebc323d345a..9d7009190515 100644 +--- a/include/linux/lockdep_types.h ++++ b/include/linux/lockdep_types.h +@@ -12,7 +12,7 @@ + + #include + +-#define MAX_LOCKDEP_SUBCLASSES 8UL ++#define MAX_LOCKDEP_SUBCLASSES (8UL + 4) + + enum lockdep_wait_type { + LD_WAIT_INV = 0, /* not checked, catch all */ diff --git a/kernel/tools/cpupowertools/files/patches/aufs6/tmpfs-idr.patch b/kernel/tools/cpupowertools/files/patches/aufs6/tmpfs-idr.patch new file mode 100644 index 00000000..f6bcb8c2 --- /dev/null +++ b/kernel/tools/cpupowertools/files/patches/aufs6/tmpfs-idr.patch @@ -0,0 +1,213 @@ +SPDX-License-Identifier: GPL-2.0 + +diff --git a/include/linux/shmem_fs.h b/include/linux/shmem_fs.h +index 6b0c626620f5..fc6fa00a3016 100644 +--- a/include/linux/shmem_fs.h ++++ b/include/linux/shmem_fs.h +@@ -51,10 +51,13 @@ struct shmem_quota_limits { + }; + + struct shmem_sb_info { ++ struct mutex idr_lock; ++ bool idr_nouse; ++ struct idr idr; /* manages inode-number */ + unsigned long max_blocks; /* How many blocks are allowed */ + struct percpu_counter used_blocks; /* How many are allocated */ +- unsigned long max_inodes; /* How many inodes are allowed */ +- unsigned long free_ispace; /* How much ispace left for allocation */ ++ int max_inodes; /* How many inodes are allowed */ ++ int free_ispace; /* How many are left for allocation */ + raw_spinlock_t stat_lock; /* Serialize shmem_sb_info changes */ + umode_t mode; /* Mount mode for root directory */ + unsigned char huge; /* Whether to try for hugepages */ +diff --git a/mm/shmem.c b/mm/shmem.c +index 69595d341882..34cdf49cf1d4 100644 +--- a/mm/shmem.c ++++ b/mm/shmem.c +@@ -111,7 +111,7 @@ struct shmem_falloc { + + struct shmem_options { + unsigned long long blocks; +- unsigned long long inodes; ++ int inodes; + struct mempolicy *mpol; + kuid_t uid; + kgid_t gid; +@@ -136,12 +136,14 @@ static unsigned long shmem_default_max_blocks(void) + return totalram_pages() / 2; + } + +-static unsigned long shmem_default_max_inodes(void) ++static int shmem_default_max_inodes(void) + { + unsigned long nr_pages = totalram_pages(); ++ unsigned long ul; + +- return min3(nr_pages - totalhigh_pages(), nr_pages / 2, +- ULONG_MAX / BOGO_INODE_SIZE); ++ ul = INT_MAX; ++ ul = min3(ul, nr_pages - totalhigh_pages(), nr_pages / 2); ++ return ul; + } + #endif + +@@ -1262,6 +1264,11 @@ static void shmem_evict_inode(struct inode *inode) + } + + simple_xattrs_free(&info->xattrs, sbinfo->max_inodes ? &freed : NULL); ++ if (!sbinfo->idr_nouse && inode->i_ino) { ++ mutex_lock(&sbinfo->idr_lock); ++ idr_remove(&sbinfo->idr, inode->i_ino); ++ mutex_unlock(&sbinfo->idr_lock); ++ } + shmem_free_inode(inode->i_sb, freed); + WARN_ON(inode->i_blocks); + clear_inode(inode); +@@ -2506,6 +2513,25 @@ static struct inode *__shmem_get_inode(struct mnt_idmap *idmap, + break; + } + ++ if (!sbinfo->idr_nouse) { ++ /* inum 0 and 1 are unused */ ++ mutex_lock(&sbinfo->idr_lock); ++ ino = idr_alloc(&sbinfo->idr, inode, 2, INT_MAX, ++ GFP_NOFS); ++ if (ino > 0) { ++ inode->i_ino = ino; ++ mutex_unlock(&sbinfo->idr_lock); ++ __insert_inode_hash(inode, inode->i_ino); ++ } else { ++ inode->i_ino = 0; ++ mutex_unlock(&sbinfo->idr_lock); ++ iput(inode); ++ /* shmem_free_inode() will be called */ ++ inode = NULL; ++ } ++ } else ++ inode->i_ino = ino; ++ + lockdep_annotate_inode_mutex_key(inode); + return inode; + } +@@ -3754,8 +3780,7 @@ static struct dentry *shmem_get_parent(struct dentry *child) + static int shmem_match(struct inode *ino, void *vfh) + { + __u32 *fh = vfh; +- __u64 inum = fh[2]; +- inum = (inum << 32) | fh[1]; ++ __u64 inum = fh[1]; + return ino->i_ino == inum && fh[0] == ino->i_generation; + } + +@@ -3775,14 +3800,11 @@ static struct dentry *shmem_fh_to_dentry(struct super_block *sb, + struct dentry *dentry = NULL; + u64 inum; + +- if (fh_len < 3) ++ if (fh_len < 2) + return NULL; + +- inum = fid->raw[2]; +- inum = (inum << 32) | fid->raw[1]; +- +- inode = ilookup5(sb, (unsigned long)(inum + fid->raw[0]), +- shmem_match, fid->raw); ++ inum = fid->raw[1]; ++ inode = ilookup5(sb, inum, shmem_match, fid->raw); + if (inode) { + dentry = shmem_find_alias(inode); + iput(inode); +@@ -3794,30 +3816,15 @@ static struct dentry *shmem_fh_to_dentry(struct super_block *sb, + static int shmem_encode_fh(struct inode *inode, __u32 *fh, int *len, + struct inode *parent) + { +- if (*len < 3) { +- *len = 3; ++ if (*len < 2) { ++ *len = 2; + return FILEID_INVALID; + } + +- if (inode_unhashed(inode)) { +- /* Unfortunately insert_inode_hash is not idempotent, +- * so as we hash inodes here rather than at creation +- * time, we need a lock to ensure we only try +- * to do it once +- */ +- static DEFINE_SPINLOCK(lock); +- spin_lock(&lock); +- if (inode_unhashed(inode)) +- __insert_inode_hash(inode, +- inode->i_ino + inode->i_generation); +- spin_unlock(&lock); +- } +- + fh[0] = inode->i_generation; + fh[1] = inode->i_ino; +- fh[2] = ((__u64)inode->i_ino) >> 32; + +- *len = 3; ++ *len = 2; + return 1; + } + +@@ -3916,7 +3923,7 @@ static int shmem_parse_one(struct fs_context *fc, struct fs_parameter *param) + break; + case Opt_nr_inodes: + ctx->inodes = memparse(param->string, &rest); +- if (*rest || ctx->inodes > ULONG_MAX / BOGO_INODE_SIZE) ++ if (*rest || ctx->inodes < 2 || ctx->inodes > INT_MAX) + goto bad_value; + ctx->seen |= SHMEM_SEEN_INODES; + break; +@@ -4202,7 +4209,7 @@ static int shmem_show_options(struct seq_file *seq, struct dentry *root) + if (sbinfo->max_blocks != shmem_default_max_blocks()) + seq_printf(seq, ",size=%luk", K(sbinfo->max_blocks)); + if (sbinfo->max_inodes != shmem_default_max_inodes()) +- seq_printf(seq, ",nr_inodes=%lu", sbinfo->max_inodes); ++ seq_printf(seq, ",nr_inodes=%d", sbinfo->max_inodes); + if (sbinfo->mode != (0777 | S_ISVTX)) + seq_printf(seq, ",mode=%03ho", sbinfo->mode); + if (!uid_eq(sbinfo->uid, GLOBAL_ROOT_UID)) +@@ -4256,6 +4263,8 @@ static void shmem_put_super(struct super_block *sb) + #ifdef CONFIG_TMPFS_QUOTA + shmem_disable_quotas(sb); + #endif ++ if (!sbinfo->idr_nouse) ++ idr_destroy(&sbinfo->idr); + free_percpu(sbinfo->ino_batch); + percpu_counter_destroy(&sbinfo->used_blocks); + mpol_put(sbinfo->mpol); +@@ -4300,6 +4309,8 @@ static int shmem_fill_super(struct super_block *sb, struct fs_context *fc) + #else + sb->s_flags |= SB_NOUSER; + #endif ++ mutex_init(&sbinfo->idr_lock); ++ idr_init(&sbinfo->idr); + sbinfo->max_blocks = ctx->blocks; + sbinfo->max_inodes = ctx->inodes; + sbinfo->free_ispace = sbinfo->max_inodes * BOGO_INODE_SIZE; +@@ -4445,6 +4456,15 @@ static int shmem_error_remove_page(struct address_space *mapping, + return 0; + } + ++static __init void shmem_no_idr(struct super_block *sb) ++{ ++ struct shmem_sb_info *sbinfo; ++ ++ sbinfo = SHMEM_SB(sb); ++ sbinfo->idr_nouse = true; ++ idr_destroy(&sbinfo->idr); ++} ++ + const struct address_space_operations shmem_aops = { + .writepage = shmem_writepage, + .dirty_folio = noop_dirty_folio, +@@ -4618,6 +4638,7 @@ void __init shmem_init(void) + pr_err("Could not kern_mount tmpfs\n"); + goto out1; + } ++ shmem_no_idr(shm_mnt->mnt_sb); + + #ifdef CONFIG_TRANSPARENT_HUGEPAGE + if (has_transparent_hugepage() && shmem_huge > SHMEM_HUGE_DENY) diff --git a/kernel/tools/cpupowertools/files/patches/aufs6/vfs-ino.patch b/kernel/tools/cpupowertools/files/patches/aufs6/vfs-ino.patch new file mode 100644 index 00000000..601a72f0 --- /dev/null +++ b/kernel/tools/cpupowertools/files/patches/aufs6/vfs-ino.patch @@ -0,0 +1,24 @@ +SPDX-License-Identifier: GPL-2.0 + +diff --git a/fs/inode.c b/fs/inode.c +index 84bc3c76e5cc..63fc36b8af8e 100644 +--- a/fs/inode.c ++++ b/fs/inode.c +@@ -970,6 +970,8 @@ unsigned int get_next_ino(void) + unsigned int *p = &get_cpu_var(last_ino); + unsigned int res = *p; + ++start: ++ + #ifdef CONFIG_SMP + if (unlikely((res & (LAST_INO_BATCH-1)) == 0)) { + static atomic_t shared_last_ino; +@@ -982,7 +984,7 @@ unsigned int get_next_ino(void) + res++; + /* get_next_ino should not provide a 0 inode number */ + if (unlikely(!res)) +- res++; ++ goto start; + *p = res; + put_cpu_var(last_ino); + return res; diff --git a/kernel/tools/cpupowertools/files/patches/linux/patch-6.6.30.xz b/kernel/tools/cpupowertools/files/patches/linux/patch-6.6.30.xz new file mode 100644 index 00000000..e8d7cb16 Binary files /dev/null and b/kernel/tools/cpupowertools/files/patches/linux/patch-6.6.30.xz differ diff --git a/kernel/tools/cpupowertools/files/patches/mageia/3rd-3rdparty-merge.patch b/kernel/tools/cpupowertools/files/patches/mageia/3rd-3rdparty-merge.patch deleted file mode 100644 index 78d502ec..00000000 --- a/kernel/tools/cpupowertools/files/patches/mageia/3rd-3rdparty-merge.patch +++ /dev/null @@ -1,57 +0,0 @@ - -Include 3rdparty directory into the main build-system. - -Original author is unknown. -(Was either Juan Quintela or Jeff Garzik) - -Signed-off-by: Luiz Fernando N. Capitulino -Signed-off-by: Herton Ronaldo Krzesinski -[Simplified for Mageia 7 / kernel 5.1.6 and up / tmb] -Signed-off-by: Thomas Backlund - ---- - Makefile | 2 +- - arch/arm/Kconfig | 2 ++ - arch/arm64/Kconfig | 2 ++ - arch/x86/Kconfig | 2 ++ - 4 files changed, 7 insertions(+), 1 deletion(-) - -diff -Nurp linux-5.12/arch/arm/Kconfig linux-5.12-3rd/arch/arm/Kconfig ---- linux-5.12/arch/arm/Kconfig 2021-04-25 23:49:08.000000000 +0300 -+++ linux-5.12-3rd/arch/arm/Kconfig 2021-04-26 18:10:06.513775304 +0300 -@@ -2016,3 +2016,5 @@ source "arch/arm/crypto/Kconfig" - endif - - source "arch/arm/Kconfig.assembler" -+ -+source "3rdparty/Kconfig" -diff -Nurp linux-5.12/arch/arm64/Kconfig linux-5.12-3rd/arch/arm64/Kconfig ---- linux-5.12/arch/arm64/Kconfig 2021-04-25 23:49:08.000000000 +0300 -+++ linux-5.12-3rd/arch/arm64/Kconfig 2021-04-26 18:10:06.512775257 +0300 -@@ -1959,3 +1959,5 @@ source "arch/arm64/kvm/Kconfig" - if CRYPTO - source "arch/arm64/crypto/Kconfig" - endif -+ -+source "3rdparty/Kconfig" -diff -Nurp linux-5.12/arch/x86/Kconfig linux-5.12-3rd/arch/x86/Kconfig ---- linux-5.12/arch/x86/Kconfig 2021-04-25 23:49:08.000000000 +0300 -+++ linux-5.12-3rd/arch/x86/Kconfig 2021-04-26 18:10:06.512775257 +0300 -@@ -2909,3 +2909,5 @@ source "drivers/firmware/Kconfig" - source "arch/x86/kvm/Kconfig" - - source "arch/x86/Kconfig.assembler" -+ -+source "3rdparty/Kconfig" -diff -Nurp linux-5.14/Makefile linux-5.14-3rd/Makefile ---- linux-5.14/Makefile -+++ linux-5.14-3rd/Makefile -@@ -670,7 +670,7 @@ endif - ifeq ($(KBUILD_EXTMOD),) - # Objects we will link into vmlinux / subdirs we need to visit - core-y := init/ usr/ arch/$(SRCARCH)/ --drivers-y := drivers/ sound/ -+drivers-y := drivers/ sound/ 3rdparty/ - drivers-$(CONFIG_SAMPLES) += samples/ - drivers-$(CONFIG_NET) += net/ - drivers-y += virt/ diff --git a/kernel/tools/cpupowertools/files/patches/mageia/3rd-3rdparty-tree.patch b/kernel/tools/cpupowertools/files/patches/mageia/3rd-3rdparty-tree.patch deleted file mode 100644 index 483e4e57..00000000 --- a/kernel/tools/cpupowertools/files/patches/mageia/3rd-3rdparty-tree.patch +++ /dev/null @@ -1,21 +0,0 @@ - - 3rdparty/Kconfig | 5 +++++ - 3rdparty/Makefile | 3 +++ - 2 files changed, 8 insertions(+) - -diff -Nurp linux-5.1.6/3rdparty/Kconfig linux-5.1.6-3rd/3rdparty/Kconfig ---- linux-5.1.6/3rdparty/Kconfig 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.1.6-3rd/3rdparty/Kconfig 2019-05-31 23:02:53.380127780 +0300 -@@ -0,0 +1,5 @@ -+# -+ -+menu "External 3rdparty kernel additions" -+ -+endmenu -diff -Nurp linux-5.1.6/3rdparty/Makefile linux-5.1.6-3rd/3rdparty/Makefile ---- linux-5.1.6/3rdparty/Makefile 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.1.6-3rd/3rdparty/Makefile 2019-05-31 23:03:58.338529850 +0300 -@@ -0,0 +1,3 @@ -+# -+ -+obj- := 3rdparty.o # Dummy rule to force built-in.o to be made diff --git a/kernel/tools/cpupowertools/files/patches/mageia/3rd-fix-kconfig.patch b/kernel/tools/cpupowertools/files/patches/mageia/3rd-fix-kconfig.patch deleted file mode 100644 index 783807d7..00000000 --- a/kernel/tools/cpupowertools/files/patches/mageia/3rd-fix-kconfig.patch +++ /dev/null @@ -1,34 +0,0 @@ -diff -up ./3rdparty/rtl8723de/Kconfig.tv ./3rdparty/rtl8723de/Kconfig ---- ./3rdparty/rtl8723de/Kconfig.tv 2020-10-13 21:02:42.452125426 +0200 -+++ ./3rdparty/rtl8723de/Kconfig 2020-10-13 20:59:14.012371730 +0200 -@@ -1,6 +1,6 @@ - config RTL8723DE - tristate "Realtek 8723DE PCI WiFi" - depends on PCI -- ---help--- -+ help - Help message of RTL8723DE - -diff -up ./3rdparty/rtl8821ce/Kconfig.tv ./3rdparty/rtl8821ce/Kconfig ---- ./3rdparty/rtl8821ce/Kconfig.tv 2020-10-13 16:09:11.157856145 +0200 -+++ ./3rdparty/rtl8821ce/Kconfig 2020-10-13 20:58:17.242118685 +0200 -@@ -1,6 +1,6 @@ - config RTL8821CE - tristate "Realtek 8821C PCI WiFi" - depends on PCI -- ---help--- -+ help - Help message of RTL8821CE - -diff -up ./3rdparty/viahss/Kconfig.tv ./3rdparty/viahss/Kconfig ---- ./3rdparty/viahss/Kconfig.tv 2020-10-13 21:02:44.844168369 +0200 -+++ ./3rdparty/viahss/Kconfig 2020-10-13 20:59:19.875488718 +0200 -@@ -1,7 +1,7 @@ - config VIAHSS - tristate "VIA High Speed Serial" - depends on SERIAL_CORE && m -- ---help--- -+ help - VIA High Speed Serial is a little kernel module (1 KB) which enables - high speed serial port modes of VIA VT82C686A or VT82C686B - southbridge-equipped motherboards. With this module, you can use the diff --git a/kernel/tools/cpupowertools/files/patches/mageia/3rd-ndiswrapper-1.63.patch b/kernel/tools/cpupowertools/files/patches/mageia/3rd-ndiswrapper-1.63.patch deleted file mode 100644 index f5133093..00000000 --- a/kernel/tools/cpupowertools/files/patches/mageia/3rd-ndiswrapper-1.63.patch +++ /dev/null @@ -1,26570 +0,0 @@ -diff -Nurp linux-5.6.11/3rdparty/ndiswrapper/crt.c linux-5.6.11-ndis/3rdparty/ndiswrapper/crt.c ---- linux-5.6.11/3rdparty/ndiswrapper/crt.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.6.11-ndis/3rdparty/ndiswrapper/crt.c 2020-05-03 15:18:33.000000000 +0300 -@@ -0,0 +1,589 @@ -+/* -+ * Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ */ -+ -+#include "ntoskernel.h" -+#include "crt_exports.h" -+ -+#ifdef CONFIG_X86_64 -+/* Windows long is 32-bit, so strip single 'l' in integer formats */ -+static void strip_l_modifier(char *str) -+{ -+ char *ptr = str; -+ int in_format = 0; -+ char *lptr = NULL; -+ char last = 0; -+ char *end_ptr; -+ char *wptr; -+ -+ /* Replace single 'l' inside integer formats with '\0' */ -+ for (ptr = str; *ptr; ptr++) { -+ if (!in_format) { -+ if (*ptr == '%') -+ in_format = 1; -+ last = *ptr; -+ continue; -+ } -+ switch (*ptr) { -+ case 'd': -+ case 'i': -+ case 'o': -+ case 'u': -+ case 'x': -+ case 'X': -+ case 'p': -+ case 'n': -+ case 'm': -+ if (lptr) { -+ *lptr = '\0'; -+ lptr = NULL; -+ } -+ in_format = 0; -+ break; -+ case 'c': -+ case 'C': -+ case 's': -+ case 'S': -+ case 'f': -+ case 'e': -+ case 'E': -+ case 'g': -+ case 'G': -+ case 'a': -+ case 'A': -+ lptr = NULL; -+ in_format = 0; -+ break; -+ case '%': -+ lptr = NULL; -+ if (last == '%') -+ in_format = 0; -+ else -+ in_format = 1; /* ignore previous junk */ -+ break; -+ case 'l': -+ if (last == 'l') -+ lptr = NULL; -+ else -+ lptr = ptr; -+ break; -+ default: -+ break; -+ } -+ last = *ptr; -+ } -+ -+ /* Purge zeroes from the resulting string */ -+ end_ptr = ptr; -+ wptr = str; -+ for (ptr = str; ptr < end_ptr; ptr++) -+ if (*ptr != 0) -+ *(wptr++) = *ptr; -+ *wptr = 0; -+} -+ -+/* -+ * va_list on x86_64 Linux is designed to allow passing arguments in registers -+ * even to variadic functions. va_list is a structure holding pointers to the -+ * register save area, which holds the arguments passed in registers, and to -+ * the stack, which may have the arguments that did not fit the registers. -+ * va_list also holds offsets in the register save area for the next general -+ * purpose and floating point registers that the next va_arg() would fetch. -+ * -+ * Unlike Linux, the Windows va_list is just a pointer to the stack. No -+ * arguments are passed in the registers. That's why we construct the Linux -+ * va_list so that the register save area is never used. For that goal, we set -+ * the offsets to the maximal allowed values, meaning that the arguments passed -+ * in the registers have been exhausted. The values are 48 for general purpose -+ * registers (6 registers, 8 bytes each) and 304 for floating point registers -+ * (16 registers, 16 bytes each, on top of general purpose register). -+ */ -+ -+struct x86_64_va_list { -+ int gp_offset; -+ int fp_offset; -+ void *overflow_arg_area; -+ void *reg_save_area; -+}; -+ -+#define VA_LIST_DECL(_args) \ -+ va_list _args##new; \ -+ struct x86_64_va_list *_args##x; -+#define VA_LIST_PREP(_args) \ -+do { \ -+ _args##x = (struct x86_64_va_list *)&_args##new; \ -+ _args##x->gp_offset = 6 * 8; /* GP registers exhausted */ \ -+ _args##x->fp_offset = 6 * 8 + 16 * 16; /* FP registers exhausted */ \ -+ _args##x->overflow_arg_area = (void *)_args; \ -+ _args##x->reg_save_area = NULL; \ -+} while (0) -+#define VA_LIST_CONV(_args) (_args##new) -+#define VA_LIST_FREE(_args) -+#define FMT_DECL(_fmt) \ -+ char *_fmt##copy; \ -+ int _fmt##len; -+#define FMT_PREP(_fmt) \ -+do { \ -+ _fmt##len = strlen(format) + 1; \ -+ _fmt##copy = kmalloc(_fmt##len, irql_gfp()); \ -+ if (_fmt##copy) { \ -+ memcpy(_fmt##copy, format, _fmt##len); \ -+ strip_l_modifier(_fmt##copy); \ -+ } \ -+} while (0) -+#define FMT_CONV(_fmt) (_fmt##copy ? _fmt##copy : format) -+#define FMT_FREE(_fmt) kfree(_fmt##copy) -+ -+#else /* !CONFIG_X86_64 */ -+ -+#define VA_LIST_DECL(_args) -+#define VA_LIST_PREP(_args) -+#define VA_LIST_CONV(_args) (_args) -+#define VA_LIST_FREE(_args) -+#define FMT_DECL(_fmt) -+#define FMT_PREP(_fmt) -+#define FMT_CONV(_fmt) (format) -+#define FMT_FREE(_fmt) -+ -+#endif /* !CONFIG_X86_64 */ -+ -+__attribute__((format(printf, 2, 3))) -+noregparm INT WIN_FUNC(_win_sprintf,12) -+ (char *buf, const char *format, ...) -+{ -+ va_list args; -+ int res; -+ FMT_DECL(format) -+ -+ FMT_PREP(format); -+ va_start(args, format); -+ res = vsprintf(buf, FMT_CONV(format), args); -+ va_end(args); -+ FMT_FREE(format); -+ -+ TRACE2("buf: %p: %s", buf, buf); -+ return res; -+} -+ -+noregparm INT WIN_FUNC(swprintf,12) -+ (wchar_t *buf, const wchar_t *format, ...) -+{ -+ TODO(); -+ EXIT2(return 0); -+} -+ -+noregparm INT WIN_FUNC(_win_vsprintf,3) -+ (char *str, const char *format, va_list ap) -+{ -+ INT i; -+ VA_LIST_DECL(ap) -+ FMT_DECL(format) -+ -+ VA_LIST_PREP(ap); -+ FMT_PREP(format); -+ -+ i = vsprintf(str, FMT_CONV(format), VA_LIST_CONV(ap)); -+ TRACE2("str: %p: %s", str, str); -+ -+ FMT_FREE(format); -+ VA_LIST_FREE(ap); -+ EXIT2(return i); -+} -+ -+__attribute__((format(printf, 3, 4))) -+noregparm INT WIN_FUNC(_win_snprintf,12) -+ (char *buf, SIZE_T count, const char *format, ...) -+{ -+ va_list args; -+ int res; -+ FMT_DECL(format) -+ -+ FMT_PREP(format); -+ va_start(args, format); -+ res = vsnprintf(buf, count, FMT_CONV(format), args); -+ va_end(args); -+ TRACE2("buf: %p: %s", buf, buf); -+ -+ FMT_FREE(format); -+ return res; -+} -+ -+__attribute__((format(printf, 3, 4))) -+noregparm INT WIN_FUNC(_win__snprintf,12) -+ (char *buf, SIZE_T count, const char *format, ...) -+{ -+ va_list args; -+ int res; -+ FMT_DECL(format) -+ -+ FMT_PREP(format); -+ va_start(args, format); -+ res = vsnprintf(buf, count, FMT_CONV(format), args); -+ va_end(args); -+ TRACE2("buf: %p: %s", buf, buf); -+ -+ FMT_FREE(format); -+ return res; -+} -+ -+noregparm INT WIN_FUNC(_win_vsnprintf,4) -+ (char *str, SIZE_T size, const char *format, va_list ap) -+{ -+ INT i; -+ VA_LIST_DECL(ap) -+ FMT_DECL(format) -+ -+ VA_LIST_PREP(ap); -+ FMT_PREP(format); -+ -+ i = vsnprintf(str, size, FMT_CONV(format), VA_LIST_CONV(ap)); -+ TRACE2("str: %p: %s", str, str); -+ -+ FMT_FREE(format); -+ VA_LIST_FREE(ap); -+ EXIT2(return i); -+} -+ -+noregparm INT WIN_FUNC(_win__vsnprintf,4) -+ (char *str, SIZE_T size, const char *format, va_list ap) -+{ -+ INT i; -+ VA_LIST_DECL(ap) -+ FMT_DECL(format) -+ -+ VA_LIST_PREP(ap); -+ FMT_PREP(format); -+ -+ i = vsnprintf(str, size, FMT_CONV(format), VA_LIST_CONV(ap)); -+ TRACE2("str: %p: %s", str, str); -+ -+ FMT_FREE(format); -+ VA_LIST_FREE(ap); -+ EXIT2(return i); -+} -+ -+noregparm INT WIN_FUNC(_win__vsnwprintf,4) -+ (wchar_t *str, SIZE_T size, const wchar_t *format, va_list ap) -+{ -+ int ret; -+ -+ TODO(); /* format expansion not implemented */ -+ _win_wcsncpy(str, format, size); -+ ret = _win_wcslen(format); -+ if (ret >= size) -+ ret = -1; -+ return ret; -+} -+ -+noregparm char *WIN_FUNC(_win_strncpy,3) -+ (char *dst, char *src, SIZE_T n) -+{ -+ return strncpy(dst, src, n); -+} -+ -+noregparm SIZE_T WIN_FUNC(_win_strlen,1) -+ (const char *s) -+{ -+ return strlen(s); -+} -+ -+noregparm INT WIN_FUNC(_win_strncmp,3) -+ (const char *s1, const char *s2, SIZE_T n) -+{ -+ return strncmp(s1, s2, n); -+} -+ -+noregparm INT WIN_FUNC(_win_strcmp,2) -+ (const char *s1, const char *s2) -+{ -+ return strcmp(s1, s2); -+} -+ -+noregparm INT WIN_FUNC(_win_stricmp,2) -+ (const char *s1, const char *s2) -+{ -+ return stricmp(s1, s2); -+} -+ -+noregparm char *WIN_FUNC(_win_strncat,3) -+ (char *dest, const char *src, SIZE_T n) -+{ -+ return strncat(dest, src, n); -+} -+ -+noregparm INT WIN_FUNC(_win_wcscmp,2) -+ (const wchar_t *s1, const wchar_t *s2) -+{ -+ while (*s1 && *s1 == *s2) { -+ s1++; -+ s2++; -+ } -+ return *s1 - *s2; -+} -+ -+noregparm INT WIN_FUNC(_win_wcsicmp,2) -+ (const wchar_t *s1, const wchar_t *s2) -+{ -+ while (*s1 && tolower((char)*s1) == tolower((char)*s2)) { -+ s1++; -+ s2++; -+ } -+ return tolower((char)*s1) - tolower((char)*s2); -+} -+ -+noregparm SIZE_T WIN_FUNC(_win_wcslen,1) -+ (const wchar_t *s) -+{ -+ const wchar_t *t = s; -+ while (*t) -+ t++; -+ return t - s; -+} -+ -+noregparm wchar_t *WIN_FUNC(_win_wcsncpy,3) -+ (wchar_t *dest, const wchar_t *src, SIZE_T n) -+{ -+ const wchar_t *s; -+ wchar_t *d; -+ s = src + n; -+ d = dest; -+ while (src < s && (*d++ = *src++)) -+ ; -+ if (s > src) -+ memset(d, 0, (s - src) * sizeof(wchar_t)); -+ return dest; -+} -+ -+noregparm wchar_t *WIN_FUNC(_win_wcscpy,2) -+ (wchar_t *dest, const wchar_t *src) -+{ -+ wchar_t *d = dest; -+ while ((*d++ = *src++)) -+ ; -+ return dest; -+} -+ -+noregparm wchar_t *WIN_FUNC(_win_wcscat,2) -+ (wchar_t *dest, const wchar_t *src) -+{ -+ wchar_t *d; -+ d = dest; -+ while (*d) -+ d++; -+ while ((*d++ = *src++)) -+ ; -+ return dest; -+} -+ -+noregparm INT WIN_FUNC(_win_towupper,1) -+ (wchar_t c) -+{ -+ return toupper(c); -+} -+ -+noregparm INT WIN_FUNC(_win_towlower,1) -+ (wchar_t c) -+{ -+ return tolower(c); -+} -+ -+noregparm INT WIN_FUNC(_win_tolower,1) -+ (INT c) -+{ -+ return tolower(c); -+} -+ -+noregparm INT WIN_FUNC(_win_toupper,1) -+ (INT c) -+{ -+ return toupper(c); -+} -+ -+noregparm void *WIN_FUNC(_win_strcpy,2) -+ (void *to, const void *from) -+{ -+ return strcpy(to, from); -+} -+ -+noregparm char *WIN_FUNC(_win_strstr,2) -+ (const char *s1, const char *s2) -+{ -+ return strstr(s1, s2); -+} -+ -+noregparm char *WIN_FUNC(_win_strchr,2) -+ (const char *s, int c) -+{ -+ return strchr(s, c); -+} -+ -+noregparm char *WIN_FUNC(_win_strrchr,2) -+ (const char *s, int c) -+{ -+ return strrchr(s, c); -+} -+ -+noregparm void *WIN_FUNC(_win_memmove,3) -+ (void *to, void *from, SIZE_T count) -+{ -+ return memmove(to, from, count); -+} -+ -+noregparm void *WIN_FUNC(_win_memchr,3) -+ (const void *s, INT c, SIZE_T n) -+{ -+ return memchr(s, c, n); -+} -+ -+noregparm void *WIN_FUNC(_win_memcpy,3) -+ (void *to, const void *from, SIZE_T n) -+{ -+ return memcpy(to, from, n); -+} -+ -+noregparm void *WIN_FUNC(_win_memset,3) -+ (void *s, char c, SIZE_T count) -+{ -+ return memset(s, c, count); -+} -+ -+noregparm int WIN_FUNC(_win_memcmp,3) -+ (void *s1, void *s2, SIZE_T n) -+{ -+ return memcmp(s1, s2, n); -+} -+ -+noregparm void WIN_FUNC(_win_srand,1) -+ (UINT seed) -+{ -+ prandom_seed(seed); -+} -+ -+noregparm int WIN_FUNC(rand,0) -+ (void) -+{ -+ char buf[6]; -+ int i, n; -+ -+ get_random_bytes(buf, sizeof(buf)); -+ for (n = i = 0; i < sizeof(buf); i++) -+ n += buf[i]; -+ return n; -+} -+ -+noregparm int WIN_FUNC(_win_atoi,1) -+ (const char *ptr) -+{ -+ int i = simple_strtol(ptr, NULL, 10); -+ return i; -+} -+ -+noregparm int WIN_FUNC(_win_isdigit,1) -+ (int c) -+{ -+ return isdigit(c); -+} -+ -+noregparm int WIN_FUNC(_win_isprint,1) -+ (int c) -+{ -+ return isprint(c); -+} -+ -+wstdcall s64 WIN_FUNC(_alldiv,2) -+ (s64 a, s64 b) -+{ -+ return a / b; -+} -+ -+wstdcall u64 WIN_FUNC(_aulldiv,2) -+ (u64 a, u64 b) -+{ -+ return a / b; -+} -+ -+wstdcall s64 WIN_FUNC(_allmul,2) -+ (s64 a, s64 b) -+{ -+ return a * b; -+} -+ -+wstdcall u64 WIN_FUNC(_aullmul,2) -+ (u64 a, u64 b) -+{ -+ return a * b; -+} -+ -+wstdcall s64 WIN_FUNC(_allrem,2) -+ (s64 a, s64 b) -+{ -+ return a % b; -+} -+ -+wstdcall u64 WIN_FUNC(_aullrem,2) -+ (u64 a, u64 b) -+{ -+ return a % b; -+} -+ -+regparm3 s64 WIN_FUNC(_allshl,2) -+ (s64 a, u8 b) -+{ -+ return a << b; -+} -+ -+regparm3 u64 WIN_FUNC(_aullshl,2) -+ (u64 a, u8 b) -+{ -+ return a << b; -+} -+ -+regparm3 s64 WIN_FUNC(_allshr,2) -+ (s64 a, u8 b) -+{ -+ return a >> b; -+} -+ -+regparm3 u64 WIN_FUNC(_aullshr,2) -+ (u64 a, u8 b) -+{ -+ return a >> b; -+} -+ -+int stricmp(const char *s1, const char *s2) -+{ -+ while (*s1 && tolower(*s1) == tolower(*s2)) { -+ s1++; -+ s2++; -+ } -+ return *s1 - *s2; -+} -+ -+void dump_bytes(const char *ctx, const u8 *from, int len) -+{ -+ int i, j; -+ u8 *buf; -+ -+ buf = kmalloc(len * 3 + 1, irql_gfp()); -+ if (!buf) { -+ ERROR("couldn't allocate memory"); -+ return; -+ } -+ for (i = j = 0; i < len; i++, j += 3) { -+ sprintf(&buf[j], "%02x ", from[i]); -+ } -+ buf[j] = 0; -+ printk(KERN_DEBUG "%s: %p: %s\n", ctx, from, buf); -+ kfree(buf); -+} -diff -Nurp linux-5.6.11/3rdparty/ndiswrapper/divdi3.c linux-5.6.11-ndis/3rdparty/ndiswrapper/divdi3.c ---- linux-5.6.11/3rdparty/ndiswrapper/divdi3.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.6.11-ndis/3rdparty/ndiswrapper/divdi3.c 2020-05-03 15:18:33.000000000 +0300 -@@ -0,0 +1,329 @@ -+/* 64-bit multiplication and division -+ Copyright (C) 1989, 1992-1999, 2000, 2001, 2002, 2003 -+ Free Software Foundation, Inc. -+ This file is part of the GNU C Library. -+ -+ The GNU C Library is free software; you can redistribute it and/or -+ modify it under the terms of the GNU Lesser General Public -+ License as published by the Free Software Foundation; either -+ version 2.1 of the License, or (at your option) any later version. -+ -+ The GNU C Library is distributed in the hope that it will be useful, -+ but WITHOUT ANY WARRANTY; without even the implied warranty of -+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ Lesser General Public License for more details. -+ -+ You should have received a copy of the GNU Lesser General Public -+ License along with the GNU C Library; if not, write to the Free -+ Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA -+ 02111-1307 USA. */ -+ -+#include -+#include -+ -+#if BITS_PER_LONG != 32 -+#error This is for 32-bit targets only -+#endif -+ -+typedef unsigned int UQItype __attribute__ ((mode (QI))); -+typedef int SItype __attribute__ ((mode (SI))); -+typedef unsigned int USItype __attribute__ ((mode (SI))); -+typedef int DItype __attribute__ ((mode (DI))); -+typedef unsigned int UDItype __attribute__ ((mode (DI))); -+#define Wtype SItype -+#define HWtype SItype -+#define DWtype DItype -+#define UWtype USItype -+#define UHWtype USItype -+#define UDWtype UDItype -+#define W_TYPE_SIZE 32 -+ -+#include "longlong.h" -+ -+#if defined(__BIG_ENDIAN) -+struct DWstruct { Wtype high, low;}; -+#elif defined(__LITTLE_ENDIAN) -+struct DWstruct { Wtype low, high;}; -+#else -+#error Unhandled endianity -+#endif -+typedef union { struct DWstruct s; DWtype ll; } DWunion; -+ -+/* Prototypes of exported functions. */ -+extern DWtype __divdi3 (DWtype u, DWtype v); -+extern DWtype __moddi3 (DWtype u, DWtype v); -+extern UDWtype __udivdi3 (UDWtype u, UDWtype v); -+extern UDWtype __umoddi3 (UDWtype u, UDWtype v); -+ -+static UDWtype -+__udivmoddi4 (UDWtype n, UDWtype d, UDWtype *rp) -+{ -+ DWunion ww; -+ DWunion nn, dd; -+ DWunion rr; -+ UWtype d0, d1, n0, n1, n2; -+ UWtype q0, q1; -+ UWtype b, bm; -+ -+ nn.ll = n; -+ dd.ll = d; -+ -+ d0 = dd.s.low; -+ d1 = dd.s.high; -+ n0 = nn.s.low; -+ n1 = nn.s.high; -+ -+#if !UDIV_NEEDS_NORMALIZATION -+ if (d1 == 0) -+ { -+ if (d0 > n1) -+ { -+ /* 0q = nn / 0D */ -+ -+ udiv_qrnnd (q0, n0, n1, n0, d0); -+ q1 = 0; -+ -+ /* Remainder in n0. */ -+ } -+ else -+ { -+ /* qq = NN / 0d */ -+ -+ if (d0 == 0) -+ d0 = 1 / d0; /* Divide intentionally by zero. */ -+ -+ udiv_qrnnd (q1, n1, 0, n1, d0); -+ udiv_qrnnd (q0, n0, n1, n0, d0); -+ -+ /* Remainder in n0. */ -+ } -+ -+ if (rp != NULL) -+ { -+ rr.s.low = n0; -+ rr.s.high = 0; -+ *rp = rr.ll; -+ } -+ } -+ -+#else /* UDIV_NEEDS_NORMALIZATION */ -+ -+ if (d1 == 0) -+ { -+ if (d0 > n1) -+ { -+ /* 0q = nn / 0D */ -+ -+ count_leading_zeros (bm, d0); -+ -+ if (bm != 0) -+ { -+ /* Normalize, i.e. make the most significant bit of the -+ denominator set. */ -+ -+ d0 = d0 << bm; -+ n1 = (n1 << bm) | (n0 >> (W_TYPE_SIZE - bm)); -+ n0 = n0 << bm; -+ } -+ -+ udiv_qrnnd (q0, n0, n1, n0, d0); -+ q1 = 0; -+ -+ /* Remainder in n0 >> bm. */ -+ } -+ else -+ { -+ /* qq = NN / 0d */ -+ -+ if (d0 == 0) -+ d0 = 1 / d0; /* Divide intentionally by zero. */ -+ -+ count_leading_zeros (bm, d0); -+ -+ if (bm == 0) -+ { -+ /* From (n1 >= d0) /\ (the most significant bit of d0 is set), -+ conclude (the most significant bit of n1 is set) /\ (the -+ leading quotient digit q1 = 1). -+ -+ This special case is necessary, not an optimization. -+ (Shifts counts of W_TYPE_SIZE are undefined.) */ -+ -+ n1 -= d0; -+ q1 = 1; -+ } -+ else -+ { -+ /* Normalize. */ -+ -+ b = W_TYPE_SIZE - bm; -+ -+ d0 = d0 << bm; -+ n2 = n1 >> b; -+ n1 = (n1 << bm) | (n0 >> b); -+ n0 = n0 << bm; -+ -+ udiv_qrnnd (q1, n1, n2, n1, d0); -+ } -+ -+ /* n1 != d0... */ -+ -+ udiv_qrnnd (q0, n0, n1, n0, d0); -+ -+ /* Remainder in n0 >> bm. */ -+ } -+ -+ if (rp != NULL) -+ { -+ rr.s.low = n0 >> bm; -+ rr.s.high = 0; -+ *rp = rr.ll; -+ } -+ } -+#endif /* UDIV_NEEDS_NORMALIZATION */ -+ -+ else -+ { -+ if (d1 > n1) -+ { -+ /* 00 = nn / DD */ -+ -+ q0 = 0; -+ q1 = 0; -+ -+ /* Remainder in n1n0. */ -+ if (rp != NULL) -+ { -+ rr.s.low = n0; -+ rr.s.high = n1; -+ *rp = rr.ll; -+ } -+ } -+ else -+ { -+ /* 0q = NN / dd */ -+ -+ count_leading_zeros (bm, d1); -+ if (bm == 0) -+ { -+ /* From (n1 >= d1) /\ (the most significant bit of d1 is set), -+ conclude (the most significant bit of n1 is set) /\ (the -+ quotient digit q0 = 0 or 1). -+ -+ This special case is necessary, not an optimization. */ -+ -+ /* The condition on the next line takes advantage of that -+ n1 >= d1 (true due to program flow). */ -+ if (n1 > d1 || n0 >= d0) -+ { -+ q0 = 1; -+ sub_ddmmss (n1, n0, n1, n0, d1, d0); -+ } -+ else -+ q0 = 0; -+ -+ q1 = 0; -+ -+ if (rp != NULL) -+ { -+ rr.s.low = n0; -+ rr.s.high = n1; -+ *rp = rr.ll; -+ } -+ } -+ else -+ { -+ UWtype m1, m0; -+ /* Normalize. */ -+ -+ b = W_TYPE_SIZE - bm; -+ -+ d1 = (d1 << bm) | (d0 >> b); -+ d0 = d0 << bm; -+ n2 = n1 >> b; -+ n1 = (n1 << bm) | (n0 >> b); -+ n0 = n0 << bm; -+ -+ udiv_qrnnd (q0, n1, n2, n1, d1); -+ umul_ppmm (m1, m0, q0, d0); -+ -+ if (m1 > n1 || (m1 == n1 && m0 > n0)) -+ { -+ q0--; -+ sub_ddmmss (m1, m0, m1, m0, d1, d0); -+ } -+ -+ q1 = 0; -+ -+ /* Remainder in (n1n0 - m1m0) >> bm. */ -+ if (rp != NULL) -+ { -+ sub_ddmmss (n1, n0, n1, n0, m1, m0); -+ rr.s.low = (n1 << b) | (n0 >> bm); -+ rr.s.high = n1 >> bm; -+ *rp = rr.ll; -+ } -+ } -+ } -+ } -+ -+ ww.s.low = q0; -+ ww.s.high = q1; -+ return ww.ll; -+} -+ -+DWtype -+__divdi3 (DWtype u, DWtype v) -+{ -+ Wtype c = 0; -+ DWtype w; -+ -+ if (u < 0) -+ { -+ c = ~c; -+ u = -u; -+ } -+ if (v < 0) -+ { -+ c = ~c; -+ v = -v; -+ } -+ w = __udivmoddi4 (u, v, NULL); -+ if (c) -+ w = -w; -+ return w; -+} -+ -+DWtype -+__moddi3 (DWtype u, DWtype v) -+{ -+ Wtype c = 0; -+ DWtype w; -+ -+ if (u < 0) -+ { -+ c = ~c; -+ u = -u; -+ } -+ if (v < 0) -+ v = -v; -+ __udivmoddi4 (u, v, &w); -+ if (c) -+ w = -w; -+ return w; -+} -+ -+UDWtype -+__udivdi3 (UDWtype u, UDWtype v) -+{ -+ return __udivmoddi4 (u, v, NULL); -+} -+ -+UDWtype -+__umoddi3 (UDWtype u, UDWtype v) -+{ -+ UDWtype w; -+ -+ __udivmoddi4 (u, v, &w); -+ return w; -+} -diff -Nurp linux-5.6.11/3rdparty/ndiswrapper/hal.c linux-5.6.11-ndis/3rdparty/ndiswrapper/hal.c ---- linux-5.6.11/3rdparty/ndiswrapper/hal.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.6.11-ndis/3rdparty/ndiswrapper/hal.c 2020-05-03 15:18:33.000000000 +0300 -@@ -0,0 +1,157 @@ -+/* -+ * Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ */ -+ -+#include "ntoskernel.h" -+#include "hal_exports.h" -+ -+wstdcall void WIN_FUNC(WRITE_PORT_ULONG,2) -+ (ULONG_PTR port, ULONG value) -+{ -+ outl(value, port); -+} -+ -+wstdcall ULONG WIN_FUNC(READ_PORT_ULONG,1) -+ (ULONG_PTR port) -+{ -+ return inl(port); -+} -+ -+wstdcall void WIN_FUNC(WRITE_PORT_USHORT,2) -+ (ULONG_PTR port, USHORT value) -+{ -+ outw(value, port); -+} -+ -+wstdcall USHORT WIN_FUNC(READ_PORT_USHORT,1) -+ (ULONG_PTR port) -+{ -+ return inw(port); -+} -+ -+wstdcall void WIN_FUNC(WRITE_PORT_UCHAR,2) -+ (ULONG_PTR port, UCHAR value) -+{ -+ outb(value, port); -+} -+ -+wstdcall UCHAR WIN_FUNC(READ_PORT_UCHAR,1) -+ (ULONG_PTR port) -+{ -+ return inb(port); -+} -+ -+wstdcall void WIN_FUNC(WRITE_PORT_BUFFER_USHORT,3) -+ (ULONG_PTR port, USHORT *buf, ULONG count) -+{ -+ outsw(port, buf, count); -+} -+ -+wstdcall void WIN_FUNC(READ_PORT_BUFFER_USHORT,3) -+ (ULONG_PTR port, USHORT *buf, ULONG count) -+{ -+ insw(port, buf, count); -+} -+ -+wstdcall void WIN_FUNC(WRITE_PORT_BUFFER_ULONG,3) -+ (ULONG_PTR port, ULONG *buf, ULONG count) -+{ -+ outsl(port, buf, count); -+} -+ -+wstdcall void WIN_FUNC(READ_PORT_BUFFER_ULONG,3) -+ (ULONG_PTR port, ULONG *buf, ULONG count) -+{ -+ insl(port, buf, count); -+} -+ -+wstdcall USHORT WIN_FUNC(READ_REGISTER_USHORT,1) -+ (void __iomem *reg) -+{ -+ return readw(reg); -+} -+ -+wstdcall void WIN_FUNC(WRITE_REGISTER_ULONG,2) -+ (void __iomem *reg, UINT val) -+{ -+ writel(val, reg); -+} -+ -+wstdcall void WIN_FUNC(WRITE_REGISTER_USHORT,2) -+ (void __iomem *reg, USHORT val) -+{ -+ writew(val, reg); -+} -+ -+wstdcall void WIN_FUNC(WRITE_REGISTER_UCHAR,2) -+ (void __iomem *reg, UCHAR val) -+{ -+ writeb(val, reg); -+} -+ -+wstdcall void WIN_FUNC(KeStallExecutionProcessor,1) -+ (ULONG usecs) -+{ -+ udelay(usecs); -+} -+ -+wstdcall KIRQL WIN_FUNC(KeGetCurrentIrql,0) -+ (void) -+{ -+ return current_irql(); -+} -+ -+wfastcall KIRQL WIN_FUNC(KfRaiseIrql,1) -+ (KIRQL newirql) -+{ -+ return raise_irql(newirql); -+} -+ -+wfastcall void WIN_FUNC(KfLowerIrql,1) -+ (KIRQL oldirql) -+{ -+ lower_irql(oldirql); -+} -+ -+wfastcall KIRQL WIN_FUNC(KfAcquireSpinLock,1) -+ (NT_SPIN_LOCK *lock) -+{ -+ return nt_spin_lock_irql(lock, DISPATCH_LEVEL); -+} -+ -+wfastcall void WIN_FUNC(KfReleaseSpinLock,2) -+ (NT_SPIN_LOCK *lock, KIRQL oldirql) -+{ -+ nt_spin_unlock_irql(lock, oldirql); -+} -+ -+wfastcall void WIN_FUNC(KefAcquireSpinLockAtDpcLevel,1) -+ (NT_SPIN_LOCK *lock) -+{ -+#ifdef DEBUG_IRQL -+ if (current_irql() != DISPATCH_LEVEL) -+ ERROR("irql != DISPATCH_LEVEL"); -+#endif -+ nt_spin_lock(lock); -+} -+ -+wfastcall void WIN_FUNC(KefReleaseSpinLockFromDpcLevel,1) -+ (NT_SPIN_LOCK *lock) -+{ -+#ifdef DEBUG_IRQL -+ if (current_irql() != DISPATCH_LEVEL) -+ ERROR("irql != DISPATCH_LEVEL"); -+#endif -+ nt_spin_unlock(lock); -+} -diff -Nurp linux-5.6.11/3rdparty/ndiswrapper/iw_ndis.c linux-5.6.11-ndis/3rdparty/ndiswrapper/iw_ndis.c ---- linux-5.6.11/3rdparty/ndiswrapper/iw_ndis.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.6.11-ndis/3rdparty/ndiswrapper/iw_ndis.c 2020-05-03 15:18:33.000000000 +0300 -@@ -0,0 +1,2002 @@ -+ /* -+ * Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+ -+#include "iw_ndis.h" -+#include "wrapndis.h" -+ -+#ifdef CONFIG_WIRELESS_EXT -+ -+static int freq_chan[] = { 2412, 2417, 2422, 2427, 2432, 2437, 2442, -+ 2447, 2452, 2457, 2462, 2467, 2472, 2484 }; -+ -+static const char *network_names[] = {"IEEE 802.11FH", "IEEE 802.11b", -+ "IEEE 802.11a", "IEEE 802.11g", "Auto"}; -+ -+static int set_essid(struct ndis_device *wnd, const char *ssid, int ssid_len) -+{ -+ NDIS_STATUS res; -+ struct ndis_essid req; -+ -+ if (ssid_len > NDIS_ESSID_MAX_SIZE) -+ return -EINVAL; -+ -+ memset(&req, 0, sizeof(req)); -+ req.length = ssid_len; -+ if (ssid_len) -+ memcpy(&req.essid, ssid, ssid_len); -+ -+ res = mp_set(wnd, OID_802_11_SSID, &req, sizeof(req)); -+ if (res) { -+ WARNING("setting essid failed (%08X)", res); -+ EXIT2(return -EINVAL); -+ } -+ memcpy(&wnd->essid, &req, sizeof(req)); -+ EXIT2(return 0); -+} -+ -+static int set_iw_auth_mode(struct ndis_device *wnd, int wpa_version, -+ int auth_80211_alg) -+{ -+ NDIS_STATUS res; -+ ULONG auth_mode; -+ -+ ENTER2("%d, %d", wpa_version, auth_80211_alg); -+ if (wpa_version & IW_AUTH_WPA_VERSION_WPA2) { -+ if (wnd->iw_auth_key_mgmt & IW_AUTH_KEY_MGMT_802_1X) -+ auth_mode = Ndis802_11AuthModeWPA2; -+ else -+ auth_mode = Ndis802_11AuthModeWPA2PSK; -+ } else if (wpa_version & IW_AUTH_WPA_VERSION_WPA) { -+ if (wnd->iw_auth_key_mgmt & IW_AUTH_KEY_MGMT_802_1X) -+ auth_mode = Ndis802_11AuthModeWPA; -+ else if (wnd->iw_auth_key_mgmt & IW_AUTH_KEY_MGMT_PSK) -+ auth_mode = Ndis802_11AuthModeWPAPSK; -+ else -+ auth_mode = Ndis802_11AuthModeWPANone; -+ } else if (auth_80211_alg & IW_AUTH_ALG_SHARED_KEY) { -+ if (auth_80211_alg & IW_AUTH_ALG_OPEN_SYSTEM) -+ auth_mode = Ndis802_11AuthModeAutoSwitch; -+ else -+ auth_mode = Ndis802_11AuthModeShared; -+ } else -+ auth_mode = Ndis802_11AuthModeOpen; -+ -+ res = mp_set_int(wnd, OID_802_11_AUTHENTICATION_MODE, auth_mode); -+ if (res) { -+ WARNING("setting auth mode to %u failed (%08X)", -+ auth_mode, res); -+ if (res == NDIS_STATUS_INVALID_DATA) -+ EXIT2(return -EINVAL); -+ return -EOPNOTSUPP; -+ } -+ wnd->iw_auth_wpa_version = wpa_version; -+ wnd->iw_auth_80211_alg = auth_80211_alg; -+ EXIT2(return 0); -+} -+ -+static int set_auth_mode(struct ndis_device *wnd) -+{ -+ return set_iw_auth_mode(wnd, wnd->iw_auth_wpa_version, -+ wnd->iw_auth_80211_alg); -+} -+ -+static enum ndis_priv_filter ndis_priv_mode(struct ndis_device *wnd) -+{ -+ if (wnd->iw_auth_wpa_version & IW_AUTH_WPA_VERSION_WPA2 || -+ wnd->iw_auth_wpa_version & IW_AUTH_WPA_VERSION_WPA) -+ return Ndis802_11PrivFilter8021xWEP; -+ else -+ return Ndis802_11PrivFilterAcceptAll; -+} -+ -+static int set_priv_filter(struct ndis_device *wnd) -+{ -+ NDIS_STATUS res; -+ ULONG flags; -+ -+ flags = ndis_priv_mode(wnd); -+ ENTER2("filter: %d", flags); -+ res = mp_set_int(wnd, OID_802_11_PRIVACY_FILTER, flags); -+ if (res) -+ TRACE2("setting privacy filter to %d failed (%08X)", -+ flags, res); -+ EXIT2(return 0); -+} -+ -+static int set_encr_mode(struct ndis_device *wnd) -+{ -+ return set_iw_encr_mode(wnd, wnd->iw_auth_cipher_pairwise, -+ wnd->iw_auth_cipher_group); -+} -+ -+static int set_assoc_params(struct ndis_device *wnd) -+{ -+ TRACE2("wpa_version=0x%x auth_alg=0x%x key_mgmt=0x%x " -+ "cipher_pairwise=0x%x cipher_group=0x%x", -+ wnd->iw_auth_wpa_version, wnd->iw_auth_80211_alg, -+ wnd->iw_auth_key_mgmt, wnd->iw_auth_cipher_pairwise, -+ wnd->iw_auth_cipher_group); -+ set_auth_mode(wnd); -+ set_priv_filter(wnd); -+ set_encr_mode(wnd); -+ return 0; -+} -+ -+static int iw_set_essid(struct net_device *dev, struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ struct ndis_device *wnd = netdev_priv(dev); -+ int length; -+ -+ ENTER2(""); -+ /* there is no way to turn off essid other than to set to -+ * random bytes; instead, we use off to mean any */ -+ if (wrqu->essid.flags) { -+ length = wrqu->essid.length; -+ /* Strip '\0' appended by wireless extensions 19 and older */ -+ if (length > 0 && extra[length - 1] == '\0') -+ length--; -+ TRACE2("%d", length); -+ if (length <= 0 || length > NDIS_ESSID_MAX_SIZE) -+ EXIT2(return -EINVAL); -+ } else -+ length = 0; -+ -+ set_assoc_params(wnd); -+ -+ if (set_essid(wnd, extra, length)) -+ EXIT2(return -EINVAL); -+ -+ EXIT2(return 0); -+} -+ -+static int iw_get_essid(struct net_device *dev, struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ struct ndis_device *wnd = netdev_priv(dev); -+ NDIS_STATUS res; -+ struct ndis_essid req; -+ -+ ENTER2(""); -+ memset(&req, 0, sizeof(req)); -+ res = mp_query(wnd, OID_802_11_SSID, &req, sizeof(req)); -+ if (res) { -+ WARNING("getting essid failed (%08X)", res); -+ EXIT2(return -EOPNOTSUPP); -+ } -+ memcpy(extra, req.essid, req.length); -+ if (req.length > 0) -+ wrqu->essid.flags = 1; -+ else -+ wrqu->essid.flags = 0; -+ wrqu->essid.length = req.length; -+ EXIT2(return 0); -+} -+ -+/* index must be 0 - N, as per NDIS */ -+static int add_wep_key(struct ndis_device *wnd, char *key, int key_len, -+ int index) -+{ -+ struct ndis_encr_key ndis_key; -+ NDIS_STATUS res; -+ -+ ENTER2("key index: %d, length: %d", index, key_len); -+ if (key_len <= 0 || key_len > NDIS_ENCODING_TOKEN_MAX) { -+ WARNING("invalid key length (%d)", key_len); -+ EXIT2(return -EINVAL); -+ } -+ if (index < 0 || index >= MAX_ENCR_KEYS) { -+ WARNING("invalid key index (%d)", index); -+ EXIT2(return -EINVAL); -+ } -+ ndis_key.struct_size = sizeof(ndis_key); -+ ndis_key.length = key_len; -+ memcpy(&ndis_key.key, key, key_len); -+ ndis_key.index = index; -+ -+ if (index == wnd->encr_info.tx_key_index) { -+ ndis_key.index |= (1 << 31); -+ res = set_iw_encr_mode(wnd, IW_AUTH_CIPHER_WEP104, -+ IW_AUTH_CIPHER_NONE); -+ if (res) -+ WARNING("encryption couldn't be enabled (%08X)", res); -+ } -+ TRACE2("key %d: " MACSTRSEP, index, MAC2STR(key)); -+ res = mp_set(wnd, OID_802_11_ADD_WEP, &ndis_key, sizeof(ndis_key)); -+ if (res) { -+ WARNING("adding encryption key %d failed (%08X)", -+ index+1, res); -+ EXIT2(return -EINVAL); -+ } -+ -+ /* Atheros driver messes up ndis_key during ADD_WEP, so -+ * don't rely on that; instead use info in key and key_len */ -+ wnd->encr_info.keys[index].length = key_len; -+ memcpy(&wnd->encr_info.keys[index].key, key, key_len); -+ -+ EXIT2(return 0); -+} -+ -+static int set_infra_mode(struct ndis_device *wnd, -+ enum ndis_infrastructure_mode mode) -+{ -+ NDIS_STATUS res; -+ unsigned int i; -+ -+ ENTER2("%d", mode); -+ res = mp_query_int(wnd, OID_802_11_INFRASTRUCTURE_MODE, -+ &wnd->infrastructure_mode); -+ if (res != NDIS_STATUS_SUCCESS) { -+ WARNING("getting operating mode failed (%08X)", res); -+ EXIT2(return -EINVAL); -+ } -+ if (wnd->infrastructure_mode == mode) -+ EXIT2(return 0); -+ res = mp_set_int(wnd, OID_802_11_INFRASTRUCTURE_MODE, mode); -+ if (res) { -+ WARNING("setting operating mode to %d failed (%08X)", -+ mode, res); -+ EXIT2(return -EINVAL); -+ } -+ /* NDIS drivers clear keys when infrastructure mode is -+ * changed. But Linux tools assume otherwise. So set the -+ * keys */ -+ if (wnd->iw_auth_key_mgmt == 0 || -+ wnd->iw_auth_key_mgmt == IW_AUTH_KEY_MGMT_802_1X) { -+ for (i = 0; i < MAX_ENCR_KEYS; i++) { -+ if (wnd->encr_info.keys[i].length > 0) -+ add_wep_key(wnd, wnd->encr_info.keys[i].key, -+ wnd->encr_info.keys[i].length, i); -+ } -+ } -+ wnd->infrastructure_mode = mode; -+ EXIT2(return 0); -+} -+ -+static int iw_set_infra_mode(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ struct ndis_device *wnd = netdev_priv(dev); -+ enum ndis_infrastructure_mode ndis_mode; -+ -+ ENTER2("%d", wrqu->mode); -+ switch (wrqu->mode) { -+ case IW_MODE_ADHOC: -+ ndis_mode = Ndis802_11IBSS; -+ break; -+ case IW_MODE_INFRA: -+ ndis_mode = Ndis802_11Infrastructure; -+ break; -+ case IW_MODE_AUTO: -+ ndis_mode = Ndis802_11AutoUnknown; -+ break; -+ default: -+ EXIT2(return -EINVAL); -+ } -+ -+ if (set_infra_mode(wnd, ndis_mode)) -+ EXIT2(return -EINVAL); -+ -+ EXIT2(return 0); -+} -+ -+static int iw_get_infra_mode(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ struct ndis_device *wnd = netdev_priv(dev); -+ int ndis_mode, iw_mode; -+ NDIS_STATUS res; -+ -+ ENTER2(""); -+ res = mp_query_int(wnd, OID_802_11_INFRASTRUCTURE_MODE, &ndis_mode); -+ if (res) { -+ WARNING("getting operating mode failed (%08X)", res); -+ EXIT2(return -EOPNOTSUPP); -+ } -+ -+ switch (ndis_mode) { -+ case Ndis802_11IBSS: -+ iw_mode = IW_MODE_ADHOC; -+ break; -+ case Ndis802_11Infrastructure: -+ iw_mode = IW_MODE_INFRA; -+ break; -+ case Ndis802_11AutoUnknown: -+ iw_mode = IW_MODE_AUTO; -+ break; -+ default: -+ ERROR("invalid operating mode (%u)", ndis_mode); -+ EXIT2(return -EINVAL); -+ } -+ wrqu->mode = iw_mode; -+ EXIT2(return 0); -+} -+ -+static const char *network_type_to_name(int net_type) -+{ -+ if (net_type >= 0 && net_type < ARRAY_SIZE(network_names)) -+ return network_names[net_type]; -+ else -+ return network_names[ARRAY_SIZE(network_names) - 1]; -+} -+ -+static int iw_get_network_type(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ struct ndis_device *wnd = netdev_priv(dev); -+ unsigned int network_type; -+ NDIS_STATUS res; -+ -+ ENTER2(""); -+ res = mp_query_int(wnd, OID_802_11_NETWORK_TYPE_IN_USE, -+ &network_type); -+ if (res) { -+ WARNING("getting network type failed: %08X", res); -+ network_type = -1; -+ } -+ strncpy(wrqu->name, network_type_to_name(network_type), -+ sizeof(wrqu->name) - 1); -+ wrqu->name[sizeof(wrqu->name)-1] = 0; -+ return 0; -+} -+ -+static int iw_get_freq(struct net_device *dev, struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ struct ndis_device *wnd = netdev_priv(dev); -+ NDIS_STATUS res; -+ struct ndis_configuration req; -+ -+ ENTER2(""); -+ memset(&req, 0, sizeof(req)); -+ res = mp_query(wnd, OID_802_11_CONFIGURATION, &req, sizeof(req)); -+ if (res) { -+ WARNING("getting configuration failed (%08X)", res); -+ EXIT2(return -EOPNOTSUPP); -+ } -+ -+ memset(&(wrqu->freq), 0, sizeof(struct iw_freq)); -+ -+ /* see comment in wireless.h above the "struct iw_freq" -+ definition for an explanation of this if -+ NOTE: 1000000 is due to the kHz -+ */ -+ if (req.ds_config > 1000000) { -+ wrqu->freq.m = req.ds_config / 10; -+ wrqu->freq.e = 1; -+ } -+ else -+ wrqu->freq.m = req.ds_config; -+ -+ /* convert from kHz to Hz */ -+ wrqu->freq.e += 3; -+ -+ return 0; -+} -+ -+static int iw_set_freq(struct net_device *dev, struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ struct ndis_device *wnd = netdev_priv(dev); -+ NDIS_STATUS res; -+ struct ndis_configuration req; -+ -+ ENTER2(""); -+ /* this OID is valid only when not associated */ -+ if (netif_carrier_ok(wnd->net_dev)) -+ EXIT2(return 0); -+ memset(&req, 0, sizeof(req)); -+ res = mp_query(wnd, OID_802_11_CONFIGURATION, &req, sizeof(req)); -+ if (res) { -+ WARNING("getting configuration failed (%08X)", res); -+ EXIT2(return 0); -+ } -+ -+ if (wrqu->freq.m < 1000 && wrqu->freq.e == 0) { -+ if (wrqu->freq.m >= 1 && wrqu->freq.m <= ARRAY_SIZE(freq_chan)) -+ req.ds_config = freq_chan[wrqu->freq.m - 1] * 1000; -+ else -+ return -EINVAL; -+ } else { -+ int i; -+ req.ds_config = wrqu->freq.m; -+ for (i = wrqu->freq.e; i > 0; i--) -+ req.ds_config *= 10; -+ req.ds_config /= 1000; -+ } -+ res = mp_set(wnd, OID_802_11_CONFIGURATION, &req, sizeof(req)); -+ if (res) -+ WARNING("setting configuration failed (%08X)", res); -+ return 0; -+} -+ -+static int iw_get_tx_power(struct net_device *dev, struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ struct ndis_device *wnd = netdev_priv(dev); -+ ndis_tx_power_level ndis_power; -+ NDIS_STATUS res; -+ -+ ENTER2(""); -+ res = mp_query(wnd, OID_802_11_TX_POWER_LEVEL, -+ &ndis_power, sizeof(ndis_power)); -+ if (res) -+ return -EOPNOTSUPP; -+ wrqu->txpower.flags = IW_TXPOW_MWATT; -+ wrqu->txpower.disabled = 0; -+ wrqu->txpower.fixed = 0; -+ wrqu->txpower.value = ndis_power; -+ return 0; -+} -+ -+static int iw_set_tx_power(struct net_device *dev, struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ struct ndis_device *wnd = netdev_priv(dev); -+ ndis_tx_power_level ndis_power; -+ NDIS_STATUS res; -+ -+ ENTER2(""); -+ if (wrqu->txpower.disabled) -+ ndis_power = 0; -+ else { -+ if (wrqu->txpower.flags == IW_TXPOW_MWATT) -+ ndis_power = wrqu->txpower.value; -+ else { // wrqu->txpower.flags == IW_TXPOW_DBM -+ if (wrqu->txpower.value > 20) -+ ndis_power = 128; -+ else if (wrqu->txpower.value < -43) -+ ndis_power = 127; -+ else { -+ signed char tmp; -+ tmp = wrqu->txpower.value; -+ tmp = -12 - tmp; -+ tmp <<= 2; -+ ndis_power = (unsigned char)tmp; -+ } -+ } -+ } -+ TRACE2("%d", ndis_power); -+ res = mp_set(wnd, OID_802_11_TX_POWER_LEVEL, -+ &ndis_power, sizeof(ndis_power)); -+ if (res) -+ EXIT2(return -EOPNOTSUPP); -+ if (ndis_power == 0) -+ res = disassociate(wnd, 0); -+ EXIT2(return 0); -+} -+ -+static int iw_get_bitrate(struct net_device *dev, struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ struct ndis_device *wnd = netdev_priv(dev); -+ ULONG ndis_rate; -+ int res; -+ -+ ENTER2(""); -+ res = mp_query(wnd, OID_GEN_LINK_SPEED, &ndis_rate, sizeof(ndis_rate)); -+ if (res) { -+ WARNING("getting bitrate failed (%08X)", res); -+ ndis_rate = 0; -+ } -+ -+ wrqu->bitrate.value = ndis_rate * 100; -+ return 0; -+} -+ -+static int iw_set_bitrate(struct net_device *dev, struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ struct ndis_device *wnd = netdev_priv(dev); -+ int i, n; -+ NDIS_STATUS res; -+ UCHAR rates[NDIS_MAX_RATES_EX]; -+ -+ ENTER2(""); -+ if (wrqu->bitrate.fixed == 0) -+ EXIT2(return 0); -+ -+ res = mp_query_info(wnd, OID_802_11_SUPPORTED_RATES, &rates, -+ sizeof(rates), &n, NULL); -+ if (res) { -+ WARNING("getting bit rate failed (%08X)", res); -+ EXIT2(return 0); -+ } -+ for (i = 0; i < n; i++) { -+ if (rates[i] & 0x80) -+ continue; -+ if ((rates[i] & 0x7f) * 500000 > wrqu->bitrate.value) { -+ TRACE2("setting rate %d to 0", -+ (rates[i] & 0x7f) * 500000); -+ rates[i] = 0; -+ } -+ } -+ -+ res = mp_set(wnd, OID_802_11_DESIRED_RATES, &rates, n); -+ if (res) { -+ WARNING("setting bit rate failed (%08X)", res); -+ EXIT2(return 0); -+ } -+ -+ return 0; -+} -+ -+static int iw_set_dummy(struct net_device *dev, struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ /* Do nothing. Used for ioctls that are not implemented. */ -+ return 0; -+} -+ -+static int iw_get_rts_threshold(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ struct ndis_device *wnd = netdev_priv(dev); -+ ndis_rts_threshold threshold; -+ NDIS_STATUS res; -+ -+ ENTER2(""); -+ res = mp_query(wnd, OID_802_11_RTS_THRESHOLD, -+ &threshold, sizeof(threshold)); -+ if (res) -+ return -EOPNOTSUPP; -+ -+ wrqu->rts.value = threshold; -+ return 0; -+} -+ -+static int iw_set_rts_threshold(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ struct ndis_device *wnd = netdev_priv(dev); -+ ndis_rts_threshold threshold; -+ NDIS_STATUS res; -+ -+ ENTER2(""); -+ threshold = wrqu->rts.value; -+ res = mp_set(wnd, OID_802_11_RTS_THRESHOLD, -+ &threshold, sizeof(threshold)); -+ if (res == NDIS_STATUS_INVALID_DATA) -+ return -EINVAL; -+ if (res) -+ return -EOPNOTSUPP; -+ -+ return 0; -+} -+ -+static int iw_get_frag_threshold(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ struct ndis_device *wnd = netdev_priv(dev); -+ ndis_fragmentation_threshold frag_threshold; -+ NDIS_STATUS res; -+ -+ ENTER2(""); -+ res = mp_query(wnd, OID_802_11_FRAGMENTATION_THRESHOLD, -+ &frag_threshold, sizeof(frag_threshold)); -+ if (res) -+ return -ENOTSUPP; -+ -+ wrqu->frag.value = frag_threshold; -+ return 0; -+} -+ -+static int iw_set_frag_threshold(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ struct ndis_device *wnd = netdev_priv(dev); -+ ndis_rts_threshold threshold; -+ NDIS_STATUS res; -+ -+ ENTER2(""); -+ threshold = wrqu->frag.value; -+ res = mp_set(wnd, OID_802_11_FRAGMENTATION_THRESHOLD, -+ &threshold, sizeof(threshold)); -+ if (res == NDIS_STATUS_INVALID_DATA) -+ return -EINVAL; -+ if (res) -+ return -EOPNOTSUPP; -+ return 0; -+} -+ -+int get_ap_address(struct ndis_device *wnd, mac_address ap_addr) -+{ -+ NDIS_STATUS res; -+ -+ res = mp_query(wnd, OID_802_11_BSSID, ap_addr, ETH_ALEN); -+ TRACE2(MACSTRSEP, MAC2STR(ap_addr)); -+ if (res) { -+ TRACE2("res: %08X", res); -+ memset(ap_addr, 0x0, ETH_ALEN); -+ EXIT2(return -EOPNOTSUPP); -+ } -+ EXIT2(return 0); -+} -+ -+static int iw_get_ap_address(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ struct ndis_device *wnd = netdev_priv(dev); -+ mac_address ap_addr; -+ -+ ENTER2(""); -+ get_ap_address(wnd, ap_addr); -+ memcpy(wrqu->ap_addr.sa_data, ap_addr, ETH_ALEN); -+ wrqu->ap_addr.sa_family = ARPHRD_ETHER; -+ EXIT2(return 0); -+} -+ -+static int iw_set_ap_address(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ struct ndis_device *wnd = netdev_priv(dev); -+ NDIS_STATUS res; -+ mac_address ap_addr; -+ -+ ENTER2(""); -+ memcpy(ap_addr, wrqu->ap_addr.sa_data, ETH_ALEN); -+ TRACE2(MACSTRSEP, MAC2STR(ap_addr)); -+ res = mp_set(wnd, OID_802_11_BSSID, ap_addr, ETH_ALEN); -+ /* user apps may set ap's mac address, which is not required; -+ * they may fail to work if this function fails, so return -+ * success */ -+ if (res) -+ WARNING("setting AP mac address failed (%08X)", res); -+ -+ EXIT2(return 0); -+} -+ -+int set_ndis_auth_mode(struct ndis_device *wnd, ULONG auth_mode) -+{ -+ NDIS_STATUS res; -+ -+ ENTER2("%d", auth_mode); -+ res = mp_set_int(wnd, OID_802_11_AUTHENTICATION_MODE, auth_mode); -+ if (res) { -+ WARNING("setting auth mode to %u failed (%08X)", -+ auth_mode, res); -+ if (res == NDIS_STATUS_INVALID_DATA) -+ EXIT2(return -EINVAL); -+ return -EOPNOTSUPP; -+ } -+ switch (auth_mode) { -+ case Ndis802_11AuthModeWPA: -+ wnd->iw_auth_wpa_version = IW_AUTH_WPA_VERSION_WPA; -+ wnd->iw_auth_key_mgmt = IW_AUTH_KEY_MGMT_802_1X; -+ break; -+ case Ndis802_11AuthModeWPAPSK: -+ wnd->iw_auth_wpa_version = IW_AUTH_WPA_VERSION_WPA; -+ wnd->iw_auth_key_mgmt = IW_AUTH_KEY_MGMT_PSK; -+ break; -+ case Ndis802_11AuthModeWPANone: -+ wnd->iw_auth_wpa_version = IW_AUTH_WPA_VERSION_DISABLED; -+ wnd->iw_auth_key_mgmt = IW_AUTH_KEY_MGMT_PSK; -+ break; -+ case Ndis802_11AuthModeWPA2: -+ wnd->iw_auth_wpa_version = IW_AUTH_WPA_VERSION_WPA2; -+ wnd->iw_auth_key_mgmt = IW_AUTH_KEY_MGMT_802_1X; -+ break; -+ case Ndis802_11AuthModeWPA2PSK: -+ wnd->iw_auth_wpa_version = IW_AUTH_WPA_VERSION_WPA2; -+ wnd->iw_auth_key_mgmt = IW_AUTH_KEY_MGMT_PSK; -+ break; -+ case Ndis802_11AuthModeOpen: -+ wnd->iw_auth_wpa_version = IW_AUTH_WPA_VERSION_DISABLED; -+ wnd->iw_auth_80211_alg = IW_AUTH_ALG_OPEN_SYSTEM; -+ break; -+ case Ndis802_11AuthModeShared: -+ wnd->iw_auth_wpa_version = IW_AUTH_WPA_VERSION_DISABLED; -+ wnd->iw_auth_80211_alg = IW_AUTH_ALG_SHARED_KEY; -+ break; -+ case Ndis802_11AuthModeAutoSwitch: -+ wnd->iw_auth_wpa_version = IW_AUTH_WPA_VERSION_DISABLED; -+ wnd->iw_auth_80211_alg = IW_AUTH_ALG_SHARED_KEY; -+ wnd->iw_auth_80211_alg |= IW_AUTH_ALG_OPEN_SYSTEM; -+ break; -+ default: -+ WARNING("invalid authentication algorithm: %d", auth_mode); -+ break; -+ } -+ EXIT2(return 0); -+} -+ -+int get_ndis_auth_mode(struct ndis_device *wnd) -+{ -+ ULONG mode; -+ NDIS_STATUS res; -+ -+ res = mp_query_int(wnd, OID_802_11_AUTHENTICATION_MODE, &mode); -+ if (res) { -+ WARNING("getting authentication mode failed (%08X)", res); -+ EXIT2(return -EOPNOTSUPP); -+ } -+ TRACE2("%d", mode); -+ return mode; -+} -+ -+int set_iw_encr_mode(struct ndis_device *wnd, int cipher_pairwise, -+ int cipher_groupwise) -+{ -+ NDIS_STATUS res; -+ ULONG ndis_mode; -+ -+ ENTER2("%d, %d", cipher_pairwise, cipher_groupwise); -+ if (cipher_pairwise & IW_AUTH_CIPHER_CCMP) -+ ndis_mode = Ndis802_11Encryption3Enabled; -+ else if (cipher_pairwise & IW_AUTH_CIPHER_TKIP) -+ ndis_mode = Ndis802_11Encryption2Enabled; -+ else if (cipher_pairwise & -+ (IW_AUTH_CIPHER_WEP40 | IW_AUTH_CIPHER_WEP104)) -+ ndis_mode = Ndis802_11Encryption1Enabled; -+ else if (cipher_groupwise & IW_AUTH_CIPHER_CCMP) -+ ndis_mode = Ndis802_11Encryption3Enabled; -+ else if (cipher_groupwise & IW_AUTH_CIPHER_TKIP) -+ ndis_mode = Ndis802_11Encryption2Enabled; -+ else -+ ndis_mode = Ndis802_11EncryptionDisabled; -+ -+ res = mp_set_int(wnd, OID_802_11_ENCRYPTION_STATUS, ndis_mode); -+ if (res) { -+ WARNING("setting encryption mode to %u failed (%08X)", -+ ndis_mode, res); -+ if (res == NDIS_STATUS_INVALID_DATA) -+ EXIT2(return -EINVAL); -+ return -EOPNOTSUPP; -+ } -+ wnd->iw_auth_cipher_pairwise = cipher_pairwise; -+ wnd->iw_auth_cipher_group = cipher_groupwise; -+ EXIT2(return 0); -+} -+ -+int get_ndis_encr_mode(struct ndis_device *wnd) -+{ -+ ULONG mode; -+ NDIS_STATUS res; -+ -+ ENTER2(""); -+ res = mp_query_int(wnd, OID_802_11_ENCRYPTION_STATUS, &mode); -+ if (res) { -+ WARNING("getting encryption status failed (%08X)", res); -+ EXIT2(return -EOPNOTSUPP); -+ } else -+ EXIT2(return mode); -+} -+ -+static int iw_get_encr(struct net_device *dev, struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ struct ndis_device *wnd = netdev_priv(dev); -+ int index, mode; -+ struct encr_info *encr_info = &wnd->encr_info; -+ -+ ENTER2("wnd = %p", wnd); -+ wrqu->data.length = 0; -+ extra[0] = 0; -+ -+ index = (wrqu->encoding.flags & IW_ENCODE_INDEX); -+ TRACE2("index = %u", index); -+ if (index > 0) -+ index--; -+ else -+ index = encr_info->tx_key_index; -+ -+ if (index < 0 || index >= MAX_ENCR_KEYS) { -+ WARNING("encryption index out of range (%u)", index); -+ EXIT2(return -EINVAL); -+ } -+ -+ if (index != encr_info->tx_key_index) { -+ if (encr_info->keys[index].length > 0) { -+ wrqu->data.flags |= IW_ENCODE_ENABLED; -+ wrqu->data.length = encr_info->keys[index].length; -+ memcpy(extra, encr_info->keys[index].key, -+ encr_info->keys[index].length); -+ } -+ else -+ wrqu->data.flags |= IW_ENCODE_DISABLED; -+ -+ EXIT2(return 0); -+ } -+ -+ /* transmit key */ -+ mode = get_ndis_encr_mode(wnd); -+ if (mode < 0) -+ EXIT2(return -EOPNOTSUPP); -+ -+ if (mode == Ndis802_11EncryptionDisabled || -+ mode == Ndis802_11EncryptionNotSupported) -+ wrqu->data.flags |= IW_ENCODE_DISABLED; -+ else { -+ if (mode == Ndis802_11Encryption1KeyAbsent || -+ mode == Ndis802_11Encryption2KeyAbsent || -+ mode == Ndis802_11Encryption3KeyAbsent) -+ wrqu->data.flags |= IW_ENCODE_NOKEY; -+ else { -+ wrqu->data.flags |= IW_ENCODE_ENABLED; -+ wrqu->encoding.flags |= index+1; -+ wrqu->data.length = encr_info->keys[index].length; -+ memcpy(extra, encr_info->keys[index].key, -+ encr_info->keys[index].length); -+ } -+ } -+ mode = get_ndis_auth_mode(wnd); -+ if (mode < 0) -+ EXIT2(return -EOPNOTSUPP); -+ -+ if (mode == Ndis802_11AuthModeOpen) -+ wrqu->data.flags |= IW_ENCODE_OPEN; -+ else if (mode == Ndis802_11AuthModeAutoSwitch) -+ wrqu->data.flags |= IW_ENCODE_RESTRICTED; -+ else // Ndis802_11AuthModeAutoSwitch, Ndis802_11AuthModeWPA etc. -+ wrqu->data.flags |= IW_ENCODE_RESTRICTED; -+ -+ EXIT2(return 0); -+} -+ -+/* remove_key is for both wep and wpa */ -+static int remove_key(struct ndis_device *wnd, int index, -+ mac_address bssid) -+{ -+ NDIS_STATUS res; -+ if (wnd->encr_info.keys[index].length == 0) -+ EXIT2(return 0); -+ wnd->encr_info.keys[index].length = 0; -+ memset(&wnd->encr_info.keys[index].key, 0, -+ sizeof(wnd->encr_info.keys[index].length)); -+ if (wnd->iw_auth_cipher_pairwise == IW_AUTH_CIPHER_TKIP || -+ wnd->iw_auth_cipher_pairwise == IW_AUTH_CIPHER_CCMP || -+ wnd->iw_auth_cipher_group == IW_AUTH_CIPHER_TKIP || -+ wnd->iw_auth_cipher_group == IW_AUTH_CIPHER_CCMP) { -+ struct ndis_remove_key rmkey; -+ rmkey.struct_size = sizeof(rmkey); -+ rmkey.index = index; -+ if (bssid) { -+ /* pairwise key */ -+ if (memcmp(bssid, "\xff\xff\xff\xff\xff\xff", -+ ETH_ALEN) != 0) -+ rmkey.index |= (1 << 30); -+ memcpy(rmkey.bssid, bssid, sizeof(rmkey.bssid)); -+ } else -+ memset(rmkey.bssid, 0xff, sizeof(rmkey.bssid)); -+ if (mp_set(wnd, OID_802_11_REMOVE_KEY, &rmkey, sizeof(rmkey))) -+ EXIT2(return -EINVAL); -+ } else { -+ ndis_key_index keyindex = index; -+ res = mp_set_int(wnd, OID_802_11_REMOVE_WEP, keyindex); -+ if (res) { -+ WARNING("removing encryption key %d failed (%08X)", -+ keyindex, res); -+ EXIT2(return -EINVAL); -+ } -+ } -+ /* if it is transmit key, disable encryption */ -+ if (index == wnd->encr_info.tx_key_index) { -+ res = set_iw_encr_mode(wnd, IW_AUTH_CIPHER_NONE, -+ IW_AUTH_CIPHER_NONE); -+ if (res) -+ WARNING("changing encr status failed (%08X)", res); -+ } -+ TRACE2("key %d removed", index); -+ EXIT2(return 0); -+} -+ -+static int iw_set_wep(struct net_device *dev, struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ struct ndis_device *wnd = netdev_priv(dev); -+ NDIS_STATUS res; -+ unsigned int index, key_len; -+ struct encr_info *encr_info = &wnd->encr_info; -+ unsigned char *key; -+ -+ ENTER2(""); -+ index = (wrqu->encoding.flags & IW_ENCODE_INDEX); -+ TRACE2("index = %u", index); -+ -+ /* iwconfig gives index as 1 - N */ -+ if (index > 0) -+ index--; -+ else -+ index = encr_info->tx_key_index; -+ -+ if (index >= MAX_ENCR_KEYS) { -+ WARNING("encryption index out of range (%u)", index); -+ EXIT2(return -EINVAL); -+ } -+ -+ /* remove key if disabled */ -+ if (wrqu->data.flags & IW_ENCODE_DISABLED) { -+ if (remove_key(wnd, index, NULL)) -+ EXIT2(return -EINVAL); -+ else -+ EXIT2(return 0); -+ } -+ -+ /* global encryption state (for all keys) */ -+ if (wrqu->data.flags & IW_ENCODE_OPEN) -+ res = set_ndis_auth_mode(wnd, Ndis802_11AuthModeOpen); -+ else // if (wrqu->data.flags & IW_ENCODE_RESTRICTED) -+ res = set_ndis_auth_mode(wnd, Ndis802_11AuthModeShared); -+ if (res) { -+ WARNING("setting authentication mode failed (%08X)", res); -+ EXIT2(return -EINVAL); -+ } -+ -+ TRACE2("key length: %d", wrqu->data.length); -+ -+ if (wrqu->data.length > 0) { -+ key_len = wrqu->data.length; -+ key = extra; -+ } else { // must be set as tx key -+ if (encr_info->keys[index].length == 0) { -+ WARNING("key %d is not set", index+1); -+ EXIT2(return -EINVAL); -+ } -+ key_len = encr_info->keys[index].length; -+ key = encr_info->keys[index].key; -+ encr_info->tx_key_index = index; -+ } -+ -+ if (add_wep_key(wnd, key, key_len, index)) -+ EXIT2(return -EINVAL); -+ -+ if (index == encr_info->tx_key_index) { -+ /* if transmit key is at index other than 0, some -+ * drivers, at least Atheros and TI, want another -+ * (global) non-transmit key to be set; don't know why */ -+ if (index != 0) { -+ int i; -+ for (i = 0; i < MAX_ENCR_KEYS; i++) -+ if (i != index && -+ encr_info->keys[i].length != 0) -+ break; -+ if (i == MAX_ENCR_KEYS) { -+ if (index == 0) -+ i = index + 1; -+ else -+ i = index - 1; -+ if (add_wep_key(wnd, key, key_len, i)) -+ WARNING("couldn't add broadcast key" -+ " at %d", i); -+ } -+ } -+ /* ndis drivers want essid to be set after setting encr */ -+ set_essid(wnd, wnd->essid.essid, wnd->essid.length); -+ } -+ EXIT2(return 0); -+} -+ -+static int iw_set_nick(struct net_device *dev, struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ struct ndis_device *wnd = netdev_priv(dev); -+ -+ if (wrqu->data.length >= sizeof(wnd->nick)) -+ return -EINVAL; -+ memcpy(wnd->nick, extra, wrqu->data.length); -+ wnd->nick[wrqu->data.length] = 0; -+ return 0; -+} -+ -+static int iw_get_nick(struct net_device *dev, struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ struct ndis_device *wnd = netdev_priv(dev); -+ -+ wrqu->data.length = strlen(wnd->nick); -+ memcpy(extra, wnd->nick, wrqu->data.length); -+ return 0; -+} -+ -+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 27) && !defined(IW_REQUEST_FLAG_COMPAT) -+#define iwe_stream_add_event(a, b, c, d, e) iwe_stream_add_event(b, c, d, e) -+#define iwe_stream_add_point(a, b, c, d, e) iwe_stream_add_point(b, c, d, e) -+#define iwe_stream_add_value(a, b, c, d, e, f) \ -+ iwe_stream_add_value(b, c, d, e, f) -+#define iwe_stream_lcp_len(a) IW_EV_LCP_LEN -+#endif -+ -+static char *ndis_translate_scan(struct net_device *dev, -+ struct iw_request_info *info, char *event, -+ char *end_buf, void *item) -+{ -+ struct iw_event iwe; -+ char *current_val; -+ char *ret; -+ int i, nrates; -+ unsigned char custom_str[64]; -+ struct ndis_wlan_bssid *bssid; -+ struct ndis_wlan_bssid_ex *bssid_ex; -+ int extended; -+ -+ ENTER2("%p, %p", event, item); -+ bssid = item; -+ bssid_ex = item; -+ extended = (bssid->length > offsetof(struct ndis_wlan_bssid_ex, var)); -+ -+ /* add mac address */ -+ memset(&iwe, 0, sizeof(iwe)); -+ iwe.cmd = SIOCGIWAP; -+ iwe.u.ap_addr.sa_family = ARPHRD_ETHER; -+ iwe.len = IW_EV_ADDR_LEN; -+ memcpy(iwe.u.ap_addr.sa_data, bssid->mac, ETH_ALEN); -+ ret = iwe_stream_add_event(info, event, end_buf, &iwe, IW_EV_ADDR_LEN); -+ if (ret == event) -+ return NULL; -+ event = ret; -+ -+ /* add essid */ -+ memset(&iwe, 0, sizeof(iwe)); -+ iwe.cmd = SIOCGIWESSID; -+ iwe.u.data.length = bssid->ssid.length; -+ if (iwe.u.data.length > IW_ESSID_MAX_SIZE) -+ iwe.u.data.length = IW_ESSID_MAX_SIZE; -+ iwe.u.data.flags = 1; -+ iwe.len = IW_EV_POINT_LEN + iwe.u.data.length; -+ ret = iwe_stream_add_point(info, event, end_buf, &iwe, -+ bssid->ssid.essid); -+ if (ret == event) -+ return NULL; -+ event = ret; -+ -+ /* add protocol name */ -+ memset(&iwe, 0, sizeof(iwe)); -+ iwe.cmd = SIOCGIWNAME; -+ strncpy(iwe.u.name, network_type_to_name(bssid->net_type), IFNAMSIZ - 1); -+ ret = iwe_stream_add_event(info, event, end_buf, &iwe, IW_EV_CHAR_LEN); -+ if (ret == event) -+ return NULL; -+ event = ret; -+ -+ /* add mode */ -+ memset(&iwe, 0, sizeof(iwe)); -+ iwe.cmd = SIOCGIWMODE; -+ if (bssid->mode == Ndis802_11IBSS) -+ iwe.u.mode = IW_MODE_ADHOC; -+ else if (bssid->mode == Ndis802_11Infrastructure) -+ iwe.u.mode = IW_MODE_MASTER; -+ else // if (bssid->mode == Ndis802_11AutoUnknown) -+ iwe.u.mode = IW_MODE_AUTO; -+ ret = iwe_stream_add_event(info, event, end_buf, &iwe, IW_EV_UINT_LEN); -+ if (ret == event) -+ return NULL; -+ event = ret; -+ -+ /* add freq */ -+ memset(&iwe, 0, sizeof(iwe)); -+ iwe.cmd = SIOCGIWFREQ; -+ iwe.u.freq.m = bssid->config.ds_config; -+ if (bssid->config.ds_config > 1000000) { -+ iwe.u.freq.m = bssid->config.ds_config / 10; -+ iwe.u.freq.e = 1; -+ } -+ else -+ iwe.u.freq.m = bssid->config.ds_config; -+ /* convert from kHz to Hz */ -+ iwe.u.freq.e += 3; -+ iwe.len = IW_EV_FREQ_LEN; -+ ret = iwe_stream_add_event(info, event, end_buf, &iwe, IW_EV_FREQ_LEN); -+ if (ret == event) -+ return NULL; -+ event = ret; -+ -+ /* add qual */ -+ memset(&iwe, 0, sizeof(iwe)); -+ iwe.cmd = IWEVQUAL; -+ i = 100 * (bssid->rssi - WL_NOISE) / (WL_SIGMAX - WL_NOISE); -+ if (i < 0) -+ i = 0; -+ else if (i > 100) -+ i = 100; -+ iwe.u.qual.level = bssid->rssi; -+ iwe.u.qual.noise = WL_NOISE; -+ iwe.u.qual.qual = i; -+ iwe.len = IW_EV_QUAL_LEN; -+ ret = iwe_stream_add_event(info, event, end_buf, &iwe, IW_EV_QUAL_LEN); -+ if (ret == event) -+ return NULL; -+ event = ret; -+ -+ /* add key info */ -+ memset(&iwe, 0, sizeof(iwe)); -+ iwe.cmd = SIOCGIWENCODE; -+ if (bssid->privacy == Ndis802_11PrivFilterAcceptAll) -+ iwe.u.data.flags = IW_ENCODE_DISABLED; -+ else -+ iwe.u.data.flags = IW_ENCODE_ENABLED | IW_ENCODE_NOKEY; -+ iwe.u.data.length = 0; -+ iwe.len = IW_EV_POINT_LEN; -+ ret = iwe_stream_add_point(info, event, end_buf, &iwe, -+ bssid->ssid.essid); -+ if (ret == event) -+ return NULL; -+ event = ret; -+ -+ /* add rate */ -+ memset(&iwe, 0, sizeof(iwe)); -+ current_val = event + iwe_stream_lcp_len(info); -+ iwe.cmd = SIOCGIWRATE; -+ if (extended) -+ nrates = ARRAY_SIZE(bssid->rates); -+ else -+ nrates = ARRAY_SIZE(bssid_ex->rates_ex); -+ for (i = 0; i < nrates; i++) { -+ if (bssid_ex->rates_ex[i] & 0x7f) { -+ iwe.u.bitrate.value = ((bssid->rates[i] & 0x7f) * -+ 500000); -+ ret = iwe_stream_add_value(info, event, current_val, -+ end_buf, &iwe, -+ IW_EV_PARAM_LEN); -+ if (ret == current_val) -+ return NULL; -+ current_val = ret; -+ } -+ } -+ -+ if ((current_val - event) > iwe_stream_lcp_len(info)) -+ event = current_val; -+ -+ memset(&iwe, 0, sizeof(iwe)); -+ iwe.cmd = IWEVCUSTOM; -+ sprintf(custom_str, "bcn_int=%d", bssid->config.beacon_period); -+ iwe.u.data.length = strlen(custom_str); -+ ret = iwe_stream_add_point(info, event, end_buf, &iwe, custom_str); -+ if (ret == event) -+ return NULL; -+ event = ret; -+ -+ memset(&iwe, 0, sizeof(iwe)); -+ iwe.cmd = IWEVCUSTOM; -+ sprintf(custom_str, "atim=%u", bssid->config.atim_window); -+ iwe.u.data.length = strlen(custom_str); -+ ret = iwe_stream_add_point(info, event, end_buf, &iwe, custom_str); -+ if (ret == event) -+ return NULL; -+ event = ret; -+ -+ TRACE2("%d, %zu", bssid->length, sizeof(*bssid)); -+ if (extended) { -+ struct ndis_variable_ies *iep = bssid_ex->var; -+ unsigned char *end = (unsigned char *)&bssid_ex->fixed + -+ bssid_ex->ie_length; -+ -+ while (&iep->length < end && &iep->data[iep->length] <= end) { -+ unsigned char ielen = iep->length + 2; -+ -+ memset(&iwe, 0, sizeof(iwe)); -+ iwe.cmd = IWEVGENIE; -+ iwe.u.data.length = ielen; -+ ret = iwe_stream_add_point(info, event, end_buf, &iwe, -+ (char *)iep); -+ if (ret == event) -+ return NULL; -+ event = ret; -+ iep = (typeof(iep))&iep->data[iep->length]; -+ } -+ } -+ TRACE2("event = %p, current_val = %p", event, current_val); -+ EXIT2(return event); -+} -+ -+static int set_scan(struct ndis_device *wnd) -+{ -+ NDIS_STATUS res; -+ -+ ENTER2(""); -+ res = mp_set(wnd, OID_802_11_BSSID_LIST_SCAN, NULL, 0); -+ if (res) { -+ WARNING("scanning failed (%08X)", res); -+ EXIT2(return -EOPNOTSUPP); -+ } -+ wnd->scan_timestamp = jiffies; -+ EXIT2(return 0); -+} -+ -+static int iw_set_scan(struct net_device *dev, struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ struct ndis_device *wnd = netdev_priv(dev); -+ return set_scan(wnd); -+} -+ -+static int iw_get_scan(struct net_device *dev, struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ struct ndis_device *wnd = netdev_priv(dev); -+ unsigned int i, buf_len, needed, data_len; -+ NDIS_STATUS res; -+ struct ndis_bssid_list *bssid_list = NULL; -+ char *event = extra; -+ struct ndis_wlan_bssid *cur_item; -+ -+ ENTER2(""); -+ if (time_before(jiffies, wnd->scan_timestamp + 3 * HZ)) -+ return -EAGAIN; -+ /* try with space for a few scan items */ -+ buf_len = sizeof(ULONG) + offsetof(struct ndis_wlan_bssid_ex, var) * 8; -+ -+ /* Try many times, as the needed space may grow between queries */ -+ for (i = 0; i < 10; i++) { -+ bssid_list = kzalloc(buf_len, GFP_KERNEL); -+ if (!bssid_list) { -+ ERROR("couldn't allocate %u bytes for scan results", -+ buf_len); -+ return -ENOMEM; -+ } -+ -+ needed = 0; -+ data_len = 0; -+ res = mp_query_info(wnd, OID_802_11_BSSID_LIST, bssid_list, -+ buf_len, &data_len, &needed); -+ TRACE2("try %d: given %d bytes, needed %d, written %d", -+ i, buf_len, needed, data_len); -+ if (needed <= buf_len) -+ break; -+ kfree(bssid_list); -+ buf_len = needed; -+ } -+ if (res) { -+ WARNING("getting BSSID list failed (%08X)", res); -+ kfree(bssid_list); -+ EXIT2(return -EOPNOTSUPP); -+ } -+ -+ /* some drivers don't set bssid_list->num_items to 0 if -+ OID_802_11_BSSID_LIST returns no items (prism54 driver, e.g.,) */ -+ TRACE2("items: %d", bssid_list->num_items); -+ cur_item = &bssid_list->bssid[0]; -+ for (i = 0; i < bssid_list->num_items; i++) { -+ TRACE2("item %d: len %d, remaining data %d", -+ i, cur_item->length, data_len); -+ /* drop truncated items */ -+ if (cur_item->length > data_len) -+ break; -+ event = ndis_translate_scan(dev, info, event, -+ extra + wrqu->data.length, -+ cur_item); -+ if (!event) { -+ kfree(bssid_list); -+ return -E2BIG; -+ } -+ data_len -= cur_item->length; -+ cur_item = (struct ndis_wlan_bssid *)((char *)cur_item + -+ cur_item->length); -+ } -+ wrqu->data.length = event - extra; -+ wrqu->data.flags = 0; -+ kfree(bssid_list); -+ EXIT2(return 0); -+} -+ -+static int iw_set_power_mode(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ struct ndis_device *wnd = netdev_priv(dev); -+ NDIS_STATUS res; -+ enum ndis_power power_mode; -+ -+ if (wrqu->power.disabled == 1) -+ power_mode = NDIS_POWER_OFF; -+ else if (wrqu->power.flags & IW_POWER_MIN) -+ power_mode = NDIS_POWER_MIN; -+ else // if (wrqu->power.flags & IW_POWER_MAX) -+ power_mode = NDIS_POWER_MAX; -+ -+ TRACE2("%d", power_mode); -+ res = mp_set(wnd, OID_802_11_POWER_MODE, -+ &power_mode, sizeof(power_mode)); -+ if (res) -+ WARNING("setting power mode failed (%08X)", res); -+ return 0; -+} -+ -+static int iw_get_power_mode(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ struct ndis_device *wnd = netdev_priv(dev); -+ NDIS_STATUS res; -+ enum ndis_power power_mode; -+ -+ ENTER2(""); -+ res = mp_query(wnd, OID_802_11_POWER_MODE, -+ &power_mode, sizeof(power_mode)); -+ if (res) -+ return -ENOTSUPP; -+ -+ if (power_mode == NDIS_POWER_OFF) -+ wrqu->power.disabled = 1; -+ else { -+ if (wrqu->power.flags != 0) -+ return 0; -+ wrqu->power.flags |= IW_POWER_ALL_R; -+ wrqu->power.flags |= IW_POWER_TIMEOUT; -+ wrqu->power.value = 0; -+ wrqu->power.disabled = 0; -+ -+ if (power_mode == NDIS_POWER_MIN) -+ wrqu->power.flags |= IW_POWER_MIN; -+ else // if (power_mode == NDIS_POWER_MAX) -+ wrqu->power.flags |= IW_POWER_MAX; -+ } -+ return 0; -+} -+ -+static int iw_get_sensitivity(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ struct ndis_device *wnd = netdev_priv(dev); -+ NDIS_STATUS res; -+ ndis_rssi rssi_trigger; -+ -+ ENTER2(""); -+ res = mp_query(wnd, OID_802_11_RSSI_TRIGGER, -+ &rssi_trigger, sizeof(rssi_trigger)); -+ if (res) -+ return -EOPNOTSUPP; -+ wrqu->param.value = rssi_trigger; -+ wrqu->param.disabled = (rssi_trigger == 0); -+ wrqu->param.fixed = 1; -+ return 0; -+} -+ -+static int iw_set_sensitivity(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ struct ndis_device *wnd = netdev_priv(dev); -+ NDIS_STATUS res; -+ ndis_rssi rssi_trigger; -+ -+ ENTER2(""); -+ if (wrqu->param.disabled) -+ rssi_trigger = 0; -+ else -+ rssi_trigger = wrqu->param.value; -+ res = mp_set(wnd, OID_802_11_RSSI_TRIGGER, -+ &rssi_trigger, sizeof(rssi_trigger)); -+ if (res == NDIS_STATUS_INVALID_DATA) -+ return -EINVAL; -+ if (res) -+ return -EOPNOTSUPP; -+ return 0; -+} -+ -+static int iw_get_ndis_stats(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ struct ndis_device *wnd = netdev_priv(dev); -+ struct iw_statistics *stats = &wnd->iw_stats; -+ memcpy(&wrqu->qual, &stats->qual, sizeof(stats->qual)); -+ return 0; -+} -+ -+static int iw_get_range(struct net_device *dev, struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ struct iw_range *range = (struct iw_range *)extra; -+ struct iw_point *data = &wrqu->data; -+ struct ndis_device *wnd = netdev_priv(dev); -+ unsigned int i, n; -+ NDIS_STATUS res; -+ UCHAR rates[NDIS_MAX_RATES_EX]; -+ ndis_tx_power_level tx_power; -+ -+ ENTER2(""); -+ data->length = sizeof(struct iw_range); -+ memset(range, 0, sizeof(struct iw_range)); -+ -+ range->txpower_capa = IW_TXPOW_MWATT; -+ range->num_txpower = 0; -+ -+ res = mp_query(wnd, OID_802_11_TX_POWER_LEVEL, -+ &tx_power, sizeof(tx_power)); -+ if (!res) { -+ range->num_txpower = 1; -+ range->txpower[0] = tx_power; -+ } -+ -+ range->we_version_compiled = WIRELESS_EXT; -+ range->we_version_source = 19; -+ -+ range->retry_capa = IW_RETRY_LIMIT; -+ range->retry_flags = IW_RETRY_LIMIT; -+ range->min_retry = 0; -+ range->max_retry = 255; -+ -+ range->num_channels = 1; -+ -+ range->max_qual.qual = 100; -+ range->max_qual.level = 154; -+ range->max_qual.noise = 154; -+ range->sensitivity = 3; -+ -+ range->max_encoding_tokens = 4; -+ range->num_encoding_sizes = 2; -+ range->encoding_size[0] = 5; -+ range->encoding_size[1] = 13; -+ -+ range->num_bitrates = 0; -+ memset(&rates, 0, sizeof(rates)); -+ res = mp_query_info(wnd, OID_802_11_SUPPORTED_RATES, -+ &rates, sizeof(rates), &n, NULL); -+ if (res) -+ WARNING("getting bit rates failed: %08X", res); -+ else { -+ for (i = 0; i < n && range->num_bitrates < IW_MAX_BITRATES; i++) -+ if (rates[i] & 0x80) -+ continue; -+ else if (rates[i] & 0x7f) { -+ range->bitrate[range->num_bitrates] = -+ (rates[i] & 0x7f) * 500000; -+ range->num_bitrates++; -+ } -+ } -+ -+ range->num_channels = ARRAY_SIZE(freq_chan); -+ -+ for (i = 0; i < ARRAY_SIZE(freq_chan) && i < IW_MAX_FREQUENCIES; i++) { -+ range->freq[i].i = i + 1; -+ range->freq[i].m = freq_chan[i] * 100000; -+ range->freq[i].e = 1; -+ } -+ range->num_frequency = i; -+ -+ range->min_rts = 0; -+ range->max_rts = 2347; -+ range->min_frag = 256; -+ range->max_frag = 2346; -+ -+ /* Event capability (kernel + driver) */ -+ range->event_capa[0] = (IW_EVENT_CAPA_K_0 | -+ IW_EVENT_CAPA_MASK(SIOCGIWTHRSPY) | -+ IW_EVENT_CAPA_MASK(SIOCGIWAP) | -+ IW_EVENT_CAPA_MASK(SIOCGIWSCAN)); -+ range->event_capa[1] = IW_EVENT_CAPA_K_1; -+ range->event_capa[4] = (IW_EVENT_CAPA_MASK(IWEVTXDROP) | -+ IW_EVENT_CAPA_MASK(IWEVCUSTOM) | -+ IW_EVENT_CAPA_MASK(IWEVREGISTERED) | -+ IW_EVENT_CAPA_MASK(IWEVEXPIRED)); -+ -+ range->enc_capa = 0; -+ -+ if (test_bit(Ndis802_11Encryption2Enabled, &wnd->capa.encr)) -+ range->enc_capa |= IW_ENC_CAPA_CIPHER_TKIP; -+ if (test_bit(Ndis802_11Encryption3Enabled, &wnd->capa.encr)) -+ range->enc_capa |= IW_ENC_CAPA_CIPHER_CCMP; -+ -+ if (test_bit(Ndis802_11AuthModeWPA, &wnd->capa.auth) || -+ test_bit(Ndis802_11AuthModeWPAPSK, &wnd->capa.auth)) -+ range->enc_capa |= IW_ENC_CAPA_WPA; -+ if (test_bit(Ndis802_11AuthModeWPA2, &wnd->capa.auth) || -+ test_bit(Ndis802_11AuthModeWPA2PSK, &wnd->capa.auth)) -+ range->enc_capa |= IW_ENC_CAPA_WPA2; -+ -+ return 0; -+} -+ -+void set_default_iw_params(struct ndis_device *wnd) -+{ -+ wnd->iw_auth_key_mgmt = 0; -+ wnd->iw_auth_wpa_version = 0; -+ set_infra_mode(wnd, Ndis802_11Infrastructure); -+ set_ndis_auth_mode(wnd, Ndis802_11AuthModeOpen); -+ set_priv_filter(wnd); -+ set_iw_encr_mode(wnd, IW_AUTH_CIPHER_NONE, IW_AUTH_CIPHER_NONE); -+} -+ -+static int deauthenticate(struct ndis_device *wnd) -+{ -+ int ret; -+ -+ ENTER2(""); -+ ret = disassociate(wnd, 1); -+ set_default_iw_params(wnd); -+ EXIT2(return ret); -+} -+ -+NDIS_STATUS disassociate(struct ndis_device *wnd, int reset_ssid) -+{ -+ NDIS_STATUS res; -+ u8 buf[NDIS_ESSID_MAX_SIZE]; -+ int i; -+ -+ TRACE2(""); -+ res = mp_set(wnd, OID_802_11_DISASSOCIATE, NULL, 0); -+ /* disassociate causes radio to be turned off; if reset_ssid -+ * is given, set ssid to random to enable radio */ -+ if (reset_ssid) { -+ get_random_bytes(buf, sizeof(buf)); -+ for (i = 0; i < sizeof(buf); i++) -+ buf[i] = 'a' + (buf[i] % 26); -+ set_essid(wnd, buf, sizeof(buf)); -+ } -+ return res; -+} -+ -+static int iw_set_mlme(struct net_device *dev, struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ struct ndis_device *wnd = netdev_priv(dev); -+ struct iw_mlme *mlme = (struct iw_mlme *)extra; -+ -+ ENTER2(""); -+ switch (mlme->cmd) { -+ case IW_MLME_DEAUTH: -+ return deauthenticate(wnd); -+ case IW_MLME_DISASSOC: -+ TRACE2("cmd=%d reason_code=%d", mlme->cmd, mlme->reason_code); -+ return disassociate(wnd, 1); -+ default: -+ return -EOPNOTSUPP; -+ } -+ -+ return 0; -+} -+ -+static int iw_set_genie(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ /* -+ * NDIS drivers do not allow IEs to be configured; this is -+ * done by the driver based on other configuration. Return 0 -+ * to avoid causing issues with user space programs that -+ * expect this function to succeed. -+ */ -+ return 0; -+} -+ -+static int iw_set_auth(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ struct ndis_device *wnd = netdev_priv(dev); -+ TRACE2("index=%d value=%d", wrqu->param.flags & IW_AUTH_INDEX, -+ wrqu->param.value); -+ switch (wrqu->param.flags & IW_AUTH_INDEX) { -+ case IW_AUTH_WPA_VERSION: -+ wnd->iw_auth_wpa_version = wrqu->param.value; -+ break; -+ case IW_AUTH_CIPHER_PAIRWISE: -+ wnd->iw_auth_cipher_pairwise = wrqu->param.value; -+ break; -+ case IW_AUTH_CIPHER_GROUP: -+ wnd->iw_auth_cipher_group = wrqu->param.value; -+ break; -+ case IW_AUTH_KEY_MGMT: -+ wnd->iw_auth_key_mgmt = wrqu->param.value; -+ break; -+ case IW_AUTH_80211_AUTH_ALG: -+ wnd->iw_auth_80211_alg = wrqu->param.value; -+ break; -+ case IW_AUTH_WPA_ENABLED: -+ if (wrqu->param.value) -+ deauthenticate(wnd); -+ break; -+#ifdef IW_AUTH_MFP -+ case IW_AUTH_MFP: -+ if (wrqu->param.value == IW_AUTH_MFP_DISABLED || -+ wrqu->param.value == IW_AUTH_MFP_OPTIONAL) -+ break; -+ WARNING("MFP not implemented"); -+ return -EOPNOTSUPP; -+#endif -+ case IW_AUTH_TKIP_COUNTERMEASURES: -+ case IW_AUTH_DROP_UNENCRYPTED: -+ case IW_AUTH_RX_UNENCRYPTED_EAPOL: -+ case IW_AUTH_PRIVACY_INVOKED: -+ TRACE2("%d not implemented: %d", -+ wrqu->param.flags & IW_AUTH_INDEX, wrqu->param.value); -+ break; -+ default: -+ WARNING("invalid cmd %d", wrqu->param.flags & IW_AUTH_INDEX); -+ return -EOPNOTSUPP; -+ } -+ return 0; -+} -+ -+static int iw_get_auth(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ struct ndis_device *wnd = netdev_priv(dev); -+ -+ ENTER2("index=%d", wrqu->param.flags & IW_AUTH_INDEX); -+ switch (wrqu->param.flags & IW_AUTH_INDEX) { -+ case IW_AUTH_WPA_VERSION: -+ wrqu->param.value = wnd->iw_auth_wpa_version; -+ break; -+ case IW_AUTH_CIPHER_PAIRWISE: -+ wrqu->param.value = wnd->iw_auth_cipher_pairwise; -+ break; -+ case IW_AUTH_CIPHER_GROUP: -+ wrqu->param.value = wnd->iw_auth_cipher_group; -+ break; -+ case IW_AUTH_KEY_MGMT: -+ wrqu->param.value = wnd->iw_auth_key_mgmt; -+ break; -+ case IW_AUTH_80211_AUTH_ALG: -+ wrqu->param.value = wnd->iw_auth_80211_alg; -+ break; -+ default: -+ WARNING("invalid cmd %d", wrqu->param.flags & IW_AUTH_INDEX); -+ return -EOPNOTSUPP; -+ } -+ return 0; -+} -+ -+static int iw_set_encodeext(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ struct iw_encode_ext *ext = (struct iw_encode_ext *)extra; -+ struct ndis_device *wnd = netdev_priv(dev); -+ struct ndis_add_key ndis_key; -+ int i, keyidx; -+ NDIS_STATUS res; -+ u8 *addr; -+ -+ keyidx = wrqu->encoding.flags & IW_ENCODE_INDEX; -+ ENTER2("%d", keyidx); -+ if (keyidx) -+ keyidx--; -+ else -+ keyidx = wnd->encr_info.tx_key_index; -+ -+ if (keyidx < 0 || keyidx >= MAX_ENCR_KEYS) -+ return -EINVAL; -+ -+ if (ext->alg == WPA_ALG_WEP) { -+ if (!test_bit(Ndis802_11Encryption1Enabled, &wnd->capa.encr)) -+ EXIT2(return -1); -+ if (ext->ext_flags & IW_ENCODE_EXT_SET_TX_KEY) -+ wnd->encr_info.tx_key_index = keyidx; -+ if (add_wep_key(wnd, ext->key, ext->key_len, keyidx)) -+ EXIT2(return -1); -+ else -+ EXIT2(return 0); -+ } -+ if ((wrqu->encoding.flags & IW_ENCODE_DISABLED) || -+ ext->alg == IW_ENCODE_ALG_NONE || ext->key_len == 0) -+ EXIT2(return remove_key(wnd, keyidx, ndis_key.bssid)); -+ -+ if (ext->key_len > sizeof(ndis_key.key)) { -+ TRACE2("incorrect key length (%u)", ext->key_len); -+ EXIT2(return -1); -+ } -+ -+ memset(&ndis_key, 0, sizeof(ndis_key)); -+ -+ ndis_key.struct_size = -+ sizeof(ndis_key) - sizeof(ndis_key.key) + ext->key_len; -+ ndis_key.length = ext->key_len; -+ ndis_key.index = keyidx; -+ -+ if (ext->ext_flags & IW_ENCODE_EXT_RX_SEQ_VALID) { -+ for (i = 0; i < 6; i++) -+ ndis_key.rsc |= (((u64)ext->rx_seq[i]) << (i * 8)); -+ TRACE2("0x%llx", ndis_key.rsc); -+ ndis_key.index |= 1 << 29; -+ } -+ -+ addr = ext->addr.sa_data; -+ if (ext->ext_flags & IW_ENCODE_EXT_GROUP_KEY) { -+ /* group key */ -+ if (wnd->infrastructure_mode == Ndis802_11IBSS) -+ memset(ndis_key.bssid, 0xff, ETH_ALEN); -+ else -+ get_ap_address(wnd, ndis_key.bssid); -+ } else { -+ /* pairwise key */ -+ ndis_key.index |= (1 << 30); -+ memcpy(ndis_key.bssid, addr, ETH_ALEN); -+ } -+ TRACE2(MACSTRSEP, MAC2STR(ndis_key.bssid)); -+ -+ if (ext->ext_flags & IW_ENCODE_EXT_SET_TX_KEY) -+ ndis_key.index |= (1 << 31); -+ -+ if (ext->alg == IW_ENCODE_ALG_TKIP && ext->key_len == 32) { -+ /* wpa_supplicant gives us the Michael MIC RX/TX keys in -+ * different order than NDIS spec, so swap the order here. */ -+ memcpy(ndis_key.key, ext->key, 16); -+ memcpy(ndis_key.key + 16, ext->key + 24, 8); -+ memcpy(ndis_key.key + 24, ext->key + 16, 8); -+ } else -+ memcpy(ndis_key.key, ext->key, ext->key_len); -+ -+ res = mp_set(wnd, OID_802_11_ADD_KEY, &ndis_key, ndis_key.struct_size); -+ if (res) { -+ TRACE2("adding key failed (%08X), %u", -+ res, ndis_key.struct_size); -+ EXIT2(return -1); -+ } -+ wnd->encr_info.keys[keyidx].length = ext->key_len; -+ memcpy(&wnd->encr_info.keys[keyidx].key, ndis_key.key, ext->key_len); -+ if (ext->ext_flags & IW_ENCODE_EXT_SET_TX_KEY) -+ wnd->encr_info.tx_key_index = keyidx; -+ TRACE2("key %d added", keyidx); -+ -+ EXIT2(return 0); -+} -+ -+static int iw_get_encodeext(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ /* struct iw_encode_ext *ext = (struct iw_encode_ext *) extra; */ -+ /* TODO */ -+ ENTER2(""); -+ return 0; -+} -+ -+static int iw_set_pmksa(struct net_device *dev, struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ struct iw_pmksa *pmksa = (struct iw_pmksa *)extra; -+ struct ndis_pmkid pmkid; -+ NDIS_STATUS res; -+ struct ndis_device *wnd = netdev_priv(dev); -+ -+ /* TODO: must keep local list of PMKIDs since NDIS drivers -+ * expect that all PMKID entries are included whenever a new -+ * one is added. */ -+ -+ ENTER2("%d", pmksa->cmd); -+ if ((pmksa->cmd == IW_PMKSA_ADD || pmksa->cmd == IW_PMKSA_REMOVE) && -+ (!(wnd->iw_auth_wpa_version & IW_AUTH_WPA_VERSION_WPA2))) -+ EXIT2(return -EOPNOTSUPP); -+ -+ memset(&pmkid, 0, sizeof(pmkid)); -+ if (pmksa->cmd == IW_PMKSA_ADD) { -+ pmkid.bssid_info_count = 1; -+ memcpy(pmkid.bssid_info[0].bssid, pmksa->bssid.sa_data, -+ ETH_ALEN); -+ memcpy(pmkid.bssid_info[0].pmkid, pmksa->pmkid, IW_PMKID_LEN); -+ } -+ pmkid.length = sizeof(pmkid); -+ -+ res = mp_set(wnd, OID_802_11_PMKID, &pmkid, pmkid.length); -+ if (res == NDIS_STATUS_FAILURE) -+ EXIT2(return -EOPNOTSUPP); -+ TRACE2("OID_802_11_PMKID -> %d", res); -+ if (res) -+ return -EINVAL; -+ -+ return 0; -+} -+ -+#define WEXT(id) [id - SIOCIWFIRST] -+ -+static const iw_handler ndis_handler[] = { -+ WEXT(SIOCGIWNAME) = iw_get_network_type, -+ WEXT(SIOCSIWESSID) = iw_set_essid, -+ WEXT(SIOCGIWESSID) = iw_get_essid, -+ WEXT(SIOCSIWMODE) = iw_set_infra_mode, -+ WEXT(SIOCGIWMODE) = iw_get_infra_mode, -+ WEXT(SIOCGIWFREQ) = iw_get_freq, -+ WEXT(SIOCSIWFREQ) = iw_set_freq, -+ WEXT(SIOCGIWTXPOW) = iw_get_tx_power, -+ WEXT(SIOCSIWTXPOW) = iw_set_tx_power, -+ WEXT(SIOCGIWRATE) = iw_get_bitrate, -+ WEXT(SIOCSIWRATE) = iw_set_bitrate, -+ WEXT(SIOCGIWRTS) = iw_get_rts_threshold, -+ WEXT(SIOCSIWRTS) = iw_set_rts_threshold, -+ WEXT(SIOCGIWFRAG) = iw_get_frag_threshold, -+ WEXT(SIOCSIWFRAG) = iw_set_frag_threshold, -+ WEXT(SIOCGIWAP) = iw_get_ap_address, -+ WEXT(SIOCSIWAP) = iw_set_ap_address, -+ WEXT(SIOCSIWENCODE) = iw_set_wep, -+ WEXT(SIOCGIWENCODE) = iw_get_encr, -+ WEXT(SIOCSIWSCAN) = iw_set_scan, -+ WEXT(SIOCGIWSCAN) = iw_get_scan, -+ WEXT(SIOCGIWPOWER) = iw_get_power_mode, -+ WEXT(SIOCSIWPOWER) = iw_set_power_mode, -+ WEXT(SIOCGIWRANGE) = iw_get_range, -+ WEXT(SIOCGIWSTATS) = iw_get_ndis_stats, -+ WEXT(SIOCGIWSENS) = iw_get_sensitivity, -+ WEXT(SIOCSIWSENS) = iw_set_sensitivity, -+ WEXT(SIOCGIWNICKN) = iw_get_nick, -+ WEXT(SIOCSIWNICKN) = iw_set_nick, -+ WEXT(SIOCSIWCOMMIT) = iw_set_dummy, -+ WEXT(SIOCSIWMLME) = iw_set_mlme, -+ WEXT(SIOCSIWGENIE) = iw_set_genie, -+ WEXT(SIOCSIWAUTH) = iw_set_auth, -+ WEXT(SIOCGIWAUTH) = iw_get_auth, -+ WEXT(SIOCSIWENCODEEXT) = iw_set_encodeext, -+ WEXT(SIOCGIWENCODEEXT) = iw_get_encodeext, -+ WEXT(SIOCSIWPMKSA) = iw_set_pmksa, -+}; -+ -+/* private ioctl's */ -+ -+static int priv_reset(struct net_device *dev, struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ int res; -+ ENTER2(""); -+ res = mp_reset(netdev_priv(dev)); -+ if (res) { -+ WARNING("reset failed: %08X", res); -+ return -EOPNOTSUPP; -+ } -+ return 0; -+} -+ -+static int priv_deauthenticate(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ int res; -+ ENTER2(""); -+ res = deauthenticate(netdev_priv(dev)); -+ return res; -+} -+ -+static int priv_power_profile(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ struct ndis_device *wnd = netdev_priv(dev); -+ struct miniport *mp; -+ ULONG profile_inf; -+ -+ ENTER2(""); -+ mp = &wnd->wd->driver->ndis_driver->mp; -+ if (!mp->pnp_event_notify) -+ EXIT2(return -EOPNOTSUPP); -+ -+ /* 1 for AC and 0 for Battery */ -+ if (wrqu->param.value) -+ profile_inf = NdisPowerProfileAcOnLine; -+ else -+ profile_inf = NdisPowerProfileBattery; -+ -+ LIN2WIN4(mp->pnp_event_notify, wnd->nmb->mp_ctx, -+ NdisDevicePnPEventPowerProfileChanged, -+ &profile_inf, sizeof(profile_inf)); -+ EXIT2(return 0); -+} -+ -+static int priv_network_type(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ struct ndis_device *wnd = netdev_priv(dev); -+ enum network_type network_type; -+ NDIS_STATUS res; -+ char type; -+ -+ ENTER2(""); -+ type = wrqu->param.value; -+ if (type == 'f') -+ network_type = Ndis802_11FH; -+ else if (type == 'b') -+ network_type = Ndis802_11DS; -+ else if (type == 'a') -+ network_type = Ndis802_11OFDM5; -+ else if (type == 'g' || type == 'n') -+ network_type = Ndis802_11OFDM24; -+ else -+ network_type = Ndis802_11Automode; -+ -+ res = mp_set_int(wnd, OID_802_11_NETWORK_TYPE_IN_USE, network_type); -+ if (res) { -+ WARNING("setting network type to %d failed (%08X)", -+ network_type, res); -+ EXIT2(return -EINVAL); -+ } -+ -+ EXIT2(return 0); -+} -+ -+static int priv_media_stream_mode(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ struct ndis_device *wnd = netdev_priv(dev); -+ NDIS_STATUS res; -+ int mode; -+ -+ ENTER2(""); -+ if (wrqu->param.value > 0) -+ mode = Ndis802_11MediaStreamOn; -+ else -+ mode = Ndis802_11MediaStreamOff; -+ res = mp_set_int(wnd, OID_802_11_MEDIA_STREAM_MODE, mode); -+ if (res) { -+ WARNING("oid failed (%08X)", res); -+ EXIT2(return -EINVAL); -+ } -+ EXIT2(return 0); -+} -+ -+static int priv_reload_defaults(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ struct ndis_device *wnd = netdev_priv(dev); -+ int res; -+ ENTER2(""); -+ res = mp_set_int(wnd, OID_802_11_RELOAD_DEFAULTS, -+ Ndis802_11ReloadWEPKeys); -+ if (res) { -+ WARNING("reloading defaults failed: %08X", res); -+ return -EOPNOTSUPP; -+ } -+ return 0; -+} -+ -+static const struct iw_priv_args priv_args[] = { -+ {PRIV_RESET, 0, 0, "ndis_reset"}, -+ {PRIV_POWER_PROFILE, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, -+ "power_profile"}, -+ {PRIV_DEAUTHENTICATE, 0, 0, "deauthenticate"}, -+ {PRIV_NETWORK_TYPE, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_FIXED | 1, 0, -+ "network_type"}, -+ {PRIV_MEDIA_STREAM_MODE, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, -+ "media_stream"}, -+ -+ {PRIV_RELOAD_DEFAULTS, 0, 0, "reload_defaults"}, -+}; -+ -+#define WEPRIV(id) [id - SIOCIWFIRSTPRIV] -+ -+static const iw_handler priv_handler[] = { -+ WEPRIV(PRIV_RESET) = priv_reset, -+ WEPRIV(PRIV_POWER_PROFILE) = priv_power_profile, -+ WEPRIV(PRIV_DEAUTHENTICATE) = priv_deauthenticate, -+ WEPRIV(PRIV_NETWORK_TYPE) = priv_network_type, -+ WEPRIV(PRIV_MEDIA_STREAM_MODE) = priv_media_stream_mode, -+ WEPRIV(PRIV_RELOAD_DEFAULTS) = priv_reload_defaults, -+}; -+ -+const struct iw_handler_def ndis_handler_def = { -+ .num_standard = ARRAY_SIZE(ndis_handler), -+ .num_private = ARRAY_SIZE(priv_handler), -+ .num_private_args = ARRAY_SIZE(priv_args), -+ -+ .standard = (iw_handler *)ndis_handler, -+ .private = (iw_handler *)priv_handler, -+ .private_args = (struct iw_priv_args *)priv_args, -+ .get_wireless_stats = get_iw_stats, -+}; -+ -+#endif -diff -Nurp linux-5.6.11/3rdparty/ndiswrapper/iw_ndis.h linux-5.6.11-ndis/3rdparty/ndiswrapper/iw_ndis.h ---- linux-5.6.11/3rdparty/ndiswrapper/iw_ndis.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.6.11-ndis/3rdparty/ndiswrapper/iw_ndis.h 2020-05-03 15:18:33.000000000 +0300 -@@ -0,0 +1,194 @@ -+/* -+ * Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ */ -+ -+#ifndef _IW_NDIS_H_ -+#define _IW_NDIS_H_ -+ -+#include "ndis.h" -+ -+#define WL_NOISE -96 /* typical noise level in dBm */ -+#define WL_SIGMAX -32 /* typical maximum signal level in dBm */ -+ -+struct ndis_encr_key { -+ ULONG struct_size; -+ ULONG index; -+ ULONG length; -+ UCHAR key[NDIS_ENCODING_TOKEN_MAX]; -+}; -+ -+struct ndis_add_key { -+ ULONG struct_size; -+ ndis_key_index index; -+ ULONG length; -+ mac_address bssid; -+ UCHAR pad[6]; -+ ndis_key_rsc rsc; -+ UCHAR key[NDIS_ENCODING_TOKEN_MAX]; -+}; -+ -+struct ndis_remove_key { -+ ULONG struct_size; -+ ndis_key_index index; -+ mac_address bssid; -+}; -+ -+struct ndis_fixed_ies { -+ UCHAR time_stamp[8]; -+ USHORT beacon_interval; -+ USHORT capa; -+}; -+ -+struct ndis_variable_ies { -+ UCHAR elem_id; -+ UCHAR length; -+ UCHAR data[]; -+}; -+ -+enum ndis_reload_defaults { Ndis802_11ReloadWEPKeys }; -+ -+struct ndis_assoc_info { -+ ULONG length; -+ USHORT req_ies; -+ struct req_ie { -+ USHORT capa; -+ USHORT listen_interval; -+ mac_address cur_ap_address; -+ } req_ie; -+ ULONG req_ie_length; -+ ULONG offset_req_ies; -+ USHORT resp_ies; -+ struct resp_ie { -+ USHORT capa; -+ USHORT status_code; -+ USHORT assoc_id; -+ } resp_ie; -+ ULONG resp_ie_length; -+ ULONG offset_resp_ies; -+}; -+ -+struct ndis_configuration_fh { -+ ULONG length; -+ ULONG hop_pattern; -+ ULONG hop_set; -+ ULONG dwell_time; -+}; -+ -+struct ndis_configuration { -+ ULONG length; -+ ULONG beacon_period; -+ ULONG atim_window; -+ ULONG ds_config; -+ struct ndis_configuration_fh fh_config; -+}; -+ -+struct ndis_wlan_bssid { -+ ULONG length; -+ mac_address mac; -+ UCHAR reserved[2]; -+ struct ndis_essid ssid; -+ ULONG privacy; -+ ndis_rssi rssi; -+ UINT net_type; -+ struct ndis_configuration config; -+ UINT mode; -+ UCHAR rates[NDIS_MAX_RATES]; -+}; -+ -+struct ndis_wlan_bssid_ex { -+ ULONG length; -+ mac_address mac; -+ UCHAR reserved[2]; -+ struct ndis_essid ssid; -+ ULONG privacy; -+ ndis_rssi rssi; -+ UINT net_type; -+ struct ndis_configuration config; -+ UINT mode; -+ UCHAR rates_ex[NDIS_MAX_RATES_EX]; -+ ULONG ie_length; -+ struct ndis_fixed_ies fixed; -+ struct ndis_variable_ies var[]; -+}; -+ -+/* we use bssid_list as bssid_list_ex also */ -+struct ndis_bssid_list { -+ ULONG num_items; -+ struct ndis_wlan_bssid bssid[1]; -+}; -+ -+enum ndis_priv_filter { -+ Ndis802_11PrivFilterAcceptAll, Ndis802_11PrivFilter8021xWEP -+}; -+ -+enum network_type { -+ Ndis802_11FH, Ndis802_11DS, Ndis802_11OFDM5, Ndis802_11OFDM24, -+ /* MSDN site uses Ndis802_11Automode, which is not mentioned -+ * in DDK, so add one and assign it to -+ * Ndis802_11NetworkTypeMax */ -+ Ndis802_11Automode, Ndis802_11NetworkTypeMax = Ndis802_11Automode -+}; -+ -+struct network_type_list { -+ ULONG num; -+ enum network_type types[1]; -+}; -+ -+enum ndis_power { -+ NDIS_POWER_OFF = 0, NDIS_POWER_MAX, NDIS_POWER_MIN, -+}; -+ -+struct ndis_auth_req { -+ ULONG length; -+ mac_address bssid; -+ ULONG flags; -+}; -+ -+struct ndis_bssid_info { -+ mac_address bssid; -+ UCHAR pmkid[IW_PMKID_LEN]; -+}; -+ -+struct ndis_pmkid { -+ ULONG length; -+ ULONG bssid_info_count; -+ struct ndis_bssid_info bssid_info[1]; -+}; -+ -+int get_ap_address(struct ndis_device *wnd, mac_address mac); -+int set_ndis_auth_mode(struct ndis_device *wnd, ULONG auth_mode); -+int get_ndis_encr_mode(struct ndis_device *wnd); -+int set_iw_encr_mode(struct ndis_device *wnd, int cipher_pairwise, -+ int cipher_groupwise); -+int get_ndis_auth_mode(struct ndis_device *wnd); -+NDIS_STATUS disassociate(struct ndis_device *wnd, int reset_ssid); -+void set_default_iw_params(struct ndis_device *wnd); -+extern const struct iw_handler_def ndis_handler_def; -+ -+#define PRIV_RESET SIOCIWFIRSTPRIV+16 -+#define PRIV_POWER_PROFILE SIOCIWFIRSTPRIV+17 -+#define PRIV_NETWORK_TYPE SIOCIWFIRSTPRIV+18 -+#define PRIV_DEAUTHENTICATE SIOCIWFIRSTPRIV+19 -+#define PRIV_MEDIA_STREAM_MODE SIOCIWFIRSTPRIV+20 -+#define PRIV_RELOAD_DEFAULTS SIOCIWFIRSTPRIV+23 -+ -+/* these have to match what is in wpa_supplicant */ -+ -+enum wpa_alg { WPA_ALG_NONE, WPA_ALG_WEP, WPA_ALG_TKIP, WPA_ALG_CCMP }; -+enum wpa_cipher { CIPHER_NONE, CIPHER_WEP40, CIPHER_TKIP, CIPHER_CCMP, -+ CIPHER_WEP104 }; -+enum wpa_key_mgmt { KEY_MGMT_802_1X, KEY_MGMT_PSK, KEY_MGMT_NONE, -+ KEY_MGMT_802_1X_NO_WPA, KEY_MGMT_WPA_NONE }; -+ -+#endif // IW_NDIS_H -diff -Nurp linux-5.6.11/3rdparty/ndiswrapper/lin2win.h linux-5.6.11-ndis/3rdparty/ndiswrapper/lin2win.h ---- linux-5.6.11/3rdparty/ndiswrapper/lin2win.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.6.11-ndis/3rdparty/ndiswrapper/lin2win.h 2020-05-03 15:18:33.000000000 +0300 -@@ -0,0 +1,111 @@ -+/* -+ * Copyright (C) 2006 Giridhar Pemmasani -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ */ -+ -+#ifdef CONFIG_X86_64 -+ -+u64 lin2win0(void *func); -+u64 lin2win1(void *func, u64 arg1); -+u64 lin2win2(void *func, u64 arg1, u64 arg2); -+u64 lin2win3(void *func, u64 arg1, u64 arg2, u64 arg3); -+u64 lin2win4(void *func, u64 arg1, u64 arg2, u64 arg3, u64 arg4); -+u64 lin2win5(void *func, u64 arg1, u64 arg2, u64 arg3, u64 arg4, u64 arg5); -+u64 lin2win6(void *func, u64 arg1, u64 arg2, u64 arg3, u64 arg4, u64 arg5, -+ u64 arg6); -+ -+#define LIN2WIN0(func) \ -+({ \ -+ if (0) \ -+ func(); \ -+ lin2win0(func); \ -+}) -+ -+#define LIN2WIN1(func, arg1) \ -+({ \ -+ if (0) \ -+ func(arg1); \ -+ lin2win1(func, (u64)arg1); \ -+}) -+ -+#define LIN2WIN2(func, arg1, arg2) \ -+({ \ -+ if (0) \ -+ func(arg1, arg2); \ -+ lin2win2(func, (u64)arg1, (u64)arg2); \ -+}) -+ -+#define LIN2WIN3(func, arg1, arg2, arg3) \ -+({ \ -+ if (0) \ -+ func(arg1, arg2, arg3); \ -+ lin2win3(func, (u64)arg1, (u64)arg2, (u64)arg3); \ -+}) -+ -+#define LIN2WIN4(func, arg1, arg2, arg3, arg4) \ -+({ \ -+ if (0) \ -+ func(arg1, arg2, arg3, arg4); \ -+ lin2win4(func, (u64)arg1, (u64)arg2, (u64)arg3, (u64)arg4); \ -+}) -+ -+#define LIN2WIN5(func, arg1, arg2, arg3, arg4, arg5) \ -+({ \ -+ if (0) \ -+ func(arg1, arg2, arg3, arg4, arg5); \ -+ lin2win5(func, (u64)arg1, (u64)arg2, (u64)arg3, (u64)arg4, \ -+ (u64)arg5); \ -+}) -+ -+#define LIN2WIN6(func, arg1, arg2, arg3, arg4, arg5, arg6) \ -+({ \ -+ if (0) \ -+ func(arg1, arg2, arg3, arg4, arg5, arg6); \ -+ lin2win6(func, (u64)arg1, (u64)arg2, (u64)arg3, (u64)arg4, \ -+ (u64)arg5, (u64)arg6); \ -+}) -+ -+#else // CONFIG_X86_64 -+ -+#define LIN2WIN1(func, arg1) \ -+({ \ -+ TRACE6("calling %p", func); \ -+ func(arg1); \ -+}) -+#define LIN2WIN2(func, arg1, arg2) \ -+({ \ -+ TRACE6("calling %p", func); \ -+ func(arg1, arg2); \ -+}) -+#define LIN2WIN3(func, arg1, arg2, arg3) \ -+({ \ -+ TRACE6("calling %p", func); \ -+ func(arg1, arg2, arg3); \ -+}) -+#define LIN2WIN4(func, arg1, arg2, arg3, arg4) \ -+({ \ -+ TRACE6("calling %p", func); \ -+ func(arg1, arg2, arg3, arg4); \ -+}) -+#define LIN2WIN5(func, arg1, arg2, arg3, arg4, arg5) \ -+({ \ -+ TRACE6("calling %p", func); \ -+ func(arg1, arg2, arg3, arg4, arg5); \ -+}) -+#define LIN2WIN6(func, arg1, arg2, arg3, arg4, arg5, arg6) \ -+({ \ -+ TRACE6("calling %p", func); \ -+ func(arg1, arg2, arg3, arg4, arg5, arg6); \ -+}) -+ -+#endif // CONFIG_X86_64 -diff -Nurp linux-5.6.11/3rdparty/ndiswrapper/lin2win.S linux-5.6.11-ndis/3rdparty/ndiswrapper/lin2win.S ---- linux-5.6.11/3rdparty/ndiswrapper/lin2win.S 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.6.11-ndis/3rdparty/ndiswrapper/lin2win.S 2020-05-03 15:18:33.000000000 +0300 -@@ -0,0 +1,147 @@ -+/* -+ * Copyright (C) 2011 Pavel Roskin -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ */ -+ -+#include -+#include -+ -+ .text -+ -+#define WORD_BYTES 8 -+#define LINUX_REG_ARGS 6 -+#define WINDOWS_REG_ARGS 4 -+ -+/* %rbp is saved to create a stack frame, which can help with debugging */ -+#define SAVED_REGS 1 -+ -+/* -+ * When calling a Windows function, stack space is allocated for at least 4 -+ * arguments even if the number of arguments is less than 4. The value of -+ * true is -1 in assembler, so we multiply it by another true value. -+ */ -+#define stack_args(argc) \ -+ (WINDOWS_REG_ARGS + \ -+ (0 < 1) * (argc > WINDOWS_REG_ARGS) * (argc - WINDOWS_REG_ARGS)) -+ -+/* Full required change of stack pointer, in words */ -+#define stack_words_raw(argc) (stack_args(argc) + SAVED_REGS + 1) -+ -+/* Full actual change of stack pointer, in words (must be even) */ -+#define stack_words_aligned(argc) ((stack_words_raw(argc) + 1) & ~1) -+ -+/* Space allocated for Linux arguments on stack */ -+#define stack_space(argc) \ -+ ((stack_words_aligned(argc) - SAVED_REGS - 1) * WORD_BYTES) -+ -+/* -+ * lin2win_win_arg(N) gives the address of the Nth Windows argument on our -+ * stack frame. %rsp points to the first argument. The Nth argument is -+ * therefore at ((N - 1) * 8)(%rsp). -+ * -+ * Don't call with N less than 5! -+ */ -+#define lin2win_win_arg(n) ((n - 1) * WORD_BYTES)(%rsp) -+ -+/* -+ * lin2win_lin_arg(N, ARGC) gives the address of the Nth Linux argument after -+ * the stack has been prepared for a Windows function call with ARGC arguments. -+ * -+ * When called from Linux, the Nth argument is at ((N - 6) * 8)(%rsp). We add -+ * the allocated stack space and saved registers to compensate for %rsp change. -+ * -+ * Don't call with N less than 7! -+ */ -+#define lin2win_lin_arg(n, argc) \ -+ (stack_space(argc) + \ -+ (SAVED_REGS + n - LINUX_REG_ARGS) * WORD_BYTES)(%rsp) -+ -+/* -+ * lin2win(func, winarg1, winarg2, ...) -+ * Call Windows FUNC function with ARGC arguments WINARG1, WINARG2, ... -+ * We get (ARGC + 1) arguments. -+ */ -+.macro lin2win name, argc -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,5,0) -+ SYM_FUNC_START(\name) -+#else -+ .type \name, @function -+ ENTRY(\name) -+#endif -+ -+ /* Create a call frame - it's optional, but good for debugging */ -+ .cfi_startproc -+ push %rbp -+ .cfi_def_cfa %rsp, 2 * WORD_BYTES -+ .cfi_offset %rbp, -2 * WORD_BYTES -+ mov %rsp, %rbp -+ .cfi_def_cfa %rbp, 2 * WORD_BYTES -+ -+ /* Allocate space for Windows arguments */ -+ sub $stack_space(\argc), %rsp -+ -+ /* arg7 to winarg6 */ -+ .if (\argc >= 6) -+ mov lin2win_lin_arg(7, \argc), %r11 -+ mov %r11, lin2win_win_arg(6) -+ .endif -+ -+ /* arg6 to winarg5 */ -+ .if (\argc >= 5) -+ mov %r9, lin2win_win_arg(5) -+ .endif -+ -+ /* arg5 to winarg4 */ -+ .if (\argc >= 4) -+ mov %r8, %r9 -+ .endif -+ -+ /* arg4 to winarg3 */ -+ .if (\argc >= 3) -+ mov %rcx, %r8 -+ .endif -+ -+ /* arg3 to winarg2 - nothing needed, both are in %rdx */ -+ -+ /* arg2 to winarg1 */ -+ .if (\argc >= 1) -+ mov %rsi, %rcx -+ .endif -+ -+ /* Call function (arg1) */ -+ call *%rdi -+ -+ /* Reclaim space for Windows arguments */ -+ add $stack_space(\argc), %rsp -+ -+ /* Return to the caller */ -+ leave -+ .cfi_def_cfa %rsp, WORD_BYTES -+ .cfi_restore %rbp -+ ret -+ .cfi_endproc -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,5,0) -+ SYM_FUNC_END(\name) -+#else -+ .size \name, (. - \name) -+#endif -+.endm -+ -+/* Define lin2winN functions */ -+lin2win lin2win0, 0 -+lin2win lin2win1, 1 -+lin2win lin2win2, 2 -+lin2win lin2win3, 3 -+lin2win lin2win4, 4 -+lin2win lin2win5, 5 -+lin2win lin2win6, 6 -diff -Nurp linux-5.6.11/3rdparty/ndiswrapper/loader.c linux-5.6.11-ndis/3rdparty/ndiswrapper/loader.c ---- linux-5.6.11/3rdparty/ndiswrapper/loader.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.6.11-ndis/3rdparty/ndiswrapper/loader.c 2020-05-03 15:18:33.000000000 +0300 -@@ -0,0 +1,967 @@ -+/* -+ * Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ */ -+ -+#include "ndis.h" -+#include "loader.h" -+#include "wrapndis.h" -+#include "pnp.h" -+ -+#include -+#include -+#include -+#include -+ -+/* -+ Network adapter: ClassGuid = {4d36e972-e325-11ce-bfc1-08002be10318} -+ Network client: ClassGuid = {4d36e973-e325-11ce-bfc1-08002be10318} -+ PCMCIA adapter: ClassGuid = {4d36e977-e325-11ce-bfc1-08002be10318} -+ USB: ClassGuid = {36fc9e60-c465-11cf-8056-444553540000} -+*/ -+ -+/* the indices used here must match macros WRAP_NDIS_DEVICE etc. */ -+static struct guid class_guids[] = { -+ /* Network */ -+ { .data1 = 0x4d36e972, .data2 = 0xe325, .data3 = 0x11ce }, -+ /* USB WDM */ -+ { .data1 = 0x36fc9e60, .data2 = 0xc465, .data3 = 0x11cf }, -+ /* Bluetooth */ -+ { .data1 = 0xe0cbf06c, .data2 = 0xcd8b, .data3 = 0x4647 }, -+ /* ivtcorporation.com's bluetooth device claims this is -+ * bluetooth guid */ -+ { .data1 = 0xf12d3cf8, .data2 = 0xb11d, .data3 = 0x457e}, -+}; -+ -+struct mutex loader_mutex; -+static struct completion loader_complete; -+ -+static struct nt_list wrap_devices; -+static struct nt_list wrap_drivers; -+ -+static int wrap_device_type(int data1) -+{ -+ int i; -+ for (i = 0; i < ARRAY_SIZE(class_guids); i++) -+ if (data1 == class_guids[i].data1) -+ return i; -+ ERROR("unknown device: 0x%x\n", data1); -+ return -1; -+} -+ -+/* load driver for given device, if not already loaded */ -+struct wrap_driver *load_wrap_driver(struct wrap_device *wd) -+{ -+ int ret; -+ struct nt_list *cur; -+ struct wrap_driver *wrap_driver; -+ -+ ENTER1("device: %04X:%04X:%04X:%04X", wd->vendor, wd->device, -+ wd->subvendor, wd->subdevice); -+ mutex_lock(&loader_mutex); -+ wrap_driver = NULL; -+ nt_list_for_each(cur, &wrap_drivers) { -+ wrap_driver = container_of(cur, struct wrap_driver, list); -+ if (!stricmp(wrap_driver->name, wd->driver_name)) { -+ TRACE1("driver %s already loaded", wrap_driver->name); -+ break; -+ } else -+ wrap_driver = NULL; -+ } -+ mutex_unlock(&loader_mutex); -+ -+ if (!wrap_driver) { -+ char *argv[] = {"loadndisdriver", WRAP_CMD_LOAD_DRIVER, -+#if DEBUG >= 1 -+ "1", -+#else -+ "0", -+#endif -+ UTILS_VERSION, wd->driver_name, -+ wd->conf_file_name, NULL}; -+ char *env[] = {NULL}; -+ -+ TRACE1("loading driver %s", wd->driver_name); -+ mutex_lock(&loader_mutex); -+ reinit_completion(&loader_complete); -+ ret = call_usermodehelper("/sbin/loadndisdriver", argv, env, -+ UMH_WAIT_PROC); -+ if (ret) { -+ mutex_unlock(&loader_mutex); -+ ERROR("couldn't load driver %s; check system log " -+ "for messages from 'loadndisdriver'", -+ wd->driver_name); -+ EXIT1(return NULL); -+ } -+ wait_for_completion(&loader_complete); -+ TRACE1("%s", wd->driver_name); -+ wrap_driver = NULL; -+ nt_list_for_each(cur, &wrap_drivers) { -+ wrap_driver = container_of(cur, struct wrap_driver, -+ list); -+ if (!stricmp(wrap_driver->name, wd->driver_name)) { -+ wd->driver = wrap_driver; -+ break; -+ } else -+ wrap_driver = NULL; -+ } -+ mutex_unlock(&loader_mutex); -+ if (wrap_driver) -+ TRACE1("driver %s is loaded", wrap_driver->name); -+ else -+ ERROR("couldn't load driver '%s'", wd->driver_name); -+ } -+ EXIT1(return wrap_driver); -+} -+ -+/* load the driver files from userspace. */ -+static int load_sys_files(struct wrap_driver *driver, -+ struct load_driver *load_driver) -+{ -+ int i, err; -+ -+ TRACE1("num_pe_images = %d", load_driver->num_sys_files); -+ TRACE1("loading driver: %s", load_driver->name); -+ strncpy(driver->name, load_driver->name, sizeof(driver->name)); -+ driver->name[sizeof(driver->name)-1] = 0; -+ TRACE1("driver: %s", driver->name); -+ err = 0; -+ driver->num_pe_images = 0; -+ for (i = 0; i < load_driver->num_sys_files; i++) { -+ struct pe_image *pe_image; -+ pe_image = &driver->pe_images[driver->num_pe_images]; -+ -+ strncpy(pe_image->name, load_driver->sys_files[i].name, -+ sizeof(pe_image->name)); -+ pe_image->name[sizeof(pe_image->name)-1] = 0; -+ TRACE1("image size: %zu bytes", load_driver->sys_files[i].size); -+ -+#ifdef CONFIG_X86_64 -+#ifdef PAGE_KERNEL_EXECUTABLE -+ pe_image->image = -+ __vmalloc(load_driver->sys_files[i].size, -+ GFP_KERNEL | __GFP_HIGHMEM -+ ); -+#elif defined PAGE_KERNEL_EXEC -+ pe_image->image = -+ __vmalloc(load_driver->sys_files[i].size, -+ GFP_KERNEL | __GFP_HIGHMEM -+ ); -+#else -+#error x86_64 should have either PAGE_KERNEL_EXECUTABLE or PAGE_KERNEL_EXEC -+#endif -+#else -+ /* hate to play with kernel macros, but PAGE_KERNEL_EXEC is -+ * not available to modules! */ -+#ifdef cpu_has_nx -+ if (cpu_has_nx) -+ pe_image->image = -+ __vmalloc(load_driver->sys_files[i].size, -+ GFP_KERNEL | __GFP_HIGHMEM -+ ); -+ else -+ pe_image->image = -+ vmalloc(load_driver->sys_files[i].size); -+#else -+ pe_image->image = -+ vmalloc(load_driver->sys_files[i].size); -+#endif -+#endif -+ if (!pe_image->image) { -+ ERROR("couldn't allocate memory"); -+ err = -ENOMEM; -+ break; -+ } -+ TRACE1("image is at %p", pe_image->image); -+ -+ if (copy_from_user(pe_image->image, -+ load_driver->sys_files[i].data, -+ load_driver->sys_files[i].size)) { -+ ERROR("couldn't load file %s", -+ load_driver->sys_files[i].name); -+ err = -EFAULT; -+ break; -+ } -+ pe_image->size = load_driver->sys_files[i].size; -+ driver->num_pe_images++; -+ } -+ -+ if (!err && link_pe_images(driver->pe_images, driver->num_pe_images)) { -+ ERROR("couldn't prepare driver '%s'", load_driver->name); -+ err = -EINVAL; -+ } -+ -+ if (driver->num_pe_images < load_driver->num_sys_files || err) { -+ for (i = 0; i < driver->num_pe_images; i++) -+ if (driver->pe_images[i].image) -+ vfree(driver->pe_images[i].image); -+ driver->num_pe_images = 0; -+ EXIT1(return err); -+ } else -+ EXIT1(return 0); -+} -+ -+struct wrap_bin_file *get_bin_file(char *bin_file_name) -+{ -+ int i = 0; -+ struct wrap_driver *driver, *cur; -+ -+ ENTER1("%s", bin_file_name); -+ mutex_lock(&loader_mutex); -+ driver = NULL; -+ nt_list_for_each_entry(cur, &wrap_drivers, list) { -+ for (i = 0; i < cur->num_bin_files; i++) -+ if (!stricmp(cur->bin_files[i].name, bin_file_name)) { -+ driver = cur; -+ break; -+ } -+ if (driver) -+ break; -+ } -+ mutex_unlock(&loader_mutex); -+ if (!driver) { -+ TRACE1("couldn't find bin file '%s'", bin_file_name); -+ return NULL; -+ } -+ -+ if (!driver->bin_files[i].data) { -+ char *argv[] = {"loadndisdriver", WRAP_CMD_LOAD_BIN_FILE, -+#if DEBUG >= 1 -+ "1", -+#else -+ "0", -+#endif -+ UTILS_VERSION, driver->name, -+ driver->bin_files[i].name, NULL}; -+ char *env[] = {NULL}; -+ int ret; -+ -+ TRACE1("loading bin file %s/%s", driver->name, -+ driver->bin_files[i].name); -+ mutex_lock(&loader_mutex); -+ reinit_completion(&loader_complete); -+ ret = call_usermodehelper("/sbin/loadndisdriver", argv, env, -+ UMH_WAIT_PROC); -+ if (ret) { -+ mutex_unlock(&loader_mutex); -+ ERROR("couldn't load file %s/%s; check system log " -+ "for messages from 'loadndisdriver' (%d)", -+ driver->name, driver->bin_files[i].name, ret); -+ EXIT1(return NULL); -+ } -+ wait_for_completion(&loader_complete); -+ mutex_unlock(&loader_mutex); -+ if (!driver->bin_files[i].data) { -+ WARNING("couldn't load binary file %s", -+ driver->bin_files[i].name); -+ EXIT1(return NULL); -+ } -+ } -+ EXIT2(return &(driver->bin_files[i])); -+} -+ -+/* called with loader_mutex down */ -+static int add_bin_file(struct load_driver_file *driver_file) -+{ -+ struct wrap_driver *driver, *cur; -+ struct wrap_bin_file *bin_file; -+ int i = 0; -+ -+ driver = NULL; -+ nt_list_for_each_entry(cur, &wrap_drivers, list) { -+ for (i = 0; i < cur->num_bin_files; i++) -+ if (!stricmp(cur->bin_files[i].name, -+ driver_file->name)) { -+ driver = cur; -+ break; -+ } -+ if (driver) -+ break; -+ } -+ if (!driver) { -+ ERROR("couldn't find %s", driver_file->name); -+ return -EINVAL; -+ } -+ bin_file = &driver->bin_files[i]; -+ strncpy(bin_file->name, driver_file->name, sizeof(bin_file->name)); -+ bin_file->name[sizeof(bin_file->name)-1] = 0; -+ bin_file->data = vmalloc(driver_file->size); -+ if (!bin_file->data) { -+ ERROR("couldn't allocate memory"); -+ return -ENOMEM; -+ } -+ bin_file->size = driver_file->size; -+ if (copy_from_user(bin_file->data, driver_file->data, bin_file->size)) { -+ ERROR("couldn't copy data"); -+ free_bin_file(bin_file); -+ return -EFAULT; -+ } -+ return 0; -+} -+ -+void free_bin_file(struct wrap_bin_file *bin_file) -+{ -+ TRACE2("unloading %s", bin_file->name); -+ if (bin_file->data) -+ vfree(bin_file->data); -+ bin_file->data = NULL; -+ bin_file->size = 0; -+ EXIT2(return); -+} -+ -+/* load firmware files from userspace */ -+static int load_bin_files_info(struct wrap_driver *driver, -+ struct load_driver *load_driver) -+{ -+ struct wrap_bin_file *bin_files; -+ int i; -+ -+ ENTER1("%s, %d", load_driver->name, load_driver->num_bin_files); -+ driver->num_bin_files = 0; -+ driver->bin_files = NULL; -+ if (load_driver->num_bin_files == 0) -+ EXIT1(return 0); -+ bin_files = kzalloc(load_driver->num_bin_files * sizeof(*bin_files), -+ GFP_KERNEL); -+ if (!bin_files) { -+ ERROR("couldn't allocate memory"); -+ EXIT1(return -ENOMEM); -+ } -+ -+ for (i = 0; i < load_driver->num_bin_files; i++) { -+ strncpy(bin_files[i].name, load_driver->bin_files[i].name, -+ sizeof(bin_files[i].name)); -+ bin_files[i].name[sizeof(bin_files[i].name)-1] = 0; -+ TRACE2("loaded bin file %s", bin_files[i].name); -+ } -+ driver->num_bin_files = load_driver->num_bin_files; -+ driver->bin_files = bin_files; -+ EXIT1(return 0); -+} -+ -+/* load settings for a device. called with loader_mutex down */ -+static int load_settings(struct wrap_driver *wrap_driver, -+ struct load_driver *load_driver) -+{ -+ int i, num_settings; -+ -+ ENTER1("%p, %p", wrap_driver, load_driver); -+ -+ num_settings = 0; -+ for (i = 0; i < load_driver->num_settings; i++) { -+ struct load_device_setting *load_setting = -+ &load_driver->settings[i]; -+ struct wrap_device_setting *setting; -+ ULONG data1; -+ -+ setting = kzalloc(sizeof(*setting), GFP_KERNEL); -+ if (!setting) { -+ ERROR("couldn't allocate memory"); -+ break; -+ } -+ strncpy(setting->name, load_setting->name, -+ sizeof(setting->name)); -+ setting->name[sizeof(setting->name)-1] = 0; -+ strncpy(setting->value, load_setting->value, -+ sizeof(setting->value)); -+ setting->value[sizeof(setting->value)-1] = 0; -+ TRACE2("%p: %s=%s", setting, setting->name, setting->value); -+ -+ if (strcmp(setting->name, "driver_version") == 0) { -+ strncpy(wrap_driver->version, setting->value, -+ sizeof(wrap_driver->version)); -+ wrap_driver->version[sizeof(wrap_driver->version)-1] = 0; -+ } else if (strcmp(setting->name, "class_guid") == 0 && -+ sscanf(setting->value, "%x", &data1) == 1) { -+ wrap_driver->dev_type = wrap_device_type(data1); -+ if (wrap_driver->dev_type < 0) { -+ WARNING("unknown guid: %x", data1); -+ wrap_driver->dev_type = 0; -+ } -+ } -+ InsertTailList(&wrap_driver->settings, &setting->list); -+ num_settings++; -+ } -+ /* it is not a fatal error if some settings couldn't be loaded */ -+ if (num_settings > 0) -+ EXIT1(return 0); -+ else -+ EXIT1(return -EINVAL); -+} -+ -+void unload_wrap_device(struct wrap_device *wd) -+{ -+ struct nt_list *cur; -+ ENTER1("unloading device %p (%04X:%04X:%04X:%04X), driver %s", wd, -+ wd->vendor, wd->device, wd->subvendor, wd->subdevice, -+ wd->driver_name); -+ mutex_lock(&loader_mutex); -+ while ((cur = RemoveHeadList(&wd->settings))) { -+ struct wrap_device_setting *setting; -+ setting = container_of(cur, struct wrap_device_setting, list); -+ kfree(setting); -+ } -+ RemoveEntryList(&wd->list); -+ mutex_unlock(&loader_mutex); -+ kfree(wd); -+ EXIT1(return); -+} -+ -+/* should be called with loader_mutex down */ -+void unload_wrap_driver(struct wrap_driver *driver) -+{ -+ int i; -+ struct driver_object *drv_obj; -+ struct nt_list *cur, *next; -+ -+ ENTER1("unloading driver: %s (%p)", driver->name, driver); -+ TRACE1("freeing %d images", driver->num_pe_images); -+ drv_obj = driver->drv_obj; -+ for (i = 0; i < driver->num_pe_images; i++) -+ if (driver->pe_images[i].image) { -+ TRACE1("freeing image at %p", -+ driver->pe_images[i].image); -+ vfree(driver->pe_images[i].image); -+ } -+ -+ TRACE1("freeing %d bin files", driver->num_bin_files); -+ for (i = 0; i < driver->num_bin_files; i++) { -+ TRACE1("freeing image at %p", driver->bin_files[i].data); -+ if (driver->bin_files[i].data) -+ vfree(driver->bin_files[i].data); -+ } -+ kfree(driver->bin_files); -+ RtlFreeUnicodeString(&drv_obj->name); -+ RemoveEntryList(&driver->list); -+ nt_list_for_each_safe(cur, next, &driver->settings) { -+ struct wrap_device_setting *setting; -+ struct ndis_configuration_parameter *param; -+ -+ setting = container_of(cur, struct wrap_device_setting, list); -+ TRACE2("%p", setting); -+ param = setting->encoded; -+ if (param) { -+ TRACE2("%p", param); -+ if (param->type == NdisParameterString) -+ RtlFreeUnicodeString(¶m->data.string); -+ ExFreePool(param); -+ } -+ kfree(setting); -+ } -+ /* this frees driver */ -+ free_custom_extensions(drv_obj->drv_ext); -+ kfree(drv_obj->drv_ext); -+ TRACE1("drv_obj: %p", drv_obj); -+ -+ EXIT1(return); -+} -+ -+/* call the entry point of the driver */ -+static int start_wrap_driver(struct wrap_driver *driver) -+{ -+ int i; -+ NTSTATUS ret, res; -+ struct driver_object *drv_obj; -+ typeof(driver->pe_images[0].entry) entry; -+ -+ ENTER1("%s", driver->name); -+ drv_obj = driver->drv_obj; -+ for (ret = res = 0, i = 0; i < driver->num_pe_images; i++) -+ /* dlls are already started by loader */ -+ if (driver->pe_images[i].type == IMAGE_FILE_EXECUTABLE_IMAGE) { -+ entry = driver->pe_images[i].entry; -+ drv_obj->start = driver->pe_images[i].entry; -+ drv_obj->driver_size = driver->pe_images[i].size; -+ TRACE1("entry: %p, %p, drv_obj: %p", -+ entry, *entry, drv_obj); -+ res = LIN2WIN2(entry, drv_obj, &drv_obj->name); -+ ret |= res; -+ TRACE1("entry returns %08X", res); -+ break; -+ } -+ if (ret) { -+ ERROR("driver initialization failed: %08X", ret); -+ RtlFreeUnicodeString(&drv_obj->name); -+ /* this frees ndis_driver */ -+ free_custom_extensions(drv_obj->drv_ext); -+ kfree(drv_obj->drv_ext); -+ TRACE1("drv_obj: %p", drv_obj); -+ ObDereferenceObject(drv_obj); -+ EXIT1(return -EINVAL); -+ } -+ EXIT1(return 0); -+} -+ -+/* -+ * add driver to list of loaded driver but make sure this driver is -+ * not loaded before. called with loader_mutex down -+ */ -+static int add_wrap_driver(struct wrap_driver *driver) -+{ -+ struct wrap_driver *tmp; -+ -+ ENTER1("name: %s", driver->name); -+ nt_list_for_each_entry(tmp, &wrap_drivers, list) { -+ if (stricmp(tmp->name, driver->name) == 0) { -+ ERROR("cannot add duplicate driver"); -+ EXIT1(return -EBUSY); -+ } -+ } -+ InsertHeadList(&wrap_drivers, &driver->list); -+ EXIT1(return 0); -+} -+ -+/* load a driver from userspace and initialize it. called with -+ * loader_mutex down */ -+static int load_user_space_driver(struct load_driver *load_driver) -+{ -+ struct driver_object *drv_obj; -+ struct ansi_string ansi_reg; -+ struct wrap_driver *wrap_driver = NULL; -+ -+ ENTER1("%p", load_driver); -+ drv_obj = allocate_object(sizeof(*drv_obj), OBJECT_TYPE_DRIVER, NULL); -+ if (!drv_obj) { -+ ERROR("couldn't allocate memory"); -+ EXIT1(return -ENOMEM); -+ } -+ TRACE1("drv_obj: %p", drv_obj); -+ drv_obj->drv_ext = kzalloc(sizeof(*(drv_obj->drv_ext)), GFP_KERNEL); -+ if (!drv_obj->drv_ext) { -+ ERROR("couldn't allocate memory"); -+ ObDereferenceObject(drv_obj); -+ EXIT1(return -ENOMEM); -+ } -+ InitializeListHead(&drv_obj->drv_ext->custom_ext); -+ if (IoAllocateDriverObjectExtension(drv_obj, -+ (void *)WRAP_DRIVER_CLIENT_ID, -+ sizeof(*wrap_driver), -+ (void **)&wrap_driver) != -+ STATUS_SUCCESS) -+ EXIT1(return -ENOMEM); -+ TRACE1("driver: %p", wrap_driver); -+ memset(wrap_driver, 0, sizeof(*wrap_driver)); -+ InitializeListHead(&wrap_driver->list); -+ InitializeListHead(&wrap_driver->settings); -+ wrap_driver->drv_obj = drv_obj; -+ RtlInitAnsiString(&ansi_reg, "/tmp"); -+ if (RtlAnsiStringToUnicodeString(&drv_obj->name, &ansi_reg, TRUE) != -+ STATUS_SUCCESS) { -+ ERROR("couldn't initialize registry path"); -+ free_custom_extensions(drv_obj->drv_ext); -+ kfree(drv_obj->drv_ext); -+ TRACE1("drv_obj: %p", drv_obj); -+ ObDereferenceObject(drv_obj); -+ EXIT1(return -EINVAL); -+ } -+ strncpy(wrap_driver->name, load_driver->name, sizeof(wrap_driver->name)); -+ wrap_driver->name[sizeof(wrap_driver->name)-1] = 0; -+ if (load_sys_files(wrap_driver, load_driver) || -+ load_bin_files_info(wrap_driver, load_driver) || -+ load_settings(wrap_driver, load_driver) || -+ start_wrap_driver(wrap_driver) || -+ add_wrap_driver(wrap_driver)) { -+ unload_wrap_driver(wrap_driver); -+ ObDereferenceObject(drv_obj); -+ EXIT1(return -EINVAL); -+ } else { -+ printk(KERN_INFO "%s: driver %s (%s) loaded\n", -+ DRIVER_NAME, wrap_driver->name, wrap_driver->version); -+ add_taint(TAINT_PROPRIETARY_MODULE, LOCKDEP_NOW_UNRELIABLE); -+ EXIT1(return 0); -+ } -+} -+ -+static struct pci_device_id wrap_pci_id_table[] = { -+ { -+ .vendor = PCI_ANY_ID, -+ .device = PCI_ANY_ID, -+ .subvendor = PCI_ANY_ID, -+ .subdevice = PCI_ANY_ID, -+ .class = 0, -+ .class_mask = 0, -+ .driver_data = 0 -+ } -+}; -+ -+static struct pci_driver wrap_pci_driver = { -+ .name = DRIVER_NAME, -+ .id_table = wrap_pci_id_table, -+ .probe = wrap_pnp_start_pci_device, -+ .remove = wrap_pnp_remove_pci_device, -+ .suspend = wrap_pnp_suspend_pci_device, -+ .resume = wrap_pnp_resume_pci_device, -+}; -+ -+#ifdef ENABLE_USB -+static struct usb_device_id wrap_usb_id_table[] = { -+ { -+ .driver_info = 1 -+ }, -+}; -+ -+static struct usb_driver wrap_usb_driver = { -+ .name = DRIVER_NAME, -+ .id_table = wrap_usb_id_table, -+ .probe = wrap_pnp_start_usb_device, -+ .disconnect = wrap_pnp_remove_usb_device, -+ .suspend = wrap_pnp_suspend_usb_device, -+ .resume = wrap_pnp_resume_usb_device, -+}; -+#endif -+ -+/* register drivers for pci and usb */ -+static void register_devices(void) -+{ -+ int res; -+ -+ res = pci_register_driver(&wrap_pci_driver); -+ if (res < 0) { -+ ERROR("couldn't register pci driver: %d", res); -+ wrap_pci_driver.name = NULL; -+ } -+ -+#ifdef ENABLE_USB -+ res = usb_register(&wrap_usb_driver); -+ if (res < 0) { -+ ERROR("couldn't register usb driver: %d", res); -+ wrap_usb_driver.name = NULL; -+ } -+#endif -+ EXIT1(return); -+} -+ -+static void unregister_devices(void) -+{ -+ struct nt_list *cur, *next; -+ -+ mutex_lock(&loader_mutex); -+ nt_list_for_each_safe(cur, next, &wrap_devices) { -+ struct wrap_device *wd; -+ wd = container_of(cur, struct wrap_device, list); -+ set_bit(HW_DISABLED, &wd->hw_status); -+ } -+ mutex_unlock(&loader_mutex); -+ -+ if (wrap_pci_driver.name) -+ pci_unregister_driver(&wrap_pci_driver); -+#ifdef ENABLE_USB -+ if (wrap_usb_driver.name) -+ usb_deregister(&wrap_usb_driver); -+#endif -+} -+ -+struct wrap_device *load_wrap_device(struct load_device *load_device) -+{ -+ int ret; -+ struct nt_list *cur; -+ struct wrap_device *wd = NULL; -+ char vendor[5], device[5], subvendor[5], subdevice[5], bus[5]; -+ -+ ENTER1("%04x, %04x, %04x, %04x", load_device->vendor, -+ load_device->device, load_device->subvendor, -+ load_device->subdevice); -+ if (sprintf(vendor, "%04x", load_device->vendor) == 4 && -+ sprintf(device, "%04x", load_device->device) == 4 && -+ sprintf(subvendor, "%04x", load_device->subvendor) == 4 && -+ sprintf(subdevice, "%04x", load_device->subdevice) == 4 && -+ sprintf(bus, "%04x", load_device->bus) == 4) { -+ char *argv[] = {"loadndisdriver", WRAP_CMD_LOAD_DEVICE, -+#if DEBUG >= 1 -+ "1", -+#else -+ "0", -+#endif -+ UTILS_VERSION, vendor, device, -+ subvendor, subdevice, bus, NULL}; -+ char *env[] = {NULL}; -+ TRACE2("%s, %s, %s, %s, %s", vendor, device, -+ subvendor, subdevice, bus); -+ mutex_lock(&loader_mutex); -+ reinit_completion(&loader_complete); -+ ret = call_usermodehelper("/sbin/loadndisdriver", argv, env, -+ UMH_WAIT_PROC); -+ if (ret) { -+ mutex_unlock(&loader_mutex); -+ TRACE1("couldn't load device %04x:%04x; check system " -+ "log for messages from 'loadndisdriver'", -+ load_device->vendor, load_device->device); -+ EXIT1(return NULL); -+ } -+ wait_for_completion(&loader_complete); -+ wd = NULL; -+ nt_list_for_each(cur, &wrap_devices) { -+ wd = container_of(cur, struct wrap_device, list); -+ TRACE2("%p, %04x, %04x, %04x, %04x", wd, wd->vendor, -+ wd->device, wd->subvendor, wd->subdevice); -+ if (wd->vendor == load_device->vendor && -+ wd->device == load_device->device) -+ break; -+ else -+ wd = NULL; -+ } -+ mutex_unlock(&loader_mutex); -+ } else -+ wd = NULL; -+ EXIT1(return wd); -+} -+ -+struct wrap_device *get_wrap_device(void *dev, int bus) -+{ -+ struct nt_list *cur; -+ struct wrap_device *wd; -+ -+ mutex_lock(&loader_mutex); -+ wd = NULL; -+ nt_list_for_each(cur, &wrap_devices) { -+ wd = container_of(cur, struct wrap_device, list); -+ if (bus == WRAP_PCI_BUS && -+ wrap_is_pci_bus(wd->dev_bus) && wd->pci.pdev == dev) -+ break; -+ else if (bus == WRAP_USB_BUS && -+ wrap_is_usb_bus(wd->dev_bus) && wd->usb.udev == dev) -+ break; -+ else -+ wd = NULL; -+ } -+ mutex_unlock(&loader_mutex); -+ return wd; -+} -+ -+/* called with loader_mutex is down */ -+static long wrapper_ioctl(struct file *file, unsigned int cmd, -+ unsigned long arg) -+{ -+ struct load_driver *load_driver; -+ struct load_device load_device; -+ struct load_driver_file load_bin_file; -+ int ret; -+ void __user *addr = (void __user *)arg; -+ -+ ENTER1("cmd: 0x%x", cmd); -+ -+ ret = 0; -+ switch (cmd) { -+ case WRAP_IOCTL_LOAD_DEVICE: -+ if (copy_from_user(&load_device, addr, sizeof(load_device))) { -+ ret = -EFAULT; -+ break; -+ } -+ TRACE2("%04x, %04x, %04x, %04x", load_device.vendor, -+ load_device.device, load_device.subvendor, -+ load_device.subdevice); -+ if (load_device.vendor) { -+ struct wrap_device *wd; -+ wd = kzalloc(sizeof(*wd), GFP_KERNEL); -+ if (!wd) { -+ ret = -ENOMEM; -+ break; -+ } -+ InitializeListHead(&wd->settings); -+ wd->dev_bus = WRAP_BUS(load_device.bus); -+ wd->vendor = load_device.vendor; -+ wd->device = load_device.device; -+ wd->subvendor = load_device.subvendor; -+ wd->subdevice = load_device.subdevice; -+ strncpy(wd->conf_file_name, load_device.conf_file_name, -+ sizeof(wd->conf_file_name)); -+ wd->conf_file_name[sizeof(wd->conf_file_name)-1] = 0; -+ strncpy(wd->driver_name, load_device.driver_name, -+ sizeof(wd->driver_name)); -+ wd->driver_name[sizeof(wd->driver_name)-1] = 0; -+ InsertHeadList(&wrap_devices, &wd->list); -+ ret = 0; -+ } else -+ ret = -EINVAL; -+ break; -+ case WRAP_IOCTL_LOAD_DRIVER: -+ TRACE1("loading driver at %p", addr); -+ load_driver = vmalloc(sizeof(*load_driver)); -+ if (!load_driver) { -+ ret = -ENOMEM; -+ break; -+ } -+ if (copy_from_user(load_driver, addr, sizeof(*load_driver))) -+ ret = -EFAULT; -+ else -+ ret = load_user_space_driver(load_driver); -+ vfree(load_driver); -+ break; -+ case WRAP_IOCTL_LOAD_BIN_FILE: -+ if (copy_from_user(&load_bin_file, addr, sizeof(load_bin_file))) -+ ret = -EFAULT; -+ else -+ ret = add_bin_file(&load_bin_file); -+ break; -+ default: -+ ERROR("unknown ioctl 0x%x", cmd); -+ ret = -EINVAL; -+ break; -+ } -+ complete(&loader_complete); -+ EXIT1(return ret); -+} -+ -+#ifdef CONFIG_COMPAT -+static int copy_load_driver_file32(struct load_driver_file *k, -+ struct load_driver_file32 __user *u) -+{ -+ u32 data; -+ -+ if (copy_from_user(&k->driver_name, &u->driver_name, -+ sizeof(u->driver_name) + sizeof(u->name))) -+ return -EFAULT; -+ -+ if (get_user(k->size, &u->size)) -+ return -EFAULT; -+ if (get_user(data, &u->data)) -+ return -EFAULT; -+ -+ k->data = (void __user *)(unsigned long)data; -+ return 0; -+} -+ -+static int copy_load_driver32(struct load_driver *k, -+ struct load_driver32 __user *u) -+{ -+ int i; -+ -+ if (copy_from_user(&k->name, &u->name, -+ sizeof(u->name) + sizeof(u->conf_file_name))) -+ return -EFAULT; -+ -+ if (get_user(k->num_sys_files, &u->num_sys_files)) -+ return -EFAULT; -+ -+ for (i = 0; i < k->num_sys_files; i++) -+ if (copy_load_driver_file32(&k->sys_files[i], &u->sys_files[i])) -+ return -EFAULT; -+ -+ if (get_user(k->num_settings, &u->num_settings)) -+ return -EFAULT; -+ -+ if (copy_from_user(&k->settings, &u->settings, -+ sizeof(u->settings[0]) * k->num_settings)) -+ return -EFAULT; -+ -+ if (get_user(k->num_bin_files, &u->num_bin_files)) -+ return -EFAULT; -+ -+ for (i = 0; i < k->num_bin_files; i++) -+ if (copy_load_driver_file32(&k->bin_files[i], &u->bin_files[i])) -+ return -EFAULT; -+ -+ return 0; -+} -+ -+static long wrapper_ioctl_compat(struct file *file, unsigned int cmd, -+ unsigned long arg) -+{ -+ int ret = 0; -+ void __user *addr = (void __user *)arg; -+ struct load_driver *kdriver; -+ struct load_driver32 __user *udriver = addr; -+ struct load_driver_file kfile; -+ struct load_driver_file32 __user *ufile = addr; -+ -+ ENTER1("cmd: 0x%x", cmd); -+ -+ switch (cmd) { -+ case WRAP_IOCTL_LOAD_DEVICE32: -+ return wrapper_ioctl(file, WRAP_IOCTL_LOAD_DEVICE, arg); -+ case WRAP_IOCTL_LOAD_DRIVER32: -+ TRACE1("loading driver at %p", addr); -+ kdriver = vmalloc(sizeof(*kdriver)); -+ if (!kdriver) { -+ ret = -ENOMEM; -+ break; -+ } -+ -+ ret = copy_load_driver32(kdriver, udriver); -+ if (!ret) -+ ret = load_user_space_driver(kdriver); -+ -+ vfree(kdriver); -+ break; -+ case WRAP_IOCTL_LOAD_BIN_FILE32: -+ ret = copy_load_driver_file32(&kfile, ufile); -+ if (ret) -+ break; -+ -+ ret = add_bin_file(&kfile); -+ break; -+ default: -+ ERROR("unknown ioctl 0x%x", cmd); -+ ret = -EINVAL; -+ break; -+ } -+ complete(&loader_complete); -+ EXIT1(return ret); -+} -+#endif -+ -+static int wrapper_ioctl_release(struct inode *inode, struct file *file) -+{ -+ ENTER1(""); -+ complete(&loader_complete); -+ return 0; -+} -+ -+static struct file_operations wrapper_fops = { -+ .owner = THIS_MODULE, -+ .unlocked_ioctl = wrapper_ioctl, -+#ifdef CONFIG_COMPAT -+ .compat_ioctl = wrapper_ioctl_compat, -+#endif -+ .release = wrapper_ioctl_release, -+}; -+ -+static struct miscdevice wrapper_misc = { -+ .name = DRIVER_NAME, -+ .minor = MISC_DYNAMIC_MINOR, -+ .fops = &wrapper_fops -+}; -+ -+int loader_init(void) -+{ -+ int err; -+ -+ InitializeListHead(&wrap_drivers); -+ InitializeListHead(&wrap_devices); -+ mutex_init(&loader_mutex); -+ init_completion(&loader_complete); -+ if ((err = misc_register(&wrapper_misc)) < 0) { -+ ERROR("couldn't register module (%d)", err); -+ unregister_devices(); -+ EXIT1(return err); -+ } -+ register_devices(); -+ EXIT1(return 0); -+} -+ -+void loader_exit(void) -+{ -+ struct nt_list *cur, *next; -+ -+ ENTER1(""); -+ misc_deregister(&wrapper_misc); -+ unregister_devices(); -+ mutex_lock(&loader_mutex); -+ nt_list_for_each_safe(cur, next, &wrap_drivers) { -+ struct wrap_driver *driver; -+ driver = container_of(cur, struct wrap_driver, list); -+ unload_wrap_driver(driver); -+ } -+ mutex_unlock(&loader_mutex); -+ EXIT1(return); -+} -diff -Nurp linux-5.6.11/3rdparty/ndiswrapper/loader.h linux-5.6.11-ndis/3rdparty/ndiswrapper/loader.h ---- linux-5.6.11/3rdparty/ndiswrapper/loader.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.6.11-ndis/3rdparty/ndiswrapper/loader.h 2020-05-03 15:18:33.000000000 +0300 -@@ -0,0 +1,108 @@ -+/* -+ * Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ */ -+ -+#ifndef _LOADER_H_ -+#define _LOADER_H_ -+ -+#include "ndiswrapper.h" -+ -+#ifndef __KERNEL__ -+#define __user -+#endif -+ -+struct load_driver_file { -+ char driver_name[MAX_DRIVER_NAME_LEN]; -+ char name[MAX_DRIVER_NAME_LEN]; -+ size_t size; -+ void __user *data; -+}; -+ -+struct load_device_setting { -+ char name[MAX_SETTING_NAME_LEN]; -+ char value[MAX_SETTING_VALUE_LEN]; -+}; -+ -+struct load_device { -+ int bus; -+ int vendor; -+ int device; -+ int subvendor; -+ int subdevice; -+ char conf_file_name[MAX_DRIVER_NAME_LEN]; -+ char driver_name[MAX_DRIVER_NAME_LEN]; -+}; -+ -+struct load_driver { -+ char name[MAX_DRIVER_NAME_LEN]; -+ char conf_file_name[MAX_DRIVER_NAME_LEN]; -+ unsigned int num_sys_files; -+ struct load_driver_file sys_files[MAX_DRIVER_PE_IMAGES]; -+ unsigned int num_settings; -+ struct load_device_setting settings[MAX_DEVICE_SETTINGS]; -+ unsigned int num_bin_files; -+ struct load_driver_file bin_files[MAX_DRIVER_BIN_FILES]; -+}; -+ -+#define WRAP_IOCTL_LOAD_DEVICE _IOW(('N' + 'd' + 'i' + 'S'), 0, \ -+ struct load_device *) -+#define WRAP_IOCTL_LOAD_DRIVER _IOW(('N' + 'd' + 'i' + 'S'), 1, \ -+ struct load_driver *) -+#define WRAP_IOCTL_LOAD_BIN_FILE _IOW(('N' + 'd' + 'i' + 'S'), 2, \ -+ struct load_driver_file *) -+ -+#ifdef CONFIG_COMPAT -+struct load_driver_file32 { -+ char driver_name[MAX_DRIVER_NAME_LEN]; -+ char name[MAX_DRIVER_NAME_LEN]; -+ u32 size; -+ u32 data; -+}; -+ -+struct load_driver32 { -+ char name[MAX_DRIVER_NAME_LEN]; -+ char conf_file_name[MAX_DRIVER_NAME_LEN]; -+ u32 num_sys_files; -+ struct load_driver_file32 sys_files[MAX_DRIVER_PE_IMAGES]; -+ u32 num_settings; -+ struct load_device_setting settings[MAX_DEVICE_SETTINGS]; -+ u32 num_bin_files; -+ struct load_driver_file32 bin_files[MAX_DRIVER_BIN_FILES]; -+} __packed; -+ -+#define WRAP_IOCTL_LOAD_DEVICE32 _IOW(('N' + 'd' + 'i' + 'S'), 0, u32) -+#define WRAP_IOCTL_LOAD_DRIVER32 _IOW(('N' + 'd' + 'i' + 'S'), 1, u32) -+#define WRAP_IOCTL_LOAD_BIN_FILE32 _IOW(('N' + 'd' + 'i' + 'S'), 2, u32) -+#endif -+ -+#define WRAP_CMD_LOAD_DEVICE "load_device" -+#define WRAP_CMD_LOAD_DRIVER "load_driver" -+#define WRAP_CMD_LOAD_BIN_FILE "load_bin_file" -+ -+int loader_init(void); -+void loader_exit(void); -+ -+#ifdef __KERNEL__ -+struct wrap_device *load_wrap_device(struct load_device *load_device); -+struct wrap_driver *load_wrap_driver(struct wrap_device *device); -+struct wrap_bin_file *get_bin_file(char *bin_file_name); -+void free_bin_file(struct wrap_bin_file *bin_file); -+void unload_wrap_driver(struct wrap_driver *driver); -+void unload_wrap_device(struct wrap_device *wd); -+struct wrap_device *get_wrap_device(void *dev, int bus_type); -+ -+extern struct mutex loader_mutex; -+#endif -+ -+#endif /* LOADER_H */ -diff -Nurp linux-5.6.11/3rdparty/ndiswrapper/longlong.h linux-5.6.11-ndis/3rdparty/ndiswrapper/longlong.h ---- linux-5.6.11/3rdparty/ndiswrapper/longlong.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.6.11-ndis/3rdparty/ndiswrapper/longlong.h 2020-05-03 15:18:33.000000000 +0300 -@@ -0,0 +1,1333 @@ -+/* longlong.h -- definitions for mixed size 32/64 bit arithmetic. -+ Copyright (C) 1991, 1992, 1994, 1995, 1996, 1997, 1998, 1999, 2000 -+ Free Software Foundation, Inc. -+ -+ This file is part of the GNU C Library. -+ -+ The GNU C Library is free software; you can redistribute it and/or -+ modify it under the terms of the GNU Lesser General Public -+ License as published by the Free Software Foundation; either -+ version 2.1 of the License, or (at your option) any later version. -+ -+ The GNU C Library is distributed in the hope that it will be useful, -+ but WITHOUT ANY WARRANTY; without even the implied warranty of -+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ Lesser General Public License for more details. -+ -+ You should have received a copy of the GNU Lesser General Public -+ License along with the GNU C Library; if not, write to the Free -+ Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA -+ 02111-1307 USA. */ -+ -+/* You have to define the following before including this file: -+ -+ UWtype -- An unsigned type, default type for operations (typically a "word") -+ UHWtype -- An unsigned type, at least half the size of UWtype. -+ UDWtype -- An unsigned type, at least twice as large a UWtype -+ W_TYPE_SIZE -- size in bits of UWtype -+ -+ UQItype -- Unsigned 8 bit type. -+ SItype, USItype -- Signed and unsigned 32 bit types. -+ DItype, UDItype -- Signed and unsigned 64 bit types. -+ -+ On a 32 bit machine UWtype should typically be USItype; -+ on a 64 bit machine, UWtype should typically be UDItype. -+*/ -+ -+#define __BITS4 (W_TYPE_SIZE / 4) -+#define __ll_B ((UWtype) 1 << (W_TYPE_SIZE / 2)) -+#define __ll_lowpart(t) ((UWtype) (t) & (__ll_B - 1)) -+#define __ll_highpart(t) ((UWtype) (t) >> (W_TYPE_SIZE / 2)) -+ -+#ifndef W_TYPE_SIZE -+#define W_TYPE_SIZE 32 -+#define UWtype USItype -+#define UHWtype USItype -+#define UDWtype UDItype -+#endif -+ -+/* Define auxiliary asm macros. -+ -+ 1) umul_ppmm(high_prod, low_prod, multipler, multiplicand) multiplies two -+ UWtype integers MULTIPLER and MULTIPLICAND, and generates a two UWtype -+ word product in HIGH_PROD and LOW_PROD. -+ -+ 2) __umulsidi3(a,b) multiplies two UWtype integers A and B, and returns a -+ UDWtype product. This is just a variant of umul_ppmm. -+ -+ 3) udiv_qrnnd(quotient, remainder, high_numerator, low_numerator, -+ denominator) divides a UDWtype, composed by the UWtype integers -+ HIGH_NUMERATOR and LOW_NUMERATOR, by DENOMINATOR and places the quotient -+ in QUOTIENT and the remainder in REMAINDER. HIGH_NUMERATOR must be less -+ than DENOMINATOR for correct operation. If, in addition, the most -+ significant bit of DENOMINATOR must be 1, then the pre-processor symbol -+ UDIV_NEEDS_NORMALIZATION is defined to 1. -+ -+ 4) sdiv_qrnnd(quotient, remainder, high_numerator, low_numerator, -+ denominator). Like udiv_qrnnd but the numbers are signed. The quotient -+ is rounded towards 0. -+ -+ 5) count_leading_zeros(count, x) counts the number of zero-bits from the -+ msb to the first nonzero bit in the UWtype X. This is the number of -+ steps X needs to be shifted left to set the msb. Undefined for X == 0, -+ unless the symbol COUNT_LEADING_ZEROS_0 is defined to some value. -+ -+ 6) count_trailing_zeros(count, x) like count_leading_zeros, but counts -+ from the least significant end. -+ -+ 7) add_ssaaaa(high_sum, low_sum, high_addend_1, low_addend_1, -+ high_addend_2, low_addend_2) adds two UWtype integers, composed by -+ HIGH_ADDEND_1 and LOW_ADDEND_1, and HIGH_ADDEND_2 and LOW_ADDEND_2 -+ respectively. The result is placed in HIGH_SUM and LOW_SUM. Overflow -+ (i.e. carry out) is not stored anywhere, and is lost. -+ -+ 8) sub_ddmmss(high_difference, low_difference, high_minuend, low_minuend, -+ high_subtrahend, low_subtrahend) subtracts two two-word UWtype integers, -+ composed by HIGH_MINUEND_1 and LOW_MINUEND_1, and HIGH_SUBTRAHEND_2 and -+ LOW_SUBTRAHEND_2 respectively. The result is placed in HIGH_DIFFERENCE -+ and LOW_DIFFERENCE. Overflow (i.e. carry out) is not stored anywhere, -+ and is lost. -+ -+ If any of these macros are left undefined for a particular CPU, -+ C macros are used. */ -+ -+/* The CPUs come in alphabetical order below. -+ -+ Please add support for more CPUs here, or improve the current support -+ for the CPUs below! -+ (E.g. WE32100, IBM360.) */ -+ -+#if defined (__GNUC__) && !defined (NO_ASM) -+ -+/* We sometimes need to clobber "cc" with gcc2, but that would not be -+ understood by gcc1. Use cpp to avoid major code duplication. */ -+#if __GNUC__ < 2 -+#define __CLOBBER_CC -+#define __AND_CLOBBER_CC -+#else /* __GNUC__ >= 2 */ -+#define __CLOBBER_CC : "cc" -+#define __AND_CLOBBER_CC , "cc" -+#endif /* __GNUC__ < 2 */ -+ -+#if defined (__alpha) && W_TYPE_SIZE == 64 -+#define umul_ppmm(ph, pl, m0, m1) \ -+ do { \ -+ UDItype __m0 = (m0), __m1 = (m1); \ -+ __asm__ ("umulh %r1,%2,%0" \ -+ : "=r" ((UDItype) ph) \ -+ : "%rJ" (__m0), \ -+ "rI" (__m1)); \ -+ (pl) = __m0 * __m1; \ -+ } while (0) -+#define UMUL_TIME 46 -+#ifndef LONGLONG_STANDALONE -+#define udiv_qrnnd(q, r, n1, n0, d) \ -+ do { UDItype __r; \ -+ (q) = __udiv_qrnnd (&__r, (n1), (n0), (d)); \ -+ (r) = __r; \ -+ } while (0) -+extern UDItype __udiv_qrnnd (UDItype *, UDItype, UDItype, UDItype); -+#define UDIV_TIME 220 -+#endif /* LONGLONG_STANDALONE */ -+#ifdef __alpha_cix__ -+#define count_leading_zeros(COUNT,X) \ -+ __asm__("ctlz %1,%0" : "=r"(COUNT) : "r"(X)) -+#define count_trailing_zeros(COUNT,X) \ -+ __asm__("cttz %1,%0" : "=r"(COUNT) : "r"(X)) -+#define COUNT_LEADING_ZEROS_0 64 -+#else -+extern const UQItype __clz_tab[]; -+#define count_leading_zeros(COUNT,X) \ -+ do { \ -+ UDItype __xr = (X), __t, __a; \ -+ __asm__("cmpbge $31,%1,%0" : "=r"(__t) : "r"(__xr)); \ -+ __a = __clz_tab[__t ^ 0xff] - 1; \ -+ __asm__("extbl %1,%2,%0" : "=r"(__t) : "r"(__xr), "r"(__a)); \ -+ (COUNT) = 64 - (__clz_tab[__t] + __a*8); \ -+ } while (0) -+#define count_trailing_zeros(COUNT,X) \ -+ do { \ -+ UDItype __xr = (X), __t, __a; \ -+ __asm__("cmpbge $31,%1,%0" : "=r"(__t) : "r"(__xr)); \ -+ __t = ~__t & -~__t; \ -+ __a = ((__t & 0xCC) != 0) * 2; \ -+ __a += ((__t & 0xF0) != 0) * 4; \ -+ __a += ((__t & 0xAA) != 0); \ -+ __asm__("extbl %1,%2,%0" : "=r"(__t) : "r"(__xr), "r"(__a)); \ -+ __a <<= 3; \ -+ __t &= -__t; \ -+ __a += ((__t & 0xCC) != 0) * 2; \ -+ __a += ((__t & 0xF0) != 0) * 4; \ -+ __a += ((__t & 0xAA) != 0); \ -+ (COUNT) = __a; \ -+ } while (0) -+#endif /* __alpha_cix__ */ -+#endif /* __alpha */ -+ -+#if defined (__arc__) && W_TYPE_SIZE == 32 -+#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ -+ __asm__ ("add.f %1, %4, %5\n\tadc %0, %2, %3" \ -+ : "=r" ((USItype) (sh)), \ -+ "=&r" ((USItype) (sl)) \ -+ : "%r" ((USItype) (ah)), \ -+ "rIJ" ((USItype) (bh)), \ -+ "%r" ((USItype) (al)), \ -+ "rIJ" ((USItype) (bl))) -+#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ -+ __asm__ ("sub.f %1, %4, %5\n\tsbc %0, %2, %3" \ -+ : "=r" ((USItype) (sh)), \ -+ "=&r" ((USItype) (sl)) \ -+ : "r" ((USItype) (ah)), \ -+ "rIJ" ((USItype) (bh)), \ -+ "r" ((USItype) (al)), \ -+ "rIJ" ((USItype) (bl))) -+/* Call libgcc routine. */ -+#define umul_ppmm(w1, w0, u, v) \ -+do { \ -+ DWunion __w; \ -+ __w.ll = __umulsidi3 (u, v); \ -+ w1 = __w.s.high; \ -+ w0 = __w.s.low; \ -+} while (0) -+#define __umulsidi3 __umulsidi3 -+UDItype __umulsidi3 (USItype, USItype); -+#endif -+ -+#if defined (__arm__) && W_TYPE_SIZE == 32 -+#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ -+ __asm__ ("adds %1, %4, %5\n\tadc %0, %2, %3" \ -+ : "=r" ((USItype) (sh)), \ -+ "=&r" ((USItype) (sl)) \ -+ : "%r" ((USItype) (ah)), \ -+ "rI" ((USItype) (bh)), \ -+ "%r" ((USItype) (al)), \ -+ "rI" ((USItype) (bl))) -+#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ -+ __asm__ ("subs %1, %4, %5\n\tsbc %0, %2, %3" \ -+ : "=r" ((USItype) (sh)), \ -+ "=&r" ((USItype) (sl)) \ -+ : "r" ((USItype) (ah)), \ -+ "rI" ((USItype) (bh)), \ -+ "r" ((USItype) (al)), \ -+ "rI" ((USItype) (bl))) -+#define umul_ppmm(xh, xl, a, b) \ -+{register USItype __t0, __t1, __t2; \ -+ __asm__ ("%@ Inlined umul_ppmm\n" \ -+ " mov %2, %5, lsr #16\n" \ -+ " mov %0, %6, lsr #16\n" \ -+ " bic %3, %5, %2, lsl #16\n" \ -+ " bic %4, %6, %0, lsl #16\n" \ -+ " mul %1, %3, %4\n" \ -+ " mul %4, %2, %4\n" \ -+ " mul %3, %0, %3\n" \ -+ " mul %0, %2, %0\n" \ -+ " adds %3, %4, %3\n" \ -+ " addcs %0, %0, #65536\n" \ -+ " adds %1, %1, %3, lsl #16\n" \ -+ " adc %0, %0, %3, lsr #16" \ -+ : "=&r" ((USItype) (xh)), \ -+ "=r" ((USItype) (xl)), \ -+ "=&r" (__t0), "=&r" (__t1), "=r" (__t2) \ -+ : "r" ((USItype) (a)), \ -+ "r" ((USItype) (b)));} -+#define UMUL_TIME 20 -+#define UDIV_TIME 100 -+#endif /* __arm__ */ -+ -+#if defined (__hppa) && W_TYPE_SIZE == 32 -+#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ -+ __asm__ ("add %4,%5,%1\n\taddc %2,%3,%0" \ -+ : "=r" ((USItype) (sh)), \ -+ "=&r" ((USItype) (sl)) \ -+ : "%rM" ((USItype) (ah)), \ -+ "rM" ((USItype) (bh)), \ -+ "%rM" ((USItype) (al)), \ -+ "rM" ((USItype) (bl))) -+#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ -+ __asm__ ("sub %4,%5,%1\n\tsubb %2,%3,%0" \ -+ : "=r" ((USItype) (sh)), \ -+ "=&r" ((USItype) (sl)) \ -+ : "rM" ((USItype) (ah)), \ -+ "rM" ((USItype) (bh)), \ -+ "rM" ((USItype) (al)), \ -+ "rM" ((USItype) (bl))) -+#if defined (_PA_RISC1_1) -+#define umul_ppmm(w1, w0, u, v) \ -+ do { \ -+ union \ -+ { \ -+ UDItype __f; \ -+ struct {USItype __w1, __w0;} __w1w0; \ -+ } __t; \ -+ __asm__ ("xmpyu %1,%2,%0" \ -+ : "=x" (__t.__f) \ -+ : "x" ((USItype) (u)), \ -+ "x" ((USItype) (v))); \ -+ (w1) = __t.__w1w0.__w1; \ -+ (w0) = __t.__w1w0.__w0; \ -+ } while (0) -+#define UMUL_TIME 8 -+#else -+#define UMUL_TIME 30 -+#endif -+#define UDIV_TIME 40 -+#define count_leading_zeros(count, x) \ -+ do { \ -+ USItype __tmp; \ -+ __asm__ ( \ -+ "ldi 1,%0\n" \ -+" extru,= %1,15,16,%%r0 ; Bits 31..16 zero?\n" \ -+" extru,tr %1,15,16,%1 ; No. Shift down, skip add.\n"\ -+" ldo 16(%0),%0 ; Yes. Perform add.\n" \ -+" extru,= %1,23,8,%%r0 ; Bits 15..8 zero?\n" \ -+" extru,tr %1,23,8,%1 ; No. Shift down, skip add.\n"\ -+" ldo 8(%0),%0 ; Yes. Perform add.\n" \ -+" extru,= %1,27,4,%%r0 ; Bits 7..4 zero?\n" \ -+" extru,tr %1,27,4,%1 ; No. Shift down, skip add.\n"\ -+" ldo 4(%0),%0 ; Yes. Perform add.\n" \ -+" extru,= %1,29,2,%%r0 ; Bits 3..2 zero?\n" \ -+" extru,tr %1,29,2,%1 ; No. Shift down, skip add.\n"\ -+" ldo 2(%0),%0 ; Yes. Perform add.\n" \ -+" extru %1,30,1,%1 ; Extract bit 1.\n" \ -+" sub %0,%1,%0 ; Subtract it.\n" \ -+ : "=r" (count), "=r" (__tmp) : "1" (x)); \ -+ } while (0) -+#endif -+ -+#if (defined (__i370__) || defined (__mvs__)) && W_TYPE_SIZE == 32 -+#define umul_ppmm(xh, xl, m0, m1) \ -+ do { \ -+ union {UDItype __ll; \ -+ struct {USItype __h, __l;} __i; \ -+ } __xx; \ -+ USItype __m0 = (m0), __m1 = (m1); \ -+ __asm__ ("mr %0,%3" \ -+ : "=r" (__xx.__i.__h), \ -+ "=r" (__xx.__i.__l) \ -+ : "%1" (__m0), \ -+ "r" (__m1)); \ -+ (xh) = __xx.__i.__h; (xl) = __xx.__i.__l; \ -+ (xh) += ((((SItype) __m0 >> 31) & __m1) \ -+ + (((SItype) __m1 >> 31) & __m0)); \ -+ } while (0) -+#define smul_ppmm(xh, xl, m0, m1) \ -+ do { \ -+ union {DItype __ll; \ -+ struct {USItype __h, __l;} __i; \ -+ } __xx; \ -+ __asm__ ("mr %0,%3" \ -+ : "=r" (__xx.__i.__h), \ -+ "=r" (__xx.__i.__l) \ -+ : "%1" (m0), \ -+ "r" (m1)); \ -+ (xh) = __xx.__i.__h; (xl) = __xx.__i.__l; \ -+ } while (0) -+#define sdiv_qrnnd(q, r, n1, n0, d) \ -+ do { \ -+ union {DItype __ll; \ -+ struct {USItype __h, __l;} __i; \ -+ } __xx; \ -+ __xx.__i.__h = n1; __xx.__i.__l = n0; \ -+ __asm__ ("dr %0,%2" \ -+ : "=r" (__xx.__ll) \ -+ : "0" (__xx.__ll), "r" (d)); \ -+ (q) = __xx.__i.__l; (r) = __xx.__i.__h; \ -+ } while (0) -+#endif -+ -+#if (defined (__i386__) || defined (__i486__)) && W_TYPE_SIZE == 32 -+#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ -+ __asm__ ("addl %5,%1\n\tadcl %3,%0" \ -+ : "=r" (sh), \ -+ "=&r" (sl) \ -+ : "%0" ((USItype) (ah)), \ -+ "g" ((USItype) (bh)), \ -+ "%1" ((USItype) (al)), \ -+ "g" ((USItype) (bl))) -+#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ -+ __asm__ ("subl %5,%1\n\tsbbl %3,%0" \ -+ : "=r" (sh), \ -+ "=&r" (sl) \ -+ : "0" ((USItype) (ah)), \ -+ "g" ((USItype) (bh)), \ -+ "1" ((USItype) (al)), \ -+ "g" ((USItype) (bl))) -+#define umul_ppmm(w1, w0, u, v) \ -+ __asm__ ("mull %3" \ -+ : "=a" (w0), \ -+ "=d" (w1) \ -+ : "%0" ((USItype) (u)), \ -+ "rm" ((USItype) (v))) -+#define udiv_qrnnd(q, r, n1, n0, dv) \ -+ __asm__ ("divl %4" \ -+ : "=a" (q), \ -+ "=d" (r) \ -+ : "0" ((USItype) (n0)), \ -+ "1" ((USItype) (n1)), \ -+ "rm" ((USItype) (dv))) -+#define count_leading_zeros(count, x) \ -+ do { \ -+ USItype __cbtmp; \ -+ __asm__ ("bsrl %1,%0" \ -+ : "=r" (__cbtmp) : "rm" ((USItype) (x))); \ -+ (count) = __cbtmp ^ 31; \ -+ } while (0) -+#define count_trailing_zeros(count, x) \ -+ __asm__ ("bsfl %1,%0" : "=r" (count) : "rm" ((USItype)(x))) -+#define UMUL_TIME 40 -+#define UDIV_TIME 40 -+#endif /* 80x86 */ -+ -+#if defined (__i960__) && W_TYPE_SIZE == 32 -+#define umul_ppmm(w1, w0, u, v) \ -+ ({union {UDItype __ll; \ -+ struct {USItype __l, __h;} __i; \ -+ } __xx; \ -+ __asm__ ("emul %2,%1,%0" \ -+ : "=d" (__xx.__ll) \ -+ : "%dI" ((USItype) (u)), \ -+ "dI" ((USItype) (v))); \ -+ (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;}) -+#define __umulsidi3(u, v) \ -+ ({UDItype __w; \ -+ __asm__ ("emul %2,%1,%0" \ -+ : "=d" (__w) \ -+ : "%dI" ((USItype) (u)), \ -+ "dI" ((USItype) (v))); \ -+ __w; }) -+#endif /* __i960__ */ -+ -+#if defined (__M32R__) && W_TYPE_SIZE == 32 -+#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ -+ /* The cmp clears the condition bit. */ \ -+ __asm__ ("cmp %0,%0\n\taddx %%5,%1\n\taddx %%3,%0" \ -+ : "=r" ((USItype) (sh)), \ -+ "=&r" ((USItype) (sl)) \ -+ : "%0" ((USItype) (ah)), \ -+ "r" ((USItype) (bh)), \ -+ "%1" ((USItype) (al)), \ -+ "r" ((USItype) (bl)) \ -+ : "cbit") -+#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ -+ /* The cmp clears the condition bit. */ \ -+ __asm__ ("cmp %0,%0\n\tsubx %5,%1\n\tsubx %3,%0" \ -+ : "=r" ((USItype) (sh)), \ -+ "=&r" ((USItype) (sl)) \ -+ : "0" ((USItype) (ah)), \ -+ "r" ((USItype) (bh)), \ -+ "1" ((USItype) (al)), \ -+ "r" ((USItype) (bl)) \ -+ : "cbit") -+#endif /* __M32R__ */ -+ -+#if defined (__mc68000__) && W_TYPE_SIZE == 32 -+#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ -+ __asm__ ("add%.l %5,%1\n\taddx%.l %3,%0" \ -+ : "=d" ((USItype) (sh)), \ -+ "=&d" ((USItype) (sl)) \ -+ : "%0" ((USItype) (ah)), \ -+ "d" ((USItype) (bh)), \ -+ "%1" ((USItype) (al)), \ -+ "g" ((USItype) (bl))) -+#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ -+ __asm__ ("sub%.l %5,%1\n\tsubx%.l %3,%0" \ -+ : "=d" ((USItype) (sh)), \ -+ "=&d" ((USItype) (sl)) \ -+ : "0" ((USItype) (ah)), \ -+ "d" ((USItype) (bh)), \ -+ "1" ((USItype) (al)), \ -+ "g" ((USItype) (bl))) -+ -+/* The '020, '030, '040 and CPU32 have 32x32->64 and 64/32->32q-32r. */ -+#if defined (__mc68020__) || defined(mc68020) \ -+ || defined(__mc68030__) || defined(mc68030) \ -+ || defined(__mc68040__) || defined(mc68040) \ -+ || defined(__mcpu32__) || defined(mcpu32) -+#define umul_ppmm(w1, w0, u, v) \ -+ __asm__ ("mulu%.l %3,%1:%0" \ -+ : "=d" ((USItype) (w0)), \ -+ "=d" ((USItype) (w1)) \ -+ : "%0" ((USItype) (u)), \ -+ "dmi" ((USItype) (v))) -+#define UMUL_TIME 45 -+#define udiv_qrnnd(q, r, n1, n0, d) \ -+ __asm__ ("divu%.l %4,%1:%0" \ -+ : "=d" ((USItype) (q)), \ -+ "=d" ((USItype) (r)) \ -+ : "0" ((USItype) (n0)), \ -+ "1" ((USItype) (n1)), \ -+ "dmi" ((USItype) (d))) -+#define UDIV_TIME 90 -+#define sdiv_qrnnd(q, r, n1, n0, d) \ -+ __asm__ ("divs%.l %4,%1:%0" \ -+ : "=d" ((USItype) (q)), \ -+ "=d" ((USItype) (r)) \ -+ : "0" ((USItype) (n0)), \ -+ "1" ((USItype) (n1)), \ -+ "dmi" ((USItype) (d))) -+ -+#else /* not mc68020 */ -+#if !defined(__mcf5200__) -+/* %/ inserts REGISTER_PREFIX, %# inserts IMMEDIATE_PREFIX. */ -+#define umul_ppmm(xh, xl, a, b) \ -+ __asm__ ("| Inlined umul_ppmm\n" \ -+ " move%.l %2,%/d0\n" \ -+ " move%.l %3,%/d1\n" \ -+ " move%.l %/d0,%/d2\n" \ -+ " swap %/d0\n" \ -+ " move%.l %/d1,%/d3\n" \ -+ " swap %/d1\n" \ -+ " move%.w %/d2,%/d4\n" \ -+ " mulu %/d3,%/d4\n" \ -+ " mulu %/d1,%/d2\n" \ -+ " mulu %/d0,%/d3\n" \ -+ " mulu %/d0,%/d1\n" \ -+ " move%.l %/d4,%/d0\n" \ -+ " eor%.w %/d0,%/d0\n" \ -+ " swap %/d0\n" \ -+ " add%.l %/d0,%/d2\n" \ -+ " add%.l %/d3,%/d2\n" \ -+ " jcc 1f\n" \ -+ " add%.l %#65536,%/d1\n" \ -+ "1: swap %/d2\n" \ -+ " moveq %#0,%/d0\n" \ -+ " move%.w %/d2,%/d0\n" \ -+ " move%.w %/d4,%/d2\n" \ -+ " move%.l %/d2,%1\n" \ -+ " add%.l %/d1,%/d0\n" \ -+ " move%.l %/d0,%0" \ -+ : "=g" ((USItype) (xh)), \ -+ "=g" ((USItype) (xl)) \ -+ : "g" ((USItype) (a)), \ -+ "g" ((USItype) (b)) \ -+ : "d0", "d1", "d2", "d3", "d4") -+#define UMUL_TIME 100 -+#define UDIV_TIME 400 -+#endif /* not mcf5200 */ -+#endif /* not mc68020 */ -+ -+/* The '020, '030, '040 and '060 have bitfield insns. */ -+#if defined (__mc68020__) || defined(mc68020) \ -+ || defined(__mc68030__) || defined(mc68030) \ -+ || defined(__mc68040__) || defined(mc68040) \ -+ || defined(__mc68060__) || defined(mc68060) -+#define count_leading_zeros(count, x) \ -+ __asm__ ("bfffo %1{%b2:%b2},%0" \ -+ : "=d" ((USItype) (count)) \ -+ : "od" ((USItype) (x)), "n" (0)) -+#endif -+#endif /* mc68000 */ -+ -+#if defined (__m88000__) && W_TYPE_SIZE == 32 -+#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ -+ __asm__ ("addu.co %1,%r4,%r5\n\taddu.ci %0,%r2,%r3" \ -+ : "=r" ((USItype) (sh)), \ -+ "=&r" ((USItype) (sl)) \ -+ : "%rJ" ((USItype) (ah)), \ -+ "rJ" ((USItype) (bh)), \ -+ "%rJ" ((USItype) (al)), \ -+ "rJ" ((USItype) (bl))) -+#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ -+ __asm__ ("subu.co %1,%r4,%r5\n\tsubu.ci %0,%r2,%r3" \ -+ : "=r" ((USItype) (sh)), \ -+ "=&r" ((USItype) (sl)) \ -+ : "rJ" ((USItype) (ah)), \ -+ "rJ" ((USItype) (bh)), \ -+ "rJ" ((USItype) (al)), \ -+ "rJ" ((USItype) (bl))) -+#define count_leading_zeros(count, x) \ -+ do { \ -+ USItype __cbtmp; \ -+ __asm__ ("ff1 %0,%1" \ -+ : "=r" (__cbtmp) \ -+ : "r" ((USItype) (x))); \ -+ (count) = __cbtmp ^ 31; \ -+ } while (0) -+#define COUNT_LEADING_ZEROS_0 63 /* sic */ -+#if defined (__mc88110__) -+#define umul_ppmm(wh, wl, u, v) \ -+ do { \ -+ union {UDItype __ll; \ -+ struct {USItype __h, __l;} __i; \ -+ } __xx; \ -+ __asm__ ("mulu.d %0,%1,%2" \ -+ : "=r" (__xx.__ll) \ -+ : "r" ((USItype) (u)), \ -+ "r" ((USItype) (v))); \ -+ (wh) = __xx.__i.__h; \ -+ (wl) = __xx.__i.__l; \ -+ } while (0) -+#define udiv_qrnnd(q, r, n1, n0, d) \ -+ ({union {UDItype __ll; \ -+ struct {USItype __h, __l;} __i; \ -+ } __xx; \ -+ USItype __q; \ -+ __xx.__i.__h = (n1); __xx.__i.__l = (n0); \ -+ __asm__ ("divu.d %0,%1,%2" \ -+ : "=r" (__q) \ -+ : "r" (__xx.__ll), \ -+ "r" ((USItype) (d))); \ -+ (r) = (n0) - __q * (d); (q) = __q; }) -+#define UMUL_TIME 5 -+#define UDIV_TIME 25 -+#else -+#define UMUL_TIME 17 -+#define UDIV_TIME 150 -+#endif /* __mc88110__ */ -+#endif /* __m88000__ */ -+ -+#if defined (__mips__) && W_TYPE_SIZE == 32 -+#define umul_ppmm(w1, w0, u, v) \ -+ __asm__ ("multu %2,%3" \ -+ : "=l" ((USItype) (w0)), \ -+ "=h" ((USItype) (w1)) \ -+ : "d" ((USItype) (u)), \ -+ "d" ((USItype) (v))) -+#define UMUL_TIME 10 -+#define UDIV_TIME 100 -+#endif /* __mips__ */ -+ -+#if defined (__ns32000__) && W_TYPE_SIZE == 32 -+#define umul_ppmm(w1, w0, u, v) \ -+ ({union {UDItype __ll; \ -+ struct {USItype __l, __h;} __i; \ -+ } __xx; \ -+ __asm__ ("meid %2,%0" \ -+ : "=g" (__xx.__ll) \ -+ : "%0" ((USItype) (u)), \ -+ "g" ((USItype) (v))); \ -+ (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;}) -+#define __umulsidi3(u, v) \ -+ ({UDItype __w; \ -+ __asm__ ("meid %2,%0" \ -+ : "=g" (__w) \ -+ : "%0" ((USItype) (u)), \ -+ "g" ((USItype) (v))); \ -+ __w; }) -+#define udiv_qrnnd(q, r, n1, n0, d) \ -+ ({union {UDItype __ll; \ -+ struct {USItype __l, __h;} __i; \ -+ } __xx; \ -+ __xx.__i.__h = (n1); __xx.__i.__l = (n0); \ -+ __asm__ ("deid %2,%0" \ -+ : "=g" (__xx.__ll) \ -+ : "0" (__xx.__ll), \ -+ "g" ((USItype) (d))); \ -+ (r) = __xx.__i.__l; (q) = __xx.__i.__h; }) -+#define count_trailing_zeros(count,x) \ -+ do { \ -+ __asm__ ("ffsd %2,%0" \ -+ : "=r" ((USItype) (count)) \ -+ : "0" ((USItype) 0), \ -+ "r" ((USItype) (x))); \ -+ } while (0) -+#endif /* __ns32000__ */ -+ -+/* FIXME: We should test _IBMR2 here when we add assembly support for the -+ system vendor compilers. -+ FIXME: What's needed for gcc PowerPC VxWorks? __vxworks__ is not good -+ enough, since that hits ARM and m68k too. */ -+#if (defined (_ARCH_PPC) /* AIX */ \ -+ || defined (_ARCH_PWR) /* AIX */ \ -+ || defined (_ARCH_COM) /* AIX */ \ -+ || defined (__powerpc__) /* gcc */ \ -+ || defined (__POWERPC__) /* BEOS */ \ -+ || defined (__ppc__) /* Darwin */ \ -+ || defined (PPC) /* GNU/Linux, SysV */ \ -+ ) && W_TYPE_SIZE == 32 -+#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ -+ do { \ -+ if (__builtin_constant_p (bh) && (bh) == 0) \ -+ __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{aze|addze} %0,%2" \ -+ : "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\ -+ else if (__builtin_constant_p (bh) && (bh) == ~(USItype) 0) \ -+ __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{ame|addme} %0,%2" \ -+ : "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\ -+ else \ -+ __asm__ ("{a%I5|add%I5c} %1,%4,%5\n\t{ae|adde} %0,%2,%3" \ -+ : "=r" (sh), "=&r" (sl) \ -+ : "%r" (ah), "r" (bh), "%r" (al), "rI" (bl)); \ -+ } while (0) -+#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ -+ do { \ -+ if (__builtin_constant_p (ah) && (ah) == 0) \ -+ __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfze|subfze} %0,%2" \ -+ : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\ -+ else if (__builtin_constant_p (ah) && (ah) == ~(USItype) 0) \ -+ __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfme|subfme} %0,%2" \ -+ : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\ -+ else if (__builtin_constant_p (bh) && (bh) == 0) \ -+ __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{ame|addme} %0,%2" \ -+ : "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\ -+ else if (__builtin_constant_p (bh) && (bh) == ~(USItype) 0) \ -+ __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{aze|addze} %0,%2" \ -+ : "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\ -+ else \ -+ __asm__ ("{sf%I4|subf%I4c} %1,%5,%4\n\t{sfe|subfe} %0,%3,%2" \ -+ : "=r" (sh), "=&r" (sl) \ -+ : "r" (ah), "r" (bh), "rI" (al), "r" (bl)); \ -+ } while (0) -+#define count_leading_zeros(count, x) \ -+ __asm__ ("{cntlz|cntlzw} %0,%1" : "=r" (count) : "r" (x)) -+#define COUNT_LEADING_ZEROS_0 32 -+#if defined (_ARCH_PPC) || defined (__powerpc__) || defined (__POWERPC__) \ -+ || defined (__ppc__) || defined (PPC) || defined (__vxworks__) -+#define umul_ppmm(ph, pl, m0, m1) \ -+ do { \ -+ USItype __m0 = (m0), __m1 = (m1); \ -+ __asm__ ("mulhwu %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1)); \ -+ (pl) = __m0 * __m1; \ -+ } while (0) -+#define UMUL_TIME 15 -+#define smul_ppmm(ph, pl, m0, m1) \ -+ do { \ -+ SItype __m0 = (m0), __m1 = (m1); \ -+ __asm__ ("mulhw %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1)); \ -+ (pl) = __m0 * __m1; \ -+ } while (0) -+#define SMUL_TIME 14 -+#define UDIV_TIME 120 -+#elif defined (_ARCH_PWR) -+#define UMUL_TIME 8 -+#define smul_ppmm(xh, xl, m0, m1) \ -+ __asm__ ("mul %0,%2,%3" : "=r" (xh), "=q" (xl) : "r" (m0), "r" (m1)) -+#define SMUL_TIME 4 -+#define sdiv_qrnnd(q, r, nh, nl, d) \ -+ __asm__ ("div %0,%2,%4" : "=r" (q), "=q" (r) : "r" (nh), "1" (nl), "r" (d)) -+#define UDIV_TIME 100 -+#endif -+#endif /* 32-bit POWER architecture variants. */ -+ -+/* We should test _IBMR2 here when we add assembly support for the system -+ vendor compilers. */ -+#if (defined (_ARCH_PPC64) || defined (__powerpc64__)) && W_TYPE_SIZE == 64 -+#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ -+ do { \ -+ if (__builtin_constant_p (bh) && (bh) == 0) \ -+ __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{aze|addze} %0,%2" \ -+ : "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\ -+ else if (__builtin_constant_p (bh) && (bh) == ~(UDItype) 0) \ -+ __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{ame|addme} %0,%2" \ -+ : "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\ -+ else \ -+ __asm__ ("{a%I5|add%I5c} %1,%4,%5\n\t{ae|adde} %0,%2,%3" \ -+ : "=r" (sh), "=&r" (sl) \ -+ : "%r" (ah), "r" (bh), "%r" (al), "rI" (bl)); \ -+ } while (0) -+#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ -+ do { \ -+ if (__builtin_constant_p (ah) && (ah) == 0) \ -+ __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfze|subfze} %0,%2" \ -+ : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\ -+ else if (__builtin_constant_p (ah) && (ah) == ~(UDItype) 0) \ -+ __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfme|subfme} %0,%2" \ -+ : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\ -+ else if (__builtin_constant_p (bh) && (bh) == 0) \ -+ __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{ame|addme} %0,%2" \ -+ : "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\ -+ else if (__builtin_constant_p (bh) && (bh) == ~(UDItype) 0) \ -+ __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{aze|addze} %0,%2" \ -+ : "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\ -+ else \ -+ __asm__ ("{sf%I4|subf%I4c} %1,%5,%4\n\t{sfe|subfe} %0,%3,%2" \ -+ : "=r" (sh), "=&r" (sl) \ -+ : "r" (ah), "r" (bh), "rI" (al), "r" (bl)); \ -+ } while (0) -+#define count_leading_zeros(count, x) \ -+ __asm__ ("cntlzd %0,%1" : "=r" (count) : "r" (x)) -+#define COUNT_LEADING_ZEROS_0 64 -+#define umul_ppmm(ph, pl, m0, m1) \ -+ do { \ -+ UDItype __m0 = (m0), __m1 = (m1); \ -+ __asm__ ("mulhdu %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1)); \ -+ (pl) = __m0 * __m1; \ -+ } while (0) -+#define UMUL_TIME 15 -+#define smul_ppmm(ph, pl, m0, m1) \ -+ do { \ -+ DItype __m0 = (m0), __m1 = (m1); \ -+ __asm__ ("mulhd %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1)); \ -+ (pl) = __m0 * __m1; \ -+ } while (0) -+#define SMUL_TIME 14 /* ??? */ -+#define UDIV_TIME 120 /* ??? */ -+#endif /* 64-bit PowerPC. */ -+ -+#if defined (__ibm032__) /* RT/ROMP */ && W_TYPE_SIZE == 32 -+#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ -+ __asm__ ("a %1,%5\n\tae %0,%3" \ -+ : "=r" ((USItype) (sh)), \ -+ "=&r" ((USItype) (sl)) \ -+ : "%0" ((USItype) (ah)), \ -+ "r" ((USItype) (bh)), \ -+ "%1" ((USItype) (al)), \ -+ "r" ((USItype) (bl))) -+#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ -+ __asm__ ("s %1,%5\n\tse %0,%3" \ -+ : "=r" ((USItype) (sh)), \ -+ "=&r" ((USItype) (sl)) \ -+ : "0" ((USItype) (ah)), \ -+ "r" ((USItype) (bh)), \ -+ "1" ((USItype) (al)), \ -+ "r" ((USItype) (bl))) -+#define umul_ppmm(ph, pl, m0, m1) \ -+ do { \ -+ USItype __m0 = (m0), __m1 = (m1); \ -+ __asm__ ( \ -+ "s r2,r2\n" \ -+" mts r10,%2\n" \ -+" m r2,%3\n" \ -+" m r2,%3\n" \ -+" m r2,%3\n" \ -+" m r2,%3\n" \ -+" m r2,%3\n" \ -+" m r2,%3\n" \ -+" m r2,%3\n" \ -+" m r2,%3\n" \ -+" m r2,%3\n" \ -+" m r2,%3\n" \ -+" m r2,%3\n" \ -+" m r2,%3\n" \ -+" m r2,%3\n" \ -+" m r2,%3\n" \ -+" m r2,%3\n" \ -+" m r2,%3\n" \ -+" cas %0,r2,r0\n" \ -+" mfs r10,%1" \ -+ : "=r" ((USItype) (ph)), \ -+ "=r" ((USItype) (pl)) \ -+ : "%r" (__m0), \ -+ "r" (__m1) \ -+ : "r2"); \ -+ (ph) += ((((SItype) __m0 >> 31) & __m1) \ -+ + (((SItype) __m1 >> 31) & __m0)); \ -+ } while (0) -+#define UMUL_TIME 20 -+#define UDIV_TIME 200 -+#define count_leading_zeros(count, x) \ -+ do { \ -+ if ((x) >= 0x10000) \ -+ __asm__ ("clz %0,%1" \ -+ : "=r" ((USItype) (count)) \ -+ : "r" ((USItype) (x) >> 16)); \ -+ else \ -+ { \ -+ __asm__ ("clz %0,%1" \ -+ : "=r" ((USItype) (count)) \ -+ : "r" ((USItype) (x))); \ -+ (count) += 16; \ -+ } \ -+ } while (0) -+#endif -+ -+#if defined (__sh2__) && W_TYPE_SIZE == 32 -+#define umul_ppmm(w1, w0, u, v) \ -+ __asm__ ( \ -+ "dmulu.l %2,%3\n\tsts macl,%1\n\tsts mach,%0" \ -+ : "=r" ((USItype)(w1)), \ -+ "=r" ((USItype)(w0)) \ -+ : "r" ((USItype)(u)), \ -+ "r" ((USItype)(v)) \ -+ : "macl", "mach") -+#define UMUL_TIME 5 -+#endif -+ -+#if defined (__SH5__) && __SHMEDIA__ && W_TYPE_SIZE == 32 -+#define __umulsidi3(u,v) ((UDItype)(USItype)u*(USItype)v) -+#define count_leading_zeros(count, x) \ -+ do \ -+ { \ -+ UDItype x_ = (USItype)(x); \ -+ SItype c_; \ -+ \ -+ __asm__ ("nsb %1, %0" : "=r" (c_) : "r" (x_)); \ -+ (count) = c_ - 31; \ -+ } \ -+ while (0) -+#define COUNT_LEADING_ZEROS_0 32 -+#endif -+ -+#if defined (__sparc__) && !defined (__arch64__) && !defined (__sparcv9) \ -+ && W_TYPE_SIZE == 32 -+#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ -+ __asm__ ("addcc %r4,%5,%1\n\taddx %r2,%3,%0" \ -+ : "=r" ((USItype) (sh)), \ -+ "=&r" ((USItype) (sl)) \ -+ : "%rJ" ((USItype) (ah)), \ -+ "rI" ((USItype) (bh)), \ -+ "%rJ" ((USItype) (al)), \ -+ "rI" ((USItype) (bl)) \ -+ __CLOBBER_CC) -+#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ -+ __asm__ ("subcc %r4,%5,%1\n\tsubx %r2,%3,%0" \ -+ : "=r" ((USItype) (sh)), \ -+ "=&r" ((USItype) (sl)) \ -+ : "rJ" ((USItype) (ah)), \ -+ "rI" ((USItype) (bh)), \ -+ "rJ" ((USItype) (al)), \ -+ "rI" ((USItype) (bl)) \ -+ __CLOBBER_CC) -+#if defined (__sparc_v8__) -+#define umul_ppmm(w1, w0, u, v) \ -+ __asm__ ("umul %2,%3,%1;rd %%y,%0" \ -+ : "=r" ((USItype) (w1)), \ -+ "=r" ((USItype) (w0)) \ -+ : "r" ((USItype) (u)), \ -+ "r" ((USItype) (v))) -+#define udiv_qrnnd(__q, __r, __n1, __n0, __d) \ -+ __asm__ ("mov %2,%%y;nop;nop;nop;udiv %3,%4,%0;umul %0,%4,%1;sub %3,%1,%1"\ -+ : "=&r" ((USItype) (__q)), \ -+ "=&r" ((USItype) (__r)) \ -+ : "r" ((USItype) (__n1)), \ -+ "r" ((USItype) (__n0)), \ -+ "r" ((USItype) (__d))) -+#else -+#if defined (__sparclite__) -+/* This has hardware multiply but not divide. It also has two additional -+ instructions scan (ffs from high bit) and divscc. */ -+#define umul_ppmm(w1, w0, u, v) \ -+ __asm__ ("umul %2,%3,%1;rd %%y,%0" \ -+ : "=r" ((USItype) (w1)), \ -+ "=r" ((USItype) (w0)) \ -+ : "r" ((USItype) (u)), \ -+ "r" ((USItype) (v))) -+#define udiv_qrnnd(q, r, n1, n0, d) \ -+ __asm__ ("! Inlined udiv_qrnnd\n" \ -+" wr %%g0,%2,%%y ! Not a delayed write for sparclite\n" \ -+" tst %%g0\n" \ -+" divscc %3,%4,%%g1\n" \ -+" divscc %%g1,%4,%%g1\n" \ -+" divscc %%g1,%4,%%g1\n" \ -+" divscc %%g1,%4,%%g1\n" \ -+" divscc %%g1,%4,%%g1\n" \ -+" divscc %%g1,%4,%%g1\n" \ -+" divscc %%g1,%4,%%g1\n" \ -+" divscc %%g1,%4,%%g1\n" \ -+" divscc %%g1,%4,%%g1\n" \ -+" divscc %%g1,%4,%%g1\n" \ -+" divscc %%g1,%4,%%g1\n" \ -+" divscc %%g1,%4,%%g1\n" \ -+" divscc %%g1,%4,%%g1\n" \ -+" divscc %%g1,%4,%%g1\n" \ -+" divscc %%g1,%4,%%g1\n" \ -+" divscc %%g1,%4,%%g1\n" \ -+" divscc %%g1,%4,%%g1\n" \ -+" divscc %%g1,%4,%%g1\n" \ -+" divscc %%g1,%4,%%g1\n" \ -+" divscc %%g1,%4,%%g1\n" \ -+" divscc %%g1,%4,%%g1\n" \ -+" divscc %%g1,%4,%%g1\n" \ -+" divscc %%g1,%4,%%g1\n" \ -+" divscc %%g1,%4,%%g1\n" \ -+" divscc %%g1,%4,%%g1\n" \ -+" divscc %%g1,%4,%%g1\n" \ -+" divscc %%g1,%4,%%g1\n" \ -+" divscc %%g1,%4,%%g1\n" \ -+" divscc %%g1,%4,%%g1\n" \ -+" divscc %%g1,%4,%%g1\n" \ -+" divscc %%g1,%4,%%g1\n" \ -+" divscc %%g1,%4,%0\n" \ -+" rd %%y,%1\n" \ -+" bl,a 1f\n" \ -+" add %1,%4,%1\n" \ -+"1: ! End of inline udiv_qrnnd" \ -+ : "=r" ((USItype) (q)), \ -+ "=r" ((USItype) (r)) \ -+ : "r" ((USItype) (n1)), \ -+ "r" ((USItype) (n0)), \ -+ "rI" ((USItype) (d)) \ -+ : "g1" __AND_CLOBBER_CC) -+#define UDIV_TIME 37 -+#define count_leading_zeros(count, x) \ -+ do { \ -+ __asm__ ("scan %1,1,%0" \ -+ : "=r" ((USItype) (count)) \ -+ : "r" ((USItype) (x))); \ -+ } while (0) -+/* Early sparclites return 63 for an argument of 0, but they warn that future -+ implementations might change this. Therefore, leave COUNT_LEADING_ZEROS_0 -+ undefined. */ -+#else -+/* SPARC without integer multiplication and divide instructions. -+ (i.e. at least Sun4/20,40,60,65,75,110,260,280,330,360,380,470,490) */ -+#define umul_ppmm(w1, w0, u, v) \ -+ __asm__ ("! Inlined umul_ppmm\n" \ -+" wr %%g0,%2,%%y ! SPARC has 0-3 delay insn after a wr\n"\ -+" sra %3,31,%%o5 ! Don't move this insn\n" \ -+" and %2,%%o5,%%o5 ! Don't move this insn\n" \ -+" andcc %%g0,0,%%g1 ! Don't move this insn\n" \ -+" mulscc %%g1,%3,%%g1\n" \ -+" mulscc %%g1,%3,%%g1\n" \ -+" mulscc %%g1,%3,%%g1\n" \ -+" mulscc %%g1,%3,%%g1\n" \ -+" mulscc %%g1,%3,%%g1\n" \ -+" mulscc %%g1,%3,%%g1\n" \ -+" mulscc %%g1,%3,%%g1\n" \ -+" mulscc %%g1,%3,%%g1\n" \ -+" mulscc %%g1,%3,%%g1\n" \ -+" mulscc %%g1,%3,%%g1\n" \ -+" mulscc %%g1,%3,%%g1\n" \ -+" mulscc %%g1,%3,%%g1\n" \ -+" mulscc %%g1,%3,%%g1\n" \ -+" mulscc %%g1,%3,%%g1\n" \ -+" mulscc %%g1,%3,%%g1\n" \ -+" mulscc %%g1,%3,%%g1\n" \ -+" mulscc %%g1,%3,%%g1\n" \ -+" mulscc %%g1,%3,%%g1\n" \ -+" mulscc %%g1,%3,%%g1\n" \ -+" mulscc %%g1,%3,%%g1\n" \ -+" mulscc %%g1,%3,%%g1\n" \ -+" mulscc %%g1,%3,%%g1\n" \ -+" mulscc %%g1,%3,%%g1\n" \ -+" mulscc %%g1,%3,%%g1\n" \ -+" mulscc %%g1,%3,%%g1\n" \ -+" mulscc %%g1,%3,%%g1\n" \ -+" mulscc %%g1,%3,%%g1\n" \ -+" mulscc %%g1,%3,%%g1\n" \ -+" mulscc %%g1,%3,%%g1\n" \ -+" mulscc %%g1,%3,%%g1\n" \ -+" mulscc %%g1,%3,%%g1\n" \ -+" mulscc %%g1,%3,%%g1\n" \ -+" mulscc %%g1,0,%%g1\n" \ -+" add %%g1,%%o5,%0\n" \ -+" rd %%y,%1" \ -+ : "=r" ((USItype) (w1)), \ -+ "=r" ((USItype) (w0)) \ -+ : "%rI" ((USItype) (u)), \ -+ "r" ((USItype) (v)) \ -+ : "g1", "o5" __AND_CLOBBER_CC) -+#define UMUL_TIME 39 /* 39 instructions */ -+/* It's quite necessary to add this much assembler for the sparc. -+ The default udiv_qrnnd (in C) is more than 10 times slower! */ -+#define udiv_qrnnd(__q, __r, __n1, __n0, __d) \ -+ __asm__ ("! Inlined udiv_qrnnd\n" \ -+" mov 32,%%g1\n" \ -+" subcc %1,%2,%%g0\n" \ -+"1: bcs 5f\n" \ -+" addxcc %0,%0,%0 ! shift n1n0 and a q-bit in lsb\n" \ -+" sub %1,%2,%1 ! this kills msb of n\n" \ -+" addx %1,%1,%1 ! so this can't give carry\n" \ -+" subcc %%g1,1,%%g1\n" \ -+"2: bne 1b\n" \ -+" subcc %1,%2,%%g0\n" \ -+" bcs 3f\n" \ -+" addxcc %0,%0,%0 ! shift n1n0 and a q-bit in lsb\n" \ -+" b 3f\n" \ -+" sub %1,%2,%1 ! this kills msb of n\n" \ -+"4: sub %1,%2,%1\n" \ -+"5: addxcc %1,%1,%1\n" \ -+" bcc 2b\n" \ -+" subcc %%g1,1,%%g1\n" \ -+"! Got carry from n. Subtract next step to cancel this carry.\n" \ -+" bne 4b\n" \ -+" addcc %0,%0,%0 ! shift n1n0 and a 0-bit in lsb\n" \ -+" sub %1,%2,%1\n" \ -+"3: xnor %0,0,%0\n" \ -+" ! End of inline udiv_qrnnd" \ -+ : "=&r" ((USItype) (__q)), \ -+ "=&r" ((USItype) (__r)) \ -+ : "r" ((USItype) (__d)), \ -+ "1" ((USItype) (__n1)), \ -+ "0" ((USItype) (__n0)) : "g1" __AND_CLOBBER_CC) -+#define UDIV_TIME (3+7*32) /* 7 instructions/iteration. 32 iterations. */ -+#endif /* __sparclite__ */ -+#endif /* __sparc_v8__ */ -+#endif /* sparc32 */ -+ -+#if ((defined (__sparc__) && defined (__arch64__)) || defined (__sparcv9)) \ -+ && W_TYPE_SIZE == 64 -+#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ -+ __asm__ ("addcc %r4,%5,%1\n\t" \ -+ "add %r2,%3,%0\n\t" \ -+ "bcs,a,pn %%xcc, 1f\n\t" \ -+ "add %0, 1, %0\n" \ -+ "1:" \ -+ : "=r" ((UDItype)(sh)), \ -+ "=&r" ((UDItype)(sl)) \ -+ : "%rJ" ((UDItype)(ah)), \ -+ "rI" ((UDItype)(bh)), \ -+ "%rJ" ((UDItype)(al)), \ -+ "rI" ((UDItype)(bl)) \ -+ __CLOBBER_CC) -+ -+#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ -+ __asm__ ("subcc %r4,%5,%1\n\t" \ -+ "sub %r2,%3,%0\n\t" \ -+ "bcs,a,pn %%xcc, 1f\n\t" \ -+ "sub %0, 1, %0\n\t" \ -+ "1:" \ -+ : "=r" ((UDItype)(sh)), \ -+ "=&r" ((UDItype)(sl)) \ -+ : "rJ" ((UDItype)(ah)), \ -+ "rI" ((UDItype)(bh)), \ -+ "rJ" ((UDItype)(al)), \ -+ "rI" ((UDItype)(bl)) \ -+ __CLOBBER_CC) -+ -+#define umul_ppmm(wh, wl, u, v) \ -+ do { \ -+ UDItype tmp1, tmp2, tmp3, tmp4; \ -+ __asm__ __volatile__ ( \ -+ "srl %7,0,%3\n\t" \ -+ "mulx %3,%6,%1\n\t" \ -+ "srlx %6,32,%2\n\t" \ -+ "mulx %2,%3,%4\n\t" \ -+ "sllx %4,32,%5\n\t" \ -+ "srl %6,0,%3\n\t" \ -+ "sub %1,%5,%5\n\t" \ -+ "srlx %5,32,%5\n\t" \ -+ "addcc %4,%5,%4\n\t" \ -+ "srlx %7,32,%5\n\t" \ -+ "mulx %3,%5,%3\n\t" \ -+ "mulx %2,%5,%5\n\t" \ -+ "sethi %%hi(0x80000000),%2\n\t" \ -+ "addcc %4,%3,%4\n\t" \ -+ "srlx %4,32,%4\n\t" \ -+ "add %2,%2,%2\n\t" \ -+ "movcc %%xcc,%%g0,%2\n\t" \ -+ "addcc %5,%4,%5\n\t" \ -+ "sllx %3,32,%3\n\t" \ -+ "add %1,%3,%1\n\t" \ -+ "add %5,%2,%0" \ -+ : "=r" ((UDItype)(wh)), \ -+ "=&r" ((UDItype)(wl)), \ -+ "=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3), "=&r" (tmp4) \ -+ : "r" ((UDItype)(u)), \ -+ "r" ((UDItype)(v)) \ -+ __CLOBBER_CC); \ -+ } while (0) -+#define UMUL_TIME 96 -+#define UDIV_TIME 230 -+#endif /* sparc64 */ -+ -+#if defined (__vax__) && W_TYPE_SIZE == 32 -+#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ -+ __asm__ ("addl2 %5,%1\n\tadwc %3,%0" \ -+ : "=g" ((USItype) (sh)), \ -+ "=&g" ((USItype) (sl)) \ -+ : "%0" ((USItype) (ah)), \ -+ "g" ((USItype) (bh)), \ -+ "%1" ((USItype) (al)), \ -+ "g" ((USItype) (bl))) -+#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ -+ __asm__ ("subl2 %5,%1\n\tsbwc %3,%0" \ -+ : "=g" ((USItype) (sh)), \ -+ "=&g" ((USItype) (sl)) \ -+ : "0" ((USItype) (ah)), \ -+ "g" ((USItype) (bh)), \ -+ "1" ((USItype) (al)), \ -+ "g" ((USItype) (bl))) -+#define umul_ppmm(xh, xl, m0, m1) \ -+ do { \ -+ union { \ -+ UDItype __ll; \ -+ struct {USItype __l, __h;} __i; \ -+ } __xx; \ -+ USItype __m0 = (m0), __m1 = (m1); \ -+ __asm__ ("emul %1,%2,$0,%0" \ -+ : "=r" (__xx.__ll) \ -+ : "g" (__m0), \ -+ "g" (__m1)); \ -+ (xh) = __xx.__i.__h; \ -+ (xl) = __xx.__i.__l; \ -+ (xh) += ((((SItype) __m0 >> 31) & __m1) \ -+ + (((SItype) __m1 >> 31) & __m0)); \ -+ } while (0) -+#define sdiv_qrnnd(q, r, n1, n0, d) \ -+ do { \ -+ union {DItype __ll; \ -+ struct {SItype __l, __h;} __i; \ -+ } __xx; \ -+ __xx.__i.__h = n1; __xx.__i.__l = n0; \ -+ __asm__ ("ediv %3,%2,%0,%1" \ -+ : "=g" (q), "=g" (r) \ -+ : "g" (__xx.__ll), "g" (d)); \ -+ } while (0) -+#endif /* __vax__ */ -+ -+#if defined (__z8000__) && W_TYPE_SIZE == 16 -+#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ -+ __asm__ ("add %H1,%H5\n\tadc %H0,%H3" \ -+ : "=r" ((unsigned int)(sh)), \ -+ "=&r" ((unsigned int)(sl)) \ -+ : "%0" ((unsigned int)(ah)), \ -+ "r" ((unsigned int)(bh)), \ -+ "%1" ((unsigned int)(al)), \ -+ "rQR" ((unsigned int)(bl))) -+#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ -+ __asm__ ("sub %H1,%H5\n\tsbc %H0,%H3" \ -+ : "=r" ((unsigned int)(sh)), \ -+ "=&r" ((unsigned int)(sl)) \ -+ : "0" ((unsigned int)(ah)), \ -+ "r" ((unsigned int)(bh)), \ -+ "1" ((unsigned int)(al)), \ -+ "rQR" ((unsigned int)(bl))) -+#define umul_ppmm(xh, xl, m0, m1) \ -+ do { \ -+ union {long int __ll; \ -+ struct {unsigned int __h, __l;} __i; \ -+ } __xx; \ -+ unsigned int __m0 = (m0), __m1 = (m1); \ -+ __asm__ ("mult %S0,%H3" \ -+ : "=r" (__xx.__i.__h), \ -+ "=r" (__xx.__i.__l) \ -+ : "%1" (__m0), \ -+ "rQR" (__m1)); \ -+ (xh) = __xx.__i.__h; (xl) = __xx.__i.__l; \ -+ (xh) += ((((signed int) __m0 >> 15) & __m1) \ -+ + (((signed int) __m1 >> 15) & __m0)); \ -+ } while (0) -+#endif /* __z8000__ */ -+ -+#endif /* __GNUC__ */ -+ -+/* If this machine has no inline assembler, use C macros. */ -+ -+#if !defined (add_ssaaaa) -+#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ -+ do { \ -+ UWtype __x; \ -+ __x = (al) + (bl); \ -+ (sh) = (ah) + (bh) + (__x < (al)); \ -+ (sl) = __x; \ -+ } while (0) -+#endif -+ -+#if !defined (sub_ddmmss) -+#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ -+ do { \ -+ UWtype __x; \ -+ __x = (al) - (bl); \ -+ (sh) = (ah) - (bh) - (__x > (al)); \ -+ (sl) = __x; \ -+ } while (0) -+#endif -+ -+#if !defined (umul_ppmm) -+#define umul_ppmm(w1, w0, u, v) \ -+ do { \ -+ UWtype __x0, __x1, __x2, __x3; \ -+ UHWtype __ul, __vl, __uh, __vh; \ -+ \ -+ __ul = __ll_lowpart (u); \ -+ __uh = __ll_highpart (u); \ -+ __vl = __ll_lowpart (v); \ -+ __vh = __ll_highpart (v); \ -+ \ -+ __x0 = (UWtype) __ul * __vl; \ -+ __x1 = (UWtype) __ul * __vh; \ -+ __x2 = (UWtype) __uh * __vl; \ -+ __x3 = (UWtype) __uh * __vh; \ -+ \ -+ __x1 += __ll_highpart (__x0);/* this can't give carry */ \ -+ __x1 += __x2; /* but this indeed can */ \ -+ if (__x1 < __x2) /* did we get it? */ \ -+ __x3 += __ll_B; /* yes, add it in the proper pos. */ \ -+ \ -+ (w1) = __x3 + __ll_highpart (__x1); \ -+ (w0) = __ll_lowpart (__x1) * __ll_B + __ll_lowpart (__x0); \ -+ } while (0) -+#endif -+ -+#if !defined (__umulsidi3) -+#define __umulsidi3(u, v) \ -+ ({DWunion __w; \ -+ umul_ppmm (__w.s.high, __w.s.low, u, v); \ -+ __w.ll; }) -+#endif -+ -+/* Define this unconditionally, so it can be used for debugging. */ -+#define __udiv_qrnnd_c(q, r, n1, n0, d) \ -+ do { \ -+ UWtype __d1, __d0, __q1, __q0; \ -+ UWtype __r1, __r0, __m; \ -+ __d1 = __ll_highpart (d); \ -+ __d0 = __ll_lowpart (d); \ -+ \ -+ __r1 = (n1) % __d1; \ -+ __q1 = (n1) / __d1; \ -+ __m = (UWtype) __q1 * __d0; \ -+ __r1 = __r1 * __ll_B | __ll_highpart (n0); \ -+ if (__r1 < __m) \ -+ { \ -+ __q1--, __r1 += (d); \ -+ if (__r1 >= (d)) /* i.e. we didn't get carry when adding to __r1 */\ -+ if (__r1 < __m) \ -+ __q1--, __r1 += (d); \ -+ } \ -+ __r1 -= __m; \ -+ \ -+ __r0 = __r1 % __d1; \ -+ __q0 = __r1 / __d1; \ -+ __m = (UWtype) __q0 * __d0; \ -+ __r0 = __r0 * __ll_B | __ll_lowpart (n0); \ -+ if (__r0 < __m) \ -+ { \ -+ __q0--, __r0 += (d); \ -+ if (__r0 >= (d)) \ -+ if (__r0 < __m) \ -+ __q0--, __r0 += (d); \ -+ } \ -+ __r0 -= __m; \ -+ \ -+ (q) = (UWtype) __q1 * __ll_B | __q0; \ -+ (r) = __r0; \ -+ } while (0) -+ -+/* If the processor has no udiv_qrnnd but sdiv_qrnnd, go through -+ __udiv_w_sdiv (defined in libgcc or elsewhere). */ -+#if !defined (udiv_qrnnd) && defined (sdiv_qrnnd) -+#define udiv_qrnnd(q, r, nh, nl, d) \ -+ do { \ -+ USItype __r; \ -+ (q) = __udiv_w_sdiv (&__r, nh, nl, d); \ -+ (r) = __r; \ -+ } while (0) -+#endif -+ -+/* If udiv_qrnnd was not defined for this processor, use __udiv_qrnnd_c. */ -+#if !defined (udiv_qrnnd) -+#define UDIV_NEEDS_NORMALIZATION 1 -+#define udiv_qrnnd __udiv_qrnnd_c -+#endif -+ -+#if !defined (count_leading_zeros) -+extern const UQItype __clz_tab[]; -+#define count_leading_zeros(count, x) \ -+ do { \ -+ UWtype __xr = (x); \ -+ UWtype __a; \ -+ \ -+ if (W_TYPE_SIZE <= 32) \ -+ { \ -+ __a = __xr < ((UWtype)1<<2*__BITS4) \ -+ ? (__xr < ((UWtype)1<<__BITS4) ? 0 : __BITS4) \ -+ : (__xr < ((UWtype)1<<3*__BITS4) ? 2*__BITS4 : 3*__BITS4); \ -+ } \ -+ else \ -+ { \ -+ for (__a = W_TYPE_SIZE - 8; __a > 0; __a -= 8) \ -+ if (((__xr >> __a) & 0xff) != 0) \ -+ break; \ -+ } \ -+ \ -+ (count) = W_TYPE_SIZE - (__clz_tab[__xr >> __a] + __a); \ -+ } while (0) -+#define COUNT_LEADING_ZEROS_0 W_TYPE_SIZE -+#endif -+ -+#if !defined (count_trailing_zeros) -+/* Define count_trailing_zeros using count_leading_zeros. The latter might be -+ defined in asm, but if it is not, the C version above is good enough. */ -+#define count_trailing_zeros(count, x) \ -+ do { \ -+ UWtype __ctz_x = (x); \ -+ UWtype __ctz_c; \ -+ count_leading_zeros (__ctz_c, __ctz_x & -__ctz_x); \ -+ (count) = W_TYPE_SIZE - 1 - __ctz_c; \ -+ } while (0) -+#endif -+ -+#ifndef UDIV_NEEDS_NORMALIZATION -+#define UDIV_NEEDS_NORMALIZATION 0 -+#endif -diff -Nurp linux-5.6.11/3rdparty/ndiswrapper/Makefile linux-5.6.11-ndis/3rdparty/ndiswrapper/Makefile ---- linux-5.6.11/3rdparty/ndiswrapper/Makefile 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.6.11-ndis/3rdparty/ndiswrapper/Makefile 2020-05-03 15:18:33.000000000 +0300 -@@ -0,0 +1,213 @@ -+# Name of the module -+MODNAME = ndiswrapper -+ -+DISTFILES = \ -+ Makefile crt.c divdi3.c hal.c iw_ndis.c iw_ndis.h lin2win.S lin2win.h \ -+ loader.c loader.h longlong.h mkexport.sh mkstubs.sh ndis.c ndis.h \ -+ ndiswrapper.h ntoskernel.c ntoskernel.h ntoskernel_io.c pe_linker.c \ -+ pe_linker.h pnp.c pnp.h proc.c rtl.c usb.c usb.h win2lin_stubs.S \ -+ winnt_types.h workqueue.c wrapmem.c wrapmem.h wrapndis.c wrapndis.h \ -+ wrapper.c wrapper.h -+ -+# By default, we try to compile the modules for the currently running -+# kernel. But it's the first approximation, as we will re-read the -+# version from the kernel sources. -+KVERS_UNAME ?= $(shell uname -r) -+ -+# KBUILD is the path to the Linux kernel build tree. It is usually the -+# same as the kernel source tree, except when the kernel was compiled in -+# a separate directory. -+KBUILD ?= $(shell readlink -f /lib/modules/$(KVERS_UNAME)/build) -+ -+ifeq (,$(KBUILD)) -+$(error Kernel build tree not found - please set KBUILD to configured kernel) -+endif -+ -+KCONFIG := $(KBUILD)/.config -+ifeq (,$(wildcard $(KCONFIG))) -+$(error No .config found in $(KBUILD), please set KBUILD to configured kernel) -+endif -+ -+ifneq (,$(wildcard $(KBUILD)/include/linux/version.h)) -+ifneq (,$(wildcard $(KBUILD)/include/generated/uapi/linux/version.h)) -+$(error Multiple copies of version.h found, please clean your build tree) -+endif -+endif -+ -+# Kernel Makefile doesn't always know the exact kernel version, so we -+# get it from the kernel headers instead and pass it to make. -+VERSION_H := $(KBUILD)/include/generated/utsrelease.h -+ifeq (,$(wildcard $(VERSION_H))) -+VERSION_H := $(KBUILD)/include/linux/utsrelease.h -+endif -+ifeq (,$(wildcard $(VERSION_H))) -+VERSION_H := $(KBUILD)/include/linux/version.h -+endif -+ifeq (,$(wildcard $(VERSION_H))) -+$(error Please run 'make modules_prepare' in $(KBUILD)) -+endif -+ -+KVERS := $(shell sed -ne 's/"//g;s/^\#define UTS_RELEASE //p' $(VERSION_H)) -+ -+ifeq (,$(KVERS)) -+$(error Cannot find UTS_RELEASE in $(VERSION_H), please report) -+endif -+ -+INST_DIR = /lib/modules/$(KVERS)/misc -+ -+SRC_DIR=$(shell pwd) -+ -+include $(KCONFIG) -+ -+# returns of structs and unions in registers when possible, like Windows -+EXTRA_CFLAGS += -freg-struct-return -+ -+# to produce debug trace, add option "DEBUG=" where is 1 to 6 -+ifdef DEBUG -+EXTRA_CFLAGS += -DDEBUG=$(DEBUG) -g -+endif -+ -+# to debug timers, add option "TIMER_DEBUG=1" -+ifdef TIMER_DEBUG -+EXTRA_CFLAGS += -DTIMER_DEBUG -+endif -+ -+# to debug event layer, add option "EVENT_DEBUG=1" -+ifdef EVENT_DEBUG -+EXTRA_CFLAGS += -DEVENT_DEBUG -+endif -+ -+# to debug USB layer, add option "USB_DEBUG=1" -+ifdef USB_DEBUG -+EXTRA_CFLAGS += -DUSB_DEBUG -+endif -+ -+# to debug I/O layer, add option "IO_DEBUG=1" -+ifdef IO_DEBUG -+EXTRA_CFLAGS += -DIO_DEBUG -+endif -+ -+# to debug worker threads, add option "WORK_DEBUG=1" -+ifdef WORK_DEBUG -+EXTRA_CFLAGS += -DWORK_DEBUG -+endif -+ -+# to debug memory allocation, add option "ALLOC_DEBUG=" where is 1 or 2 -+ifdef ALLOC_DEBUG -+EXTRA_CFLAGS += -DALLOC_DEBUG=$(ALLOC_DEBUG) -+endif -+ -+OBJS = crt.o hal.o iw_ndis.o loader.o ndis.o ntoskernel.o ntoskernel_io.o \ -+ pe_linker.o pnp.o proc.o rtl.o wrapmem.o wrapndis.o wrapper.o -+ -+EXPORT_SRCS = crt.c hal.c ndis.c ntoskernel.c ntoskernel_io.c rtl.c -+ -+STUB_SRCS = crt.c hal.c ndis.c ntoskernel.c ntoskernel_io.c \ -+ pnp.c rtl.c wrapndis.c -+ -+ -+# By default, USB layer is compiled in if USB support is in kernel; -+# to disable USB support in ndiswrapper even if USB support is in kernel, -+# add option "DISABLE_USB=1" -+ifndef DISABLE_USB -+ifeq ($(CONFIG_USB),y) -+ENABLE_USB = 1 -+endif -+ifeq ($(CONFIG_USB),m) -+ENABLE_USB = 1 -+endif -+endif -+ -+ifdef ENABLE_USB -+EXPORT_SRCS += usb.c -+STUB_SRCS += usb.c -+OBJS += usb.o -+EXTRA_CFLAGS += -DENABLE_USB -+endif -+ -+ifdef WRAP_WQ -+EXTRA_CFLAGS += -DWRAP_WQ -+OBJS += workqueue.o -+endif -+ -+ -+all: config_check modules -+ -+# generate exports symbol table from C files -+quiet_cmd_mkexport = MKEXPORT $@ -+cmd_mkexport = $(SHELL) $(obj)/mkexport.sh $< $@ -+ -+extra-y += $(EXPORT_SRCS:.c=_exports.h) -+%_exports.h: %.c $(obj)/mkexport.sh FORCE -+ $(call if_changed,mkexport) -+ -+$(addprefix $(obj)/,$(EXPORT_SRCS:.c=.o)): %.o: %_exports.h -+ -+ifeq ($(CONFIG_X86_64),y) -+quiet_cmd_mkstubs = MKSTUBS $@ -+cmd_mkstubs = $(SHELL) $(obj)/mkstubs.sh $(addprefix $(src)/,$(STUB_SRCS)) >$@ -+ -+extra-y += win2lin_stubs.h -+$(obj)/win2lin_stubs.h: $(addprefix $(src)/,$(STUB_SRCS)) FORCE -+ $(call if_changed,mkstubs) -+ -+$(obj)/win2lin_stubs.o: $(obj)/win2lin_stubs.h -+OBJS += win2lin_stubs.o lin2win.o -+else -+OBJS += divdi3.o -+endif -+ -+MODULE := $(MODNAME).ko -+obj-m := $(MODNAME).o -+ -+$(MODNAME)-objs := $(OBJS) -+ -+ -+config_check: -+ @if [ -z "$(CONFIG_WIRELESS_EXT)$(CONFIG_NET_RADIO)" ]; then \ -+ echo; echo; \ -+ echo "*** WARNING: This kernel lacks wireless extensions."; \ -+ echo "Wireless drivers will not work properly."; \ -+ echo; echo; \ -+ fi -+ @if [ -z "$(CONFIG_X86_64)" ] && [ -n "$(CONFIG_4KSTACKS)" ]; then \ -+ echo; echo; \ -+ echo "*** WARNING: This kernel uses 4K stack size option"; \ -+ echo "(CONFIG_4KSTACKS); many Windows drivers will not work"; \ -+ echo "with this option enabled. Disable CONFIG_4KSTACKS"; \ -+ echo "in kernel's .config file, recompile and install kernel"; \ -+ echo; echo; \ -+ fi -+ -+modules: -+ $(MAKE) -C $(KBUILD) M=$(SRC_DIR) -+ -+$(MODULE): -+ $(MAKE) modules -+ -+clean: -+ rm -f *.o *.ko .*.cmd *.mod.c *.symvers modules.order *~ .\#* -+ rm -f *_exports.h win2lin_stubs.h -+ rm -rf .tmp_versions -+ -+install: config_check $(MODULE) -+ @/sbin/modinfo $(MODULE) | grep -q "^vermagic: *$(KVERS) " || \ -+ { echo "$(MODULE)" is not for Linux $(KVERS); exit 1; } -+ mkdir -p -m 755 $(DESTDIR)$(INST_DIR) -+ install -m 0644 $(MODULE) $(DESTDIR)$(INST_DIR) -+ifndef DESTDIR -+ -/sbin/depmod -a $(KVERS) -+endif -+ -+uninstall: -+ rm -f $(DESTDIR)$(INST_DIR)/$(MODULE) -+ifndef DESTDIR -+ -/sbin/depmod -a $(KVERS) -+endif -+ -+dist: -+ @for file in $(DISTFILES); do \ -+ cp $$file $(distdir)/$$file || exit 1; \ -+ done -+ -+.PHONY: all modules clean install config_check dist -diff -Nurp linux-5.6.11/3rdparty/ndiswrapper/mkexport.sh linux-5.6.11-ndis/3rdparty/ndiswrapper/mkexport.sh ---- linux-5.6.11/3rdparty/ndiswrapper/mkexport.sh 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.6.11-ndis/3rdparty/ndiswrapper/mkexport.sh 2020-05-03 15:18:33.000000000 +0300 -@@ -0,0 +1,42 @@ -+#! /bin/sh -+ -+# Generate exports symbol table from C files -+ -+input="$1" -+output="$2" -+exports=$(basename "$output" .h) -+exec >"$output" -+ -+echo "/* automatically generated from src */"; -+ -+sed -n -e '/^\(wstdcall\|wfastcall\|noregparm\|regparm3\|__attribute__\)/{ -+:more -+N -+s/\([^{]\)$/\1/ -+t more -+s/\n{$/;/ -+p -+}' $input -+ -+echo "#ifdef CONFIG_X86_64"; -+ -+sed -n \ -+ -e 's/.*WIN_FUNC(\([^\,]\+\) *\, *\([0-9]\+\)).*/'\ -+'WIN_FUNC_DECL(\1, \2)/p' \ -+ -e 's/.*WIN_FUNC_PTR(\([^\,]\+\) *\, *\([0-9]\+\)).*/'\ -+'WIN_FUNC_DECL(\1, \2)/p' $input | sort -u -+ -+echo "#endif" -+echo "extern struct wrap_export $exports[];" -+echo "struct wrap_export $exports[] = {" -+ -+sed -n \ -+ -e 's/.*WIN_FUNC(_win_\([^\,]\+\) *\, *\([0-9]\+\)).*/'\ -+' WIN_WIN_SYMBOL(\1, \2),/p' \ -+ -e 's/.*WIN_FUNC(\([^\,]\+\) *\, *\([0-9]\+\)).*/'\ -+' WIN_SYMBOL(\1, \2),/p' \ -+ -e 's/.*WIN_SYMBOL_MAP(\("[^"]\+"\)[ ,\n]\+\([^)]\+\)).*/'\ -+' {\1, (generic_func)\2},/p' $input | sort -u -+ -+echo " {NULL, NULL}" -+echo "};" -diff -Nurp linux-5.6.11/3rdparty/ndiswrapper/mkstubs.sh linux-5.6.11-ndis/3rdparty/ndiswrapper/mkstubs.sh ---- linux-5.6.11/3rdparty/ndiswrapper/mkstubs.sh 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.6.11-ndis/3rdparty/ndiswrapper/mkstubs.sh 2020-05-03 15:18:33.000000000 +0300 -@@ -0,0 +1,12 @@ -+#! /bin/sh -+ -+for file in "$@"; do -+ echo -+ echo "# automatically generated from $file" -+ sed -n \ -+ -e 's/.*WIN_FUNC(\([^\,]\+\) *\, *\([0-9]\+\)).*/\ -+ win2lin(\1, \2)/p' \ -+ -e 's/.*WIN_FUNC_PTR(\([^\,]\+\) *\, *\([0-9]\+\)).*/\ -+ win2lin(\1, \2)/p' \ -+ $file | sed -e 's/[ \t ]\+//' | sort -u; \ -+done -diff -Nurp linux-5.6.11/3rdparty/ndiswrapper/ndis.c linux-5.6.11-ndis/3rdparty/ndiswrapper/ndis.c ---- linux-5.6.11/3rdparty/ndiswrapper/ndis.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.6.11-ndis/3rdparty/ndiswrapper/ndis.c 2020-05-03 15:18:33.000000000 +0300 -@@ -0,0 +1,3031 @@ -+/* -+ * Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ */ -+ -+#include "ndis.h" -+#include "iw_ndis.h" -+#include "wrapndis.h" -+#include "pnp.h" -+#include "loader.h" -+#include -+#include -+#include "ndis_exports.h" -+ -+#define MAX_ALLOCATED_NDIS_PACKETS TX_RING_SIZE -+#define MAX_ALLOCATED_NDIS_BUFFERS TX_RING_SIZE -+ -+static struct work_struct ndis_work; -+static struct nt_list ndis_work_list; -+static spinlock_t ndis_work_list_lock; -+ -+struct workqueue_struct *ndis_wq; -+ -+static void *ndis_get_routine_address(char *name); -+ -+wstdcall void WIN_FUNC(NdisInitializeWrapper,4) -+ (void **driver_handle, struct driver_object *driver, -+ struct unicode_string *reg_path, void *unused) -+{ -+ ENTER1("handle: %p, driver: %p", driver_handle, driver); -+ *driver_handle = driver; -+ EXIT1(return); -+} -+ -+wstdcall void WIN_FUNC(NdisTerminateWrapper,2) -+ (struct device_object *dev_obj, void *system_specific) -+{ -+ EXIT1(return); -+} -+ -+wstdcall NDIS_STATUS WIN_FUNC(NdisMRegisterMiniport,3) -+ (struct driver_object *drv_obj, struct miniport *mp, UINT length) -+{ -+ int min_length; -+ struct wrap_driver *wrap_driver; -+ struct ndis_driver *ndis_driver; -+ -+ min_length = ((char *)&mp->co_create_vc) - ((char *)mp); -+ -+ ENTER1("%p %p %d", drv_obj, mp, length); -+ -+ if (mp->major_version < 4) { -+ ERROR("Driver is using ndis version %d which is too old.", -+ mp->major_version); -+ EXIT1(return NDIS_STATUS_BAD_VERSION); -+ } -+ -+ if (length < min_length) { -+ ERROR("Characteristics length %d is too small", length); -+ EXIT1(return NDIS_STATUS_BAD_CHARACTERISTICS); -+ } -+ -+ TRACE1("%d.%d, %d, %u", mp->major_version, mp->minor_version, length, -+ (u32)sizeof(struct miniport)); -+ wrap_driver = IoGetDriverObjectExtension(drv_obj, -+ (void *)WRAP_DRIVER_CLIENT_ID); -+ if (!wrap_driver) { -+ ERROR("couldn't get wrap_driver"); -+ EXIT1(return NDIS_STATUS_RESOURCES); -+ } -+ if (IoAllocateDriverObjectExtension( -+ drv_obj, (void *)NDIS_DRIVER_CLIENT_ID, -+ sizeof(*ndis_driver), (void **)&ndis_driver) != -+ STATUS_SUCCESS) -+ EXIT1(return NDIS_STATUS_RESOURCES); -+ wrap_driver->ndis_driver = ndis_driver; -+ TRACE1("driver: %p", ndis_driver); -+ memcpy(&ndis_driver->mp, mp, min_t(int, sizeof(*mp), length)); -+ -+ DBG_BLOCK(2) { -+ int i; -+ void **func; -+ char *mp_funcs[] = { -+ "queryinfo", "reconfig", "reset", "send", "setinfo", -+ "tx_data", "return_packet", "send_packets", -+ "alloc_complete", "co_create_vc", "co_delete_vc", -+ "co_activate_vc", "co_deactivate_vc", -+ "co_send_packets", "co_request", "cancel_send_packets", -+ "pnp_event_notify", "shutdown", -+ }; -+ func = (void **)&ndis_driver->mp.queryinfo; -+ for (i = 0; i < ARRAY_SIZE(mp_funcs); i++) -+ TRACE0("function '%s' is at %p", mp_funcs[i], func[i]); -+ } -+ EXIT1(return NDIS_STATUS_SUCCESS); -+} -+ -+wstdcall NDIS_STATUS WIN_FUNC(NdisMRegisterDevice,6) -+ (struct driver_object *drv_obj, struct unicode_string *dev_name, -+ struct unicode_string *link, void **funcs, -+ struct device_object **dev_obj, void **dev_obj_handle) -+{ -+ NTSTATUS status; -+ struct device_object *tmp; -+ int i; -+ -+ ENTER1("%p, %p, %p", drv_obj, dev_name, link); -+ status = IoCreateDevice(drv_obj, 0, dev_name, FILE_DEVICE_NETWORK, 0, -+ FALSE, &tmp); -+ -+ if (status != STATUS_SUCCESS) -+ EXIT1(return NDIS_STATUS_RESOURCES); -+ if (link) -+ status = IoCreateSymbolicLink(link, dev_name); -+ if (status != STATUS_SUCCESS) { -+ IoDeleteDevice(tmp); -+ EXIT1(return NDIS_STATUS_RESOURCES); -+ } -+ -+ *dev_obj = tmp; -+ *dev_obj_handle = *dev_obj; -+ for (i = 0; i < IRP_MJ_MAXIMUM_FUNCTION; i++) -+ if (funcs[i] && i != IRP_MJ_PNP && i != IRP_MJ_POWER) { -+ drv_obj->major_func[i] = funcs[i]; -+ TRACE1("mj_fn for 0x%x is at %p", i, funcs[i]); -+ } -+ EXIT1(return NDIS_STATUS_SUCCESS); -+} -+ -+wstdcall NDIS_STATUS WIN_FUNC(NdisMDeregisterDevice,1) -+ (struct device_object *dev_obj) -+{ -+ ENTER2("%p", dev_obj); -+ IoDeleteDevice(dev_obj); -+ return NDIS_STATUS_SUCCESS; -+} -+ -+wstdcall NDIS_STATUS WIN_FUNC(NdisAllocateMemoryWithTag,3) -+ (void **dest, UINT length, ULONG tag) -+{ -+ void *addr; -+ -+ assert_irql(_irql_ <= DISPATCH_LEVEL); -+ addr = ExAllocatePoolWithTag(NonPagedPool, length, tag); -+ TRACE4("%p", addr); -+ if (addr) { -+ *dest = addr; -+ EXIT4(return NDIS_STATUS_SUCCESS); -+ } else -+ EXIT4(return NDIS_STATUS_FAILURE); -+} -+ -+wstdcall NDIS_STATUS WIN_FUNC(NdisAllocateMemory,4) -+ (void **dest, UINT length, UINT flags, NDIS_PHY_ADDRESS highest_address) -+{ -+ return NdisAllocateMemoryWithTag(dest, length, 0); -+} -+ -+/* length_tag is either length or tag, depending on if -+ * NdisAllocateMemory or NdisAllocateMemoryTag is used to allocate -+ * memory */ -+wstdcall void WIN_FUNC(NdisFreeMemory,3) -+ (void *addr, UINT length_tag, UINT flags) -+{ -+ TRACE4("%p", addr); -+ ExFreePool(addr); -+} -+ -+noregparm void WIN_FUNC(NdisWriteErrorLogEntry,12) -+ (struct driver_object *drv_obj, ULONG error, ULONG count, ...) -+{ -+ va_list args; -+ int i; -+ ULONG code; -+ -+ va_start(args, count); -+ ERROR("log: %08X, count: %d, return_address: %p", -+ error, count, __builtin_return_address(0)); -+ for (i = 0; i < count; i++) { -+ code = va_arg(args, ULONG); -+ ERROR("code: 0x%x", code); -+ } -+ va_end(args); -+ EXIT2(return); -+} -+ -+wstdcall void WIN_FUNC(NdisOpenConfiguration,3) -+ (NDIS_STATUS *status, struct ndis_mp_block **conf_handle, -+ struct ndis_mp_block *handle) -+{ -+ ENTER2("%p", conf_handle); -+ *conf_handle = handle; -+ *status = NDIS_STATUS_SUCCESS; -+ EXIT2(return); -+} -+ -+wstdcall void WIN_FUNC(NdisOpenProtocolConfiguration,3) -+ (NDIS_STATUS *status, void **confhandle, -+ struct unicode_string *section) -+{ -+ ENTER2("%p", confhandle); -+ *status = NDIS_STATUS_SUCCESS; -+ EXIT2(return); -+} -+ -+wstdcall void WIN_FUNC(NdisOpenConfigurationKeyByName,4) -+ (NDIS_STATUS *status, void *handle, -+ struct unicode_string *key, void **subkeyhandle) -+{ -+ struct ansi_string ansi; -+ ENTER2(""); -+ if (RtlUnicodeStringToAnsiString(&ansi, key, TRUE) == STATUS_SUCCESS) { -+ TRACE2("%s", ansi.buf); -+ RtlFreeAnsiString(&ansi); -+ } -+ *subkeyhandle = handle; -+ *status = NDIS_STATUS_SUCCESS; -+ EXIT2(return); -+} -+ -+wstdcall void WIN_FUNC(NdisOpenConfigurationKeyByIndex,5) -+ (NDIS_STATUS *status, void *handle, ULONG index, -+ struct unicode_string *key, void **subkeyhandle) -+{ -+ ENTER2("%u", index); -+// *subkeyhandle = handle; -+ *status = NDIS_STATUS_FAILURE; -+ EXIT2(return); -+} -+ -+wstdcall void WIN_FUNC(NdisCloseConfiguration,1) -+ (void *handle) -+{ -+ /* instead of freeing all configuration parameters as we are -+ * supposed to do here, we free them when the device is -+ * removed */ -+ ENTER2("%p", handle); -+ return; -+} -+ -+wstdcall void WIN_FUNC(NdisOpenFile,5) -+ (NDIS_STATUS *status, struct wrap_bin_file **file, -+ UINT *filelength, struct unicode_string *filename, -+ NDIS_PHY_ADDRESS highest_address) -+{ -+ struct ansi_string ansi; -+ struct wrap_bin_file *bin_file; -+ -+ ENTER2("%p, %d, %llx, %p", status, *filelength, highest_address, *file); -+ if (RtlUnicodeStringToAnsiString(&ansi, filename, TRUE) != -+ STATUS_SUCCESS) { -+ *status = NDIS_STATUS_RESOURCES; -+ EXIT2(return); -+ } -+ TRACE2("%s", ansi.buf); -+ bin_file = get_bin_file(ansi.buf); -+ if (bin_file) { -+ *file = bin_file; -+ *filelength = bin_file->size; -+ *status = NDIS_STATUS_SUCCESS; -+ } else -+ *status = NDIS_STATUS_FILE_NOT_FOUND; -+ -+ RtlFreeAnsiString(&ansi); -+ EXIT2(return); -+} -+ -+wstdcall void WIN_FUNC(NdisMapFile,3) -+ (NDIS_STATUS *status, void **mappedbuffer, struct wrap_bin_file *file) -+{ -+ ENTER2("%p", file); -+ -+ if (!file) { -+ *status = NDIS_STATUS_ALREADY_MAPPED; -+ EXIT2(return); -+ } -+ -+ *status = NDIS_STATUS_SUCCESS; -+ *mappedbuffer = file->data; -+ EXIT2(return); -+} -+ -+wstdcall void WIN_FUNC(NdisUnmapFile,1) -+ (struct wrap_bin_file *file) -+{ -+ ENTER2("%p", file); -+ EXIT2(return); -+} -+ -+wstdcall void WIN_FUNC(NdisCloseFile,1) -+ (struct wrap_bin_file *file) -+{ -+ ENTER2("%p", file); -+ free_bin_file(file); -+ EXIT2(return); -+} -+ -+wstdcall void WIN_FUNC(NdisGetSystemUpTime,1) -+ (ULONG *ms) -+{ -+ *ms = 1000 * jiffies / HZ; -+ EXIT5(return); -+} -+ -+wstdcall ULONG WIN_FUNC(NDIS_BUFFER_TO_SPAN_PAGES,1) -+ (ndis_buffer *buffer) -+{ -+ ULONG n, length; -+ -+ if (buffer == NULL) -+ EXIT2(return 0); -+ if (MmGetMdlByteCount(buffer) == 0) -+ EXIT2(return 1); -+ -+ length = MmGetMdlByteCount(buffer); -+ n = SPAN_PAGES(MmGetMdlVirtualAddress(buffer), length); -+ TRACE4("%p, %p, %d, %d", buffer->startva, buffer->mappedsystemva, -+ length, n); -+ EXIT3(return n); -+} -+ -+wstdcall void WIN_FUNC(NdisGetBufferPhysicalArraySize,2) -+ (ndis_buffer *buffer, UINT *arraysize) -+{ -+ ENTER3("%p", buffer); -+ *arraysize = NDIS_BUFFER_TO_SPAN_PAGES(buffer); -+ EXIT3(return); -+} -+ -+static struct ndis_configuration_parameter * -+ndis_encode_setting(struct wrap_device_setting *setting, -+ enum ndis_parameter_type type) -+{ -+ struct ansi_string ansi; -+ struct ndis_configuration_parameter *param; -+ -+ param = setting->encoded; -+ if (param) { -+ if (param->type == type) -+ EXIT2(return param); -+ if (param->type == NdisParameterString) -+ RtlFreeUnicodeString(¶m->data.string); -+ setting->encoded = NULL; -+ } else -+ param = ExAllocatePoolWithTag(NonPagedPool, sizeof(*param), 0); -+ if (!param) { -+ ERROR("couldn't allocate memory"); -+ return NULL; -+ } -+ switch (type) { -+ case NdisParameterInteger: -+ param->data.integer = simple_strtol(setting->value, NULL, 0); -+ TRACE2("0x%x", param->data.integer); -+ break; -+ case NdisParameterHexInteger: -+ param->data.integer = simple_strtol(setting->value, NULL, 16); -+ TRACE2("0x%x", param->data.integer); -+ break; -+ case NdisParameterString: -+ RtlInitAnsiString(&ansi, setting->value); -+ TRACE2("'%s'", ansi.buf); -+ if (RtlAnsiStringToUnicodeString(¶m->data.string, -+ &ansi, TRUE)) { -+ ExFreePool(param); -+ EXIT2(return NULL); -+ } -+ break; -+ case NdisParameterBinary: -+ param->data.integer = simple_strtol(setting->value, NULL, 2); -+ TRACE2("0x%x", param->data.integer); -+ break; -+ default: -+ ERROR("unknown type: %d", type); -+ ExFreePool(param); -+ return NULL; -+ } -+ param->type = type; -+ setting->encoded = param; -+ EXIT2(return param); -+} -+ -+static int ndis_decode_setting(struct wrap_device_setting *setting, -+ struct ndis_configuration_parameter *param) -+{ -+ struct ansi_string ansi; -+ struct ndis_configuration_parameter *prev; -+ -+ ENTER2("%p, %p", setting, param); -+ prev = setting->encoded; -+ if (prev && prev->type == NdisParameterString) { -+ RtlFreeUnicodeString(&prev->data.string); -+ setting->encoded = NULL; -+ } -+ switch (param->type) { -+ case NdisParameterInteger: -+ snprintf(setting->value, MAX_SETTING_VALUE_LEN, "%u", -+ param->data.integer); -+ break; -+ case NdisParameterHexInteger: -+ snprintf(setting->value, MAX_SETTING_VALUE_LEN, "%x", -+ param->data.integer); -+ break; -+ case NdisParameterString: -+ ansi.buf = setting->value; -+ ansi.max_length = MAX_SETTING_VALUE_LEN; -+ if ((RtlUnicodeStringToAnsiString(&ansi, ¶m->data.string, -+ FALSE) != STATUS_SUCCESS) -+ || ansi.length >= MAX_SETTING_VALUE_LEN) { -+ EXIT1(return -1); -+ } -+ if (ansi.length == ansi.max_length) -+ ansi.length--; -+ setting->value[ansi.length] = 0; -+ break; -+ default: -+ TRACE2("unknown setting type: %d", param->type); -+ return -1; -+ } -+ TRACE2("setting changed %s='%s', %d", setting->name, setting->value, -+ ansi.length); -+ return 0; -+} -+ -+static int read_setting(struct nt_list *setting_list, char *keyname, int length, -+ struct ndis_configuration_parameter **param, -+ enum ndis_parameter_type type) -+{ -+ struct wrap_device_setting *setting; -+ mutex_lock(&loader_mutex); -+ nt_list_for_each_entry(setting, setting_list, list) { -+ if (strncasecmp(keyname, setting->name, length) == 0) { -+ TRACE2("setting %s='%s'", keyname, setting->value); -+ mutex_unlock(&loader_mutex); -+ *param = ndis_encode_setting(setting, type); -+ if (*param) -+ EXIT2(return 0); -+ else -+ EXIT2(return -1); -+ } -+ } -+ mutex_unlock(&loader_mutex); -+ EXIT2(return -1); -+} -+ -+wstdcall void WIN_FUNC(NdisReadConfiguration,5) -+ (NDIS_STATUS *status, struct ndis_configuration_parameter **param, -+ struct ndis_mp_block *nmb, struct unicode_string *key, -+ enum ndis_parameter_type type) -+{ -+ struct ansi_string ansi; -+ int ret; -+ -+ ENTER2("nmb: %p", nmb); -+ ret = RtlUnicodeStringToAnsiString(&ansi, key, TRUE); -+ if (ret != STATUS_SUCCESS || ansi.buf == NULL) { -+ *param = NULL; -+ *status = NDIS_STATUS_FAILURE; -+ RtlFreeAnsiString(&ansi); -+ EXIT2(return); -+ } -+ TRACE2("%d, %s", type, ansi.buf); -+ -+ if (read_setting(&nmb->wnd->wd->settings, ansi.buf, -+ ansi.length, param, type) == 0 || -+ read_setting(&nmb->wnd->wd->driver->settings, ansi.buf, -+ ansi.length, param, type) == 0) -+ *status = NDIS_STATUS_SUCCESS; -+ else { -+ TRACE2("setting %s not found (type:%d)", ansi.buf, type); -+ *status = NDIS_STATUS_FAILURE; -+ } -+ RtlFreeAnsiString(&ansi); -+ EXIT2(return); -+ -+} -+ -+wstdcall void WIN_FUNC(NdisWriteConfiguration,4) -+ (NDIS_STATUS *status, struct ndis_mp_block *nmb, -+ struct unicode_string *key, struct ndis_configuration_parameter *param) -+{ -+ struct ansi_string ansi; -+ char *keyname; -+ struct wrap_device_setting *setting; -+ -+ ENTER2("nmb: %p", nmb); -+ if (RtlUnicodeStringToAnsiString(&ansi, key, TRUE)) { -+ *status = NDIS_STATUS_FAILURE; -+ EXIT2(return); -+ } -+ keyname = ansi.buf; -+ TRACE2("%s", keyname); -+ -+ mutex_lock(&loader_mutex); -+ nt_list_for_each_entry(setting, &nmb->wnd->wd->settings, list) { -+ if (strncasecmp(keyname, setting->name, ansi.length) == 0) { -+ mutex_unlock(&loader_mutex); -+ if (ndis_decode_setting(setting, param)) -+ *status = NDIS_STATUS_FAILURE; -+ else -+ *status = NDIS_STATUS_SUCCESS; -+ RtlFreeAnsiString(&ansi); -+ EXIT2(return); -+ } -+ } -+ mutex_unlock(&loader_mutex); -+ setting = kzalloc(sizeof(*setting), GFP_KERNEL); -+ if (setting) { -+ if (ansi.length == ansi.max_length) -+ ansi.length--; -+ memcpy(setting->name, keyname, ansi.length); -+ setting->name[ansi.length] = 0; -+ if (ndis_decode_setting(setting, param)) -+ *status = NDIS_STATUS_FAILURE; -+ else { -+ *status = NDIS_STATUS_SUCCESS; -+ mutex_lock(&loader_mutex); -+ InsertTailList(&nmb->wnd->wd->settings, &setting->list); -+ mutex_unlock(&loader_mutex); -+ } -+ } else -+ *status = NDIS_STATUS_RESOURCES; -+ -+ RtlFreeAnsiString(&ansi); -+ EXIT2(return); -+} -+ -+wstdcall void WIN_FUNC(NdisReadNetworkAddress,4) -+ (NDIS_STATUS *status, void **addr, UINT *len, -+ struct ndis_mp_block *nmb) -+{ -+ struct ndis_device *wnd = nmb->wnd; -+ struct ndis_configuration_parameter *param; -+ struct unicode_string key; -+ struct ansi_string ansi; -+ typeof(wnd->mac) mac; -+ int i, ret; -+ -+ ENTER2("%p", nmb); -+ RtlInitAnsiString(&ansi, "NetworkAddress"); -+ *status = NDIS_STATUS_FAILURE; -+ if (RtlAnsiStringToUnicodeString(&key, &ansi, TRUE) != STATUS_SUCCESS) -+ EXIT1(return); -+ -+ NdisReadConfiguration(&ret, ¶m, nmb, &key, NdisParameterString); -+ RtlFreeUnicodeString(&key); -+ if (ret != NDIS_STATUS_SUCCESS) -+ EXIT1(return); -+ ret = RtlUnicodeStringToAnsiString(&ansi, ¶m->data.string, TRUE); -+ if (ret != STATUS_SUCCESS) -+ EXIT1(return); -+ -+ i = 0; -+ if (ansi.length >= 2 * sizeof(mac)) { -+ for (i = 0; i < sizeof(mac); i++) { -+ char c[3]; -+ int x; -+ c[0] = ansi.buf[i*2]; -+ c[1] = ansi.buf[i*2+1]; -+ c[2] = 0; -+ ret = sscanf(c, "%x", &x); -+ if (ret != 1) -+ break; -+ mac[i] = x; -+ } -+ } -+ TRACE2("%s, %d, " MACSTR, ansi.buf, i, MAC2STR(mac)); -+ RtlFreeAnsiString(&ansi); -+ if (i == sizeof(mac)) { -+ memcpy(wnd->mac, mac, sizeof(wnd->mac)); -+ *len = sizeof(mac); -+ *addr = wnd->mac; -+ *status = NDIS_STATUS_SUCCESS; -+ } -+ EXIT1(return); -+} -+ -+wstdcall void WIN_FUNC(NdisInitializeString,2) -+ (struct unicode_string *dest, UCHAR *src) -+{ -+ struct ansi_string ansi; -+ -+ ENTER2(""); -+ if (src == NULL) { -+ dest->length = dest->max_length = 0; -+ dest->buf = NULL; -+ } else { -+ RtlInitAnsiString(&ansi, src); -+ /* the string is freed with NdisFreeMemory */ -+ RtlAnsiStringToUnicodeString(dest, &ansi, TRUE); -+ } -+ EXIT2(return); -+} -+ -+wstdcall void WIN_FUNC(NdisInitAnsiString,2) -+ (struct ansi_string *dst, CHAR *src) -+{ -+ RtlInitAnsiString(dst, src); -+ EXIT2(return); -+} -+ -+wstdcall void WIN_FUNC(NdisInitUnicodeString,2) -+ (struct unicode_string *dest, const wchar_t *src) -+{ -+ RtlInitUnicodeString(dest, src); -+ return; -+} -+ -+wstdcall NDIS_STATUS WIN_FUNC(NdisAnsiStringToUnicodeString,2) -+ (struct unicode_string *dst, struct ansi_string *src) -+{ -+ ENTER2(""); -+ if (dst == NULL || src == NULL) -+ EXIT2(return NDIS_STATUS_FAILURE); -+ if (RtlAnsiStringToUnicodeString(dst, src, FALSE) == STATUS_SUCCESS) -+ return NDIS_STATUS_SUCCESS; -+ else -+ return NDIS_STATUS_FAILURE; -+} -+ -+wstdcall NDIS_STATUS WIN_FUNC(NdisUnicodeStringToAnsiString,2) -+ (struct ansi_string *dst, struct unicode_string *src) -+{ -+ ENTER2(""); -+ if (dst == NULL || src == NULL) -+ EXIT2(return NDIS_STATUS_FAILURE); -+ if (RtlUnicodeStringToAnsiString(dst, src, FALSE) == STATUS_SUCCESS) -+ return NDIS_STATUS_SUCCESS; -+ else -+ return NDIS_STATUS_FAILURE; -+} -+ -+wstdcall NTSTATUS WIN_FUNC(NdisUpcaseUnicodeString,2) -+ (struct unicode_string *dst, struct unicode_string *src) -+{ -+ EXIT2(return RtlUpcaseUnicodeString(dst, src, FALSE)); -+} -+ -+wstdcall void WIN_FUNC(NdisMSetAttributesEx,5) -+ (struct ndis_mp_block *nmb, void *mp_ctx, -+ UINT hangcheck_interval, UINT attributes, ULONG adaptertype) -+{ -+ struct ndis_device *wnd; -+ -+ ENTER1("%p, %p, %d, %08x, %d", nmb, mp_ctx, hangcheck_interval, -+ attributes, adaptertype); -+ wnd = nmb->wnd; -+ nmb->mp_ctx = mp_ctx; -+ wnd->attributes = attributes; -+ -+ if ((attributes & NDIS_ATTRIBUTE_BUS_MASTER) && -+ wrap_is_pci_bus(wnd->wd->dev_bus)) -+ pci_set_master(wnd->wd->pci.pdev); -+ -+ if (hangcheck_interval > 0) -+ wnd->hangcheck_interval = 2 * hangcheck_interval * HZ; -+ else -+ wnd->hangcheck_interval = 2 * HZ; -+ -+ EXIT1(return); -+} -+ -+wstdcall ULONG WIN_FUNC(NdisReadPciSlotInformation,5) -+ (struct ndis_mp_block *nmb, ULONG slot, -+ ULONG offset, char *buf, ULONG len) -+{ -+ struct wrap_device *wd = nmb->wnd->wd; -+ ULONG i; -+ if (!wrap_is_pci_bus(wd->dev_bus)) { -+ ERROR("used on a non-PCI device"); -+ return 0; -+ } -+ for (i = 0; i < len; i++) -+ if (pci_read_config_byte(wd->pci.pdev, offset + i, &buf[i]) != -+ PCIBIOS_SUCCESSFUL) -+ break; -+ DBG_BLOCK(2) { -+ if (i != len) -+ WARNING("%u, %u", i, len); -+ } -+ return i; -+} -+ -+wstdcall ULONG WIN_FUNC(NdisImmediateReadPciSlotInformation,5) -+ (struct ndis_mp_block *nmb, ULONG slot, -+ ULONG offset, char *buf, ULONG len) -+{ -+ return NdisReadPciSlotInformation(nmb, slot, offset, buf, len); -+} -+ -+wstdcall ULONG WIN_FUNC(NdisWritePciSlotInformation,5) -+ (struct ndis_mp_block *nmb, ULONG slot, -+ ULONG offset, char *buf, ULONG len) -+{ -+ struct wrap_device *wd = nmb->wnd->wd; -+ ULONG i; -+ if (!wrap_is_pci_bus(wd->dev_bus)) { -+ ERROR("used on a non-PCI device"); -+ return 0; -+ } -+ for (i = 0; i < len; i++) -+ if (pci_write_config_byte(wd->pci.pdev, offset + i, buf[i]) != -+ PCIBIOS_SUCCESSFUL) -+ break; -+ DBG_BLOCK(2) { -+ if (i != len) -+ WARNING("%u, %u", i, len); -+ } -+ return i; -+} -+ -+wstdcall NDIS_STATUS WIN_FUNC(NdisMRegisterIoPortRange,4) -+ (void **virt, struct ndis_mp_block *nmb, UINT start, UINT len) -+{ -+ ENTER3("%08x %08x", start, len); -+ *virt = (void *)(ULONG_PTR)start; -+ return NDIS_STATUS_SUCCESS; -+} -+ -+wstdcall void WIN_FUNC(NdisMDeregisterIoPortRange,4) -+ (struct ndis_mp_block *nmb, UINT start, UINT len, void* virt) -+{ -+ ENTER1("%08x %08x", start, len); -+} -+ -+wstdcall void WIN_FUNC(NdisReadPortUchar,3) -+ (struct ndis_mp_block *nmb, ULONG port, char *data) -+{ -+ *data = inb(port); -+} -+ -+wstdcall void WIN_FUNC(NdisImmediateReadPortUchar,3) -+ (struct ndis_mp_block *nmb, ULONG port, char *data) -+{ -+ *data = inb(port); -+} -+ -+wstdcall void WIN_FUNC(NdisWritePortUchar,3) -+ (struct ndis_mp_block *nmb, ULONG port, char data) -+{ -+ outb(data, port); -+} -+ -+wstdcall void WIN_FUNC(NdisImmediateWritePortUchar,3) -+ (struct ndis_mp_block *nmb, ULONG port, char data) -+{ -+ outb(data, port); -+} -+ -+wstdcall void WIN_FUNC(NdisMQueryAdapterResources,4) -+ (NDIS_STATUS *status, struct ndis_mp_block *nmb, -+ NDIS_RESOURCE_LIST *resource_list, UINT *size) -+{ -+ struct ndis_device *wnd = nmb->wnd; -+ NDIS_RESOURCE_LIST *list; -+ UINT resource_length; -+ -+ list = &wnd->wd->resource_list->list->partial_resource_list; -+ resource_length = sizeof(struct cm_partial_resource_list) + -+ sizeof(struct cm_partial_resource_descriptor) * -+ (list->count - 1); -+ TRACE2("%p, %p,%d (%d), %p %d %d", wnd, resource_list, *size, -+ resource_length, &list->partial_descriptors[list->count-1], -+ list->partial_descriptors[list->count-1].u.interrupt.level, -+ list->partial_descriptors[list->count-1].u.interrupt.vector); -+ if (*size < sizeof(*list)) { -+ *size = resource_length; -+ *status = NDIS_STATUS_BUFFER_TOO_SHORT; -+ } else { -+ ULONG count; -+ if (*size >= resource_length) { -+ *size = resource_length; -+ count = list->count; -+ } else { -+ UINT n = sizeof(*list); -+ count = 1; -+ while (count++ < list->count && n < *size) -+ n += sizeof(list->partial_descriptors); -+ *size = n; -+ } -+ memcpy(resource_list, list, *size); -+ resource_list->count = count; -+ *status = NDIS_STATUS_SUCCESS; -+ } -+ EXIT2(return); -+} -+ -+wstdcall NDIS_STATUS WIN_FUNC(NdisMPciAssignResources,3) -+ (struct ndis_mp_block *nmb, ULONG slot_number, -+ NDIS_RESOURCE_LIST **resources) -+{ -+ struct ndis_device *wnd = nmb->wnd; -+ -+ ENTER2("%p, %p", wnd, wnd->wd->resource_list); -+ *resources = &wnd->wd->resource_list->list->partial_resource_list; -+ EXIT2(return NDIS_STATUS_SUCCESS); -+} -+ -+wstdcall NDIS_STATUS WIN_FUNC(NdisMMapIoSpace,4) -+ (void __iomem **virt, struct ndis_mp_block *nmb, -+ NDIS_PHY_ADDRESS phy_addr, UINT len) -+{ -+ struct ndis_device *wnd = nmb->wnd; -+ -+ ENTER2("%llx, %d", phy_addr, len); -+ *virt = MmMapIoSpace(phy_addr, len, MmCached); -+ if (*virt == NULL) { -+ ERROR("ioremap failed"); -+ EXIT2(return NDIS_STATUS_FAILURE); -+ } -+ wnd->mem_start = phy_addr; -+ wnd->mem_end = phy_addr + len; -+ TRACE2("%p", *virt); -+ EXIT2(return NDIS_STATUS_SUCCESS); -+} -+ -+wstdcall void WIN_FUNC(NdisMUnmapIoSpace,3) -+ (struct ndis_mp_block *nmb, void __iomem *virt, UINT len) -+{ -+ ENTER2("%p, %d", virt, len); -+ MmUnmapIoSpace(virt, len); -+ EXIT2(return); -+} -+ -+wstdcall void WIN_FUNC(NdisAllocateSpinLock,1) -+ (struct ndis_spinlock *lock) -+{ -+ TRACE4("lock %p, %p", lock, &lock->klock); -+ KeInitializeSpinLock(&lock->klock); -+ lock->irql = PASSIVE_LEVEL; -+ return; -+} -+ -+wstdcall void WIN_FUNC(NdisFreeSpinLock,1) -+ (struct ndis_spinlock *lock) -+{ -+ TRACE4("lock %p, %p", lock, &lock->klock); -+ return; -+} -+ -+wstdcall void WIN_FUNC(NdisAcquireSpinLock,1) -+ (struct ndis_spinlock *lock) -+{ -+ ENTER6("lock %p, %p", lock, &lock->klock); -+// assert_irql(_irql_ <= DISPATCH_LEVEL); -+ lock->irql = nt_spin_lock_irql(&lock->klock, DISPATCH_LEVEL); -+ return; -+} -+ -+wstdcall void WIN_FUNC(NdisReleaseSpinLock,1) -+ (struct ndis_spinlock *lock) -+{ -+ ENTER6("lock %p, %p", lock, &lock->klock); -+// assert_irql(_irql_ == DISPATCH_LEVEL); -+ nt_spin_unlock_irql(&lock->klock, lock->irql); -+ return; -+} -+ -+wstdcall void WIN_FUNC(NdisDprAcquireSpinLock,1) -+ (struct ndis_spinlock *lock) -+{ -+ ENTER6("lock %p", &lock->klock); -+// assert_irql(_irql_ == DISPATCH_LEVEL); -+ nt_spin_lock(&lock->klock); -+ return; -+} -+ -+wstdcall void WIN_FUNC(NdisDprReleaseSpinLock,1) -+ (struct ndis_spinlock *lock) -+{ -+ ENTER6("lock %p", &lock->klock); -+// assert_irql(_irql_ == DISPATCH_LEVEL); -+ nt_spin_unlock(&lock->klock); -+ return; -+} -+ -+wstdcall void WIN_FUNC(NdisInitializeReadWriteLock,1) -+ (struct ndis_rw_lock *rw_lock) -+{ -+ ENTER3("%p", rw_lock); -+ memset(rw_lock, 0, sizeof(*rw_lock)); -+ KeInitializeSpinLock(&rw_lock->klock); -+ return; -+} -+ -+/* read/write locks are implemented in a rather simplistic way - we -+ * should probably use Linux's rw_lock implementation */ -+ -+wstdcall void WIN_FUNC(NdisAcquireReadWriteLock,3) -+ (struct ndis_rw_lock *rw_lock, BOOLEAN write, -+ struct lock_state *lock_state) -+{ -+ if (write) { -+ while (1) { -+ if (cmpxchg(&rw_lock->count, 0, -1) == 0) -+ return; -+ while (rw_lock->count) -+ cpu_relax(); -+ } -+ return; -+ } -+ while (1) { -+ typeof(rw_lock->count) count; -+ while ((count = rw_lock->count) < 0) -+ cpu_relax(); -+ if (cmpxchg(&rw_lock->count, count, count + 1) == count) -+ return; -+ } -+} -+ -+wstdcall void WIN_FUNC(NdisReleaseReadWriteLock,2) -+ (struct ndis_rw_lock *rw_lock, struct lock_state *lock_state) -+{ -+ if (rw_lock->count > 0) -+ pre_atomic_add(rw_lock->count, -1); -+ else if (rw_lock->count == -1) -+ rw_lock->count = 0; -+ else -+ WARNING("invalid state: %d", rw_lock->count); -+} -+ -+wstdcall NDIS_STATUS WIN_FUNC(NdisMAllocateMapRegisters,5) -+ (struct ndis_mp_block *nmb, UINT dmachan, -+ NDIS_DMA_SIZE dmasize, ULONG basemap, ULONG max_buf_size) -+{ -+ struct ndis_device *wnd = nmb->wnd; -+ -+ ENTER2("%p, %d %d %d %d", wnd, dmachan, dmasize, basemap, max_buf_size); -+ if (!wrap_is_pci_bus(wnd->wd->dev_bus)) { -+ ERROR("used on a non-PCI device"); -+ return NDIS_STATUS_NOT_SUPPORTED; -+ } -+ if (wnd->dma_map_count > 0) { -+ WARNING("%s: map registers already allocated: %u", -+ wnd->net_dev->name, wnd->dma_map_count); -+ EXIT2(return NDIS_STATUS_RESOURCES); -+ } -+ if (dmasize == NDIS_DMA_24BITS) { -+ if (pci_set_dma_mask(wnd->wd->pci.pdev, DMA_BIT_MASK(24)) || -+ pci_set_consistent_dma_mask(wnd->wd->pci.pdev, -+ DMA_BIT_MASK(24))) -+ WARNING("setting dma mask failed"); -+ } else if (dmasize == NDIS_DMA_32BITS) { -+ /* consistent dma is in low 32-bits by default */ -+ if (pci_set_dma_mask(wnd->wd->pci.pdev, DMA_BIT_MASK(32))) -+ WARNING("setting dma mask failed"); -+#ifdef CONFIG_X86_64 -+ } else if (dmasize == NDIS_DMA_64BITS) { -+ if (pci_set_dma_mask(wnd->wd->pci.pdev, DMA_BIT_MASK(64)) || -+ pci_set_consistent_dma_mask(wnd->wd->pci.pdev, -+ DMA_BIT_MASK(64))) -+ WARNING("setting dma mask failed"); -+ else -+ wnd->net_dev->features |= NETIF_F_HIGHDMA; -+#endif -+ } else { -+ ERROR("dmasize %d not supported", dmasize); -+ EXIT2(return NDIS_STATUS_NOT_SUPPORTED); -+ } -+ /* since memory for buffer is allocated with kmalloc, buffer -+ * is physically contiguous, so entire map will fit in one -+ * register */ -+ if (basemap > 64) { -+ WARNING("Windows driver %s requesting too many (%u) " -+ "map registers", wnd->wd->driver->name, basemap); -+ /* As per NDIS, NDIS_STATUS_RESOURCES should be -+ * returned, but with that Atheros PCI driver fails - -+ * for now tolerate it */ -+// EXIT2(return NDIS_STATUS_RESOURCES); -+ } -+ -+ wnd->dma_map_addr = kzalloc(basemap * sizeof(*(wnd->dma_map_addr)), -+ GFP_KERNEL); -+ if (!wnd->dma_map_addr) -+ EXIT2(return NDIS_STATUS_RESOURCES); -+ wnd->dma_map_count = basemap; -+ TRACE2("%u", wnd->dma_map_count); -+ EXIT2(return NDIS_STATUS_SUCCESS); -+} -+ -+wstdcall void WIN_FUNC(NdisMFreeMapRegisters,1) -+ (struct ndis_mp_block *nmb) -+{ -+ struct ndis_device *wnd = nmb->wnd; -+ int i; -+ -+ ENTER2("wnd: %p", wnd); -+ if (wnd->dma_map_addr) { -+ for (i = 0; i < wnd->dma_map_count; i++) { -+ if (wnd->dma_map_addr[i]) -+ WARNING("%s: dma addr 0x%llx not freed by " -+ "Windows driver", wnd->net_dev->name, -+ (unsigned long long)wnd->dma_map_addr[i]); -+ } -+ kfree(wnd->dma_map_addr); -+ wnd->dma_map_addr = NULL; -+ } else -+ WARNING("map registers already freed?"); -+ wnd->dma_map_count = 0; -+ EXIT2(return); -+} -+ -+wstdcall void WIN_FUNC(NdisMStartBufferPhysicalMapping,6) -+ (struct ndis_mp_block *nmb, ndis_buffer *buf, -+ ULONG index, BOOLEAN write_to_dev, -+ struct ndis_phy_addr_unit *phy_addr_array, UINT *array_size) -+{ -+ struct ndis_device *wnd = nmb->wnd; -+ -+ ENTER3("%p, %p, %u, %u", wnd, buf, index, wnd->dma_map_count); -+ if (!wrap_is_pci_bus(wnd->wd->dev_bus)) { -+ ERROR("used on a non-PCI device"); -+ return; -+ } -+ if (unlikely(wnd->sg_dma_size || !write_to_dev || -+ index >= wnd->dma_map_count)) { -+ WARNING("invalid request: %d, %d, %d, %d", wnd->sg_dma_size, -+ write_to_dev, index, wnd->dma_map_count); -+ phy_addr_array[0].phy_addr = 0; -+ phy_addr_array[0].length = 0; -+ *array_size = 0; -+ return; -+ } -+ if (wnd->dma_map_addr[index]) { -+ TRACE2("buffer %p at %d is already mapped: %llx", buf, index, -+ (unsigned long long)wnd->dma_map_addr[index]); -+// *array_size = 1; -+ return; -+ } -+ TRACE3("%p, %p, %u", buf, MmGetSystemAddressForMdl(buf), -+ MmGetMdlByteCount(buf)); -+ DBG_BLOCK(4) { -+ dump_bytes(__func__, MmGetSystemAddressForMdl(buf), -+ MmGetMdlByteCount(buf)); -+ } -+ wnd->dma_map_addr[index] = -+ PCI_DMA_MAP_SINGLE(wnd->wd->pci.pdev, -+ MmGetSystemAddressForMdl(buf), -+ MmGetMdlByteCount(buf), PCI_DMA_TODEVICE); -+ phy_addr_array[0].phy_addr = wnd->dma_map_addr[index]; -+ phy_addr_array[0].length = MmGetMdlByteCount(buf); -+ TRACE4("%llx, %d, %d", phy_addr_array[0].phy_addr, -+ phy_addr_array[0].length, index); -+ *array_size = 1; -+} -+ -+wstdcall void WIN_FUNC(NdisMCompleteBufferPhysicalMapping,3) -+ (struct ndis_mp_block *nmb, ndis_buffer *buf, ULONG index) -+{ -+ struct ndis_device *wnd = nmb->wnd; -+ -+ ENTER3("%p, %p %u (%u)", wnd, buf, index, wnd->dma_map_count); -+ -+ if (!wrap_is_pci_bus(wnd->wd->dev_bus)) { -+ ERROR("used on a non-PCI device"); -+ return; -+ } -+ if (unlikely(wnd->sg_dma_size)) -+ WARNING("buffer %p may have been unmapped already", buf); -+ if (index >= wnd->dma_map_count) { -+ ERROR("invalid map register (%u >= %u)", -+ index, wnd->dma_map_count); -+ return; -+ } -+ TRACE4("%llx", (unsigned long long)wnd->dma_map_addr[index]); -+ if (wnd->dma_map_addr[index]) { -+ PCI_DMA_UNMAP_SINGLE(wnd->wd->pci.pdev, wnd->dma_map_addr[index], -+ MmGetMdlByteCount(buf), PCI_DMA_TODEVICE); -+ wnd->dma_map_addr[index] = 0; -+ } else -+ WARNING("map registers at %u not used", index); -+} -+ -+wstdcall void WIN_FUNC(NdisMAllocateSharedMemory,5) -+ (struct ndis_mp_block *nmb, ULONG size, -+ BOOLEAN cached, void **virt, NDIS_PHY_ADDRESS *phys) -+{ -+ dma_addr_t dma_addr; -+ struct wrap_device *wd = nmb->wnd->wd; -+ -+ ENTER3("size: %u, cached: %d", size, cached); -+ if (!wrap_is_pci_bus(wd->dev_bus)) { -+ ERROR("used on a non-PCI device"); -+ return; -+ } -+ *virt = PCI_DMA_ALLOC_COHERENT(wd->pci.pdev, size, &dma_addr); -+ if (*virt) -+ *phys = dma_addr; -+ else -+ WARNING("couldn't allocate %d bytes of %scached DMA memory", -+ size, cached ? "" : "un-"); -+ EXIT3(return); -+} -+ -+wstdcall void WIN_FUNC(NdisMFreeSharedMemory,5) -+ (struct ndis_mp_block *nmb, ULONG size, BOOLEAN cached, -+ void *virt, NDIS_PHY_ADDRESS addr) -+{ -+ struct wrap_device *wd = nmb->wnd->wd; -+ ENTER3("%p, %llx, %u", virt, addr, size); -+ if (!wrap_is_pci_bus(wd->dev_bus)) { -+ ERROR("used on a non-PCI device"); -+ return; -+ } -+ PCI_DMA_FREE_COHERENT(wd->pci.pdev, size, virt, addr); -+ EXIT3(return); -+} -+ -+wstdcall void alloc_shared_memory_async(void *arg1, void *arg2) -+{ -+ struct ndis_device *wnd; -+ struct alloc_shared_mem *alloc_shared_mem; -+ struct miniport *mp; -+ void *virt; -+ NDIS_PHY_ADDRESS phys; -+ KIRQL irql; -+ -+ wnd = arg1; -+ alloc_shared_mem = arg2; -+ mp = &wnd->wd->driver->ndis_driver->mp; -+ NdisMAllocateSharedMemory(wnd->nmb, alloc_shared_mem->size, -+ alloc_shared_mem->cached, &virt, &phys); -+ irql = serialize_lock_irql(wnd); -+ assert_irql(_irql_ == DISPATCH_LEVEL); -+ LIN2WIN5(mp->alloc_complete, wnd->nmb, virt, -+ &phys, alloc_shared_mem->size, alloc_shared_mem->ctx); -+ serialize_unlock_irql(wnd, irql); -+ kfree(alloc_shared_mem); -+} -+WIN_FUNC_DECL(alloc_shared_memory_async,2) -+ -+wstdcall NDIS_STATUS WIN_FUNC(NdisMAllocateSharedMemoryAsync,4) -+ (struct ndis_mp_block *nmb, ULONG size, BOOLEAN cached, void *ctx) -+{ -+ struct ndis_device *wnd = nmb->wnd; -+ struct alloc_shared_mem *alloc_shared_mem; -+ -+ ENTER3("wnd: %p", wnd); -+ alloc_shared_mem = kmalloc(sizeof(*alloc_shared_mem), irql_gfp()); -+ if (!alloc_shared_mem) { -+ WARNING("couldn't allocate memory"); -+ return NDIS_STATUS_FAILURE; -+ } -+ -+ alloc_shared_mem->size = size; -+ alloc_shared_mem->cached = cached; -+ alloc_shared_mem->ctx = ctx; -+ if (schedule_ntos_work_item(WIN_FUNC_PTR(alloc_shared_memory_async,2), -+ wnd, alloc_shared_mem)) -+ EXIT3(return NDIS_STATUS_FAILURE); -+ EXIT3(return NDIS_STATUS_PENDING); -+} -+ -+/* Some drivers allocate NDIS_BUFFER (aka MDL) very often; instead of -+ * allocating and freeing with kernel functions, we chain them into -+ * ndis_buffer_pool. When an MDL is freed, it is added to the list of -+ * free MDLs. When allocated, we first check if there is one in free -+ * list and if so just return it; otherwise, we allocate a new one and -+ * return that. This reduces memory fragmentation. Windows DDK says -+ * that the driver itself shouldn't check what is returned in -+ * pool_handle, presumably because buffer pools are not used in -+ * XP. However, as long as driver follows rest of the semantics - that -+ * it should indicate maximum number of MDLs used with num_descr and -+ * pass the same pool_handle in other buffer functions, this should -+ * work. Sadly, though, NdisFreeBuffer doesn't pass the pool_handle, -+ * so we use 'process' field of MDL to store pool_handle. */ -+ -+wstdcall void WIN_FUNC(NdisAllocateBufferPool,3) -+ (NDIS_STATUS *status, struct ndis_buffer_pool **pool_handle, -+ UINT num_descr) -+{ -+ struct ndis_buffer_pool *pool; -+ -+ ENTER1("buffers: %d", num_descr); -+ pool = kmalloc(sizeof(*pool), irql_gfp()); -+ if (!pool) { -+ *status = NDIS_STATUS_RESOURCES; -+ EXIT3(return); -+ } -+ spin_lock_init(&pool->lock); -+ pool->max_descr = num_descr; -+ pool->num_allocated_descr = 0; -+ pool->free_descr = NULL; -+ *pool_handle = pool; -+ *status = NDIS_STATUS_SUCCESS; -+ TRACE1("pool: %p, num_descr: %d", pool, num_descr); -+ EXIT1(return); -+} -+ -+wstdcall void WIN_FUNC(NdisAllocateBuffer,5) -+ (NDIS_STATUS *status, ndis_buffer **buffer, -+ struct ndis_buffer_pool *pool, void *virt, UINT length) -+{ -+ ndis_buffer *descr; -+ -+ ENTER4("pool: %p (%d)", pool, pool->num_allocated_descr); -+ /* NDIS drivers should call this at DISPATCH_LEVEL, but -+ * alloc_tx_packet calls at SOFT_IRQL */ -+ assert_irql(_irql_ <= SOFT_LEVEL); -+ if (!pool) { -+ *status = NDIS_STATUS_FAILURE; -+ *buffer = NULL; -+ EXIT4(return); -+ } -+ spin_lock_bh(&pool->lock); -+ if ((descr = pool->free_descr)) -+ pool->free_descr = descr->next; -+ spin_unlock_bh(&pool->lock); -+ if (descr) { -+ typeof(descr->flags) flags; -+ flags = descr->flags; -+ memset(descr, 0, sizeof(*descr)); -+ MmInitializeMdl(descr, virt, length); -+ if (flags & MDL_CACHE_ALLOCATED) -+ descr->flags |= MDL_CACHE_ALLOCATED; -+ } else { -+ if (pool->num_allocated_descr > pool->max_descr) { -+ TRACE2("pool %p is full: %d(%d)", pool, -+ pool->num_allocated_descr, pool->max_descr); -+#ifndef ALLOW_POOL_OVERFLOW -+ *status = NDIS_STATUS_FAILURE; -+ *buffer = NULL; -+ return; -+#endif -+ } -+ descr = allocate_init_mdl(virt, length); -+ if (!descr) { -+ WARNING("couldn't allocate buffer"); -+ *status = NDIS_STATUS_FAILURE; -+ *buffer = NULL; -+ EXIT4(return); -+ } -+ TRACE4("buffer %p for %p, %d", descr, virt, length); -+ atomic_inc_var(pool->num_allocated_descr); -+ } -+ /* TODO: make sure this mdl can map given buffer */ -+ MmBuildMdlForNonPagedPool(descr); -+// descr->flags |= MDL_ALLOCATED_FIXED_SIZE | -+// MDL_MAPPED_TO_SYSTEM_VA | MDL_PAGES_LOCKED; -+ descr->pool = pool; -+ *buffer = descr; -+ *status = NDIS_STATUS_SUCCESS; -+ TRACE4("buffer: %p", descr); -+ EXIT4(return); -+} -+ -+wstdcall void WIN_FUNC(NdisFreeBuffer,1) -+ (ndis_buffer *buffer) -+{ -+ struct ndis_buffer_pool *pool; -+ -+ ENTER4("%p", buffer); -+ if (!buffer || !buffer->pool) { -+ ERROR("invalid buffer"); -+ EXIT4(return); -+ } -+ pool = buffer->pool; -+ if (pool->num_allocated_descr > MAX_ALLOCATED_NDIS_BUFFERS) { -+ /* NB NB NB: set mdl's 'pool' field to NULL before -+ * calling free_mdl; otherwise free_mdl calls -+ * NdisFreeBuffer back */ -+ atomic_dec_var(pool->num_allocated_descr); -+ buffer->pool = NULL; -+ free_mdl(buffer); -+ } else { -+ spin_lock_bh(&pool->lock); -+ buffer->next = pool->free_descr; -+ pool->free_descr = buffer; -+ spin_unlock_bh(&pool->lock); -+ } -+ EXIT4(return); -+} -+ -+wstdcall void WIN_FUNC(NdisFreeBufferPool,1) -+ (struct ndis_buffer_pool *pool) -+{ -+ ndis_buffer *cur, *next; -+ -+ TRACE3("pool: %p", pool); -+ if (!pool) { -+ WARNING("invalid pool"); -+ EXIT3(return); -+ } -+ spin_lock_bh(&pool->lock); -+ cur = pool->free_descr; -+ while (cur) { -+ next = cur->next; -+ cur->pool = NULL; -+ free_mdl(cur); -+ cur = next; -+ } -+ spin_unlock_bh(&pool->lock); -+ kfree(pool); -+ pool = NULL; -+ EXIT3(return); -+} -+ -+wstdcall void WIN_FUNC(NdisAdjustBufferLength,2) -+ (ndis_buffer *buffer, UINT length) -+{ -+ ENTER4("%p, %d", buffer, length); -+ buffer->bytecount = length; -+} -+ -+wstdcall void WIN_FUNC(NdisQueryBuffer,3) -+ (ndis_buffer *buffer, void **virt, UINT *length) -+{ -+ ENTER4("buffer: %p", buffer); -+ if (virt) -+ *virt = MmGetSystemAddressForMdl(buffer); -+ *length = MmGetMdlByteCount(buffer); -+ TRACE4("%p, %u", virt ? *virt : NULL, *length); -+ return; -+} -+ -+wstdcall void WIN_FUNC(NdisQueryBufferSafe,4) -+ (ndis_buffer *buffer, void **virt, UINT *length, -+ enum mm_page_priority priority) -+{ -+ ENTER4("%p, %p, %p, %d", buffer, virt, length, priority); -+ if (virt) -+ *virt = MmGetSystemAddressForMdlSafe(buffer, priority); -+ *length = MmGetMdlByteCount(buffer); -+ TRACE4("%p, %u", virt ? *virt : NULL, *length); -+} -+ -+wstdcall void *WIN_FUNC(NdisBufferVirtualAddress,1) -+ (ndis_buffer *buffer) -+{ -+ ENTER3("%p", buffer); -+ return MmGetSystemAddressForMdl(buffer); -+} -+ -+wstdcall ULONG WIN_FUNC(NdisBufferLength,1) -+ (ndis_buffer *buffer) -+{ -+ ENTER3("%p", buffer); -+ return MmGetMdlByteCount(buffer); -+} -+ -+wstdcall void WIN_FUNC(NdisQueryBufferOffset,3) -+ (ndis_buffer *buffer, UINT *offset, UINT *length) -+{ -+ ENTER3("%p", buffer); -+ *offset = MmGetMdlByteOffset(buffer); -+ *length = MmGetMdlByteCount(buffer); -+ TRACE3("%d, %d", *offset, *length); -+} -+ -+wstdcall void WIN_FUNC(NdisUnchainBufferAtBack,2) -+ (struct ndis_packet *packet, ndis_buffer **buffer) -+{ -+ ndis_buffer *b, *btail; -+ -+ ENTER3("%p", packet); -+ b = packet->private.buffer_head; -+ if (!b) { -+ /* no buffer in packet */ -+ *buffer = NULL; -+ EXIT3(return); -+ } -+ btail = packet->private.buffer_tail; -+ *buffer = btail; -+ if (b == btail) { -+ /* one buffer in packet */ -+ packet->private.buffer_head = NULL; -+ packet->private.buffer_tail = NULL; -+ } else { -+ while (b->next != btail) -+ b = b->next; -+ packet->private.buffer_tail = b; -+ b->next = NULL; -+ } -+ packet->private.valid_counts = FALSE; -+ EXIT3(return); -+} -+ -+wstdcall void WIN_FUNC(NdisUnchainBufferAtFront,2) -+ (struct ndis_packet *packet, ndis_buffer **buffer) -+{ -+ ENTER3("%p", packet); -+ if (packet->private.buffer_head == NULL) { -+ /* no buffer in packet */ -+ *buffer = NULL; -+ EXIT3(return); -+ } -+ -+ *buffer = packet->private.buffer_head; -+ if (packet->private.buffer_head == packet->private.buffer_tail) { -+ /* one buffer in packet */ -+ packet->private.buffer_head = NULL; -+ packet->private.buffer_tail = NULL; -+ } else -+ packet->private.buffer_head = (*buffer)->next; -+ -+ packet->private.valid_counts = FALSE; -+ EXIT3(return); -+} -+ -+wstdcall void WIN_FUNC(NdisGetFirstBufferFromPacketSafe,6) -+ (struct ndis_packet *packet, ndis_buffer **first_buffer, -+ void **first_buffer_va, UINT *first_buffer_length, -+ UINT *total_buffer_length, enum mm_page_priority priority) -+{ -+ ndis_buffer *b = packet->private.buffer_head; -+ -+ ENTER3("%p(%p)", packet, b); -+ *first_buffer = b; -+ if (b) { -+ *first_buffer_va = MmGetSystemAddressForMdlSafe(b, priority); -+ *first_buffer_length = *total_buffer_length = -+ MmGetMdlByteCount(b); -+ for (b = b->next; b; b = b->next) -+ *total_buffer_length += MmGetMdlByteCount(b); -+ } else { -+ *first_buffer_va = NULL; -+ *first_buffer_length = 0; -+ *total_buffer_length = 0; -+ } -+ TRACE3("%p, %d, %d", *first_buffer_va, *first_buffer_length, -+ *total_buffer_length); -+ EXIT3(return); -+} -+ -+wstdcall void WIN_FUNC(NdisGetFirstBufferFromPacket,6) -+ (struct ndis_packet *packet, ndis_buffer **first_buffer, -+ void **first_buffer_va, UINT *first_buffer_length, -+ UINT *total_buffer_length, enum mm_page_priority priority) -+{ -+ NdisGetFirstBufferFromPacketSafe(packet, first_buffer, -+ first_buffer_va, first_buffer_length, -+ total_buffer_length, -+ NormalPagePriority); -+} -+ -+wstdcall void WIN_FUNC(NdisAllocatePacketPoolEx,5) -+ (NDIS_STATUS *status, struct ndis_packet_pool **pool_handle, -+ UINT num_descr, UINT overflowsize, UINT proto_rsvd_length) -+{ -+ struct ndis_packet_pool *pool; -+ -+ ENTER3("buffers: %d, length: %d", num_descr, proto_rsvd_length); -+ pool = kzalloc(sizeof(*pool), irql_gfp()); -+ if (!pool) { -+ *status = NDIS_STATUS_RESOURCES; -+ EXIT3(return); -+ } -+ spin_lock_init(&pool->lock); -+ pool->max_descr = num_descr; -+ pool->num_allocated_descr = 0; -+ pool->num_used_descr = 0; -+ pool->free_descr = NULL; -+ pool->proto_rsvd_length = proto_rsvd_length; -+ *pool_handle = pool; -+ *status = NDIS_STATUS_SUCCESS; -+ TRACE3("pool: %p", pool); -+ EXIT3(return); -+} -+ -+wstdcall void WIN_FUNC(NdisAllocatePacketPool,4) -+ (NDIS_STATUS *status, struct ndis_packet_pool **pool_handle, -+ UINT num_descr, UINT proto_rsvd_length) -+{ -+ NdisAllocatePacketPoolEx(status, pool_handle, num_descr, 0, -+ proto_rsvd_length); -+ EXIT3(return); -+} -+ -+wstdcall void WIN_FUNC(NdisFreePacketPool,1) -+ (struct ndis_packet_pool *pool) -+{ -+ struct ndis_packet *packet, *next; -+ -+ ENTER3("pool: %p", pool); -+ if (!pool) { -+ WARNING("invalid pool"); -+ EXIT3(return); -+ } -+ spin_lock_bh(&pool->lock); -+ packet = pool->free_descr; -+ while (packet) { -+ next = (struct ndis_packet *)packet->reserved[0]; -+ kfree(packet); -+ packet = next; -+ } -+ pool->num_allocated_descr = 0; -+ pool->num_used_descr = 0; -+ pool->free_descr = NULL; -+ spin_unlock_bh(&pool->lock); -+ kfree(pool); -+ EXIT3(return); -+} -+ -+wstdcall UINT WIN_FUNC(NdisPacketPoolUsage,1) -+ (struct ndis_packet_pool *pool) -+{ -+ EXIT4(return pool->num_used_descr); -+} -+ -+wstdcall void WIN_FUNC(NdisAllocatePacket,3) -+ (NDIS_STATUS *status, struct ndis_packet **ndis_packet, -+ struct ndis_packet_pool *pool) -+{ -+ struct ndis_packet *packet; -+ int packet_length; -+ -+ ENTER4("pool: %p", pool); -+ if (!pool) { -+ *status = NDIS_STATUS_RESOURCES; -+ *ndis_packet = NULL; -+ EXIT4(return); -+ } -+ assert_irql(_irql_ <= SOFT_LEVEL); -+ if (pool->num_used_descr > pool->max_descr) { -+ TRACE3("pool %p is full: %d(%d)", pool, -+ pool->num_used_descr, pool->max_descr); -+#ifndef ALLOW_POOL_OVERFLOW -+ *status = NDIS_STATUS_RESOURCES; -+ *ndis_packet = NULL; -+ return; -+#endif -+ } -+ /* packet has space for 1 byte in protocol_reserved field */ -+ packet_length = sizeof(*packet) - 1 + pool->proto_rsvd_length + -+ sizeof(struct ndis_packet_oob_data); -+ spin_lock_bh(&pool->lock); -+ if ((packet = pool->free_descr)) -+ pool->free_descr = (void *)packet->reserved[0]; -+ spin_unlock_bh(&pool->lock); -+ if (!packet) { -+ packet = kmalloc(packet_length, irql_gfp()); -+ if (!packet) { -+ WARNING("couldn't allocate packet"); -+ *status = NDIS_STATUS_RESOURCES; -+ *ndis_packet = NULL; -+ return; -+ } -+ atomic_inc_var(pool->num_allocated_descr); -+ } -+ TRACE4("%p, %p", pool, packet); -+ atomic_inc_var(pool->num_used_descr); -+ memset(packet, 0, packet_length); -+ packet->private.oob_offset = -+ packet_length - sizeof(struct ndis_packet_oob_data); -+ packet->private.packet_flags = fPACKET_ALLOCATED_BY_NDIS; -+ packet->private.pool = pool; -+ *ndis_packet = packet; -+ *status = NDIS_STATUS_SUCCESS; -+ EXIT4(return); -+} -+ -+wstdcall void WIN_FUNC(NdisDprAllocatePacket,3) -+ (NDIS_STATUS *status, struct ndis_packet **packet, -+ struct ndis_packet_pool *pool) -+{ -+ NdisAllocatePacket(status, packet, pool); -+} -+ -+wstdcall void WIN_FUNC(NdisFreePacket,1) -+ (struct ndis_packet *packet) -+{ -+ struct ndis_packet_pool *pool; -+ -+ ENTER4("%p, %p", packet, packet->private.pool); -+ pool = packet->private.pool; -+ if (!pool) { -+ ERROR("invalid pool %p", packet); -+ EXIT4(return); -+ } -+ assert((int)pool->num_used_descr > 0); -+ atomic_dec_var(pool->num_used_descr); -+ if (packet->reserved[1]) { -+ TRACE3("%p, %p", packet, (void *)packet->reserved[1]); -+ kfree((void *)packet->reserved[1]); -+ packet->reserved[1] = 0; -+ } -+ if (pool->num_allocated_descr > MAX_ALLOCATED_NDIS_PACKETS) { -+ TRACE3("%p", pool); -+ atomic_dec_var(pool->num_allocated_descr); -+ kfree(packet); -+ } else { -+ TRACE4("%p, %p, %p", pool, packet, pool->free_descr); -+ spin_lock_bh(&pool->lock); -+ packet->reserved[0] = -+ (typeof(packet->reserved[0]))pool->free_descr; -+ pool->free_descr = packet; -+ spin_unlock_bh(&pool->lock); -+ } -+ EXIT4(return); -+} -+ -+wstdcall struct ndis_packet_stack *WIN_FUNC(NdisIMGetCurrentPacketStack,2) -+ (struct ndis_packet *packet, BOOLEAN *stacks_remain) -+{ -+ struct ndis_packet_stack *stack; -+ -+ if (!packet->reserved[1]) { -+ stack = kzalloc(2 * sizeof(*stack), irql_gfp()); -+ TRACE3("%p, %p", packet, stack); -+ packet->reserved[1] = (typeof(packet->reserved[1]))stack; -+ } else { -+ stack = (void *)packet->reserved[1];; -+ if (xchg(&stack->ndis_reserved[0], 1)) { -+ stack++; -+ if (xchg(&stack->ndis_reserved[0], 1)) -+ stack = NULL; -+ } -+ TRACE3("%p", stack); -+ } -+ if (stack) -+ *stacks_remain = TRUE; -+ else -+ *stacks_remain = FALSE; -+ -+ EXIT3(return stack); -+} -+ -+wstdcall void WIN_FUNC(NdisCopyFromPacketToPacketSafe,7) -+ (struct ndis_packet *dst, UINT dst_offset, UINT num_to_copy, -+ struct ndis_packet *src, UINT src_offset, UINT *num_copied, -+ enum mm_page_priority priority) -+{ -+ UINT dst_n, src_n, n, left; -+ ndis_buffer *dst_buf; -+ ndis_buffer *src_buf; -+ -+ ENTER4(""); -+ if (!dst || !src) { -+ *num_copied = 0; -+ EXIT4(return); -+ } -+ -+ dst_buf = dst->private.buffer_head; -+ src_buf = src->private.buffer_head; -+ -+ if (!dst_buf || !src_buf) { -+ *num_copied = 0; -+ EXIT4(return); -+ } -+ dst_n = MmGetMdlByteCount(dst_buf) - dst_offset; -+ src_n = MmGetMdlByteCount(src_buf) - src_offset; -+ -+ n = min(src_n, dst_n); -+ n = min(n, num_to_copy); -+ memcpy(MmGetSystemAddressForMdl(dst_buf) + dst_offset, -+ MmGetSystemAddressForMdl(src_buf) + src_offset, n); -+ -+ left = num_to_copy - n; -+ while (left > 0) { -+ src_offset += n; -+ dst_offset += n; -+ dst_n -= n; -+ src_n -= n; -+ if (dst_n == 0) { -+ dst_buf = dst_buf->next; -+ if (!dst_buf) -+ break; -+ dst_n = MmGetMdlByteCount(dst_buf); -+ dst_offset = 0; -+ } -+ if (src_n == 0) { -+ src_buf = src_buf->next; -+ if (!src_buf) -+ break; -+ src_n = MmGetMdlByteCount(src_buf); -+ src_offset = 0; -+ } -+ -+ n = min(src_n, dst_n); -+ n = min(n, left); -+ memcpy(MmGetSystemAddressForMdl(dst_buf) + dst_offset, -+ MmGetSystemAddressForMdl(src_buf) + src_offset, n); -+ left -= n; -+ } -+ *num_copied = num_to_copy - left; -+ EXIT4(return); -+} -+ -+wstdcall void WIN_FUNC(NdisCopyFromPacketToPacket,6) -+ (struct ndis_packet *dst, UINT dst_offset, UINT num_to_copy, -+ struct ndis_packet *src, UINT src_offset, UINT *num_copied) -+{ -+ NdisCopyFromPacketToPacketSafe(dst, dst_offset, num_to_copy, -+ src, src_offset, num_copied, -+ NormalPagePriority); -+ return; -+} -+ -+wstdcall void WIN_FUNC(NdisIMCopySendPerPacketInfo,2) -+ (struct ndis_packet *dst, struct ndis_packet *src) -+{ -+ struct ndis_packet_oob_data *dst_oob, *src_oob; -+ dst_oob = NDIS_PACKET_OOB_DATA(dst); -+ src_oob = NDIS_PACKET_OOB_DATA(src); -+ memcpy(&dst_oob->ext, &src_oob->ext, sizeof(dst_oob->ext)); -+ return; -+} -+ -+wstdcall void WIN_FUNC(NdisSend,3) -+ (NDIS_STATUS *status, struct ndis_mp_block *nmb, -+ struct ndis_packet *packet) -+{ -+ struct ndis_device *wnd = nmb->wnd; -+ struct miniport *mp; -+ KIRQL irql; -+ -+ mp = &wnd->wd->driver->ndis_driver->mp; -+ if (mp->send_packets) { -+ irql = serialize_lock_irql(wnd); -+ assert_irql(_irql_ == DISPATCH_LEVEL); -+ LIN2WIN3(mp->send_packets, wnd->nmb->mp_ctx, &packet, 1); -+ serialize_unlock_irql(wnd, irql); -+ if (deserialized_driver(wnd)) -+ *status = NDIS_STATUS_PENDING; -+ else { -+ struct ndis_packet_oob_data *oob_data; -+ oob_data = NDIS_PACKET_OOB_DATA(packet); -+ *status = oob_data->status; -+ switch (*status) { -+ case NDIS_STATUS_SUCCESS: -+ free_tx_packet(wnd, packet, *status); -+ break; -+ case NDIS_STATUS_PENDING: -+ break; -+ case NDIS_STATUS_RESOURCES: -+ wnd->tx_ok = 0; -+ break; -+ case NDIS_STATUS_FAILURE: -+ default: -+ free_tx_packet(wnd, packet, *status); -+ break; -+ } -+ } -+ } else { -+ irql = serialize_lock_irql(wnd); -+ assert_irql(_irql_ == DISPATCH_LEVEL); -+ *status = LIN2WIN3(mp->send, wnd->nmb->mp_ctx, packet, 0); -+ serialize_unlock_irql(wnd, irql); -+ switch (*status) { -+ case NDIS_STATUS_SUCCESS: -+ free_tx_packet(wnd, packet, *status); -+ break; -+ case NDIS_STATUS_PENDING: -+ break; -+ case NDIS_STATUS_RESOURCES: -+ wnd->tx_ok = 0; -+ break; -+ case NDIS_STATUS_FAILURE: -+ default: -+ free_tx_packet(wnd, packet, *status); -+ break; -+ } -+ } -+ EXIT3(return); -+} -+ -+/* called for serialized drivers only */ -+wstdcall void mp_timer_dpc(struct kdpc *kdpc, void *ctx, void *arg1, void *arg2) -+{ -+ struct ndis_mp_timer *timer; -+ struct ndis_mp_block *nmb; -+ -+ timer = ctx; -+ TIMERENTER("%p, %p, %p, %p", timer, timer->func, timer->ctx, timer->nmb); -+ assert_irql(_irql_ == DISPATCH_LEVEL); -+ nmb = timer->nmb; -+ serialize_lock(nmb->wnd); -+ LIN2WIN4(timer->func, NULL, timer->ctx, NULL, NULL); -+ serialize_unlock(nmb->wnd); -+ TIMEREXIT(return); -+} -+WIN_FUNC_DECL(mp_timer_dpc,4) -+ -+wstdcall void WIN_FUNC(NdisMInitializeTimer,4) -+ (struct ndis_mp_timer *timer, struct ndis_mp_block *nmb, -+ DPC func, void *ctx) -+{ -+ TIMERENTER("%p, %p, %p, %p", timer, func, ctx, nmb); -+ assert_irql(_irql_ == PASSIVE_LEVEL); -+ timer->func = func; -+ timer->ctx = ctx; -+ timer->nmb = nmb; -+ if (deserialized_driver(nmb->wnd)) -+ KeInitializeDpc(&timer->kdpc, func, ctx); -+ else -+ KeInitializeDpc(&timer->kdpc, WIN_FUNC_PTR(mp_timer_dpc,4), -+ timer); -+ wrap_init_timer(&timer->nt_timer, NotificationTimer, nmb); -+ TIMEREXIT(return); -+} -+ -+wstdcall void WIN_FUNC(NdisMSetPeriodicTimer,2) -+ (struct ndis_mp_timer *timer, UINT period_ms) -+{ -+ unsigned long expires = MSEC_TO_HZ(period_ms); -+ -+ TIMERENTER("%p, %u, %ld", timer, period_ms, expires); -+ assert_irql(_irql_ <= DISPATCH_LEVEL); -+ wrap_set_timer(&timer->nt_timer, expires, expires, &timer->kdpc); -+ TIMEREXIT(return); -+} -+ -+wstdcall void WIN_FUNC(NdisMCancelTimer,2) -+ (struct ndis_mp_timer *timer, BOOLEAN *canceled) -+{ -+ TIMERENTER("%p", timer); -+ assert_irql(_irql_ <= DISPATCH_LEVEL); -+ *canceled = KeCancelTimer(&timer->nt_timer); -+ TIMERTRACE("%d", *canceled); -+ return; -+} -+ -+wstdcall void WIN_FUNC(NdisInitializeTimer,3) -+ (struct ndis_timer *timer, void *func, void *ctx) -+{ -+ TIMERENTER("%p, %p, %p", timer, func, ctx); -+ assert_irql(_irql_ == PASSIVE_LEVEL); -+ KeInitializeDpc(&timer->kdpc, func, ctx); -+ wrap_init_timer(&timer->nt_timer, NotificationTimer, NULL); -+ TIMEREXIT(return); -+} -+ -+/* NdisMSetTimer is a macro that calls NdisSetTimer with -+ * ndis_mp_timer typecast to ndis_timer */ -+ -+wstdcall void WIN_FUNC(NdisSetTimer,2) -+ (struct ndis_timer *timer, UINT duetime_ms) -+{ -+ unsigned long expires = MSEC_TO_HZ(duetime_ms); -+ -+ TIMERENTER("%p, %p, %u, %ld", timer, timer->nt_timer.wrap_timer, -+ duetime_ms, expires); -+ assert_irql(_irql_ <= DISPATCH_LEVEL); -+ wrap_set_timer(&timer->nt_timer, expires, 0, &timer->kdpc); -+ TIMEREXIT(return); -+} -+ -+wstdcall void WIN_FUNC(NdisCancelTimer,2) -+ (struct ndis_timer *timer, BOOLEAN *canceled) -+{ -+ TIMERENTER("%p", timer); -+ assert_irql(_irql_ <= DISPATCH_LEVEL); -+ *canceled = KeCancelTimer(&timer->nt_timer); -+ TIMEREXIT(return); -+} -+ -+wstdcall void WIN_FUNC(NdisMRegisterAdapterShutdownHandler,3) -+ (struct ndis_mp_block *nmb, void *ctx, void *func) -+{ -+ struct ndis_device *wnd = nmb->wnd; -+ ENTER1("%p", func); -+ wnd->wd->driver->ndis_driver->mp.shutdown = func; -+ wnd->shutdown_ctx = ctx; -+} -+ -+wstdcall void WIN_FUNC(NdisMDeregisterAdapterShutdownHandler,1) -+ (struct ndis_mp_block *nmb) -+{ -+ struct ndis_device *wnd = nmb->wnd; -+ wnd->wd->driver->ndis_driver->mp.shutdown = NULL; -+ wnd->shutdown_ctx = NULL; -+} -+ -+/* TODO: rt61 (serialized) driver doesn't want MiniportEnableInterrupt -+ * to be called in irq handler, but mrv800c (deserialized) driver -+ * wants. NDIS is confusing about when to call MiniportEnableInterrupt -+ * For now, handle these cases with two separate irq handlers based on -+ * observation of these two drivers. However, it is likely not -+ * correct. */ -+wstdcall void deserialized_irq_handler(struct kdpc *kdpc, void *ctx, -+ void *arg1, void *arg2) -+{ -+ struct ndis_device *wnd = ctx; -+ ndis_interrupt_handler irq_handler = arg1; -+ struct miniport *mp = arg2; -+ -+ TRACE6("%p", irq_handler); -+ assert_irql(_irql_ == DISPATCH_LEVEL); -+ LIN2WIN1(irq_handler, wnd->nmb->mp_ctx); -+ if (mp->enable_interrupt) -+ LIN2WIN1(mp->enable_interrupt, wnd->nmb->mp_ctx); -+ EXIT6(return); -+} -+WIN_FUNC_DECL(deserialized_irq_handler,4) -+ -+wstdcall void serialized_irq_handler(struct kdpc *kdpc, void *ctx, -+ void *arg1, void *arg2) -+{ -+ struct ndis_device *wnd = ctx; -+ ndis_interrupt_handler irq_handler = arg1; -+ -+ TRACE6("%p, %p, %p", wnd, irq_handler, arg2); -+ assert_irql(_irql_ == DISPATCH_LEVEL); -+ serialize_lock(wnd); -+ LIN2WIN1(irq_handler, arg2); -+ serialize_unlock(wnd); -+ EXIT6(return); -+} -+WIN_FUNC_DECL(serialized_irq_handler,4) -+ -+wstdcall BOOLEAN ndis_isr(struct kinterrupt *kinterrupt, void *ctx) -+{ -+ struct ndis_mp_interrupt *mp_interrupt = ctx; -+ struct ndis_device *wnd = mp_interrupt->nmb->wnd; -+ BOOLEAN recognized = TRUE, queue_handler = TRUE; -+ -+ TRACE6("%p", wnd); -+ /* kernel may call ISR when registering interrupt, in -+ * the same context if DEBUG_SHIRQ is enabled */ -+ assert_irql(_irql_ == DIRQL || _irql_ == PASSIVE_LEVEL); -+ if (mp_interrupt->shared) -+ LIN2WIN3(mp_interrupt->isr, &recognized, &queue_handler, -+ wnd->nmb->mp_ctx); -+ else { -+ struct miniport *mp; -+ mp = &wnd->wd->driver->ndis_driver->mp; -+ LIN2WIN1(mp->disable_interrupt, wnd->nmb->mp_ctx); -+ /* it is not shared interrupt, so handler must be called */ -+ recognized = queue_handler = TRUE; -+ } -+ if (recognized) { -+ if (queue_handler) { -+ TRACE5("%p", &wnd->irq_kdpc); -+ queue_kdpc(&wnd->irq_kdpc); -+ } -+ EXIT6(return TRUE); -+ } -+ EXIT6(return FALSE); -+} -+WIN_FUNC_DECL(ndis_isr,2) -+ -+wstdcall NDIS_STATUS WIN_FUNC(NdisMRegisterInterrupt,7) -+ (struct ndis_mp_interrupt *mp_interrupt, -+ struct ndis_mp_block *nmb, UINT vector, UINT level, -+ BOOLEAN req_isr, BOOLEAN shared, enum kinterrupt_mode mode) -+{ -+ struct ndis_device *wnd = nmb->wnd; -+ struct miniport *mp; -+ -+ ENTER1("%p, vector:%d, level:%d, req_isr:%d, shared:%d, mode:%d", -+ mp_interrupt, vector, level, req_isr, shared, mode); -+ -+ mp = &wnd->wd->driver->ndis_driver->mp; -+ nt_spin_lock_init(&mp_interrupt->lock); -+ mp_interrupt->irq = vector; -+ mp_interrupt->isr = mp->isr; -+ mp_interrupt->mp_dpc = mp->handle_interrupt; -+ mp_interrupt->nmb = nmb; -+ mp_interrupt->req_isr = req_isr; -+ if (shared && !req_isr) -+ WARNING("shared but dynamic interrupt!"); -+ mp_interrupt->shared = shared; -+ wnd->mp_interrupt = mp_interrupt; -+ if (mp->enable_interrupt) -+ mp_interrupt->enable = TRUE; -+ else -+ mp_interrupt->enable = FALSE; -+ -+ if (deserialized_driver(wnd)) { -+ KeInitializeDpc(&wnd->irq_kdpc, -+ WIN_FUNC_PTR(deserialized_irq_handler,4), -+ nmb->wnd); -+ wnd->irq_kdpc.arg1 = mp->handle_interrupt; -+ wnd->irq_kdpc.arg2 = mp; -+ TRACE2("%p, %p, %p, %p", wnd->irq_kdpc.arg1, wnd->irq_kdpc.arg2, -+ nmb->wnd, nmb->mp_ctx); -+ } else { -+ KeInitializeDpc(&wnd->irq_kdpc, -+ WIN_FUNC_PTR(serialized_irq_handler,4), -+ nmb->wnd); -+ wnd->irq_kdpc.arg1 = mp->handle_interrupt; -+ wnd->irq_kdpc.arg2 = nmb->mp_ctx; -+ TRACE2("%p, %p, %p", wnd->irq_kdpc.arg1, wnd->irq_kdpc.arg2, -+ nmb->wnd); -+ } -+ -+ if (IoConnectInterrupt(&mp_interrupt->kinterrupt, -+ WIN_FUNC_PTR(ndis_isr,2), mp_interrupt, NULL, -+ vector, DIRQL, DIRQL, mode, shared, 0, FALSE) != -+ STATUS_SUCCESS) { -+ printk(KERN_WARNING "%s: request for IRQ %d failed\n", -+ DRIVER_NAME, vector); -+ return NDIS_STATUS_RESOURCES; -+ } -+ printk(KERN_INFO "%s: using IRQ %d\n", DRIVER_NAME, vector); -+ EXIT1(return NDIS_STATUS_SUCCESS); -+} -+ -+wstdcall void WIN_FUNC(NdisMDeregisterInterrupt,1) -+ (struct ndis_mp_interrupt *mp_interrupt) -+{ -+ struct ndis_mp_block *nmb; -+ -+ ENTER1("%p", mp_interrupt); -+ nmb = xchg(&mp_interrupt->nmb, NULL); -+ TRACE1("%p", nmb); -+ if (!nmb) { -+ WARNING("interrupt already freed?"); -+ return; -+ } -+ nmb->wnd->mp_interrupt = NULL; -+ if (dequeue_kdpc(&nmb->wnd->irq_kdpc)) -+ TRACE2("interrupt kdpc was pending"); -+ flush_workqueue(wrapndis_wq); -+ IoDisconnectInterrupt(mp_interrupt->kinterrupt); -+ EXIT1(return); -+} -+ -+wstdcall BOOLEAN WIN_FUNC(NdisMSynchronizeWithInterrupt,3) -+ (struct ndis_mp_interrupt *mp_interrupt, -+ PKSYNCHRONIZE_ROUTINE sync_func, void *ctx) -+{ -+ return KeSynchronizeExecution(mp_interrupt->kinterrupt, sync_func, ctx); -+} -+ -+/* called via function pointer; but 64-bit RNDIS driver calls directly */ -+wstdcall void WIN_FUNC(NdisMIndicateStatus,4) -+ (struct ndis_mp_block *nmb, NDIS_STATUS status, void *buf, UINT len) -+{ -+ struct ndis_device *wnd = nmb->wnd; -+ struct ndis_status_indication *si; -+ -+ ENTER2("status=0x%x len=%d", status, len); -+ switch (status) { -+ case NDIS_STATUS_MEDIA_CONNECT: -+ set_media_state(wnd, NdisMediaStateConnected); -+ break; -+ case NDIS_STATUS_MEDIA_DISCONNECT: -+ set_media_state(wnd, NdisMediaStateDisconnected); -+ break; -+ case NDIS_STATUS_MEDIA_SPECIFIC_INDICATION: -+ if (!buf) -+ break; -+ si = buf; -+ TRACE2("status_type=%d", si->status_type); -+ switch (si->status_type) { -+ case Ndis802_11StatusType_MediaStreamMode: -+ break; -+#ifdef CONFIG_WIRELESS_EXT -+ case Ndis802_11StatusType_Authentication: -+ buf = (char *)buf + sizeof(*si); -+ len -= sizeof(*si); -+ while (len > 0) { -+ int pairwise_error = 0, group_error = 0; -+ struct ndis_auth_req *auth_req = -+ (struct ndis_auth_req *)buf; -+ TRACE1(MACSTRSEP, MAC2STR(auth_req->bssid)); -+ if (auth_req->flags & 0x01) -+ TRACE2("reauth request"); -+ if (auth_req->flags & 0x02) -+ TRACE2("key update request"); -+ if (auth_req->flags & 0x06) { -+ pairwise_error = 1; -+ TRACE2("pairwise_error"); -+ } -+ if (auth_req->flags & 0x0E) { -+ group_error = 1; -+ TRACE2("group_error"); -+ } -+ if (pairwise_error || group_error) { -+ union iwreq_data wrqu; -+ struct iw_michaelmicfailure micfailure; -+ -+ memset(&micfailure, 0, sizeof(micfailure)); -+ if (pairwise_error) -+ micfailure.flags |= -+ IW_MICFAILURE_PAIRWISE; -+ if (group_error) -+ micfailure.flags |= -+ IW_MICFAILURE_GROUP; -+ memcpy(micfailure.src_addr.sa_data, -+ auth_req->bssid, ETH_ALEN); -+ memset(&wrqu, 0, sizeof(wrqu)); -+ wrqu.data.length = sizeof(micfailure); -+ wireless_send_event(wnd->net_dev, -+ IWEVMICHAELMICFAILURE, -+ &wrqu, (u8 *)&micfailure); -+ } -+ len -= auth_req->length; -+ buf = (char *)buf + auth_req->length; -+ } -+ break; -+ case Ndis802_11StatusType_PMKID_CandidateList: -+ { -+ u8 *end; -+ unsigned long i; -+ struct ndis_pmkid_candidate_list *cand; -+ -+ cand = buf + sizeof(struct ndis_status_indication); -+ if (len < sizeof(struct ndis_status_indication) + -+ sizeof(struct ndis_pmkid_candidate_list) || -+ cand->version != 1) { -+ WARNING("unrecognized PMKID ignored"); -+ EXIT1(return); -+ } -+ -+ end = (u8 *)buf + len; -+ TRACE2("PMKID ver %d num_cand %d", -+ cand->version, cand->num_candidates); -+ for (i = 0; i < cand->num_candidates; i++) { -+ struct iw_pmkid_cand pcand; -+ union iwreq_data wrqu; -+ struct ndis_pmkid_candidate *c = -+ &cand->candidates[i]; -+ if ((u8 *)(c + 1) > end) { -+ TRACE2("truncated PMKID"); -+ break; -+ } -+ TRACE2("%ld: " MACSTRSEP " 0x%x", -+ i, MAC2STR(c->bssid), c->flags); -+ memset(&pcand, 0, sizeof(pcand)); -+ if (c->flags & 0x01) -+ pcand.flags |= IW_PMKID_CAND_PREAUTH; -+ pcand.index = i; -+ memcpy(pcand.bssid.sa_data, c->bssid, ETH_ALEN); -+ -+ memset(&wrqu, 0, sizeof(wrqu)); -+ wrqu.data.length = sizeof(pcand); -+ wireless_send_event(wnd->net_dev, IWEVPMKIDCAND, -+ &wrqu, (u8 *)&pcand); -+ } -+ break; -+ } -+ case Ndis802_11StatusType_RadioState: -+ { -+ struct ndis_radio_status_indication *radio_status = buf; -+ if (radio_status->radio_state == -+ Ndis802_11RadioStatusOn) -+ INFO("radio is turned on"); -+ else if (radio_status->radio_state == -+ Ndis802_11RadioStatusHardwareOff) -+ INFO("radio is turned off by hardware"); -+ else if (radio_status->radio_state == -+ Ndis802_11RadioStatusSoftwareOff) -+ INFO("radio is turned off by software"); -+ break; -+ } -+#endif -+ default: -+ /* is this RSSI indication? */ -+ TRACE2("unknown indication: %x", si->status_type); -+ break; -+ } -+ break; -+ default: -+ TRACE2("unknown status: %08X", status); -+ break; -+ } -+ -+ EXIT2(return); -+} -+ -+/* called via function pointer; but 64-bit RNDIS driver calls directly */ -+wstdcall void WIN_FUNC(NdisMIndicateStatusComplete,1) -+ (struct ndis_mp_block *nmb) -+{ -+ struct ndis_device *wnd = nmb->wnd; -+ ENTER2("%p", wnd); -+ if (wnd->tx_ok) -+ queue_work(wrapndis_wq, &wnd->tx_work); -+} -+ -+/* called via function pointer */ -+wstdcall void NdisMSendComplete(struct ndis_mp_block *nmb, -+ struct ndis_packet *packet, NDIS_STATUS status) -+{ -+ struct ndis_device *wnd = nmb->wnd; -+ ENTER4("%p, %08X", packet, status); -+ assert_irql(_irql_ <= DISPATCH_LEVEL); -+ if (deserialized_driver(wnd)) -+ free_tx_packet(wnd, packet, status); -+ else { -+ struct ndis_packet_oob_data *oob_data; -+ NDIS_STATUS pkt_status; -+ TRACE3("%p, %08x", packet, status); -+ oob_data = NDIS_PACKET_OOB_DATA(packet); -+ switch ((pkt_status = xchg(&oob_data->status, status))) { -+ case NDIS_STATUS_NOT_RECOGNIZED: -+ free_tx_packet(wnd, packet, status); -+ break; -+ case NDIS_STATUS_PENDING: -+ case 0: -+ break; -+ default: -+ WARNING("%p: invalid status: %08X", packet, pkt_status); -+ break; -+ } -+ /* In case a serialized driver has earlier requested a -+ * pause by returning NDIS_STATUS_RESOURCES during -+ * MiniportSend(Packets), wakeup tx worker now. -+ */ -+ if (xchg(&wnd->tx_ok, 1) == 0) { -+ TRACE3("%d, %d", wnd->tx_ring_start, wnd->tx_ring_end); -+ queue_work(wrapndis_wq, &wnd->tx_work); -+ } -+ } -+ EXIT3(return); -+} -+ -+/* called via function pointer */ -+wstdcall void NdisMSendResourcesAvailable(struct ndis_mp_block *nmb) -+{ -+ struct ndis_device *wnd = nmb->wnd; -+ ENTER3("%d, %d", wnd->tx_ring_start, wnd->tx_ring_end); -+ wnd->tx_ok = 1; -+ queue_work(wrapndis_wq, &wnd->tx_work); -+ EXIT3(return); -+} -+ -+wstdcall void return_packet(void *arg1, void *arg2) -+{ -+ struct ndis_device *wnd; -+ struct ndis_packet *packet; -+ struct miniport *mp; -+ KIRQL irql; -+ -+ wnd = arg1; -+ packet = arg2; -+ ENTER4("%p, %p", wnd, packet); -+ mp = &wnd->wd->driver->ndis_driver->mp; -+ irql = serialize_lock_irql(wnd); -+ assert_irql(_irql_ == DISPATCH_LEVEL); -+ LIN2WIN2(mp->return_packet, wnd->nmb->mp_ctx, packet); -+ serialize_unlock_irql(wnd, irql); -+ EXIT4(return); -+} -+WIN_FUNC_DECL(return_packet,2) -+ -+/* called via function pointer */ -+wstdcall void NdisMIndicateReceivePacket(struct ndis_mp_block *nmb, -+ struct ndis_packet **packets, -+ UINT nr_packets) -+{ -+ struct ndis_device *wnd; -+ ndis_buffer *buffer; -+ struct ndis_packet *packet; -+ struct sk_buff *skb; -+ ULONG i, length, total_length; -+ struct ndis_packet_oob_data *oob_data; -+ void *virt; -+ struct ndis_tcp_ip_checksum_packet_info csum; -+ -+ ENTER3("%p, %d", nmb, nr_packets); -+ assert_irql(_irql_ <= DISPATCH_LEVEL); -+ wnd = nmb->wnd; -+ for (i = 0; i < nr_packets; i++) { -+ packet = packets[i]; -+ if (!packet) { -+ WARNING("empty packet ignored"); -+ continue; -+ } -+#if LINUX_VERSION_CODE <= KERNEL_VERSION(4,11,0) -+ wnd->net_dev->last_rx = jiffies; -+#endif -+ /* get total number of bytes in packet */ -+ NdisGetFirstBufferFromPacketSafe(packet, &buffer, &virt, -+ &length, &total_length, -+ NormalPagePriority); -+ TRACE3("%d, %d", length, total_length); -+ oob_data = NDIS_PACKET_OOB_DATA(packet); -+ TRACE3("0x%x, 0x%x, %llu", packet->private.flags, -+ packet->private.packet_flags, oob_data->time_rxed); -+ skb = dev_alloc_skb(total_length); -+ if (skb) { -+ while (buffer) { -+ memcpy_skb(skb, MmGetSystemAddressForMdl(buffer), -+ MmGetMdlByteCount(buffer)); -+ buffer = buffer->next; -+ } -+ skb->dev = wnd->net_dev; -+ skb->protocol = eth_type_trans(skb, wnd->net_dev); -+ pre_atomic_add(wnd->net_stats.rx_bytes, total_length); -+ atomic_inc_var(wnd->net_stats.rx_packets); -+ csum.value = (typeof(csum.value))(ULONG_PTR) -+ oob_data->ext.info[TcpIpChecksumPacketInfo]; -+ TRACE3("0x%05x", csum.value); -+ if (wnd->rx_csum.value && -+ (csum.rx.tcp_succeeded || csum.rx.udp_succeeded || -+ csum.rx.ip_succeeded)) -+ skb->ip_summed = CHECKSUM_UNNECESSARY; -+ else -+ skb->ip_summed = CHECKSUM_NONE; -+ -+ if (in_interrupt()) -+ netif_rx(skb); -+ else -+ netif_rx_ni(skb); -+ } else { -+ WARNING("couldn't allocate skb; packet dropped"); -+ atomic_inc_var(wnd->net_stats.rx_dropped); -+ } -+ -+ /* serialized drivers check the status upon return -+ * from this function */ -+ if (!deserialized_driver(wnd)) { -+ oob_data->status = NDIS_STATUS_SUCCESS; -+ continue; -+ } -+ -+ /* if a deserialized driver sets -+ * NDIS_STATUS_RESOURCES, then it reclaims the packet -+ * upon return from this function */ -+ if (oob_data->status == NDIS_STATUS_RESOURCES) -+ continue; -+ -+ assert(oob_data->status == NDIS_STATUS_SUCCESS); -+ /* deserialized driver doesn't check the status upon -+ * return from this function; we need to call -+ * MiniportReturnPacket later for this packet. Calling -+ * MiniportReturnPacket from here is not correct - the -+ * driver doesn't expect it (at least Centrino driver -+ * crashes) */ -+ schedule_ntos_work_item(WIN_FUNC_PTR(return_packet,2), -+ wnd, packet); -+ } -+ EXIT3(return); -+} -+ -+/* called via function pointer (by NdisMEthIndicateReceive macro); the -+ * first argument is nmb->eth_db */ -+wstdcall void EthRxIndicateHandler(struct ndis_mp_block *nmb, void *rx_ctx, -+ char *header1, char *header, UINT header_size, -+ void *look_ahead, UINT look_ahead_size, -+ UINT packet_size) -+{ -+ struct sk_buff *skb = NULL; -+ struct ndis_device *wnd; -+ unsigned int skb_size = 0; -+ KIRQL irql; -+ struct ndis_packet_oob_data *oob_data; -+ -+ ENTER3("nmb = %p, rx_ctx = %p, buf = %p, size = %d, buf = %p, " -+ "size = %d, packet = %d", nmb, rx_ctx, header, header_size, -+ look_ahead, look_ahead_size, packet_size); -+ -+ wnd = nmb->wnd; -+ TRACE3("wnd = %p", wnd); -+ if (!wnd) { -+ ERROR("nmb is NULL"); -+ EXIT3(return); -+ } -+#if LINUX_VERSION_CODE <= KERNEL_VERSION(4,11,0) -+ wnd->net_dev->last_rx = jiffies; -+#endif -+ -+ if (look_ahead_size < packet_size) { -+ struct ndis_packet *packet; -+ struct miniport *mp; -+ unsigned int bytes_txed; -+ NDIS_STATUS res; -+ -+ NdisAllocatePacket(&res, &packet, wnd->tx_packet_pool); -+ if (res != NDIS_STATUS_SUCCESS) { -+ atomic_inc_var(wnd->net_stats.rx_dropped); -+ EXIT3(return); -+ } -+ oob_data = NDIS_PACKET_OOB_DATA(packet); -+ mp = &wnd->wd->driver->ndis_driver->mp; -+ irql = serialize_lock_irql(wnd); -+ assert_irql(_irql_ == DISPATCH_LEVEL); -+ res = LIN2WIN6(mp->tx_data, packet, &bytes_txed, nmb, -+ rx_ctx, look_ahead_size, packet_size); -+ serialize_unlock_irql(wnd, irql); -+ TRACE3("%d, %d, %d", header_size, look_ahead_size, bytes_txed); -+ if (res == NDIS_STATUS_SUCCESS) { -+ ndis_buffer *buffer; -+ struct ndis_tcp_ip_checksum_packet_info csum; -+ skb = dev_alloc_skb(header_size + look_ahead_size + -+ bytes_txed); -+ if (!skb) { -+ ERROR("couldn't allocate skb; packet dropped"); -+ atomic_inc_var(wnd->net_stats.rx_dropped); -+ NdisFreePacket(packet); -+ return; -+ } -+ memcpy_skb(skb, header, header_size); -+ memcpy_skb(skb, look_ahead, look_ahead_size); -+ buffer = packet->private.buffer_head; -+ while (buffer) { -+ memcpy_skb(skb, -+ MmGetSystemAddressForMdl(buffer), -+ MmGetMdlByteCount(buffer)); -+ buffer = buffer->next; -+ } -+ skb_size = header_size + look_ahead_size + bytes_txed; -+ csum.value = (typeof(csum.value))(ULONG_PTR) -+ oob_data->ext.info[TcpIpChecksumPacketInfo]; -+ TRACE3("0x%05x", csum.value); -+ if (wnd->rx_csum.value && -+ (csum.rx.tcp_succeeded || csum.rx.udp_succeeded)) -+ skb->ip_summed = CHECKSUM_UNNECESSARY; -+ else -+ skb->ip_summed = CHECKSUM_NONE; -+ NdisFreePacket(packet); -+ } else if (res == NDIS_STATUS_PENDING) { -+ /* driver will call td_complete */ -+ oob_data->look_ahead = kmalloc(look_ahead_size, -+ GFP_ATOMIC); -+ if (!oob_data->look_ahead) { -+ NdisFreePacket(packet); -+ ERROR("packet dropped"); -+ atomic_inc_var(wnd->net_stats.rx_dropped); -+ EXIT3(return); -+ } -+ assert(sizeof(oob_data->header) == header_size); -+ memcpy(oob_data->header, header, -+ sizeof(oob_data->header)); -+ memcpy(oob_data->look_ahead, look_ahead, -+ look_ahead_size); -+ oob_data->look_ahead_size = look_ahead_size; -+ EXIT3(return); -+ } else { -+ WARNING("packet dropped: %08X", res); -+ atomic_inc_var(wnd->net_stats.rx_dropped); -+ NdisFreePacket(packet); -+ EXIT3(return); -+ } -+ } else { -+ skb_size = header_size + packet_size; -+ skb = dev_alloc_skb(skb_size); -+ if (skb) { -+ memcpy_skb(skb, header, header_size); -+ memcpy_skb(skb, look_ahead, packet_size); -+ } -+ } -+ -+ if (skb) { -+ skb->dev = wnd->net_dev; -+ skb->protocol = eth_type_trans(skb, wnd->net_dev); -+ pre_atomic_add(wnd->net_stats.rx_bytes, skb_size); -+ atomic_inc_var(wnd->net_stats.rx_packets); -+ if (in_interrupt()) -+ netif_rx(skb); -+ else -+ netif_rx_ni(skb); -+ } -+ -+ EXIT3(return); -+} -+ -+/* called via function pointer */ -+wstdcall void NdisMTransferDataComplete(struct ndis_mp_block *nmb, -+ struct ndis_packet *packet, -+ NDIS_STATUS status, UINT bytes_txed) -+{ -+ struct ndis_device *wnd = nmb->wnd; -+ struct sk_buff *skb; -+ unsigned int skb_size; -+ struct ndis_packet_oob_data *oob_data; -+ ndis_buffer *buffer; -+ struct ndis_tcp_ip_checksum_packet_info csum; -+ -+ ENTER3("wnd = %p, packet = %p, bytes_txed = %d", -+ wnd, packet, bytes_txed); -+ if (!packet) { -+ WARNING("illegal packet"); -+ EXIT3(return); -+ } -+#if LINUX_VERSION_CODE <= KERNEL_VERSION(4,11,0) -+ wnd->net_dev->last_rx = jiffies; -+#endif -+ oob_data = NDIS_PACKET_OOB_DATA(packet); -+ skb_size = sizeof(oob_data->header) + oob_data->look_ahead_size + -+ bytes_txed; -+ skb = dev_alloc_skb(skb_size); -+ if (!skb) { -+ kfree(oob_data->look_ahead); -+ NdisFreePacket(packet); -+ ERROR("couldn't allocate skb; packet dropped"); -+ atomic_inc_var(wnd->net_stats.rx_dropped); -+ EXIT3(return); -+ } -+ memcpy_skb(skb, oob_data->header, sizeof(oob_data->header)); -+ memcpy_skb(skb, oob_data->look_ahead, oob_data->look_ahead_size); -+ buffer = packet->private.buffer_head; -+ while (buffer) { -+ memcpy_skb(skb, MmGetSystemAddressForMdl(buffer), -+ MmGetMdlByteCount(buffer)); -+ buffer = buffer->next; -+ } -+ kfree(oob_data->look_ahead); -+ NdisFreePacket(packet); -+ skb->dev = wnd->net_dev; -+ skb->protocol = eth_type_trans(skb, wnd->net_dev); -+ pre_atomic_add(wnd->net_stats.rx_bytes, skb_size); -+ atomic_inc_var(wnd->net_stats.rx_packets); -+ -+ csum.value = (typeof(csum.value))(ULONG_PTR) -+ oob_data->ext.info[TcpIpChecksumPacketInfo]; -+ TRACE3("0x%05x", csum.value); -+ if (wnd->rx_csum.value && -+ (csum.rx.tcp_succeeded || csum.rx.udp_succeeded)) -+ skb->ip_summed = CHECKSUM_UNNECESSARY; -+ else -+ skb->ip_summed = CHECKSUM_NONE; -+ -+ if (in_interrupt()) -+ netif_rx(skb); -+ else -+ netif_rx_ni(skb); -+} -+ -+/* called via function pointer */ -+wstdcall void EthRxComplete(struct ndis_mp_block *nmb) -+{ -+ TRACE3(""); -+} -+ -+/* called via function pointer */ -+wstdcall void NdisMQueryInformationComplete(struct ndis_mp_block *nmb, -+ NDIS_STATUS status) -+{ -+ struct ndis_device *wnd = nmb->wnd; -+ typeof(wnd->ndis_req_task) task; -+ -+ ENTER2("nmb: %p, wnd: %p, %08X", nmb, wnd, status); -+ wnd->ndis_req_status = status; -+ wnd->ndis_req_done = 1; -+ if ((task = xchg(&wnd->ndis_req_task, NULL))) -+ wake_up_process(task); -+ else -+ WARNING("invalid task"); -+ EXIT2(return); -+} -+ -+/* called via function pointer */ -+wstdcall void NdisMSetInformationComplete(struct ndis_mp_block *nmb, -+ NDIS_STATUS status) -+{ -+ struct ndis_device *wnd = nmb->wnd; -+ typeof(wnd->ndis_req_task) task; -+ -+ ENTER2("status = %08X", status); -+ wnd->ndis_req_status = status; -+ wnd->ndis_req_done = 1; -+ if ((task = xchg(&wnd->ndis_req_task, NULL))) -+ wake_up_process(task); -+ else -+ WARNING("invalid task"); -+ EXIT2(return); -+} -+ -+/* called via function pointer */ -+wstdcall void NdisMResetComplete(struct ndis_mp_block *nmb, -+ NDIS_STATUS status, BOOLEAN address_reset) -+{ -+ struct ndis_device *wnd = nmb->wnd; -+ typeof(wnd->ndis_req_task) task; -+ -+ ENTER2("status: %08X, %u", status, address_reset); -+ wnd->ndis_req_status = status; -+ wnd->ndis_req_done = address_reset + 1; -+ if ((task = xchg(&wnd->ndis_req_task, NULL))) -+ wake_up_process(task); -+ else -+ WARNING("invalid task"); -+ EXIT2(return); -+} -+ -+wstdcall void WIN_FUNC(NdisMSleep,1) -+ (ULONG us) -+{ -+ unsigned long delay; -+ -+ ENTER4("%p: us: %u", current, us); -+ delay = USEC_TO_HZ(us); -+ sleep_hz(delay); -+ TRACE4("%p: done", current); -+} -+ -+wstdcall void WIN_FUNC(NdisGetCurrentSystemTime,1) -+ (LARGE_INTEGER *time) -+{ -+ *time = ticks_1601(); -+ TRACE5("%llu, %lu", *time, jiffies); -+} -+ -+wstdcall LONG WIN_FUNC(NdisInterlockedDecrement,1) -+ (LONG *val) -+{ -+ return InterlockedDecrement(val); -+} -+ -+wstdcall LONG WIN_FUNC(NdisInterlockedIncrement,1) -+ (LONG *val) -+{ -+ return InterlockedIncrement(val); -+} -+ -+wstdcall struct nt_list *WIN_FUNC(NdisInterlockedInsertHeadList,3) -+ (struct nt_list *head, struct nt_list *entry, -+ struct ndis_spinlock *lock) -+{ -+ return ExInterlockedInsertHeadList(head, entry, &lock->klock); -+} -+ -+wstdcall struct nt_list *WIN_FUNC(NdisInterlockedInsertTailList,3) -+ (struct nt_list *head, struct nt_list *entry, -+ struct ndis_spinlock *lock) -+{ -+ return ExInterlockedInsertTailList(head, entry, &lock->klock); -+} -+ -+wstdcall struct nt_list *WIN_FUNC(NdisInterlockedRemoveHeadList,2) -+ (struct nt_list *head, struct ndis_spinlock *lock) -+{ -+ return ExInterlockedRemoveHeadList(head, &lock->klock); -+} -+ -+wstdcall NDIS_STATUS WIN_FUNC(NdisMInitializeScatterGatherDma,3) -+ (struct ndis_mp_block *nmb, BOOLEAN dma64_supported, ULONG max_phy_map) -+{ -+ struct ndis_device *wnd = nmb->wnd; -+ ENTER2("dma64_supported=%d, maxtransfer=%u", dma64_supported, -+ max_phy_map); -+ if (!wrap_is_pci_bus(wnd->wd->dev_bus)) { -+ ERROR("used on a non-PCI device"); -+ return NDIS_STATUS_NOT_SUPPORTED; -+ } -+#ifdef CONFIG_X86_64 -+ if (!dma64_supported) { -+ TRACE1("64-bit DMA size is not supported"); -+ if (pci_set_dma_mask(wnd->wd->pci.pdev, DMA_BIT_MASK(32)) || -+ pci_set_consistent_dma_mask(wnd->wd->pci.pdev, -+ DMA_BIT_MASK(32))) -+ WARNING("setting dma mask failed"); -+ } -+#endif -+ if ((wnd->attributes & NDIS_ATTRIBUTE_BUS_MASTER) && -+ wrap_is_pci_bus(wnd->wd->dev_bus)) { -+ wnd->sg_dma_size = max_phy_map; -+ return NDIS_STATUS_SUCCESS; -+ } else -+ EXIT1(return NDIS_STATUS_NOT_SUPPORTED); -+} -+ -+wstdcall ULONG WIN_FUNC(NdisMGetDmaAlignment,1) -+ (struct ndis_mp_block *nmb) -+{ -+ ENTER3(""); -+ return dma_get_cache_alignment(); -+} -+ -+wstdcall CHAR WIN_FUNC(NdisSystemProcessorCount,0) -+ (void) -+{ -+ return num_online_cpus(); -+} -+ -+wstdcall void WIN_FUNC(NdisGetCurrentProcessorCounts,3) -+ (ULONG *idle, ULONG *kernel_user, ULONG *index) -+{ -+ int cpu = smp_processor_id(); -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,3,0) -+ *idle = kcpustat_cpu(cpu).cpustat[CPUTIME_IDLE]; -+ *kernel_user = kcpustat_cpu(cpu).cpustat[CPUTIME_SYSTEM] + -+ kcpustat_cpu(cpu).cpustat[CPUTIME_USER]; -+#else -+ *idle = kstat_cpu(cpu).cpustat.idle; -+ *kernel_user = kstat_cpu(cpu).cpustat.system + -+ kstat_cpu(cpu).cpustat.user; -+#endif -+ *index = cpu; -+} -+ -+wstdcall void WIN_FUNC(NdisInitializeEvent,1) -+ (struct ndis_event *ndis_event) -+{ -+ EVENTENTER("%p", ndis_event); -+ KeInitializeEvent(&ndis_event->nt_event, NotificationEvent, 0); -+} -+ -+wstdcall BOOLEAN WIN_FUNC(NdisWaitEvent,2) -+ (struct ndis_event *ndis_event, UINT ms) -+{ -+ LARGE_INTEGER ticks; -+ NTSTATUS res; -+ -+ EVENTENTER("%p %u", ndis_event, ms); -+ ticks = -((LARGE_INTEGER)ms * TICKSPERMSEC); -+ res = KeWaitForSingleObject(&ndis_event->nt_event, 0, 0, TRUE, -+ ms == 0 ? NULL : &ticks); -+ if (res == STATUS_SUCCESS) -+ EXIT3(return TRUE); -+ else -+ EXIT3(return FALSE); -+} -+ -+wstdcall void WIN_FUNC(NdisSetEvent,1) -+ (struct ndis_event *ndis_event) -+{ -+ EVENTENTER("%p", ndis_event); -+ KeSetEvent(&ndis_event->nt_event, 0, 0); -+} -+ -+wstdcall void WIN_FUNC(NdisResetEvent,1) -+ (struct ndis_event *ndis_event) -+{ -+ EVENTENTER("%p", ndis_event); -+ KeResetEvent(&ndis_event->nt_event); -+} -+ -+static void ndis_worker(struct work_struct *dummy) -+{ -+ struct nt_list *ent; -+ struct ndis_work_item *ndis_work_item; -+ -+ WORKENTER(""); -+ while (1) { -+ spin_lock_bh(&ndis_work_list_lock); -+ ent = RemoveHeadList(&ndis_work_list); -+ spin_unlock_bh(&ndis_work_list_lock); -+ if (!ent) -+ break; -+ ndis_work_item = container_of(ent, struct ndis_work_item, list); -+ WORKTRACE("%p: %p, %p", ndis_work_item, -+ ndis_work_item->func, ndis_work_item->ctx); -+ LIN2WIN2(ndis_work_item->func, ndis_work_item, -+ ndis_work_item->ctx); -+ WORKTRACE("%p done", ndis_work_item); -+ } -+ WORKEXIT(return); -+} -+ -+wstdcall NDIS_STATUS WIN_FUNC(NdisScheduleWorkItem,1) -+ (struct ndis_work_item *ndis_work_item) -+{ -+ ENTER3("%p", ndis_work_item); -+ spin_lock_bh(&ndis_work_list_lock); -+ InsertTailList(&ndis_work_list, &ndis_work_item->list); -+ spin_unlock_bh(&ndis_work_list_lock); -+ WORKTRACE("scheduling %p", ndis_work_item); -+ queue_work(ndis_wq, &ndis_work); -+ EXIT3(return NDIS_STATUS_SUCCESS); -+} -+ -+wstdcall void WIN_FUNC(NdisMGetDeviceProperty,6) -+ (struct ndis_mp_block *nmb, void **phy_dev, void **func_dev, -+ void **next_dev, void **alloc_res, void**trans_res) -+{ -+ ENTER2("nmb: %p, phy_dev = %p, func_dev = %p, next_dev = %p, " -+ "alloc_res = %p, trans_res = %p", nmb, phy_dev, func_dev, -+ next_dev, alloc_res, trans_res); -+ if (phy_dev) -+ *phy_dev = nmb->pdo; -+ if (func_dev) -+ *func_dev = nmb->fdo; -+ if (next_dev) -+ *next_dev = nmb->next_device; -+} -+ -+wstdcall void WIN_FUNC(NdisMRegisterUnloadHandler,2) -+ (struct driver_object *drv_obj, void *unload) -+{ -+ if (drv_obj) -+ drv_obj->unload = unload; -+ return; -+} -+ -+wstdcall UINT WIN_FUNC(NdisGetVersion,0) -+ (void) -+{ -+ return 0x00050001; -+} -+ -+wstdcall NDIS_STATUS WIN_FUNC(NdisMQueryAdapterInstanceName,2) -+ (struct unicode_string *name, struct ndis_mp_block *nmb) -+{ -+ struct ndis_device *wnd = nmb->wnd; -+ struct ansi_string ansi; -+ -+ if (wrap_is_pci_bus(wnd->wd->dev_bus)) -+ RtlInitAnsiString(&ansi, "PCI Ethernet Adapter"); -+ else -+ RtlInitAnsiString(&ansi, "USB Ethernet Adapter"); -+ -+ if (RtlAnsiStringToUnicodeString(name, &ansi, TRUE)) -+ EXIT2(return NDIS_STATUS_RESOURCES); -+ else -+ EXIT2(return NDIS_STATUS_SUCCESS); -+} -+ -+wstdcall NDIS_STATUS WIN_FUNC(NdisWriteEventLogEntry,7) -+ (void *handle, NDIS_STATUS code, ULONG value, USHORT n, -+ void *strings, ULONG datasize, void *data) -+{ -+ TRACE1("0x%x, 0x%x, %u, %u", code, value, n, datasize); -+ return NDIS_STATUS_SUCCESS; -+} -+ -+wstdcall void *WIN_FUNC(NdisGetRoutineAddress,1) -+ (struct unicode_string *unicode_string) -+{ -+ struct ansi_string ansi_string; -+ void *address; -+ -+ if (RtlUnicodeStringToAnsiString(&ansi_string, unicode_string, TRUE) != -+ STATUS_SUCCESS) -+ EXIT1(return NULL); -+ INFO("%s", ansi_string.buf); -+ address = ndis_get_routine_address(ansi_string.buf); -+ RtlFreeAnsiString(&ansi_string); -+ return address; -+} -+ -+wstdcall ULONG WIN_FUNC(NdisReadPcmciaAttributeMemory,4) -+ (struct ndis_mp_block *nmb, ULONG offset, void *buffer, -+ ULONG length) -+{ -+ TODO(); -+ return 0; -+} -+ -+wstdcall ULONG WIN_FUNC(NdisWritePcmciaAttributeMemory,4) -+ (struct ndis_mp_block *nmb, ULONG offset, void *buffer, -+ ULONG length) -+{ -+ TODO(); -+ return 0; -+} -+ -+wstdcall void WIN_FUNC(NdisMCoIndicateReceivePacket,3) -+ (struct ndis_mp_block *nmb, struct ndis_packet **packets, -+ UINT nr_packets) -+{ -+ ENTER3("nmb = %p", nmb); -+ NdisMIndicateReceivePacket(nmb, packets, nr_packets); -+ EXIT3(return); -+} -+ -+wstdcall void WIN_FUNC(NdisMCoSendComplete,3) -+ (NDIS_STATUS status, struct ndis_mp_block *nmb, -+ struct ndis_packet *packet) -+{ -+ ENTER3("%08x", status); -+ NdisMSendComplete(nmb, packet, status); -+ EXIT3(return); -+} -+ -+wstdcall void WIN_FUNC(NdisMCoRequestComplete,3) -+ (NDIS_STATUS status, struct ndis_mp_block *nmb, -+ struct ndis_request *ndis_request) -+{ -+ struct ndis_device *wnd = nmb->wnd; -+ typeof(wnd->ndis_req_task) task; -+ -+ ENTER3("%08X", status); -+ wnd->ndis_req_status = status; -+ wnd->ndis_req_done = 1; -+ if ((task = xchg(&wnd->ndis_req_task, NULL))) -+ wake_up_process(task); -+ else -+ WARNING("invalid task"); -+ EXIT3(return); -+} -+ -+wstdcall NDIS_STATUS WIN_FUNC(NdisIMNotifiyPnPEvent,2) -+ (struct ndis_mp_block *nmb, struct net_pnp_event *event) -+{ -+ ENTER2("%p, %d", nmb, event->code); -+ /* NdisWrapper never calls protocol's pnp event notifier, so -+ * nothing to do here */ -+ EXIT2(return NDIS_STATUS_SUCCESS); -+} -+ -+wstdcall void WIN_FUNC(NdisCompletePnPEvent,3) -+ (NDIS_STATUS status, void *handle, struct net_pnp_event *event) -+{ -+ ENTER2("%d, %p, %d", status, handle, event->code); -+ /* NdisWrapper never calls protocol's pnp event notifier, so -+ * nothing to do here */ -+ EXIT2(return); -+} -+ -+wstdcall NDIS_STATUS WIN_FUNC(NdisMSetMiniportSecondary,2) -+ (struct ndis_mp_block *nmb2, struct ndis_mp_block *nmb1) -+{ -+ ENTER3("%p, %p", nmb1, nmb2); -+ TODO(); -+ EXIT3(return NDIS_STATUS_SUCCESS); -+} -+ -+wstdcall NDIS_STATUS WIN_FUNC(NdisMPromoteMiniport,1) -+ (struct ndis_mp_block *nmb) -+{ -+ ENTER3("%p", nmb); -+ TODO(); -+ EXIT3(return NDIS_STATUS_SUCCESS); -+} -+ -+wstdcall void WIN_FUNC(NdisMCoActivateVcComplete,3) -+ (NDIS_STATUS status, void *handle, void *params) -+{ -+ TODO(); -+} -+ -+wstdcall void WIN_FUNC(NdisMCoDeactivateVcComplete,2) -+ (NDIS_STATUS status, void *handle) -+{ -+ TODO(); -+} -+ -+wstdcall void WIN_FUNC(NdisMRemoveMiniport,1) -+ (void *handle) -+{ -+ TODO(); -+} -+ -+wstdcall NDIS_STATUS WIN_FUNC(NdisMOpenLog,3) -+ (struct ndis_device *wnd, UINT size, void *handle) -+{ -+ if (size >= sizeof(int)) -+ *((int *)handle) = 42; -+ return NDIS_STATUS_SUCCESS; -+} -+ -+wstdcall NDIS_STATUS WIN_FUNC(NdisMWriteLogData,3) -+ (void *handle, char *buffer, UINT buffer_size) -+{ -+ TODO(); -+ return NDIS_STATUS_SUCCESS; -+} -+ -+wstdcall void WIN_FUNC(NdisMFlushLog,1) -+ (void *handle) -+{ -+ TODO(); -+} -+ -+wstdcall void WIN_FUNC(NdisMCloseLog,1) -+ (void *handle) -+{ -+ TODO(); -+} -+ -+static void *ndis_get_routine_address(char *name) -+{ -+ int i; -+ ENTER2("%p", name); -+ for (i = 0; i < ARRAY_SIZE(ndis_exports); i++) { -+ if (strcmp(name, ndis_exports[i].name) == 0) { -+ TRACE2("%p", ndis_exports[i].func); -+ return ndis_exports[i].func; -+ } -+ } -+ EXIT2(return NULL); -+} -+ -+/* ndis_init_device is called for each device */ -+int ndis_init_device(struct ndis_device *wnd) -+{ -+ struct ndis_mp_block *nmb = wnd->nmb; -+ -+ KeInitializeSpinLock(&nmb->lock); -+ wnd->mp_interrupt = NULL; -+ wnd->wrap_timer_slist.next = NULL; -+ if (wnd->wd->driver->ndis_driver) -+ wnd->wd->driver->ndis_driver->mp.shutdown = NULL; -+ -+ nmb->filterdbs.eth_db = nmb; -+ nmb->filterdbs.tr_db = nmb; -+ nmb->filterdbs.fddi_db = nmb; -+ nmb->filterdbs.arc_db = nmb; -+ -+ nmb->rx_packet = WIN_FUNC_PTR(NdisMIndicateReceivePacket,3); -+ nmb->send_complete = WIN_FUNC_PTR(NdisMSendComplete,3); -+ nmb->send_resource_avail = WIN_FUNC_PTR(NdisMSendResourcesAvailable,1); -+ nmb->status = WIN_FUNC_PTR(NdisMIndicateStatus,4); -+ nmb->status_complete = WIN_FUNC_PTR(NdisMIndicateStatusComplete,1); -+ nmb->queryinfo_complete = WIN_FUNC_PTR(NdisMQueryInformationComplete,2); -+ nmb->setinfo_complete = WIN_FUNC_PTR(NdisMSetInformationComplete,2); -+ nmb->reset_complete = WIN_FUNC_PTR(NdisMResetComplete,3); -+ nmb->eth_rx_indicate = WIN_FUNC_PTR(EthRxIndicateHandler,8); -+ nmb->eth_rx_complete = WIN_FUNC_PTR(EthRxComplete,1); -+ nmb->td_complete = WIN_FUNC_PTR(NdisMTransferDataComplete,4); -+ return 0; -+} -+ -+/* ndis_exit_device is called for each device */ -+void ndis_exit_device(struct ndis_device *wnd) -+{ -+ struct wrap_device_setting *setting; -+ ENTER2("%p", wnd); -+ mutex_lock(&loader_mutex); -+ nt_list_for_each_entry(setting, &wnd->wd->settings, list) { -+ struct ndis_configuration_parameter *param; -+ param = setting->encoded; -+ if (param) { -+ if (param->type == NdisParameterString) -+ RtlFreeUnicodeString(¶m->data.string); -+ ExFreePool(param); -+ setting->encoded = NULL; -+ } -+ } -+ mutex_unlock(&loader_mutex); -+} -+ -+/* ndis_init is called once when module is loaded */ -+int ndis_init(void) -+{ -+ InitializeListHead(&ndis_work_list); -+ spin_lock_init(&ndis_work_list_lock); -+ INIT_WORK(&ndis_work, ndis_worker); -+ -+ ndis_wq = create_singlethread_workqueue("ndis_wq"); -+ if (!ndis_wq) { -+ WARNING("couldn't create worker thread"); -+ EXIT1(return -ENOMEM); -+ } -+ -+ TRACE1("ndis_wq: %p", ndis_wq); -+ return 0; -+} -+ -+/* ndis_exit is called once when module is removed */ -+void ndis_exit(void) -+{ -+ ENTER1(""); -+ if (ndis_wq) -+ destroy_workqueue(ndis_wq); -+ EXIT1(return); -+} -diff -Nurp linux-5.6.11/3rdparty/ndiswrapper/ndis.h linux-5.6.11-ndis/3rdparty/ndiswrapper/ndis.h ---- linux-5.6.11/3rdparty/ndiswrapper/ndis.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.6.11-ndis/3rdparty/ndiswrapper/ndis.h 2020-05-03 15:18:33.000000000 +0300 -@@ -0,0 +1,1309 @@ -+/* -+ * Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ */ -+ -+#ifndef _NDIS_H_ -+#define _NDIS_H_ -+ -+#include "ntoskernel.h" -+ -+//#define ALLOW_POOL_OVERFLOW 1 -+ -+#define NDIS_DMA_24BITS 0 -+#define NDIS_DMA_32BITS 1 -+#define NDIS_DMA_64BITS 2 -+ -+#ifdef CONFIG_X86_64 -+#define MAXIMUM_PROCESSORS 64 -+#else -+#define MAXIMUM_PROCESSORS 32 -+#endif -+ -+typedef UINT NDIS_STATUS; -+typedef UCHAR NDIS_DMA_SIZE; -+typedef LONG ndis_rssi; -+typedef ULONG ndis_key_index; -+typedef ULONG ndis_tx_power_level; -+typedef ULONGULONG ndis_key_rsc; -+typedef UCHAR mac_address[ETH_ALEN]; -+typedef ULONG ndis_fragmentation_threshold; -+typedef ULONG ndis_rts_threshold; -+typedef ULONG ndis_antenna; -+typedef ULONG ndis_oid; -+ -+typedef uint64_t NDIS_PHY_ADDRESS; -+ -+struct ndis_sg_element { -+ PHYSICAL_ADDRESS address; -+ ULONG length; -+ ULONG_PTR reserved; -+}; -+ -+struct ndis_sg_list { -+ ULONG nent; -+ ULONG_PTR reserved; -+ struct ndis_sg_element elements[]; -+}; -+ -+/* when sending packets, ndiswrapper associates exactly one sg element -+ * in sg list */ -+struct wrap_tx_sg_list { -+ ULONG nent; -+ ULONG_PTR reserved; -+ struct ndis_sg_element elements[1]; -+}; -+ -+struct ndis_phy_addr_unit { -+ NDIS_PHY_ADDRESS phy_addr; -+ UINT length; -+}; -+ -+typedef struct mdl ndis_buffer; -+ -+struct ndis_buffer_pool { -+ ndis_buffer *free_descr; -+// NT_SPIN_LOCK lock; -+ spinlock_t lock; -+ UINT max_descr; -+ UINT num_allocated_descr; -+}; -+ -+#define NDIS_PROTOCOL_ID_DEFAULT 0x00 -+#define NDIS_PROTOCOL_ID_TCP_IP 0x02 -+#define NDIS_PROTOCOL_ID_IPX 0x06 -+#define NDIS_PROTOCOL_ID_NBF 0x07 -+#define NDIS_PROTOCOL_ID_MAX 0x0F -+#define NDIS_PROTOCOL_ID_MASK 0x0F -+ -+#define fPACKET_WRAPPER_RESERVED 0x3F -+#define fPACKET_CONTAINS_MEDIA_SPECIFIC_INFO 0x40 -+#define fPACKET_ALLOCATED_BY_NDIS 0x80 -+ -+#define PROTOCOL_RESERVED_SIZE_IN_PACKET (4 * sizeof(void *)) -+ -+struct transport_header_offset { -+ USHORT protocol_type; -+ USHORT header_offset; -+}; -+ -+struct ndis_network_address { -+ USHORT length; -+ USHORT type; -+ UCHAR address[1]; -+}; -+ -+struct ndis_network_address_list { -+ LONG count; -+ USHORT type; -+ struct ndis_network_address address[1]; -+}; -+ -+struct ndis_tcp_ip_checksum_packet_info { -+ union { -+ struct { -+ ULONG v4:1; -+ ULONG v6:1; -+ ULONG tcp:1; -+ ULONG udp:1; -+ ULONG ip:1; -+ } tx; -+ struct { -+ ULONG tcp_failed:1; -+ ULONG udp_failed:1; -+ ULONG ip_failed:1; -+ ULONG tcp_succeeded:1; -+ ULONG udp_succeeded:1; -+ ULONG ip_succeeded:1; -+ ULONG loopback:1; -+ } rx; -+ ULONG value; -+ }; -+}; -+ -+enum ndis_task { -+ TcpIpChecksumNdisTask, IpSecNdisTask, TcpLargeSendNdisTask, MaxNdisTask -+}; -+ -+enum ndis_encapsulation { -+ UNSPECIFIED_Encapsulation, NULL_Encapsulation, -+ IEEE_802_3_Encapsulation, IEEE_802_5_Encapsulation, -+ LLC_SNAP_ROUTED_Encapsulation, LLC_SNAP_BRIDGED_Encapsulation -+}; -+ -+#define NDIS_TASK_OFFLOAD_VERSION 1 -+ -+struct ndis_encapsulation_format { -+ enum ndis_encapsulation encap; -+ struct { -+ ULONG fixed_header_size:1; -+ ULONG reserved:31; -+ } flags; -+ ULONG header_size; -+}; -+ -+struct ndis_task_offload_header { -+ ULONG version; -+ ULONG size; -+ ULONG reserved; -+ ULONG offset_first_task; -+ struct ndis_encapsulation_format encap_format; -+}; -+ -+struct ndis_task_offload { -+ ULONG version; -+ ULONG size; -+ enum ndis_task task; -+ ULONG offset_next_task; -+ ULONG task_buf_length; -+ UCHAR task_buf[1]; -+}; -+ -+struct v4_checksum { -+ union { -+ struct { -+ ULONG ip_opts:1; -+ ULONG tcp_opts:1; -+ ULONG tcp_csum:1; -+ ULONG udp_csum:1; -+ ULONG ip_csum:1; -+ }; -+ ULONG value; -+ }; -+}; -+ -+struct v6_checksum { -+ ULONG ip_supported:1; -+ ULONG tcp_supported:1; -+ ULONG tcp_csum:1; -+ ULONG udp_csum:1; -+}; -+ -+struct ndis_task_tcp_ip_checksum { -+ struct v4_checksum v4_tx; -+ struct v4_checksum v4_rx; -+ struct v6_checksum v6_tx; -+ struct v6_checksum v6_rx; -+}; -+ -+struct ndis_task_tcp_large_send { -+ ULONG version; -+ ULONG max_size; -+ ULONG min_seg_count; -+ BOOLEAN tcp_opts; -+ BOOLEAN ip_opts; -+}; -+ -+struct ndis_packet; -+ -+struct ndis_packet_pool { -+ struct ndis_packet *free_descr; -+// NT_SPIN_LOCK lock; -+ spinlock_t lock; -+ UINT max_descr; -+ UINT num_allocated_descr; -+ UINT num_used_descr; -+ UINT proto_rsvd_length; -+}; -+ -+struct ndis_packet_stack { -+ ULONG_PTR IM_reserved[2]; -+ ULONG_PTR ndis_reserved[4]; -+}; -+ -+enum ndis_per_packet_info { -+ TcpIpChecksumPacketInfo, IpSecPacketInfo, TcpLargeSendPacketInfo, -+ ClassificationHandlePacketInfo, NdisReserved, -+ ScatterGatherListPacketInfo, Ieee8021QInfo, OriginalPacketInfo, -+ PacketCancelId, MaxPerPacketInfo -+}; -+ -+struct ndis_packet_extension { -+ void *info[MaxPerPacketInfo]; -+}; -+ -+struct ndis_packet_private { -+ UINT nr_pages; -+ UINT len; -+ ndis_buffer *buffer_head; -+ ndis_buffer *buffer_tail; -+ struct ndis_packet_pool *pool; -+ UINT count; -+ ULONG flags; -+ BOOLEAN valid_counts; -+ UCHAR packet_flags; -+ USHORT oob_offset; -+}; -+ -+struct ndis_packet { -+ struct ndis_packet_private private; -+ /* for use by miniport */ -+ union { -+ /* for connectionless mininports */ -+ struct { -+ UCHAR miniport_reserved[2 * sizeof(void *)]; -+ UCHAR wrapper_reserved[2 * sizeof(void *)]; -+ } cl_reserved; -+ /* for deserialized miniports */ -+ struct { -+ UCHAR miniport_reserved_ex[3 * sizeof(void *)]; -+ UCHAR wrapper_reserved_ex[sizeof(void *)]; -+ } deserialized_reserved; -+ struct { -+ UCHAR mac_reserved[4 * sizeof(void *)]; -+ } mac_reserved; -+ }; -+ ULONG_PTR reserved[2]; -+ UCHAR protocol_reserved[1]; -+}; -+ -+/* OOB data */ -+struct ndis_packet_oob_data { -+ union { -+ ULONGLONG time_to_tx; -+ ULONGLONG time_txed; -+ }; -+ ULONGLONG time_rxed; -+ UINT header_size; -+ UINT media_size; -+ void *media; -+ NDIS_STATUS status; -+ -+ /* ndiswrapper specific info; extension should be right after -+ * ndis's oob_data */ -+ struct ndis_packet_extension ext; -+ union { -+ /* used for tx only */ -+ struct { -+ struct sk_buff *tx_skb; -+ union { -+ struct wrap_tx_sg_list wrap_tx_sg_list; -+ struct ndis_sg_list *tx_sg_list; -+ }; -+ }; -+ /* used for rx only */ -+ struct { -+ unsigned char header[ETH_HLEN]; -+ unsigned char *look_ahead; -+ UINT look_ahead_size; -+ }; -+ }; -+}; -+ -+#define NDIS_PACKET_OOB_DATA(packet) \ -+ (struct ndis_packet_oob_data *)(((void *)(packet)) + \ -+ (packet)->private.oob_offset) -+ -+enum ndis_device_pnp_event { -+ NdisDevicePnPEventQueryRemoved, NdisDevicePnPEventRemoved, -+ NdisDevicePnPEventSurpriseRemoved, NdisDevicePnPEventQueryStopped, -+ NdisDevicePnPEventStopped, NdisDevicePnPEventPowerProfileChanged, -+ NdisDevicePnPEventMaximum -+}; -+ -+enum ndis_request_type { -+ NdisRequestQueryInformation, NdisRequestSetInformation, -+ NdisRequestQueryStatistics, NdisRequestOpen, NdisRequestClose, -+ NdisRequestSend, NdisRequestTransferData, NdisRequestReset, -+ NdisRequestGeneric1, NdisRequestGeneric2, NdisRequestGeneric3, -+ NdisRequestGeneric4 -+}; -+ -+struct ndis_request { -+ mac_address mac; -+ enum ndis_request_type request_type; -+ union data { -+ struct query_info { -+ UINT oid; -+ void *buf; -+ UINT buf_len; -+ UINT written; -+ UINT needed; -+ } query_info; -+ struct set_info { -+ UINT oid; -+ void *buf; -+ UINT buf_len; -+ UINT written; -+ UINT needed; -+ } set_info; -+ } data; -+}; -+ -+enum ndis_medium { -+ NdisMedium802_3, NdisMedium802_5, NdisMediumFddi, NdisMediumWan, -+ NdisMediumLocalTalk, NdisMediumDix, NdisMediumArcnetRaw, -+ NdisMediumArcnet878_2, NdisMediumAtm, NdisMediumWirelessWan, -+ NdisMediumIrda, NdisMediumBpc, NdisMediumCoWan, -+ NdisMedium1394, NdisMediumMax -+}; -+ -+enum ndis_physical_medium { -+ NdisPhysicalMediumUnspecified, NdisPhysicalMediumWirelessLan, -+ NdisPhysicalMediumCableModem, NdisPhysicalMediumPhoneLine, -+ NdisPhysicalMediumPowerLine, NdisPhysicalMediumDSL, -+ NdisPhysicalMediumFibreChannel, NdisPhysicalMedium1394, -+ NdisPhysicalMediumWirelessWan, NdisPhysicalMediumMax -+}; -+ -+enum ndis_power_state { -+ NdisDeviceStateUnspecified = 0, -+ NdisDeviceStateD0, NdisDeviceStateD1, NdisDeviceStateD2, -+ NdisDeviceStateD3, NdisDeviceStateMaximum -+}; -+ -+enum ndis_power_profile { -+ NdisPowerProfileBattery, NdisPowerProfileAcOnLine -+}; -+ -+struct ndis_pm_wakeup_capabilities { -+ enum ndis_power_state min_magic_packet_wakeup; -+ enum ndis_power_state min_pattern_wakeup; -+ enum ndis_power_state min_link_change_wakeup; -+}; -+ -+#define NDIS_PNP_WAKE_UP_MAGIC_PACKET 0x00000001 -+#define NDIS_PNP_WAKE_UP_PATTERN_MATCH 0x00000002 -+#define NDIS_PNP_WAKE_UP_LINK_CHANGE 0x00000004 -+ -+enum net_pnp_event_code { -+ NetEventSetPower, NetEventQueryPower, NetEventQueryRemoveDevice, -+ NetEventCancelRemoveDevice, NetEventReconfigure, NetEventBindList, -+ NetEventBindsComplete, NetEventPnPCapabilities, NetEventMaximum -+}; -+ -+struct net_pnp_event { -+ enum net_pnp_event_code code; -+ void *buf; -+ ULONG buf_length; -+ ULONG_PTR ndis_reserved[4]; -+ ULONG_PTR transport_reserved[4]; -+ ULONG_PTR tdi_reserved[4]; -+ ULONG_PTR tdi_client_reserved[4]; -+}; -+ -+struct ndis_pnp_capabilities { -+ ULONG flags; -+ struct ndis_pm_wakeup_capabilities wakeup; -+}; -+ -+typedef void (*ndis_isr_handler)(BOOLEAN *recognized, BOOLEAN *queue_handler, -+ void *handle) wstdcall; -+typedef void (*ndis_interrupt_handler)(void *ctx) wstdcall; -+ -+struct miniport { -+ /* NDIS 3.0 */ -+ UCHAR major_version; -+ UCHAR minor_version; -+ USHORT filler; -+ UINT reserved; -+ BOOLEAN (*hangcheck)(void *ctx) wstdcall; -+ void (*disable_interrupt)(void *ctx) wstdcall; -+ void (*enable_interrupt)(void *ctx) wstdcall; -+ void (*mp_halt)(void *ctx) wstdcall; -+ ndis_interrupt_handler handle_interrupt; -+ NDIS_STATUS (*init)(NDIS_STATUS *error_status, UINT *medium_index, -+ enum ndis_medium medium[], UINT medium_array_size, -+ void *handle, void *conf_handle) wstdcall; -+ ndis_isr_handler isr; -+ NDIS_STATUS (*queryinfo)(void *ctx, ndis_oid oid, void *buffer, -+ ULONG buflen, ULONG *written, -+ ULONG *needed) wstdcall; -+ void *reconfig; -+ NDIS_STATUS (*reset)(BOOLEAN *reset_address, void *ctx) wstdcall; -+ NDIS_STATUS (*send)(void *ctx, struct ndis_packet *packet, -+ UINT flags) wstdcall; -+ NDIS_STATUS (*setinfo)(void *ctx, ndis_oid oid, void *buffer, -+ ULONG buflen, ULONG *written, -+ ULONG *needed) wstdcall; -+ NDIS_STATUS (*tx_data)(struct ndis_packet *ndis_packet, -+ UINT *bytes_txed, void *mp_ctx, void *rx_ctx, -+ UINT offset, UINT bytes_to_tx) wstdcall; -+ /* NDIS 4.0 extensions */ -+ void (*return_packet)(void *ctx, void *packet) wstdcall; -+ void (*send_packets)(void *ctx, struct ndis_packet **packets, -+ INT nr_of_packets) wstdcall; -+ void (*alloc_complete)(void *handle, void *virt, -+ NDIS_PHY_ADDRESS *phys, -+ ULONG size, void *ctx) wstdcall; -+ /* NDIS 5.0 extensions */ -+ NDIS_STATUS (*co_create_vc)(void *ctx, void *vc_handle, -+ void *vc_ctx) wstdcall; -+ NDIS_STATUS (*co_delete_vc)(void *vc_ctx) wstdcall; -+ NDIS_STATUS (*co_activate_vc)(void *vc_ctx, void *call_params) wstdcall; -+ NDIS_STATUS (*co_deactivate_vc)(void *vc_ctx) wstdcall; -+ NDIS_STATUS (*co_send_packets)(void *vc_ctx, void **packets, -+ UINT nr_of_packets) wstdcall; -+ NDIS_STATUS (*co_request)(void *ctx, void *vc_ctx, UINT *req) wstdcall; -+ /* NDIS 5.1 extensions */ -+ void (*cancel_send_packets)(void *ctx, void *id) wstdcall; -+ void (*pnp_event_notify)(void *ctx, enum ndis_device_pnp_event event, -+ void *inf_buf, ULONG inf_buf_len) wstdcall; -+ void (*shutdown)(void *ctx) wstdcall; -+ void *reserved1; -+ void *reserved2; -+ void *reserved3; -+ void *reserved4; -+}; -+ -+struct ndis_spinlock { -+ NT_SPIN_LOCK klock; -+ KIRQL irql; -+}; -+ -+union ndis_rw_lock_refcount { -+ UCHAR cache_line[16]; -+}; -+ -+struct ndis_rw_lock { -+ union { -+ struct { -+ NT_SPIN_LOCK klock; -+ void *context; -+ }; -+ UCHAR reserved[16]; -+ }; -+ union { -+ union ndis_rw_lock_refcount ref_count[MAXIMUM_PROCESSORS]; -+ /* ndiswrapper specific */ -+ volatile int count; -+ }; -+}; -+ -+struct lock_state { -+ USHORT state; -+ KIRQL irql; -+}; -+ -+struct ndis_work_item; -+typedef void (*NDIS_PROC)(struct ndis_work_item *, void *) wstdcall; -+ -+struct ndis_work_item { -+ void *ctx; -+ NDIS_PROC func; -+ union { -+ UCHAR reserved[8 * sizeof(void *)]; -+ /* ndiswrapper specific */ -+ struct nt_list list; -+ }; -+}; -+ -+struct alloc_shared_mem { -+ void *ctx; -+ ULONG size; -+ BOOLEAN cached; -+}; -+ -+struct ndis_mp_block; -+ -+/* this is opaque to drivers, so we can use it as we please */ -+struct ndis_mp_interrupt { -+ struct kinterrupt *kinterrupt; -+ NT_SPIN_LOCK lock; -+ union { -+ void *reserved; -+ unsigned int irq; -+ }; -+ ndis_isr_handler isr; -+ ndis_interrupt_handler mp_dpc; -+ struct kdpc intr_dpc; -+ struct ndis_mp_block *nmb; -+ UCHAR dpc_count; -+ BOOLEAN enable; -+ struct nt_event dpc_completed_event; -+ BOOLEAN shared; -+ BOOLEAN req_isr; -+}; -+ -+struct ndis_binary_data { -+ USHORT len; -+ void *buf; -+}; -+ -+enum ndis_parameter_type { -+ NdisParameterInteger, NdisParameterHexInteger, -+ NdisParameterString, NdisParameterMultiString, NdisParameterBinary, -+}; -+ -+typedef struct unicode_string NDIS_STRING; -+ -+struct ndis_configuration_parameter { -+ enum ndis_parameter_type type; -+ union { -+ ULONG integer; -+ NDIS_STRING string; -+ } data; -+}; -+ -+struct ndis_driver { -+ struct miniport mp; -+}; -+ -+/* IDs used to store extensions in driver_object's custom extension */ -+#define NDIS_DRIVER_CLIENT_ID 10 -+ -+struct ndis_wireless_stats { -+ ULONG length; -+ LARGE_INTEGER tx_frag; -+ LARGE_INTEGER tx_multi_frag; -+ LARGE_INTEGER failed; -+ LARGE_INTEGER retry; -+ LARGE_INTEGER multi_retry; -+ LARGE_INTEGER rtss_succ; -+ LARGE_INTEGER rtss_fail; -+ LARGE_INTEGER ack_fail; -+ LARGE_INTEGER frame_dup; -+ LARGE_INTEGER rx_frag; -+ LARGE_INTEGER rx_multi_frag; -+ LARGE_INTEGER fcs_err; -+ LARGE_INTEGER tkip_local_mic_failures; -+ LARGE_INTEGER tkip_icv_errors; -+ LARGE_INTEGER tkip_counter_measures_invoked; -+ LARGE_INTEGER tkip_replays; -+ LARGE_INTEGER ccmp_format_errors; -+ LARGE_INTEGER ccmp_replays; -+ LARGE_INTEGER ccmp_decrypt_errors; -+ LARGE_INTEGER fourway_handshake_failures; -+ LARGE_INTEGER wep_undecryptable_count; -+ LARGE_INTEGER wep_icv_errorcount; -+ LARGE_INTEGER decrypt_success_count; -+ LARGE_INTEGER decrypt_failure_count; -+}; -+ -+enum ndis_status_type { -+ Ndis802_11StatusType_Authentication, -+ Ndis802_11StatusType_MediaStreamMode, -+ Ndis802_11StatusType_PMKID_CandidateList, -+ Ndis802_11StatusType_RadioState, -+}; -+ -+struct ndis_status_indication { -+ enum ndis_status_type status_type; -+}; -+ -+enum ndis_radio_status { -+ Ndis802_11RadioStatusOn, Ndis802_11RadioStatusHardwareOff, -+ Ndis802_11RadioStatusSoftwareOff, -+}; -+ -+struct ndis_radio_status_indication -+{ -+ enum ndis_status_type status_type; -+ enum ndis_radio_status radio_state; -+}; -+ -+enum ndis_media_state { -+ NdisMediaStateConnected, -+ NdisMediaStateDisconnected, -+}; -+ -+enum ndis_media_stream_mode { -+ Ndis802_11MediaStreamOff, Ndis802_11MediaStreamOn -+}; -+ -+enum wrapper_work { -+ LINK_STATUS_OFF, LINK_STATUS_ON, SET_MULTICAST_LIST, COLLECT_IW_STATS, -+ HANGCHECK, NETIF_WAKEQ, -+}; -+ -+struct encr_info { -+ struct encr_key { -+ ULONG length; -+ UCHAR key[NDIS_ENCODING_TOKEN_MAX]; -+ } keys[MAX_ENCR_KEYS]; -+ unsigned short tx_key_index; -+}; -+ -+struct ndis_essid { -+ ULONG length; -+ UCHAR essid[NDIS_ESSID_MAX_SIZE]; -+}; -+ -+enum ndis_infrastructure_mode { -+ Ndis802_11IBSS, Ndis802_11Infrastructure, Ndis802_11AutoUnknown, -+ Ndis802_11InfrastructureMax -+}; -+ -+enum authentication_mode { -+ Ndis802_11AuthModeOpen, Ndis802_11AuthModeShared, -+ Ndis802_11AuthModeAutoSwitch, Ndis802_11AuthModeWPA, -+ Ndis802_11AuthModeWPAPSK, Ndis802_11AuthModeWPANone, -+ Ndis802_11AuthModeWPA2, Ndis802_11AuthModeWPA2PSK, -+ Ndis802_11AuthModeMax -+}; -+ -+enum encryption_status { -+ Ndis802_11WEPEnabled, -+ Ndis802_11Encryption1Enabled = Ndis802_11WEPEnabled, -+ Ndis802_11WEPDisabled, -+ Ndis802_11EncryptionDisabled = Ndis802_11WEPDisabled, -+ Ndis802_11WEPKeyAbsent, -+ Ndis802_11Encryption1KeyAbsent = Ndis802_11WEPKeyAbsent, -+ Ndis802_11WEPNotSupported, -+ Ndis802_11EncryptionNotSupported = Ndis802_11WEPNotSupported, -+ Ndis802_11Encryption2Enabled, Ndis802_11Encryption2KeyAbsent, -+ Ndis802_11Encryption3Enabled, Ndis802_11Encryption3KeyAbsent -+}; -+ -+struct ndis_auth_encr_pair { -+ enum authentication_mode auth_mode; -+ enum encryption_status encr_mode; -+}; -+ -+struct ndis_capability { -+ ULONG length; -+ ULONG version; -+ ULONG num_PMKIDs; -+ ULONG num_auth_encr_pair; -+ struct ndis_auth_encr_pair auth_encr_pair[1]; -+}; -+ -+struct ndis_guid { -+ struct guid guid; -+ union { -+ ndis_oid oid; -+ NDIS_STATUS status; -+ }; -+ ULONG size; -+ ULONG flags; -+}; -+ -+struct ndis_timer { -+ struct nt_timer nt_timer; -+ struct kdpc kdpc; -+}; -+ -+struct ndis_mp_timer { -+ struct nt_timer nt_timer; -+ struct kdpc kdpc; -+ DPC func; -+ void *ctx; -+ struct ndis_mp_block *nmb; -+ struct ndis_mp_timer *next; -+}; -+ -+typedef struct cm_partial_resource_list NDIS_RESOURCE_LIST; -+ -+struct ndis_event { -+ struct nt_event nt_event; -+}; -+ -+struct ndis_bind_paths { -+ UINT number; -+ struct unicode_string paths[1]; -+}; -+ -+struct ndis_reference { -+ NT_SPIN_LOCK lock; -+ USHORT ref_count; -+ BOOLEAN closing; -+}; -+ -+struct ndis_filterdbs { -+ union { -+ void *eth_db; -+ void *null_db; -+ }; -+ void *tr_db; -+ void *fddi_db; -+ void *arc_db; -+}; -+ -+enum ndis_interface_type { -+ NdisInterfaceInternal, NdisInterfaceIsa, NdisInterfaceEisa, -+ NdisInterfaceMca, NdisInterfaceTurboChannel, NdisInterfacePci, -+ NdisInterfacePcMcia, -+}; -+ -+struct auth_encr_capa { -+ unsigned long auth; -+ unsigned long encr; -+}; -+ -+struct ndis_pmkid_candidate { -+ mac_address bssid; -+ DWORD flags; -+}; -+ -+struct ndis_pmkid_candidate_list { -+ ULONG version; -+ ULONG num_candidates; -+ struct ndis_pmkid_candidate candidates[1]; -+}; -+ -+/* -+ * This struct contains function pointers that the drivers references -+ * directly via macros, so it's important that they are at the correct -+ * position. -+ */ -+struct ndis_mp_block { -+ void *signature; -+ struct ndis_mp_block *next; -+ struct driver_object *drv_obj; -+ void *mp_ctx; -+ struct unicode_string name; -+ struct ndis_bind_paths *bindpaths; -+ void *openqueue; -+ struct ndis_reference reference; -+ void *device_ctx; -+ UCHAR padding; -+ UCHAR lock_acquired; -+ UCHAR pmode_opens; -+ UCHAR assigned_cpu; -+ NT_SPIN_LOCK lock; -+ enum ndis_request_type *mediarequest; -+ struct ndis_mp_interrupt *interrupt; -+ ULONG flags; -+ ULONG pnp_flags; -+ struct nt_list packet_list; -+ struct ndis_packet *first_pending_tx_packet; -+ struct ndis_packet *return_packet_queue; -+ ULONG request_buffer; -+ void *set_mcast_buffer; -+ struct ndis_mp_block *primary_mp; -+ void *wrapper_ctx; -+ void *bus_data_ctx; -+ ULONG pnp_capa; -+ void *resources; -+ struct ndis_timer wakeup_dpc_timer; -+ struct unicode_string basename; -+ struct unicode_string symlink_name; -+ ULONG ndis_hangcheck_interval; -+ USHORT hangcheck_ticks; -+ USHORT hangcheck_tick; -+ NDIS_STATUS ndis_reset_status; -+ void *resetopen; -+ struct ndis_filterdbs filterdbs; -+ void *rx_packet; -+ void *send_complete; -+ void *send_resource_avail; -+ void *reset_complete; -+ -+ enum ndis_medium media_type; -+ ULONG bus_number; -+ enum ndis_interface_type bus_type; -+ enum ndis_interface_type adapter_type; -+ struct device_object *fdo; -+ struct device_object *pdo; -+ struct device_object *next_device; -+ void *mapreg; -+ void *call_mgraflist; -+ void *mp_thread; -+ void *setinfobuf; -+ USHORT setinfo_buf_len; -+ USHORT max_send_pkts; -+ NDIS_STATUS fake_status; -+ void *lock_handler; -+ struct unicode_string *adapter_instance_name; -+ void *timer_queue; -+ UINT mac_options; -+ void *pending_req; -+ UINT max_long_addrs; -+ UINT max_short_addrs; -+ UINT cur_lookahead; -+ UINT max_lookahead; -+ -+ ndis_interrupt_handler irq_bh; -+ void *disable_intr; -+ void *enable_intr; -+ void *send_pkts; -+ void *deferred_send; -+ void *eth_rx_indicate; -+ void *tr_rx_indicate; -+ void *fddi_rx_indicate; -+ void *eth_rx_complete; -+ void *tr_rx_complete; -+ void *fddi_rx_complete; -+ -+ void *status; -+ void *status_complete; -+ void *td_complete; -+ -+ void *queryinfo_complete; -+ void *setinfo_complete; -+ void *wan_tx_complete; -+ void *wan_rx; -+ void *wan_rx_complete; -+ /* ndiswrapper specific */ -+ struct ndis_device *wnd; -+}; -+ -+struct ndis_device { -+ struct ndis_mp_block *nmb; -+ struct wrap_device *wd; -+ struct net_device *net_dev; -+ void *shutdown_ctx; -+ struct ndis_mp_interrupt *mp_interrupt; -+ struct kdpc irq_kdpc; -+ unsigned long mem_start; -+ unsigned long mem_end; -+ -+ struct net_device_stats net_stats; -+ struct iw_statistics iw_stats; -+ BOOLEAN iw_stats_enabled; -+ struct ndis_wireless_stats ndis_stats; -+ -+ struct work_struct tx_work; -+ struct ndis_packet *tx_ring[TX_RING_SIZE]; -+ u8 tx_ring_start; -+ u8 tx_ring_end; -+ u8 is_tx_ring_full; -+ u8 tx_ok; -+ spinlock_t tx_ring_lock; -+ struct mutex tx_ring_mutex; -+ unsigned int max_tx_packets; -+ struct mutex ndis_req_mutex; -+ struct task_struct *ndis_req_task; -+ int ndis_req_done; -+ NDIS_STATUS ndis_req_status; -+ ULONG packet_filter; -+ -+ ULONG sg_dma_size; -+ ULONG dma_map_count; -+ dma_addr_t *dma_map_addr; -+ -+ int hangcheck_interval; -+ struct timer_list hangcheck_timer; -+ int iw_stats_interval; -+ struct timer_list iw_stats_timer; -+ unsigned long scan_timestamp; -+ struct encr_info encr_info; -+ char nick[IW_ESSID_MAX_SIZE + 1]; -+ struct ndis_essid essid; -+ struct auth_encr_capa capa; -+ enum ndis_infrastructure_mode infrastructure_mode; -+ int max_pmkids; -+ int num_pmkids; -+ struct ndis_pmkid *pmkids; -+ mac_address mac; -+ struct proc_dir_entry *procfs_iface; -+ -+ struct work_struct ndis_work; -+ unsigned long ndis_pending_work; -+ UINT attributes; -+ int iw_auth_wpa_version; -+ int iw_auth_cipher_pairwise; -+ int iw_auth_cipher_group; -+ int iw_auth_key_mgmt; -+ int iw_auth_80211_alg; -+ struct ndis_packet_pool *tx_packet_pool; -+ struct ndis_buffer_pool *tx_buffer_pool; -+ int multicast_size; -+ struct v4_checksum rx_csum; -+ struct v4_checksum tx_csum; -+ enum ndis_physical_medium physical_medium; -+ ULONG ndis_wolopts; -+ struct nt_slist wrap_timer_slist; -+ int drv_ndis_version; -+ struct ndis_pnp_capabilities pnp_capa; -+}; -+ -+BOOLEAN ndis_isr(struct kinterrupt *kinterrupt, void *ctx) wstdcall; -+ -+int ndis_init(void); -+void ndis_exit(void); -+int ndis_init_device(struct ndis_device *wnd); -+void ndis_exit_device(struct ndis_device *wnd); -+ -+int wrap_procfs_add_ndis_device(struct ndis_device *wnd); -+void wrap_procfs_remove_ndis_device(struct ndis_device *wnd); -+ -+void NdisAllocatePacketPoolEx(NDIS_STATUS *status, -+ struct ndis_packet_pool **pool_handle, -+ UINT num_descr, UINT overflowsize, -+ UINT proto_rsvd_length) wstdcall; -+void NdisFreePacketPool(struct ndis_packet_pool *pool) wstdcall; -+void NdisAllocatePacket(NDIS_STATUS *status, struct ndis_packet **packet, -+ struct ndis_packet_pool *pool) wstdcall; -+void NdisFreePacket(struct ndis_packet *descr) wstdcall; -+void NdisAllocateBufferPool(NDIS_STATUS *status, -+ struct ndis_buffer_pool **pool_handle, -+ UINT num_descr) wstdcall; -+void NdisFreeBufferPool(struct ndis_buffer_pool *pool) wstdcall; -+void NdisAllocateBuffer(NDIS_STATUS *status, ndis_buffer **buffer, -+ struct ndis_buffer_pool *pool, void *virt, -+ UINT length) wstdcall; -+void NdisFreeBuffer(ndis_buffer *descr) wstdcall; -+void NdisMIndicateReceivePacket(struct ndis_mp_block *nmb, -+ struct ndis_packet **packets, -+ UINT nr_packets) wstdcall; -+void NdisMSendComplete(struct ndis_mp_block *nmb, struct ndis_packet *packet, -+ NDIS_STATUS status) wstdcall; -+void NdisMSendResourcesAvailable(struct ndis_mp_block *nmb) wstdcall; -+void NdisMIndicateStatus(struct ndis_mp_block *nmb, -+ NDIS_STATUS status, void *buf, UINT len) wstdcall; -+void NdisMIndicateStatusComplete(struct ndis_mp_block *nmb) wstdcall; -+void NdisMQueryInformationComplete(struct ndis_mp_block *nmb, -+ NDIS_STATUS status) wstdcall; -+void NdisMSetInformationComplete(struct ndis_mp_block *nmb, -+ NDIS_STATUS status) wstdcall; -+void NdisMResetComplete(struct ndis_mp_block *nmb, NDIS_STATUS status, -+ BOOLEAN address_reset) wstdcall; -+ULONG NDIS_BUFFER_TO_SPAN_PAGES(ndis_buffer *buffer) wstdcall; -+BOOLEAN NdisWaitEvent(struct ndis_event *event, UINT timeout) wstdcall; -+void NdisSetEvent(struct ndis_event *event) wstdcall; -+void NdisMDeregisterInterrupt(struct ndis_mp_interrupt *mp_interrupt) wstdcall; -+void EthRxIndicateHandler(struct ndis_mp_block *nmb, void *rx_ctx, -+ char *header1, char *header, UINT header_size, -+ void *look_ahead, UINT look_ahead_size, -+ UINT packet_size) wstdcall; -+void EthRxComplete(struct ndis_mp_block *nmb) wstdcall; -+void NdisMTransferDataComplete(struct ndis_mp_block *nmb, -+ struct ndis_packet *packet, NDIS_STATUS status, -+ UINT bytes_txed) wstdcall; -+void NdisWriteConfiguration(NDIS_STATUS *status, struct ndis_mp_block *nmb, -+ struct unicode_string *key, -+ struct ndis_configuration_parameter *param) wstdcall; -+void NdisReadConfiguration(NDIS_STATUS *status, -+ struct ndis_configuration_parameter **param, -+ struct ndis_mp_block *nmb, -+ struct unicode_string *key, -+ enum ndis_parameter_type type) wstdcall; -+ -+/* Required OIDs */ -+#define OID_GEN_SUPPORTED_LIST 0x00010101 -+#define OID_GEN_HARDWARE_STATUS 0x00010102 -+#define OID_GEN_MEDIA_SUPPORTED 0x00010103 -+#define OID_GEN_MEDIA_IN_USE 0x00010104 -+#define OID_GEN_MAXIMUM_LOOKAHEAD 0x00010105 -+#define OID_GEN_MAXIMUM_FRAME_SIZE 0x00010106 -+#define OID_GEN_LINK_SPEED 0x00010107 -+#define OID_GEN_TRANSMIT_BUFFER_SPACE 0x00010108 -+#define OID_GEN_RECEIVE_BUFFER_SPACE 0x00010109 -+#define OID_GEN_TRANSMIT_BLOCK_SIZE 0x0001010A -+#define OID_GEN_RECEIVE_BLOCK_SIZE 0x0001010B -+#define OID_GEN_VENDOR_ID 0x0001010C -+#define OID_GEN_VENDOR_DESCRIPTION 0x0001010D -+#define OID_GEN_CURRENT_PACKET_FILTER 0x0001010E -+#define OID_GEN_CURRENT_LOOKAHEAD 0x0001010F -+#define OID_GEN_DRIVER_VERSION 0x00010110 -+#define OID_GEN_MAXIMUM_TOTAL_SIZE 0x00010111 -+#define OID_GEN_PROTOCOL_OPTIONS 0x00010112 -+#define OID_GEN_MAC_OPTIONS 0x00010113 -+#define OID_GEN_MEDIA_CONNECT_STATUS 0x00010114 -+#define OID_GEN_MAXIMUM_SEND_PACKETS 0x00010115 -+#define OID_GEN_VENDOR_DRIVER_VERSION 0x00010116 -+#define OID_GEN_SUPPORTED_GUIDS 0x00010117 -+#define OID_GEN_NETWORK_LAYER_ADDRESSES 0x00010118 /* Set only */ -+#define OID_GEN_TRANSPORT_HEADER_OFFSET 0x00010119 /* Set only */ -+#define OID_GEN_MACHINE_NAME 0x0001021A -+#define OID_GEN_RNDIS_CONFIG_PARAMETER 0x0001021B /* Set only */ -+#define OID_GEN_VLAN_ID 0x0001021C -+ -+/* Optional OIDs. */ -+#define OID_GEN_MEDIA_CAPABILITIES 0x00010201 -+#define OID_GEN_PHYSICAL_MEDIUM 0x00010202 -+ -+/* Required statistics OIDs. */ -+#define OID_GEN_XMIT_OK 0x00020101 -+#define OID_GEN_RCV_OK 0x00020102 -+#define OID_GEN_XMIT_ERROR 0x00020103 -+#define OID_GEN_RCV_ERROR 0x00020104 -+#define OID_GEN_RCV_NO_BUFFER 0x00020105 -+ -+/* Optional OID statistics */ -+#define OID_GEN_DIRECTED_BYTES_XMIT 0x00020201 -+#define OID_GEN_DIRECTED_FRAMES_XMIT 0x00020202 -+#define OID_GEN_MULTICAST_BYTES_XMIT 0x00020203 -+#define OID_GEN_MULTICAST_FRAMES_XMIT 0x00020204 -+#define OID_GEN_BROADCAST_BYTES_XMIT 0x00020205 -+#define OID_GEN_BROADCAST_FRAMES_XMIT 0x00020206 -+#define OID_GEN_DIRECTED_BYTES_RCV 0x00020207 -+#define OID_GEN_DIRECTED_FRAMES_RCV 0x00020208 -+#define OID_GEN_MULTICAST_BYTES_RCV 0x00020209 -+#define OID_GEN_MULTICAST_FRAMES_RCV 0x0002020A -+#define OID_GEN_BROADCAST_BYTES_RCV 0x0002020B -+#define OID_GEN_BROADCAST_FRAMES_RCV 0x0002020C -+#define OID_GEN_RCV_CRC_ERROR 0x0002020D -+#define OID_GEN_TRANSMIT_QUEUE_LENGTH 0x0002020E -+#define OID_GEN_GET_TIME_CAPS 0x0002020F -+#define OID_GEN_GET_NETCARD_TIME 0x00020210 -+#define OID_GEN_NETCARD_LOAD 0x00020211 -+#define OID_GEN_DEVICE_PROFILE 0x00020212 -+ -+/* 802.3 (ethernet) OIDs */ -+#define OID_802_3_PERMANENT_ADDRESS 0x01010101 -+#define OID_802_3_CURRENT_ADDRESS 0x01010102 -+#define OID_802_3_MULTICAST_LIST 0x01010103 -+#define OID_802_3_MAXIMUM_LIST_SIZE 0x01010104 -+#define OID_802_3_MAC_OPTIONS 0x01010105 -+#define NDIS_802_3_MAC_OPTION_PRIORITY 0x00000001 -+#define OID_802_3_RCV_ERROR_ALIGNMENT 0x01020101 -+#define OID_802_3_XMIT_ONE_COLLISION 0x01020102 -+#define OID_802_3_XMIT_MORE_COLLISIONS 0x01020103 -+#define OID_802_3_XMIT_DEFERRED 0x01020201 -+#define OID_802_3_XMIT_MAX_COLLISIONS 0x01020202 -+#define OID_802_3_RCV_OVERRUN 0x01020203 -+#define OID_802_3_XMIT_UNDERRUN 0x01020204 -+#define OID_802_3_XMIT_HEARTBEAT_FAILURE 0x01020205 -+#define OID_802_3_XMIT_TIMES_CRS_LOST 0x01020206 -+#define OID_802_3_XMIT_LATE_COLLISIONS 0x01020207 -+ -+/* PnP and power management OIDs */ -+#define OID_PNP_CAPABILITIES 0xFD010100 -+#define OID_PNP_SET_POWER 0xFD010101 -+#define OID_PNP_QUERY_POWER 0xFD010102 -+#define OID_PNP_ADD_WAKE_UP_PATTERN 0xFD010103 -+#define OID_PNP_REMOVE_WAKE_UP_PATTERN 0xFD010104 -+#define OID_PNP_WAKE_UP_PATTERN_LIST 0xFD010105 -+#define OID_PNP_ENABLE_WAKE_UP 0xFD010106 -+ -+/* PnP/PM Statistics (Optional). */ -+#define OID_PNP_WAKE_UP_OK 0xFD020200 -+#define OID_PNP_WAKE_UP_ERROR 0xFD020201 -+ -+/* The following bits are defined for OID_PNP_ENABLE_WAKE_UP */ -+#define NDIS_PNP_WAKE_UP_MAGIC_PACKET 0x00000001 -+#define NDIS_PNP_WAKE_UP_PATTERN_MATCH 0x00000002 -+#define NDIS_PNP_WAKE_UP_LINK_CHANGE 0x00000004 -+ -+/* 802.11 OIDs */ -+#define OID_802_11_BSSID 0x0D010101 -+#define OID_802_11_SSID 0x0D010102 -+#define OID_802_11_NETWORK_TYPES_SUPPORTED 0x0D010203 -+#define OID_802_11_NETWORK_TYPE_IN_USE 0x0D010204 -+#define OID_802_11_TX_POWER_LEVEL 0x0D010205 -+#define OID_802_11_RSSI 0x0D010206 -+#define OID_802_11_RSSI_TRIGGER 0x0D010207 -+#define OID_802_11_INFRASTRUCTURE_MODE 0x0D010108 -+#define OID_802_11_FRAGMENTATION_THRESHOLD 0x0D010209 -+#define OID_802_11_RTS_THRESHOLD 0x0D01020A -+#define OID_802_11_NUMBER_OF_ANTENNAS 0x0D01020B -+#define OID_802_11_RX_ANTENNA_SELECTED 0x0D01020C -+#define OID_802_11_TX_ANTENNA_SELECTED 0x0D01020D -+#define OID_802_11_SUPPORTED_RATES 0x0D01020E -+#define OID_802_11_DESIRED_RATES 0x0D010210 -+#define OID_802_11_CONFIGURATION 0x0D010211 -+#define OID_802_11_STATISTICS 0x0D020212 -+#define OID_802_11_ADD_WEP 0x0D010113 -+#define OID_802_11_REMOVE_WEP 0x0D010114 -+#define OID_802_11_DISASSOCIATE 0x0D010115 -+#define OID_802_11_POWER_MODE 0x0D010216 -+#define OID_802_11_BSSID_LIST 0x0D010217 -+#define OID_802_11_AUTHENTICATION_MODE 0x0D010118 -+#define OID_802_11_PRIVACY_FILTER 0x0D010119 -+#define OID_802_11_BSSID_LIST_SCAN 0x0D01011A -+#define OID_802_11_WEP_STATUS 0x0D01011B -+#define OID_802_11_ENCRYPTION_STATUS OID_802_11_WEP_STATUS -+#define OID_802_11_RELOAD_DEFAULTS 0x0D01011C -+#define OID_802_11_ADD_KEY 0x0D01011D -+#define OID_802_11_REMOVE_KEY 0x0D01011E -+#define OID_802_11_ASSOCIATION_INFORMATION 0x0D01011F -+#define OID_802_11_TEST 0x0D010120 -+#define OID_802_11_MEDIA_STREAM_MODE 0x0D010121 -+#define OID_802_11_CAPABILITY 0x0D010122 -+#define OID_802_11_PMKID 0x0D010123 -+ -+#define NDIS_STATUS_SUCCESS 0 -+#define NDIS_STATUS_PENDING 0x00000103 -+#define NDIS_STATUS_NOT_RECOGNIZED 0x00010001 -+#define NDIS_STATUS_NOT_COPIED 0x00010002 -+#define NDIS_STATUS_NOT_ACCEPTED 0x00010003 -+#define NDIS_STATUS_CALL_ACTIVE 0x00010007 -+#define NDIS_STATUS_ONLINE 0x40010003 -+#define NDIS_STATUS_RESET_START 0x40010004 -+#define NDIS_STATUS_RESET_END 0x40010005 -+#define NDIS_STATUS_RING_STATUS 0x40010006 -+#define NDIS_STATUS_CLOSED 0x40010007 -+#define NDIS_STATUS_WAN_LINE_UP 0x40010008 -+#define NDIS_STATUS_WAN_LINE_DOWN 0x40010009 -+#define NDIS_STATUS_WAN_FRAGMENT 0x4001000A -+#define NDIS_STATUS_MEDIA_CONNECT 0x4001000B -+#define NDIS_STATUS_MEDIA_DISCONNECT 0x4001000C -+#define NDIS_STATUS_HARDWARE_LINE_UP 0x4001000D -+#define NDIS_STATUS_HARDWARE_LINE_DOWN 0x4001000E -+#define NDIS_STATUS_INTERFACE_UP 0x4001000F -+#define NDIS_STATUS_INTERFACE_DOWN 0x40010010 -+#define NDIS_STATUS_MEDIA_BUSY 0x40010011 -+#define NDIS_STATUS_MEDIA_SPECIFIC_INDICATION 0x40010012 -+#define NDIS_STATUS_WW_INDICATION NDIS_STATUS_MEDIA_SPECIFIC_INDICATION -+#define NDIS_STATUS_LINK_SPEED_CHANGE 0x40010013 -+#define NDIS_STATUS_WAN_GET_STATS 0x40010014 -+#define NDIS_STATUS_WAN_CO_FRAGMENT 0x40010015 -+#define NDIS_STATUS_WAN_CO_LINKPARAMS 0x40010016 -+#define NDIS_STATUS_NOT_RESETTABLE 0x80010001 -+#define NDIS_STATUS_SOFT_ERRORS 0x80010003 -+#define NDIS_STATUS_HARD_ERRORS 0x80010004 -+#define NDIS_STATUS_BUFFER_OVERFLOW 0x80000005 -+#define NDIS_STATUS_FAILURE 0xC0000001 -+#define NDIS_STATUS_INVALID_PARAMETER 0xC000000D -+#define NDIS_STATUS_RESOURCES 0xC000009A -+#define NDIS_STATUS_CLOSING 0xC0010002 -+#define NDIS_STATUS_BAD_VERSION 0xC0010004 -+#define NDIS_STATUS_BAD_CHARACTERISTICS 0xC0010005 -+#define NDIS_STATUS_ADAPTER_NOT_FOUND 0xC0010006 -+#define NDIS_STATUS_OPEN_FAILED 0xC0010007 -+#define NDIS_STATUS_DEVICE_FAILED 0xC0010008 -+#define NDIS_STATUS_MULTICAST_FULL 0xC0010009 -+#define NDIS_STATUS_MULTICAST_EXISTS 0xC001000A -+#define NDIS_STATUS_MULTICAST_NOT_FOUND 0xC001000B -+#define NDIS_STATUS_REQUEST_ABORTED 0xC001000C -+#define NDIS_STATUS_RESET_IN_PROGRESS 0xC001000D -+#define NDIS_STATUS_CLOSING_INDICATING 0xC001000E -+#define NDIS_STATUS_BAD_VERSION 0xC0010004 -+#define NDIS_STATUS_NOT_SUPPORTED 0xC00000BB -+#define NDIS_STATUS_INVALID_PACKET 0xC001000F -+#define NDIS_STATUS_OPEN_LIST_FULL 0xC0010010 -+#define NDIS_STATUS_ADAPTER_NOT_READY 0xC0010011 -+#define NDIS_STATUS_ADAPTER_NOT_OPEN 0xC0010012 -+#define NDIS_STATUS_NOT_INDICATING 0xC0010013 -+#define NDIS_STATUS_INVALID_LENGTH 0xC0010014 -+#define NDIS_STATUS_INVALID_DATA 0xC0010015 -+#define NDIS_STATUS_BUFFER_TOO_SHORT 0xC0010016 -+#define NDIS_STATUS_INVALID_OID 0xC0010017 -+#define NDIS_STATUS_ADAPTER_REMOVED 0xC0010018 -+#define NDIS_STATUS_UNSUPPORTED_MEDIA 0xC0010019 -+#define NDIS_STATUS_GROUP_ADDRESS_IN_USE 0xC001001A -+#define NDIS_STATUS_FILE_NOT_FOUND 0xC001001B -+#define NDIS_STATUS_ERROR_READING_FILE 0xC001001C -+#define NDIS_STATUS_ALREADY_MAPPED 0xC001001D -+#define NDIS_STATUS_RESOURCE_CONFLICT 0xC001001E -+#define NDIS_STATUS_NO_CABLE 0xC001001F -+#define NDIS_STATUS_INVALID_SAP 0xC0010020 -+#define NDIS_STATUS_SAP_IN_USE 0xC0010021 -+#define NDIS_STATUS_INVALID_ADDRESS 0xC0010022 -+#define NDIS_STATUS_VC_NOT_ACTIVATED 0xC0010023 -+#define NDIS_STATUS_DEST_OUT_OF_ORDER 0xC0010024 -+#define NDIS_STATUS_VC_NOT_AVAILABLE 0xC0010025 -+#define NDIS_STATUS_CELLRATE_NOT_AVAILABLE 0xC0010026 -+#define NDIS_STATUS_INCOMPATABLE_QOS 0xC0010027 -+#define NDIS_STATUS_AAL_PARAMS_UNSUPPORTED 0xC0010028 -+#define NDIS_STATUS_NO_ROUTE_TO_DESTINATION 0xC0010029 -+#define NDIS_STATUS_TOKEN_RING_OPEN_ERROR 0xC0011000 -+#define NDIS_STATUS_INVALID_DEVICE_REQUEST 0xC0000010 -+#define NDIS_STATUS_NETWORK_UNREACHABLE 0xC000023C -+ -+/* Event codes */ -+ -+#define EVENT_NDIS_RESOURCE_CONFLICT 0xC0001388 -+#define EVENT_NDIS_OUT_OF_RESOURCE 0xC0001389 -+#define EVENT_NDIS_HARDWARE_FAILURE 0xC000138A -+#define EVENT_NDIS_ADAPTER_NOT_FOUND 0xC000138B -+#define EVENT_NDIS_INTERRUPT_CONNECT 0xC000138C -+#define EVENT_NDIS_DRIVER_FAILURE 0xC000138D -+#define EVENT_NDIS_BAD_VERSION 0xC000138E -+#define EVENT_NDIS_TIMEOUT 0x8000138F -+#define EVENT_NDIS_NETWORK_ADDRESS 0xC0001390 -+#define EVENT_NDIS_UNSUPPORTED_CONFIGURATION 0xC0001391 -+#define EVENT_NDIS_INVALID_VALUE_FROM_ADAPTER 0xC0001392 -+#define EVENT_NDIS_MISSING_CONFIGURATION_PARAMETER 0xC0001393 -+#define EVENT_NDIS_BAD_IO_BASE_ADDRESS 0xC0001394 -+#define EVENT_NDIS_RECEIVE_SPACE_SMALL 0x40001395 -+#define EVENT_NDIS_ADAPTER_DISABLED 0x80001396 -+#define EVENT_NDIS_IO_PORT_CONFLICT 0x80001397 -+#define EVENT_NDIS_PORT_OR_DMA_CONFLICT 0x80001398 -+#define EVENT_NDIS_MEMORY_CONFLICT 0x80001399 -+#define EVENT_NDIS_INTERRUPT_CONFLICT 0x8000139A -+#define EVENT_NDIS_DMA_CONFLICT 0x8000139B -+#define EVENT_NDIS_INVALID_DOWNLOAD_FILE_ERROR 0xC000139C -+#define EVENT_NDIS_MAXRECEIVES_ERROR 0x8000139D -+#define EVENT_NDIS_MAXTRANSMITS_ERROR 0x8000139E -+#define EVENT_NDIS_MAXFRAMESIZE_ERROR 0x8000139F -+#define EVENT_NDIS_MAXINTERNALBUFS_ERROR 0x800013A0 -+#define EVENT_NDIS_MAXMULTICAST_ERROR 0x800013A1 -+#define EVENT_NDIS_PRODUCTID_ERROR 0x800013A2 -+#define EVENT_NDIS_LOBE_FAILUE_ERROR 0x800013A3 -+#define EVENT_NDIS_SIGNAL_LOSS_ERROR 0x800013A4 -+#define EVENT_NDIS_REMOVE_RECEIVED_ERROR 0x800013A5 -+#define EVENT_NDIS_TOKEN_RING_CORRECTION 0x400013A6 -+#define EVENT_NDIS_ADAPTER_CHECK_ERROR 0xC00013A7 -+#define EVENT_NDIS_RESET_FAILURE_ERROR 0x800013A8 -+#define EVENT_NDIS_CABLE_DISCONNECTED_ERROR 0x800013A9 -+#define EVENT_NDIS_RESET_FAILURE_CORRECTION 0x800013AA -+ -+/* packet filter bits used by NDIS_OID_PACKET_FILTER */ -+#define NDIS_PACKET_TYPE_DIRECTED 0x00000001 -+#define NDIS_PACKET_TYPE_MULTICAST 0x00000002 -+#define NDIS_PACKET_TYPE_ALL_MULTICAST 0x00000004 -+#define NDIS_PACKET_TYPE_BROADCAST 0x00000008 -+#define NDIS_PACKET_TYPE_SOURCE_ROUTING 0x00000010 -+#define NDIS_PACKET_TYPE_PROMISCUOUS 0x00000020 -+#define NDIS_PACKET_TYPE_SMT 0x00000040 -+#define NDIS_PACKET_TYPE_ALL_LOCAL 0x00000080 -+#define NDIS_PACKET_TYPE_GROUP 0x00001000 -+#define NDIS_PACKET_TYPE_ALL_FUNCTIONAL 0x00002000 -+#define NDIS_PACKET_TYPE_FUNCTIONAL 0x00004000 -+#define NDIS_PACKET_TYPE_MAC_FRAME 0x00008000 -+ -+/* memory allocation flags */ -+#define NDIS_MEMORY_CONTIGUOUS 0x00000001 -+#define NDIS_MEMORY_NONCACHED 0x00000002 -+ -+/* Attribute flags to NdisMSetAtrributesEx */ -+#define NDIS_ATTRIBUTE_IGNORE_PACKET_TIMEOUT 0x00000001 -+#define NDIS_ATTRIBUTE_IGNORE_REQUEST_TIMEOUT 0x00000002 -+#define NDIS_ATTRIBUTE_IGNORE_TOKEN_RING_ERRORS 0x00000004 -+#define NDIS_ATTRIBUTE_BUS_MASTER 0x00000008 -+#define NDIS_ATTRIBUTE_INTERMEDIATE_DRIVER 0x00000010 -+#define NDIS_ATTRIBUTE_DESERIALIZE 0x00000020 -+#define NDIS_ATTRIBUTE_NO_HALT_ON_SUSPEND 0x00000040 -+#define NDIS_ATTRIBUTE_SURPRISE_REMOVE_OK 0x00000080 -+#define NDIS_ATTRIBUTE_NOT_CO_NDIS 0x00000100 -+#define NDIS_ATTRIBUTE_USES_SAFE_BUFFER_APIS 0x00000200 -+ -+#define OID_TCP_TASK_OFFLOAD 0xFC010201 -+ -+#define NDIS_MAC_OPTION_COPY_LOOKAHEAD_DATA 0x00000001 -+#define NDIS_MAC_OPTION_RECEIVE_SERIALIZED 0x00000002 -+#define NDIS_MAC_OPTION_TRANSFERS_NOT_PEND 0x00000004 -+#define NDIS_MAC_OPTION_NO_LOOPBACK 0x00000008 -+#define NDIS_MAC_OPTION_FULL_DUPLEX 0x00000010 -+#define NDIS_MAC_OPTION_EOTX_INDICATION 0x00000020 -+#define NDIS_MAC_OPTION_8021P_PRIORITY 0x00000040 -+#define NDIS_MAC_OPTION_SUPPORTS_MAC_ADDRESS_OVERWRITE 0x00000080 -+#define NDIS_MAC_OPTION_RECEIVE_AT_DPC 0x00000100 -+#define NDIS_MAC_OPTION_8021Q_VLAN 0x00000200 -+#define NDIS_MAC_OPTION_RESERVED 0x80000000 -+ -+#define deserialized_driver(wnd) (wnd->attributes & NDIS_ATTRIBUTE_DESERIALIZE) -+ -+static inline void serialize_lock(struct ndis_device *wnd) -+{ -+ nt_spin_lock(&wnd->nmb->lock); -+} -+ -+static inline void serialize_unlock(struct ndis_device *wnd) -+{ -+ nt_spin_unlock(&wnd->nmb->lock); -+} -+ -+static inline KIRQL serialize_lock_irql(struct ndis_device *wnd) -+{ -+ if (deserialized_driver(wnd)) -+ return raise_irql(DISPATCH_LEVEL); -+ else -+ return nt_spin_lock_irql(&wnd->nmb->lock, DISPATCH_LEVEL); -+} -+ -+static inline void serialize_unlock_irql(struct ndis_device *wnd, -+ KIRQL irql) -+{ -+ if (deserialized_driver(wnd)) -+ lower_irql(irql); -+ else -+ nt_spin_unlock_irql(&wnd->nmb->lock, irql); -+} -+ -+static inline void if_serialize_lock(struct ndis_device *wnd) -+{ -+ if (!deserialized_driver(wnd)) -+ nt_spin_lock(&wnd->nmb->lock); -+} -+ -+static inline void if_serialize_unlock(struct ndis_device *wnd) -+{ -+ if (!deserialized_driver(wnd)) -+ nt_spin_unlock(&wnd->nmb->lock); -+} -+ -+#endif /* NDIS_H */ -diff -Nurp linux-5.6.11/3rdparty/ndiswrapper/ndiswrapper.h linux-5.6.11-ndis/3rdparty/ndiswrapper/ndiswrapper.h ---- linux-5.6.11/3rdparty/ndiswrapper/ndiswrapper.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.6.11-ndis/3rdparty/ndiswrapper/ndiswrapper.h 2020-05-03 15:18:33.000000000 +0300 -@@ -0,0 +1,219 @@ -+/* -+ * Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ */ -+ -+#ifndef _NDISWRAPPER_H_ -+#define _NDISWRAPPER_H_ -+ -+#define DRIVER_VERSION "1.63" -+#define UTILS_VERSION "1.9" -+ -+#define DRIVER_NAME "ndiswrapper" -+#define DRIVER_CONFIG_DIR "/etc/ndiswrapper" -+ -+#define NDIS_ESSID_MAX_SIZE 32 -+#define NDIS_ENCODING_TOKEN_MAX 32 -+#define MAX_ENCR_KEYS 4 -+#define TX_RING_SIZE 16 -+#define NDIS_MAX_RATES 8 -+#define NDIS_MAX_RATES_EX 16 -+ -+#define WRAP_PCI_BUS 5 -+#define WRAP_PCMCIA_BUS 8 -+/* some USB devices, e.g., DWL-G120 have BusType as 0 */ -+#define WRAP_INTERNAL_BUS 0 -+/* documentation at msdn says 15 is PNP bus, but inf files from all -+ * vendors say 15 is USB; which is correct? */ -+#define WRAP_USB_BUS 15 -+ -+/* NDIS device must be 0, for compatibility with old versions of -+ * ndiswrapper where device type for NDIS drivers is 0 */ -+#define WRAP_NDIS_DEVICE 0 -+#define WRAP_USB_DEVICE 1 -+#define WRAP_BLUETOOTH_DEVICE1 2 -+#define WRAP_BLUETOOTH_DEVICE2 3 -+ -+#define WRAP_DEVICE_BUS(dev, bus) ((dev) << 8 | (bus)) -+#define WRAP_BUS(dev_bus) ((dev_bus) & 0x000FF) -+#define WRAP_DEVICE(dev_bus) ((dev_bus) >> 8) -+ -+#define MAX_DRIVER_NAME_LEN 32 -+#define MAX_VERSION_STRING_LEN 64 -+#define MAX_SETTING_NAME_LEN 128 -+#define MAX_SETTING_VALUE_LEN 256 -+ -+#define MAX_DRIVER_PE_IMAGES 4 -+#define MAX_DRIVER_BIN_FILES 5 -+#define MAX_DEVICE_SETTINGS 512 -+ -+#define MAX_ALLOCATED_URBS 15 -+ -+#define DEV_ANY_ID -1 -+ -+#define MAC2STR(a) (a)[0], (a)[1], (a)[2], (a)[3], (a)[4], (a)[5] -+#define MACSTRSEP "%02x:%02x:%02x:%02x:%02x:%02x" -+#define MACSTR "%02x%02x%02x%02x%02x%02x" -+#define MACINTADR(a) (int*)&((a)[0]), (int*)&((a)[1]), (int*)&((a)[2]), \ -+ (int*)&((a)[3]), (int*)&((a)[4]), (int*)&((a)[5]) -+ -+#ifdef __KERNEL__ -+/* DEBUG macros */ -+ -+#define MSG(level, fmt, ...) \ -+ printk(level DRIVER_NAME " (%s:%d): " fmt "\n", \ -+ __func__, __LINE__ , ## __VA_ARGS__) -+ -+#define WARNING(fmt, ...) MSG(KERN_WARNING, fmt, ## __VA_ARGS__) -+#define ERROR(fmt, ...) MSG(KERN_ERR, fmt , ## __VA_ARGS__) -+#define INFO(fmt, ...) MSG(KERN_INFO, fmt , ## __VA_ARGS__) -+#define TODO() WARNING("not fully implemented (yet)") -+ -+#define TRACE(level, fmt, ...) \ -+do { \ -+ if (debug >= level) \ -+ printk(KERN_INFO "%s (%s:%d): " fmt "\n", DRIVER_NAME, \ -+ __func__, __LINE__ , ## __VA_ARGS__); \ -+} while (0) -+#define TRACE0(fmt, ...) TRACE(0, fmt , ## __VA_ARGS__) -+ -+extern int debug; -+ -+#ifndef DEBUG -+#define DEBUG 0 -+#endif -+ -+/* for a block of code */ -+#if DEBUG >= 1 -+#define DBG_BLOCK(level) if (debug >= level) -+#else -+#define DBG_BLOCK(level) while (0) -+#endif -+ -+#if DEBUG >= 1 -+#define TRACE1(fmt, ...) TRACE(1, fmt , ## __VA_ARGS__) -+#else -+#define TRACE1(fmt, ...) do { } while (0) -+#endif -+ -+#if DEBUG >= 2 -+#define TRACE2(fmt, ...) TRACE(2, fmt , ## __VA_ARGS__) -+#else -+#define TRACE2(fmt, ...) do { } while (0) -+#endif -+ -+#if DEBUG >= 3 -+#define TRACE3(fmt, ...) TRACE(3, fmt , ## __VA_ARGS__) -+#else -+#define TRACE3(fmt, ...) do { } while (0) -+#endif -+ -+#if DEBUG >= 4 -+#define TRACE4(fmt, ...) TRACE(4, fmt , ## __VA_ARGS__) -+#else -+#define TRACE4(fmt, ...) do { } while (0) -+#endif -+ -+#if DEBUG >= 5 -+#define TRACE5(fmt, ...) TRACE(5, fmt , ## __VA_ARGS__) -+#else -+#define TRACE5(fmt, ...) do { } while (0) -+#endif -+ -+#if DEBUG >= 6 -+#define TRACE6(fmt, ...) TRACE(6, fmt , ## __VA_ARGS__) -+#else -+#define TRACE6(fmt, ...) do { } while (0) -+#endif -+ -+#define ENTER0(fmt, ...) TRACE0("Enter " fmt , ## __VA_ARGS__) -+#define ENTER1(fmt, ...) TRACE1("Enter " fmt , ## __VA_ARGS__) -+#define ENTER2(fmt, ...) TRACE2("Enter " fmt , ## __VA_ARGS__) -+#define ENTER3(fmt, ...) TRACE3("Enter " fmt , ## __VA_ARGS__) -+#define ENTER4(fmt, ...) TRACE4("Enter " fmt , ## __VA_ARGS__) -+#define ENTER5(fmt, ...) TRACE5("Enter " fmt , ## __VA_ARGS__) -+#define ENTER6(fmt, ...) TRACE6("Enter " fmt , ## __VA_ARGS__) -+ -+#define EXIT0(stmt) do { TRACE0("Exit"); stmt; } while (0) -+#define EXIT1(stmt) do { TRACE1("Exit"); stmt; } while (0) -+#define EXIT2(stmt) do { TRACE2("Exit"); stmt; } while (0) -+#define EXIT3(stmt) do { TRACE3("Exit"); stmt; } while (0) -+#define EXIT4(stmt) do { TRACE4("Exit"); stmt; } while (0) -+#define EXIT5(stmt) do { TRACE5("Exit"); stmt; } while (0) -+#define EXIT6(stmt) do { TRACE6("Exit"); stmt; } while (0) -+ -+#if defined(USB_DEBUG) -+#define USBTRACE TRACE0 -+#define USBENTER ENTER0 -+#define USBEXIT EXIT0 -+#else -+#define USBTRACE(fmt, ...) do { } while (0) -+#define USBENTER(fmt, ...) -+#define USBEXIT(stmt) stmt -+#endif -+ -+#if defined(EVENT_DEBUG) -+#define EVENTTRACE TRACE0 -+#define EVENTENTER ENTER0 -+#define EVENTEXIT EXIT0 -+#else -+#define EVENTTRACE(fmt, ...) do { } while (0) -+#define EVENTENTER(fmt, ...) -+#define EVENTEXIT(stmt) stmt -+#endif -+ -+#if defined(TIMER_DEBUG) -+#define TIMERTRACE TRACE0 -+#define TIMERENTER ENTER0 -+#define TIMEREXIT EXIT0 -+#else -+#define TIMERTRACE(fmt, ...) do { } while (0) -+#define TIMERENTER(fmt, ...) -+#define TIMEREXIT(stmt) stmt -+#endif -+ -+#if defined(IO_DEBUG) -+#define IOTRACE TRACE0 -+#define IOENTER ENTER0 -+#define IOEXIT EXIT0 -+#else -+#define IOTRACE(fmt, ...) do { } while (0) -+#define IOENTER(fmt, ...) -+#define IOEXIT(stmt) stmt -+#endif -+ -+#if defined(WORK_DEBUG) -+#define WORKTRACE TRACE0 -+#define WORKENTER ENTER0 -+#define WORKEXIT EXIT0 -+#else -+#define WORKTRACE(fmt, ...) do { } while (0) -+#define WORKENTER(fmt, ...) -+#define WORKEXIT(stmt) stmt -+#endif -+ -+#if DEBUG >= 1 -+#define assert(expr) \ -+do { \ -+ if (!(expr)) { \ -+ ERROR("assertion '%s' failed", #expr); \ -+ dump_stack(); \ -+ } \ -+} while (0) -+#else -+#define assert(expr) do { } while (0) -+#endif -+ -+#endif // __KERNEL__ -+ -+#endif // NDISWRAPPER_H -diff -Nurp linux-5.6.11/3rdparty/ndiswrapper/ntoskernel.c linux-5.6.11-ndis/3rdparty/ndiswrapper/ntoskernel.c ---- linux-5.6.11/3rdparty/ndiswrapper/ntoskernel.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.6.11-ndis/3rdparty/ndiswrapper/ntoskernel.c 2020-05-03 15:18:33.000000000 +0300 -@@ -0,0 +1,2716 @@ -+/* -+ * Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ */ -+ -+#include "ntoskernel.h" -+#include "ndis.h" -+#include "usb.h" -+#include "pnp.h" -+#include "loader.h" -+#include "ntoskernel_exports.h" -+ -+/* MDLs describe a range of virtual address with an array of physical -+ * pages right after the header. For different ranges of virtual -+ * addresses, the number of entries of physical pages may be different -+ * (depending on number of entries required). If we want to allocate -+ * MDLs from a pool, the size has to be constant. So we assume that -+ * maximum range used by a driver is MDL_CACHE_PAGES; if a driver -+ * requests an MDL for a bigger region, we allocate it with kmalloc; -+ * otherwise, we allocate from the pool */ -+ -+#define MDL_CACHE_PAGES 3 -+#define MDL_CACHE_SIZE (sizeof(struct mdl) + \ -+ (sizeof(PFN_NUMBER) * MDL_CACHE_PAGES)) -+struct wrap_mdl { -+ struct nt_list list; -+ struct mdl mdl[0]; -+}; -+ -+/* everything here is for all drivers/devices - not per driver/device */ -+static spinlock_t dispatcher_lock; -+spinlock_t ntoskernel_lock; -+static void *mdl_cache; -+static struct nt_list wrap_mdl_list; -+ -+static struct work_struct kdpc_work; -+static void kdpc_worker(struct work_struct *dummy); -+ -+static struct nt_list kdpc_list; -+static spinlock_t kdpc_list_lock; -+ -+static struct nt_list callback_objects; -+ -+struct nt_list object_list; -+ -+struct bus_driver { -+ struct nt_list list; -+ char name[MAX_DRIVER_NAME_LEN]; -+ struct driver_object drv_obj; -+}; -+ -+static struct nt_list bus_driver_list; -+ -+static struct work_struct ntos_work; -+static struct nt_list ntos_work_list; -+static spinlock_t ntos_work_lock; -+static void ntos_work_worker(struct work_struct *dummy); -+spinlock_t irp_cancel_lock; -+static NT_SPIN_LOCK nt_list_lock; -+static struct nt_slist wrap_timer_slist; -+CCHAR cpu_count; -+ -+/* compute ticks (100ns) since 1601 until when system booted into -+ * wrap_ticks_to_boot */ -+u64 wrap_ticks_to_boot; -+ -+#if defined(CONFIG_X86_64) -+static struct timer_list shared_data_timer; -+struct kuser_shared_data kuser_shared_data; -+#endif -+ -+WIN_SYMBOL_MAP("KeTickCount", &jiffies) -+WIN_SYMBOL_MAP("KeNumberProcessors", &cpu_count) -+WIN_SYMBOL_MAP("NlsMbCodePageTag", FALSE) -+ -+struct workqueue_struct *ntos_wq; -+ -+#ifdef WRAP_PREEMPT -+DEFINE_PER_CPU(struct irql_info, irql_info); -+#endif -+ -+#if defined(CONFIG_X86_64) -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,15,0) -+static void update_user_shared_data_proc(struct timer_list *tl) -+#else -+static void update_user_shared_data_proc(unsigned long data) -+#endif -+{ -+ /* timer is supposed to be scheduled every 10ms, but bigger -+ * intervals seem to work (tried up to 50ms) */ -+ *((ULONG64 *)&kuser_shared_data.system_time) = ticks_1601(); -+ *((ULONG64 *)&kuser_shared_data.interrupt_time) = -+ jiffies * TICKSPERSEC / HZ; -+ *((ULONG64 *)&kuser_shared_data.tick) = jiffies; -+ -+ mod_timer(&shared_data_timer, jiffies + MSEC_TO_HZ(30)); -+} -+#endif -+ -+void *allocate_object(ULONG size, enum common_object_type type, -+ struct unicode_string *name) -+{ -+ struct common_object_header *hdr; -+ void *body; -+ -+ /* we pad header as prefix to body */ -+ hdr = ExAllocatePoolWithTag(NonPagedPool, OBJECT_SIZE(size), 0); -+ if (!hdr) { -+ WARNING("couldn't allocate memory"); -+ return NULL; -+ } -+ memset(hdr, 0, OBJECT_SIZE(size)); -+ if (name) { -+ hdr->name.buf = ExAllocatePoolWithTag(NonPagedPool, -+ name->max_length, 0); -+ if (!hdr->name.buf) { -+ ExFreePool(hdr); -+ return NULL; -+ } -+ memcpy(hdr->name.buf, name->buf, name->max_length); -+ hdr->name.length = name->length; -+ hdr->name.max_length = name->max_length; -+ } -+ hdr->type = type; -+ hdr->ref_count = 1; -+ spin_lock_bh(&ntoskernel_lock); -+ /* threads are looked up often (in KeWaitForXXX), so optimize -+ * for fast lookups of threads */ -+ if (type == OBJECT_TYPE_NT_THREAD) -+ InsertHeadList(&object_list, &hdr->list); -+ else -+ InsertTailList(&object_list, &hdr->list); -+ spin_unlock_bh(&ntoskernel_lock); -+ body = HEADER_TO_OBJECT(hdr); -+ TRACE3("allocated hdr: %p, body: %p", hdr, body); -+ return body; -+} -+ -+static void free_object(void *object) -+{ -+ struct common_object_header *hdr; -+ -+ hdr = OBJECT_TO_HEADER(object); -+ spin_lock_bh(&ntoskernel_lock); -+ RemoveEntryList(&hdr->list); -+ spin_unlock_bh(&ntoskernel_lock); -+ TRACE3("freed hdr: %p, body: %p", hdr, object); -+ if (hdr->name.buf) -+ ExFreePool(hdr->name.buf); -+ ExFreePool(hdr); -+} -+ -+static int add_bus_driver(const char *name) -+{ -+ struct bus_driver *bus_driver; -+ -+ bus_driver = kzalloc(sizeof(*bus_driver), GFP_KERNEL); -+ if (!bus_driver) { -+ ERROR("couldn't allocate memory"); -+ return -ENOMEM; -+ } -+ strncpy(bus_driver->name, name, sizeof(bus_driver->name)); -+ bus_driver->name[sizeof(bus_driver->name)-1] = 0; -+ spin_lock_bh(&ntoskernel_lock); -+ InsertTailList(&bus_driver_list, &bus_driver->list); -+ spin_unlock_bh(&ntoskernel_lock); -+ TRACE1("bus driver %s is at %p", name, &bus_driver->drv_obj); -+ return STATUS_SUCCESS; -+} -+ -+struct driver_object *find_bus_driver(const char *name) -+{ -+ struct bus_driver *bus_driver; -+ struct driver_object *drv_obj; -+ -+ spin_lock_bh(&ntoskernel_lock); -+ drv_obj = NULL; -+ nt_list_for_each_entry(bus_driver, &bus_driver_list, list) { -+ if (strcmp(bus_driver->name, name) == 0) { -+ drv_obj = &bus_driver->drv_obj; -+ break; -+ } -+ } -+ spin_unlock_bh(&ntoskernel_lock); -+ return drv_obj; -+} -+ -+wfastcall struct nt_list *WIN_FUNC(ExfInterlockedInsertHeadList,3) -+ (struct nt_list *head, struct nt_list *entry, NT_SPIN_LOCK *lock) -+{ -+ struct nt_list *first; -+ unsigned long flags; -+ -+ ENTER5("head = %p, entry = %p", head, entry); -+ nt_spin_lock_irqsave(lock, flags); -+ first = InsertHeadList(head, entry); -+ nt_spin_unlock_irqrestore(lock, flags); -+ TRACE5("head = %p, old = %p", head, first); -+ return first; -+} -+ -+wfastcall struct nt_list *WIN_FUNC(ExInterlockedInsertHeadList,3) -+ (struct nt_list *head, struct nt_list *entry, NT_SPIN_LOCK *lock) -+{ -+ ENTER5("%p", head); -+ return ExfInterlockedInsertHeadList(head, entry, lock); -+} -+ -+wfastcall struct nt_list *WIN_FUNC(ExfInterlockedInsertTailList,3) -+ (struct nt_list *head, struct nt_list *entry, NT_SPIN_LOCK *lock) -+{ -+ struct nt_list *last; -+ unsigned long flags; -+ -+ ENTER5("head = %p, entry = %p", head, entry); -+ nt_spin_lock_irqsave(lock, flags); -+ last = InsertTailList(head, entry); -+ nt_spin_unlock_irqrestore(lock, flags); -+ TRACE5("head = %p, old = %p", head, last); -+ return last; -+} -+ -+wfastcall struct nt_list *WIN_FUNC(ExInterlockedInsertTailList,3) -+ (struct nt_list *head, struct nt_list *entry, NT_SPIN_LOCK *lock) -+{ -+ ENTER5("%p", head); -+ return ExfInterlockedInsertTailList(head, entry, lock); -+} -+ -+wfastcall struct nt_list *WIN_FUNC(ExfInterlockedRemoveHeadList,2) -+ (struct nt_list *head, NT_SPIN_LOCK *lock) -+{ -+ struct nt_list *ret; -+ unsigned long flags; -+ -+ ENTER5("head = %p", head); -+ nt_spin_lock_irqsave(lock, flags); -+ ret = RemoveHeadList(head); -+ nt_spin_unlock_irqrestore(lock, flags); -+ TRACE5("head = %p, ret = %p", head, ret); -+ return ret; -+} -+ -+wfastcall struct nt_list *WIN_FUNC(ExInterlockedRemoveHeadList,2) -+ (struct nt_list *head, NT_SPIN_LOCK *lock) -+{ -+ ENTER5("%p", head); -+ return ExfInterlockedRemoveHeadList(head, lock); -+} -+ -+wfastcall struct nt_list *WIN_FUNC(ExfInterlockedRemoveTailList,2) -+ (struct nt_list *head, NT_SPIN_LOCK *lock) -+{ -+ struct nt_list *ret; -+ unsigned long flags; -+ -+ ENTER5("head = %p", head); -+ nt_spin_lock_irqsave(lock, flags); -+ ret = RemoveTailList(head); -+ nt_spin_unlock_irqrestore(lock, flags); -+ TRACE5("head = %p, ret = %p", head, ret); -+ return ret; -+} -+ -+wfastcall struct nt_list *WIN_FUNC(ExInterlockedRemoveTailList,2) -+ (struct nt_list *head, NT_SPIN_LOCK *lock) -+{ -+ ENTER5("%p", head); -+ return ExfInterlockedRemoveTailList(head, lock); -+} -+ -+wfastcall void WIN_FUNC(InitializeSListHead,1) -+ (nt_slist_header *head) -+{ -+ memset(head, 0, sizeof(*head)); -+} -+ -+wfastcall struct nt_slist *WIN_FUNC(ExInterlockedPushEntrySList,3) -+ (nt_slist_header *head, struct nt_slist *entry, NT_SPIN_LOCK *lock) -+{ -+ struct nt_slist *ret; -+ -+ ret = PushEntrySList(head, entry, lock); -+ return ret; -+} -+ -+wstdcall struct nt_slist *WIN_FUNC(ExpInterlockedPushEntrySList,2) -+ (nt_slist_header *head, struct nt_slist *entry) -+{ -+ struct nt_slist *ret; -+ -+ ret = PushEntrySList(head, entry, &nt_list_lock); -+ return ret; -+} -+ -+wfastcall struct nt_slist *WIN_FUNC(InterlockedPushEntrySList,2) -+ (nt_slist_header *head, struct nt_slist *entry) -+{ -+ struct nt_slist *ret; -+ -+ ret = PushEntrySList(head, entry, &nt_list_lock); -+ return ret; -+} -+ -+wfastcall struct nt_slist *WIN_FUNC(ExInterlockedPopEntrySList,2) -+ (nt_slist_header *head, NT_SPIN_LOCK *lock) -+{ -+ struct nt_slist *ret; -+ -+ ret = PopEntrySList(head, lock); -+ return ret; -+} -+ -+wstdcall struct nt_slist *WIN_FUNC(ExpInterlockedPopEntrySList,1) -+ (nt_slist_header *head) -+{ -+ struct nt_slist *ret; -+ -+ ret = PopEntrySList(head, &nt_list_lock); -+ return ret; -+} -+ -+wfastcall struct nt_slist *WIN_FUNC(InterlockedPopEntrySList,1) -+ (nt_slist_header *head) -+{ -+ struct nt_slist *ret; -+ -+ ret = PopEntrySList(head, &nt_list_lock); -+ return ret; -+} -+ -+wstdcall USHORT WIN_FUNC(ExQueryDepthSList,1) -+ (nt_slist_header *head) -+{ -+ USHORT depth; -+ ENTER5("%p", head); -+ depth = head->depth; -+ TRACE5("%d, %p", depth, head->next); -+ return depth; -+} -+ -+wfastcall LONG WIN_FUNC(InterlockedIncrement,1) -+ (LONG volatile *val) -+{ -+ return post_atomic_add(*val, 1); -+} -+ -+wfastcall LONG WIN_FUNC(InterlockedDecrement,1) -+ (LONG volatile *val) -+{ -+ return post_atomic_add(*val, -1); -+} -+ -+wfastcall LONG WIN_FUNC(InterlockedExchange,2) -+ (LONG volatile *target, LONG val) -+{ -+ return xchg(target, val); -+} -+ -+wfastcall LONG WIN_FUNC(InterlockedCompareExchange,3) -+ (LONG volatile *dest, LONG new, LONG old) -+{ -+ return cmpxchg(dest, old, new); -+} -+ -+wfastcall void WIN_FUNC(ExInterlockedAddLargeStatistic,2) -+ (LARGE_INTEGER volatile *plint, ULONG n) -+{ -+ unsigned long flags; -+ -+ local_irq_save(flags); -+#ifdef CONFIG_X86_64 -+ __asm__ __volatile__( -+ "\n" -+ LOCK_PREFIX "add %1, %0\n\t" -+ : "+m" (*plint) -+ : "r" (n)); -+#else -+ __asm__ __volatile__( -+ "1:\t" -+ " movl %1, %%ebx\n\t" -+ " movl %%edx, %%ecx\n\t" -+ " addl %%eax, %%ebx\n\t" -+ " adcl $0, %%ecx\n\t" -+ LOCK_PREFIX "cmpxchg8b %0\n\t" -+ " jnz 1b\n\t" -+ : "+m" (*plint) -+ : "m" (n), "A" (*plint) -+ : "ebx", "ecx"); -+#endif -+ local_irq_restore(flags); -+} -+ -+static void initialize_object(struct dispatcher_header *dh, enum dh_type type, -+ int state) -+{ -+ memset(dh, 0, sizeof(*dh)); -+ set_object_type(dh, type); -+ dh->signal_state = state; -+ InitializeListHead(&dh->wait_blocks); -+} -+ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,15,0) -+static void timer_proc(struct timer_list *tl) -+#else -+static void timer_proc(unsigned long data) -+#endif -+{ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,15,0) -+ struct wrap_timer *wrap_timer = from_timer(wrap_timer, tl, timer); -+#else -+ struct wrap_timer *wrap_timer = (struct wrap_timer *)data; -+#endif -+ struct nt_timer *nt_timer; -+ struct kdpc *kdpc; -+ -+ nt_timer = wrap_timer->nt_timer; -+ TIMERENTER("%p(%p), %lu", wrap_timer, nt_timer, jiffies); -+#ifdef TIMER_DEBUG -+ BUG_ON(wrap_timer->wrap_timer_magic != WRAP_TIMER_MAGIC); -+ BUG_ON(nt_timer->wrap_timer_magic != WRAP_TIMER_MAGIC); -+#endif -+ KeSetEvent((struct nt_event *)nt_timer, 0, FALSE); -+ if (wrap_timer->repeat) -+ mod_timer(&wrap_timer->timer, jiffies + wrap_timer->repeat); -+ kdpc = nt_timer->kdpc; -+ if (kdpc) -+ queue_kdpc(kdpc); -+ TIMEREXIT(return); -+} -+ -+void wrap_init_timer(struct nt_timer *nt_timer, enum timer_type type, -+ struct ndis_mp_block *nmb) -+{ -+ struct wrap_timer *wrap_timer; -+ -+ /* TODO: if a timer is initialized more than once, we allocate -+ * memory for wrap_timer more than once for the same nt_timer, -+ * wasting memory. We can check if nt_timer->wrap_timer_magic is -+ * set and not allocate, but it is not guaranteed always to be -+ * safe */ -+ TIMERENTER("%p", nt_timer); -+ /* we allocate memory for wrap_timer behind driver's back and -+ * there is no NDIS/DDK function where this memory can be -+ * freed, so we use slack_kmalloc so it gets freed when driver -+ * is unloaded */ -+ if (nmb) -+ wrap_timer = kzalloc(sizeof(*wrap_timer), irql_gfp()); -+ else -+ wrap_timer = slack_kzalloc(sizeof(*wrap_timer)); -+ if (!wrap_timer) { -+ ERROR("couldn't allocate memory for timer"); -+ return; -+ } -+ -+#if LINUX_VERSION_CODE < KERNEL_VERSION(4,15,0) -+ init_timer(&wrap_timer->timer); -+ wrap_timer->timer.function = timer_proc; -+ wrap_timer->timer.data = (unsigned long)wrap_timer; -+#else -+ timer_setup(&wrap_timer->timer, timer_proc, 0); -+#endif -+ wrap_timer->nt_timer = nt_timer; -+#ifdef TIMER_DEBUG -+ wrap_timer->wrap_timer_magic = WRAP_TIMER_MAGIC; -+#endif -+ nt_timer->wrap_timer = wrap_timer; -+ nt_timer->kdpc = NULL; -+ initialize_object(&nt_timer->dh, (enum dh_type)type, 0); -+ nt_timer->wrap_timer_magic = WRAP_TIMER_MAGIC; -+ TIMERTRACE("timer %p (%p)", wrap_timer, nt_timer); -+ spin_lock_bh(&ntoskernel_lock); -+ if (nmb) { -+ wrap_timer->slist.next = nmb->wnd->wrap_timer_slist.next; -+ nmb->wnd->wrap_timer_slist.next = &wrap_timer->slist; -+ } else { -+ wrap_timer->slist.next = wrap_timer_slist.next; -+ wrap_timer_slist.next = &wrap_timer->slist; -+ } -+ spin_unlock_bh(&ntoskernel_lock); -+ TIMEREXIT(return); -+} -+ -+wstdcall void WIN_FUNC(KeInitializeTimerEx,2) -+ (struct nt_timer *nt_timer, enum timer_type type) -+{ -+ TIMERENTER("%p", nt_timer); -+ wrap_init_timer(nt_timer, type, NULL); -+} -+ -+wstdcall void WIN_FUNC(KeInitializeTimer,1) -+ (struct nt_timer *nt_timer) -+{ -+ TIMERENTER("%p", nt_timer); -+ wrap_init_timer(nt_timer, NotificationTimer, NULL); -+} -+ -+/* expires and repeat are in HZ */ -+BOOLEAN wrap_set_timer(struct nt_timer *nt_timer, unsigned long expires_hz, -+ unsigned long repeat_hz, struct kdpc *kdpc) -+{ -+ struct wrap_timer *wrap_timer; -+ -+ TIMERENTER("%p, %lu, %lu, %p, %lu", -+ nt_timer, expires_hz, repeat_hz, kdpc, jiffies); -+ -+ wrap_timer = nt_timer->wrap_timer; -+ TIMERTRACE("%p", wrap_timer); -+#ifdef TIMER_DEBUG -+ if (wrap_timer->nt_timer != nt_timer) -+ WARNING("bad timers: %p, %p, %p", wrap_timer, nt_timer, -+ wrap_timer->nt_timer); -+ if (nt_timer->wrap_timer_magic != WRAP_TIMER_MAGIC) { -+ WARNING("buggy Windows timer didn't initialize timer %p", -+ nt_timer); -+ return FALSE; -+ } -+ if (wrap_timer->wrap_timer_magic != WRAP_TIMER_MAGIC) { -+ WARNING("timer %p is not initialized (%lx)?", -+ wrap_timer, wrap_timer->wrap_timer_magic); -+ wrap_timer->wrap_timer_magic = WRAP_TIMER_MAGIC; -+ } -+#endif -+ KeClearEvent((struct nt_event *)nt_timer); -+ nt_timer->kdpc = kdpc; -+ wrap_timer->repeat = repeat_hz; -+ if (mod_timer(&wrap_timer->timer, jiffies + expires_hz)) -+ TIMEREXIT(return TRUE); -+ else -+ TIMEREXIT(return FALSE); -+} -+ -+wstdcall BOOLEAN WIN_FUNC(KeSetTimerEx,4) -+ (struct nt_timer *nt_timer, LARGE_INTEGER duetime_ticks, -+ LONG period_ms, struct kdpc *kdpc) -+{ -+ unsigned long expires_hz, repeat_hz; -+ -+ TIMERENTER("%p, %lld, %d", nt_timer, duetime_ticks, period_ms); -+ expires_hz = SYSTEM_TIME_TO_HZ(duetime_ticks); -+ repeat_hz = MSEC_TO_HZ(period_ms); -+ return wrap_set_timer(nt_timer, expires_hz, repeat_hz, kdpc); -+} -+ -+wstdcall BOOLEAN WIN_FUNC(KeSetTimer,3) -+ (struct nt_timer *nt_timer, LARGE_INTEGER duetime_ticks, -+ struct kdpc *kdpc) -+{ -+ TIMERENTER("%p, %lld, %p", nt_timer, duetime_ticks, kdpc); -+ return KeSetTimerEx(nt_timer, duetime_ticks, 0, kdpc); -+} -+ -+wstdcall BOOLEAN WIN_FUNC(KeCancelTimer,1) -+ (struct nt_timer *nt_timer) -+{ -+ struct wrap_timer *wrap_timer; -+ int ret; -+ -+ TIMERENTER("%p", nt_timer); -+ wrap_timer = nt_timer->wrap_timer; -+ if (!wrap_timer) { -+ ERROR("invalid wrap_timer"); -+ return TRUE; -+ } -+#ifdef TIMER_DEBUG -+ BUG_ON(wrap_timer->wrap_timer_magic != WRAP_TIMER_MAGIC); -+#endif -+ /* disable timer before deleting so if it is periodic timer, it -+ * won't be re-armed after deleting */ -+ wrap_timer->repeat = 0; -+ ret = del_timer_sync(&wrap_timer->timer); -+ /* the documentation for KeCancelTimer suggests the DPC is -+ * deqeued, but actually DPC is left to run */ -+ if (ret) -+ TIMEREXIT(return TRUE); -+ else -+ TIMEREXIT(return FALSE); -+} -+ -+wstdcall BOOLEAN WIN_FUNC(KeReadStateTimer,1) -+ (struct nt_timer *nt_timer) -+{ -+ if (nt_timer->dh.signal_state) -+ return TRUE; -+ else -+ return FALSE; -+} -+ -+wstdcall void WIN_FUNC(KeInitializeDpc,3) -+ (struct kdpc *kdpc, void *func, void *ctx) -+{ -+ ENTER3("%p, %p, %p", kdpc, func, ctx); -+ memset(kdpc, 0, sizeof(*kdpc)); -+ kdpc->func = func; -+ kdpc->ctx = ctx; -+ InitializeListHead(&kdpc->list); -+} -+ -+static void kdpc_worker(struct work_struct *dummy) -+{ -+ struct nt_list *entry; -+ struct kdpc *kdpc; -+ unsigned long flags; -+ KIRQL irql; -+ -+ WORKENTER(""); -+ irql = raise_irql(DISPATCH_LEVEL); -+ while (1) { -+ spin_lock_irqsave(&kdpc_list_lock, flags); -+ entry = RemoveHeadList(&kdpc_list); -+ if (entry) { -+ kdpc = container_of(entry, struct kdpc, list); -+ assert(kdpc->queued); -+ kdpc->queued = 0; -+ } else -+ kdpc = NULL; -+ spin_unlock_irqrestore(&kdpc_list_lock, flags); -+ if (!kdpc) -+ break; -+ WORKTRACE("%p, %p, %p, %p, %p", kdpc, kdpc->func, kdpc->ctx, -+ kdpc->arg1, kdpc->arg2); -+ assert_irql(_irql_ == DISPATCH_LEVEL); -+ LIN2WIN4(kdpc->func, kdpc, kdpc->ctx, kdpc->arg1, kdpc->arg2); -+ assert_irql(_irql_ == DISPATCH_LEVEL); -+ } -+ lower_irql(irql); -+ WORKEXIT(return); -+} -+ -+wstdcall void WIN_FUNC(KeFlushQueuedDpcs,0) -+ (void) -+{ -+ kdpc_worker(NULL); -+} -+ -+BOOLEAN queue_kdpc(struct kdpc *kdpc) -+{ -+ BOOLEAN ret; -+ unsigned long flags; -+ -+ WORKENTER("%p", kdpc); -+ spin_lock_irqsave(&kdpc_list_lock, flags); -+ if (kdpc->queued) -+ ret = FALSE; -+ else { -+ if (unlikely(kdpc->importance == HighImportance)) -+ InsertHeadList(&kdpc_list, &kdpc->list); -+ else -+ InsertTailList(&kdpc_list, &kdpc->list); -+ kdpc->queued = 1; -+ ret = TRUE; -+ } -+ spin_unlock_irqrestore(&kdpc_list_lock, flags); -+ if (ret == TRUE) -+ queue_work(ntos_wq, &kdpc_work); -+ WORKTRACE("%d", ret); -+ return ret; -+} -+ -+BOOLEAN dequeue_kdpc(struct kdpc *kdpc) -+{ -+ BOOLEAN ret; -+ unsigned long flags; -+ -+ WORKENTER("%p", kdpc); -+ spin_lock_irqsave(&kdpc_list_lock, flags); -+ if (kdpc->queued) { -+ RemoveEntryList(&kdpc->list); -+ kdpc->queued = 0; -+ ret = TRUE; -+ } else -+ ret = FALSE; -+ spin_unlock_irqrestore(&kdpc_list_lock, flags); -+ WORKTRACE("%d", ret); -+ return ret; -+} -+ -+wstdcall BOOLEAN WIN_FUNC(KeInsertQueueDpc,3) -+ (struct kdpc *kdpc, void *arg1, void *arg2) -+{ -+ WORKENTER("%p, %p, %p", kdpc, arg1, arg2); -+ kdpc->arg1 = arg1; -+ kdpc->arg2 = arg2; -+ return queue_kdpc(kdpc); -+} -+ -+wstdcall BOOLEAN WIN_FUNC(KeRemoveQueueDpc,1) -+ (struct kdpc *kdpc) -+{ -+ return dequeue_kdpc(kdpc); -+} -+ -+wstdcall void WIN_FUNC(KeSetImportanceDpc,2) -+ (struct kdpc *kdpc, enum kdpc_importance importance) -+{ -+ kdpc->importance = importance; -+} -+ -+static void ntos_work_worker(struct work_struct *dummy) -+{ -+ struct ntos_work_item *ntos_work_item; -+ struct nt_list *cur; -+ -+ while (1) { -+ spin_lock_bh(&ntos_work_lock); -+ cur = RemoveHeadList(&ntos_work_list); -+ spin_unlock_bh(&ntos_work_lock); -+ if (!cur) -+ break; -+ ntos_work_item = container_of(cur, struct ntos_work_item, list); -+ WORKTRACE("%p: executing %p, %p, %p", current, -+ ntos_work_item->func, ntos_work_item->arg1, -+ ntos_work_item->arg2); -+ LIN2WIN2(ntos_work_item->func, ntos_work_item->arg1, -+ ntos_work_item->arg2); -+ kfree(ntos_work_item); -+ } -+ WORKEXIT(return); -+} -+ -+int schedule_ntos_work_item(NTOS_WORK_FUNC func, void *arg1, void *arg2) -+{ -+ struct ntos_work_item *ntos_work_item; -+ -+ WORKENTER("adding work: %p, %p, %p", func, arg1, arg2); -+ ntos_work_item = kmalloc(sizeof(*ntos_work_item), irql_gfp()); -+ if (!ntos_work_item) { -+ ERROR("couldn't allocate memory"); -+ return -ENOMEM; -+ } -+ ntos_work_item->func = func; -+ ntos_work_item->arg1 = arg1; -+ ntos_work_item->arg2 = arg2; -+ spin_lock_bh(&ntos_work_lock); -+ InsertTailList(&ntos_work_list, &ntos_work_item->list); -+ spin_unlock_bh(&ntos_work_lock); -+ queue_work(ntos_wq, &ntos_work); -+ WORKEXIT(return 0); -+} -+ -+wstdcall void WIN_FUNC(KeInitializeSpinLock,1) -+ (NT_SPIN_LOCK *lock) -+{ -+ ENTER6("%p", lock); -+ nt_spin_lock_init(lock); -+} -+ -+wstdcall void WIN_FUNC(KeAcquireSpinLock,2) -+ (NT_SPIN_LOCK *lock, KIRQL *irql) -+{ -+ ENTER6("%p", lock); -+ *irql = nt_spin_lock_irql(lock, DISPATCH_LEVEL); -+} -+ -+wstdcall void WIN_FUNC(KeReleaseSpinLock,2) -+ (NT_SPIN_LOCK *lock, KIRQL oldirql) -+{ -+ ENTER6("%p", lock); -+ nt_spin_unlock_irql(lock, oldirql); -+} -+ -+wstdcall void WIN_FUNC(KeAcquireSpinLockAtDpcLevel,1) -+ (NT_SPIN_LOCK *lock) -+{ -+ ENTER6("%p", lock); -+ nt_spin_lock(lock); -+} -+ -+wstdcall void WIN_FUNC(KeReleaseSpinLockFromDpcLevel,1) -+ (NT_SPIN_LOCK *lock) -+{ -+ ENTER6("%p", lock); -+ nt_spin_unlock(lock); -+} -+ -+wstdcall void WIN_FUNC(KeRaiseIrql,2) -+ (KIRQL newirql, KIRQL *oldirql) -+{ -+ ENTER6("%d", newirql); -+ *oldirql = raise_irql(newirql); -+} -+ -+wstdcall KIRQL WIN_FUNC(KeRaiseIrqlToDpcLevel,0) -+ (void) -+{ -+ return raise_irql(DISPATCH_LEVEL); -+} -+ -+wstdcall void WIN_FUNC(KeLowerIrql,1) -+ (KIRQL irql) -+{ -+ ENTER6("%d", irql); -+ lower_irql(irql); -+} -+ -+wstdcall KIRQL WIN_FUNC(KeAcquireSpinLockRaiseToDpc,1) -+ (NT_SPIN_LOCK *lock) -+{ -+ ENTER6("%p", lock); -+ return nt_spin_lock_irql(lock, DISPATCH_LEVEL); -+} -+ -+wstdcall void *WIN_FUNC(ExAllocatePoolWithTag,3) -+ (enum pool_type pool_type, SIZE_T size, ULONG tag) -+{ -+ void *addr; -+ -+ ENTER4("pool_type: %d, size: %zu, tag: 0x%x", pool_type, size, tag); -+ assert_irql(_irql_ <= DISPATCH_LEVEL); -+ if (size < PAGE_SIZE) -+ addr = kmalloc(size, irql_gfp()); -+ else { -+ if (irql_gfp() & GFP_ATOMIC) { -+ addr = __vmalloc(size, GFP_ATOMIC | __GFP_HIGHMEM -+ ); -+ TRACE1("%p, %zu", addr, size); -+ } else { -+ addr = vmalloc(size); -+ TRACE1("%p, %zu", addr, size); -+ } -+ } -+ DBG_BLOCK(1) { -+ if (addr) -+ TRACE4("addr: %p, %zu", addr, size); -+ else -+ TRACE1("failed: %zu", size); -+ } -+ return addr; -+} -+WIN_FUNC_DECL(ExAllocatePoolWithTag,3) -+ -+wstdcall void WIN_FUNC(ExFreePoolWithTag,2) -+ (void *addr, ULONG tag) -+{ -+ TRACE4("%p", addr); -+ if ((unsigned long)addr < VMALLOC_START || -+ (unsigned long)addr >= VMALLOC_END) -+ kfree(addr); -+ else -+ vfree(addr); -+ -+ EXIT4(return); -+} -+ -+wstdcall void WIN_FUNC(ExFreePool,1) -+ (void *addr) -+{ -+ ExFreePoolWithTag(addr, 0); -+} -+WIN_FUNC_DECL(ExFreePool,1) -+ -+wstdcall void WIN_FUNC(ExInitializeNPagedLookasideList,7) -+ (struct npaged_lookaside_list *lookaside, -+ LOOKASIDE_ALLOC_FUNC *alloc_func, LOOKASIDE_FREE_FUNC *free_func, -+ ULONG flags, SIZE_T size, ULONG tag, USHORT depth) -+{ -+ ENTER3("lookaside: %p, size: %zu, flags: %u, head: %p, " -+ "alloc: %p, free: %p", lookaside, size, flags, -+ lookaside, alloc_func, free_func); -+ -+ memset(lookaside, 0, sizeof(*lookaside)); -+ -+ lookaside->size = size; -+ lookaside->tag = tag; -+ lookaside->depth = 4; -+ lookaside->maxdepth = 256; -+ lookaside->pool_type = NonPagedPool; -+ -+ if (alloc_func) -+ lookaside->alloc_func = alloc_func; -+ else -+ lookaside->alloc_func = WIN_FUNC_PTR(ExAllocatePoolWithTag,3); -+ if (free_func) -+ lookaside->free_func = free_func; -+ else -+ lookaside->free_func = WIN_FUNC_PTR(ExFreePool,1); -+ -+#ifndef CONFIG_X86_64 -+ nt_spin_lock_init(&lookaside->obsolete); -+#endif -+ EXIT3(return); -+} -+ -+wstdcall void WIN_FUNC(ExDeleteNPagedLookasideList,1) -+ (struct npaged_lookaside_list *lookaside) -+{ -+ struct nt_slist *entry; -+ -+ ENTER3("lookaside = %p", lookaside); -+ while ((entry = ExpInterlockedPopEntrySList(&lookaside->head))) -+ LIN2WIN1(lookaside->free_func, entry); -+ EXIT3(return); -+} -+ -+wstdcall NTSTATUS WIN_FUNC(ExCreateCallback,4) -+ (struct callback_object **object, struct object_attributes *attributes, -+ BOOLEAN create, BOOLEAN allow_multiple_callbacks) -+{ -+ struct callback_object *obj; -+ -+ ENTER2(""); -+ spin_lock_bh(&ntoskernel_lock); -+ nt_list_for_each_entry(obj, &callback_objects, callback_funcs) { -+ if (obj->attributes == attributes) { -+ spin_unlock_bh(&ntoskernel_lock); -+ *object = obj; -+ return STATUS_SUCCESS; -+ } -+ } -+ spin_unlock_bh(&ntoskernel_lock); -+ obj = allocate_object(sizeof(struct callback_object), -+ OBJECT_TYPE_CALLBACK, NULL); -+ if (!obj) -+ EXIT2(return STATUS_INSUFFICIENT_RESOURCES); -+ InitializeListHead(&obj->callback_funcs); -+ nt_spin_lock_init(&obj->lock); -+ obj->allow_multiple_callbacks = allow_multiple_callbacks; -+ obj->attributes = attributes; -+ *object = obj; -+ EXIT2(return STATUS_SUCCESS); -+} -+ -+wstdcall void *WIN_FUNC(ExRegisterCallback,3) -+ (struct callback_object *object, PCALLBACK_FUNCTION func, void *context) -+{ -+ struct callback_func *callback; -+ KIRQL irql; -+ -+ ENTER2(""); -+ irql = nt_spin_lock_irql(&object->lock, DISPATCH_LEVEL); -+ if (object->allow_multiple_callbacks == FALSE && -+ !IsListEmpty(&object->callback_funcs)) { -+ nt_spin_unlock_irql(&object->lock, irql); -+ EXIT2(return NULL); -+ } -+ nt_spin_unlock_irql(&object->lock, irql); -+ callback = kmalloc(sizeof(*callback), GFP_KERNEL); -+ if (!callback) { -+ ERROR("couldn't allocate memory"); -+ return NULL; -+ } -+ callback->func = func; -+ callback->context = context; -+ callback->object = object; -+ irql = nt_spin_lock_irql(&object->lock, DISPATCH_LEVEL); -+ InsertTailList(&object->callback_funcs, &callback->list); -+ nt_spin_unlock_irql(&object->lock, irql); -+ EXIT2(return callback); -+} -+ -+wstdcall void WIN_FUNC(ExUnregisterCallback,1) -+ (struct callback_func *callback) -+{ -+ struct callback_object *object; -+ KIRQL irql; -+ -+ ENTER3("%p", callback); -+ if (!callback) -+ return; -+ object = callback->object; -+ irql = nt_spin_lock_irql(&object->lock, DISPATCH_LEVEL); -+ RemoveEntryList(&callback->list); -+ nt_spin_unlock_irql(&object->lock, irql); -+ kfree(callback); -+ return; -+} -+ -+wstdcall void WIN_FUNC(ExNotifyCallback,3) -+ (struct callback_object *object, void *arg1, void *arg2) -+{ -+ struct callback_func *callback; -+ KIRQL irql; -+ -+ ENTER3("%p", object); -+ irql = nt_spin_lock_irql(&object->lock, DISPATCH_LEVEL); -+ nt_list_for_each_entry(callback, &object->callback_funcs, list) { -+ LIN2WIN3(callback->func, callback->context, arg1, arg2); -+ } -+ nt_spin_unlock_irql(&object->lock, irql); -+ return; -+} -+ -+/* check and set signaled state; should be called with dispatcher_lock held */ -+/* @grab indicates if the event should be grabbed or checked -+ * - note that a semaphore may stay in signaled state for multiple -+ * 'grabs' if the count is > 1 */ -+static int grab_object(struct dispatcher_header *dh, -+ struct task_struct *thread, int grab) -+{ -+ EVENTTRACE("%p, %p, %d, %d", dh, thread, grab, dh->signal_state); -+ if (unlikely(is_mutex_object(dh))) { -+ struct nt_mutex *nt_mutex; -+ nt_mutex = container_of(dh, struct nt_mutex, dh); -+ EVENTTRACE("%p, %p, %d, %p, %d", nt_mutex, -+ nt_mutex->owner_thread, dh->signal_state, -+ thread, grab); -+ /* either no thread owns the mutex or this thread owns -+ * it */ -+ assert(dh->signal_state == 1 && nt_mutex->owner_thread == NULL); -+ assert(dh->signal_state < 1 && nt_mutex->owner_thread != NULL); -+ if ((dh->signal_state == 1 && nt_mutex->owner_thread == NULL) || -+ nt_mutex->owner_thread == thread) { -+ if (grab) { -+ dh->signal_state--; -+ nt_mutex->owner_thread = thread; -+ } -+ EVENTEXIT(return 1); -+ } -+ } else if (dh->signal_state > 0) { -+ /* to grab, decrement signal_state for synchronization -+ * or semaphore objects */ -+ if (grab && (is_synch_object(dh) || is_semaphore_object(dh))) -+ dh->signal_state--; -+ EVENTEXIT(return 1); -+ } -+ EVENTEXIT(return 0); -+} -+ -+/* this function should be called holding dispatcher_lock */ -+static void object_signaled(struct dispatcher_header *dh) -+{ -+ struct nt_list *cur, *next; -+ struct wait_block *wb; -+ -+ EVENTENTER("%p", dh); -+ nt_list_for_each_safe(cur, next, &dh->wait_blocks) { -+ wb = container_of(cur, struct wait_block, list); -+ assert(wb->thread != NULL); -+ assert(wb->object == NULL); -+ if (!grab_object(dh, wb->thread, 1)) -+ continue; -+ EVENTTRACE("%p (%p): waking %p", dh, wb, wb->thread); -+ RemoveEntryList(cur); -+ wb->object = dh; -+ *(wb->wait_done) = 1; -+ wake_up_process(wb->thread); -+ } -+ EVENTEXIT(return); -+} -+ -+wstdcall NTSTATUS WIN_FUNC(KeWaitForMultipleObjects,8) -+ (ULONG count, void *object[], enum wait_type wait_type, -+ KWAIT_REASON wait_reason, KPROCESSOR_MODE wait_mode, -+ BOOLEAN alertable, LARGE_INTEGER *timeout, -+ struct wait_block *wait_block_array) -+{ -+ int i, res = 0, wait_count, wait_done; -+ typeof(jiffies) wait_hz = 0; -+ struct wait_block *wb, wb_array[THREAD_WAIT_OBJECTS]; -+ struct dispatcher_header *dh; -+ KIRQL irql = current_irql(); -+ -+ EVENTENTER("%p, %d, %u, %p", current, count, wait_type, timeout); -+ -+ if (count > MAX_WAIT_OBJECTS || -+ (count > THREAD_WAIT_OBJECTS && wait_block_array == NULL)) -+ EVENTEXIT(return STATUS_INVALID_PARAMETER); -+ -+ if (wait_block_array == NULL) -+ wb = wb_array; -+ else -+ wb = wait_block_array; -+ -+ /* If *timeout == 0: In the case of WaitAny, if an object can -+ * be grabbed (object is in signaled state), grab and -+ * return. In the case of WaitAll, we have to first make sure -+ * all objects can be grabbed. If any/some of them can't be -+ * grabbed, either we return STATUS_TIMEOUT or wait for them, -+ * depending on how to satisfy wait. If all of them can be -+ * grabbed, we will grab them in the next loop below */ -+ -+ spin_lock_bh(&dispatcher_lock); -+ for (i = wait_count = 0; i < count; i++) { -+ dh = object[i]; -+ EVENTTRACE("%p: event %p (%d)", current, dh, dh->signal_state); -+ /* wait_type == 1 for WaitAny, 0 for WaitAll */ -+ if (grab_object(dh, current, wait_type)) { -+ if (wait_type == WaitAny) { -+ spin_unlock_bh(&dispatcher_lock); -+ EVENTEXIT(return STATUS_WAIT_0 + i); -+ } -+ } else { -+ EVENTTRACE("%p: wait for %p", current, dh); -+ wait_count++; -+ } -+ } -+ -+ if (timeout && *timeout == 0 && wait_count) { -+ spin_unlock_bh(&dispatcher_lock); -+ EVENTEXIT(return STATUS_TIMEOUT); -+ } -+ -+ /* get the list of objects the thread needs to wait on and add -+ * the thread on the wait list for each such object */ -+ /* if *timeout == 0, this step will grab all the objects */ -+ wait_done = 0; -+ for (i = 0; i < count; i++) { -+ dh = object[i]; -+ EVENTTRACE("%p: event %p (%d)", current, dh, dh->signal_state); -+ wb[i].object = NULL; -+ if (grab_object(dh, current, 1)) { -+ EVENTTRACE("%p: no wait for %p (%d)", -+ current, dh, dh->signal_state); -+ /* mark that we are not waiting on this object */ -+ wb[i].thread = NULL; -+ } else { -+ wb[i].wait_done = &wait_done; -+ wb[i].thread = current; -+ EVENTTRACE("%p: wait for %p", current, dh); -+ InsertTailList(&dh->wait_blocks, &wb[i].list); -+ } -+ } -+ spin_unlock_bh(&dispatcher_lock); -+ if (wait_count == 0) -+ EVENTEXIT(return STATUS_SUCCESS); -+ -+ assert(timeout == NULL || *timeout != 0); -+ if (timeout == NULL) -+ wait_hz = 0; -+ else -+ wait_hz = SYSTEM_TIME_TO_HZ(*timeout); -+ -+ if (irql >= DISPATCH_LEVEL) { -+ WARNING("attempt to wait with irql %d", irql); -+ EVENTEXIT(return STATUS_INVALID_PARAMETER); -+ } -+ EVENTTRACE("%p: sleep for %ld on %p", current, wait_hz, &wait_done); -+ /* we don't honor 'alertable' - according to description for -+ * this, even if waiting in non-alertable state, thread may be -+ * alerted in some circumstances */ -+ while (wait_count) { -+ res = wait_condition(wait_done, wait_hz, TASK_INTERRUPTIBLE); -+ spin_lock_bh(&dispatcher_lock); -+ EVENTTRACE("%p woke up: %d, %d", current, res, wait_done); -+ /* the event may have been set by the time -+ * wrap_wait_event returned and spinlock obtained, so -+ * don't rely on value of 'res' - check event status */ -+ if (!wait_done) { -+ assert(res <= 0); -+ /* timed out or interrupted; remove from wait list */ -+ for (i = 0; i < count; i++) { -+ if (!wb[i].thread) -+ continue; -+ EVENTTRACE("%p: timedout, dequeue %p (%p)", -+ current, object[i], wb[i].object); -+ assert(wb[i].object == NULL); -+ RemoveEntryList(&wb[i].list); -+ } -+ spin_unlock_bh(&dispatcher_lock); -+ if (res < 0) -+ EVENTEXIT(return STATUS_ALERTED); -+ else -+ EVENTEXIT(return STATUS_TIMEOUT); -+ } -+ assert(res > 0); -+ /* woken because object(s) signaled */ -+ for (i = 0; wait_count && i < count; i++) { -+ if (!wb[i].thread || !wb[i].object) -+ continue; -+ DBG_BLOCK(1) { -+ if (wb[i].object != object[i]) { -+ EVENTTRACE("oops %p != %p", -+ wb[i].object, object[i]); -+ continue; -+ } -+ } -+ wait_count--; -+ if (wait_type == WaitAny) { -+ int j; -+ /* done; remove from rest of wait list */ -+ for (j = i + 1; j < count; j++) { -+ if (wb[j].thread && !wb[j].object) -+ RemoveEntryList(&wb[j].list); -+ } -+ spin_unlock_bh(&dispatcher_lock); -+ EVENTEXIT(return STATUS_WAIT_0 + i); -+ } -+ } -+ wait_done = 0; -+ spin_unlock_bh(&dispatcher_lock); -+ if (wait_count == 0) -+ EVENTEXIT(return STATUS_SUCCESS); -+ -+ /* this thread is still waiting for more objects, so -+ * let it wait for remaining time and those objects */ -+ if (timeout) -+ wait_hz = res; -+ else -+ wait_hz = 0; -+ } -+ /* should never reach here, but compiler wants return value */ -+ ERROR("%p: wait_hz: %ld", current, wait_hz); -+ EVENTEXIT(return STATUS_SUCCESS); -+} -+ -+wstdcall NTSTATUS WIN_FUNC(KeWaitForSingleObject,5) -+ (void *object, KWAIT_REASON wait_reason, KPROCESSOR_MODE wait_mode, -+ BOOLEAN alertable, LARGE_INTEGER *timeout) -+{ -+ return KeWaitForMultipleObjects(1, &object, WaitAny, wait_reason, -+ wait_mode, alertable, timeout, NULL); -+} -+ -+wstdcall void WIN_FUNC(KeInitializeEvent,3) -+ (struct nt_event *nt_event, enum event_type type, BOOLEAN state) -+{ -+ EVENTENTER("event = %p, type = %d, state = %d", nt_event, type, state); -+ initialize_object(&nt_event->dh, (enum dh_type)type, state); -+ EVENTEXIT(return); -+} -+ -+wstdcall LONG WIN_FUNC(KeSetEvent,3) -+ (struct nt_event *nt_event, KPRIORITY incr, BOOLEAN wait) -+{ -+ LONG old_state; -+ -+ EVENTENTER("%p, %d", nt_event, nt_event->dh.type); -+ if (wait == TRUE) -+ WARNING("wait = %d, not yet implemented", wait); -+ spin_lock_bh(&dispatcher_lock); -+ old_state = nt_event->dh.signal_state; -+ nt_event->dh.signal_state = 1; -+ if (old_state == 0) -+ object_signaled(&nt_event->dh); -+ spin_unlock_bh(&dispatcher_lock); -+ EVENTEXIT(return old_state); -+} -+ -+wstdcall void WIN_FUNC(KeClearEvent,1) -+ (struct nt_event *nt_event) -+{ -+ EVENTENTER("%p", nt_event); -+ nt_event->dh.signal_state = 0; -+ EVENTEXIT(return); -+} -+ -+wstdcall LONG WIN_FUNC(KeResetEvent,1) -+ (struct nt_event *nt_event) -+{ -+ LONG old_state; -+ -+ EVENTENTER("%p", nt_event); -+ old_state = xchg(&nt_event->dh.signal_state, 0); -+ EVENTEXIT(return old_state); -+} -+ -+wstdcall LONG WIN_FUNC(KeReadStateEvent,1) -+ (struct nt_event *nt_event) -+{ -+ LONG state; -+ -+ state = nt_event->dh.signal_state; -+ EVENTTRACE("%d", state); -+ return state; -+} -+ -+wstdcall void WIN_FUNC(KeInitializeMutex,2) -+ (struct nt_mutex *mutex, ULONG level) -+{ -+ EVENTENTER("%p", mutex); -+ initialize_object(&mutex->dh, MutexObject, 1); -+ mutex->dh.size = sizeof(*mutex); -+ InitializeListHead(&mutex->list); -+ mutex->abandoned = FALSE; -+ mutex->apc_disable = 1; -+ mutex->owner_thread = NULL; -+ EVENTEXIT(return); -+} -+ -+wstdcall LONG WIN_FUNC(KeReleaseMutex,2) -+ (struct nt_mutex *mutex, BOOLEAN wait) -+{ -+ LONG ret; -+ struct task_struct *thread; -+ -+ EVENTENTER("%p, %d, %p", mutex, wait, current); -+ if (wait == TRUE) -+ WARNING("wait: %d", wait); -+ thread = current; -+ spin_lock_bh(&dispatcher_lock); -+ EVENTTRACE("%p, %p, %p, %d", mutex, thread, mutex->owner_thread, -+ mutex->dh.signal_state); -+ if ((mutex->owner_thread == thread) && (mutex->dh.signal_state <= 0)) { -+ ret = mutex->dh.signal_state++; -+ if (ret == 0) { -+ mutex->owner_thread = NULL; -+ object_signaled(&mutex->dh); -+ } -+ } else { -+ ret = STATUS_MUTANT_NOT_OWNED; -+ WARNING("invalid mutex: %p, %p, %p", mutex, mutex->owner_thread, -+ thread); -+ } -+ EVENTTRACE("%p, %p, %p, %d", mutex, thread, mutex->owner_thread, -+ mutex->dh.signal_state); -+ spin_unlock_bh(&dispatcher_lock); -+ EVENTEXIT(return ret); -+} -+ -+wstdcall void WIN_FUNC(KeInitializeSemaphore,3) -+ (struct nt_semaphore *semaphore, LONG count, LONG limit) -+{ -+ EVENTENTER("%p: %d", semaphore, count); -+ /* if limit > 1, we need to satisfy as many waits (until count -+ * becomes 0); so we keep decrementing count every time a wait -+ * is satisfied */ -+ initialize_object(&semaphore->dh, SemaphoreObject, count); -+ semaphore->dh.size = sizeof(*semaphore); -+ semaphore->limit = limit; -+ EVENTEXIT(return); -+} -+ -+wstdcall LONG WIN_FUNC(KeReleaseSemaphore,4) -+ (struct nt_semaphore *semaphore, KPRIORITY incr, LONG adjustment, -+ BOOLEAN wait) -+{ -+ LONG ret; -+ -+ EVENTENTER("%p", semaphore); -+ spin_lock_bh(&dispatcher_lock); -+ ret = semaphore->dh.signal_state; -+ assert(ret >= 0); -+ if (semaphore->dh.signal_state + adjustment <= semaphore->limit) -+ semaphore->dh.signal_state += adjustment; -+ else { -+ WARNING("releasing %d over limit %d", adjustment, -+ semaphore->limit); -+ semaphore->dh.signal_state = semaphore->limit; -+ } -+ if (semaphore->dh.signal_state > 0) -+ object_signaled(&semaphore->dh); -+ spin_unlock_bh(&dispatcher_lock); -+ EVENTEXIT(return ret); -+} -+ -+wstdcall NTSTATUS WIN_FUNC(KeDelayExecutionThread,3) -+ (KPROCESSOR_MODE wait_mode, BOOLEAN alertable, LARGE_INTEGER *interval) -+{ -+ int res; -+ long timeout; -+ -+ if (wait_mode != 0) -+ ERROR("invalid wait_mode %d", wait_mode); -+ -+ timeout = SYSTEM_TIME_TO_HZ(*interval); -+ EVENTTRACE("%p, %lld, %ld", current, *interval, timeout); -+ if (timeout <= 0) -+ EVENTEXIT(return STATUS_SUCCESS); -+ -+ if (alertable) -+ set_current_state(TASK_INTERRUPTIBLE); -+ else -+ set_current_state(TASK_UNINTERRUPTIBLE); -+ -+ res = schedule_timeout(timeout); -+ EVENTTRACE("%p, %d", current, res); -+ if (res == 0) -+ EVENTEXIT(return STATUS_SUCCESS); -+ else -+ EVENTEXIT(return STATUS_ALERTED); -+} -+ -+wstdcall ULONGLONG WIN_FUNC(KeQueryInterruptTime,0) -+ (void) -+{ -+ EXIT5(return jiffies * TICKSPERJIFFY); -+} -+ -+wstdcall ULONG WIN_FUNC(KeQueryTimeIncrement,0) -+ (void) -+{ -+ EXIT5(return TICKSPERSEC / HZ); -+} -+ -+wstdcall void WIN_FUNC(KeQuerySystemTime,1) -+ (LARGE_INTEGER *time) -+{ -+ *time = ticks_1601(); -+ TRACE5("%llu, %lu", *time, jiffies); -+} -+ -+wstdcall void WIN_FUNC(KeQueryTickCount,1) -+ (LARGE_INTEGER *count) -+{ -+ *count = jiffies; -+} -+ -+wstdcall LARGE_INTEGER WIN_FUNC(KeQueryPerformanceCounter,1) -+ (LARGE_INTEGER *counter) -+{ -+ if (counter) -+ *counter = HZ; -+ return jiffies; -+} -+ -+wstdcall KAFFINITY WIN_FUNC(KeQueryActiveProcessors,0) -+ (void) -+{ -+ int i, n; -+ KAFFINITY bits = 0; -+ n = num_online_cpus(); -+ for (i = 0; i < n; i++) -+ bits = (bits << 1) | 1; -+ return bits; -+} -+ -+struct nt_thread *get_current_nt_thread(void) -+{ -+ struct task_struct *task = current; -+ struct nt_thread *thread; -+ struct common_object_header *header; -+ -+ TRACE6("task: %p", task); -+ thread = NULL; -+ spin_lock_bh(&ntoskernel_lock); -+ nt_list_for_each_entry(header, &object_list, list) { -+ TRACE6("%p, %d", header, header->type); -+ if (header->type != OBJECT_TYPE_NT_THREAD) -+ break; -+ thread = HEADER_TO_OBJECT(header); -+ TRACE6("%p, %p", thread, thread->task); -+ if (thread->task == task) -+ break; -+ else -+ thread = NULL; -+ } -+ spin_unlock_bh(&ntoskernel_lock); -+ if (thread == NULL) -+ TRACE4("couldn't find thread for task %p, %d", task, task->pid); -+ TRACE6("%p", thread); -+ return thread; -+} -+ -+static struct task_struct *get_nt_thread_task(struct nt_thread *thread) -+{ -+ struct task_struct *task; -+ struct common_object_header *header; -+ -+ TRACE6("%p", thread); -+ task = NULL; -+ spin_lock_bh(&ntoskernel_lock); -+ nt_list_for_each_entry(header, &object_list, list) { -+ TRACE6("%p, %d", header, header->type); -+ if (header->type != OBJECT_TYPE_NT_THREAD) -+ break; -+ if (thread == HEADER_TO_OBJECT(header)) { -+ task = thread->task; -+ break; -+ } -+ } -+ spin_unlock_bh(&ntoskernel_lock); -+ if (task == NULL) -+ TRACE2("%p: couldn't find task for %p", current, thread); -+ return task; -+} -+ -+static struct nt_thread *create_nt_thread(struct task_struct *task) -+{ -+ struct nt_thread *thread; -+ thread = allocate_object(sizeof(*thread), OBJECT_TYPE_NT_THREAD, NULL); -+ if (!thread) { -+ ERROR("couldn't allocate thread object"); -+ EXIT2(return NULL); -+ } -+ thread->task = task; -+ if (task) -+ thread->pid = task->pid; -+ else -+ thread->pid = 0; -+ nt_spin_lock_init(&thread->lock); -+ InitializeListHead(&thread->irps); -+ initialize_object(&thread->dh, ThreadObject, 0); -+ thread->dh.size = sizeof(*thread); -+ thread->prio = LOW_PRIORITY; -+ return thread; -+} -+ -+wstdcall struct nt_thread *WIN_FUNC(KeGetCurrentThread,0) -+ (void) -+{ -+ struct nt_thread *thread = get_current_nt_thread(); -+ TRACE2("%p, %p", thread, current); -+ return thread; -+} -+ -+wstdcall KPRIORITY WIN_FUNC(KeQueryPriorityThread,1) -+ (struct nt_thread *thread) -+{ -+ KPRIORITY prio; -+ struct task_struct *task; -+ -+ TRACE2("%p", thread); -+#ifdef CONFIG_X86_64 -+ /* sis163u driver for amd64 passes 0x1f from thread created by -+ * PsCreateSystemThread - no idea what is 0x1f */ -+ if (thread == (void *)0x1f) -+ thread = get_current_nt_thread(); -+#endif -+ if (!thread) { -+ TRACE2("invalid thread"); -+ EXIT2(return LOW_REALTIME_PRIORITY); -+ } -+ task = get_nt_thread_task(thread); -+ if (!task) { -+ TRACE2("couldn't find task for thread: %p", thread); -+ EXIT2(return LOW_REALTIME_PRIORITY); -+ } -+ -+ prio = thread->prio; -+ -+ TRACE2("%d", prio); -+ return prio; -+} -+ -+wstdcall KPRIORITY WIN_FUNC(KeSetPriorityThread,2) -+ (struct nt_thread *thread, KPRIORITY prio) -+{ -+ KPRIORITY old_prio; -+ struct task_struct *task; -+ -+ TRACE2("thread: %p, priority = %u", thread, prio); -+#ifdef CONFIG_X86_64 -+ if (thread == (void *)0x1f) -+ thread = get_current_nt_thread(); -+#endif -+ if (!thread) { -+ TRACE2("invalid thread"); -+ EXIT2(return LOW_REALTIME_PRIORITY); -+ } -+ task = get_nt_thread_task(thread); -+ if (!task) { -+ TRACE2("couldn't find task for thread: %p", thread); -+ EXIT2(return LOW_REALTIME_PRIORITY); -+ } -+ -+ old_prio = thread->prio; -+ thread->prio = prio; -+ -+ TRACE2("%d, %d", old_prio, thread->prio); -+ return old_prio; -+} -+ -+struct thread_trampoline { -+ void (*func)(void *) wstdcall; -+ void *ctx; -+ struct nt_thread *thread; -+ struct completion started; -+}; -+ -+static int ntdriver_thread(void *data) -+{ -+ struct thread_trampoline *thread_tramp = data; -+ /* yes, a tramp! */ -+ typeof(thread_tramp->func) func = thread_tramp->func; -+ typeof(thread_tramp->ctx) ctx = thread_tramp->ctx; -+ -+ thread_tramp->thread->task = current; -+ thread_tramp->thread->pid = current->pid; -+ TRACE2("thread: %p, task: %p (%d)", thread_tramp->thread, -+ current, current->pid); -+ complete(&thread_tramp->started); -+ -+#ifdef PF_NOFREEZE -+ current->flags |= PF_NOFREEZE; -+#endif -+ strncpy(current->comm, "ntdriver", sizeof(current->comm)); -+ current->comm[sizeof(current->comm)-1] = 0; -+ LIN2WIN1(func, ctx); -+ ERROR("task: %p", current); -+ return 0; -+} -+ -+wstdcall NTSTATUS WIN_FUNC(PsCreateSystemThread,7) -+ (void **handle, ULONG access, void *obj_attr, void *process, -+ void *client_id, void (*func)(void *) wstdcall, void *ctx) -+{ -+ struct thread_trampoline thread_tramp; -+ -+ ENTER2("handle = %p, access = %u, obj_attr = %p, process = %p, " -+ "client_id = %p, func = %p, context = %p", handle, access, -+ obj_attr, process, client_id, func, ctx); -+ -+ thread_tramp.thread = create_nt_thread(NULL); -+ if (!thread_tramp.thread) { -+ ERROR("couldn't allocate thread object"); -+ EXIT2(return STATUS_RESOURCES); -+ } -+ TRACE2("thread: %p", thread_tramp.thread); -+ thread_tramp.func = func; -+ thread_tramp.ctx = ctx; -+ init_completion(&thread_tramp.started); -+ -+ thread_tramp.thread->task = kthread_run(ntdriver_thread, -+ &thread_tramp, "ntdriver"); -+ if (IS_ERR(thread_tramp.thread->task)) { -+ free_object(thread_tramp.thread); -+ EXIT2(return STATUS_FAILURE); -+ } -+ TRACE2("created task: %p", thread_tramp.thread->task); -+ -+ wait_for_completion(&thread_tramp.started); -+ *handle = OBJECT_TO_HEADER(thread_tramp.thread); -+ TRACE2("created thread: %p, %p", thread_tramp.thread, *handle); -+ EXIT2(return STATUS_SUCCESS); -+} -+ -+wstdcall NTSTATUS WIN_FUNC(PsTerminateSystemThread,1) -+ (NTSTATUS status) -+{ -+ struct nt_thread *thread; -+ -+ TRACE2("%p, %08X", current, status); -+ thread = get_current_nt_thread(); -+ TRACE2("%p", thread); -+ if (thread) { -+ KeSetEvent((struct nt_event *)&thread->dh, 0, FALSE); -+ while (1) { -+ struct nt_list *ent; -+ struct irp *irp; -+ KIRQL irql; -+ irql = nt_spin_lock_irql(&thread->lock, DISPATCH_LEVEL); -+ ent = RemoveHeadList(&thread->irps); -+ nt_spin_unlock_irql(&thread->lock, irql); -+ if (!ent) -+ break; -+ irp = container_of(ent, struct irp, thread_list); -+ IOTRACE("%p", irp); -+ IoCancelIrp(irp); -+ } -+ /* the driver may later query this status with -+ * ZwQueryInformationThread */ -+ thread->status = status; -+ } else -+ ERROR("couldn't find thread for task: %p", current); -+ -+ complete_and_exit(NULL, status); -+ ERROR("oops: %p, %d", thread->task, thread->pid); -+ return STATUS_FAILURE; -+} -+ -+wstdcall BOOLEAN WIN_FUNC(KeRemoveEntryDeviceQueue,2) -+ (struct kdevice_queue *dev_queue, struct kdevice_queue_entry *entry) -+{ -+ struct kdevice_queue_entry *e; -+ KIRQL irql; -+ -+ irql = nt_spin_lock_irql(&dev_queue->lock, DISPATCH_LEVEL); -+ nt_list_for_each_entry(e, &dev_queue->list, list) { -+ if (e == entry) { -+ RemoveEntryList(&e->list); -+ nt_spin_unlock_irql(&dev_queue->lock, irql); -+ return TRUE; -+ } -+ } -+ nt_spin_unlock_irql(&dev_queue->lock, irql); -+ return FALSE; -+} -+ -+wstdcall BOOLEAN WIN_FUNC(KeSynchronizeExecution,3) -+ (struct kinterrupt *interrupt, PKSYNCHRONIZE_ROUTINE synch_routine, -+ void *ctx) -+{ -+ BOOLEAN ret; -+ unsigned long flags; -+ -+ nt_spin_lock_irqsave(interrupt->actual_lock, flags); -+ ret = LIN2WIN1(synch_routine, ctx); -+ nt_spin_unlock_irqrestore(interrupt->actual_lock, flags); -+ TRACE6("%d", ret); -+ return ret; -+} -+ -+wstdcall BOOLEAN WIN_FUNC(KeRegisterBugCheckReasonCallback,4) -+ (void *callback_record, void *callback_routine, UINT reason, -+ char *component) -+{ -+ TRACE1("callback_record: %p, callback_routine: %p, reason: %d, " -+ "component: %s", callback_record, callback_routine, reason, -+ component); -+ TODO(); -+ return FALSE; -+} -+ -+wstdcall BOOLEAN WIN_FUNC(KeDeregisterBugCheckReasonCallback,1) -+ (void *callback_record) -+{ -+ TRACE1("callback_record: %p", callback_record); -+ TODO(); -+ return TRUE; -+} -+ -+wstdcall void *WIN_FUNC(MmAllocateContiguousMemorySpecifyCache,5) -+ (SIZE_T size, PHYSICAL_ADDRESS lowest, PHYSICAL_ADDRESS highest, -+ PHYSICAL_ADDRESS boundary, enum memory_caching_type cache_type) -+{ -+ void *addr; -+ gfp_t flags; -+ -+ ENTER2("%zu, 0x%llx, 0x%llx, 0x%llx, %d", size, lowest, -+ highest, boundary, cache_type); -+ flags = irql_gfp(); -+ addr = wrap_get_free_pages(flags, size); -+ TRACE2("%p, %zu, 0x%x", addr, size, flags); -+ if (addr && ((virt_to_phys(addr) + size) <= highest)) -+ EXIT2(return addr); -+#ifdef CONFIG_X86_64 -+ /* GFP_DMA is really only 16MB even on x86-64, but there is no -+ * other zone available */ -+ if (highest <= DMA_BIT_MASK(31)) -+ flags |= __GFP_DMA; -+ else if (highest <= DMA_BIT_MASK(32)) -+ flags |= __GFP_DMA32; -+#else -+ if (highest <= DMA_BIT_MASK(24)) -+ flags |= __GFP_DMA; -+ else if (highest > DMA_BIT_MASK(30)) -+ flags |= __GFP_HIGHMEM; -+#endif -+ if (addr) -+ free_pages((unsigned long)addr, get_order(size)); -+ addr = wrap_get_free_pages(flags, size); -+ TRACE2("%p, %zu, 0x%x", addr, size, flags); -+ return addr; -+} -+ -+wstdcall void WIN_FUNC(MmFreeContiguousMemorySpecifyCache,3) -+ (void *base, SIZE_T size, enum memory_caching_type cache_type) -+{ -+ TRACE2("%p, %zu", base, size); -+ free_pages((unsigned long)base, get_order(size)); -+} -+ -+wstdcall PHYSICAL_ADDRESS WIN_FUNC(MmGetPhysicalAddress,1) -+ (void *base) -+{ -+ unsigned long phy = virt_to_phys(base); -+ TRACE2("%p, %p", base, (void *)phy); -+ return phy; -+} -+ -+/* Atheros card with pciid 168C:0014 calls this function with 0xf0000 -+ * and 0xf6ef0 address, and then check for things that seem to be -+ * related to ACPI: "_SM_" and "_DMI_". This may be the hack they do -+ * to check if this card is installed in IBM thinkpads; we can -+ * probably get this device to work if we create a buffer with the -+ * strings as required by the driver and return virtual address for -+ * that address instead */ -+wstdcall void __iomem *WIN_FUNC(MmMapIoSpace,3) -+ (PHYSICAL_ADDRESS phys_addr, SIZE_T size, -+ enum memory_caching_type cache) -+{ -+ void __iomem *virt; -+ ENTER1("cache type: %d", cache); -+ if (cache == MmCached) { -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,6,0) -+ virt = ioremap_cache(phys_addr, size); -+#else -+ virt = ioremap(phys_addr, size); -+#endif -+ } else { -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,6,0) -+ virt = ioremap(phys_addr, size); -+#else -+ virt = ioremap_nocache(phys_addr, size); -+#endif -+ } -+ TRACE1("%llx, %zu, %p", phys_addr, size, virt); -+ return virt; -+} -+ -+wstdcall void WIN_FUNC(MmUnmapIoSpace,2) -+ (void __iomem *addr, SIZE_T size) -+{ -+ ENTER1("%p, %zu", addr, size); -+ iounmap(addr); -+ return; -+} -+ -+wstdcall ULONG WIN_FUNC(MmSizeOfMdl,2) -+ (void *base, ULONG length) -+{ -+ return sizeof(struct mdl) + -+ (sizeof(PFN_NUMBER) * SPAN_PAGES(base, length)); -+} -+ -+struct mdl *allocate_init_mdl(void *virt, ULONG length) -+{ -+ struct wrap_mdl *wrap_mdl; -+ struct mdl *mdl; -+ int mdl_size = MmSizeOfMdl(virt, length); -+ -+ if (mdl_size <= MDL_CACHE_SIZE) { -+ wrap_mdl = kmem_cache_alloc(mdl_cache, irql_gfp()); -+ if (!wrap_mdl) -+ return NULL; -+ spin_lock_bh(&dispatcher_lock); -+ InsertHeadList(&wrap_mdl_list, &wrap_mdl->list); -+ spin_unlock_bh(&dispatcher_lock); -+ mdl = wrap_mdl->mdl; -+ TRACE3("allocated mdl from cache: %p(%p), %p(%d)", -+ wrap_mdl, mdl, virt, length); -+ memset(mdl, 0, MDL_CACHE_SIZE); -+ MmInitializeMdl(mdl, virt, length); -+ /* mark the MDL as allocated from cache pool so when -+ * it is freed, we free it back to the pool */ -+ mdl->flags = MDL_ALLOCATED_FIXED_SIZE | MDL_CACHE_ALLOCATED; -+ } else { -+ wrap_mdl = -+ kmalloc(sizeof(*wrap_mdl) + mdl_size, irql_gfp()); -+ if (!wrap_mdl) -+ return NULL; -+ mdl = wrap_mdl->mdl; -+ TRACE3("allocated mdl from memory: %p(%p), %p(%d)", -+ wrap_mdl, mdl, virt, length); -+ spin_lock_bh(&dispatcher_lock); -+ InsertHeadList(&wrap_mdl_list, &wrap_mdl->list); -+ spin_unlock_bh(&dispatcher_lock); -+ memset(mdl, 0, mdl_size); -+ MmInitializeMdl(mdl, virt, length); -+ mdl->flags = MDL_ALLOCATED_FIXED_SIZE; -+ } -+ return mdl; -+} -+ -+void free_mdl(struct mdl *mdl) -+{ -+ /* A driver may allocate Mdl with NdisAllocateBuffer and free -+ * with IoFreeMdl (e.g., 64-bit Broadcom). Since we need to -+ * treat buffers allocated with Ndis calls differently, we -+ * must call NdisFreeBuffer if it is allocated with Ndis -+ * function. We set 'pool' field in Ndis functions. */ -+ if (!mdl) -+ return; -+ if (mdl->pool) -+ NdisFreeBuffer(mdl); -+ else { -+ struct wrap_mdl *wrap_mdl = (struct wrap_mdl *) -+ ((char *)mdl - offsetof(struct wrap_mdl, mdl)); -+ spin_lock_bh(&dispatcher_lock); -+ RemoveEntryList(&wrap_mdl->list); -+ spin_unlock_bh(&dispatcher_lock); -+ -+ if (mdl->flags & MDL_CACHE_ALLOCATED) { -+ TRACE3("freeing mdl cache: %p, %p, %p", -+ wrap_mdl, mdl, mdl->mappedsystemva); -+ kmem_cache_free(mdl_cache, wrap_mdl); -+ } else { -+ TRACE3("freeing mdl: %p, %p, %p", -+ wrap_mdl, mdl, mdl->mappedsystemva); -+ kfree(wrap_mdl); -+ } -+ } -+ return; -+} -+ -+wstdcall void WIN_FUNC(IoBuildPartialMdl,4) -+ (struct mdl *source, struct mdl *target, void *virt, ULONG length) -+{ -+ MmInitializeMdl(target, virt, length); -+ target->flags |= MDL_PARTIAL; -+} -+ -+wstdcall void WIN_FUNC(MmBuildMdlForNonPagedPool,1) -+ (struct mdl *mdl) -+{ -+ PFN_NUMBER *mdl_pages; -+ int i, n; -+ -+ ENTER4("%p", mdl); -+ /* already mapped */ -+// mdl->mappedsystemva = MmGetMdlVirtualAddress(mdl); -+ mdl->flags |= MDL_SOURCE_IS_NONPAGED_POOL; -+ TRACE4("%p, %p, %p, %d, %d", mdl, mdl->mappedsystemva, mdl->startva, -+ mdl->byteoffset, mdl->bytecount); -+ n = SPAN_PAGES(MmGetSystemAddressForMdl(mdl), MmGetMdlByteCount(mdl)); -+ if (n > MDL_CACHE_PAGES) -+ WARNING("%p, %d, %d", MmGetSystemAddressForMdl(mdl), -+ MmGetMdlByteCount(mdl), n); -+ mdl_pages = MmGetMdlPfnArray(mdl); -+ for (i = 0; i < n; i++) -+ mdl_pages[i] = (ULONG_PTR)mdl->startva + (i * PAGE_SIZE); -+ EXIT4(return); -+} -+ -+wstdcall void *WIN_FUNC(MmMapLockedPages,2) -+ (struct mdl *mdl, KPROCESSOR_MODE access_mode) -+{ -+ /* already mapped */ -+// mdl->mappedsystemva = MmGetMdlVirtualAddress(mdl); -+ mdl->flags |= MDL_MAPPED_TO_SYSTEM_VA; -+ /* what is the need for MDL_PARTIAL_HAS_BEEN_MAPPED? */ -+ if (mdl->flags & MDL_PARTIAL) -+ mdl->flags |= MDL_PARTIAL_HAS_BEEN_MAPPED; -+ return mdl->mappedsystemva; -+} -+ -+wstdcall void *WIN_FUNC(MmMapLockedPagesSpecifyCache,6) -+ (struct mdl *mdl, KPROCESSOR_MODE access_mode, -+ enum memory_caching_type cache_type, void *base_address, -+ ULONG bug_check, enum mm_page_priority priority) -+{ -+ return MmMapLockedPages(mdl, access_mode); -+} -+ -+wstdcall void WIN_FUNC(MmUnmapLockedPages,2) -+ (void *base, struct mdl *mdl) -+{ -+ mdl->flags &= ~MDL_MAPPED_TO_SYSTEM_VA; -+ return; -+} -+ -+wstdcall void WIN_FUNC(MmProbeAndLockPages,3) -+ (struct mdl *mdl, KPROCESSOR_MODE access_mode, -+ enum lock_operation operation) -+{ -+ /* already locked */ -+ mdl->flags |= MDL_PAGES_LOCKED; -+ return; -+} -+ -+wstdcall void WIN_FUNC(MmUnlockPages,1) -+ (struct mdl *mdl) -+{ -+ mdl->flags &= ~MDL_PAGES_LOCKED; -+ return; -+} -+ -+wstdcall BOOLEAN WIN_FUNC(MmIsAddressValid,1) -+ (void *virt_addr) -+{ -+ if (virt_addr_valid(virt_addr)) -+ return TRUE; -+ else -+ return FALSE; -+} -+ -+wstdcall void *WIN_FUNC(MmLockPagableDataSection,1) -+ (void *address) -+{ -+ return address; -+} -+ -+wstdcall void WIN_FUNC(MmUnlockPagableImageSection,1) -+ (void *handle) -+{ -+ return; -+} -+ -+wstdcall NTSTATUS WIN_FUNC(ObReferenceObjectByHandle,6) -+ (void *handle, ACCESS_MASK desired_access, void *obj_type, -+ KPROCESSOR_MODE access_mode, void **object, void *handle_info) -+{ -+ struct common_object_header *hdr; -+ -+ TRACE2("%p", handle); -+ hdr = HANDLE_TO_HEADER(handle); -+ atomic_inc_var(hdr->ref_count); -+ *object = HEADER_TO_OBJECT(hdr); -+ TRACE2("%p, %p, %d, %p", hdr, object, hdr->ref_count, *object); -+ return STATUS_SUCCESS; -+} -+ -+/* DDK doesn't say if return value should be before incrementing or -+ * after incrementing reference count, but according to #reactos -+ * developers, it should be return value after incrementing */ -+wfastcall LONG WIN_FUNC(ObfReferenceObject,1) -+ (void *object) -+{ -+ struct common_object_header *hdr; -+ LONG ret; -+ -+ hdr = OBJECT_TO_HEADER(object); -+ ret = post_atomic_add(hdr->ref_count, 1); -+ TRACE2("%p, %d, %p", hdr, hdr->ref_count, object); -+ return ret; -+} -+ -+static int dereference_object(void *object) -+{ -+ struct common_object_header *hdr; -+ int ref_count; -+ -+ ENTER2("object: %p", object); -+ hdr = OBJECT_TO_HEADER(object); -+ TRACE2("hdr: %p", hdr); -+ ref_count = post_atomic_add(hdr->ref_count, -1); -+ TRACE2("object: %p, %d", object, ref_count); -+ if (ref_count < 0) -+ ERROR("invalid object: %p (%d)", object, ref_count); -+ if (ref_count <= 0) { -+ free_object(object); -+ return 1; -+ } else -+ return 0; -+} -+ -+wfastcall void WIN_FUNC(ObfDereferenceObject,1) -+ (void *object) -+{ -+ TRACE2("%p", object); -+ dereference_object(object); -+} -+ -+wstdcall NTSTATUS WIN_FUNC(ZwCreateFile,11) -+ (void **handle, ACCESS_MASK access_mask, -+ struct object_attributes *obj_attr, struct io_status_block *iosb, -+ LARGE_INTEGER *size, ULONG file_attr, ULONG share_access, -+ ULONG create_disposition, ULONG create_options, void *ea_buffer, -+ ULONG ea_length) -+{ -+ struct common_object_header *coh; -+ struct file_object *fo; -+ struct ansi_string ansi; -+ struct wrap_bin_file *bin_file; -+ char *file_basename; -+ NTSTATUS status; -+ -+ spin_lock_bh(&ntoskernel_lock); -+ nt_list_for_each_entry(coh, &object_list, list) { -+ if (coh->type != OBJECT_TYPE_FILE) -+ continue; -+ /* TODO: check if file is opened in shared mode */ -+ if (!RtlCompareUnicodeString(&coh->name, obj_attr->name, TRUE)) { -+ fo = HEADER_TO_OBJECT(coh); -+ bin_file = fo->wrap_bin_file; -+ *handle = coh; -+ spin_unlock_bh(&ntoskernel_lock); -+ ObReferenceObject(fo); -+ iosb->status = FILE_OPENED; -+ iosb->info = bin_file->size; -+ EXIT2(return STATUS_SUCCESS); -+ } -+ } -+ spin_unlock_bh(&ntoskernel_lock); -+ -+ if (RtlUnicodeStringToAnsiString(&ansi, obj_attr->name, TRUE) != -+ STATUS_SUCCESS) -+ EXIT2(return STATUS_INSUFFICIENT_RESOURCES); -+ -+ file_basename = strrchr(ansi.buf, '\\'); -+ if (file_basename) -+ file_basename++; -+ else -+ file_basename = ansi.buf; -+ TRACE2("file: '%s', '%s'", ansi.buf, file_basename); -+ -+ fo = allocate_object(sizeof(struct file_object), OBJECT_TYPE_FILE, -+ obj_attr->name); -+ if (!fo) { -+ RtlFreeAnsiString(&ansi); -+ iosb->status = STATUS_INSUFFICIENT_RESOURCES; -+ iosb->info = 0; -+ EXIT2(return STATUS_FAILURE); -+ } -+ coh = OBJECT_TO_HEADER(fo); -+ bin_file = get_bin_file(file_basename); -+ if (bin_file) { -+ TRACE2("%s, %s", bin_file->name, file_basename); -+ fo->flags = FILE_OPENED; -+ } else if (access_mask & FILE_WRITE_DATA) { -+ bin_file = kzalloc(sizeof(*bin_file), GFP_KERNEL); -+ if (bin_file) { -+ strncpy(bin_file->name, file_basename, -+ sizeof(bin_file->name)); -+ bin_file->name[sizeof(bin_file->name)-1] = 0; -+ bin_file->data = vmalloc(*size); -+ if (bin_file->data) { -+ memset(bin_file->data, 0, *size); -+ bin_file->size = *size; -+ fo->flags = FILE_CREATED; -+ } else { -+ kfree(bin_file); -+ bin_file = NULL; -+ } -+ } -+ } else -+ bin_file = NULL; -+ -+ RtlFreeAnsiString(&ansi); -+ if (!bin_file) { -+ iosb->status = FILE_DOES_NOT_EXIST; -+ iosb->info = 0; -+ free_object(fo); -+ EXIT2(return STATUS_FAILURE); -+ } -+ -+ fo->wrap_bin_file = bin_file; -+ fo->current_byte_offset = 0; -+ if (access_mask & FILE_READ_DATA) -+ fo->read_access = TRUE; -+ if (access_mask & FILE_WRITE_DATA) -+ fo->write_access = TRUE; -+ iosb->status = FILE_OPENED; -+ iosb->info = bin_file->size; -+ *handle = coh; -+ TRACE2("handle: %p", *handle); -+ status = STATUS_SUCCESS; -+ EXIT2(return status); -+} -+ -+wstdcall NTSTATUS WIN_FUNC(ZwOpenFile,6) -+ (void **handle, ACCESS_MASK access_mask, -+ struct object_attributes *obj_attr, struct io_status_block *iosb, -+ ULONG share_access, ULONG open_options) -+{ -+ LARGE_INTEGER size; -+ return ZwCreateFile(handle, access_mask, obj_attr, iosb, &size, 0, -+ share_access, 0, open_options, NULL, 0); -+} -+ -+wstdcall NTSTATUS WIN_FUNC(ZwReadFile,9) -+ (void *handle, struct nt_event *event, void *apc_routine, -+ void *apc_context, struct io_status_block *iosb, void *buffer, -+ ULONG length, LARGE_INTEGER *byte_offset, ULONG *key) -+{ -+ struct file_object *fo; -+ struct common_object_header *coh; -+ ULONG count; -+ size_t offset; -+ struct wrap_bin_file *file; -+ -+ TRACE2("%p", handle); -+ coh = handle; -+ if (coh->type != OBJECT_TYPE_FILE) { -+ ERROR("handle %p is invalid: %d", handle, coh->type); -+ EXIT2(return STATUS_FAILURE); -+ } -+ fo = HANDLE_TO_OBJECT(coh); -+ file = fo->wrap_bin_file; -+ TRACE2("file: %s (%zu)", file->name, file->size); -+ spin_lock_bh(&ntoskernel_lock); -+ if (byte_offset) -+ offset = *byte_offset; -+ else -+ offset = fo->current_byte_offset; -+ count = min((size_t)length, file->size - offset); -+ TRACE2("count: %u, offset: %zu, length: %u", count, offset, length); -+ memcpy(buffer, ((void *)file->data) + offset, count); -+ fo->current_byte_offset = offset + count; -+ spin_unlock_bh(&ntoskernel_lock); -+ iosb->status = STATUS_SUCCESS; -+ iosb->info = count; -+ EXIT2(return STATUS_SUCCESS); -+} -+ -+wstdcall NTSTATUS WIN_FUNC(ZwWriteFile,9) -+ (void *handle, struct nt_event *event, void *apc_routine, -+ void *apc_context, struct io_status_block *iosb, void *buffer, -+ ULONG length, LARGE_INTEGER *byte_offset, ULONG *key) -+{ -+ struct file_object *fo; -+ struct common_object_header *coh; -+ struct wrap_bin_file *file; -+ unsigned long offset; -+ -+ TRACE2("%p", handle); -+ coh = handle; -+ if (coh->type != OBJECT_TYPE_FILE) { -+ ERROR("handle %p is invalid: %d", handle, coh->type); -+ EXIT2(return STATUS_FAILURE); -+ } -+ fo = HANDLE_TO_OBJECT(coh); -+ file = fo->wrap_bin_file; -+ TRACE2("file: %zu, %u", file->size, length); -+ spin_lock_bh(&ntoskernel_lock); -+ if (byte_offset) -+ offset = *byte_offset; -+ else -+ offset = fo->current_byte_offset; -+ if (length + offset > file->size) { -+ WARNING("%lu, %zu", length + offset, file->size); -+ /* TODO: implement writing past end of current size */ -+ iosb->status = STATUS_FAILURE; -+ iosb->info = 0; -+ } else { -+ memcpy(file->data + offset, buffer, length); -+ iosb->status = STATUS_SUCCESS; -+ iosb->info = length; -+ fo->current_byte_offset = offset + length; -+ } -+ spin_unlock_bh(&ntoskernel_lock); -+ EXIT2(return iosb->status); -+} -+ -+wstdcall NTSTATUS WIN_FUNC(ZwClose,1) -+ (void *handle) -+{ -+ struct common_object_header *coh; -+ -+ TRACE2("%p", handle); -+ if (handle == NULL) { -+ TRACE1(""); -+ EXIT2(return STATUS_SUCCESS); -+ } -+ coh = handle; -+ if (coh->type == OBJECT_TYPE_FILE) { -+ struct file_object *fo; -+ struct wrap_bin_file *bin_file; -+ typeof(fo->flags) flags; -+ -+ fo = HANDLE_TO_OBJECT(handle); -+ flags = fo->flags; -+ bin_file = fo->wrap_bin_file; -+ if (dereference_object(fo)) { -+ if (flags == FILE_CREATED) { -+ vfree(bin_file->data); -+ kfree(bin_file); -+ } else -+ free_bin_file(bin_file); -+ } -+ } else if (coh->type == OBJECT_TYPE_NT_THREAD) { -+ struct nt_thread *thread = HANDLE_TO_OBJECT(handle); -+ TRACE2("thread: %p (%p)", thread, handle); -+ ObDereferenceObject(thread); -+ } else { -+ /* TODO: can we just dereference object here? */ -+ WARNING("closing handle 0x%x not implemented", coh->type); -+ } -+ EXIT2(return STATUS_SUCCESS); -+} -+ -+wstdcall NTSTATUS WIN_FUNC(ZwQueryInformationFile,5) -+ (void *handle, struct io_status_block *iosb, void *info, -+ ULONG length, enum file_info_class class) -+{ -+ struct file_object *fo; -+ struct file_name_info *fni; -+ struct file_std_info *fsi; -+ struct wrap_bin_file *file; -+ struct common_object_header *coh; -+ -+ ENTER2("%p", handle); -+ coh = handle; -+ if (coh->type != OBJECT_TYPE_FILE) { -+ ERROR("handle %p is invalid: %d", coh, coh->type); -+ EXIT2(return STATUS_FAILURE); -+ } -+ fo = HANDLE_TO_OBJECT(handle); -+ TRACE2("fo: %p, %d", fo, class); -+ switch (class) { -+ case FileNameInformation: -+ fni = info; -+ fni->length = min(length, (typeof(length))coh->name.length); -+ memcpy(fni->name, coh->name.buf, fni->length); -+ iosb->status = STATUS_SUCCESS; -+ iosb->info = fni->length; -+ break; -+ case FileStandardInformation: -+ fsi = info; -+ file = fo->wrap_bin_file; -+ fsi->alloc_size = file->size; -+ fsi->eof = file->size; -+ fsi->num_links = 1; -+ fsi->delete_pending = FALSE; -+ fsi->dir = FALSE; -+ iosb->status = STATUS_SUCCESS; -+ iosb->info = 0; -+ break; -+ default: -+ WARNING("type %d not implemented yet", class); -+ iosb->status = STATUS_FAILURE; -+ iosb->info = 0; -+ break; -+ } -+ EXIT2(return iosb->status); -+} -+ -+wstdcall NTSTATUS WIN_FUNC(ZwOpenSection,3) -+ (void **handle, ACCESS_MASK access, struct object_attributes *obj_attrs) -+{ -+ INFO("%p, 0x%x, %d", obj_attrs, obj_attrs->attributes, access); -+ TODO(); -+ *handle = obj_attrs; -+ return STATUS_SUCCESS; -+} -+ -+wstdcall NTSTATUS WIN_FUNC(ZwMapViewOfSection,10) -+ (void *secn_handle, void *process_handle, void **base_address, -+ ULONG zero_bits, SIZE_T commit_size, LARGE_INTEGER *secn_offset, -+ SIZE_T *view_size, enum section_inherit inherit, ULONG alloc_type, -+ ULONG protect) -+{ -+ INFO("%p, %p, %p", secn_handle, process_handle, base_address); -+ TODO(); -+ *base_address = (void *)0xdeadbeef; -+ return STATUS_SUCCESS; -+} -+ -+wstdcall NTSTATUS WIN_FUNC(ZwUnmapViewOfSection,2) -+ (void *process_handle, void *base_address) -+{ -+ INFO("%p, %p", process_handle, base_address); -+ TODO(); -+ return STATUS_SUCCESS; -+} -+ -+wstdcall NTSTATUS WIN_FUNC(ZwCreateKey,7) -+ (void **handle, ACCESS_MASK desired_access, -+ struct object_attributes *attr, ULONG title_index, -+ struct unicode_string *class, ULONG create_options, -+ ULONG *disposition) -+{ -+ struct ansi_string ansi; -+ if (RtlUnicodeStringToAnsiString(&ansi, attr->name, TRUE) == -+ STATUS_SUCCESS) { -+ TRACE1("key: %s", ansi.buf); -+ RtlFreeAnsiString(&ansi); -+ } -+ *handle = NULL; -+ return STATUS_SUCCESS; -+} -+ -+wstdcall NTSTATUS WIN_FUNC(ZwOpenKey,3) -+ (void **handle, ACCESS_MASK desired_access, -+ struct object_attributes *attr) -+{ -+ struct ansi_string ansi; -+ if (RtlUnicodeStringToAnsiString(&ansi, attr->name, TRUE) == -+ STATUS_SUCCESS) { -+ TRACE1("key: %s", ansi.buf); -+ RtlFreeAnsiString(&ansi); -+ } -+ *handle = NULL; -+ return STATUS_SUCCESS; -+} -+ -+wstdcall NTSTATUS WIN_FUNC(ZwSetValueKey,6) -+ (void *handle, struct unicode_string *name, ULONG title_index, -+ ULONG type, void *data, ULONG data_size) -+{ -+ struct ansi_string ansi; -+ if (RtlUnicodeStringToAnsiString(&ansi, name, TRUE) == -+ STATUS_SUCCESS) { -+ TRACE1("key: %s", ansi.buf); -+ RtlFreeAnsiString(&ansi); -+ } -+ return STATUS_SUCCESS; -+} -+ -+wstdcall NTSTATUS WIN_FUNC(ZwQueryValueKey,6) -+ (void *handle, struct unicode_string *name, -+ enum key_value_information_class class, void *info, -+ ULONG length, ULONG *res_length) -+{ -+ struct ansi_string ansi; -+ if (RtlUnicodeStringToAnsiString(&ansi, name, TRUE) == STATUS_SUCCESS) { -+ TRACE1("key: %s", ansi.buf); -+ RtlFreeAnsiString(&ansi); -+ } -+ TODO(); -+ return STATUS_INVALID_PARAMETER; -+} -+ -+wstdcall NTSTATUS WIN_FUNC(ZwDeleteKey,1) -+ (void *handle) -+{ -+ ENTER2("%p", handle); -+ return STATUS_SUCCESS; -+} -+ -+wstdcall NTSTATUS WIN_FUNC(ZwPowerInformation,5) -+ (INT info_level, void *in_buf, ULONG in_buf_len, void *out_buf, -+ ULONG out_buf_len) -+{ -+ INFO("%d, %u, %u", info_level, in_buf_len, out_buf_len); -+ TODO(); -+ return STATUS_ACCESS_DENIED; -+} -+ -+wstdcall NTSTATUS WIN_FUNC(WmiSystemControl,4) -+ (struct wmilib_context *info, struct device_object *dev_obj, -+ struct irp *irp, void *irp_disposition) -+{ -+ TODO(); -+ return STATUS_SUCCESS; -+} -+ -+wstdcall NTSTATUS WIN_FUNC(WmiCompleteRequest,5) -+ (struct device_object *dev_obj, struct irp *irp, NTSTATUS status, -+ ULONG buffer_used, CCHAR priority_boost) -+{ -+ TODO(); -+ return STATUS_SUCCESS; -+} -+ -+noregparm NTSTATUS WIN_FUNC(WmiTraceMessage,12) -+ (void *tracehandle, ULONG message_flags, -+ void *message_guid, USHORT message_no, ...) -+{ -+ TODO(); -+ EXIT2(return STATUS_SUCCESS); -+} -+ -+wstdcall NTSTATUS WIN_FUNC(WmiQueryTraceInformation,4) -+ (enum trace_information_class trace_info_class, void *trace_info, -+ ULONG *req_length, void *buf) -+{ -+ TODO(); -+ EXIT2(return STATUS_SUCCESS); -+} -+ -+/* this function can't be wstdcall as it takes variable number of args */ -+__attribute__((format(printf, 1, 2))) -+noregparm ULONG WIN_FUNC(DbgPrint,12) -+ (char *format, ...) -+{ -+#if DEBUG >= 1 -+ va_list args; -+ static char buf[100]; -+ -+ va_start(args, format); -+ vsnprintf(buf, sizeof(buf), format, args); -+ printk(KERN_DEBUG "%s (%s): %s", DRIVER_NAME, __func__, buf); -+ va_end(args); -+#endif -+ return STATUS_SUCCESS; -+} -+ -+__attribute__((format(printf, 3, 4))) -+noregparm ULONG WIN_FUNC(DbgPrintEx,12) -+ (ULONG component_id, ULONG severity, char *format, ...) -+{ -+#if DEBUG >= 1 -+ va_list args; -+ static char buf[100]; -+ -+ va_start(args, format); -+ vsnprintf(buf, sizeof(buf), format, args); -+ TRACE1("component_id: %d, severity: %d\n", component_id, severity); -+ printk(KERN_DEBUG "%s (%s): %s", DRIVER_NAME, __func__, buf); -+ va_end(args); -+#endif -+ return STATUS_SUCCESS; -+} -+ -+wstdcall void WIN_FUNC(KeBugCheck,1) -+ (ULONG code) -+{ -+ ERROR("Unrecoverable error reported by the driver"); -+ ERROR("code: 0x%x\n", code); -+ dump_stack(); -+ return; -+} -+ -+wstdcall void WIN_FUNC(KeBugCheckEx,5) -+ (ULONG code, ULONG_PTR param1, ULONG_PTR param2, -+ ULONG_PTR param3, ULONG_PTR param4) -+{ -+ ERROR("Unrecoverable error reported by the driver"); -+ ERROR("code: 0x%x, params: 0x%lx 0x%lx 0x%lx 0x%lx\n", code, param1, -+ param2, param3, param4); -+ dump_stack(); -+ return; -+} -+ -+wstdcall void WIN_FUNC(ExSystemTimeToLocalTime,2) -+ (LARGE_INTEGER *system_time, LARGE_INTEGER *local_time) -+{ -+ *local_time = *system_time; -+} -+ -+wstdcall ULONG WIN_FUNC(ExSetTimerResolution,2) -+ (ULONG time, BOOLEAN set) -+{ -+ /* why a driver should change system wide timer resolution is -+ * beyond me */ -+ return time; -+} -+ -+wstdcall void WIN_FUNC(DbgBreakPoint,0) -+ (void) -+{ -+ TODO(); -+} -+ -+wstdcall void WIN_FUNC(_except_handler3,0) -+ (void) -+{ -+ TODO(); -+} -+ -+wstdcall void WIN_FUNC(__C_specific_handler,0) -+ (void) -+{ -+ TODO(); -+} -+ -+wstdcall void WIN_FUNC(_purecall,0) -+ (void) -+{ -+ TODO(); -+} -+ -+struct worker_init_struct { -+ struct work_struct work; -+ struct completion completion; -+ struct nt_thread *nt_thread; -+}; -+ -+int ntoskernel_init(void) -+{ -+ spin_lock_init(&dispatcher_lock); -+ spin_lock_init(&ntoskernel_lock); -+ spin_lock_init(&ntos_work_lock); -+ spin_lock_init(&kdpc_list_lock); -+ spin_lock_init(&irp_cancel_lock); -+ InitializeListHead(&wrap_mdl_list); -+ InitializeListHead(&kdpc_list); -+ InitializeListHead(&callback_objects); -+ InitializeListHead(&bus_driver_list); -+ InitializeListHead(&object_list); -+ InitializeListHead(&ntos_work_list); -+ -+ nt_spin_lock_init(&nt_list_lock); -+ -+ INIT_WORK(&kdpc_work, kdpc_worker); -+ INIT_WORK(&ntos_work, ntos_work_worker); -+ wrap_timer_slist.next = NULL; -+ -+ wrap_ticks_to_boot = TICKS_1601_TO_1970; -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,0,0) -+ do { -+ u64 now; -+ now = ktime_get_real_ns(); -+ wrap_ticks_to_boot += now * 10; -+ } while (0); -+#else -+ do { -+ struct timeval now; -+ -+ do_gettimeofday(&now); -+ wrap_ticks_to_boot += (u64)now.tv_sec * TICKSPERSEC; -+ wrap_ticks_to_boot += now.tv_usec * 10; -+ } while (0); -+#endif -+ TRACE2("%llu", wrap_ticks_to_boot); -+ wrap_ticks_to_boot -= jiffies * TICKSPERJIFFY; -+ TRACE2("%llu", wrap_ticks_to_boot); -+ -+ cpu_count = num_online_cpus(); -+ -+#ifdef WRAP_PREEMPT -+ do { -+ int cpu; -+ for_each_possible_cpu(cpu) { -+ struct irql_info *info; -+ info = &per_cpu(irql_info, cpu); -+ mutex_init(&(info->lock)); -+ info->task = NULL; -+ info->count = 0; -+#ifdef CONFIG_SMP -+ cpumask_setall(tsk_cpus_allowed(info)); -+#endif -+ } -+ } while (0); -+#endif -+ -+ ntos_wq = create_singlethread_workqueue("ntos_wq"); -+ if (!ntos_wq) { -+ WARNING("couldn't create ntos_wq thread"); -+ return -ENOMEM; -+ } -+ TRACE1("ntos_wq: %p", ntos_wq); -+ -+ if (add_bus_driver("PCI") -+#ifdef ENABLE_USB -+ || add_bus_driver("USB") -+#endif -+ ) { -+ ntoskernel_exit(); -+ return -ENOMEM; -+ } -+ mdl_cache = -+ wrap_kmem_cache_create(DRIVER_NAME "_mdl", -+ sizeof(struct wrap_mdl) + MDL_CACHE_SIZE, -+ 0, 0); -+ TRACE2("%p", mdl_cache); -+ if (!mdl_cache) { -+ ERROR("couldn't allocate MDL cache"); -+ ntoskernel_exit(); -+ return -ENOMEM; -+ } -+ -+#if defined(CONFIG_X86_64) -+ memset(&kuser_shared_data, 0, sizeof(kuser_shared_data)); -+ *((ULONG64 *)&kuser_shared_data.system_time) = ticks_1601(); -+#if LINUX_VERSION_CODE < KERNEL_VERSION(4,15,0) -+ init_timer(&shared_data_timer); -+ shared_data_timer.function = update_user_shared_data_proc; -+ shared_data_timer.data = 0; -+#else -+ timer_setup(&shared_data_timer, update_user_shared_data_proc, 0); -+#endif -+#endif -+ return 0; -+} -+ -+int ntoskernel_init_device(struct wrap_device *wd) -+{ -+#if defined(CONFIG_X86_64) -+ if (kuser_shared_data.reserved1) -+ mod_timer(&shared_data_timer, jiffies + MSEC_TO_HZ(30)); -+#endif -+ return 0; -+} -+ -+void ntoskernel_exit_device(struct wrap_device *wd) -+{ -+ ENTER2(""); -+ -+ KeFlushQueuedDpcs(); -+ EXIT2(return); -+} -+ -+void ntoskernel_exit(void) -+{ -+ struct nt_list *cur; -+ -+ ENTER2(""); -+ -+ /* free kernel (Ke) timers */ -+ TRACE2("freeing timers"); -+ while (1) { -+ struct wrap_timer *wrap_timer; -+ struct nt_slist *slist; -+ -+ spin_lock_bh(&ntoskernel_lock); -+ if ((slist = wrap_timer_slist.next)) -+ wrap_timer_slist.next = slist->next; -+ spin_unlock_bh(&ntoskernel_lock); -+ TIMERTRACE("%p", slist); -+ if (!slist) -+ break; -+ wrap_timer = container_of(slist, struct wrap_timer, slist); -+ if (del_timer_sync(&wrap_timer->timer)) -+ WARNING("Buggy Windows driver left timer %p running", -+ wrap_timer->nt_timer); -+ memset(wrap_timer, 0, sizeof(*wrap_timer)); -+ slack_kfree(wrap_timer); -+ } -+ -+ TRACE2("freeing MDLs"); -+ if (mdl_cache) { -+ spin_lock_bh(&ntoskernel_lock); -+ if (!IsListEmpty(&wrap_mdl_list)) -+ ERROR("Windows driver didn't free all MDLs; " -+ "freeing them now"); -+ while ((cur = RemoveHeadList(&wrap_mdl_list))) { -+ struct wrap_mdl *wrap_mdl; -+ wrap_mdl = container_of(cur, struct wrap_mdl, list); -+ if (wrap_mdl->mdl->flags & MDL_CACHE_ALLOCATED) -+ kmem_cache_free(mdl_cache, wrap_mdl); -+ else -+ kfree(wrap_mdl); -+ } -+ spin_unlock_bh(&ntoskernel_lock); -+ kmem_cache_destroy(mdl_cache); -+ mdl_cache = NULL; -+ } -+ -+ TRACE2("freeing callbacks"); -+ spin_lock_bh(&ntoskernel_lock); -+ while ((cur = RemoveHeadList(&callback_objects))) { -+ struct callback_object *object; -+ struct nt_list *ent; -+ object = container_of(cur, struct callback_object, list); -+ while ((ent = RemoveHeadList(&object->callback_funcs))) { -+ struct callback_func *f; -+ f = container_of(ent, struct callback_func, list); -+ kfree(f); -+ } -+ kfree(object); -+ } -+ spin_unlock_bh(&ntoskernel_lock); -+ -+ spin_lock_bh(&ntoskernel_lock); -+ while ((cur = RemoveHeadList(&bus_driver_list))) { -+ struct bus_driver *bus_driver; -+ bus_driver = container_of(cur, struct bus_driver, list); -+ /* TODO: make sure all all drivers are shutdown/removed */ -+ kfree(bus_driver); -+ } -+ spin_unlock_bh(&ntoskernel_lock); -+ -+#if defined(CONFIG_X86_64) -+ del_timer_sync(&shared_data_timer); -+#endif -+ if (ntos_wq) -+ destroy_workqueue(ntos_wq); -+ ENTER2("freeing objects"); -+ spin_lock_bh(&ntoskernel_lock); -+ while ((cur = RemoveHeadList(&object_list))) { -+ struct common_object_header *hdr; -+ hdr = container_of(cur, struct common_object_header, list); -+ if (hdr->type == OBJECT_TYPE_NT_THREAD) -+ TRACE1("object %p(%d) was not freed, freeing it now", -+ HEADER_TO_OBJECT(hdr), hdr->type); -+ else -+ WARNING("object %p(%d) was not freed, freeing it now", -+ HEADER_TO_OBJECT(hdr), hdr->type); -+ ExFreePool(hdr); -+ } -+ spin_unlock_bh(&ntoskernel_lock); -+ -+ EXIT2(return); -+} -diff -Nurp linux-5.6.11/3rdparty/ndiswrapper/ntoskernel.h linux-5.6.11-ndis/3rdparty/ndiswrapper/ntoskernel.h ---- linux-5.6.11/3rdparty/ndiswrapper/ntoskernel.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.6.11-ndis/3rdparty/ndiswrapper/ntoskernel.h 2020-05-03 15:18:33.000000000 +0300 -@@ -0,0 +1,1117 @@ -+/* -+ * Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ */ -+ -+#ifndef _NTOSKERNEL_H_ -+#define _NTOSKERNEL_H_ -+ -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#if LINUX_VERSION_CODE > KERNEL_VERSION(4,11,0) -+#include -+#endif -+ -+#if !defined(CONFIG_X86) && !defined(CONFIG_X86_64) -+#error "this module is for x86 or x86_64 architectures only" -+#endif -+ -+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,14) -+#define gfp_t unsigned int __nocast -+ -+static inline void *_kzalloc(size_t size, gfp_t flags) -+{ -+ void *p = kmalloc(size, flags); -+ if (likely(p != NULL)) -+ memset(p, 0, size); -+ return p; -+} -+ -+#define kzalloc(size, flags) _kzalloc(size, flags) -+#endif -+ -+/* Interrupt backwards compatibility stuff */ -+#include -+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29) -+#ifndef IRQ_HANDLED -+#define IRQ_HANDLED -+#define IRQ_NONE -+#define irqreturn_t void -+#endif -+#endif /* Linux < 2.6.29 */ -+ -+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,16) -+#ifndef mutex_init -+#define mutex semaphore -+#define mutex_init(m) sema_init(m, 1) -+#define mutex_lock(m) down(m) -+#define mutex_trylock(m) (!down_trylock(m)) -+#define mutex_unlock(m) up(m) -+#define mutex_is_locked(m) (atomic_read(m.count) == 0) -+#endif -+#endif /* Linux < 2.6.16 */ -+ -+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26) -+#define set_cpus_allowed_ptr(task, mask) set_cpus_allowed(task, *mask) -+#endif /* Linux < 2.6.26 */ -+ -+#ifdef CONFIG_SMP -+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,28) -+#define cpumask_copy(dst, src) do { *dst = *src; } while (0) -+#define cpumask_equal(mask1, mask2) cpus_equal(*mask1, *mask2) -+#define cpumask_setall(mask) cpus_setall(*mask) -+static cpumask_t cpumasks[NR_CPUS]; -+#define cpumask_of(cpu) \ -+({ \ -+ cpumasks[cpu] = cpumask_of_cpu(cpu); \ -+ &cpumasks[cpu]; \ -+}) -+#endif /* Linux < 2.6.28 */ -+#endif /* CONFIG_SMP */ -+ -+#ifndef tsk_cpus_allowed -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,3,0) -+#define tsk_cpus_allowed(tsk) (&(tsk)->cpus_mask) -+#else -+#define tsk_cpus_allowed(tsk) (&(tsk)->cpus_allowed) -+#endif -+#endif -+ -+#ifndef __packed -+#define __packed __attribute__((packed)) -+#endif -+ -+/* pci functions in 2.6 kernels have problems allocating dma buffers, -+ * but seem to work fine with dma functions -+ */ -+#include -+ -+#ifndef ___GFP_RETRY_MAYFAIL -+#define ___GFP_RETRY_MAYFAIL __GFP_REPEAT -+#endif -+ -+#define PCI_DMA_ALLOC_COHERENT(pci_dev,size,dma_handle) \ -+ dma_alloc_coherent(&pci_dev->dev,size,dma_handle, \ -+ GFP_KERNEL | ___GFP_RETRY_MAYFAIL) -+#define PCI_DMA_FREE_COHERENT(pci_dev,size,cpu_addr,dma_handle) \ -+ dma_free_coherent(&pci_dev->dev,size,cpu_addr,dma_handle) -+#define PCI_DMA_MAP_SINGLE(pci_dev,addr,size,direction) \ -+ dma_map_single(&pci_dev->dev,addr,size,direction) -+#define PCI_DMA_UNMAP_SINGLE(pci_dev,dma_handle,size,direction) \ -+ dma_unmap_single(&pci_dev->dev,dma_handle,size,direction) -+#define MAP_SG(pci_dev, sglist, nents, direction) \ -+ dma_map_sg(&pci_dev->dev, sglist, nents, direction) -+#define UNMAP_SG(pci_dev, sglist, nents, direction) \ -+ dma_unmap_sg(&pci_dev->dev, sglist, nents, direction) -+#define PCI_DMA_MAP_ERROR(dma_addr) dma_mapping_error(dma_addr) -+ -+ -+#if defined(CONFIG_NET_RADIO) && !defined(CONFIG_WIRELESS_EXT) -+#define CONFIG_WIRELESS_EXT -+#endif -+ -+#define prepare_wait_condition(task, var, value) \ -+do { \ -+ var = value; \ -+ task = current; \ -+ barrier(); \ -+} while (0) -+ -+/* Wait in wait_state (e.g., TASK_INTERRUPTIBLE) for condition to -+ * become true; timeout is either jiffies (> 0) to wait or 0 to wait -+ * forever. -+ * When timeout == 0, return value is -+ * > 0 if condition becomes true, or -+ * < 0 if signal is pending on the thread. -+ * When timeout > 0, return value is -+ * > 0 if condition becomes true before timeout, -+ * < 0 if signal is pending on the thread before timeout, or -+ * 0 if timedout (condition may have become true at the same time) -+ */ -+ -+#define wait_condition(condition, timeout, wait_state) \ -+({ \ -+ long ret = timeout ? timeout : 1; \ -+ while (1) { \ -+ if (signal_pending(current)) { \ -+ ret = -ERESTARTSYS; \ -+ break; \ -+ } \ -+ set_current_state(wait_state); \ -+ if (condition) { \ -+ __set_current_state(TASK_RUNNING); \ -+ break; \ -+ } \ -+ if (timeout) { \ -+ ret = schedule_timeout(ret); \ -+ if (!ret) \ -+ break; \ -+ } else \ -+ schedule(); \ -+ } \ -+ ret; \ -+}) -+ -+#ifdef WRAP_WQ -+ -+struct wrap_workqueue_struct; -+ -+struct wrap_work_struct { -+ struct list_head list; -+ void (*func)(struct wrap_work_struct *data); -+ void *data; -+ /* whether/on which thread scheduled */ -+ struct workqueue_thread *thread; -+}; -+ -+#define work_struct wrap_work_struct -+#define workqueue_struct wrap_workqueue_struct -+ -+#undef INIT_WORK -+#define INIT_WORK(work, pfunc) \ -+ do { \ -+ (work)->func = (pfunc); \ -+ (work)->data = (work); \ -+ (work)->thread = NULL; \ -+ } while (0) -+ -+#undef create_singlethread_workqueue -+#define create_singlethread_workqueue(wq) wrap_create_wq(wq, 1, 0) -+#undef create_workqueue -+#define create_workqueue(wq) wrap_create_wq(wq, 0, 0) -+#undef destroy_workqueue -+#define destroy_workqueue(wq) wrap_destroy_wq(wq) -+#undef queue_work -+#define queue_work(wq, work) wrap_queue_work(wq, work) -+#undef flush_workqueue -+#define flush_workqueue(wq) wrap_flush_wq(wq) -+ -+struct workqueue_struct *wrap_create_wq(const char *name, u8 singlethread, -+ u8 freeze); -+void wrap_destroy_wq(struct workqueue_struct *workq); -+int wrap_queue_work(struct workqueue_struct *workq, struct work_struct *work); -+void wrap_cancel_work(struct work_struct *work); -+void wrap_flush_wq(struct workqueue_struct *workq); -+ -+#else // WRAP_WQ -+ -+/* Compatibility for Linux before 2.6.20 where INIT_WORK takes 3 arguments */ -+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20) && \ -+ !defined(INIT_WORK_NAR) && \ -+ !defined(INIT_DELAYED_WORK_DEFERRABLE) -+typedef void (*compat_work_func_t)(void *work); -+typedef void (*work_func_t)(struct work_struct *work); -+static inline void (INIT_WORK)(struct work_struct *work, work_func_t func) -+{ -+ INIT_WORK(work, (compat_work_func_t)func, work); -+} -+#undef INIT_WORK -+#endif -+ -+#endif // WRAP_WQ -+ -+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,18) -+#define ISR_PT_REGS_PARAM_DECL -+#else -+#define ISR_PT_REGS_PARAM_DECL , struct pt_regs *regs -+#endif -+ -+#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,16) -+#define for_each_possible_cpu(_cpu) for_each_cpu(_cpu) -+#endif -+ -+#ifndef CHECKSUM_PARTIAL -+#define CHECKSUM_PARTIAL CHECKSUM_HW -+#endif -+ -+#ifndef IRQF_SHARED -+#define IRQF_SHARED SA_SHIRQ -+#endif -+ -+#ifndef UMH_WAIT_PROC -+#define UMH_WAIT_PROC 1 -+#endif -+ -+#define memcpy_skb(skb, from, length) \ -+ memcpy(skb_put(skb, length), from, length) -+ -+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24) -+#ifndef DMA_BIT_MASK -+#define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1)) -+#endif -+#endif -+ -+#ifndef __GFP_DMA32 -+#define __GFP_DMA32 GFP_DMA -+#endif -+ -+#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,22) -+#define wrap_kmem_cache_create(name, size, align, flags) \ -+ kmem_cache_create(name, size, align, flags, NULL, NULL) -+#else -+#define wrap_kmem_cache_create(name, size, align, flags) \ -+ kmem_cache_create(name, size, align, flags, NULL) -+#endif -+ -+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34) -+#define netdev_mc_count(dev) ((dev)->mc_count) -+#define usb_alloc_coherent(dev, size, mem_flags, dma) (usb_buffer_alloc((dev), (size), (mem_flags), (dma))) -+#define usb_free_coherent(dev, size, addr, dma) (usb_buffer_free((dev), (size), (addr), (dma))) -+#endif -+ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,8,0) -+#define daemonize(name, ...) do {} while (0) -+#endif -+ -+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,9,0) -+#define add_taint(flag, lockdep_ok) add_taint(flag) -+#endif -+ -+#include "winnt_types.h" -+#include "ndiswrapper.h" -+#include "pe_linker.h" -+#include "wrapmem.h" -+#include "lin2win.h" -+#include "loader.h" -+ -+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18) -+static inline void netif_tx_lock(struct net_device *dev) -+{ -+ spin_lock(&dev->xmit_lock); -+} -+static inline void netif_tx_unlock(struct net_device *dev) -+{ -+ spin_unlock(&dev->xmit_lock); -+} -+static inline void netif_tx_lock_bh(struct net_device *dev) -+{ -+ spin_lock_bh(&dev->xmit_lock); -+} -+static inline void netif_tx_unlock_bh(struct net_device *dev) -+{ -+ spin_unlock_bh(&dev->xmit_lock); -+} -+#endif -+ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24) -+static inline void netif_poll_enable(struct net_device *dev) -+{ -+} -+static inline void netif_poll_disable(struct net_device *dev) -+{ -+} -+#endif -+ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24) -+#define proc_net_root init_net.proc_net -+#else -+#define proc_net_root proc_net -+#endif -+ -+#if ((LINUX_VERSION_CODE < KERNEL_VERSION(3,2,0)) && \ -+ (LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0))) || \ -+ (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,42)) -+#ifndef skb_frag_page -+#define skb_frag_page(frag) ((frag)->page) -+#endif -+#endif -+ -+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,11,0) -+#define netdev_notifier_info_to_dev(x) ((struct net_device *)(x)) -+#endif -+ -+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,13,0) -+static inline void reinit_completion(struct completion *x) -+{ -+ INIT_COMPLETION(*x); -+} -+#endif -+ -+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,8,0) -+#define prandom_seed(seed) net_srandom(seed) -+#endif -+ -+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22) -+static int strncasecmp(const char *s1, const char *s2, size_t n) -+{ -+ strnicmp(s1, s2, n); -+} -+#endif -+ -+#if LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0) -+static inline void netif_trans_update(struct net_device *dev) -+{ -+ dev->trans_start = jiffies; -+} -+#endif -+ -+/* TICK is 100ns */ -+#define TICKSPERSEC 10000000 -+#define TICKSPERMSEC 10000 -+#define SECSPERDAY 86400 -+#define TICKSPERJIFFY ((TICKSPERSEC + HZ - 1) / HZ) -+ -+#define int_div_round(x, y) (((x) + (y - 1)) / (y)) -+ -+/* 1601 to 1970 is 369 years plus 89 leap days */ -+#define SECS_1601_TO_1970 ((369 * 365 + 89) * (u64)SECSPERDAY) -+#define TICKS_1601_TO_1970 (SECS_1601_TO_1970 * TICKSPERSEC) -+ -+/* 100ns units to HZ; if sys_time is negative, relative to current -+ * clock, otherwise from year 1601 */ -+#define SYSTEM_TIME_TO_HZ(sys_time) \ -+ (((sys_time) <= 0) ? \ -+ int_div_round(((u64)HZ * (-(sys_time))), TICKSPERSEC) : \ -+ int_div_round(((s64)HZ * ((sys_time) - ticks_1601())), TICKSPERSEC)) -+ -+#define MSEC_TO_HZ(ms) int_div_round((ms * HZ), 1000) -+#define USEC_TO_HZ(us) int_div_round((us * HZ), 1000000) -+ -+extern u64 wrap_ticks_to_boot; -+ -+static inline u64 ticks_1601(void) -+{ -+ return wrap_ticks_to_boot + (u64)jiffies * TICKSPERJIFFY; -+} -+ -+typedef void (*generic_func)(void); -+ -+struct wrap_export { -+ const char *name; -+ generic_func func; -+}; -+ -+#ifdef CONFIG_X86_64 -+ -+#define WIN_SYMBOL(name, argc) \ -+ {#name, (generic_func) win2lin_ ## name ## _ ## argc} -+#define WIN_WIN_SYMBOL(name, argc) \ -+ {#name, (generic_func) win2lin__win_ ## name ## _ ## argc} -+#define WIN_FUNC_DECL(name, argc) \ -+ extern typeof(name) win2lin_ ## name ## _ ## argc; -+#define WIN_FUNC_PTR(name, argc) win2lin_ ## name ## _ ## argc -+ -+#else -+ -+#define WIN_SYMBOL(name, argc) {#name, (generic_func)name} -+#define WIN_WIN_SYMBOL(name, argc) {#name, (generic_func)_win_ ## name} -+#define WIN_FUNC_DECL(name, argc) -+#define WIN_FUNC_PTR(name, argc) name -+ -+#endif -+ -+#define WIN_FUNC(name, argc) (name) -+/* map name s to f - if f is different from s */ -+#define WIN_SYMBOL_MAP(s, f) -+ -+#define POOL_TAG(A, B, C, D) \ -+ ((ULONG)((A) + ((B) << 8) + ((C) << 16) + ((D) << 24))) -+ -+struct pe_image { -+ char name[MAX_DRIVER_NAME_LEN]; -+ UINT (*entry)(struct driver_object *, struct unicode_string *) wstdcall; -+ void *image; -+ int size; -+ int type; -+ -+ IMAGE_NT_HEADERS *nt_hdr; -+ IMAGE_OPTIONAL_HEADER *opt_hdr; -+}; -+ -+struct ndis_mp_block; -+ -+struct wrap_timer { -+ struct nt_slist slist; -+ struct timer_list timer; -+ struct nt_timer *nt_timer; -+ long repeat; -+#ifdef TIMER_DEBUG -+ unsigned long wrap_timer_magic; -+#endif -+}; -+ -+struct ntos_work_item { -+ struct nt_list list; -+ void *arg1; -+ void *arg2; -+ NTOS_WORK_FUNC func; -+}; -+ -+struct wrap_device_setting { -+ struct nt_list list; -+ char name[MAX_SETTING_NAME_LEN]; -+ char value[MAX_SETTING_VALUE_LEN]; -+ void *encoded; -+}; -+ -+struct wrap_bin_file { -+ char name[MAX_DRIVER_NAME_LEN]; -+ size_t size; -+ void *data; -+}; -+ -+#define WRAP_DRIVER_CLIENT_ID 1 -+ -+struct wrap_driver { -+ struct nt_list list; -+ struct driver_object *drv_obj; -+ char name[MAX_DRIVER_NAME_LEN]; -+ char version[MAX_SETTING_VALUE_LEN]; -+ unsigned short num_pe_images; -+ struct pe_image pe_images[MAX_DRIVER_PE_IMAGES]; -+ unsigned short num_bin_files; -+ struct wrap_bin_file *bin_files; -+ struct nt_list settings; -+ int dev_type; -+ struct ndis_driver *ndis_driver; -+}; -+ -+enum hw_status { -+ HW_INITIALIZED = 1, HW_SUSPENDED, HW_HALTED, HW_DISABLED, -+}; -+ -+struct wrap_device { -+ /* first part is (de)initialized once by loader */ -+ struct nt_list list; -+ int dev_bus; -+ int vendor; -+ int device; -+ int subvendor; -+ int subdevice; -+ char conf_file_name[MAX_DRIVER_NAME_LEN]; -+ char driver_name[MAX_DRIVER_NAME_LEN]; -+ struct wrap_driver *driver; -+ struct nt_list settings; -+ -+ /* rest should be (de)initialized when a device is -+ * (un)plugged */ -+ struct cm_resource_list *resource_list; -+ unsigned long hw_status; -+ struct device_object *pdo; -+ union { -+ struct { -+ struct pci_dev *pdev; -+ enum device_power_state wake_state; -+ } pci; -+ struct { -+ struct usb_device *udev; -+ struct usb_interface *intf; -+ int num_alloc_urbs; -+ struct nt_list wrap_urb_list; -+ } usb; -+ }; -+}; -+ -+#define wrap_is_pci_bus(dev_bus) \ -+ (WRAP_BUS(dev_bus) == WRAP_PCI_BUS || \ -+ WRAP_BUS(dev_bus) == WRAP_PCMCIA_BUS) -+#ifdef ENABLE_USB -+/* earlier versions of ndiswrapper used 0 as USB_BUS */ -+#define wrap_is_usb_bus(dev_bus) \ -+ (WRAP_BUS(dev_bus) == WRAP_USB_BUS || \ -+ WRAP_BUS(dev_bus) == WRAP_INTERNAL_BUS) -+#else -+#define wrap_is_usb_bus(dev_bus) 0 -+#endif -+#define wrap_is_bluetooth_device(dev_bus) \ -+ (WRAP_DEVICE(dev_bus) == WRAP_BLUETOOTH_DEVICE1 || \ -+ WRAP_DEVICE(dev_bus) == WRAP_BLUETOOTH_DEVICE2) -+ -+extern struct workqueue_struct *ntos_wq; -+extern struct workqueue_struct *ndis_wq; -+extern struct workqueue_struct *wrapndis_wq; -+ -+#define atomic_unary_op(var, size, oper) \ -+do { \ -+ if (size == 1) \ -+ __asm__ __volatile__( \ -+ LOCK_PREFIX oper "b %b0\n\t" : "+m" (var)); \ -+ else if (size == 2) \ -+ __asm__ __volatile__( \ -+ LOCK_PREFIX oper "w %w0\n\t" : "+m" (var)); \ -+ else if (size == 4) \ -+ __asm__ __volatile__( \ -+ LOCK_PREFIX oper "l %0\n\t" : "+m" (var)); \ -+ else if (size == 8) \ -+ __asm__ __volatile__( \ -+ LOCK_PREFIX oper "q %q0\n\t" : "+m" (var)); \ -+ else { \ -+ extern void _invalid_op_size_(void); \ -+ _invalid_op_size_(); \ -+ } \ -+} while (0) -+ -+#define atomic_inc_var_size(var, size) atomic_unary_op(var, size, "inc") -+ -+#define atomic_inc_var(var) atomic_inc_var_size(var, sizeof(var)) -+ -+#define atomic_dec_var_size(var, size) atomic_unary_op(var, size, "dec") -+ -+#define atomic_dec_var(var) atomic_dec_var_size(var, sizeof(var)) -+ -+#define pre_atomic_add(var, i) \ -+({ \ -+ typeof(var) pre; \ -+ __asm__ __volatile__( \ -+ LOCK_PREFIX "xadd %0, %1\n\t" \ -+ : "=r"(pre), "+m"(var) \ -+ : "0"(i)); \ -+ pre; \ -+}) -+ -+#define post_atomic_add(var, i) (pre_atomic_add(var, i) + i) -+ -+//#define DEBUG_IRQL 1 -+ -+#ifdef DEBUG_IRQL -+#define assert_irql(cond) \ -+do { \ -+ KIRQL _irql_ = current_irql(); \ -+ if (!(cond)) { \ -+ WARNING("assertion '%s' failed: %d", #cond, _irql_); \ -+ DBG_BLOCK(4) { \ -+ dump_stack(); \ -+ } \ -+ } \ -+} while (0) -+#else -+#define assert_irql(cond) do { } while (0) -+#endif -+ -+/* When preempt is enabled, we should preempt_disable to raise IRQL to -+ * DISPATCH_LEVEL, to be consistent with the semantics. However, using -+ * a mutex instead, so that only ndiswrapper threads run one at a time -+ * on a processor when at DISPATCH_LEVEL seems to be enough. So that -+ * is what we will use until we learn otherwise. If -+ * preempt_(en|dis)able is required for some reason, comment out -+ * following #define. */ -+ -+#define WRAP_PREEMPT 1 -+ -+#if !defined(CONFIG_PREEMPT) || defined(CONFIG_PREEMPT_RT) -+#ifndef WRAP_PREEMPT -+#define WRAP_PREEMPT 1 -+#endif -+#endif -+ -+//#undef WRAP_PREEMPT -+ -+#ifdef WRAP_PREEMPT -+ -+struct irql_info { -+ int count; -+ struct mutex lock; -+#ifdef CONFIG_SMP -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,3,0) -+ cpumask_t cpus_mask; -+#else -+ cpumask_t cpus_allowed; -+#endif -+#endif -+ struct task_struct *task; -+}; -+ -+DECLARE_PER_CPU(struct irql_info, irql_info); -+ -+static inline KIRQL raise_irql(KIRQL newirql) -+{ -+ struct irql_info *info; -+ -+ assert(newirql == DISPATCH_LEVEL); -+ info = &get_cpu_var(irql_info); -+ if (info->task == current) { -+ assert(info->count > 0); -+ assert(mutex_is_locked(&info->lock)); -+#if defined(CONFIG_SMP) && DEBUG >= 1 -+ assert(cpumask_equal(tsk_cpus_allowed(current), -+ cpumask_of(smp_processor_id()))); -+#endif -+ info->count++; -+ put_cpu_var(irql_info); -+ return DISPATCH_LEVEL; -+ } -+ /* TODO: is this enough to pin down to current cpu? */ -+#ifdef CONFIG_SMP -+ assert(task_cpu(current) == smp_processor_id()); -+ cpumask_copy(tsk_cpus_allowed(info), tsk_cpus_allowed(current)); -+ set_cpus_allowed_ptr(current, cpumask_of(smp_processor_id())); -+#endif -+ put_cpu_var(irql_info); -+ mutex_lock(&info->lock); -+ assert(info->count == 0); -+ assert(info->task == NULL); -+ info->count = 1; -+ info->task = current; -+ return PASSIVE_LEVEL; -+} -+ -+static inline void lower_irql(KIRQL oldirql) -+{ -+ struct irql_info *info; -+ -+ assert(oldirql <= DISPATCH_LEVEL); -+ info = &get_cpu_var(irql_info); -+ assert(info->task == current); -+ assert(mutex_is_locked(&info->lock)); -+ assert(info->count > 0); -+ if (--info->count == 0) { -+ info->task = NULL; -+#ifdef CONFIG_SMP -+ set_cpus_allowed_ptr(current, tsk_cpus_allowed(info)); -+#endif -+ mutex_unlock(&info->lock); -+ } -+ put_cpu_var(irql_info); -+} -+ -+static inline KIRQL current_irql(void) -+{ -+ int count; -+ if (in_irq() || irqs_disabled()) -+ EXIT4(return DIRQL); -+ if (in_atomic() || in_interrupt()) -+ EXIT4(return SOFT_IRQL); -+ count = get_cpu_var(irql_info).count; -+ put_cpu_var(irql_info); -+ if (count) -+ EXIT6(return DISPATCH_LEVEL); -+ else -+ EXIT6(return PASSIVE_LEVEL); -+} -+ -+#else -+ -+static inline KIRQL current_irql(void) -+{ -+ if (in_irq() || irqs_disabled()) -+ EXIT4(return DIRQL); -+ if (in_interrupt()) -+ EXIT4(return SOFT_IRQL); -+ if (in_atomic()) -+ EXIT6(return DISPATCH_LEVEL); -+ else -+ EXIT6(return PASSIVE_LEVEL); -+} -+ -+static inline KIRQL raise_irql(KIRQL newirql) -+{ -+ KIRQL ret = in_atomic() ? DISPATCH_LEVEL : PASSIVE_LEVEL; -+ assert(newirql == DISPATCH_LEVEL); -+ assert(current_irql() <= DISPATCH_LEVEL); -+ preempt_disable(); -+ return ret; -+} -+ -+static inline void lower_irql(KIRQL oldirql) -+{ -+ assert(current_irql() == DISPATCH_LEVEL); -+ preempt_enable(); -+} -+ -+#endif -+ -+#define irql_gfp() (in_atomic() ? GFP_ATOMIC : GFP_KERNEL) -+ -+/* Windows spinlocks are of type ULONG_PTR which is not big enough to -+ * store Linux spinlocks; so we implement Windows spinlocks using -+ * ULONG_PTR space with our own functions/macros */ -+ -+/* Windows seems to use 0 for unlocked state of spinlock - if Linux -+ * convention of 1 for unlocked state is used, at least prism54 driver -+ * crashes */ -+ -+#define NT_SPIN_LOCK_UNLOCKED 0 -+#define NT_SPIN_LOCK_LOCKED 1 -+ -+static inline void nt_spin_lock_init(NT_SPIN_LOCK *lock) -+{ -+ *lock = NT_SPIN_LOCK_UNLOCKED; -+} -+ -+#ifdef CONFIG_SMP -+ -+static inline void nt_spin_lock(NT_SPIN_LOCK *lock) -+{ -+ while (1) { -+ unsigned long lockval = xchg(lock, NT_SPIN_LOCK_LOCKED); -+ -+ if (likely(lockval == NT_SPIN_LOCK_UNLOCKED)) -+ break; -+ if (unlikely(lockval > NT_SPIN_LOCK_LOCKED)) { -+ ERROR("bad spinlock: 0x%lx at %p", lockval, lock); -+ return; -+ } -+ /* "rep; nop" doesn't change cx register, it's a "pause" */ -+ __asm__ __volatile__("rep; nop"); -+ } -+} -+ -+static inline void nt_spin_unlock(NT_SPIN_LOCK *lock) -+{ -+ unsigned long lockval = xchg(lock, NT_SPIN_LOCK_UNLOCKED); -+ -+ if (likely(lockval == NT_SPIN_LOCK_LOCKED)) -+ return; -+ WARNING("unlocking unlocked spinlock: 0x%lx at %p", lockval, lock); -+} -+ -+#else // CONFIG_SMP -+ -+#define nt_spin_lock(lock) do { } while (0) -+ -+#define nt_spin_unlock(lock) do { } while (0) -+ -+#endif // CONFIG_SMP -+ -+/* When kernel would've disabled preempt (e.g., in interrupt -+ * handlers), we need to fake preempt so driver thinks it is running -+ * at right IRQL */ -+ -+/* raise IRQL to given (higher) IRQL if necessary before locking */ -+static inline KIRQL nt_spin_lock_irql(NT_SPIN_LOCK *lock, KIRQL newirql) -+{ -+ KIRQL oldirql = raise_irql(newirql); -+ nt_spin_lock(lock); -+ return oldirql; -+} -+ -+/* lower IRQL to given (lower) IRQL if necessary after unlocking */ -+static inline void nt_spin_unlock_irql(NT_SPIN_LOCK *lock, KIRQL oldirql) -+{ -+ nt_spin_unlock(lock); -+ lower_irql(oldirql); -+} -+ -+#define nt_spin_lock_irqsave(lock, flags) \ -+do { \ -+ local_irq_save(flags); \ -+ preempt_disable(); \ -+ nt_spin_lock(lock); \ -+} while (0) -+ -+#define nt_spin_unlock_irqrestore(lock, flags) \ -+do { \ -+ nt_spin_unlock(lock); \ -+ preempt_enable(); \ -+ local_irq_restore(flags); \ -+} while (0) -+ -+static inline ULONG SPAN_PAGES(void *ptr, SIZE_T length) -+{ -+ return PAGE_ALIGN(((unsigned long)ptr & (PAGE_SIZE - 1)) + length) -+ >> PAGE_SHIFT; -+} -+ -+#ifdef CONFIG_X86_64 -+ -+/* TODO: can these be implemented without using spinlock? */ -+ -+static inline struct nt_slist *PushEntrySList(nt_slist_header *head, -+ struct nt_slist *entry, -+ NT_SPIN_LOCK *lock) -+{ -+ KIRQL irql = nt_spin_lock_irql(lock, DISPATCH_LEVEL); -+ entry->next = head->next; -+ head->next = entry; -+ head->depth++; -+ nt_spin_unlock_irql(lock, irql); -+ TRACE4("%p, %p, %p", head, entry, entry->next); -+ return entry->next; -+} -+ -+static inline struct nt_slist *PopEntrySList(nt_slist_header *head, -+ NT_SPIN_LOCK *lock) -+{ -+ struct nt_slist *entry; -+ KIRQL irql = nt_spin_lock_irql(lock, DISPATCH_LEVEL); -+ entry = head->next; -+ if (entry) { -+ head->next = entry->next; -+ head->depth--; -+ } -+ nt_spin_unlock_irql(lock, irql); -+ TRACE4("%p, %p", head, entry); -+ return entry; -+} -+ -+#else -+ -+#define u64_low_32(x) ((u32)x) -+#define u64_high_32(x) ((u32)(x >> 32)) -+ -+static inline u64 nt_cmpxchg8b(volatile u64 *ptr, u64 old, u64 new) -+{ -+ u64 prev; -+ -+ __asm__ __volatile__( -+ "\n" -+ LOCK_PREFIX "cmpxchg8b %0\n" -+ : "+m" (*ptr), "=A" (prev) -+ : "A" (old), "b" (u64_low_32(new)), "c" (u64_high_32(new))); -+ return prev; -+} -+ -+/* slist routines below update slist atomically - no need for -+ * spinlocks */ -+ -+static inline struct nt_slist *PushEntrySList(nt_slist_header *head, -+ struct nt_slist *entry, -+ NT_SPIN_LOCK *lock) -+{ -+ nt_slist_header old, new; -+ do { -+ old.align = head->align; -+ entry->next = old.next; -+ new.next = entry; -+ new.depth = old.depth + 1; -+ } while (nt_cmpxchg8b(&head->align, old.align, new.align) != old.align); -+ TRACE4("%p, %p, %p", head, entry, old.next); -+ return old.next; -+} -+ -+static inline struct nt_slist *PopEntrySList(nt_slist_header *head, -+ NT_SPIN_LOCK *lock) -+{ -+ struct nt_slist *entry; -+ nt_slist_header old, new; -+ do { -+ old.align = head->align; -+ entry = old.next; -+ if (!entry) -+ break; -+ new.next = entry->next; -+ new.depth = old.depth - 1; -+ } while (nt_cmpxchg8b(&head->align, old.align, new.align) != old.align); -+ TRACE4("%p, %p", head, entry); -+ return entry; -+} -+ -+#endif -+ -+#define sleep_hz(n) \ -+do { \ -+ set_current_state(TASK_INTERRUPTIBLE); \ -+ schedule_timeout(n); \ -+} while (0) -+ -+int ntoskernel_init(void); -+void ntoskernel_exit(void); -+int ntoskernel_init_device(struct wrap_device *wd); -+void ntoskernel_exit_device(struct wrap_device *wd); -+void *allocate_object(ULONG size, enum common_object_type type, -+ struct unicode_string *name); -+ -+#ifdef ENABLE_USB -+int usb_init(void); -+void usb_exit(void); -+#else -+static inline int usb_init(void) { return 0; } -+static inline void usb_exit(void) {} -+#endif -+int usb_init_device(struct wrap_device *wd); -+void usb_exit_device(struct wrap_device *wd); -+ -+int wrap_procfs_init(void); -+void wrap_procfs_remove(void); -+ -+int link_pe_images(struct pe_image *pe_image, unsigned short n); -+ -+int stricmp(const char *s1, const char *s2); -+void dump_bytes(const char *name, const u8 *from, int len); -+struct mdl *allocate_init_mdl(void *virt, ULONG length); -+void free_mdl(struct mdl *mdl); -+struct driver_object *find_bus_driver(const char *name); -+void free_custom_extensions(struct driver_extension *drv_obj_ext); -+struct nt_thread *get_current_nt_thread(void); -+u64 ticks_1601(void); -+int schedule_ntos_work_item(NTOS_WORK_FUNC func, void *arg1, void *arg2); -+void wrap_init_timer(struct nt_timer *nt_timer, enum timer_type type, -+ struct ndis_mp_block *nmb); -+BOOLEAN wrap_set_timer(struct nt_timer *nt_timer, unsigned long expires_hz, -+ unsigned long repeat_hz, struct kdpc *kdpc); -+ -+LONG InterlockedDecrement(LONG volatile *val) wfastcall; -+LONG InterlockedIncrement(LONG volatile *val) wfastcall; -+struct nt_list *ExInterlockedInsertHeadList -+ (struct nt_list *head, struct nt_list *entry, -+ NT_SPIN_LOCK *lock) wfastcall; -+struct nt_list *ExInterlockedInsertTailList -+ (struct nt_list *head, struct nt_list *entry, -+ NT_SPIN_LOCK *lock) wfastcall; -+struct nt_list *ExInterlockedRemoveHeadList -+ (struct nt_list *head, NT_SPIN_LOCK *lock) wfastcall; -+NTSTATUS IofCallDriver(struct device_object *dev_obj, struct irp *irp) wfastcall; -+KIRQL KfRaiseIrql(KIRQL newirql) wfastcall; -+void KfLowerIrql(KIRQL oldirql) wfastcall; -+KIRQL KfAcquireSpinLock(NT_SPIN_LOCK *lock) wfastcall; -+void KfReleaseSpinLock(NT_SPIN_LOCK *lock, KIRQL oldirql) wfastcall; -+void IofCompleteRequest(struct irp *irp, CHAR prio_boost) wfastcall; -+void KefReleaseSpinLockFromDpcLevel(NT_SPIN_LOCK *lock) wfastcall; -+ -+LONG ObfReferenceObject(void *object) wfastcall; -+void ObfDereferenceObject(void *object) wfastcall; -+ -+#define ObReferenceObject(object) ObfReferenceObject(object) -+#define ObDereferenceObject(object) ObfDereferenceObject(object) -+ -+/* prevent expansion of ExAllocatePoolWithTag macro */ -+void *(ExAllocatePoolWithTag)(enum pool_type pool_type, SIZE_T size, -+ ULONG tag) wstdcall; -+ -+void ExFreePool(void *p) wstdcall; -+ULONG MmSizeOfMdl(void *base, ULONG length) wstdcall; -+void __iomem *MmMapIoSpace(PHYSICAL_ADDRESS phys_addr, SIZE_T size, -+ enum memory_caching_type cache) wstdcall; -+void MmUnmapIoSpace(void __iomem *addr, SIZE_T size) wstdcall; -+void MmProbeAndLockPages(struct mdl *mdl, KPROCESSOR_MODE access_mode, -+ enum lock_operation operation) wstdcall; -+void MmUnlockPages(struct mdl *mdl) wstdcall; -+void KeInitializeEvent(struct nt_event *nt_event, -+ enum event_type type, BOOLEAN state) wstdcall; -+LONG KeSetEvent(struct nt_event *nt_event, KPRIORITY incr, -+ BOOLEAN wait) wstdcall; -+LONG KeResetEvent(struct nt_event *nt_event) wstdcall; -+BOOLEAN queue_kdpc(struct kdpc *kdpc); -+BOOLEAN dequeue_kdpc(struct kdpc *kdpc); -+ -+NTSTATUS IoConnectInterrupt(struct kinterrupt **kinterrupt, -+ PKSERVICE_ROUTINE service_routine, -+ void *service_context, NT_SPIN_LOCK *lock, -+ ULONG vector, KIRQL irql, KIRQL synch_irql, -+ enum kinterrupt_mode interrupt_mode, -+ BOOLEAN shareable, KAFFINITY processor_enable_mask, -+ BOOLEAN floating_save) wstdcall; -+void IoDisconnectInterrupt(struct kinterrupt *interrupt) wstdcall; -+BOOLEAN KeSynchronizeExecution(struct kinterrupt *interrupt, -+ PKSYNCHRONIZE_ROUTINE synch_routine, -+ void *ctx) wstdcall; -+ -+NTSTATUS KeWaitForSingleObject(void *object, KWAIT_REASON reason, -+ KPROCESSOR_MODE waitmode, BOOLEAN alertable, -+ LARGE_INTEGER *timeout) wstdcall; -+void MmBuildMdlForNonPagedPool(struct mdl *mdl) wstdcall; -+NTSTATUS IoCreateDevice(struct driver_object *driver, ULONG dev_ext_length, -+ struct unicode_string *dev_name, DEVICE_TYPE dev_type, -+ ULONG dev_chars, BOOLEAN exclusive, -+ struct device_object **dev_obj) wstdcall; -+NTSTATUS IoCreateSymbolicLink(struct unicode_string *link, -+ struct unicode_string *dev_name) wstdcall; -+void IoDeleteDevice(struct device_object *dev) wstdcall; -+void IoDetachDevice(struct device_object *topdev) wstdcall; -+struct device_object *IoGetAttachedDevice(struct device_object *dev) wstdcall; -+struct device_object *IoGetAttachedDeviceReference -+ (struct device_object *dev) wstdcall; -+NTSTATUS IoAllocateDriverObjectExtension -+ (struct driver_object *drv_obj, void *client_id, ULONG extlen, -+ void **ext) wstdcall; -+void *IoGetDriverObjectExtension(struct driver_object *drv, -+ void *client_id) wstdcall; -+struct device_object *IoAttachDeviceToDeviceStack -+ (struct device_object *src, struct device_object *dst) wstdcall; -+BOOLEAN IoCancelIrp(struct irp *irp) wstdcall; -+struct irp *IoBuildSynchronousFsdRequest -+ (ULONG major_func, struct device_object *dev_obj, void *buf, -+ ULONG length, LARGE_INTEGER *offset, struct nt_event *event, -+ struct io_status_block *status) wstdcall; -+ -+NTSTATUS IoPassIrpDown(struct device_object *dev_obj, struct irp *irp) wstdcall; -+WIN_FUNC_DECL(IoPassIrpDown,2); -+NTSTATUS IoSyncForwardIrp(struct device_object *dev_obj, -+ struct irp *irp) wstdcall; -+NTSTATUS IoAsyncForwardIrp(struct device_object *dev_obj, -+ struct irp *irp) wstdcall; -+NTSTATUS IoInvalidDeviceRequest(struct device_object *dev_obj, -+ struct irp *irp) wstdcall; -+ -+void KeInitializeSpinLock(NT_SPIN_LOCK *lock) wstdcall; -+void IoAcquireCancelSpinLock(KIRQL *irql) wstdcall; -+void IoReleaseCancelSpinLock(KIRQL irql) wstdcall; -+ -+NTSTATUS RtlUnicodeStringToAnsiString -+ (struct ansi_string *dst, const struct unicode_string *src, -+ BOOLEAN dup) wstdcall; -+NTSTATUS RtlAnsiStringToUnicodeString -+ (struct unicode_string *dst, const struct ansi_string *src, -+ BOOLEAN dup) wstdcall; -+void RtlInitAnsiString(struct ansi_string *dst, const char *src) wstdcall; -+void RtlInitUnicodeString(struct unicode_string *dest, -+ const wchar_t *src) wstdcall; -+void RtlFreeUnicodeString(struct unicode_string *string) wstdcall; -+void RtlFreeAnsiString(struct ansi_string *string) wstdcall; -+LONG RtlCompareUnicodeString(const struct unicode_string *s1, -+ const struct unicode_string *s2, -+ BOOLEAN case_insensitive) wstdcall; -+NTSTATUS RtlUpcaseUnicodeString(struct unicode_string *dst, -+ struct unicode_string *src, -+ BOOLEAN alloc) wstdcall; -+BOOLEAN KeCancelTimer(struct nt_timer *nt_timer) wstdcall; -+void KeInitializeDpc(struct kdpc *kdpc, void *func, void *ctx) wstdcall; -+ -+extern spinlock_t ntoskernel_lock; -+extern spinlock_t irp_cancel_lock; -+extern struct nt_list object_list; -+extern CCHAR cpu_count; -+#ifdef CONFIG_X86_64 -+extern struct kuser_shared_data kuser_shared_data; -+#endif -+ -+#define IoCompleteRequest(irp, prio) IofCompleteRequest(irp, prio) -+#define IoCallDriver(dev, irp) IofCallDriver(dev, irp) -+ -+#if defined(IO_DEBUG) -+#define DUMP_IRP(_irp) \ -+do { \ -+ struct io_stack_location *_irp_sl; \ -+ _irp_sl = IoGetCurrentIrpStackLocation(_irp); \ -+ IOTRACE("irp: %p, stack size: %d, cl: %d, sl: %p, dev_obj: %p, " \ -+ "mj_fn: %d, minor_fn: %d, nt_urb: %p, event: %p", \ -+ _irp, _irp->stack_count, (_irp)->current_location, \ -+ _irp_sl, _irp_sl->dev_obj, _irp_sl->major_fn, \ -+ _irp_sl->minor_fn, IRP_URB(_irp), \ -+ (_irp)->user_event); \ -+} while (0) -+#else -+#define DUMP_IRP(_irp) do { } while (0) -+#endif -+ -+#endif // _NTOSKERNEL_H_ -diff -Nurp linux-5.6.11/3rdparty/ndiswrapper/ntoskernel_io.c linux-5.6.11-ndis/3rdparty/ndiswrapper/ntoskernel_io.c ---- linux-5.6.11/3rdparty/ndiswrapper/ntoskernel_io.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.6.11-ndis/3rdparty/ndiswrapper/ntoskernel_io.c 2020-05-03 15:18:33.000000000 +0300 -@@ -0,0 +1,1161 @@ -+/* -+ * Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ */ -+ -+#include "ntoskernel.h" -+#include "ndis.h" -+#include "wrapndis.h" -+#include "usb.h" -+#include "loader.h" -+#include "ntoskernel_io_exports.h" -+ -+wstdcall void WIN_FUNC(IoAcquireCancelSpinLock,1) -+ (KIRQL *irql) __acquires(irql) -+{ -+ spin_lock_bh(&irp_cancel_lock); -+ *irql = 0; -+} -+ -+wstdcall void WIN_FUNC(IoReleaseCancelSpinLock,1) -+ (KIRQL irql) __releases(irql) -+{ -+ spin_unlock_bh(&irp_cancel_lock); -+} -+ -+wstdcall int WIN_FUNC(IoIsWdmVersionAvailable,2) -+ (UCHAR major, UCHAR minor) -+{ -+ IOENTER("%d, %x", major, minor); -+ if (major == 1 && -+ (minor == 0x30 || // Windows 2003 -+ minor == 0x20 || // Windows XP -+ minor == 0x10)) // Windows 2000 -+ IOEXIT(return TRUE); -+ IOEXIT(return FALSE); -+} -+ -+wstdcall BOOLEAN WIN_FUNC(IoIs32bitProcess,1) -+ (struct irp *irp) -+{ -+#ifdef CONFIG_X86_64 -+ return FALSE; -+#else -+ return TRUE; -+#endif -+} -+ -+wstdcall void WIN_FUNC(IoInitializeIrp,3) -+ (struct irp *irp, USHORT size, CCHAR stack_count) -+{ -+ IOENTER("irp: %p, %d, %d", irp, size, stack_count); -+ -+ memset(irp, 0, size); -+ irp->size = size; -+ irp->stack_count = stack_count; -+ irp->current_location = stack_count; -+ IoGetCurrentIrpStackLocation(irp) = IRP_SL(irp, stack_count); -+ IOEXIT(return); -+} -+ -+wstdcall void WIN_FUNC(IoReuseIrp,2) -+ (struct irp *irp, NTSTATUS status) -+{ -+ IOENTER("%p, %d", irp, status); -+ if (irp) { -+ UCHAR alloc_flags; -+ -+ alloc_flags = irp->alloc_flags; -+ IoInitializeIrp(irp, irp->size, irp->stack_count); -+ irp->alloc_flags = alloc_flags; -+ irp->io_status.status = status; -+ } -+ IOEXIT(return); -+} -+ -+wstdcall struct irp *WIN_FUNC(IoAllocateIrp,2) -+ (char stack_count, BOOLEAN charge_quota) -+{ -+ struct irp *irp; -+ int irp_size; -+ -+ IOENTER("count: %d", stack_count); -+ stack_count++; -+ irp_size = IoSizeOfIrp(stack_count); -+ irp = kmalloc(irp_size, irql_gfp()); -+ if (irp) -+ IoInitializeIrp(irp, irp_size, stack_count); -+ IOTRACE("irp %p", irp); -+ IOEXIT(return irp); -+} -+ -+wstdcall BOOLEAN WIN_FUNC(IoCancelIrp,1) -+ (struct irp *irp) -+{ -+ typeof(irp->cancel_routine) cancel_routine; -+ -+ /* NB: this function may be called at DISPATCH_LEVEL */ -+ IOTRACE("irp: %p", irp); -+ if (!irp) -+ return FALSE; -+ DUMP_IRP(irp); -+ IoAcquireCancelSpinLock(&irp->cancel_irql); -+ cancel_routine = xchg(&irp->cancel_routine, NULL); -+ IOTRACE("%p", cancel_routine); -+ irp->cancel = TRUE; -+ if (cancel_routine) { -+ struct device_object *dev_obj; -+ -+ if (irp->current_location >= 0 && -+ irp->current_location < irp->stack_count) -+ dev_obj = IoGetCurrentIrpStackLocation(irp)->dev_obj; -+ else -+ dev_obj = NULL; -+ IOTRACE("current_location: %d, dev_obj: %p", -+ irp->current_location, dev_obj); -+ /* cancel_routine will release the spin lock */ -+ __release(irp->cancel_irql); -+ LIN2WIN2(cancel_routine, dev_obj, irp); -+ /* in usb's cancel, irp->cancel is set to indicate -+ * status of cancel */ -+ IOEXIT(return xchg(&irp->cancel, TRUE)); -+ } else { -+ IOTRACE("irp %p already canceled", irp); -+ IoReleaseCancelSpinLock(irp->cancel_irql); -+ IOEXIT(return FALSE); -+ } -+} -+ -+wstdcall void IoQueueThreadIrp(struct irp *irp) -+{ -+ struct nt_thread *thread; -+ KIRQL irql; -+ -+ thread = get_current_nt_thread(); -+ if (thread) { -+ IOTRACE("thread: %p, task: %p", thread, thread->task); -+ irp->flags |= IRP_SYNCHRONOUS_API; -+ irql = nt_spin_lock_irql(&thread->lock, DISPATCH_LEVEL); -+ InsertTailList(&thread->irps, &irp->thread_list); -+ IoIrpThread(irp) = thread; -+ nt_spin_unlock_irql(&thread->lock, irql); -+ } else -+ IoIrpThread(irp) = NULL; -+} -+ -+wstdcall void IoDequeueThreadIrp(struct irp *irp) -+{ -+ struct nt_thread *thread; -+ KIRQL irql; -+ -+ thread = IoIrpThread(irp); -+ if (thread) { -+ irql = nt_spin_lock_irql(&thread->lock, DISPATCH_LEVEL); -+ RemoveEntryList(&irp->thread_list); -+ nt_spin_unlock_irql(&thread->lock, irql); -+ } -+} -+ -+wstdcall void WIN_FUNC(IoFreeIrp,1) -+ (struct irp *irp) -+{ -+ IOENTER("irp = %p", irp); -+ if (!irp) { -+ WARNING("irp is NULL"); -+ return; -+ } -+ -+ if (irp->flags & IRP_SYNCHRONOUS_API) -+ IoDequeueThreadIrp(irp); -+ IoCancelIrp(irp); -+ kfree(irp); -+ -+ IOEXIT(return); -+} -+ -+wstdcall struct irp *WIN_FUNC(IoBuildAsynchronousFsdRequest,6) -+ (ULONG major_fn, struct device_object *dev_obj, void *buffer, -+ ULONG length, LARGE_INTEGER *offset, -+ struct io_status_block *user_status) -+{ -+ struct irp *irp; -+ struct io_stack_location *irp_sl; -+ -+ IOENTER("%p", dev_obj); -+ if (!dev_obj) -+ IOEXIT(return NULL); -+ irp = IoAllocateIrp(dev_obj->stack_count, FALSE); -+ if (irp == NULL) { -+ WARNING("couldn't allocate irp"); -+ IOEXIT(return NULL); -+ } -+ -+ irp_sl = IoGetNextIrpStackLocation(irp); -+ irp_sl->major_fn = major_fn; -+ IOTRACE("major_fn: %d", major_fn); -+ irp_sl->minor_fn = 0; -+ irp_sl->flags = 0; -+ irp_sl->control = 0; -+ irp_sl->dev_obj = dev_obj; -+ irp_sl->file_obj = NULL; -+ irp_sl->completion_routine = NULL; -+ -+ if (dev_obj->flags & DO_DIRECT_IO) { -+ irp->mdl = IoAllocateMdl(buffer, length, FALSE, FALSE, irp); -+ if (irp->mdl == NULL) { -+ IoFreeIrp(irp); -+ return NULL; -+ } -+ MmProbeAndLockPages(irp->mdl, KernelMode, -+ major_fn == IRP_MJ_WRITE ? -+ IoReadAccess : IoWriteAccess); -+ IOTRACE("mdl: %p", irp->mdl); -+ } else if (dev_obj->flags & DO_BUFFERED_IO) { -+ irp->associated_irp.system_buffer = buffer; -+ irp->flags = IRP_BUFFERED_IO; -+ irp->mdl = NULL; -+ IOTRACE("buffer: %p", buffer); -+ } -+ if (major_fn == IRP_MJ_READ) { -+ irp_sl->params.read.length = length; -+ irp_sl->params.read.byte_offset = *offset; -+ } else if (major_fn == IRP_MJ_WRITE) { -+ irp_sl->params.write.length = length; -+ irp_sl->params.write.byte_offset = *offset; -+ } -+ irp->user_status = user_status; -+ IOTRACE("irp: %p", irp); -+ return irp; -+} -+ -+wstdcall struct irp *WIN_FUNC(IoBuildSynchronousFsdRequest,7) -+ (ULONG major_fn, struct device_object *dev_obj, void *buf, -+ ULONG length, LARGE_INTEGER *offset, struct nt_event *event, -+ struct io_status_block *user_status) -+{ -+ struct irp *irp; -+ -+ irp = IoBuildAsynchronousFsdRequest(major_fn, dev_obj, buf, length, -+ offset, user_status); -+ if (irp == NULL) -+ return NULL; -+ irp->user_event = event; -+ IoQueueThreadIrp(irp); -+ return irp; -+} -+ -+wstdcall struct irp *WIN_FUNC(IoBuildDeviceIoControlRequest,9) -+ (ULONG ioctl, struct device_object *dev_obj, -+ void *input_buf, ULONG input_buf_len, void *output_buf, -+ ULONG output_buf_len, BOOLEAN internal_ioctl, -+ struct nt_event *event, struct io_status_block *io_status) -+{ -+ struct irp *irp; -+ struct io_stack_location *irp_sl; -+ ULONG buf_len; -+ -+ IOENTER("%p, 0x%08x, %d", dev_obj, ioctl, internal_ioctl); -+ if (!dev_obj) -+ IOEXIT(return NULL); -+ irp = IoAllocateIrp(dev_obj->stack_count, FALSE); -+ if (irp == NULL) { -+ WARNING("couldn't allocate irp"); -+ return NULL; -+ } -+ irp_sl = IoGetNextIrpStackLocation(irp); -+ irp_sl->params.dev_ioctl.code = ioctl; -+ irp_sl->params.dev_ioctl.input_buf_len = input_buf_len; -+ irp_sl->params.dev_ioctl.output_buf_len = output_buf_len; -+ irp_sl->major_fn = (internal_ioctl) ? -+ IRP_MJ_INTERNAL_DEVICE_CONTROL : IRP_MJ_DEVICE_CONTROL; -+ IOTRACE("%d", IO_METHOD_FROM_CTL_CODE(ioctl)); -+ -+ switch (IO_METHOD_FROM_CTL_CODE(ioctl)) { -+ case METHOD_BUFFERED: -+ buf_len = max(input_buf_len, output_buf_len); -+ if (buf_len) { -+ irp->associated_irp.system_buffer = -+ ExAllocatePoolWithTag(NonPagedPool, buf_len, 0); -+ if (!irp->associated_irp.system_buffer) { -+ IoFreeIrp(irp); -+ IOEXIT(return NULL); -+ } -+ irp->associated_irp.system_buffer = input_buf; -+ if (input_buf) -+ memcpy(irp->associated_irp.system_buffer, -+ input_buf, input_buf_len); -+ irp->flags = IRP_BUFFERED_IO | IRP_DEALLOCATE_BUFFER; -+ if (output_buf) -+ irp->flags = IRP_INPUT_OPERATION; -+ irp->user_buf = output_buf; -+ } else -+ irp->user_buf = NULL; -+ break; -+ case METHOD_IN_DIRECT: -+ case METHOD_OUT_DIRECT: -+ if (input_buf) { -+ irp->associated_irp.system_buffer = -+ ExAllocatePoolWithTag(NonPagedPool, -+ input_buf_len, 0); -+ if (!irp->associated_irp.system_buffer) { -+ IoFreeIrp(irp); -+ IOEXIT(return NULL); -+ } -+ memcpy(irp->associated_irp.system_buffer, -+ input_buf, input_buf_len); -+ irp->flags = IRP_BUFFERED_IO | IRP_DEALLOCATE_BUFFER; -+ } -+ /* TODO: we are supposed to setup MDL, but USB layer -+ * doesn't use MDLs. Moreover, USB layer mirrors -+ * non-DMAable buffers, so no need to allocate -+ * DMAable buffer here */ -+ if (output_buf) { -+ irp->associated_irp.system_buffer = -+ ExAllocatePoolWithTag(NonPagedPool, -+ output_buf_len, 0); -+ if (!irp->associated_irp.system_buffer) { -+ IoFreeIrp(irp); -+ IOEXIT(return NULL); -+ } -+ irp->flags = IRP_BUFFERED_IO | IRP_DEALLOCATE_BUFFER; -+ } -+ break; -+ case METHOD_NEITHER: -+ irp->user_buf = output_buf; -+ irp_sl->params.dev_ioctl.type3_input_buf = input_buf; -+ break; -+ } -+ -+ irp->user_status = io_status; -+ irp->user_event = event; -+ IoQueueThreadIrp(irp); -+ -+ IOTRACE("irp: %p", irp); -+ IOEXIT(return irp); -+} -+ -+wfastcall NTSTATUS WIN_FUNC(IofCallDriver,2) -+ (struct device_object *dev_obj, struct irp *irp) -+{ -+ struct io_stack_location *irp_sl; -+ NTSTATUS status; -+ driver_dispatch_t *major_func; -+ struct driver_object *drv_obj; -+ -+ if (irp->current_location <= 0) { -+ ERROR("invalid irp: %p, %d", irp, irp->current_location); -+ return STATUS_INVALID_PARAMETER; -+ } -+ IOTRACE("%p, %p, %p, %d, %d, %p", dev_obj, irp, dev_obj->drv_obj, -+ irp->current_location, irp->stack_count, -+ IoGetCurrentIrpStackLocation(irp)); -+ IoSetNextIrpStackLocation(irp); -+ DUMP_IRP(irp); -+ irp_sl = IoGetCurrentIrpStackLocation(irp); -+ drv_obj = dev_obj->drv_obj; -+ irp_sl->dev_obj = dev_obj; -+ major_func = drv_obj->major_func[irp_sl->major_fn]; -+ IOTRACE("major_func: %p, dev_obj: %p", major_func, dev_obj); -+ if (major_func) -+ status = LIN2WIN2(major_func, dev_obj, irp); -+ else { -+ ERROR("major_function %d is not implemented", -+ irp_sl->major_fn); -+ status = STATUS_NOT_SUPPORTED; -+ } -+ IOEXIT(return status); -+} -+ -+wfastcall void WIN_FUNC(IofCompleteRequest,2) -+ (struct irp *irp, CHAR prio_boost) -+{ -+ struct io_stack_location *irp_sl; -+ -+#ifdef IO_DEBUG -+ DUMP_IRP(irp); -+ if (irp->io_status.status == STATUS_PENDING) { -+ ERROR("invalid irp: %p, STATUS_PENDING", irp); -+ return; -+ } -+ if (irp->current_location < 0 || -+ irp->current_location >= irp->stack_count) { -+ ERROR("invalid irp: %p, %d", irp, irp->current_location); -+ return; -+ } -+#endif -+ for (irp_sl = IoGetCurrentIrpStackLocation(irp); -+ irp->current_location < irp->stack_count; irp_sl++) { -+ struct device_object *dev_obj; -+ NTSTATUS status; -+ -+ DUMP_IRP(irp); -+ if (irp_sl->control & SL_PENDING_RETURNED) -+ irp->pending_returned = TRUE; -+ -+ /* current_location and dev_obj must be same as when -+ * driver called IoSetCompletionRoutine, which sets -+ * completion routine at next (lower) location, which -+ * is what we are going to call below; so we set -+ * current_location and dev_obj for the previous -+ * (higher) location */ -+ IoSkipCurrentIrpStackLocation(irp); -+ if (irp->current_location < irp->stack_count) -+ dev_obj = IoGetCurrentIrpStackLocation(irp)->dev_obj; -+ else -+ dev_obj = NULL; -+ -+ IOTRACE("%d, %d, %p", irp->current_location, irp->stack_count, -+ dev_obj); -+ if (irp_sl->completion_routine && -+ ((irp->io_status.status == STATUS_SUCCESS && -+ irp_sl->control & SL_INVOKE_ON_SUCCESS) || -+ (irp->io_status.status != STATUS_SUCCESS && -+ irp_sl->control & SL_INVOKE_ON_ERROR) || -+ (irp->cancel == TRUE && -+ irp_sl->control & SL_INVOKE_ON_CANCEL))) { -+ IOTRACE("calling completion_routine at: %p, %p", -+ irp_sl->completion_routine, irp_sl->context); -+ status = LIN2WIN3(irp_sl->completion_routine, -+ dev_obj, irp, irp_sl->context); -+ IOTRACE("status: %08X", status); -+ if (status == STATUS_MORE_PROCESSING_REQUIRED) -+ IOEXIT(return); -+ } else { -+ /* propagate pending status to next irp_sl */ -+ if (irp->pending_returned && -+ irp->current_location < irp->stack_count) -+ IoMarkIrpPending(irp); -+ } -+ } -+ -+ if (irp->user_status) { -+ irp->user_status->status = irp->io_status.status; -+ irp->user_status->info = irp->io_status.info; -+ } -+ -+ if (irp->user_event) { -+ IOTRACE("setting event %p", irp->user_event); -+ KeSetEvent(irp->user_event, prio_boost, FALSE); -+ } -+ -+ if (irp->associated_irp.system_buffer && -+ (irp->flags & IRP_DEALLOCATE_BUFFER)) -+ ExFreePool(irp->associated_irp.system_buffer); -+ else { -+ struct mdl *mdl; -+ while ((mdl = irp->mdl)) { -+ irp->mdl = mdl->next; -+ MmUnlockPages(mdl); -+ IoFreeMdl(mdl); -+ } -+ } -+ IOTRACE("freeing irp %p", irp); -+ IoFreeIrp(irp); -+ IOEXIT(return); -+} -+ -+wstdcall NTSTATUS IoPassIrpDown(struct device_object *dev_obj, struct irp *irp) -+{ -+ IoSkipCurrentIrpStackLocation(irp); -+ IOEXIT(return IoCallDriver(dev_obj, irp)); -+} -+ -+wstdcall NTSTATUS IoIrpSyncComplete(struct device_object *dev_obj, -+ struct irp *irp, void *context) -+{ -+ if (irp->pending_returned == TRUE) -+ KeSetEvent(context, IO_NO_INCREMENT, FALSE); -+ IOEXIT(return STATUS_MORE_PROCESSING_REQUIRED); -+} -+WIN_FUNC_DECL(IoIrpSyncComplete,3) -+ -+wstdcall NTSTATUS IoSyncForwardIrp(struct device_object *dev_obj, -+ struct irp *irp) -+{ -+ struct nt_event event; -+ NTSTATUS status; -+ -+ IoCopyCurrentIrpStackLocationToNext(irp); -+ KeInitializeEvent(&event, SynchronizationEvent, FALSE); -+ /* completion function is called as Windows function */ -+ IoSetCompletionRoutine(irp, WIN_FUNC_PTR(IoIrpSyncComplete,3), &event, -+ TRUE, TRUE, TRUE); -+ status = IoCallDriver(dev_obj, irp); -+ IOTRACE("%08X", status); -+ if (status == STATUS_PENDING) { -+ KeWaitForSingleObject(&event, Executive, KernelMode, FALSE, -+ NULL); -+ status = irp->io_status.status; -+ } -+ IOTRACE("%08X", status); -+ IOEXIT(return status); -+} -+WIN_FUNC_DECL(IoSyncForwardIrp,2) -+ -+wstdcall NTSTATUS IoAsyncForwardIrp(struct device_object *dev_obj, -+ struct irp *irp) -+{ -+ NTSTATUS status; -+ -+ IoCopyCurrentIrpStackLocationToNext(irp); -+ status = IoCallDriver(dev_obj, irp); -+ IOEXIT(return status); -+} -+WIN_FUNC_DECL(IoAsyncForwardIrp,2) -+ -+wstdcall NTSTATUS IoInvalidDeviceRequest(struct device_object *dev_obj, -+ struct irp *irp) -+{ -+ struct io_stack_location *irp_sl; -+ NTSTATUS status; -+ -+ irp_sl = IoGetCurrentIrpStackLocation(irp); -+ WARNING("%d:%d not implemented", irp_sl->major_fn, irp_sl->minor_fn); -+ irp->io_status.status = STATUS_SUCCESS; -+ irp->io_status.info = 0; -+ status = irp->io_status.status; -+ IoCompleteRequest(irp, IO_NO_INCREMENT); -+ IOEXIT(return status); -+} -+WIN_FUNC_DECL(IoInvalidDeviceRequest,2) -+ -+static irqreturn_t io_irq_isr(int irq, void *data ISR_PT_REGS_PARAM_DECL) -+{ -+ struct kinterrupt *interrupt = data; -+ BOOLEAN ret; -+ -+#ifdef CONFIG_DEBUG_SHIRQ -+ if (!interrupt->u.enabled) -+ EXIT1(return IRQ_NONE); -+#endif -+ TRACE6("%p", interrupt); -+ nt_spin_lock(interrupt->actual_lock); -+ ret = LIN2WIN2(interrupt->isr, interrupt, interrupt->isr_ctx); -+ nt_spin_unlock(interrupt->actual_lock); -+ if (ret == TRUE) -+ EXIT6(return IRQ_HANDLED); -+ else -+ EXIT6(return IRQ_NONE); -+} -+ -+wstdcall NTSTATUS WIN_FUNC(IoConnectInterrupt,11) -+ (struct kinterrupt **kinterrupt, PKSERVICE_ROUTINE isr, void *isr_ctx, -+ NT_SPIN_LOCK *lock, ULONG vector, KIRQL irql, KIRQL synch_irql, -+ enum kinterrupt_mode mode, BOOLEAN shared, KAFFINITY cpu_mask, -+ BOOLEAN save_fp) -+{ -+ struct kinterrupt *interrupt; -+ IOENTER(""); -+ interrupt = kzalloc(sizeof(*interrupt), GFP_KERNEL); -+ if (!interrupt) -+ IOEXIT(return STATUS_INSUFFICIENT_RESOURCES); -+ interrupt->vector = vector; -+ interrupt->cpu_mask = cpu_mask; -+ nt_spin_lock_init(&interrupt->lock); -+ if (lock) -+ interrupt->actual_lock = lock; -+ else -+ interrupt->actual_lock = &interrupt->lock; -+ interrupt->shared = shared; -+ interrupt->save_fp = save_fp; -+ interrupt->isr = isr; -+ interrupt->isr_ctx = isr_ctx; -+ InitializeListHead(&interrupt->list); -+ interrupt->irql = irql; -+ interrupt->synch_irql = synch_irql; -+ interrupt->mode = mode; -+ if (request_irq(vector, io_irq_isr, shared ? IRQF_SHARED : 0, -+ DRIVER_NAME, interrupt)) { -+ WARNING("request for irq %d failed", vector); -+ kfree(interrupt); -+ IOEXIT(return STATUS_INSUFFICIENT_RESOURCES); -+ } -+ *kinterrupt = interrupt; -+#ifdef CONFIG_DEBUG_SHIRQ -+ interrupt->u.enabled = 1; -+#endif -+ IOEXIT(return STATUS_SUCCESS); -+} -+ -+wstdcall void WIN_FUNC(IoDisconnectInterrupt,1) -+ (struct kinterrupt *interrupt) -+{ -+#ifdef CONFIG_DEBUG_SHIRQ -+ interrupt->u.enabled = 0; -+#endif -+ free_irq(interrupt->vector, interrupt); -+ kfree(interrupt); -+} -+ -+wstdcall struct mdl *WIN_FUNC(IoAllocateMdl,5) -+ (void *virt, ULONG length, BOOLEAN second_buf, BOOLEAN charge_quota, -+ struct irp *irp) -+{ -+ struct mdl *mdl; -+ mdl = allocate_init_mdl(virt, length); -+ if (!mdl) -+ return NULL; -+ if (irp) { -+ if (second_buf == TRUE) { -+ struct mdl *last; -+ -+ last = irp->mdl; -+ while (last->next) -+ last = last->next; -+ last->next = mdl; -+ } else -+ irp->mdl = mdl; -+ } -+ IOTRACE("%p", mdl); -+ return mdl; -+} -+ -+wstdcall void WIN_FUNC(IoFreeMdl,1) -+ (struct mdl *mdl) -+{ -+ IOTRACE("%p", mdl); -+ free_mdl(mdl); -+} -+ -+wstdcall struct io_workitem *WIN_FUNC(IoAllocateWorkItem,1) -+ (struct device_object *dev_obj) -+{ -+ struct io_workitem *io_workitem; -+ -+ IOENTER("%p", dev_obj); -+ io_workitem = kmalloc(sizeof(*io_workitem), irql_gfp()); -+ if (!io_workitem) -+ IOEXIT(return NULL); -+ io_workitem->dev_obj = dev_obj; -+ IOEXIT(return io_workitem); -+} -+ -+wstdcall void WIN_FUNC(IoFreeWorkItem,1) -+ (struct io_workitem *io_workitem) -+{ -+ kfree(io_workitem); -+ IOEXIT(return); -+} -+ -+wstdcall void WIN_FUNC(IoQueueWorkItem,4) -+ (struct io_workitem *io_workitem, void *func, -+ enum work_queue_type queue_type, void *context) -+{ -+ IOENTER("%p, %p", io_workitem, io_workitem->dev_obj); -+ io_workitem->worker_routine = func; -+ io_workitem->context = context; -+ schedule_ntos_work_item(func, io_workitem->dev_obj, context); -+ IOEXIT(return); -+} -+ -+wstdcall void WIN_FUNC(ExQueueWorkItem,2) -+ (struct io_workitem *io_workitem, enum work_queue_type queue_type) -+{ -+ IOENTER("%p", io_workitem); -+ schedule_ntos_work_item(io_workitem->worker_routine, -+ io_workitem->dev_obj, io_workitem->context); -+} -+ -+wstdcall NTSTATUS WIN_FUNC(IoAllocateDriverObjectExtension,4) -+ (struct driver_object *drv_obj, void *client_id, ULONG extlen, -+ void **ext) -+{ -+ struct custom_ext *ce; -+ -+ IOENTER("%p, %p", drv_obj, client_id); -+ ce = kmalloc(sizeof(*ce) + extlen, irql_gfp()); -+ if (ce == NULL) -+ return STATUS_INSUFFICIENT_RESOURCES; -+ -+ IOTRACE("custom_ext: %p", ce); -+ ce->client_id = client_id; -+ spin_lock_bh(&ntoskernel_lock); -+ InsertTailList(&drv_obj->drv_ext->custom_ext, &ce->list); -+ spin_unlock_bh(&ntoskernel_lock); -+ -+ *ext = (void *)ce + sizeof(*ce); -+ IOTRACE("ext: %p", *ext); -+ IOEXIT(return STATUS_SUCCESS); -+} -+ -+wstdcall void *WIN_FUNC(IoGetDriverObjectExtension,2) -+ (struct driver_object *drv_obj, void *client_id) -+{ -+ struct custom_ext *ce; -+ void *ret; -+ -+ IOENTER("drv_obj: %p, client_id: %p", drv_obj, client_id); -+ ret = NULL; -+ spin_lock_bh(&ntoskernel_lock); -+ nt_list_for_each_entry(ce, &drv_obj->drv_ext->custom_ext, list) { -+ if (ce->client_id == client_id) { -+ ret = (void *)ce + sizeof(*ce); -+ break; -+ } -+ } -+ spin_unlock_bh(&ntoskernel_lock); -+ IOTRACE("ret: %p", ret); -+ return ret; -+} -+ -+void free_custom_extensions(struct driver_extension *drv_ext) -+{ -+ struct nt_list *ent; -+ -+ IOENTER("%p", drv_ext); -+ spin_lock_bh(&ntoskernel_lock); -+ while ((ent = RemoveHeadList(&drv_ext->custom_ext))) -+ kfree(ent); -+ spin_unlock_bh(&ntoskernel_lock); -+ IOEXIT(return); -+} -+ -+wstdcall NTSTATUS WIN_FUNC(IoCreateDevice,7) -+ (struct driver_object *drv_obj, ULONG dev_ext_length, -+ struct unicode_string *dev_name, DEVICE_TYPE dev_type, -+ ULONG dev_chars, BOOLEAN exclusive, struct device_object **newdev) -+{ -+ struct device_object *dev; -+ struct dev_obj_ext *dev_obj_ext; -+ int size; -+ -+ IOENTER("%p, %u, %p", drv_obj, dev_ext_length, dev_name); -+ -+ size = sizeof(*dev) + dev_ext_length + sizeof(*dev_obj_ext); -+ dev = allocate_object(size, OBJECT_TYPE_DEVICE, dev_name); -+ if (!dev) -+ IOEXIT(return STATUS_INSUFFICIENT_RESOURCES); -+ if (dev_ext_length) -+ dev->dev_ext = dev + 1; -+ else -+ dev->dev_ext = NULL; -+ -+ dev_obj_ext = ((void *)(dev + 1)) + dev_ext_length; -+ dev_obj_ext->dev_obj = dev; -+ dev_obj_ext->size = 0; -+ dev_obj_ext->type = IO_TYPE_DEVICE; -+ dev->dev_obj_ext = dev_obj_ext; -+ -+ dev->type = dev_type; -+ dev->flags = 0; -+ dev->size = sizeof(*dev) + dev_ext_length; -+ dev->ref_count = 1; -+ dev->attached = NULL; -+ dev->stack_count = 1; -+ -+ dev->drv_obj = drv_obj; -+ dev->next = drv_obj->dev_obj; -+ drv_obj->dev_obj = dev; -+ -+ dev->align_req = 1; -+ dev->characteristics = dev_chars; -+ dev->io_timer = NULL; -+ KeInitializeEvent(&dev->lock, SynchronizationEvent, TRUE); -+ dev->vpb = NULL; -+ -+ IOTRACE("dev: %p, ext: %p", dev, dev->dev_ext); -+ *newdev = dev; -+ IOEXIT(return STATUS_SUCCESS); -+} -+ -+wstdcall NTSTATUS WIN_FUNC(IoCreateUnprotectedSymbolicLink,2) -+ (struct unicode_string *link, struct unicode_string *dev_name) -+{ -+ struct ansi_string ansi; -+ -+ IOENTER("%p, %p", dev_name, link); -+ if (dev_name && (RtlUnicodeStringToAnsiString(&ansi, dev_name, TRUE) == -+ STATUS_SUCCESS)) { -+ IOTRACE("dev_name: %s", ansi.buf); -+ RtlFreeAnsiString(&ansi); -+ } -+ if (link && (RtlUnicodeStringToAnsiString(&ansi, link, TRUE) == -+ STATUS_SUCCESS)) { -+ IOTRACE("link: %s", ansi.buf); -+ RtlFreeAnsiString(&ansi); -+ } -+// TODO(); -+ IOEXIT(return STATUS_SUCCESS); -+} -+ -+wstdcall NTSTATUS WIN_FUNC(IoCreateSymbolicLink,2) -+ (struct unicode_string *link, struct unicode_string *dev_name) -+{ -+ IOEXIT(return IoCreateUnprotectedSymbolicLink(link, dev_name)); -+} -+ -+wstdcall NTSTATUS WIN_FUNC(IoDeleteSymbolicLink,1) -+ (struct unicode_string *link) -+{ -+ struct ansi_string ansi; -+ -+ IOENTER("%p", link); -+ if (link && (RtlUnicodeStringToAnsiString(&ansi, link, TRUE) == -+ STATUS_SUCCESS)) { -+ IOTRACE("dev_name: %s", ansi.buf); -+ RtlFreeAnsiString(&ansi); -+ } -+ IOEXIT(return STATUS_SUCCESS); -+} -+ -+wstdcall void WIN_FUNC(IoDeleteDevice,1) -+ (struct device_object *dev) -+{ -+ IOENTER("%p", dev); -+ if (dev == NULL) -+ IOEXIT(return); -+ IOTRACE("drv_obj: %p", dev->drv_obj); -+ if (dev->drv_obj) { -+ struct device_object *prev; -+ -+ prev = dev->drv_obj->dev_obj; -+ IOTRACE("dev_obj: %p", prev); -+ if (prev == dev) -+ dev->drv_obj->dev_obj = dev->next; -+ else if (prev) { -+ while (prev->next != dev) -+ prev = prev->next; -+ prev->next = dev->next; -+ } -+ } -+ ObDereferenceObject(dev); -+ IOEXIT(return); -+} -+ -+wstdcall void WIN_FUNC(IoDetachDevice,1) -+ (struct device_object *tgt) -+{ -+ struct device_object *tail; -+ -+ IOENTER("%p", tgt); -+ if (!tgt) -+ IOEXIT(return); -+ tail = tgt->attached; -+ if (!tail) -+ IOEXIT(return); -+ IOTRACE("tail: %p", tail); -+ -+ spin_lock_bh(&ntoskernel_lock); -+ tgt->attached = tail->attached; -+ IOTRACE("attached:%p", tgt->attached); -+ for ( ; tail; tail = tail->attached) { -+ IOTRACE("tail:%p", tail); -+ tail->stack_count--; -+ } -+ spin_unlock_bh(&ntoskernel_lock); -+ IOEXIT(return); -+} -+ -+wstdcall struct device_object *WIN_FUNC(IoGetAttachedDevice,1) -+ (struct device_object *dev) -+{ -+ IOENTER("%p", dev); -+ if (!dev) -+ IOEXIT(return NULL); -+ spin_lock_bh(&ntoskernel_lock); -+ while (dev->attached) -+ dev = dev->attached; -+ spin_unlock_bh(&ntoskernel_lock); -+ IOEXIT(return dev); -+} -+ -+wstdcall struct device_object *WIN_FUNC(IoGetAttachedDeviceReference,1) -+ (struct device_object *dev) -+{ -+ IOENTER("%p", dev); -+ if (!dev) -+ IOEXIT(return NULL); -+ dev = IoGetAttachedDevice(dev); -+ ObReferenceObject(dev); -+ IOEXIT(return dev); -+} -+ -+wstdcall struct device_object *WIN_FUNC(IoAttachDeviceToDeviceStack,2) -+ (struct device_object *src, struct device_object *tgt) -+{ -+ struct device_object *attached; -+ struct dev_obj_ext *src_dev_ext; -+ -+ IOENTER("%p, %p", src, tgt); -+ attached = IoGetAttachedDevice(tgt); -+ IOTRACE("%p", attached); -+ src_dev_ext = src->dev_obj_ext; -+ spin_lock_bh(&ntoskernel_lock); -+ if (attached) -+ attached->attached = src; -+ src->attached = NULL; -+ src->stack_count = attached->stack_count + 1; -+ src_dev_ext->attached_to = attached; -+ spin_unlock_bh(&ntoskernel_lock); -+ IOTRACE("stack_count: %d -> %d", attached->stack_count, -+ src->stack_count); -+ IOEXIT(return attached); -+} -+ -+wstdcall NTSTATUS WIN_FUNC(IoGetDeviceProperty,5) -+ (struct device_object *pdo, enum device_registry_property dev_property, -+ ULONG buffer_len, void *buffer, ULONG *result_len) -+{ -+ struct ansi_string ansi; -+ struct unicode_string unicode; -+ struct wrap_device *wd; -+ ULONG need; -+ -+ IOENTER("dev_obj = %p, dev_property = %d, buffer_len = %u, " -+ "buffer = %p, result_len = %p", pdo, dev_property, -+ buffer_len, buffer, result_len); -+ -+ wd = pdo->reserved; -+ switch (dev_property) { -+ case DevicePropertyDeviceDescription: -+ case DevicePropertyFriendlyName: -+ case DevicePropertyDriverKeyName: -+ if (wrap_is_pci_bus(wd->dev_bus)) -+ RtlInitAnsiString(&ansi, "PCI"); -+ else // if (wrap_is_usb_bus(wd->dev_bus)) -+ RtlInitAnsiString(&ansi, "USB"); -+ need = sizeof(wchar_t) * (ansi.max_length + 1); -+ if (buffer_len < need) { -+ *result_len = need; -+ IOEXIT(return STATUS_BUFFER_TOO_SMALL); -+ } -+ unicode.max_length = buffer_len; -+ unicode.buf = buffer; -+ if (RtlAnsiStringToUnicodeString(&unicode, &ansi, -+ FALSE) != STATUS_SUCCESS) { -+ *result_len = unicode.length; -+ IOEXIT(return STATUS_BUFFER_TOO_SMALL); -+ } -+ IOEXIT(return STATUS_SUCCESS); -+ default: -+ WARNING("%d not implemented", dev_property); -+ IOEXIT(return STATUS_INVALID_PARAMETER_2); -+ } -+} -+ -+wstdcall NTSTATUS WIN_FUNC(IoGetDeviceObjectPointer,4) -+ (struct unicode_string *name, ACCESS_MASK desired_access, -+ struct file_object *file_obj, struct device_object *dev_obj) -+{ -+ struct common_object_header *coh; -+ -+ dev_obj = NULL; -+ /* TODO: access is not checked and file_obj is filled with zeroes */ -+ spin_lock_bh(&ntoskernel_lock); -+ nt_list_for_each_entry(coh, &object_list, list) { -+ TRACE5("header: %p, type: %d", coh, coh->type); -+ if (coh->type != OBJECT_TYPE_DEVICE) -+ continue; -+ if (!RtlCompareUnicodeString(&coh->name, name, TRUE)) { -+ dev_obj = HEADER_TO_OBJECT(coh); -+ TRACE5("dev_obj: %p", dev_obj); -+ break; -+ } -+ } -+ spin_unlock_bh(&ntoskernel_lock); -+ if (dev_obj) { -+ memset(file_obj, 0, sizeof(*file_obj)); -+ WARNING("file_obj filled with zeroes"); -+ IOEXIT(return STATUS_SUCCESS); -+ } else -+ IOEXIT(return STATUS_OBJECT_NAME_INVALID); -+} -+ -+/* NOTE: Make sure to compile with -freg-struct-return, so gcc will -+ * return union in register, like Windows */ -+wstdcall union power_state WIN_FUNC(PoSetPowerState,3) -+ (struct device_object *dev_obj, enum power_state_type type, -+ union power_state state) -+{ -+ IOEXIT(return state); -+} -+ -+wstdcall NTSTATUS WIN_FUNC(PoCallDriver,2) -+ (struct device_object *dev_obj, struct irp *irp) -+{ -+ return IoCallDriver(dev_obj, irp); -+} -+ -+wstdcall NTSTATUS WIN_FUNC(PoRequestPowerIrp,6) -+ (struct device_object *dev_obj, UCHAR minor_fn, -+ union power_state power_state, void *completion_func, -+ void *context, struct irp **pirp) -+{ -+ struct irp *irp; -+ struct io_stack_location *irp_sl; -+ -+ TRACE1("%p, %d, %p", dev_obj, dev_obj->stack_count, dev_obj->drv_obj); -+ irp = IoAllocateIrp(dev_obj->stack_count, FALSE); -+ if (!irp) -+ return STATUS_INSUFFICIENT_RESOURCES; -+ irp_sl = IoGetNextIrpStackLocation(irp); -+ irp_sl->major_fn = IRP_MJ_POWER; -+ irp_sl->minor_fn = minor_fn; -+ if (minor_fn == IRP_MN_WAIT_WAKE) -+ irp_sl->params.power.type = SystemPowerState; -+ else -+ irp_sl->params.power.type = DevicePowerState; -+ irp_sl->params.power.state = power_state; -+ irp_sl->completion_routine = completion_func; -+ irp->io_status.status = STATUS_NOT_SUPPORTED; -+ *pirp = irp; -+ return PoCallDriver(dev_obj, irp); -+} -+ -+wstdcall void WIN_FUNC(PoStartNextPowerIrp,1) -+ (struct irp *irp) -+{ -+ IOENTER("irp = %p", irp); -+ IOEXIT(return); -+} -+ -+wstdcall void WIN_FUNC(IoInitializeRemoveLockEx,5) -+ (struct io_remove_lock *lock, ULONG alloc_tag, ULONG max_locked_min, -+ ULONG high_mark, ULONG lock_size) -+{ -+ TODO(); -+} -+ -+wstdcall void *WIN_FUNC(IoAllocateErrorLogEntry,2) -+ (void *io_object, UCHAR entry_size) -+{ -+ /* not implemented fully */ -+ void *ret = kmalloc(sizeof(struct io_error_log_packet) + entry_size, -+ irql_gfp()); -+ TRACE2("%p", ret); -+ if (ret) -+ return ret + sizeof(struct io_error_log_packet); -+ else -+ return NULL; -+} -+ -+wstdcall void WIN_FUNC(IoWriteErrorLogEntry,1) -+ (void *entry) -+{ -+ /* TODO: log error with codes and message */ -+ ERROR(""); -+} -+ -+wstdcall void WIN_FUNC(IoFreeErrorLogEntry,1) -+ (void *entry) -+{ -+ TRACE2("%p", entry); -+ kfree(entry - sizeof(struct io_error_log_packet)); -+} -+ -+wstdcall NTSTATUS WIN_FUNC(IoAcquireRemoveLockEx,5) -+ (struct io_remove_lock *lock, void *tag, char *file, ULONG line, -+ ULONG lock_size) -+{ -+ TODO(); -+ IOEXIT(return STATUS_SUCCESS); -+} -+ -+wstdcall NTSTATUS WIN_FUNC(IoReleaseRemoveLockEx,3) -+ (struct io_remove_lock *lock, void *tag, ULONG lock_size) -+{ -+ TODO(); -+ IOEXIT(return STATUS_SUCCESS); -+} -+ -+wstdcall NTSTATUS WIN_FUNC(IoRegisterDeviceInterface,4) -+ (struct device_object *pdo, struct guid *guid_class, -+ struct unicode_string *reference, struct unicode_string *link) -+{ -+ struct ansi_string ansi; -+ -+ /* TODO: check if pdo is valid */ -+ RtlInitAnsiString(&ansi, "ndis"); -+ ENTER1("pdo: %p, ref: %p, link: %p, %x, %x, %x", pdo, reference, link, -+ guid_class->data1, guid_class->data2, guid_class->data3); -+ return RtlAnsiStringToUnicodeString(link, &ansi, TRUE); -+} -+ -+wstdcall NTSTATUS WIN_FUNC(IoSetDeviceInterfaceState,2) -+ (struct unicode_string *link, BOOLEAN enable) -+{ -+ ENTER1("link: %p, enable: %d", link, enable); -+ return STATUS_SUCCESS; -+} -+ -+wstdcall NTSTATUS WIN_FUNC(IoOpenDeviceRegistryKey,4) -+ (struct device_object *dev_obj, ULONG type, ACCESS_MASK mask, -+ void **handle) -+{ -+ ENTER1("dev_obj: %p", dev_obj); -+ *handle = dev_obj; -+ return STATUS_SUCCESS; -+} -+ -+wstdcall NTSTATUS WIN_FUNC(IoWMIRegistrationControl,2) -+ (struct device_object *dev_obj, ULONG action) -+{ -+ ENTER2("%p, %d", dev_obj, action); -+ EXIT2(return STATUS_SUCCESS); -+} -+ -+wstdcall void WIN_FUNC(IoInvalidateDeviceRelations,2) -+ (struct device_object *dev_obj, enum device_relation_type type) -+{ -+ INFO("%p, %d", dev_obj, type); -+ TODO(); -+} -+ -+wstdcall void WIN_FUNC(IoInvalidateDeviceState,1) -+ (struct device_object *pdo) -+{ -+ INFO("%p", pdo); -+ TODO(); -+} -+ -+wstdcall NTSTATUS WIN_FUNC(IoRegisterPlugPlayNotification,7) -+ (UINT category, ULONG flags, void *data, struct driver_object *object, -+ void *callback, void *context, void **notification_entry) -+{ -+ TRACE2("category: %d, flags 0x%x, data: %p, object: %p, callback: %p, " -+ "context: %p, notification_entry: %p", category, flags, data, -+ object, callback, context, notification_entry); -+ TODO(); -+ IOEXIT(return STATUS_SUCCESS); -+} -+ -+wstdcall NTSTATUS WIN_FUNC(IoUnregisterPlugPlayNotification,1) -+ (void *notification_entry) -+{ -+ TRACE2("%p", notification_entry); -+ TODO(); -+ IOEXIT(return STATUS_SUCCESS); -+} -+ -+wstdcall NTSTATUS WIN_FUNC(IoWMIOpenBlock,3) -+ (struct guid *guid, ULONG access, void *object) -+{ -+ TODO(); -+ IOEXIT(return STATUS_NOT_IMPLEMENTED); -+} -+ -+wstdcall NTSTATUS WIN_FUNC(IoWMIQueryAllData,3) -+ (void *data_block_object, UINT *buffer_size, void *buffer) -+{ -+ TODO(); -+ IOEXIT(return STATUS_NOT_IMPLEMENTED); -+} -+ -+wstdcall void WIN_FUNC(IoGetStackLimits,2) -+ (ULONG_PTR *LowLimit, ULONG_PTR *HighLimit) -+{ -+ *LowLimit = (ULONG_PTR)&LowLimit & ~(THREAD_SIZE - 1); -+ *HighLimit = *LowLimit + THREAD_SIZE; -+ IOTRACE("LowLimit: 0x%lx, HighLimit: 0x%lx", *LowLimit, *HighLimit); -+ IOEXIT(return); -+} -diff -Nurp linux-5.6.11/3rdparty/ndiswrapper/pe_linker.c linux-5.6.11-ndis/3rdparty/ndiswrapper/pe_linker.c ---- linux-5.6.11/3rdparty/ndiswrapper/pe_linker.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.6.11-ndis/3rdparty/ndiswrapper/pe_linker.c 2020-05-03 15:18:33.000000000 +0300 -@@ -0,0 +1,600 @@ -+/* -+ * Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ */ -+ -+#ifdef TEST_LOADER -+ -+#include "usr_linker.h" -+ -+#else -+ -+#include -+#include -+ -+//#define DEBUGLINKER 2 -+ -+#include "ntoskernel.h" -+ -+#endif -+ -+struct pe_exports { -+ char *dll; -+ char *name; -+ generic_func addr; -+}; -+ -+static struct pe_exports pe_exports[40]; -+static int num_pe_exports; -+ -+#define RVA2VA(image, rva, type) (type)(ULONG_PTR)((void *)image + rva) -+#define CHECK_SZ(a,b) { if (sizeof(a) != b) { \ -+ ERROR("%s is bad, got %zd, expected %d", \ -+ #a , sizeof(a), (b)); return -EINVAL; } } -+ -+#if defined(DEBUGLINKER) && DEBUGLINKER > 0 -+#define DBGLINKER(fmt, ...) printk(KERN_INFO "%s (%s:%d): " fmt "\n", \ -+ DRIVER_NAME, __func__, \ -+ __LINE__ , ## __VA_ARGS__); -+static const char *image_directory_name[] = { -+ "EXPORT", -+ "IMPORT", -+ "RESOURCE", -+ "EXCEPTION", -+ "SECURITY", -+ "BASERELOC", -+ "DEBUG", -+ "COPYRIGHT", -+ "GLOBALPTR", -+ "TLS", -+ "LOAD_CONFIG", -+ "BOUND_IMPORT", -+ "IAT", -+ "DELAY_IMPORT", -+ "COM_DESCRIPTOR" }; -+#else -+#define DBGLINKER(fmt, ...) do { } while (0) -+#endif -+ -+#ifndef TEST_LOADER -+extern struct wrap_export ntoskernel_exports[], ntoskernel_io_exports[], -+ ndis_exports[], crt_exports[], hal_exports[], rtl_exports[]; -+#ifdef ENABLE_USB -+extern struct wrap_export usb_exports[]; -+#endif -+ -+static int get_export(char *name, generic_func *func) -+{ -+ int i, j; -+ -+ struct wrap_export *exports[] = { -+ ntoskernel_exports, -+ ntoskernel_io_exports, -+ ndis_exports, -+ crt_exports, -+ hal_exports, -+ rtl_exports, -+#ifdef ENABLE_USB -+ usb_exports, -+#endif -+ }; -+ -+ for (j = 0; j < ARRAY_SIZE(exports); j++) -+ for (i = 0; exports[j][i].name != NULL; i++) -+ if (strcmp(exports[j][i].name, name) == 0) { -+ *func = exports[j][i].func; -+ return 0; -+ } -+ -+ for (i = 0; i < num_pe_exports; i++) -+ if (strcmp(pe_exports[i].name, name) == 0) { -+ *func = pe_exports[i].addr; -+ return 0; -+ } -+ -+ return -1; -+} -+#endif // TEST_LOADER -+ -+static void *get_dll_init(char *name) -+{ -+ int i; -+ for (i = 0; i < num_pe_exports; i++) -+ if ((strcmp(pe_exports[i].dll, name) == 0) && -+ (strcmp(pe_exports[i].name, "DllInitialize") == 0)) -+ return (void *)pe_exports[i].addr; -+ return NULL; -+} -+ -+/* -+ * Find and validate the coff header -+ * -+ */ -+static int check_nt_hdr(IMAGE_NT_HEADERS *nt_hdr) -+{ -+ int i; -+ WORD attr; -+ PIMAGE_OPTIONAL_HEADER opt_hdr; -+ -+ /* Validate the "PE\0\0" signature */ -+ if (nt_hdr->Signature != IMAGE_NT_SIGNATURE) { -+ ERROR("is this driver file? bad signature %08x", -+ nt_hdr->Signature); -+ return -EINVAL; -+ } -+ -+ opt_hdr = &nt_hdr->OptionalHeader; -+ /* Make sure Image is PE32 or PE32+ */ -+#ifdef CONFIG_X86_64 -+ if (opt_hdr->Magic != IMAGE_NT_OPTIONAL_HDR64_MAGIC) { -+ ERROR("kernel is 64-bit, but Windows driver is not 64-bit;" -+ "bad magic: %04X", opt_hdr->Magic); -+ return -EINVAL; -+ } -+#else -+ if (opt_hdr->Magic != IMAGE_NT_OPTIONAL_HDR32_MAGIC) { -+ ERROR("kernel is 32-bit, but Windows driver is not 32-bit;" -+ "bad magic: %04X", opt_hdr->Magic); -+ return -EINVAL; -+ } -+#endif -+ -+ /* Validate the image for the current architecture. */ -+#ifdef CONFIG_X86_64 -+ if (nt_hdr->FileHeader.Machine != IMAGE_FILE_MACHINE_AMD64) { -+ ERROR("kernel is 64-bit, but Windows driver is not 64-bit;" -+ " (PE signature is %04X)", nt_hdr->FileHeader.Machine); -+ return -EINVAL; -+ } -+#else -+ if (nt_hdr->FileHeader.Machine != IMAGE_FILE_MACHINE_I386) { -+ ERROR("kernel is 32-bit, but Windows driver is not 32-bit;" -+ " (PE signature is %04X)", nt_hdr->FileHeader.Machine); -+ return -EINVAL; -+ } -+#endif -+ -+ /* Must have attributes */ -+#ifdef CONFIG_X86_64 -+ attr = IMAGE_FILE_EXECUTABLE_IMAGE | IMAGE_FILE_LARGE_ADDRESS_AWARE; -+#else -+ attr = IMAGE_FILE_EXECUTABLE_IMAGE | IMAGE_FILE_32BIT_MACHINE; -+#endif -+ if ((nt_hdr->FileHeader.Characteristics & attr) != attr) -+ return -EINVAL; -+ -+ /* Must be relocatable */ -+ attr = IMAGE_FILE_RELOCS_STRIPPED; -+ if ((nt_hdr->FileHeader.Characteristics & attr)) -+ return -EINVAL; -+ -+ /* Make sure we have at least one section */ -+ if (nt_hdr->FileHeader.NumberOfSections == 0) -+ return -EINVAL; -+ -+ if (opt_hdr->SectionAlignment < opt_hdr->FileAlignment) { -+ ERROR("alignment mismatch: section: 0x%x, file: 0x%x", -+ opt_hdr->SectionAlignment, opt_hdr->FileAlignment); -+ return -EINVAL; -+ } -+ -+ DBGLINKER("number of datadictionary entries %d", -+ opt_hdr->NumberOfRvaAndSizes); -+ for (i = 0; i < opt_hdr->NumberOfRvaAndSizes; i++) { -+ DBGLINKER("datadirectory %s RVA:%X Size:%d", -+ (i <= IMAGE_DIRECTORY_ENTRY_COM_DESCRIPTOR) ? -+ image_directory_name[i] : "unknown", -+ opt_hdr->DataDirectory[i].VirtualAddress, -+ opt_hdr->DataDirectory[i].Size); -+ } -+ -+ if ((nt_hdr->FileHeader.Characteristics & IMAGE_FILE_EXECUTABLE_IMAGE)) -+ return IMAGE_FILE_EXECUTABLE_IMAGE; -+ if ((nt_hdr->FileHeader.Characteristics & IMAGE_FILE_DLL)) -+ return IMAGE_FILE_DLL; -+ return -EINVAL; -+} -+ -+static int import(void *image, IMAGE_IMPORT_DESCRIPTOR *dirent, char *dll) -+{ -+ ULONG_PTR *lookup_tbl, *address_tbl; -+ char *symname = NULL; -+ int i; -+ int ret = 0; -+ generic_func adr; -+ -+ lookup_tbl = RVA2VA(image, dirent->u.OriginalFirstThunk, ULONG_PTR *); -+ address_tbl = RVA2VA(image, dirent->FirstThunk, ULONG_PTR *); -+ -+ for (i = 0; lookup_tbl[i]; i++) { -+ if (IMAGE_SNAP_BY_ORDINAL(lookup_tbl[i])) { -+ ERROR("ordinal import not supported: %llu", -+ (uint64_t)lookup_tbl[i]); -+ return -1; -+ } -+ else { -+ symname = RVA2VA(image, -+ ((lookup_tbl[i] & -+ ~IMAGE_ORDINAL_FLAG) + 2), char *); -+ } -+ -+ if (get_export(symname, &adr) < 0) { -+ ERROR("unknown symbol: %s:'%s'", dll, symname); -+ ret = -1; -+ } else { -+ DBGLINKER("found symbol: %s:%s: addr: %p, rva = %llu", -+ dll, symname, adr, (uint64_t)address_tbl[i]); -+ address_tbl[i] = (ULONG_PTR)adr; -+ } -+ } -+ return ret; -+} -+ -+static int read_exports(struct pe_image *pe) -+{ -+ IMAGE_EXPORT_DIRECTORY *export_dir_table; -+ uint32_t *export_addr_table; -+ int i; -+ uint32_t *name_table; -+ PIMAGE_OPTIONAL_HEADER opt_hdr; -+ IMAGE_DATA_DIRECTORY *export_data_dir; -+ -+ opt_hdr = &pe->nt_hdr->OptionalHeader; -+ export_data_dir = -+ &opt_hdr->DataDirectory[IMAGE_DIRECTORY_ENTRY_EXPORT]; -+ -+ if (export_data_dir->Size == 0) { -+ DBGLINKER("no exports"); -+ return 0; -+ } -+ -+ export_dir_table = -+ RVA2VA(pe->image, export_data_dir->VirtualAddress, -+ IMAGE_EXPORT_DIRECTORY *); -+ -+ name_table = (unsigned int *)(pe->image + -+ export_dir_table->AddressOfNames); -+ export_addr_table = (uint32_t *) -+ (pe->image + export_dir_table->AddressOfFunctions); -+ -+ for (i = 0; i < export_dir_table->NumberOfNames; i++) { -+ -+ if (export_data_dir->VirtualAddress <= *export_addr_table || -+ *export_addr_table >= (export_data_dir->VirtualAddress + -+ export_data_dir->Size)) -+ DBGLINKER("forwarder rva"); -+ -+ DBGLINKER("export symbol: %s, at %p", -+ (char *)(pe->image + *name_table), -+ pe->image + *export_addr_table); -+ -+ pe_exports[num_pe_exports].dll = pe->name; -+ pe_exports[num_pe_exports].name = pe->image + *name_table; -+ pe_exports[num_pe_exports].addr = -+ pe->image + *export_addr_table; -+ -+ num_pe_exports++; -+ name_table++; -+ export_addr_table++; -+ } -+ return 0; -+} -+ -+static int fixup_imports(void *image, IMAGE_NT_HEADERS *nt_hdr) -+{ -+ int i; -+ char *name; -+ int ret = 0; -+ IMAGE_IMPORT_DESCRIPTOR *dirent; -+ IMAGE_DATA_DIRECTORY *import_data_dir; -+ PIMAGE_OPTIONAL_HEADER opt_hdr; -+ -+ opt_hdr = &nt_hdr->OptionalHeader; -+ import_data_dir = -+ &opt_hdr->DataDirectory[IMAGE_DIRECTORY_ENTRY_IMPORT]; -+ dirent = RVA2VA(image, import_data_dir->VirtualAddress, -+ IMAGE_IMPORT_DESCRIPTOR *); -+ -+ for (i = 0; dirent[i].Name; i++) { -+ name = RVA2VA(image, dirent[i].Name, char*); -+ -+ DBGLINKER("imports from dll: %s", name); -+ ret += import(image, &dirent[i], name); -+ } -+ return ret; -+} -+ -+static int fixup_reloc(void *image, IMAGE_NT_HEADERS *nt_hdr) -+{ -+ ULONG_PTR base; -+ ULONG_PTR size; -+ IMAGE_BASE_RELOCATION *fixup_block; -+ IMAGE_DATA_DIRECTORY *base_reloc_data_dir; -+ PIMAGE_OPTIONAL_HEADER opt_hdr; -+ -+ opt_hdr = &nt_hdr->OptionalHeader; -+ base = opt_hdr->ImageBase; -+ base_reloc_data_dir = -+ &opt_hdr->DataDirectory[IMAGE_DIRECTORY_ENTRY_BASERELOC]; -+ if (base_reloc_data_dir->Size == 0) -+ return 0; -+ -+ fixup_block = RVA2VA(image, base_reloc_data_dir->VirtualAddress, -+ IMAGE_BASE_RELOCATION *); -+ DBGLINKER("fixup_block=%p, image=%p", fixup_block, image); -+ DBGLINKER("fixup_block info: %x %d", -+ fixup_block->VirtualAddress, fixup_block->SizeOfBlock); -+ -+ while (fixup_block->SizeOfBlock) { -+ int i; -+ WORD fixup, offset; -+ -+ size = (fixup_block->SizeOfBlock - -+ sizeof(IMAGE_BASE_RELOCATION)) / sizeof(WORD); -+ DBGLINKER("found %llu relocations in this block", -+ (uint64_t)size); -+ -+ for (i = 0; i < size; i++) { -+ fixup = fixup_block->TypeOffset[i]; -+ offset = fixup & 0xfff; -+ switch ((fixup >> 12) & 0x0f) { -+ case IMAGE_REL_BASED_ABSOLUTE: -+ break; -+ -+ case IMAGE_REL_BASED_HIGHLOW: { -+ uint32_t addr; -+ uint32_t *loc = -+ RVA2VA(image, -+ fixup_block->VirtualAddress + -+ offset, uint32_t *); -+ addr = RVA2VA(image, (*loc - base), uint32_t); -+ DBGLINKER("relocation: *%p (Val:%X)= %X", -+ loc, *loc, addr); -+ *loc = addr; -+ } -+ break; -+ -+ case IMAGE_REL_BASED_DIR64: { -+ uint64_t addr; -+ uint64_t *loc = -+ RVA2VA(image, -+ fixup_block->VirtualAddress + -+ offset, uint64_t *); -+ addr = RVA2VA(image, (*loc - base), uint64_t); -+ DBGLINKER("relocation: *%p (Val:%llX)= %llx", -+ loc, *loc, addr); -+ *loc = addr; -+ } -+ break; -+ -+ default: -+ ERROR("unknown fixup: %08X", -+ (fixup >> 12) & 0x0f); -+ return -EOPNOTSUPP; -+ break; -+ } -+ } -+ DBGLINKER("finished relocating block"); -+ -+ fixup_block = (IMAGE_BASE_RELOCATION *) -+ ((void *)fixup_block + fixup_block->SizeOfBlock); -+ }; -+ DBGLINKER("done relocating all"); -+ -+ return 0; -+} -+ -+/* Expand the image in memory if necessary. The image on disk does not -+ * necessarily maps the image of the driver in memory, so we have to -+ * re-write it in order to fulfill the sections alignments. The -+ * advantage to do that is that rva_to_va becomes a simple -+ * addition. */ -+static int fix_pe_image(struct pe_image *pe) -+{ -+ void *image; -+ IMAGE_SECTION_HEADER *sect_hdr; -+ int i, sections; -+ int image_size; -+ -+ if (pe->size == pe->opt_hdr->SizeOfImage) { -+ /* Nothing to do */ -+ return 0; -+ } -+ -+ image_size = pe->opt_hdr->SizeOfImage; -+#ifdef CONFIG_X86_64 -+#ifdef PAGE_KERNEL_EXECUTABLE -+ image = __vmalloc(image_size, GFP_KERNEL | __GFP_HIGHMEM -+ ); -+#elif defined PAGE_KERNEL_EXEC -+ image = __vmalloc(image_size, GFP_KERNEL | __GFP_HIGHMEM -+ ); -+#else -+#error x86_64 should have either PAGE_KERNEL_EXECUTABLE or PAGE_KERNEL_EXEC -+#endif -+#else -+#ifdef cpu_has_nx -+ /* hate to play with kernel macros, but PAGE_KERNEL_EXEC is -+ * not available to modules! */ -+ if (cpu_has_nx) -+ image = __vmalloc(image_size, GFP_KERNEL | __GFP_HIGHMEM -+ ); -+ else -+ image = vmalloc(image_size); -+#else -+ image = vmalloc(image_size); -+#endif -+#endif -+ if (image == NULL) { -+ ERROR("failed to allocate enough space for new image:" -+ " %d bytes", image_size); -+ return -ENOMEM; -+ } -+ memset(image, 0, image_size); -+ -+ /* Copy all the headers, ie everything before the first section. */ -+ -+ sections = pe->nt_hdr->FileHeader.NumberOfSections; -+ sect_hdr = IMAGE_FIRST_SECTION(pe->nt_hdr); -+ -+ DBGLINKER("copying headers: %u bytes", sect_hdr->PointerToRawData); -+ -+ memcpy(image, pe->image, sect_hdr->PointerToRawData); -+ -+ /* Copy all the sections */ -+ for (i = 0; i < sections; i++) { -+ DBGLINKER("Copy section %s from %x to %x", -+ sect_hdr->Name, sect_hdr->PointerToRawData, -+ sect_hdr->VirtualAddress); -+ if (sect_hdr->VirtualAddress+sect_hdr->SizeOfRawData > -+ image_size) { -+ ERROR("Invalid section %s in driver", sect_hdr->Name); -+ vfree(image); -+ return -EINVAL; -+ } -+ -+ memcpy(image+sect_hdr->VirtualAddress, -+ pe->image + sect_hdr->PointerToRawData, -+ sect_hdr->SizeOfRawData); -+ sect_hdr++; -+ } -+ -+ vfree(pe->image); -+ pe->image = image; -+ pe->size = image_size; -+ -+ /* Update our internal pointers */ -+ pe->nt_hdr = (IMAGE_NT_HEADERS *) -+ (pe->image + ((IMAGE_DOS_HEADER *)pe->image)->e_lfanew); -+ pe->opt_hdr = &pe->nt_hdr->OptionalHeader; -+ -+ DBGLINKER("set nt headers: nt_hdr=%p, opt_hdr=%p, image=%p", -+ pe->nt_hdr, pe->opt_hdr, pe->image); -+ -+ return 0; -+} -+ -+#if defined(CONFIG_X86_64) -+static void fix_user_shared_data_addr(char *driver, unsigned long length) -+{ -+ unsigned long i, n, max_addr, *addr; -+ -+ TRACE1("fixing KI_USER_SHARED_DATA address in the driver"); -+ n = length - sizeof(unsigned long); -+ max_addr = KI_USER_SHARED_DATA + sizeof(kuser_shared_data); -+ for (i = 0; i < n; i++) { -+ addr = (unsigned long *)(driver + i); -+ if (*addr >= KI_USER_SHARED_DATA && *addr < max_addr) { -+ *addr -= KI_USER_SHARED_DATA; -+ *addr += (unsigned long)&kuser_shared_data; -+ kuser_shared_data.reserved1 = 1; -+ } -+ } -+} -+#endif -+ -+int link_pe_images(struct pe_image *pe_image, unsigned short n) -+{ -+ int i; -+ struct pe_image *pe; -+ -+#if DEBUG >= 1 -+ /* Sanity checks */ -+ CHECK_SZ(IMAGE_SECTION_HEADER, IMAGE_SIZEOF_SECTION_HEADER); -+ CHECK_SZ(IMAGE_FILE_HEADER, IMAGE_SIZEOF_FILE_HEADER); -+ CHECK_SZ(IMAGE_OPTIONAL_HEADER, IMAGE_SIZEOF_NT_OPTIONAL_HEADER); -+ CHECK_SZ(IMAGE_NT_HEADERS, 4 + IMAGE_SIZEOF_FILE_HEADER + -+ IMAGE_SIZEOF_NT_OPTIONAL_HEADER); -+ CHECK_SZ(IMAGE_DOS_HEADER, 0x40); -+ CHECK_SZ(IMAGE_EXPORT_DIRECTORY, 40); -+ CHECK_SZ(IMAGE_BASE_RELOCATION, 8); -+ CHECK_SZ(IMAGE_IMPORT_DESCRIPTOR, 20); -+#endif -+ -+ for (i = 0; i < n; i++) { -+ IMAGE_DOS_HEADER *dos_hdr; -+ pe = &pe_image[i]; -+ dos_hdr = pe->image; -+ -+ if (pe->size < sizeof(IMAGE_DOS_HEADER)) { -+ TRACE1("image too small: %d", pe->size); -+ return -EINVAL; -+ } -+ -+ pe->nt_hdr = -+ (IMAGE_NT_HEADERS *)(pe->image + dos_hdr->e_lfanew); -+ pe->opt_hdr = &pe->nt_hdr->OptionalHeader; -+ -+ pe->type = check_nt_hdr(pe->nt_hdr); -+ if (pe->type <= 0) { -+ TRACE1("type <= 0"); -+ return -EINVAL; -+ } -+ -+ if (fix_pe_image(pe)) { -+ TRACE1("bad PE image"); -+ return -EINVAL; -+ } -+ -+ if (read_exports(pe)) { -+ TRACE1("read exports failed"); -+ return -EINVAL; -+ } -+ } -+ -+ for (i = 0; i < n; i++) { -+ pe = &pe_image[i]; -+ -+ if (fixup_reloc(pe->image, pe->nt_hdr)) { -+ TRACE1("fixup reloc failed"); -+ return -EINVAL; -+ } -+ if (fixup_imports(pe->image, pe->nt_hdr)) { -+ TRACE1("fixup imports failed"); -+ return -EINVAL; -+ } -+#if defined(CONFIG_X86_64) -+ fix_user_shared_data_addr(pe_image[i].image, pe_image[i].size); -+#endif -+ flush_icache_range((unsigned long)pe->image, pe->size); -+ -+ pe->entry = -+ RVA2VA(pe->image, -+ pe->opt_hdr->AddressOfEntryPoint, void *); -+ TRACE1("entry is at %p, rva at %08X", pe->entry, -+ pe->opt_hdr->AddressOfEntryPoint); -+ } -+ -+ for (i = 0; i < n; i++) { -+ pe = &pe_image[i]; -+ -+ if (pe->type == IMAGE_FILE_DLL) { -+ struct unicode_string ustring; -+ char *buf = "0/0t0m0p00"; -+ int (*dll_entry)(struct unicode_string *ustring) -+ wstdcall; -+ -+ memset(&ustring, 0, sizeof(ustring)); -+ ustring.buf = (wchar_t *)buf; -+ dll_entry = (void *)get_dll_init(pe->name); -+ -+ TRACE1("calling dll_init at %p", dll_entry); -+ if (!dll_entry || dll_entry(&ustring)) -+ ERROR("DLL initialize failed for %s", -+ pe->name); -+ } -+ else if (pe->type != IMAGE_FILE_EXECUTABLE_IMAGE) -+ ERROR("illegal image type: %d", pe->type); -+ } -+ return 0; -+} -diff -Nurp linux-5.6.11/3rdparty/ndiswrapper/pe_linker.h linux-5.6.11-ndis/3rdparty/ndiswrapper/pe_linker.h ---- linux-5.6.11/3rdparty/ndiswrapper/pe_linker.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.6.11-ndis/3rdparty/ndiswrapper/pe_linker.h 2020-05-03 15:18:33.000000000 +0300 -@@ -0,0 +1,992 @@ -+/* -+ * This file is an excerpt of winnt.h from WINE, which bears the -+ * following copyright: -+ * -+ * Win32 definitions for Windows NT -+ * -+ * Copyright 1996 Alexandre Julliard -+ * -+ * This library is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU Lesser General Public -+ * License as published by the Free Software Foundation; either -+ * version 2.1 of the License, or (at your option) any later version. -+ * -+ * This library is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * Lesser General Public License for more details. -+ * -+ * You should have received a copy of the GNU Lesser General Public -+ * License along with this library; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -+ */ -+ -+/* -+ * File formats definitions -+ */ -+typedef struct _IMAGE_DOS_HEADER { -+ WORD e_magic; /* 00: MZ Header signature */ -+ WORD e_cblp; /* 02: Bytes on last page of file */ -+ WORD e_cp; /* 04: Pages in file */ -+ WORD e_crlc; /* 06: Relocations */ -+ WORD e_cparhdr; /* 08: Size of header in paragraphs */ -+ WORD e_minalloc; /* 0a: Minimum extra paragraphs needed */ -+ WORD e_maxalloc; /* 0c: Maximum extra paragraphs needed */ -+ WORD e_ss; /* 0e: Initial (relative) SS value */ -+ WORD e_sp; /* 10: Initial SP value */ -+ WORD e_csum; /* 12: Checksum */ -+ WORD e_ip; /* 14: Initial IP value */ -+ WORD e_cs; /* 16: Initial (relative) CS value */ -+ WORD e_lfarlc; /* 18: File address of relocation table */ -+ WORD e_ovno; /* 1a: Overlay number */ -+ WORD e_res[4]; /* 1c: Reserved words */ -+ WORD e_oemid; /* 24: OEM identifier (for e_oeminfo) */ -+ WORD e_oeminfo; /* 26: OEM information; e_oemid specific */ -+ WORD e_res2[10]; /* 28: Reserved words */ -+ DWORD e_lfanew; /* 3c: Offset to extended header */ -+} IMAGE_DOS_HEADER, *PIMAGE_DOS_HEADER; -+ -+#define IMAGE_DOS_SIGNATURE 0x5A4D /* MZ */ -+#define IMAGE_OS2_SIGNATURE 0x454E /* NE */ -+#define IMAGE_OS2_SIGNATURE_LE 0x454C /* LE */ -+#define IMAGE_OS2_SIGNATURE_LX 0x584C /* LX */ -+#define IMAGE_VXD_SIGNATURE 0x454C /* LE */ -+#define IMAGE_NT_SIGNATURE 0x00004550 /* PE00 */ -+ -+/* -+ * This is the Windows executable (NE) header. -+ * the name IMAGE_OS2_HEADER is misleading, but in the SDK this way. -+ */ -+typedef struct -+{ -+ WORD ne_magic; /* 00 NE signature 'NE' */ -+ BYTE ne_ver; /* 02 Linker version number */ -+ BYTE ne_rev; /* 03 Linker revision number */ -+ WORD ne_enttab; /* 04 Offset to entry table relative to NE */ -+ WORD ne_cbenttab; /* 06 Length of entry table in bytes */ -+ LONG ne_crc; /* 08 Checksum */ -+ WORD ne_flags; /* 0c Flags about segments in this file */ -+ WORD ne_autodata; /* 0e Automatic data segment number */ -+ WORD ne_heap; /* 10 Initial size of local heap */ -+ WORD ne_stack; /* 12 Initial size of stack */ -+ DWORD ne_csip; /* 14 Initial CS:IP */ -+ DWORD ne_sssp; /* 18 Initial SS:SP */ -+ WORD ne_cseg; /* 1c # of entries in segment table */ -+ WORD ne_cmod; /* 1e # of entries in module reference tab. */ -+ WORD ne_cbnrestab; /* 20 Length of nonresident-name table */ -+ WORD ne_segtab; /* 22 Offset to segment table */ -+ WORD ne_rsrctab; /* 24 Offset to resource table */ -+ WORD ne_restab; /* 26 Offset to resident-name table */ -+ WORD ne_modtab; /* 28 Offset to module reference table */ -+ WORD ne_imptab; /* 2a Offset to imported name table */ -+ DWORD ne_nrestab; /* 2c Offset to nonresident-name table */ -+ WORD ne_cmovent; /* 30 # of movable entry points */ -+ WORD ne_align; /* 32 Logical sector alignment shift count */ -+ WORD ne_cres; /* 34 # of resource segments */ -+ BYTE ne_exetyp; /* 36 Flags indicating target OS */ -+ BYTE ne_flagsothers; /* 37 Additional information flags */ -+ WORD ne_pretthunks; /* 38 Offset to return thunks */ -+ WORD ne_psegrefbytes; /* 3a Offset to segment ref. bytes */ -+ WORD ne_swaparea; /* 3c Reserved by Microsoft */ -+ WORD ne_expver; /* 3e Expected Windows version number */ -+} IMAGE_OS2_HEADER, *PIMAGE_OS2_HEADER; -+ -+typedef struct _IMAGE_VXD_HEADER { -+ WORD e32_magic; -+ BYTE e32_border; -+ BYTE e32_worder; -+ DWORD e32_level; -+ WORD e32_cpu; -+ WORD e32_os; -+ DWORD e32_ver; -+ DWORD e32_mflags; -+ DWORD e32_mpages; -+ DWORD e32_startobj; -+ DWORD e32_eip; -+ DWORD e32_stackobj; -+ DWORD e32_esp; -+ DWORD e32_pagesize; -+ DWORD e32_lastpagesize; -+ DWORD e32_fixupsize; -+ DWORD e32_fixupsum; -+ DWORD e32_ldrsize; -+ DWORD e32_ldrsum; -+ DWORD e32_objtab; -+ DWORD e32_objcnt; -+ DWORD e32_objmap; -+ DWORD e32_itermap; -+ DWORD e32_rsrctab; -+ DWORD e32_rsrccnt; -+ DWORD e32_restab; -+ DWORD e32_enttab; -+ DWORD e32_dirtab; -+ DWORD e32_dircnt; -+ DWORD e32_fpagetab; -+ DWORD e32_frectab; -+ DWORD e32_impmod; -+ DWORD e32_impmodcnt; -+ DWORD e32_impproc; -+ DWORD e32_pagesum; -+ DWORD e32_datapage; -+ DWORD e32_preload; -+ DWORD e32_nrestab; -+ DWORD e32_cbnrestab; -+ DWORD e32_nressum; -+ DWORD e32_autodata; -+ DWORD e32_debuginfo; -+ DWORD e32_debuglen; -+ DWORD e32_instpreload; -+ DWORD e32_instdemand; -+ DWORD e32_heapsize; -+ BYTE e32_res3[12]; -+ DWORD e32_winresoff; -+ DWORD e32_winreslen; -+ WORD e32_devid; -+ WORD e32_ddkver; -+} IMAGE_VXD_HEADER, *PIMAGE_VXD_HEADER; -+ -+/* These defines describe the meanings of the bits in the -+ Characteristics field */ -+ -+#define IMAGE_FILE_RELOCS_STRIPPED 0x0001 /* No relocation info */ -+#define IMAGE_FILE_EXECUTABLE_IMAGE 0x0002 -+#define IMAGE_FILE_LINE_NUMS_STRIPPED 0x0004 -+#define IMAGE_FILE_LOCAL_SYMS_STRIPPED 0x0008 -+#define IMAGE_FILE_AGGRESIVE_WS_TRIM 0x0010 -+#define IMAGE_FILE_LARGE_ADDRESS_AWARE 0x0020 -+#define IMAGE_FILE_16BIT_MACHINE 0x0040 -+#define IMAGE_FILE_BYTES_REVERSED_LO 0x0080 -+#define IMAGE_FILE_32BIT_MACHINE 0x0100 -+#define IMAGE_FILE_DEBUG_STRIPPED 0x0200 -+#define IMAGE_FILE_REMOVABLE_RUN_FROM_SWAP 0x0400 -+#define IMAGE_FILE_NET_RUN_FROM_SWAP 0x0800 -+#define IMAGE_FILE_SYSTEM 0x1000 -+#define IMAGE_FILE_DLL 0x2000 -+#define IMAGE_FILE_UP_SYSTEM_ONLY 0x4000 -+#define IMAGE_FILE_BYTES_REVERSED_HI 0x8000 -+ -+/* These are the settings of the Machine field. */ -+#define IMAGE_FILE_MACHINE_UNKNOWN 0 -+#define IMAGE_FILE_MACHINE_I860 0x014d -+#define IMAGE_FILE_MACHINE_I386 0x014c -+#define IMAGE_FILE_MACHINE_R3000 0x0162 -+#define IMAGE_FILE_MACHINE_R4000 0x0166 -+#define IMAGE_FILE_MACHINE_R10000 0x0168 -+#define IMAGE_FILE_MACHINE_WCEMIPSV2 0x0169 -+#define IMAGE_FILE_MACHINE_ALPHA 0x0184 -+#define IMAGE_FILE_MACHINE_SH3 0x01a2 -+#define IMAGE_FILE_MACHINE_SH3DSP 0x01a3 -+#define IMAGE_FILE_MACHINE_SH3E 0x01a4 -+#define IMAGE_FILE_MACHINE_SH4 0x01a6 -+#define IMAGE_FILE_MACHINE_SH5 0x01a8 -+#define IMAGE_FILE_MACHINE_ARM 0x01c0 -+#define IMAGE_FILE_MACHINE_THUMB 0x01c2 -+#define IMAGE_FILE_MACHINE_AM33 0x01d3 -+#define IMAGE_FILE_MACHINE_POWERPC 0x01f0 -+#define IMAGE_FILE_MACHINE_POWERPCFP 0x01f1 -+#define IMAGE_FILE_MACHINE_IA64 0x0200 -+#define IMAGE_FILE_MACHINE_MIPS16 0x0266 -+#define IMAGE_FILE_MACHINE_ALPHA64 0x0284 -+#define IMAGE_FILE_MACHINE_MIPSFPU 0x0366 -+#define IMAGE_FILE_MACHINE_MIPSFPU16 0x0466 -+#define IMAGE_FILE_MACHINE_AXP64 IMAGE_FILE_MACHINE_ALPHA64 -+#define IMAGE_FILE_MACHINE_TRICORE 0x0520 -+#define IMAGE_FILE_MACHINE_CEF 0x0cef -+#define IMAGE_FILE_MACHINE_EBC 0x0ebc -+#define IMAGE_FILE_MACHINE_AMD64 0x8664 -+#define IMAGE_FILE_MACHINE_M32R 0x9041 -+#define IMAGE_FILE_MACHINE_CEE 0xc0ee -+ -+#define IMAGE_SIZEOF_FILE_HEADER 20 -+#define IMAGE_SIZEOF_ROM_OPTIONAL_HEADER 56 -+#define IMAGE_SIZEOF_STD_OPTIONAL_HEADER 28 -+#define IMAGE_SIZEOF_NT_OPTIONAL_HEADER32 224 -+#define IMAGE_SIZEOF_NT_OPTIONAL_HEADER64 240 -+#define IMAGE_SIZEOF_SHORT_NAME 8 -+#define IMAGE_SIZEOF_SECTION_HEADER 40 -+#define IMAGE_SIZEOF_SYMBOL 18 -+#define IMAGE_SIZEOF_AUX_SYMBOL 18 -+#define IMAGE_SIZEOF_RELOCATION 10 -+#define IMAGE_SIZEOF_BASE_RELOCATION 8 -+#define IMAGE_SIZEOF_LINENUMBER 6 -+#define IMAGE_SIZEOF_ARCHIVE_MEMBER_HDR 60 -+ -+/* Possible Magic values */ -+#define IMAGE_NT_OPTIONAL_HDR32_MAGIC 0x010b -+#define IMAGE_NT_OPTIONAL_HDR64_MAGIC 0x020b -+#define IMAGE_ROM_OPTIONAL_HDR_MAGIC 0x0107 -+ -+#ifdef CONFIG_X86_64 -+#define IMAGE_SIZEOF_NT_OPTIONAL_HEADER IMAGE_SIZEOF_NT_OPTIONAL_HEADER64 -+#define IMAGE_NT_OPTIONAL_HDR_MAGIC IMAGE_NT_OPTIONAL_HDR64_MAGIC -+#else -+#define IMAGE_SIZEOF_NT_OPTIONAL_HEADER IMAGE_SIZEOF_NT_OPTIONAL_HEADER32 -+#define IMAGE_NT_OPTIONAL_HDR_MAGIC IMAGE_NT_OPTIONAL_HDR32_MAGIC -+#endif -+ -+/* These are indexes into the DataDirectory array */ -+#define IMAGE_FILE_EXPORT_DIRECTORY 0 -+#define IMAGE_FILE_IMPORT_DIRECTORY 1 -+#define IMAGE_FILE_RESOURCE_DIRECTORY 2 -+#define IMAGE_FILE_EXCEPTION_DIRECTORY 3 -+#define IMAGE_FILE_SECURITY_DIRECTORY 4 -+#define IMAGE_FILE_BASE_RELOCATION_TABLE 5 -+#define IMAGE_FILE_DEBUG_DIRECTORY 6 -+#define IMAGE_FILE_DESCRIPTION_STRING 7 -+#define IMAGE_FILE_MACHINE_VALUE 8 /* Mips */ -+#define IMAGE_FILE_THREAD_LOCAL_STORAGE 9 -+#define IMAGE_FILE_CALLBACK_DIRECTORY 10 -+ -+/* Directory Entries, indices into the DataDirectory array */ -+ -+#define IMAGE_DIRECTORY_ENTRY_EXPORT 0 -+#define IMAGE_DIRECTORY_ENTRY_IMPORT 1 -+#define IMAGE_DIRECTORY_ENTRY_RESOURCE 2 -+#define IMAGE_DIRECTORY_ENTRY_EXCEPTION 3 -+#define IMAGE_DIRECTORY_ENTRY_SECURITY 4 -+#define IMAGE_DIRECTORY_ENTRY_BASERELOC 5 -+#define IMAGE_DIRECTORY_ENTRY_DEBUG 6 -+#define IMAGE_DIRECTORY_ENTRY_COPYRIGHT 7 -+#define IMAGE_DIRECTORY_ENTRY_GLOBALPTR 8 /* (MIPS GP) */ -+#define IMAGE_DIRECTORY_ENTRY_TLS 9 -+#define IMAGE_DIRECTORY_ENTRY_LOAD_CONFIG 10 -+#define IMAGE_DIRECTORY_ENTRY_BOUND_IMPORT 11 -+#define IMAGE_DIRECTORY_ENTRY_IAT 12 /* Import Address Table */ -+#define IMAGE_DIRECTORY_ENTRY_DELAY_IMPORT 13 -+#define IMAGE_DIRECTORY_ENTRY_COM_DESCRIPTOR 14 -+ -+/* Subsystem Values */ -+ -+#define IMAGE_SUBSYSTEM_UNKNOWN 0 -+#define IMAGE_SUBSYSTEM_NATIVE 1 -+#define IMAGE_SUBSYSTEM_WINDOWS_GUI 2 /* Windows GUI subsystem */ -+#define IMAGE_SUBSYSTEM_WINDOWS_CUI 3 /* Windows character subsystem */ -+#define IMAGE_SUBSYSTEM_OS2_CUI 5 -+#define IMAGE_SUBSYSTEM_POSIX_CUI 7 -+#define IMAGE_SUBSYSTEM_NATIVE_WINDOWS 8 /* native Win9x driver */ -+#define IMAGE_SUBSYSTEM_WINDOWS_CE_GUI 9 /* Windows CE subsystem */ -+#define IMAGE_SUBSYSTEM_EFI_APPLICATION 10 -+#define IMAGE_SUBSYSTEM_EFI_BOOT_SERVICE_DRIVER 11 -+#define IMAGE_SUBSYSTEM_EFI_RUNTIME_DRIVER 12 -+#define IMAGE_SUBSYSTEM_EFI_ROM 13 -+#define IMAGE_SUBSYSTEM_XBOX 14 -+ -+typedef struct _IMAGE_FILE_HEADER { -+ WORD Machine; -+ WORD NumberOfSections; -+ DWORD TimeDateStamp; -+ DWORD PointerToSymbolTable; -+ DWORD NumberOfSymbols; -+ WORD SizeOfOptionalHeader; -+ WORD Characteristics; -+} IMAGE_FILE_HEADER, *PIMAGE_FILE_HEADER; -+ -+typedef struct _IMAGE_DATA_DIRECTORY { -+ DWORD VirtualAddress; -+ DWORD Size; -+} IMAGE_DATA_DIRECTORY, *PIMAGE_DATA_DIRECTORY; -+ -+#define IMAGE_NUMBEROF_DIRECTORY_ENTRIES 16 -+ -+typedef struct _IMAGE_OPTIONAL_HEADER32 { -+ -+ /* Standard fields */ -+ -+ WORD Magic; -+ BYTE MajorLinkerVersion; -+ BYTE MinorLinkerVersion; -+ DWORD SizeOfCode; -+ DWORD SizeOfInitializedData; -+ DWORD SizeOfUninitializedData; -+ DWORD AddressOfEntryPoint; -+ DWORD BaseOfCode; -+ DWORD BaseOfData; -+ -+ /* NT additional fields */ -+ DWORD ImageBase; -+ DWORD SectionAlignment; -+ DWORD FileAlignment; -+ WORD MajorOperatingSystemVersion; -+ WORD MinorOperatingSystemVersion; -+ WORD MajorImageVersion; -+ WORD MinorImageVersion; -+ WORD MajorSubsystemVersion; -+ WORD MinorSubsystemVersion; -+ DWORD Win32VersionValue; -+ DWORD SizeOfImage; -+ DWORD SizeOfHeaders; -+ DWORD CheckSum; -+ WORD Subsystem; -+ WORD DllCharacteristics; -+ DWORD SizeOfStackReserve; -+ DWORD SizeOfStackCommit; -+ DWORD SizeOfHeapReserve; -+ DWORD SizeOfHeapCommit; -+ DWORD LoaderFlags; -+ DWORD NumberOfRvaAndSizes; -+ IMAGE_DATA_DIRECTORY DataDirectory[IMAGE_NUMBEROF_DIRECTORY_ENTRIES]; -+} IMAGE_OPTIONAL_HEADER32, *PIMAGE_OPTIONAL_HEADER32; -+ -+typedef struct _IMAGE_OPTIONAL_HEADER64 { -+ -+ /* Standard fields */ -+ -+ WORD Magic; -+ BYTE MajorLinkerVersion; -+ BYTE MinorLinkerVersion; -+ DWORD SizeOfCode; -+ DWORD SizeOfInitializedData; -+ DWORD SizeOfUninitializedData; -+ DWORD AddressOfEntryPoint; -+ DWORD BaseOfCode; -+ -+ /* NT additional fields */ -+ ULONGLONG ImageBase; -+ DWORD SectionAlignment; -+ DWORD FileAlignment; -+ WORD MajorOperatingSystemVersion; -+ WORD MinorOperatingSystemVersion; -+ WORD MajorImageVersion; -+ WORD MinorImageVersion; -+ WORD MajorSubsystemVersion; -+ WORD MinorSubsystemVersion; -+ DWORD Win32VersionValue; -+ DWORD SizeOfImage; -+ DWORD SizeOfHeaders; -+ DWORD CheckSum; -+ WORD Subsystem; -+ WORD DllCharacteristics; -+ ULONGLONG SizeOfStackReserve; -+ ULONGLONG SizeOfStackCommit; -+ ULONGLONG SizeOfHeapReserve; -+ ULONGLONG SizeOfHeapCommit; -+ DWORD LoaderFlags; -+ DWORD NumberOfRvaAndSizes; -+ IMAGE_DATA_DIRECTORY DataDirectory[IMAGE_NUMBEROF_DIRECTORY_ENTRIES]; -+} IMAGE_OPTIONAL_HEADER64, *PIMAGE_OPTIONAL_HEADER64; -+ -+#ifdef CONFIG_X86_64 -+typedef IMAGE_OPTIONAL_HEADER64 IMAGE_OPTIONAL_HEADER; -+typedef PIMAGE_OPTIONAL_HEADER64 PIMAGE_OPTIONAL_HEADER; -+#else -+typedef IMAGE_OPTIONAL_HEADER32 IMAGE_OPTIONAL_HEADER; -+typedef PIMAGE_OPTIONAL_HEADER32 PIMAGE_OPTIONAL_HEADER; -+#endif -+ -+typedef struct _IMAGE_NT_HEADERS32 { -+ DWORD Signature; /* "PE"\0\0 */ /* 0x00 */ -+ IMAGE_FILE_HEADER FileHeader; /* 0x04 */ -+ IMAGE_OPTIONAL_HEADER32 OptionalHeader; /* 0x18 */ -+} IMAGE_NT_HEADERS32, *PIMAGE_NT_HEADERS32; -+ -+typedef struct _IMAGE_NT_HEADERS64 { -+ DWORD Signature; /* "PE"\0\0 */ /* 0x00 */ -+ IMAGE_FILE_HEADER FileHeader; /* 0x04 */ -+ IMAGE_OPTIONAL_HEADER64 OptionalHeader; /* 0x18 */ -+} IMAGE_NT_HEADERS64, *PIMAGE_NT_HEADERS64; -+ -+#ifdef CONFIG_X86_64 -+typedef IMAGE_NT_HEADERS64 IMAGE_NT_HEADERS; -+typedef PIMAGE_NT_HEADERS64 PIMAGE_NT_HEADERS; -+#else -+typedef IMAGE_NT_HEADERS32 IMAGE_NT_HEADERS; -+typedef PIMAGE_NT_HEADERS32 PIMAGE_NT_HEADERS; -+#endif -+ -+#define IMAGE_SIZEOF_SHORT_NAME 8 -+ -+typedef struct _IMAGE_SECTION_HEADER { -+ BYTE Name[IMAGE_SIZEOF_SHORT_NAME]; -+ union { -+ DWORD PhysicalAddress; -+ DWORD VirtualSize; -+ } Misc; -+ DWORD VirtualAddress; -+ DWORD SizeOfRawData; -+ DWORD PointerToRawData; -+ DWORD PointerToRelocations; -+ DWORD PointerToLinenumbers; -+ WORD NumberOfRelocations; -+ WORD NumberOfLinenumbers; -+ DWORD Characteristics; -+} IMAGE_SECTION_HEADER, *PIMAGE_SECTION_HEADER; -+ -+#define IMAGE_SIZEOF_SECTION_HEADER 40 -+ -+#define IMAGE_FIRST_SECTION(ntheader) \ -+((PIMAGE_SECTION_HEADER)((LPBYTE)&((PIMAGE_NT_HEADERS)(ntheader))->OptionalHeader + \ -+((PIMAGE_NT_HEADERS)(ntheader))->FileHeader.SizeOfOptionalHeader)) -+ -+/* These defines are for the Characteristics bitfield. */ -+/* #define IMAGE_SCN_TYPE_REG 0x00000000 - Reserved */ -+/* #define IMAGE_SCN_TYPE_DSECT 0x00000001 - Reserved */ -+/* #define IMAGE_SCN_TYPE_NOLOAD 0x00000002 - Reserved */ -+/* #define IMAGE_SCN_TYPE_GROUP 0x00000004 - Reserved */ -+#define IMAGE_SCN_TYPE_NO_PAD 0x00000008 /* Reserved */ -+/* #define IMAGE_SCN_TYPE_COPY 0x00000010 - Reserved */ -+ -+#define IMAGE_SCN_CNT_CODE 0x00000020 -+#define IMAGE_SCN_CNT_INITIALIZED_DATA 0x00000040 -+#define IMAGE_SCN_CNT_UNINITIALIZED_DATA 0x00000080 -+ -+#define IMAGE_SCN_LNK_OTHER 0x00000100 -+#define IMAGE_SCN_LNK_INFO 0x00000200 -+/* #define IMAGE_SCN_TYPE_OVER 0x00000400 - Reserved */ -+#define IMAGE_SCN_LNK_REMOVE 0x00000800 -+#define IMAGE_SCN_LNK_COMDAT 0x00001000 -+ -+/* 0x00002000 - Reserved */ -+/* #define IMAGE_SCN_MEM_PROTECTED 0x00004000 - Obsolete */ -+#define IMAGE_SCN_MEM_FARDATA 0x00008000 -+ -+/* #define IMAGE_SCN_MEM_SYSHEAP 0x00010000 - Obsolete */ -+#define IMAGE_SCN_MEM_PURGEABLE 0x00020000 -+#define IMAGE_SCN_MEM_16BIT 0x00020000 -+#define IMAGE_SCN_MEM_LOCKED 0x00040000 -+#define IMAGE_SCN_MEM_PRELOAD 0x00080000 -+ -+#define IMAGE_SCN_ALIGN_1BYTES 0x00100000 -+#define IMAGE_SCN_ALIGN_2BYTES 0x00200000 -+#define IMAGE_SCN_ALIGN_4BYTES 0x00300000 -+#define IMAGE_SCN_ALIGN_8BYTES 0x00400000 -+#define IMAGE_SCN_ALIGN_16BYTES 0x00500000 /* Default */ -+#define IMAGE_SCN_ALIGN_32BYTES 0x00600000 -+#define IMAGE_SCN_ALIGN_64BYTES 0x00700000 -+#define IMAGE_SCN_ALIGN_128BYTES 0x00800000 -+#define IMAGE_SCN_ALIGN_256BYTES 0x00900000 -+#define IMAGE_SCN_ALIGN_512BYTES 0x00A00000 -+#define IMAGE_SCN_ALIGN_1024BYTES 0x00B00000 -+#define IMAGE_SCN_ALIGN_2048BYTES 0x00C00000 -+#define IMAGE_SCN_ALIGN_4096BYTES 0x00D00000 -+#define IMAGE_SCN_ALIGN_8192BYTES 0x00E00000 -+/* 0x00F00000 - Unused */ -+#define IMAGE_SCN_ALIGN_MASK 0x00F00000 -+ -+#define IMAGE_SCN_LNK_NRELOC_OVFL 0x01000000 -+ -+ -+#define IMAGE_SCN_MEM_DISCARDABLE 0x02000000 -+#define IMAGE_SCN_MEM_NOT_CACHED 0x04000000 -+#define IMAGE_SCN_MEM_NOT_PAGED 0x08000000 -+#define IMAGE_SCN_MEM_SHARED 0x10000000 -+#define IMAGE_SCN_MEM_EXECUTE 0x20000000 -+#define IMAGE_SCN_MEM_READ 0x40000000 -+#define IMAGE_SCN_MEM_WRITE 0x80000000 -+ -+typedef struct _IMAGE_SYMBOL { -+ union { -+ BYTE ShortName[8]; -+ struct { -+ DWORD Short; -+ DWORD Long; -+ } Name; -+ DWORD LongName[2]; -+ } N; -+ DWORD Value; -+ SHORT SectionNumber; -+ WORD Type; -+ BYTE StorageClass; -+ BYTE NumberOfAuxSymbols; -+} IMAGE_SYMBOL; -+typedef IMAGE_SYMBOL *PIMAGE_SYMBOL; -+ -+#define IMAGE_SIZEOF_SYMBOL 18 -+ -+typedef struct _IMAGE_LINENUMBER { -+ union { -+ DWORD SymbolTableIndex; -+ DWORD VirtualAddress; -+ } Type; -+ WORD Linenumber; -+} IMAGE_LINENUMBER; -+typedef IMAGE_LINENUMBER *PIMAGE_LINENUMBER; -+ -+#define IMAGE_SIZEOF_LINENUMBER 6 -+ -+typedef union _IMAGE_AUX_SYMBOL { -+ struct { -+ DWORD TagIndex; -+ union { -+ struct { -+ WORD Linenumber; -+ WORD Size; -+ } LnSz; -+ DWORD TotalSize; -+ } Misc; -+ union { -+ struct { -+ DWORD PointerToLinenumber; -+ DWORD PointerToNextFunction; -+ } Function; -+ struct { -+ WORD Dimension[4]; -+ } Array; -+ } FcnAry; -+ WORD TvIndex; -+ } Sym; -+ struct { -+ BYTE Name[IMAGE_SIZEOF_SYMBOL]; -+ } File; -+ struct { -+ DWORD Length; -+ WORD NumberOfRelocations; -+ WORD NumberOfLinenumbers; -+ DWORD CheckSum; -+ SHORT Number; -+ BYTE Selection; -+ } Section; -+} IMAGE_AUX_SYMBOL; -+typedef IMAGE_AUX_SYMBOL *PIMAGE_AUX_SYMBOL; -+ -+#define IMAGE_SIZEOF_AUX_SYMBOL 18 -+ -+#define IMAGE_SYM_UNDEFINED (SHORT)0 -+#define IMAGE_SYM_ABSOLUTE (SHORT)-1 -+#define IMAGE_SYM_DEBUG (SHORT)-2 -+ -+#define IMAGE_SYM_TYPE_NULL 0x0000 -+#define IMAGE_SYM_TYPE_VOID 0x0001 -+#define IMAGE_SYM_TYPE_CHAR 0x0002 -+#define IMAGE_SYM_TYPE_SHORT 0x0003 -+#define IMAGE_SYM_TYPE_INT 0x0004 -+#define IMAGE_SYM_TYPE_LONG 0x0005 -+#define IMAGE_SYM_TYPE_FLOAT 0x0006 -+#define IMAGE_SYM_TYPE_DOUBLE 0x0007 -+#define IMAGE_SYM_TYPE_STRUCT 0x0008 -+#define IMAGE_SYM_TYPE_UNION 0x0009 -+#define IMAGE_SYM_TYPE_ENUM 0x000A -+#define IMAGE_SYM_TYPE_MOE 0x000B -+#define IMAGE_SYM_TYPE_BYTE 0x000C -+#define IMAGE_SYM_TYPE_WORD 0x000D -+#define IMAGE_SYM_TYPE_UINT 0x000E -+#define IMAGE_SYM_TYPE_DWORD 0x000F -+#define IMAGE_SYM_TYPE_PCODE 0x8000 -+ -+#define IMAGE_SYM_DTYPE_NULL 0 -+#define IMAGE_SYM_DTYPE_POINTER 1 -+#define IMAGE_SYM_DTYPE_FUNCTION 2 -+#define IMAGE_SYM_DTYPE_ARRAY 3 -+ -+#define IMAGE_SYM_CLASS_END_OF_FUNCTION (BYTE )-1 -+#define IMAGE_SYM_CLASS_NULL 0x0000 -+#define IMAGE_SYM_CLASS_AUTOMATIC 0x0001 -+#define IMAGE_SYM_CLASS_EXTERNAL 0x0002 -+#define IMAGE_SYM_CLASS_STATIC 0x0003 -+#define IMAGE_SYM_CLASS_REGISTER 0x0004 -+#define IMAGE_SYM_CLASS_EXTERNAL_DEF 0x0005 -+#define IMAGE_SYM_CLASS_LABEL 0x0006 -+#define IMAGE_SYM_CLASS_UNDEFINED_LABEL 0x0007 -+#define IMAGE_SYM_CLASS_MEMBER_OF_STRUCT 0x0008 -+#define IMAGE_SYM_CLASS_ARGUMENT 0x0009 -+#define IMAGE_SYM_CLASS_STRUCT_TAG 0x000A -+#define IMAGE_SYM_CLASS_MEMBER_OF_UNION 0x000B -+#define IMAGE_SYM_CLASS_UNION_TAG 0x000C -+#define IMAGE_SYM_CLASS_TYPE_DEFINITION 0x000D -+#define IMAGE_SYM_CLASS_UNDEFINED_STATIC 0x000E -+#define IMAGE_SYM_CLASS_ENUM_TAG 0x000F -+#define IMAGE_SYM_CLASS_MEMBER_OF_ENUM 0x0010 -+#define IMAGE_SYM_CLASS_REGISTER_PARAM 0x0011 -+#define IMAGE_SYM_CLASS_BIT_FIELD 0x0012 -+ -+#define IMAGE_SYM_CLASS_FAR_EXTERNAL 0x0044 -+#define IMAGE_SYM_CLASS_BLOCK 0x0064 -+#define IMAGE_SYM_CLASS_FUNCTION 0x0065 -+#define IMAGE_SYM_CLASS_END_OF_STRUCT 0x0066 -+#define IMAGE_SYM_CLASS_FILE 0x0067 -+#define IMAGE_SYM_CLASS_SECTION 0x0068 -+#define IMAGE_SYM_CLASS_WEAK_EXTERNAL 0x0069 -+ -+#define N_BTMASK 0x000F -+#define N_TMASK 0x0030 -+#define N_TMASK1 0x00C0 -+#define N_TMASK2 0x00F0 -+#define N_BTSHFT 4 -+#define N_TSHIFT 2 -+ -+#define BTYPE(x) ((x) & N_BTMASK) -+ -+#ifndef ISPTR -+#define ISPTR(x) (((x) & N_TMASK) == (IMAGE_SYM_DTYPE_POINTER << N_BTSHFT)) -+#endif -+ -+#ifndef ISFCN -+#define ISFCN(x) (((x) & N_TMASK) == (IMAGE_SYM_DTYPE_FUNCTION << N_BTSHFT)) -+#endif -+ -+#ifndef ISARY -+#define ISARY(x) (((x) & N_TMASK) == (IMAGE_SYM_DTYPE_ARRAY << N_BTSHFT)) -+#endif -+ -+#ifndef ISTAG -+#define ISTAG(x) ((x)==IMAGE_SYM_CLASS_STRUCT_TAG || (x)==IMAGE_SYM_CLASS_UNION_TAG || (x)==IMAGE_SYM_CLASS_ENUM_TAG) -+#endif -+ -+#ifndef INCREF -+#define INCREF(x) ((((x)&~N_BTMASK)<>N_TSHIFT)&~N_BTMASK)|((x)&N_BTMASK)) -+#endif -+ -+#define IMAGE_COMDAT_SELECT_NODUPLICATES 1 -+#define IMAGE_COMDAT_SELECT_ANY 2 -+#define IMAGE_COMDAT_SELECT_SAME_SIZE 3 -+#define IMAGE_COMDAT_SELECT_EXACT_MATCH 4 -+#define IMAGE_COMDAT_SELECT_ASSOCIATIVE 5 -+#define IMAGE_COMDAT_SELECT_LARGEST 6 -+#define IMAGE_COMDAT_SELECT_NEWEST 7 -+ -+#define IMAGE_WEAK_EXTERN_SEARCH_NOLIBRARY 1 -+#define IMAGE_WEAK_EXTERN_SEARCH_LIBRARY 2 -+#define IMAGE_WEAK_EXTERN_SEARCH_ALIAS 3 -+ -+/* Export module directory */ -+ -+typedef struct _IMAGE_EXPORT_DIRECTORY { -+ DWORD Characteristics; -+ DWORD TimeDateStamp; -+ WORD MajorVersion; -+ WORD MinorVersion; -+ DWORD Name; -+ DWORD Base; -+ DWORD NumberOfFunctions; -+ DWORD NumberOfNames; -+ DWORD AddressOfFunctions; -+ DWORD AddressOfNames; -+ DWORD AddressOfNameOrdinals; -+} IMAGE_EXPORT_DIRECTORY,*PIMAGE_EXPORT_DIRECTORY; -+ -+/* Import name entry */ -+typedef struct _IMAGE_IMPORT_BY_NAME { -+ WORD Hint; -+ BYTE Name[1]; -+} IMAGE_IMPORT_BY_NAME,*PIMAGE_IMPORT_BY_NAME; -+ -+/* Import thunk */ -+typedef struct _IMAGE_THUNK_DATA32 { -+ union { -+ DWORD ForwarderString; -+ DWORD Function; -+ DWORD Ordinal; -+ DWORD AddressOfData; -+ } u1; -+} IMAGE_THUNK_DATA32,*PIMAGE_THUNK_DATA32; -+ -+typedef struct _IMAGE_THUNK_DATA64 { -+ union { -+ ULONGLONG ForwarderString; -+ ULONGLONG Function; -+ ULONGLONG Ordinal; -+ ULONGLONG AddressOfData; -+ } u1; -+} IMAGE_THUNK_DATA64,*PIMAGE_THUNK_DATA64; -+ -+#ifdef CONFIG_X86_64 -+typedef IMAGE_THUNK_DATA32 IMAGE_THUNK_DATA; -+typedef PIMAGE_THUNK_DATA32 PIMAGE_THUNK_DATA; -+#else -+typedef IMAGE_THUNK_DATA64 IMAGE_THUNK_DATA; -+typedef PIMAGE_THUNK_DATA64 PIMAGE_THUNK_DATA; -+#endif -+ -+/* Import module directory */ -+ -+typedef struct __packed _IMAGE_IMPORT_DESCRIPTOR { -+ union { -+ DWORD Characteristics; /* 0 for terminating null -+ * import descriptor */ -+ DWORD OriginalFirstThunk; /* RVA to original unbound -+ * IAT */ -+ } u; -+ DWORD TimeDateStamp; /* 0 if not bound, -+ * -1 if bound, and real date\time stamp -+ * in IMAGE_DIRECTORY_ENTRY_BOUND_IMPORT -+ * (new BIND) -+ * otherwise date/time stamp of DLL bound to -+ * (Old BIND) -+ */ -+ DWORD ForwarderChain; /* -1 if no forwarders */ -+ DWORD Name; -+ /* RVA to IAT (if bound this IAT has actual addresses) */ -+ DWORD FirstThunk; -+} IMAGE_IMPORT_DESCRIPTOR,*PIMAGE_IMPORT_DESCRIPTOR; -+ -+#define IMAGE_ORDINAL_FLAG32 0x80000000 -+#define IMAGE_ORDINAL_FLAG64 0x8000000000000000UL -+#define IMAGE_SNAP_BY_ORDINAL32(Ordinal) ((Ordinal & IMAGE_ORDINAL_FLAG32) != 0) -+#define IMAGE_SNAP_BY_ORDINAL64(Ordinal) ((Ordinal & IMAGE_ORDINAL_FLAG64) != 0) -+#define IMAGE_ORDINAL(Ordinal) (Ordinal & 0xffff) -+ -+#ifdef CONFIG_X86_64 -+#define IMAGE_ORDINAL_FLAG IMAGE_ORDINAL_FLAG64 -+#define IMAGE_SNAP_BY_ORDINAL IMAGE_SNAP_BY_ORDINAL64 -+#else -+#define IMAGE_ORDINAL_FLAG IMAGE_ORDINAL_FLAG32 -+#define IMAGE_SNAP_BY_ORDINAL IMAGE_SNAP_BY_ORDINAL32 -+#endif -+ -+typedef struct _IMAGE_BOUND_IMPORT_DESCRIPTOR -+{ -+ DWORD TimeDateStamp; -+ WORD OffsetModuleName; -+ WORD NumberOfModuleForwarderRefs; -+/* Array of zero or more IMAGE_BOUND_FORWARDER_REF follows */ -+} IMAGE_BOUND_IMPORT_DESCRIPTOR, *PIMAGE_BOUND_IMPORT_DESCRIPTOR; -+ -+typedef struct _IMAGE_BOUND_FORWARDER_REF -+{ -+ DWORD TimeDateStamp; -+ WORD OffsetModuleName; -+ WORD Reserved; -+} IMAGE_BOUND_FORWARDER_REF, *PIMAGE_BOUND_FORWARDER_REF; -+ -+typedef struct _IMAGE_BASE_RELOCATION -+{ -+ DWORD VirtualAddress; -+ DWORD SizeOfBlock; -+ WORD TypeOffset[0]; -+} IMAGE_BASE_RELOCATION,*PIMAGE_BASE_RELOCATION; -+ -+typedef struct _IMAGE_RELOCATION -+{ -+ union { -+ DWORD VirtualAddress; -+ DWORD RelocCount; -+ } DUMMYUNIONNAME; -+ DWORD SymbolTableIndex; -+ WORD Type; -+} IMAGE_RELOCATION, *PIMAGE_RELOCATION; -+ -+#define IMAGE_SIZEOF_RELOCATION 10 -+ -+/* generic relocation types */ -+#define IMAGE_REL_BASED_ABSOLUTE 0 -+#define IMAGE_REL_BASED_HIGH 1 -+#define IMAGE_REL_BASED_LOW 2 -+#define IMAGE_REL_BASED_HIGHLOW 3 -+#define IMAGE_REL_BASED_HIGHADJ 4 -+#define IMAGE_REL_BASED_MIPS_JMPADDR 5 -+#define IMAGE_REL_BASED_SECTION 6 -+#define IMAGE_REL_BASED_REL 7 -+#define IMAGE_REL_BASED_MIPS_JMPADDR16 9 -+#define IMAGE_REL_BASED_IA64_IMM64 9 /* yes, 9 too */ -+#define IMAGE_REL_BASED_DIR64 10 -+#define IMAGE_REL_BASED_HIGH3ADJ 11 -+ -+/* I386 relocation types */ -+#define IMAGE_REL_I386_ABSOLUTE 0 -+#define IMAGE_REL_I386_DIR16 1 -+#define IMAGE_REL_I386_REL16 2 -+#define IMAGE_REL_I386_DIR32 6 -+#define IMAGE_REL_I386_DIR32NB 7 -+#define IMAGE_REL_I386_SEG12 9 -+#define IMAGE_REL_I386_SECTION 10 -+#define IMAGE_REL_I386_SECREL 11 -+#define IMAGE_REL_I386_REL32 20 -+ -+/* MIPS relocation types */ -+#define IMAGE_REL_MIPS_ABSOLUTE 0x0000 -+#define IMAGE_REL_MIPS_REFHALF 0x0001 -+#define IMAGE_REL_MIPS_REFWORD 0x0002 -+#define IMAGE_REL_MIPS_JMPADDR 0x0003 -+#define IMAGE_REL_MIPS_REFHI 0x0004 -+#define IMAGE_REL_MIPS_REFLO 0x0005 -+#define IMAGE_REL_MIPS_GPREL 0x0006 -+#define IMAGE_REL_MIPS_LITERAL 0x0007 -+#define IMAGE_REL_MIPS_SECTION 0x000A -+#define IMAGE_REL_MIPS_SECREL 0x000B -+#define IMAGE_REL_MIPS_SECRELLO 0x000C -+#define IMAGE_REL_MIPS_SECRELHI 0x000D -+#define IMAGE_REL_MIPS_JMPADDR16 0x0010 -+#define IMAGE_REL_MIPS_REFWORDNB 0x0022 -+#define IMAGE_REL_MIPS_PAIR 0x0025 -+ -+/* ALPHA relocation types */ -+#define IMAGE_REL_ALPHA_ABSOLUTE 0x0000 -+#define IMAGE_REL_ALPHA_REFLONG 0x0001 -+#define IMAGE_REL_ALPHA_REFQUAD 0x0002 -+#define IMAGE_REL_ALPHA_GPREL 0x0003 -+#define IMAGE_REL_ALPHA_LITERAL 0x0004 -+#define IMAGE_REL_ALPHA_LITUSE 0x0005 -+#define IMAGE_REL_ALPHA_GPDISP 0x0006 -+#define IMAGE_REL_ALPHA_BRADDR 0x0007 -+#define IMAGE_REL_ALPHA_HINT 0x0008 -+#define IMAGE_REL_ALPHA_INLINE_REFLONG 0x0009 -+#define IMAGE_REL_ALPHA_REFHI 0x000A -+#define IMAGE_REL_ALPHA_REFLO 0x000B -+#define IMAGE_REL_ALPHA_PAIR 0x000C -+#define IMAGE_REL_ALPHA_MATCH 0x000D -+#define IMAGE_REL_ALPHA_SECTION 0x000E -+#define IMAGE_REL_ALPHA_SECREL 0x000F -+#define IMAGE_REL_ALPHA_REFLONGNB 0x0010 -+#define IMAGE_REL_ALPHA_SECRELLO 0x0011 -+#define IMAGE_REL_ALPHA_SECRELHI 0x0012 -+#define IMAGE_REL_ALPHA_REFQ3 0x0013 -+#define IMAGE_REL_ALPHA_REFQ2 0x0014 -+#define IMAGE_REL_ALPHA_REFQ1 0x0015 -+#define IMAGE_REL_ALPHA_GPRELLO 0x0016 -+#define IMAGE_REL_ALPHA_GPRELHI 0x0017 -+ -+/* PowerPC relocation types */ -+#define IMAGE_REL_PPC_ABSOLUTE 0x0000 -+#define IMAGE_REL_PPC_ADDR64 0x0001 -+#define IMAGE_REL_PPC_ADDR 0x0002 -+#define IMAGE_REL_PPC_ADDR24 0x0003 -+#define IMAGE_REL_PPC_ADDR16 0x0004 -+#define IMAGE_REL_PPC_ADDR14 0x0005 -+#define IMAGE_REL_PPC_REL24 0x0006 -+#define IMAGE_REL_PPC_REL14 0x0007 -+#define IMAGE_REL_PPC_TOCREL16 0x0008 -+#define IMAGE_REL_PPC_TOCREL14 0x0009 -+#define IMAGE_REL_PPC_ADDR32NB 0x000A -+#define IMAGE_REL_PPC_SECREL 0x000B -+#define IMAGE_REL_PPC_SECTION 0x000C -+#define IMAGE_REL_PPC_IFGLUE 0x000D -+#define IMAGE_REL_PPC_IMGLUE 0x000E -+#define IMAGE_REL_PPC_SECREL16 0x000F -+#define IMAGE_REL_PPC_REFHI 0x0010 -+#define IMAGE_REL_PPC_REFLO 0x0011 -+#define IMAGE_REL_PPC_PAIR 0x0012 -+#define IMAGE_REL_PPC_SECRELLO 0x0013 -+#define IMAGE_REL_PPC_SECRELHI 0x0014 -+#define IMAGE_REL_PPC_GPREL 0x0015 -+#define IMAGE_REL_PPC_TYPEMASK 0x00FF -+/* modifier bits */ -+#define IMAGE_REL_PPC_NEG 0x0100 -+#define IMAGE_REL_PPC_BRTAKEN 0x0200 -+#define IMAGE_REL_PPC_BRNTAKEN 0x0400 -+#define IMAGE_REL_PPC_TOCDEFN 0x0800 -+ -+/* SH3 ? relocation type */ -+#define IMAGE_REL_SH3_ABSOLUTE 0x0000 -+#define IMAGE_REL_SH3_DIRECT16 0x0001 -+#define IMAGE_REL_SH3_DIRECT 0x0002 -+#define IMAGE_REL_SH3_DIRECT8 0x0003 -+#define IMAGE_REL_SH3_DIRECT8_WORD 0x0004 -+#define IMAGE_REL_SH3_DIRECT8_LONG 0x0005 -+#define IMAGE_REL_SH3_DIRECT4 0x0006 -+#define IMAGE_REL_SH3_DIRECT4_WORD 0x0007 -+#define IMAGE_REL_SH3_DIRECT4_LONG 0x0008 -+#define IMAGE_REL_SH3_PCREL8_WORD 0x0009 -+#define IMAGE_REL_SH3_PCREL8_LONG 0x000A -+#define IMAGE_REL_SH3_PCREL12_WORD 0x000B -+#define IMAGE_REL_SH3_STARTOF_SECTION 0x000C -+#define IMAGE_REL_SH3_SIZEOF_SECTION 0x000D -+#define IMAGE_REL_SH3_SECTION 0x000E -+#define IMAGE_REL_SH3_SECREL 0x000F -+#define IMAGE_REL_SH3_DIRECT32_NB 0x0010 -+ -+/* ARM (Archimedes?) relocation types */ -+#define IMAGE_REL_ARM_ABSOLUTE 0x0000 -+#define IMAGE_REL_ARM_ADDR 0x0001 -+#define IMAGE_REL_ARM_ADDR32NB 0x0002 -+#define IMAGE_REL_ARM_BRANCH24 0x0003 -+#define IMAGE_REL_ARM_BRANCH11 0x0004 -+#define IMAGE_REL_ARM_SECTION 0x000E -+#define IMAGE_REL_ARM_SECREL 0x000F -+ -+/* IA64 relocation types */ -+#define IMAGE_REL_IA64_ABSOLUTE 0x0000 -+#define IMAGE_REL_IA64_IMM14 0x0001 -+#define IMAGE_REL_IA64_IMM22 0x0002 -+#define IMAGE_REL_IA64_IMM64 0x0003 -+#define IMAGE_REL_IA64_DIR 0x0004 -+#define IMAGE_REL_IA64_DIR64 0x0005 -+#define IMAGE_REL_IA64_PCREL21B 0x0006 -+#define IMAGE_REL_IA64_PCREL21M 0x0007 -+#define IMAGE_REL_IA64_PCREL21F 0x0008 -+#define IMAGE_REL_IA64_GPREL22 0x0009 -+#define IMAGE_REL_IA64_LTOFF22 0x000A -+#define IMAGE_REL_IA64_SECTION 0x000B -+#define IMAGE_REL_IA64_SECREL22 0x000C -+#define IMAGE_REL_IA64_SECREL64I 0x000D -+#define IMAGE_REL_IA64_SECREL 0x000E -+#define IMAGE_REL_IA64_LTOFF64 0x000F -+#define IMAGE_REL_IA64_DIR32NB 0x0010 -+#define IMAGE_REL_IA64_RESERVED_11 0x0011 -+#define IMAGE_REL_IA64_RESERVED_12 0x0012 -+#define IMAGE_REL_IA64_RESERVED_13 0x0013 -+#define IMAGE_REL_IA64_RESERVED_14 0x0014 -+#define IMAGE_REL_IA64_RESERVED_15 0x0015 -+#define IMAGE_REL_IA64_RESERVED_16 0x0016 -+#define IMAGE_REL_IA64_ADDEND 0x001F -+ -+/* archive format */ -+ -+#define IMAGE_ARCHIVE_START_SIZE 8 -+#define IMAGE_ARCHIVE_START "!\n" -+#define IMAGE_ARCHIVE_END "`\n" -+#define IMAGE_ARCHIVE_PAD "\n" -+#define IMAGE_ARCHIVE_LINKER_MEMBER "/ " -+#define IMAGE_ARCHIVE_LONGNAMES_MEMBER "// " -+ -+typedef struct _IMAGE_ARCHIVE_MEMBER_HEADER -+{ -+ BYTE Name[16]; -+ BYTE Date[12]; -+ BYTE UserID[6]; -+ BYTE GroupID[6]; -+ BYTE Mode[8]; -+ BYTE Size[10]; -+ BYTE EndHeader[2]; -+} IMAGE_ARCHIVE_MEMBER_HEADER, *PIMAGE_ARCHIVE_MEMBER_HEADER; -+ -+#define IMAGE_SIZEOF_ARCHIVE_MEMBER_HDR 60 -+ -+/* -+ * Resource directory stuff -+ */ -+typedef struct _IMAGE_RESOURCE_DIRECTORY { -+ DWORD Characteristics; -+ DWORD TimeDateStamp; -+ WORD MajorVersion; -+ WORD MinorVersion; -+ WORD NumberOfNamedEntries; -+ WORD NumberOfIdEntries; -+ /* IMAGE_RESOURCE_DIRECTORY_ENTRY DirectoryEntries[]; */ -+} IMAGE_RESOURCE_DIRECTORY,*PIMAGE_RESOURCE_DIRECTORY; -+ -+#define IMAGE_RESOURCE_NAME_IS_STRING 0x80000000 -+#define IMAGE_RESOURCE_DATA_IS_DIRECTORY 0x80000000 -+ -+typedef struct _IMAGE_RESOURCE_DIRECTORY_ENTRY { -+ union { -+ struct { -+#ifdef BITFIELDS_BIGENDIAN -+ unsigned NameIsString:1; -+ unsigned NameOffset:31; -+#else -+ unsigned NameOffset:31; -+ unsigned NameIsString:1; -+#endif -+ } DUMMYSTRUCTNAME1; -+ DWORD Name; -+ struct { -+#ifdef WORDS_BIGENDIAN -+ WORD __pad; -+ WORD Id; -+#else -+ WORD Id; -+ WORD __pad; -+#endif -+ } DUMMYSTRUCTNAME2; -+ } DUMMYUNIONNAME1; -+ union { -+ DWORD OffsetToData; -+ struct { -+#ifdef BITFIELDS_BIGENDIAN -+ unsigned DataIsDirectory:1; -+ unsigned OffsetToDirectory:31; -+#else -+ unsigned OffsetToDirectory:31; -+ unsigned DataIsDirectory:1; -+#endif -+ } DUMMYSTRUCTNAME3; -+ } DUMMYUNIONNAME2; -+} IMAGE_RESOURCE_DIRECTORY_ENTRY,*PIMAGE_RESOURCE_DIRECTORY_ENTRY; -+ -+ -+typedef struct _IMAGE_RESOURCE_DIRECTORY_STRING { -+ WORD Length; -+ CHAR NameString[ 1 ]; -+} IMAGE_RESOURCE_DIRECTORY_STRING,*PIMAGE_RESOURCE_DIRECTORY_STRING; -diff -Nurp linux-5.6.11/3rdparty/ndiswrapper/pnp.c linux-5.6.11-ndis/3rdparty/ndiswrapper/pnp.c ---- linux-5.6.11/3rdparty/ndiswrapper/pnp.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.6.11-ndis/3rdparty/ndiswrapper/pnp.c 2020-05-03 15:18:33.000000000 +0300 -@@ -0,0 +1,697 @@ -+/* -+ * Copyright (C) 2005 Giridhar Pemmasani -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ */ -+ -+#include "usb.h" -+#include "pnp.h" -+#include "wrapndis.h" -+#include "loader.h" -+ -+/* Functions callable from the NDIS driver */ -+wstdcall NTSTATUS pdoDispatchDeviceControl(struct device_object *pdo, -+ struct irp *irp); -+wstdcall NTSTATUS pdoDispatchPnp(struct device_object *pdo, struct irp *irp); -+wstdcall NTSTATUS pdoDispatchPower(struct device_object *pdo, struct irp *irp); -+ -+static NTSTATUS start_pdo(struct device_object *pdo) -+{ -+ int i, ret, count, resources_size; -+ struct wrap_device *wd; -+ struct pci_dev *pdev; -+ struct cm_partial_resource_descriptor *entry; -+ struct cm_partial_resource_list *partial_resource_list; -+ -+ ENTER1("%p, %p", pdo, pdo->reserved); -+ wd = pdo->reserved; -+ if (ntoskernel_init_device(wd)) -+ EXIT1(return STATUS_FAILURE); -+ if (wrap_is_usb_bus(wd->dev_bus)) { -+ if (usb_init_device(wd)) { -+ ntoskernel_exit_device(wd); -+ EXIT1(return STATUS_FAILURE); -+ } -+ EXIT1(return STATUS_SUCCESS); -+ } -+ if (!wrap_is_pci_bus(wd->dev_bus)) -+ EXIT1(return STATUS_SUCCESS); -+ pdev = wd->pci.pdev; -+ ret = pci_enable_device(pdev); -+ if (ret) { -+ ERROR("couldn't enable PCI device: %x", ret); -+ return STATUS_FAILURE; -+ } -+ ret = pci_request_regions(pdev, DRIVER_NAME); -+ if (ret) { -+ ERROR("couldn't request PCI regions: %x", ret); -+ goto err_enable; -+ } -+ pci_set_power_state(pdev, PCI_D0); -+#ifdef CONFIG_X86_64 -+ /* 64-bit broadcom driver doesn't work if DMA is allocated -+ * from over 1GB */ -+ if (wd->vendor == 0x14e4) { -+ if (pci_set_dma_mask(pdev, DMA_BIT_MASK(30)) || -+ pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(30))) -+ WARNING("couldn't set DMA mask; this driver " -+ "may not work with more than 1GB RAM"); -+ } -+#endif -+ /* IRQ resource entry is filled in from pdev, instead of -+ * pci_resource macros */ -+ for (i = count = 0; pci_resource_start(pdev, i); i++) -+ if ((pci_resource_flags(pdev, i) & IORESOURCE_MEM) || -+ (pci_resource_flags(pdev, i) & IORESOURCE_IO)) -+ count++; -+ /* space for entry for IRQ is already in -+ * cm_partial_resource_list */ -+ resources_size = sizeof(struct cm_resource_list) + -+ sizeof(struct cm_partial_resource_descriptor) * count; -+ TRACE2("resources: %d, %d", count, resources_size); -+ wd->resource_list = kzalloc(resources_size, GFP_KERNEL); -+ if (!wd->resource_list) { -+ WARNING("couldn't allocate memory"); -+ goto err_regions; -+ } -+ wd->resource_list->count = 1; -+ wd->resource_list->list[0].interface_type = PCIBus; -+ /* bus_number is not used by WDM drivers */ -+ wd->resource_list->list[0].bus_number = pdev->bus->number; -+ -+ partial_resource_list = -+ &wd->resource_list->list->partial_resource_list; -+ partial_resource_list->version = 1; -+ partial_resource_list->revision = 1; -+ partial_resource_list->count = count + 1; -+ -+ for (i = count = 0; pci_resource_start(pdev, i); i++) { -+ entry = &partial_resource_list->partial_descriptors[count]; -+ TRACE2("%d", count); -+ if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) { -+ entry->type = CmResourceTypeMemory; -+ entry->flags = CM_RESOURCE_MEMORY_READ_WRITE; -+ entry->share = CmResourceShareDeviceExclusive; -+ } else if (pci_resource_flags(pdev, i) & IORESOURCE_IO) { -+ entry->type = CmResourceTypePort; -+ entry->flags = CM_RESOURCE_PORT_IO; -+ entry->share = CmResourceShareDeviceExclusive; -+#if 0 -+ } else if (pci_resource_flags(pdev, i) & IORESOURCE_DMA) { -+ /* it looks like no driver uses this resource */ -+ typeof(pci_resource_flags(pdev, 0)) flags; -+ entry->type = CmResourceTypeDma; -+ flags = pci_resource_flags(pdev, i); -+ if (flags & IORESOURCE_DMA_TYPEA) -+ entry->flags |= CM_RESOURCE_DMA_TYPE_A; -+ else if (flags & IORESOURCE_DMA_TYPEB) -+ entry->flags |= CM_RESOURCE_DMA_TYPE_B; -+ else if (flags & IORESOURCE_DMA_TYPEF) -+ entry->flags |= CM_RESOURCE_DMA_TYPE_F; -+ if (flags & IORESOURCE_DMA_8BIT) -+ entry->flags |= CM_RESOURCE_DMA_8; -+ else if (flags & IORESOURCE_DMA_16BIT) -+ entry->flags |= CM_RESOURCE_DMA_16; -+ /* what about 32bit DMA? */ -+ else if (flags & IORESOURCE_DMA_8AND16BIT) -+ entry->flags |= CM_RESOURCE_DMA_8_AND_16; -+ if (flags & IORESOURCE_DMA_MASTER) -+ entry->flags |= CM_RESOURCE_DMA_BUS_MASTER; -+ entry->u.dma.channel = pci_resource_start(pdev, i); -+ /* what should this be? */ -+ entry->u.dma.port = 1; -+#endif -+ } else -+ continue; -+ /* TODO: Add other resource types? */ -+ entry->u.generic.start = -+ (ULONG_PTR)pci_resource_start(pdev, i); -+ entry->u.generic.length = pci_resource_len(pdev, i); -+ count++; -+ } -+ -+ /* put IRQ resource at the end */ -+ entry = &partial_resource_list->partial_descriptors[count++]; -+ entry->type = CmResourceTypeInterrupt; -+ entry->flags = CM_RESOURCE_INTERRUPT_LEVEL_SENSITIVE; -+ /* we assume all devices use shared IRQ */ -+ entry->share = CmResourceShareShared; -+ /* as per documentation, interrupt level should be DIRQL, but -+ * examples from DDK as well some drivers, such as AR5211, -+ * RT8180L use interrupt level as interrupt vector also in -+ * NdisMRegisterInterrupt */ -+ entry->u.interrupt.level = pdev->irq; -+ entry->u.interrupt.vector = pdev->irq; -+ entry->u.interrupt.affinity = -1; -+ -+ TRACE2("resource list count %d, irq: %d", -+ partial_resource_list->count, pdev->irq); -+ pci_set_drvdata(pdev, wd); -+ EXIT1(return STATUS_SUCCESS); -+err_regions: -+ pci_release_regions(pdev); -+err_enable: -+ pci_disable_device(pdev); -+ wd->pci.pdev = NULL; -+ wd->pdo = NULL; -+ EXIT1(return STATUS_FAILURE); -+} -+ -+static void remove_pdo(struct device_object *pdo) -+{ -+ struct wrap_device *wd = pdo->reserved; -+ -+ ntoskernel_exit_device(wd); -+ if (wrap_is_pci_bus(wd->dev_bus)) { -+ struct pci_dev *pdev = wd->pci.pdev; -+ pci_release_regions(pdev); -+ pci_disable_device(pdev); -+ wd->pci.pdev = NULL; -+ pci_set_drvdata(pdev, NULL); -+ } else if (wrap_is_usb_bus(wd->dev_bus)) { -+ usb_exit_device(wd); -+ } -+ kfree(wd->resource_list); -+ wd->resource_list = NULL; -+ return; -+} -+ -+static NTSTATUS IoSendIrpTopDev(struct device_object *dev_obj, ULONG major_fn, -+ ULONG minor_fn, struct io_stack_location *sl) -+{ -+ NTSTATUS status; -+ struct nt_event event; -+ struct irp *irp; -+ struct io_stack_location *irp_sl; -+ struct device_object *top_dev = IoGetAttachedDeviceReference(dev_obj); -+ -+ KeInitializeEvent(&event, NotificationEvent, FALSE); -+ irp = IoBuildSynchronousFsdRequest(IRP_MJ_PNP, top_dev, NULL, 0, NULL, -+ &event, NULL); -+ irp->io_status.status = STATUS_NOT_IMPLEMENTED; -+ irp->io_status.info = 0; -+ irp_sl = IoGetNextIrpStackLocation(irp); -+ if (sl) -+ memcpy(irp_sl, sl, sizeof(*irp_sl)); -+ irp_sl->major_fn = major_fn; -+ irp_sl->minor_fn = minor_fn; -+ status = IoCallDriver(top_dev, irp); -+ if (status == STATUS_PENDING) { -+ KeWaitForSingleObject(&event, Executive, KernelMode, -+ FALSE, NULL); -+ status = irp->io_status.status; -+ } -+ ObDereferenceObject(top_dev); -+ return status; -+} -+ -+wstdcall NTSTATUS pdoDispatchDeviceControl(struct device_object *pdo, -+ struct irp *irp) -+{ -+ NTSTATUS status; -+ struct wrap_device *wd = pdo->reserved; -+ -+ DUMP_IRP(irp); -+ (void)wd; -+ if (wrap_is_usb_bus(wd->dev_bus)) { -+ status = wrap_submit_irp(pdo, irp); -+ IOTRACE("status: %08X", status); -+ if (status != STATUS_PENDING) -+ IoCompleteRequest(irp, IO_NO_INCREMENT); -+ } else { -+ status = irp->io_status.status = STATUS_NOT_IMPLEMENTED; -+ IoCompleteRequest(irp, IO_NO_INCREMENT); -+ } -+ IOEXIT(return status); -+} -+WIN_FUNC_DECL(pdoDispatchDeviceControl,2) -+ -+wstdcall NTSTATUS pdoDispatchPnp(struct device_object *pdo, struct irp *irp) -+{ -+ struct io_stack_location *irp_sl; -+ NTSTATUS status; -+ struct wrap_device *wd = pdo->reserved; -+ -+ irp_sl = IoGetCurrentIrpStackLocation(irp); -+ TRACE2("%p %d:%d", pdo, irp_sl->major_fn, irp_sl->minor_fn); -+ switch (irp_sl->minor_fn) { -+ case IRP_MN_START_DEVICE: -+ status = start_pdo(pdo); -+ break; -+ case IRP_MN_QUERY_STOP_DEVICE: -+ case IRP_MN_STOP_DEVICE: -+ case IRP_MN_QUERY_REMOVE_DEVICE: -+ status = STATUS_SUCCESS; -+ break; -+ case IRP_MN_REMOVE_DEVICE: -+ remove_pdo(pdo); -+ status = STATUS_SUCCESS; -+ break; -+ case IRP_MN_QUERY_INTERFACE: -+ if (wrap_is_usb_bus(wd->dev_bus)) -+ status = usb_query_interface(wd, irp_sl); -+ else -+ status = STATUS_NOT_IMPLEMENTED; -+ break; -+ default: -+ TRACE2("fn %d not implemented", irp_sl->minor_fn); -+ status = STATUS_SUCCESS; -+ break; -+ } -+ irp->io_status.status = status; -+ TRACE2("status: %08X", status); -+ IoCompleteRequest(irp, IO_NO_INCREMENT); -+ IOEXIT(return status); -+} -+WIN_FUNC_DECL(pdoDispatchPnp,2) -+ -+wstdcall NTSTATUS pdoDispatchPower(struct device_object *pdo, struct irp *irp) -+{ -+ struct io_stack_location *irp_sl; -+ struct wrap_device *wd; -+ union power_state power_state; -+ struct pci_dev *pdev; -+ NTSTATUS status; -+ -+ irp_sl = IoGetCurrentIrpStackLocation(irp); -+ wd = pdo->reserved; -+ TRACE2("pdo: %p, fn: %d:%d, wd: %p", -+ pdo, irp_sl->major_fn, irp_sl->minor_fn, wd); -+ switch (irp_sl->minor_fn) { -+ case IRP_MN_WAIT_WAKE: -+ /* TODO: this is not complete/correct */ -+ TRACE2("state: %d, completion: %p", -+ irp_sl->params.power.state.system_state, -+ irp_sl->completion_routine); -+ IoMarkIrpPending(irp); -+ status = STATUS_PENDING; -+ break; -+ case IRP_MN_SET_POWER: -+ power_state = irp_sl->params.power.state; -+ if (power_state.device_state == PowerDeviceD0) { -+ TRACE2("resuming %p", wd); -+ if (wrap_is_pci_bus(wd->dev_bus)) { -+ pdev = wd->pci.pdev; -+ pci_restore_state(pdev); -+ if (wd->pci.wake_state == PowerDeviceD3) { -+ pci_enable_wake(wd->pci.pdev, -+ PCI_D3hot, 0); -+ pci_enable_wake(wd->pci.pdev, -+ PCI_D3cold, 0); -+ } -+ pci_set_power_state(pdev, PCI_D0); -+ } else if (wrap_is_usb_bus(wd->dev_bus)) { -+ wrap_resume_urbs(wd); -+ } -+ } else { -+ TRACE2("suspending device %p", wd); -+ if (wrap_is_pci_bus(wd->dev_bus)) { -+ pdev = wd->pci.pdev; -+ pci_save_state(pdev); -+ TRACE2("%d", wd->pci.wake_state); -+ if (wd->pci.wake_state == PowerDeviceD3) { -+ pci_enable_wake(wd->pci.pdev, -+ PCI_D3hot, 1); -+ pci_enable_wake(wd->pci.pdev, -+ PCI_D3cold, 1); -+ } -+ pci_set_power_state(pdev, PCI_D3hot); -+ } else if (wrap_is_usb_bus(wd->dev_bus)) { -+ wrap_suspend_urbs(wd); -+ } -+ } -+ status = STATUS_SUCCESS; -+ break; -+ case IRP_MN_QUERY_POWER: -+ status = STATUS_SUCCESS; -+ break; -+ default: -+ TRACE2("fn %d not implemented", irp_sl->minor_fn); -+ status = STATUS_SUCCESS; -+ break; -+ } -+ irp->io_status.status = status; -+ IoCompleteRequest(irp, IO_NO_INCREMENT); -+ return status; -+} -+WIN_FUNC_DECL(pdoDispatchPower,2) -+ -+static NTSTATUS pnp_set_device_power_state(struct wrap_device *wd, -+ enum device_power_state state) -+{ -+ NTSTATUS status; -+ struct device_object *pdo; -+ struct io_stack_location irp_sl; -+ -+ pdo = wd->pdo; -+ IOTRACE("%p, %p", pdo, IoGetAttachedDevice(pdo)); -+ memset(&irp_sl, 0, sizeof(irp_sl)); -+ irp_sl.params.power.state.device_state = state; -+ irp_sl.params.power.type = DevicePowerState; -+ if (state > PowerDeviceD0) { -+ status = IoSendIrpTopDev(pdo, IRP_MJ_POWER, IRP_MN_QUERY_POWER, -+ &irp_sl); -+ if (status != STATUS_SUCCESS) { -+ TRACE1("query of power to %d returns %08X", -+ state, status); -+ EXIT1(return status); -+ } -+ } -+ status = IoSendIrpTopDev(pdo, IRP_MJ_POWER, IRP_MN_SET_POWER, &irp_sl); -+ if (status != STATUS_SUCCESS) -+ WARNING("setting power to %d failed: %08X", state, status); -+ EXIT1(return status); -+} -+ -+static NTSTATUS pnp_start_device(struct wrap_device *wd) -+{ -+ struct device_object *fdo; -+ struct device_object *pdo; -+ struct io_stack_location irp_sl; -+ NTSTATUS status; -+ -+ pdo = wd->pdo; -+ /* TODO: for now we use same resources for both translated -+ * resources and raw resources */ -+ memset(&irp_sl, 0, sizeof(irp_sl)); -+ irp_sl.params.start_device.allocated_resources = -+ wd->resource_list; -+ irp_sl.params.start_device.allocated_resources_translated = -+ wd->resource_list; -+ status = IoSendIrpTopDev(pdo, IRP_MJ_PNP, IRP_MN_START_DEVICE, &irp_sl); -+ fdo = IoGetAttachedDevice(pdo); -+ fdo->drv_obj->drv_ext->count++; -+ if (status != STATUS_SUCCESS) -+ WARNING("Windows driver couldn't initialize the device (%08X)", -+ status); -+ EXIT1(return status); -+} -+ -+#if 0 -+static NTSTATUS pnp_stop_device(struct wrap_device *wd) -+{ -+ struct device_object *pdo; -+ NTSTATUS status; -+ -+ pdo = wd->pdo; -+ status = IoSendIrpTopDev(pdo, IRP_MJ_PNP, IRP_MN_QUERY_STOP_DEVICE, -+ NULL); -+ if (status != STATUS_SUCCESS) -+ WARNING("status: %08X", status); -+ /* for now we ignore query status */ -+ status = IoSendIrpTopDev(pdo, IRP_MJ_PNP, IRP_MN_STOP_DEVICE, NULL); -+ if (status != STATUS_SUCCESS) -+ WARNING("status: %08X", status); -+ if (status != STATUS_SUCCESS) -+ WARNING("status: %08X", status); -+ EXIT2(return status); -+} -+#endif -+ -+static NTSTATUS pnp_remove_device(struct wrap_device *wd) -+{ -+ struct device_object *pdo, *fdo; -+ struct driver_object *fdo_drv_obj; -+ NTSTATUS status; -+ -+ pdo = wd->pdo; -+ fdo = IoGetAttachedDevice(pdo); -+ fdo_drv_obj = fdo->drv_obj; -+ TRACE2("%p, %p, %p", pdo, fdo, fdo_drv_obj); -+ status = IoSendIrpTopDev(pdo, IRP_MJ_PNP, IRP_MN_QUERY_REMOVE_DEVICE, -+ NULL); -+ if (status != STATUS_SUCCESS) -+ WARNING("status: %08X", status); -+ -+ status = IoSendIrpTopDev(pdo, IRP_MJ_PNP, IRP_MN_REMOVE_DEVICE, NULL); -+ if (status != STATUS_SUCCESS) -+ WARNING("status: %08X", status); -+ /* TODO: should we use count in drv_ext or driver's Object -+ * header reference count to keep count of devices associated -+ * with a driver? */ -+ if (status == STATUS_SUCCESS) -+ fdo_drv_obj->drv_ext->count--; -+ TRACE1("count: %d", fdo_drv_obj->drv_ext->count); -+ if ((LONG)fdo_drv_obj->drv_ext->count < 0) -+ WARNING("wrong count: %d", fdo_drv_obj->drv_ext->count); -+ if (fdo_drv_obj->drv_ext->count == 0) { -+ struct wrap_driver *wrap_driver; -+ TRACE1("unloading driver: %p", fdo_drv_obj); -+ wrap_driver = -+ IoGetDriverObjectExtension(fdo_drv_obj, -+ (void *)WRAP_DRIVER_CLIENT_ID); -+ if (fdo_drv_obj->unload) -+ LIN2WIN1(fdo_drv_obj->unload, fdo_drv_obj); -+ if (wrap_driver) { -+ mutex_lock(&loader_mutex); -+ unload_wrap_driver(wrap_driver); -+ mutex_unlock(&loader_mutex); -+ } else -+ ERROR("couldn't get wrap_driver"); -+ ObDereferenceObject(fdo_drv_obj); -+ } -+ IoDeleteDevice(pdo); -+ unload_wrap_device(wd); -+ EXIT1(return status); -+} -+ -+WIN_FUNC_DECL(IoInvalidDeviceRequest,2) -+ -+static struct device_object *alloc_pdo(struct driver_object *drv_obj) -+{ -+ struct device_object *pdo; -+ NTSTATUS status; -+ int i; -+ struct ansi_string ansi_name; -+ struct unicode_string unicode_name; -+ -+ RtlInitAnsiString(&ansi_name, "NDISpdo"); -+ if (RtlAnsiStringToUnicodeString(&unicode_name, &ansi_name, TRUE) == -+ STATUS_SUCCESS) { -+ status = IoCreateDevice(drv_obj, 0, &unicode_name, -+ FILE_DEVICE_UNKNOWN, -+ FILE_AUTOGENERATED_DEVICE_NAME, -+ FALSE, &pdo); -+ RtlFreeUnicodeString(&unicode_name); -+ } else { -+ status = IoCreateDevice(drv_obj, 0, NULL, -+ FILE_DEVICE_UNKNOWN, -+ FILE_AUTOGENERATED_DEVICE_NAME, -+ FALSE, &pdo); -+ } -+ TRACE1("%p, %d, %p", drv_obj, status, pdo); -+ if (status != STATUS_SUCCESS) -+ return NULL; -+ /* dispatch routines are called as Windows functions */ -+ for (i = 0; i <= IRP_MJ_MAXIMUM_FUNCTION; i++) -+ drv_obj->major_func[i] = WIN_FUNC_PTR(IoInvalidDeviceRequest,2); -+ drv_obj->major_func[IRP_MJ_INTERNAL_DEVICE_CONTROL] = -+ WIN_FUNC_PTR(pdoDispatchDeviceControl,2); -+ drv_obj->major_func[IRP_MJ_DEVICE_CONTROL] = -+ WIN_FUNC_PTR(pdoDispatchDeviceControl,2); -+ drv_obj->major_func[IRP_MJ_POWER] = WIN_FUNC_PTR(pdoDispatchPower,2); -+ drv_obj->major_func[IRP_MJ_PNP] = WIN_FUNC_PTR(pdoDispatchPnp,2); -+ return pdo; -+} -+ -+static int wrap_pnp_start_device(struct wrap_device *wd) -+{ -+ struct wrap_driver *driver; -+ struct device_object *pdo; -+ struct driver_object *pdo_drv_obj; -+ -+ ENTER1("wd: %p", wd); -+ -+ if (!((wrap_is_pci_bus(wd->dev_bus)) || -+ (wrap_is_usb_bus(wd->dev_bus)))) { -+ ERROR("bus type %d (%d) not supported", -+ WRAP_BUS(wd->dev_bus), wd->dev_bus); -+ EXIT1(return -EINVAL); -+ } -+ driver = load_wrap_driver(wd); -+ if (!driver) -+ return -ENODEV; -+ -+ wd->driver = driver; -+ wd->dev_bus = WRAP_DEVICE_BUS(driver->dev_type, WRAP_BUS(wd->dev_bus)); -+ TRACE1("dev type: %d, bus type: %d, %d", WRAP_DEVICE(wd->dev_bus), -+ WRAP_BUS(wd->dev_bus), wd->dev_bus); -+ TRACE1("%d, %d", driver->dev_type, wrap_is_usb_bus(wd->dev_bus)); -+ /* first create pdo */ -+ if (wrap_is_pci_bus(wd->dev_bus)) -+ pdo_drv_obj = find_bus_driver("PCI"); -+ else // if (wrap_is_usb_bus(wd->dev_bus)) -+ pdo_drv_obj = find_bus_driver("USB"); -+ if (!pdo_drv_obj) -+ return -EINVAL; -+ pdo = alloc_pdo(pdo_drv_obj); -+ if (!pdo) -+ return -ENOMEM; -+ wd->pdo = pdo; -+ pdo->reserved = wd; -+ if (WRAP_DEVICE(wd->dev_bus) == WRAP_NDIS_DEVICE) { -+ if (init_ndis_driver(driver->drv_obj)) { -+ IoDeleteDevice(pdo); -+ return -EINVAL; -+ } -+ } -+ TRACE1("%p", driver->drv_obj->drv_ext->add_device); -+ if (driver->drv_obj->drv_ext->add_device(driver->drv_obj, pdo) != -+ STATUS_SUCCESS) { -+ IoDeleteDevice(pdo); -+ return -ENOMEM; -+ } -+ if (pnp_start_device(wd) != STATUS_SUCCESS) { -+ /* TODO: we need proper cleanup, to deallocate memory, -+ * for example */ -+ pnp_remove_device(wd); -+ return -EINVAL; -+ } -+ return 0; -+} -+ -+int wrap_pnp_start_pci_device(struct pci_dev *pdev, -+ const struct pci_device_id *ent) -+{ -+ struct load_device load_device; -+ struct wrap_device *wd; -+ -+ ENTER1("called for %04x:%04x:%04x:%04x", pdev->vendor, pdev->device, -+ pdev->subsystem_vendor, pdev->subsystem_device); -+ -+ load_device.bus = WRAP_PCI_BUS; -+ load_device.vendor = pdev->vendor; -+ load_device.device = pdev->device; -+ load_device.subvendor = pdev->subsystem_vendor; -+ load_device.subdevice = pdev->subsystem_device; -+ wd = load_wrap_device(&load_device); -+ if (!wd) -+ EXIT1(return -ENODEV); -+ wd->pci.pdev = pdev; -+ return wrap_pnp_start_device(wd); -+} -+ -+void wrap_pnp_remove_pci_device(struct pci_dev *pdev) -+{ -+ struct wrap_device *wd; -+ -+ wd = (struct wrap_device *)pci_get_drvdata(pdev); -+ ENTER1("%p, %p", pdev, wd); -+ if (!wd) -+ EXIT1(return); -+ pnp_remove_device(wd); -+} -+ -+int wrap_pnp_suspend_pci_device(struct pci_dev *pdev, pm_message_t state) -+{ -+ struct wrap_device *wd; -+ -+ wd = (struct wrap_device *)pci_get_drvdata(pdev); -+ return pnp_set_device_power_state(wd, PowerDeviceD3); -+} -+ -+int wrap_pnp_resume_pci_device(struct pci_dev *pdev) -+{ -+ struct wrap_device *wd; -+ -+ wd = (struct wrap_device *)pci_get_drvdata(pdev); -+ return pnp_set_device_power_state(wd, PowerDeviceD0); -+} -+ -+#ifdef ENABLE_USB -+int wrap_pnp_start_usb_device(struct usb_interface *intf, -+ const struct usb_device_id *usb_id) -+{ -+ struct wrap_device *wd; -+ int ret; -+ struct usb_device *udev = interface_to_usbdev(intf); -+ ENTER1("%04x, %04x, %04x", udev->descriptor.idVendor, -+ udev->descriptor.idProduct, udev->descriptor.bDeviceClass); -+ -+ /* USB device (e.g., RNDIS) may have multiple interfaces; -+ initialize one interface only (is there a way to know which -+ of these interfaces is for network?) */ -+ -+ if ((wd = get_wrap_device(udev, WRAP_USB_BUS))) { -+ TRACE1("device already initialized: %p", wd); -+ usb_set_intfdata(intf, NULL); -+ ret = 0; -+ } else { -+ struct load_device load_device; -+ -+ load_device.bus = WRAP_USB_BUS; -+ load_device.vendor = le16_to_cpu(udev->descriptor.idVendor); -+ load_device.device = le16_to_cpu(udev->descriptor.idProduct); -+ load_device.subvendor = 0; -+ load_device.subdevice = 0; -+ wd = load_wrap_device(&load_device); -+ TRACE2("%p", wd); -+ if (wd) { -+ /* some devices (e.g., TI 4150, RNDIS) need -+ * full reset */ -+ ret = usb_reset_device(udev); -+ if (ret) -+ WARNING("reset failed: %d", ret); -+ usb_set_intfdata(intf, wd); -+ wd->usb.intf = intf; -+ wd->usb.udev = udev; -+ ret = wrap_pnp_start_device(wd); -+ } else -+ ret = -ENODEV; -+ } -+ -+ TRACE2("ret: %d", ret); -+ if (ret) -+ EXIT1(return ret); -+ else -+ return 0; -+} -+ -+void wrap_pnp_remove_usb_device(struct usb_interface *intf) -+{ -+ struct wrap_device *wd; -+ -+ wd = (struct wrap_device *)usb_get_intfdata(intf); -+ TRACE1("%p, %p", intf, wd); -+ if (wd == NULL) -+ EXIT1(return); -+ usb_set_intfdata(intf, NULL); -+ wd->usb.intf = NULL; -+ pnp_remove_device(wd); -+} -+ -+int wrap_pnp_suspend_usb_device(struct usb_interface *intf, pm_message_t state) -+{ -+ struct wrap_device *wd; -+ -+ wd = usb_get_intfdata(intf); -+ ENTER1("%p, %p", intf, wd); -+ if (!wd) -+ EXIT1(return 0); -+ if (pnp_set_device_power_state(wd, PowerDeviceD3)) -+ return -1; -+ return 0; -+} -+ -+int wrap_pnp_resume_usb_device(struct usb_interface *intf) -+{ -+ struct wrap_device *wd; -+ wd = usb_get_intfdata(intf); -+ ENTER1("%p, %p", intf, wd); -+ if (!wd) -+ EXIT1(return 0); -+ if (pnp_set_device_power_state(wd, PowerDeviceD0)) -+ return -1; -+ return 0; -+} -+ -+#endif // USB -diff -Nurp linux-5.6.11/3rdparty/ndiswrapper/pnp.h linux-5.6.11-ndis/3rdparty/ndiswrapper/pnp.h ---- linux-5.6.11/3rdparty/ndiswrapper/pnp.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.6.11-ndis/3rdparty/ndiswrapper/pnp.h 2020-05-03 15:18:33.000000000 +0300 -@@ -0,0 +1,36 @@ -+/* -+ * Copyright (C) 2005 Giridhar Pemmasani -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ */ -+ -+#ifndef _PNP_H_ -+#define _PNP_H_ -+ -+#include "ntoskernel.h" -+#include "ndis.h" -+#include "wrapndis.h" -+ -+int wrap_pnp_start_pci_device(struct pci_dev *pdev, -+ const struct pci_device_id *ent); -+void wrap_pnp_remove_pci_device(struct pci_dev *pdev); -+int wrap_pnp_suspend_pci_device(struct pci_dev *pdev, pm_message_t state); -+int wrap_pnp_resume_pci_device(struct pci_dev *pdev); -+ -+int wrap_pnp_start_usb_device(struct usb_interface *intf, -+ const struct usb_device_id *usb_id); -+void wrap_pnp_remove_usb_device(struct usb_interface *intf); -+int wrap_pnp_suspend_usb_device(struct usb_interface *intf, -+ pm_message_t state); -+int wrap_pnp_resume_usb_device(struct usb_interface *intf); -+ -+#endif -diff -Nurp linux-5.6.11/3rdparty/ndiswrapper/proc.c linux-5.6.11-ndis/3rdparty/ndiswrapper/proc.c ---- linux-5.6.11/3rdparty/ndiswrapper/proc.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.6.11-ndis/3rdparty/ndiswrapper/proc.c 2020-05-03 15:18:33.000000000 +0300 -@@ -0,0 +1,619 @@ -+/* -+ * Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ */ -+#include -+#include -+#include -+#include -+ -+#include "ndis.h" -+#include "iw_ndis.h" -+#include "wrapndis.h" -+#include "pnp.h" -+#include "wrapper.h" -+ -+#define MAX_PROC_STR_LEN 32 -+ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,5,0) -+static kuid_t proc_kuid; -+static kgid_t proc_kgid; -+#else -+#define proc_kuid proc_uid -+#define proc_kgid proc_gid -+#define kuid_t uid_t -+#define kgid_t gid_t -+#endif -+ -+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20) -+static inline struct inode *file_inode(struct file *f) -+{ -+ return f->f_dentry->d_inode; -+} -+#elif LINUX_VERSION_CODE < KERNEL_VERSION(3,9,0) -+static inline struct inode *file_inode(struct file *f) -+{ -+ return f->f_path.dentry->d_inode; -+} -+#endif -+ -+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,10,0) -+static inline void proc_set_user(struct proc_dir_entry *de, kuid_t uid, -+ kgid_t gid) -+{ -+ de->uid = uid; -+ de->gid = gid; -+} -+ -+static inline void proc_remove(struct proc_dir_entry *de) -+{ -+ if (de) -+ remove_proc_entry(de->name, de->parent); -+} -+ -+static inline void *PDE_DATA(const struct inode *inode) -+{ -+ return PDE(inode)->data; -+} -+#endif -+ -+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26) -+static inline struct proc_dir_entry *proc_create_data(const char *name, -+ umode_t mode, struct proc_dir_entry *parent, -+ struct file_operations *fops, void *data) -+{ -+ struct proc_dir_entry *de; -+ -+ de = create_proc_entry(name, mode, parent); -+ if (de) { -+ de->data = data; -+ de->proc_fops = fops; -+ } -+ -+ return de; -+} -+#endif -+ -+static int do_proc_make_entry(const char *name, umode_t mode, -+ struct proc_dir_entry *parent, -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,6,0) -+ const struct proc_ops *fops, -+#else -+ struct file_operations *fops, -+#endif -+ kuid_t uid, kgid_t gid, struct ndis_device *wnd) -+{ -+ struct proc_dir_entry *de; -+ -+ de = proc_create_data(name, mode, parent, fops, wnd); -+ if (de == NULL) { -+ ERROR("couldn't create proc entry for '%s'", name); -+ return -ENOMEM; -+ } -+ proc_set_user(de, uid, gid); -+ return 0; -+} -+ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,6,0) -+#define PROC_DECLARE_RO(name) \ -+ static int proc_##name##_open(struct inode *inode, struct file *file) \ -+ { \ -+ return single_open(file, proc_##name##_read, PDE_DATA(inode)); \ -+ } \ -+ static const struct proc_ops name##_fops = { \ -+ .proc_open = proc_##name##_open, \ -+ .proc_read = seq_read, \ -+ .proc_lseek = seq_lseek, \ -+ .proc_release = single_release, \ -+ }; -+ -+#define PROC_DECLARE_RW(name) \ -+ static int proc_##name##_open(struct inode *inode, struct file *file) \ -+ { \ -+ return single_open(file, proc_##name##_read, PDE_DATA(inode)); \ -+ } \ -+ static const struct proc_ops name##_fops = { \ -+ .proc_open = proc_##name##_open, \ -+ .proc_read = seq_read, \ -+ .proc_lseek = seq_lseek, \ -+ .proc_release = single_release, \ -+ .proc_write = proc_##name##_write, \ -+ }; -+#else -+#define PROC_DECLARE_RO(name) \ -+ static int proc_##name##_open(struct inode *inode, struct file *file) \ -+ { \ -+ return single_open(file, proc_##name##_read, PDE_DATA(inode)); \ -+ } \ -+ static struct file_operations name##_fops = { \ -+ .owner = THIS_MODULE, \ -+ .open = proc_##name##_open, \ -+ .read = seq_read, \ -+ .llseek = seq_lseek, \ -+ .release = single_release, \ -+ }; -+ -+#define PROC_DECLARE_RW(name) \ -+ static int proc_##name##_open(struct inode *inode, struct file *file) \ -+ { \ -+ return single_open(file, proc_##name##_read, PDE_DATA(inode)); \ -+ } \ -+ static struct file_operations name##_fops = { \ -+ .owner = THIS_MODULE, \ -+ .open = proc_##name##_open, \ -+ .read = seq_read, \ -+ .llseek = seq_lseek, \ -+ .release = single_release, \ -+ .write = proc_##name##_write, \ -+ }; -+#endif -+ -+#define proc_make_entry_ro(name, parent, wnd) \ -+ do_proc_make_entry(#name, S_IFREG | S_IRUSR | S_IRGRP, parent, \ -+ &name##_fops, proc_kuid, proc_kgid, wnd) -+#define proc_make_entry_rw(name, parent, wnd) \ -+ do_proc_make_entry(#name, \ -+ S_IFREG | S_IRUSR | S_IRGRP | S_IWUSR | S_IWGRP, \ -+ parent, &name##_fops, proc_kuid, proc_kgid, wnd) -+ -+#define add_text(fmt, ...) seq_printf(sf, fmt, ##__VA_ARGS__) -+ -+static struct proc_dir_entry *wrap_procfs_entry; -+ -+static int proc_stats_read(struct seq_file *sf, void *v) -+{ -+ struct ndis_device *wnd = (struct ndis_device *)sf->private; -+ struct ndis_wireless_stats stats; -+ NDIS_STATUS res; -+ ndis_rssi rssi; -+ -+ res = mp_query(wnd, OID_802_11_RSSI, &rssi, sizeof(rssi)); -+ if (!res) -+ add_text("signal_level=%d dBm\n", (s32)rssi); -+ -+ res = mp_query(wnd, OID_802_11_STATISTICS, &stats, sizeof(stats)); -+ if (!res) { -+ add_text("tx_frames=%llu\n", stats.tx_frag); -+ add_text("tx_multicast_frames=%llu\n", stats.tx_multi_frag); -+ add_text("tx_failed=%llu\n", stats.failed); -+ add_text("tx_retry=%llu\n", stats.retry); -+ add_text("tx_multi_retry=%llu\n", stats.multi_retry); -+ add_text("tx_rtss_success=%llu\n", stats.rtss_succ); -+ add_text("tx_rtss_fail=%llu\n", stats.rtss_fail); -+ add_text("ack_fail=%llu\n", stats.ack_fail); -+ add_text("frame_duplicates=%llu\n", stats.frame_dup); -+ add_text("rx_frames=%llu\n", stats.rx_frag); -+ add_text("rx_multicast_frames=%llu\n", stats.rx_multi_frag); -+ add_text("fcs_errors=%llu\n", stats.fcs_err); -+ } -+ -+ return 0; -+} -+ -+PROC_DECLARE_RO(stats) -+ -+static int proc_encr_read(struct seq_file *sf, void *v) -+{ -+ struct ndis_device *wnd = (struct ndis_device *)sf->private; -+ int i, encr_status, auth_mode, infra_mode; -+ NDIS_STATUS res; -+ struct ndis_essid essid; -+ mac_address ap_address; -+ -+ res = mp_query(wnd, OID_802_11_BSSID, -+ &ap_address, sizeof(ap_address)); -+ if (res) -+ memset(ap_address, 0, ETH_ALEN); -+ add_text("ap_address=" MACSTRSEP "\n", MAC2STR(ap_address)); -+ -+ res = mp_query(wnd, OID_802_11_SSID, &essid, sizeof(essid)); -+ if (!res) -+ add_text("essid=%.*s\n", essid.length, essid.essid); -+ -+ res = mp_query_int(wnd, OID_802_11_ENCRYPTION_STATUS, &encr_status); -+ if (!res) { -+ typeof(&wnd->encr_info.keys[0]) tx_key; -+ add_text("tx_key=%u\n", wnd->encr_info.tx_key_index); -+ add_text("key="); -+ tx_key = &wnd->encr_info.keys[wnd->encr_info.tx_key_index]; -+ if (tx_key->length > 0) -+ for (i = 0; i < tx_key->length; i++) -+ add_text("%2.2X", tx_key->key[i]); -+ else -+ add_text("off"); -+ add_text("\n"); -+ add_text("encr_mode=%d\n", encr_status); -+ } -+ res = mp_query_int(wnd, OID_802_11_AUTHENTICATION_MODE, &auth_mode); -+ if (!res) -+ add_text("auth_mode=%d\n", auth_mode); -+ res = mp_query_int(wnd, OID_802_11_INFRASTRUCTURE_MODE, &infra_mode); -+ add_text("mode=%s\n", (infra_mode == Ndis802_11IBSS) ? "adhoc" : -+ (infra_mode == Ndis802_11Infrastructure) ? "managed" : "auto"); -+ -+ return 0; -+} -+ -+PROC_DECLARE_RO(encr) -+ -+static int proc_hw_read(struct seq_file *sf, void *v) -+{ -+ struct ndis_device *wnd = (struct ndis_device *)sf->private; -+ struct ndis_configuration config; -+ enum ndis_power power_mode; -+ NDIS_STATUS res; -+ ndis_tx_power_level tx_power; -+ ULONG bit_rate; -+ ndis_rts_threshold rts_threshold; -+ ndis_fragmentation_threshold frag_threshold; -+ ndis_antenna antenna; -+ ULONG packet_filter; -+ int n; -+ mac_address mac; -+ char *hw_status[] = {"ready", "initializing", "resetting", "closing", -+ "not ready"}; -+ -+ res = mp_query_int(wnd, OID_GEN_HARDWARE_STATUS, &n); -+ if (res == NDIS_STATUS_SUCCESS && n >= 0 && n < ARRAY_SIZE(hw_status)) -+ add_text("status=%s\n", hw_status[n]); -+ -+ res = mp_query(wnd, OID_802_3_CURRENT_ADDRESS, mac, sizeof(mac)); -+ if (!res) -+ add_text("mac: " MACSTRSEP "\n", MAC2STR(mac)); -+ res = mp_query(wnd, OID_802_11_CONFIGURATION, &config, sizeof(config)); -+ if (!res) { -+ add_text("beacon_period=%u msec\n", config.beacon_period); -+ add_text("atim_window=%u msec\n", config.atim_window); -+ add_text("frequency=%u kHz\n", config.ds_config); -+ add_text("hop_pattern=%u\n", config.fh_config.hop_pattern); -+ add_text("hop_set=%u\n", config.fh_config.hop_set); -+ add_text("dwell_time=%u msec\n", config.fh_config.dwell_time); -+ } -+ -+ res = mp_query(wnd, OID_802_11_TX_POWER_LEVEL, -+ &tx_power, sizeof(tx_power)); -+ if (!res) -+ add_text("tx_power=%u mW\n", tx_power); -+ -+ res = mp_query(wnd, OID_GEN_LINK_SPEED, &bit_rate, sizeof(bit_rate)); -+ if (!res) -+ add_text("bit_rate=%u kBps\n", (u32)bit_rate / 10); -+ -+ res = mp_query(wnd, OID_802_11_RTS_THRESHOLD, -+ &rts_threshold, sizeof(rts_threshold)); -+ if (!res) -+ add_text("rts_threshold=%u bytes\n", rts_threshold); -+ -+ res = mp_query(wnd, OID_802_11_FRAGMENTATION_THRESHOLD, -+ &frag_threshold, sizeof(frag_threshold)); -+ if (!res) -+ add_text("frag_threshold=%u bytes\n", frag_threshold); -+ -+ res = mp_query_int(wnd, OID_802_11_POWER_MODE, &power_mode); -+ if (!res) -+ add_text("power_mode=%s\n", -+ (power_mode == NDIS_POWER_OFF) ? "always_on" : -+ (power_mode == NDIS_POWER_MAX) ? "max_savings" : -+ "min_savings"); -+ -+ res = mp_query(wnd, OID_802_11_NUMBER_OF_ANTENNAS, -+ &antenna, sizeof(antenna)); -+ if (!res) -+ add_text("num_antennas=%u\n", antenna); -+ -+ res = mp_query(wnd, OID_802_11_TX_ANTENNA_SELECTED, -+ &antenna, sizeof(antenna)); -+ if (!res) -+ add_text("tx_antenna=%u\n", antenna); -+ -+ res = mp_query(wnd, OID_802_11_RX_ANTENNA_SELECTED, -+ &antenna, sizeof(antenna)); -+ if (!res) -+ add_text("rx_antenna=%u\n", antenna); -+ -+ add_text("encryption_modes=%s%s%s%s%s%s%s\n", -+ test_bit(Ndis802_11Encryption1Enabled, &wnd->capa.encr) ? -+ "WEP" : "none", -+ test_bit(Ndis802_11Encryption2Enabled, &wnd->capa.encr) ? -+ "; TKIP with WPA" : "", -+ test_bit(Ndis802_11AuthModeWPA2, &wnd->capa.auth) ? -+ ", WPA2" : "", -+ test_bit(Ndis802_11AuthModeWPA2PSK, &wnd->capa.auth) ? -+ ", WPA2PSK" : "", -+ test_bit(Ndis802_11Encryption3Enabled, &wnd->capa.encr) ? -+ "; AES/CCMP with WPA" : "", -+ test_bit(Ndis802_11AuthModeWPA2, &wnd->capa.auth) ? -+ ", WPA2" : "", -+ test_bit(Ndis802_11AuthModeWPA2PSK, &wnd->capa.auth) ? -+ ", WPA2PSK" : ""); -+ -+ res = mp_query_int(wnd, OID_GEN_CURRENT_PACKET_FILTER, &packet_filter); -+ if (!res) { -+ if (packet_filter != wnd->packet_filter) -+ WARNING("wrong packet_filter? 0x%08x, 0x%08x\n", -+ packet_filter, wnd->packet_filter); -+ add_text("packet_filter: 0x%08x\n", packet_filter); -+ } -+ -+ return 0; -+} -+ -+PROC_DECLARE_RO(hw) -+ -+static int proc_settings_read(struct seq_file *sf, void *v) -+{ -+ struct ndis_device *wnd = (struct ndis_device *)sf->private; -+ struct wrap_device_setting *setting; -+ -+ add_text("hangcheck_interval=%d\n", (hangcheck_interval == 0) ? -+ (wnd->hangcheck_interval / HZ) : -1); -+ -+ list_for_each_entry(setting, &wnd->wd->settings, list) { -+ add_text("%s=%s\n", setting->name, setting->value); -+ } -+ -+ list_for_each_entry(setting, &wnd->wd->driver->settings, list) { -+ add_text("%s=%s\n", setting->name, setting->value); -+ } -+ -+ return 0; -+} -+ -+static ssize_t proc_settings_write(struct file *file, const char __user *buf, -+ size_t count, loff_t *ppos) -+{ -+ struct ndis_device *wnd = PDE_DATA(file_inode(file)); -+ char setting[MAX_PROC_STR_LEN], *p; -+ unsigned int i; -+ NDIS_STATUS res; -+ -+ if (count > MAX_PROC_STR_LEN) -+ return -EINVAL; -+ -+ memset(setting, 0, sizeof(setting)); -+ if (copy_from_user(setting, buf, count)) -+ return -EFAULT; -+ -+ if ((p = strchr(setting, '\n'))) -+ *p = 0; -+ -+ if ((p = strchr(setting, '='))) -+ *p = 0; -+ -+ if (!strcmp(setting, "hangcheck_interval")) { -+ if (!p) -+ return -EINVAL; -+ p++; -+ i = simple_strtol(p, NULL, 10); -+ hangcheck_del(wnd); -+ if (i > 0) { -+ wnd->hangcheck_interval = i * HZ; -+ hangcheck_add(wnd); -+ } -+ } else if (!strcmp(setting, "suspend")) { -+ if (!p) -+ return -EINVAL; -+ p++; -+ i = simple_strtol(p, NULL, 10); -+ if (i <= 0 || i > 3) -+ return -EINVAL; -+ i = -1; -+ if (wrap_is_pci_bus(wnd->wd->dev_bus)) -+ i = wrap_pnp_suspend_pci_device(wnd->wd->pci.pdev, -+ PMSG_SUSPEND); -+ else if (wrap_is_usb_bus(wnd->wd->dev_bus)) -+ i = wrap_pnp_suspend_usb_device(wnd->wd->usb.intf, -+ PMSG_SUSPEND); -+ if (i) -+ return -EINVAL; -+ } else if (!strcmp(setting, "resume")) { -+ i = -1; -+ if (wrap_is_pci_bus(wnd->wd->dev_bus)) -+ i = wrap_pnp_resume_pci_device(wnd->wd->pci.pdev); -+ else if (wrap_is_usb_bus(wnd->wd->dev_bus)) -+ i = wrap_pnp_resume_usb_device(wnd->wd->usb.intf); -+ if (i) -+ return -EINVAL; -+ } else if (!strcmp(setting, "stats_enabled")) { -+ if (!p) -+ return -EINVAL; -+ p++; -+ i = simple_strtol(p, NULL, 10); -+ if (i > 0) -+ wnd->iw_stats_enabled = TRUE; -+ else -+ wnd->iw_stats_enabled = FALSE; -+ } else if (!strcmp(setting, "packet_filter")) { -+ if (!p) -+ return -EINVAL; -+ p++; -+ i = simple_strtol(p, NULL, 10); -+ res = mp_set_int(wnd, OID_GEN_CURRENT_PACKET_FILTER, i); -+ if (res) -+ WARNING("setting packet_filter failed: %08X", res); -+ } else if (!strcmp(setting, "reinit")) { -+ if (ndis_reinit(wnd) != NDIS_STATUS_SUCCESS) -+ return -EFAULT; -+ } else { -+ struct ndis_configuration_parameter param; -+ struct unicode_string key; -+ struct ansi_string ansi; -+ -+ if (!p) -+ return -EINVAL; -+ p++; -+ RtlInitAnsiString(&ansi, p); -+ if (RtlAnsiStringToUnicodeString(¶m.data.string, &ansi, -+ TRUE) != STATUS_SUCCESS) -+ EXIT1(return -EFAULT); -+ param.type = NdisParameterString; -+ RtlInitAnsiString(&ansi, setting); -+ if (RtlAnsiStringToUnicodeString(&key, &ansi, -+ TRUE) != STATUS_SUCCESS) { -+ RtlFreeUnicodeString(¶m.data.string); -+ EXIT1(return -EINVAL); -+ } -+ NdisWriteConfiguration(&res, wnd->nmb, &key, ¶m); -+ RtlFreeUnicodeString(&key); -+ RtlFreeUnicodeString(¶m.data.string); -+ if (res != NDIS_STATUS_SUCCESS) -+ return -EFAULT; -+ } -+ return count; -+} -+ -+PROC_DECLARE_RW(settings) -+ -+int wrap_procfs_add_ndis_device(struct ndis_device *wnd) -+{ -+ int ret; -+ -+ if (wrap_procfs_entry == NULL) -+ return -ENOMEM; -+ -+ if (wnd->procfs_iface) { -+ ERROR("%s already registered?", wnd->net_dev->name); -+ return -EINVAL; -+ } -+ wnd->procfs_iface = proc_mkdir(wnd->net_dev->name, wrap_procfs_entry); -+ if (wnd->procfs_iface == NULL) { -+ ERROR("couldn't create proc directory"); -+ return -ENOMEM; -+ } -+ proc_set_user(wnd->procfs_iface, proc_kuid, proc_kgid); -+ -+ ret = proc_make_entry_ro(hw, wnd->procfs_iface, wnd); -+ if (ret) -+ goto err_hw; -+ -+ ret = proc_make_entry_ro(stats, wnd->procfs_iface, wnd); -+ if (ret) -+ goto err_stats; -+ -+ ret = proc_make_entry_ro(encr, wnd->procfs_iface, wnd); -+ if (ret) -+ goto err_encr; -+ -+ ret = proc_make_entry_rw(settings, wnd->procfs_iface, wnd); -+ if (ret) -+ goto err_settings; -+ -+ return 0; -+ -+err_settings: -+ remove_proc_entry("encr", wnd->procfs_iface); -+err_encr: -+ remove_proc_entry("stats", wnd->procfs_iface); -+err_stats: -+ remove_proc_entry("hw", wnd->procfs_iface); -+err_hw: -+ proc_remove(wnd->procfs_iface); -+ wnd->procfs_iface = NULL; -+ return -ENOMEM; -+} -+ -+void wrap_procfs_remove_ndis_device(struct ndis_device *wnd) -+{ -+ struct proc_dir_entry *procfs_iface = xchg(&wnd->procfs_iface, NULL); -+ -+ if (procfs_iface == NULL) -+ return; -+ remove_proc_entry("hw", procfs_iface); -+ remove_proc_entry("stats", procfs_iface); -+ remove_proc_entry("encr", procfs_iface); -+ remove_proc_entry("settings", procfs_iface); -+ if (wrap_procfs_entry) -+ proc_remove(procfs_iface); -+} -+ -+static int proc_debug_read(struct seq_file *sf, void *v) -+{ -+#if ALLOC_DEBUG -+ enum alloc_type type; -+#endif -+ -+ add_text("%d\n", debug); -+#if ALLOC_DEBUG -+ for (type = 0; type < ALLOC_TYPE_MAX; type++) -+ add_text("total size of allocations in %s: %d\n", -+ alloc_type_name[type], alloc_size(type)); -+#endif -+ return 0; -+} -+ -+static ssize_t proc_debug_write(struct file *file, const char __user *buf, -+ size_t count, loff_t *ppos) -+{ -+ int i; -+ char setting[MAX_PROC_STR_LEN], *p; -+ -+ if (count > MAX_PROC_STR_LEN) -+ return -EINVAL; -+ -+ memset(setting, 0, sizeof(setting)); -+ if (copy_from_user(setting, buf, count)) -+ return -EFAULT; -+ -+ if ((p = strchr(setting, '\n'))) -+ *p = 0; -+ -+ if ((p = strchr(setting, '='))) -+ *p = 0; -+ -+ i = simple_strtol(setting, NULL, 10); -+ if (i >= 0 && i < 10) -+ debug = i; -+ else -+ return -EINVAL; -+ return count; -+} -+ -+PROC_DECLARE_RW(debug) -+ -+int wrap_procfs_init(void) -+{ -+ int ret; -+ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,5,0) -+ struct user_namespace *ns = current_user_ns(); -+ proc_kuid = make_kuid(ns, proc_uid); -+ if (!uid_valid(proc_kuid)) { -+ ERROR("invalid UID\n"); -+ return -EINVAL; -+ } -+ proc_kgid = make_kgid(ns, proc_gid); -+ if (!gid_valid(proc_kgid)) { -+ ERROR("invalid GID\n"); -+ return -EINVAL; -+ } -+#endif -+ -+ wrap_procfs_entry = proc_mkdir(DRIVER_NAME, proc_net_root); -+ if (wrap_procfs_entry == NULL) { -+ ERROR("couldn't create procfs directory"); -+ return -ENOMEM; -+ } -+ proc_set_user(wrap_procfs_entry, proc_kuid, proc_kgid); -+ -+ ret = proc_make_entry_rw(debug, wrap_procfs_entry, NULL); -+ -+ return ret; -+} -+ -+void wrap_procfs_remove(void) -+{ -+ if (wrap_procfs_entry == NULL) -+ return; -+ remove_proc_entry("debug", wrap_procfs_entry); -+ proc_remove(wrap_procfs_entry); -+} -diff -Nurp linux-5.6.11/3rdparty/ndiswrapper/rtl.c linux-5.6.11-ndis/3rdparty/ndiswrapper/rtl.c ---- linux-5.6.11/3rdparty/ndiswrapper/rtl.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.6.11-ndis/3rdparty/ndiswrapper/rtl.c 2020-05-03 15:18:33.000000000 +0300 -@@ -0,0 +1,715 @@ -+/* -+ * Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani -+ * Copyright (C) 2006-2007 Giridhar Pemmasani -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ */ -+ -+#include "ntoskernel.h" -+#include "rtl_exports.h" -+ -+wstdcall SIZE_T WIN_FUNC(RtlCompareMemory,3) -+ (const void *a, const void *b, SIZE_T len) -+{ -+ size_t i; -+ char *x, *y; -+ -+ ENTER1("%p %p %zd", a, b, len); -+ x = (char *)a; -+ y = (char *)b; -+ /* MSDN says this should return number of bytes that compare as -+ * equal. This can be interpreted as either all bytes that are -+ * equal in 'len' bytes or that only until the bytes compare as -+ * not equal. Initially we had it the former way, but Realtek driver -+ * doesn't like it that way - it takes many attempts to associate -+ * with WPA. ReactOS returns the number of bytes that are equal -+ * before the first differing byte. -+ * According to lords at #reactos, that is the way it should be -+ * and that msdn is wrong about it! -+ */ -+ for (i = 0; i < len && x[i] == y[i]; i++) -+ ; -+ return i; -+} -+ -+wstdcall void WIN_FUNC(RtlCopyMemory,3) -+ (void *dst, const void *src, SIZE_T length) -+{ -+ memcpy(dst, src, length); -+} -+ -+wstdcall void WIN_FUNC(RtlZeroMemory,2) -+ (void *dst, SIZE_T length) -+{ -+ memset(dst, 0, length); -+} -+ -+wstdcall void WIN_FUNC(RtlSecureZeroMemory,2) -+ (void *dst, SIZE_T length) -+{ -+ memset(dst, 0, length); -+} -+ -+wstdcall void WIN_FUNC(RtlFillMemory,3) -+ (void *dest, SIZE_T length, UCHAR fill) -+{ -+ memset(dest, fill, length); -+} -+ -+wstdcall void WIN_FUNC(RtlMoveMemory,3) -+ (void *dest, const void *src, SIZE_T length) -+{ -+ memmove(dest, src, length); -+} -+ -+wstdcall LONG WIN_FUNC(RtlCompareString,3) -+ (const struct ansi_string *s1, const struct ansi_string *s2, -+ BOOLEAN case_insensitive) -+{ -+ unsigned int len; -+ LONG ret = 0; -+ const char *p1, *p2; -+ -+ ENTER2(""); -+ len = min(s1->length, s2->length); -+ p1 = s1->buf; -+ p2 = s2->buf; -+ if (case_insensitive) -+ while (!ret && len--) -+ ret = toupper(*p1++) - toupper(*p2++); -+ else -+ while (!ret && len--) -+ ret = *p1++ - *p2++; -+ if (!ret) -+ ret = s1->length - s2->length; -+ EXIT2(return ret); -+} -+ -+wstdcall LONG WIN_FUNC(RtlCompareUnicodeString,3) -+ (const struct unicode_string *s1, const struct unicode_string *s2, -+ BOOLEAN case_insensitive) -+{ -+ unsigned int len; -+ LONG ret = 0; -+ const wchar_t *p1, *p2; -+ -+ ENTER2(""); -+ -+ len = min(s1->length, s2->length) / sizeof(wchar_t); -+ p1 = s1->buf; -+ p2 = s2->buf; -+ if (case_insensitive) -+ while (!ret && len--) -+ ret = toupper((u8)*p1++) - toupper((u8)*p2++); -+ else -+ while (!ret && len--) -+ ret = (u8)*p1++ - (u8)*p2++; -+ if (!ret) -+ ret = s1->length - s2->length; -+ TRACE2("len: %d, ret: %d", len, ret); -+ EXIT2(return ret); -+} -+ -+wstdcall BOOLEAN WIN_FUNC(RtlEqualString,3) -+ (const struct ansi_string *s1, const struct ansi_string *s2, -+ BOOLEAN case_insensitive) -+{ -+ ENTER1(""); -+ if (s1->length != s2->length) -+ return FALSE; -+ return !RtlCompareString(s1, s2, case_insensitive); -+} -+ -+wstdcall BOOLEAN WIN_FUNC(RtlEqualUnicodeString,3) -+ (const struct unicode_string *s1, const struct unicode_string *s2, -+ BOOLEAN case_insensitive) -+{ -+ if (s1->length != s2->length) -+ return FALSE; -+ return !RtlCompareUnicodeString(s1, s2, case_insensitive); -+} -+ -+wstdcall void WIN_FUNC(RtlCopyUnicodeString,2) -+ (struct unicode_string *dst, struct unicode_string *src) -+{ -+ ENTER1("%p, %p", dst, src); -+ if (src && src->buf && dst->buf) { -+ dst->length = min(src->length, dst->max_length); -+ memcpy(dst->buf, src->buf, dst->length); -+ if (dst->length < dst->max_length) -+ dst->buf[dst->length / sizeof(dst->buf[0])] = 0; -+ } else -+ dst->length = 0; -+ EXIT1(return); -+} -+ -+wstdcall void WIN_FUNC(RtlCopyString,2) -+ (struct ansi_string *dst, struct ansi_string *src) -+{ -+ ENTER1("%p, %p", dst, src); -+ if (src && src->buf && dst->buf) { -+ dst->length = min(src->length, dst->max_length); -+ memcpy(dst->buf, src->buf, dst->length); -+ if (dst->length < dst->max_length) -+ dst->buf[dst->length] = 0; -+ } else -+ dst->length = 0; -+ EXIT1(return); -+} -+ -+wstdcall NTSTATUS WIN_FUNC(RtlAppendUnicodeToString,2) -+ (struct unicode_string *dst, wchar_t *src) -+{ -+ if (src) { -+ int len; -+ for (len = 0; src[len]; len++) -+ ; -+ if (dst->length + (len * sizeof(dst->buf[0])) > dst->max_length) -+ return STATUS_BUFFER_TOO_SMALL; -+ memcpy(&dst->buf[dst->length], src, len * sizeof(dst->buf[0])); -+ dst->length += len * sizeof(dst->buf[0]); -+ if (dst->max_length > dst->length) -+ dst->buf[dst->length / sizeof(dst->buf[0])] = 0; -+ } -+ return STATUS_SUCCESS; -+} -+ -+wstdcall NTSTATUS WIN_FUNC(RtlAppendUnicodeStringToString,2) -+ (struct unicode_string *dst, struct unicode_string *src) -+{ -+ if (dst->max_length < src->length + dst->length) -+ return STATUS_BUFFER_TOO_SMALL; -+ if (src->length) { -+ memcpy(&dst->buf[dst->length], src->buf, src->length); -+ dst->length += src->length; -+ if (dst->max_length > dst->length) -+ dst->buf[dst->length / sizeof(dst->buf[0])] = 0; -+ } -+ EXIT2(return STATUS_SUCCESS); -+} -+ -+wstdcall ULONG WIN_FUNC(RtlxAnsiStringToUnicodeSize,1) -+ (const struct ansi_string *string) -+{ -+ int i; -+ -+ for (i = 0; i < string->max_length && string->buf[i]; i++) -+ ; -+ return i * sizeof(wchar_t); -+} -+ -+wstdcall ULONG WIN_FUNC(RtlxUnicodeStringToAnsiSize,1) -+ (const struct unicode_string *string) -+{ -+ int i; -+ -+ for (i = 0; i < string->max_length && string->buf[i]; i++) -+ ; -+ return i; -+} -+ -+wstdcall NTSTATUS WIN_FUNC(RtlAnsiStringToUnicodeString,3) -+ (struct unicode_string *dst, const struct ansi_string *src, -+ BOOLEAN alloc) -+{ -+ int i, n; -+ -+ n = RtlxAnsiStringToUnicodeSize(src); -+ TRACE2("%d, %d, %d, %d, %p", n, dst->max_length, src->length, -+ src->max_length, src->buf); -+ if (alloc == TRUE) { -+#if 0 -+ if (n == 0) { -+ dst->length = dst->max_length = 0; -+ dst->buf = NULL; -+ EXIT2(return STATUS_SUCCESS); -+ } -+#endif -+ dst->max_length = n + sizeof(dst->buf[0]); -+ dst->buf = ExAllocatePoolWithTag(NonPagedPool, -+ dst->max_length, 0); -+ if (!dst->buf) { -+ dst->max_length = dst->length = 0; -+ EXIT2(return STATUS_NO_MEMORY); -+ } -+ } else if (dst->max_length < n) -+ EXIT2(return STATUS_BUFFER_TOO_SMALL); -+ -+ dst->length = n; -+ n /= sizeof(dst->buf[0]); -+ for (i = 0; i < n; i++) -+ dst->buf[i] = src->buf[i]; -+ if (i * sizeof(dst->buf[0]) < dst->max_length) -+ dst->buf[i] = 0; -+ TRACE2("dst: length: %d, max_length: %d, string: %p", -+ dst->length, dst->max_length, src->buf); -+ EXIT2(return STATUS_SUCCESS); -+} -+ -+wstdcall NTSTATUS WIN_FUNC(RtlUnicodeStringToAnsiString,3) -+ (struct ansi_string *dst, const struct unicode_string *src, -+ BOOLEAN alloc) -+{ -+ int i, n; -+ -+ n = RtlxUnicodeStringToAnsiSize(src); -+ TRACE2("%d, %d, %d, %d, %p", n, dst->max_length, src->length, -+ src->max_length, src->buf); -+ if (alloc == TRUE) { -+#if 0 -+ if (n == 0) { -+ dst->length = dst->max_length = 0; -+ dst->buf = NULL; -+ EXIT2(return STATUS_SUCCESS); -+ } -+#endif -+ dst->max_length = n + sizeof(dst->buf[0]); -+ dst->buf = ExAllocatePoolWithTag(NonPagedPool, -+ dst->max_length, 0); -+ if (!dst->buf) { -+ dst->max_length = dst->length = 0; -+ EXIT1(return STATUS_NO_MEMORY); -+ } -+ } else if (dst->max_length < n) -+ EXIT2(return STATUS_BUFFER_TOO_SMALL); -+ -+ dst->length = n; -+ for (i = 0; i < n; i++) -+ dst->buf[i] = src->buf[i]; -+ if (i < dst->max_length) -+ dst->buf[i] = 0; -+ TRACE2("string: %p, len: %d(%d)", dst->buf, dst->length, -+ dst->max_length); -+ EXIT2(return STATUS_SUCCESS); -+} -+ -+wstdcall NTSTATUS WIN_FUNC(RtlUnicodeStringToInteger,3) -+ (struct unicode_string *ustring, ULONG base, ULONG *value) -+{ -+ int i, sign = 1; -+ ULONG res; -+ typeof(ustring->buf) string; -+ -+ if (ustring->length == 0) { -+ *value = 0; -+ return STATUS_SUCCESS; -+ } -+ -+ string = ustring->buf; -+ i = 0; -+ while (i < (ustring->length / sizeof(*string)) && string[i] == ' ') -+ i++; -+ if (string[i] == '+') -+ i++; -+ else if (string[i] == '-') { -+ i++; -+ sign = -1; -+ } -+ if (base == 0) { -+ base = 10; -+ if (i <= ((ustring->length / sizeof(*string)) - 2) && -+ string[i] == '0') { -+ i++; -+ if (string[i] == 'b') { -+ base = 2; -+ i++; -+ } else if (string[i] == 'o') { -+ base = 8; -+ i++; -+ } else if (string[i] == 'x') { -+ base = 16; -+ i++; -+ } -+ } -+ } -+ if (!(base == 2 || base == 8 || base == 10 || base == 16)) -+ EXIT2(return STATUS_INVALID_PARAMETER); -+ -+ for (res = 0; i < (ustring->length / sizeof(*string)); i++) { -+ int v; -+ if (isdigit((char)string[i])) -+ v = string[i] - '0'; -+ else if (isxdigit((char)string[i])) -+ v = tolower((char)string[i]) - 'a' + 10; -+ else -+ v = base; -+ if (v >= base) -+ EXIT2(return STATUS_INVALID_PARAMETER); -+ res = res * base + v; -+ } -+ *value = sign * res; -+ EXIT3(return STATUS_SUCCESS); -+} -+ -+wstdcall NTSTATUS WIN_FUNC(RtlCharToInteger,3) -+ (const char *string, ULONG base, ULONG *value) -+{ -+ int sign = 1; -+ ULONG res; -+ -+ if (!string || !value) -+ EXIT2(return STATUS_INVALID_PARAMETER); -+ while (*string == ' ') -+ string++; -+ if (*string == '+') -+ string++; -+ else if (*string == '-') { -+ string++; -+ sign = -1; -+ } -+ if (base == 0) { -+ base = 10; -+ if (*string == '0') { -+ string++; -+ if (*string == 'b') { -+ base = 2; -+ string++; -+ } else if (*string == 'o') { -+ base = 8; -+ string++; -+ } else if (*string == 'x') { -+ base = 16; -+ string++; -+ } -+ } -+ } -+ if (!(base == 2 || base == 8 || base == 10 || base == 16)) -+ EXIT2(return STATUS_INVALID_PARAMETER); -+ -+ for (res = 0; *string; string++) { -+ int v; -+ if (isdigit(*string)) -+ v = *string - '0'; -+ else if (isxdigit(*string)) -+ v = tolower(*string) - 'a' + 10; -+ else -+ v = base; -+ if (v >= base) -+ EXIT2(return STATUS_INVALID_PARAMETER); -+ res = res * base + v; -+ } -+ *value = sign * res; -+ EXIT3(return STATUS_SUCCESS); -+} -+ -+wstdcall NTSTATUS WIN_FUNC(RtlIntegerToUnicodeString,3) -+ (ULONG value, ULONG base, struct unicode_string *ustring) -+{ -+ typeof(ustring->buf) buf = ustring->buf; -+ int i; -+ -+ if (base == 0) -+ base = 10; -+ if (!(base == 2 || base == 8 || base == 10 || base == 16)) -+ return STATUS_INVALID_PARAMETER; -+ for (i = 0; value && i < ustring->max_length / sizeof(*buf); i++) { -+ int r; -+ r = value % base; -+ value /= base; -+ if (r < 10) -+ buf[i] = r + '0'; -+ else -+ buf[i] = r + 'a' - 10; -+ } -+ if (value) -+ return STATUS_BUFFER_OVERFLOW; -+ ustring->length = i * sizeof(*buf); -+ return STATUS_SUCCESS; -+} -+ -+wstdcall LARGE_INTEGER WIN_FUNC(RtlConvertUlongToLargeInteger,1) -+ (ULONG ul) -+{ -+ LARGE_INTEGER li = ul; -+ return li; -+} -+ -+wfastcall USHORT WIN_FUNC(RtlUshortByteSwap,1) -+ (USHORT src) -+{ -+ return __swab16(src); -+} -+ -+wfastcall ULONG WIN_FUNC(RtlUlongByteSwap,1) -+ (ULONG src) -+{ -+ /* ULONG is 32 bits for both 32-bit and 64-bit architectures */ -+ return __swab32(src); -+} -+ -+wstdcall NTSTATUS WIN_FUNC(RtlUpcaseUnicodeString,3) -+ (struct unicode_string *dst, struct unicode_string *src, BOOLEAN alloc) -+{ -+ USHORT i, n; -+ -+ if (alloc) { -+ dst->buf = ExAllocatePoolWithTag(NonPagedPool, src->length, 0); -+ if (dst->buf) -+ dst->max_length = src->length; -+ else -+ EXIT2(return STATUS_NO_MEMORY); -+ } else { -+ if (dst->max_length < src->length) -+ EXIT2(return STATUS_BUFFER_OVERFLOW); -+ } -+ -+ n = src->length / sizeof(src->buf[0]); -+ for (i = 0; i < n; i++) -+ dst->buf[i] = toupper(src->buf[i]); -+ -+ dst->length = src->length; -+ EXIT3(return STATUS_SUCCESS); -+} -+ -+wstdcall void WIN_FUNC(RtlInitUnicodeString,2) -+ (struct unicode_string *dst, const wchar_t *src) -+{ -+ ENTER2("%p", dst); -+ if (dst == NULL) -+ EXIT1(return); -+ if (src == NULL) { -+ dst->max_length = dst->length = 0; -+ dst->buf = NULL; -+ } else { -+ int i; -+ for (i = 0; (char)src[i]; i++) -+ ; -+ dst->buf = (typeof(dst->buf))src; -+ dst->length = i * sizeof(dst->buf[0]); -+ dst->max_length = (i + 1) * sizeof(dst->buf[0]); -+ } -+ EXIT1(return); -+} -+ -+wstdcall void WIN_FUNC(RtlInitAnsiString,2) -+ (struct ansi_string *dst, const char *src) -+{ -+ ENTER2("%p", dst); -+ if (dst == NULL) -+ EXIT2(return); -+ if (src == NULL) { -+ dst->max_length = dst->length = 0; -+ dst->buf = NULL; -+ } else { -+ int i; -+ for (i = 0; src[i]; i++) -+ ; -+ dst->buf = (typeof(dst->buf))src; -+ dst->length = i; -+ dst->max_length = i + 1; -+ } -+ TRACE2("%p", dst->buf); -+ EXIT2(return); -+} -+ -+wstdcall void WIN_FUNC(RtlInitString,2) -+ (struct ansi_string *dst, const char *src) -+{ -+ ENTER2("%p", dst); -+ RtlInitAnsiString(dst, src); -+ EXIT2(return); -+} -+ -+wstdcall void WIN_FUNC(RtlFreeUnicodeString,1) -+ (struct unicode_string *string) -+{ -+ ENTER2("%p", string); -+ if (string == NULL) -+ return; -+ if (string->buf) -+ ExFreePool(string->buf); -+ string->length = string->max_length = 0; -+ string->buf = NULL; -+ return; -+} -+ -+wstdcall void WIN_FUNC(RtlFreeAnsiString,1) -+ (struct ansi_string *string) -+{ -+ ENTER2("%p", string); -+ if (string == NULL) -+ return; -+ if (string->buf) -+ ExFreePool(string->buf); -+ string->length = string->max_length = 0; -+ string->buf = NULL; -+ return; -+} -+ -+/* guid string is of the form: {XXXXXXXX-XXXX-XXXX-XXXX-XXXXXXXXXXXX} */ -+wstdcall NTSTATUS WIN_FUNC(RtlGUIDFromString,2) -+ (struct unicode_string *guid_string, struct guid *guid) -+{ -+ struct ansi_string ansi; -+ NTSTATUS ret; -+ int i, j, k, l, m; -+ -+ ret = RtlUnicodeStringToAnsiString(&ansi, guid_string, TRUE); -+ if (ret != STATUS_SUCCESS) -+ return ret; -+ if (ansi.length != 37 || ansi.buf[0] != '{' || -+ ansi.buf[36] != '}' || ansi.buf[9] != '-' || -+ ansi.buf[14] != '-' || ansi.buf[19] != '-' || -+ ansi.buf[24] != '-') { -+ RtlFreeAnsiString(&ansi); -+ EXIT2(return STATUS_INVALID_PARAMETER); -+ } -+ memcpy(&guid->data4, &ansi.buf[29], sizeof(guid->data3)); -+ /* set end of data3 for scanf */ -+ ansi.buf[29] = 0; -+ if (sscanf(&ansi.buf[1], "%x", &i) == 1 && -+ sscanf(&ansi.buf[10], "%x", &j) == 1 && -+ sscanf(&ansi.buf[15], "%x", &k) == 1 && -+ sscanf(&ansi.buf[20], "%x", &l) == 1 && -+ sscanf(&ansi.buf[25], "%x", &m) == 1) { -+ guid->data1 = (i << 16) | (j < 8) | k; -+ guid->data2 = l; -+ guid->data3 = m; -+ ret = STATUS_SUCCESS; -+ } else -+ ret = STATUS_INVALID_PARAMETER; -+ RtlFreeAnsiString(&ansi); -+ return ret; -+} -+ -+wstdcall NTSTATUS WIN_FUNC(RtlQueryRegistryValues,5) -+ (ULONG relative, wchar_t *path, struct rtl_query_registry_table *tbl, -+ void *context, void *env) -+{ -+ struct ansi_string ansi; -+ struct unicode_string unicode; -+ NTSTATUS status, ret; -+ static int i = 0; -+ -+ ENTER3("%x, %p", relative, tbl); -+// TODO(); -+ -+ RtlInitUnicodeString(&unicode, path); -+ if (RtlUnicodeStringToAnsiString(&ansi, &unicode, TRUE) == -+ STATUS_SUCCESS) { -+ TRACE2("%s", ansi.buf); -+ RtlFreeAnsiString(&ansi); -+ } -+ ret = STATUS_SUCCESS; -+ for (; tbl->name; tbl++) { -+ RtlInitUnicodeString(&unicode, tbl->name); -+ if (RtlUnicodeStringToAnsiString(&ansi, &unicode, TRUE) == -+ STATUS_SUCCESS) { -+ TRACE2("name: %s", ansi.buf); -+ RtlFreeAnsiString(&ansi); -+ } -+ TRACE2("flags: %08X", tbl->flags); -+ if (tbl->flags == RTL_QUERY_REGISTRY_DIRECT) { -+ TRACE2("type: %08X", tbl->def_type); -+ if (tbl->def_type == REG_DWORD) { -+ /* Atheros USB driver needs this, but -+ * don't know where and how to get its -+ * value */ -+ if (tbl->def_data) { -+ TRACE2("def_data: %x", -+ *(int *)tbl->def_data); -+ *(DWORD *)tbl->context = 0x5f292a + i++; -+// *(DWORD *)tbl->def_data; -+ } else -+ *(DWORD *)tbl->context = 0x2345dbe; -+ } -+ } else { -+ void *data; -+ ULONG type, length; -+ -+ if (!tbl->query_func) { -+ ERROR("oops: no query_func"); -+ ret = STATUS_INVALID_PARAMETER; -+ break; -+ } -+ if (tbl->flags & RTL_QUERY_REGISTRY_NOVALUE) { -+ data = NULL; -+ type = REG_NONE; -+ length = 0; -+ } else { -+ data = tbl->def_data; -+ type = tbl->def_type; -+ length = tbl->def_length;; -+ } -+ TRACE2("calling query_func: %p", tbl->query_func); -+ status = LIN2WIN6(tbl->query_func, tbl->name, type, -+ data, length, context, env); -+ TRACE2("status: %08X", status); -+ if (status) { -+ if (status == STATUS_BUFFER_TOO_SMALL) -+ ret = STATUS_BUFFER_TOO_SMALL; -+ else -+ EXIT2(return STATUS_INVALID_PARAMETER); -+ } -+ } -+ } -+ EXIT3(return ret); -+} -+ -+wstdcall NTSTATUS WIN_FUNC(RtlWriteRegistryValue,6) -+ (ULONG relative, wchar_t *path, wchar_t *name, ULONG type, -+ void *data, ULONG length) -+{ -+ struct ansi_string ansi; -+ struct unicode_string unicode; -+ -+ ENTER3("%d", relative); -+ TODO(); -+ -+ RtlInitUnicodeString(&unicode, path); -+ if (RtlUnicodeStringToAnsiString(&ansi, &unicode, TRUE) == -+ STATUS_SUCCESS) { -+ TRACE2("%s", ansi.buf); -+ RtlFreeAnsiString(&ansi); -+ } -+ RtlInitUnicodeString(&unicode, name); -+ if (RtlUnicodeStringToAnsiString(&ansi, &unicode, TRUE) == -+ STATUS_SUCCESS) { -+ TRACE2("%s", ansi.buf); -+ RtlFreeAnsiString(&ansi); -+ } -+ EXIT5(return STATUS_SUCCESS); -+} -+ -+wstdcall NTSTATUS WIN_FUNC(RtlDeleteRegistryValue,3) -+ (ULONG relative, wchar_t *path, wchar_t *name) -+{ -+ return STATUS_SUCCESS; -+} -+ -+wstdcall void WIN_FUNC(RtlAssert,4) -+ (char *failed_assertion, char *file_name, ULONG line_num, char *message) -+{ -+ ERROR("assertion '%s' failed at %s line %d%s", -+ failed_assertion, file_name, line_num, message ? message : ""); -+ return; -+} -+ -+wstdcall void WIN_FUNC(RtlUnwind,0) -+ (void) -+{ -+ TODO(); -+} -+ -+wstdcall void WIN_FUNC(RtlRaiseException,1) -+ (void *exception_record) -+{ -+ TODO(); -+} -+ -+wstdcall BOOLEAN WIN_FUNC(RtlIsServicePackVersionInstalled,1) -+ (ULONG version) -+{ -+ /* Assume we have all service packs */ -+ TRACE1("version: %d", version); -+ return TRUE; -+} -diff -Nurp linux-5.6.11/3rdparty/ndiswrapper/usb.c linux-5.6.11-ndis/3rdparty/ndiswrapper/usb.c ---- linux-5.6.11/3rdparty/ndiswrapper/usb.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.6.11-ndis/3rdparty/ndiswrapper/usb.c 2020-05-03 15:18:33.000000000 +0300 -@@ -0,0 +1,1501 @@ -+/* -+ * Copyright (C) 2004 Jan Kiszka -+ * Copyright (C) 2005 Giridhar Pemmasani -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ */ -+ -+#include "ndis.h" -+#include "usb.h" -+#include "usb_exports.h" -+ -+#ifdef USB_DEBUG -+static unsigned int urb_id = 0; -+ -+#define DUMP_WRAP_URB(wrap_urb, dir) \ -+ USBTRACE("urb %p (%d) %s: buf: %p, len: %d, pipe: 0x%x, %d", \ -+ (wrap_urb)->urb, (wrap_urb)->id, \ -+ (dir == USB_DIR_OUT) ? "going down" : "coming back", \ -+ (wrap_urb)->urb->transfer_buffer, \ -+ (wrap_urb)->urb->transfer_buffer_length, \ -+ (wrap_urb)->urb->pipe, (wrap_urb)->urb->status) -+ -+#define DUMP_URB_BUFFER(urb, dir) \ -+ while (debug >= 2) { \ -+ int i; \ -+ char msg[20], *t; \ -+ if (!urb->transfer_buffer) \ -+ break; \ -+ if (!((usb_pipein(urb->pipe) && dir == USB_DIR_IN) || \ -+ (usb_pipeout(urb->pipe) && dir == USB_DIR_OUT))) \ -+ break; \ -+ t = msg; \ -+ t += sprintf(t, "%d: ", (urb)->actual_length); \ -+ for (i = 0; i < urb->actual_length && \ -+ t < &msg[sizeof(msg) - 4]; i++) \ -+ t += sprintf(t, "%02X ", \ -+ ((char *)urb->transfer_buffer)[i]); \ -+ *t = 0; \ -+ USBTRACE("%s", msg); \ -+ break; \ -+ } -+ -+#else -+ -+#define DUMP_WRAP_URB(wrap_urb, dir) (void)0 -+#define DUMP_URB_BUFFER(urb, dir) (void)0 -+ -+#endif -+ -+#define CUR_ALT_SETTING(intf) (intf)->cur_altsetting -+ -+#ifndef USB_CTRL_SET_TIMEOUT -+#define USB_CTRL_SET_TIMEOUT 5000 -+#endif -+ -+#ifndef USB_CTRL_GET_TIMEOUT -+#define USB_CTRL_GET_TIMEOUT 5000 -+#endif -+ -+#ifndef URB_NO_TRANSFER_DMA_MAP -+#define URB_NO_TRANSFER_DMA_MAP 0 -+#endif -+ -+/* wrap_urb->flags */ -+/* transfer_buffer for urb is allocated; free it in wrap_free_urb */ -+#define WRAP_URB_COPY_BUFFER 0x01 -+ -+static inline int wrap_cancel_urb(struct wrap_urb *wrap_urb) -+{ -+ int ret; -+ USBTRACE("%p, %p, %d", wrap_urb, wrap_urb->urb, wrap_urb->state); -+ if (wrap_urb->state != URB_SUBMITTED) -+ USBEXIT(return -1); -+ ret = usb_unlink_urb(wrap_urb->urb); -+ USBTRACE("ret: %d", ret); -+ if (ret == -EINPROGRESS) -+ return 0; -+ else { -+ WARNING("unlink failed: %d", ret); -+ return ret; -+ } -+} -+ -+#define URB_STATUS(wrap_urb) (wrap_urb->urb->status) -+ -+static struct nt_list wrap_urb_complete_list; -+static spinlock_t wrap_urb_complete_list_lock; -+ -+static struct work_struct wrap_urb_complete_work; -+static void wrap_urb_complete_worker(struct work_struct *dummy); -+ -+static void kill_all_urbs(struct wrap_device *wd, int complete) -+{ -+ struct nt_list *ent; -+ struct wrap_urb *wrap_urb; -+ KIRQL irql; -+ -+ USBTRACE("%d", wd->usb.num_alloc_urbs); -+ while (1) { -+ IoAcquireCancelSpinLock(&irql); -+ ent = RemoveHeadList(&wd->usb.wrap_urb_list); -+ IoReleaseCancelSpinLock(irql); -+ if (!ent) -+ break; -+ wrap_urb = container_of(ent, struct wrap_urb, list); -+ if (wrap_urb->state == URB_SUBMITTED) { -+ WARNING("Windows driver %s didn't free urb: %p", -+ wd->driver->name, wrap_urb->urb); -+ if (!complete) -+ wrap_urb->urb->complete = NULL; -+ usb_kill_urb(wrap_urb->urb); -+ } -+ USBTRACE("%p, %p", wrap_urb, wrap_urb->urb); -+ usb_free_urb(wrap_urb->urb); -+ kfree(wrap_urb); -+ } -+ wd->usb.num_alloc_urbs = 0; -+} -+ -+/* for a given Linux urb status code, return corresponding NT urb status */ -+static USBD_STATUS wrap_urb_status(int urb_status) -+{ -+ switch (urb_status) { -+ case 0: -+ return USBD_STATUS_SUCCESS; -+ case -EPROTO: -+ return USBD_STATUS_TIMEOUT; -+ case -EILSEQ: -+ return USBD_STATUS_CRC; -+ case -EPIPE: -+ return USBD_STATUS_INVALID_PIPE_HANDLE; -+ case -ECOMM: -+ return USBD_STATUS_DATA_OVERRUN; -+ case -ENOSR: -+ return USBD_STATUS_DATA_UNDERRUN; -+ case -EOVERFLOW: -+ return USBD_STATUS_BABBLE_DETECTED; -+ case -EREMOTEIO: -+ return USBD_STATUS_ERROR_SHORT_TRANSFER;; -+ case -ENODEV: -+ case -ESHUTDOWN: -+ case -ENOENT: -+ return USBD_STATUS_DEVICE_GONE; -+ case -ENOMEM: -+ return USBD_STATUS_NO_MEMORY; -+ case -EINVAL: -+ return USBD_STATUS_REQUEST_FAILED; -+ default: -+ return USBD_STATUS_NOT_SUPPORTED; -+ } -+} -+ -+/* for a given USBD_STATUS, return its corresponding NTSTATUS (for irp) */ -+static NTSTATUS nt_urb_irp_status(USBD_STATUS nt_urb_status) -+{ -+ switch (nt_urb_status) { -+ case USBD_STATUS_SUCCESS: -+ return STATUS_SUCCESS; -+ case USBD_STATUS_DEVICE_GONE: -+ return STATUS_DEVICE_REMOVED; -+ case USBD_STATUS_PENDING: -+ return STATUS_PENDING; -+ case USBD_STATUS_NOT_SUPPORTED: -+ return STATUS_NOT_IMPLEMENTED; -+ case USBD_STATUS_NO_MEMORY: -+ return STATUS_NO_MEMORY; -+ case USBD_STATUS_REQUEST_FAILED: -+ return STATUS_NOT_SUPPORTED; -+ default: -+ return STATUS_FAILURE; -+ } -+} -+ -+static void wrap_free_urb(struct urb *urb) -+{ -+ struct wrap_urb *wrap_urb = urb->context; -+ struct irp *irp = wrap_urb->irp; -+ struct wrap_device *wd = IRP_WRAP_DEVICE(irp); -+ -+ USBTRACE("freeing urb: %p", urb); -+ irp->cancel_routine = NULL; -+ IRP_WRAP_URB(irp) = NULL; -+ if (wrap_urb->flags & WRAP_URB_COPY_BUFFER) { -+ USBTRACE("freeing DMA buffer for URB: %p %p", -+ urb, urb->transfer_buffer); -+ usb_free_coherent(wd->usb.udev, urb->transfer_buffer_length, -+ urb->transfer_buffer, urb->transfer_dma); -+ } -+ kfree(urb->setup_packet); -+ if (wd->usb.num_alloc_urbs > MAX_ALLOCATED_URBS) { -+ IoAcquireCancelSpinLock(&irp->cancel_irql); -+ RemoveEntryList(&wrap_urb->list); -+ wd->usb.num_alloc_urbs--; -+ IoReleaseCancelSpinLock(irp->cancel_irql); -+ usb_free_urb(urb); -+ kfree(wrap_urb); -+ } else { -+ wrap_urb->state = URB_FREE; -+ wrap_urb->flags = 0; -+ wrap_urb->irp = NULL; -+ } -+ return; -+} -+ -+void wrap_suspend_urbs(struct wrap_device *wd) -+{ -+ /* TODO: do we need to cancel urbs? */ -+ USBTRACE("%p, %d", wd, wd->usb.num_alloc_urbs); -+} -+ -+void wrap_resume_urbs(struct wrap_device *wd) -+{ -+ /* TODO: do we need to resubmit urbs? */ -+ USBTRACE("%p, %d", wd, wd->usb.num_alloc_urbs); -+} -+ -+wstdcall void wrap_cancel_irp(struct device_object *dev_obj, struct irp *irp) -+{ -+ struct urb *urb; -+ struct wrap_urb *wrap_urb = IRP_WRAP_URB(irp); -+ -+ /* NB: this function is called holding Cancel spinlock */ -+ USBENTER("irp: %p", irp); -+ urb = wrap_urb->urb; -+ USBTRACE("canceling urb %p", urb); -+ if (wrap_cancel_urb(IRP_WRAP_URB(irp))) { -+ irp->cancel = FALSE; -+ ERROR("urb %p can't be canceled: %d", urb, wrap_urb->state); -+ } else -+ USBTRACE("urb %p canceled", urb); -+ IoReleaseCancelSpinLock(irp->cancel_irql); -+ return; -+} -+WIN_FUNC_DECL(wrap_cancel_irp,2) -+ -+static struct urb *wrap_alloc_urb(struct irp *irp, unsigned int pipe, -+ void *buf, unsigned int buf_len) -+{ -+ struct urb *urb; -+ gfp_t alloc_flags; -+ struct wrap_urb *wrap_urb; -+ struct wrap_device *wd; -+ -+ USBENTER("irp: %p", irp); -+ wd = IRP_WRAP_DEVICE(irp); -+ -+ /* Don't interfere with URB cleanup by the kernel */ -+ if (test_bit(HW_DISABLED, &wd->hw_status)) -+ return NULL; -+ -+ alloc_flags = irql_gfp(); -+ IoAcquireCancelSpinLock(&irp->cancel_irql); -+ urb = NULL; -+ nt_list_for_each_entry(wrap_urb, &wd->usb.wrap_urb_list, list) { -+ if (cmpxchg(&wrap_urb->state, URB_FREE, -+ URB_ALLOCATED) == URB_FREE) { -+ urb = wrap_urb->urb; -+ /* Clean URB but keep the refcount */ -+ memset((char *)urb + sizeof(urb->kref), 0, -+ sizeof(*urb) - sizeof(urb->kref)); -+ break; -+ } -+ } -+ if (!urb) { -+ IoReleaseCancelSpinLock(irp->cancel_irql); -+ wrap_urb = kzalloc(sizeof(*wrap_urb), alloc_flags); -+ if (!wrap_urb) { -+ WARNING("couldn't allocate memory"); -+ return NULL; -+ } -+ urb = usb_alloc_urb(0, alloc_flags); -+ if (!urb) { -+ WARNING("couldn't allocate urb"); -+ kfree(wrap_urb); -+ return NULL; -+ } -+ IoAcquireCancelSpinLock(&irp->cancel_irql); -+ wrap_urb->urb = urb; -+ wrap_urb->state = URB_ALLOCATED; -+ InsertTailList(&wd->usb.wrap_urb_list, &wrap_urb->list); -+ wd->usb.num_alloc_urbs++; -+ } -+ -+#ifdef URB_ASYNC_UNLINK -+ urb->transfer_flags |= URB_ASYNC_UNLINK; -+#elif defined(USB_ASYNC_UNLINK) -+ urb->transfer_flags |= USB_ASYNC_UNLINK; -+#endif -+ urb->context = wrap_urb; -+ wrap_urb->irp = irp; -+ IRP_WRAP_URB(irp) = wrap_urb; -+ /* called as Windows function */ -+ irp->cancel_routine = WIN_FUNC_PTR(wrap_cancel_irp,2); -+ IoReleaseCancelSpinLock(irp->cancel_irql); -+ USBTRACE("urb: %p", urb); -+ -+ urb->transfer_buffer_length = buf_len; -+ if (buf_len && buf && (!virt_addr_valid(buf) -+#if defined(CONFIG_HIGHMEM) || defined(CONFIG_HIGHMEM4G) -+ || PageHighMem(virt_to_page(buf)) -+#endif -+ )) { -+ urb->transfer_buffer = -+ usb_alloc_coherent(wd->usb.udev, buf_len, alloc_flags, -+ &urb->transfer_dma); -+ if (!urb->transfer_buffer) { -+ WARNING("couldn't allocate dma buf"); -+ IoAcquireCancelSpinLock(&irp->cancel_irql); -+ irp->cancel_routine = NULL; -+ wrap_urb->state = URB_FREE; -+ wrap_urb->irp = NULL; -+ IRP_WRAP_URB(irp) = NULL; -+ IoReleaseCancelSpinLock(irp->cancel_irql); -+ return NULL; -+ } -+ if (urb->transfer_dma) -+ urb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP; -+ wrap_urb->flags |= WRAP_URB_COPY_BUFFER; -+ if (usb_pipeout(pipe)) -+ memcpy(urb->transfer_buffer, buf, buf_len); -+ USBTRACE("DMA buf for urb %p: %p", urb, urb->transfer_buffer); -+ } else -+ urb->transfer_buffer = buf; -+ return urb; -+} -+ -+static USBD_STATUS wrap_submit_urb(struct irp *irp) -+{ -+ int ret; -+ struct wrap_urb *wrap_urb = IRP_WRAP_URB(irp); -+ struct urb *urb = wrap_urb->urb; -+ union nt_urb *nt_urb = IRP_URB(irp); -+ -+#ifdef USB_DEBUG -+ if (wrap_urb->state != URB_ALLOCATED) { -+ ERROR("urb %p is in wrong state: %d", -+ urb, wrap_urb->state); -+ NT_URB_STATUS(nt_urb) = USBD_STATUS_REQUEST_FAILED; -+ return NT_URB_STATUS(nt_urb); -+ } -+ wrap_urb->id = pre_atomic_add(urb_id, 1); -+#endif -+ DUMP_WRAP_URB(IRP_WRAP_URB(irp), USB_DIR_OUT); -+ irp->io_status.status = STATUS_PENDING; -+ irp->io_status.info = 0; -+ NT_URB_STATUS(nt_urb) = USBD_STATUS_PENDING; -+ IoMarkIrpPending(irp); -+ DUMP_URB_BUFFER(urb, USB_DIR_OUT); -+ USBTRACE("%p", urb); -+ wrap_urb->state = URB_SUBMITTED; -+ ret = usb_submit_urb(urb, irql_gfp()); -+ if (ret) { -+ USBTRACE("ret: %d", ret); -+ wrap_free_urb(urb); -+ /* we assume that IRP was not in pending state before */ -+ IoUnmarkIrpPending(irp); -+ NT_URB_STATUS(nt_urb) = wrap_urb_status(ret); -+ USBEXIT(return NT_URB_STATUS(nt_urb)); -+ } else -+ USBEXIT(return USBD_STATUS_PENDING); -+} -+ -+static void wrap_urb_complete(struct urb *urb ISR_PT_REGS_PARAM_DECL) -+{ -+ struct irp *irp; -+ struct wrap_urb *wrap_urb; -+ -+ wrap_urb = urb->context; -+ USBTRACE("%p (%p) completed", wrap_urb, urb); -+ irp = wrap_urb->irp; -+ DUMP_WRAP_URB(wrap_urb, USB_DIR_IN); -+ irp->cancel_routine = NULL; -+#ifdef USB_DEBUG -+ if (wrap_urb->state != URB_SUBMITTED) { -+ WARNING("urb %p in wrong state: %d (%d)", urb, wrap_urb->state, -+ urb->status); -+ return; -+ } -+#endif -+ wrap_urb->state = URB_COMPLETED; -+ spin_lock(&wrap_urb_complete_list_lock); -+ InsertTailList(&wrap_urb_complete_list, &wrap_urb->complete_list); -+ spin_unlock(&wrap_urb_complete_list_lock); -+ queue_work(ntos_wq, &wrap_urb_complete_work); -+} -+ -+/* one worker for all devices */ -+static void wrap_urb_complete_worker(struct work_struct *dummy) -+{ -+ struct irp *irp; -+ struct urb *urb; -+ struct usbd_bulk_or_intr_transfer *bulk_int_tx; -+ struct usbd_vendor_or_class_request *vc_req; -+ union nt_urb *nt_urb; -+ struct wrap_urb *wrap_urb; -+ struct nt_list *ent; -+ unsigned long flags; -+ -+ USBENTER(""); -+ while (1) { -+ spin_lock_irqsave(&wrap_urb_complete_list_lock, flags); -+ ent = RemoveHeadList(&wrap_urb_complete_list); -+ spin_unlock_irqrestore(&wrap_urb_complete_list_lock, flags); -+ if (!ent) -+ break; -+ wrap_urb = container_of(ent, struct wrap_urb, complete_list); -+ urb = wrap_urb->urb; -+#ifdef USB_DEBUG -+ if (wrap_urb->state != URB_COMPLETED && -+ wrap_urb->state != URB_INT_UNLINKED) -+ WARNING("urb %p in wrong state: %d", -+ urb, wrap_urb->state); -+#endif -+ irp = wrap_urb->irp; -+ DUMP_IRP(irp); -+ nt_urb = IRP_URB(irp); -+ USBTRACE("urb: %p, nt_urb: %p, status: %d", -+ urb, nt_urb, urb->status); -+ switch (urb->status) { -+ case 0: -+ /* successfully transferred */ -+ irp->io_status.info = urb->actual_length; -+ if (nt_urb->header.function == -+ URB_FUNCTION_BULK_OR_INTERRUPT_TRANSFER) { -+ bulk_int_tx = &nt_urb->bulk_int_transfer; -+ bulk_int_tx->transfer_buffer_length = -+ urb->actual_length; -+ DUMP_URB_BUFFER(urb, USB_DIR_IN); -+ if ((wrap_urb->flags & WRAP_URB_COPY_BUFFER) && -+ usb_pipein(urb->pipe)) -+ memcpy(bulk_int_tx->transfer_buffer, -+ urb->transfer_buffer, -+ urb->actual_length); -+ } else { // vendor or class request -+ vc_req = &nt_urb->vendor_class_request; -+ vc_req->transfer_buffer_length = -+ urb->actual_length; -+ DUMP_URB_BUFFER(urb, USB_DIR_IN); -+ if ((wrap_urb->flags & WRAP_URB_COPY_BUFFER) && -+ usb_pipein(urb->pipe)) -+ memcpy(vc_req->transfer_buffer, -+ urb->transfer_buffer, -+ urb->actual_length); -+ } -+ NT_URB_STATUS(nt_urb) = USBD_STATUS_SUCCESS; -+ irp->io_status.status = STATUS_SUCCESS; -+ break; -+ case -ENOENT: -+ case -ECONNRESET: -+ /* urb canceled */ -+ irp->io_status.info = 0; -+ TRACE2("urb %p canceled", urb); -+ NT_URB_STATUS(nt_urb) = USBD_STATUS_SUCCESS; -+ irp->io_status.status = STATUS_CANCELLED; -+ break; -+ default: -+ TRACE2("irp: %p, urb: %p, status: %d/%d", -+ irp, urb, urb->status, wrap_urb->state); -+ irp->io_status.info = 0; -+ NT_URB_STATUS(nt_urb) = wrap_urb_status(urb->status); -+ irp->io_status.status = -+ nt_urb_irp_status(NT_URB_STATUS(nt_urb)); -+ break; -+ } -+ wrap_free_urb(urb); -+ IoCompleteRequest(irp, IO_NO_INCREMENT); -+ } -+ USBEXIT(return); -+} -+ -+static USBD_STATUS wrap_bulk_or_intr_trans(struct irp *irp) -+{ -+ struct usb_endpoint_descriptor *pipe_handle; -+ struct urb *urb; -+ unsigned int pipe; -+ struct usbd_bulk_or_intr_transfer *bulk_int_tx; -+ USBD_STATUS status; -+ struct wrap_device *wd = IRP_WRAP_DEVICE(irp); -+ struct usb_device *udev = wd->usb.udev; -+ union nt_urb *nt_urb = IRP_URB(irp); -+ -+ bulk_int_tx = &nt_urb->bulk_int_transfer; -+ pipe_handle = bulk_int_tx->pipe_handle; -+ USBTRACE("flags: 0x%x, length: %u, buffer: %p, handle: %p", -+ bulk_int_tx->transfer_flags, -+ bulk_int_tx->transfer_buffer_length, -+ bulk_int_tx->transfer_buffer, pipe_handle); -+ -+ if (USBD_IS_BULK_PIPE(pipe_handle)) { -+ if (bulk_int_tx->transfer_flags & USBD_TRANSFER_DIRECTION_IN) -+ pipe = usb_rcvbulkpipe(udev, -+ pipe_handle->bEndpointAddress); -+ else -+ pipe = usb_sndbulkpipe(udev, -+ pipe_handle->bEndpointAddress); -+ } else { -+ if (bulk_int_tx->transfer_flags & USBD_TRANSFER_DIRECTION_IN) -+ pipe = usb_rcvintpipe(udev, -+ pipe_handle->bEndpointAddress); -+ else -+ pipe = usb_sndintpipe(udev, -+ pipe_handle->bEndpointAddress); -+ } -+ -+ DUMP_IRP(irp); -+ urb = wrap_alloc_urb(irp, pipe, bulk_int_tx->transfer_buffer, -+ bulk_int_tx->transfer_buffer_length); -+ if (!urb) { -+ ERROR("couldn't allocate urb"); -+ return USBD_STATUS_NO_MEMORY; -+ } -+ if (usb_pipein(pipe) && -+ (!(bulk_int_tx->transfer_flags & USBD_SHORT_TRANSFER_OK))) { -+ USBTRACE("short not ok"); -+ urb->transfer_flags |= URB_SHORT_NOT_OK; -+ } -+ if (usb_pipebulk(pipe)) { -+ usb_fill_bulk_urb(urb, udev, pipe, urb->transfer_buffer, -+ bulk_int_tx->transfer_buffer_length, -+ wrap_urb_complete, urb->context); -+ USBTRACE("submitting bulk urb %p on pipe 0x%x (ep 0x%x)", -+ urb, urb->pipe, pipe_handle->bEndpointAddress); -+ } else { -+ usb_fill_int_urb(urb, udev, pipe, urb->transfer_buffer, -+ bulk_int_tx->transfer_buffer_length, -+ wrap_urb_complete, urb->context, -+ pipe_handle->bInterval); -+ USBTRACE("submitting interrupt urb %p on pipe 0x%x (ep 0x%x), " -+ "intvl: %d", urb, urb->pipe, -+ pipe_handle->bEndpointAddress, pipe_handle->bInterval); -+ } -+ status = wrap_submit_urb(irp); -+ USBTRACE("status: %08X", status); -+ USBEXIT(return status); -+} -+ -+static USBD_STATUS wrap_vendor_or_class_req(struct irp *irp) -+{ -+ u8 req_type; -+ unsigned int pipe; -+ struct usbd_vendor_or_class_request *vc_req; -+ USBD_STATUS status; -+ struct urb *urb; -+ struct usb_ctrlrequest *dr; -+ struct wrap_device *wd = IRP_WRAP_DEVICE(irp); -+ struct usb_device *udev = wd->usb.udev; -+ union nt_urb *nt_urb = IRP_URB(irp); -+ -+ vc_req = &nt_urb->vendor_class_request; -+ USBTRACE("bits: %x, req: %x, val: %08x, index: %08x, flags: %x," -+ "buf: %p, len: %d", vc_req->reserved_bits, vc_req->request, -+ vc_req->value, vc_req->index, vc_req->transfer_flags, -+ vc_req->transfer_buffer, vc_req->transfer_buffer_length); -+ -+ USBTRACE("%x", nt_urb->header.function); -+ switch (nt_urb->header.function) { -+ case URB_FUNCTION_VENDOR_DEVICE: -+ req_type = USB_TYPE_VENDOR | USB_RECIP_DEVICE; -+ break; -+ case URB_FUNCTION_VENDOR_INTERFACE: -+ req_type = USB_TYPE_VENDOR | USB_RECIP_INTERFACE; -+ break; -+ case URB_FUNCTION_VENDOR_ENDPOINT: -+ req_type = USB_TYPE_VENDOR | USB_RECIP_ENDPOINT; -+ break; -+ case URB_FUNCTION_VENDOR_OTHER: -+ req_type = USB_TYPE_VENDOR | USB_RECIP_OTHER; -+ break; -+ case URB_FUNCTION_CLASS_DEVICE: -+ req_type = USB_TYPE_CLASS | USB_RECIP_DEVICE; -+ break; -+ case URB_FUNCTION_CLASS_INTERFACE: -+ req_type = USB_TYPE_CLASS | USB_RECIP_INTERFACE; -+ break; -+ case URB_FUNCTION_CLASS_ENDPOINT: -+ req_type = USB_TYPE_CLASS | USB_RECIP_ENDPOINT; -+ break; -+ case URB_FUNCTION_CLASS_OTHER: -+ req_type = USB_TYPE_CLASS | USB_RECIP_OTHER; -+ break; -+ default: -+ ERROR("unknown request type: %x", nt_urb->header.function); -+ req_type = 0; -+ break; -+ } -+ -+ req_type |= vc_req->reserved_bits; -+ USBTRACE("req type: %08x", req_type); -+ -+ if (vc_req->transfer_flags & USBD_TRANSFER_DIRECTION_IN) { -+ pipe = usb_rcvctrlpipe(udev, 0); -+ req_type |= USB_DIR_IN; -+ USBTRACE("pipe: %x, dir in", pipe); -+ } else { -+ pipe = usb_sndctrlpipe(udev, 0); -+ req_type |= USB_DIR_OUT; -+ USBTRACE("pipe: %x, dir out", pipe); -+ } -+ urb = wrap_alloc_urb(irp, pipe, vc_req->transfer_buffer, -+ vc_req->transfer_buffer_length); -+ if (!urb) { -+ ERROR("couldn't allocate urb"); -+ return USBD_STATUS_NO_MEMORY; -+ } -+ -+ if (usb_pipein(pipe) && -+ (!(vc_req->transfer_flags & USBD_SHORT_TRANSFER_OK))) { -+ USBTRACE("short not ok"); -+ urb->transfer_flags |= URB_SHORT_NOT_OK; -+ } -+ -+ dr = kzalloc(sizeof(*dr), irql_gfp()); -+ if (!dr) { -+ ERROR("couldn't allocate memory"); -+ wrap_free_urb(urb); -+ return USBD_STATUS_NO_MEMORY; -+ } -+ dr->bRequestType = req_type; -+ dr->bRequest = vc_req->request; -+ dr->wValue = cpu_to_le16(vc_req->value); -+ dr->wIndex = cpu_to_le16((u16)vc_req->index); -+ dr->wLength = cpu_to_le16((u16)urb->transfer_buffer_length); -+ -+ usb_fill_control_urb(urb, udev, pipe, (unsigned char *)dr, -+ urb->transfer_buffer, urb->transfer_buffer_length, -+ wrap_urb_complete, urb->context); -+ status = wrap_submit_urb(irp); -+ USBTRACE("status: %08X", status); -+ USBEXIT(return status); -+} -+ -+static USBD_STATUS wrap_reset_pipe(struct usb_device *udev, struct irp *irp) -+{ -+ int ret; -+ union nt_urb *nt_urb; -+ struct usb_endpoint_descriptor *pipe_handle; -+ unsigned int pipe1, pipe2; -+ -+ nt_urb = IRP_URB(irp); -+ pipe_handle = nt_urb->pipe_req.pipe_handle; -+ /* TODO: not clear if both directions should be cleared? */ -+ if (USBD_IS_BULK_PIPE(pipe_handle)) { -+ pipe1 = usb_rcvbulkpipe(udev, pipe_handle->bEndpointAddress); -+ pipe2 = usb_sndbulkpipe(udev, pipe_handle->bEndpointAddress); -+ } else if (USBD_IS_INT_PIPE(pipe_handle)) { -+ pipe1 = usb_rcvintpipe(udev, pipe_handle->bEndpointAddress); -+ pipe2 = pipe1; -+ } else { -+ WARNING("invalid pipe %d", pipe_handle->bEndpointAddress); -+ return USBD_STATUS_INVALID_PIPE_HANDLE; -+ } -+ USBTRACE("ep: %d, pipe: 0x%x", pipe_handle->bEndpointAddress, pipe1); -+ ret = usb_clear_halt(udev, pipe1); -+ if (ret) -+ USBTRACE("resetting pipe %d failed: %d", pipe1, ret); -+ if (pipe2 != pipe1) { -+ ret = usb_clear_halt(udev, pipe2); -+ if (ret) -+ USBTRACE("resetting pipe %d failed: %d", pipe2, ret); -+ } -+// return wrap_urb_status(ret); -+ return USBD_STATUS_SUCCESS; -+} -+ -+static USBD_STATUS wrap_abort_pipe(struct usb_device *udev, struct irp *irp) -+{ -+ union nt_urb *nt_urb; -+ struct usb_endpoint_descriptor *pipe_handle; -+ struct wrap_urb *wrap_urb; -+ struct wrap_device *wd; -+ KIRQL irql; -+ -+ wd = IRP_WRAP_DEVICE(irp); -+ nt_urb = IRP_URB(irp); -+ pipe_handle = nt_urb->pipe_req.pipe_handle; -+ USBENTER("%p, %x", irp, pipe_handle->bEndpointAddress); -+ IoAcquireCancelSpinLock(&irql); -+ nt_list_for_each_entry(wrap_urb, &wd->usb.wrap_urb_list, list) { -+ USBTRACE("%p, %p, %d, %x, %x", wrap_urb, wrap_urb->urb, -+ wrap_urb->state, wrap_urb->urb->pipe, -+ usb_pipeendpoint(wrap_urb->urb->pipe)); -+ /* for WG111T driver, urbs for endpoint 0 should also -+ * be canceled */ -+ if ((usb_pipeendpoint(wrap_urb->urb->pipe) == -+ pipe_handle->bEndpointAddress) || -+ (usb_pipeendpoint(wrap_urb->urb->pipe) == 0)) { -+ if (wrap_cancel_urb(wrap_urb) == 0) -+ USBTRACE("canceled wrap_urb: %p", wrap_urb); -+ } -+ } -+ IoReleaseCancelSpinLock(irql); -+ NT_URB_STATUS(nt_urb) = USBD_STATUS_CANCELED; -+ USBEXIT(return USBD_STATUS_SUCCESS); -+} -+ -+static USBD_STATUS wrap_set_clear_feature(struct usb_device *udev, -+ struct irp *irp) -+{ -+ union nt_urb *nt_urb; -+ struct urb_control_feature_request *feat_req; -+ int ret = 0; -+ __u8 request, type; -+ __u16 feature; -+ -+ nt_urb = IRP_URB(irp); -+ feat_req = &nt_urb->feat_req; -+ feature = feat_req->feature_selector; -+ switch (nt_urb->header.function) { -+ case URB_FUNCTION_SET_FEATURE_TO_DEVICE: -+ request = USB_REQ_SET_FEATURE; -+ type = USB_DT_DEVICE; -+ break; -+ case URB_FUNCTION_SET_FEATURE_TO_INTERFACE: -+ request = USB_REQ_SET_FEATURE; -+ type = USB_DT_INTERFACE; -+ break; -+ case URB_FUNCTION_SET_FEATURE_TO_ENDPOINT: -+ request = USB_REQ_SET_FEATURE; -+ type = USB_DT_ENDPOINT; -+ break; -+ case URB_FUNCTION_CLEAR_FEATURE_TO_DEVICE: -+ request = USB_REQ_CLEAR_FEATURE; -+ type = USB_DT_DEVICE; -+ break; -+ case URB_FUNCTION_CLEAR_FEATURE_TO_INTERFACE: -+ request = USB_REQ_CLEAR_FEATURE; -+ type = USB_DT_INTERFACE; -+ break; -+ case URB_FUNCTION_CLEAR_FEATURE_TO_ENDPOINT: -+ request = USB_REQ_CLEAR_FEATURE; -+ type = USB_DT_ENDPOINT; -+ break; -+ default: -+ WARNING("invalid function: %x", nt_urb->header.function); -+ NT_URB_STATUS(nt_urb) = USBD_STATUS_NOT_SUPPORTED; -+ return NT_URB_STATUS(nt_urb); -+ } -+ ret = usb_control_msg(udev, usb_sndctrlpipe(udev, 0), request, type, -+ feature, feat_req->index, NULL, 0, 1000); -+ NT_URB_STATUS(nt_urb) = wrap_urb_status(ret); -+ USBEXIT(return NT_URB_STATUS(nt_urb)); -+} -+ -+static USBD_STATUS wrap_get_status_request(struct usb_device *udev, -+ struct irp *irp) -+{ -+ union nt_urb *nt_urb; -+ struct urb_control_get_status_request *status_req; -+ int ret = 0; -+ __u8 type; -+ -+ nt_urb = IRP_URB(irp); -+ status_req = &nt_urb->status_req; -+ switch (nt_urb->header.function) { -+ case URB_FUNCTION_GET_STATUS_FROM_DEVICE: -+ type = USB_RECIP_DEVICE; -+ break; -+ case URB_FUNCTION_GET_STATUS_FROM_INTERFACE: -+ type = USB_RECIP_INTERFACE; -+ break; -+ case URB_FUNCTION_GET_STATUS_FROM_ENDPOINT: -+ type = USB_RECIP_ENDPOINT; -+ break; -+ default: -+ WARNING("invalid function: %x", nt_urb->header.function); -+ NT_URB_STATUS(nt_urb) = USBD_STATUS_NOT_SUPPORTED; -+ return NT_URB_STATUS(nt_urb); -+ } -+ assert(status_req->transfer_buffer_length == sizeof(u16)); -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,15,0) -+ ret = usb_get_std_status(udev, type, status_req->index, -+ status_req->transfer_buffer); -+#else -+ ret = usb_get_status(udev, type, status_req->index, -+ status_req->transfer_buffer); -+#endif -+ if (ret >= 0) { -+ assert(ret <= status_req->transfer_buffer_length); -+ status_req->transfer_buffer_length = ret; -+ NT_URB_STATUS(nt_urb) = USBD_STATUS_SUCCESS; -+ } else -+ NT_URB_STATUS(nt_urb) = wrap_urb_status(ret); -+ USBEXIT(return NT_URB_STATUS(nt_urb)); -+} -+ -+static void set_intf_pipe_info(struct wrap_device *wd, -+ struct usb_interface *usb_intf, -+ struct usbd_interface_information *intf) -+{ -+ int i; -+ struct usb_endpoint_descriptor *ep; -+ struct usbd_pipe_information *pipe; -+ -+ for (i = 0; i < CUR_ALT_SETTING(usb_intf)->desc.bNumEndpoints; i++) { -+ ep = &(CUR_ALT_SETTING(usb_intf)->endpoint[i]).desc; -+ if (i >= intf->bNumEndpoints) { -+ ERROR("intf %p has only %d endpoints, " -+ "ignoring endpoints above %d", -+ intf, intf->bNumEndpoints, i); -+ break; -+ } -+ pipe = &intf->pipes[i]; -+ -+ if (pipe->flags & USBD_PF_CHANGE_MAX_PACKET) -+ USBTRACE("pkt_sz: %d: %d", pipe->wMaxPacketSize, -+ pipe->max_tx_size); -+ USBTRACE("driver wants max_tx_size to %d", -+ pipe->max_tx_size); -+ -+ pipe->wMaxPacketSize = le16_to_cpu(ep->wMaxPacketSize); -+ pipe->bEndpointAddress = ep->bEndpointAddress; -+ pipe->type = ep->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK; -+ if (pipe->type == UsbdPipeTypeInterrupt) { -+ /* Windows and Linux differ in how the -+ * bInterval is interpreted */ -+ /* for low speed: -+ interval (Windows) -> frames per ms (Linux) -+ 0 to 15 -> 8 -+ 16 to 35 -> 16 -+ 36 to 255 -> 32 -+ -+ for full speed: interval -> frames per ms -+ 1 -> 1 -+ 2 to 3 -> 2 -+ 4 to 7 -> 4 -+ 8 to 15 -> 8 -+ 16 to 31 -> 16 -+ 32 to 255 -> 32 -+ -+ for high speed: interval -> microframes -+ 1 -> 1 -+ 2 -> 2 -+ 3 -> 4 -+ 4 -> 8 -+ 5 -> 16 -+ 6 -> 32 -+ 7 to 255 -> 32 -+ */ -+ if (wd->usb.udev->speed == USB_SPEED_LOW) -+ pipe->bInterval = ep->bInterval + 5; -+ else if (wd->usb.udev->speed == USB_SPEED_FULL) -+ pipe->bInterval = ep->bInterval; -+ else { -+ int j, k; -+ for (j = k = 1; j < ep->bInterval; k++) -+ j *= 2; -+ pipe->bInterval = k; -+ } -+ } -+ pipe->handle = ep; -+ USBTRACE("%d: ep 0x%x, type %d, pkt_sz %d, intv %d (%d)," -+ "type: %d, handle %p", i, ep->bEndpointAddress, -+ ep->bmAttributes, pipe->wMaxPacketSize, ep->bInterval, -+ pipe->bInterval, pipe->type, pipe->handle); -+ } -+} -+ -+static USBD_STATUS wrap_select_configuration(struct wrap_device *wd, -+ union nt_urb *nt_urb, -+ struct irp *irp) -+{ -+ int i, ret; -+ struct usbd_select_configuration *sel_conf; -+ struct usb_device *udev; -+ struct usbd_interface_information *intf; -+ struct usb_config_descriptor *config; -+ struct usb_interface *usb_intf; -+ -+ udev = wd->usb.udev; -+ sel_conf = &nt_urb->select_conf; -+ config = sel_conf->config; -+ USBTRACE("%p", config); -+ if (config == NULL) { -+ kill_all_urbs(wd, 1); -+ ret = usb_reset_configuration(udev); -+ return wrap_urb_status(ret); -+ } -+ -+ USBTRACE("conf: %d, type: %d, length: %d, numif: %d, attr: %08x", -+ config->bConfigurationValue, config->bDescriptorType, -+ config->wTotalLength, config->bNumInterfaces, -+ config->bmAttributes); -+ ret = usb_control_msg(udev, usb_sndctrlpipe(udev, 0), -+ USB_REQ_SET_CONFIGURATION, 0, -+ config->bConfigurationValue, 0, -+ NULL, 0, USB_CTRL_SET_TIMEOUT); -+ if (ret < 0) { -+ ERROR("ret: %d", ret); -+ return wrap_urb_status(ret); -+ } -+ sel_conf->handle = udev->actconfig; -+ intf = &sel_conf->intf; -+ for (i = 0; i < config->bNumInterfaces && intf->bLength > 0; -+ i++, intf = (((void *)intf) + intf->bLength)) { -+ -+ USBTRACE("intf: %d, alt setting: %d", -+ intf->bInterfaceNumber, intf->bAlternateSetting); -+ ret = usb_set_interface(udev, intf->bInterfaceNumber, -+ intf->bAlternateSetting); -+ if (ret < 0) { -+ ERROR("failed with %d", ret); -+ return wrap_urb_status(ret); -+ } -+ usb_intf = usb_ifnum_to_if(udev, intf->bInterfaceNumber); -+ if (!usb_intf) { -+ ERROR("couldn't obtain ifnum"); -+ return USBD_STATUS_REQUEST_FAILED; -+ } -+ USBTRACE("intf: %p, num ep: %d", intf, intf->bNumEndpoints); -+ set_intf_pipe_info(wd, usb_intf, intf); -+ } -+ return USBD_STATUS_SUCCESS; -+} -+ -+static USBD_STATUS wrap_select_interface(struct wrap_device *wd, -+ union nt_urb *nt_urb, -+ struct irp *irp) -+{ -+ int ret; -+ struct usbd_select_interface *sel_intf; -+ struct usb_device *udev; -+ struct usbd_interface_information *intf; -+ struct usb_interface *usb_intf; -+ -+ udev = wd->usb.udev; -+ sel_intf = &nt_urb->select_intf; -+ intf = &sel_intf->intf; -+ -+ ret = usb_set_interface(udev, intf->bInterfaceNumber, -+ intf->bAlternateSetting); -+ if (ret < 0) { -+ ERROR("failed with %d", ret); -+ return wrap_urb_status(ret); -+ } -+ usb_intf = usb_ifnum_to_if(udev, intf->bInterfaceNumber); -+ if (!usb_intf) { -+ ERROR("couldn't get interface information"); -+ return USBD_STATUS_REQUEST_FAILED; -+ } -+ USBTRACE("intf: %p, num ep: %d", usb_intf, intf->bNumEndpoints); -+ set_intf_pipe_info(wd, usb_intf, intf); -+ return USBD_STATUS_SUCCESS; -+} -+ -+static int wrap_usb_get_string(struct usb_device *udev, unsigned short langid, -+ unsigned char index, void *buf, int size) -+{ -+ int i, ret; -+ /* if langid is 0, return array of languages supported in -+ * buf */ -+ for (i = 0; i < 3; i++) { -+ ret = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0), -+ USB_REQ_GET_DESCRIPTOR, USB_DIR_IN, -+ (USB_DT_STRING << 8) + index, langid, -+ buf, size, USB_CTRL_GET_TIMEOUT); -+ if (ret > 0 || ret == -EPIPE) -+ break; -+ } -+ return ret; -+} -+ -+static USBD_STATUS wrap_get_descriptor(struct wrap_device *wd, -+ union nt_urb *nt_urb, struct irp *irp) -+{ -+ struct usbd_control_descriptor_request *control_desc; -+ int ret = 0; -+ struct usb_device *udev; -+ -+ udev = wd->usb.udev; -+ control_desc = &nt_urb->control_desc; -+ USBTRACE("desctype = %d, descindex = %d, transfer_buffer = %p," -+ "transfer_buffer_length = %d", control_desc->desc_type, -+ control_desc->index, control_desc->transfer_buffer, -+ control_desc->transfer_buffer_length); -+ -+ if (control_desc->desc_type == USB_DT_STRING) { -+ USBTRACE("langid: %x", control_desc->language_id); -+ ret = wrap_usb_get_string(udev, control_desc->language_id, -+ control_desc->index, -+ control_desc->transfer_buffer, -+ control_desc->transfer_buffer_length); -+ } else { -+ ret = usb_get_descriptor(udev, control_desc->desc_type, -+ control_desc->index, -+ control_desc->transfer_buffer, -+ control_desc->transfer_buffer_length); -+ } -+ if (ret < 0) { -+ USBTRACE("request %d failed: %d", control_desc->desc_type, ret); -+ control_desc->transfer_buffer_length = 0; -+ return wrap_urb_status(ret); -+ } else { -+ USBTRACE("ret: %08x", ret); -+ control_desc->transfer_buffer_length = ret; -+ irp->io_status.info = ret; -+ return USBD_STATUS_SUCCESS; -+ } -+} -+ -+static USBD_STATUS wrap_process_nt_urb(struct irp *irp) -+{ -+ USBD_STATUS status; -+ struct wrap_device *wd = IRP_WRAP_DEVICE(irp); -+ struct usb_device *udev = wd->usb.udev; -+ union nt_urb *nt_urb = IRP_URB(irp); -+ -+ USBENTER("nt_urb = %p, irp = %p, length = %d, function = %x", -+ nt_urb, irp, nt_urb->header.length, nt_urb->header.function); -+ -+ if (test_bit(HW_DISABLED, &wd->hw_status)) { -+ status = USBD_STATUS_DEVICE_GONE; -+ NT_URB_STATUS(nt_urb) = status; -+ return status; -+ } -+ -+ DUMP_IRP(irp); -+ switch (nt_urb->header.function) { -+ /* bulk/int and vendor/class urbs are submitted to -+ * Linux USB core; if the call is successful, urb's -+ * completion worker will return IRP later */ -+ case URB_FUNCTION_BULK_OR_INTERRUPT_TRANSFER: -+ USBTRACE("submitting bulk/int irp: %p", irp); -+ status = wrap_bulk_or_intr_trans(irp); -+ break; -+ -+ case URB_FUNCTION_VENDOR_DEVICE: -+ case URB_FUNCTION_VENDOR_INTERFACE: -+ case URB_FUNCTION_VENDOR_ENDPOINT: -+ case URB_FUNCTION_VENDOR_OTHER: -+ case URB_FUNCTION_CLASS_DEVICE: -+ case URB_FUNCTION_CLASS_INTERFACE: -+ case URB_FUNCTION_CLASS_ENDPOINT: -+ case URB_FUNCTION_CLASS_OTHER: -+ USBTRACE("submitting vendor/class irp: %p", irp); -+ status = wrap_vendor_or_class_req(irp); -+ break; -+ -+ /* rest are synchronous */ -+ case URB_FUNCTION_SELECT_CONFIGURATION: -+ status = wrap_select_configuration(wd, nt_urb, irp); -+ NT_URB_STATUS(nt_urb) = status; -+ break; -+ -+ case URB_FUNCTION_SELECT_INTERFACE: -+ status = wrap_select_interface(wd, nt_urb, irp); -+ NT_URB_STATUS(nt_urb) = status; -+ break; -+ -+ case URB_FUNCTION_GET_DESCRIPTOR_FROM_DEVICE: -+ status = wrap_get_descriptor(wd, nt_urb, irp); -+ NT_URB_STATUS(nt_urb) = status; -+ break; -+ -+ case URB_FUNCTION_SYNC_RESET_PIPE_AND_CLEAR_STALL: -+ status = wrap_reset_pipe(udev, irp); -+ NT_URB_STATUS(nt_urb) = status; -+ break; -+ -+ case URB_FUNCTION_ABORT_PIPE: -+ status = wrap_abort_pipe(udev, irp); -+ break; -+ -+ case URB_FUNCTION_SET_FEATURE_TO_DEVICE: -+ case URB_FUNCTION_SET_FEATURE_TO_INTERFACE: -+ case URB_FUNCTION_SET_FEATURE_TO_ENDPOINT: -+ case URB_FUNCTION_CLEAR_FEATURE_TO_DEVICE: -+ case URB_FUNCTION_CLEAR_FEATURE_TO_INTERFACE: -+ case URB_FUNCTION_CLEAR_FEATURE_TO_ENDPOINT: -+ status = wrap_set_clear_feature(udev, irp); -+ break; -+ -+ case URB_FUNCTION_GET_STATUS_FROM_DEVICE: -+ case URB_FUNCTION_GET_STATUS_FROM_INTERFACE: -+ case URB_FUNCTION_GET_STATUS_FROM_ENDPOINT: -+ status = wrap_get_status_request(udev, irp); -+ break; -+ -+ default: -+ ERROR("function %x not implemented", nt_urb->header.function); -+ status = NT_URB_STATUS(nt_urb) = USBD_STATUS_NOT_SUPPORTED; -+ break; -+ } -+ USBTRACE("status: %08X", status); -+ return status; -+} -+ -+static USBD_STATUS wrap_reset_port(struct irp *irp) -+{ -+ int ret, lock = 0; -+ struct wrap_device *wd; -+ -+ wd = IRP_WRAP_DEVICE(irp); -+ USBENTER("%p, %p", wd, wd->usb.udev); -+ lock = usb_lock_device_for_reset(wd->usb.udev, wd->usb.intf); -+ if (lock < 0) { -+ WARNING("locking failed: %d", lock); -+// return wrap_urb_status(lock); -+ return USBD_STATUS_SUCCESS; -+ } -+ ret = usb_reset_device(wd->usb.udev); -+ if (ret < 0) -+ USBTRACE("reset failed: %d", ret); -+ /* TODO: should reconfigure? */ -+ if (lock) -+ usb_unlock_device(wd->usb.udev); -+// return wrap_urb_status(ret); -+ return USBD_STATUS_SUCCESS; -+} -+ -+static USBD_STATUS wrap_get_port_status(struct irp *irp) -+{ -+ struct wrap_device *wd; -+ ULONG *status; -+ enum usb_device_state state; -+ -+ wd = IRP_WRAP_DEVICE(irp); -+ USBENTER("%p, %p", wd, wd->usb.udev); -+ status = IoGetCurrentIrpStackLocation(irp)->params.others.arg1; -+ state = wd->usb.udev->state; -+ if (state != USB_STATE_NOTATTACHED && -+ state != USB_STATE_SUSPENDED) { -+ *status |= USBD_PORT_CONNECTED; -+ if (state == USB_STATE_CONFIGURED) -+ *status |= USBD_PORT_ENABLED; -+ } -+ USBTRACE("state: %d, *status: %08X", state, *status); -+ return USBD_STATUS_SUCCESS; -+} -+ -+NTSTATUS wrap_submit_irp(struct device_object *pdo, struct irp *irp) -+{ -+ struct io_stack_location *irp_sl; -+ struct wrap_device *wd; -+ USBD_STATUS status; -+ struct usbd_idle_callback *idle_callback; -+ -+ USBENTER("%p, %p", pdo, irp); -+ wd = pdo->reserved; -+ if (wd->usb.intf == NULL) { -+ USBTRACE("%p", irp); -+ irp->io_status.status = STATUS_DEVICE_REMOVED; -+ irp->io_status.info = 0; -+ USBEXIT(return STATUS_DEVICE_REMOVED); -+ } -+ IRP_WRAP_DEVICE(irp) = wd; -+ irp_sl = IoGetCurrentIrpStackLocation(irp); -+ switch (irp_sl->params.dev_ioctl.code) { -+ case IOCTL_INTERNAL_USB_SUBMIT_URB: -+ status = wrap_process_nt_urb(irp); -+ break; -+ case IOCTL_INTERNAL_USB_RESET_PORT: -+ status = wrap_reset_port(irp); -+ break; -+ case IOCTL_INTERNAL_USB_GET_PORT_STATUS: -+ status = wrap_get_port_status(irp); -+ break; -+ case IOCTL_INTERNAL_USB_SUBMIT_IDLE_NOTIFICATION: -+ idle_callback = irp_sl->params.dev_ioctl.type3_input_buf; -+ (void)idle_callback; -+ USBTRACE("suspend function: %p", idle_callback->callback); -+ status = USBD_STATUS_NOT_SUPPORTED; -+ break; -+ default: -+ ERROR("ioctl %08X NOT IMPLEMENTED", -+ irp_sl->params.dev_ioctl.code); -+ status = USBD_STATUS_NOT_SUPPORTED; -+ break; -+ } -+ -+ USBTRACE("status: %08X", status); -+ if (status == USBD_STATUS_PENDING) { -+ /* don't touch this IRP - it may have been already -+ * completed/returned */ -+ return STATUS_PENDING; -+ } else { -+ irp->io_status.status = nt_urb_irp_status(status); -+ if (status != USBD_STATUS_SUCCESS) -+ irp->io_status.info = 0; -+ USBEXIT(return irp->io_status.status); -+ } -+} -+ -+/* TODO: The example on msdn in reference section suggests that second -+ * argument should be an array of usbd_interface_information, but -+ * description and examples elsewhere suggest that it should be -+ * usbd_interface_list_entry structre. Which is correct? */ -+ -+wstdcall union nt_urb *WIN_FUNC(USBD_CreateConfigurationRequestEx,2) -+ (struct usb_config_descriptor *config, -+ struct usbd_interface_list_entry *intf_list) -+{ -+ int size, i, n; -+ struct usbd_interface_information *intf; -+ struct usbd_pipe_information *pipe; -+ struct usb_interface_descriptor *intf_desc; -+ struct usbd_select_configuration *select_conf; -+ -+ USBENTER("config = %p, intf_list = %p", config, intf_list); -+ -+ /* calculate size required; select_conf already has space for -+ * one intf structure */ -+ size = sizeof(*select_conf) - sizeof(*intf); -+ for (n = 0; n < config->bNumInterfaces; n++) { -+ i = intf_list[n].intf_desc->bNumEndpoints; -+ /* intf already has space for one pipe */ -+ size += sizeof(*intf) + (i - 1) * sizeof(*pipe); -+ } -+ /* don't use kmalloc - driver frees it with ExFreePool */ -+ select_conf = ExAllocatePoolWithTag(NonPagedPool, size, -+ POOL_TAG('L', 'U', 'S', 'B')); -+ if (!select_conf) { -+ WARNING("couldn't allocate memory"); -+ return NULL; -+ } -+ memset(select_conf, 0, size); -+ intf = &select_conf->intf; -+ select_conf->handle = config; -+ for (n = 0; n < config->bNumInterfaces && intf_list[n].intf_desc; n++) { -+ /* initialize 'intf' fields in intf_list so they point -+ * to appropriate entry; these may be read/written by -+ * driver after this function returns */ -+ intf_list[n].intf = intf; -+ intf_desc = intf_list[n].intf_desc; -+ -+ i = intf_desc->bNumEndpoints; -+ intf->bLength = sizeof(*intf) + (i - 1) * sizeof(*pipe); -+ -+ intf->bInterfaceNumber = intf_desc->bInterfaceNumber; -+ intf->bAlternateSetting = intf_desc->bAlternateSetting; -+ intf->bInterfaceClass = intf_desc->bInterfaceClass; -+ intf->bInterfaceSubClass = intf_desc->bInterfaceSubClass; -+ intf->bInterfaceProtocol = intf_desc->bInterfaceProtocol; -+ intf->bNumEndpoints = intf_desc->bNumEndpoints; -+ -+ pipe = &intf->pipes[0]; -+ for (i = 0; i < intf->bNumEndpoints; i++) { -+ memset(&pipe[i], 0, sizeof(*pipe)); -+ pipe[i].max_tx_size = -+ USBD_DEFAULT_MAXIMUM_TRANSFER_SIZE; -+ } -+ intf->handle = intf_desc; -+ intf = (((void *)intf) + intf->bLength); -+ } -+ select_conf->header.function = URB_FUNCTION_SELECT_CONFIGURATION; -+ select_conf->header.length = size; -+ select_conf->config = config; -+ USBEXIT(return (union nt_urb *)select_conf); -+} -+ -+WIN_SYMBOL_MAP("_USBD_CreateConfigurationRequestEx@8", USBD_CreateConfigurationRequestEx) -+ -+wstdcall struct usb_interface_descriptor * -+WIN_FUNC(USBD_ParseConfigurationDescriptorEx,7) -+ (struct usb_config_descriptor *config, void *start, -+ LONG bInterfaceNumber, LONG bAlternateSetting, LONG bInterfaceClass, -+ LONG bInterfaceSubClass, LONG bInterfaceProtocol) -+{ -+ void *pos; -+ struct usb_interface_descriptor *intf; -+ -+ USBENTER("config = %p, start = %p, ifnum = %d, alt_setting = %d," -+ " class = %d, subclass = %d, proto = %d", config, start, -+ bInterfaceNumber, bAlternateSetting, bInterfaceClass, -+ bInterfaceSubClass, bInterfaceProtocol); -+ -+ for (pos = start; -+ pos < ((void *)config + le16_to_cpu(config->wTotalLength)); -+ pos += intf->bLength) { -+ -+ intf = pos; -+ -+ if ((intf->bDescriptorType == USB_DT_INTERFACE) && -+ ((bInterfaceNumber == -1) || -+ (intf->bInterfaceNumber == bInterfaceNumber)) && -+ ((bAlternateSetting == -1) || -+ (intf->bAlternateSetting == bAlternateSetting)) && -+ ((bInterfaceClass == -1) || -+ (intf->bInterfaceClass == bInterfaceClass)) && -+ ((bInterfaceSubClass == -1) || -+ (intf->bInterfaceSubClass == bInterfaceSubClass)) && -+ ((bInterfaceProtocol == -1) || -+ (intf->bInterfaceProtocol == bInterfaceProtocol))) { -+ USBTRACE("selected interface = %p", intf); -+ USBEXIT(return intf); -+ } -+ } -+ USBEXIT(return NULL); -+} -+ -+WIN_SYMBOL_MAP("_USBD_ParseConfigurationDescriptorEx@28", USBD_ParseConfigurationDescriptorEx) -+ -+wstdcall union nt_urb *WIN_FUNC(USBD_CreateConfigurationRequest,2) -+ (struct usb_config_descriptor *config, USHORT *size) -+{ -+ union nt_urb *nt_urb; -+ struct usbd_interface_list_entry intf_list[2]; -+ struct usb_interface_descriptor *intf_desc; -+ -+ USBENTER("config = %p, urb_size = %p", config, size); -+ -+ intf_desc = USBD_ParseConfigurationDescriptorEx(config, config, -1, -1, -+ -1, -1, -1); -+ intf_list[0].intf_desc = intf_desc; -+ intf_list[0].intf = NULL; -+ intf_list[1].intf_desc = NULL; -+ intf_list[1].intf = NULL; -+ nt_urb = USBD_CreateConfigurationRequestEx(config, intf_list); -+ if (!nt_urb) -+ return NULL; -+ -+ *size = nt_urb->select_conf.header.length; -+ USBEXIT(return nt_urb); -+} -+ -+wstdcall struct usb_interface_descriptor * -+WIN_FUNC(USBD_ParseConfigurationDescriptor,3) -+ (struct usb_config_descriptor *config, UCHAR bInterfaceNumber, -+ UCHAR bAlternateSetting) -+{ -+ return USBD_ParseConfigurationDescriptorEx(config, config, -+ bInterfaceNumber, -+ bAlternateSetting, -+ -1, -1, -1); -+} -+ -+wstdcall struct usb_descriptor_header *WIN_FUNC(USBD_ParseDescriptors,4) -+ (void *buf, ULONG length, struct usb_descriptor_header *descr, -+ LONG type) -+{ -+ while ((void *)descr < buf + length) { -+ if (descr->bDescriptorType == type) -+ return descr; -+ if (descr->bLength == 0) -+ break; -+ descr = (void *)descr + descr->bLength; -+ } -+ USBEXIT(return NULL); -+} -+ -+WIN_SYMBOL_MAP("_USBD_ParseDescriptors@16", USBD_ParseDescriptors) -+ -+wstdcall void WIN_FUNC(USBD_GetUSBDIVersion,1) -+ (struct usbd_version_info *version_info) -+{ -+ /* this function is obsolete in Windows XP */ -+ if (version_info) { -+ version_info->usbdi_version = USBDI_VERSION_XP; -+ /* TODO: how do we get this correctly? */ -+ version_info->supported_usb_version = 0x110; -+ } -+ USBEXIT(return); -+} -+ -+wstdcall void -+USBD_InterfaceGetUSBDIVersion(void *context, -+ struct usbd_version_info *version_info, -+ ULONG *hcd_capa) -+{ -+ struct wrap_device *wd = context; -+ -+ if (version_info) { -+ version_info->usbdi_version = USBDI_VERSION_XP; -+ if (wd->usb.udev->speed == USB_SPEED_HIGH) -+ version_info->supported_usb_version = 0x200; -+ else -+ version_info->supported_usb_version = 0x110; -+ } -+ *hcd_capa = USB_HCD_CAPS_SUPPORTS_RT_THREADS; -+ USBEXIT(return); -+} -+ -+wstdcall BOOLEAN USBD_InterfaceIsDeviceHighSpeed(void *context) -+{ -+ struct wrap_device *wd = context; -+ -+ USBTRACE("wd: %p", wd); -+ if (wd->usb.udev->speed == USB_SPEED_HIGH) -+ USBEXIT(return TRUE); -+ else -+ USBEXIT(return FALSE); -+} -+ -+wstdcall void USBD_InterfaceReference(void *context) -+{ -+ USBTRACE("%p", context); -+ TODO(); -+} -+ -+wstdcall void USBD_InterfaceDereference(void *context) -+{ -+ USBTRACE("%p", context); -+ TODO(); -+} -+ -+wstdcall NTSTATUS USBD_InterfaceQueryBusTime(void *context, ULONG *frame) -+{ -+ struct wrap_device *wd = context; -+ -+ *frame = usb_get_current_frame_number(wd->usb.udev); -+ USBEXIT(return STATUS_SUCCESS); -+} -+ -+wstdcall NTSTATUS USBD_InterfaceSubmitIsoOutUrb(void *context, -+ union nt_urb *nt_urb) -+{ -+ /* TODO: implement this */ -+ TODO(); -+ USBEXIT(return STATUS_NOT_IMPLEMENTED); -+} -+ -+wstdcall NTSTATUS -+USBD_InterfaceQueryBusInformation(void *context, ULONG level, void *buf, -+ ULONG *buf_length, ULONG *buf_actual_length) -+{ -+#if 0 -+ struct wrap_device *wd = context; -+ struct usb_bus *bus = wd->usb.udev->bus; -+ struct usb_bus_information_level *bus_info = buf; -+#endif -+ -+ TODO(); -+ USBEXIT(return STATUS_NOT_IMPLEMENTED); -+} -+ -+wstdcall NTSTATUS -+USBD_InterfaceLogEntry(void *context, ULONG driver_tag, ULONG enum_tag, -+ ULONG p1, ULONG p2) -+{ -+ ERROR("%p, %x, %x, %x, %x", context, driver_tag, enum_tag, p1, p2); -+ USBEXIT(return STATUS_SUCCESS); -+} -+ -+NTSTATUS -+usb_query_interface(struct wrap_device *wd, struct io_stack_location *irp_sl) -+{ -+ struct usbd_bus_interface_usbdi *intf = -+ (struct usbd_bus_interface_usbdi *) -+ irp_sl->params.query_intf.intf; -+ -+ TRACE2("type: %x, size: %d, version: %d", -+ irp_sl->params.query_intf.type->data1, -+ irp_sl->params.query_intf.size, -+ irp_sl->params.query_intf.version); -+ intf->Context = wd; -+ intf->InterfaceReference = -+ WIN_FUNC_PTR(USBD_InterfaceReference, 1); -+ intf->InterfaceDereference = -+ WIN_FUNC_PTR(USBD_InterfaceDereference, 1); -+ intf->GetUSBDIVersion = -+ WIN_FUNC_PTR(USBD_InterfaceGetUSBDIVersion, 3); -+ intf->QueryBusTime = -+ WIN_FUNC_PTR(USBD_InterfaceQueryBusTime, 2); -+ intf->SubmitIsoOutUrb = -+ WIN_FUNC_PTR(USBD_InterfaceSubmitIsoOutUrb, 2); -+ intf->QueryBusInformation = -+ WIN_FUNC_PTR(USBD_InterfaceQueryBusInformation, 5); -+ if (irp_sl->params.query_intf.version >= USB_BUSIF_USBDI_VERSION_1) -+ intf->IsDeviceHighSpeed = -+ WIN_FUNC_PTR(USBD_InterfaceIsDeviceHighSpeed, 1); -+ if (irp_sl->params.query_intf.version >= USB_BUSIF_USBDI_VERSION_2) -+ intf->LogEntry = WIN_FUNC_PTR(USBD_InterfaceLogEntry, 5); -+ return STATUS_SUCCESS; -+} -+ -+int usb_init(void) -+{ -+ InitializeListHead(&wrap_urb_complete_list); -+ spin_lock_init(&wrap_urb_complete_list_lock); -+ INIT_WORK(&wrap_urb_complete_work, wrap_urb_complete_worker); -+#ifdef USB_DEBUG -+ urb_id = 0; -+#endif -+ return 0; -+} -+ -+void usb_exit(void) -+{ -+ USBEXIT(return); -+} -+ -+int usb_init_device(struct wrap_device *wd) -+{ -+ InitializeListHead(&wd->usb.wrap_urb_list); -+ wd->usb.num_alloc_urbs = 0; -+ USBEXIT(return 0); -+} -+ -+void usb_exit_device(struct wrap_device *wd) -+{ -+ kill_all_urbs(wd, 0); -+ USBEXIT(return); -+} -diff -Nurp linux-5.6.11/3rdparty/ndiswrapper/usb.h linux-5.6.11-ndis/3rdparty/ndiswrapper/usb.h ---- linux-5.6.11/3rdparty/ndiswrapper/usb.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.6.11-ndis/3rdparty/ndiswrapper/usb.h 2020-05-03 15:18:33.000000000 +0300 -@@ -0,0 +1,360 @@ -+/* -+ * Copyright (C) 2004 Jan Kiszka -+ * Copyright (C) 2005 Giridhar Pemmasani -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ */ -+ -+#ifndef _USB_H_ -+#define _USB_H_ -+ -+#include "ntoskernel.h" -+ -+#define IOCTL_INTERNAL_USB_SUBMIT_URB 0x00220003 -+#define IOCTL_INTERNAL_USB_RESET_PORT 0x00220007 -+#define IOCTL_INTERNAL_USB_GET_PORT_STATUS 0x00220013 -+#define IOCTL_INTERNAL_USB_CYCLE_PORT 0x0022001F -+#define IOCTL_INTERNAL_USB_SUBMIT_IDLE_NOTIFICATION 0x00220027 -+ -+#define URB_FUNCTION_SELECT_CONFIGURATION 0x0000 -+#define URB_FUNCTION_SELECT_INTERFACE 0x0001 -+#define URB_FUNCTION_ABORT_PIPE 0x0002 -+#define URB_FUNCTION_TAKE_FRAME_LENGTH_CONTROL 0x0003 -+#define URB_FUNCTION_RELEASE_FRAME_LENGTH_CONTROL 0x0004 -+#define URB_FUNCTION_GET_FRAME_LENGTH 0x0005 -+#define URB_FUNCTION_SET_FRAME_LENGTH 0x0006 -+#define URB_FUNCTION_GET_CURRENT_FRAME_NUMBER 0x0007 -+#define URB_FUNCTION_CONTROL_TRANSFER 0x0008 -+#define URB_FUNCTION_BULK_OR_INTERRUPT_TRANSFER 0x0009 -+#define URB_FUNCTION_ISOCH_TRANSFER 0x000A -+#define URB_FUNCTION_GET_DESCRIPTOR_FROM_DEVICE 0x000B -+#define URB_FUNCTION_SET_DESCRIPTOR_TO_DEVICE 0x000C -+#define URB_FUNCTION_SET_FEATURE_TO_DEVICE 0x000D -+#define URB_FUNCTION_SET_FEATURE_TO_INTERFACE 0x000E -+#define URB_FUNCTION_SET_FEATURE_TO_ENDPOINT 0x000F -+#define URB_FUNCTION_CLEAR_FEATURE_TO_DEVICE 0x0010 -+#define URB_FUNCTION_CLEAR_FEATURE_TO_INTERFACE 0x0011 -+#define URB_FUNCTION_CLEAR_FEATURE_TO_ENDPOINT 0x0012 -+#define URB_FUNCTION_GET_STATUS_FROM_DEVICE 0x0013 -+#define URB_FUNCTION_GET_STATUS_FROM_INTERFACE 0x0014 -+#define URB_FUNCTION_GET_STATUS_FROM_ENDPOINT 0x0015 -+#define URB_FUNCTION_RESERVED_0X0016 0x0016 -+#define URB_FUNCTION_VENDOR_DEVICE 0x0017 -+#define URB_FUNCTION_VENDOR_INTERFACE 0x0018 -+#define URB_FUNCTION_VENDOR_ENDPOINT 0x0019 -+#define URB_FUNCTION_CLASS_DEVICE 0x001A -+#define URB_FUNCTION_CLASS_INTERFACE 0x001B -+#define URB_FUNCTION_CLASS_ENDPOINT 0x001C -+#define URB_FUNCTION_RESERVE_0X001D 0x001D -+#define URB_FUNCTION_SYNC_RESET_PIPE_AND_CLEAR_STALL 0x001E -+#define URB_FUNCTION_CLASS_OTHER 0x001F -+#define URB_FUNCTION_VENDOR_OTHER 0x0020 -+#define URB_FUNCTION_GET_STATUS_FROM_OTHER 0x0021 -+#define URB_FUNCTION_CLEAR_FEATURE_TO_OTHER 0x0022 -+#define URB_FUNCTION_SET_FEATURE_TO_OTHER 0x0023 -+#define URB_FUNCTION_GET_DESCRIPTOR_FROM_ENDPOINT 0x0024 -+#define URB_FUNCTION_SET_DESCRIPTOR_TO_ENDPOINT 0x0025 -+#define URB_FUNCTION_GET_CONFIGURATION 0x0026 -+#define URB_FUNCTION_GET_INTERFACE 0x0027 -+#define URB_FUNCTION_GET_DESCRIPTOR_FROM_INTERFACE 0x0028 -+#define URB_FUNCTION_SET_DESCRIPTOR_TO_INTERFACE 0x0029 -+#define URB_FUNCTION_GET_MS_FEATURE_DESCRIPTOR 0x002A -+#define URB_FUNCTION_RESERVE_0X002B 0x002B -+#define URB_FUNCTION_RESERVE_0X002C 0x002C -+#define URB_FUNCTION_RESERVE_0X002D 0x002D -+#define URB_FUNCTION_RESERVE_0X002E 0x002E -+#define URB_FUNCTION_RESERVE_0X002F 0x002F -+// USB 2.0 calls start at 0x0030 -+#define URB_FUNCTION_SYNC_RESET_PIPE 0x0030 -+#define URB_FUNCTION_SYNC_CLEAR_STALL 0x0031 -+#define URB_FUNCTION_CONTROL_TRANSFER_EX 0x0032 -+ -+#define USBD_PF_CHANGE_MAX_PACKET 0x00000001 -+ -+#define USBD_TRANSFER_DIRECTION_OUT 0 -+#define USBD_TRANSFER_DIRECTION_IN 1 -+ -+#define USBD_SHORT_TRANSFER_OK 0x00000002 -+#define USBD_START_ISO_TRANSFER_ASAP 0x00000004 -+#define USBD_DEFAULT_PIPE_TRANSFER 0x00000008 -+ -+#define USBD_TRANSFER_DIRECTION(flags) \ -+ ((flags) & USBD_TRANSFER_DIRECTION_IN) -+ -+enum pipe_type {UsbdPipeTypeControl = USB_ENDPOINT_XFER_CONTROL, -+ UsbdPipeTypeIsochronous = USB_ENDPOINT_XFER_ISOC, -+ UsbdPipeTypeBulk = USB_ENDPOINT_XFER_BULK, -+ UsbdPipeTypeInterrupt = USB_ENDPOINT_XFER_INT}; -+ -+#define USBD_IS_BULK_PIPE(pipe_handle) \ -+ (((pipe_handle)->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) \ -+ == USB_ENDPOINT_XFER_BULK) -+ -+#define USBD_IS_INT_PIPE(pipe_handle) \ -+ (((pipe_handle)->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) \ -+ == USB_ENDPOINT_XFER_INT) -+ -+#define USBD_PORT_ENABLED 0x00000001 -+#define USBD_PORT_CONNECTED 0x00000002 -+ -+typedef LONG USBD_STATUS; -+ -+#define USBD_STATUS_SUCCESS 0x0 -+#define USBD_STATUS_PENDING 0x40000000 -+#define USBD_STATUS_CANCELED 0x00010000 -+ -+#define USBD_STATUS_CRC 0xC0000001 -+#define USBD_STATUS_BTSTUFF 0xC0000002 -+#define USBD_STATUS_DATA_TOGGLE_MISMATCH 0xC0000003 -+#define USBD_STATUS_STALL_PID 0xC0000004 -+#define USBD_STATUS_DEV_NOT_RESPONDING 0xC0000005 -+#define USBD_STATUS_PID_CHECK_FAILURE 0xC0000006 -+#define USBD_STATUS_UNEXPECTED_PID 0xC0000007 -+#define USBD_STATUS_DATA_OVERRUN 0xC0000008 -+#define USBD_STATUS_DATA_UNDERRUN 0xC0000009 -+#define USBD_STATUS_RESERVED1 0xC000000A -+#define USBD_STATUS_RESERVED2 0xC000000B -+#define USBD_STATUS_BUFFER_OVERRUN 0xC000000C -+#define USBD_STATUS_BUFFER_UNDERRUN 0xC000000D -+#define USBD_STATUS_NOT_ACCESSED 0xC000000F -+#define USBD_STATUS_FIFO 0xC0000010 -+#define USBD_STATUS_XACT_ERROR 0xC0000011 -+#define USBD_STATUS_BABBLE_DETECTED 0xC0000012 -+#define USBD_STATUS_DATA_BUFFER_ERROR 0xC0000013 -+ -+#define USBD_STATUS_NOT_SUPPORTED 0xC0000E00 -+#define USBD_STATUS_BUFFER_TOO_SMALL 0xC0003000 -+#define USBD_STATUS_TIMEOUT 0xC0006000 -+#define USBD_STATUS_DEVICE_GONE 0xC0007000 -+ -+#define USBD_STATUS_NO_MEMORY 0x80000100 -+#define USBD_STATUS_INVALID_URB_FUNCTION 0x80000200 -+#define USBD_STATUS_INVALID_PARAMETER 0x80000300 -+#define USBD_STATUS_REQUEST_FAILED 0x80000500 -+#define USBD_STATUS_INVALID_PIPE_HANDLE 0x80000600 -+#define USBD_STATUS_ERROR_SHORT_TRANSFER 0x80000900 -+ -+#define USBD_DEFAULT_MAXIMUM_TRANSFER_SIZE PAGE_SIZE -+ -+struct urb_hcd_area { -+ void *reserved8[8]; -+}; -+ -+struct usbd_pipe_information { -+ USHORT wMaxPacketSize; -+ UCHAR bEndpointAddress; -+ UCHAR bInterval; -+ enum pipe_type type; -+ struct usb_endpoint_descriptor *handle; -+ ULONG max_tx_size; -+ ULONG flags; -+}; -+ -+struct usbd_interface_information { -+ USHORT bLength; -+ UCHAR bInterfaceNumber; -+ UCHAR bAlternateSetting; -+ UCHAR bInterfaceClass; -+ UCHAR bInterfaceSubClass; -+ UCHAR bInterfaceProtocol; -+ UCHAR reserved; -+ void *handle; -+ ULONG bNumEndpoints; -+ struct usbd_pipe_information pipes[1]; -+}; -+ -+struct usbd_interface_list_entry { -+ struct usb_interface_descriptor *intf_desc; -+ struct usbd_interface_information *intf; -+}; -+ -+struct nt_urb_header { -+ USHORT length; -+ USHORT function; -+ USBD_STATUS status; -+ void *usbd_dev_handle; -+ ULONG usbd_flags; -+}; -+ -+struct usbd_select_interface { -+ struct nt_urb_header header; -+ void *handle; -+ struct usbd_interface_information intf; -+}; -+ -+struct usbd_select_configuration { -+ struct nt_urb_header header; -+ struct usb_config_descriptor *config; -+ void *handle; -+ struct usbd_interface_information intf; -+}; -+ -+struct usbd_control_descriptor_request { -+ struct nt_urb_header header; -+ void *reserved; -+ ULONG reserved0; -+ ULONG transfer_buffer_length; -+ void *transfer_buffer; -+ struct mdl *mdl; -+ union nt_urb *urb_link; -+ struct urb_hcd_area hca; -+ USHORT reserved1; -+ UCHAR index; -+ UCHAR desc_type; -+ USHORT language_id; -+ USHORT reserved2; -+}; -+ -+struct usbd_bulk_or_intr_transfer { -+ struct nt_urb_header header; -+ struct usb_endpoint_descriptor *pipe_handle; -+ ULONG transfer_flags; -+ ULONG transfer_buffer_length; -+ void *transfer_buffer; -+ struct mdl *mdl; -+ union nt_urb *urb_link; -+ struct urb_hcd_area hca; -+}; -+ -+struct usbd_pipe_request { -+ struct nt_urb_header header; -+ struct usb_endpoint_descriptor *pipe_handle; -+}; -+ -+struct usbd_vendor_or_class_request { -+ struct nt_urb_header header; -+ void *reserved; -+ ULONG transfer_flags; -+ ULONG transfer_buffer_length; -+ void *transfer_buffer; -+ struct mdl *mdl; -+ union nt_urb *link; -+ struct urb_hcd_area hca; -+ UCHAR reserved_bits; -+ UCHAR request; -+ USHORT value; -+ USHORT index; -+ USHORT reserved1; -+}; -+ -+struct urb_control_feature_request { -+ struct nt_urb_header header; -+ void *reserved; -+ ULONG reserved2; -+ ULONG reserved3; -+ void *reserved4; -+ struct mdl *reserved5; -+ union nt_urb *link; -+ struct urb_hcd_area hca; -+ USHORT reserved0; -+ USHORT feature_selector; -+ USHORT index; -+ USHORT reserved1; -+}; -+ -+struct urb_control_get_status_request { -+ struct nt_urb_header header; -+ void *reserved; -+ ULONG reserved0; -+ ULONG transfer_buffer_length; -+ void *transfer_buffer; -+ struct mdl *mdl; -+ union nt_urb *link; -+ struct urb_hcd_area hca; -+ UCHAR reserved1[4]; -+ USHORT index; -+ USHORT reserved2; -+}; -+ -+struct usbd_iso_packet_desc { -+ ULONG offset; -+ ULONG length; -+ USBD_STATUS status; -+}; -+ -+struct usbd_isochronous_transfer { -+ struct nt_urb_header header; -+ struct usb_endpoint_descriptor *pipe_handle; -+ ULONG transfer_flags; -+ ULONG transfer_buffer_length; -+ void *transfer_buffer; -+ struct mdl *mdl; -+ union nt_urb *urb_link; -+ struct urb_hcd_area hca; -+ ULONG start_frame; -+ ULONG number_of_packets; -+ ULONG error_count; -+ struct usbd_iso_packet_desc iso_packet[1]; -+}; -+ -+union nt_urb { -+ struct nt_urb_header header; -+ struct usbd_select_interface select_intf; -+ struct usbd_select_configuration select_conf; -+ struct usbd_bulk_or_intr_transfer bulk_int_transfer; -+ struct usbd_control_descriptor_request control_desc; -+ struct usbd_vendor_or_class_request vendor_class_request; -+ struct usbd_isochronous_transfer isochronous; -+ struct usbd_pipe_request pipe_req; -+ struct urb_control_feature_request feat_req; -+ struct urb_control_get_status_request status_req; -+}; -+ -+struct usbd_bus_interface_usbdi { -+ USHORT Size; -+ USHORT Version; -+ void *Context; -+ void *InterfaceReference; -+ void *InterfaceDereference; -+ void *GetUSBDIVersion; -+ void *QueryBusTime; -+ void *SubmitIsoOutUrb; -+ void *QueryBusInformation; -+ /* version 1 and above have following field */ -+ void *IsDeviceHighSpeed; -+ /* version 2 (and above) have following field */ -+ void *LogEntry; -+}; -+ -+struct usbd_bus_information_level { -+ ULONG TotalBandwidth; -+ ULONG ConsumedBandwidth; -+ /* level 1 and above have following fields */ -+ ULONG ControllerNameLength; -+ wchar_t ControllerName[1]; -+}; -+ -+#define USBDI_VERSION_XP 0x00000500 // Windows XP -+#define USB_HCD_CAPS_SUPPORTS_RT_THREADS 0x00000001 -+#define USB_BUSIF_USBDI_VERSION_0 0x0000 -+#define USB_BUSIF_USBDI_VERSION_1 0x0001 -+#define USB_BUSIF_USBDI_VERSION_2 0x0002 -+ -+struct usbd_version_info { -+ ULONG usbdi_version; -+ ULONG supported_usb_version; -+}; -+ -+struct usbd_idle_callback { -+ void *callback; -+ void *context; -+}; -+ -+#define NT_URB_STATUS(nt_urb) ((nt_urb)->header.status) -+ -+NTSTATUS wrap_submit_irp(struct device_object *pdo, struct irp *irp); -+void wrap_suspend_urbs(struct wrap_device *wd); -+void wrap_resume_urbs(struct wrap_device *wd); -+NTSTATUS usb_query_interface(struct wrap_device *wd, -+ struct io_stack_location *irp_sl); -+ -+#endif /* USB_H */ -diff -Nurp linux-5.6.11/3rdparty/ndiswrapper/win2lin_stubs.S linux-5.6.11-ndis/3rdparty/ndiswrapper/win2lin_stubs.S ---- linux-5.6.11/3rdparty/ndiswrapper/win2lin_stubs.S 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.6.11-ndis/3rdparty/ndiswrapper/win2lin_stubs.S 2020-05-03 15:18:33.000000000 +0300 -@@ -0,0 +1,262 @@ -+/* -+ * Copyright (C) 2005 Karl Vogel, Giridhar Pemmasani -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ */ -+ -+#include -+#include -+ -+#ifdef CONFIG_X86_64 -+ -+/* -+# Windows <---> Linux register usage conversion when calling functions -+# V = Volatile -+# NV = Non Volatile (needs to be saved) -+# -+# Win Lin -+# --------------------------------------- -+# Rax Return V Return V -+# Rbx NV NV -+# Rcx Arg1 V Arg4 V -+# Rdx Arg2 V Arg3 V -+# Rsi NV Arg2 V -+# Rdi NV Arg1 V -+# Rsp NV NV -+# Rbp NV NV -+# R8 Arg3 V Arg5 V -+# R9 Arg4 V Arg6 V -+# R10 V V -+# R11 V V -+# R12 NV NV -+# R13 NV NV -+# R14 NV NV -+# R15 NV NV -+# -+# In addition, Linux uses %rax to indicate number of SSE registers used -+# when variadic functions are called. Since there is no way to obtain this -+# from Windows, for now, we just assume this is 0 (hence %rax is cleared). -+# -+# Windows pushes arguments 5 and higher onto stack in case of integer -+# variables and 4 and higher in case of floating point variables (passed -+# in SSE registers). -+ -+In a windows function, the stackframe/registers look like this: -+ -+# 0x0048 .... -+# 0x0040 arg8 -+# 0x0038 arg7 -+# 0x0030 arg6 -+# 0x0028 arg5 -+# 0x0020 shadow/spill space for arg4 -+# 0x0018 shadow/spill space for arg3 -+# 0x0010 shadow/spill space for arg2 -+# 0x0008 shadow/spill space for arg1 -+# 0x0000 ret -+ -+# register spill space is same irrespective of number of arguments - even -+# if Windows function takes less than 4 arguments, 32 bytes above return -+# address is reserved for the function -+ -+In Linux it should look like: -+ -+# 0x0018 .... -+# 0x0010 arg8 -+# 0x0008 arg7 -+# 0x0000 ret -+ -+*/ -+ -+ .text -+ -+#define LINUX_REG_ARGS 6 -+#define LOOP_THRESHOLD 9 -+#define WORD_BYTES 8 -+ -+/* -+ * %rsi and %rdi must be saved because they are not saved by Linux calls, but -+ * Windows callers expect them to be saved. %rbp is saved to create a stack -+ * frame, which can help with debugging. We need to reserve space for an odd -+ * number of registers anyway to keep 16-bit alignment of the stack (one more -+ * position is used by the return address). -+ */ -+#define SAVED_REGS 3 -+ -+/* -+ * When calling the Linux function, several registers are saved on the stack. -+ * When passing more than 6 arguments, arguments starting with argument 7 are -+ * pushed to the stack as well. -+ * -+ * We also need to allocate an additional word on the stack to keep it aligned -+ * to the 16-bit boundary if the number of saved arguments plus one (for the -+ * return address) is odd. -+ */ -+ -+/* -+ * Number of arguments we pass on stack to the Linux function. -+ * The value of true is -1 in assembler, so we multiply it by another true -+ * value. -+ */ -+#define stack_args(argc) \ -+ ((0 < 1) * (argc > LINUX_REG_ARGS) * (argc - LINUX_REG_ARGS)) -+ -+/* Full required change of stack pointer, in words */ -+#define stack_words_raw(argc) (stack_args(argc) + SAVED_REGS + 1) -+ -+/* Full actual change of stack pointer, in words (must be even) */ -+#define stack_words_aligned(argc) ((stack_words_raw(argc) + 1) & ~1) -+ -+/* Space allocated for Linux arguments on stack */ -+#define stack_space(argc) \ -+ ((stack_words_aligned(argc) - SAVED_REGS - 1) * WORD_BYTES) -+ -+/* -+ * win2lin_win_arg(N, ARGC) gives the address of the Windows argument N out of -+ * total ARGC after the stack has been prepared for the Linux function call. -+ * -+ * When called from Windows, the Nth argument is at (N * 8)(%rsp). We add the -+ * stack space allocated by the Linux function to compensate for %rsp change. -+ * -+ * Don't call with N less than 5! -+ */ -+#define win2lin_win_arg(n, argc) \ -+ ((n + SAVED_REGS) * WORD_BYTES + stack_space(argc))(%rsp) -+ -+/* -+ * win2lin_lin_arg(N) gives the address of the Nth Linux argument on the extra -+ * Linux stack frame. When more than 6 arguments are used, %rsp points to the -+ * 7th argument. The Nth argument is therefore at ((N - 7) * 8)(%rsp). -+ * -+ * Don't call with N less than 7! -+ */ -+#define win2lin_lin_arg(n) ((n - 1 - LINUX_REG_ARGS) * WORD_BYTES)(%rsp) -+ -+/* Declare function LONGNAME, call function SHORTNAME with ARGC arguments */ -+.macro win2linm longname, shortname, argc -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,5,0) -+ SYM_FUNC_START(\longname) -+#else -+ .type \longname, @function -+ ENTRY(\longname) -+#endif -+ -+ /* Create a call frame - it's optional, but good for debugging */ -+ .cfi_startproc -+ push %rbp -+ .cfi_def_cfa %rsp, 2 * WORD_BYTES -+ .cfi_offset %rbp, -2 * WORD_BYTES -+ mov %rsp, %rbp -+ .cfi_def_cfa %rbp, 2 * WORD_BYTES -+ -+ /* -+ * Registers %rdi and %rsi are volatile on Linux, but not on Windows, -+ * so save them on the stack. -+ */ -+ push %rsi -+ push %rdi -+ -+ /* Allocate extra stack space for arguments 7 and up */ -+ sub $stack_space(\argc), %rsp -+ -+ /* -+ * Copy arguments 7 and up. We do it early, before %rdi and %rsi -+ * are used for arguments 1 and 2, so we don't have to save them. -+ * We still need to save %rcx if using a string copy. -+ */ -+ .if (\argc < LOOP_THRESHOLD) -+ /* If a few arguments, copy them individually through %r11 */ -+ .if (\argc >= 7) -+ mov win2lin_win_arg(7, \argc), %r11 -+ mov %r11, win2lin_lin_arg(7) -+ .endif -+ .if (\argc >= 8) -+ mov win2lin_win_arg(8, \argc), %r11 -+ mov %r11, win2lin_lin_arg(8) -+ .endif -+ .else -+ /* If there are many arguments, copy them in a loop */ -+ /* Save arg1 to %r11 */ -+ mov %rcx, %r11 -+ /* Source and destination */ -+ lea win2lin_win_arg(LINUX_REG_ARGS + 1, \argc), %rsi -+ lea win2lin_lin_arg(LINUX_REG_ARGS + 1), %rdi -+ /* Number of arguments to copy (%ecx zero-extends to %rcx) */ -+ mov $(\argc - LINUX_REG_ARGS), %ecx -+ rep movsq -+ /* Restore arg1 directly to %rdi */ -+ mov %r11, %rdi -+ .endif -+ -+ /* -+ * Argument 1 - %rcx on Windows, %rdi on Linux -+ * Micro-optimization - if we used loop, arg1 is already in %rdi -+ */ -+ .if (\argc >= 1) && (\argc < LOOP_THRESHOLD) -+ mov %rcx, %rdi -+ .endif -+ -+ /* Argument 2 - %rdx on Windows, %rsi on Linux */ -+ .if (\argc >= 2) -+ mov %rdx, %rsi -+ .endif -+ -+ /* Argument 3 - %r8 on Windows, %rdx on Linux */ -+ .if (\argc >= 3) -+ mov %r8, %rdx -+ .endif -+ -+ /* Argument 4 - %r9 on Windows, %rcx on Linux */ -+ .if (\argc >= 4) -+ mov %r9, %rcx -+ .endif -+ -+ /* Argument 5 - first argument on stack on Windows, %r8 Linux */ -+ .if (\argc >= 5) -+ mov win2lin_win_arg(5, \argc), %r8 -+ .endif -+ -+ /* Argument 6 - second argument on stack on Windows, %r9 Linux */ -+ .if (\argc >= 6) -+ mov win2lin_win_arg(6, \argc), %r9 -+ .endif -+ -+ /* %rax on Linux is the number of arguments in SSE registers (zero) */ -+ xor %rax, %rax -+ -+ /* Call the function */ -+ call \shortname -+ -+ /* Free stack space for arguments 7 and up */ -+ add $stack_space(\argc), %rsp -+ -+ /* Restore saved registers */ -+ pop %rdi -+ pop %rsi -+ -+ /* Return to Windows code */ -+ leave -+ .cfi_def_cfa %rsp, WORD_BYTES -+ .cfi_restore %rbp -+ ret -+ .cfi_endproc -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,5,0) -+ SYM_FUNC_END(\longname) -+#else -+ .size \longname, (. - \longname) -+#endif -+.endm -+ -+#define win2lin(name, argc) win2linm win2lin_ ## name ## _ ## argc, name, argc -+ -+#include "win2lin_stubs.h" -+ -+#endif /* CONFIG_X86_64 */ -diff -Nurp linux-5.6.11/3rdparty/ndiswrapper/winnt_types.h linux-5.6.11-ndis/3rdparty/ndiswrapper/winnt_types.h ---- linux-5.6.11/3rdparty/ndiswrapper/winnt_types.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.6.11-ndis/3rdparty/ndiswrapper/winnt_types.h 2020-05-03 15:18:33.000000000 +0300 -@@ -0,0 +1,1701 @@ -+/* -+ * Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ */ -+ -+#ifndef _WINNT_TYPES_H_ -+#define _WINNT_TYPES_H_ -+ -+#define TRUE 1 -+#define FALSE 0 -+ -+#define PASSIVE_LEVEL 0 -+#define APC_LEVEL 1 -+#define DISPATCH_LEVEL 2 -+#define DEVICE_LEVEL_BASE 4 -+ -+/* soft interrupts / bottom-half's are disabled at SOFT_IRQL */ -+#define SOFT_IRQL (DEVICE_LEVEL_BASE + 1) -+#define DIRQL (DEVICE_LEVEL_BASE + 2) -+ -+#define STATUS_WAIT_0 0 -+#define STATUS_SUCCESS 0 -+#define STATUS_ALERTED 0x00000101 -+#define STATUS_TIMEOUT 0x00000102 -+#define STATUS_PENDING 0x00000103 -+#define STATUS_FAILURE 0xC0000001 -+#define STATUS_NOT_IMPLEMENTED 0xC0000002 -+#define STATUS_INVALID_PARAMETER 0xC000000D -+#define STATUS_INVALID_DEVICE_REQUEST 0xC0000010 -+#define STATUS_MORE_PROCESSING_REQUIRED 0xC0000016 -+#define STATUS_ACCESS_DENIED 0xC0000022 -+#define STATUS_BUFFER_TOO_SMALL 0xC0000023 -+#define STATUS_OBJECT_NAME_INVALID 0xC0000023 -+#define STATUS_MUTANT_NOT_OWNED 0xC0000046 -+#define STATUS_RESOURCES 0xC000009A -+#define STATUS_DELETE_PENDING 0xC0000056 -+#define STATUS_INSUFFICIENT_RESOURCES 0xC000009A -+#define STATUS_NOT_SUPPORTED 0xC00000BB -+#define STATUS_INVALID_PARAMETER_2 0xC00000F0 -+#define STATUS_NO_MEMORY 0xC0000017 -+#define STATUS_CANCELLED 0xC0000120 -+#define STATUS_DEVICE_REMOVED 0xC00002B6 -+#define STATUS_DEVICE_NOT_CONNECTED 0xC000009D -+ -+#define STATUS_BUFFER_OVERFLOW 0x80000005 -+ -+#define SL_PENDING_RETURNED 0x01 -+#define SL_INVOKE_ON_CANCEL 0x20 -+#define SL_INVOKE_ON_SUCCESS 0x40 -+#define SL_INVOKE_ON_ERROR 0x80 -+ -+#define IRP_MJ_CREATE 0x00 -+#define IRP_MJ_CREATE_NAMED_PIPE 0x01 -+#define IRP_MJ_CLOSE 0x02 -+#define IRP_MJ_READ 0x03 -+#define IRP_MJ_WRITE 0x04 -+ -+#define IRP_MJ_DEVICE_CONTROL 0x0E -+#define IRP_MJ_INTERNAL_DEVICE_CONTROL 0x0F -+#define IRP_MJ_POWER 0x16 -+#define IRP_MJ_SYSTEM_CONTROL 0x0E -+#define IRP_MJ_PNP 0x1b -+#define IRP_MJ_MAXIMUM_FUNCTION 0x1b -+ -+#define IRP_MN_WAIT_WAKE 0x00 -+#define IRP_MN_POWER_SEQUENCE 0x01 -+#define IRP_MN_SET_POWER 0x02 -+#define IRP_MN_QUERY_POWER 0x03 -+ -+#define IRP_MN_REGINFO 0x08 -+#define IRP_MN_REGINFO_EX 0x0b -+ -+#define IRP_MN_START_DEVICE 0x00 -+#define IRP_MN_QUERY_REMOVE_DEVICE 0x01 -+#define IRP_MN_REMOVE_DEVICE 0x02 -+#define IRP_MN_CANCEL_REMOVE_DEVICE 0x03 -+#define IRP_MN_STOP_DEVICE 0x04 -+#define IRP_MN_QUERY_STOP_DEVICE 0x05 -+#define IRP_MN_CANCEL_STOP_DEVICE 0x06 -+#define IRP_MN_QUERY_DEVICE_RELATIONS 0x07 -+#define IRP_MN_QUERY_INTERFACE 0x08 -+ -+#define IRP_BUFFERED_IO 0x00000010 -+#define IRP_DEALLOCATE_BUFFER 0x00000020 -+#define IRP_INPUT_OPERATION 0x00000040 -+ -+#define IRP_DEFFER_IO_COMPLETION 0x00000800 -+ -+#define THREAD_WAIT_OBJECTS 3 -+#define MAX_WAIT_OBJECTS 64 -+ -+#define LOW_PRIORITY 0 -+#define LOW_REALTIME_PRIORITY 16 -+#define HIGH_PRIORITY 31 -+#define MAXIMUM_PRIORITY 32 -+ -+#define PROCESSOR_FEATURE_MAX 64 -+ -+#define IO_NO_INCREMENT 0 -+ -+#define WMIREG_ACTION_REGISTER 1 -+#define WMIREG_ACTION_DEREGISTER 2 -+#define WMIREG_ACTION_REREGISTER 3 -+#define WMIREG_ACTION_UPDATE_GUIDS 4 -+ -+#define WMIREGISTER 0 -+#define WMIUPDATE 1 -+ -+#ifdef CONFIG_X86_64 -+#define wstdcall -+#define wfastcall -+#define noregparm -+#define regparm3 -+ -+#define KI_USER_SHARED_DATA 0xfffff78000000000UL -+ -+#else -+ -+#define noregparm __attribute__((regparm(0))) -+#define regparm3 __attribute__((regparm(3))) -+#define wstdcall __attribute__((__stdcall__, regparm(0))) -+#if defined(__GNUC__) && ((__GNUC__ == 3 && __GNUC_MINOR__ > 3) || __GNUC__ > 3) -+#undef fastcall -+#define wfastcall __attribute__((fastcall)) -+#else -+#error "gcc 3.4 or newer should be used for compiling this module" -+#endif -+ -+#define KI_USER_SHARED_DATA 0xffdf0000 -+ -+#endif -+ -+typedef u8 BOOLEAN; -+typedef u8 BYTE; -+typedef u8 *LPBYTE; -+typedef s8 CHAR; -+typedef u8 UCHAR; -+typedef s16 SHORT; -+typedef u16 USHORT; -+typedef u16 WORD; -+typedef s32 INT; -+typedef u32 UINT; -+typedef u32 DWORD; -+typedef s32 LONG; -+typedef u32 ULONG; -+typedef s64 LONGLONG; -+typedef u64 ULONGLONG; -+typedef u64 ULONGULONG; -+typedef u64 ULONG64; -+ -+typedef CHAR CCHAR; -+typedef USHORT wchar_t; -+typedef SHORT CSHORT; -+typedef LONGLONG LARGE_INTEGER; -+ -+typedef LONG NTSTATUS; -+ -+typedef LONG KPRIORITY; -+typedef LARGE_INTEGER PHYSICAL_ADDRESS; -+typedef UCHAR KIRQL; -+typedef CHAR KPROCESSOR_MODE; -+ -+/* ULONG_PTR is 32 bits on 32-bit platforms and 64 bits on 64-bit -+ * platform, which is same as 'unsigned long' in Linux */ -+typedef unsigned long ULONG_PTR; -+ -+typedef size_t SIZE_T; -+typedef ULONG_PTR KAFFINITY; -+typedef ULONG ACCESS_MASK; -+ -+typedef ULONG_PTR PFN_NUMBER; -+typedef ULONG SECURITY_INFORMATION; -+ -+/* non-negative numbers indicate success */ -+#define NT_SUCCESS(status) ((NTSTATUS)(status) >= 0) -+ -+struct ansi_string { -+ USHORT length; -+ USHORT max_length; -+ char *buf; -+}; -+ -+struct unicode_string { -+ USHORT length; -+ USHORT max_length; -+ wchar_t *buf; -+}; -+ -+struct nt_slist { -+ struct nt_slist *next; -+}; -+ -+#ifdef CONFIG_X86_64 -+/* it is not clear how nt_slist_head is used to store pointer to -+ * slists and depth; here we assume 'align' field is used to store -+ * depth and 'region' field is used to store slist pointers */ -+struct nt_slist_head { -+ union { -+ USHORT depth; -+ ULONGLONG align; -+ }; -+ union { -+ ULONGLONG region; -+ struct nt_slist *next; -+ }; -+} __attribute__((aligned(16))); -+typedef struct nt_slist_head nt_slist_header; -+#else -+union nt_slist_head { -+ ULONGLONG align; -+ struct { -+ struct nt_slist *next; -+ USHORT depth; -+ USHORT sequence; -+ }; -+}; -+typedef union nt_slist_head nt_slist_header; -+#endif -+ -+struct nt_list { -+ struct nt_list *next; -+ struct nt_list *prev; -+}; -+ -+typedef ULONG_PTR NT_SPIN_LOCK; -+ -+enum kdpc_importance {LowImportance, MediumImportance, HighImportance}; -+ -+struct kdpc; -+typedef void (*DPC)(struct kdpc *kdpc, void *ctx, void *arg1, -+ void *arg2) wstdcall; -+struct kdpc { -+ SHORT type; -+ UCHAR nr_cpu; -+ UCHAR importance; -+ struct nt_list list; -+ DPC func; -+ void *ctx; -+ void *arg1; -+ void *arg2; -+ union { -+ NT_SPIN_LOCK *lock; -+ /* 'lock' is not used; 'queued' represents whether -+ * kdpc is queued or not */ -+ int queued; -+ }; -+}; -+ -+enum pool_type { -+ NonPagedPool, PagedPool, NonPagedPoolMustSucceed, DontUseThisType, -+ NonPagedPoolCacheAligned, PagedPoolCacheAligned, -+ NonPagedPoolCacheAlignedMustS, MaxPoolType, -+ NonPagedPoolSession = 32, -+ PagedPoolSession = NonPagedPoolSession + 1, -+ NonPagedPoolMustSucceedSession = PagedPoolSession + 1, -+ DontUseThisTypeSession = NonPagedPoolMustSucceedSession + 1, -+ NonPagedPoolCacheAlignedSession = DontUseThisTypeSession + 1, -+ PagedPoolCacheAlignedSession = NonPagedPoolCacheAlignedSession + 1, -+ NonPagedPoolCacheAlignedMustSSession = PagedPoolCacheAlignedSession + 1 -+}; -+ -+enum memory_caching_type_orig { -+ MmFrameBufferCached = 2 -+}; -+ -+enum memory_caching_type { -+ MmNonCached = FALSE, MmCached = TRUE, -+ MmWriteCombined = MmFrameBufferCached, MmHardwareCoherentCached, -+ MmNonCachedUnordered, MmUSWCCached, MmMaximumCacheType -+}; -+ -+enum lock_operation { -+ IoReadAccess, IoWriteAccess, IoModifyAccess -+}; -+ -+enum mode { -+ KernelMode, UserMode, MaximumMode -+}; -+ -+struct mdl { -+ struct mdl *next; -+ CSHORT size; -+ CSHORT flags; -+ /* NdisFreeBuffer doesn't pass pool, so we store pool in -+ * unused field 'process' */ -+ union { -+ void *process; -+ void *pool; -+ }; -+ void *mappedsystemva; -+ void *startva; -+ ULONG bytecount; -+ ULONG byteoffset; -+}; -+ -+#define MDL_MAPPED_TO_SYSTEM_VA 0x0001 -+#define MDL_PAGES_LOCKED 0x0002 -+#define MDL_SOURCE_IS_NONPAGED_POOL 0x0004 -+#define MDL_ALLOCATED_FIXED_SIZE 0x0008 -+#define MDL_PARTIAL 0x0010 -+#define MDL_PARTIAL_HAS_BEEN_MAPPED 0x0020 -+#define MDL_IO_PAGE_READ 0x0040 -+#define MDL_WRITE_OPERATION 0x0080 -+#define MDL_PARENT_MAPPED_SYSTEM_VA 0x0100 -+#define MDL_FREE_EXTRA_PTES 0x0200 -+#define MDL_IO_SPACE 0x0800 -+#define MDL_NETWORK_HEADER 0x1000 -+#define MDL_MAPPING_CAN_FAIL 0x2000 -+#define MDL_ALLOCATED_MUST_SUCCEED 0x4000 -+ -+#define MDL_POOL_ALLOCATED 0x0400 -+#define MDL_CACHE_ALLOCATED 0x8000 -+ -+#define PAGE_START(ptr) ((void *)((ULONG_PTR)(ptr) & ~(PAGE_SIZE - 1))) -+#define BYTE_OFFSET(ptr) ((ULONG)((ULONG_PTR)(ptr) & (PAGE_SIZE - 1))) -+ -+#define MmGetMdlByteCount(mdl) ((mdl)->bytecount) -+#define MmGetMdlVirtualAddress(mdl) ((mdl)->startva + (mdl)->byteoffset) -+#define MmGetMdlByteOffset(mdl) ((mdl)->byteoffset) -+#define MmGetSystemAddressForMdl(mdl) ((mdl)->mappedsystemva) -+#define MmGetSystemAddressForMdlSafe(mdl, priority) ((mdl)->mappedsystemva) -+#define MmGetMdlPfnArray(mdl) ((PFN_NUMBER *)(mdl + 1)) -+#define MmInitializeMdl(mdl, baseva, length) \ -+do { \ -+ (mdl)->next = NULL; \ -+ (mdl)->size = MmSizeOfMdl(baseva, length); \ -+ (mdl)->flags = 0; \ -+ (mdl)->startva = PAGE_START(baseva); \ -+ (mdl)->byteoffset = BYTE_OFFSET(baseva); \ -+ (mdl)->bytecount = length; \ -+ (mdl)->mappedsystemva = baseva; \ -+ TRACE4("%p %p %p %d %d", (mdl), baseva, (mdl)->startva, \ -+ (mdl)->byteoffset, length); \ -+} while (0) -+ -+struct kdevice_queue_entry { -+ struct nt_list list; -+ ULONG sort_key; -+ BOOLEAN inserted; -+}; -+ -+struct kdevice_queue { -+ USHORT type; -+ USHORT size; -+ struct nt_list list; -+ NT_SPIN_LOCK lock; -+ BOOLEAN busy; -+}; -+ -+struct wait_context_block { -+ struct kdevice_queue_entry wait_queue_entry; -+ void *device_routine; -+ void *device_context; -+ ULONG num_regs; -+ void *device_object; -+ void *current_irp; -+ void *buffer_chaining_dpc; -+}; -+ -+struct wait_block { -+ struct nt_list list; -+ struct task_struct *thread; -+ void *object; -+ int *wait_done; -+ USHORT wait_key; -+ USHORT wait_type; -+}; -+ -+struct dispatcher_header { -+ UCHAR type; -+ UCHAR absolute; -+ UCHAR size; -+ UCHAR inserted; -+ LONG signal_state; -+ struct nt_list wait_blocks; -+}; -+ -+enum event_type { -+ NotificationEvent, -+ SynchronizationEvent, -+}; -+ -+enum timer_type { -+ NotificationTimer = NotificationEvent, -+ SynchronizationTimer = SynchronizationEvent, -+}; -+ -+enum dh_type { -+ NotificationObject = NotificationEvent, -+ SynchronizationObject = SynchronizationEvent, -+ MutexObject, -+ SemaphoreObject, -+ ThreadObject, -+}; -+ -+enum wait_type { -+ WaitAll, WaitAny -+}; -+ -+/* objects that use dispatcher_header have it as the first field, so -+ * whenever we need to initialize dispatcher_header, we can convert -+ * that object into a nt_event and access dispatcher_header */ -+struct nt_event { -+ struct dispatcher_header dh; -+}; -+ -+struct wrap_timer; -+ -+#define WRAP_TIMER_MAGIC 47697249 -+ -+struct nt_timer { -+ struct dispatcher_header dh; -+ /* We can't fit Linux timer in this structure. Instead of -+ * padding the nt_timer structure, we replace due_time field -+ * with *wrap_timer and allocate memory for it when nt_timer is -+ * initialized */ -+ union { -+ ULONGLONG due_time; -+ struct wrap_timer *wrap_timer; -+ }; -+ struct nt_list nt_timer_list; -+ struct kdpc *kdpc; -+ union { -+ LONG period; -+ LONG wrap_timer_magic; -+ }; -+}; -+ -+struct nt_mutex { -+ struct dispatcher_header dh; -+ struct nt_list list; -+ struct task_struct *owner_thread; -+ BOOLEAN abandoned; -+ BOOLEAN apc_disable; -+}; -+ -+struct nt_semaphore { -+ struct dispatcher_header dh; -+ LONG limit; -+}; -+ -+struct nt_thread { -+ struct dispatcher_header dh; -+ /* the rest in Windows is a long structure; since this -+ * structure is opaque to drivers, we just define what we -+ * need */ -+ int pid; -+ NTSTATUS status; -+ struct task_struct *task; -+ struct nt_list irps; -+ NT_SPIN_LOCK lock; -+ KPRIORITY prio; -+}; -+ -+#define set_object_type(dh, type) ((dh)->type = (type)) -+#define is_notify_object(dh) ((dh)->type == NotificationObject) -+#define is_synch_object(dh) ((dh)->type == SynchronizationObject) -+#define is_mutex_object(dh) ((dh)->type == MutexObject) -+#define is_semaphore_object(dh) ((dh)->type == SemaphoreObject) -+#define is_nt_thread_object(dh) ((dh)->type == ThreadObject) -+ -+#define IO_TYPE_ADAPTER 1 -+#define IO_TYPE_CONTROLLER 2 -+#define IO_TYPE_DEVICE 3 -+#define IO_TYPE_DRIVER 4 -+#define IO_TYPE_FILE 5 -+#define IO_TYPE_IRP 6 -+#define IO_TYPE_DEVICE_OBJECT_EXTENSION 13 -+ -+struct irp; -+struct dev_obj_ext; -+struct driver_object; -+ -+struct device_object { -+ CSHORT type; -+ USHORT size; -+ LONG ref_count; -+ struct driver_object *drv_obj; -+ struct device_object *next; -+ struct device_object *attached; -+ struct irp *current_irp; -+ void *io_timer; -+ ULONG flags; -+ ULONG characteristics; -+ void *vpb; -+ void *dev_ext; -+ CCHAR stack_count; -+ union { -+ struct nt_list queue_list; -+ struct wait_context_block wcb; -+ } queue; -+ ULONG align_req; -+ struct kdevice_queue dev_queue; -+ struct kdpc dpc; -+ ULONG active_threads; -+ void *security_desc; -+ struct nt_event lock; -+ USHORT sector_size; -+ USHORT spare1; -+ struct dev_obj_ext *dev_obj_ext; -+ void *reserved; -+}; -+ -+struct dev_obj_ext { -+ CSHORT type; -+ CSHORT size; -+ struct device_object *dev_obj; -+ struct device_object *attached_to; -+}; -+ -+struct io_status_block { -+ union { -+ NTSTATUS status; -+ void *pointer; -+ }; -+ ULONG_PTR info; -+}; -+ -+#ifdef CONFIG_X86_64 -+struct io_status_block32 { -+ NTSTATUS status; -+ ULONG info; -+}; -+#endif -+ -+#define DEVICE_TYPE ULONG -+ -+struct driver_extension; -+ -+typedef NTSTATUS driver_dispatch_t(struct device_object *dev_obj, -+ struct irp *irp) wstdcall; -+ -+struct driver_object { -+ CSHORT type; -+ CSHORT size; -+ struct device_object *dev_obj; -+ ULONG flags; -+ void *start; -+ ULONG driver_size; -+ void *section; -+ struct driver_extension *drv_ext; -+ struct unicode_string name; -+ struct unicode_string *hardware_database; -+ void *fast_io_dispatch; -+ void *init; -+ void *start_io; -+ void (*unload)(struct driver_object *driver) wstdcall; -+ driver_dispatch_t *major_func[IRP_MJ_MAXIMUM_FUNCTION + 1]; -+}; -+ -+struct driver_extension { -+ struct driver_object *drv_obj; -+ NTSTATUS (*add_device)(struct driver_object *drv_obj, -+ struct device_object *dev_obj); -+ ULONG count; -+ struct unicode_string service_key_name; -+ struct nt_list custom_ext; -+}; -+ -+struct custom_ext { -+ struct nt_list list; -+ void *client_id; -+}; -+ -+struct wrap_bin_file; -+ -+struct file_object { -+ CSHORT type; -+ CSHORT size; -+ struct device_object *dev_obj; -+ void *volume_parameter_block; -+ void *fs_context; -+ void *fs_context2; -+ void *section_object_pointer; -+ void *private_cache_map; -+ NTSTATUS final_status; -+ union { -+ struct file_object *related_file_object; -+ struct wrap_bin_file *wrap_bin_file; -+ }; -+ BOOLEAN lock_operation; -+ BOOLEAN delete_pending; -+ BOOLEAN read_access; -+ BOOLEAN write_access; -+ BOOLEAN delete_access; -+ BOOLEAN shared_read; -+ BOOLEAN shared_write; -+ BOOLEAN shared_delete; -+ ULONG flags; -+ struct unicode_string _name_; -+ LARGE_INTEGER current_byte_offset; -+ ULONG waiters; -+ ULONG busy; -+ void *last_lock; -+ struct nt_event lock; -+ struct nt_event event; -+ void *completion_context; -+}; -+ -+#ifdef CONFIG_X86_64 -+#define POINTER_ALIGN __attribute__((aligned(8))) -+#else -+#define POINTER_ALIGN -+#endif -+ -+#define CACHE_ALIGN __attribute__((aligned(128))) -+ -+enum system_power_state { -+ PowerSystemUnspecified = 0, -+ PowerSystemWorking, PowerSystemSleeping1, PowerSystemSleeping2, -+ PowerSystemSleeping3, PowerSystemHibernate, PowerSystemShutdown, -+ PowerSystemMaximum, -+}; -+ -+enum device_power_state { -+ PowerDeviceUnspecified = 0, -+ PowerDeviceD0, PowerDeviceD1, PowerDeviceD2, PowerDeviceD3, -+ PowerDeviceMaximum, -+}; -+ -+union power_state { -+ enum system_power_state system_state; -+ enum device_power_state device_state; -+}; -+ -+enum power_state_type { -+ SystemPowerState = 0, DevicePowerState, -+}; -+ -+enum power_action { -+ PowerActionNone = 0, -+ PowerActionReserved, PowerActionSleep, PowerActionHibernate, -+ PowerActionShutdown, PowerActionShutdownReset, PowerActionShutdownOff, -+ PowerActionWarmEject, -+}; -+ -+struct guid { -+ ULONG data1; -+ USHORT data2; -+ USHORT data3; -+ UCHAR data4[8]; -+}; -+ -+struct nt_interface { -+ USHORT size; -+ USHORT version; -+ void *context; -+ void (*reference)(void *context) wstdcall; -+ void (*dereference)(void *context) wstdcall; -+}; -+ -+enum interface_type { -+ InterfaceTypeUndefined = -1, Internal, Isa, Eisa, MicroChannel, -+ TurboChannel, PCIBus, VMEBus, NuBus, PCMCIABus, CBus, MPIBus, -+ MPSABus, ProcessorInternal, InternalPowerBus, PNPISABus, -+ PNPBus, MaximumInterfaceType, -+}; -+ -+#define CmResourceTypeNull 0 -+#define CmResourceTypePort 1 -+#define CmResourceTypeInterrupt 2 -+#define CmResourceTypeMemory 3 -+#define CmResourceTypeDma 4 -+#define CmResourceTypeDeviceSpecific 5 -+#define CmResourceTypeBusNumber 6 -+#define CmResourceTypeMaximum 7 -+ -+#define CmResourceTypeNonArbitrated 128 -+#define CmResourceTypeConfigData 128 -+#define CmResourceTypeDevicePrivate 129 -+#define CmResourceTypePcCardConfig 130 -+#define CmResourceTypeMfCardConfig 131 -+ -+enum cm_share_disposition { -+ CmResourceShareUndetermined = 0, CmResourceShareDeviceExclusive, -+ CmResourceShareDriverExclusive, CmResourceShareShared -+}; -+ -+#define CM_RESOURCE_INTERRUPT_LEVEL_SENSITIVE 0 -+#define CM_RESOURCE_INTERRUPT_LATCHED 1 -+#define CM_RESOURCE_MEMORY_READ_WRITE 0x0000 -+#define CM_RESOURCE_MEMORY_READ_ONLY 0x0001 -+#define CM_RESOURCE_MEMORY_WRITE_ONLY 0x0002 -+#define CM_RESOURCE_MEMORY_PREFETCHABLE 0x0004 -+ -+#define CM_RESOURCE_MEMORY_COMBINEDWRITE 0x0008 -+#define CM_RESOURCE_MEMORY_24 0x0010 -+#define CM_RESOURCE_MEMORY_CACHEABLE 0x0020 -+ -+#define CM_RESOURCE_PORT_MEMORY 0x0000 -+#define CM_RESOURCE_PORT_IO 0x0001 -+#define CM_RESOURCE_PORT_10_BIT_DECODE 0x0004 -+#define CM_RESOURCE_PORT_12_BIT_DECODE 0x0008 -+#define CM_RESOURCE_PORT_16_BIT_DECODE 0x0010 -+#define CM_RESOURCE_PORT_POSITIVE_DECODE 0x0020 -+#define CM_RESOURCE_PORT_PASSIVE_DECODE 0x0040 -+#define CM_RESOURCE_PORT_WINDOW_DECODE 0x0080 -+ -+#define CM_RESOURCE_DMA_8 0x0000 -+#define CM_RESOURCE_DMA_16 0x0001 -+#define CM_RESOURCE_DMA_32 0x0002 -+#define CM_RESOURCE_DMA_8_AND_16 0x0004 -+#define CM_RESOURCE_DMA_BUS_MASTER 0x0008 -+#define CM_RESOURCE_DMA_TYPE_A 0x0010 -+#define CM_RESOURCE_DMA_TYPE_B 0x0020 -+#define CM_RESOURCE_DMA_TYPE_F 0x0040 -+ -+#define MAX_RESOURCES 20 -+ -+#pragma pack(push,4) -+struct cm_partial_resource_descriptor { -+ UCHAR type; -+ UCHAR share; -+ USHORT flags; -+ union { -+ struct { -+ PHYSICAL_ADDRESS start; -+ ULONG length; -+ } generic; -+ struct { -+ PHYSICAL_ADDRESS start; -+ ULONG length; -+ } port; -+ struct { -+ ULONG level; -+ ULONG vector; -+ KAFFINITY affinity; -+ } interrupt; -+ struct { -+ PHYSICAL_ADDRESS start; -+ ULONG length; -+ } memory; -+ struct { -+ ULONG channel; -+ ULONG port; -+ ULONG reserved1; -+ } dma; -+ struct { -+ ULONG data[3]; -+ } device_private; -+ struct { -+ ULONG start; -+ ULONG length; -+ ULONG reserved; -+ } bus_number; -+ struct { -+ ULONG data_size; -+ ULONG reserved1; -+ ULONG reserved2; -+ } device_specific_data; -+ } u; -+}; -+#pragma pack(pop) -+ -+struct cm_partial_resource_list { -+ USHORT version; -+ USHORT revision; -+ ULONG count; -+ struct cm_partial_resource_descriptor partial_descriptors[1]; -+}; -+ -+struct cm_full_resource_descriptor { -+ enum interface_type interface_type; -+ ULONG bus_number; -+ struct cm_partial_resource_list partial_resource_list; -+}; -+ -+struct cm_resource_list { -+ ULONG count; -+ struct cm_full_resource_descriptor list[1]; -+}; -+ -+enum file_info_class { -+ FileDirectoryInformation = 1, -+ FileBasicInformation = 4, -+ FileStandardInformation = 5, -+ FileNameInformation = 9, -+ FilePositionInformation = 14, -+ FileAlignmentInformation = 17, -+ FileNetworkOpenInformation = 34, -+ FileAttributeTagInformation = 35, -+ FileMaximumInformation = 41, -+}; -+ -+enum fs_info_class { -+ FileFsVolumeInformation = 1, -+ /* ... */ -+ FileFsMaximumInformation = 9, -+}; -+ -+enum device_relation_type { -+ BusRelations, EjectionRelations, PowerRelations, RemovalRelations, -+ TargetDeviceRelation, SingleBusRelations, -+}; -+ -+enum bus_query_id_type { -+ BusQueryDeviceID = 0, BusQueryHardwareIDs = 1, -+ BusQueryCompatibleIDs = 2, BusQueryInstanceID = 3, -+ BusQueryDeviceSerialNumber = 4, -+}; -+ -+enum device_text_type { -+ DeviceTextDescription = 0, DeviceTextLocationInformation = 1, -+}; -+ -+enum device_usage_notification_type { -+ DeviceUsageTypeUndefined, DeviceUsageTypePaging, -+ DeviceUsageTypeHibernation, DevbiceUsageTypeDumpFile, -+}; -+ -+#define METHOD_BUFFERED 0 -+#define METHOD_IN_DIRECT 1 -+#define METHOD_OUT_DIRECT 2 -+#define METHOD_NEITHER 3 -+ -+#define CTL_CODE(dev_type, func, method, access) \ -+ (((dev_type) << 16) | ((access) << 14) | ((func) << 2) | (method)) -+ -+#define IO_METHOD_FROM_CTL_CODE(code) (code & 0x3) -+ -+#ifndef CONFIG_X86_64 -+#pragma pack(push,4) -+#endif -+struct io_stack_location { -+ UCHAR major_fn; -+ UCHAR minor_fn; -+ UCHAR flags; -+ UCHAR control; -+ union { -+ struct { -+ void *security_context; -+ ULONG options; -+ USHORT POINTER_ALIGN file_attributes; -+ USHORT share_access; -+ ULONG POINTER_ALIGN ea_length; -+ } create; -+ struct { -+ ULONG length; -+ ULONG POINTER_ALIGN key; -+ LARGE_INTEGER byte_offset; -+ } read; -+ struct { -+ ULONG length; -+ ULONG POINTER_ALIGN key; -+ LARGE_INTEGER byte_offset; -+ } write; -+ struct { -+ ULONG length; -+ enum file_info_class POINTER_ALIGN file_info_class; -+ } query_file; -+ struct { -+ ULONG length; -+ enum file_info_class POINTER_ALIGN file_info_class; -+ struct file_object *file_object; -+ union { -+ struct { -+ BOOLEAN replace_if_exists; -+ BOOLEAN advance_only; -+ }; -+ ULONG cluster_count; -+ void *delete_handle; -+ }; -+ } set_file; -+ struct { -+ ULONG length; -+ enum fs_info_class POINTER_ALIGN fs_info_class; -+ } query_volume; -+ struct { -+ ULONG output_buf_len; -+ ULONG POINTER_ALIGN input_buf_len; -+ ULONG POINTER_ALIGN code; -+ void *type3_input_buf; -+ } dev_ioctl; -+ struct { -+ SECURITY_INFORMATION security_info; -+ ULONG POINTER_ALIGN length; -+ } query_security; -+ struct { -+ SECURITY_INFORMATION security_info; -+ void *security_descriptor; -+ } set_security; -+ struct { -+ void *vpb; -+ struct device_object *device_object; -+ } mount_volume; -+ struct { -+ void *vpb; -+ struct device_object *device_object; -+ } verify_volume; -+ struct { -+ void *srb; -+ } scsi; -+ struct { -+ enum device_relation_type type; -+ } query_device_relations; -+ struct { -+ const struct guid *type; -+ USHORT size; -+ USHORT version; -+ struct nt_interface *intf; -+ void *intf_data; -+ } query_intf; -+ struct { -+ void *capabilities; -+ } device_capabilities; -+ struct { -+ void *io_resource_requirement_list; -+ } filter_resource_requirements; -+ struct { -+ ULONG which_space; -+ void *buffer; -+ ULONG offset; -+ ULONG POINTER_ALIGN length; -+ } read_write_config; -+ struct { -+ BOOLEAN lock; -+ } set_lock; -+ struct { -+ enum bus_query_id_type id_type; -+ } query_id; -+ struct { -+ enum device_text_type device_text_type; -+ ULONG POINTER_ALIGN locale_id; -+ } query_device_text; -+ struct { -+ BOOLEAN in_path; -+ BOOLEAN reserved[3]; -+ enum device_usage_notification_type POINTER_ALIGN type; -+ } usage_notification; -+ struct { -+ enum system_power_state power_state; -+ } wait_wake; -+ struct { -+ void *power_sequence; -+ } power_sequence; -+ struct { -+ ULONG sys_context; -+ enum power_state_type POINTER_ALIGN type; -+ union power_state POINTER_ALIGN state; -+ enum power_action POINTER_ALIGN shutdown_type; -+ } power; -+ struct { -+ struct cm_resource_list *allocated_resources; -+ struct cm_resource_list *allocated_resources_translated; -+ } start_device; -+ struct { -+ ULONG_PTR provider_id; -+ void *data_path; -+ ULONG buf_len; -+ void *buf; -+ } wmi; -+ struct { -+ void *arg1; -+ void *arg2; -+ void *arg3; -+ void *arg4; -+ } others; -+ } params; -+ struct device_object *dev_obj; -+ struct file_object *file_obj; -+ NTSTATUS (*completion_routine)(struct device_object *, -+ struct irp *, void *) wstdcall; -+ void *context; -+}; -+#ifndef CONFIG_X86_64 -+#pragma pack(pop) -+#endif -+ -+struct kapc { -+ CSHORT type; -+ CSHORT size; -+ ULONG spare0; -+ struct nt_thread *thread; -+ struct nt_list list; -+ void *kernele_routine; -+ void *rundown_routine; -+ void *normal_routine; -+ void *normal_context; -+ void *sys_arg1; -+ void *sys_arg2; -+ CCHAR apc_state_index; -+ KPROCESSOR_MODE apc_mode; -+ BOOLEAN inserted; -+}; -+ -+#define IRP_NOCACHE 0x00000001 -+#define IRP_SYNCHRONOUS_API 0x00000004 -+#define IRP_ASSOCIATED_IRP 0x00000008 -+ -+enum urb_state { -+ URB_INVALID = 1, URB_ALLOCATED, URB_SUBMITTED, -+ URB_COMPLETED, URB_FREE, URB_SUSPEND, URB_INT_UNLINKED }; -+ -+struct wrap_urb { -+ struct nt_list list; -+ enum urb_state state; -+ struct nt_list complete_list; -+ unsigned int flags; -+ struct urb *urb; -+ struct irp *irp; -+#ifdef USB_DEBUG -+ unsigned int id; -+#endif -+}; -+ -+struct irp { -+ SHORT type; -+ USHORT size; -+ struct mdl *mdl; -+ ULONG flags; -+ union { -+ struct irp *master_irp; -+ LONG irp_count; -+ void *system_buffer; -+ } associated_irp; -+ struct nt_list thread_list; -+ struct io_status_block io_status; -+ KPROCESSOR_MODE requestor_mode; -+ BOOLEAN pending_returned; -+ CHAR stack_count; -+ CHAR current_location; -+ BOOLEAN cancel; -+ KIRQL cancel_irql; -+ CCHAR apc_env; -+ UCHAR alloc_flags; -+ struct io_status_block *user_status; -+ struct nt_event *user_event; -+ union { -+ struct { -+ void *user_apc_routine; -+ void *user_apc_context; -+ } async_params; -+ LARGE_INTEGER alloc_size; -+ } overlay; -+ void (*cancel_routine)(struct device_object *, struct irp *) wstdcall; -+ void *user_buf; -+ union { -+ struct { -+ union { -+ struct kdevice_queue_entry dev_q_entry; -+ struct { -+ void *driver_context[4]; -+ }; -+ }; -+ void *thread; -+ char *aux_buf; -+ struct { -+ struct nt_list list; -+ union { -+ struct io_stack_location *csl; -+ ULONG packet_type; -+ }; -+ }; -+ struct file_object *file_object; -+ } overlay; -+ union { -+ struct kapc apc; -+ /* space for apc is used for ndiswrapper -+ * specific fields */ -+ struct { -+ struct wrap_urb *wrap_urb; -+ struct wrap_device *wrap_device; -+ }; -+ }; -+ void *completion_key; -+ } tail; -+}; -+ -+#define IoSizeOfIrp(stack_count) \ -+ ((USHORT)(sizeof(struct irp) + \ -+ ((stack_count) * sizeof(struct io_stack_location)))) -+#define IoGetCurrentIrpStackLocation(irp) \ -+ (irp)->tail.overlay.csl -+#define IoGetNextIrpStackLocation(irp) \ -+ (IoGetCurrentIrpStackLocation(irp) - 1) -+#define IoGetPreviousIrpStackLocation(irp) \ -+ (IoGetCurrentIrpStackLocation(irp) + 1) -+ -+#define IoSetNextIrpStackLocation(irp) \ -+do { \ -+ KIRQL _irql_; \ -+ IoAcquireCancelSpinLock(&_irql_); \ -+ (irp)->current_location--; \ -+ IoGetCurrentIrpStackLocation(irp)--; \ -+ IoReleaseCancelSpinLock(_irql_); \ -+} while (0) -+ -+#define IoSkipCurrentIrpStackLocation(irp) \ -+do { \ -+ KIRQL _irql_; \ -+ IoAcquireCancelSpinLock(&_irql_); \ -+ (irp)->current_location++; \ -+ IoGetCurrentIrpStackLocation(irp)++; \ -+ IoReleaseCancelSpinLock(_irql_); \ -+} while (0) -+ -+static inline void -+IoCopyCurrentIrpStackLocationToNext(struct irp *irp) -+{ -+ struct io_stack_location *next; -+ next = IoGetNextIrpStackLocation(irp); -+ memcpy(next, IoGetCurrentIrpStackLocation(irp), -+ offsetof(struct io_stack_location, completion_routine)); -+ next->control = 0; -+} -+ -+static inline void -+IoSetCompletionRoutine(struct irp *irp, void *routine, void *context, -+ BOOLEAN success, BOOLEAN error, BOOLEAN cancel) -+{ -+ struct io_stack_location *irp_sl = IoGetNextIrpStackLocation(irp); -+ irp_sl->completion_routine = routine; -+ irp_sl->context = context; -+ irp_sl->control = 0; -+ if (success) -+ irp_sl->control |= SL_INVOKE_ON_SUCCESS; -+ if (error) -+ irp_sl->control |= SL_INVOKE_ON_ERROR; -+ if (cancel) -+ irp_sl->control |= SL_INVOKE_ON_CANCEL; -+} -+ -+#define IoMarkIrpPending(irp) \ -+ (IoGetCurrentIrpStackLocation((irp))->control |= SL_PENDING_RETURNED) -+#define IoUnmarkIrpPending(irp) \ -+ (IoGetCurrentIrpStackLocation((irp))->control &= ~SL_PENDING_RETURNED) -+ -+#define IRP_SL(irp, n) (((struct io_stack_location *)((irp) + 1)) + (n)) -+#define IRP_DRIVER_CONTEXT(irp) (irp)->tail.overlay.driver_context -+#define IoIrpThread(irp) ((irp)->tail.overlay.thread) -+ -+#define IRP_URB(irp) \ -+ (union nt_urb *)(IoGetCurrentIrpStackLocation(irp)->params.others.arg1) -+ -+#define IRP_WRAP_DEVICE(irp) (irp)->tail.wrap_device -+#define IRP_WRAP_URB(irp) (irp)->tail.wrap_urb -+ -+struct wmi_guid_reg_info { -+ struct guid *guid; -+ ULONG instance_count; -+ ULONG flags; -+}; -+ -+struct wmilib_context { -+ ULONG guid_count; -+ struct wmi_guid_reg_info *guid_list; -+ void *query_wmi_reg_info; -+ void *query_wmi_data_block; -+ void *set_wmi_data_block; -+ void *set_wmi_data_item; -+ void *execute_wmi_method; -+ void *wmi_function_control; -+}; -+ -+enum key_value_information_class { -+ KeyValueBasicInformation, KeyValueFullInformation, -+ KeyValuePartialInformation, KeyValueFullInformationAlign64, -+ KeyValuePartialInformationAlign64 -+}; -+ -+struct file_name_info { -+ ULONG length; -+ wchar_t *name; -+}; -+ -+struct file_std_info { -+ LARGE_INTEGER alloc_size; -+ LARGE_INTEGER eof; -+ ULONG num_links; -+ BOOLEAN delete_pending; -+ BOOLEAN dir; -+}; -+ -+enum nt_obj_type { -+ NT_OBJ_EVENT = 10, NT_OBJ_MUTEX, NT_OBJ_THREAD, NT_OBJ_TIMER, -+ NT_OBJ_SEMAPHORE, -+}; -+ -+enum common_object_type { -+ OBJECT_TYPE_NONE, OBJECT_TYPE_DEVICE, OBJECT_TYPE_DRIVER, -+ OBJECT_TYPE_NT_THREAD, OBJECT_TYPE_FILE, OBJECT_TYPE_CALLBACK, -+}; -+ -+struct common_object_header { -+ struct nt_list list; -+ enum common_object_type type; -+ UINT size; -+ UINT ref_count; -+ BOOLEAN close_in_process; -+ BOOLEAN permanent; -+ struct unicode_string name; -+}; -+ -+#define OBJECT_TO_HEADER(object) \ -+ (struct common_object_header *)((void *)(object) - \ -+ sizeof(struct common_object_header)) -+#define OBJECT_SIZE(size) \ -+ ((size) + sizeof(struct common_object_header)) -+#define HEADER_TO_OBJECT(hdr) \ -+ ((void *)(hdr) + sizeof(struct common_object_header)) -+#define HANDLE_TO_OBJECT(handle) HEADER_TO_OBJECT(handle) -+#define HANDLE_TO_HEADER(handle) (handle) -+ -+enum work_queue_type { -+ CriticalWorkQueue, DelayedWorkQueue, HyperCriticalWorkQueue, -+ MaximumWorkQueue -+}; -+ -+typedef void (*NTOS_WORK_FUNC)(void *arg1, void *arg2) wstdcall; -+ -+struct io_workitem { -+ enum work_queue_type type; -+ struct device_object *dev_obj; -+ NTOS_WORK_FUNC worker_routine; -+ void *context; -+}; -+ -+struct io_workitem_entry { -+ struct nt_list list; -+ struct io_workitem *io_workitem; -+}; -+ -+enum mm_page_priority { -+ LowPagePriority, NormalPagePriority = 16, HighPagePriority = 32 -+}; -+ -+enum kinterrupt_mode { -+ LevelSensitive, Latched -+}; -+ -+enum ntos_wait_reason { -+ Executive, FreePage, PageIn, PoolAllocation, DelayExecution, -+ Suspended, UserRequest, WrExecutive, WrFreePage, WrPageIn, -+ WrPoolAllocation, WrDelayExecution, WrSuspended, WrUserRequest, -+ WrEventPair, WrQueue, WrLpcReceive, WrLpcReply, WrVirtualMemory, -+ WrPageOut, WrRendezvous, Spare2, Spare3, Spare4, Spare5, Spare6, -+ WrKernel, MaximumWaitReason -+}; -+ -+typedef enum ntos_wait_reason KWAIT_REASON; -+ -+typedef void *LOOKASIDE_ALLOC_FUNC(enum pool_type pool_type, -+ SIZE_T size, ULONG tag) wstdcall; -+typedef void LOOKASIDE_FREE_FUNC(void *) wstdcall; -+ -+struct npaged_lookaside_list { -+ nt_slist_header head; -+ USHORT depth; -+ USHORT maxdepth; -+ ULONG totalallocs; -+ union { -+ ULONG allocmisses; -+ ULONG allochits; -+ } u1; -+ ULONG totalfrees; -+ union { -+ ULONG freemisses; -+ ULONG freehits; -+ } u2; -+ enum pool_type pool_type; -+ ULONG tag; -+ ULONG size; -+ LOOKASIDE_ALLOC_FUNC *alloc_func; -+ LOOKASIDE_FREE_FUNC *free_func; -+ struct nt_list list; -+ ULONG lasttotallocs; -+ union { -+ ULONG lastallocmisses; -+ ULONG lastallochits; -+ } u3; -+ ULONG pad[2]; -+#ifndef CONFIG_X86_64 -+ NT_SPIN_LOCK obsolete; -+#endif -+} -+#ifdef CONFIG_X86_64 -+CACHE_ALIGN -+#endif -+; -+ -+enum device_registry_property { -+ DevicePropertyDeviceDescription, DevicePropertyHardwareID, -+ DevicePropertyCompatibleIDs, DevicePropertyBootConfiguration, -+ DevicePropertyBootConfigurationTranslated, -+ DevicePropertyClassName, DevicePropertyClassGuid, -+ DevicePropertyDriverKeyName, DevicePropertyManufacturer, -+ DevicePropertyFriendlyName, DevicePropertyLocationInformation, -+ DevicePropertyPhysicalDeviceObjectName, DevicePropertyBusTypeGuid, -+ DevicePropertyLegacyBusType, DevicePropertyBusNumber, -+ DevicePropertyEnumeratorName, DevicePropertyAddress, -+ DevicePropertyUINumber, DevicePropertyInstallState, -+ DevicePropertyRemovalPolicy -+}; -+ -+enum trace_information_class { -+ TraceIdClass, TraceHandleClass, TraceEnableFlagsClass, -+ TraceEnableLevelClass, GlobalLoggerHandleClass, EventLoggerHandleClass, -+ AllLoggerHandlesClass, TraceHandleByNameClass -+}; -+ -+struct kinterrupt; -+typedef BOOLEAN (*PKSERVICE_ROUTINE)(struct kinterrupt *interrupt, -+ void *context) wstdcall; -+typedef BOOLEAN (*PKSYNCHRONIZE_ROUTINE)(void *context) wstdcall; -+ -+struct kinterrupt { -+ ULONG vector; -+ KAFFINITY cpu_mask; -+ NT_SPIN_LOCK lock; -+ NT_SPIN_LOCK *actual_lock; -+ BOOLEAN shared; -+ BOOLEAN save_fp; -+ union { -+ CHAR processor_number; -+#ifdef CONFIG_DEBUG_SHIRQ -+ CHAR enabled; -+#endif -+ } u; -+ PKSERVICE_ROUTINE isr; -+ void *isr_ctx; -+ struct nt_list list; -+ KIRQL irql; -+ KIRQL synch_irql; -+ enum kinterrupt_mode mode; -+}; -+ -+struct time_fields { -+ CSHORT year; -+ CSHORT month; -+ CSHORT day; -+ CSHORT hour; -+ CSHORT minute; -+ CSHORT second; -+ CSHORT milliseconds; -+ CSHORT weekday; -+}; -+ -+struct object_attributes { -+ ULONG length; -+ void *root_dir; -+ struct unicode_string *name; -+ ULONG attributes; -+ void *security_descr; -+ void *security_qos; -+}; -+ -+typedef void (*PCALLBACK_FUNCTION)(void *context, void *arg1, -+ void *arg2) wstdcall; -+ -+struct callback_object; -+struct callback_func { -+ PCALLBACK_FUNCTION func; -+ void *context; -+ struct nt_list list; -+ struct callback_object *object; -+}; -+ -+struct callback_object { -+ NT_SPIN_LOCK lock; -+ struct nt_list list; -+ struct nt_list callback_funcs; -+ BOOLEAN allow_multiple_callbacks; -+ struct object_attributes *attributes; -+}; -+ -+enum section_inherit { -+ ViewShare = 1, ViewUnmap = 2 -+}; -+ -+struct ksystem_time { -+ ULONG low_part; -+ LONG high1_time; -+ LONG high2_time; -+}; -+ -+enum nt_product_type { -+ nt_product_win_nt = 1, nt_product_lan_man_nt, nt_product_server -+}; -+ -+enum alt_arch_type { -+ arch_type_standard, arch_type_nex98x86, end_alternatives -+}; -+ -+struct kuser_shared_data { -+ ULONG tick_count; -+ ULONG tick_count_multiplier; -+ volatile struct ksystem_time interrupt_time; -+ volatile struct ksystem_time system_time; -+ volatile struct ksystem_time time_zone_bias; -+ USHORT image_number_low; -+ USHORT image_number_high; -+ wchar_t nt_system_root[260]; -+ ULONG max_stack_trace_depth; -+ ULONG crypto_exponent; -+ ULONG time_zone_id; -+ ULONG large_page_min; -+ ULONG reserved2[7]; -+ enum nt_product_type nt_product_type; -+ BOOLEAN product_type_is_valid; -+ ULONG nt_major_version; -+ ULONG nt_minor_version; -+ BOOLEAN processor_features[PROCESSOR_FEATURE_MAX]; -+ ULONG reserved1; -+ ULONG reserved3; -+ volatile LONG time_slip; -+ enum alt_arch_type alt_arch_type; -+ LARGE_INTEGER system_expiration_date; -+ ULONG suite_mask; -+ BOOLEAN kdbg_enabled; -+ volatile ULONG active_console; -+ volatile ULONG dismount_count; -+ ULONG com_plus_package; -+ ULONG last_system_rite_event_tick_count; -+ ULONG num_phys_pages; -+ BOOLEAN safe_boot_mode; -+ ULONG trace_log; -+ ULONGLONG fill0; -+ ULONGLONG sys_call[4]; -+ union { -+ volatile struct ksystem_time tick_count; -+ volatile ULONG64 tick_count_quad; -+ } tick; -+}; -+ -+#define REG_NONE (0) -+#define REG_SZ (1) -+#define REG_EXPAND_SZ (2) -+#define REG_BINARY (3) -+#define REG_DWORD (4) -+ -+#define RTL_REGISTRY_ABSOLUTE 0 -+#define RTL_REGISTRY_SERVICES 1 -+#define RTL_REGISTRY_CONTROL 2 -+#define RTL_REGISTRY_WINDOWS_NT 3 -+#define RTL_REGISTRY_DEVICEMAP 4 -+#define RTL_REGISTRY_USER 5 -+#define RTL_REGISTRY_MAXIMUM 6 -+#define RTL_REGISTRY_HANDLE 0x40000000 -+#define RTL_REGISTRY_OPTIONAL 0x80000000 -+ -+#define RTL_QUERY_REGISTRY_SUBKEY 0x00000001 -+#define RTL_QUERY_REGISTRY_TOPKEY 0x00000002 -+#define RTL_QUERY_REGISTRY_REQUIRED 0x00000004 -+#define RTL_QUERY_REGISTRY_NOVALUE 0x00000008 -+#define RTL_QUERY_REGISTRY_NOEXPAND 0x00000010 -+#define RTL_QUERY_REGISTRY_DIRECT 0x00000020 -+#define RTL_QUERY_REGISTRY_DELETE 0x00000040 -+ -+typedef NTSTATUS (*PRTL_QUERY_REGISTRY_ROUTINE)(wchar_t *name, ULONG type, -+ void *data, ULONG length, -+ void *context, -+ void *entry) wstdcall; -+ -+struct rtl_query_registry_table { -+ PRTL_QUERY_REGISTRY_ROUTINE query_func; -+ ULONG flags; -+ wchar_t *name; -+ void *context; -+ ULONG def_type; -+ void *def_data; -+ ULONG def_length; -+}; -+ -+struct io_remove_lock { -+ BOOLEAN removed; -+ BOOLEAN reserved[3]; -+ LONG io_count; -+ struct nt_event remove_event; -+}; -+ -+struct io_error_log_packet { -+ UCHAR major_fn_code; -+ UCHAR retry_count; -+ USHORT dump_data_size; -+ USHORT nr_of_strings; -+ USHORT string_offset; -+ USHORT event_category; -+ NTSTATUS error_code; -+ ULONG unique_error_value; -+ NTSTATUS final_status; -+ ULONG sequence_number; -+ ULONG io_control_code; -+ LARGE_INTEGER device_offset; -+ ULONG dump_data[1]; -+}; -+ -+/* some of the functions below are slightly different from DDK's -+ * implementation; e.g., Insert functions return appropriate -+ * pointer */ -+ -+/* instead of using Linux's lists, we implement list manipulation -+ * functions because nt_list is used by drivers and we don't want to -+ * worry about Linux's list being different from nt_list (right now -+ * they are same, but in future they could be different) */ -+ -+static inline void InitializeListHead(struct nt_list *head) -+{ -+ head->next = head->prev = head; -+} -+ -+static inline BOOLEAN IsListEmpty(struct nt_list *head) -+{ -+ if (head == head->next) -+ return TRUE; -+ else -+ return FALSE; -+} -+ -+static inline void RemoveEntryList(struct nt_list *entry) -+{ -+ entry->prev->next = entry->next; -+ entry->next->prev = entry->prev; -+} -+ -+static inline struct nt_list *RemoveHeadList(struct nt_list *head) -+{ -+ struct nt_list *entry; -+ -+ entry = head->next; -+ if (entry == head) -+ return NULL; -+ else { -+ RemoveEntryList(entry); -+ return entry; -+ } -+} -+ -+static inline struct nt_list *RemoveTailList(struct nt_list *head) -+{ -+ struct nt_list *entry; -+ -+ entry = head->prev; -+ if (entry == head) -+ return NULL; -+ else { -+ RemoveEntryList(entry); -+ return entry; -+ } -+} -+ -+static inline void InsertListEntry(struct nt_list *entry, struct nt_list *prev, -+ struct nt_list *next) -+{ -+ next->prev = entry; -+ entry->next = next; -+ entry->prev = prev; -+ prev->next = entry; -+} -+ -+static inline struct nt_list *InsertHeadList(struct nt_list *head, -+ struct nt_list *entry) -+{ -+ struct nt_list *ret; -+ -+ if (IsListEmpty(head)) -+ ret = NULL; -+ else -+ ret = head->next; -+ -+ InsertListEntry(entry, head, head->next); -+ return ret; -+} -+ -+static inline struct nt_list *InsertTailList(struct nt_list *head, -+ struct nt_list *entry) -+{ -+ struct nt_list *ret; -+ -+ if (IsListEmpty(head)) -+ ret = NULL; -+ else -+ ret = head->prev; -+ -+ InsertListEntry(entry, head->prev, head); -+ return ret; -+} -+ -+#define nt_list_for_each(pos, head) \ -+ for (pos = (head)->next; pos != (head); pos = pos->next) -+ -+#define nt_list_for_each_entry(pos, head, member) \ -+ for (pos = container_of((head)->next, typeof(*pos), member); \ -+ &pos->member != (head); \ -+ pos = container_of(pos->member.next, typeof(*pos), member)) -+ -+#define nt_list_for_each_safe(pos, n, head) \ -+ for (pos = (head)->next, n = pos->next; pos != (head); \ -+ pos = n, n = pos->next) -+ -+/* device object flags */ -+#define DO_VERIFY_VOLUME 0x00000002 -+#define DO_BUFFERED_IO 0x00000004 -+#define DO_EXCLUSIVE 0x00000008 -+#define DO_DIRECT_IO 0x00000010 -+#define DO_MAP_IO_BUFFER 0x00000020 -+#define DO_DEVICE_HAS_NAME 0x00000040 -+#define DO_DEVICE_INITIALIZING 0x00000080 -+#define DO_SYSTEM_BOOT_PARTITION 0x00000100 -+#define DO_LONG_TERM_REQUESTS 0x00000200 -+#define DO_NEVER_LAST_DEVICE 0x00000400 -+#define DO_SHUTDOWN_REGISTERED 0x00000800 -+#define DO_BUS_ENUMERATED_DEVICE 0x00001000 -+#define DO_POWER_PAGABLE 0x00002000 -+#define DO_POWER_INRUSH 0x00004000 -+#define DO_LOW_PRIORITY_FILESYSTEM 0x00010000 -+ -+/* Various supported device types (used with IoCreateDevice()) */ -+ -+#define FILE_DEVICE_BEEP 0x00000001 -+#define FILE_DEVICE_CD_ROM 0x00000002 -+#define FILE_DEVICE_CD_ROM_FILE_SYSTEM 0x00000003 -+#define FILE_DEVICE_CONTROLLER 0x00000004 -+#define FILE_DEVICE_DATALINK 0x00000005 -+#define FILE_DEVICE_DFS 0x00000006 -+#define FILE_DEVICE_DISK 0x00000007 -+#define FILE_DEVICE_DISK_FILE_SYSTEM 0x00000008 -+#define FILE_DEVICE_FILE_SYSTEM 0x00000009 -+#define FILE_DEVICE_INPORT_PORT 0x0000000A -+#define FILE_DEVICE_KEYBOARD 0x0000000B -+#define FILE_DEVICE_MAILSLOT 0x0000000C -+#define FILE_DEVICE_MIDI_IN 0x0000000D -+#define FILE_DEVICE_MIDI_OUT 0x0000000E -+#define FILE_DEVICE_MOUSE 0x0000000F -+#define FILE_DEVICE_MULTI_UNC_PROVIDER 0x00000010 -+#define FILE_DEVICE_NAMED_PIPE 0x00000011 -+#define FILE_DEVICE_NETWORK 0x00000012 -+#define FILE_DEVICE_NETWORK_BROWSER 0x00000013 -+#define FILE_DEVICE_NETWORK_FILE_SYSTEM 0x00000014 -+#define FILE_DEVICE_NULL 0x00000015 -+#define FILE_DEVICE_PARALLEL_PORT 0x00000016 -+#define FILE_DEVICE_PHYSICAL_NETCARD 0x00000017 -+#define FILE_DEVICE_PRINTER 0x00000018 -+#define FILE_DEVICE_SCANNER 0x00000019 -+#define FILE_DEVICE_SERIAL_MOUSE_PORT 0x0000001A -+#define FILE_DEVICE_SERIAL_PORT 0x0000001B -+#define FILE_DEVICE_SCREEN 0x0000001C -+#define FILE_DEVICE_SOUND 0x0000001D -+#define FILE_DEVICE_STREAMS 0x0000001E -+#define FILE_DEVICE_TAPE 0x0000001F -+#define FILE_DEVICE_TAPE_FILE_SYSTEM 0x00000020 -+#define FILE_DEVICE_TRANSPORT 0x00000021 -+#define FILE_DEVICE_UNKNOWN 0x00000022 -+#define FILE_DEVICE_VIDEO 0x00000023 -+#define FILE_DEVICE_VIRTUAL_DISK 0x00000024 -+#define FILE_DEVICE_WAVE_IN 0x00000025 -+#define FILE_DEVICE_WAVE_OUT 0x00000026 -+#define FILE_DEVICE_8042_PORT 0x00000027 -+#define FILE_DEVICE_NETWORK_REDIRECTOR 0x00000028 -+#define FILE_DEVICE_BATTERY 0x00000029 -+#define FILE_DEVICE_BUS_EXTENDER 0x0000002A -+#define FILE_DEVICE_MODEM 0x0000002B -+#define FILE_DEVICE_VDM 0x0000002C -+#define FILE_DEVICE_MASS_STORAGE 0x0000002D -+#define FILE_DEVICE_SMB 0x0000002E -+#define FILE_DEVICE_KS 0x0000002F -+#define FILE_DEVICE_CHANGER 0x00000030 -+#define FILE_DEVICE_SMARTCARD 0x00000031 -+#define FILE_DEVICE_ACPI 0x00000032 -+#define FILE_DEVICE_DVD 0x00000033 -+#define FILE_DEVICE_FULLSCREEN_VIDEO 0x00000034 -+#define FILE_DEVICE_DFS_FILE_SYSTEM 0x00000035 -+#define FILE_DEVICE_DFS_VOLUME 0x00000036 -+#define FILE_DEVICE_SERENUM 0x00000037 -+#define FILE_DEVICE_TERMSRV 0x00000038 -+#define FILE_DEVICE_KSEC 0x00000039 -+#define FILE_DEVICE_FIPS 0x0000003A -+ -+/* Device characteristics */ -+ -+#define FILE_REMOVABLE_MEDIA 0x00000001 -+#define FILE_READ_ONLY_DEVICE 0x00000002 -+#define FILE_FLOPPY_DISKETTE 0x00000004 -+#define FILE_WRITE_ONCE_MEDIA 0x00000008 -+#define FILE_REMOTE_DEVICE 0x00000010 -+#define FILE_DEVICE_IS_MOUNTED 0x00000020 -+#define FILE_VIRTUAL_VOLUME 0x00000040 -+#define FILE_AUTOGENERATED_DEVICE_NAME 0x00000080 -+#define FILE_DEVICE_SECURE_OPEN 0x00000100 -+ -+#define FILE_READ_DATA 0x0001 -+#define FILE_WRITE_DATA 0x0002 -+ -+#define FILE_SUPERSEDED 0x00000000 -+#define FILE_OPENED 0x00000001 -+#define FILE_CREATED 0x00000002 -+#define FILE_OVERWRITTEN 0x00000003 -+#define FILE_EXISTS 0x00000004 -+#define FILE_DOES_NOT_EXIST 0x00000005 -+ -+ -+#endif /* WINNT_TYPES_H */ -diff -Nurp linux-5.6.11/3rdparty/ndiswrapper/workqueue.c linux-5.6.11-ndis/3rdparty/ndiswrapper/workqueue.c ---- linux-5.6.11/3rdparty/ndiswrapper/workqueue.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.6.11-ndis/3rdparty/ndiswrapper/workqueue.c 2020-05-03 15:18:33.000000000 +0300 -@@ -0,0 +1,279 @@ -+/* -+ * Copyright (C) 2006 Giridhar Pemmasani -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ */ -+ -+#include "ntoskernel.h" -+ -+struct workqueue_thread { -+ spinlock_t lock; -+ struct task_struct *task; -+ struct completion *completion; -+ char name[16]; -+ int pid; -+ /* whether any work_structs pending? <0 implies quit */ -+ s8 pending; -+ /* list of work_structs pending */ -+ struct list_head work_list; -+}; -+ -+struct workq_thread_data { -+ struct workqueue_struct *workq; -+ int index; -+}; -+ -+struct wrap_workqueue_struct { -+ u8 singlethread; -+ u8 qon; -+ int num_cpus; -+ struct workqueue_thread threads[0]; -+}; -+ -+static void wrap_destroy_wq_on(struct workqueue_struct *workq, int cpu); -+ -+static int workq_thread(void *data) -+{ -+ struct workq_thread_data *thread_data = data; -+ struct workqueue_thread *thread; -+ struct workqueue_struct *workq; -+ struct work_struct *work; -+ -+ workq = thread_data->workq; -+ thread = &workq->threads[thread_data->index]; -+ WORKTRACE("%p, %d, %p", workq, thread_data->index, thread); -+ strncpy(thread->name, current->comm, sizeof(thread->name)); -+ -+ daemonize(thread->name); -+ set_user_nice(current, -5); -+ -+ if (thread->task != current) { -+ WARNING("invalid task: %p, %p", thread->task, current); -+ thread->task = current; -+ } -+ thread->pid = current->pid; -+ complete(xchg(&thread->completion, NULL)); -+ WORKTRACE("%s (%d) started", thread->name, thread->pid); -+ while (1) { -+ if (wait_condition(thread->pending, 0, TASK_INTERRUPTIBLE) < 0) { -+ /* TODO: deal with signal */ -+ WARNING("signal not blocked?"); -+ flush_signals(current); -+ continue; -+ } -+ while (1) { -+ struct list_head *entry; -+ unsigned long flags; -+ -+ spin_lock_irqsave(&thread->lock, flags); -+ if (list_empty(&thread->work_list)) { -+ struct completion *completion; -+ if (thread->pending < 0) { -+ spin_unlock_irqrestore(&thread->lock, -+ flags); -+ goto out; -+ } -+ thread->pending = 0; -+ completion = thread->completion; -+ thread->completion = NULL; -+ spin_unlock_irqrestore(&thread->lock, flags); -+ if (completion) -+ complete(completion); -+ break; -+ } -+ entry = thread->work_list.next; -+ work = list_entry(entry, struct work_struct, list); -+ if (xchg(&work->thread, NULL)) -+ list_del(entry); -+ else -+ work = NULL; -+ spin_unlock_irqrestore(&thread->lock, flags); -+ DBG_BLOCK(4) { -+ WORKTRACE("%p, %p", work, thread); -+ } -+ if (work) -+ work->func(work->data); -+ } -+ } -+ -+out: -+ WORKTRACE("%s exiting", thread->name); -+ thread->pid = 0; -+ return 0; -+} -+ -+static int wrap_queue_work_on(struct workqueue_struct *workq, -+ struct work_struct *work, int cpu) -+{ -+ struct workqueue_thread *thread = &workq->threads[cpu]; -+ unsigned long flags; -+ int ret; -+ -+ assert(thread->pid > 0); -+ DBG_BLOCK(4) { -+ WORKTRACE("%p, %d", workq, cpu); -+ } -+ spin_lock_irqsave(&thread->lock, flags); -+ if (work->thread) -+ ret = 0; -+ else { -+ work->thread = thread; -+ list_add_tail(&work->list, &thread->work_list); -+ thread->pending = 1; -+ wake_up_process(thread->task); -+ ret = 1; -+ } -+ spin_unlock_irqrestore(&thread->lock, flags); -+ return ret; -+} -+ -+int wrap_queue_work(struct workqueue_struct *workq, struct work_struct *work) -+{ -+ if (num_online_cpus() == 1 || workq->singlethread) -+ return wrap_queue_work_on(workq, work, 0); -+ else { -+ typeof(workq->qon) qon; -+ /* work is queued on threads in a round-robin fashion */ -+ do { -+ qon = workq->qon % workq->num_cpus; -+ atomic_inc_var(workq->qon); -+ } while (!workq->threads[qon].pid); -+ return wrap_queue_work_on(workq, work, qon); -+ } -+} -+ -+void wrap_cancel_work(struct work_struct *work) -+{ -+ struct workqueue_thread *thread; -+ unsigned long flags; -+ -+ WORKTRACE("%p", work); -+ if ((thread = xchg(&work->thread, NULL))) { -+ WORKTRACE("%p", thread); -+ spin_lock_irqsave(&thread->lock, flags); -+ list_del(&work->list); -+ spin_unlock_irqrestore(&thread->lock, flags); -+ } -+} -+ -+struct workqueue_struct *wrap_create_wq(const char *name, u8 singlethread, -+ u8 freeze) -+{ -+ struct completion started; -+ struct workqueue_struct *workq; -+ int i, n; -+ -+ if (singlethread) -+ n = 1; -+ else -+ n = num_online_cpus(); -+ workq = kzalloc(sizeof(*workq) + n * sizeof(workq->threads[0]), -+ GFP_KERNEL); -+ if (!workq) { -+ WARNING("couldn't allocate memory"); -+ return NULL; -+ } -+ WORKTRACE("%p", workq); -+ workq->singlethread = singlethread; -+ init_completion(&started); -+ for_each_online_cpu(i) { -+ struct workq_thread_data thread_data; -+ spin_lock_init(&workq->threads[i].lock); -+ INIT_LIST_HEAD(&workq->threads[i].work_list); -+ reinit_completion(&started); -+ workq->threads[i].completion = &started; -+ thread_data.workq = workq; -+ thread_data.index = i; -+ WORKTRACE("%p, %d, %p", workq, i, &workq->threads[i]); -+ workq->threads[i].task = -+ kthread_create(workq_thread, &thread_data, -+ "%s/%d", name, i); -+ if (IS_ERR(workq->threads[i].task)) { -+ int j; -+ for (j = 0; j < i; j++) -+ wrap_destroy_wq_on(workq, j); -+ kfree(workq); -+ WARNING("couldn't start thread %s", name); -+ return NULL; -+ } -+#ifdef PF_NOFREEZE -+ if (!freeze) -+ workq->threads[i].task->flags |= PF_NOFREEZE; -+#endif -+ kthread_bind(workq->threads[i].task, i); -+ workq->num_cpus = max(workq->num_cpus, i); -+ wake_up_process(workq->threads[i].task); -+ wait_for_completion(&started); -+ WORKTRACE("%s, %d: %p, %d", name, i, -+ workq, workq->threads[i].pid); -+ if (singlethread) -+ break; -+ } -+ workq->num_cpus++; -+ return workq; -+} -+ -+static void wrap_flush_wq_on(struct workqueue_struct *workq, int cpu) -+{ -+ struct workqueue_thread *thread = &workq->threads[cpu]; -+ struct completion done; -+ -+ WORKTRACE("%p: %d, %s", workq, cpu, thread->name); -+ init_completion(&done); -+ thread->completion = &done; -+ thread->pending = 1; -+ wake_up_process(thread->task); -+ wait_for_completion(&done); -+ return; -+} -+ -+void wrap_flush_wq(struct workqueue_struct *workq) -+{ -+ int i, n; -+ -+ WORKTRACE("%p", workq); -+ if (workq->singlethread) -+ n = 1; -+ else -+ n = num_online_cpus(); -+ for (i = 0; i < n; i++) -+ wrap_flush_wq_on(workq, i); -+} -+ -+static void wrap_destroy_wq_on(struct workqueue_struct *workq, int cpu) -+{ -+ struct workqueue_thread *thread = &workq->threads[cpu]; -+ -+ WORKTRACE("%p: %d, %s", workq, cpu, thread->name); -+ if (!thread->pid) -+ return; -+ thread->pending = -1; -+ wake_up_process(thread->task); -+ while (thread->pid) { -+ WORKTRACE("%d", thread->pid); -+ schedule(); -+ } -+} -+ -+void wrap_destroy_wq(struct workqueue_struct *workq) -+{ -+ int i, n; -+ -+ WORKTRACE("%p", workq); -+ if (workq->singlethread) -+ n = 1; -+ else -+ n = num_online_cpus(); -+ for (i = 0; i < n; i++) -+ wrap_destroy_wq_on(workq, i); -+ kfree(workq); -+} -diff -Nurp linux-5.6.11/3rdparty/ndiswrapper/wrapmem.c linux-5.6.11-ndis/3rdparty/ndiswrapper/wrapmem.c ---- linux-5.6.11/3rdparty/ndiswrapper/wrapmem.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.6.11-ndis/3rdparty/ndiswrapper/wrapmem.c 2020-05-03 15:18:33.000000000 +0300 -@@ -0,0 +1,366 @@ -+/* -+ * Copyright (C) 2006 Giridhar Pemmasani -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ */ -+ -+#define _WRAPMEM_C_ -+ -+#include "ntoskernel.h" -+#include "wrapmem.h" -+ -+struct slack_alloc_info { -+ struct nt_list list; -+ size_t size; -+}; -+ -+#if ALLOC_DEBUG > 1 -+static struct nt_list allocs; -+#endif -+ -+static struct nt_list slack_allocs; -+static spinlock_t alloc_lock; -+ -+#if ALLOC_DEBUG -+const char *alloc_type_name[ALLOC_TYPE_MAX] = { -+ "kmalloc_atomic", -+ "kmalloc_nonatomic", -+ "vmalloc_atomic", -+ "vmalloc_nonatomic", -+ "kmalloc_slack", -+ "pages" -+}; -+ -+struct alloc_info { -+ enum alloc_type type; -+ size_t size; -+#if ALLOC_DEBUG > 1 -+ struct nt_list list; -+ const char *file; -+ int line; -+ ULONG tag; -+#endif -+}; -+ -+static atomic_t alloc_sizes[ALLOC_TYPE_MAX]; -+#endif -+ -+/* allocate memory and add it to list of allocated pointers; if a -+ * driver doesn't free this memory for any reason (buggy driver or we -+ * allocate space behind driver's back since we need more space than -+ * corresponding Windows structure provides etc.), this gets freed -+ * automatically when module is unloaded -+ */ -+void *slack_kmalloc(size_t size) -+{ -+ struct slack_alloc_info *info; -+ -+ ENTER4("size = %zu", size); -+ info = kmalloc(size + sizeof(*info), irql_gfp()); -+ if (!info) -+ return NULL; -+ info->size = size; -+ spin_lock_bh(&alloc_lock); -+ InsertTailList(&slack_allocs, &info->list); -+ spin_unlock_bh(&alloc_lock); -+#if ALLOC_DEBUG -+ atomic_add(size, &alloc_sizes[ALLOC_TYPE_SLACK]); -+#endif -+ TRACE4("%p, %p", info, info + 1); -+ EXIT4(return info + 1); -+} -+ -+/* free pointer and remove from list of allocated pointers */ -+void slack_kfree(void *ptr) -+{ -+ struct slack_alloc_info *info; -+ -+ ENTER4("%p", ptr); -+ info = ptr - sizeof(*info); -+ spin_lock_bh(&alloc_lock); -+ RemoveEntryList(&info->list); -+ spin_unlock_bh(&alloc_lock); -+#if ALLOC_DEBUG -+ atomic_sub(info->size, &alloc_sizes[ALLOC_TYPE_SLACK]); -+#endif -+ kfree(info); -+ EXIT4(return); -+} -+ -+void *slack_kzalloc(size_t size) -+{ -+ void *ptr = slack_kmalloc(size); -+ if (ptr) -+ memset(ptr, 0, size); -+ return ptr; -+} -+ -+#if ALLOC_DEBUG -+void *wrap_kmalloc(size_t size, gfp_t flags, const char *file, int line) -+{ -+ struct alloc_info *info; -+ -+ info = kmalloc(size + sizeof(*info), flags); -+ if (!info) -+ return NULL; -+ if (flags & GFP_ATOMIC) -+ info->type = ALLOC_TYPE_KMALLOC_ATOMIC; -+ else -+ info->type = ALLOC_TYPE_KMALLOC_NON_ATOMIC; -+ info->size = size; -+ atomic_add(size, &alloc_sizes[info->type]); -+#if ALLOC_DEBUG > 1 -+ info->file = file; -+ info->line = line; -+ info->tag = 0; -+ spin_lock_bh(&alloc_lock); -+ InsertTailList(&allocs, &info->list); -+ spin_unlock_bh(&alloc_lock); -+#endif -+ TRACE4("%p", info + 1); -+ return info + 1; -+} -+ -+void *wrap_kzalloc(size_t size, gfp_t flags, const char *file, int line) -+{ -+ void *ptr = wrap_kmalloc(size, flags, file, line); -+ if (ptr) -+ memset(ptr, 0, size); -+ return ptr; -+} -+ -+void wrap_kfree(void *ptr) -+{ -+ struct alloc_info *info; -+ -+ TRACE4("%p", ptr); -+ if (!ptr) -+ return; -+ info = ptr - sizeof(*info); -+ atomic_sub(info->size, &alloc_sizes[info->type]); -+#if ALLOC_DEBUG > 1 -+ spin_lock_bh(&alloc_lock); -+ RemoveEntryList(&info->list); -+ spin_unlock_bh(&alloc_lock); -+ if (!(info->type == ALLOC_TYPE_KMALLOC_ATOMIC || -+ info->type == ALLOC_TYPE_KMALLOC_NON_ATOMIC)) { -+ WARNING("invalid type: %d", info->type); -+ return; -+ } -+#endif -+ kfree(info); -+} -+ -+void *wrap_vmalloc(unsigned long size, const char *file, int line) -+{ -+ struct alloc_info *info; -+ -+ info = vmalloc(size + sizeof(*info)); -+ if (!info) -+ return NULL; -+ info->type = ALLOC_TYPE_VMALLOC_NON_ATOMIC; -+ info->size = size; -+ atomic_add(size, &alloc_sizes[info->type]); -+#if ALLOC_DEBUG > 1 -+ info->file = file; -+ info->line = line; -+ info->tag = 0; -+ spin_lock_bh(&alloc_lock); -+ InsertTailList(&allocs, &info->list); -+ spin_unlock_bh(&alloc_lock); -+#endif -+ return info + 1; -+} -+ -+void *wrap__vmalloc(unsigned long size, gfp_t gfp_mask, -+ const char *file, int line) -+{ -+ struct alloc_info *info; -+ -+ info = __vmalloc(size + sizeof(*info), gfp_mask); -+ if (!info) -+ return NULL; -+ if (gfp_mask & GFP_ATOMIC) -+ info->type = ALLOC_TYPE_VMALLOC_ATOMIC; -+ else -+ info->type = ALLOC_TYPE_VMALLOC_NON_ATOMIC; -+ info->size = size; -+ atomic_add(size, &alloc_sizes[info->type]); -+#if ALLOC_DEBUG > 1 -+ info->file = file; -+ info->line = line; -+ info->tag = 0; -+ spin_lock_bh(&alloc_lock); -+ InsertTailList(&allocs, &info->list); -+ spin_unlock_bh(&alloc_lock); -+#endif -+ return info + 1; -+} -+ -+void wrap_vfree(void *ptr) -+{ -+ struct alloc_info *info; -+ -+ info = ptr - sizeof(*info); -+ atomic_sub(info->size, &alloc_sizes[info->type]); -+#if ALLOC_DEBUG > 1 -+ spin_lock_bh(&alloc_lock); -+ RemoveEntryList(&info->list); -+ spin_unlock_bh(&alloc_lock); -+ if (!(info->type == ALLOC_TYPE_VMALLOC_ATOMIC || -+ info->type == ALLOC_TYPE_VMALLOC_NON_ATOMIC)) { -+ WARNING("invalid type: %d", info->type); -+ return; -+ } -+#endif -+ vfree(info); -+} -+ -+void *wrap_alloc_pages(gfp_t flags, unsigned int size, -+ const char *file, int line) -+{ -+ struct alloc_info *info; -+ -+ size += sizeof(*info); -+ info = (struct alloc_info *)__get_free_pages(flags, get_order(size)); -+ if (!info) -+ return NULL; -+ info->type = ALLOC_TYPE_PAGES; -+ info->size = size; -+ atomic_add(size, &alloc_sizes[info->type]); -+#if ALLOC_DEBUG > 1 -+ info->file = file; -+ info->line = line; -+ info->tag = 0; -+ spin_lock_bh(&alloc_lock); -+ InsertTailList(&allocs, &info->list); -+ spin_unlock_bh(&alloc_lock); -+#endif -+ return info + 1; -+} -+ -+void wrap_free_pages(unsigned long ptr, int order) -+{ -+ struct alloc_info *info; -+ -+ info = (void *)ptr - sizeof(*info); -+ atomic_sub(info->size, &alloc_sizes[info->type]); -+#if ALLOC_DEBUG > 1 -+ spin_lock_bh(&alloc_lock); -+ RemoveEntryList(&info->list); -+ spin_unlock_bh(&alloc_lock); -+ if (info->type != ALLOC_TYPE_PAGES) { -+ WARNING("invalid type: %d", info->type); -+ return; -+ } -+#endif -+ free_pages((unsigned long)info, get_order(info->size)); -+} -+ -+#if ALLOC_DEBUG > 1 -+void *wrap_ExAllocatePoolWithTag(enum pool_type pool_type, SIZE_T size, -+ ULONG tag, const char *file, int line) -+{ -+ void *addr; -+ struct alloc_info *info; -+ -+ ENTER4("pool_type: %d, size: %zu, tag: %u", pool_type, size, tag); -+ addr = (ExAllocatePoolWithTag)(pool_type, size, tag); -+ if (!addr) -+ return NULL; -+ info = addr - sizeof(*info); -+ info->file = file; -+ info->line = line; -+ info->tag = tag; -+ EXIT4(return addr); -+} -+#endif -+ -+int alloc_size(enum alloc_type type) -+{ -+ if ((int)type >= 0 && type < ALLOC_TYPE_MAX) -+ return atomic_read(&alloc_sizes[type]); -+ else -+ return -EINVAL; -+} -+ -+#endif // ALLOC_DEBUG -+ -+int wrapmem_init(void) -+{ -+#if ALLOC_DEBUG > 1 -+ InitializeListHead(&allocs); -+#endif -+ InitializeListHead(&slack_allocs); -+ spin_lock_init(&alloc_lock); -+ return 0; -+} -+ -+void wrapmem_exit(void) -+{ -+#if ALLOC_DEBUG -+ enum alloc_type type; -+#endif -+ struct nt_list *ent; -+ -+ /* free all pointers on the slack list */ -+ while (1) { -+ struct slack_alloc_info *info; -+ spin_lock_bh(&alloc_lock); -+ ent = RemoveHeadList(&slack_allocs); -+ spin_unlock_bh(&alloc_lock); -+ if (!ent) -+ break; -+ info = container_of(ent, struct slack_alloc_info, list); -+#if ALLOC_DEBUG -+ atomic_sub(info->size, &alloc_sizes[ALLOC_TYPE_SLACK]); -+#endif -+ kfree(info); -+ } -+#if ALLOC_DEBUG -+ for (type = 0; type < ALLOC_TYPE_MAX; type++) { -+ int n = atomic_read(&alloc_sizes[type]); -+ if (n) -+ WARNING("%d bytes of memory in %s leaking", n, -+ alloc_type_name[type]); -+ } -+ -+#if ALLOC_DEBUG > 1 -+ while (1) { -+ struct alloc_info *info; -+ -+ spin_lock_bh(&alloc_lock); -+ ent = RemoveHeadList(&allocs); -+ spin_unlock_bh(&alloc_lock); -+ if (!ent) -+ break; -+ info = container_of(ent, struct alloc_info, list); -+ atomic_sub(info->size, &alloc_sizes[ALLOC_TYPE_SLACK]); -+ printk(KERN_DEBUG DRIVER_NAME -+ ": %s:%d leaked %zd bytes at %p (%s, tag 0x%08X)\n", -+ info->file, info->line, info->size, info + 1, -+ alloc_type_name[info->type], info->tag); -+ if (info->type == ALLOC_TYPE_KMALLOC_ATOMIC || -+ info->type == ALLOC_TYPE_KMALLOC_NON_ATOMIC) -+ kfree(info); -+ else if (info->type == ALLOC_TYPE_VMALLOC_ATOMIC || -+ info->type == ALLOC_TYPE_VMALLOC_NON_ATOMIC) -+ vfree(info); -+ else if (info->type == ALLOC_TYPE_PAGES) -+ free_pages((unsigned long)info, get_order(info->size)); -+ else -+ WARNING("invalid type: %d; not freed", info->type); -+ } -+#endif -+#endif -+ return; -+} -diff -Nurp linux-5.6.11/3rdparty/ndiswrapper/wrapmem.h linux-5.6.11-ndis/3rdparty/ndiswrapper/wrapmem.h ---- linux-5.6.11/3rdparty/ndiswrapper/wrapmem.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.6.11-ndis/3rdparty/ndiswrapper/wrapmem.h 2020-05-03 15:18:33.000000000 +0300 -@@ -0,0 +1,97 @@ -+/* -+ * Copyright (C) 2006 Giridhar Pemmasani -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ */ -+ -+#ifndef _WRAPMEM_H_ -+#define _WRAPMEM_H_ -+ -+/* -+ * Set ALLOC_DEBUG to 1 to show information about memory used by both -+ * ndiswrapper and Windows driver in /proc/net/ndiswrapper/debug -+ * This will also show memory leaks (memory allocated but not freed) when -+ * ndiswrapper module is unloaded. -+ * -+ * Set ALLOC_DEBUG to 2 to see details about every leaking allocation. -+*/ -+ -+#ifndef ALLOC_DEBUG -+#define ALLOC_DEBUG 0 -+#endif -+ -+int wrapmem_init(void); -+void wrapmem_exit(void); -+void *slack_kmalloc(size_t size); -+void *slack_kzalloc(size_t size); -+void slack_kfree(void *ptr); -+ -+#if ALLOC_DEBUG -+enum alloc_type { ALLOC_TYPE_KMALLOC_ATOMIC, -+ ALLOC_TYPE_KMALLOC_NON_ATOMIC, -+ ALLOC_TYPE_VMALLOC_ATOMIC, ALLOC_TYPE_VMALLOC_NON_ATOMIC, -+ ALLOC_TYPE_SLACK, ALLOC_TYPE_PAGES, ALLOC_TYPE_MAX }; -+ -+extern const char *alloc_type_name[ALLOC_TYPE_MAX]; -+ -+void *wrap_kmalloc(size_t size, gfp_t flags, const char *file, int line); -+void *wrap_kzalloc(size_t size, gfp_t flags, const char *file, int line); -+void wrap_kfree(void *ptr); -+void *wrap_vmalloc(unsigned long size, const char *file, int line); -+void *wrap__vmalloc(unsigned long size, gfp_t flags, -+ const char *file, int line); -+void wrap_vfree(void *ptr); -+void *wrap_alloc_pages(gfp_t flags, unsigned int size, -+ const char *file, int line); -+void wrap_free_pages(unsigned long ptr, int order); -+int alloc_size(enum alloc_type type); -+ -+#if ALLOC_DEBUG > 1 -+void *wrap_ExAllocatePoolWithTag(enum pool_type pool_type, SIZE_T size, -+ ULONG tag, const char *file, int line); -+#define ExAllocatePoolWithTag(pool_type, size, tag) \ -+ wrap_ExAllocatePoolWithTag(pool_type, size, tag, __FILE__, __LINE__) -+#endif -+ -+#ifndef _WRAPMEM_C_ -+#undef kmalloc -+#undef kzalloc -+#undef kfree -+#undef vmalloc -+#undef __vmalloc -+#undef vfree -+#define kmalloc(size, flags) \ -+ wrap_kmalloc(size, flags, __FILE__, __LINE__) -+#define kzalloc(size, flags) \ -+ wrap_kzalloc(size, flags, __FILE__, __LINE__) -+#define vmalloc(size) \ -+ wrap_vmalloc(size, __FILE__, __LINE__) -+#define __vmalloc(size, flags) \ -+ wrap__vmalloc(size, flags, __FILE__, __LINE__) -+#define kfree(ptr) wrap_kfree(ptr) -+#define vfree(ptr) wrap_vfree(ptr) -+ -+#define wrap_get_free_pages(flags, size) \ -+ wrap_alloc_pages(flags, size, __FILE__, __LINE__) -+#undef free_pages -+#define free_pages(ptr, order) wrap_free_pages(ptr, order) -+ -+#endif // _WRAPMEM_C_ -+ -+#else -+ -+#define wrap_get_free_pages(flags, size) \ -+ (void *)__get_free_pages(flags, get_order(size)) -+ -+#endif // ALLOC_DEBUG -+ -+#endif -diff -Nurp linux-5.6.11/3rdparty/ndiswrapper/wrapndis.c linux-5.6.11-ndis/3rdparty/ndiswrapper/wrapndis.c ---- linux-5.6.11/3rdparty/ndiswrapper/wrapndis.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.6.11-ndis/3rdparty/ndiswrapper/wrapndis.c 2020-05-03 15:18:33.000000000 +0300 -@@ -0,0 +1,2223 @@ -+/* -+ * Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ */ -+ -+#include -+#include -+#include -+#include -+#include "ndis.h" -+#include "iw_ndis.h" -+#include "pnp.h" -+#include "loader.h" -+#include "wrapndis.h" -+#include "wrapper.h" -+ -+/* Functions callable from the NDIS driver */ -+wstdcall NTSTATUS NdisDispatchDeviceControl(struct device_object *fdo, -+ struct irp *irp); -+wstdcall NTSTATUS NdisDispatchPnp(struct device_object *fdo, struct irp *irp); -+wstdcall NTSTATUS NdisDispatchPower(struct device_object *fdo, struct irp *irp); -+ -+struct workqueue_struct *wrapndis_wq; -+ -+static int set_packet_filter(struct ndis_device *wnd, -+ ULONG packet_filter); -+static void add_iw_stats_timer(struct ndis_device *wnd); -+static void del_iw_stats_timer(struct ndis_device *wnd); -+static NDIS_STATUS ndis_start_device(struct ndis_device *wnd); -+static int ndis_remove_device(struct ndis_device *wnd); -+static void set_multicast_list(struct ndis_device *wnd); -+static int ndis_net_dev_open(struct net_device *net_dev); -+static int ndis_net_dev_close(struct net_device *net_dev); -+ -+/* MiniportReset */ -+NDIS_STATUS mp_reset(struct ndis_device *wnd) -+{ -+ NDIS_STATUS res; -+ struct miniport *mp; -+ BOOLEAN reset_address; -+ KIRQL irql; -+ -+ ENTER2("wnd: %p", wnd); -+ mutex_lock(&wnd->tx_ring_mutex); -+ mutex_lock(&wnd->ndis_req_mutex); -+ mp = &wnd->wd->driver->ndis_driver->mp; -+ prepare_wait_condition(wnd->ndis_req_task, wnd->ndis_req_done, 0); -+ WARNING("%s is being reset", wnd->net_dev->name); -+ irql = serialize_lock_irql(wnd); -+ assert_irql(_irql_ == DISPATCH_LEVEL); -+ res = LIN2WIN2(mp->reset, &reset_address, wnd->nmb->mp_ctx); -+ serialize_unlock_irql(wnd, irql); -+ -+ TRACE2("%08X, %08X", res, reset_address); -+ if (res == NDIS_STATUS_PENDING) { -+ /* wait for NdisMResetComplete */ -+ if (wait_condition((wnd->ndis_req_done > 0), 0, -+ TASK_INTERRUPTIBLE) < 0) -+ res = NDIS_STATUS_FAILURE; -+ else { -+ res = wnd->ndis_req_status; -+ reset_address = wnd->ndis_req_done - 1; -+ } -+ TRACE2("%08X, %08X", res, reset_address); -+ } -+ mutex_unlock(&wnd->ndis_req_mutex); -+ if (res == NDIS_STATUS_SUCCESS && reset_address) { -+ set_packet_filter(wnd, wnd->packet_filter); -+ set_multicast_list(wnd); -+ } -+ mutex_unlock(&wnd->tx_ring_mutex); -+ EXIT3(return res); -+} -+ -+/* MiniportRequest(Query/Set)Information */ -+NDIS_STATUS mp_request(enum ndis_request_type request, -+ struct ndis_device *wnd, ndis_oid oid, -+ void *buf, ULONG buflen, ULONG *written, ULONG *needed) -+{ -+ NDIS_STATUS res; -+ ULONG w, n; -+ struct miniport *mp; -+ KIRQL irql; -+ -+ mutex_lock(&wnd->ndis_req_mutex); -+ if (!written) -+ written = &w; -+ if (!needed) -+ needed = &n; -+ mp = &wnd->wd->driver->ndis_driver->mp; -+ prepare_wait_condition(wnd->ndis_req_task, wnd->ndis_req_done, 0); -+ irql = serialize_lock_irql(wnd); -+ assert_irql(_irql_ == DISPATCH_LEVEL); -+ switch (request) { -+ case NdisRequestQueryInformation: -+ TRACE2("%p, %08X, %p", mp->queryinfo, oid, wnd->nmb->mp_ctx); -+ res = LIN2WIN6(mp->queryinfo, wnd->nmb->mp_ctx, oid, buf, -+ buflen, written, needed); -+ break; -+ case NdisRequestSetInformation: -+ TRACE2("%p, %08X, %p", mp->setinfo, oid, wnd->nmb->mp_ctx); -+ res = LIN2WIN6(mp->setinfo, wnd->nmb->mp_ctx, oid, buf, -+ buflen, written, needed); -+ break; -+ default: -+ WARNING("invalid request %d, %08X", request, oid); -+ res = NDIS_STATUS_NOT_SUPPORTED; -+ break; -+ } -+ serialize_unlock_irql(wnd, irql); -+ TRACE2("%08X, %08X", res, oid); -+ if (res == NDIS_STATUS_PENDING) { -+ /* wait for NdisMQueryInformationComplete */ -+ if (wait_condition((wnd->ndis_req_done > 0), 0, -+ TASK_INTERRUPTIBLE) < 0) -+ res = NDIS_STATUS_FAILURE; -+ else -+ res = wnd->ndis_req_status; -+ TRACE2("%08X, %08X", res, oid); -+ } -+ mutex_unlock(&wnd->ndis_req_mutex); -+ DBG_BLOCK(2) { -+ if (res || needed) -+ TRACE2("%08X, %d, %d, %d", res, buflen, *written, -+ *needed); -+ } -+ EXIT3(return res); -+} -+ -+/* MiniportPnPEventNotify */ -+static NDIS_STATUS mp_pnp_event(struct ndis_device *wnd, -+ enum ndis_device_pnp_event event, -+ ULONG power_profile) -+{ -+ struct miniport *mp; -+ -+ ENTER1("%p, %d", wnd, event); -+ mp = &wnd->wd->driver->ndis_driver->mp; -+ if (!mp->pnp_event_notify) { -+ TRACE1("Windows driver %s doesn't support " -+ "MiniportPnpEventNotify", wnd->wd->driver->name); -+ return NDIS_STATUS_FAILURE; -+ } -+ /* RNDIS driver doesn't like to be notified if device is -+ * already halted */ -+ if (!test_bit(HW_INITIALIZED, &wnd->wd->hw_status)) -+ EXIT1(return NDIS_STATUS_SUCCESS); -+ switch (event) { -+ case NdisDevicePnPEventSurpriseRemoved: -+ TRACE1("%u, %p", -+ (wnd->attributes & NDIS_ATTRIBUTE_SURPRISE_REMOVE_OK), -+ mp->pnp_event_notify); -+ if ((wnd->attributes & NDIS_ATTRIBUTE_SURPRISE_REMOVE_OK) && -+ !test_bit(HW_DISABLED, &wnd->wd->hw_status) && -+ mp->pnp_event_notify) { -+ TRACE1("calling surprise_removed"); -+ LIN2WIN4(mp->pnp_event_notify, wnd->nmb->mp_ctx, -+ NdisDevicePnPEventSurpriseRemoved, NULL, 0); -+ } else -+ TRACE1("Windows driver %s doesn't support " -+ "MiniportPnpEventNotify for safe unplugging", -+ wnd->wd->driver->name); -+ return NDIS_STATUS_SUCCESS; -+ case NdisDevicePnPEventPowerProfileChanged: -+ if (power_profile) -+ power_profile = NdisPowerProfileAcOnLine; -+ LIN2WIN4(mp->pnp_event_notify, wnd->nmb->mp_ctx, -+ NdisDevicePnPEventPowerProfileChanged, -+ &power_profile, sizeof(power_profile)); -+ return NDIS_STATUS_SUCCESS; -+ default: -+ WARNING("event %d not yet implemented", event); -+ return NDIS_STATUS_SUCCESS; -+ } -+} -+ -+/* MiniportInitialize */ -+static NDIS_STATUS mp_init(struct ndis_device *wnd) -+{ -+ NDIS_STATUS error_status, status; -+ UINT medium_index; -+ enum ndis_medium medium_array[] = {NdisMedium802_3}; -+ struct miniport *mp; -+ -+ ENTER1("irql: %d", current_irql()); -+ if (test_bit(HW_INITIALIZED, &wnd->wd->hw_status)) { -+ WARNING("device %p already initialized!", wnd); -+ return NDIS_STATUS_FAILURE; -+ } -+ -+ if (!wnd->wd->driver->ndis_driver || -+ !wnd->wd->driver->ndis_driver->mp.init) { -+ WARNING("assuming WDM (non-NDIS) driver"); -+ EXIT1(return NDIS_STATUS_NOT_RECOGNIZED); -+ } -+ mp = &wnd->wd->driver->ndis_driver->mp; -+ status = LIN2WIN6(mp->init, &error_status, &medium_index, medium_array, -+ ARRAY_SIZE(medium_array), wnd->nmb, wnd->nmb); -+ TRACE1("init returns: %08X, irql: %d", status, current_irql()); -+ if (status != NDIS_STATUS_SUCCESS) { -+ WARNING("couldn't initialize device: %08X", status); -+ EXIT1(return NDIS_STATUS_FAILURE); -+ } -+ -+ /* Wait a little to let card power up otherwise ifup might -+ * fail after boot */ -+ sleep_hz(HZ / 5); -+ status = mp_pnp_event(wnd, NdisDevicePnPEventPowerProfileChanged, -+ NdisPowerProfileAcOnLine); -+ if (status != NDIS_STATUS_SUCCESS) -+ TRACE1("setting power failed: %08X", status); -+ set_bit(HW_INITIALIZED, &wnd->wd->hw_status); -+ /* the description about NDIS_ATTRIBUTE_NO_HALT_ON_SUSPEND is -+ * misleading/confusing */ -+ status = mp_query(wnd, OID_PNP_CAPABILITIES, -+ &wnd->pnp_capa, sizeof(wnd->pnp_capa)); -+ if (status == NDIS_STATUS_SUCCESS) { -+ TRACE1("%d, %d", wnd->pnp_capa.wakeup.min_magic_packet_wakeup, -+ wnd->pnp_capa.wakeup.min_pattern_wakeup); -+ wnd->attributes |= NDIS_ATTRIBUTE_NO_HALT_ON_SUSPEND; -+ status = mp_query_int(wnd, OID_PNP_ENABLE_WAKE_UP, -+ &wnd->ndis_wolopts); -+ TRACE1("%08X, %x", status, wnd->ndis_wolopts); -+ } else if (status == NDIS_STATUS_NOT_SUPPORTED) -+ wnd->attributes &= ~NDIS_ATTRIBUTE_NO_HALT_ON_SUSPEND; -+ TRACE1("%d", wnd->pnp_capa.wakeup.min_magic_packet_wakeup); -+ /* although some NDIS drivers support suspend, Linux kernel -+ * has issues with suspending USB devices */ -+ if (wrap_is_usb_bus(wnd->wd->dev_bus)) { -+ wnd->attributes &= ~NDIS_ATTRIBUTE_NO_HALT_ON_SUSPEND; -+ wnd->ndis_wolopts = 0; -+ } -+ mp_set_int(wnd, OID_802_11_POWER_MODE, NDIS_POWER_OFF); -+ EXIT1(return NDIS_STATUS_SUCCESS); -+} -+ -+/* MiniportHalt */ -+static void mp_halt(struct ndis_device *wnd) -+{ -+ struct miniport *mp; -+ -+ ENTER1("%p", wnd); -+ if (!test_and_clear_bit(HW_INITIALIZED, &wnd->wd->hw_status)) { -+ WARNING("device %p is not initialized - not halting", wnd); -+ return; -+ } -+ hangcheck_del(wnd); -+ del_iw_stats_timer(wnd); -+#ifdef CONFIG_WIRELESS_EXT -+ if (wnd->physical_medium == NdisPhysicalMediumWirelessLan && -+ wrap_is_pci_bus(wnd->wd->dev_bus)) { -+ mutex_unlock(&wnd->ndis_req_mutex); -+ disassociate(wnd, 0); -+ mutex_lock(&wnd->ndis_req_mutex); -+ } -+#endif -+ mp = &wnd->wd->driver->ndis_driver->mp; -+ TRACE1("halt: %p", mp->mp_halt); -+ LIN2WIN1(mp->mp_halt, wnd->nmb->mp_ctx); -+ /* if a driver doesn't call NdisMDeregisterInterrupt during -+ * halt, deregister it now */ -+ if (wnd->mp_interrupt) -+ NdisMDeregisterInterrupt(wnd->mp_interrupt); -+ /* cancel any timers left by buggy windows driver; also free -+ * the memory for timers */ -+ while (1) { -+ struct nt_slist *slist; -+ struct wrap_timer *wrap_timer; -+ -+ spin_lock_bh(&ntoskernel_lock); -+ if ((slist = wnd->wrap_timer_slist.next)) -+ wnd->wrap_timer_slist.next = slist->next; -+ spin_unlock_bh(&ntoskernel_lock); -+ TIMERTRACE("%p", slist); -+ if (!slist) -+ break; -+ wrap_timer = container_of(slist, struct wrap_timer, slist); -+ wrap_timer->repeat = 0; -+ /* ktimer that this wrap_timer is associated to can't -+ * be touched, as it may have been freed by the driver -+ * already */ -+ if (del_timer_sync(&wrap_timer->timer)) -+ WARNING("Buggy Windows driver left timer %p " -+ "running", wrap_timer->nt_timer); -+ memset(wrap_timer, 0, sizeof(*wrap_timer)); -+ kfree(wrap_timer); -+ } -+ EXIT1(return); -+} -+ -+static NDIS_STATUS mp_set_power_state(struct ndis_device *wnd, -+ enum ndis_power_state state) -+{ -+ NDIS_STATUS status; -+ -+ TRACE1("%d", state); -+ if (state == NdisDeviceStateD0) { -+ status = NDIS_STATUS_SUCCESS; -+ mutex_unlock(&wnd->ndis_req_mutex); -+ if (test_and_clear_bit(HW_HALTED, &wnd->wd->hw_status)) { -+ status = mp_init(wnd); -+ if (status == NDIS_STATUS_SUCCESS) { -+ set_packet_filter(wnd, wnd->packet_filter); -+ set_multicast_list(wnd); -+ } -+ } else if (test_and_clear_bit(HW_SUSPENDED, -+ &wnd->wd->hw_status)) { -+ status = mp_set_int(wnd, OID_PNP_SET_POWER, state); -+ if (status != NDIS_STATUS_SUCCESS) -+ WARNING("%s: setting power to state %d failed? " -+ "%08X", wnd->net_dev->name, state, -+ status); -+ } else -+ return NDIS_STATUS_FAILURE; -+ -+ if (wrap_is_pci_bus(wnd->wd->dev_bus)) { -+ pci_enable_wake(wnd->wd->pci.pdev, PCI_D3hot, 0); -+ pci_enable_wake(wnd->wd->pci.pdev, PCI_D3cold, 0); -+ } -+ if (status == NDIS_STATUS_SUCCESS) { -+ mutex_unlock(&wnd->tx_ring_mutex); -+ netif_device_attach(wnd->net_dev); -+ hangcheck_add(wnd); -+ add_iw_stats_timer(wnd); -+ } else -+ WARNING("%s: couldn't set power to state %d; device not" -+ " resumed", wnd->net_dev->name, state); -+ EXIT1(return status); -+ } else { -+ mutex_lock(&wnd->tx_ring_mutex); -+ netif_device_detach(wnd->net_dev); -+ hangcheck_del(wnd); -+ del_iw_stats_timer(wnd); -+ status = NDIS_STATUS_NOT_SUPPORTED; -+ if (wnd->attributes & NDIS_ATTRIBUTE_NO_HALT_ON_SUSPEND) { -+ status = mp_set_int(wnd, OID_PNP_ENABLE_WAKE_UP, -+ wnd->ndis_wolopts); -+ TRACE2("0x%x, 0x%x", status, wnd->ndis_wolopts); -+ if (status == NDIS_STATUS_SUCCESS && -+ wrap_is_pci_bus(wnd->wd->dev_bus)) { -+ if (wnd->ndis_wolopts) -+ wnd->wd->pci.wake_state = -+ PowerDeviceD3; -+ else -+ wnd->wd->pci.wake_state = -+ PowerDeviceUnspecified; -+ } else -+ WARNING("couldn't set wake-on-lan options: " -+ "0x%x, %08X", wnd->ndis_wolopts, status); -+ status = mp_set_int(wnd, OID_PNP_SET_POWER, state); -+ if (status == NDIS_STATUS_SUCCESS) -+ set_bit(HW_SUSPENDED, &wnd->wd->hw_status); -+ else -+ WARNING("suspend failed: %08X", status); -+ } -+ if (status != NDIS_STATUS_SUCCESS) { -+ WARNING("%s does not support power management; " -+ "halting the device", wnd->net_dev->name); -+ mp_halt(wnd); -+ set_bit(HW_HALTED, &wnd->wd->hw_status); -+ status = STATUS_SUCCESS; -+ } -+ mutex_lock(&wnd->ndis_req_mutex); -+ EXIT1(return status); -+ } -+} -+ -+static int ndis_set_mac_address(struct net_device *dev, void *p) -+{ -+ struct ndis_device *wnd = netdev_priv(dev); -+ struct sockaddr *addr = p; -+ struct ndis_configuration_parameter param; -+ struct unicode_string key; -+ struct ansi_string ansi; -+ NDIS_STATUS res; -+ unsigned char mac_string[2 * ETH_ALEN + 1]; -+ mac_address mac; -+ -+ memcpy(mac, addr->sa_data, sizeof(mac)); -+ memset(mac_string, 0, sizeof(mac_string)); -+ res = snprintf(mac_string, sizeof(mac_string), MACSTR, MAC2STR(mac)); -+ if (res != (sizeof(mac_string) - 1)) -+ EXIT1(return -EINVAL); -+ TRACE1("new mac: %s", mac_string); -+ -+ RtlInitAnsiString(&ansi, mac_string); -+ if (RtlAnsiStringToUnicodeString(¶m.data.string, &ansi, -+ TRUE) != STATUS_SUCCESS) -+ EXIT1(return -EINVAL); -+ -+ param.type = NdisParameterString; -+ RtlInitAnsiString(&ansi, "NetworkAddress"); -+ if (RtlAnsiStringToUnicodeString(&key, &ansi, TRUE) != STATUS_SUCCESS) { -+ RtlFreeUnicodeString(¶m.data.string); -+ EXIT1(return -EINVAL); -+ } -+ NdisWriteConfiguration(&res, wnd->nmb, &key, ¶m); -+ RtlFreeUnicodeString(&key); -+ RtlFreeUnicodeString(¶m.data.string); -+ -+ if (res != NDIS_STATUS_SUCCESS) -+ EXIT1(return -EFAULT); -+ if (ndis_reinit(wnd) == NDIS_STATUS_SUCCESS) { -+ res = mp_query(wnd, OID_802_3_CURRENT_ADDRESS, -+ mac, sizeof(mac)); -+ if (res == NDIS_STATUS_SUCCESS) { -+ TRACE1("mac:" MACSTRSEP, MAC2STR(mac)); -+ memcpy(dev->dev_addr, mac, sizeof(mac)); -+ } else -+ ERROR("couldn't get mac address: %08X", res); -+ } -+ EXIT1(return 0); -+} -+ -+static int setup_tx_sg_list(struct ndis_device *wnd, struct sk_buff *skb, -+ struct ndis_packet_oob_data *oob_data) -+{ -+ struct ndis_sg_element *sg_element; -+ struct ndis_sg_list *sg_list; -+ int i; -+ -+ ENTER3("%p, %d", skb, skb_shinfo(skb)->nr_frags); -+ if (skb_shinfo(skb)->nr_frags <= 1) { -+ sg_element = &oob_data->wrap_tx_sg_list.elements[0]; -+ sg_element->address = -+ PCI_DMA_MAP_SINGLE(wnd->wd->pci.pdev, skb->data, -+ skb->len, PCI_DMA_TODEVICE); -+ sg_element->length = skb->len; -+ oob_data->wrap_tx_sg_list.nent = 1; -+ oob_data->ext.info[ScatterGatherListPacketInfo] = -+ &oob_data->wrap_tx_sg_list; -+ TRACE3("%llx, %u", sg_element->address, sg_element->length); -+ return 0; -+ } -+ sg_list = kmalloc(sizeof(*sg_list) + -+ (skb_shinfo(skb)->nr_frags + 1) * sizeof(*sg_element), -+ GFP_ATOMIC); -+ if (!sg_list) -+ return -ENOMEM; -+ sg_list->nent = skb_shinfo(skb)->nr_frags + 1; -+ TRACE3("%p, %d", sg_list, sg_list->nent); -+ sg_element = sg_list->elements; -+ sg_element->length = skb_headlen(skb); -+ sg_element->address = -+ PCI_DMA_MAP_SINGLE(wnd->wd->pci.pdev, skb->data, -+ skb_headlen(skb), PCI_DMA_TODEVICE); -+ for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { -+ skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; -+ sg_element++; -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,4,0) -+ sg_element->length = skb_frag_size(frag); -+#else -+ sg_element->length = frag->size; -+#endif -+ sg_element->address = -+ pci_map_page(wnd->wd->pci.pdev, skb_frag_page(frag), -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,4,0) -+ skb_frag_off(frag), skb_frag_size(frag), -+#else -+ frag->page_offset, frag->size, -+#endif -+ PCI_DMA_TODEVICE); -+ TRACE3("%llx, %u", sg_element->address, sg_element->length); -+ } -+ oob_data->ext.info[ScatterGatherListPacketInfo] = sg_list; -+ return 0; -+} -+ -+static void free_tx_sg_list(struct ndis_device *wnd, -+ struct ndis_packet_oob_data *oob_data) -+{ -+ int i; -+ struct ndis_sg_element *sg_element; -+ struct ndis_sg_list *sg_list = -+ oob_data->ext.info[ScatterGatherListPacketInfo]; -+ sg_element = sg_list->elements; -+ TRACE3("%p, %d", sg_list, sg_list->nent); -+ PCI_DMA_UNMAP_SINGLE(wnd->wd->pci.pdev, sg_element->address, -+ sg_element->length, PCI_DMA_TODEVICE); -+ if (sg_list->nent == 1) -+ EXIT3(return); -+ for (i = 1; i < sg_list->nent; i++, sg_element++) { -+ TRACE3("%llx, %u", sg_element->address, sg_element->length); -+ pci_unmap_page(wnd->wd->pci.pdev, sg_element->address, -+ sg_element->length, PCI_DMA_TODEVICE); -+ } -+ TRACE3("%p", sg_list); -+ kfree(sg_list); -+} -+ -+static struct ndis_packet *alloc_tx_packet(struct ndis_device *wnd, -+ struct sk_buff *skb) -+{ -+ struct ndis_packet *packet; -+ ndis_buffer *buffer; -+ struct ndis_packet_oob_data *oob_data; -+ NDIS_STATUS status; -+ -+ NdisAllocatePacket(&status, &packet, wnd->tx_packet_pool); -+ if (status != NDIS_STATUS_SUCCESS) -+ return NULL; -+ NdisAllocateBuffer(&status, &buffer, wnd->tx_buffer_pool, -+ skb->data, skb->len); -+ if (status != NDIS_STATUS_SUCCESS) { -+ NdisFreePacket(packet); -+ return NULL; -+ } -+ packet->private.buffer_head = buffer; -+ packet->private.buffer_tail = buffer; -+ -+ oob_data = NDIS_PACKET_OOB_DATA(packet); -+ oob_data->tx_skb = skb; -+ if (wnd->sg_dma_size) { -+ if (setup_tx_sg_list(wnd, skb, oob_data)) { -+ NdisFreeBuffer(buffer); -+ NdisFreePacket(packet); -+ return NULL; -+ } -+ } -+ if (skb->ip_summed == CHECKSUM_PARTIAL) { -+ struct ndis_tcp_ip_checksum_packet_info csum; -+ int protocol; -+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,21) -+ protocol = ntohs(skb->protocol); -+#else -+ protocol = skb->nh.iph->protocol; -+#endif -+ csum.value = 0; -+ csum.tx.v4 = 1; -+ if (protocol == IPPROTO_TCP) -+ csum.tx.tcp = 1; -+ else if (protocol == IPPROTO_UDP) -+ csum.tx.udp = 1; -+// csum->tx.ip = 1; -+ packet->private.flags |= NDIS_PROTOCOL_ID_TCP_IP; -+ oob_data->ext.info[TcpIpChecksumPacketInfo] = -+ (void *)(ULONG_PTR)csum.value; -+ } -+ DBG_BLOCK(4) { -+ dump_bytes(__func__, skb->data, skb->len); -+ } -+ TRACE4("%p, %p, %p", packet, buffer, skb); -+ return packet; -+} -+ -+void free_tx_packet(struct ndis_device *wnd, struct ndis_packet *packet, -+ NDIS_STATUS status) -+{ -+ ndis_buffer *buffer; -+ struct ndis_packet_oob_data *oob_data; -+ struct sk_buff *skb; -+ struct ndis_packet_pool *pool; -+ -+ assert_irql(_irql_ <= DISPATCH_LEVEL); -+ assert(packet->private.packet_flags); -+ oob_data = NDIS_PACKET_OOB_DATA(packet); -+ skb = oob_data->tx_skb; -+ buffer = packet->private.buffer_head; -+ TRACE4("%p, %p, %p, %08X", packet, buffer, skb, status); -+ if (status == NDIS_STATUS_SUCCESS) { -+ pre_atomic_add(wnd->net_stats.tx_bytes, packet->private.len); -+ atomic_inc_var(wnd->net_stats.tx_packets); -+ } else { -+ TRACE1("packet dropped: %08X", status); -+ atomic_inc_var(wnd->net_stats.tx_dropped); -+ } -+ if (wnd->sg_dma_size) -+ free_tx_sg_list(wnd, oob_data); -+ NdisFreeBuffer(buffer); -+ dev_kfree_skb_any(skb); -+ pool = packet->private.pool; -+ NdisFreePacket(packet); -+ if (netif_queue_stopped(wnd->net_dev) && -+ ((pool->max_descr - pool->num_used_descr) >= -+ (wnd->max_tx_packets / 4))) { -+ set_bit(NETIF_WAKEQ, &wnd->ndis_pending_work); -+ queue_work(wrapndis_wq, &wnd->ndis_work); -+ } -+ EXIT4(return); -+} -+ -+/* MiniportSend and MiniportSendPackets */ -+/* this function is called holding tx_ring_mutex. start and n are such -+ * that start + n < TX_RING_SIZE; i.e., packets don't wrap around -+ * ring */ -+static u8 mp_tx_packets(struct ndis_device *wnd, u8 start, u8 n) -+{ -+ NDIS_STATUS res; -+ struct miniport *mp; -+ struct ndis_packet *packet; -+ u8 sent; -+ KIRQL irql; -+ -+ ENTER3("%d, %d", start, n); -+ mp = &wnd->wd->driver->ndis_driver->mp; -+ if (mp->send_packets) { -+ if (deserialized_driver(wnd)) { -+ LIN2WIN3(mp->send_packets, wnd->nmb->mp_ctx, -+ &wnd->tx_ring[start], n); -+ sent = n; -+ } else { -+ irql = serialize_lock_irql(wnd); -+ LIN2WIN3(mp->send_packets, wnd->nmb->mp_ctx, -+ &wnd->tx_ring[start], n); -+ serialize_unlock_irql(wnd, irql); -+ for (sent = 0; sent < n && wnd->tx_ok; sent++) { -+ struct ndis_packet_oob_data *oob_data; -+ packet = wnd->tx_ring[start + sent]; -+ oob_data = NDIS_PACKET_OOB_DATA(packet); -+ switch ((res = -+ xchg(&oob_data->status, -+ NDIS_STATUS_NOT_RECOGNIZED))) { -+ case NDIS_STATUS_SUCCESS: -+ free_tx_packet(wnd, packet, -+ NDIS_STATUS_SUCCESS); -+ break; -+ case NDIS_STATUS_PENDING: -+ break; -+ case NDIS_STATUS_RESOURCES: -+ wnd->tx_ok = 0; -+ /* resubmit this packet and -+ * the rest when resources -+ * become available */ -+ sent--; -+ break; -+ case NDIS_STATUS_FAILURE: -+ free_tx_packet(wnd, packet, -+ NDIS_STATUS_FAILURE); -+ break; -+ default: -+ ERROR("%p: invalid status: %08X", -+ packet, res); -+ free_tx_packet(wnd, packet, -+ oob_data->status); -+ break; -+ } -+ TRACE3("%p, %d", packet, res); -+ } -+ } -+ TRACE3("sent: %d(%d)", sent, n); -+ } else { -+ for (sent = 0; sent < n && wnd->tx_ok; sent++) { -+ struct ndis_packet_oob_data *oob_data; -+ packet = wnd->tx_ring[start + sent]; -+ oob_data = NDIS_PACKET_OOB_DATA(packet); -+ oob_data->status = NDIS_STATUS_NOT_RECOGNIZED; -+ irql = serialize_lock_irql(wnd); -+ res = LIN2WIN3(mp->send, wnd->nmb->mp_ctx, -+ packet, packet->private.flags); -+ serialize_unlock_irql(wnd, irql); -+ switch (res) { -+ case NDIS_STATUS_SUCCESS: -+ free_tx_packet(wnd, packet, res); -+ break; -+ case NDIS_STATUS_PENDING: -+ break; -+ case NDIS_STATUS_RESOURCES: -+ wnd->tx_ok = 0; -+ /* resend this packet when resources -+ * become available */ -+ sent--; -+ break; -+ case NDIS_STATUS_FAILURE: -+ free_tx_packet(wnd, packet, res); -+ break; -+ default: -+ ERROR("packet %p: invalid status: %08X", -+ packet, res); -+ break; -+ } -+ } -+ } -+ EXIT3(return sent); -+} -+ -+static void tx_worker(struct work_struct *work) -+{ -+ struct ndis_device *wnd; -+ s8 n; -+ -+ wnd = container_of(work, struct ndis_device, tx_work); -+ ENTER3("tx_ok %d", wnd->tx_ok); -+ while (wnd->tx_ok) { -+ mutex_lock(&wnd->tx_ring_mutex); -+ spin_lock_bh(&wnd->tx_ring_lock); -+ n = wnd->tx_ring_end - wnd->tx_ring_start; -+ TRACE3("%d, %d, %d", wnd->tx_ring_start, wnd->tx_ring_end, n); -+ /* end == start if either ring is empty or full; in -+ * the latter case is_tx_ring_full is set */ -+ if (n == 0) { -+ if (wnd->is_tx_ring_full) -+ n = TX_RING_SIZE - wnd->tx_ring_start; -+ else { -+ spin_unlock_bh(&wnd->tx_ring_lock); -+ mutex_unlock(&wnd->tx_ring_mutex); -+ break; -+ } -+ } else if (n < 0) -+ n = TX_RING_SIZE - wnd->tx_ring_start; -+ spin_unlock_bh(&wnd->tx_ring_lock); -+ if (unlikely(n > wnd->max_tx_packets)) -+ n = wnd->max_tx_packets; -+ n = mp_tx_packets(wnd, wnd->tx_ring_start, n); -+ if (n) { -+ netif_trans_update(wnd->net_dev); -+ wnd->tx_ring_start = -+ (wnd->tx_ring_start + n) % TX_RING_SIZE; -+ wnd->is_tx_ring_full = 0; -+ } -+ mutex_unlock(&wnd->tx_ring_mutex); -+ TRACE3("%d, %d, %d", wnd->tx_ring_start, wnd->tx_ring_end, n); -+ } -+ EXIT3(return); -+} -+ -+static int tx_skbuff(struct sk_buff *skb, struct net_device *dev) -+{ -+ struct ndis_device *wnd = netdev_priv(dev); -+ struct ndis_packet *packet; -+ -+ packet = alloc_tx_packet(wnd, skb); -+ if (!packet) { -+ TRACE2("couldn't allocate packet"); -+ netif_tx_lock(dev); -+ netif_stop_queue(dev); -+ netif_tx_unlock(dev); -+ return NETDEV_TX_BUSY; -+ } -+ spin_lock(&wnd->tx_ring_lock); -+ wnd->tx_ring[wnd->tx_ring_end++] = packet; -+ if (wnd->tx_ring_end == TX_RING_SIZE) -+ wnd->tx_ring_end = 0; -+ if (wnd->tx_ring_end == wnd->tx_ring_start) { -+ netif_tx_lock(dev); -+ wnd->is_tx_ring_full = 1; -+ netif_stop_queue(dev); -+ netif_tx_unlock(dev); -+ } -+ spin_unlock(&wnd->tx_ring_lock); -+ TRACE4("ring: %d, %d", wnd->tx_ring_start, wnd->tx_ring_end); -+ queue_work(wrapndis_wq, &wnd->tx_work); -+ return NETDEV_TX_OK; -+} -+ -+static int set_packet_filter(struct ndis_device *wnd, ULONG packet_filter) -+{ -+ NDIS_STATUS res; -+ -+ while (1) { -+ res = mp_set_int(wnd, OID_GEN_CURRENT_PACKET_FILTER, -+ packet_filter); -+ if (res == NDIS_STATUS_SUCCESS) -+ break; -+ TRACE2("couldn't set filter 0x%08x", packet_filter); -+ /* NDIS_PACKET_TYPE_PROMISCUOUS may not work with 802.11 */ -+ if (packet_filter & NDIS_PACKET_TYPE_PROMISCUOUS) { -+ packet_filter &= ~NDIS_PACKET_TYPE_PROMISCUOUS; -+ continue; -+ } -+ if (packet_filter & NDIS_PACKET_TYPE_ALL_LOCAL) { -+ packet_filter &= ~NDIS_PACKET_TYPE_ALL_LOCAL; -+ continue; -+ } -+ if (packet_filter & NDIS_PACKET_TYPE_ALL_FUNCTIONAL) { -+ packet_filter &= ~NDIS_PACKET_TYPE_ALL_FUNCTIONAL; -+ continue; -+ } -+ if (packet_filter & NDIS_PACKET_TYPE_MULTICAST) { -+ packet_filter &= ~NDIS_PACKET_TYPE_MULTICAST; -+ packet_filter |= NDIS_PACKET_TYPE_ALL_MULTICAST; -+ continue; -+ } -+ if (packet_filter & NDIS_PACKET_TYPE_ALL_MULTICAST) { -+ packet_filter &= ~NDIS_PACKET_TYPE_ALL_MULTICAST; -+ continue; -+ } -+ break; -+ } -+ -+ wnd->packet_filter = packet_filter; -+ res = mp_query_int(wnd, OID_GEN_CURRENT_PACKET_FILTER, &packet_filter); -+ if (packet_filter != wnd->packet_filter) { -+ WARNING("filter not set: 0x%08x, 0x%08x", -+ packet_filter, wnd->packet_filter); -+ wnd->packet_filter = packet_filter; -+ } -+ if (wnd->packet_filter) -+ EXIT3(return 0); -+ else -+ EXIT3(return -1); -+} -+ -+void set_media_state(struct ndis_device *wnd, enum ndis_media_state state) -+{ -+ struct net_device *net_dev = wnd->net_dev; -+ -+ ENTER2("state: 0x%x, carrier %d", state, netif_carrier_ok(net_dev)); -+ switch (state) { -+ case NdisMediaStateConnected: -+ if (netif_carrier_ok(net_dev)) -+ return; -+ netif_carrier_on(net_dev); -+ wnd->tx_ok = 1; -+ if (netif_queue_stopped(net_dev)) -+ netif_wake_queue(net_dev); -+ if (wnd->physical_medium == NdisPhysicalMediumWirelessLan) { -+ set_bit(LINK_STATUS_ON, &wnd->ndis_pending_work); -+ queue_work(wrapndis_wq, &wnd->ndis_work); -+ } -+ break; -+ case NdisMediaStateDisconnected: -+ if (!netif_carrier_ok(net_dev)) -+ return; -+ netif_carrier_off(net_dev); -+ netif_stop_queue(net_dev); -+ wnd->tx_ok = 0; -+ if (wnd->physical_medium == NdisPhysicalMediumWirelessLan) { -+ memset(&wnd->essid, 0, sizeof(wnd->essid)); -+ set_bit(LINK_STATUS_OFF, &wnd->ndis_pending_work); -+ queue_work(wrapndis_wq, &wnd->ndis_work); -+ } -+ break; -+ default: -+ WARNING("invalid media state: 0x%x", state); -+ break; -+ } -+} -+ -+static int ndis_net_dev_init(struct net_device *net_dev) -+{ -+ struct ndis_device *wnd = netdev_priv(net_dev); -+ -+ ENTER1("%p", wnd); -+ wrap_procfs_add_ndis_device(wnd); -+ EXIT1(return 0); -+} -+ -+static void ndis_net_dev_uninit(struct net_device *net_dev) -+{ -+ struct ndis_device *wnd = netdev_priv(net_dev); -+ -+ ENTER1("%p", wnd); -+ wrap_procfs_remove_ndis_device(wnd); -+ EXIT1(return); -+} -+ -+static int ndis_net_dev_open(struct net_device *net_dev) -+{ -+ int status, res; -+ struct ndis_device *wnd = netdev_priv(net_dev); -+ -+ ENTER1("%p", wnd); -+ res = mp_query_int(wnd, OID_GEN_MEDIA_CONNECT_STATUS, &status); -+ if (res == NDIS_STATUS_SUCCESS && status >= NdisMediaStateConnected && -+ status <= NdisMediaStateDisconnected) -+ set_media_state(wnd, status); -+ netif_start_queue(net_dev); -+ netif_poll_enable(net_dev); -+ EXIT1(return 0); -+} -+ -+static int ndis_net_dev_close(struct net_device *net_dev) -+{ -+ ENTER1("%p", netdev_priv(net_dev)); -+ netif_poll_disable(net_dev); -+ netif_tx_disable(net_dev); -+ EXIT1(return 0); -+} -+ -+static int ndis_change_mtu(struct net_device *net_dev, int mtu) -+{ -+ struct ndis_device *wnd = netdev_priv(net_dev); -+ int max; -+ -+ if (mtu < ETH_ZLEN) -+ return -EINVAL; -+ if (mp_query_int(wnd, OID_GEN_MAXIMUM_TOTAL_SIZE, &max) != -+ NDIS_STATUS_SUCCESS) -+ return -EOPNOTSUPP; -+ TRACE1("%d", max); -+ max -= ETH_HLEN; -+ if (max <= ETH_ZLEN) -+ return -EINVAL; -+ if (mtu + ETH_HLEN > max) -+ return -EINVAL; -+ net_dev->mtu = mtu; -+ return 0; -+} -+ -+#ifdef CONFIG_NET_POLL_CONTROLLER -+static void ndis_poll_controller(struct net_device *dev) -+{ -+ struct ndis_device *wnd = netdev_priv(dev); -+ -+ disable_irq(dev->irq); -+ ndis_isr(wnd->mp_interrupt->kinterrupt, wnd->mp_interrupt); -+ enable_irq(dev->irq); -+} -+#endif -+ -+/* called from BH context */ -+static struct net_device_stats *ndis_get_stats(struct net_device *dev) -+{ -+ struct ndis_device *wnd = netdev_priv(dev); -+ return &wnd->net_stats; -+} -+ -+/* called from BH context */ -+static void ndis_set_multicast_list(struct net_device *dev) -+{ -+ struct ndis_device *wnd = netdev_priv(dev); -+ set_bit(SET_MULTICAST_LIST, &wnd->ndis_pending_work); -+ queue_work(wrapndis_wq, &wnd->ndis_work); -+} -+ -+/* called from BH context */ -+struct iw_statistics *get_iw_stats(struct net_device *dev) -+{ -+ struct ndis_device *wnd = netdev_priv(dev); -+ return &wnd->iw_stats; -+} -+ -+static void update_iw_stats(struct ndis_device *wnd) -+{ -+ struct iw_statistics *iw_stats = &wnd->iw_stats; -+ struct ndis_wireless_stats ndis_stats; -+ NDIS_STATUS res; -+ ndis_rssi rssi; -+ int qual; -+ -+ ENTER2("%p", wnd); -+ if (wnd->iw_stats_enabled == FALSE || !netif_carrier_ok(wnd->net_dev)) { -+ memset(iw_stats, 0, sizeof(*iw_stats)); -+ EXIT2(return); -+ } -+ res = mp_query(wnd, OID_802_11_RSSI, &rssi, sizeof(rssi)); -+ if (res == NDIS_STATUS_SUCCESS) -+ iw_stats->qual.level = rssi; -+ -+ qual = 100 * (rssi - WL_NOISE) / (WL_SIGMAX - WL_NOISE); -+ if (qual < 0) -+ qual = 0; -+ else if (qual > 100) -+ qual = 100; -+ -+ iw_stats->qual.noise = WL_NOISE; -+ iw_stats->qual.qual = qual; -+ -+ res = mp_query(wnd, OID_802_11_STATISTICS, -+ &ndis_stats, sizeof(ndis_stats)); -+ if (res != NDIS_STATUS_SUCCESS) -+ EXIT2(return); -+ iw_stats->discard.retries = (unsigned long)ndis_stats.retry + -+ (unsigned long)ndis_stats.multi_retry; -+ iw_stats->discard.misc = (unsigned long)ndis_stats.fcs_err + -+ (unsigned long)ndis_stats.rtss_fail + -+ (unsigned long)ndis_stats.ack_fail + -+ (unsigned long)ndis_stats.frame_dup; -+ -+ EXIT2(return); -+} -+ -+static void set_multicast_list(struct ndis_device *wnd) -+{ -+ struct net_device *net_dev; -+ ULONG packet_filter; -+ NDIS_STATUS res; -+ -+ net_dev = wnd->net_dev; -+ packet_filter = wnd->packet_filter; -+ -+ TRACE2("0x%08x", packet_filter); -+ if (net_dev->flags & IFF_PROMISC) { -+ packet_filter |= NDIS_PACKET_TYPE_PROMISCUOUS | -+ NDIS_PACKET_TYPE_ALL_LOCAL; -+ } else if (net_dev->flags & IFF_ALLMULTI || -+ netdev_mc_count(net_dev) > wnd->multicast_size) { -+ packet_filter |= NDIS_PACKET_TYPE_ALL_MULTICAST; -+ TRACE2("0x%08x", packet_filter); -+ } else if (netdev_mc_count(net_dev) > 0) { -+ int i, size; -+ char *buf; -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35) -+ struct netdev_hw_addr *ha; -+#else -+ struct dev_mc_list *mclist; -+#endif -+ size = min(wnd->multicast_size, netdev_mc_count(net_dev)); -+ TRACE2("%d, %d", wnd->multicast_size, netdev_mc_count(net_dev)); -+ buf = kmalloc(size * ETH_ALEN, GFP_KERNEL); -+ if (!buf) { -+ WARNING("couldn't allocate memory"); -+ EXIT2(return); -+ } -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35) -+ i = 0; -+ netdev_for_each_mc_addr(ha, net_dev) { -+ if (i >= size) -+ break; -+ memcpy(buf + i * ETH_ALEN, ha->addr, ETH_ALEN); -+ TRACE2(MACSTRSEP, MAC2STR(ha->addr)); -+ i++; -+ } -+#else -+ mclist = net_dev->mc_list; -+ for (i = 0; i < size && mclist; mclist = mclist->next) { -+ if (mclist->dmi_addrlen != ETH_ALEN) -+ continue; -+ memcpy(buf + i * ETH_ALEN, mclist->dmi_addr, ETH_ALEN); -+ TRACE2(MACSTRSEP, MAC2STR(mclist->dmi_addr)); -+ i++; -+ } -+#endif -+ res = mp_set(wnd, OID_802_3_MULTICAST_LIST, buf, i * ETH_ALEN); -+ if (res == NDIS_STATUS_SUCCESS && i > 0) -+ packet_filter |= NDIS_PACKET_TYPE_MULTICAST; -+ else -+ packet_filter |= NDIS_PACKET_TYPE_ALL_MULTICAST; -+ kfree(buf); -+ } -+ TRACE2("0x%08x", packet_filter); -+ res = set_packet_filter(wnd, packet_filter); -+ if (res) -+ TRACE1("couldn't set packet filter (%08X)", res); -+ EXIT2(return); -+} -+ -+static void link_status_off(struct ndis_device *wnd) -+{ -+#ifdef CONFIG_WIRELESS_EXT -+ union iwreq_data wrqu; -+ -+ memset(&wrqu, 0, sizeof(wrqu)); -+ wrqu.ap_addr.sa_family = ARPHRD_ETHER; -+ wireless_send_event(wnd->net_dev, SIOCGIWAP, &wrqu, NULL); -+#endif -+ EXIT2(return); -+} -+ -+static void link_status_on(struct ndis_device *wnd) -+{ -+#ifdef CONFIG_WIRELESS_EXT -+ struct ndis_assoc_info *ndis_assoc_info; -+ union iwreq_data wrqu; -+ NDIS_STATUS res; -+ const int assoc_size = sizeof(*ndis_assoc_info) + IW_CUSTOM_MAX + 32; -+#endif -+ -+ ENTER2(""); -+#ifdef CONFIG_WIRELESS_EXT -+ memset(&wrqu, 0, sizeof(wrqu)); -+ ndis_assoc_info = kzalloc(assoc_size, GFP_KERNEL); -+ if (!ndis_assoc_info) { -+ ERROR("couldn't allocate memory"); -+ goto send_assoc_event; -+ } -+ res = mp_query(wnd, OID_802_11_ASSOCIATION_INFORMATION, -+ ndis_assoc_info, assoc_size); -+ if (res) { -+ TRACE2("query assoc_info failed (%08X)", res); -+ kfree(ndis_assoc_info); -+ goto send_assoc_event; -+ } -+ TRACE2("%u, 0x%x, %u, 0x%x, %u", ndis_assoc_info->length, -+ ndis_assoc_info->req_ies, ndis_assoc_info->req_ie_length, -+ ndis_assoc_info->resp_ies, ndis_assoc_info->resp_ie_length); -+ if (ndis_assoc_info->req_ie_length > 0) { -+ wrqu.data.length = ndis_assoc_info->req_ie_length; -+ wireless_send_event(wnd->net_dev, IWEVASSOCREQIE, &wrqu, -+ ((char *)ndis_assoc_info) + -+ ndis_assoc_info->offset_req_ies); -+ } -+ if (ndis_assoc_info->resp_ie_length > 0) { -+ wrqu.data.length = ndis_assoc_info->resp_ie_length; -+ wireless_send_event(wnd->net_dev, IWEVASSOCRESPIE, &wrqu, -+ ((char *)ndis_assoc_info) + -+ ndis_assoc_info->offset_resp_ies); -+ } -+ kfree(ndis_assoc_info); -+ -+send_assoc_event: -+ get_ap_address(wnd, wrqu.ap_addr.sa_data); -+ wrqu.ap_addr.sa_family = ARPHRD_ETHER; -+ TRACE2(MACSTRSEP, MAC2STR(wrqu.ap_addr.sa_data)); -+ wireless_send_event(wnd->net_dev, SIOCGIWAP, &wrqu, NULL); -+#endif -+ EXIT2(return); -+} -+ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,15,0) -+static void iw_stats_timer_proc(struct timer_list *tl) -+#else -+static void iw_stats_timer_proc(unsigned long data) -+#endif -+{ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,15,0) -+ struct ndis_device *wnd = from_timer(wnd, tl, iw_stats_timer); -+#else -+ struct ndis_device *wnd = (struct ndis_device *)data; -+#endif -+ -+ ENTER2("%d", wnd->iw_stats_interval); -+ if (wnd->iw_stats_interval > 0) { -+ set_bit(COLLECT_IW_STATS, &wnd->ndis_pending_work); -+ queue_work(wrapndis_wq, &wnd->ndis_work); -+ } -+ mod_timer(&wnd->iw_stats_timer, jiffies + wnd->iw_stats_interval); -+} -+ -+static void add_iw_stats_timer(struct ndis_device *wnd) -+{ -+ if (wnd->physical_medium != NdisPhysicalMediumWirelessLan) -+ return; -+ if (wnd->iw_stats_interval < 0) -+ wnd->iw_stats_interval *= -1; -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,15,0) -+ timer_setup(&wnd->iw_stats_timer, iw_stats_timer_proc, 0); -+#else -+ wnd->iw_stats_timer.data = (unsigned long)wnd; -+ wnd->iw_stats_timer.function = iw_stats_timer_proc; -+#endif -+ mod_timer(&wnd->iw_stats_timer, jiffies + wnd->iw_stats_interval); -+} -+ -+static void del_iw_stats_timer(struct ndis_device *wnd) -+{ -+ ENTER2("%d", wnd->iw_stats_interval); -+ wnd->iw_stats_interval *= -1; -+ del_timer_sync(&wnd->iw_stats_timer); -+ EXIT2(return); -+} -+ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,15,0) -+static void hangcheck_proc(struct timer_list *tl) -+#else -+static void hangcheck_proc(unsigned long data) -+#endif -+{ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,15,0) -+ struct ndis_device *wnd = from_timer(wnd, tl, hangcheck_timer); -+#else -+ struct ndis_device *wnd = (struct ndis_device *)data; -+#endif -+ -+ ENTER3("%d", wnd->hangcheck_interval); -+ if (wnd->hangcheck_interval > 0) { -+ set_bit(HANGCHECK, &wnd->ndis_pending_work); -+ queue_work(wrapndis_wq, &wnd->ndis_work); -+ } -+ mod_timer(&wnd->hangcheck_timer, jiffies + wnd->hangcheck_interval); -+ EXIT3(return); -+} -+ -+void hangcheck_add(struct ndis_device *wnd) -+{ -+ if (!wnd->wd->driver->ndis_driver->mp.hangcheck || -+ hangcheck_interval < 0) -+ EXIT2(return); -+ -+ if (hangcheck_interval > 0) -+ wnd->hangcheck_interval = hangcheck_interval * HZ; -+ if (wnd->hangcheck_interval < 0) -+ wnd->hangcheck_interval *= -1; -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,15,0) -+ timer_setup(&wnd->hangcheck_timer, hangcheck_proc, 0); -+#else -+ wnd->hangcheck_timer.data = (unsigned long)wnd; -+ wnd->hangcheck_timer.function = hangcheck_proc; -+#endif -+ mod_timer(&wnd->hangcheck_timer, jiffies + wnd->hangcheck_interval); -+ EXIT2(return); -+} -+ -+void hangcheck_del(struct ndis_device *wnd) -+{ -+ ENTER2("%d", wnd->hangcheck_interval); -+ if (wnd->hangcheck_interval > 0) -+ wnd->hangcheck_interval *= -1; -+ del_timer_sync(&wnd->hangcheck_timer); -+ EXIT2(return); -+} -+ -+/* worker procedure to take care of setting/checking various states */ -+static void wrapndis_worker(struct work_struct *work) -+{ -+ struct ndis_device *wnd; -+ -+ wnd = container_of(work, struct ndis_device, ndis_work); -+ WORKTRACE("0x%lx", wnd->ndis_pending_work); -+ -+ if (test_and_clear_bit(NETIF_WAKEQ, &wnd->ndis_pending_work)) { -+ netif_tx_lock_bh(wnd->net_dev); -+ netif_wake_queue(wnd->net_dev); -+ netif_tx_unlock_bh(wnd->net_dev); -+ } -+ -+ if (test_and_clear_bit(LINK_STATUS_OFF, &wnd->ndis_pending_work)) -+ link_status_off(wnd); -+ -+ if (test_and_clear_bit(LINK_STATUS_ON, &wnd->ndis_pending_work)) -+ link_status_on(wnd); -+ -+ if (test_and_clear_bit(COLLECT_IW_STATS, &wnd->ndis_pending_work)) -+ update_iw_stats(wnd); -+ -+ if (test_and_clear_bit(SET_MULTICAST_LIST, -+ &wnd->ndis_pending_work)) -+ set_multicast_list(wnd); -+ -+ if (test_and_clear_bit(HANGCHECK, &wnd->ndis_pending_work)) { -+ struct miniport *mp; -+ BOOLEAN reset; -+ KIRQL irql; -+ -+ mp = &wnd->wd->driver->ndis_driver->mp; -+ irql = serialize_lock_irql(wnd); -+ reset = LIN2WIN1(mp->hangcheck, wnd->nmb->mp_ctx); -+ serialize_unlock_irql(wnd, irql); -+ if (reset) { -+ TRACE2("%s needs reset", wnd->net_dev->name); -+ mp_reset(wnd); -+ } -+ } -+ WORKEXIT(return); -+} -+ -+NDIS_STATUS ndis_reinit(struct ndis_device *wnd) -+{ -+ NDIS_STATUS status; -+ -+ wnd->attributes &= ~NDIS_ATTRIBUTE_NO_HALT_ON_SUSPEND; -+ status = mp_set_power_state(wnd, NdisDeviceStateD3); -+ if (status != NDIS_STATUS_SUCCESS) { -+ ERROR("halting device %s failed: %08X", wnd->net_dev->name, -+ status); -+ return status; -+ } -+ status = mp_set_power_state(wnd, NdisDeviceStateD0); -+ if (status != NDIS_STATUS_SUCCESS) -+ ERROR("starting device %s failed: %08X", wnd->net_dev->name, -+ status); -+ return status; -+} -+ -+#ifdef CONFIG_WIRELESS_EXT -+static void get_encryption_capa(struct ndis_device *wnd, char *buf, -+ const int buf_len) -+{ -+ int i, mode; -+ NDIS_STATUS res; -+ struct ndis_assoc_info ndis_assoc_info; -+ struct ndis_add_key ndis_key; -+ struct ndis_capability *c; -+ -+ ENTER1("%p", wnd); -+ /* set network type to g, b, or a, in that order */ -+ res = mp_query(wnd, OID_802_11_NETWORK_TYPES_SUPPORTED, buf, buf_len); -+ if (res == NDIS_STATUS_SUCCESS) { -+ struct network_type_list *net_types; -+ unsigned long types = 0; -+ net_types = (typeof(net_types))buf; -+ for (i = 0; i < net_types->num; i++) { -+ TRACE2("%d", net_types->types[i]); -+ set_bit(net_types->types[i], &types); -+ } -+ if (test_bit(Ndis802_11OFDM24, &types)) -+ mode = Ndis802_11OFDM24; -+ else if (test_bit(Ndis802_11DS, &types)) -+ mode = Ndis802_11DS; -+ else if (test_bit(Ndis802_11OFDM5, &types)) -+ mode = Ndis802_11OFDM5; -+ else -+ mode = Ndis802_11DS; -+ mp_set_int(wnd, OID_802_11_NETWORK_TYPE_IN_USE, mode); -+ } -+ /* check if WEP is supported */ -+ if (set_iw_encr_mode(wnd, IW_AUTH_CIPHER_WEP104, -+ IW_AUTH_CIPHER_NONE) == 0 && -+ get_ndis_encr_mode(wnd) == Ndis802_11Encryption1KeyAbsent) -+ set_bit(Ndis802_11Encryption1Enabled, &wnd->capa.encr); -+ -+ /* check if WPA is supported */ -+ if (set_ndis_auth_mode(wnd, Ndis802_11AuthModeWPA) == 0 && -+ get_ndis_auth_mode(wnd) == Ndis802_11AuthModeWPA) -+ set_bit(Ndis802_11AuthModeWPA, &wnd->capa.encr); -+ else -+ EXIT1(return); -+ -+ if (set_ndis_auth_mode(wnd, Ndis802_11AuthModeWPAPSK) == 0 && -+ get_ndis_auth_mode(wnd) == Ndis802_11AuthModeWPAPSK) -+ set_bit(Ndis802_11AuthModeWPAPSK, &wnd->capa.encr); -+ -+ /* check for highest encryption */ -+ mode = 0; -+ if (set_iw_encr_mode(wnd, IW_AUTH_CIPHER_CCMP, -+ IW_AUTH_CIPHER_NONE) == 0 && -+ (i = get_ndis_encr_mode(wnd)) > 0 && -+ (i == Ndis802_11Encryption3KeyAbsent || -+ i == Ndis802_11Encryption3Enabled)) -+ mode = Ndis802_11Encryption3Enabled; -+ else if (set_iw_encr_mode(wnd, IW_AUTH_CIPHER_TKIP, -+ IW_AUTH_CIPHER_NONE) == 0 && -+ (i = get_ndis_encr_mode(wnd)) > 0 && -+ (i == Ndis802_11Encryption2KeyAbsent || -+ i == Ndis802_11Encryption2Enabled)) -+ mode = Ndis802_11Encryption2Enabled; -+ else if (set_iw_encr_mode(wnd, IW_AUTH_CIPHER_WEP104, -+ IW_AUTH_CIPHER_NONE) == 0 && -+ (i = get_ndis_encr_mode(wnd)) > 0 && -+ (i == Ndis802_11Encryption1KeyAbsent || -+ i == Ndis802_11Encryption1Enabled)) -+ mode = Ndis802_11Encryption1Enabled; -+ -+ TRACE1("mode: %d", mode); -+ if (mode == 0) -+ EXIT1(return); -+ set_bit(Ndis802_11Encryption1Enabled, &wnd->capa.encr); -+ if (mode == Ndis802_11Encryption1Enabled) -+ EXIT1(return); -+ -+ ndis_key.length = 32; -+ ndis_key.index = 0xC0000001; -+ ndis_key.struct_size = sizeof(ndis_key); -+ res = mp_set(wnd, OID_802_11_ADD_KEY, &ndis_key, ndis_key.struct_size); -+ TRACE2("%08X, %zu", res, sizeof(ndis_key)); -+ if (res && res != NDIS_STATUS_INVALID_DATA) -+ EXIT1(return); -+ res = mp_query(wnd, OID_802_11_ASSOCIATION_INFORMATION, -+ &ndis_assoc_info, sizeof(ndis_assoc_info)); -+ TRACE1("%08X", res); -+ if (res == NDIS_STATUS_NOT_SUPPORTED) -+ EXIT1(return); -+ -+ set_bit(Ndis802_11Encryption2Enabled, &wnd->capa.encr); -+ if (mode == Ndis802_11Encryption3Enabled) -+ set_bit(Ndis802_11Encryption3Enabled, &wnd->capa.encr); -+ /* not all drivers support OID_802_11_CAPABILITY, so we don't -+ * know for sure if driver support WPA or WPAPSK; assume -+ * WPAPSK */ -+ set_bit(Ndis802_11AuthModeWPAPSK, &wnd->capa.auth); -+ wnd->max_pmkids = 1; -+ -+ memset(buf, 0, buf_len); -+ c = (struct ndis_capability *)buf; -+ res = mp_query(wnd, OID_802_11_CAPABILITY, buf, buf_len); -+ if (!(res == NDIS_STATUS_SUCCESS && c->version == 2)) -+ EXIT1(return); -+ wnd->max_pmkids = c->num_PMKIDs; -+ -+ for (i = 0; i < c->num_auth_encr_pair; i++) { -+ struct ndis_auth_encr_pair *ae; -+ -+ ae = &c->auth_encr_pair[i]; -+ if ((char *)(ae + 1) > buf + buf_len) -+ break; -+ switch (ae->auth_mode) { -+ case Ndis802_11AuthModeOpen: -+ case Ndis802_11AuthModeShared: -+ case Ndis802_11AuthModeWPA: -+ case Ndis802_11AuthModeWPAPSK: -+ case Ndis802_11AuthModeWPANone: -+ case Ndis802_11AuthModeWPA2: -+ case Ndis802_11AuthModeWPA2PSK: -+ set_bit(ae->auth_mode, &wnd->capa.auth); -+ break; -+ default: -+ WARNING("unknown auth_mode: %d", ae->auth_mode); -+ break; -+ } -+ switch (ae->encr_mode) { -+ case Ndis802_11EncryptionDisabled: -+ case Ndis802_11Encryption1Enabled: -+ case Ndis802_11Encryption2Enabled: -+ case Ndis802_11Encryption3Enabled: -+ set_bit(ae->encr_mode, &wnd->capa.encr); -+ break; -+ default: -+ WARNING("unknown encr_mode: %d", ae->encr_mode); -+ break; -+ } -+ } -+ EXIT1(return); -+} -+#endif -+ -+wstdcall NTSTATUS NdisDispatchDeviceControl(struct device_object *fdo, -+ struct irp *irp) -+{ -+ struct ndis_device *wnd; -+ -+ TRACE3("fdo: %p", fdo); -+ /* for now, we don't have anything interesting here, so pass it -+ * down to bus driver */ -+ wnd = fdo->reserved; -+ return IoPassIrpDown(wnd->nmb->pdo, irp); -+} -+WIN_FUNC_DECL(NdisDispatchDeviceControl,2) -+ -+wstdcall NTSTATUS NdisDispatchPower(struct device_object *fdo, struct irp *irp) -+{ -+ struct io_stack_location *irp_sl; -+ struct ndis_device *wnd; -+ enum ndis_power_state state; -+ NTSTATUS status; -+ NDIS_STATUS ndis_status; -+ -+ irp_sl = IoGetCurrentIrpStackLocation(irp); -+ wnd = fdo->reserved; -+ IOTRACE("fdo: %p, fn: %d:%d, wnd: %p", fdo, irp_sl->major_fn, -+ irp_sl->minor_fn, wnd); -+ if ((irp_sl->params.power.type == SystemPowerState && -+ irp_sl->params.power.state.system_state > PowerSystemWorking) || -+ (irp_sl->params.power.type == DevicePowerState && -+ irp_sl->params.power.state.device_state > PowerDeviceD0)) -+ state = NdisDeviceStateD3; -+ else -+ state = NdisDeviceStateD0; -+ switch (irp_sl->minor_fn) { -+ case IRP_MN_SET_POWER: -+ if (state == NdisDeviceStateD0) { -+ status = IoSyncForwardIrp(wnd->nmb->pdo, irp); -+ if (status != STATUS_SUCCESS) -+ break; -+ ndis_status = mp_set_power_state(wnd, state); -+ if (ndis_status != NDIS_STATUS_SUCCESS) -+ WARNING("couldn't set power to %d: %08X", -+ state, ndis_status); -+ TRACE2("%s: device resumed", wnd->net_dev->name); -+ irp->io_status.status = status = STATUS_SUCCESS; -+ IoCompleteRequest(irp, IO_NO_INCREMENT); -+ break; -+ } else { -+ ndis_status = mp_set_power_state(wnd, state); -+ /* TODO: handle error case */ -+ if (ndis_status != NDIS_STATUS_SUCCESS) -+ WARNING("setting power to %d failed: %08X", -+ state, ndis_status); -+ status = IoAsyncForwardIrp(wnd->nmb->pdo, irp); -+ } -+ break; -+ case IRP_MN_QUERY_POWER: -+ if (wnd->attributes & NDIS_ATTRIBUTE_NO_HALT_ON_SUSPEND) { -+ ndis_status = mp_query(wnd, OID_PNP_QUERY_POWER, -+ &state, sizeof(state)); -+ TRACE2("%d, %08X", state, ndis_status); -+ /* this OID must always succeed */ -+ if (ndis_status != NDIS_STATUS_SUCCESS) -+ TRACE1("query power returns %08X", ndis_status); -+ irp->io_status.status = STATUS_SUCCESS; -+ } else -+ irp->io_status.status = STATUS_SUCCESS; -+ status = IoPassIrpDown(wnd->nmb->pdo, irp); -+ break; -+ case IRP_MN_WAIT_WAKE: -+ case IRP_MN_POWER_SEQUENCE: -+ /* TODO: implement WAIT_WAKE */ -+ status = IoPassIrpDown(wnd->nmb->pdo, irp); -+ break; -+ default: -+ status = IoPassIrpDown(wnd->nmb->pdo, irp); -+ break; -+ } -+ IOEXIT(return status); -+} -+WIN_FUNC_DECL(NdisDispatchPower,2) -+ -+wstdcall NTSTATUS NdisDispatchPnp(struct device_object *fdo, struct irp *irp) -+{ -+ struct io_stack_location *irp_sl; -+ struct ndis_device *wnd; -+ struct device_object *pdo; -+ NTSTATUS status; -+ -+ IOTRACE("fdo: %p, irp: %p", fdo, irp); -+ irp_sl = IoGetCurrentIrpStackLocation(irp); -+ wnd = fdo->reserved; -+ pdo = wnd->nmb->pdo; -+ switch (irp_sl->minor_fn) { -+ case IRP_MN_START_DEVICE: -+ status = IoSyncForwardIrp(pdo, irp); -+ if (status != STATUS_SUCCESS) -+ break; -+ if (ndis_start_device(wnd) == NDIS_STATUS_SUCCESS) -+ status = STATUS_SUCCESS; -+ else -+ status = STATUS_FAILURE; -+ irp->io_status.status = status; -+ IoCompleteRequest(irp, IO_NO_INCREMENT); -+ break; -+ case IRP_MN_QUERY_STOP_DEVICE: -+ /* TODO: implement in NDIS */ -+ status = IoPassIrpDown(wnd->nmb->pdo, irp); -+ break; -+ case IRP_MN_STOP_DEVICE: -+ mp_halt(wnd); -+ irp->io_status.status = STATUS_SUCCESS; -+ status = IoAsyncForwardIrp(pdo, irp); -+ break; -+ case IRP_MN_REMOVE_DEVICE: -+ TRACE1("%s", wnd->net_dev->name); -+ mp_pnp_event(wnd, NdisDevicePnPEventSurpriseRemoved, 0); -+ if (ndis_remove_device(wnd)) { -+ status = STATUS_FAILURE; -+ break; -+ } -+ /* wnd is already freed */ -+ status = IoAsyncForwardIrp(pdo, irp); -+ IoDetachDevice(fdo); -+ IoDeleteDevice(fdo); -+ break; -+ default: -+ status = IoAsyncForwardIrp(pdo, irp); -+ break; -+ } -+ IOTRACE("status: %08X", status); -+ IOEXIT(return status); -+} -+WIN_FUNC_DECL(NdisDispatchPnp,2) -+ -+static void set_task_offload(struct ndis_device *wnd, void *buf, -+ const int buf_size) -+{ -+ struct ndis_task_offload_header *task_offload_header; -+ struct ndis_task_offload *task_offload; -+ struct ndis_task_tcp_ip_checksum *csum = NULL; -+ struct ndis_task_tcp_large_send *tso = NULL; -+ NDIS_STATUS status; -+ -+ memset(buf, 0, buf_size); -+ task_offload_header = buf; -+ task_offload_header->version = NDIS_TASK_OFFLOAD_VERSION; -+ task_offload_header->size = sizeof(*task_offload_header); -+ task_offload_header->encap_format.flags.fixed_header_size = 1; -+ task_offload_header->encap_format.header_size = sizeof(struct ethhdr); -+ task_offload_header->encap_format.encap = IEEE_802_3_Encapsulation; -+ status = mp_query(wnd, OID_TCP_TASK_OFFLOAD, buf, buf_size); -+ TRACE1("%08X", status); -+ if (status != NDIS_STATUS_SUCCESS) -+ EXIT1(return); -+ if (task_offload_header->offset_first_task == 0) -+ EXIT1(return); -+ task_offload = ((void *)task_offload_header + -+ task_offload_header->offset_first_task); -+ while (1) { -+ TRACE1("%d, %d", task_offload->version, task_offload->task); -+ switch (task_offload->task) { -+ case TcpIpChecksumNdisTask: -+ csum = (void *)task_offload->task_buf; -+ break; -+ case TcpLargeSendNdisTask: -+ tso = (void *)task_offload->task_buf; -+ break; -+ default: -+ TRACE1("%d", task_offload->task); -+ break; -+ } -+ if (task_offload->offset_next_task == 0) -+ break; -+ task_offload = (void *)task_offload + -+ task_offload->offset_next_task; -+ } -+ if (tso) -+ TRACE1("%u, %u, %d, %d", tso->max_size, tso->min_seg_count, -+ tso->tcp_opts, tso->ip_opts); -+ if (!csum) -+ EXIT1(return); -+ TRACE1("%08x, %08x", csum->v4_tx.value, csum->v4_rx.value); -+ task_offload_header->encap_format.flags.fixed_header_size = 1; -+ task_offload_header->encap_format.header_size = sizeof(struct ethhdr); -+ task_offload_header->offset_first_task = sizeof(*task_offload_header); -+ task_offload = ((void *)task_offload_header + -+ task_offload_header->offset_first_task); -+ task_offload->offset_next_task = 0; -+ task_offload->size = sizeof(*task_offload); -+ task_offload->task = TcpIpChecksumNdisTask; -+ memcpy(task_offload->task_buf, csum, sizeof(*csum)); -+ task_offload->task_buf_length = sizeof(*csum); -+ status = mp_set(wnd, OID_TCP_TASK_OFFLOAD, task_offload_header, -+ sizeof(*task_offload_header) + -+ sizeof(*task_offload) + sizeof(*csum)); -+ TRACE1("%08X", status); -+ if (status != NDIS_STATUS_SUCCESS) -+ EXIT2(return); -+ wnd->tx_csum = csum->v4_tx; -+ if (csum->v4_tx.tcp_csum && csum->v4_tx.udp_csum) { -+ if (csum->v4_tx.ip_csum) { -+ wnd->net_dev->features |= NETIF_F_HW_CSUM; -+ TRACE1("hw checksum enabled"); -+ } else { -+ wnd->net_dev->features |= NETIF_F_IP_CSUM; -+ TRACE1("IP checksum enabled"); -+ } -+ if (wnd->sg_dma_size) -+ wnd->net_dev->features |= NETIF_F_SG; -+ } -+ wnd->rx_csum = csum->v4_rx; -+ EXIT1(return); -+} -+ -+static void get_supported_oids(struct ndis_device *wnd) -+{ -+ NDIS_STATUS res; -+ int i, n, needed; -+ ndis_oid *oids; -+ -+ res = mp_query_info(wnd, OID_GEN_SUPPORTED_LIST, NULL, 0, NULL, -+ &needed); -+ if (!(res == NDIS_STATUS_BUFFER_TOO_SHORT || -+ res == NDIS_STATUS_INVALID_LENGTH)) -+ EXIT1(return); -+ oids = kmalloc(needed, GFP_KERNEL); -+ if (!oids) { -+ TRACE1("couldn't allocate memory"); -+ EXIT1(return); -+ } -+ res = mp_query(wnd, OID_GEN_SUPPORTED_LIST, oids, needed); -+ if (res) { -+ TRACE1("failed: %08X", res); -+ kfree(oids); -+ EXIT1(return); -+ } -+ for (i = 0, n = needed / sizeof(*oids); i < n; i++) { -+ TRACE1("oid: %08X", oids[i]); -+ /* if a wireless device didn't say so for -+ * OID_GEN_PHYSICAL_MEDIUM (they should, but in case) */ -+ if (wnd->physical_medium != NdisPhysicalMediumWirelessLan && -+ oids[i] == OID_802_11_SSID) -+ wnd->physical_medium = NdisPhysicalMediumWirelessLan; -+ } -+ kfree(oids); -+ EXIT1(return); -+} -+ -+static void ndis_get_drvinfo(struct net_device *dev, -+ struct ethtool_drvinfo *info) -+{ -+ struct ndis_device *wnd = netdev_priv(dev); -+ strncpy(info->driver, DRIVER_NAME, sizeof(info->driver) - 2); -+ strcat(info->driver, "+"); -+ strncat(info->driver, wnd->wd->driver->name, -+ sizeof(info->driver) - strlen(DRIVER_NAME) - 1); -+ strncpy(info->version, DRIVER_VERSION, sizeof(info->version) - 2); -+ strcat(info->version, "+"); -+ strncat(info->version, wnd->wd->driver->version, -+ sizeof(info->version) - strlen(DRIVER_VERSION) - 1); -+ if (wrap_is_pci_bus(wnd->wd->dev_bus)) -+ strncpy(info->bus_info, pci_name(wnd->wd->pci.pdev), -+ sizeof(info->bus_info) - 1); -+#ifdef ENABLE_USB -+ else -+ usb_make_path(wnd->wd->usb.udev, info->bus_info, -+ sizeof(info->bus_info) - 1); -+#endif -+ return; -+} -+ -+static u32 ndis_get_link(struct net_device *dev) -+{ -+ struct ndis_device *wnd = netdev_priv(dev); -+ return netif_carrier_ok(wnd->net_dev); -+} -+ -+static void ndis_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol) -+{ -+ struct ndis_device *wnd = netdev_priv(dev); -+ -+ wol->supported = 0; -+ wol->wolopts = 0; -+ if (!(wnd->attributes & NDIS_ATTRIBUTE_NO_HALT_ON_SUSPEND)) -+ EXIT2(return); -+ if (!wrap_is_pci_bus(wnd->wd->dev_bus)) -+ EXIT2(return); -+ /* we always suspend to D3 */ -+ if (wnd->pnp_capa.wakeup.min_magic_packet_wakeup < NdisDeviceStateD3) -+ return; -+ wol->supported |= WAKE_MAGIC; -+ if (wnd->ndis_wolopts & NDIS_PNP_WAKE_UP_MAGIC_PACKET) -+ wol->wolopts |= WAKE_MAGIC; -+ return; -+} -+ -+static int ndis_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) -+{ -+ struct ndis_device *wnd = netdev_priv(dev); -+ -+ if (!(wnd->attributes & NDIS_ATTRIBUTE_NO_HALT_ON_SUSPEND)) -+ return -EOPNOTSUPP; -+ if (wnd->pnp_capa.wakeup.min_magic_packet_wakeup < NdisDeviceStateD3) -+ EXIT2(return -EOPNOTSUPP); -+ TRACE2("0x%x", wol->wolopts); -+ if (wol->wolopts & WAKE_MAGIC) { -+ wnd->ndis_wolopts |= NDIS_PNP_WAKE_UP_MAGIC_PACKET; -+ if (wol->wolopts != WAKE_MAGIC) -+ WARNING("ignored wake-on-lan options: 0x%x", -+ wol->wolopts & ~WAKE_MAGIC); -+ } else if (!wol->wolopts) -+ wnd->ndis_wolopts = 0; -+ else -+ return -EOPNOTSUPP; -+ TRACE2("0x%x", wnd->ndis_wolopts); -+ return 0; -+} -+ -+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0) -+static u32 ndis_get_tx_csum(struct net_device *dev) -+{ -+ struct ndis_device *wnd = netdev_priv(dev); -+ if (wnd->tx_csum.tcp_csum && wnd->tx_csum.udp_csum) -+ return 1; -+ else -+ return 0; -+} -+ -+static u32 ndis_get_rx_csum(struct net_device *dev) -+{ -+ struct ndis_device *wnd = netdev_priv(dev); -+ if (wnd->rx_csum.value) -+ return 1; -+ else -+ return 0; -+} -+ -+static int ndis_set_tx_csum(struct net_device *dev, u32 data) -+{ -+ struct ndis_device *wnd = netdev_priv(dev); -+ -+ if (data && (wnd->tx_csum.value == 0)) -+ return -EOPNOTSUPP; -+ -+ if (wnd->tx_csum.ip_csum) -+ ethtool_op_set_tx_hw_csum(dev, data); -+ else -+ ethtool_op_set_tx_csum(dev, data); -+ return 0; -+} -+ -+static int ndis_set_rx_csum(struct net_device *dev, u32 data) -+{ -+ struct ndis_device *wnd = netdev_priv(dev); -+ -+ if (data && (wnd->tx_csum.value == 0)) -+ return -EOPNOTSUPP; -+ -+ /* TODO: enable/disable rx csum through NDIS */ -+ return 0; -+} -+ -+static u32 ndis_get_sg(struct net_device *dev) -+{ -+ struct ndis_device *wnd = netdev_priv(dev); -+ if (wnd->sg_dma_size) -+ return ethtool_op_get_sg(dev); -+ else -+ return 0; -+} -+ -+static int ndis_set_sg(struct net_device *dev, u32 data) -+{ -+ struct ndis_device *wnd = netdev_priv(dev); -+ if (wnd->sg_dma_size) -+ return ethtool_op_set_sg(dev, data); -+ else -+ return -EOPNOTSUPP; -+} -+#endif -+ -+static struct ethtool_ops ndis_ethtool_ops = { -+ .get_drvinfo = ndis_get_drvinfo, -+ .get_link = ndis_get_link, -+ .get_wol = ndis_get_wol, -+ .set_wol = ndis_set_wol, -+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0) -+ .get_tx_csum = ndis_get_tx_csum, -+ .get_rx_csum = ndis_get_rx_csum, -+ .set_tx_csum = ndis_set_tx_csum, -+ .set_rx_csum = ndis_set_rx_csum, -+ .get_sg = ndis_get_sg, -+ .set_sg = ndis_set_sg, -+#endif -+}; -+ -+static int notifier_event(struct notifier_block *notifier, unsigned long event, -+ void *ptr) -+{ -+ struct net_device *net_dev = netdev_notifier_info_to_dev(ptr); -+ -+ ENTER2("0x%lx", event); -+ if (net_dev->ethtool_ops == &ndis_ethtool_ops -+ && event == NETDEV_CHANGENAME) { -+ struct ndis_device *wnd = netdev_priv(net_dev); -+ -+ /* called with rtnl lock held, so no need to lock */ -+ if (likely(wnd->procfs_iface)) { -+ printk(KERN_INFO "%s: interface renamed to '%s'\n", -+ DRIVER_NAME, net_dev->name); -+ wrap_procfs_remove_ndis_device(wnd); -+ wrap_procfs_add_ndis_device(wnd); -+ } -+ } -+ return NOTIFY_DONE; -+} -+ -+static struct notifier_block netdev_notifier = { -+ .notifier_call = notifier_event, -+}; -+ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 29) -+static const struct net_device_ops ndis_netdev_ops = { -+ .ndo_init = ndis_net_dev_init, -+ .ndo_uninit = ndis_net_dev_uninit, -+ .ndo_open = ndis_net_dev_open, -+ .ndo_stop = ndis_net_dev_close, -+ .ndo_start_xmit = tx_skbuff, -+ .ndo_change_mtu = ndis_change_mtu, -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 2, 0) -+ .ndo_set_rx_mode = ndis_set_multicast_list, -+#else -+ .ndo_set_multicast_list = ndis_set_multicast_list, -+#endif -+ .ndo_set_mac_address = ndis_set_mac_address, -+ .ndo_get_stats = ndis_get_stats, -+#ifdef CONFIG_NET_POLL_CONTROLLER -+ .ndo_poll_controller = ndis_poll_controller, -+#endif -+}; -+#endif -+ -+static NDIS_STATUS ndis_start_device(struct ndis_device *wnd) -+{ -+ struct wrap_device *wd; -+ struct net_device *net_dev; -+ NDIS_STATUS status; -+ char *buf; -+ const int buf_len = 256; -+ mac_address mac; -+ struct transport_header_offset *tx_header_offset; -+ int n; -+ -+ ENTER2("%d", in_atomic()); -+ status = mp_init(wnd); -+ if (status == NDIS_STATUS_NOT_RECOGNIZED) -+ EXIT1(return NDIS_STATUS_SUCCESS); -+ if (status != NDIS_STATUS_SUCCESS) -+ EXIT1(return status); -+ wd = wnd->wd; -+ net_dev = wnd->net_dev; -+ -+ get_supported_oids(wnd); -+ memset(mac, 0, sizeof(mac)); -+ status = mp_query(wnd, OID_802_3_CURRENT_ADDRESS, mac, sizeof(mac)); -+ if (memcmp(mac, "\x00\x00\x00\x00\x00\x00", sizeof(mac)) == 0) { -+ status = mp_query(wnd, OID_802_3_PERMANENT_ADDRESS, mac, -+ sizeof(mac)); -+ if (status != NDIS_STATUS_SUCCESS) { -+ ERROR("couldn't get mac address: %08X", status); -+ goto err_start; -+ } -+ } -+ TRACE1("mac:" MACSTRSEP, MAC2STR(mac)); -+ memcpy(net_dev->dev_addr, mac, ETH_ALEN); -+ -+ strncpy(net_dev->name, if_name, IFNAMSIZ - 1); -+ net_dev->name[IFNAMSIZ - 1] = 0; -+ -+ wnd->packet_filter = NDIS_PACKET_TYPE_DIRECTED | -+ NDIS_PACKET_TYPE_BROADCAST | NDIS_PACKET_TYPE_MULTICAST; -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 29) -+ net_dev->netdev_ops = &ndis_netdev_ops; -+#else -+ net_dev->init = ndis_net_dev_init; -+ net_dev->uninit = ndis_net_dev_uninit; -+ net_dev->open = ndis_net_dev_open; -+ net_dev->hard_start_xmit = tx_skbuff; -+ net_dev->stop = ndis_net_dev_close; -+ net_dev->get_stats = ndis_get_stats; -+ net_dev->change_mtu = ndis_change_mtu; -+ net_dev->set_multicast_list = ndis_set_multicast_list; -+ net_dev->set_mac_address = ndis_set_mac_address; -+#ifdef CONFIG_NET_POLL_CONTROLLER -+ net_dev->poll_controller = ndis_poll_controller; -+#endif -+#endif -+#ifdef CONFIG_WIRELESS_EXT -+ if (wnd->physical_medium == NdisPhysicalMediumWirelessLan) { -+ net_dev->wireless_handlers = &ndis_handler_def; -+ } -+#endif -+ net_dev->ethtool_ops = &ndis_ethtool_ops; -+ if (wnd->mp_interrupt) -+ net_dev->irq = wnd->mp_interrupt->irq; -+ net_dev->mem_start = wnd->mem_start; -+ net_dev->mem_end = wnd->mem_end; -+ status = mp_query_int(wnd, OID_802_3_MAXIMUM_LIST_SIZE, -+ &wnd->multicast_size); -+ if (status != NDIS_STATUS_SUCCESS || wnd->multicast_size < 0) -+ wnd->multicast_size = 0; -+ if (wnd->multicast_size > 0) -+ net_dev->flags |= IFF_MULTICAST; -+ else -+ net_dev->flags &= ~IFF_MULTICAST; -+ -+ buf = kmalloc(buf_len, GFP_KERNEL); -+ if (!buf) { -+ WARNING("couldn't allocate memory"); -+ goto err_start; -+ } -+ -+ set_task_offload(wnd, buf, buf_len); -+#ifdef NETIF_F_LLTX -+ net_dev->features |= NETIF_F_LLTX; -+#endif -+ -+ if (register_netdev(net_dev)) { -+ ERROR("cannot register net device %s", net_dev->name); -+ goto err_register; -+ } -+ memset(buf, 0, buf_len); -+ status = mp_query(wnd, OID_GEN_VENDOR_DESCRIPTION, buf, buf_len); -+ if (status != NDIS_STATUS_SUCCESS) { -+ WARNING("couldn't get vendor information: 0x%x", status); -+ buf[0] = 0; -+ } -+ wnd->drv_ndis_version = n = 0; -+ mp_query_int(wnd, OID_GEN_DRIVER_VERSION, &wnd->drv_ndis_version); -+ mp_query_int(wnd, OID_GEN_VENDOR_DRIVER_VERSION, &n); -+ -+ printk(KERN_INFO "%s: ethernet device " MACSTRSEP " using %sNDIS " -+ "driver: %s, version: 0x%x, NDIS version: 0x%x, vendor: '%s', " -+ "%s\n", net_dev->name, MAC2STR(net_dev->dev_addr), -+ deserialized_driver(wnd) ? "" : "serialized ", -+ wd->driver->name, n, wnd->drv_ndis_version, buf, -+ wd->conf_file_name); -+ -+ if (deserialized_driver(wnd)) { -+ /* deserialized drivers don't have a limit, but we -+ * keep max at TX_RING_SIZE */ -+ wnd->max_tx_packets = TX_RING_SIZE; -+ } else { -+ status = mp_query_int(wnd, OID_GEN_MAXIMUM_SEND_PACKETS, -+ &wnd->max_tx_packets); -+ if (status != NDIS_STATUS_SUCCESS) -+ wnd->max_tx_packets = 1; -+ if (wnd->max_tx_packets > TX_RING_SIZE) -+ wnd->max_tx_packets = TX_RING_SIZE; -+ } -+ TRACE2("maximum send packets: %d", wnd->max_tx_packets); -+ NdisAllocatePacketPoolEx(&status, &wnd->tx_packet_pool, -+ wnd->max_tx_packets, 0, -+ PROTOCOL_RESERVED_SIZE_IN_PACKET); -+ if (status != NDIS_STATUS_SUCCESS) { -+ ERROR("couldn't allocate packet pool"); -+ goto packet_pool_err; -+ } -+ NdisAllocateBufferPool(&status, &wnd->tx_buffer_pool, -+ wnd->max_tx_packets + 4); -+ if (status != NDIS_STATUS_SUCCESS) { -+ ERROR("couldn't allocate buffer pool"); -+ goto buffer_pool_err; -+ } -+ TRACE1("pool: %p", wnd->tx_buffer_pool); -+ -+ if (mp_query_int(wnd, OID_GEN_MAXIMUM_TOTAL_SIZE, &n) == -+ NDIS_STATUS_SUCCESS && n > ETH_HLEN) -+ ndis_change_mtu(wnd->net_dev, n - ETH_HLEN); -+ -+ if (mp_query_int(wnd, OID_GEN_MAC_OPTIONS, &n) == NDIS_STATUS_SUCCESS) -+ TRACE2("mac options supported: 0x%x", n); -+ -+ tx_header_offset = (typeof(tx_header_offset))buf; -+ tx_header_offset->protocol_type = NDIS_PROTOCOL_ID_TCP_IP; -+ tx_header_offset->header_offset = sizeof(ETH_HLEN); -+ status = mp_set(wnd, OID_GEN_TRANSPORT_HEADER_OFFSET, -+ tx_header_offset, sizeof(*tx_header_offset)); -+ TRACE2("%08X", status); -+ -+ status = mp_query_int(wnd, OID_GEN_PHYSICAL_MEDIUM, -+ &wnd->physical_medium); -+ if (status != NDIS_STATUS_SUCCESS) -+ wnd->physical_medium = NdisPhysicalMediumUnspecified; -+ -+#ifdef CONFIG_WIRELESS_EXT -+ if (wnd->physical_medium == NdisPhysicalMediumWirelessLan) { -+ mp_set_int(wnd, OID_802_11_POWER_MODE, NDIS_POWER_OFF); -+ get_encryption_capa(wnd, buf, buf_len); -+ TRACE1("capabilities = %ld", wnd->capa.encr); -+ printk(KERN_INFO "%s: encryption modes supported: " -+ "%s%s%s%s%s%s%s\n", net_dev->name, -+ test_bit(Ndis802_11Encryption1Enabled, &wnd->capa.encr) ? -+ "WEP" : "none", -+ -+ test_bit(Ndis802_11Encryption2Enabled, &wnd->capa.encr) ? -+ "; TKIP with WPA" : "", -+ test_bit(Ndis802_11AuthModeWPA2, &wnd->capa.auth) ? -+ ", WPA2" : "", -+ test_bit(Ndis802_11AuthModeWPA2PSK, &wnd->capa.auth) ? -+ ", WPA2-PSK" : "", -+ -+ test_bit(Ndis802_11Encryption3Enabled, &wnd->capa.encr) ? -+ "; AES/CCMP with WPA" : "", -+ test_bit(Ndis802_11AuthModeWPA2, &wnd->capa.auth) ? -+ ", WPA2" : "", -+ test_bit(Ndis802_11AuthModeWPA2PSK, &wnd->capa.auth) ? -+ ", WPA2-PSK" : ""); -+ -+ set_default_iw_params(wnd); -+ } -+#endif -+ kfree(buf); -+ hangcheck_add(wnd); -+ add_iw_stats_timer(wnd); -+ EXIT1(return NDIS_STATUS_SUCCESS); -+ -+buffer_pool_err: -+ wnd->tx_buffer_pool = NULL; -+ if (wnd->tx_packet_pool) { -+ NdisFreePacketPool(wnd->tx_packet_pool); -+ wnd->tx_packet_pool = NULL; -+ } -+packet_pool_err: -+ unregister_netdev(net_dev); -+ wnd->max_tx_packets = 0; -+err_register: -+ kfree(buf); -+err_start: -+ mp_halt(wnd); -+ EXIT1(return NDIS_STATUS_FAILURE); -+} -+ -+static int ndis_remove_device(struct ndis_device *wnd) -+{ -+ s8 tx_pending; -+ int our_mutex; -+ -+ /* prevent setting essid during disassociation */ -+ memset(&wnd->essid, 0, sizeof(wnd->essid)); -+ wnd->tx_ok = 0; -+ netif_carrier_off(wnd->net_dev); -+ if (wnd->max_tx_packets) -+ unregister_netdev(wnd->net_dev); -+ /* if device is suspended, but resume failed, tx_ring_mutex -+ * may already be locked */ -+ our_mutex = mutex_trylock(&wnd->tx_ring_mutex); -+ if (!our_mutex) -+ WARNING("couldn't obtain tx_ring_mutex"); -+ spin_lock_bh(&wnd->tx_ring_lock); -+ tx_pending = wnd->tx_ring_end - wnd->tx_ring_start; -+ if (tx_pending < 0) -+ tx_pending += TX_RING_SIZE; -+ else if (tx_pending == 0 && wnd->is_tx_ring_full) -+ tx_pending = TX_RING_SIZE - 1; -+ wnd->is_tx_ring_full = 0; -+ /* throw away pending packets */ -+ while (tx_pending-- > 0) { -+ struct ndis_packet *packet; -+ -+ packet = wnd->tx_ring[wnd->tx_ring_start]; -+ free_tx_packet(wnd, packet, NDIS_STATUS_CLOSING); -+ wnd->tx_ring_start = (wnd->tx_ring_start + 1) % TX_RING_SIZE; -+ } -+ spin_unlock_bh(&wnd->tx_ring_lock); -+ if (our_mutex) -+ mutex_unlock(&wnd->tx_ring_mutex); -+ mp_halt(wnd); -+ ndis_exit_device(wnd); -+ -+ if (wnd->tx_packet_pool) { -+ NdisFreePacketPool(wnd->tx_packet_pool); -+ wnd->tx_packet_pool = NULL; -+ } -+ if (wnd->tx_buffer_pool) { -+ NdisFreeBufferPool(wnd->tx_buffer_pool); -+ wnd->tx_buffer_pool = NULL; -+ } -+ kfree(wnd->pmkids); -+ printk(KERN_INFO "%s: device %s removed\n", DRIVER_NAME, -+ wnd->net_dev->name); -+ kfree(wnd->nmb); -+ free_netdev(wnd->net_dev); -+ EXIT2(return 0); -+} -+ -+static NTSTATUS ndis_add_device(struct driver_object *drv_obj, -+ struct device_object *pdo) -+{ -+ struct device_object *fdo; -+ struct ndis_mp_block *nmb; -+ NTSTATUS status; -+ struct ndis_device *wnd; -+ struct net_device *net_dev; -+ struct wrap_device *wd; -+ unsigned long i; -+ -+ ENTER2("%p, %p", drv_obj, pdo); -+ if (strlen(if_name) >= IFNAMSIZ) { -+ ERROR("interface name '%s' is too long", if_name); -+ return STATUS_INVALID_PARAMETER; -+ } -+ net_dev = alloc_etherdev(sizeof(*wnd)); -+ if (!net_dev) { -+ ERROR("couldn't allocate device"); -+ return STATUS_RESOURCES; -+ } -+ wd = pdo->reserved; -+ if (wrap_is_pci_bus(wd->dev_bus)) -+ SET_NETDEV_DEV(net_dev, &wd->pci.pdev->dev); -+ if (wrap_is_usb_bus(wd->dev_bus)) -+ SET_NETDEV_DEV(net_dev, &wd->usb.intf->dev); -+ status = IoCreateDevice(drv_obj, 0, NULL, FILE_DEVICE_UNKNOWN, 0, -+ FALSE, &fdo); -+ if (status != STATUS_SUCCESS) { -+ free_netdev(net_dev); -+ EXIT2(return status); -+ } -+ wnd = netdev_priv(net_dev); -+ TRACE1("wnd: %p", wnd); -+ -+ nmb = kmalloc(sizeof(*nmb), GFP_KERNEL); -+ if (!nmb) { -+ WARNING("couldn't allocate memory"); -+ IoDeleteDevice(fdo); -+ free_netdev(net_dev); -+ return STATUS_RESOURCES; -+ } -+#if DEBUG >= 6 -+ /* poison nmb so if a driver accesses uninitialized pointers, we -+ * know what it is */ -+ for (i = 0; i < sizeof(*nmb) / sizeof(unsigned long); i++) -+ ((unsigned long *)nmb)[i] = i + 0x8a3fc1; -+#endif -+ -+ wnd->nmb = nmb; -+ nmb->wnd = wnd; -+ nmb->pdo = pdo; -+ wnd->wd = wd; -+ wnd->net_dev = net_dev; -+ fdo->reserved = wnd; -+ nmb->fdo = fdo; -+ if (ndis_init_device(wnd)) { -+ IoDeleteDevice(fdo); -+ kfree(nmb); -+ free_netdev(net_dev); -+ EXIT1(return STATUS_RESOURCES); -+ } -+ nmb->next_device = IoAttachDeviceToDeviceStack(fdo, pdo); -+ spin_lock_init(&wnd->tx_ring_lock); -+ mutex_init(&wnd->tx_ring_mutex); -+ mutex_init(&wnd->ndis_req_mutex); -+ wnd->ndis_req_done = 0; -+ INIT_WORK(&wnd->tx_work, tx_worker); -+ wnd->tx_ring_start = 0; -+ wnd->tx_ring_end = 0; -+ wnd->is_tx_ring_full = 0; -+ wnd->capa.encr = 0; -+ wnd->capa.auth = 0; -+ wnd->attributes = 0; -+ wnd->dma_map_count = 0; -+ wnd->dma_map_addr = NULL; -+ wnd->nick[0] = 0; -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,15,0) -+ timer_setup(&wnd->hangcheck_timer, hangcheck_proc, 0); -+ timer_setup(&wnd->iw_stats_timer, hangcheck_proc, 0); -+#else -+ init_timer(&wnd->hangcheck_timer); -+ init_timer(&wnd->iw_stats_timer); -+#endif -+ wnd->scan_timestamp = 0; -+ wnd->iw_stats_interval = 10 * HZ; -+ wnd->ndis_pending_work = 0; -+ memset(&wnd->essid, 0, sizeof(wnd->essid)); -+ memset(&wnd->encr_info, 0, sizeof(wnd->encr_info)); -+ wnd->infrastructure_mode = Ndis802_11Infrastructure; -+ INIT_WORK(&wnd->ndis_work, wrapndis_worker); -+ wnd->iw_stats_enabled = TRUE; -+ -+ TRACE1("nmb: %p, pdo: %p, fdo: %p, attached: %p, next: %p", -+ nmb, pdo, fdo, fdo->attached, nmb->next_device); -+ -+ /* dispatch routines are called as Windows functions */ -+ for (i = 0; i <= IRP_MJ_MAXIMUM_FUNCTION; i++) -+ drv_obj->major_func[i] = WIN_FUNC_PTR(IoPassIrpDown,2); -+ -+ drv_obj->major_func[IRP_MJ_PNP] = WIN_FUNC_PTR(NdisDispatchPnp,2); -+ drv_obj->major_func[IRP_MJ_POWER] = WIN_FUNC_PTR(NdisDispatchPower,2); -+ drv_obj->major_func[IRP_MJ_INTERNAL_DEVICE_CONTROL] = -+ WIN_FUNC_PTR(NdisDispatchDeviceControl,2); -+// drv_obj->major_func[IRP_MJ_DEVICE_CONTROL] = -+// WIN_FUNC_PTR(NdisDispatchDeviceControl,2); -+ EXIT2(return STATUS_SUCCESS); -+} -+ -+int init_ndis_driver(struct driver_object *drv_obj) -+{ -+ ENTER1("%p", drv_obj); -+ drv_obj->drv_ext->add_device = ndis_add_device; -+ return 0; -+} -+ -+int wrapndis_init(void) -+{ -+ wrapndis_wq = create_singlethread_workqueue("wrapndis_wq"); -+ if (!wrapndis_wq) -+ EXIT1(return -ENOMEM); -+ TRACE1("wrapndis_wq: %p", wrapndis_wq); -+ register_netdevice_notifier(&netdev_notifier); -+ return 0; -+} -+ -+void wrapndis_exit(void) -+{ -+ unregister_netdevice_notifier(&netdev_notifier); -+ if (wrapndis_wq) -+ destroy_workqueue(wrapndis_wq); -+} -diff -Nurp linux-5.6.11/3rdparty/ndiswrapper/wrapndis.h linux-5.6.11-ndis/3rdparty/ndiswrapper/wrapndis.h ---- linux-5.6.11/3rdparty/ndiswrapper/wrapndis.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.6.11-ndis/3rdparty/ndiswrapper/wrapndis.h 2020-05-03 15:18:33.000000000 +0300 -@@ -0,0 +1,86 @@ -+/* -+ * Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ */ -+ -+#ifndef _WRAPNDIS_H_ -+#define _WRAPNDIS_H_ -+ -+#include "ndis.h" -+#include "pnp.h" -+ -+int wrapndis_init(void); -+void wrapndis_exit(void); -+ -+NDIS_STATUS mp_reset(struct ndis_device *wnd); -+ -+NDIS_STATUS mp_request(enum ndis_request_type request, -+ struct ndis_device *wnd, ndis_oid oid, -+ void *buf, ULONG buflen, ULONG *written, ULONG *needed); -+ -+static inline NDIS_STATUS mp_query_info(struct ndis_device *wnd, -+ ndis_oid oid, void *buf, ULONG buflen, -+ ULONG *written, ULONG *needed) -+{ -+ return mp_request(NdisRequestQueryInformation, wnd, oid, -+ buf, buflen, written, needed); -+} -+ -+static inline NDIS_STATUS mp_set_info(struct ndis_device *wnd, -+ ndis_oid oid, void *buf, ULONG buflen, -+ ULONG *written, ULONG *needed) -+{ -+ return mp_request(NdisRequestSetInformation, wnd, oid, -+ buf, buflen, written, needed); -+} -+ -+static inline NDIS_STATUS mp_query(struct ndis_device *wnd, ndis_oid oid, -+ void *buf, ULONG buflen) -+{ -+ return mp_request(NdisRequestQueryInformation, wnd, oid, -+ buf, buflen, NULL, NULL); -+} -+ -+static inline NDIS_STATUS mp_query_int(struct ndis_device *wnd, -+ ndis_oid oid, ULONG *data) -+{ -+ return mp_request(NdisRequestQueryInformation, wnd, oid, -+ data, sizeof(ULONG), NULL, NULL); -+} -+ -+static inline NDIS_STATUS mp_set(struct ndis_device *wnd, ndis_oid oid, -+ void *buf, ULONG buflen) -+{ -+ return mp_request(NdisRequestSetInformation, wnd, oid, -+ buf, buflen, NULL, NULL); -+} -+ -+static inline NDIS_STATUS mp_set_int(struct ndis_device *wnd, -+ ndis_oid oid, ULONG data) -+{ -+ return mp_request(NdisRequestSetInformation, wnd, oid, -+ &data, sizeof(ULONG), NULL, NULL); -+} -+ -+void free_tx_packet(struct ndis_device *wnd, struct ndis_packet *packet, -+ NDIS_STATUS status); -+int init_ndis_driver(struct driver_object *drv_obj); -+NDIS_STATUS ndis_reinit(struct ndis_device *wnd); -+void set_media_state(struct ndis_device *wnd, enum ndis_media_state state); -+ -+void hangcheck_add(struct ndis_device *wnd); -+void hangcheck_del(struct ndis_device *wnd); -+ -+struct iw_statistics *get_iw_stats(struct net_device *dev); -+ -+#endif -diff -Nurp linux-5.6.11/3rdparty/ndiswrapper/wrapper.c linux-5.6.11-ndis/3rdparty/ndiswrapper/wrapper.c ---- linux-5.6.11/3rdparty/ndiswrapper/wrapper.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.6.11-ndis/3rdparty/ndiswrapper/wrapper.c 2020-05-03 15:18:33.000000000 +0300 -@@ -0,0 +1,111 @@ -+/* -+ * Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ */ -+ -+#include "ndis.h" -+#include "iw_ndis.h" -+#include "loader.h" -+#include "pnp.h" -+#include "wrapper.h" -+ -+char *if_name = "wlan%d"; -+int proc_uid, proc_gid; -+int hangcheck_interval; -+static char *utils_version = UTILS_VERSION; -+int debug = DEBUG; -+ -+module_param(if_name, charp, 0400); -+MODULE_PARM_DESC(if_name, "Network interface name or template " -+ "(default: wlan%d)"); -+module_param(proc_uid, int, 0600); -+MODULE_PARM_DESC(proc_uid, "The uid of the files created in /proc " -+ "(default: 0)."); -+module_param(proc_gid, int, 0600); -+MODULE_PARM_DESC(proc_gid, "The gid of the files created in /proc " -+ "(default: 0)."); -+module_param(debug, int, 0600); -+MODULE_PARM_DESC(debug, "debug level"); -+ -+/* 0 - default value provided by NDIS driver, -+ * positive value - force hangcheck interval to that many seconds -+ * negative value - disable hangcheck -+ */ -+module_param(hangcheck_interval, int, 0600); -+MODULE_PARM_DESC(hangcheck_interval, "The interval, in seconds, for checking" -+ " if driver is hung. (default: 0)"); -+ -+module_param(utils_version, charp, 0400); -+MODULE_PARM_DESC(utils_version, "Compatible version of utils " -+ "(read only: " UTILS_VERSION ")"); -+ -+MODULE_AUTHOR("ndiswrapper team "); -+#ifdef MODULE_DESCRIPTION -+MODULE_DESCRIPTION("NDIS wrapper driver"); -+#endif -+#ifdef MODULE_VERSION -+MODULE_VERSION(DRIVER_VERSION); -+#endif -+MODULE_LICENSE("GPL"); -+ -+static void module_cleanup(void) -+{ -+ loader_exit(); -+ usb_exit(); -+ wrap_procfs_remove(); -+ wrapndis_exit(); -+ ndis_exit(); -+ ntoskernel_exit(); -+ wrapmem_exit(); -+} -+ -+static int __init wrapper_init(void) -+{ -+#ifdef TAINT_OOT_MODULE -+ add_taint(TAINT_OOT_MODULE, LOCKDEP_NOW_UNRELIABLE); -+#endif -+ printk(KERN_INFO "%s version %s loaded (smp=%s, preempt=%s)\n", -+ DRIVER_NAME, DRIVER_VERSION, -+#ifdef CONFIG_SMP -+ "yes" -+#else -+ "no" -+#endif -+ , -+#ifdef CONFIG_PREEMPT_RT -+ "rt" -+#elif defined(CONFIG_PREEMPT) -+ "yes" -+#else -+ "no" -+#endif -+ ); -+ -+ if (wrapmem_init() || ntoskernel_init() || ndis_init() || -+ wrapndis_init() || usb_init() || wrap_procfs_init() || -+ loader_init()) { -+ module_cleanup(); -+ ERROR("%s: initialization failed", DRIVER_NAME); -+ return -EINVAL; -+ } -+ EXIT1(return 0); -+} -+ -+static void __exit wrapper_exit(void) -+{ -+ ENTER1(""); -+ module_cleanup(); -+} -+ -+module_init(wrapper_init); -+module_exit(wrapper_exit); -diff -Nurp linux-5.6.11/3rdparty/ndiswrapper/wrapper.h linux-5.6.11-ndis/3rdparty/ndiswrapper/wrapper.h ---- linux-5.6.11/3rdparty/ndiswrapper/wrapper.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.6.11-ndis/3rdparty/ndiswrapper/wrapper.h 2020-05-03 15:18:33.000000000 +0300 -@@ -0,0 +1,24 @@ -+/* -+ * Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ */ -+ -+#ifndef WRAPPER_H -+#define WRAPPER_H -+ -+extern char *if_name; -+extern int proc_uid; -+extern int proc_gid; -+extern int hangcheck_interval; -+ -+#endif /* WRAPPER_H */ diff --git a/kernel/tools/cpupowertools/files/patches/mageia/3rd-ndiswrapper-Kconfig.patch b/kernel/tools/cpupowertools/files/patches/mageia/3rd-ndiswrapper-Kconfig.patch deleted file mode 100644 index f7d26e62..00000000 --- a/kernel/tools/cpupowertools/files/patches/mageia/3rd-ndiswrapper-Kconfig.patch +++ /dev/null @@ -1,7 +0,0 @@ ---- linux-2.6.24.orig/3rdparty/ndiswrapper/Kconfig 1969-12-31 21:00:00.000000000 -0300 -+++ linux-2.6.24/3rdparty/ndiswrapper/Kconfig 2007-11-26 15:11:31.000000000 -0200 -@@ -0,0 +1,4 @@ -+ -+config NDISWRAPPER -+ tristate "NDIS driver wrapper support" -+ depends on PCI && USB && !X86_64_XEN diff --git a/kernel/tools/cpupowertools/files/patches/mageia/3rd-ndiswrapper-Makefile-build-fix.patch b/kernel/tools/cpupowertools/files/patches/mageia/3rd-ndiswrapper-Makefile-build-fix.patch deleted file mode 100644 index b44f4b29..00000000 --- a/kernel/tools/cpupowertools/files/patches/mageia/3rd-ndiswrapper-Makefile-build-fix.patch +++ /dev/null @@ -1,45 +0,0 @@ ---- linux-3.12.2-ndiswrapper-1.59/3rdparty/ndiswrapper/Makefile.orig 2013-11-28 21:42:10.000000000 +0200 -+++ linux-3.12.2-ndiswrapper-1.59/3rdparty/ndiswrapper/Makefile 2013-11-30 21:41:19.550504380 +0200 -@@ -9,24 +9,10 @@ DISTFILES = \ - winnt_types.h workqueue.c wrapmem.c wrapmem.h wrapndis.c wrapndis.h \ - wrapper.c wrapper.h - --# By default, we try to compile the modules for the currently running --# kernel. But it's the first approximation, as we will re-read the --# version from the kernel sources. --KVERS_UNAME ?= $(shell uname -r) -- - # KBUILD is the path to the Linux kernel build tree. It is usually the - # same as the kernel source tree, except when the kernel was compiled in - # a separate directory. --KBUILD ?= $(shell readlink -f /lib/modules/$(KVERS_UNAME)/build) -- --ifeq (,$(KBUILD)) --$(error Kernel build tree not found - please set KBUILD to configured kernel) --endif -- --KCONFIG := $(KBUILD)/.config --ifeq (,$(wildcard $(KCONFIG))) --$(error No .config found in $(KBUILD), please set KBUILD to configured kernel) --endif -+KBUILD ?= $(srctree) - - ifneq (,$(wildcard $(KBUILD)/include/linux/version.h)) - ifneq (,$(wildcard $(KBUILD)/include/generated/uapi/linux/version.h)) -@@ -43,16 +29,9 @@ endif - ifeq (,$(wildcard $(VERSION_H))) - VERSION_H := $(KBUILD)/include/linux/version.h - endif --ifeq (,$(wildcard $(VERSION_H))) --$(error Please run 'make modules_prepare' in $(KBUILD)) --endif - - KVERS := $(shell sed -ne 's/"//g;s/^\#define UTS_RELEASE //p' $(VERSION_H)) - --ifeq (,$(KVERS)) --$(error Cannot find UTS_RELEASE in $(VERSION_H), please report) --endif -- - INST_DIR = /lib/modules/$(KVERS)/misc - - SRC_DIR=$(shell pwd) diff --git a/kernel/tools/cpupowertools/files/patches/mageia/3rd-niswrapper-Kconfig-Makefile.patch b/kernel/tools/cpupowertools/files/patches/mageia/3rd-niswrapper-Kconfig-Makefile.patch deleted file mode 100644 index a8c40d16..00000000 --- a/kernel/tools/cpupowertools/files/patches/mageia/3rd-niswrapper-Kconfig-Makefile.patch +++ /dev/null @@ -1,16 +0,0 @@ ---- linux/3rdparty/Kconfig.orig 2019-05-31 23:02:53.380127780 +0300 -+++ linux/3rdparty/Kconfig 2019-05-31 23:26:48.844304457 +0300 -@@ -2,4 +2,6 @@ - - menu "External 3rdparty kernel additions" - -+source "3rdparty/ndiswrapper/Kconfig" -+ - endmenu ---- linux/3rdparty/Makefile.orig 2019-05-31 23:03:58.338529850 +0300 -+++ linux/3rdparty/Makefile 2019-05-31 23:27:35.405319287 +0300 -@@ -1,3 +1,4 @@ - # - - obj- := 3rdparty.o # Dummy rule to force built-in.o to be made -+obj-$(CONFIG_NDISWRAPPER) += ndiswrapper/ diff --git a/kernel/tools/cpupowertools/files/patches/mageia/3rd-rtl8223de-kernel-5.6.patch b/kernel/tools/cpupowertools/files/patches/mageia/3rd-rtl8223de-kernel-5.6.patch deleted file mode 100644 index e79e34d6..00000000 --- a/kernel/tools/cpupowertools/files/patches/mageia/3rd-rtl8223de-kernel-5.6.patch +++ /dev/null @@ -1,244 +0,0 @@ -diff -urp linux-5.6.3/3rdparty/rtl8723de.orig/os_dep/linux/rtw_proc.c linux-5.6.3/3rdparty/rtl8723de/os_dep/linux/rtw_proc.c ---- linux-5.6.3/3rdparty/rtl8723de.orig/os_dep/linux/rtw_proc.c 2020-04-10 17:12:12.495541693 +0300 -+++ linux-5.6.3/3rdparty/rtl8723de/os_dep/linux/rtw_proc.c 2020-04-10 17:22:51.328340275 +0300 -@@ -68,12 +68,19 @@ inline struct proc_dir_entry *rtw_proc_c - return entry; - } - -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 6, 0)) -+inline struct proc_dir_entry *rtw_proc_create_entry(const char *name, struct proc_dir_entry *parent, -+ const struct proc_ops *pops, void * data) -+#else - inline struct proc_dir_entry *rtw_proc_create_entry(const char *name, struct proc_dir_entry *parent, - const struct file_operations *fops, void * data) -+#endif - { - struct proc_dir_entry *entry; - --#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 26)) -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 6, 0)) -+ entry = proc_create_data(name, S_IFREG | S_IRUGO | S_IWUGO, parent, pops, data); -+#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 26)) - entry = proc_create_data(name, S_IFREG | S_IRUGO | S_IWUGO, parent, fops, data); - #else - entry = create_proc_entry(name, S_IFREG | S_IRUGO | S_IWUGO, parent); -@@ -219,7 +226,24 @@ static ssize_t rtw_drv_proc_write(struct - return -EROFS; - } - --static const struct file_operations rtw_drv_proc_seq_fops = { -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 6, 0)) -+static const struct proc_ops rtw_drv_proc_seq_ops = { -+ .proc_open = rtw_drv_proc_open, -+ .proc_read = seq_read, -+ .proc_lseek = seq_lseek, -+ .proc_release = seq_release, -+ .proc_write = rtw_drv_proc_write, -+}; -+ -+static const struct proc_ops rtw_drv_proc_sseq_ops = { -+ .proc_open = rtw_drv_proc_open, -+ .proc_read = seq_read, -+ .proc_lseek = seq_lseek, -+ .proc_release = single_release, -+ .proc_write = rtw_drv_proc_write, -+}; -+#else -+static const struct file_operations rtw_drv_proc_seq_ops = { - .owner = THIS_MODULE, - .open = rtw_drv_proc_open, - .read = seq_read, -@@ -228,7 +252,7 @@ static const struct file_operations rtw_ - .write = rtw_drv_proc_write, - }; - --static const struct file_operations rtw_drv_proc_sseq_fops = { -+static const struct file_operations rtw_drv_proc_sseq_ops = { - .owner = THIS_MODULE, - .open = rtw_drv_proc_open, - .read = seq_read, -@@ -236,6 +260,7 @@ static const struct file_operations rtw_ - .release = single_release, - .write = rtw_drv_proc_write, - }; -+#endif - - int rtw_drv_proc_init(void) - { -@@ -257,9 +282,9 @@ int rtw_drv_proc_init(void) - - for (i = 0; i < drv_proc_hdls_num; i++) { - if (drv_proc_hdls[i].type == RTW_PROC_HDL_TYPE_SEQ) -- entry = rtw_proc_create_entry(drv_proc_hdls[i].name, rtw_proc, &rtw_drv_proc_seq_fops, (void *)i); -+ entry = rtw_proc_create_entry(drv_proc_hdls[i].name, rtw_proc, &rtw_drv_proc_seq_ops, (void *)i); - else if (drv_proc_hdls[i].type == RTW_PROC_HDL_TYPE_SSEQ) -- entry = rtw_proc_create_entry(drv_proc_hdls[i].name, rtw_proc, &rtw_drv_proc_sseq_fops, (void *)i); -+ entry = rtw_proc_create_entry(drv_proc_hdls[i].name, rtw_proc, &rtw_drv_proc_sseq_ops, (void *)i); - else - entry = NULL; - -@@ -2335,7 +2360,24 @@ static ssize_t rtw_adapter_proc_write(st - return -EROFS; - } - --static const struct file_operations rtw_adapter_proc_seq_fops = { -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 6, 0)) -+static const struct proc_ops rtw_adapter_proc_seq_ops = { -+ .proc_open = rtw_adapter_proc_open, -+ .proc_read = seq_read, -+ .proc_lseek = seq_lseek, -+ .proc_release = seq_release, -+ .proc_write = rtw_adapter_proc_write, -+}; -+ -+static const struct proc_ops rtw_adapter_proc_sseq_ops = { -+ .proc_open = rtw_adapter_proc_open, -+ .proc_read = seq_read, -+ .proc_lseek = seq_lseek, -+ .proc_release = single_release, -+ .proc_write = rtw_adapter_proc_write, -+}; -+#else -+static const struct file_operations rtw_adapter_proc_seq_ops = { - .owner = THIS_MODULE, - .open = rtw_adapter_proc_open, - .read = seq_read, -@@ -2344,7 +2386,7 @@ static const struct file_operations rtw_ - .write = rtw_adapter_proc_write, - }; - --static const struct file_operations rtw_adapter_proc_sseq_fops = { -+static const struct file_operations rtw_adapter_proc_sseq_ops = { - .owner = THIS_MODULE, - .open = rtw_adapter_proc_open, - .read = seq_read, -@@ -2352,6 +2394,7 @@ static const struct file_operations rtw_ - .release = single_release, - .write = rtw_adapter_proc_write, - }; -+#endif - - int proc_get_odm_dbg_comp(struct seq_file *m, void *v) - { -@@ -2670,7 +2713,24 @@ static ssize_t rtw_odm_proc_write(struct - return -EROFS; - } - --static const struct file_operations rtw_odm_proc_seq_fops = { -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 6, 0)) -+static const struct proc_ops rtw_odm_proc_seq_ops = { -+ .proc_open = rtw_odm_proc_open, -+ .proc_read = seq_read, -+ .proc_lseek = seq_lseek, -+ .proc_release = seq_release, -+ .proc_write = rtw_odm_proc_write, -+}; -+ -+static const struct proc_ops rtw_odm_proc_sseq_ops = { -+ .proc_open = rtw_odm_proc_open, -+ .proc_read = seq_read, -+ .proc_lseek = seq_lseek, -+ .proc_release = single_release, -+ .proc_write = rtw_odm_proc_write, -+}; -+#else -+static const struct file_operations rtw_odm_proc_seq_ops = { - .owner = THIS_MODULE, - .open = rtw_odm_proc_open, - .read = seq_read, -@@ -2679,7 +2739,7 @@ static const struct file_operations rtw_ - .write = rtw_odm_proc_write, - }; - --static const struct file_operations rtw_odm_proc_sseq_fops = { -+static const struct file_operations rtw_odm_proc_sseq_ops = { - .owner = THIS_MODULE, - .open = rtw_odm_proc_open, - .read = seq_read, -@@ -2687,6 +2747,7 @@ static const struct file_operations rtw_ - .release = single_release, - .write = rtw_odm_proc_write, - }; -+#endif - - struct proc_dir_entry *rtw_odm_proc_init(struct net_device *dev) - { -@@ -2715,9 +2776,9 @@ struct proc_dir_entry *rtw_odm_proc_init - - for (i = 0; i < odm_proc_hdls_num; i++) { - if (odm_proc_hdls[i].type == RTW_PROC_HDL_TYPE_SEQ) -- entry = rtw_proc_create_entry(odm_proc_hdls[i].name, dir_odm, &rtw_odm_proc_seq_fops, (void *)i); -+ entry = rtw_proc_create_entry(odm_proc_hdls[i].name, dir_odm, &rtw_odm_proc_seq_ops, (void *)i); - else if (odm_proc_hdls[i].type == RTW_PROC_HDL_TYPE_SSEQ) -- entry = rtw_proc_create_entry(odm_proc_hdls[i].name, dir_odm, &rtw_odm_proc_sseq_fops, (void *)i); -+ entry = rtw_proc_create_entry(odm_proc_hdls[i].name, dir_odm, &rtw_odm_proc_sseq_ops, (void *)i); - else - entry = NULL; - -@@ -2809,7 +2870,24 @@ static ssize_t rtw_mcc_proc_write(struct - return -EROFS; - } - --static const struct file_operations rtw_mcc_proc_seq_fops = { -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 6, 0)) -+static const struct proc_ops rtw_mcc_proc_seq_ops = { -+ .proc_open = rtw_mcc_proc_open, -+ .proc_read = seq_read, -+ .proc_lseek = seq_lseek, -+ .proc_release = seq_release, -+ .proc_write = rtw_mcc_proc_write, -+}; -+ -+static const struct file_operations rtw_mcc_proc_sseq_ops = { -+ .proc_open = rtw_mcc_proc_open, -+ .proc_read = seq_read, -+ .proc_lseek = seq_lseek, -+ .proc_release = single_release, -+ .proc_write = rtw_mcc_proc_write, -+}; -+#else -+static const struct file_operations rtw_mcc_proc_seq_ops = { - .owner = THIS_MODULE, - .open = rtw_mcc_proc_open, - .read = seq_read, -@@ -2818,7 +2896,7 @@ static const struct file_operations rtw_ - .write = rtw_mcc_proc_write, - }; - --static const struct file_operations rtw_mcc_proc_sseq_fops = { -+static const struct file_operations rtw_mcc_proc_sseq_ops = { - .owner = THIS_MODULE, - .open = rtw_mcc_proc_open, - .read = seq_read, -@@ -2826,6 +2904,7 @@ static const struct file_operations rtw_ - .release = single_release, - .write = rtw_mcc_proc_write, - }; -+#endif - - struct proc_dir_entry *rtw_mcc_proc_init(struct net_device *dev) - { -@@ -2854,9 +2933,9 @@ struct proc_dir_entry *rtw_mcc_proc_init - - for (i = 0; i < mcc_proc_hdls_num; i++) { - if (mcc_proc_hdls[i].type == RTW_PROC_HDL_TYPE_SEQ) -- entry = rtw_proc_create_entry(mcc_proc_hdls[i].name, dir_mcc, &rtw_mcc_proc_seq_fops, (void *)i); -+ entry = rtw_proc_create_entry(mcc_proc_hdls[i].name, dir_mcc, &rtw_mcc_proc_seq_ops, (void *)i); - else if (mcc_proc_hdls[i].type == RTW_PROC_HDL_TYPE_SSEQ) -- entry = rtw_proc_create_entry(mcc_proc_hdls[i].name, dir_mcc, &rtw_mcc_proc_sseq_fops, (void *)i); -+ entry = rtw_proc_create_entry(mcc_proc_hdls[i].name, dir_mcc, &rtw_mcc_proc_sseq_ops, (void *)i); - else - entry = NULL; - -@@ -2920,9 +2999,9 @@ struct proc_dir_entry *rtw_adapter_proc_ - - for (i = 0; i < adapter_proc_hdls_num; i++) { - if (adapter_proc_hdls[i].type == RTW_PROC_HDL_TYPE_SEQ) -- entry = rtw_proc_create_entry(adapter_proc_hdls[i].name, dir_dev, &rtw_adapter_proc_seq_fops, (void *)i); -+ entry = rtw_proc_create_entry(adapter_proc_hdls[i].name, dir_dev, &rtw_adapter_proc_seq_ops, (void *)i); - else if (adapter_proc_hdls[i].type == RTW_PROC_HDL_TYPE_SSEQ) -- entry = rtw_proc_create_entry(adapter_proc_hdls[i].name, dir_dev, &rtw_adapter_proc_sseq_fops, (void *)i); -+ entry = rtw_proc_create_entry(adapter_proc_hdls[i].name, dir_dev, &rtw_adapter_proc_sseq_ops, (void *)i); - else - entry = NULL; - diff --git a/kernel/tools/cpupowertools/files/patches/mageia/3rd-rtl8723de-Kconfig-Makefile.patch b/kernel/tools/cpupowertools/files/patches/mageia/3rd-rtl8723de-Kconfig-Makefile.patch deleted file mode 100644 index 8aa95703..00000000 --- a/kernel/tools/cpupowertools/files/patches/mageia/3rd-rtl8723de-Kconfig-Makefile.patch +++ /dev/null @@ -1,16 +0,0 @@ ---- linux/3rdparty/Kconfig.orig 2019-05-31 23:30:41.568375751 +0300 -+++ linux/3rdparty/Kconfig 2019-05-31 23:33:39.796256889 +0300 -@@ -4,5 +4,6 @@ menu "External 3rdparty kernel additions" - - source "3rdparty/ndiswrapper/Kconfig" - source "3rdparty/rtl8812au/Kconfig" -+source "3rdparty/rtl8723de/Kconfig" - - endmenu ---- linux/3rdparty/Makefile.orig 2019-05-31 23:33:17.610773901 +0300 -+++ linux/3rdparty/Makefile 2019-05-31 23:33:57.608644657 +0300 -@@ -3,3 +3,4 @@ - obj- := 3rdparty.o # Dummy rule to force built-in.o to be made - obj-$(CONFIG_NDISWRAPPER) += ndiswrapper/ - obj-$(CONFIG_RTL8812AU) += rtl8812au/ -+obj-$(CONFIG_RTL8723DE) += rtl8723de/ diff --git a/kernel/tools/cpupowertools/files/patches/mageia/3rd-rtl8723de-add-kernel-5.8-support.patch b/kernel/tools/cpupowertools/files/patches/mageia/3rd-rtl8723de-add-kernel-5.8-support.patch deleted file mode 100644 index 6786d4bd..00000000 --- a/kernel/tools/cpupowertools/files/patches/mageia/3rd-rtl8723de-add-kernel-5.8-support.patch +++ /dev/null @@ -1,79 +0,0 @@ ---- linux-5.8/3rdparty/rtl8723de/core/rtw_security.c -+++ linux-5.8/3rdparty/rtl8723de/core/rtw_security.c -@@ -33,6 +33,14 @@ static const char *_security_type_str[] = { - "BIP", - }; - -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 8, 0)) -+struct sha256_state { -+ u64 length; -+ u32 state[8], curlen; -+ u8 buf[64]; -+}; -+#endif -+ - const char *security_type_str(u8 value) - { - #ifdef CONFIG_IEEE80211W ---- linux-5.8/3rdparty/rtl8723de/include/rtw_security.h -+++ linux-5.8/3rdparty/rtl8723de/include/rtw_security.h -@@ -246,11 +246,13 @@ struct security_priv { - #endif /* DBG_SW_SEC_CNT */ - }; - -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 8, 0)) - struct sha256_state { - u64 length; - u32 state[8], curlen; - u8 buf[64]; - }; -+#endif - - #define GET_ENCRY_ALGO(psecuritypriv, psta, encry_algo, bmcst)\ - do {\ ---- linux-5.8/3rdparty/rtl8723de/os_dep/linux/ioctl_cfg80211.c -+++ linux-5.8/3rdparty/rtl8723de/os_dep/linux/ioctl_cfg80211.c -@@ -5857,10 +5857,18 @@ static void cfg80211_rtw_mgmt_frame_register(struct wiphy *wiphy, - #else - struct net_device *ndev, - #endif -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 8, 0)) -+ struct mgmt_frame_regs *upd) -+#else - u16 frame_type, bool reg) -+#endif - { - #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) - struct net_device *ndev = wdev_to_ndev(wdev); -+#endif -+/* hardcoded always true, to make it pass compilation */ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 8, 0)) -+ bool reg = true; - #endif - _adapter *adapter; - -@@ -5880,7 +5888,11 @@ static void cfg80211_rtw_mgmt_frame_register(struct wiphy *wiphy, - /* Wait QC Verify */ - return; - -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 8, 0)) -+ switch (upd->interface_stypes) { -+#else - switch (frame_type) { -+#endif - case IEEE80211_STYPE_PROBE_REQ: /* 0x0040 */ - SET_CFG80211_REPORT_MGMT(pwdev_priv, IEEE80211_STYPE_PROBE_REQ, reg); - break; -@@ -6846,7 +6858,11 @@ static struct cfg80211_ops rtw_cfg80211_ops = { - - #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE) - .mgmt_tx = cfg80211_rtw_mgmt_tx, -- .mgmt_frame_register = cfg80211_rtw_mgmt_frame_register, -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 8, 0)) -+ .update_mgmt_frame_registrations = cfg80211_rtw_mgmt_frame_register, -+#else -+ .mgmt_frame_register = cfg80211_rtw_mgmt_frame_register, -+#endif - #elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 34) && LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) - .action = cfg80211_rtw_mgmt_tx, - #endif diff --git a/kernel/tools/cpupowertools/files/patches/mageia/3rd-rtl8723de-fix-redefine.patch b/kernel/tools/cpupowertools/files/patches/mageia/3rd-rtl8723de-fix-redefine.patch deleted file mode 100644 index 5b80ce8b..00000000 --- a/kernel/tools/cpupowertools/files/patches/mageia/3rd-rtl8723de-fix-redefine.patch +++ /dev/null @@ -1,13 +0,0 @@ ---- linux/3rdparty/rtl8723de/include/wifi.h.orig 2019-01-19 16:29:26.302342688 +0200 -+++ linux/3rdparty/rtl8723de/include/wifi.h 2019-01-19 16:32:25.543905828 +0200 -@@ -1003,8 +1003,9 @@ typedef enum _HT_CAP_AMPDU_DENSITY { - * According to IEEE802.11n spec size varies from 8K to 64K (in powers of 2) - */ - #define IEEE80211_MIN_AMPDU_BUF 0x8 -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 19, 0)) - #define IEEE80211_MAX_AMPDU_BUF 0x40 -- -+#endif - - /* Spatial Multiplexing Power Save Modes */ - #define WLAN_HT_CAP_SM_PS_STATIC 0 diff --git a/kernel/tools/cpupowertools/files/patches/mageia/3rd-rtl8723de-nodebug.patch b/kernel/tools/cpupowertools/files/patches/mageia/3rd-rtl8723de-nodebug.patch deleted file mode 100644 index 2f543ee4..00000000 --- a/kernel/tools/cpupowertools/files/patches/mageia/3rd-rtl8723de-nodebug.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- ./3rdparty/rtl8723de/Makefile.orig 2019-10-08 13:51:56.729205790 +0300 -+++ ./3rdparty/rtl8723de/Makefile 2019-10-08 14:03:32.894164296 +0300 -@@ -74,7 +74,7 @@ CONFIG_APPEND_VENDOR_IE_ENABLE = n - CONFIG_RTW_NAPI = y - CONFIG_RTW_GRO = y - ########################## Debug ########################### --CONFIG_RTW_DEBUG = y -+CONFIG_RTW_DEBUG = n - # default log level is _DRV_INFO_ = 4, - # please refer to "How_to_set_driver_debug_log_level.doc" to set the available level. - CONFIG_RTW_LOG_LEVEL = 4 diff --git a/kernel/tools/cpupowertools/files/patches/mageia/3rd-rtl8812au-Kconfig-Makefile.patch b/kernel/tools/cpupowertools/files/patches/mageia/3rd-rtl8812au-Kconfig-Makefile.patch deleted file mode 100644 index 697c6958..00000000 --- a/kernel/tools/cpupowertools/files/patches/mageia/3rd-rtl8812au-Kconfig-Makefile.patch +++ /dev/null @@ -1,16 +0,0 @@ ---- linux/3rdparty/Kconfig.orig 2019-05-31 23:26:48.844304457 +0300 -+++ linux/3rdparty/Kconfig 2019-05-31 23:30:41.568375751 +0300 -@@ -3,5 +3,6 @@ - menu "External 3rdparty kernel additions" - - source "3rdparty/ndiswrapper/Kconfig" -+source "3rdparty/rtl8812au/Kconfig" - - endmenu ---- linux/3rdparty/Makefile.orig 2019-05-31 23:27:35.405319287 +0300 -+++ linux/3rdparty/Makefile 2019-05-31 23:30:56.855708733 +0300 -@@ -2,3 +2,4 @@ - - obj- := 3rdparty.o # Dummy rule to force built-in.o to be made - obj-$(CONFIG_NDISWRAPPER) += ndiswrapper/ -+obj-$(CONFIG_RTL8812AU) += rtl8812au/ diff --git a/kernel/tools/cpupowertools/files/patches/mageia/3rd-rtl8812au-kernel-5.10.patch b/kernel/tools/cpupowertools/files/patches/mageia/3rd-rtl8812au-kernel-5.10.patch deleted file mode 100644 index da512338..00000000 --- a/kernel/tools/cpupowertools/files/patches/mageia/3rd-rtl8812au-kernel-5.10.patch +++ /dev/null @@ -1,281 +0,0 @@ -From ee9619ba0c8840db6d59d11989c31e24a8f0d806 Mon Sep 17 00:00:00 2001 -From: Carlos -Date: Sun, 8 Nov 2020 12:25:43 +0000 -Subject: [PATCH] Fix kernel 5.10-rc1 - ---- - 3rdparty/rtl8812au/core/rtw_btcoex.c | 7 ++++++- - 3rdparty/rtl8812au/core/rtw_wlan_util.c | 10 ++++++---- - 3rdparty/rtl8812au/os_dep/linux/os_intfs.c | 19 +++++++++++++----- - 3rdparty/rtl8812au/os_dep/osdep_service.c | 43 +++++++++++++++++++++++++++-------------- - 4 files changed, 54 insertions(+), 25 deletions(-) - -diff --git a/3rdparty/rtl8812au/core/rtw_btcoex.c b/3rdparty/rtl8812au/core/rtw_btcoex.c -index d5b89bdc..f5e0f567 100644 ---- a/3rdparty/rtl8812au/core/rtw_btcoex.c -+++ b/3rdparty/rtl8812au/core/rtw_btcoex.c -@@ -1443,7 +1443,9 @@ u8 rtw_btcoex_sendmsgbysocket(_adapter *padapter, u8 *msg, u8 msg_size, bool for - { - u8 error; - struct msghdr udpmsg; -+#ifdef set_fs - mm_segment_t oldfs; -+#endif - struct iovec iov; - struct bt_coex_info *pcoex_info = &padapter->coex_info; - -@@ -1473,15 +1475,18 @@ u8 rtw_btcoex_sendmsgbysocket(_adapter *padapter, u8 *msg, u8 msg_size, bool for - udpmsg.msg_control = NULL; - udpmsg.msg_controllen = 0; - udpmsg.msg_flags = MSG_DONTWAIT | MSG_NOSIGNAL; -+#ifdef set_fs - oldfs = get_fs(); - set_fs(KERNEL_DS); -- -+#endif - #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 1, 0)) - error = sock_sendmsg(pcoex_info->udpsock, &udpmsg); - #else - error = sock_sendmsg(pcoex_info->udpsock, &udpmsg, msg_size); - #endif -+#ifdef set_fs - set_fs(oldfs); -+#endif - if (error < 0) { - RTW_INFO("Error when sendimg msg, error:%d\n", error); - return _FAIL; -diff --git a/3rdparty/rtl8812au/core/rtw_wlan_util.c b/3rdparty/rtl8812au/core/rtw_wlan_util.c -index b4cecd11..e465e9b5 100644 ---- a/3rdparty/rtl8812au/core/rtw_wlan_util.c -+++ b/3rdparty/rtl8812au/core/rtw_wlan_util.c -@@ -4744,7 +4744,9 @@ int rtw_dev_nlo_info_set(struct pno_nlo_info *nlo_info, pno_ssid_t *ssid, - - int i = 0; - struct file *fp; -+#ifdef set_fs - mm_segment_t fs; -+#endif - loff_t pos = 0; - u8 *source = NULL; - long len = 0; -@@ -4780,10 +4782,10 @@ int rtw_dev_nlo_info_set(struct pno_nlo_info *nlo_info, pno_ssid_t *ssid, - RTW_INFO("Error, cipher array using default value.\n"); - return 0; - } -- -+#ifdef set_fs - fs = get_fs(); - set_fs(KERNEL_DS); -- -+#endif - source = rtw_zmalloc(2048); - - if (source != NULL) { -@@ -4791,10 +4793,10 @@ int rtw_dev_nlo_info_set(struct pno_nlo_info *nlo_info, pno_ssid_t *ssid, - rtw_parse_cipher_list(nlo_info, source); - rtw_mfree(source, 2048); - } -- -+#ifdef set_fs - set_fs(fs); - filp_close(fp, NULL); -- -+#endif - RTW_INFO("-%s-\n", __func__); - return 0; - } -diff --git a/3rdparty/rtl8812au/os_dep/linux/os_intfs.c b/3rdparty/rtl8812au/os_dep/linux/os_intfs.c -index 1085d6cd..a37e488b 100644 ---- a/3rdparty/rtl8812au/os_dep/linux/os_intfs.c -+++ b/3rdparty/rtl8812au/os_dep/linux/os_intfs.c -@@ -4029,7 +4029,9 @@ static int route_dump(u32 *gw_addr , int *gw_index) - struct msghdr msg; - struct iovec iov; - struct sockaddr_nl nladdr; -+#ifdef set_fs - mm_segment_t oldfs; -+#endif - char *pg; - int size = 0; - -@@ -4067,16 +4069,18 @@ static int route_dump(u32 *gw_addr , int *gw_index) - msg.msg_control = NULL; - msg.msg_controllen = 0; - msg.msg_flags = MSG_DONTWAIT; -- -+#ifdef set_fs - oldfs = get_fs(); - set_fs(KERNEL_DS); -+#endif - #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 1, 0)) - err = sock_sendmsg(sock, &msg); - #else - err = sock_sendmsg(sock, &msg, sizeof(req)); - #endif -+#ifdef set_fs - set_fs(oldfs); -- -+#endif - if (err < 0) - goto out_sock; - -@@ -4099,16 +4103,18 @@ static int route_dump(u32 *gw_addr , int *gw_index) - #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 19, 0)) - iov_iter_init(&msg.msg_iter, READ, &iov, 1, PAGE_SIZE); - #endif -- -+#ifdef set_fs - oldfs = get_fs(); - set_fs(KERNEL_DS); -+#endif - #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 7, 0)) - err = sock_recvmsg(sock, &msg, MSG_DONTWAIT); - #else - err = sock_recvmsg(sock, &msg, PAGE_SIZE, MSG_DONTWAIT); - #endif -+#ifdef set_fs - set_fs(oldfs); -- -+#endif - if (err < 0) - goto out_sock_pg; - -@@ -4178,15 +4184,18 @@ static int route_dump(u32 *gw_addr , int *gw_index) - msg.msg_controllen = 0; - msg.msg_flags = MSG_DONTWAIT; - -+#ifdef set_fs - oldfs = get_fs(); - set_fs(KERNEL_DS); -+#endif - #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 1, 0)) - err = sock_sendmsg(sock, &msg); - #else - err = sock_sendmsg(sock, &msg, sizeof(req)); - #endif -+#ifdef set_fs - set_fs(oldfs); -- -+#endif - if (err > 0) - goto restart; - } -diff --git a/3rdparty/rtl8812au/os_dep/osdep_service.c b/3rdparty/rtl8812au/os_dep/osdep_service.c -index 7c6d1208..0769b49d 100644 ---- a/3rdparty/rtl8812au/os_dep/osdep_service.c -+++ b/3rdparty/rtl8812au/os_dep/osdep_service.c -@@ -2164,11 +2164,21 @@ static int writeFile(struct file *fp, char *buf, int len) - { - int wlen = 0, sum = 0; - -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 1, 0)) -+ if (!(fp->f_mode & FMODE_CAN_WRITE)) -+#else - if (!fp->f_op || !fp->f_op->write) -+#endif - return -EPERM; - - while (sum < len) { -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 14, 0)) -+ wlen = kernel_write(fp, buf + sum, len - sum, &fp->f_pos); -+#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 1, 0)) -+ wlen = __vfs_write(fp, buf + sum, len - sum, &fp->f_pos); -+#else - wlen = fp->f_op->write(fp, buf + sum, len - sum, &fp->f_pos); -+#endif - if (wlen > 0) - sum += wlen; - else if (0 != wlen) -@@ -2191,19 +2201,19 @@ static int isFileReadable(const char *path, u32 *sz) - { - struct file *fp; - int ret = 0; -+#ifdef set_fs - mm_segment_t oldfs; -+#endif - char buf; - - fp = filp_open(path, O_RDONLY, 0); - if (IS_ERR(fp)) - ret = PTR_ERR(fp); - else { -+#ifdef set_fs - oldfs = get_fs(); -- #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 1, 0)) - set_fs(KERNEL_DS); -- #else -- set_fs(get_ds()); -- #endif -+#endif - - if (1 != readFile(fp, &buf, 1)) - ret = PTR_ERR(fp); -@@ -2215,8 +2225,9 @@ static int isFileReadable(const char *path, u32 *sz) - *sz = i_size_read(fp->f_dentry->d_inode); - #endif - } -- -+#ifdef set_fs - set_fs(oldfs); -+#endif - filp_close(fp, NULL); - } - return ret; -@@ -2232,22 +2243,23 @@ static int isFileReadable(const char *path, u32 *sz) - static int retriveFromFile(const char *path, u8 *buf, u32 sz) - { - int ret = -1; -+#ifdef set_fs - mm_segment_t oldfs; -+#endif - struct file *fp; - - if (path && buf) { - ret = openFile(&fp, path, O_RDONLY, 0); - if (0 == ret) { - RTW_INFO("%s openFile path:%s fp=%p\n", __FUNCTION__, path , fp); -- -+#ifdef set_fs - oldfs = get_fs(); -- #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 1, 0)) - set_fs(KERNEL_DS); -- #else -- set_fs(get_ds()); -- #endif - ret = readFile(fp, buf, sz); - set_fs(oldfs); -+#else -+ ret = readFile(fp, buf, sz); -+#endif - closeFile(fp); - - RTW_INFO("%s readFile, ret:%d\n", __FUNCTION__, ret); -@@ -2271,22 +2283,23 @@ static int retriveFromFile(const char *path, u8 *buf, u32 sz) - static int storeToFile(const char *path, u8 *buf, u32 sz) - { - int ret = 0; -+#ifdef set_fs - mm_segment_t oldfs; -+#endif - struct file *fp; - - if (path && buf) { - ret = openFile(&fp, path, O_CREAT | O_WRONLY, 0666); - if (0 == ret) { - RTW_INFO("%s openFile path:%s fp=%p\n", __FUNCTION__, path , fp); -- -+#ifdef set_fs - oldfs = get_fs(); -- #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 1, 0)) - set_fs(KERNEL_DS); -- #else -- set_fs(get_ds()); -- #endif - ret = writeFile(fp, buf, sz); - set_fs(oldfs); -+#else -+ ret = writeFile(fp, buf, sz); -+#endif - closeFile(fp); - - RTW_INFO("%s writeFile, ret:%d\n", __FUNCTION__, ret); diff --git a/kernel/tools/cpupowertools/files/patches/mageia/3rd-rtl8812au-kernel-5.12.patch b/kernel/tools/cpupowertools/files/patches/mageia/3rd-rtl8812au-kernel-5.12.patch deleted file mode 100644 index c53561cf..00000000 --- a/kernel/tools/cpupowertools/files/patches/mageia/3rd-rtl8812au-kernel-5.12.patch +++ /dev/null @@ -1,12 +0,0 @@ -diff -urp linux/3rdparty/rtl8812au.orig/os_dep/linux/recv_linux.c linux/3rdparty/rtl8812au/os_dep/linux/recv_linux.c ---- linux/3rdparty/rtl8812au.orig/os_dep/linux/recv_linux.c 2021-04-26 18:35:37.411027594 +0300 -+++ linux/3rdparty/rtl8812au/os_dep/linux/recv_linux.c 2021-04-26 18:53:13.502814526 +0300 -@@ -353,7 +353,7 @@ static int napi_recv(_adapter *padapter, - - rx_ok = _FALSE; - --#ifdef CONFIG_RTW_GRO -+#if defined(CONFIG_RTW_GRO) && LINUX_VERSION_CODE < KERNEL_VERSION(5, 12, 0) - if (pregistrypriv->en_gro) { - if (rtw_napi_gro_receive(&padapter->napi, pskb) != GRO_DROP) - rx_ok = _TRUE; diff --git a/kernel/tools/cpupowertools/files/patches/mageia/3rd-rtl8812au-kernel-5.15.patch b/kernel/tools/cpupowertools/files/patches/mageia/3rd-rtl8812au-kernel-5.15.patch deleted file mode 100644 index 86a002fe..00000000 --- a/kernel/tools/cpupowertools/files/patches/mageia/3rd-rtl8812au-kernel-5.15.patch +++ /dev/null @@ -1,66 +0,0 @@ - -From: -https://github.com/aircrack-ng/rtl8812au/commit/47a38b7c736dd9e9baac9eb07a6dceb83429fb49 - -diff -Nurp linux-5.15/3rdparty/rtl8812au.orig/core/rtw_br_ext.c linux-5.15/3rdparty/rtl8812au/core/rtw_br_ext.c ---- linux-5.15/3rdparty/rtl8812au.orig/core/rtw_br_ext.c 2021-11-08 23:40:48.236272741 +0200 -+++ linux-5.15/3rdparty/rtl8812au/core/rtw_br_ext.c 2021-11-08 23:49:12.118046953 +0200 -@@ -17,7 +17,10 @@ - #ifdef __KERNEL__ - #include - #include -+ #include -+#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 15, 0) - #include -+#endif - #include - #include - #include -@@ -169,6 +172,7 @@ static __inline__ void __nat25_generate_ - } - - -+#ifdef _NET_INET_IPX_H_ - static __inline__ void __nat25_generate_ipx_network_addr_with_node(unsigned char *networkAddr, - unsigned int *ipxNetAddr, unsigned char *ipxNodeAddr) - { -@@ -189,6 +193,7 @@ static __inline__ void __nat25_generate_ - memcpy(networkAddr + 1, (unsigned char *)ipxNetAddr, 4); - memcpy(networkAddr + 5, (unsigned char *)ipxSocketAddr, 2); - } -+#endif - - - static __inline__ void __nat25_generate_apple_network_addr(unsigned char *networkAddr, -@@ -330,6 +335,7 @@ static __inline__ int __nat25_network_ha - x = networkAddr[7] ^ networkAddr[8] ^ networkAddr[9] ^ networkAddr[10]; - - return x & (NAT25_HASH_SIZE - 1); -+#ifdef _NET_INET_IPX_H_ - } else if (networkAddr[0] == NAT25_IPX) { - unsigned long x; - -@@ -337,6 +343,7 @@ static __inline__ int __nat25_network_ha - networkAddr[6] ^ networkAddr[7] ^ networkAddr[8] ^ networkAddr[9] ^ networkAddr[10]; - - return x & (NAT25_HASH_SIZE - 1); -+#endif - } else if (networkAddr[0] == NAT25_APPLE) { - unsigned long x; - -@@ -889,6 +896,7 @@ int nat25_db_handle(_adapter *priv, stru - } - } - -+#ifdef _NET_INET_IPX_H_ - /*---------------------------------------------------*/ - /* Handle IPX and Apple Talk frame */ - /*---------------------------------------------------*/ -@@ -1109,6 +1117,7 @@ int nat25_db_handle(_adapter *priv, stru - - return -1; - } -+#endif - - /*---------------------------------------------------*/ - /* Handle PPPoE frame */ diff --git a/kernel/tools/cpupowertools/files/patches/mageia/3rd-rtl8812au-rename.patch b/kernel/tools/cpupowertools/files/patches/mageia/3rd-rtl8812au-rename.patch deleted file mode 100644 index bcf02987..00000000 --- a/kernel/tools/cpupowertools/files/patches/mageia/3rd-rtl8812au-rename.patch +++ /dev/null @@ -1,78 +0,0 @@ - -Adjust driver bits so it keeps the name of the replaced driver - -Signed-off-by: Thomas Backlund - ---- - 3rdparty/rtl8812au/Kconfig | 7 +++---- - 3rdparty/rtl8812au/Makefile | 8 ++++---- - 3rdparty/rtl8812au/hal/hal_com.c | 2 +- - 3rdparty/rtl8812au/os_dep/linux/ioctl_cfg80211.c | 2 +- - 4 files changed, 9 insertions(+), 10 deletions(-) - -diff -Nurp linux-5.11/3rdparty/rtl8812au.orig/hal/hal_com.c linux-5.11/3rdparty/rtl8812au/hal/hal_com.c ---- linux-5.11/3rdparty/rtl8812au.orig/hal/hal_com.c 2021-03-07 18:43:20.313672664 +0200 -+++ linux-5.11/3rdparty/rtl8812au/hal/hal_com.c 2021-03-07 18:43:51.392141299 +0200 -@@ -12879,7 +12879,7 @@ bypass_hw_pg: - _rtw_memset(hal_data->EEPROMMACAddr, 0, ETH_ALEN); - ret = _FAIL; - exit: -- dev_info(&udev->dev, "88XXau %pM hw_info[%02x]", hw_addr, addr_offset); -+ dev_info(&udev->dev, "8812au %pM hw_info[%02x]", hw_addr, addr_offset); - return ret; - } - -diff -Nurp linux-5.11/3rdparty/rtl8812au.orig/Kconfig linux-5.11/3rdparty/rtl8812au/Kconfig ---- linux-5.11/3rdparty/rtl8812au.orig/Kconfig 2021-03-07 18:43:20.369675309 +0200 -+++ linux-5.11/3rdparty/rtl8812au/Kconfig 2021-03-07 18:45:22.910465892 +0200 -@@ -1,6 +1,5 @@ --config 88XXAU -- tristate "Realtek 88XXau USB WiFi" -+config RTL8812AU -+ tristate "Realtek 8812au USB WiFi" - depends on USB - help -- Help message of 88XXau -- -+ Help message of 8812au -diff -Nurp linux-5.11/3rdparty/rtl8812au.orig/Makefile linux-5.11/3rdparty/rtl8812au/Makefile ---- linux-5.11/3rdparty/rtl8812au.orig/Makefile 2021-03-07 18:43:20.370675357 +0200 -+++ linux-5.11/3rdparty/rtl8812au/Makefile 2021-03-07 18:43:51.401141725 +0200 -@@ -180,9 +180,9 @@ endif - - ifeq ($(CONFIG_RTL8812A)_$(CONFIG_RTL8821A)_$(CONFIG_RTL8814A), y_y_n) - --EXTRA_CFLAGS += -DDRV_NAME=\"rtl88XXau\" -+EXTRA_CFLAGS += -DDRV_NAME=\"rtl8812au\" - ifeq ($(CONFIG_USB_HCI), y) --USER_MODULE_NAME = 88XXau -+USER_MODULE_NAME = 8812au - endif - else - EXTRA_CFLAGS += -DDRV_NAME=\"rtl8812au\" -@@ -2232,11 +2232,11 @@ $(MODULE_NAME)-y += $(_PLATFORM_FILES) - - $(MODULE_NAME)-$(CONFIG_MP_INCLUDED) += core/rtw_mp.o - --obj-$(CONFIG_88XXAU) := $(MODULE_NAME).o -+obj-$(CONFIG_RTL8812AU) := $(MODULE_NAME).o - - else - --export CONFIG_88XXAU = m -+export CONFIG_RTL8812AU = m - - all: modules - -diff -Nurp linux-5.11/3rdparty/rtl8812au.orig/os_dep/linux/ioctl_cfg80211.c linux-5.11/3rdparty/rtl8812au/os_dep/linux/ioctl_cfg80211.c ---- linux-5.11/3rdparty/rtl8812au.orig/os_dep/linux/ioctl_cfg80211.c 2021-03-07 18:43:20.371675404 +0200 -+++ linux-5.11/3rdparty/rtl8812au/os_dep/linux/ioctl_cfg80211.c 2021-03-07 18:43:51.402141772 +0200 -@@ -2646,7 +2646,7 @@ void rtw_cfg80211_unlink_bss(_adapter *p - #endif - - if (!wiphy) { -- pr_info("88XXAU: rtw_cfg80211_unlink_bss: wiphy is NULL\n"); -+ pr_info("8812AU: rtw_cfg80211_unlink_bss: wiphy is NULL\n"); - return; - } - diff --git a/kernel/tools/cpupowertools/files/patches/mageia/3rd-rtl8821ce-5.8-fix.patch b/kernel/tools/cpupowertools/files/patches/mageia/3rd-rtl8821ce-5.8-fix.patch deleted file mode 100644 index 707d15de..00000000 --- a/kernel/tools/cpupowertools/files/patches/mageia/3rd-rtl8821ce-5.8-fix.patch +++ /dev/null @@ -1,301 +0,0 @@ -diff -up linux-5.8/3rdparty/rtl8821ce/core/rtw_security.c.kernel58 linux-5.8/3rdparty/rtl8821ce/core/rtw_security.c ---- linux-5.8/3rdparty/rtl8821ce/core/rtw_security.c.kernel58 2020-08-12 18:12:12.492276511 +0200 -+++ linux-5.8/3rdparty/rtl8821ce/core/rtw_security.c 2020-08-12 18:13:07.202678858 +0200 -@@ -2133,7 +2133,7 @@ BIP_exit: - #ifndef PLATFORM_FREEBSD - #if defined(CONFIG_TDLS) - /* compress 512-bits */ --static int sha256_compress(struct _sha256_state *md, unsigned char *buf) -+static int sha256_compress(struct sha256_state *md, unsigned char *buf) - { - u32 S[8], W[64], t0, t1; - u32 t; -@@ -2181,7 +2181,7 @@ static int sha256_compress(struct _sha25 - } - - /* Initialize the hash state */ --static void sha256_init(struct _sha256_state *md) -+static void sha256_init(struct sha256_state *md) - { - md->curlen = 0; - md->length = 0; -@@ -2202,7 +2202,7 @@ static void sha256_init(struct _sha256_s - @param inlen The length of the data (octets) - @return CRYPT_OK if successful - */ --static int sha256_process(struct _sha256_state *md, unsigned char *in, -+static int sha256_process(struct sha256_state *md, unsigned char *in, - unsigned long inlen) - { - unsigned long n; -@@ -2243,7 +2243,7 @@ static int sha256_process(struct _sha256 - @param out [out] The destination of the hash (32 bytes) - @return CRYPT_OK if successful - */ --static int sha256_done(struct _sha256_state *md, unsigned char *out) -+static int sha256_done(struct sha256_state *md, unsigned char *out) - { - int i; - -@@ -2293,7 +2293,7 @@ static int sha256_done(struct _sha256_st - static int sha256_vector(size_t num_elem, u8 *addr[], size_t *len, - u8 *mac) - { -- struct _sha256_state ctx; -+ struct sha256_state ctx; - size_t i; - - sha256_init(&ctx); -diff -up linux-5.8/3rdparty/rtl8821ce/include/rtw_security.h.kernel58 linux-5.8/3rdparty/rtl8821ce/include/rtw_security.h ---- linux-5.8/3rdparty/rtl8821ce/include/rtw_security.h.kernel58 2020-08-12 18:12:12.860279218 +0200 -+++ linux-5.8/3rdparty/rtl8821ce/include/rtw_security.h 2020-08-12 18:13:07.202678858 +0200 -@@ -249,11 +249,13 @@ struct security_priv { - #define SEC_IS_BIP_KEY_INSTALLED(sec) _FALSE - #endif - --struct _sha256_state { -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 8, 0)) -+struct sha256_state { - u64 length; - u32 state[8], curlen; - u8 buf[64]; - }; -+#endif - - #define GET_ENCRY_ALGO(psecuritypriv, psta, encry_algo, bmcst)\ - do {\ -diff -up linux-5.8/3rdparty/rtl8821ce/os_dep/linux/ioctl_cfg80211.c.kernel58 linux-5.8/3rdparty/rtl8821ce/os_dep/linux/ioctl_cfg80211.c ---- linux-5.8/3rdparty/rtl8821ce/os_dep/linux/ioctl_cfg80211.c.kernel58 2020-08-12 18:12:12.867279269 +0200 -+++ linux-5.8/3rdparty/rtl8821ce/os_dep/linux/ioctl_cfg80211.c 2020-08-12 18:13:07.204678873 +0200 -@@ -80,7 +80,7 @@ - #endif - - /* -- * In the current design of Wi-Fi driver, it will return success to the system (e.g. supplicant) -+ * In the current design of Wi-Fi driver, it will return success to the system (e.g. supplicant) - * when Wi-Fi driver decides to abort the scan request in the scan flow by default. - * Defining this flag makes Wi-Fi driver to return -EBUSY to the system if Wi-Fi driver is too busy to do the scan. - */ -@@ -321,7 +321,7 @@ static u8 rtw_chbw_to_cfg80211_chan_def( - if (!chan) - goto exit; - -- if (bw == CHANNEL_WIDTH_20) -+ if (bw == CHANNEL_WIDTH_20) - chdef->width = ht ? NL80211_CHAN_WIDTH_20 : NL80211_CHAN_WIDTH_20_NOHT; - else if (bw == CHANNEL_WIDTH_40) - chdef->width = NL80211_CHAN_WIDTH_40; -@@ -355,7 +355,7 @@ static void rtw_get_chbw_from_cfg80211_c - rtw_warn_on(1); - *ch = 0; - return; -- } -+ } - - switch (chdef->width) { - case NL80211_CHAN_WIDTH_20_NOHT: -@@ -1577,8 +1577,8 @@ static int rtw_cfg80211_set_encryption(s - _rtw_memcpy(padapter->securitypriv.dot118021XGrptxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[16]), 8); - _rtw_memcpy(padapter->securitypriv.dot118021XGrprxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[24]), 8); - padapter->securitypriv.binstallGrpkey = _TRUE; -- if (param->u.crypt.idx < 4) -- _rtw_memcpy(padapter->securitypriv.iv_seq[param->u.crypt.idx], param->u.crypt.seq, 8); -+ if (param->u.crypt.idx < 4) -+ _rtw_memcpy(padapter->securitypriv.iv_seq[param->u.crypt.idx], param->u.crypt.seq, 8); - padapter->securitypriv.dot118021XGrpKeyid = param->u.crypt.idx; - rtw_set_key(padapter, &padapter->securitypriv, param->u.crypt.idx, 1, _TRUE); - -@@ -1826,7 +1826,7 @@ static int cfg80211_rtw_get_key(struct w - #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE) - || (MLME_IS_STA(adapter) && !pairwise) - #endif -- ) { -+ ) { - /* WEP key, TX GTK/IGTK, RX GTK/IGTK(for STA mode) */ - if (is_wep_enc(sec->dot118021XGrpPrivacy)) { - if (keyid >= WEP_KEYS) -@@ -1915,7 +1915,7 @@ static int cfg80211_rtw_get_key(struct w - } - - ret = 0; -- -+ - exit: - RTW_INFO(FUNC_NDEV_FMT - GET_KEY_PARAM_FMT_S -@@ -5565,7 +5565,7 @@ release_plink_ctl: - if (del_sta) { - u8 sta_addr[ETH_ALEN]; - u8 updated = _FALSE; -- -+ - _rtw_memcpy(sta_addr, del_sta->cmn.mac_addr, ETH_ALEN); - updated = ap_free_sta(adapter, del_sta, 0, 0, 1); - rtw_mesh_expire_peer(stapriv->padapter, sta_addr); -@@ -5650,7 +5650,7 @@ static int cfg80211_rtw_dump_station(str - else - _rtw_memcpy(mac, plink->addr, ETH_ALEN); - #endif -- -+ - sinfo->filled = 0; - - if (psta) { -@@ -7307,11 +7307,22 @@ static void cfg80211_rtw_mgmt_frame_regi - #else - struct net_device *ndev, - #endif -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 8, 0)) -+ struct mgmt_frame_regs *upd) -+#else - u16 frame_type, bool reg) -+#endif -+ - { - #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) - struct net_device *ndev = wdev_to_ndev(wdev); - #endif -+ -+/* hardcoded always true, to make it pass compilation */ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 8, 0)) -+ bool reg = true; -+#endif -+ - _adapter *adapter; - - struct rtw_wdev_priv *pwdev_priv; -@@ -7330,7 +7341,12 @@ static void cfg80211_rtw_mgmt_frame_regi - /* Wait QC Verify */ - return; - -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 8, 0)) -+ switch (upd->interface_stypes) { -+#else - switch (frame_type) { -+#endif -+ - case IEEE80211_STYPE_PROBE_REQ: /* 0x0040 */ - SET_CFG80211_REPORT_MGMT(pwdev_priv, IEEE80211_STYPE_PROBE_REQ, reg); - break; -@@ -7682,7 +7698,7 @@ void dump_mesh_config(void *sel, const s - RTW_PRINT_SEL(sel, "path_refresh_time:%u\n", conf->path_refresh_time); - RTW_PRINT_SEL(sel, "min_discovery_timeout:%u\n", conf->min_discovery_timeout); - RTW_PRINT_SEL(sel, "dot11MeshHWMPactivePathTimeout:%u\n", conf->dot11MeshHWMPactivePathTimeout); -- RTW_PRINT_SEL(sel, "dot11MeshHWMPpreqMinInterval:%u\n", conf->dot11MeshHWMPpreqMinInterval); -+ RTW_PRINT_SEL(sel, "dot11MeshHWMPpreqMinInterval:%u\n", conf->dot11MeshHWMPpreqMinInterval); - #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 3, 0)) - RTW_PRINT_SEL(sel, "dot11MeshHWMPperrMinInterval:%u\n", conf->dot11MeshHWMPperrMinInterval); - #endif -@@ -7697,11 +7713,11 @@ void dump_mesh_config(void *sel, const s - RTW_PRINT_SEL(sel, "dot11MeshForwarding:%d\n", conf->dot11MeshForwarding); - RTW_PRINT_SEL(sel, "rssi_threshold:%d\n", conf->rssi_threshold); - #endif -- -+ - #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 5, 0)) - RTW_PRINT_SEL(sel, "ht_opmode:0x%04x\n", conf->ht_opmode); - #endif -- -+ - #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) - RTW_PRINT_SEL(sel, "dot11MeshHWMPactivePathToRootTimeout:%u\n", conf->dot11MeshHWMPactivePathToRootTimeout); - RTW_PRINT_SEL(sel, "dot11MeshHWMProotInterval:%u\n", conf->dot11MeshHWMProotInterval); -@@ -7712,7 +7728,7 @@ void dump_mesh_config(void *sel, const s - RTW_PRINT_SEL(sel, "power_mode:%s\n", nl80211_mesh_power_mode_str(conf->power_mode)); - RTW_PRINT_SEL(sel, "dot11MeshAwakeWindowDuration:%u\n", conf->dot11MeshAwakeWindowDuration); - #endif -- -+ - #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 11, 0)) - RTW_PRINT_SEL(sel, "plink_timeout:%u\n", conf->plink_timeout); - #endif -@@ -7848,14 +7864,14 @@ static void rtw_cfg80211_mesh_cfg_set(_a - if (chk_mesh_attr(NL80211_MESHCONF_HT_OPMODE, mask)); - #endif - #endif -- -+ - #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) - if (chk_mesh_attr(NL80211_MESHCONF_HWMP_PATH_TO_ROOT_TIMEOUT, mask)) - mcfg->dot11MeshHWMPactivePathToRootTimeout = conf->dot11MeshHWMPactivePathToRootTimeout; - if (chk_mesh_attr(NL80211_MESHCONF_HWMP_ROOT_INTERVAL, mask)) - mcfg->dot11MeshHWMProotInterval = conf->dot11MeshHWMProotInterval; - if (chk_mesh_attr(NL80211_MESHCONF_HWMP_CONFIRMATION_INTERVAL, mask)) -- mcfg->dot11MeshHWMPconfirmationInterval = conf->dot11MeshHWMPconfirmationInterval; -+ mcfg->dot11MeshHWMPconfirmationInterval = conf->dot11MeshHWMPconfirmationInterval; - #endif - - #if 0 /* TBD */ -@@ -7913,7 +7929,7 @@ u8 *rtw_cfg80211_construct_mesh_beacon_i - #endif - if (!ch) - goto exit; -- -+ - #if defined(CONFIG_80211AC_VHT) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) - vht = ht && ch > 14 && bw >= CHANNEL_WIDTH_80; /* VHT40/VHT20? */ - #endif -@@ -8244,7 +8260,7 @@ static int cfg80211_rtw_join_mesh(struct - ret = -EINVAL; - goto exit; - } -- -+ - rtw_mesh_work(&adapter->mesh_work); - - exit: -@@ -8325,7 +8341,7 @@ static int cfg80211_rtw_del_mpath(struct - } - } else { - rtw_mesh_path_flush_by_iface(adapter); -- } -+ } - - exit: - return ret; -@@ -8626,13 +8642,13 @@ int cfg80211_rtw_resume(struct wiphy *wi - //rtw_sitesurvey_cmd(padapter, NULL); - rtw_sitesurvey_cmd(padapter, &parm); - _exit_critical_bh(&pmlmepriv->lock, &irqL); -- -+ - for (PNOWakeupScanWaitCnt = 0; PNOWakeupScanWaitCnt < 10; PNOWakeupScanWaitCnt++) { - if(check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _FALSE) - break; - rtw_msleep_os(1000); - } -- -+ - _enter_critical_bh(&pmlmepriv->lock, &irqL); - cfg80211_sched_scan_results(padapter->rtw_wdev->wiphy); - _exit_critical_bh(&pmlmepriv->lock, &irqL); -@@ -8640,7 +8656,7 @@ int cfg80211_rtw_resume(struct wiphy *wi - } - RTW_DBG("<== %s\n",__func__); - return 0; -- -+ - } - #endif /* CONFIG_PNO_SUPPORT */ - -@@ -9530,7 +9546,7 @@ int rtw_hostapd_acs_dump_survey(struct w - #elif defined(CONFIG_RTW_ACS) && defined(CONFIG_BACKGROUND_NOISE_MONITOR) - rtw_cfg80211_set_survey_info_with_clm(padapter, idx, info); - #else -- RTW_ERR("%s: unknown acs operation!\n", __func__); -+ RTW_ERR("%s: unknown acs operation!\n", __func__); - #endif - - return ret; -@@ -9631,7 +9647,11 @@ static struct cfg80211_ops rtw_cfg80211_ - - #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE) - .mgmt_tx = cfg80211_rtw_mgmt_tx, -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 8, 0)) -+ .update_mgmt_frame_registrations = cfg80211_rtw_mgmt_frame_register, -+#else - .mgmt_frame_register = cfg80211_rtw_mgmt_frame_register, -+#endif - #elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 34) && LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) - .action = cfg80211_rtw_mgmt_tx, - #endif diff --git a/kernel/tools/cpupowertools/files/patches/mageia/3rd-rtl8821ce-Kconfig-Makefile.patch b/kernel/tools/cpupowertools/files/patches/mageia/3rd-rtl8821ce-Kconfig-Makefile.patch deleted file mode 100644 index 223599b6..00000000 --- a/kernel/tools/cpupowertools/files/patches/mageia/3rd-rtl8821ce-Kconfig-Makefile.patch +++ /dev/null @@ -1,20 +0,0 @@ ---- linux-5.3.orig/3rdparty/Kconfig -+++ linux-5.3/3rdparty/Kconfig -@@ -3,6 +3,7 @@ - menu "External 3rdparty kernel additions" - - source "3rdparty/ndiswrapper/Kconfig" -+source "3rdparty/rtl8821ce/Kconfig" - source "3rdparty/rtl8812au/Kconfig" - source "3rdparty/rtl8723de/Kconfig" - source "3rdparty/viahss/Kconfig" ---- linux-5.3.orig/3rdparty/Makefile -+++ linux-5.3/3rdparty/Makefile -@@ -2,6 +2,7 @@ - - obj- := 3rdparty.o # Dummy rule to force built-in.o to be made - obj-$(CONFIG_NDISWRAPPER) += ndiswrapper/ -+obj-$(CONFIG_RTL8821CE) += rtl8821ce/ - obj-$(CONFIG_RTL8812AU) += rtl8812au/ - obj-$(CONFIG_RTL8723DE) += rtl8723de/ - obj-$(CONFIG_VIAHSS) += viahss/ diff --git a/kernel/tools/cpupowertools/files/patches/mageia/3rd-rtl8821ce-kernel-5.10.patch b/kernel/tools/cpupowertools/files/patches/mageia/3rd-rtl8821ce-kernel-5.10.patch deleted file mode 100644 index 08005840..00000000 --- a/kernel/tools/cpupowertools/files/patches/mageia/3rd-rtl8821ce-kernel-5.10.patch +++ /dev/null @@ -1,162 +0,0 @@ -diff -urp linux-5.10/3rdparty/rtl8821ce.orig/core/rtw_btcoex.c linux-5.10/3rdparty/rtl8821ce/core/rtw_btcoex.c ---- linux-5.10/3rdparty/rtl8821ce.orig/core/rtw_btcoex.c 2021-01-19 22:18:00.924067581 +0200 -+++ linux-5.10/3rdparty/rtl8821ce/core/rtw_btcoex.c 2021-01-19 22:22:20.057518961 +0200 -@@ -1474,15 +1474,20 @@ u8 rtw_btcoex_sendmsgbysocket(_adapter * - udpmsg.msg_control = NULL; - udpmsg.msg_controllen = 0; - udpmsg.msg_flags = MSG_DONTWAIT | MSG_NOSIGNAL; -+ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 10, 0)) - oldfs = get_fs(); - set_fs(KERNEL_DS); -+#endif - - #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 1, 0)) - error = sock_sendmsg(pcoex_info->udpsock, &udpmsg); - #else - error = sock_sendmsg(pcoex_info->udpsock, &udpmsg, msg_size); - #endif -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 10, 0)) - set_fs(oldfs); -+#endif - if (error < 0) { - RTW_INFO("Error when sendimg msg, error:%d\n", error); - return _FAIL; -diff -urp linux-5.10/3rdparty/rtl8821ce.orig/core/rtw_wlan_util.c linux-5.10/3rdparty/rtl8821ce/core/rtw_wlan_util.c ---- linux-5.10/3rdparty/rtl8821ce.orig/core/rtw_wlan_util.c 2021-01-19 22:18:00.937068206 +0200 -+++ linux-5.10/3rdparty/rtl8821ce/core/rtw_wlan_util.c 2021-01-19 22:22:20.067519442 +0200 -@@ -4751,8 +4751,10 @@ int rtw_dev_nlo_info_set(struct pno_nlo_ - return 0; - } - -+#if (LINUX_VERSION_CODE <= KERNEL_VERSION(5, 10, 0)) - fs = get_fs(); - set_fs(KERNEL_DS); -+#endif - - source = rtw_zmalloc(2048); - -@@ -4762,7 +4764,9 @@ int rtw_dev_nlo_info_set(struct pno_nlo_ - rtw_mfree(source, 2048); - } - -+#if (LINUX_VERSION_CODE <= KERNEL_VERSION(5, 10, 0)) - set_fs(fs); -+#endif - filp_close(fp, NULL); - - RTW_INFO("-%s-\n", __func__); -diff -urp linux-5.10/3rdparty/rtl8821ce.orig/os_dep/linux/os_intfs.c linux-5.10/3rdparty/rtl8821ce/os_dep/linux/os_intfs.c ---- linux-5.10/3rdparty/rtl8821ce.orig/os_dep/linux/os_intfs.c 2021-01-19 22:18:01.078074981 +0200 -+++ linux-5.10/3rdparty/rtl8821ce/os_dep/linux/os_intfs.c 2021-01-19 22:22:20.068519490 +0200 -@@ -4008,14 +4008,18 @@ static int route_dump(u32 *gw_addr , int - msg.msg_controllen = 0; - msg.msg_flags = MSG_DONTWAIT; - -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 10, 0)) - oldfs = get_fs(); - set_fs(KERNEL_DS); -+#endif - #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 1, 0)) - err = sock_sendmsg(sock, &msg); - #else - err = sock_sendmsg(sock, &msg, sizeof(req)); - #endif -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 10, 0)) - set_fs(oldfs); -+#endif - - if (err < 0) - goto out_sock; -@@ -4040,14 +4044,18 @@ restart: - iov_iter_init(&msg.msg_iter, READ, &iov, 1, PAGE_SIZE); - #endif - -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 10, 0)) - oldfs = get_fs(); - set_fs(KERNEL_DS); -+#endif - #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 7, 0)) - err = sock_recvmsg(sock, &msg, MSG_DONTWAIT); - #else - err = sock_recvmsg(sock, &msg, PAGE_SIZE, MSG_DONTWAIT); - #endif -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 10, 0)) - set_fs(oldfs); -+#endif - - if (err < 0) - goto out_sock_pg; -@@ -4118,14 +4126,18 @@ done: - msg.msg_controllen = 0; - msg.msg_flags = MSG_DONTWAIT; - -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 10, 0)) - oldfs = get_fs(); - set_fs(KERNEL_DS); -+#endif - #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 1, 0)) - err = sock_sendmsg(sock, &msg); - #else - err = sock_sendmsg(sock, &msg, sizeof(req)); - #endif -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 10, 0)) - set_fs(oldfs); -+#endif - - if (err > 0) - goto restart; -diff -urp linux-5.10/3rdparty/rtl8821ce.orig/os_dep/osdep_service.c linux-5.10/3rdparty/rtl8821ce/os_dep/osdep_service.c ---- linux-5.10/3rdparty/rtl8821ce.orig/os_dep/osdep_service.c 2021-01-19 22:18:01.081075125 +0200 -+++ linux-5.10/3rdparty/rtl8821ce/os_dep/osdep_service.c 2021-01-19 22:22:20.068519490 +0200 -@@ -2200,8 +2200,10 @@ static int isFileReadable(const char *pa - if (IS_ERR(fp)) - ret = PTR_ERR(fp); - else { -+ #if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 10, 0)) - oldfs = get_fs(); - set_fs(KERNEL_DS); -+ #endif - - if (1 != readFile(fp, &buf, 1)) - ret = PTR_ERR(fp); -@@ -2214,7 +2216,9 @@ static int isFileReadable(const char *pa - #endif - } - -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 10, 0)) - set_fs(oldfs); -+#endif - filp_close(fp, NULL); - } - return ret; -@@ -2238,10 +2242,14 @@ static int retriveFromFile(const char *p - if (0 == ret) { - RTW_INFO("%s openFile path:%s fp=%p\n", __FUNCTION__, path , fp); - -+ #if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 10, 0)) - oldfs = get_fs(); - set_fs(KERNEL_DS); -+ #endif - ret = readFile(fp, buf, sz); -+ #if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 10, 0)) - set_fs(oldfs); -+ #endif - closeFile(fp); - - RTW_INFO("%s readFile, ret:%d\n", __FUNCTION__, ret); -@@ -2273,10 +2281,14 @@ static int storeToFile(const char *path, - if (0 == ret) { - RTW_INFO("%s openFile path:%s fp=%p\n", __FUNCTION__, path , fp); - -+ #if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 10, 0)) - oldfs = get_fs(); - set_fs(KERNEL_DS); -+ #endif - ret = writeFile(fp, buf, sz); -+ #if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 10, 0)) - set_fs(oldfs); -+ #endif - closeFile(fp); - - RTW_INFO("%s writeFile, ret:%d\n", __FUNCTION__, ret); diff --git a/kernel/tools/cpupowertools/files/patches/mageia/3rd-rtl8821ce-kernel-5.12.patch b/kernel/tools/cpupowertools/files/patches/mageia/3rd-rtl8821ce-kernel-5.12.patch deleted file mode 100644 index f23766d9..00000000 --- a/kernel/tools/cpupowertools/files/patches/mageia/3rd-rtl8821ce-kernel-5.12.patch +++ /dev/null @@ -1,12 +0,0 @@ -diff -urp linux/3rdparty/rtl8821ce.orig/os_dep/linux/recv_linux.c linux/3rdparty/rtl8821ce/os_dep/linux/recv_linux.c ---- linux/3rdparty/rtl8821ce.orig/os_dep/linux/recv_linux.c 2021-04-26 18:35:37.690041052 +0300 -+++ linux/3rdparty/rtl8821ce/os_dep/linux/recv_linux.c 2021-04-26 18:53:23.534295732 +0300 -@@ -353,7 +353,7 @@ static int napi_recv(_adapter *padapter, - - rx_ok = _FALSE; - --#ifdef CONFIG_RTW_GRO -+#if defined(CONFIG_RTW_GRO) && LINUX_VERSION_CODE < KERNEL_VERSION(5, 12, 0) - if (pregistrypriv->en_gro) { - if (rtw_napi_gro_receive(&padapter->napi, pskb) != GRO_DROP) - rx_ok = _TRUE; diff --git a/kernel/tools/cpupowertools/files/patches/mageia/3rd-rtl8821ce-kernel-5.15.patch b/kernel/tools/cpupowertools/files/patches/mageia/3rd-rtl8821ce-kernel-5.15.patch deleted file mode 100644 index 2acf7719..00000000 --- a/kernel/tools/cpupowertools/files/patches/mageia/3rd-rtl8821ce-kernel-5.15.patch +++ /dev/null @@ -1,66 +0,0 @@ - -From: -https://github.com/aircrack-ng/rtl8812au/commit/47a38b7c736dd9e9baac9eb07a6dceb83429fb49 - -diff -Nurp linux-5.15/3rdparty/rtl8821ce.orig/core/rtw_br_ext.c linux-5.15/3rdparty/rtl8821ce/core/rtw_br_ext.c ---- linux-5.15/3rdparty/rtl8821ce.orig/core/rtw_br_ext.c 2021-11-08 23:40:48.236272741 +0200 -+++ linux-5.15/3rdparty/rtl8821ce/core/rtw_br_ext.c 2021-11-08 23:49:12.118046953 +0200 -@@ -17,7 +17,10 @@ - #ifdef __KERNEL__ - #include - #include -+ #include -+#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 15, 0) - #include -+#endif - #include - #include - #include -@@ -169,6 +172,7 @@ static __inline__ void __nat25_generate_ - } - - -+#ifdef _NET_INET_IPX_H_ - static __inline__ void __nat25_generate_ipx_network_addr_with_node(unsigned char *networkAddr, - unsigned int *ipxNetAddr, unsigned char *ipxNodeAddr) - { -@@ -189,6 +193,7 @@ static __inline__ void __nat25_generate_ - memcpy(networkAddr + 1, (unsigned char *)ipxNetAddr, 4); - memcpy(networkAddr + 5, (unsigned char *)ipxSocketAddr, 2); - } -+#endif - - - static __inline__ void __nat25_generate_apple_network_addr(unsigned char *networkAddr, -@@ -330,6 +335,7 @@ static __inline__ int __nat25_network_ha - x = networkAddr[7] ^ networkAddr[8] ^ networkAddr[9] ^ networkAddr[10]; - - return x & (NAT25_HASH_SIZE - 1); -+#ifdef _NET_INET_IPX_H_ - } else if (networkAddr[0] == NAT25_IPX) { - unsigned long x; - -@@ -337,6 +343,7 @@ static __inline__ int __nat25_network_ha - networkAddr[6] ^ networkAddr[7] ^ networkAddr[8] ^ networkAddr[9] ^ networkAddr[10]; - - return x & (NAT25_HASH_SIZE - 1); -+#endif - } else if (networkAddr[0] == NAT25_APPLE) { - unsigned long x; - -@@ -889,6 +896,7 @@ int nat25_db_handle(_adapter *priv, stru - } - } - -+#ifdef _NET_INET_IPX_H_ - /*---------------------------------------------------*/ - /* Handle IPX and Apple Talk frame */ - /*---------------------------------------------------*/ -@@ -1109,6 +1117,7 @@ int nat25_db_handle(_adapter *priv, stru - - return -1; - } -+#endif - - /*---------------------------------------------------*/ - /* Handle PPPoE frame */ diff --git a/kernel/tools/cpupowertools/files/patches/mageia/3rd-viahss-0.92.patch b/kernel/tools/cpupowertools/files/patches/mageia/3rd-viahss-0.92.patch deleted file mode 100644 index bc9a5678..00000000 --- a/kernel/tools/cpupowertools/files/patches/mageia/3rd-viahss-0.92.patch +++ /dev/null @@ -1,189 +0,0 @@ - 3rdparty/viahss/Kconfig | 14 +++++++ - 3rdparty/viahss/Makefile | 3 + - 3rdparty/viahss/README.html | 68 ++++++++++++++++++++++++++++++++++++ - 3rdparty/viahss/viahss.c | 83 ++++++++++++++++++++++++++++++++++++++++++++ - 4 files changed, 168 insertions(+) -diff -Nurp linux-2.6.37/3rdparty/viahss/Kconfig linux-2.6.37.3rdparty/3rdparty/viahss/Kconfig ---- linux-2.6.37/3rdparty/viahss/Kconfig 1970-01-01 02:00:00.000000000 +0200 -+++ linux-2.6.37.3rdparty/3rdparty/viahss/Kconfig 2003-12-01 01:53:51.000000000 +0200 -@@ -0,0 +1,14 @@ -+config VIAHSS -+ tristate "VIA High Speed Serial" -+ depends on SERIAL_CORE && m -+ ---help--- -+ VIA High Speed Serial is a little kernel module (1 KB) which enables -+ high speed serial port modes of VIA VT82C686A or VT82C686B -+ southbridge-equipped motherboards. With this module, you can use the -+ serial port at 230400 bit/s so that you can get the full 128000 bit/s -+ from ISDN-TA. The module has been tested with both 686A and 686B -+ chipsets. -+ -+ To compile this driver as a module, choose M here: the -+ module will be called viahss. -+ -diff -Nurp linux-2.6.37/3rdparty/viahss/Makefile linux-2.6.37.3rdparty/3rdparty/viahss/Makefile ---- linux-2.6.37/3rdparty/viahss/Makefile 1970-01-01 02:00:00.000000000 +0200 -+++ linux-2.6.37.3rdparty/3rdparty/viahss/Makefile 2003-12-01 01:43:23.000000000 +0200 -@@ -0,0 +1,3 @@ -+ -+obj-$(CONFIG_VIAHSS) += viahss.o -+ -diff -Nurp linux-2.6.37/3rdparty/viahss/README.html linux-2.6.37.3rdparty/3rdparty/viahss/README.html ---- linux-2.6.37/3rdparty/viahss/README.html 1970-01-01 02:00:00.000000000 +0200 -+++ linux-2.6.37.3rdparty/3rdparty/viahss/README.html 2003-12-01 01:58:23.000000000 +0200 -@@ -0,0 +1,68 @@ -+ -+ -+ -+ -+ High speed serial port for VIA VT82C686 chipsets for linux -+ -+ -+

Setting the serial port speed over 115,200bps

-+
-+If you have motherboard which has VIA VT82C686A or VT82C686B chipset -+you can set serial ports in high speed mode with this kernel module. -+I use module with external ISDN-TA and haven't had any problems -+so far but I cannot guarantee that you won't have buffer overflows if -+you use full 230K or 460K speed all the time (FIFO's are still 16550A size). -+ISDN with two channels maxes out at 128 Kb which means that it doesn't -+really stress serial ports at 230400. Unlike SHSMOD-patches you don't have -+to patch serial driver and module takes only 1KB of memory when it's -+loaded which should leave enough room for other programs. It should -+be also possible to make this work from userspace but accessing -+pci devices is so much easier from kernel. -+ -+

How to use module

-+Get the package -+and compile it using included makefiles. -+

For 2.4

-+If you have kernel in some other location than /usr/src/linux edit Makefile -+before compiling. You can also install module with "make install". After -+you have loaded module in kernel (use modprobe or insmod) you can set serial -+ports to use high speed modes with setserial.
-+

For 2.5/2.6

-+Copy Makefile-2.6 on top of Makefile and do make. After loading module set -+serial speed with setserial. (NOTE: This gives a warning on depracated -+method). -+ -+
-+# setserial /dev/ttyS0 spd_cust divisor 0x8002 -+

-+which sets COM1: speed to 230400. With 0x8001 you should get 460800 -+but I haven't tested it. If you want to use COM2: use ttyS1 instead of ttyS0. -+ -+After this you should set program which you are using to use 38400 bps -+speed which is now actually 230K or 460K. For more information check -+setserial man page (spd_cust). -+ -+You can use serial port work as normal if you do
-+
-+# setserial /dev/ttyS0 spd_normal

-+After this you can also remove viahss module with rmmod if you need to. Module doesn't intefere with normal serial port usage so you can leave -+it loaded if you don't need that extra 1KB which module uses. -+

Download

-+viahss-0.92.tar.gz -+ -+

Acknowledgments

-+ -+Thanks to Kimmo Rintala for help with divisor settings.
-+I also like to thank Jeff Garzik for help with VIA datasheets.
-+Port to 2.5/2.6 by Kingsly John with the help of LWN -+ -+

Version History

-+0.90 First release
-+0.91 Fixed Makefile
-+0.92 Fixed for 2.5/2.6
-+ -+

Contact

-+ -+You can reach me by email: jrauti@iki.fi -+ -+ -diff -Nurp linux-2.6.37/3rdparty/viahss/viahss.c linux-2.6.37.3rdparty/3rdparty/viahss/viahss.c ---- linux-2.6.37/3rdparty/viahss/viahss.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-2.6.37.3rdparty/3rdparty/viahss/viahss.c 2003-07-17 09:49:59.000000000 +0300 -@@ -0,0 +1,83 @@ -+/* -+ * VIA VT 82c686[AB] high speed serial port enabler -+ * Version 0.92 -+ * Copyright (c) 2000-2001 Juhani Rautiainen -+ * -+ * 0.92: -+ * Ported to 2.5/2.6 by Kingsly John -+ * - Corrected locking (no more cli() and sti()) -+ * - New makefile -+ * -+ * Can be freely distributed and used under the terms of the GNU GPL. -+*/ -+ -+#include -+#include -+#include -+#include -+#include -+ -+const unsigned short confindex=0x3F0,confdata=0x3F1; -+const unsigned char spcidx=0xEE; -+ -+spinlock_t driver_lock = SPIN_LOCK_UNLOCKED; -+ -+static int __init viahss_init(void) -+{ -+ struct pci_dev *pcidev = NULL; -+ unsigned char confval,val; -+ pcidev = pci_find_device (PCI_VENDOR_ID_VIA,PCI_DEVICE_ID_VIA_82C686,NULL); -+ if (pcidev) { -+ spin_lock_irq(&driver_lock); -+ /* start config */ -+ pci_read_config_byte(pcidev,0x85,&confval); -+ confval |= 0x2; -+ pci_write_config_byte (pcidev, 0x85,confval); -+ /* activate high speed bits */ -+ outb(spcidx,confindex); /* set index */ -+ val = (unsigned char) inb(confdata); -+ val |= 0xC0; /* both ports on high speed*/ -+ outb (spcidx,confindex); -+ outb (val,confdata); -+ /*stop config*/ -+ confval &= ~0x2; -+ pci_write_config_byte(pcidev, 0x85, confval); -+ spin_unlock_irq(&driver_lock); -+ printk (KERN_INFO "VIA VT82C686[AB] serial port high speed enabled\n"); -+ } -+ else { -+ printk (KERN_INFO "Couldn't locate VIA chipset\n"); -+ return -ENODEV; -+ } -+ return 0; -+} -+ -+static void __exit viahss_exit(void) -+{ -+ struct pci_dev *pcidev = NULL; -+ unsigned char confval,val; -+ pcidev = pci_find_device (PCI_VENDOR_ID_VIA,PCI_DEVICE_ID_VIA_82C686,NULL); -+ if (pcidev) { -+ spin_lock_irq(&driver_lock); -+ /* start config */ -+ pci_read_config_byte(pcidev,0x85,&confval); -+ confval |= 0x2; -+ pci_write_config_byte (pcidev, 0x85,confval); -+ /* activate high speed bits */ -+ outb(spcidx,confindex); /* set index */ -+ val = (unsigned char) inb(confdata); -+ val &= ~0xC0; /* both ports off high speed*/ -+ outb (spcidx,confindex); -+ outb (val,confdata); -+ /*stop config*/ -+ confval &= ~0x2; -+ pci_write_config_byte(pcidev, 0x85, confval); -+ spin_unlock_irq(&driver_lock); -+ printk (KERN_INFO "VIA VT82C686[AB] serial port high speed disabled\n"); -+ } -+} -+ -+module_init(viahss_init); -+module_exit(viahss_exit); -+MODULE_DESCRIPTION("VIA VT82C686[AB] high speed serial port enabler"); -+MODULE_AUTHOR("Juhani Rautiainen "); diff --git a/kernel/tools/cpupowertools/files/patches/mageia/3rd-viahss-2.6.35-buildfix.patch b/kernel/tools/cpupowertools/files/patches/mageia/3rd-viahss-2.6.35-buildfix.patch deleted file mode 100644 index 5ae42e92..00000000 --- a/kernel/tools/cpupowertools/files/patches/mageia/3rd-viahss-2.6.35-buildfix.patch +++ /dev/null @@ -1,20 +0,0 @@ ---- linux-2.6.35-rc6-git-mnb0.1/3rdparty/viahss/viahss.c.orig 2010-07-30 21:17:30.000000000 +0300 -+++ linux-2.6.35-rc6-git-mnb0.1/3rdparty/viahss/viahss.c 2010-07-30 23:10:21.324978822 +0300 -@@ -25,7 +25,7 @@ static int __init viahss_init(void) - { - struct pci_dev *pcidev = NULL; - unsigned char confval,val; -- pcidev = pci_find_device (PCI_VENDOR_ID_VIA,PCI_DEVICE_ID_VIA_82C686,NULL); -+ pcidev = pci_get_device (PCI_VENDOR_ID_VIA,PCI_DEVICE_ID_VIA_82C686,NULL); - if (pcidev) { - spin_lock_irq(&driver_lock); - /* start config */ -@@ -55,7 +55,7 @@ static void __exit viahss_exit(void) - { - struct pci_dev *pcidev = NULL; - unsigned char confval,val; -- pcidev = pci_find_device (PCI_VENDOR_ID_VIA,PCI_DEVICE_ID_VIA_82C686,NULL); -+ pcidev = pci_get_device (PCI_VENDOR_ID_VIA,PCI_DEVICE_ID_VIA_82C686,NULL); - if (pcidev) { - spin_lock_irq(&driver_lock); - /* start config */ diff --git a/kernel/tools/cpupowertools/files/patches/mageia/3rd-viahss-3.0-buildfix.patch b/kernel/tools/cpupowertools/files/patches/mageia/3rd-viahss-3.0-buildfix.patch deleted file mode 100644 index 7db73881..00000000 --- a/kernel/tools/cpupowertools/files/patches/mageia/3rd-viahss-3.0-buildfix.patch +++ /dev/null @@ -1,19 +0,0 @@ - -fix build with 3.0 - -Signed-off-by: Thomas Backlund - - 3rdparty/viahss/viahss.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/3rdparty/viahss/viahss.c.orig 2011-07-15 02:37:27.000000000 +0300 -+++ a/3rdparty/viahss/viahss.c 2011-07-15 13:48:13.204291256 +0300 -@@ -19,7 +19,7 @@ - const unsigned short confindex=0x3F0,confdata=0x3F1; - const unsigned char spcidx=0xEE; - --spinlock_t driver_lock = SPIN_LOCK_UNLOCKED; -+DEFINE_SPINLOCK(driver_lock); - - static int __init viahss_init(void) - { diff --git a/kernel/tools/cpupowertools/files/patches/mageia/3rd-viahss-Kconfig-Makefile.patch b/kernel/tools/cpupowertools/files/patches/mageia/3rd-viahss-Kconfig-Makefile.patch deleted file mode 100644 index 348b2cd4..00000000 --- a/kernel/tools/cpupowertools/files/patches/mageia/3rd-viahss-Kconfig-Makefile.patch +++ /dev/null @@ -1,16 +0,0 @@ ---- linux/3rdparty/Kconfig.orig 2019-05-31 23:33:39.796256889 +0300 -+++ linux/3rdparty/Kconfig 2019-05-31 23:37:16.378970236 +0300 -@@ -5,5 +5,6 @@ menu "External 3rdparty kernel additions" - source "3rdparty/ndiswrapper/Kconfig" - source "3rdparty/rtl8812au/Kconfig" - source "3rdparty/rtl8723de/Kconfig" -+source "3rdparty/viahss/Kconfig" - - endmenu ---- linux/3rdparty/Makefile.orig 2019-05-31 23:33:57.608644657 +0300 -+++ linux/3rdparty/Makefile 2019-05-31 23:37:39.711477814 +0300 -@@ -4,3 +4,4 @@ obj- := 3rdparty.o # Dummy rule to forc - obj-$(CONFIG_NDISWRAPPER) += ndiswrapper/ - obj-$(CONFIG_RTL8812AU) += rtl8812au/ - obj-$(CONFIG_RTL8723DE) += rtl8723de/ -+obj-$(CONFIG_VIAHSS) += viahss/ diff --git a/kernel/tools/cpupowertools/files/patches/mageia/3rd-viahss-config.patch b/kernel/tools/cpupowertools/files/patches/mageia/3rd-viahss-config.patch deleted file mode 100644 index 0d1bdbd3..00000000 --- a/kernel/tools/cpupowertools/files/patches/mageia/3rd-viahss-config.patch +++ /dev/null @@ -1,18 +0,0 @@ -linux/config.h is gone in 2.6.21 - ---- - 3rdparty/viahss/viahss.c | 1 0 + 1 - 0 ! - 1 files changed, 1 deletion(-) - -Index: linux-2.6.21/3rdparty/viahss/viahss.c -=================================================================== ---- linux-2.6.21.orig/3rdparty/viahss/viahss.c 2003-07-17 08:49:59.000000000 +0200 -+++ linux-2.6.21/3rdparty/viahss/viahss.c 2007-05-14 17:06:56.000000000 +0200 -@@ -12,7 +12,6 @@ - */ - - #include --#include - #include - #include - #include diff --git a/kernel/tools/cpupowertools/files/patches/mageia/3rd-viahss-module-license.patch b/kernel/tools/cpupowertools/files/patches/mageia/3rd-viahss-module-license.patch deleted file mode 100644 index 540538f2..00000000 --- a/kernel/tools/cpupowertools/files/patches/mageia/3rd-viahss-module-license.patch +++ /dev/null @@ -1,7 +0,0 @@ ---- linux-2.6.25/3rdparty/viahss/viahss.c.orig 2008-06-28 22:50:05.000000000 +0300 -+++ linux-2.6.25/3rdparty/viahss/viahss.c 2008-06-29 14:26:55.000000000 +0300 -@@ -80,3 +80,4 @@ module_init(viahss_init); - module_exit(viahss_exit); - MODULE_DESCRIPTION("VIA VT82C686[AB] high speed serial port enabler"); - MODULE_AUTHOR("Juhani Rautiainen "); -+MODULE_LICENSE("GPL"); diff --git a/kernel/tools/cpupowertools/files/patches/mageia/CVE-2019-12379.patch b/kernel/tools/cpupowertools/files/patches/mageia/CVE-2019-12379.patch deleted file mode 100644 index 04d16049..00000000 --- a/kernel/tools/cpupowertools/files/patches/mageia/CVE-2019-12379.patch +++ /dev/null @@ -1,37 +0,0 @@ -From 84ecc2f6eb1cb12e6d44818f94fa49b50f06e6ac Mon Sep 17 00:00:00 2001 -From: Gen Zhang -Date: Thu, 23 May 2019 08:34:52 +0800 -Subject: consolemap: Fix a memory leaking bug in drivers/tty/vt/consolemap.c - -In function con_insert_unipair(), when allocation for p2 and p1[n] -fails, ENOMEM is returned, but previously allocated p1 is not freed, -remains as leaking memory. Thus we should free p1 as well when this -allocation fails. - -Signed-off-by: Gen Zhang -Reviewed-by: Kees Cook -Signed-off-by: Greg Kroah-Hartman ---- - drivers/tty/vt/consolemap.c | 6 +++++- - 1 file changed, 5 insertions(+), 1 deletion(-) - -diff --git a/drivers/tty/vt/consolemap.c b/drivers/tty/vt/consolemap.c -index b28aa0d289f8..79fcc96cc7c0 100644 ---- a/drivers/tty/vt/consolemap.c -+++ b/drivers/tty/vt/consolemap.c -@@ -489,7 +489,11 @@ con_insert_unipair(struct uni_pagedir *p, u_short unicode, u_short fontpos) - p2 = p1[n = (unicode >> 6) & 0x1f]; - if (!p2) { - p2 = p1[n] = kmalloc_array(64, sizeof(u16), GFP_KERNEL); -- if (!p2) return -ENOMEM; -+ if (!p2) { -+ kfree(p1); -+ p->uni_pgdir[n] = NULL; -+ return -ENOMEM; -+ } - memset(p2, 0xff, 64*sizeof(u16)); /* No glyphs for the characters (yet) */ - } - --- -cgit 1.2-0.3.lf.el7 - diff --git a/kernel/tools/cpupowertools/files/patches/mageia/CVE-2020-16119-DCCP-CCID-structure-use-after-free.patch b/kernel/tools/cpupowertools/files/patches/mageia/CVE-2020-16119-DCCP-CCID-structure-use-after-free.patch deleted file mode 100644 index 7eb981e4..00000000 --- a/kernel/tools/cpupowertools/files/patches/mageia/CVE-2020-16119-DCCP-CCID-structure-use-after-free.patch +++ /dev/null @@ -1,305 +0,0 @@ -From MAILER-DAEMON Wed Oct 14 16:34:37 2020 -From: Kleber Sacilotto de Souza -To: netdev@vger.kernel.org -Cc: Gerrit Renker , "David S. Miller" , Jakub Kicinski , Thadeu Lima de Souza Cascardo , "Gustavo A. R. Silva" , "Alexander A. Klimov" , Kees Cook , Eric Dumazet , Alexey Kodanev , dccp@vger.kernel.org, linux-kernel@vger.kernel.org -Subject: [PATCH 1/2] dccp: ccid: move timers to struct dccp_sock -Date: Tue, 13 Oct 2020 19:18:48 +0200 -Message-Id: <20201013171849.236025-2-kleber.souza@canonical.com> -In-Reply-To: <20201013171849.236025-1-kleber.souza@canonical.com> -References: <20201013171849.236025-1-kleber.souza@canonical.com> -List-ID: -X-Mailing-List: linux-kernel@vger.kernel.org -MIME-Version: 1.0 -Content-Type: text/plain; charset="utf-8" -Content-Transfer-Encoding: 7bit - -From: Thadeu Lima de Souza Cascardo - -When dccps_hc_tx_ccid is freed, ccid timers may still trigger. The reason -del_timer_sync can't be used is because this relies on keeping a reference -to struct sock. But as we keep a pointer to dccps_hc_tx_ccid and free that -during disconnect, the timer should really belong to struct dccp_sock. - -This addresses CVE-2020-16119. - -Fixes: 839a6094140a (net: dccp: Convert timers to use timer_setup()) -Signed-off-by: Kleber Sacilotto de Souza -Signed-off-by: Thadeu Lima de Souza Cascardo -Acked-bd: Richard Sailer ---- - include/linux/dccp.h | 2 ++ - net/dccp/ccids/ccid2.c | 32 +++++++++++++++++++------------- - net/dccp/ccids/ccid3.c | 30 ++++++++++++++++++++---------- - 3 files changed, 41 insertions(+), 23 deletions(-) - -diff --git a/include/linux/dccp.h b/include/linux/dccp.h -index 07e547c02fd8..504afa1a4be6 100644 ---- a/include/linux/dccp.h -+++ b/include/linux/dccp.h -@@ -259,6 +259,7 @@ struct dccp_ackvec; - * @dccps_sync_scheduled - flag which signals "send out-of-band message soon" - * @dccps_xmitlet - tasklet scheduled by the TX CCID to dequeue data packets - * @dccps_xmit_timer - used by the TX CCID to delay sending (rate-based pacing) -+ * @dccps_ccid_timer - used by the CCIDs - * @dccps_syn_rtt - RTT sample from Request/Response exchange (in usecs) - */ - struct dccp_sock { -@@ -303,6 +304,7 @@ struct dccp_sock { - __u8 dccps_sync_scheduled:1; - struct tasklet_struct dccps_xmitlet; - struct timer_list dccps_xmit_timer; -+ struct timer_list dccps_ccid_timer; - }; - - static inline struct dccp_sock *dccp_sk(const struct sock *sk) -diff --git a/net/dccp/ccids/ccid2.c b/net/dccp/ccids/ccid2.c -index 3da1f77bd039..dbca1f1e2449 100644 ---- a/net/dccp/ccids/ccid2.c -+++ b/net/dccp/ccids/ccid2.c -@@ -126,21 +126,26 @@ static void dccp_tasklet_schedule(struct sock *sk) - - static void ccid2_hc_tx_rto_expire(struct timer_list *t) - { -- struct ccid2_hc_tx_sock *hc = from_timer(hc, t, tx_rtotimer); -- struct sock *sk = hc->sk; -- const bool sender_was_blocked = ccid2_cwnd_network_limited(hc); -+ struct dccp_sock *dp = from_timer(dp, t, dccps_ccid_timer); -+ struct sock *sk = (struct sock *)dp; -+ struct ccid2_hc_tx_sock *hc; -+ bool sender_was_blocked; - - bh_lock_sock(sk); -+ -+ if (inet_sk_state_load(sk) == DCCP_CLOSED) -+ goto out; -+ -+ hc = ccid_priv(dp->dccps_hc_tx_ccid); -+ sender_was_blocked = ccid2_cwnd_network_limited(hc); -+ - if (sock_owned_by_user(sk)) { -- sk_reset_timer(sk, &hc->tx_rtotimer, jiffies + HZ / 5); -+ sk_reset_timer(sk, &dp->dccps_ccid_timer, jiffies + HZ / 5); - goto out; - } - - ccid2_pr_debug("RTO_EXPIRE\n"); - -- if (sk->sk_state == DCCP_CLOSED) -- goto out; -- - /* back-off timer */ - hc->tx_rto <<= 1; - if (hc->tx_rto > DCCP_RTO_MAX) -@@ -166,7 +171,7 @@ static void ccid2_hc_tx_rto_expire(struct timer_list *t) - if (sender_was_blocked) - dccp_tasklet_schedule(sk); - /* restart backed-off timer */ -- sk_reset_timer(sk, &hc->tx_rtotimer, jiffies + hc->tx_rto); -+ sk_reset_timer(sk, &dp->dccps_ccid_timer, jiffies + hc->tx_rto); - out: - bh_unlock_sock(sk); - sock_put(sk); -@@ -330,7 +335,7 @@ static void ccid2_hc_tx_packet_sent(struct sock *sk, unsigned int len) - } - #endif - -- sk_reset_timer(sk, &hc->tx_rtotimer, jiffies + hc->tx_rto); -+ sk_reset_timer(sk, &dp->dccps_ccid_timer, jiffies + hc->tx_rto); - - #ifdef CONFIG_IP_DCCP_CCID2_DEBUG - do { -@@ -700,9 +705,9 @@ static void ccid2_hc_tx_packet_recv(struct sock *sk, struct sk_buff *skb) - - /* restart RTO timer if not all outstanding data has been acked */ - if (hc->tx_pipe == 0) -- sk_stop_timer(sk, &hc->tx_rtotimer); -+ sk_stop_timer(sk, &dp->dccps_ccid_timer); - else -- sk_reset_timer(sk, &hc->tx_rtotimer, jiffies + hc->tx_rto); -+ sk_reset_timer(sk, &dp->dccps_ccid_timer, jiffies + hc->tx_rto); - done: - /* check if incoming Acks allow pending packets to be sent */ - if (sender_was_blocked && !ccid2_cwnd_network_limited(hc)) -@@ -737,17 +742,18 @@ static int ccid2_hc_tx_init(struct ccid *ccid, struct sock *sk) - hc->tx_last_cong = hc->tx_lsndtime = hc->tx_cwnd_stamp = ccid2_jiffies32; - hc->tx_cwnd_used = 0; - hc->sk = sk; -- timer_setup(&hc->tx_rtotimer, ccid2_hc_tx_rto_expire, 0); -+ timer_setup(&dp->dccps_ccid_timer, ccid2_hc_tx_rto_expire, 0); - INIT_LIST_HEAD(&hc->tx_av_chunks); - return 0; - } - - static void ccid2_hc_tx_exit(struct sock *sk) - { -+ struct dccp_sock *dp = dccp_sk(sk); - struct ccid2_hc_tx_sock *hc = ccid2_hc_tx_sk(sk); - int i; - -- sk_stop_timer(sk, &hc->tx_rtotimer); -+ sk_stop_timer(sk, &dp->dccps_ccid_timer); - - for (i = 0; i < hc->tx_seqbufc; i++) - kfree(hc->tx_seqbuf[i]); -diff --git a/net/dccp/ccids/ccid3.c b/net/dccp/ccids/ccid3.c -index b9ee1a4a8955..685f4d046c0d 100644 ---- a/net/dccp/ccids/ccid3.c -+++ b/net/dccp/ccids/ccid3.c -@@ -184,17 +184,24 @@ static inline void ccid3_hc_tx_update_win_count(struct ccid3_hc_tx_sock *hc, - - static void ccid3_hc_tx_no_feedback_timer(struct timer_list *t) - { -- struct ccid3_hc_tx_sock *hc = from_timer(hc, t, tx_no_feedback_timer); -- struct sock *sk = hc->sk; -+ struct dccp_sock *dp = from_timer(dp, t, dccps_ccid_timer); -+ struct ccid3_hc_tx_sock *hc; -+ struct sock *sk = (struct sock *)dp; - unsigned long t_nfb = USEC_PER_SEC / 5; - - bh_lock_sock(sk); -+ -+ if (inet_sk_state_load(sk) == DCCP_CLOSED) -+ goto out; -+ - if (sock_owned_by_user(sk)) { - /* Try again later. */ - /* XXX: set some sensible MIB */ - goto restart_timer; - } - -+ hc = ccid_priv(dp->dccps_hc_tx_ccid); -+ - ccid3_pr_debug("%s(%p, state=%s) - entry\n", dccp_role(sk), sk, - ccid3_tx_state_name(hc->tx_state)); - -@@ -250,8 +257,8 @@ static void ccid3_hc_tx_no_feedback_timer(struct timer_list *t) - t_nfb = max(hc->tx_t_rto, 2 * hc->tx_t_ipi); - - restart_timer: -- sk_reset_timer(sk, &hc->tx_no_feedback_timer, -- jiffies + usecs_to_jiffies(t_nfb)); -+ sk_reset_timer(sk, &dp->dccps_ccid_timer, -+ jiffies + usecs_to_jiffies(t_nfb)); - out: - bh_unlock_sock(sk); - sock_put(sk); -@@ -280,7 +287,7 @@ static int ccid3_hc_tx_send_packet(struct sock *sk, struct sk_buff *skb) - return -EBADMSG; - - if (hc->tx_state == TFRC_SSTATE_NO_SENT) { -- sk_reset_timer(sk, &hc->tx_no_feedback_timer, (jiffies + -+ sk_reset_timer(sk, &dp->dccps_ccid_timer, (jiffies + - usecs_to_jiffies(TFRC_INITIAL_TIMEOUT))); - hc->tx_last_win_count = 0; - hc->tx_t_last_win_count = now; -@@ -354,6 +361,7 @@ static void ccid3_hc_tx_packet_sent(struct sock *sk, unsigned int len) - static void ccid3_hc_tx_packet_recv(struct sock *sk, struct sk_buff *skb) - { - struct ccid3_hc_tx_sock *hc = ccid3_hc_tx_sk(sk); -+ struct dccp_sock *dp = dccp_sk(sk); - struct tfrc_tx_hist_entry *acked; - ktime_t now; - unsigned long t_nfb; -@@ -420,7 +428,7 @@ static void ccid3_hc_tx_packet_recv(struct sock *sk, struct sk_buff *skb) - (unsigned int)(hc->tx_x >> 6)); - - /* unschedule no feedback timer */ -- sk_stop_timer(sk, &hc->tx_no_feedback_timer); -+ sk_stop_timer(sk, &dp->dccps_ccid_timer); - - /* - * As we have calculated new ipi, delta, t_nom it is possible -@@ -445,8 +453,8 @@ static void ccid3_hc_tx_packet_recv(struct sock *sk, struct sk_buff *skb) - "expire in %lu jiffies (%luus)\n", - dccp_role(sk), sk, usecs_to_jiffies(t_nfb), t_nfb); - -- sk_reset_timer(sk, &hc->tx_no_feedback_timer, -- jiffies + usecs_to_jiffies(t_nfb)); -+ sk_reset_timer(sk, &dp->dccps_ccid_timer, -+ jiffies + usecs_to_jiffies(t_nfb)); - } - - static int ccid3_hc_tx_parse_options(struct sock *sk, u8 packet_type, -@@ -488,21 +496,23 @@ static int ccid3_hc_tx_parse_options(struct sock *sk, u8 packet_type, - - static int ccid3_hc_tx_init(struct ccid *ccid, struct sock *sk) - { -+ struct dccp_sock *dp = dccp_sk(sk); - struct ccid3_hc_tx_sock *hc = ccid_priv(ccid); - - hc->tx_state = TFRC_SSTATE_NO_SENT; - hc->tx_hist = NULL; - hc->sk = sk; -- timer_setup(&hc->tx_no_feedback_timer, -+ timer_setup(&dp->dccps_ccid_timer, - ccid3_hc_tx_no_feedback_timer, 0); - return 0; - } - - static void ccid3_hc_tx_exit(struct sock *sk) - { -+ struct dccp_sock *dp = dccp_sk(sk); - struct ccid3_hc_tx_sock *hc = ccid3_hc_tx_sk(sk); - -- sk_stop_timer(sk, &hc->tx_no_feedback_timer); -+ sk_stop_timer(sk, &dp->dccps_ccid_timer); - tfrc_tx_hist_purge(&hc->tx_hist); - } - --- -2.25.1 - - -From MAILER-DAEMON Wed Oct 14 16:34:37 2020 -From: Kleber Sacilotto de Souza -To: netdev@vger.kernel.org -Cc: Gerrit Renker , "David S. Miller" , Jakub Kicinski , Thadeu Lima de Souza Cascardo , "Gustavo A. R. Silva" , "Alexander A. Klimov" , Kees Cook , Eric Dumazet , Alexey Kodanev , dccp@vger.kernel.org, linux-kernel@vger.kernel.org -Subject: [PATCH 2/2] Revert "dccp: don't free ccid2_hc_tx_sock struct in dccp_disconnect()" -Date: Tue, 13 Oct 2020 19:18:49 +0200 -Message-Id: <20201013171849.236025-3-kleber.souza@canonical.com> -In-Reply-To: <20201013171849.236025-1-kleber.souza@canonical.com> -References: <20201013171849.236025-1-kleber.souza@canonical.com> -List-ID: -X-Mailing-List: linux-kernel@vger.kernel.org -MIME-Version: 1.0 -Content-Type: text/plain; charset="utf-8" -Content-Transfer-Encoding: 7bit - -From: Thadeu Lima de Souza Cascardo - -This reverts commit 2677d20677314101293e6da0094ede7b5526d2b1. - -This fixes an issue that after disconnect, dccps_hc_tx_ccid will still be -kept, allowing the socket to be reused as a listener socket, and the cloned -socket will free its dccps_hc_tx_ccid, leading to a later use after free, -when the listener socket is closed. - -This addresses CVE-2020-16119. - -Fixes: 2677d2067731 (dccp: don't free ccid2_hc_tx_sock struct in dccp_disconnect()) -Reported-by: Hadar Manor -Signed-off-by: Kleber Sacilotto de Souza -Signed-off-by: Thadeu Lima de Souza Cascardo -Acked-by: Richard Sailer ---- - net/dccp/proto.c | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/net/dccp/proto.c b/net/dccp/proto.c -index 6d705d90c614..359e848dba6c 100644 ---- a/net/dccp/proto.c -+++ b/net/dccp/proto.c -@@ -279,7 +279,9 @@ int dccp_disconnect(struct sock *sk, int flags) - - dccp_clear_xmit_timers(sk); - ccid_hc_rx_delete(dp->dccps_hc_rx_ccid, sk); -+ ccid_hc_tx_delete(dp->dccps_hc_tx_ccid, sk); - dp->dccps_hc_rx_ccid = NULL; -+ dp->dccps_hc_tx_ccid = NULL; - - __skb_queue_purge(&sk->sk_receive_queue); - __skb_queue_purge(&sk->sk_write_queue); --- -2.25.1 - - diff --git a/kernel/tools/cpupowertools/files/patches/mageia/MAINTAINERS-git-github-https-github.com-for-terrelln.patch b/kernel/tools/cpupowertools/files/patches/mageia/MAINTAINERS-git-github-https-github.com-for-terrelln.patch new file mode 100644 index 00000000..0a13fff4 --- /dev/null +++ b/kernel/tools/cpupowertools/files/patches/mageia/MAINTAINERS-git-github-https-github.com-for-terrelln.patch @@ -0,0 +1,33 @@ +From 894c792e3e24c2c15d8aac15aa89ec144468e1b0 Mon Sep 17 00:00:00 2001 +From: Palmer Dabbelt +Date: Thu, 13 Oct 2022 14:46:36 -0700 +Subject: [PATCH 2/6] MAINTAINERS: git://github -> https://github.com for + terrelln + +Github deprecated the git:// links about a year ago, so let's move to +the https:// URLs instead. + +Reported-by: Conor Dooley +Link: https://github.blog/2021-09-01-improving-git-protocol-security-github/ +Signed-off-by: Palmer Dabbelt +Signed-off-by: Nick Terrell +--- + MAINTAINERS | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/MAINTAINERS b/MAINTAINERS +index e04d944005ba..4a2b7a9325dc 100644 +--- a/MAINTAINERS ++++ b/MAINTAINERS +@@ -22800,7 +22800,7 @@ ZSTD + M: Nick Terrell + S: Maintained + B: https://github.com/facebook/zstd/issues +-T: git git://github.com/terrelln/linux.git ++T: git https://github.com/terrelln/linux.git + F: include/linux/zstd* + F: lib/zstd/ + F: lib/decompress_unzstd.c +-- +2.30.6 + diff --git a/kernel/tools/cpupowertools/files/patches/mageia/fs-aufs5.10-tristate.patch b/kernel/tools/cpupowertools/files/patches/mageia/fs-aufs5.10-tristate.patch deleted file mode 100644 index f95f4ab6..00000000 --- a/kernel/tools/cpupowertools/files/patches/mageia/fs-aufs5.10-tristate.patch +++ /dev/null @@ -1,24 +0,0 @@ - -Allow aufs to be built as module. - -Signed-off-by: Thomas Backlund - ---- a/fs/aufs/Kconfig -+++ b/fs/aufs/Kconfig -@@ -1,6 +1,6 @@ - # SPDX-License-Identifier: GPL-2.0 - config AUFS_FS -- bool "Aufs (Advanced multi layered unification filesystem) support" -+ tristate "Aufs (Advanced multi layered unification filesystem) support" - help - Aufs is a stackable unification filesystem such as Unionfs, - which unifies several directories and provides a merged single -@@ -72,7 +72,7 @@ endchoice - - config AUFS_EXPORT - bool "NFS-exportable aufs" -- depends on EXPORTFS = y -+ depends on EXPORTFS - help - If you want to export your mounted aufs via NFS, then enable this - option. There are several requirements for this configuration. diff --git a/kernel/tools/cpupowertools/files/patches/mageia/fs-aufs5.10.patch b/kernel/tools/cpupowertools/files/patches/mageia/fs-aufs5.10.patch deleted file mode 100644 index 34eab23c..00000000 --- a/kernel/tools/cpupowertools/files/patches/mageia/fs-aufs5.10.patch +++ /dev/null @@ -1,37866 +0,0 @@ - Documentation/ABI/testing/debugfs-aufs | 55 + - Documentation/ABI/testing/sysfs-aufs | 31 + - Documentation/filesystems/aufs/README | 401 ++++ - Documentation/filesystems/aufs/design/01intro.txt | 158 ++ - Documentation/filesystems/aufs/design/02struct.txt | 245 +++ - .../filesystems/aufs/design/03atomic_open.txt | 72 + - Documentation/filesystems/aufs/design/03lookup.txt | 100 + - Documentation/filesystems/aufs/design/04branch.txt | 61 + - .../filesystems/aufs/design/05wbr_policy.txt | 51 + - Documentation/filesystems/aufs/design/06dirren.dot | 31 + - Documentation/filesystems/aufs/design/06dirren.txt | 89 + - Documentation/filesystems/aufs/design/06fhsm.txt | 105 ++ - Documentation/filesystems/aufs/design/06mmap.txt | 59 + - Documentation/filesystems/aufs/design/06xattr.txt | 81 + - Documentation/filesystems/aufs/design/07export.txt | 45 + - Documentation/filesystems/aufs/design/08shwh.txt | 39 + - Documentation/filesystems/aufs/design/10dynop.txt | 34 + - MAINTAINERS | 13 + - drivers/block/loop.c | 18 + - fs/Kconfig | 1 + - fs/Makefile | 1 + - fs/aufs/Kconfig | 199 ++ - fs/aufs/Makefile | 39 + - fs/aufs/aufs.h | 49 + - fs/aufs/branch.c | 1414 +++++++++++++++ - fs/aufs/branch.h | 351 ++++ - fs/aufs/cpup.c | 1432 +++++++++++++++ - fs/aufs/cpup.h | 87 + - fs/aufs/dbgaufs.c | 513 ++++++ - fs/aufs/dbgaufs.h | 40 + - fs/aufs/dcsub.c | 212 +++ - fs/aufs/dcsub.h | 124 ++ - fs/aufs/debug.c | 428 +++++ - fs/aufs/debug.h | 213 +++ - fs/aufs/dentry.c | 1141 ++++++++++++ - fs/aufs/dentry.h | 255 +++ - fs/aufs/dinfo.c | 541 ++++++ - fs/aufs/dir.c | 750 ++++++++ - fs/aufs/dir.h | 121 ++ - fs/aufs/dirren.c | 1303 +++++++++++++ - fs/aufs/dirren.h | 127 ++ - fs/aufs/dynop.c | 355 ++++ - fs/aufs/dynop.h | 64 + - fs/aufs/export.c | 824 +++++++++ - fs/aufs/f_op.c | 749 ++++++++ - fs/aufs/fhsm.c | 413 +++++ - fs/aufs/file.c | 850 +++++++++ - fs/aufs/file.h | 329 ++++ - fs/aufs/finfo.c | 136 ++ - fs/aufs/fstype.h | 388 ++++ - fs/aufs/hbl.h | 52 + - fs/aufs/hfsnotify.c | 275 +++ - fs/aufs/hfsplus.c | 47 + - fs/aufs/hnotify.c | 702 +++++++ - fs/aufs/i_op.c | 1489 +++++++++++++++ - fs/aufs/i_op_add.c | 923 ++++++++++ - fs/aufs/i_op_del.c | 500 +++++ - fs/aufs/i_op_ren.c | 1237 +++++++++++++ - fs/aufs/iinfo.c | 273 +++ - fs/aufs/inode.c | 516 ++++++ - fs/aufs/inode.h | 685 +++++++ - fs/aufs/ioctl.c | 207 +++ - fs/aufs/lcnt.h | 173 ++ - fs/aufs/loop.c | 135 ++ - fs/aufs/loop.h | 42 + - fs/aufs/magic.mk | 31 + - fs/aufs/module.c | 259 +++ - fs/aufs/module.h | 153 ++ - fs/aufs/mvdown.c | 693 +++++++ - fs/aufs/opts.c | 1867 +++++++++++++++++++ - fs/aufs/opts.h | 212 +++ - fs/aufs/plink.c | 503 +++++ - fs/aufs/poll.c | 38 + - fs/aufs/posix_acl.c | 92 + - fs/aufs/procfs.c | 157 ++ - fs/aufs/rdu.c | 371 ++++ - fs/aufs/rwsem.h | 60 + - fs/aufs/sbinfo.c | 301 +++ - fs/aufs/super.c | 1034 +++++++++++ - fs/aufs/super.h | 574 ++++++ - fs/aufs/sysaufs.c | 80 + - fs/aufs/sysaufs.h | 89 + - fs/aufs/sysfs.c | 338 ++++ - fs/aufs/sysrq.c | 136 ++ - fs/aufs/vdir.c | 883 +++++++++ - fs/aufs/vfsub.c | 872 +++++++++ - fs/aufs/vfsub.h | 341 ++++ - fs/aufs/wbr_policy.c | 817 +++++++++ - fs/aufs/whout.c | 1049 +++++++++++ - fs/aufs/whout.h | 73 + - fs/aufs/wkq.c | 359 ++++ - fs/aufs/wkq.h | 76 + - fs/aufs/xattr.c | 343 ++++ - fs/aufs/xino.c | 1912 ++++++++++++++++++++ - fs/dcache.c | 2 +- - fs/fcntl.c | 4 +- - fs/inode.c | 2 +- - fs/namespace.c | 6 + - fs/proc/base.c | 2 +- - fs/proc/nommu.c | 5 +- - fs/proc/task_mmu.c | 7 +- - fs/proc/task_nommu.c | 5 +- - fs/splice.c | 10 +- - fs/sync.c | 2 +- - include/linux/fs.h | 4 + - include/linux/lockdep.h | 3 + - include/linux/mm.h | 22 + - include/linux/mm_types.h | 2 + - include/linux/mnt_namespace.h | 3 + - include/linux/splice.h | 6 + - include/uapi/linux/aufs_type.h | 439 +++++ - kernel/fork.c | 2 +- - kernel/locking/lockdep.c | 3 +- - mm/Makefile | 2 +- - mm/filemap.c | 2 +- - mm/mmap.c | 33 +- - mm/nommu.c | 10 +- - mm/prfile.c | 86 + - 118 files changed, 36737 insertions(+), 31 deletions(-) - -diff --git a/Documentation/ABI/testing/debugfs-aufs b/Documentation/ABI/testing/debugfs-aufs -new file mode 100644 -index 000000000000..4a6694194ba6 ---- /dev/null -+++ b/Documentation/ABI/testing/debugfs-aufs -@@ -0,0 +1,55 @@ -+What: /debug/aufs/si_/ -+Date: March 2009 -+Contact: J. R. Okajima -+Description: -+ Under /debug/aufs, a directory named si_ is created -+ per aufs mount, where is a unique id generated -+ internally. -+ -+What: /debug/aufs/si_/plink -+Date: Apr 2013 -+Contact: J. R. Okajima -+Description: -+ It has three lines and shows the information about the -+ pseudo-link. The first line is a single number -+ representing a number of buckets. The second line is a -+ number of pseudo-links per buckets (separated by a -+ blank). The last line is a single number representing a -+ total number of psedo-links. -+ When the aufs mount option 'noplink' is specified, it -+ will show "1\n0\n0\n". -+ -+What: /debug/aufs/si_/xib -+Date: March 2009 -+Contact: J. R. Okajima -+Description: -+ It shows the consumed blocks by xib (External Inode Number -+ Bitmap), its block size and file size. -+ When the aufs mount option 'noxino' is specified, it -+ will be empty. About XINO files, see the aufs manual. -+ -+What: /debug/aufs/si_/xi0, xi1 ... xiN and xiN-N -+Date: March 2009 -+Contact: J. R. Okajima -+Description: -+ It shows the consumed blocks by xino (External Inode Number -+ Translation Table), its link count, block size and file -+ size. -+ Due to the file size limit, there may exist multiple -+ xino files per branch. In this case, "-N" is added to -+ the filename and it corresponds to the index of the -+ internal xino array. "-0" is omitted. -+ When the aufs mount option 'noxino' is specified, Those -+ entries won't exist. About XINO files, see the aufs -+ manual. -+ -+What: /debug/aufs/si_/xigen -+Date: March 2009 -+Contact: J. R. Okajima -+Description: -+ It shows the consumed blocks by xigen (External Inode -+ Generation Table), its block size and file size. -+ If CONFIG_AUFS_EXPORT is disabled, this entry will not -+ be created. -+ When the aufs mount option 'noxino' is specified, it -+ will be empty. About XINO files, see the aufs manual. -diff --git a/Documentation/ABI/testing/sysfs-aufs b/Documentation/ABI/testing/sysfs-aufs -new file mode 100644 -index 000000000000..82f9518495ea ---- /dev/null -+++ b/Documentation/ABI/testing/sysfs-aufs -@@ -0,0 +1,31 @@ -+What: /sys/fs/aufs/si_/ -+Date: March 2009 -+Contact: J. R. Okajima -+Description: -+ Under /sys/fs/aufs, a directory named si_ is created -+ per aufs mount, where is a unique id generated -+ internally. -+ -+What: /sys/fs/aufs/si_/br0, br1 ... brN -+Date: March 2009 -+Contact: J. R. Okajima -+Description: -+ It shows the abolute path of a member directory (which -+ is called branch) in aufs, and its permission. -+ -+What: /sys/fs/aufs/si_/brid0, brid1 ... bridN -+Date: July 2013 -+Contact: J. R. Okajima -+Description: -+ It shows the id of a member directory (which is called -+ branch) in aufs. -+ -+What: /sys/fs/aufs/si_/xi_path -+Date: March 2009 -+Contact: J. R. Okajima -+Description: -+ It shows the abolute path of XINO (External Inode Number -+ Bitmap, Translation Table and Generation Table) file -+ even if it is the default path. -+ When the aufs mount option 'noxino' is specified, it -+ will be empty. About XINO files, see the aufs manual. -diff --git a/Documentation/filesystems/aufs/README b/Documentation/filesystems/aufs/README -new file mode 100644 -index 000000000000..3e655d357134 ---- /dev/null -+++ b/Documentation/filesystems/aufs/README -@@ -0,0 +1,401 @@ -+ -+Aufs5 -- advanced multi layered unification filesystem version 5.x -+http://aufs.sf.net -+Junjiro R. Okajima -+ -+ -+0. Introduction -+---------------------------------------- -+In the early days, aufs was entirely re-designed and re-implemented -+Unionfs Version 1.x series. Adding many original ideas, approaches, -+improvements and implementations, it became totally different from -+Unionfs while keeping the basic features. -+Later, Unionfs Version 2.x series began taking some of the same -+approaches to aufs1's. -+Unionfs was being developed by Professor Erez Zadok at Stony Brook -+University and his team. -+ -+Aufs5 supports linux-v5.0 and later, If you want older kernel version -+support, -+- for linux-v4.x series, try aufs4-linux.git or aufs4-standalone.git -+- for linux-v3.x series, try aufs3-linux.git or aufs3-standalone.git -+- for linux-v2.6.16 and later, try aufs2-2.6.git, aufs2-standalone.git -+ or aufs1 from CVS on SourceForge. -+ -+Note: it becomes clear that "Aufs was rejected. Let's give it up." -+ According to Christoph Hellwig, linux rejects all union-type -+ filesystems but UnionMount. -+ -+ -+PS. Al Viro seems have a plan to merge aufs as well as overlayfs and -+ UnionMount, and he pointed out an issue around a directory mutex -+ lock and aufs addressed it. But it is still unsure whether aufs will -+ be merged (or any other union solution). -+ -+ -+ -+1. Features -+---------------------------------------- -+- unite several directories into a single virtual filesystem. The member -+ directory is called as a branch. -+- you can specify the permission flags to the branch, which are 'readonly', -+ 'readwrite' and 'whiteout-able.' -+- by upper writable branch, internal copyup and whiteout, files/dirs on -+ readonly branch are modifiable logically. -+- dynamic branch manipulation, add, del. -+- etc... -+ -+Also there are many enhancements in aufs, such as: -+- test only the highest one for the directory permission (dirperm1) -+- copyup on open (coo=) -+- 'move' policy for copy-up between two writable branches, after -+ checking free space. -+- xattr, acl -+- readdir(3) in userspace. -+- keep inode number by external inode number table -+- keep the timestamps of file/dir in internal copyup operation -+- seekable directory, supporting NFS readdir. -+- whiteout is hardlinked in order to reduce the consumption of inodes -+ on branch -+- do not copyup, nor create a whiteout when it is unnecessary -+- revert a single systemcall when an error occurs in aufs -+- remount interface instead of ioctl -+- maintain /etc/mtab by an external command, /sbin/mount.aufs. -+- loopback mounted filesystem as a branch -+- kernel thread for removing the dir who has a plenty of whiteouts -+- support copyup sparse file (a file which has a 'hole' in it) -+- default permission flags for branches -+- selectable permission flags for ro branch, whether whiteout can -+ exist or not -+- export via NFS. -+- support /fs/aufs and /aufs. -+- support multiple writable branches, some policies to select one -+ among multiple writable branches. -+- a new semantics for link(2) and rename(2) to support multiple -+ writable branches. -+- no glibc changes are required. -+- pseudo hardlink (hardlink over branches) -+- allow a direct access manually to a file on branch, e.g. bypassing aufs. -+ including NFS or remote filesystem branch. -+- userspace wrapper for pathconf(3)/fpathconf(3) with _PC_LINK_MAX. -+- and more... -+ -+Currently these features are dropped temporary from aufs5. -+See design/08plan.txt in detail. -+- nested mount, i.e. aufs as readonly no-whiteout branch of another aufs -+ (robr) -+- statistics of aufs thread (/sys/fs/aufs/stat) -+ -+Features or just an idea in the future (see also design/*.txt), -+- reorder the branch index without del/re-add. -+- permanent xino files for NFSD -+- an option for refreshing the opened files after add/del branches -+- light version, without branch manipulation. (unnecessary?) -+- copyup in userspace -+- inotify in userspace -+- readv/writev -+ -+ -+2. Download -+---------------------------------------- -+There are three GIT trees for aufs5, aufs5-linux.git, -+aufs5-standalone.git, and aufs-util.git. Note that there is no "5" in -+"aufs-util.git." -+While the aufs-util is always necessary, you need either of aufs5-linux -+or aufs5-standalone. -+ -+The aufs5-linux tree includes the whole linux mainline GIT tree, -+git://git.kernel.org/.../torvalds/linux.git. -+And you cannot select CONFIG_AUFS_FS=m for this version, eg. you cannot -+build aufs5 as an external kernel module. -+Several extra patches are not included in this tree. Only -+aufs5-standalone tree contains them. They are described in the later -+section "Configuration and Compilation." -+ -+On the other hand, the aufs5-standalone tree has only aufs source files -+and necessary patches, and you can select CONFIG_AUFS_FS=m. -+But you need to apply all aufs patches manually. -+ -+You will find GIT branches whose name is in form of "aufs5.x" where "x" -+represents the linux kernel version, "linux-5.x". For instance, -+"aufs5.0" is for linux-5.0. For latest "linux-5.x-rcN", use -+"aufs5.x-rcN" branch. -+ -+o aufs5-linux tree -+$ git clone --reference /your/linux/git/tree \ -+ git://github.com/sfjro/aufs5-linux.git aufs5-linux.git -+- if you don't have linux GIT tree, then remove "--reference ..." -+$ cd aufs5-linux.git -+$ git checkout origin/aufs5.0 -+ -+Or You may want to directly git-pull aufs into your linux GIT tree, and -+leave the patch-work to GIT. -+$ cd /your/linux/git/tree -+$ git remote add aufs5 git://github.com/sfjro/aufs5-linux.git -+$ git fetch aufs5 -+$ git checkout -b my5.0 v5.0 -+$ (add your local change...) -+$ git pull aufs5 aufs5.0 -+- now you have v5.0 + your_changes + aufs5.0 in you my5.0 branch. -+- you may need to solve some conflicts between your_changes and -+ aufs5.0. in this case, git-rerere is recommended so that you can -+ solve the similar conflicts automatically when you upgrade to 5.1 or -+ later in the future. -+ -+o aufs5-standalone tree -+$ git clone git://github.com/sfjro/aufs5-standalone.git aufs5-standalone.git -+$ cd aufs5-standalone.git -+$ git checkout origin/aufs5.0 -+ -+o aufs-util tree -+$ git clone git://git.code.sf.net/p/aufs/aufs-util aufs-util.git -+- note that the public aufs-util.git is on SourceForge instead of -+ GitHUB. -+$ cd aufs-util.git -+$ git checkout origin/aufs5.0 -+ -+Note: The 5.x-rcN branch is to be used with `rc' kernel versions ONLY. -+The minor version number, 'x' in '5.x', of aufs may not always -+follow the minor version number of the kernel. -+Because changes in the kernel that cause the use of a new -+minor version number do not always require changes to aufs-util. -+ -+Since aufs-util has its own minor version number, you may not be -+able to find a GIT branch in aufs-util for your kernel's -+exact minor version number. -+In this case, you should git-checkout the branch for the -+nearest lower number. -+ -+For (an unreleased) example: -+If you are using "linux-5.10" and the "aufs5.10" branch -+does not exist in aufs-util repository, then "aufs5.9", "aufs5.8" -+or something numerically smaller is the branch for your kernel. -+ -+Also you can view all branches by -+ $ git branch -a -+ -+ -+3. Configuration and Compilation -+---------------------------------------- -+Make sure you have git-checkout'ed the correct branch. -+ -+For aufs5-linux tree, -+- enable CONFIG_AUFS_FS. -+- set other aufs configurations if necessary. -+ -+For aufs5-standalone tree, -+There are several ways to build. -+ -+1. -+- apply ./aufs5-kbuild.patch to your kernel source files. -+- apply ./aufs5-base.patch too. -+- apply ./aufs5-mmap.patch too. -+- apply ./aufs5-standalone.patch too, if you have a plan to set -+ CONFIG_AUFS_FS=m. otherwise you don't need ./aufs5-standalone.patch. -+- copy ./{Documentation,fs,include/uapi/linux/aufs_type.h} files to your -+ kernel source tree. Never copy $PWD/include/uapi/linux/Kbuild. -+- enable CONFIG_AUFS_FS, you can select either -+ =m or =y. -+- and build your kernel as usual. -+- install the built kernel. -+- install the header files too by "make headers_install" to the -+ directory where you specify. By default, it is $PWD/usr. -+ "make help" shows a brief note for headers_install. -+- and reboot your system. -+ -+2. -+- module only (CONFIG_AUFS_FS=m). -+- apply ./aufs5-base.patch to your kernel source files. -+- apply ./aufs5-mmap.patch too. -+- apply ./aufs5-standalone.patch too. -+- build your kernel, don't forget "make headers_install", and reboot. -+- edit ./config.mk and set other aufs configurations if necessary. -+ Note: You should read $PWD/fs/aufs/Kconfig carefully which describes -+ every aufs configurations. -+- build the module by simple "make". -+- you can specify ${KDIR} make variable which points to your kernel -+ source tree. -+- install the files -+ + run "make install" to install the aufs module, or copy the built -+ $PWD/aufs.ko to /lib/modules/... and run depmod -a (or reboot simply). -+ + run "make install_headers" (instead of headers_install) to install -+ the modified aufs header file (you can specify DESTDIR which is -+ available in aufs standalone version's Makefile only), or copy -+ $PWD/usr/include/linux/aufs_type.h to /usr/include/linux or wherever -+ you like manually. By default, the target directory is $PWD/usr. -+- no need to apply aufs5-kbuild.patch, nor copying source files to your -+ kernel source tree. -+ -+Note: The header file aufs_type.h is necessary to build aufs-util -+ as well as "make headers_install" in the kernel source tree. -+ headers_install is subject to be forgotten, but it is essentially -+ necessary, not only for building aufs-util. -+ You may not meet problems without headers_install in some older -+ version though. -+ -+And then, -+- read README in aufs-util, build and install it -+- note that your distribution may contain an obsoleted version of -+ aufs_type.h in /usr/include/linux or something. When you build aufs -+ utilities, make sure that your compiler refers the correct aufs header -+ file which is built by "make headers_install." -+- if you want to use readdir(3) in userspace or pathconf(3) wrapper, -+ then run "make install_ulib" too. And refer to the aufs manual in -+ detail. -+ -+There several other patches in aufs5-standalone.git. They are all -+optional. When you meet some problems, they will help you. -+- aufs5-loopback.patch -+ Supports a nested loopback mount in a branch-fs. This patch is -+ unnecessary until aufs produces a message like "you may want to try -+ another patch for loopback file". -+- proc_mounts.patch -+ When there are many mountpoints and many mount(2)/umount(2) are -+ running, then /proc/mounts may not show the all mountpoints. This -+ patch makes /proc/mounts always show the full mountpoints list. -+ If you don't want to apply this patch and meet such problem, then you -+ need to increase the value of 'ProcMounts_Times' make-variable in -+ aufs-util.git as a second best solution. -+- vfs-ino.patch -+ Modifies a system global kernel internal function get_next_ino() in -+ order to stop assigning 0 for an inode-number. Not directly related to -+ aufs, but recommended generally. -+- tmpfs-idr.patch -+ Keeps the tmpfs inode number as the lowest value. Effective to reduce -+ the size of aufs XINO files for tmpfs branch. Also it prevents the -+ duplication of inode number, which is important for backup tools and -+ other utilities. When you find aufs XINO files for tmpfs branch -+ growing too much, try this patch. -+- lockdep-debug.patch -+ Because aufs is not only an ordinary filesystem (callee of VFS), but -+ also a caller of VFS functions for branch filesystems, subclassing of -+ the internal locks for LOCKDEP is necessary. LOCKDEP is a debugging -+ feature of linux kernel. If you enable CONFIG_LOCKDEP, then you will -+ need to apply this debug patch to expand several constant values. -+ If you don't know what LOCKDEP is, then you don't have apply this -+ patch. -+ -+ -+4. Usage -+---------------------------------------- -+At first, make sure aufs-util are installed, and please read the aufs -+manual, aufs.5 in aufs-util.git tree. -+$ man -l aufs.5 -+ -+And then, -+$ mkdir /tmp/rw /tmp/aufs -+# mount -t aufs -o br=/tmp/rw:${HOME} none /tmp/aufs -+ -+Here is another example. The result is equivalent. -+# mount -t aufs -o br=/tmp/rw=rw:${HOME}=ro none /tmp/aufs -+ Or -+# mount -t aufs -o br:/tmp/rw none /tmp/aufs -+# mount -o remount,append:${HOME} /tmp/aufs -+ -+Then, you can see whole tree of your home dir through /tmp/aufs. If -+you modify a file under /tmp/aufs, the one on your home directory is -+not affected, instead the same named file will be newly created under -+/tmp/rw. And all of your modification to a file will be applied to -+the one under /tmp/rw. This is called the file based Copy on Write -+(COW) method. -+Aufs mount options are described in aufs.5. -+If you run chroot or something and make your aufs as a root directory, -+then you need to customize the shutdown script. See the aufs manual in -+detail. -+ -+Additionally, there are some sample usages of aufs which are a -+diskless system with network booting, and LiveCD over NFS. -+See sample dir in CVS tree on SourceForge. -+ -+ -+5. Contact -+---------------------------------------- -+When you have any problems or strange behaviour in aufs, please let me -+know with: -+- /proc/mounts (instead of the output of mount(8)) -+- /sys/module/aufs/* -+- /sys/fs/aufs/* (if you have them) -+- /debug/aufs/* (if you have them) -+- linux kernel version -+ if your kernel is not plain, for example modified by distributor, -+ the url where i can download its source is necessary too. -+- aufs version which was printed at loading the module or booting the -+ system, instead of the date you downloaded. -+- configuration (define/undefine CONFIG_AUFS_xxx) -+- kernel configuration or /proc/config.gz (if you have it) -+- LSM (linux security module, if you are using) -+- behaviour which you think to be incorrect -+- actual operation, reproducible one is better -+- mailto: aufs-users at lists.sourceforge.net -+ -+Usually, I don't watch the Public Areas(Bugs, Support Requests, Patches, -+and Feature Requests) on SourceForge. Please join and write to -+aufs-users ML. -+ -+ -+6. Acknowledgements -+---------------------------------------- -+Thanks to everyone who have tried and are using aufs, whoever -+have reported a bug or any feedback. -+ -+Especially donators: -+Tomas Matejicek(slax.org) made a donation (much more than once). -+ Since Apr 2010, Tomas M (the author of Slax and Linux Live -+ scripts) is making "doubling" donations. -+ Unfortunately I cannot list all of the donators, but I really -+ appreciate. -+ It ends Aug 2010, but the ordinary donation URL is still available. -+ -+Dai Itasaka made a donation (2007/8). -+Chuck Smith made a donation (2008/4, 10 and 12). -+Henk Schoneveld made a donation (2008/9). -+Chih-Wei Huang, ASUS, CTC donated Eee PC 4G (2008/10). -+Francois Dupoux made a donation (2008/11). -+Bruno Cesar Ribas and Luis Carlos Erpen de Bona, C3SL serves public -+ aufs2 GIT tree (2009/2). -+William Grant made a donation (2009/3). -+Patrick Lane made a donation (2009/4). -+The Mail Archive (mail-archive.com) made donations (2009/5). -+Nippy Networks (Ed Wildgoose) made a donation (2009/7). -+New Dream Network, LLC (www.dreamhost.com) made a donation (2009/11). -+Pavel Pronskiy made a donation (2011/2). -+Iridium and Inmarsat satellite phone retailer (www.mailasail.com), Nippy -+ Networks (Ed Wildgoose) made a donation for hardware (2011/3). -+Max Lekomcev (DOM-TV project) made a donation (2011/7, 12, 2012/3, 6 and -+11). -+Sam Liddicott made a donation (2011/9). -+Era Scarecrow made a donation (2013/4). -+Bor Ratajc made a donation (2013/4). -+Alessandro Gorreta made a donation (2013/4). -+POIRETTE Marc made a donation (2013/4). -+Alessandro Gorreta made a donation (2013/4). -+lauri kasvandik made a donation (2013/5). -+"pemasu from Finland" made a donation (2013/7). -+The Parted Magic Project made a donation (2013/9 and 11). -+Pavel Barta made a donation (2013/10). -+Nikolay Pertsev made a donation (2014/5). -+James B made a donation (2014/7 and 2015/7). -+Stefano Di Biase made a donation (2014/8). -+Daniel Epellei made a donation (2015/1). -+OmegaPhil made a donation (2016/1, 2018/4). -+Tomasz Szewczyk made a donation (2016/4). -+James Burry made a donation (2016/12). -+Carsten Rose made a donation (2018/9). -+Porteus Kiosk made a donation (2018/10). -+ -+Thank you very much. -+Donations are always, including future donations, very important and -+helpful for me to keep on developing aufs. -+ -+ -+7. -+---------------------------------------- -+If you are an experienced user, no explanation is needed. Aufs is -+just a linux filesystem. -+ -+ -+Enjoy! -+ -+# Local variables: ; -+# mode: text; -+# End: ; -diff --git a/Documentation/filesystems/aufs/design/01intro.txt b/Documentation/filesystems/aufs/design/01intro.txt -new file mode 100644 -index 000000000000..7f75ee4a784c ---- /dev/null -+++ b/Documentation/filesystems/aufs/design/01intro.txt -@@ -0,0 +1,158 @@ -+ -+# Copyright (C) 2005-2020 Junjiro R. Okajima -+ -+Introduction -+---------------------------------------- -+ -+aufs [ei ju: ef es] | /ey-yoo-ef-es/ | [a u f s] -+1. abbrev. for "advanced multi-layered unification filesystem". -+2. abbrev. for "another unionfs". -+3. abbrev. for "auf das" in German which means "on the" in English. -+ Ex. "Butter aufs Brot"(G) means "butter onto bread"(E). -+ But "Filesystem aufs Filesystem" is hard to understand. -+4. abbrev. for "African Urban Fashion Show". -+ -+AUFS is a filesystem with features: -+- multi layered stackable unification filesystem, the member directory -+ is called as a branch. -+- branch permission and attribute, 'readonly', 'real-readonly', -+ 'readwrite', 'whiteout-able', 'link-able whiteout', etc. and their -+ combination. -+- internal "file copy-on-write". -+- logical deletion, whiteout. -+- dynamic branch manipulation, adding, deleting and changing permission. -+- allow bypassing aufs, user's direct branch access. -+- external inode number translation table and bitmap which maintains the -+ persistent aufs inode number. -+- seekable directory, including NFS readdir. -+- file mapping, mmap and sharing pages. -+- pseudo-link, hardlink over branches. -+- loopback mounted filesystem as a branch. -+- several policies to select one among multiple writable branches. -+- revert a single systemcall when an error occurs in aufs. -+- and more... -+ -+ -+Multi Layered Stackable Unification Filesystem -+---------------------------------------------------------------------- -+Most people already knows what it is. -+It is a filesystem which unifies several directories and provides a -+merged single directory. When users access a file, the access will be -+passed/re-directed/converted (sorry, I am not sure which English word is -+correct) to the real file on the member filesystem. The member -+filesystem is called 'lower filesystem' or 'branch' and has a mode -+'readonly' and 'readwrite.' And the deletion for a file on the lower -+readonly branch is handled by creating 'whiteout' on the upper writable -+branch. -+ -+On LKML, there have been discussions about UnionMount (Jan Blunck, -+Bharata B Rao and Valerie Aurora) and Unionfs (Erez Zadok). They took -+different approaches to implement the merged-view. -+The former tries putting it into VFS, and the latter implements as a -+separate filesystem. -+(If I misunderstand about these implementations, please let me know and -+I shall correct it. Because it is a long time ago when I read their -+source files last time). -+ -+UnionMount's approach will be able to small, but may be hard to share -+branches between several UnionMount since the whiteout in it is -+implemented in the inode on branch filesystem and always -+shared. According to Bharata's post, readdir does not seems to be -+finished yet. -+There are several missing features known in this implementations such as -+- for users, the inode number may change silently. eg. copy-up. -+- link(2) may break by copy-up. -+- read(2) may get an obsoleted filedata (fstat(2) too). -+- fcntl(F_SETLK) may be broken by copy-up. -+- unnecessary copy-up may happen, for example mmap(MAP_PRIVATE) after -+ open(O_RDWR). -+ -+In linux-3.18, "overlay" filesystem (formerly known as "overlayfs") was -+merged into mainline. This is another implementation of UnionMount as a -+separated filesystem. All the limitations and known problems which -+UnionMount are equally inherited to "overlay" filesystem. -+ -+Unionfs has a longer history. When I started implementing a stackable -+filesystem (Aug 2005), it already existed. It has virtual super_block, -+inode, dentry and file objects and they have an array pointing lower -+same kind objects. After contributing many patches for Unionfs, I -+re-started my project AUFS (Jun 2006). -+ -+In AUFS, the structure of filesystem resembles to Unionfs, but I -+implemented my own ideas, approaches and enhancements and it became -+totally different one. -+ -+Comparing DM snapshot and fs based implementation -+- the number of bytes to be copied between devices is much smaller. -+- the type of filesystem must be one and only. -+- the fs must be writable, no readonly fs, even for the lower original -+ device. so the compression fs will not be usable. but if we use -+ loopback mount, we may address this issue. -+ for instance, -+ mount /cdrom/squashfs.img /sq -+ losetup /sq/ext2.img -+ losetup /somewhere/cow -+ dmsetup "snapshot /dev/loop0 /dev/loop1 ..." -+- it will be difficult (or needs more operations) to extract the -+ difference between the original device and COW. -+- DM snapshot-merge may help a lot when users try merging. in the -+ fs-layer union, users will use rsync(1). -+ -+You may want to read my old paper "Filesystems in LiveCD" -+(http://aufs.sourceforge.net/aufs2/report/sq/sq.pdf). -+ -+ -+Several characters/aspects/persona of aufs -+---------------------------------------------------------------------- -+ -+Aufs has several characters, aspects or persona. -+1. a filesystem, callee of VFS helper -+2. sub-VFS, caller of VFS helper for branches -+3. a virtual filesystem which maintains persistent inode number -+4. reader/writer of files on branches such like an application -+ -+1. Callee of VFS Helper -+As an ordinary linux filesystem, aufs is a callee of VFS. For instance, -+unlink(2) from an application reaches sys_unlink() kernel function and -+then vfs_unlink() is called. vfs_unlink() is one of VFS helper and it -+calls filesystem specific unlink operation. Actually aufs implements the -+unlink operation but it behaves like a redirector. -+ -+2. Caller of VFS Helper for Branches -+aufs_unlink() passes the unlink request to the branch filesystem as if -+it were called from VFS. So the called unlink operation of the branch -+filesystem acts as usual. As a caller of VFS helper, aufs should handle -+every necessary pre/post operation for the branch filesystem. -+- acquire the lock for the parent dir on a branch -+- lookup in a branch -+- revalidate dentry on a branch -+- mnt_want_write() for a branch -+- vfs_unlink() for a branch -+- mnt_drop_write() for a branch -+- release the lock on a branch -+ -+3. Persistent Inode Number -+One of the most important issue for a filesystem is to maintain inode -+numbers. This is particularly important to support exporting a -+filesystem via NFS. Aufs is a virtual filesystem which doesn't have a -+backend block device for its own. But some storage is necessary to -+keep and maintain the inode numbers. It may be a large space and may not -+suit to keep in memory. Aufs rents some space from its first writable -+branch filesystem (by default) and creates file(s) on it. These files -+are created by aufs internally and removed soon (currently) keeping -+opened. -+Note: Because these files are removed, they are totally gone after -+ unmounting aufs. It means the inode numbers are not persistent -+ across unmount or reboot. I have a plan to make them really -+ persistent which will be important for aufs on NFS server. -+ -+4. Read/Write Files Internally (copy-on-write) -+Because a branch can be readonly, when you write a file on it, aufs will -+"copy-up" it to the upper writable branch internally. And then write the -+originally requested thing to the file. Generally kernel doesn't -+open/read/write file actively. In aufs, even a single write may cause a -+internal "file copy". This behaviour is very similar to cp(1) command. -+ -+Some people may think it is better to pass such work to user space -+helper, instead of doing in kernel space. Actually I am still thinking -+about it. But currently I have implemented it in kernel space. -diff --git a/Documentation/filesystems/aufs/design/02struct.txt b/Documentation/filesystems/aufs/design/02struct.txt -new file mode 100644 -index 000000000000..0a948e812796 ---- /dev/null -+++ b/Documentation/filesystems/aufs/design/02struct.txt -@@ -0,0 +1,245 @@ -+ -+# Copyright (C) 2005-2020 Junjiro R. Okajima -+ -+Basic Aufs Internal Structure -+ -+Superblock/Inode/Dentry/File Objects -+---------------------------------------------------------------------- -+As like an ordinary filesystem, aufs has its own -+superblock/inode/dentry/file objects. All these objects have a -+dynamically allocated array and store the same kind of pointers to the -+lower filesystem, branch. -+For example, when you build a union with one readwrite branch and one -+readonly, mounted /au, /rw and /ro respectively. -+- /au = /rw + /ro -+- /ro/fileA exists but /rw/fileA -+ -+Aufs lookup operation finds /ro/fileA and gets dentry for that. These -+pointers are stored in a aufs dentry. The array in aufs dentry will be, -+- [0] = NULL (because /rw/fileA doesn't exist) -+- [1] = /ro/fileA -+ -+This style of an array is essentially same to the aufs -+superblock/inode/dentry/file objects. -+ -+Because aufs supports manipulating branches, ie. add/delete/change -+branches dynamically, these objects has its own generation. When -+branches are changed, the generation in aufs superblock is -+incremented. And a generation in other object are compared when it is -+accessed. When a generation in other objects are obsoleted, aufs -+refreshes the internal array. -+ -+ -+Superblock -+---------------------------------------------------------------------- -+Additionally aufs superblock has some data for policies to select one -+among multiple writable branches, XIB files, pseudo-links and kobject. -+See below in detail. -+About the policies which supports copy-down a directory, see -+wbr_policy.txt too. -+ -+ -+Branch and XINO(External Inode Number Translation Table) -+---------------------------------------------------------------------- -+Every branch has its own xino (external inode number translation table) -+file. The xino file is created and unlinked by aufs internally. When two -+members of a union exist on the same filesystem, they share the single -+xino file. -+The struct of a xino file is simple, just a sequence of aufs inode -+numbers which is indexed by the lower inode number. -+In the above sample, assume the inode number of /ro/fileA is i111 and -+aufs assigns the inode number i999 for fileA. Then aufs writes 999 as -+4(8) bytes at 111 * 4(8) bytes offset in the xino file. -+ -+When the inode numbers are not contiguous, the xino file will be sparse -+which has a hole in it and doesn't consume as much disk space as it -+might appear. If your branch filesystem consumes disk space for such -+holes, then you should specify 'xino=' option at mounting aufs. -+ -+Aufs has a mount option to free the disk blocks for such holes in XINO -+files on tmpfs or ramdisk. But it is not so effective actually. If you -+meet a problem of disk shortage due to XINO files, then you should try -+"tmpfs-ino.patch" (and "vfs-ino.patch" too) in aufs4-standalone.git. -+The patch localizes the assignment inumbers per tmpfs-mount and avoid -+the holes in XINO files. -+ -+Also a writable branch has three kinds of "whiteout bases". All these -+are existed when the branch is joined to aufs, and their names are -+whiteout-ed doubly, so that users will never see their names in aufs -+hierarchy. -+1. a regular file which will be hardlinked to all whiteouts. -+2. a directory to store a pseudo-link. -+3. a directory to store an "orphan"-ed file temporary. -+ -+1. Whiteout Base -+ When you remove a file on a readonly branch, aufs handles it as a -+ logical deletion and creates a whiteout on the upper writable branch -+ as a hardlink of this file in order not to consume inode on the -+ writable branch. -+2. Pseudo-link Dir -+ See below, Pseudo-link. -+3. Step-Parent Dir -+ When "fileC" exists on the lower readonly branch only and it is -+ opened and removed with its parent dir, and then user writes -+ something into it, then aufs copies-up fileC to this -+ directory. Because there is no other dir to store fileC. After -+ creating a file under this dir, the file is unlinked. -+ -+Because aufs supports manipulating branches, ie. add/delete/change -+dynamically, a branch has its own id. When the branch order changes, -+aufs finds the new index by searching the branch id. -+ -+ -+Pseudo-link -+---------------------------------------------------------------------- -+Assume "fileA" exists on the lower readonly branch only and it is -+hardlinked to "fileB" on the branch. When you write something to fileA, -+aufs copies-up it to the upper writable branch. Additionally aufs -+creates a hardlink under the Pseudo-link Directory of the writable -+branch. The inode of a pseudo-link is kept in aufs super_block as a -+simple list. If fileB is read after unlinking fileA, aufs returns -+filedata from the pseudo-link instead of the lower readonly -+branch. Because the pseudo-link is based upon the inode, to keep the -+inode number by xino (see above) is essentially necessary. -+ -+All the hardlinks under the Pseudo-link Directory of the writable branch -+should be restored in a proper location later. Aufs provides a utility -+to do this. The userspace helpers executed at remounting and unmounting -+aufs by default. -+During this utility is running, it puts aufs into the pseudo-link -+maintenance mode. In this mode, only the process which began the -+maintenance mode (and its child processes) is allowed to operate in -+aufs. Some other processes which are not related to the pseudo-link will -+be allowed to run too, but the rest have to return an error or wait -+until the maintenance mode ends. If a process already acquires an inode -+mutex (in VFS), it has to return an error. -+ -+ -+XIB(external inode number bitmap) -+---------------------------------------------------------------------- -+Addition to the xino file per a branch, aufs has an external inode number -+bitmap in a superblock object. It is also an internal file such like a -+xino file. -+It is a simple bitmap to mark whether the aufs inode number is in-use or -+not. -+To reduce the file I/O, aufs prepares a single memory page to cache xib. -+ -+As well as XINO files, aufs has a feature to truncate/refresh XIB to -+reduce the number of consumed disk blocks for these files. -+ -+ -+Virtual or Vertical Dir, and Readdir in Userspace -+---------------------------------------------------------------------- -+In order to support multiple layers (branches), aufs readdir operation -+constructs a virtual dir block on memory. For readdir, aufs calls -+vfs_readdir() internally for each dir on branches, merges their entries -+with eliminating the whiteout-ed ones, and sets it to file (dir) -+object. So the file object has its entry list until it is closed. The -+entry list will be updated when the file position is zero and becomes -+obsoleted. This decision is made in aufs automatically. -+ -+The dynamically allocated memory block for the name of entries has a -+unit of 512 bytes (by default) and stores the names contiguously (no -+padding). Another block for each entry is handled by kmem_cache too. -+During building dir blocks, aufs creates hash list and judging whether -+the entry is whiteouted by its upper branch or already listed. -+The merged result is cached in the corresponding inode object and -+maintained by a customizable life-time option. -+ -+Some people may call it can be a security hole or invite DoS attack -+since the opened and once readdir-ed dir (file object) holds its entry -+list and becomes a pressure for system memory. But I'd say it is similar -+to files under /proc or /sys. The virtual files in them also holds a -+memory page (generally) while they are opened. When an idea to reduce -+memory for them is introduced, it will be applied to aufs too. -+For those who really hate this situation, I've developed readdir(3) -+library which operates this merging in userspace. You just need to set -+LD_PRELOAD environment variable, and aufs will not consume no memory in -+kernel space for readdir(3). -+ -+ -+Workqueue -+---------------------------------------------------------------------- -+Aufs sometimes requires privilege access to a branch. For instance, -+in copy-up/down operation. When a user process is going to make changes -+to a file which exists in the lower readonly branch only, and the mode -+of one of ancestor directories may not be writable by a user -+process. Here aufs copy-up the file with its ancestors and they may -+require privilege to set its owner/group/mode/etc. -+This is a typical case of a application character of aufs (see -+Introduction). -+ -+Aufs uses workqueue synchronously for this case. It creates its own -+workqueue. The workqueue is a kernel thread and has privilege. Aufs -+passes the request to call mkdir or write (for example), and wait for -+its completion. This approach solves a problem of a signal handler -+simply. -+If aufs didn't adopt the workqueue and changed the privilege of the -+process, then the process may receive the unexpected SIGXFSZ or other -+signals. -+ -+Also aufs uses the system global workqueue ("events" kernel thread) too -+for asynchronous tasks, such like handling inotify/fsnotify, re-creating a -+whiteout base and etc. This is unrelated to a privilege. -+Most of aufs operation tries acquiring a rw_semaphore for aufs -+superblock at the beginning, at the same time waits for the completion -+of all queued asynchronous tasks. -+ -+ -+Whiteout -+---------------------------------------------------------------------- -+The whiteout in aufs is very similar to Unionfs's. That is represented -+by its filename. UnionMount takes an approach of a file mode, but I am -+afraid several utilities (find(1) or something) will have to support it. -+ -+Basically the whiteout represents "logical deletion" which stops aufs to -+lookup further, but also it represents "dir is opaque" which also stop -+further lookup. -+ -+In aufs, rmdir(2) and rename(2) for dir uses whiteout alternatively. -+In order to make several functions in a single systemcall to be -+revertible, aufs adopts an approach to rename a directory to a temporary -+unique whiteouted name. -+For example, in rename(2) dir where the target dir already existed, aufs -+renames the target dir to a temporary unique whiteouted name before the -+actual rename on a branch, and then handles other actions (make it opaque, -+update the attributes, etc). If an error happens in these actions, aufs -+simply renames the whiteouted name back and returns an error. If all are -+succeeded, aufs registers a function to remove the whiteouted unique -+temporary name completely and asynchronously to the system global -+workqueue. -+ -+ -+Copy-up -+---------------------------------------------------------------------- -+It is a well-known feature or concept. -+When user modifies a file on a readonly branch, aufs operate "copy-up" -+internally and makes change to the new file on the upper writable branch. -+When the trigger systemcall does not update the timestamps of the parent -+dir, aufs reverts it after copy-up. -+ -+ -+Move-down (aufs3.9 and later) -+---------------------------------------------------------------------- -+"Copy-up" is one of the essential feature in aufs. It copies a file from -+the lower readonly branch to the upper writable branch when a user -+changes something about the file. -+"Move-down" is an opposite action of copy-up. Basically this action is -+ran manually instead of automatically and internally. -+For desgin and implementation, aufs has to consider these issues. -+- whiteout for the file may exist on the lower branch. -+- ancestor directories may not exist on the lower branch. -+- diropq for the ancestor directories may exist on the upper branch. -+- free space on the lower branch will reduce. -+- another access to the file may happen during moving-down, including -+ UDBA (see "Revalidate Dentry and UDBA"). -+- the file should not be hard-linked nor pseudo-linked. they should be -+ handled by auplink utility later. -+ -+Sometimes users want to move-down a file from the upper writable branch -+to the lower readonly or writable branch. For instance, -+- the free space of the upper writable branch is going to run out. -+- create a new intermediate branch between the upper and lower branch. -+- etc. -+ -+For this purpose, use "aumvdown" command in aufs-util.git. -diff --git a/Documentation/filesystems/aufs/design/03atomic_open.txt b/Documentation/filesystems/aufs/design/03atomic_open.txt -new file mode 100644 -index 000000000000..415205649c4c ---- /dev/null -+++ b/Documentation/filesystems/aufs/design/03atomic_open.txt -@@ -0,0 +1,72 @@ -+ -+# Copyright (C) 2015-2020 Junjiro R. Okajima -+ -+Support for a branch who has its ->atomic_open() -+---------------------------------------------------------------------- -+The filesystems who implement its ->atomic_open() are not majority. For -+example NFSv4 does, and aufs should call NFSv4 ->atomic_open, -+particularly for open(O_CREAT|O_EXCL, 0400) case. Other than -+->atomic_open(), NFSv4 returns an error for this open(2). While I am not -+sure whether all filesystems who have ->atomic_open() behave like this, -+but NFSv4 surely returns the error. -+ -+In order to support ->atomic_open() for aufs, there are a few -+approaches. -+ -+A. Introduce aufs_atomic_open() -+ - calls one of VFS:do_last(), lookup_open() or atomic_open() for -+ branch fs. -+B. Introduce aufs_atomic_open() calling create, open and chmod. this is -+ an aufs user Pip Cet's approach -+ - calls aufs_create(), VFS finish_open() and notify_change(). -+ - pass fake-mode to finish_open(), and then correct the mode by -+ notify_change(). -+C. Extend aufs_open() to call branch fs's ->atomic_open() -+ - no aufs_atomic_open(). -+ - aufs_lookup() registers the TID to an aufs internal object. -+ - aufs_create() does nothing when the matching TID is registered, but -+ registers the mode. -+ - aufs_open() calls branch fs's ->atomic_open() when the matching -+ TID is registered. -+D. Extend aufs_open() to re-try branch fs's ->open() with superuser's -+ credential -+ - no aufs_atomic_open(). -+ - aufs_create() registers the TID to an internal object. this info -+ represents "this process created this file just now." -+ - when aufs gets EACCES from branch fs's ->open(), then confirm the -+ registered TID and re-try open() with superuser's credential. -+ -+Pros and cons for each approach. -+ -+A. -+ - straightforward but highly depends upon VFS internal. -+ - the atomic behavaiour is kept. -+ - some of parameters such as nameidata are hard to reproduce for -+ branch fs. -+ - large overhead. -+B. -+ - easy to implement. -+ - the atomic behavaiour is lost. -+C. -+ - the atomic behavaiour is kept. -+ - dirty and tricky. -+ - VFS checks whether the file is created correctly after calling -+ ->create(), which means this approach doesn't work. -+D. -+ - easy to implement. -+ - the atomic behavaiour is lost. -+ - to open a file with superuser's credential and give it to a user -+ process is a bad idea, since the file object keeps the credential -+ in it. It may affect LSM or something. This approach doesn't work -+ either. -+ -+The approach A is ideal, but it hard to implement. So here is a -+variation of A, which is to be implemented. -+ -+A-1. Introduce aufs_atomic_open() -+ - calls branch fs ->atomic_open() if exists. otherwise calls -+ vfs_create() and finish_open(). -+ - the demerit is that the several checks after branch fs -+ ->atomic_open() are lost. in the ordinary case, the checks are -+ done by VFS:do_last(), lookup_open() and atomic_open(). some can -+ be implemented in aufs, but not all I am afraid. -diff --git a/Documentation/filesystems/aufs/design/03lookup.txt b/Documentation/filesystems/aufs/design/03lookup.txt -new file mode 100644 -index 000000000000..0b3b22bc999f ---- /dev/null -+++ b/Documentation/filesystems/aufs/design/03lookup.txt -@@ -0,0 +1,100 @@ -+ -+# Copyright (C) 2005-2020 Junjiro R. Okajima -+ -+Lookup in a Branch -+---------------------------------------------------------------------- -+Since aufs has a character of sub-VFS (see Introduction), it operates -+lookup for branches as VFS does. It may be a heavy work. But almost all -+lookup operation in aufs is the simplest case, ie. lookup only an entry -+directly connected to its parent. Digging down the directory hierarchy -+is unnecessary. VFS has a function lookup_one_len() for that use, and -+aufs calls it. -+ -+When a branch is a remote filesystem, aufs basically relies upon its -+->d_revalidate(), also aufs forces the hardest revalidate tests for -+them. -+For d_revalidate, aufs implements three levels of revalidate tests. See -+"Revalidate Dentry and UDBA" in detail. -+ -+ -+Test Only the Highest One for the Directory Permission (dirperm1 option) -+---------------------------------------------------------------------- -+Let's try case study. -+- aufs has two branches, upper readwrite and lower readonly. -+ /au = /rw + /ro -+- "dirA" exists under /ro, but /rw. and its mode is 0700. -+- user invoked "chmod a+rx /au/dirA" -+- the internal copy-up is activated and "/rw/dirA" is created and its -+ permission bits are set to world readable. -+- then "/au/dirA" becomes world readable? -+ -+In this case, /ro/dirA is still 0700 since it exists in readonly branch, -+or it may be a natively readonly filesystem. If aufs respects the lower -+branch, it should not respond readdir request from other users. But user -+allowed it by chmod. Should really aufs rejects showing the entries -+under /ro/dirA? -+ -+To be honest, I don't have a good solution for this case. So aufs -+implements 'dirperm1' and 'nodirperm1' mount options, and leave it to -+users. -+When dirperm1 is specified, aufs checks only the highest one for the -+directory permission, and shows the entries. Otherwise, as usual, checks -+every dir existing on all branches and rejects the request. -+ -+As a side effect, dirperm1 option improves the performance of aufs -+because the number of permission check is reduced when the number of -+branch is many. -+ -+ -+Revalidate Dentry and UDBA (User's Direct Branch Access) -+---------------------------------------------------------------------- -+Generally VFS helpers re-validate a dentry as a part of lookup. -+0. digging down the directory hierarchy. -+1. lock the parent dir by its i_mutex. -+2. lookup the final (child) entry. -+3. revalidate it. -+4. call the actual operation (create, unlink, etc.) -+5. unlock the parent dir -+ -+If the filesystem implements its ->d_revalidate() (step 3), then it is -+called. Actually aufs implements it and checks the dentry on a branch is -+still valid. -+But it is not enough. Because aufs has to release the lock for the -+parent dir on a branch at the end of ->lookup() (step 2) and -+->d_revalidate() (step 3) while the i_mutex of the aufs dir is still -+held by VFS. -+If the file on a branch is changed directly, eg. bypassing aufs, after -+aufs released the lock, then the subsequent operation may cause -+something unpleasant result. -+ -+This situation is a result of VFS architecture, ->lookup() and -+->d_revalidate() is separated. But I never say it is wrong. It is a good -+design from VFS's point of view. It is just not suitable for sub-VFS -+character in aufs. -+ -+Aufs supports such case by three level of revalidation which is -+selectable by user. -+1. Simple Revalidate -+ Addition to the native flow in VFS's, confirm the child-parent -+ relationship on the branch just after locking the parent dir on the -+ branch in the "actual operation" (step 4). When this validation -+ fails, aufs returns EBUSY. ->d_revalidate() (step 3) in aufs still -+ checks the validation of the dentry on branches. -+2. Monitor Changes Internally by Inotify/Fsnotify -+ Addition to above, in the "actual operation" (step 4) aufs re-lookup -+ the dentry on the branch, and returns EBUSY if it finds different -+ dentry. -+ Additionally, aufs sets the inotify/fsnotify watch for every dir on branches -+ during it is in cache. When the event is notified, aufs registers a -+ function to kernel 'events' thread by schedule_work(). And the -+ function sets some special status to the cached aufs dentry and inode -+ private data. If they are not cached, then aufs has nothing to -+ do. When the same file is accessed through aufs (step 0-3) later, -+ aufs will detect the status and refresh all necessary data. -+ In this mode, aufs has to ignore the event which is fired by aufs -+ itself. -+3. No Extra Validation -+ This is the simplest test and doesn't add any additional revalidation -+ test, and skip the revalidation in step 4. It is useful and improves -+ aufs performance when system surely hide the aufs branches from user, -+ by over-mounting something (or another method). -diff --git a/Documentation/filesystems/aufs/design/04branch.txt b/Documentation/filesystems/aufs/design/04branch.txt -new file mode 100644 -index 000000000000..0e7bc1075f37 ---- /dev/null -+++ b/Documentation/filesystems/aufs/design/04branch.txt -@@ -0,0 +1,61 @@ -+ -+# Copyright (C) 2005-2020 Junjiro R. Okajima -+ -+Branch Manipulation -+ -+Since aufs supports dynamic branch manipulation, ie. add/remove a branch -+and changing its permission/attribute, there are a lot of works to do. -+ -+ -+Add a Branch -+---------------------------------------------------------------------- -+o Confirm the adding dir exists outside of aufs, including loopback -+ mount, and its various attributes. -+o Initialize the xino file and whiteout bases if necessary. -+ See struct.txt. -+ -+o Check the owner/group/mode of the directory -+ When the owner/group/mode of the adding directory differs from the -+ existing branch, aufs issues a warning because it may impose a -+ security risk. -+ For example, when a upper writable branch has a world writable empty -+ top directory, a malicious user can create any files on the writable -+ branch directly, like copy-up and modify manually. If something like -+ /etc/{passwd,shadow} exists on the lower readonly branch but the upper -+ writable branch, and the writable branch is world-writable, then a -+ malicious guy may create /etc/passwd on the writable branch directly -+ and the infected file will be valid in aufs. -+ I am afraid it can be a security issue, but aufs can do nothing except -+ producing a warning. -+ -+ -+Delete a Branch -+---------------------------------------------------------------------- -+o Confirm the deleting branch is not busy -+ To be general, there is one merit to adopt "remount" interface to -+ manipulate branches. It is to discard caches. At deleting a branch, -+ aufs checks the still cached (and connected) dentries and inodes. If -+ there are any, then they are all in-use. An inode without its -+ corresponding dentry can be alive alone (for example, inotify/fsnotify case). -+ -+ For the cached one, aufs checks whether the same named entry exists on -+ other branches. -+ If the cached one is a directory, because aufs provides a merged view -+ to users, as long as one dir is left on any branch aufs can show the -+ dir to users. In this case, the branch can be removed from aufs. -+ Otherwise aufs rejects deleting the branch. -+ -+ If any file on the deleting branch is opened by aufs, then aufs -+ rejects deleting. -+ -+ -+Modify the Permission of a Branch -+---------------------------------------------------------------------- -+o Re-initialize or remove the xino file and whiteout bases if necessary. -+ See struct.txt. -+ -+o rw --> ro: Confirm the modifying branch is not busy -+ Aufs rejects the request if any of these conditions are true. -+ - a file on the branch is mmap-ed. -+ - a regular file on the branch is opened for write and there is no -+ same named entry on the upper branch. -diff --git a/Documentation/filesystems/aufs/design/05wbr_policy.txt b/Documentation/filesystems/aufs/design/05wbr_policy.txt -new file mode 100644 -index 000000000000..f9741c32cbf2 ---- /dev/null -+++ b/Documentation/filesystems/aufs/design/05wbr_policy.txt -@@ -0,0 +1,51 @@ -+ -+# Copyright (C) 2005-2020 Junjiro R. Okajima -+ -+Policies to Select One among Multiple Writable Branches -+---------------------------------------------------------------------- -+When the number of writable branch is more than one, aufs has to decide -+the target branch for file creation or copy-up. By default, the highest -+writable branch which has the parent (or ancestor) dir of the target -+file is chosen (top-down-parent policy). -+By user's request, aufs implements some other policies to select the -+writable branch, for file creation several policies, round-robin, -+most-free-space, and other policies. For copy-up, top-down-parent, -+bottom-up-parent, bottom-up and others. -+ -+As expected, the round-robin policy selects the branch in circular. When -+you have two writable branches and creates 10 new files, 5 files will be -+created for each branch. mkdir(2) systemcall is an exception. When you -+create 10 new directories, all will be created on the same branch. -+And the most-free-space policy selects the one which has most free -+space among the writable branches. The amount of free space will be -+checked by aufs internally, and users can specify its time interval. -+ -+The policies for copy-up is more simple, -+top-down-parent is equivalent to the same named on in create policy, -+bottom-up-parent selects the writable branch where the parent dir -+exists and the nearest upper one from the copyup-source, -+bottom-up selects the nearest upper writable branch from the -+copyup-source, regardless the existence of the parent dir. -+ -+There are some rules or exceptions to apply these policies. -+- If there is a readonly branch above the policy-selected branch and -+ the parent dir is marked as opaque (a variation of whiteout), or the -+ target (creating) file is whiteout-ed on the upper readonly branch, -+ then the result of the policy is ignored and the target file will be -+ created on the nearest upper writable branch than the readonly branch. -+- If there is a writable branch above the policy-selected branch and -+ the parent dir is marked as opaque or the target file is whiteouted -+ on the branch, then the result of the policy is ignored and the target -+ file will be created on the highest one among the upper writable -+ branches who has diropq or whiteout. In case of whiteout, aufs removes -+ it as usual. -+- link(2) and rename(2) systemcalls are exceptions in every policy. -+ They try selecting the branch where the source exists as possible -+ since copyup a large file will take long time. If it can't be, -+ ie. the branch where the source exists is readonly, then they will -+ follow the copyup policy. -+- There is an exception for rename(2) when the target exists. -+ If the rename target exists, aufs compares the index of the branches -+ where the source and the target exists and selects the higher -+ one. If the selected branch is readonly, then aufs follows the -+ copyup policy. -diff --git a/Documentation/filesystems/aufs/design/06dirren.dot b/Documentation/filesystems/aufs/design/06dirren.dot -new file mode 100644 -index 000000000000..2d62bb6dd55f ---- /dev/null -+++ b/Documentation/filesystems/aufs/design/06dirren.dot -@@ -0,0 +1,31 @@ -+ -+// to view this graph, run dot(1) command in GRAPHVIZ. -+ -+digraph G { -+node [shape=box]; -+whinfo [label="detailed info file\n(lower_brid_root-hinum, h_inum, namelen, old name)"]; -+ -+node [shape=oval]; -+ -+aufs_rename -> whinfo [label="store/remove"]; -+ -+node [shape=oval]; -+inode_list [label="h_inum list in branch\ncache"]; -+ -+node [shape=box]; -+whinode [label="h_inum list file"]; -+ -+node [shape=oval]; -+brmgmt [label="br_add/del/mod/umount"]; -+ -+brmgmt -> inode_list [label="create/remove"]; -+brmgmt -> whinode [label="load/store"]; -+ -+inode_list -> whinode [style=dashed,dir=both]; -+ -+aufs_rename -> inode_list [label="add/del"]; -+ -+aufs_lookup -> inode_list [label="search"]; -+ -+aufs_lookup -> whinfo [label="load/remove"]; -+} -diff --git a/Documentation/filesystems/aufs/design/06dirren.txt b/Documentation/filesystems/aufs/design/06dirren.txt -new file mode 100644 -index 000000000000..e23459758504 ---- /dev/null -+++ b/Documentation/filesystems/aufs/design/06dirren.txt -@@ -0,0 +1,89 @@ -+ -+# Copyright (C) 2017-2020 Junjiro R. Okajima -+ -+Special handling for renaming a directory (DIRREN) -+---------------------------------------------------------------------- -+First, let's assume we have a simple usecase. -+ -+- /u = /rw + /ro -+- /rw/dirA exists -+- /ro/dirA and /ro/dirA/file exist too -+- there is no dirB on both branches -+- a user issues rename("dirA", "dirB") -+ -+Now, what should aufs behave against this rename(2)? -+There are a few possible cases. -+ -+A. returns EROFS. -+ since dirA exists on a readonly branch which cannot be renamed. -+B. returns EXDEV. -+ it is possible to copy-up dirA (only the dir itself), but the child -+ entries ("file" in this case) should not be. it must be a bad -+ approach to copy-up recursively. -+C. returns a success. -+ even the branch /ro is readonly, aufs tries renaming it. Obviously it -+ is a violation of aufs' policy. -+D. construct an extra information which indicates that /ro/dirA should -+ be handled as the name of dirB. -+ overlayfs has a similar feature called REDIRECT. -+ -+Until now, aufs implements the case B only which returns EXDEV, and -+expects the userspace application behaves like mv(1) which tries -+issueing rename(2) recursively. -+ -+A new aufs feature called DIRREN is introduced which implements the case -+D. There are several "extra information" added. -+ -+1. detailed info per renamed directory -+ path: /rw/dirB/$AUFS_WH_DR_INFO_PFX. -+2. the inode-number list of directories on a branch -+ path: /rw/dirB/$AUFS_WH_DR_BRHINO -+ -+The filename of "detailed info per directory" represents the lower -+branch, and its format is -+- a type of the branch id -+ one of these. -+ + uuid (not implemented yet) -+ + fsid -+ + dev -+- the inode-number of the branch root dir -+ -+And it contains these info in a single regular file. -+- magic number -+- branch's inode-number of the logically renamed dir -+- the name of the before-renamed dir -+ -+The "detailed info per directory" file is created in aufs rename(2), and -+loaded in any lookup. -+The info is considered in lookup for the matching case only. Here -+"matching" means that the root of branch (in the info filename) is same -+to the current looking-up branch. After looking-up the before-renamed -+name, the inode-number is compared. And the matched dentry is used. -+ -+The "inode-number list of directories" is a regular file which contains -+simply the inode-numbers on the branch. The file is created or updated -+in removing the branch, and loaded in adding the branch. Its lifetime is -+equal to the branch. -+The list is refered in lookup, and when the current target inode is -+found in the list, the aufs tries loading the "detailed info per -+directory" and get the changed and valid name of the dir. -+ -+Theoretically these "extra informaiton" may be able to be put into XATTR -+in the dir inode. But aufs doesn't choose this way because -+1. XATTR may not be supported by the branch (or its configuration) -+2. XATTR may have its size limit. -+3. XATTR may be less easy to convert than a regular file, when the -+ format of the info is changed in the future. -+At the same time, I agree that the regular file approach is much slower -+than XATTR approach. So, in the future, aufs may take the XATTR or other -+better approach. -+ -+This DIRREN feature is enabled by aufs configuration, and is activated -+by a new mount option. -+ -+For the more complicated case, there is a work with UDBA option, which -+is to dected the direct access to the branches (by-passing aufs) and to -+maintain the cashes in aufs. Since a single cached aufs dentry may -+contains two names, before- and after-rename, the name comparision in -+UDBA handler may not work correctly. In this case, the behaviour will be -+equivalen to udba=reval case. -diff --git a/Documentation/filesystems/aufs/design/06fhsm.txt b/Documentation/filesystems/aufs/design/06fhsm.txt -new file mode 100644 -index 000000000000..5322ca3b7151 ---- /dev/null -+++ b/Documentation/filesystems/aufs/design/06fhsm.txt -@@ -0,0 +1,105 @@ -+ -+# Copyright (C) 2011-2020 Junjiro R. Okajima -+ -+File-based Hierarchical Storage Management (FHSM) -+---------------------------------------------------------------------- -+Hierarchical Storage Management (or HSM) is a well-known feature in the -+storage world. Aufs provides this feature as file-based with multiple -+writable branches, based upon the principle of "Colder, the Lower". -+Here the word "colder" means that the less used files, and "lower" means -+that the position in the order of the stacked branches vertically. -+These multiple writable branches are prioritized, ie. the topmost one -+should be the fastest drive and be used heavily. -+ -+o Characters in aufs FHSM story -+- aufs itself and a new branch attribute. -+- a new ioctl interface to move-down and to establish a connection with -+ the daemon ("move-down" is a converse of "copy-up"). -+- userspace tool and daemon. -+ -+The userspace daemon establishes a connection with aufs and waits for -+the notification. The notified information is very similar to struct -+statfs containing the number of consumed blocks and inodes. -+When the consumed blocks/inodes of a branch exceeds the user-specified -+upper watermark, the daemon activates its move-down process until the -+consumed blocks/inodes reaches the user-specified lower watermark. -+ -+The actual move-down is done by aufs based upon the request from -+user-space since we need to maintain the inode number and the internal -+pointer arrays in aufs. -+ -+Currently aufs FHSM handles the regular files only. Additionally they -+must not be hard-linked nor pseudo-linked. -+ -+ -+o Cowork of aufs and the user-space daemon -+ During the userspace daemon established the connection, aufs sends a -+ small notification to it whenever aufs writes something into the -+ writable branch. But it may cost high since aufs issues statfs(2) -+ internally. So user can specify a new option to cache the -+ info. Actually the notification is controlled by these factors. -+ + the specified cache time. -+ + classified as "force" by aufs internally. -+ Until the specified time expires, aufs doesn't send the info -+ except the forced cases. When aufs decide forcing, the info is always -+ notified to userspace. -+ For example, the number of free inodes is generally large enough and -+ the shortage of it happens rarely. So aufs doesn't force the -+ notification when creating a new file, directory and others. This is -+ the typical case which aufs doesn't force. -+ When aufs writes the actual filedata and the files consumes any of new -+ blocks, the aufs forces notifying. -+ -+ -+o Interfaces in aufs -+- New branch attribute. -+ + fhsm -+ Specifies that the branch is managed by FHSM feature. In other word, -+ participant in the FHSM. -+ When nofhsm is set to the branch, it will not be the source/target -+ branch of the move-down operation. This attribute is set -+ independently from coo and moo attributes, and if you want full -+ FHSM, you should specify them as well. -+- New mount option. -+ + fhsm_sec -+ Specifies a second to suppress many less important info to be -+ notified. -+- New ioctl. -+ + AUFS_CTL_FHSM_FD -+ create a new file descriptor which userspace can read the notification -+ (a subset of struct statfs) from aufs. -+- Module parameter 'brs' -+ It has to be set to 1. Otherwise the new mount option 'fhsm' will not -+ be set. -+- mount helpers /sbin/mount.aufs and /sbin/umount.aufs -+ When there are two or more branches with fhsm attributes, -+ /sbin/mount.aufs invokes the user-space daemon and /sbin/umount.aufs -+ terminates it. As a result of remounting and branch-manipulation, the -+ number of branches with fhsm attribute can be one. In this case, -+ /sbin/mount.aufs will terminate the user-space daemon. -+ -+ -+Finally the operation is done as these steps in kernel-space. -+- make sure that, -+ + no one else is using the file. -+ + the file is not hard-linked. -+ + the file is not pseudo-linked. -+ + the file is a regular file. -+ + the parent dir is not opaqued. -+- find the target writable branch. -+- make sure the file is not whiteout-ed by the upper (than the target) -+ branch. -+- make the parent dir on the target branch. -+- mutex lock the inode on the branch. -+- unlink the whiteout on the target branch (if exists). -+- lookup and create the whiteout-ed temporary name on the target branch. -+- copy the file as the whiteout-ed temporary name on the target branch. -+- rename the whiteout-ed temporary name to the original name. -+- unlink the file on the source branch. -+- maintain the internal pointer array and the external inode number -+ table (XINO). -+- maintain the timestamps and other attributes of the parent dir and the -+ file. -+ -+And of course, in every step, an error may happen. So the operation -+should restore the original file state after an error happens. -diff --git a/Documentation/filesystems/aufs/design/06mmap.txt b/Documentation/filesystems/aufs/design/06mmap.txt -new file mode 100644 -index 000000000000..03b71096d508 ---- /dev/null -+++ b/Documentation/filesystems/aufs/design/06mmap.txt -@@ -0,0 +1,59 @@ -+ -+# Copyright (C) 2005-2020 Junjiro R. Okajima -+ -+mmap(2) -- File Memory Mapping -+---------------------------------------------------------------------- -+In aufs, the file-mapped pages are handled by a branch fs directly, no -+interaction with aufs. It means aufs_mmap() calls the branch fs's -+->mmap(). -+This approach is simple and good, but there is one problem. -+Under /proc, several entries show the mmapped files by its path (with -+device and inode number), and the printed path will be the path on the -+branch fs's instead of virtual aufs's. -+This is not a problem in most cases, but some utilities lsof(1) (and its -+user) may expect the path on aufs. -+ -+To address this issue, aufs adds a new member called vm_prfile in struct -+vm_area_struct (and struct vm_region). The original vm_file points to -+the file on the branch fs in order to handle everything correctly as -+usual. The new vm_prfile points to a virtual file in aufs, and the -+show-functions in procfs refers to vm_prfile if it is set. -+Also we need to maintain several other places where touching vm_file -+such like -+- fork()/clone() copies vma and the reference count of vm_file is -+ incremented. -+- merging vma maintains the ref count too. -+ -+This is not a good approach. It just fakes the printed path. But it -+leaves all behaviour around f_mapping unchanged. This is surely an -+advantage. -+Actually aufs had adopted another complicated approach which calls -+generic_file_mmap() and handles struct vm_operations_struct. In this -+approach, aufs met a hard problem and I could not solve it without -+switching the approach. -+ -+There may be one more another approach which is -+- bind-mount the branch-root onto the aufs-root internally -+- grab the new vfsmount (ie. struct mount) -+- lazy-umount the branch-root internally -+- in open(2) the aufs-file, open the branch-file with the hidden -+ vfsmount (instead of the original branch's vfsmount) -+- ideally this "bind-mount and lazy-umount" should be done atomically, -+ but it may be possible from userspace by the mount helper. -+ -+Adding the internal hidden vfsmount and using it in opening a file, the -+file path under /proc will be printed correctly. This approach looks -+smarter, but is not possible I am afraid. -+- aufs-root may be bind-mount later. when it happens, another hidden -+ vfsmount will be required. -+- it is hard to get the chance to bind-mount and lazy-umount -+ + in kernel-space, FS can have vfsmount in open(2) via -+ file->f_path, and aufs can know its vfsmount. But several locks are -+ already acquired, and if aufs tries to bind-mount and lazy-umount -+ here, then it may cause a deadlock. -+ + in user-space, bind-mount doesn't invoke the mount helper. -+- since /proc shows dev and ino, aufs has to give vma these info. it -+ means a new member vm_prinode will be necessary. this is essentially -+ equivalent to vm_prfile described above. -+ -+I have to give up this "looks-smater" approach. -diff --git a/Documentation/filesystems/aufs/design/06xattr.txt b/Documentation/filesystems/aufs/design/06xattr.txt -new file mode 100644 -index 000000000000..f4076a04a335 ---- /dev/null -+++ b/Documentation/filesystems/aufs/design/06xattr.txt -@@ -0,0 +1,81 @@ -+ -+# Copyright (C) 2014-2020 Junjiro R. Okajima -+ -+Listing XATTR/EA and getting the value -+---------------------------------------------------------------------- -+For the inode standard attributes (owner, group, timestamps, etc.), aufs -+shows the values from the topmost existing file. This behaviour is good -+for the non-dir entries since the bahaviour exactly matches the shown -+information. But for the directories, aufs considers all the same named -+entries on the lower branches. Which means, if one of the lower entry -+rejects readdir call, then aufs returns an error even if the topmost -+entry allows it. This behaviour is necessary to respect the branch fs's -+security, but can make users confused since the user-visible standard -+attributes don't match the behaviour. -+To address this issue, aufs has a mount option called dirperm1 which -+checks the permission for the topmost entry only, and ignores the lower -+entry's permission. -+ -+A similar issue can happen around XATTR. -+getxattr(2) and listxattr(2) families behave as if dirperm1 option is -+always set. Otherwise these very unpleasant situation would happen. -+- listxattr(2) may return the duplicated entries. -+- users may not be able to remove or reset the XATTR forever, -+ -+ -+XATTR/EA support in the internal (copy,move)-(up,down) -+---------------------------------------------------------------------- -+Generally the extended attributes of inode are categorized as these. -+- "security" for LSM and capability. -+- "system" for posix ACL, 'acl' mount option is required for the branch -+ fs generally. -+- "trusted" for userspace, CAP_SYS_ADMIN is required. -+- "user" for userspace, 'user_xattr' mount option is required for the -+ branch fs generally. -+ -+Moreover there are some other categories. Aufs handles these rather -+unpopular categories as the ordinary ones, ie. there is no special -+condition nor exception. -+ -+In copy-up, the support for XATTR on the dst branch may differ from the -+src branch. In this case, the copy-up operation will get an error and -+the original user operation which triggered the copy-up will fail. It -+can happen that even all copy-up will fail. -+When both of src and dst branches support XATTR and if an error occurs -+during copying XATTR, then the copy-up should fail obviously. That is a -+good reason and aufs should return an error to userspace. But when only -+the src branch support that XATTR, aufs should not return an error. -+For example, the src branch supports ACL but the dst branch doesn't -+because the dst branch may natively un-support it or temporary -+un-support it due to "noacl" mount option. Of course, the dst branch fs -+may NOT return an error even if the XATTR is not supported. It is -+totally up to the branch fs. -+ -+Anyway when the aufs internal copy-up gets an error from the dst branch -+fs, then aufs tries removing the just copied entry and returns the error -+to the userspace. The worst case of this situation will be all copy-up -+will fail. -+ -+For the copy-up operation, there two basic approaches. -+- copy the specified XATTR only (by category above), and return the -+ error unconditionally if it happens. -+- copy all XATTR, and ignore the error on the specified category only. -+ -+In order to support XATTR and to implement the correct behaviour, aufs -+chooses the latter approach and introduces some new branch attributes, -+"icexsec", "icexsys", "icextr", "icexusr", and "icexoth". -+They correspond to the XATTR namespaces (see above). Additionally, to be -+convenient, "icex" is also provided which means all "icex*" attributes -+are set (here the word "icex" stands for "ignore copy-error on XATTR"). -+ -+The meaning of these attributes is to ignore the error from setting -+XATTR on that branch. -+Note that aufs tries copying all XATTR unconditionally, and ignores the -+error from the dst branch according to the specified attributes. -+ -+Some XATTR may have its default value. The default value may come from -+the parent dir or the environment. If the default value is set at the -+file creating-time, it will be overwritten by copy-up. -+Some contradiction may happen I am afraid. -+Do we need another attribute to stop copying XATTR? I am unsure. For -+now, aufs implements the branch attributes to ignore the error. -diff --git a/Documentation/filesystems/aufs/design/07export.txt b/Documentation/filesystems/aufs/design/07export.txt -new file mode 100644 -index 000000000000..fcd3a3489bf8 ---- /dev/null -+++ b/Documentation/filesystems/aufs/design/07export.txt -@@ -0,0 +1,45 @@ -+ -+# Copyright (C) 2005-2020 Junjiro R. Okajima -+ -+Export Aufs via NFS -+---------------------------------------------------------------------- -+Here is an approach. -+- like xino/xib, add a new file 'xigen' which stores aufs inode -+ generation. -+- iget_locked(): initialize aufs inode generation for a new inode, and -+ store it in xigen file. -+- destroy_inode(): increment aufs inode generation and store it in xigen -+ file. it is necessary even if it is not unlinked, because any data of -+ inode may be changed by UDBA. -+- encode_fh(): for a root dir, simply return FILEID_ROOT. otherwise -+ build file handle by -+ + branch id (4 bytes) -+ + superblock generation (4 bytes) -+ + inode number (4 or 8 bytes) -+ + parent dir inode number (4 or 8 bytes) -+ + inode generation (4 bytes)) -+ + return value of exportfs_encode_fh() for the parent on a branch (4 -+ bytes) -+ + file handle for a branch (by exportfs_encode_fh()) -+- fh_to_dentry(): -+ + find the index of a branch from its id in handle, and check it is -+ still exist in aufs. -+ + 1st level: get the inode number from handle and search it in cache. -+ + 2nd level: if not found in cache, get the parent inode number from -+ the handle and search it in cache. and then open the found parent -+ dir, find the matching inode number by vfs_readdir() and get its -+ name, and call lookup_one_len() for the target dentry. -+ + 3rd level: if the parent dir is not cached, call -+ exportfs_decode_fh() for a branch and get the parent on a branch, -+ build a pathname of it, convert it a pathname in aufs, call -+ path_lookup(). now aufs gets a parent dir dentry, then handle it as -+ the 2nd level. -+ + to open the dir, aufs needs struct vfsmount. aufs keeps vfsmount -+ for every branch, but not itself. to get this, (currently) aufs -+ searches in current->nsproxy->mnt_ns list. it may not be a good -+ idea, but I didn't get other approach. -+ + test the generation of the gotten inode. -+- every inode operation: they may get EBUSY due to UDBA. in this case, -+ convert it into ESTALE for NFSD. -+- readdir(): call lockdep_on/off() because filldir in NFSD calls -+ lookup_one_len(), vfs_getattr(), encode_fh() and others. -diff --git a/Documentation/filesystems/aufs/design/08shwh.txt b/Documentation/filesystems/aufs/design/08shwh.txt -new file mode 100644 -index 000000000000..f252e17154b1 ---- /dev/null -+++ b/Documentation/filesystems/aufs/design/08shwh.txt -@@ -0,0 +1,39 @@ -+ -+# Copyright (C) 2005-2020 Junjiro R. Okajima -+ -+Show Whiteout Mode (shwh) -+---------------------------------------------------------------------- -+Generally aufs hides the name of whiteouts. But in some cases, to show -+them is very useful for users. For instance, creating a new middle layer -+(branch) by merging existing layers. -+ -+(borrowing aufs1 HOW-TO from a user, Michael Towers) -+When you have three branches, -+- Bottom: 'system', squashfs (underlying base system), read-only -+- Middle: 'mods', squashfs, read-only -+- Top: 'overlay', ram (tmpfs), read-write -+ -+The top layer is loaded at boot time and saved at shutdown, to preserve -+the changes made to the system during the session. -+When larger changes have been made, or smaller changes have accumulated, -+the size of the saved top layer data grows. At this point, it would be -+nice to be able to merge the two overlay branches ('mods' and 'overlay') -+and rewrite the 'mods' squashfs, clearing the top layer and thus -+restoring save and load speed. -+ -+This merging is simplified by the use of another aufs mount, of just the -+two overlay branches using the 'shwh' option. -+# mount -t aufs -o ro,shwh,br:/livesys/overlay=ro+wh:/livesys/mods=rr+wh \ -+ aufs /livesys/merge_union -+ -+A merged view of these two branches is then available at -+/livesys/merge_union, and the new feature is that the whiteouts are -+visible! -+Note that in 'shwh' mode the aufs mount must be 'ro', which will disable -+writing to all branches. Also the default mode for all branches is 'ro'. -+It is now possible to save the combined contents of the two overlay -+branches to a new squashfs, e.g.: -+# mksquashfs /livesys/merge_union /path/to/newmods.squash -+ -+This new squashfs archive can be stored on the boot device and the -+initramfs will use it to replace the old one at the next boot. -diff --git a/Documentation/filesystems/aufs/design/10dynop.txt b/Documentation/filesystems/aufs/design/10dynop.txt -new file mode 100644 -index 000000000000..2b90eecb267d ---- /dev/null -+++ b/Documentation/filesystems/aufs/design/10dynop.txt -@@ -0,0 +1,34 @@ -+ -+# Copyright (C) 2010-2020 Junjiro R. Okajima -+ -+Dynamically customizable FS operations -+---------------------------------------------------------------------- -+Generally FS operations (struct inode_operations, struct -+address_space_operations, struct file_operations, etc.) are defined as -+"static const", but it never means that FS have only one set of -+operation. Some FS have multiple sets of them. For instance, ext2 has -+three sets, one for XIP, for NOBH, and for normal. -+Since aufs overrides and redirects these operations, sometimes aufs has -+to change its behaviour according to the branch FS type. More importantly -+VFS acts differently if a function (member in the struct) is set or -+not. It means aufs should have several sets of operations and select one -+among them according to the branch FS definition. -+ -+In order to solve this problem and not to affect the behaviour of VFS, -+aufs defines these operations dynamically. For instance, aufs defines -+dummy direct_IO function for struct address_space_operations, but it may -+not be set to the address_space_operations actually. When the branch FS -+doesn't have it, aufs doesn't set it to its address_space_operations -+while the function definition itself is still alive. So the behaviour -+itself will not change, and it will return an error when direct_IO is -+not set. -+ -+The lifetime of these dynamically generated operation object is -+maintained by aufs branch object. When the branch is removed from aufs, -+the reference counter of the object is decremented. When it reaches -+zero, the dynamically generated operation object will be freed. -+ -+This approach is designed to support AIO (io_submit), Direct I/O and -+XIP (DAX) mainly. -+Currently this approach is applied to address_space_operations for -+regular files only. -diff --git a/MAINTAINERS b/MAINTAINERS -index 281de213ef47..ffc3c1c539ea 100644 ---- a/MAINTAINERS -+++ b/MAINTAINERS -@@ -3009,6 +3009,19 @@ F: include/linux/audit.h - F: include/uapi/linux/audit.h - F: kernel/audit* - -+AUFS (advanced multi layered unification filesystem) FILESYSTEM -+M: "J. R. Okajima" -+L: aufs-users@lists.sourceforge.net (members only) -+L: linux-unionfs@vger.kernel.org -+S: Supported -+W: http://aufs.sourceforge.net -+T: git://github.com/sfjro/aufs4-linux.git -+F: Documentation/ABI/testing/debugfs-aufs -+F: Documentation/ABI/testing/sysfs-aufs -+F: Documentation/filesystems/aufs/ -+F: fs/aufs/ -+F: include/uapi/linux/aufs_type.h -+ - AUXILIARY DISPLAY DRIVERS - M: Miguel Ojeda Sandonis - S: Maintained -diff --git a/drivers/block/loop.c b/drivers/block/loop.c -index a58084c2ed7c..7be7ca3f5454 100644 ---- a/drivers/block/loop.c -+++ b/drivers/block/loop.c -@@ -765,6 +765,24 @@ static int loop_change_fd(struct loop_device *lo, struct block_device *bdev, - return error; - } - -+/* -+ * for AUFS -+ * no get/put for file. -+ */ -+struct file *loop_backing_file(struct super_block *sb) -+{ -+ struct file *ret; -+ struct loop_device *l; -+ -+ ret = NULL; -+ if (MAJOR(sb->s_dev) == LOOP_MAJOR) { -+ l = sb->s_bdev->bd_disk->private_data; -+ ret = l->lo_backing_file; -+ } -+ return ret; -+} -+EXPORT_SYMBOL_GPL(loop_backing_file); -+ - /* loop sysfs attributes */ - - static ssize_t loop_attr_show(struct device *dev, char *page, -diff --git a/fs/Kconfig b/fs/Kconfig -index aa4c12282301..b29bad13b249 100644 ---- a/fs/Kconfig -+++ b/fs/Kconfig -@@ -288,6 +288,7 @@ source "fs/sysv/Kconfig" - source "fs/ufs/Kconfig" - source "fs/erofs/Kconfig" - source "fs/vboxsf/Kconfig" -+source "fs/aufs/Kconfig" - - endif # MISC_FILESYSTEMS - -diff --git a/fs/Makefile b/fs/Makefile -index 999d1a23f036..0cd76857ca76 100644 ---- a/fs/Makefile -+++ b/fs/Makefile -@@ -136,3 +136,4 @@ obj-$(CONFIG_EFIVAR_FS) += efivarfs/ - obj-$(CONFIG_EROFS_FS) += erofs/ - obj-$(CONFIG_VBOXSF_FS) += vboxsf/ - obj-$(CONFIG_ZONEFS_FS) += zonefs/ -+obj-$(CONFIG_AUFS_FS) += aufs/ -diff --git a/fs/aufs/Kconfig b/fs/aufs/Kconfig -new file mode 100644 -index 000000000000..0b442aeb7b45 ---- /dev/null -+++ b/fs/aufs/Kconfig -@@ -0,0 +1,199 @@ -+# SPDX-License-Identifier: GPL-2.0 -+config AUFS_FS -+ bool "Aufs (Advanced multi layered unification filesystem) support" -+ help -+ Aufs is a stackable unification filesystem such as Unionfs, -+ which unifies several directories and provides a merged single -+ directory. -+ In the early days, aufs was entirely re-designed and -+ re-implemented Unionfs Version 1.x series. Introducing many -+ original ideas, approaches and improvements, it becomes totally -+ different from Unionfs while keeping the basic features. -+ -+if AUFS_FS -+choice -+ prompt "Maximum number of branches" -+ default AUFS_BRANCH_MAX_127 -+ help -+ Specifies the maximum number of branches (or member directories) -+ in a single aufs. The larger value consumes more system -+ resources and has a minor impact to performance. -+config AUFS_BRANCH_MAX_127 -+ bool "127" -+ help -+ Specifies the maximum number of branches (or member directories) -+ in a single aufs. The larger value consumes more system -+ resources and has a minor impact to performance. -+config AUFS_BRANCH_MAX_511 -+ bool "511" -+ help -+ Specifies the maximum number of branches (or member directories) -+ in a single aufs. The larger value consumes more system -+ resources and has a minor impact to performance. -+config AUFS_BRANCH_MAX_1023 -+ bool "1023" -+ help -+ Specifies the maximum number of branches (or member directories) -+ in a single aufs. The larger value consumes more system -+ resources and has a minor impact to performance. -+config AUFS_BRANCH_MAX_32767 -+ bool "32767" -+ help -+ Specifies the maximum number of branches (or member directories) -+ in a single aufs. The larger value consumes more system -+ resources and has a minor impact to performance. -+endchoice -+ -+config AUFS_SBILIST -+ bool -+ depends on AUFS_MAGIC_SYSRQ || PROC_FS -+ default y -+ help -+ Automatic configuration for internal use. -+ When aufs supports Magic SysRq or /proc, enabled automatically. -+ -+config AUFS_HNOTIFY -+ bool "Detect direct branch access (bypassing aufs)" -+ help -+ If you want to modify files on branches directly, eg. bypassing aufs, -+ and want aufs to detect the changes of them fully, then enable this -+ option and use 'udba=notify' mount option. -+ Currently there is only one available configuration, "fsnotify". -+ It will have a negative impact to the performance. -+ See detail in aufs.5. -+ -+choice -+ prompt "method" if AUFS_HNOTIFY -+ default AUFS_HFSNOTIFY -+config AUFS_HFSNOTIFY -+ bool "fsnotify" -+ select FSNOTIFY -+endchoice -+ -+config AUFS_EXPORT -+ bool "NFS-exportable aufs" -+ depends on EXPORTFS = y -+ help -+ If you want to export your mounted aufs via NFS, then enable this -+ option. There are several requirements for this configuration. -+ See detail in aufs.5. -+ -+config AUFS_INO_T_64 -+ bool -+ depends on AUFS_EXPORT -+ depends on 64BIT && !(ALPHA || S390) -+ default y -+ help -+ Automatic configuration for internal use. -+ /* typedef unsigned long/int __kernel_ino_t */ -+ /* alpha and s390x are int */ -+ -+config AUFS_XATTR -+ bool "support for XATTR/EA (including Security Labels)" -+ help -+ If your branch fs supports XATTR/EA and you want to make them -+ available in aufs too, then enable this opsion and specify the -+ branch attributes for EA. -+ See detail in aufs.5. -+ -+config AUFS_FHSM -+ bool "File-based Hierarchical Storage Management" -+ help -+ Hierarchical Storage Management (or HSM) is a well-known feature -+ in the storage world. Aufs provides this feature as file-based. -+ with multiple branches. -+ These multiple branches are prioritized, ie. the topmost one -+ should be the fastest drive and be used heavily. -+ -+config AUFS_RDU -+ bool "Readdir in userspace" -+ help -+ Aufs has two methods to provide a merged view for a directory, -+ by a user-space library and by kernel-space natively. The latter -+ is always enabled but sometimes large and slow. -+ If you enable this option, install the library in aufs2-util -+ package, and set some environment variables for your readdir(3), -+ then the work will be handled in user-space which generally -+ shows better performance in most cases. -+ See detail in aufs.5. -+ -+config AUFS_DIRREN -+ bool "Workaround for rename(2)-ing a directory" -+ help -+ By default, aufs returns EXDEV error in renameing a dir who has -+ his child on the lower branch, since it is a bad idea to issue -+ rename(2) internally for every lower branch. But user may not -+ accept this behaviour. So here is a workaround to allow such -+ rename(2) and store some extra infromation on the writable -+ branch. Obviously this costs high (and I don't like it). -+ To use this feature, you need to enable this configuration AND -+ to specify the mount option `dirren.' -+ See details in aufs.5 and the design documents. -+ -+config AUFS_SHWH -+ bool "Show whiteouts" -+ help -+ If you want to make the whiteouts in aufs visible, then enable -+ this option and specify 'shwh' mount option. Although it may -+ sounds like philosophy or something, but in technically it -+ simply shows the name of whiteout with keeping its behaviour. -+ -+config AUFS_BR_RAMFS -+ bool "Ramfs (initramfs/rootfs) as an aufs branch" -+ help -+ If you want to use ramfs as an aufs branch fs, then enable this -+ option. Generally tmpfs is recommended. -+ Aufs prohibited them to be a branch fs by default, because -+ initramfs becomes unusable after switch_root or something -+ generally. If you sets initramfs as an aufs branch and boot your -+ system by switch_root, you will meet a problem easily since the -+ files in initramfs may be inaccessible. -+ Unless you are going to use ramfs as an aufs branch fs without -+ switch_root or something, leave it N. -+ -+config AUFS_BR_FUSE -+ bool "Fuse fs as an aufs branch" -+ depends on FUSE_FS -+ select AUFS_POLL -+ help -+ If you want to use fuse-based userspace filesystem as an aufs -+ branch fs, then enable this option. -+ It implements the internal poll(2) operation which is -+ implemented by fuse only (curretnly). -+ -+config AUFS_POLL -+ bool -+ help -+ Automatic configuration for internal use. -+ -+config AUFS_BR_HFSPLUS -+ bool "Hfsplus as an aufs branch" -+ depends on HFSPLUS_FS -+ default y -+ help -+ If you want to use hfsplus fs as an aufs branch fs, then enable -+ this option. This option introduces a small overhead at -+ copying-up a file on hfsplus. -+ -+config AUFS_BDEV_LOOP -+ bool -+ depends on BLK_DEV_LOOP -+ default y -+ help -+ Automatic configuration for internal use. -+ Convert =[ym] into =y. -+ -+config AUFS_DEBUG -+ bool "Debug aufs" -+ help -+ Enable this to compile aufs internal debug code. -+ It will have a negative impact to the performance. -+ -+config AUFS_MAGIC_SYSRQ -+ bool -+ depends on AUFS_DEBUG && MAGIC_SYSRQ -+ default y -+ help -+ Automatic configuration for internal use. -+ When aufs supports Magic SysRq, enabled automatically. -+endif -diff --git a/fs/aufs/Makefile b/fs/aufs/Makefile -new file mode 100644 -index 000000000000..9de70de0f337 ---- /dev/null -+++ b/fs/aufs/Makefile -@@ -0,0 +1,39 @@ -+# SPDX-License-Identifier: GPL-2.0 -+ -+include ${srctree}/${src}/magic.mk -+-include ${srctree}/${src}/priv_def.mk -+ -+# cf. include/linux/kernel.h -+# enable pr_debug -+ccflags-y += -DDEBUG -+# sparse requires the full pathname -+ccflags-y += -include ${srctree}/include/uapi/linux/aufs_type.h -+ -+obj-$(CONFIG_AUFS_FS) += aufs.o -+aufs-y := module.o sbinfo.o super.o branch.o xino.o sysaufs.o opts.o \ -+ wkq.o vfsub.o dcsub.o \ -+ cpup.o whout.o wbr_policy.o \ -+ dinfo.o dentry.o \ -+ dynop.o \ -+ finfo.o file.o f_op.o \ -+ dir.o vdir.o \ -+ iinfo.o inode.o i_op.o i_op_add.o i_op_del.o i_op_ren.o \ -+ mvdown.o ioctl.o -+ -+# all are boolean -+aufs-$(CONFIG_PROC_FS) += procfs.o plink.o -+aufs-$(CONFIG_SYSFS) += sysfs.o -+aufs-$(CONFIG_DEBUG_FS) += dbgaufs.o -+aufs-$(CONFIG_AUFS_BDEV_LOOP) += loop.o -+aufs-$(CONFIG_AUFS_HNOTIFY) += hnotify.o -+aufs-$(CONFIG_AUFS_HFSNOTIFY) += hfsnotify.o -+aufs-$(CONFIG_AUFS_EXPORT) += export.o -+aufs-$(CONFIG_AUFS_XATTR) += xattr.o -+aufs-$(CONFIG_FS_POSIX_ACL) += posix_acl.o -+aufs-$(CONFIG_AUFS_DIRREN) += dirren.o -+aufs-$(CONFIG_AUFS_FHSM) += fhsm.o -+aufs-$(CONFIG_AUFS_POLL) += poll.o -+aufs-$(CONFIG_AUFS_RDU) += rdu.o -+aufs-$(CONFIG_AUFS_BR_HFSPLUS) += hfsplus.o -+aufs-$(CONFIG_AUFS_DEBUG) += debug.o -+aufs-$(CONFIG_AUFS_MAGIC_SYSRQ) += sysrq.o -diff --git a/fs/aufs/aufs.h b/fs/aufs/aufs.h -new file mode 100644 -index 000000000000..c50f959844e8 ---- /dev/null -+++ b/fs/aufs/aufs.h -@@ -0,0 +1,49 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * all header files -+ */ -+ -+#ifndef __AUFS_H__ -+#define __AUFS_H__ -+ -+#ifdef __KERNEL__ -+ -+#define AuStub(type, name, body, ...) \ -+ static inline type name(__VA_ARGS__) { body; } -+ -+#define AuStubVoid(name, ...) \ -+ AuStub(void, name, , __VA_ARGS__) -+#define AuStubInt0(name, ...) \ -+ AuStub(int, name, return 0, __VA_ARGS__) -+ -+#include "debug.h" -+ -+#include "branch.h" -+#include "cpup.h" -+#include "dcsub.h" -+#include "dbgaufs.h" -+#include "dentry.h" -+#include "dir.h" -+#include "dirren.h" -+#include "dynop.h" -+#include "file.h" -+#include "fstype.h" -+#include "hbl.h" -+#include "inode.h" -+#include "lcnt.h" -+#include "loop.h" -+#include "module.h" -+#include "opts.h" -+#include "rwsem.h" -+#include "super.h" -+#include "sysaufs.h" -+#include "vfsub.h" -+#include "whout.h" -+#include "wkq.h" -+ -+#endif /* __KERNEL__ */ -+#endif /* __AUFS_H__ */ -diff --git a/fs/aufs/branch.c b/fs/aufs/branch.c -new file mode 100644 -index 000000000000..3319245c0361 ---- /dev/null -+++ b/fs/aufs/branch.c -@@ -0,0 +1,1414 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * branch management -+ */ -+ -+#include -+#include -+#include "aufs.h" -+ -+/* -+ * free a single branch -+ */ -+static void au_br_do_free(struct au_branch *br) -+{ -+ int i; -+ struct au_wbr *wbr; -+ struct au_dykey **key; -+ -+ au_hnotify_fin_br(br); -+ /* always, regardless the mount option */ -+ au_dr_hino_free(&br->br_dirren); -+ au_xino_put(br); -+ -+ AuLCntZero(au_lcnt_read(&br->br_nfiles, /*do_rev*/0)); -+ au_lcnt_fin(&br->br_nfiles, /*do_sync*/0); -+ AuLCntZero(au_lcnt_read(&br->br_count, /*do_rev*/0)); -+ au_lcnt_fin(&br->br_count, /*do_sync*/0); -+ -+ wbr = br->br_wbr; -+ if (wbr) { -+ for (i = 0; i < AuBrWh_Last; i++) -+ dput(wbr->wbr_wh[i]); -+ AuDebugOn(atomic_read(&wbr->wbr_wh_running)); -+ AuRwDestroy(&wbr->wbr_wh_rwsem); -+ } -+ -+ if (br->br_fhsm) { -+ au_br_fhsm_fin(br->br_fhsm); -+ au_kfree_try_rcu(br->br_fhsm); -+ } -+ -+ key = br->br_dykey; -+ for (i = 0; i < AuBrDynOp; i++, key++) -+ if (*key) -+ au_dy_put(*key); -+ else -+ break; -+ -+ /* recursive lock, s_umount of branch's */ -+ /* synchronize_rcu(); */ /* why? */ -+ lockdep_off(); -+ path_put(&br->br_path); -+ lockdep_on(); -+ au_kfree_rcu(wbr); -+ au_lcnt_wait_for_fin(&br->br_nfiles); -+ au_lcnt_wait_for_fin(&br->br_count); -+ /* I don't know why, but percpu_refcount requires this */ -+ /* synchronize_rcu(); */ -+ au_kfree_rcu(br); -+} -+ -+/* -+ * frees all branches -+ */ -+void au_br_free(struct au_sbinfo *sbinfo) -+{ -+ aufs_bindex_t bmax; -+ struct au_branch **br; -+ -+ AuRwMustWriteLock(&sbinfo->si_rwsem); -+ -+ bmax = sbinfo->si_bbot + 1; -+ br = sbinfo->si_branch; -+ while (bmax--) -+ au_br_do_free(*br++); -+} -+ -+/* -+ * find the index of a branch which is specified by @br_id. -+ */ -+int au_br_index(struct super_block *sb, aufs_bindex_t br_id) -+{ -+ aufs_bindex_t bindex, bbot; -+ -+ bbot = au_sbbot(sb); -+ for (bindex = 0; bindex <= bbot; bindex++) -+ if (au_sbr_id(sb, bindex) == br_id) -+ return bindex; -+ return -1; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* -+ * add a branch -+ */ -+ -+static int test_overlap(struct super_block *sb, struct dentry *h_adding, -+ struct dentry *h_root) -+{ -+ if (unlikely(h_adding == h_root -+ || au_test_loopback_overlap(sb, h_adding))) -+ return 1; -+ if (h_adding->d_sb != h_root->d_sb) -+ return 0; -+ return au_test_subdir(h_adding, h_root) -+ || au_test_subdir(h_root, h_adding); -+} -+ -+/* -+ * returns a newly allocated branch. @new_nbranch is a number of branches -+ * after adding a branch. -+ */ -+static struct au_branch *au_br_alloc(struct super_block *sb, int new_nbranch, -+ int perm) -+{ -+ struct au_branch *add_branch; -+ struct dentry *root; -+ struct inode *inode; -+ int err; -+ -+ err = -ENOMEM; -+ add_branch = kzalloc(sizeof(*add_branch), GFP_NOFS); -+ if (unlikely(!add_branch)) -+ goto out; -+ add_branch->br_xino = au_xino_alloc(/*nfile*/1); -+ if (unlikely(!add_branch->br_xino)) -+ goto out_br; -+ err = au_hnotify_init_br(add_branch, perm); -+ if (unlikely(err)) -+ goto out_xino; -+ -+ if (au_br_writable(perm)) { -+ /* may be freed separately at changing the branch permission */ -+ add_branch->br_wbr = kzalloc(sizeof(*add_branch->br_wbr), -+ GFP_NOFS); -+ if (unlikely(!add_branch->br_wbr)) -+ goto out_hnotify; -+ } -+ -+ if (au_br_fhsm(perm)) { -+ err = au_fhsm_br_alloc(add_branch); -+ if (unlikely(err)) -+ goto out_wbr; -+ } -+ -+ root = sb->s_root; -+ err = au_sbr_realloc(au_sbi(sb), new_nbranch, /*may_shrink*/0); -+ if (!err) -+ err = au_di_realloc(au_di(root), new_nbranch, /*may_shrink*/0); -+ if (!err) { -+ inode = d_inode(root); -+ err = au_hinode_realloc(au_ii(inode), new_nbranch, -+ /*may_shrink*/0); -+ } -+ if (!err) -+ return add_branch; /* success */ -+ -+out_wbr: -+ au_kfree_rcu(add_branch->br_wbr); -+out_hnotify: -+ au_hnotify_fin_br(add_branch); -+out_xino: -+ au_xino_put(add_branch); -+out_br: -+ au_kfree_rcu(add_branch); -+out: -+ return ERR_PTR(err); -+} -+ -+/* -+ * test if the branch permission is legal or not. -+ */ -+static int test_br(struct inode *inode, int brperm, char *path) -+{ -+ int err; -+ -+ err = (au_br_writable(brperm) && IS_RDONLY(inode)); -+ if (!err) -+ goto out; -+ -+ err = -EINVAL; -+ pr_err("write permission for readonly mount or inode, %s\n", path); -+ -+out: -+ return err; -+} -+ -+/* -+ * returns: -+ * 0: success, the caller will add it -+ * plus: success, it is already unified, the caller should ignore it -+ * minus: error -+ */ -+static int test_add(struct super_block *sb, struct au_opt_add *add, int remount) -+{ -+ int err; -+ aufs_bindex_t bbot, bindex; -+ struct dentry *root, *h_dentry; -+ struct inode *inode, *h_inode; -+ -+ root = sb->s_root; -+ bbot = au_sbbot(sb); -+ if (unlikely(bbot >= 0 -+ && au_find_dbindex(root, add->path.dentry) >= 0)) { -+ err = 1; -+ if (!remount) { -+ err = -EINVAL; -+ pr_err("%s duplicated\n", add->pathname); -+ } -+ goto out; -+ } -+ -+ err = -ENOSPC; /* -E2BIG; */ -+ if (unlikely(AUFS_BRANCH_MAX <= add->bindex -+ || AUFS_BRANCH_MAX - 1 <= bbot)) { -+ pr_err("number of branches exceeded %s\n", add->pathname); -+ goto out; -+ } -+ -+ err = -EDOM; -+ if (unlikely(add->bindex < 0 || bbot + 1 < add->bindex)) { -+ pr_err("bad index %d\n", add->bindex); -+ goto out; -+ } -+ -+ inode = d_inode(add->path.dentry); -+ err = -ENOENT; -+ if (unlikely(!inode->i_nlink)) { -+ pr_err("no existence %s\n", add->pathname); -+ goto out; -+ } -+ -+ err = -EINVAL; -+ if (unlikely(inode->i_sb == sb)) { -+ pr_err("%s must be outside\n", add->pathname); -+ goto out; -+ } -+ -+ if (unlikely(au_test_fs_unsuppoted(inode->i_sb))) { -+ pr_err("unsupported filesystem, %s (%s)\n", -+ add->pathname, au_sbtype(inode->i_sb)); -+ goto out; -+ } -+ -+ if (unlikely(inode->i_sb->s_stack_depth)) { -+ pr_err("already stacked, %s (%s)\n", -+ add->pathname, au_sbtype(inode->i_sb)); -+ goto out; -+ } -+ -+ err = test_br(d_inode(add->path.dentry), add->perm, add->pathname); -+ if (unlikely(err)) -+ goto out; -+ -+ if (bbot < 0) -+ return 0; /* success */ -+ -+ err = -EINVAL; -+ for (bindex = 0; bindex <= bbot; bindex++) -+ if (unlikely(test_overlap(sb, add->path.dentry, -+ au_h_dptr(root, bindex)))) { -+ pr_err("%s is overlapped\n", add->pathname); -+ goto out; -+ } -+ -+ err = 0; -+ if (au_opt_test(au_mntflags(sb), WARN_PERM)) { -+ h_dentry = au_h_dptr(root, 0); -+ h_inode = d_inode(h_dentry); -+ if ((h_inode->i_mode & S_IALLUGO) != (inode->i_mode & S_IALLUGO) -+ || !uid_eq(h_inode->i_uid, inode->i_uid) -+ || !gid_eq(h_inode->i_gid, inode->i_gid)) -+ pr_warn("uid/gid/perm %s %u/%u/0%o, %u/%u/0%o\n", -+ add->pathname, -+ i_uid_read(inode), i_gid_read(inode), -+ (inode->i_mode & S_IALLUGO), -+ i_uid_read(h_inode), i_gid_read(h_inode), -+ (h_inode->i_mode & S_IALLUGO)); -+ } -+ -+out: -+ return err; -+} -+ -+/* -+ * initialize or clean the whiteouts for an adding branch -+ */ -+static int au_br_init_wh(struct super_block *sb, struct au_branch *br, -+ int new_perm) -+{ -+ int err, old_perm; -+ aufs_bindex_t bindex; -+ struct inode *h_inode; -+ struct au_wbr *wbr; -+ struct au_hinode *hdir; -+ struct dentry *h_dentry; -+ -+ err = vfsub_mnt_want_write(au_br_mnt(br)); -+ if (unlikely(err)) -+ goto out; -+ -+ wbr = br->br_wbr; -+ old_perm = br->br_perm; -+ br->br_perm = new_perm; -+ hdir = NULL; -+ h_inode = NULL; -+ bindex = au_br_index(sb, br->br_id); -+ if (0 <= bindex) { -+ hdir = au_hi(d_inode(sb->s_root), bindex); -+ au_hn_inode_lock_nested(hdir, AuLsc_I_PARENT); -+ } else { -+ h_dentry = au_br_dentry(br); -+ h_inode = d_inode(h_dentry); -+ inode_lock_nested(h_inode, AuLsc_I_PARENT); -+ } -+ if (!wbr) -+ err = au_wh_init(br, sb); -+ else { -+ wbr_wh_write_lock(wbr); -+ err = au_wh_init(br, sb); -+ wbr_wh_write_unlock(wbr); -+ } -+ if (hdir) -+ au_hn_inode_unlock(hdir); -+ else -+ inode_unlock(h_inode); -+ vfsub_mnt_drop_write(au_br_mnt(br)); -+ br->br_perm = old_perm; -+ -+ if (!err && wbr && !au_br_writable(new_perm)) { -+ au_kfree_rcu(wbr); -+ br->br_wbr = NULL; -+ } -+ -+out: -+ return err; -+} -+ -+static int au_wbr_init(struct au_branch *br, struct super_block *sb, -+ int perm) -+{ -+ int err; -+ struct kstatfs kst; -+ struct au_wbr *wbr; -+ -+ wbr = br->br_wbr; -+ au_rw_init(&wbr->wbr_wh_rwsem); -+ atomic_set(&wbr->wbr_wh_running, 0); -+ -+ /* -+ * a limit for rmdir/rename a dir -+ * cf. AUFS_MAX_NAMELEN in include/uapi/linux/aufs_type.h -+ */ -+ err = vfs_statfs(&br->br_path, &kst); -+ if (unlikely(err)) -+ goto out; -+ err = -EINVAL; -+ if (kst.f_namelen >= NAME_MAX) -+ err = au_br_init_wh(sb, br, perm); -+ else -+ pr_err("%pd(%s), unsupported namelen %ld\n", -+ au_br_dentry(br), -+ au_sbtype(au_br_dentry(br)->d_sb), kst.f_namelen); -+ -+out: -+ return err; -+} -+ -+/* initialize a new branch */ -+static int au_br_init(struct au_branch *br, struct super_block *sb, -+ struct au_opt_add *add) -+{ -+ int err; -+ struct au_branch *brbase; -+ struct file *xf; -+ struct inode *h_inode; -+ -+ err = 0; -+ br->br_perm = add->perm; -+ br->br_path = add->path; /* set first, path_get() later */ -+ spin_lock_init(&br->br_dykey_lock); -+ au_lcnt_init(&br->br_nfiles, /*release*/NULL); -+ au_lcnt_init(&br->br_count, /*release*/NULL); -+ br->br_id = au_new_br_id(sb); -+ AuDebugOn(br->br_id < 0); -+ -+ /* always, regardless the given option */ -+ err = au_dr_br_init(sb, br, &add->path); -+ if (unlikely(err)) -+ goto out_err; -+ -+ if (au_br_writable(add->perm)) { -+ err = au_wbr_init(br, sb, add->perm); -+ if (unlikely(err)) -+ goto out_err; -+ } -+ -+ if (au_opt_test(au_mntflags(sb), XINO)) { -+ brbase = au_sbr(sb, 0); -+ xf = au_xino_file(brbase->br_xino, /*idx*/-1); -+ AuDebugOn(!xf); -+ h_inode = d_inode(add->path.dentry); -+ err = au_xino_init_br(sb, br, h_inode->i_ino, &xf->f_path); -+ if (unlikely(err)) { -+ AuDebugOn(au_xino_file(br->br_xino, /*idx*/-1)); -+ goto out_err; -+ } -+ } -+ -+ sysaufs_br_init(br); -+ path_get(&br->br_path); -+ goto out; /* success */ -+ -+out_err: -+ memset(&br->br_path, 0, sizeof(br->br_path)); -+out: -+ return err; -+} -+ -+static void au_br_do_add_brp(struct au_sbinfo *sbinfo, aufs_bindex_t bindex, -+ struct au_branch *br, aufs_bindex_t bbot, -+ aufs_bindex_t amount) -+{ -+ struct au_branch **brp; -+ -+ AuRwMustWriteLock(&sbinfo->si_rwsem); -+ -+ brp = sbinfo->si_branch + bindex; -+ memmove(brp + 1, brp, sizeof(*brp) * amount); -+ *brp = br; -+ sbinfo->si_bbot++; -+ if (unlikely(bbot < 0)) -+ sbinfo->si_bbot = 0; -+} -+ -+static void au_br_do_add_hdp(struct au_dinfo *dinfo, aufs_bindex_t bindex, -+ aufs_bindex_t bbot, aufs_bindex_t amount) -+{ -+ struct au_hdentry *hdp; -+ -+ AuRwMustWriteLock(&dinfo->di_rwsem); -+ -+ hdp = au_hdentry(dinfo, bindex); -+ memmove(hdp + 1, hdp, sizeof(*hdp) * amount); -+ au_h_dentry_init(hdp); -+ dinfo->di_bbot++; -+ if (unlikely(bbot < 0)) -+ dinfo->di_btop = 0; -+} -+ -+static void au_br_do_add_hip(struct au_iinfo *iinfo, aufs_bindex_t bindex, -+ aufs_bindex_t bbot, aufs_bindex_t amount) -+{ -+ struct au_hinode *hip; -+ -+ AuRwMustWriteLock(&iinfo->ii_rwsem); -+ -+ hip = au_hinode(iinfo, bindex); -+ memmove(hip + 1, hip, sizeof(*hip) * amount); -+ au_hinode_init(hip); -+ iinfo->ii_bbot++; -+ if (unlikely(bbot < 0)) -+ iinfo->ii_btop = 0; -+} -+ -+static void au_br_do_add(struct super_block *sb, struct au_branch *br, -+ aufs_bindex_t bindex) -+{ -+ struct dentry *root, *h_dentry; -+ struct inode *root_inode, *h_inode; -+ aufs_bindex_t bbot, amount; -+ -+ root = sb->s_root; -+ root_inode = d_inode(root); -+ bbot = au_sbbot(sb); -+ amount = bbot + 1 - bindex; -+ h_dentry = au_br_dentry(br); -+ au_sbilist_lock(); -+ au_br_do_add_brp(au_sbi(sb), bindex, br, bbot, amount); -+ au_br_do_add_hdp(au_di(root), bindex, bbot, amount); -+ au_br_do_add_hip(au_ii(root_inode), bindex, bbot, amount); -+ au_set_h_dptr(root, bindex, dget(h_dentry)); -+ h_inode = d_inode(h_dentry); -+ au_set_h_iptr(root_inode, bindex, au_igrab(h_inode), /*flags*/0); -+ au_sbilist_unlock(); -+} -+ -+int au_br_add(struct super_block *sb, struct au_opt_add *add, int remount) -+{ -+ int err; -+ aufs_bindex_t bbot, add_bindex; -+ struct dentry *root, *h_dentry; -+ struct inode *root_inode; -+ struct au_branch *add_branch; -+ -+ root = sb->s_root; -+ root_inode = d_inode(root); -+ IMustLock(root_inode); -+ IiMustWriteLock(root_inode); -+ err = test_add(sb, add, remount); -+ if (unlikely(err < 0)) -+ goto out; -+ if (err) { -+ err = 0; -+ goto out; /* success */ -+ } -+ -+ bbot = au_sbbot(sb); -+ add_branch = au_br_alloc(sb, bbot + 2, add->perm); -+ err = PTR_ERR(add_branch); -+ if (IS_ERR(add_branch)) -+ goto out; -+ -+ err = au_br_init(add_branch, sb, add); -+ if (unlikely(err)) { -+ au_br_do_free(add_branch); -+ goto out; -+ } -+ -+ add_bindex = add->bindex; -+ sysaufs_brs_del(sb, add_bindex); /* remove successors */ -+ au_br_do_add(sb, add_branch, add_bindex); -+ sysaufs_brs_add(sb, add_bindex); /* append successors */ -+ dbgaufs_brs_add(sb, add_bindex, /*topdown*/0); /* rename successors */ -+ -+ h_dentry = add->path.dentry; -+ if (!add_bindex) { -+ au_cpup_attr_all(root_inode, /*force*/1); -+ sb->s_maxbytes = h_dentry->d_sb->s_maxbytes; -+ } else -+ au_add_nlink(root_inode, d_inode(h_dentry)); -+ -+out: -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+static unsigned long long au_farray_cb(struct super_block *sb, void *a, -+ unsigned long long max __maybe_unused, -+ void *arg) -+{ -+ unsigned long long n; -+ struct file **p, *f; -+ struct hlist_bl_head *files; -+ struct hlist_bl_node *pos; -+ struct au_finfo *finfo; -+ -+ n = 0; -+ p = a; -+ files = &au_sbi(sb)->si_files; -+ hlist_bl_lock(files); -+ hlist_bl_for_each_entry(finfo, pos, files, fi_hlist) { -+ f = finfo->fi_file; -+ if (file_count(f) -+ && !special_file(file_inode(f)->i_mode)) { -+ get_file(f); -+ *p++ = f; -+ n++; -+ AuDebugOn(n > max); -+ } -+ } -+ hlist_bl_unlock(files); -+ -+ return n; -+} -+ -+static struct file **au_farray_alloc(struct super_block *sb, -+ unsigned long long *max) -+{ -+ struct au_sbinfo *sbi; -+ -+ sbi = au_sbi(sb); -+ *max = au_lcnt_read(&sbi->si_nfiles, /*do_rev*/1); -+ return au_array_alloc(max, au_farray_cb, sb, /*arg*/NULL); -+} -+ -+static void au_farray_free(struct file **a, unsigned long long max) -+{ -+ unsigned long long ull; -+ -+ for (ull = 0; ull < max; ull++) -+ if (a[ull]) -+ fput(a[ull]); -+ kvfree(a); -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* -+ * delete a branch -+ */ -+ -+/* to show the line number, do not make it inlined function */ -+#define AuVerbose(do_info, fmt, ...) do { \ -+ if (do_info) \ -+ pr_info(fmt, ##__VA_ARGS__); \ -+} while (0) -+ -+static int au_test_ibusy(struct inode *inode, aufs_bindex_t btop, -+ aufs_bindex_t bbot) -+{ -+ return (inode && !S_ISDIR(inode->i_mode)) || btop == bbot; -+} -+ -+static int au_test_dbusy(struct dentry *dentry, aufs_bindex_t btop, -+ aufs_bindex_t bbot) -+{ -+ return au_test_ibusy(d_inode(dentry), btop, bbot); -+} -+ -+/* -+ * test if the branch is deletable or not. -+ */ -+static int test_dentry_busy(struct dentry *root, aufs_bindex_t bindex, -+ unsigned int sigen, const unsigned int verbose) -+{ -+ int err, i, j, ndentry; -+ aufs_bindex_t btop, bbot; -+ struct au_dcsub_pages dpages; -+ struct au_dpage *dpage; -+ struct dentry *d; -+ -+ err = au_dpages_init(&dpages, GFP_NOFS); -+ if (unlikely(err)) -+ goto out; -+ err = au_dcsub_pages(&dpages, root, NULL, NULL); -+ if (unlikely(err)) -+ goto out_dpages; -+ -+ for (i = 0; !err && i < dpages.ndpage; i++) { -+ dpage = dpages.dpages + i; -+ ndentry = dpage->ndentry; -+ for (j = 0; !err && j < ndentry; j++) { -+ d = dpage->dentries[j]; -+ AuDebugOn(au_dcount(d) <= 0); -+ if (!au_digen_test(d, sigen)) { -+ di_read_lock_child(d, AuLock_IR); -+ if (unlikely(au_dbrange_test(d))) { -+ di_read_unlock(d, AuLock_IR); -+ continue; -+ } -+ } else { -+ di_write_lock_child(d); -+ if (unlikely(au_dbrange_test(d))) { -+ di_write_unlock(d); -+ continue; -+ } -+ err = au_reval_dpath(d, sigen); -+ if (!err) -+ di_downgrade_lock(d, AuLock_IR); -+ else { -+ di_write_unlock(d); -+ break; -+ } -+ } -+ -+ /* AuDbgDentry(d); */ -+ btop = au_dbtop(d); -+ bbot = au_dbbot(d); -+ if (btop <= bindex -+ && bindex <= bbot -+ && au_h_dptr(d, bindex) -+ && au_test_dbusy(d, btop, bbot)) { -+ err = -EBUSY; -+ AuVerbose(verbose, "busy %pd\n", d); -+ AuDbgDentry(d); -+ } -+ di_read_unlock(d, AuLock_IR); -+ } -+ } -+ -+out_dpages: -+ au_dpages_free(&dpages); -+out: -+ return err; -+} -+ -+static int test_inode_busy(struct super_block *sb, aufs_bindex_t bindex, -+ unsigned int sigen, const unsigned int verbose) -+{ -+ int err; -+ unsigned long long max, ull; -+ struct inode *i, **array; -+ aufs_bindex_t btop, bbot; -+ -+ array = au_iarray_alloc(sb, &max); -+ err = PTR_ERR(array); -+ if (IS_ERR(array)) -+ goto out; -+ -+ err = 0; -+ AuDbg("b%d\n", bindex); -+ for (ull = 0; !err && ull < max; ull++) { -+ i = array[ull]; -+ if (unlikely(!i)) -+ break; -+ if (i->i_ino == AUFS_ROOT_INO) -+ continue; -+ -+ /* AuDbgInode(i); */ -+ if (au_iigen(i, NULL) == sigen) -+ ii_read_lock_child(i); -+ else { -+ ii_write_lock_child(i); -+ err = au_refresh_hinode_self(i); -+ au_iigen_dec(i); -+ if (!err) -+ ii_downgrade_lock(i); -+ else { -+ ii_write_unlock(i); -+ break; -+ } -+ } -+ -+ btop = au_ibtop(i); -+ bbot = au_ibbot(i); -+ if (btop <= bindex -+ && bindex <= bbot -+ && au_h_iptr(i, bindex) -+ && au_test_ibusy(i, btop, bbot)) { -+ err = -EBUSY; -+ AuVerbose(verbose, "busy i%lu\n", i->i_ino); -+ AuDbgInode(i); -+ } -+ ii_read_unlock(i); -+ } -+ au_iarray_free(array, max); -+ -+out: -+ return err; -+} -+ -+static int test_children_busy(struct dentry *root, aufs_bindex_t bindex, -+ const unsigned int verbose) -+{ -+ int err; -+ unsigned int sigen; -+ -+ sigen = au_sigen(root->d_sb); -+ DiMustNoWaiters(root); -+ IiMustNoWaiters(d_inode(root)); -+ di_write_unlock(root); -+ err = test_dentry_busy(root, bindex, sigen, verbose); -+ if (!err) -+ err = test_inode_busy(root->d_sb, bindex, sigen, verbose); -+ di_write_lock_child(root); /* aufs_write_lock() calls ..._child() */ -+ -+ return err; -+} -+ -+static int test_dir_busy(struct file *file, aufs_bindex_t br_id, -+ struct file **to_free, int *idx) -+{ -+ int err; -+ unsigned char matched, root; -+ aufs_bindex_t bindex, bbot; -+ struct au_fidir *fidir; -+ struct au_hfile *hfile; -+ -+ err = 0; -+ root = IS_ROOT(file->f_path.dentry); -+ if (root) { -+ get_file(file); -+ to_free[*idx] = file; -+ (*idx)++; -+ goto out; -+ } -+ -+ matched = 0; -+ fidir = au_fi(file)->fi_hdir; -+ AuDebugOn(!fidir); -+ bbot = au_fbbot_dir(file); -+ for (bindex = au_fbtop(file); bindex <= bbot; bindex++) { -+ hfile = fidir->fd_hfile + bindex; -+ if (!hfile->hf_file) -+ continue; -+ -+ if (hfile->hf_br->br_id == br_id) { -+ matched = 1; -+ break; -+ } -+ } -+ if (matched) -+ err = -EBUSY; -+ -+out: -+ return err; -+} -+ -+static int test_file_busy(struct super_block *sb, aufs_bindex_t br_id, -+ struct file **to_free, int opened) -+{ -+ int err, idx; -+ unsigned long long ull, max; -+ aufs_bindex_t btop; -+ struct file *file, **array; -+ struct dentry *root; -+ struct au_hfile *hfile; -+ -+ array = au_farray_alloc(sb, &max); -+ err = PTR_ERR(array); -+ if (IS_ERR(array)) -+ goto out; -+ -+ err = 0; -+ idx = 0; -+ root = sb->s_root; -+ di_write_unlock(root); -+ for (ull = 0; ull < max; ull++) { -+ file = array[ull]; -+ if (unlikely(!file)) -+ break; -+ -+ /* AuDbg("%pD\n", file); */ -+ fi_read_lock(file); -+ btop = au_fbtop(file); -+ if (!d_is_dir(file->f_path.dentry)) { -+ hfile = &au_fi(file)->fi_htop; -+ if (hfile->hf_br->br_id == br_id) -+ err = -EBUSY; -+ } else -+ err = test_dir_busy(file, br_id, to_free, &idx); -+ fi_read_unlock(file); -+ if (unlikely(err)) -+ break; -+ } -+ di_write_lock_child(root); -+ au_farray_free(array, max); -+ AuDebugOn(idx > opened); -+ -+out: -+ return err; -+} -+ -+static void br_del_file(struct file **to_free, unsigned long long opened, -+ aufs_bindex_t br_id) -+{ -+ unsigned long long ull; -+ aufs_bindex_t bindex, btop, bbot, bfound; -+ struct file *file; -+ struct au_fidir *fidir; -+ struct au_hfile *hfile; -+ -+ for (ull = 0; ull < opened; ull++) { -+ file = to_free[ull]; -+ if (unlikely(!file)) -+ break; -+ -+ /* AuDbg("%pD\n", file); */ -+ AuDebugOn(!d_is_dir(file->f_path.dentry)); -+ bfound = -1; -+ fidir = au_fi(file)->fi_hdir; -+ AuDebugOn(!fidir); -+ fi_write_lock(file); -+ btop = au_fbtop(file); -+ bbot = au_fbbot_dir(file); -+ for (bindex = btop; bindex <= bbot; bindex++) { -+ hfile = fidir->fd_hfile + bindex; -+ if (!hfile->hf_file) -+ continue; -+ -+ if (hfile->hf_br->br_id == br_id) { -+ bfound = bindex; -+ break; -+ } -+ } -+ AuDebugOn(bfound < 0); -+ au_set_h_fptr(file, bfound, NULL); -+ if (bfound == btop) { -+ for (btop++; btop <= bbot; btop++) -+ if (au_hf_dir(file, btop)) { -+ au_set_fbtop(file, btop); -+ break; -+ } -+ } -+ fi_write_unlock(file); -+ } -+} -+ -+static void au_br_do_del_brp(struct au_sbinfo *sbinfo, -+ const aufs_bindex_t bindex, -+ const aufs_bindex_t bbot) -+{ -+ struct au_branch **brp, **p; -+ -+ AuRwMustWriteLock(&sbinfo->si_rwsem); -+ -+ brp = sbinfo->si_branch + bindex; -+ if (bindex < bbot) -+ memmove(brp, brp + 1, sizeof(*brp) * (bbot - bindex)); -+ sbinfo->si_branch[0 + bbot] = NULL; -+ sbinfo->si_bbot--; -+ -+ p = au_krealloc(sbinfo->si_branch, sizeof(*p) * bbot, AuGFP_SBILIST, -+ /*may_shrink*/1); -+ if (p) -+ sbinfo->si_branch = p; -+ /* harmless error */ -+} -+ -+static void au_br_do_del_hdp(struct au_dinfo *dinfo, const aufs_bindex_t bindex, -+ const aufs_bindex_t bbot) -+{ -+ struct au_hdentry *hdp, *p; -+ -+ AuRwMustWriteLock(&dinfo->di_rwsem); -+ -+ hdp = au_hdentry(dinfo, bindex); -+ if (bindex < bbot) -+ memmove(hdp, hdp + 1, sizeof(*hdp) * (bbot - bindex)); -+ /* au_h_dentry_init(au_hdentry(dinfo, bbot); */ -+ dinfo->di_bbot--; -+ -+ p = au_krealloc(dinfo->di_hdentry, sizeof(*p) * bbot, AuGFP_SBILIST, -+ /*may_shrink*/1); -+ if (p) -+ dinfo->di_hdentry = p; -+ /* harmless error */ -+} -+ -+static void au_br_do_del_hip(struct au_iinfo *iinfo, const aufs_bindex_t bindex, -+ const aufs_bindex_t bbot) -+{ -+ struct au_hinode *hip, *p; -+ -+ AuRwMustWriteLock(&iinfo->ii_rwsem); -+ -+ hip = au_hinode(iinfo, bindex); -+ if (bindex < bbot) -+ memmove(hip, hip + 1, sizeof(*hip) * (bbot - bindex)); -+ /* au_hinode_init(au_hinode(iinfo, bbot)); */ -+ iinfo->ii_bbot--; -+ -+ p = au_krealloc(iinfo->ii_hinode, sizeof(*p) * bbot, AuGFP_SBILIST, -+ /*may_shrink*/1); -+ if (p) -+ iinfo->ii_hinode = p; -+ /* harmless error */ -+} -+ -+static void au_br_do_del(struct super_block *sb, aufs_bindex_t bindex, -+ struct au_branch *br) -+{ -+ aufs_bindex_t bbot; -+ struct au_sbinfo *sbinfo; -+ struct dentry *root, *h_root; -+ struct inode *inode, *h_inode; -+ struct au_hinode *hinode; -+ -+ SiMustWriteLock(sb); -+ -+ root = sb->s_root; -+ inode = d_inode(root); -+ sbinfo = au_sbi(sb); -+ bbot = sbinfo->si_bbot; -+ -+ h_root = au_h_dptr(root, bindex); -+ hinode = au_hi(inode, bindex); -+ h_inode = au_igrab(hinode->hi_inode); -+ au_hiput(hinode); -+ -+ au_sbilist_lock(); -+ au_br_do_del_brp(sbinfo, bindex, bbot); -+ au_br_do_del_hdp(au_di(root), bindex, bbot); -+ au_br_do_del_hip(au_ii(inode), bindex, bbot); -+ au_sbilist_unlock(); -+ -+ /* ignore an error */ -+ au_dr_br_fin(sb, br); /* always, regardless the mount option */ -+ -+ dput(h_root); -+ iput(h_inode); -+ au_br_do_free(br); -+} -+ -+static unsigned long long empty_cb(struct super_block *sb, void *array, -+ unsigned long long max, void *arg) -+{ -+ return max; -+} -+ -+int au_br_del(struct super_block *sb, struct au_opt_del *del, int remount) -+{ -+ int err, rerr, i; -+ unsigned long long opened; -+ unsigned int mnt_flags; -+ aufs_bindex_t bindex, bbot, br_id; -+ unsigned char do_wh, verbose; -+ struct au_branch *br; -+ struct au_wbr *wbr; -+ struct dentry *root; -+ struct file **to_free; -+ -+ err = 0; -+ opened = 0; -+ to_free = NULL; -+ root = sb->s_root; -+ bindex = au_find_dbindex(root, del->h_path.dentry); -+ if (bindex < 0) { -+ if (remount) -+ goto out; /* success */ -+ err = -ENOENT; -+ pr_err("%s no such branch\n", del->pathname); -+ goto out; -+ } -+ AuDbg("bindex b%d\n", bindex); -+ -+ err = -EBUSY; -+ mnt_flags = au_mntflags(sb); -+ verbose = !!au_opt_test(mnt_flags, VERBOSE); -+ bbot = au_sbbot(sb); -+ if (unlikely(!bbot)) { -+ AuVerbose(verbose, "no more branches left\n"); -+ goto out; -+ } -+ -+ br = au_sbr(sb, bindex); -+ AuDebugOn(!path_equal(&br->br_path, &del->h_path)); -+ if (unlikely(au_lcnt_read(&br->br_count, /*do_rev*/1))) { -+ AuVerbose(verbose, "br %pd2 is busy now\n", del->h_path.dentry); -+ goto out; -+ } -+ -+ br_id = br->br_id; -+ opened = au_lcnt_read(&br->br_nfiles, /*do_rev*/1); -+ if (unlikely(opened)) { -+ to_free = au_array_alloc(&opened, empty_cb, sb, NULL); -+ err = PTR_ERR(to_free); -+ if (IS_ERR(to_free)) -+ goto out; -+ -+ err = test_file_busy(sb, br_id, to_free, opened); -+ if (unlikely(err)) { -+ AuVerbose(verbose, "%llu file(s) opened\n", opened); -+ goto out; -+ } -+ } -+ -+ wbr = br->br_wbr; -+ do_wh = wbr && (wbr->wbr_whbase || wbr->wbr_plink || wbr->wbr_orph); -+ if (do_wh) { -+ /* instead of WbrWhMustWriteLock(wbr) */ -+ SiMustWriteLock(sb); -+ for (i = 0; i < AuBrWh_Last; i++) { -+ dput(wbr->wbr_wh[i]); -+ wbr->wbr_wh[i] = NULL; -+ } -+ } -+ -+ err = test_children_busy(root, bindex, verbose); -+ if (unlikely(err)) { -+ if (do_wh) -+ goto out_wh; -+ goto out; -+ } -+ -+ err = 0; -+ if (to_free) { -+ /* -+ * now we confirmed the branch is deletable. -+ * let's free the remaining opened dirs on the branch. -+ */ -+ di_write_unlock(root); -+ br_del_file(to_free, opened, br_id); -+ di_write_lock_child(root); -+ } -+ -+ sysaufs_brs_del(sb, bindex); /* remove successors */ -+ dbgaufs_xino_del(br); /* remove one */ -+ au_br_do_del(sb, bindex, br); -+ sysaufs_brs_add(sb, bindex); /* append successors */ -+ dbgaufs_brs_add(sb, bindex, /*topdown*/1); /* rename successors */ -+ -+ if (!bindex) { -+ au_cpup_attr_all(d_inode(root), /*force*/1); -+ sb->s_maxbytes = au_sbr_sb(sb, 0)->s_maxbytes; -+ } else -+ au_sub_nlink(d_inode(root), d_inode(del->h_path.dentry)); -+ if (au_opt_test(mnt_flags, PLINK)) -+ au_plink_half_refresh(sb, br_id); -+ -+ goto out; /* success */ -+ -+out_wh: -+ /* revert */ -+ rerr = au_br_init_wh(sb, br, br->br_perm); -+ if (rerr) -+ pr_warn("failed re-creating base whiteout, %s. (%d)\n", -+ del->pathname, rerr); -+out: -+ if (to_free) -+ au_farray_free(to_free, opened); -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+static int au_ibusy(struct super_block *sb, struct aufs_ibusy __user *arg) -+{ -+ int err; -+ aufs_bindex_t btop, bbot; -+ struct aufs_ibusy ibusy; -+ struct inode *inode, *h_inode; -+ -+ err = -EPERM; -+ if (unlikely(!capable(CAP_SYS_ADMIN))) -+ goto out; -+ -+ err = copy_from_user(&ibusy, arg, sizeof(ibusy)); -+ if (!err) -+ /* VERIFY_WRITE */ -+ err = !access_ok(&arg->h_ino, sizeof(arg->h_ino)); -+ if (unlikely(err)) { -+ err = -EFAULT; -+ AuTraceErr(err); -+ goto out; -+ } -+ -+ err = -EINVAL; -+ si_read_lock(sb, AuLock_FLUSH); -+ if (unlikely(ibusy.bindex < 0 || ibusy.bindex > au_sbbot(sb))) -+ goto out_unlock; -+ -+ err = 0; -+ ibusy.h_ino = 0; /* invalid */ -+ inode = ilookup(sb, ibusy.ino); -+ if (!inode -+ || inode->i_ino == AUFS_ROOT_INO -+ || au_is_bad_inode(inode)) -+ goto out_unlock; -+ -+ ii_read_lock_child(inode); -+ btop = au_ibtop(inode); -+ bbot = au_ibbot(inode); -+ if (btop <= ibusy.bindex && ibusy.bindex <= bbot) { -+ h_inode = au_h_iptr(inode, ibusy.bindex); -+ if (h_inode && au_test_ibusy(inode, btop, bbot)) -+ ibusy.h_ino = h_inode->i_ino; -+ } -+ ii_read_unlock(inode); -+ iput(inode); -+ -+out_unlock: -+ si_read_unlock(sb); -+ if (!err) { -+ err = __put_user(ibusy.h_ino, &arg->h_ino); -+ if (unlikely(err)) { -+ err = -EFAULT; -+ AuTraceErr(err); -+ } -+ } -+out: -+ return err; -+} -+ -+long au_ibusy_ioctl(struct file *file, unsigned long arg) -+{ -+ return au_ibusy(file->f_path.dentry->d_sb, (void __user *)arg); -+} -+ -+#ifdef CONFIG_COMPAT -+long au_ibusy_compat_ioctl(struct file *file, unsigned long arg) -+{ -+ return au_ibusy(file->f_path.dentry->d_sb, compat_ptr(arg)); -+} -+#endif -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* -+ * change a branch permission -+ */ -+ -+static void au_warn_ima(void) -+{ -+#ifdef CONFIG_IMA -+ /* since it doesn't support mark_files_ro() */ -+ AuWarn1("RW -> RO makes IMA to produce wrong message\n"); -+#endif -+} -+ -+static int do_need_sigen_inc(int a, int b) -+{ -+ return au_br_whable(a) && !au_br_whable(b); -+} -+ -+static int need_sigen_inc(int old, int new) -+{ -+ return do_need_sigen_inc(old, new) -+ || do_need_sigen_inc(new, old); -+} -+ -+static int au_br_mod_files_ro(struct super_block *sb, aufs_bindex_t bindex) -+{ -+ int err, do_warn; -+ unsigned int mnt_flags; -+ unsigned long long ull, max; -+ aufs_bindex_t br_id; -+ unsigned char verbose, writer; -+ struct file *file, *hf, **array; -+ struct au_hfile *hfile; -+ struct inode *h_inode; -+ -+ mnt_flags = au_mntflags(sb); -+ verbose = !!au_opt_test(mnt_flags, VERBOSE); -+ -+ array = au_farray_alloc(sb, &max); -+ err = PTR_ERR(array); -+ if (IS_ERR(array)) -+ goto out; -+ -+ do_warn = 0; -+ br_id = au_sbr_id(sb, bindex); -+ for (ull = 0; ull < max; ull++) { -+ file = array[ull]; -+ if (unlikely(!file)) -+ break; -+ -+ /* AuDbg("%pD\n", file); */ -+ fi_read_lock(file); -+ if (unlikely(au_test_mmapped(file))) { -+ err = -EBUSY; -+ AuVerbose(verbose, "mmapped %pD\n", file); -+ AuDbgFile(file); -+ FiMustNoWaiters(file); -+ fi_read_unlock(file); -+ goto out_array; -+ } -+ -+ hfile = &au_fi(file)->fi_htop; -+ hf = hfile->hf_file; -+ if (!d_is_reg(file->f_path.dentry) -+ || !(file->f_mode & FMODE_WRITE) -+ || hfile->hf_br->br_id != br_id -+ || !(hf->f_mode & FMODE_WRITE)) -+ array[ull] = NULL; -+ else { -+ do_warn = 1; -+ get_file(file); -+ } -+ -+ FiMustNoWaiters(file); -+ fi_read_unlock(file); -+ fput(file); -+ } -+ -+ err = 0; -+ if (do_warn) -+ au_warn_ima(); -+ -+ for (ull = 0; ull < max; ull++) { -+ file = array[ull]; -+ if (!file) -+ continue; -+ -+ /* todo: already flushed? */ -+ /* -+ * fs/super.c:mark_files_ro() is gone, but aufs keeps its -+ * approach which resets f_mode and calls mnt_drop_write() and -+ * file_release_write() for each file, because the branch -+ * attribute in aufs world is totally different from the native -+ * fs rw/ro mode. -+ */ -+ /* fi_read_lock(file); */ -+ hfile = &au_fi(file)->fi_htop; -+ hf = hfile->hf_file; -+ /* fi_read_unlock(file); */ -+ spin_lock(&hf->f_lock); -+ writer = !!(hf->f_mode & FMODE_WRITER); -+ hf->f_mode &= ~(FMODE_WRITE | FMODE_WRITER); -+ spin_unlock(&hf->f_lock); -+ if (writer) { -+ h_inode = file_inode(hf); -+ if (hf->f_mode & FMODE_READ) -+ i_readcount_inc(h_inode); -+ put_write_access(h_inode); -+ __mnt_drop_write(hf->f_path.mnt); -+ } -+ } -+ -+out_array: -+ au_farray_free(array, max); -+out: -+ AuTraceErr(err); -+ return err; -+} -+ -+int au_br_mod(struct super_block *sb, struct au_opt_mod *mod, int remount, -+ int *do_refresh) -+{ -+ int err, rerr; -+ aufs_bindex_t bindex; -+ struct dentry *root; -+ struct au_branch *br; -+ struct au_br_fhsm *bf; -+ -+ root = sb->s_root; -+ bindex = au_find_dbindex(root, mod->h_root); -+ if (bindex < 0) { -+ if (remount) -+ return 0; /* success */ -+ err = -ENOENT; -+ pr_err("%s no such branch\n", mod->path); -+ goto out; -+ } -+ AuDbg("bindex b%d\n", bindex); -+ -+ err = test_br(d_inode(mod->h_root), mod->perm, mod->path); -+ if (unlikely(err)) -+ goto out; -+ -+ br = au_sbr(sb, bindex); -+ AuDebugOn(mod->h_root != au_br_dentry(br)); -+ if (br->br_perm == mod->perm) -+ return 0; /* success */ -+ -+ /* pre-allocate for non-fhsm --> fhsm */ -+ bf = NULL; -+ if (!au_br_fhsm(br->br_perm) && au_br_fhsm(mod->perm)) { -+ err = au_fhsm_br_alloc(br); -+ if (unlikely(err)) -+ goto out; -+ bf = br->br_fhsm; -+ br->br_fhsm = NULL; -+ } -+ -+ if (au_br_writable(br->br_perm)) { -+ /* remove whiteout base */ -+ err = au_br_init_wh(sb, br, mod->perm); -+ if (unlikely(err)) -+ goto out_bf; -+ -+ if (!au_br_writable(mod->perm)) { -+ /* rw --> ro, file might be mmapped */ -+ DiMustNoWaiters(root); -+ IiMustNoWaiters(d_inode(root)); -+ di_write_unlock(root); -+ err = au_br_mod_files_ro(sb, bindex); -+ /* aufs_write_lock() calls ..._child() */ -+ di_write_lock_child(root); -+ -+ if (unlikely(err)) { -+ rerr = -ENOMEM; -+ br->br_wbr = kzalloc(sizeof(*br->br_wbr), -+ GFP_NOFS); -+ if (br->br_wbr) -+ rerr = au_wbr_init(br, sb, br->br_perm); -+ if (unlikely(rerr)) { -+ AuIOErr("nested error %d (%d)\n", -+ rerr, err); -+ br->br_perm = mod->perm; -+ } -+ } -+ } -+ } else if (au_br_writable(mod->perm)) { -+ /* ro --> rw */ -+ err = -ENOMEM; -+ br->br_wbr = kzalloc(sizeof(*br->br_wbr), GFP_NOFS); -+ if (br->br_wbr) { -+ err = au_wbr_init(br, sb, mod->perm); -+ if (unlikely(err)) { -+ au_kfree_rcu(br->br_wbr); -+ br->br_wbr = NULL; -+ } -+ } -+ } -+ if (unlikely(err)) -+ goto out_bf; -+ -+ if (au_br_fhsm(br->br_perm)) { -+ if (!au_br_fhsm(mod->perm)) { -+ /* fhsm --> non-fhsm */ -+ au_br_fhsm_fin(br->br_fhsm); -+ au_kfree_rcu(br->br_fhsm); -+ br->br_fhsm = NULL; -+ } -+ } else if (au_br_fhsm(mod->perm)) -+ /* non-fhsm --> fhsm */ -+ br->br_fhsm = bf; -+ -+ *do_refresh |= need_sigen_inc(br->br_perm, mod->perm); -+ br->br_perm = mod->perm; -+ goto out; /* success */ -+ -+out_bf: -+ au_kfree_try_rcu(bf); -+out: -+ AuTraceErr(err); -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+int au_br_stfs(struct au_branch *br, struct aufs_stfs *stfs) -+{ -+ int err; -+ struct kstatfs kstfs; -+ -+ err = vfs_statfs(&br->br_path, &kstfs); -+ if (!err) { -+ stfs->f_blocks = kstfs.f_blocks; -+ stfs->f_bavail = kstfs.f_bavail; -+ stfs->f_files = kstfs.f_files; -+ stfs->f_ffree = kstfs.f_ffree; -+ } -+ -+ return err; -+} -diff --git a/fs/aufs/branch.h b/fs/aufs/branch.h -new file mode 100644 -index 000000000000..5632781b7bcc ---- /dev/null -+++ b/fs/aufs/branch.h -@@ -0,0 +1,351 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * branch filesystems and xino for them -+ */ -+ -+#ifndef __AUFS_BRANCH_H__ -+#define __AUFS_BRANCH_H__ -+ -+#ifdef __KERNEL__ -+ -+#include -+#include "dirren.h" -+#include "dynop.h" -+#include "lcnt.h" -+#include "rwsem.h" -+#include "super.h" -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* a xino file */ -+struct au_xino { -+ struct file **xi_file; -+ unsigned int xi_nfile; -+ -+ struct { -+ spinlock_t spin; -+ ino_t *array; -+ int total; -+ /* reserved for future use */ -+ /* unsigned long *bitmap; */ -+ wait_queue_head_t wqh; -+ } xi_nondir; -+ -+ struct mutex xi_mtx; /* protects xi_file array */ -+ struct hlist_bl_head xi_writing; -+ -+ atomic_t xi_truncating; -+ -+ struct kref xi_kref; -+}; -+ -+/* File-based Hierarchical Storage Management */ -+struct au_br_fhsm { -+#ifdef CONFIG_AUFS_FHSM -+ struct mutex bf_lock; -+ unsigned long bf_jiffy; -+ struct aufs_stfs bf_stfs; -+ int bf_readable; -+#endif -+}; -+ -+/* members for writable branch only */ -+enum {AuBrWh_BASE, AuBrWh_PLINK, AuBrWh_ORPH, AuBrWh_Last}; -+struct au_wbr { -+ struct au_rwsem wbr_wh_rwsem; -+ struct dentry *wbr_wh[AuBrWh_Last]; -+ atomic_t wbr_wh_running; -+#define wbr_whbase wbr_wh[AuBrWh_BASE] /* whiteout base */ -+#define wbr_plink wbr_wh[AuBrWh_PLINK] /* pseudo-link dir */ -+#define wbr_orph wbr_wh[AuBrWh_ORPH] /* dir for orphans */ -+ -+ /* mfs mode */ -+ unsigned long long wbr_bytes; -+}; -+ -+/* ext2 has 3 types of operations at least, ext3 has 4 */ -+#define AuBrDynOp (AuDyLast * 4) -+ -+#ifdef CONFIG_AUFS_HFSNOTIFY -+/* support for asynchronous destruction */ -+struct au_br_hfsnotify { -+ struct fsnotify_group *hfsn_group; -+}; -+#endif -+ -+/* sysfs entries */ -+struct au_brsysfs { -+ char name[16]; -+ struct attribute attr; -+}; -+ -+enum { -+ AuBrSysfs_BR, -+ AuBrSysfs_BRID, -+ AuBrSysfs_Last -+}; -+ -+/* protected by superblock rwsem */ -+struct au_branch { -+ struct au_xino *br_xino; -+ -+ aufs_bindex_t br_id; -+ -+ int br_perm; -+ struct path br_path; -+ spinlock_t br_dykey_lock; -+ struct au_dykey *br_dykey[AuBrDynOp]; -+ au_lcnt_t br_nfiles; /* opened files */ -+ au_lcnt_t br_count; /* in-use for other */ -+ -+ struct au_wbr *br_wbr; -+ struct au_br_fhsm *br_fhsm; -+ -+#ifdef CONFIG_AUFS_HFSNOTIFY -+ struct au_br_hfsnotify *br_hfsn; -+#endif -+ -+#ifdef CONFIG_SYSFS -+ /* entries under sysfs per mount-point */ -+ struct au_brsysfs br_sysfs[AuBrSysfs_Last]; -+#endif -+ -+#ifdef CONFIG_DEBUG_FS -+ struct dentry *br_dbgaufs; /* xino */ -+#endif -+ -+ struct au_dr_br br_dirren; -+}; -+ -+/* ---------------------------------------------------------------------- */ -+ -+static inline struct vfsmount *au_br_mnt(struct au_branch *br) -+{ -+ return br->br_path.mnt; -+} -+ -+static inline struct dentry *au_br_dentry(struct au_branch *br) -+{ -+ return br->br_path.dentry; -+} -+ -+static inline struct super_block *au_br_sb(struct au_branch *br) -+{ -+ return au_br_mnt(br)->mnt_sb; -+} -+ -+static inline int au_br_rdonly(struct au_branch *br) -+{ -+ return (sb_rdonly(au_br_sb(br)) -+ || !au_br_writable(br->br_perm)) -+ ? -EROFS : 0; -+} -+ -+static inline int au_br_hnotifyable(int brperm __maybe_unused) -+{ -+#ifdef CONFIG_AUFS_HNOTIFY -+ return !(brperm & AuBrPerm_RR); -+#else -+ return 0; -+#endif -+} -+ -+static inline int au_br_test_oflag(int oflag, struct au_branch *br) -+{ -+ int err, exec_flag; -+ -+ err = 0; -+ exec_flag = oflag & __FMODE_EXEC; -+ if (unlikely(exec_flag && path_noexec(&br->br_path))) -+ err = -EACCES; -+ -+ return err; -+} -+ -+static inline void au_xino_get(struct au_branch *br) -+{ -+ struct au_xino *xi; -+ -+ xi = br->br_xino; -+ if (xi) -+ kref_get(&xi->xi_kref); -+} -+ -+static inline int au_xino_count(struct au_branch *br) -+{ -+ int v; -+ struct au_xino *xi; -+ -+ v = 0; -+ xi = br->br_xino; -+ if (xi) -+ v = kref_read(&xi->xi_kref); -+ -+ return v; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* branch.c */ -+struct au_sbinfo; -+void au_br_free(struct au_sbinfo *sinfo); -+int au_br_index(struct super_block *sb, aufs_bindex_t br_id); -+struct au_opt_add; -+int au_br_add(struct super_block *sb, struct au_opt_add *add, int remount); -+struct au_opt_del; -+int au_br_del(struct super_block *sb, struct au_opt_del *del, int remount); -+long au_ibusy_ioctl(struct file *file, unsigned long arg); -+#ifdef CONFIG_COMPAT -+long au_ibusy_compat_ioctl(struct file *file, unsigned long arg); -+#endif -+struct au_opt_mod; -+int au_br_mod(struct super_block *sb, struct au_opt_mod *mod, int remount, -+ int *do_refresh); -+struct aufs_stfs; -+int au_br_stfs(struct au_branch *br, struct aufs_stfs *stfs); -+ -+/* xino.c */ -+static const loff_t au_loff_max = LLONG_MAX; -+ -+aufs_bindex_t au_xi_root(struct super_block *sb, struct dentry *dentry); -+struct file *au_xino_create(struct super_block *sb, char *fpath, int silent, -+ int wbrtop); -+struct file *au_xino_create2(struct super_block *sb, struct path *base, -+ struct file *copy_src); -+struct au_xi_new { -+ struct au_xino *xi; /* switch between xino and xigen */ -+ int idx; -+ struct path *base; -+ struct file *copy_src; -+}; -+struct file *au_xi_new(struct super_block *sb, struct au_xi_new *xinew); -+ -+int au_xino_read(struct super_block *sb, aufs_bindex_t bindex, ino_t h_ino, -+ ino_t *ino); -+int au_xino_write(struct super_block *sb, aufs_bindex_t bindex, ino_t h_ino, -+ ino_t ino); -+ssize_t xino_fread(struct file *file, void *buf, size_t size, loff_t *pos); -+ssize_t xino_fwrite(struct file *file, void *buf, size_t size, loff_t *pos); -+ -+int au_xib_trunc(struct super_block *sb); -+int au_xino_trunc(struct super_block *sb, aufs_bindex_t bindex, int idx_begin); -+ -+struct au_xino *au_xino_alloc(unsigned int nfile); -+int au_xino_put(struct au_branch *br); -+struct file *au_xino_file1(struct au_xino *xi); -+ -+struct au_opt_xino; -+void au_xino_clr(struct super_block *sb); -+int au_xino_set(struct super_block *sb, struct au_opt_xino *xiopt, int remount); -+struct file *au_xino_def(struct super_block *sb); -+int au_xino_init_br(struct super_block *sb, struct au_branch *br, ino_t hino, -+ struct path *base); -+ -+ino_t au_xino_new_ino(struct super_block *sb); -+void au_xino_delete_inode(struct inode *inode, const int unlinked); -+ -+void au_xinondir_leave(struct super_block *sb, aufs_bindex_t bindex, -+ ino_t h_ino, int idx); -+int au_xinondir_enter(struct super_block *sb, aufs_bindex_t bindex, ino_t h_ino, -+ int *idx); -+ -+int au_xino_path(struct seq_file *seq, struct file *file); -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* @idx is signed to accept -1 meaning the first file */ -+static inline struct file *au_xino_file(struct au_xino *xi, int idx) -+{ -+ struct file *file; -+ -+ file = NULL; -+ if (!xi) -+ goto out; -+ -+ if (idx >= 0) { -+ if (idx < xi->xi_nfile) -+ file = xi->xi_file[idx]; -+ } else -+ file = au_xino_file1(xi); -+ -+out: -+ return file; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* Superblock to branch */ -+static inline -+aufs_bindex_t au_sbr_id(struct super_block *sb, aufs_bindex_t bindex) -+{ -+ return au_sbr(sb, bindex)->br_id; -+} -+ -+static inline -+struct vfsmount *au_sbr_mnt(struct super_block *sb, aufs_bindex_t bindex) -+{ -+ return au_br_mnt(au_sbr(sb, bindex)); -+} -+ -+static inline -+struct super_block *au_sbr_sb(struct super_block *sb, aufs_bindex_t bindex) -+{ -+ return au_br_sb(au_sbr(sb, bindex)); -+} -+ -+static inline int au_sbr_perm(struct super_block *sb, aufs_bindex_t bindex) -+{ -+ return au_sbr(sb, bindex)->br_perm; -+} -+ -+static inline int au_sbr_whable(struct super_block *sb, aufs_bindex_t bindex) -+{ -+ return au_br_whable(au_sbr_perm(sb, bindex)); -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+#define wbr_wh_read_lock(wbr) au_rw_read_lock(&(wbr)->wbr_wh_rwsem) -+#define wbr_wh_write_lock(wbr) au_rw_write_lock(&(wbr)->wbr_wh_rwsem) -+#define wbr_wh_read_trylock(wbr) au_rw_read_trylock(&(wbr)->wbr_wh_rwsem) -+#define wbr_wh_write_trylock(wbr) au_rw_write_trylock(&(wbr)->wbr_wh_rwsem) -+/* -+#define wbr_wh_read_trylock_nested(wbr) \ -+ au_rw_read_trylock_nested(&(wbr)->wbr_wh_rwsem) -+#define wbr_wh_write_trylock_nested(wbr) \ -+ au_rw_write_trylock_nested(&(wbr)->wbr_wh_rwsem) -+*/ -+ -+#define wbr_wh_read_unlock(wbr) au_rw_read_unlock(&(wbr)->wbr_wh_rwsem) -+#define wbr_wh_write_unlock(wbr) au_rw_write_unlock(&(wbr)->wbr_wh_rwsem) -+#define wbr_wh_downgrade_lock(wbr) au_rw_dgrade_lock(&(wbr)->wbr_wh_rwsem) -+ -+#define WbrWhMustNoWaiters(wbr) AuRwMustNoWaiters(&(wbr)->wbr_wh_rwsem) -+#define WbrWhMustAnyLock(wbr) AuRwMustAnyLock(&(wbr)->wbr_wh_rwsem) -+#define WbrWhMustWriteLock(wbr) AuRwMustWriteLock(&(wbr)->wbr_wh_rwsem) -+ -+/* ---------------------------------------------------------------------- */ -+ -+#ifdef CONFIG_AUFS_FHSM -+static inline void au_br_fhsm_init(struct au_br_fhsm *brfhsm) -+{ -+ mutex_init(&brfhsm->bf_lock); -+ brfhsm->bf_jiffy = 0; -+ brfhsm->bf_readable = 0; -+} -+ -+static inline void au_br_fhsm_fin(struct au_br_fhsm *brfhsm) -+{ -+ mutex_destroy(&brfhsm->bf_lock); -+} -+#else -+AuStubVoid(au_br_fhsm_init, struct au_br_fhsm *brfhsm) -+AuStubVoid(au_br_fhsm_fin, struct au_br_fhsm *brfhsm) -+#endif -+ -+#endif /* __KERNEL__ */ -+#endif /* __AUFS_BRANCH_H__ */ -diff --git a/fs/aufs/cpup.c b/fs/aufs/cpup.c -new file mode 100644 -index 000000000000..d413ad06ca89 ---- /dev/null -+++ b/fs/aufs/cpup.c -@@ -0,0 +1,1432 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * copy-up functions, see wbr_policy.c for copy-down -+ */ -+ -+#include -+#include -+#include -+#include "aufs.h" -+ -+void au_cpup_attr_flags(struct inode *dst, unsigned int iflags) -+{ -+ const unsigned int mask = S_DEAD | S_SWAPFILE | S_PRIVATE -+ | S_NOATIME | S_NOCMTIME | S_AUTOMOUNT; -+ -+ BUILD_BUG_ON(sizeof(iflags) != sizeof(dst->i_flags)); -+ -+ dst->i_flags |= iflags & ~mask; -+ if (au_test_fs_notime(dst->i_sb)) -+ dst->i_flags |= S_NOATIME | S_NOCMTIME; -+} -+ -+void au_cpup_attr_timesizes(struct inode *inode) -+{ -+ struct inode *h_inode; -+ -+ h_inode = au_h_iptr(inode, au_ibtop(inode)); -+ fsstack_copy_attr_times(inode, h_inode); -+ fsstack_copy_inode_size(inode, h_inode); -+} -+ -+void au_cpup_attr_nlink(struct inode *inode, int force) -+{ -+ struct inode *h_inode; -+ struct super_block *sb; -+ aufs_bindex_t bindex, bbot; -+ -+ sb = inode->i_sb; -+ bindex = au_ibtop(inode); -+ h_inode = au_h_iptr(inode, bindex); -+ if (!force -+ && !S_ISDIR(h_inode->i_mode) -+ && au_opt_test(au_mntflags(sb), PLINK) -+ && au_plink_test(inode)) -+ return; -+ -+ /* -+ * 0 can happen in revalidating. -+ * h_inode->i_mutex may not be held here, but it is harmless since once -+ * i_nlink reaches 0, it will never become positive except O_TMPFILE -+ * case. -+ * todo: O_TMPFILE+linkat(AT_SYMLINK_FOLLOW) bypassing aufs may cause -+ * the incorrect link count. -+ */ -+ set_nlink(inode, h_inode->i_nlink); -+ -+ /* -+ * fewer nlink makes find(1) noisy, but larger nlink doesn't. -+ * it may includes whplink directory. -+ */ -+ if (S_ISDIR(h_inode->i_mode)) { -+ bbot = au_ibbot(inode); -+ for (bindex++; bindex <= bbot; bindex++) { -+ h_inode = au_h_iptr(inode, bindex); -+ if (h_inode) -+ au_add_nlink(inode, h_inode); -+ } -+ } -+} -+ -+void au_cpup_attr_changeable(struct inode *inode) -+{ -+ struct inode *h_inode; -+ -+ h_inode = au_h_iptr(inode, au_ibtop(inode)); -+ inode->i_mode = h_inode->i_mode; -+ inode->i_uid = h_inode->i_uid; -+ inode->i_gid = h_inode->i_gid; -+ au_cpup_attr_timesizes(inode); -+ au_cpup_attr_flags(inode, h_inode->i_flags); -+} -+ -+void au_cpup_igen(struct inode *inode, struct inode *h_inode) -+{ -+ struct au_iinfo *iinfo = au_ii(inode); -+ -+ IiMustWriteLock(inode); -+ -+ iinfo->ii_higen = h_inode->i_generation; -+ iinfo->ii_hsb1 = h_inode->i_sb; -+} -+ -+void au_cpup_attr_all(struct inode *inode, int force) -+{ -+ struct inode *h_inode; -+ -+ h_inode = au_h_iptr(inode, au_ibtop(inode)); -+ au_cpup_attr_changeable(inode); -+ if (inode->i_nlink > 0) -+ au_cpup_attr_nlink(inode, force); -+ inode->i_rdev = h_inode->i_rdev; -+ inode->i_blkbits = h_inode->i_blkbits; -+ au_cpup_igen(inode, h_inode); -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* Note: dt_dentry and dt_h_dentry are not dget/dput-ed */ -+ -+/* keep the timestamps of the parent dir when cpup */ -+void au_dtime_store(struct au_dtime *dt, struct dentry *dentry, -+ struct path *h_path) -+{ -+ struct inode *h_inode; -+ -+ dt->dt_dentry = dentry; -+ dt->dt_h_path = *h_path; -+ h_inode = d_inode(h_path->dentry); -+ dt->dt_atime = h_inode->i_atime; -+ dt->dt_mtime = h_inode->i_mtime; -+ /* smp_mb(); */ -+} -+ -+void au_dtime_revert(struct au_dtime *dt) -+{ -+ struct iattr attr; -+ int err; -+ -+ attr.ia_atime = dt->dt_atime; -+ attr.ia_mtime = dt->dt_mtime; -+ attr.ia_valid = ATTR_FORCE | ATTR_MTIME | ATTR_MTIME_SET -+ | ATTR_ATIME | ATTR_ATIME_SET; -+ -+ /* no delegation since this is a directory */ -+ err = vfsub_notify_change(&dt->dt_h_path, &attr, /*delegated*/NULL); -+ if (unlikely(err)) -+ pr_warn("restoring timestamps failed(%d). ignored\n", err); -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* internal use only */ -+struct au_cpup_reg_attr { -+ int valid; -+ struct kstat st; -+ unsigned int iflags; /* inode->i_flags */ -+}; -+ -+static noinline_for_stack -+int cpup_iattr(struct dentry *dst, aufs_bindex_t bindex, struct dentry *h_src, -+ struct au_cpup_reg_attr *h_src_attr) -+{ -+ int err, sbits, icex; -+ unsigned int mnt_flags; -+ unsigned char verbose; -+ struct iattr ia; -+ struct path h_path; -+ struct inode *h_isrc, *h_idst; -+ struct kstat *h_st; -+ struct au_branch *br; -+ -+ h_path.dentry = au_h_dptr(dst, bindex); -+ h_idst = d_inode(h_path.dentry); -+ br = au_sbr(dst->d_sb, bindex); -+ h_path.mnt = au_br_mnt(br); -+ h_isrc = d_inode(h_src); -+ ia.ia_valid = ATTR_FORCE | ATTR_UID | ATTR_GID -+ | ATTR_ATIME | ATTR_MTIME -+ | ATTR_ATIME_SET | ATTR_MTIME_SET; -+ if (h_src_attr && h_src_attr->valid) { -+ h_st = &h_src_attr->st; -+ ia.ia_uid = h_st->uid; -+ ia.ia_gid = h_st->gid; -+ ia.ia_atime = h_st->atime; -+ ia.ia_mtime = h_st->mtime; -+ if (h_idst->i_mode != h_st->mode -+ && !S_ISLNK(h_idst->i_mode)) { -+ ia.ia_valid |= ATTR_MODE; -+ ia.ia_mode = h_st->mode; -+ } -+ sbits = !!(h_st->mode & (S_ISUID | S_ISGID)); -+ au_cpup_attr_flags(h_idst, h_src_attr->iflags); -+ } else { -+ ia.ia_uid = h_isrc->i_uid; -+ ia.ia_gid = h_isrc->i_gid; -+ ia.ia_atime = h_isrc->i_atime; -+ ia.ia_mtime = h_isrc->i_mtime; -+ if (h_idst->i_mode != h_isrc->i_mode -+ && !S_ISLNK(h_idst->i_mode)) { -+ ia.ia_valid |= ATTR_MODE; -+ ia.ia_mode = h_isrc->i_mode; -+ } -+ sbits = !!(h_isrc->i_mode & (S_ISUID | S_ISGID)); -+ au_cpup_attr_flags(h_idst, h_isrc->i_flags); -+ } -+ /* no delegation since it is just created */ -+ err = vfsub_notify_change(&h_path, &ia, /*delegated*/NULL); -+ -+ /* is this nfs only? */ -+ if (!err && sbits && au_test_nfs(h_path.dentry->d_sb)) { -+ ia.ia_valid = ATTR_FORCE | ATTR_MODE; -+ ia.ia_mode = h_isrc->i_mode; -+ err = vfsub_notify_change(&h_path, &ia, /*delegated*/NULL); -+ } -+ -+ icex = br->br_perm & AuBrAttr_ICEX; -+ if (!err) { -+ mnt_flags = au_mntflags(dst->d_sb); -+ verbose = !!au_opt_test(mnt_flags, VERBOSE); -+ err = au_cpup_xattr(h_path.dentry, h_src, icex, verbose); -+ } -+ -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+static int au_do_copy_file(struct file *dst, struct file *src, loff_t len, -+ char *buf, unsigned long blksize) -+{ -+ int err; -+ size_t sz, rbytes, wbytes; -+ unsigned char all_zero; -+ char *p, *zp; -+ struct inode *h_inode; -+ /* reduce stack usage */ -+ struct iattr *ia; -+ -+ zp = page_address(ZERO_PAGE(0)); -+ if (unlikely(!zp)) -+ return -ENOMEM; /* possible? */ -+ -+ err = 0; -+ all_zero = 0; -+ while (len) { -+ AuDbg("len %lld\n", len); -+ sz = blksize; -+ if (len < blksize) -+ sz = len; -+ -+ rbytes = 0; -+ /* todo: signal_pending? */ -+ while (!rbytes || err == -EAGAIN || err == -EINTR) { -+ rbytes = vfsub_read_k(src, buf, sz, &src->f_pos); -+ err = rbytes; -+ } -+ if (unlikely(err < 0)) -+ break; -+ -+ all_zero = 0; -+ if (len >= rbytes && rbytes == blksize) -+ all_zero = !memcmp(buf, zp, rbytes); -+ if (!all_zero) { -+ wbytes = rbytes; -+ p = buf; -+ while (wbytes) { -+ size_t b; -+ -+ b = vfsub_write_k(dst, p, wbytes, &dst->f_pos); -+ err = b; -+ /* todo: signal_pending? */ -+ if (unlikely(err == -EAGAIN || err == -EINTR)) -+ continue; -+ if (unlikely(err < 0)) -+ break; -+ wbytes -= b; -+ p += b; -+ } -+ if (unlikely(err < 0)) -+ break; -+ } else { -+ loff_t res; -+ -+ AuLabel(hole); -+ res = vfsub_llseek(dst, rbytes, SEEK_CUR); -+ err = res; -+ if (unlikely(res < 0)) -+ break; -+ } -+ len -= rbytes; -+ err = 0; -+ } -+ -+ /* the last block may be a hole */ -+ if (!err && all_zero) { -+ AuLabel(last hole); -+ -+ err = 1; -+ if (au_test_nfs(dst->f_path.dentry->d_sb)) { -+ /* nfs requires this step to make last hole */ -+ /* is this only nfs? */ -+ do { -+ /* todo: signal_pending? */ -+ err = vfsub_write_k(dst, "\0", 1, &dst->f_pos); -+ } while (err == -EAGAIN || err == -EINTR); -+ if (err == 1) -+ dst->f_pos--; -+ } -+ -+ if (err == 1) { -+ ia = (void *)buf; -+ ia->ia_size = dst->f_pos; -+ ia->ia_valid = ATTR_SIZE | ATTR_FILE; -+ ia->ia_file = dst; -+ h_inode = file_inode(dst); -+ inode_lock_nested(h_inode, AuLsc_I_CHILD2); -+ /* no delegation since it is just created */ -+ err = vfsub_notify_change(&dst->f_path, ia, -+ /*delegated*/NULL); -+ inode_unlock(h_inode); -+ } -+ } -+ -+ return err; -+} -+ -+int au_copy_file(struct file *dst, struct file *src, loff_t len) -+{ -+ int err; -+ unsigned long blksize; -+ unsigned char do_kfree; -+ char *buf; -+ struct super_block *h_sb; -+ -+ err = -ENOMEM; -+ h_sb = file_inode(dst)->i_sb; -+ blksize = h_sb->s_blocksize; -+ if (!blksize || PAGE_SIZE < blksize) -+ blksize = PAGE_SIZE; -+ AuDbg("blksize %lu\n", blksize); -+ do_kfree = (blksize != PAGE_SIZE && blksize >= sizeof(struct iattr *)); -+ if (do_kfree) -+ buf = kmalloc(blksize, GFP_NOFS); -+ else -+ buf = (void *)__get_free_page(GFP_NOFS); -+ if (unlikely(!buf)) -+ goto out; -+ -+ if (len > (1 << 22)) -+ AuDbg("copying a large file %lld\n", (long long)len); -+ -+ src->f_pos = 0; -+ dst->f_pos = 0; -+ err = au_do_copy_file(dst, src, len, buf, blksize); -+ if (do_kfree) { -+ AuDebugOn(!au_kfree_do_sz_test(blksize)); -+ au_kfree_do_rcu(buf); -+ } else -+ free_page((unsigned long)buf); -+ -+out: -+ return err; -+} -+ -+static int au_do_copy(struct file *dst, struct file *src, loff_t len) -+{ -+ int err; -+ struct super_block *h_src_sb; -+ struct inode *h_src_inode; -+ -+ h_src_inode = file_inode(src); -+ h_src_sb = h_src_inode->i_sb; -+ -+ /* XFS acquires inode_lock */ -+ if (!au_test_xfs(h_src_sb)) -+ err = au_copy_file(dst, src, len); -+ else { -+ inode_unlock_shared(h_src_inode); -+ err = au_copy_file(dst, src, len); -+ inode_lock_shared_nested(h_src_inode, AuLsc_I_CHILD); -+ } -+ -+ return err; -+} -+ -+static int au_clone_or_copy(struct file *dst, struct file *src, loff_t len) -+{ -+ int err; -+ loff_t lo; -+ struct super_block *h_src_sb; -+ struct inode *h_src_inode; -+ -+ h_src_inode = file_inode(src); -+ h_src_sb = h_src_inode->i_sb; -+ if (h_src_sb != file_inode(dst)->i_sb -+ || !dst->f_op->remap_file_range) { -+ err = au_do_copy(dst, src, len); -+ goto out; -+ } -+ -+ if (!au_test_nfs(h_src_sb)) { -+ inode_unlock_shared(h_src_inode); -+ lo = vfsub_clone_file_range(src, dst, len); -+ inode_lock_shared_nested(h_src_inode, AuLsc_I_CHILD); -+ } else -+ lo = vfsub_clone_file_range(src, dst, len); -+ if (lo == len) { -+ err = 0; -+ goto out; /* success */ -+ } else if (lo >= 0) -+ /* todo: possible? */ -+ /* paritially succeeded */ -+ AuDbg("lo %lld, len %lld. Retrying.\n", lo, len); -+ else if (lo != -EOPNOTSUPP) { -+ /* older XFS has a condition in cloning */ -+ err = lo; -+ goto out; -+ } -+ -+ /* the backend fs on NFS may not support cloning */ -+ err = au_do_copy(dst, src, len); -+ -+out: -+ AuTraceErr(err); -+ return err; -+} -+ -+/* -+ * to support a sparse file which is opened with O_APPEND, -+ * we need to close the file. -+ */ -+static int au_cp_regular(struct au_cp_generic *cpg) -+{ -+ int err, i; -+ enum { SRC, DST }; -+ struct { -+ aufs_bindex_t bindex; -+ unsigned int flags; -+ struct dentry *dentry; -+ int force_wr; -+ struct file *file; -+ } *f, file[] = { -+ { -+ .bindex = cpg->bsrc, -+ .flags = O_RDONLY | O_NOATIME | O_LARGEFILE, -+ }, -+ { -+ .bindex = cpg->bdst, -+ .flags = O_WRONLY | O_NOATIME | O_LARGEFILE, -+ .force_wr = !!au_ftest_cpup(cpg->flags, RWDST), -+ } -+ }; -+ struct au_branch *br; -+ struct super_block *sb, *h_src_sb; -+ struct inode *h_src_inode; -+ struct task_struct *tsk = current; -+ -+ /* bsrc branch can be ro/rw. */ -+ sb = cpg->dentry->d_sb; -+ f = file; -+ for (i = 0; i < 2; i++, f++) { -+ f->dentry = au_h_dptr(cpg->dentry, f->bindex); -+ f->file = au_h_open(cpg->dentry, f->bindex, f->flags, -+ /*file*/NULL, f->force_wr); -+ if (IS_ERR(f->file)) { -+ err = PTR_ERR(f->file); -+ if (i == SRC) -+ goto out; -+ else -+ goto out_src; -+ } -+ } -+ -+ /* try stopping to update while we copyup */ -+ h_src_inode = d_inode(file[SRC].dentry); -+ h_src_sb = h_src_inode->i_sb; -+ if (!au_test_nfs(h_src_sb)) -+ IMustLock(h_src_inode); -+ err = au_clone_or_copy(file[DST].file, file[SRC].file, cpg->len); -+ -+ /* i wonder if we had O_NO_DELAY_FPUT flag */ -+ if (tsk->flags & PF_KTHREAD) -+ __fput_sync(file[DST].file); -+ else { -+ /* it happened actually */ -+ fput(file[DST].file); -+ /* -+ * too bad. -+ * we have to call both since we don't know which place the file -+ * was added to. -+ */ -+ task_work_run(); -+ flush_delayed_fput(); -+ } -+ br = au_sbr(sb, file[DST].bindex); -+ au_lcnt_dec(&br->br_nfiles); -+ -+out_src: -+ fput(file[SRC].file); -+ br = au_sbr(sb, file[SRC].bindex); -+ au_lcnt_dec(&br->br_nfiles); -+out: -+ return err; -+} -+ -+static int au_do_cpup_regular(struct au_cp_generic *cpg, -+ struct au_cpup_reg_attr *h_src_attr) -+{ -+ int err, rerr; -+ loff_t l; -+ struct path h_path; -+ struct inode *h_src_inode, *h_dst_inode; -+ -+ err = 0; -+ h_src_inode = au_h_iptr(d_inode(cpg->dentry), cpg->bsrc); -+ l = i_size_read(h_src_inode); -+ if (cpg->len == -1 || l < cpg->len) -+ cpg->len = l; -+ if (cpg->len) { -+ /* try stopping to update while we are referencing */ -+ inode_lock_shared_nested(h_src_inode, AuLsc_I_CHILD); -+ au_pin_hdir_unlock(cpg->pin); -+ -+ h_path.dentry = au_h_dptr(cpg->dentry, cpg->bsrc); -+ h_path.mnt = au_sbr_mnt(cpg->dentry->d_sb, cpg->bsrc); -+ h_src_attr->iflags = h_src_inode->i_flags; -+ if (!au_test_nfs(h_src_inode->i_sb)) -+ err = vfsub_getattr(&h_path, &h_src_attr->st); -+ else { -+ inode_unlock_shared(h_src_inode); -+ err = vfsub_getattr(&h_path, &h_src_attr->st); -+ inode_lock_shared_nested(h_src_inode, AuLsc_I_CHILD); -+ } -+ if (unlikely(err)) { -+ inode_unlock_shared(h_src_inode); -+ goto out; -+ } -+ h_src_attr->valid = 1; -+ if (!au_test_nfs(h_src_inode->i_sb)) { -+ err = au_cp_regular(cpg); -+ inode_unlock_shared(h_src_inode); -+ } else { -+ inode_unlock_shared(h_src_inode); -+ err = au_cp_regular(cpg); -+ } -+ rerr = au_pin_hdir_relock(cpg->pin); -+ if (!err && rerr) -+ err = rerr; -+ } -+ if (!err && (h_src_inode->i_state & I_LINKABLE)) { -+ h_path.dentry = au_h_dptr(cpg->dentry, cpg->bdst); -+ h_dst_inode = d_inode(h_path.dentry); -+ spin_lock(&h_dst_inode->i_lock); -+ h_dst_inode->i_state |= I_LINKABLE; -+ spin_unlock(&h_dst_inode->i_lock); -+ } -+ -+out: -+ return err; -+} -+ -+static int au_do_cpup_symlink(struct path *h_path, struct dentry *h_src, -+ struct inode *h_dir) -+{ -+ int err; -+ DEFINE_DELAYED_CALL(done); -+ const char *sym; -+ -+ sym = vfs_get_link(h_src, &done); -+ err = PTR_ERR(sym); -+ if (IS_ERR(sym)) -+ goto out; -+ -+ err = vfsub_symlink(h_dir, h_path, sym); -+ -+out: -+ do_delayed_call(&done); -+ return err; -+} -+ -+/* -+ * regardless 'acl' option, reset all ACL. -+ * All ACL will be copied up later from the original entry on the lower branch. -+ */ -+static int au_reset_acl(struct inode *h_dir, struct path *h_path, umode_t mode) -+{ -+ int err; -+ struct dentry *h_dentry; -+ struct inode *h_inode; -+ -+ h_dentry = h_path->dentry; -+ h_inode = d_inode(h_dentry); -+ /* forget_all_cached_acls(h_inode)); */ -+ err = vfsub_removexattr(h_dentry, XATTR_NAME_POSIX_ACL_ACCESS); -+ AuTraceErr(err); -+ if (err == -EOPNOTSUPP) -+ err = 0; -+ if (!err) -+ err = vfsub_acl_chmod(h_inode, mode); -+ -+ AuTraceErr(err); -+ return err; -+} -+ -+static int au_do_cpup_dir(struct au_cp_generic *cpg, struct dentry *dst_parent, -+ struct inode *h_dir, struct path *h_path) -+{ -+ int err; -+ struct inode *dir, *inode; -+ -+ err = vfsub_removexattr(h_path->dentry, XATTR_NAME_POSIX_ACL_DEFAULT); -+ AuTraceErr(err); -+ if (err == -EOPNOTSUPP) -+ err = 0; -+ if (unlikely(err)) -+ goto out; -+ -+ /* -+ * strange behaviour from the users view, -+ * particularly setattr case -+ */ -+ dir = d_inode(dst_parent); -+ if (au_ibtop(dir) == cpg->bdst) -+ au_cpup_attr_nlink(dir, /*force*/1); -+ inode = d_inode(cpg->dentry); -+ au_cpup_attr_nlink(inode, /*force*/1); -+ -+out: -+ return err; -+} -+ -+static noinline_for_stack -+int cpup_entry(struct au_cp_generic *cpg, struct dentry *dst_parent, -+ struct au_cpup_reg_attr *h_src_attr) -+{ -+ int err; -+ umode_t mode; -+ unsigned int mnt_flags; -+ unsigned char isdir, isreg, force; -+ const unsigned char do_dt = !!au_ftest_cpup(cpg->flags, DTIME); -+ struct au_dtime dt; -+ struct path h_path; -+ struct dentry *h_src, *h_dst, *h_parent; -+ struct inode *h_inode, *h_dir; -+ struct super_block *sb; -+ -+ /* bsrc branch can be ro/rw. */ -+ h_src = au_h_dptr(cpg->dentry, cpg->bsrc); -+ h_inode = d_inode(h_src); -+ AuDebugOn(h_inode != au_h_iptr(d_inode(cpg->dentry), cpg->bsrc)); -+ -+ /* try stopping to be referenced while we are creating */ -+ h_dst = au_h_dptr(cpg->dentry, cpg->bdst); -+ if (au_ftest_cpup(cpg->flags, RENAME)) -+ AuDebugOn(strncmp(h_dst->d_name.name, AUFS_WH_PFX, -+ AUFS_WH_PFX_LEN)); -+ h_parent = h_dst->d_parent; /* dir inode is locked */ -+ h_dir = d_inode(h_parent); -+ IMustLock(h_dir); -+ AuDebugOn(h_parent != h_dst->d_parent); -+ -+ sb = cpg->dentry->d_sb; -+ h_path.mnt = au_sbr_mnt(sb, cpg->bdst); -+ if (do_dt) { -+ h_path.dentry = h_parent; -+ au_dtime_store(&dt, dst_parent, &h_path); -+ } -+ h_path.dentry = h_dst; -+ -+ isreg = 0; -+ isdir = 0; -+ mode = h_inode->i_mode; -+ switch (mode & S_IFMT) { -+ case S_IFREG: -+ isreg = 1; -+ err = vfsub_create(h_dir, &h_path, 0600, /*want_excl*/true); -+ if (!err) -+ err = au_do_cpup_regular(cpg, h_src_attr); -+ break; -+ case S_IFDIR: -+ isdir = 1; -+ err = vfsub_mkdir(h_dir, &h_path, mode); -+ if (!err) -+ err = au_do_cpup_dir(cpg, dst_parent, h_dir, &h_path); -+ break; -+ case S_IFLNK: -+ err = au_do_cpup_symlink(&h_path, h_src, h_dir); -+ break; -+ case S_IFCHR: -+ case S_IFBLK: -+ AuDebugOn(!capable(CAP_MKNOD)); -+ fallthrough; -+ case S_IFIFO: -+ case S_IFSOCK: -+ err = vfsub_mknod(h_dir, &h_path, mode, h_inode->i_rdev); -+ break; -+ default: -+ AuIOErr("Unknown inode type 0%o\n", mode); -+ err = -EIO; -+ } -+ if (!err) -+ err = au_reset_acl(h_dir, &h_path, mode); -+ -+ mnt_flags = au_mntflags(sb); -+ if (!au_opt_test(mnt_flags, UDBA_NONE) -+ && !isdir -+ && au_opt_test(mnt_flags, XINO) -+ && (h_inode->i_nlink == 1 -+ || (h_inode->i_state & I_LINKABLE)) -+ /* todo: unnecessary? */ -+ /* && d_inode(cpg->dentry)->i_nlink == 1 */ -+ && cpg->bdst < cpg->bsrc -+ && !au_ftest_cpup(cpg->flags, KEEPLINO)) -+ au_xino_write(sb, cpg->bsrc, h_inode->i_ino, /*ino*/0); -+ /* ignore this error */ -+ -+ if (!err) { -+ force = 0; -+ if (isreg) { -+ force = !!cpg->len; -+ if (cpg->len == -1) -+ force = !!i_size_read(h_inode); -+ } -+ au_fhsm_wrote(sb, cpg->bdst, force); -+ } -+ -+ if (do_dt) -+ au_dtime_revert(&dt); -+ return err; -+} -+ -+static int au_do_ren_after_cpup(struct au_cp_generic *cpg, struct path *h_path) -+{ -+ int err; -+ struct dentry *dentry, *h_dentry, *h_parent, *parent; -+ struct inode *h_dir; -+ aufs_bindex_t bdst; -+ -+ dentry = cpg->dentry; -+ bdst = cpg->bdst; -+ h_dentry = au_h_dptr(dentry, bdst); -+ if (!au_ftest_cpup(cpg->flags, OVERWRITE)) { -+ dget(h_dentry); -+ au_set_h_dptr(dentry, bdst, NULL); -+ err = au_lkup_neg(dentry, bdst, /*wh*/0); -+ if (!err) -+ h_path->dentry = dget(au_h_dptr(dentry, bdst)); -+ au_set_h_dptr(dentry, bdst, h_dentry); -+ } else { -+ err = 0; -+ parent = dget_parent(dentry); -+ h_parent = au_h_dptr(parent, bdst); -+ dput(parent); -+ h_path->dentry = vfsub_lkup_one(&dentry->d_name, h_parent); -+ if (IS_ERR(h_path->dentry)) -+ err = PTR_ERR(h_path->dentry); -+ } -+ if (unlikely(err)) -+ goto out; -+ -+ h_parent = h_dentry->d_parent; /* dir inode is locked */ -+ h_dir = d_inode(h_parent); -+ IMustLock(h_dir); -+ AuDbg("%pd %pd\n", h_dentry, h_path->dentry); -+ /* no delegation since it is just created */ -+ err = vfsub_rename(h_dir, h_dentry, h_dir, h_path, /*delegated*/NULL, -+ /*flags*/0); -+ dput(h_path->dentry); -+ -+out: -+ return err; -+} -+ -+/* -+ * copyup the @dentry from @bsrc to @bdst. -+ * the caller must set the both of lower dentries. -+ * @len is for truncating when it is -1 copyup the entire file. -+ * in link/rename cases, @dst_parent may be different from the real one. -+ * basic->bsrc can be larger than basic->bdst. -+ * aufs doesn't touch the credential so -+ * security_inode_copy_up{,_xattr}() are unnecessary. -+ */ -+static int au_cpup_single(struct au_cp_generic *cpg, struct dentry *dst_parent) -+{ -+ int err, rerr; -+ aufs_bindex_t old_ibtop; -+ unsigned char isdir, plink; -+ struct dentry *h_src, *h_dst, *h_parent; -+ struct inode *dst_inode, *h_dir, *inode, *delegated, *src_inode; -+ struct super_block *sb; -+ struct au_branch *br; -+ /* to reduce stack size */ -+ struct { -+ struct au_dtime dt; -+ struct path h_path; -+ struct au_cpup_reg_attr h_src_attr; -+ } *a; -+ -+ err = -ENOMEM; -+ a = kmalloc(sizeof(*a), GFP_NOFS); -+ if (unlikely(!a)) -+ goto out; -+ a->h_src_attr.valid = 0; -+ -+ sb = cpg->dentry->d_sb; -+ br = au_sbr(sb, cpg->bdst); -+ a->h_path.mnt = au_br_mnt(br); -+ h_dst = au_h_dptr(cpg->dentry, cpg->bdst); -+ h_parent = h_dst->d_parent; /* dir inode is locked */ -+ h_dir = d_inode(h_parent); -+ IMustLock(h_dir); -+ -+ h_src = au_h_dptr(cpg->dentry, cpg->bsrc); -+ inode = d_inode(cpg->dentry); -+ -+ if (!dst_parent) -+ dst_parent = dget_parent(cpg->dentry); -+ else -+ dget(dst_parent); -+ -+ plink = !!au_opt_test(au_mntflags(sb), PLINK); -+ dst_inode = au_h_iptr(inode, cpg->bdst); -+ if (dst_inode) { -+ if (unlikely(!plink)) { -+ err = -EIO; -+ AuIOErr("hi%lu(i%lu) exists on b%d " -+ "but plink is disabled\n", -+ dst_inode->i_ino, inode->i_ino, cpg->bdst); -+ goto out_parent; -+ } -+ -+ if (dst_inode->i_nlink) { -+ const int do_dt = au_ftest_cpup(cpg->flags, DTIME); -+ -+ h_src = au_plink_lkup(inode, cpg->bdst); -+ err = PTR_ERR(h_src); -+ if (IS_ERR(h_src)) -+ goto out_parent; -+ if (unlikely(d_is_negative(h_src))) { -+ err = -EIO; -+ AuIOErr("i%lu exists on b%d " -+ "but not pseudo-linked\n", -+ inode->i_ino, cpg->bdst); -+ dput(h_src); -+ goto out_parent; -+ } -+ -+ if (do_dt) { -+ a->h_path.dentry = h_parent; -+ au_dtime_store(&a->dt, dst_parent, &a->h_path); -+ } -+ -+ a->h_path.dentry = h_dst; -+ delegated = NULL; -+ err = vfsub_link(h_src, h_dir, &a->h_path, &delegated); -+ if (!err && au_ftest_cpup(cpg->flags, RENAME)) -+ err = au_do_ren_after_cpup(cpg, &a->h_path); -+ if (do_dt) -+ au_dtime_revert(&a->dt); -+ if (unlikely(err == -EWOULDBLOCK)) { -+ pr_warn("cannot retry for NFSv4 delegation" -+ " for an internal link\n"); -+ iput(delegated); -+ } -+ dput(h_src); -+ goto out_parent; -+ } else -+ /* todo: cpup_wh_file? */ -+ /* udba work */ -+ au_update_ibrange(inode, /*do_put_zero*/1); -+ } -+ -+ isdir = S_ISDIR(inode->i_mode); -+ old_ibtop = au_ibtop(inode); -+ err = cpup_entry(cpg, dst_parent, &a->h_src_attr); -+ if (unlikely(err)) -+ goto out_rev; -+ dst_inode = d_inode(h_dst); -+ inode_lock_nested(dst_inode, AuLsc_I_CHILD2); -+ /* todo: necessary? */ -+ /* au_pin_hdir_unlock(cpg->pin); */ -+ -+ err = cpup_iattr(cpg->dentry, cpg->bdst, h_src, &a->h_src_attr); -+ if (unlikely(err)) { -+ /* todo: necessary? */ -+ /* au_pin_hdir_relock(cpg->pin); */ /* ignore an error */ -+ inode_unlock(dst_inode); -+ goto out_rev; -+ } -+ -+ if (cpg->bdst < old_ibtop) { -+ if (S_ISREG(inode->i_mode)) { -+ err = au_dy_iaop(inode, cpg->bdst, dst_inode); -+ if (unlikely(err)) { -+ /* ignore an error */ -+ /* au_pin_hdir_relock(cpg->pin); */ -+ inode_unlock(dst_inode); -+ goto out_rev; -+ } -+ } -+ au_set_ibtop(inode, cpg->bdst); -+ } else -+ au_set_ibbot(inode, cpg->bdst); -+ au_set_h_iptr(inode, cpg->bdst, au_igrab(dst_inode), -+ au_hi_flags(inode, isdir)); -+ -+ /* todo: necessary? */ -+ /* err = au_pin_hdir_relock(cpg->pin); */ -+ inode_unlock(dst_inode); -+ if (unlikely(err)) -+ goto out_rev; -+ -+ src_inode = d_inode(h_src); -+ if (!isdir -+ && (src_inode->i_nlink > 1 -+ || src_inode->i_state & I_LINKABLE) -+ && plink) -+ au_plink_append(inode, cpg->bdst, h_dst); -+ -+ if (au_ftest_cpup(cpg->flags, RENAME)) { -+ a->h_path.dentry = h_dst; -+ err = au_do_ren_after_cpup(cpg, &a->h_path); -+ } -+ if (!err) -+ goto out_parent; /* success */ -+ -+ /* revert */ -+out_rev: -+ a->h_path.dentry = h_parent; -+ au_dtime_store(&a->dt, dst_parent, &a->h_path); -+ a->h_path.dentry = h_dst; -+ rerr = 0; -+ if (d_is_positive(h_dst)) { -+ if (!isdir) { -+ /* no delegation since it is just created */ -+ rerr = vfsub_unlink(h_dir, &a->h_path, -+ /*delegated*/NULL, /*force*/0); -+ } else -+ rerr = vfsub_rmdir(h_dir, &a->h_path); -+ } -+ au_dtime_revert(&a->dt); -+ if (rerr) { -+ AuIOErr("failed removing broken entry(%d, %d)\n", err, rerr); -+ err = -EIO; -+ } -+out_parent: -+ dput(dst_parent); -+ au_kfree_rcu(a); -+out: -+ return err; -+} -+ -+#if 0 /* reserved */ -+struct au_cpup_single_args { -+ int *errp; -+ struct au_cp_generic *cpg; -+ struct dentry *dst_parent; -+}; -+ -+static void au_call_cpup_single(void *args) -+{ -+ struct au_cpup_single_args *a = args; -+ -+ au_pin_hdir_acquire_nest(a->cpg->pin); -+ *a->errp = au_cpup_single(a->cpg, a->dst_parent); -+ au_pin_hdir_release(a->cpg->pin); -+} -+#endif -+ -+/* -+ * prevent SIGXFSZ in copy-up. -+ * testing CAP_MKNOD is for generic fs, -+ * but CAP_FSETID is for xfs only, currently. -+ */ -+static int au_cpup_sio_test(struct au_pin *pin, umode_t mode) -+{ -+ int do_sio; -+ struct super_block *sb; -+ struct inode *h_dir; -+ -+ do_sio = 0; -+ sb = au_pinned_parent(pin)->d_sb; -+ if (!au_wkq_test() -+ && (!au_sbi(sb)->si_plink_maint_pid -+ || au_plink_maint(sb, AuLock_NOPLM))) { -+ switch (mode & S_IFMT) { -+ case S_IFREG: -+ /* no condition about RLIMIT_FSIZE and the file size */ -+ do_sio = 1; -+ break; -+ case S_IFCHR: -+ case S_IFBLK: -+ do_sio = !capable(CAP_MKNOD); -+ break; -+ } -+ if (!do_sio) -+ do_sio = ((mode & (S_ISUID | S_ISGID)) -+ && !capable(CAP_FSETID)); -+ /* this workaround may be removed in the future */ -+ if (!do_sio) { -+ h_dir = au_pinned_h_dir(pin); -+ do_sio = h_dir->i_mode & S_ISVTX; -+ } -+ } -+ -+ return do_sio; -+} -+ -+#if 0 /* reserved */ -+int au_sio_cpup_single(struct au_cp_generic *cpg, struct dentry *dst_parent) -+{ -+ int err, wkq_err; -+ struct dentry *h_dentry; -+ -+ h_dentry = au_h_dptr(cpg->dentry, cpg->bsrc); -+ if (!au_cpup_sio_test(pin, d_inode(h_dentry)->i_mode)) -+ err = au_cpup_single(cpg, dst_parent); -+ else { -+ struct au_cpup_single_args args = { -+ .errp = &err, -+ .cpg = cpg, -+ .dst_parent = dst_parent -+ }; -+ wkq_err = au_wkq_wait(au_call_cpup_single, &args); -+ if (unlikely(wkq_err)) -+ err = wkq_err; -+ } -+ -+ return err; -+} -+#endif -+ -+/* -+ * copyup the @dentry from the first active lower branch to @bdst, -+ * using au_cpup_single(). -+ */ -+static int au_cpup_simple(struct au_cp_generic *cpg) -+{ -+ int err; -+ unsigned int flags_orig; -+ struct dentry *dentry; -+ -+ AuDebugOn(cpg->bsrc < 0); -+ -+ dentry = cpg->dentry; -+ DiMustWriteLock(dentry); -+ -+ err = au_lkup_neg(dentry, cpg->bdst, /*wh*/1); -+ if (!err) { -+ flags_orig = cpg->flags; -+ au_fset_cpup(cpg->flags, RENAME); -+ err = au_cpup_single(cpg, NULL); -+ cpg->flags = flags_orig; -+ if (!err) -+ return 0; /* success */ -+ -+ /* revert */ -+ au_set_h_dptr(dentry, cpg->bdst, NULL); -+ au_set_dbtop(dentry, cpg->bsrc); -+ } -+ -+ return err; -+} -+ -+struct au_cpup_simple_args { -+ int *errp; -+ struct au_cp_generic *cpg; -+}; -+ -+static void au_call_cpup_simple(void *args) -+{ -+ struct au_cpup_simple_args *a = args; -+ -+ au_pin_hdir_acquire_nest(a->cpg->pin); -+ *a->errp = au_cpup_simple(a->cpg); -+ au_pin_hdir_release(a->cpg->pin); -+} -+ -+static int au_do_sio_cpup_simple(struct au_cp_generic *cpg) -+{ -+ int err, wkq_err; -+ struct dentry *dentry, *parent; -+ struct file *h_file; -+ struct inode *h_dir; -+ -+ dentry = cpg->dentry; -+ h_file = NULL; -+ if (au_ftest_cpup(cpg->flags, HOPEN)) { -+ AuDebugOn(cpg->bsrc < 0); -+ h_file = au_h_open_pre(dentry, cpg->bsrc, /*force_wr*/0); -+ err = PTR_ERR(h_file); -+ if (IS_ERR(h_file)) -+ goto out; -+ } -+ -+ parent = dget_parent(dentry); -+ h_dir = au_h_iptr(d_inode(parent), cpg->bdst); -+ if (!au_test_h_perm_sio(h_dir, MAY_EXEC | MAY_WRITE) -+ && !au_cpup_sio_test(cpg->pin, d_inode(dentry)->i_mode)) -+ err = au_cpup_simple(cpg); -+ else { -+ struct au_cpup_simple_args args = { -+ .errp = &err, -+ .cpg = cpg -+ }; -+ wkq_err = au_wkq_wait(au_call_cpup_simple, &args); -+ if (unlikely(wkq_err)) -+ err = wkq_err; -+ } -+ -+ dput(parent); -+ if (h_file) -+ au_h_open_post(dentry, cpg->bsrc, h_file); -+ -+out: -+ return err; -+} -+ -+int au_sio_cpup_simple(struct au_cp_generic *cpg) -+{ -+ aufs_bindex_t bsrc, bbot; -+ struct dentry *dentry, *h_dentry; -+ -+ if (cpg->bsrc < 0) { -+ dentry = cpg->dentry; -+ bbot = au_dbbot(dentry); -+ for (bsrc = cpg->bdst + 1; bsrc <= bbot; bsrc++) { -+ h_dentry = au_h_dptr(dentry, bsrc); -+ if (h_dentry) { -+ AuDebugOn(d_is_negative(h_dentry)); -+ break; -+ } -+ } -+ AuDebugOn(bsrc > bbot); -+ cpg->bsrc = bsrc; -+ } -+ AuDebugOn(cpg->bsrc <= cpg->bdst); -+ return au_do_sio_cpup_simple(cpg); -+} -+ -+int au_sio_cpdown_simple(struct au_cp_generic *cpg) -+{ -+ AuDebugOn(cpg->bdst <= cpg->bsrc); -+ return au_do_sio_cpup_simple(cpg); -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* -+ * copyup the deleted file for writing. -+ */ -+static int au_do_cpup_wh(struct au_cp_generic *cpg, struct dentry *wh_dentry, -+ struct file *file) -+{ -+ int err; -+ unsigned int flags_orig; -+ aufs_bindex_t bsrc_orig; -+ struct au_dinfo *dinfo; -+ struct { -+ struct au_hdentry *hd; -+ struct dentry *h_dentry; -+ } hdst, hsrc; -+ -+ dinfo = au_di(cpg->dentry); -+ AuRwMustWriteLock(&dinfo->di_rwsem); -+ -+ bsrc_orig = cpg->bsrc; -+ cpg->bsrc = dinfo->di_btop; -+ hdst.hd = au_hdentry(dinfo, cpg->bdst); -+ hdst.h_dentry = hdst.hd->hd_dentry; -+ hdst.hd->hd_dentry = wh_dentry; -+ dinfo->di_btop = cpg->bdst; -+ -+ hsrc.h_dentry = NULL; -+ if (file) { -+ hsrc.hd = au_hdentry(dinfo, cpg->bsrc); -+ hsrc.h_dentry = hsrc.hd->hd_dentry; -+ hsrc.hd->hd_dentry = au_hf_top(file)->f_path.dentry; -+ } -+ flags_orig = cpg->flags; -+ cpg->flags = !AuCpup_DTIME; -+ err = au_cpup_single(cpg, /*h_parent*/NULL); -+ cpg->flags = flags_orig; -+ if (file) { -+ if (!err) -+ err = au_reopen_nondir(file); -+ hsrc.hd->hd_dentry = hsrc.h_dentry; -+ } -+ hdst.hd->hd_dentry = hdst.h_dentry; -+ dinfo->di_btop = cpg->bsrc; -+ cpg->bsrc = bsrc_orig; -+ -+ return err; -+} -+ -+static int au_cpup_wh(struct au_cp_generic *cpg, struct file *file) -+{ -+ int err; -+ aufs_bindex_t bdst; -+ struct au_dtime dt; -+ struct dentry *dentry, *parent, *h_parent, *wh_dentry; -+ struct au_branch *br; -+ struct path h_path; -+ -+ dentry = cpg->dentry; -+ bdst = cpg->bdst; -+ br = au_sbr(dentry->d_sb, bdst); -+ parent = dget_parent(dentry); -+ h_parent = au_h_dptr(parent, bdst); -+ wh_dentry = au_whtmp_lkup(h_parent, br, &dentry->d_name); -+ err = PTR_ERR(wh_dentry); -+ if (IS_ERR(wh_dentry)) -+ goto out; -+ -+ h_path.dentry = h_parent; -+ h_path.mnt = au_br_mnt(br); -+ au_dtime_store(&dt, parent, &h_path); -+ err = au_do_cpup_wh(cpg, wh_dentry, file); -+ if (unlikely(err)) -+ goto out_wh; -+ -+ dget(wh_dentry); -+ h_path.dentry = wh_dentry; -+ if (!d_is_dir(wh_dentry)) { -+ /* no delegation since it is just created */ -+ err = vfsub_unlink(d_inode(h_parent), &h_path, -+ /*delegated*/NULL, /*force*/0); -+ } else -+ err = vfsub_rmdir(d_inode(h_parent), &h_path); -+ if (unlikely(err)) { -+ AuIOErr("failed remove copied-up tmp file %pd(%d)\n", -+ wh_dentry, err); -+ err = -EIO; -+ } -+ au_dtime_revert(&dt); -+ au_set_hi_wh(d_inode(dentry), bdst, wh_dentry); -+ -+out_wh: -+ dput(wh_dentry); -+out: -+ dput(parent); -+ return err; -+} -+ -+struct au_cpup_wh_args { -+ int *errp; -+ struct au_cp_generic *cpg; -+ struct file *file; -+}; -+ -+static void au_call_cpup_wh(void *args) -+{ -+ struct au_cpup_wh_args *a = args; -+ -+ au_pin_hdir_acquire_nest(a->cpg->pin); -+ *a->errp = au_cpup_wh(a->cpg, a->file); -+ au_pin_hdir_release(a->cpg->pin); -+} -+ -+int au_sio_cpup_wh(struct au_cp_generic *cpg, struct file *file) -+{ -+ int err, wkq_err; -+ aufs_bindex_t bdst; -+ struct dentry *dentry, *parent, *h_orph, *h_parent; -+ struct inode *dir, *h_dir, *h_tmpdir; -+ struct au_wbr *wbr; -+ struct au_pin wh_pin, *pin_orig; -+ -+ dentry = cpg->dentry; -+ bdst = cpg->bdst; -+ parent = dget_parent(dentry); -+ dir = d_inode(parent); -+ h_orph = NULL; -+ h_parent = NULL; -+ h_dir = au_igrab(au_h_iptr(dir, bdst)); -+ h_tmpdir = h_dir; -+ pin_orig = NULL; -+ if (!h_dir->i_nlink) { -+ wbr = au_sbr(dentry->d_sb, bdst)->br_wbr; -+ h_orph = wbr->wbr_orph; -+ -+ h_parent = dget(au_h_dptr(parent, bdst)); -+ au_set_h_dptr(parent, bdst, dget(h_orph)); -+ h_tmpdir = d_inode(h_orph); -+ au_set_h_iptr(dir, bdst, au_igrab(h_tmpdir), /*flags*/0); -+ -+ inode_lock_nested(h_tmpdir, AuLsc_I_PARENT3); -+ /* todo: au_h_open_pre()? */ -+ -+ pin_orig = cpg->pin; -+ au_pin_init(&wh_pin, dentry, bdst, AuLsc_DI_PARENT, -+ AuLsc_I_PARENT3, cpg->pin->udba, AuPin_DI_LOCKED); -+ cpg->pin = &wh_pin; -+ } -+ -+ if (!au_test_h_perm_sio(h_tmpdir, MAY_EXEC | MAY_WRITE) -+ && !au_cpup_sio_test(cpg->pin, d_inode(dentry)->i_mode)) -+ err = au_cpup_wh(cpg, file); -+ else { -+ struct au_cpup_wh_args args = { -+ .errp = &err, -+ .cpg = cpg, -+ .file = file -+ }; -+ wkq_err = au_wkq_wait(au_call_cpup_wh, &args); -+ if (unlikely(wkq_err)) -+ err = wkq_err; -+ } -+ -+ if (h_orph) { -+ inode_unlock(h_tmpdir); -+ /* todo: au_h_open_post()? */ -+ au_set_h_iptr(dir, bdst, au_igrab(h_dir), /*flags*/0); -+ au_set_h_dptr(parent, bdst, h_parent); -+ AuDebugOn(!pin_orig); -+ cpg->pin = pin_orig; -+ } -+ iput(h_dir); -+ dput(parent); -+ -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* -+ * generic routine for both of copy-up and copy-down. -+ */ -+/* cf. revalidate function in file.c */ -+int au_cp_dirs(struct dentry *dentry, aufs_bindex_t bdst, -+ int (*cp)(struct dentry *dentry, aufs_bindex_t bdst, -+ struct au_pin *pin, -+ struct dentry *h_parent, void *arg), -+ void *arg) -+{ -+ int err; -+ struct au_pin pin; -+ struct dentry *d, *parent, *h_parent, *real_parent, *h_dentry; -+ -+ err = 0; -+ parent = dget_parent(dentry); -+ if (IS_ROOT(parent)) -+ goto out; -+ -+ au_pin_init(&pin, dentry, bdst, AuLsc_DI_PARENT2, AuLsc_I_PARENT2, -+ au_opt_udba(dentry->d_sb), AuPin_MNT_WRITE); -+ -+ /* do not use au_dpage */ -+ real_parent = parent; -+ while (1) { -+ dput(parent); -+ parent = dget_parent(dentry); -+ h_parent = au_h_dptr(parent, bdst); -+ if (h_parent) -+ goto out; /* success */ -+ -+ /* find top dir which is necessary to cpup */ -+ do { -+ d = parent; -+ dput(parent); -+ parent = dget_parent(d); -+ di_read_lock_parent3(parent, !AuLock_IR); -+ h_parent = au_h_dptr(parent, bdst); -+ di_read_unlock(parent, !AuLock_IR); -+ } while (!h_parent); -+ -+ if (d != real_parent) -+ di_write_lock_child3(d); -+ -+ /* somebody else might create while we were sleeping */ -+ h_dentry = au_h_dptr(d, bdst); -+ if (!h_dentry || d_is_negative(h_dentry)) { -+ if (h_dentry) -+ au_update_dbtop(d); -+ -+ au_pin_set_dentry(&pin, d); -+ err = au_do_pin(&pin); -+ if (!err) { -+ err = cp(d, bdst, &pin, h_parent, arg); -+ au_unpin(&pin); -+ } -+ } -+ -+ if (d != real_parent) -+ di_write_unlock(d); -+ if (unlikely(err)) -+ break; -+ } -+ -+out: -+ dput(parent); -+ return err; -+} -+ -+static int au_cpup_dir(struct dentry *dentry, aufs_bindex_t bdst, -+ struct au_pin *pin, -+ struct dentry *h_parent __maybe_unused, -+ void *arg __maybe_unused) -+{ -+ struct au_cp_generic cpg = { -+ .dentry = dentry, -+ .bdst = bdst, -+ .bsrc = -1, -+ .len = 0, -+ .pin = pin, -+ .flags = AuCpup_DTIME -+ }; -+ return au_sio_cpup_simple(&cpg); -+} -+ -+int au_cpup_dirs(struct dentry *dentry, aufs_bindex_t bdst) -+{ -+ return au_cp_dirs(dentry, bdst, au_cpup_dir, NULL); -+} -+ -+int au_test_and_cpup_dirs(struct dentry *dentry, aufs_bindex_t bdst) -+{ -+ int err; -+ struct dentry *parent; -+ struct inode *dir; -+ -+ parent = dget_parent(dentry); -+ dir = d_inode(parent); -+ err = 0; -+ if (au_h_iptr(dir, bdst)) -+ goto out; -+ -+ di_read_unlock(parent, AuLock_IR); -+ di_write_lock_parent(parent); -+ /* someone else might change our inode while we were sleeping */ -+ if (!au_h_iptr(dir, bdst)) -+ err = au_cpup_dirs(dentry, bdst); -+ di_downgrade_lock(parent, AuLock_IR); -+ -+out: -+ dput(parent); -+ return err; -+} -diff --git a/fs/aufs/cpup.h b/fs/aufs/cpup.h -new file mode 100644 -index 000000000000..c23c1bbcee7e ---- /dev/null -+++ b/fs/aufs/cpup.h -@@ -0,0 +1,87 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * copy-up/down functions -+ */ -+ -+#ifndef __AUFS_CPUP_H__ -+#define __AUFS_CPUP_H__ -+ -+#ifdef __KERNEL__ -+ -+#include -+ -+struct inode; -+struct file; -+struct au_pin; -+ -+void au_cpup_attr_flags(struct inode *dst, unsigned int iflags); -+void au_cpup_attr_timesizes(struct inode *inode); -+void au_cpup_attr_nlink(struct inode *inode, int force); -+void au_cpup_attr_changeable(struct inode *inode); -+void au_cpup_igen(struct inode *inode, struct inode *h_inode); -+void au_cpup_attr_all(struct inode *inode, int force); -+ -+/* ---------------------------------------------------------------------- */ -+ -+struct au_cp_generic { -+ struct dentry *dentry; -+ aufs_bindex_t bdst, bsrc; -+ loff_t len; -+ struct au_pin *pin; -+ unsigned int flags; -+}; -+ -+/* cpup flags */ -+#define AuCpup_DTIME 1 /* do dtime_store/revert */ -+#define AuCpup_KEEPLINO (1 << 1) /* do not clear the lower xino, -+ for link(2) */ -+#define AuCpup_RENAME (1 << 2) /* rename after cpup */ -+#define AuCpup_HOPEN (1 << 3) /* call h_open_pre/post() in -+ cpup */ -+#define AuCpup_OVERWRITE (1 << 4) /* allow overwriting the -+ existing entry */ -+#define AuCpup_RWDST (1 << 5) /* force write target even if -+ the branch is marked as RO */ -+ -+#ifndef CONFIG_AUFS_BR_HFSPLUS -+#undef AuCpup_HOPEN -+#define AuCpup_HOPEN 0 -+#endif -+ -+#define au_ftest_cpup(flags, name) ((flags) & AuCpup_##name) -+#define au_fset_cpup(flags, name) \ -+ do { (flags) |= AuCpup_##name; } while (0) -+#define au_fclr_cpup(flags, name) \ -+ do { (flags) &= ~AuCpup_##name; } while (0) -+ -+int au_copy_file(struct file *dst, struct file *src, loff_t len); -+int au_sio_cpup_simple(struct au_cp_generic *cpg); -+int au_sio_cpdown_simple(struct au_cp_generic *cpg); -+int au_sio_cpup_wh(struct au_cp_generic *cpg, struct file *file); -+ -+int au_cp_dirs(struct dentry *dentry, aufs_bindex_t bdst, -+ int (*cp)(struct dentry *dentry, aufs_bindex_t bdst, -+ struct au_pin *pin, -+ struct dentry *h_parent, void *arg), -+ void *arg); -+int au_cpup_dirs(struct dentry *dentry, aufs_bindex_t bdst); -+int au_test_and_cpup_dirs(struct dentry *dentry, aufs_bindex_t bdst); -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* keep timestamps when copyup */ -+struct au_dtime { -+ struct dentry *dt_dentry; -+ struct path dt_h_path; -+ struct timespec64 dt_atime, dt_mtime; -+}; -+void au_dtime_store(struct au_dtime *dt, struct dentry *dentry, -+ struct path *h_path); -+void au_dtime_revert(struct au_dtime *dt); -+ -+#endif /* __KERNEL__ */ -+#endif /* __AUFS_CPUP_H__ */ -diff --git a/fs/aufs/dbgaufs.c b/fs/aufs/dbgaufs.c -new file mode 100644 -index 000000000000..63f40a324f1b ---- /dev/null -+++ b/fs/aufs/dbgaufs.c -@@ -0,0 +1,513 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * debugfs interface -+ */ -+ -+#include -+#include "aufs.h" -+ -+#ifndef CONFIG_SYSFS -+#error DEBUG_FS depends upon SYSFS -+#endif -+ -+static struct dentry *dbgaufs; -+static const mode_t dbgaufs_mode = 0444; -+ -+/* 20 is max digits length of ulong 64 */ -+struct dbgaufs_arg { -+ int n; -+ char a[20 * 4]; -+}; -+ -+/* -+ * common function for all XINO files -+ */ -+static int dbgaufs_xi_release(struct inode *inode __maybe_unused, -+ struct file *file) -+{ -+ void *p; -+ -+ p = file->private_data; -+ if (p) { -+ /* this is struct dbgaufs_arg */ -+ AuDebugOn(!au_kfree_sz_test(p)); -+ au_kfree_do_rcu(p); -+ } -+ return 0; -+} -+ -+static int dbgaufs_xi_open(struct file *xf, struct file *file, int do_fcnt, -+ int cnt) -+{ -+ int err; -+ struct kstat st; -+ struct dbgaufs_arg *p; -+ -+ err = -ENOMEM; -+ p = kmalloc(sizeof(*p), GFP_NOFS); -+ if (unlikely(!p)) -+ goto out; -+ -+ err = 0; -+ p->n = 0; -+ file->private_data = p; -+ if (!xf) -+ goto out; -+ -+ err = vfsub_getattr(&xf->f_path, &st); -+ if (!err) { -+ if (do_fcnt) -+ p->n = snprintf -+ (p->a, sizeof(p->a), "%d, %llux%u %lld\n", -+ cnt, st.blocks, st.blksize, -+ (long long)st.size); -+ else -+ p->n = snprintf(p->a, sizeof(p->a), "%llux%u %lld\n", -+ st.blocks, st.blksize, -+ (long long)st.size); -+ AuDebugOn(p->n >= sizeof(p->a)); -+ } else { -+ p->n = snprintf(p->a, sizeof(p->a), "err %d\n", err); -+ err = 0; -+ } -+ -+out: -+ return err; -+} -+ -+static ssize_t dbgaufs_xi_read(struct file *file, char __user *buf, -+ size_t count, loff_t *ppos) -+{ -+ struct dbgaufs_arg *p; -+ -+ p = file->private_data; -+ return simple_read_from_buffer(buf, count, ppos, p->a, p->n); -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+struct dbgaufs_plink_arg { -+ int n; -+ char a[]; -+}; -+ -+static int dbgaufs_plink_release(struct inode *inode __maybe_unused, -+ struct file *file) -+{ -+ free_page((unsigned long)file->private_data); -+ return 0; -+} -+ -+static int dbgaufs_plink_open(struct inode *inode, struct file *file) -+{ -+ int err, i, limit; -+ unsigned long n, sum; -+ struct dbgaufs_plink_arg *p; -+ struct au_sbinfo *sbinfo; -+ struct super_block *sb; -+ struct hlist_bl_head *hbl; -+ -+ err = -ENOMEM; -+ p = (void *)get_zeroed_page(GFP_NOFS); -+ if (unlikely(!p)) -+ goto out; -+ -+ err = -EFBIG; -+ sbinfo = inode->i_private; -+ sb = sbinfo->si_sb; -+ si_noflush_read_lock(sb); -+ if (au_opt_test(au_mntflags(sb), PLINK)) { -+ limit = PAGE_SIZE - sizeof(p->n); -+ -+ /* the number of buckets */ -+ n = snprintf(p->a + p->n, limit, "%d\n", AuPlink_NHASH); -+ p->n += n; -+ limit -= n; -+ -+ sum = 0; -+ for (i = 0, hbl = sbinfo->si_plink; i < AuPlink_NHASH; -+ i++, hbl++) { -+ n = au_hbl_count(hbl); -+ sum += n; -+ -+ n = snprintf(p->a + p->n, limit, "%lu ", n); -+ p->n += n; -+ limit -= n; -+ if (unlikely(limit <= 0)) -+ goto out_free; -+ } -+ p->a[p->n - 1] = '\n'; -+ -+ /* the sum of plinks */ -+ n = snprintf(p->a + p->n, limit, "%lu\n", sum); -+ p->n += n; -+ limit -= n; -+ if (unlikely(limit <= 0)) -+ goto out_free; -+ } else { -+#define str "1\n0\n0\n" -+ p->n = sizeof(str) - 1; -+ strcpy(p->a, str); -+#undef str -+ } -+ si_read_unlock(sb); -+ -+ err = 0; -+ file->private_data = p; -+ goto out; /* success */ -+ -+out_free: -+ free_page((unsigned long)p); -+out: -+ return err; -+} -+ -+static ssize_t dbgaufs_plink_read(struct file *file, char __user *buf, -+ size_t count, loff_t *ppos) -+{ -+ struct dbgaufs_plink_arg *p; -+ -+ p = file->private_data; -+ return simple_read_from_buffer(buf, count, ppos, p->a, p->n); -+} -+ -+static const struct file_operations dbgaufs_plink_fop = { -+ .owner = THIS_MODULE, -+ .open = dbgaufs_plink_open, -+ .release = dbgaufs_plink_release, -+ .read = dbgaufs_plink_read -+}; -+ -+/* ---------------------------------------------------------------------- */ -+ -+static int dbgaufs_xib_open(struct inode *inode, struct file *file) -+{ -+ int err; -+ struct au_sbinfo *sbinfo; -+ struct super_block *sb; -+ -+ sbinfo = inode->i_private; -+ sb = sbinfo->si_sb; -+ si_noflush_read_lock(sb); -+ err = dbgaufs_xi_open(sbinfo->si_xib, file, /*do_fcnt*/0, /*cnt*/0); -+ si_read_unlock(sb); -+ return err; -+} -+ -+static const struct file_operations dbgaufs_xib_fop = { -+ .owner = THIS_MODULE, -+ .open = dbgaufs_xib_open, -+ .release = dbgaufs_xi_release, -+ .read = dbgaufs_xi_read -+}; -+ -+/* ---------------------------------------------------------------------- */ -+ -+#define DbgaufsXi_PREFIX "xi" -+ -+static int dbgaufs_xino_open(struct inode *inode, struct file *file) -+{ -+ int err, idx; -+ long l; -+ aufs_bindex_t bindex; -+ char *p, a[sizeof(DbgaufsXi_PREFIX) + 8]; -+ struct au_sbinfo *sbinfo; -+ struct super_block *sb; -+ struct au_xino *xi; -+ struct file *xf; -+ struct qstr *name; -+ struct au_branch *br; -+ -+ err = -ENOENT; -+ name = &file->f_path.dentry->d_name; -+ if (unlikely(name->len < sizeof(DbgaufsXi_PREFIX) -+ || memcmp(name->name, DbgaufsXi_PREFIX, -+ sizeof(DbgaufsXi_PREFIX) - 1))) -+ goto out; -+ -+ AuDebugOn(name->len >= sizeof(a)); -+ memcpy(a, name->name, name->len); -+ a[name->len] = '\0'; -+ p = strchr(a, '-'); -+ if (p) -+ *p = '\0'; -+ err = kstrtol(a + sizeof(DbgaufsXi_PREFIX) - 1, 10, &l); -+ if (unlikely(err)) -+ goto out; -+ bindex = l; -+ idx = 0; -+ if (p) { -+ err = kstrtol(p + 1, 10, &l); -+ if (unlikely(err)) -+ goto out; -+ idx = l; -+ } -+ -+ err = -ENOENT; -+ sbinfo = inode->i_private; -+ sb = sbinfo->si_sb; -+ si_noflush_read_lock(sb); -+ if (unlikely(bindex < 0 || bindex > au_sbbot(sb))) -+ goto out_si; -+ br = au_sbr(sb, bindex); -+ xi = br->br_xino; -+ if (unlikely(idx >= xi->xi_nfile)) -+ goto out_si; -+ xf = au_xino_file(xi, idx); -+ if (xf) -+ err = dbgaufs_xi_open(xf, file, /*do_fcnt*/1, -+ au_xino_count(br)); -+ -+out_si: -+ si_read_unlock(sb); -+out: -+ AuTraceErr(err); -+ return err; -+} -+ -+static const struct file_operations dbgaufs_xino_fop = { -+ .owner = THIS_MODULE, -+ .open = dbgaufs_xino_open, -+ .release = dbgaufs_xi_release, -+ .read = dbgaufs_xi_read -+}; -+ -+void dbgaufs_xino_del(struct au_branch *br) -+{ -+ struct dentry *dbgaufs; -+ -+ dbgaufs = br->br_dbgaufs; -+ if (!dbgaufs) -+ return; -+ -+ br->br_dbgaufs = NULL; -+ /* debugfs acquires the parent i_mutex */ -+ lockdep_off(); -+ debugfs_remove(dbgaufs); -+ lockdep_on(); -+} -+ -+void dbgaufs_brs_del(struct super_block *sb, aufs_bindex_t bindex) -+{ -+ aufs_bindex_t bbot; -+ struct au_branch *br; -+ -+ if (!au_sbi(sb)->si_dbgaufs) -+ return; -+ -+ bbot = au_sbbot(sb); -+ for (; bindex <= bbot; bindex++) { -+ br = au_sbr(sb, bindex); -+ dbgaufs_xino_del(br); -+ } -+} -+ -+static void dbgaufs_br_do_add(struct super_block *sb, aufs_bindex_t bindex, -+ unsigned int idx, struct dentry *parent, -+ struct au_sbinfo *sbinfo) -+{ -+ struct au_branch *br; -+ struct dentry *d; -+ /* "xi" bindex(5) "-" idx(2) NULL */ -+ char name[sizeof(DbgaufsXi_PREFIX) + 8]; -+ -+ if (!idx) -+ snprintf(name, sizeof(name), DbgaufsXi_PREFIX "%d", bindex); -+ else -+ snprintf(name, sizeof(name), DbgaufsXi_PREFIX "%d-%u", -+ bindex, idx); -+ br = au_sbr(sb, bindex); -+ if (br->br_dbgaufs) { -+ struct qstr qstr = QSTR_INIT(name, strlen(name)); -+ -+ if (!au_qstreq(&br->br_dbgaufs->d_name, &qstr)) { -+ /* debugfs acquires the parent i_mutex */ -+ lockdep_off(); -+ d = debugfs_rename(parent, br->br_dbgaufs, parent, -+ name); -+ lockdep_on(); -+ if (unlikely(!d)) -+ pr_warn("failed renaming %pd/%s, ignored.\n", -+ parent, name); -+ } -+ } else { -+ lockdep_off(); -+ br->br_dbgaufs = debugfs_create_file(name, dbgaufs_mode, parent, -+ sbinfo, &dbgaufs_xino_fop); -+ lockdep_on(); -+ if (unlikely(!br->br_dbgaufs)) -+ pr_warn("failed creating %pd/%s, ignored.\n", -+ parent, name); -+ } -+} -+ -+static void dbgaufs_br_add(struct super_block *sb, aufs_bindex_t bindex, -+ struct dentry *parent, struct au_sbinfo *sbinfo) -+{ -+ struct au_branch *br; -+ struct au_xino *xi; -+ unsigned int u; -+ -+ br = au_sbr(sb, bindex); -+ xi = br->br_xino; -+ for (u = 0; u < xi->xi_nfile; u++) -+ dbgaufs_br_do_add(sb, bindex, u, parent, sbinfo); -+} -+ -+void dbgaufs_brs_add(struct super_block *sb, aufs_bindex_t bindex, int topdown) -+{ -+ struct au_sbinfo *sbinfo; -+ struct dentry *parent; -+ aufs_bindex_t bbot; -+ -+ if (!au_opt_test(au_mntflags(sb), XINO)) -+ return; -+ -+ sbinfo = au_sbi(sb); -+ parent = sbinfo->si_dbgaufs; -+ if (!parent) -+ return; -+ -+ bbot = au_sbbot(sb); -+ if (topdown) -+ for (; bindex <= bbot; bindex++) -+ dbgaufs_br_add(sb, bindex, parent, sbinfo); -+ else -+ for (; bbot >= bindex; bbot--) -+ dbgaufs_br_add(sb, bbot, parent, sbinfo); -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+#ifdef CONFIG_AUFS_EXPORT -+static int dbgaufs_xigen_open(struct inode *inode, struct file *file) -+{ -+ int err; -+ struct au_sbinfo *sbinfo; -+ struct super_block *sb; -+ -+ sbinfo = inode->i_private; -+ sb = sbinfo->si_sb; -+ si_noflush_read_lock(sb); -+ err = dbgaufs_xi_open(sbinfo->si_xigen, file, /*do_fcnt*/0, /*cnt*/0); -+ si_read_unlock(sb); -+ return err; -+} -+ -+static const struct file_operations dbgaufs_xigen_fop = { -+ .owner = THIS_MODULE, -+ .open = dbgaufs_xigen_open, -+ .release = dbgaufs_xi_release, -+ .read = dbgaufs_xi_read -+}; -+ -+static int dbgaufs_xigen_init(struct au_sbinfo *sbinfo) -+{ -+ int err; -+ -+ /* -+ * This function is a dynamic '__init' function actually, -+ * so the tiny check for si_rwsem is unnecessary. -+ */ -+ /* AuRwMustWriteLock(&sbinfo->si_rwsem); */ -+ -+ err = -EIO; -+ sbinfo->si_dbgaufs_xigen = debugfs_create_file -+ ("xigen", dbgaufs_mode, sbinfo->si_dbgaufs, sbinfo, -+ &dbgaufs_xigen_fop); -+ if (sbinfo->si_dbgaufs_xigen) -+ err = 0; -+ -+ return err; -+} -+#else -+static int dbgaufs_xigen_init(struct au_sbinfo *sbinfo) -+{ -+ return 0; -+} -+#endif /* CONFIG_AUFS_EXPORT */ -+ -+/* ---------------------------------------------------------------------- */ -+ -+void dbgaufs_si_fin(struct au_sbinfo *sbinfo) -+{ -+ /* -+ * This function is a dynamic '__fin' function actually, -+ * so the tiny check for si_rwsem is unnecessary. -+ */ -+ /* AuRwMustWriteLock(&sbinfo->si_rwsem); */ -+ -+ debugfs_remove_recursive(sbinfo->si_dbgaufs); -+ sbinfo->si_dbgaufs = NULL; -+} -+ -+int dbgaufs_si_init(struct au_sbinfo *sbinfo) -+{ -+ int err; -+ char name[SysaufsSiNameLen]; -+ -+ /* -+ * This function is a dynamic '__init' function actually, -+ * so the tiny check for si_rwsem is unnecessary. -+ */ -+ /* AuRwMustWriteLock(&sbinfo->si_rwsem); */ -+ -+ err = -ENOENT; -+ if (!dbgaufs) { -+ AuErr1("/debug/aufs is uninitialized\n"); -+ goto out; -+ } -+ -+ err = -EIO; -+ sysaufs_name(sbinfo, name); -+ sbinfo->si_dbgaufs = debugfs_create_dir(name, dbgaufs); -+ if (unlikely(!sbinfo->si_dbgaufs)) -+ goto out; -+ -+ /* regardless plink/noplink option */ -+ sbinfo->si_dbgaufs_plink = debugfs_create_file -+ ("plink", dbgaufs_mode, sbinfo->si_dbgaufs, sbinfo, -+ &dbgaufs_plink_fop); -+ if (unlikely(!sbinfo->si_dbgaufs_plink)) -+ goto out_dir; -+ -+ /* regardless xino/noxino option */ -+ sbinfo->si_dbgaufs_xib = debugfs_create_file -+ ("xib", dbgaufs_mode, sbinfo->si_dbgaufs, sbinfo, -+ &dbgaufs_xib_fop); -+ if (unlikely(!sbinfo->si_dbgaufs_xib)) -+ goto out_dir; -+ -+ err = dbgaufs_xigen_init(sbinfo); -+ if (!err) -+ goto out; /* success */ -+ -+out_dir: -+ dbgaufs_si_fin(sbinfo); -+out: -+ if (unlikely(err)) -+ pr_err("debugfs/aufs failed\n"); -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+void dbgaufs_fin(void) -+{ -+ debugfs_remove(dbgaufs); -+} -+ -+int __init dbgaufs_init(void) -+{ -+ int err; -+ -+ err = -EIO; -+ dbgaufs = debugfs_create_dir(AUFS_NAME, NULL); -+ if (dbgaufs) -+ err = 0; -+ return err; -+} -diff --git a/fs/aufs/dbgaufs.h b/fs/aufs/dbgaufs.h -new file mode 100644 -index 000000000000..ad26624a9345 ---- /dev/null -+++ b/fs/aufs/dbgaufs.h -@@ -0,0 +1,40 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * debugfs interface -+ */ -+ -+#ifndef __DBGAUFS_H__ -+#define __DBGAUFS_H__ -+ -+#ifdef __KERNEL__ -+ -+struct super_block; -+struct au_sbinfo; -+struct au_branch; -+ -+#ifdef CONFIG_DEBUG_FS -+/* dbgaufs.c */ -+void dbgaufs_xino_del(struct au_branch *br); -+void dbgaufs_brs_del(struct super_block *sb, aufs_bindex_t bindex); -+void dbgaufs_brs_add(struct super_block *sb, aufs_bindex_t bindex, int topdown); -+void dbgaufs_si_fin(struct au_sbinfo *sbinfo); -+int dbgaufs_si_init(struct au_sbinfo *sbinfo); -+void dbgaufs_fin(void); -+int __init dbgaufs_init(void); -+#else -+AuStubVoid(dbgaufs_xino_del, struct au_branch *br) -+AuStubVoid(dbgaufs_brs_del, struct super_block *sb, aufs_bindex_t bindex) -+AuStubVoid(dbgaufs_brs_add, struct super_block *sb, aufs_bindex_t bindex, -+ int topdown) -+AuStubVoid(dbgaufs_si_fin, struct au_sbinfo *sbinfo) -+AuStubInt0(dbgaufs_si_init, struct au_sbinfo *sbinfo) -+AuStubVoid(dbgaufs_fin, void) -+AuStubInt0(__init dbgaufs_init, void) -+#endif /* CONFIG_DEBUG_FS */ -+ -+#endif /* __KERNEL__ */ -+#endif /* __DBGAUFS_H__ */ -diff --git a/fs/aufs/dcsub.c b/fs/aufs/dcsub.c -new file mode 100644 -index 000000000000..000854da9075 ---- /dev/null -+++ b/fs/aufs/dcsub.c -@@ -0,0 +1,212 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * sub-routines for dentry cache -+ */ -+ -+#include "aufs.h" -+ -+static void au_dpage_free(struct au_dpage *dpage) -+{ -+ int i; -+ struct dentry **p; -+ -+ p = dpage->dentries; -+ for (i = 0; i < dpage->ndentry; i++) -+ dput(*p++); -+ free_page((unsigned long)dpage->dentries); -+} -+ -+int au_dpages_init(struct au_dcsub_pages *dpages, gfp_t gfp) -+{ -+ int err; -+ void *p; -+ -+ err = -ENOMEM; -+ dpages->dpages = kmalloc(sizeof(*dpages->dpages), gfp); -+ if (unlikely(!dpages->dpages)) -+ goto out; -+ -+ p = (void *)__get_free_page(gfp); -+ if (unlikely(!p)) -+ goto out_dpages; -+ -+ dpages->dpages[0].ndentry = 0; -+ dpages->dpages[0].dentries = p; -+ dpages->ndpage = 1; -+ return 0; /* success */ -+ -+out_dpages: -+ au_kfree_try_rcu(dpages->dpages); -+out: -+ return err; -+} -+ -+void au_dpages_free(struct au_dcsub_pages *dpages) -+{ -+ int i; -+ struct au_dpage *p; -+ -+ p = dpages->dpages; -+ for (i = 0; i < dpages->ndpage; i++) -+ au_dpage_free(p++); -+ au_kfree_try_rcu(dpages->dpages); -+} -+ -+static int au_dpages_append(struct au_dcsub_pages *dpages, -+ struct dentry *dentry, gfp_t gfp) -+{ -+ int err, sz; -+ struct au_dpage *dpage; -+ void *p; -+ -+ dpage = dpages->dpages + dpages->ndpage - 1; -+ sz = PAGE_SIZE / sizeof(dentry); -+ if (unlikely(dpage->ndentry >= sz)) { -+ AuLabel(new dpage); -+ err = -ENOMEM; -+ sz = dpages->ndpage * sizeof(*dpages->dpages); -+ p = au_kzrealloc(dpages->dpages, sz, -+ sz + sizeof(*dpages->dpages), gfp, -+ /*may_shrink*/0); -+ if (unlikely(!p)) -+ goto out; -+ -+ dpages->dpages = p; -+ dpage = dpages->dpages + dpages->ndpage; -+ p = (void *)__get_free_page(gfp); -+ if (unlikely(!p)) -+ goto out; -+ -+ dpage->ndentry = 0; -+ dpage->dentries = p; -+ dpages->ndpage++; -+ } -+ -+ AuDebugOn(au_dcount(dentry) <= 0); -+ dpage->dentries[dpage->ndentry++] = dget_dlock(dentry); -+ return 0; /* success */ -+ -+out: -+ return err; -+} -+ -+/* todo: BAD approach */ -+/* copied from linux/fs/dcache.c */ -+enum d_walk_ret { -+ D_WALK_CONTINUE, -+ D_WALK_QUIT, -+ D_WALK_NORETRY, -+ D_WALK_SKIP, -+}; -+ -+extern void d_walk(struct dentry *parent, void *data, -+ enum d_walk_ret (*enter)(void *, struct dentry *)); -+ -+struct ac_dpages_arg { -+ int err; -+ struct au_dcsub_pages *dpages; -+ struct super_block *sb; -+ au_dpages_test test; -+ void *arg; -+}; -+ -+static enum d_walk_ret au_call_dpages_append(void *_arg, struct dentry *dentry) -+{ -+ enum d_walk_ret ret; -+ struct ac_dpages_arg *arg = _arg; -+ -+ ret = D_WALK_CONTINUE; -+ if (dentry->d_sb == arg->sb -+ && !IS_ROOT(dentry) -+ && au_dcount(dentry) > 0 -+ && au_di(dentry) -+ && (!arg->test || arg->test(dentry, arg->arg))) { -+ arg->err = au_dpages_append(arg->dpages, dentry, GFP_ATOMIC); -+ if (unlikely(arg->err)) -+ ret = D_WALK_QUIT; -+ } -+ -+ return ret; -+} -+ -+int au_dcsub_pages(struct au_dcsub_pages *dpages, struct dentry *root, -+ au_dpages_test test, void *arg) -+{ -+ struct ac_dpages_arg args = { -+ .err = 0, -+ .dpages = dpages, -+ .sb = root->d_sb, -+ .test = test, -+ .arg = arg -+ }; -+ -+ d_walk(root, &args, au_call_dpages_append); -+ -+ return args.err; -+} -+ -+int au_dcsub_pages_rev(struct au_dcsub_pages *dpages, struct dentry *dentry, -+ int do_include, au_dpages_test test, void *arg) -+{ -+ int err; -+ -+ err = 0; -+ write_seqlock(&rename_lock); -+ spin_lock(&dentry->d_lock); -+ if (do_include -+ && au_dcount(dentry) > 0 -+ && (!test || test(dentry, arg))) -+ err = au_dpages_append(dpages, dentry, GFP_ATOMIC); -+ spin_unlock(&dentry->d_lock); -+ if (unlikely(err)) -+ goto out; -+ -+ /* -+ * RCU for vfsmount is unnecessary since this is a traverse in a single -+ * mount -+ */ -+ while (!IS_ROOT(dentry)) { -+ dentry = dentry->d_parent; /* rename_lock is locked */ -+ spin_lock(&dentry->d_lock); -+ if (au_dcount(dentry) > 0 -+ && (!test || test(dentry, arg))) -+ err = au_dpages_append(dpages, dentry, GFP_ATOMIC); -+ spin_unlock(&dentry->d_lock); -+ if (unlikely(err)) -+ break; -+ } -+ -+out: -+ write_sequnlock(&rename_lock); -+ return err; -+} -+ -+static inline int au_dcsub_dpages_aufs(struct dentry *dentry, void *arg) -+{ -+ return au_di(dentry) && dentry->d_sb == arg; -+} -+ -+int au_dcsub_pages_rev_aufs(struct au_dcsub_pages *dpages, -+ struct dentry *dentry, int do_include) -+{ -+ return au_dcsub_pages_rev(dpages, dentry, do_include, -+ au_dcsub_dpages_aufs, dentry->d_sb); -+} -+ -+int au_test_subdir(struct dentry *d1, struct dentry *d2) -+{ -+ struct path path[2] = { -+ { -+ .dentry = d1 -+ }, -+ { -+ .dentry = d2 -+ } -+ }; -+ -+ return path_is_under(path + 0, path + 1); -+} -diff --git a/fs/aufs/dcsub.h b/fs/aufs/dcsub.h -new file mode 100644 -index 000000000000..9d207c2b4666 ---- /dev/null -+++ b/fs/aufs/dcsub.h -@@ -0,0 +1,124 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * sub-routines for dentry cache -+ */ -+ -+#ifndef __AUFS_DCSUB_H__ -+#define __AUFS_DCSUB_H__ -+ -+#ifdef __KERNEL__ -+ -+#include -+#include -+ -+struct au_dpage { -+ int ndentry; -+ struct dentry **dentries; -+}; -+ -+struct au_dcsub_pages { -+ int ndpage; -+ struct au_dpage *dpages; -+}; -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* dcsub.c */ -+int au_dpages_init(struct au_dcsub_pages *dpages, gfp_t gfp); -+void au_dpages_free(struct au_dcsub_pages *dpages); -+typedef int (*au_dpages_test)(struct dentry *dentry, void *arg); -+int au_dcsub_pages(struct au_dcsub_pages *dpages, struct dentry *root, -+ au_dpages_test test, void *arg); -+int au_dcsub_pages_rev(struct au_dcsub_pages *dpages, struct dentry *dentry, -+ int do_include, au_dpages_test test, void *arg); -+int au_dcsub_pages_rev_aufs(struct au_dcsub_pages *dpages, -+ struct dentry *dentry, int do_include); -+int au_test_subdir(struct dentry *d1, struct dentry *d2); -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* -+ * todo: in linux-3.13, several similar (but faster) helpers are added to -+ * include/linux/dcache.h. Try them (in the future). -+ */ -+ -+static inline int au_d_hashed_positive(struct dentry *d) -+{ -+ int err; -+ struct inode *inode = d_inode(d); -+ -+ err = 0; -+ if (unlikely(d_unhashed(d) -+ || d_is_negative(d) -+ || !inode->i_nlink)) -+ err = -ENOENT; -+ return err; -+} -+ -+static inline int au_d_linkable(struct dentry *d) -+{ -+ int err; -+ struct inode *inode = d_inode(d); -+ -+ err = au_d_hashed_positive(d); -+ if (err -+ && d_is_positive(d) -+ && (inode->i_state & I_LINKABLE)) -+ err = 0; -+ return err; -+} -+ -+static inline int au_d_alive(struct dentry *d) -+{ -+ int err; -+ struct inode *inode; -+ -+ err = 0; -+ if (!IS_ROOT(d)) -+ err = au_d_hashed_positive(d); -+ else { -+ inode = d_inode(d); -+ if (unlikely(d_unlinked(d) -+ || d_is_negative(d) -+ || !inode->i_nlink)) -+ err = -ENOENT; -+ } -+ return err; -+} -+ -+static inline int au_alive_dir(struct dentry *d) -+{ -+ int err; -+ -+ err = au_d_alive(d); -+ if (unlikely(err || IS_DEADDIR(d_inode(d)))) -+ err = -ENOENT; -+ return err; -+} -+ -+static inline int au_qstreq(struct qstr *a, struct qstr *b) -+{ -+ return a->len == b->len -+ && !memcmp(a->name, b->name, a->len); -+} -+ -+/* -+ * by the commit -+ * 360f547 2015-01-25 dcache: let the dentry count go down to zero without -+ * taking d_lock -+ * the type of d_lockref.count became int, but the inlined function d_count() -+ * still returns unsigned int. -+ * I don't know why. Maybe it is for every d_count() users? -+ * Anyway au_dcount() lives on. -+ */ -+static inline int au_dcount(struct dentry *d) -+{ -+ return (int)d_count(d); -+} -+ -+#endif /* __KERNEL__ */ -+#endif /* __AUFS_DCSUB_H__ */ -diff --git a/fs/aufs/debug.c b/fs/aufs/debug.c -new file mode 100644 -index 000000000000..fd0ba9d15742 ---- /dev/null -+++ b/fs/aufs/debug.c -@@ -0,0 +1,428 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * debug print functions -+ */ -+ -+#include -+#include "aufs.h" -+ -+/* Returns 0, or -errno. arg is in kp->arg. */ -+static int param_atomic_t_set(const char *val, const struct kernel_param *kp) -+{ -+ int err, n; -+ -+ err = kstrtoint(val, 0, &n); -+ if (!err) { -+ if (n > 0) -+ au_debug_on(); -+ else -+ au_debug_off(); -+ } -+ return err; -+} -+ -+/* Returns length written or -errno. Buffer is 4k (ie. be short!) */ -+static int param_atomic_t_get(char *buffer, const struct kernel_param *kp) -+{ -+ atomic_t *a; -+ -+ a = kp->arg; -+ return sprintf(buffer, "%d", atomic_read(a)); -+} -+ -+static struct kernel_param_ops param_ops_atomic_t = { -+ .set = param_atomic_t_set, -+ .get = param_atomic_t_get -+ /* void (*free)(void *arg) */ -+}; -+ -+atomic_t aufs_debug = ATOMIC_INIT(0); -+MODULE_PARM_DESC(debug, "debug print"); -+module_param_named(debug, aufs_debug, atomic_t, 0664); -+ -+DEFINE_MUTEX(au_dbg_mtx); /* just to serialize the dbg msgs */ -+char *au_plevel = KERN_DEBUG; -+#define dpri(fmt, ...) do { \ -+ if ((au_plevel \ -+ && strcmp(au_plevel, KERN_DEBUG)) \ -+ || au_debug_test()) \ -+ printk("%s" fmt, au_plevel, ##__VA_ARGS__); \ -+} while (0) -+ -+/* ---------------------------------------------------------------------- */ -+ -+void au_dpri_whlist(struct au_nhash *whlist) -+{ -+ unsigned long ul, n; -+ struct hlist_head *head; -+ struct au_vdir_wh *pos; -+ -+ n = whlist->nh_num; -+ head = whlist->nh_head; -+ for (ul = 0; ul < n; ul++) { -+ hlist_for_each_entry(pos, head, wh_hash) -+ dpri("b%d, %.*s, %d\n", -+ pos->wh_bindex, -+ pos->wh_str.len, pos->wh_str.name, -+ pos->wh_str.len); -+ head++; -+ } -+} -+ -+void au_dpri_vdir(struct au_vdir *vdir) -+{ -+ unsigned long ul; -+ union au_vdir_deblk_p p; -+ unsigned char *o; -+ -+ if (!vdir || IS_ERR(vdir)) { -+ dpri("err %ld\n", PTR_ERR(vdir)); -+ return; -+ } -+ -+ dpri("deblk %u, nblk %lu, deblk %p, last{%lu, %p}, ver %llu\n", -+ vdir->vd_deblk_sz, vdir->vd_nblk, vdir->vd_deblk, -+ vdir->vd_last.ul, vdir->vd_last.p.deblk, vdir->vd_version); -+ for (ul = 0; ul < vdir->vd_nblk; ul++) { -+ p.deblk = vdir->vd_deblk[ul]; -+ o = p.deblk; -+ dpri("[%lu]: %p\n", ul, o); -+ } -+} -+ -+static int do_pri_inode(aufs_bindex_t bindex, struct inode *inode, int hn, -+ struct dentry *wh) -+{ -+ char *n = NULL; -+ int l = 0; -+ -+ if (!inode || IS_ERR(inode)) { -+ dpri("i%d: err %ld\n", bindex, PTR_ERR(inode)); -+ return -1; -+ } -+ -+ /* the type of i_blocks depends upon CONFIG_LBDAF */ -+ BUILD_BUG_ON(sizeof(inode->i_blocks) != sizeof(unsigned long) -+ && sizeof(inode->i_blocks) != sizeof(u64)); -+ if (wh) { -+ n = (void *)wh->d_name.name; -+ l = wh->d_name.len; -+ } -+ -+ dpri("i%d: %p, i%lu, %s, cnt %d, nl %u, 0%o, sz %llu, blk %llu," -+ " hn %d, ct %lld, np %lu, st 0x%lx, f 0x%x, v %llu, g %x%s%.*s\n", -+ bindex, inode, -+ inode->i_ino, inode->i_sb ? au_sbtype(inode->i_sb) : "??", -+ atomic_read(&inode->i_count), inode->i_nlink, inode->i_mode, -+ i_size_read(inode), (unsigned long long)inode->i_blocks, -+ hn, (long long)timespec64_to_ns(&inode->i_ctime) & 0x0ffff, -+ inode->i_mapping ? inode->i_mapping->nrpages : 0, -+ inode->i_state, inode->i_flags, inode_peek_iversion(inode), -+ inode->i_generation, -+ l ? ", wh " : "", l, n); -+ return 0; -+} -+ -+void au_dpri_inode(struct inode *inode) -+{ -+ struct au_iinfo *iinfo; -+ struct au_hinode *hi; -+ aufs_bindex_t bindex; -+ int err, hn; -+ -+ err = do_pri_inode(-1, inode, -1, NULL); -+ if (err || !au_test_aufs(inode->i_sb) || au_is_bad_inode(inode)) -+ return; -+ -+ iinfo = au_ii(inode); -+ dpri("i-1: btop %d, bbot %d, gen %d\n", -+ iinfo->ii_btop, iinfo->ii_bbot, au_iigen(inode, NULL)); -+ if (iinfo->ii_btop < 0) -+ return; -+ hn = 0; -+ for (bindex = iinfo->ii_btop; bindex <= iinfo->ii_bbot; bindex++) { -+ hi = au_hinode(iinfo, bindex); -+ hn = !!au_hn(hi); -+ do_pri_inode(bindex, hi->hi_inode, hn, hi->hi_whdentry); -+ } -+} -+ -+void au_dpri_dalias(struct inode *inode) -+{ -+ struct dentry *d; -+ -+ spin_lock(&inode->i_lock); -+ hlist_for_each_entry(d, &inode->i_dentry, d_u.d_alias) -+ au_dpri_dentry(d); -+ spin_unlock(&inode->i_lock); -+} -+ -+static int do_pri_dentry(aufs_bindex_t bindex, struct dentry *dentry) -+{ -+ struct dentry *wh = NULL; -+ int hn; -+ struct inode *inode; -+ struct au_iinfo *iinfo; -+ struct au_hinode *hi; -+ -+ if (!dentry || IS_ERR(dentry)) { -+ dpri("d%d: err %ld\n", bindex, PTR_ERR(dentry)); -+ return -1; -+ } -+ /* do not call dget_parent() here */ -+ /* note: access d_xxx without d_lock */ -+ dpri("d%d: %p, %pd2?, %s, cnt %d, flags 0x%x, %shashed\n", -+ bindex, dentry, dentry, -+ dentry->d_sb ? au_sbtype(dentry->d_sb) : "??", -+ au_dcount(dentry), dentry->d_flags, -+ d_unhashed(dentry) ? "un" : ""); -+ hn = -1; -+ inode = NULL; -+ if (d_is_positive(dentry)) -+ inode = d_inode(dentry); -+ if (inode -+ && au_test_aufs(dentry->d_sb) -+ && bindex >= 0 -+ && !au_is_bad_inode(inode)) { -+ iinfo = au_ii(inode); -+ hi = au_hinode(iinfo, bindex); -+ hn = !!au_hn(hi); -+ wh = hi->hi_whdentry; -+ } -+ do_pri_inode(bindex, inode, hn, wh); -+ return 0; -+} -+ -+void au_dpri_dentry(struct dentry *dentry) -+{ -+ struct au_dinfo *dinfo; -+ aufs_bindex_t bindex; -+ int err; -+ -+ err = do_pri_dentry(-1, dentry); -+ if (err || !au_test_aufs(dentry->d_sb)) -+ return; -+ -+ dinfo = au_di(dentry); -+ if (!dinfo) -+ return; -+ dpri("d-1: btop %d, bbot %d, bwh %d, bdiropq %d, gen %d, tmp %d\n", -+ dinfo->di_btop, dinfo->di_bbot, -+ dinfo->di_bwh, dinfo->di_bdiropq, au_digen(dentry), -+ dinfo->di_tmpfile); -+ if (dinfo->di_btop < 0) -+ return; -+ for (bindex = dinfo->di_btop; bindex <= dinfo->di_bbot; bindex++) -+ do_pri_dentry(bindex, au_hdentry(dinfo, bindex)->hd_dentry); -+} -+ -+static int do_pri_file(aufs_bindex_t bindex, struct file *file) -+{ -+ char a[32]; -+ -+ if (!file || IS_ERR(file)) { -+ dpri("f%d: err %ld\n", bindex, PTR_ERR(file)); -+ return -1; -+ } -+ a[0] = 0; -+ if (bindex < 0 -+ && !IS_ERR_OR_NULL(file->f_path.dentry) -+ && au_test_aufs(file->f_path.dentry->d_sb) -+ && au_fi(file)) -+ snprintf(a, sizeof(a), ", gen %d, mmapped %d", -+ au_figen(file), atomic_read(&au_fi(file)->fi_mmapped)); -+ dpri("f%d: mode 0x%x, flags 0%o, cnt %ld, v %llu, pos %llu%s\n", -+ bindex, file->f_mode, file->f_flags, (long)file_count(file), -+ file->f_version, file->f_pos, a); -+ if (!IS_ERR_OR_NULL(file->f_path.dentry)) -+ do_pri_dentry(bindex, file->f_path.dentry); -+ return 0; -+} -+ -+void au_dpri_file(struct file *file) -+{ -+ struct au_finfo *finfo; -+ struct au_fidir *fidir; -+ struct au_hfile *hfile; -+ aufs_bindex_t bindex; -+ int err; -+ -+ err = do_pri_file(-1, file); -+ if (err -+ || IS_ERR_OR_NULL(file->f_path.dentry) -+ || !au_test_aufs(file->f_path.dentry->d_sb)) -+ return; -+ -+ finfo = au_fi(file); -+ if (!finfo) -+ return; -+ if (finfo->fi_btop < 0) -+ return; -+ fidir = finfo->fi_hdir; -+ if (!fidir) -+ do_pri_file(finfo->fi_btop, finfo->fi_htop.hf_file); -+ else -+ for (bindex = finfo->fi_btop; -+ bindex >= 0 && bindex <= fidir->fd_bbot; -+ bindex++) { -+ hfile = fidir->fd_hfile + bindex; -+ do_pri_file(bindex, hfile ? hfile->hf_file : NULL); -+ } -+} -+ -+static int do_pri_br(aufs_bindex_t bindex, struct au_branch *br) -+{ -+ struct vfsmount *mnt; -+ struct super_block *sb; -+ -+ if (!br || IS_ERR(br)) -+ goto out; -+ mnt = au_br_mnt(br); -+ if (!mnt || IS_ERR(mnt)) -+ goto out; -+ sb = mnt->mnt_sb; -+ if (!sb || IS_ERR(sb)) -+ goto out; -+ -+ dpri("s%d: {perm 0x%x, id %d, wbr %p}, " -+ "%s, dev 0x%02x%02x, flags 0x%lx, cnt %d, active %d, " -+ "xino %d\n", -+ bindex, br->br_perm, br->br_id, br->br_wbr, -+ au_sbtype(sb), MAJOR(sb->s_dev), MINOR(sb->s_dev), -+ sb->s_flags, sb->s_count, -+ atomic_read(&sb->s_active), -+ !!au_xino_file(br->br_xino, /*idx*/-1)); -+ return 0; -+ -+out: -+ dpri("s%d: err %ld\n", bindex, PTR_ERR(br)); -+ return -1; -+} -+ -+void au_dpri_sb(struct super_block *sb) -+{ -+ struct au_sbinfo *sbinfo; -+ aufs_bindex_t bindex; -+ int err; -+ /* to reduce stack size */ -+ struct { -+ struct vfsmount mnt; -+ struct au_branch fake; -+ } *a; -+ -+ /* this function can be called from magic sysrq */ -+ a = kzalloc(sizeof(*a), GFP_ATOMIC); -+ if (unlikely(!a)) { -+ dpri("no memory\n"); -+ return; -+ } -+ -+ a->mnt.mnt_sb = sb; -+ a->fake.br_path.mnt = &a->mnt; -+ err = do_pri_br(-1, &a->fake); -+ au_kfree_rcu(a); -+ dpri("dev 0x%x\n", sb->s_dev); -+ if (err || !au_test_aufs(sb)) -+ return; -+ -+ sbinfo = au_sbi(sb); -+ if (!sbinfo) -+ return; -+ dpri("nw %d, gen %u, kobj %d\n", -+ atomic_read(&sbinfo->si_nowait.nw_len), sbinfo->si_generation, -+ kref_read(&sbinfo->si_kobj.kref)); -+ for (bindex = 0; bindex <= sbinfo->si_bbot; bindex++) -+ do_pri_br(bindex, sbinfo->si_branch[0 + bindex]); -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+void __au_dbg_verify_dinode(struct dentry *dentry, const char *func, int line) -+{ -+ struct inode *h_inode, *inode = d_inode(dentry); -+ struct dentry *h_dentry; -+ aufs_bindex_t bindex, bbot, bi; -+ -+ if (!inode /* || au_di(dentry)->di_lsc == AuLsc_DI_TMP */) -+ return; -+ -+ bbot = au_dbbot(dentry); -+ bi = au_ibbot(inode); -+ if (bi < bbot) -+ bbot = bi; -+ bindex = au_dbtop(dentry); -+ bi = au_ibtop(inode); -+ if (bi > bindex) -+ bindex = bi; -+ -+ for (; bindex <= bbot; bindex++) { -+ h_dentry = au_h_dptr(dentry, bindex); -+ if (!h_dentry) -+ continue; -+ h_inode = au_h_iptr(inode, bindex); -+ if (unlikely(h_inode != d_inode(h_dentry))) { -+ au_debug_on(); -+ AuDbg("b%d, %s:%d\n", bindex, func, line); -+ AuDbgDentry(dentry); -+ AuDbgInode(inode); -+ au_debug_off(); -+ BUG(); -+ } -+ } -+} -+ -+void au_dbg_verify_gen(struct dentry *parent, unsigned int sigen) -+{ -+ int err, i, j; -+ struct au_dcsub_pages dpages; -+ struct au_dpage *dpage; -+ struct dentry **dentries; -+ -+ err = au_dpages_init(&dpages, GFP_NOFS); -+ AuDebugOn(err); -+ err = au_dcsub_pages_rev_aufs(&dpages, parent, /*do_include*/1); -+ AuDebugOn(err); -+ for (i = dpages.ndpage - 1; !err && i >= 0; i--) { -+ dpage = dpages.dpages + i; -+ dentries = dpage->dentries; -+ for (j = dpage->ndentry - 1; !err && j >= 0; j--) -+ AuDebugOn(au_digen_test(dentries[j], sigen)); -+ } -+ au_dpages_free(&dpages); -+} -+ -+void au_dbg_verify_kthread(void) -+{ -+ if (au_wkq_test()) { -+ au_dbg_blocked(); -+ /* -+ * It may be recursive, but udba=notify between two aufs mounts, -+ * where a single ro branch is shared, is not a problem. -+ */ -+ /* WARN_ON(1); */ -+ } -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+int __init au_debug_init(void) -+{ -+ aufs_bindex_t bindex; -+ struct au_vdir_destr destr; -+ -+ bindex = -1; -+ AuDebugOn(bindex >= 0); -+ -+ destr.len = -1; -+ AuDebugOn(destr.len < NAME_MAX); -+ -+#ifdef CONFIG_4KSTACKS -+ pr_warn("CONFIG_4KSTACKS is defined.\n"); -+#endif -+ -+ return 0; -+} -diff --git a/fs/aufs/debug.h b/fs/aufs/debug.h -new file mode 100644 -index 000000000000..5799794de0c2 ---- /dev/null -+++ b/fs/aufs/debug.h -@@ -0,0 +1,213 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * debug print functions -+ */ -+ -+#ifndef __AUFS_DEBUG_H__ -+#define __AUFS_DEBUG_H__ -+ -+#ifdef __KERNEL__ -+ -+#include -+#include -+#include -+#include -+ -+#ifdef CONFIG_AUFS_DEBUG -+#define AuDebugOn(a) BUG_ON(a) -+ -+/* module parameter */ -+extern atomic_t aufs_debug; -+static inline void au_debug_on(void) -+{ -+ atomic_inc(&aufs_debug); -+} -+static inline void au_debug_off(void) -+{ -+ atomic_dec_if_positive(&aufs_debug); -+} -+ -+static inline int au_debug_test(void) -+{ -+ return atomic_read(&aufs_debug) > 0; -+} -+#else -+#define AuDebugOn(a) do {} while (0) -+AuStubVoid(au_debug_on, void) -+AuStubVoid(au_debug_off, void) -+AuStubInt0(au_debug_test, void) -+#endif /* CONFIG_AUFS_DEBUG */ -+ -+#define param_check_atomic_t(name, p) __param_check(name, p, atomic_t) -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* debug print */ -+ -+#define AuDbg(fmt, ...) do { \ -+ if (au_debug_test()) \ -+ pr_debug("DEBUG: " fmt, ##__VA_ARGS__); \ -+} while (0) -+#define AuLabel(l) AuDbg(#l "\n") -+#define AuIOErr(fmt, ...) pr_err("I/O Error, " fmt, ##__VA_ARGS__) -+#define AuWarn1(fmt, ...) do { \ -+ static unsigned char _c; \ -+ if (!_c++) \ -+ pr_warn(fmt, ##__VA_ARGS__); \ -+} while (0) -+ -+#define AuErr1(fmt, ...) do { \ -+ static unsigned char _c; \ -+ if (!_c++) \ -+ pr_err(fmt, ##__VA_ARGS__); \ -+} while (0) -+ -+#define AuIOErr1(fmt, ...) do { \ -+ static unsigned char _c; \ -+ if (!_c++) \ -+ AuIOErr(fmt, ##__VA_ARGS__); \ -+} while (0) -+ -+#define AuUnsupportMsg "This operation is not supported." \ -+ " Please report this application to aufs-users ML." -+#define AuUnsupport(fmt, ...) do { \ -+ pr_err(AuUnsupportMsg "\n" fmt, ##__VA_ARGS__); \ -+ dump_stack(); \ -+} while (0) -+ -+#define AuTraceErr(e) do { \ -+ if (unlikely((e) < 0)) \ -+ AuDbg("err %d\n", (int)(e)); \ -+} while (0) -+ -+#define AuTraceErrPtr(p) do { \ -+ if (IS_ERR(p)) \ -+ AuDbg("err %ld\n", PTR_ERR(p)); \ -+} while (0) -+ -+/* dirty macros for debug print, use with "%.*s" and caution */ -+#define AuLNPair(qstr) (qstr)->len, (qstr)->name -+ -+/* ---------------------------------------------------------------------- */ -+ -+struct dentry; -+#ifdef CONFIG_AUFS_DEBUG -+extern struct mutex au_dbg_mtx; -+extern char *au_plevel; -+struct au_nhash; -+void au_dpri_whlist(struct au_nhash *whlist); -+struct au_vdir; -+void au_dpri_vdir(struct au_vdir *vdir); -+struct inode; -+void au_dpri_inode(struct inode *inode); -+void au_dpri_dalias(struct inode *inode); -+void au_dpri_dentry(struct dentry *dentry); -+struct file; -+void au_dpri_file(struct file *filp); -+struct super_block; -+void au_dpri_sb(struct super_block *sb); -+ -+#define au_dbg_verify_dinode(d) __au_dbg_verify_dinode(d, __func__, __LINE__) -+void __au_dbg_verify_dinode(struct dentry *dentry, const char *func, int line); -+void au_dbg_verify_gen(struct dentry *parent, unsigned int sigen); -+void au_dbg_verify_kthread(void); -+ -+int __init au_debug_init(void); -+ -+#define AuDbgWhlist(w) do { \ -+ mutex_lock(&au_dbg_mtx); \ -+ AuDbg(#w "\n"); \ -+ au_dpri_whlist(w); \ -+ mutex_unlock(&au_dbg_mtx); \ -+} while (0) -+ -+#define AuDbgVdir(v) do { \ -+ mutex_lock(&au_dbg_mtx); \ -+ AuDbg(#v "\n"); \ -+ au_dpri_vdir(v); \ -+ mutex_unlock(&au_dbg_mtx); \ -+} while (0) -+ -+#define AuDbgInode(i) do { \ -+ mutex_lock(&au_dbg_mtx); \ -+ AuDbg(#i "\n"); \ -+ au_dpri_inode(i); \ -+ mutex_unlock(&au_dbg_mtx); \ -+} while (0) -+ -+#define AuDbgDAlias(i) do { \ -+ mutex_lock(&au_dbg_mtx); \ -+ AuDbg(#i "\n"); \ -+ au_dpri_dalias(i); \ -+ mutex_unlock(&au_dbg_mtx); \ -+} while (0) -+ -+#define AuDbgDentry(d) do { \ -+ mutex_lock(&au_dbg_mtx); \ -+ AuDbg(#d "\n"); \ -+ au_dpri_dentry(d); \ -+ mutex_unlock(&au_dbg_mtx); \ -+} while (0) -+ -+#define AuDbgFile(f) do { \ -+ mutex_lock(&au_dbg_mtx); \ -+ AuDbg(#f "\n"); \ -+ au_dpri_file(f); \ -+ mutex_unlock(&au_dbg_mtx); \ -+} while (0) -+ -+#define AuDbgSb(sb) do { \ -+ mutex_lock(&au_dbg_mtx); \ -+ AuDbg(#sb "\n"); \ -+ au_dpri_sb(sb); \ -+ mutex_unlock(&au_dbg_mtx); \ -+} while (0) -+ -+#define AuDbgSym(addr) do { \ -+ char sym[KSYM_SYMBOL_LEN]; \ -+ sprint_symbol(sym, (unsigned long)addr); \ -+ AuDbg("%s\n", sym); \ -+} while (0) -+#else -+AuStubVoid(au_dbg_verify_dinode, struct dentry *dentry) -+AuStubVoid(au_dbg_verify_gen, struct dentry *parent, unsigned int sigen) -+AuStubVoid(au_dbg_verify_kthread, void) -+AuStubInt0(__init au_debug_init, void) -+ -+#define AuDbgWhlist(w) do {} while (0) -+#define AuDbgVdir(v) do {} while (0) -+#define AuDbgInode(i) do {} while (0) -+#define AuDbgDAlias(i) do {} while (0) -+#define AuDbgDentry(d) do {} while (0) -+#define AuDbgFile(f) do {} while (0) -+#define AuDbgSb(sb) do {} while (0) -+#define AuDbgSym(addr) do {} while (0) -+#endif /* CONFIG_AUFS_DEBUG */ -+ -+/* ---------------------------------------------------------------------- */ -+ -+#ifdef CONFIG_AUFS_MAGIC_SYSRQ -+int __init au_sysrq_init(void); -+void au_sysrq_fin(void); -+ -+#ifdef CONFIG_HW_CONSOLE -+#define au_dbg_blocked() do { \ -+ WARN_ON(1); \ -+ handle_sysrq('w'); \ -+} while (0) -+#else -+AuStubVoid(au_dbg_blocked, void) -+#endif -+ -+#else -+AuStubInt0(__init au_sysrq_init, void) -+AuStubVoid(au_sysrq_fin, void) -+AuStubVoid(au_dbg_blocked, void) -+#endif /* CONFIG_AUFS_MAGIC_SYSRQ */ -+ -+#endif /* __KERNEL__ */ -+#endif /* __AUFS_DEBUG_H__ */ -diff --git a/fs/aufs/dentry.c b/fs/aufs/dentry.c -new file mode 100644 -index 000000000000..1a029193315a ---- /dev/null -+++ b/fs/aufs/dentry.c -@@ -0,0 +1,1141 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * lookup and dentry operations -+ */ -+ -+#include -+#include -+#include "aufs.h" -+ -+/* -+ * returns positive/negative dentry, NULL or an error. -+ * NULL means whiteout-ed or not-found. -+ */ -+static struct dentry* -+au_do_lookup(struct dentry *h_parent, struct dentry *dentry, -+ aufs_bindex_t bindex, struct au_do_lookup_args *args) -+{ -+ struct dentry *h_dentry; -+ struct inode *h_inode; -+ struct au_branch *br; -+ int wh_found, opq; -+ unsigned char wh_able; -+ const unsigned char allow_neg = !!au_ftest_lkup(args->flags, ALLOW_NEG); -+ const unsigned char ignore_perm = !!au_ftest_lkup(args->flags, -+ IGNORE_PERM); -+ -+ wh_found = 0; -+ br = au_sbr(dentry->d_sb, bindex); -+ wh_able = !!au_br_whable(br->br_perm); -+ if (wh_able) -+ wh_found = au_wh_test(h_parent, &args->whname, ignore_perm); -+ h_dentry = ERR_PTR(wh_found); -+ if (!wh_found) -+ goto real_lookup; -+ if (unlikely(wh_found < 0)) -+ goto out; -+ -+ /* We found a whiteout */ -+ /* au_set_dbbot(dentry, bindex); */ -+ au_set_dbwh(dentry, bindex); -+ if (!allow_neg) -+ return NULL; /* success */ -+ -+real_lookup: -+ if (!ignore_perm) -+ h_dentry = vfsub_lkup_one(args->name, h_parent); -+ else -+ h_dentry = au_sio_lkup_one(args->name, h_parent); -+ if (IS_ERR(h_dentry)) { -+ if (PTR_ERR(h_dentry) == -ENAMETOOLONG -+ && !allow_neg) -+ h_dentry = NULL; -+ goto out; -+ } -+ -+ h_inode = d_inode(h_dentry); -+ if (d_is_negative(h_dentry)) { -+ if (!allow_neg) -+ goto out_neg; -+ } else if (wh_found -+ || (args->type && args->type != (h_inode->i_mode & S_IFMT))) -+ goto out_neg; -+ else if (au_ftest_lkup(args->flags, DIRREN) -+ /* && h_inode */ -+ && !au_dr_lkup_h_ino(args, bindex, h_inode->i_ino)) { -+ AuDbg("b%d %pd ignored hi%llu\n", bindex, h_dentry, -+ (unsigned long long)h_inode->i_ino); -+ goto out_neg; -+ } -+ -+ if (au_dbbot(dentry) <= bindex) -+ au_set_dbbot(dentry, bindex); -+ if (au_dbtop(dentry) < 0 || bindex < au_dbtop(dentry)) -+ au_set_dbtop(dentry, bindex); -+ au_set_h_dptr(dentry, bindex, h_dentry); -+ -+ if (!d_is_dir(h_dentry) -+ || !wh_able -+ || (d_really_is_positive(dentry) && !d_is_dir(dentry))) -+ goto out; /* success */ -+ -+ inode_lock_shared_nested(h_inode, AuLsc_I_CHILD); -+ opq = au_diropq_test(h_dentry); -+ inode_unlock_shared(h_inode); -+ if (opq > 0) -+ au_set_dbdiropq(dentry, bindex); -+ else if (unlikely(opq < 0)) { -+ au_set_h_dptr(dentry, bindex, NULL); -+ h_dentry = ERR_PTR(opq); -+ } -+ goto out; -+ -+out_neg: -+ dput(h_dentry); -+ h_dentry = NULL; -+out: -+ return h_dentry; -+} -+ -+static int au_test_shwh(struct super_block *sb, const struct qstr *name) -+{ -+ if (unlikely(!au_opt_test(au_mntflags(sb), SHWH) -+ && !strncmp(name->name, AUFS_WH_PFX, AUFS_WH_PFX_LEN))) -+ return -EPERM; -+ return 0; -+} -+ -+/* -+ * returns the number of lower positive dentries, -+ * otherwise an error. -+ * can be called at unlinking with @type is zero. -+ */ -+int au_lkup_dentry(struct dentry *dentry, aufs_bindex_t btop, -+ unsigned int flags) -+{ -+ int npositive, err; -+ aufs_bindex_t bindex, btail, bdiropq; -+ unsigned char isdir, dirperm1, dirren; -+ struct au_do_lookup_args args = { -+ .flags = flags, -+ .name = &dentry->d_name -+ }; -+ struct dentry *parent; -+ struct super_block *sb; -+ -+ sb = dentry->d_sb; -+ err = au_test_shwh(sb, args.name); -+ if (unlikely(err)) -+ goto out; -+ -+ err = au_wh_name_alloc(&args.whname, args.name); -+ if (unlikely(err)) -+ goto out; -+ -+ isdir = !!d_is_dir(dentry); -+ dirperm1 = !!au_opt_test(au_mntflags(sb), DIRPERM1); -+ dirren = !!au_opt_test(au_mntflags(sb), DIRREN); -+ if (dirren) -+ au_fset_lkup(args.flags, DIRREN); -+ -+ npositive = 0; -+ parent = dget_parent(dentry); -+ btail = au_dbtaildir(parent); -+ for (bindex = btop; bindex <= btail; bindex++) { -+ struct dentry *h_parent, *h_dentry; -+ struct inode *h_inode, *h_dir; -+ struct au_branch *br; -+ -+ h_dentry = au_h_dptr(dentry, bindex); -+ if (h_dentry) { -+ if (d_is_positive(h_dentry)) -+ npositive++; -+ break; -+ } -+ h_parent = au_h_dptr(parent, bindex); -+ if (!h_parent || !d_is_dir(h_parent)) -+ continue; -+ -+ if (dirren) { -+ /* if the inum matches, then use the prepared name */ -+ err = au_dr_lkup_name(&args, bindex); -+ if (unlikely(err)) -+ goto out_parent; -+ } -+ -+ h_dir = d_inode(h_parent); -+ inode_lock_shared_nested(h_dir, AuLsc_I_PARENT); -+ h_dentry = au_do_lookup(h_parent, dentry, bindex, &args); -+ inode_unlock_shared(h_dir); -+ err = PTR_ERR(h_dentry); -+ if (IS_ERR(h_dentry)) -+ goto out_parent; -+ if (h_dentry) -+ au_fclr_lkup(args.flags, ALLOW_NEG); -+ if (dirperm1) -+ au_fset_lkup(args.flags, IGNORE_PERM); -+ -+ if (au_dbwh(dentry) == bindex) -+ break; -+ if (!h_dentry) -+ continue; -+ if (d_is_negative(h_dentry)) -+ continue; -+ h_inode = d_inode(h_dentry); -+ npositive++; -+ if (!args.type) -+ args.type = h_inode->i_mode & S_IFMT; -+ if (args.type != S_IFDIR) -+ break; -+ else if (isdir) { -+ /* the type of lower may be different */ -+ bdiropq = au_dbdiropq(dentry); -+ if (bdiropq >= 0 && bdiropq <= bindex) -+ break; -+ } -+ br = au_sbr(sb, bindex); -+ if (dirren -+ && au_dr_hino_test_add(&br->br_dirren, h_inode->i_ino, -+ /*add_ent*/NULL)) { -+ /* prepare next name to lookup */ -+ err = au_dr_lkup(&args, dentry, bindex); -+ if (unlikely(err)) -+ goto out_parent; -+ } -+ } -+ -+ if (npositive) { -+ AuLabel(positive); -+ au_update_dbtop(dentry); -+ } -+ err = npositive; -+ if (unlikely(!au_opt_test(au_mntflags(sb), UDBA_NONE) -+ && au_dbtop(dentry) < 0)) { -+ err = -EIO; -+ AuIOErr("both of real entry and whiteout found, %pd, err %d\n", -+ dentry, err); -+ } -+ -+out_parent: -+ dput(parent); -+ au_kfree_try_rcu(args.whname.name); -+ if (dirren) -+ au_dr_lkup_fin(&args); -+out: -+ return err; -+} -+ -+struct dentry *au_sio_lkup_one(struct qstr *name, struct dentry *parent) -+{ -+ struct dentry *dentry; -+ int wkq_err; -+ -+ if (!au_test_h_perm_sio(d_inode(parent), MAY_EXEC)) -+ dentry = vfsub_lkup_one(name, parent); -+ else { -+ struct vfsub_lkup_one_args args = { -+ .errp = &dentry, -+ .name = name, -+ .parent = parent -+ }; -+ -+ wkq_err = au_wkq_wait(vfsub_call_lkup_one, &args); -+ if (unlikely(wkq_err)) -+ dentry = ERR_PTR(wkq_err); -+ } -+ -+ return dentry; -+} -+ -+/* -+ * lookup @dentry on @bindex which should be negative. -+ */ -+int au_lkup_neg(struct dentry *dentry, aufs_bindex_t bindex, int wh) -+{ -+ int err; -+ struct dentry *parent, *h_parent, *h_dentry; -+ struct au_branch *br; -+ -+ parent = dget_parent(dentry); -+ h_parent = au_h_dptr(parent, bindex); -+ br = au_sbr(dentry->d_sb, bindex); -+ if (wh) -+ h_dentry = au_whtmp_lkup(h_parent, br, &dentry->d_name); -+ else -+ h_dentry = au_sio_lkup_one(&dentry->d_name, h_parent); -+ err = PTR_ERR(h_dentry); -+ if (IS_ERR(h_dentry)) -+ goto out; -+ if (unlikely(d_is_positive(h_dentry))) { -+ err = -EIO; -+ AuIOErr("%pd should be negative on b%d.\n", h_dentry, bindex); -+ dput(h_dentry); -+ goto out; -+ } -+ -+ err = 0; -+ if (bindex < au_dbtop(dentry)) -+ au_set_dbtop(dentry, bindex); -+ if (au_dbbot(dentry) < bindex) -+ au_set_dbbot(dentry, bindex); -+ au_set_h_dptr(dentry, bindex, h_dentry); -+ -+out: -+ dput(parent); -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* subset of struct inode */ -+struct au_iattr { -+ unsigned long i_ino; -+ /* unsigned int i_nlink; */ -+ kuid_t i_uid; -+ kgid_t i_gid; -+ u64 i_version; -+/* -+ loff_t i_size; -+ blkcnt_t i_blocks; -+*/ -+ umode_t i_mode; -+}; -+ -+static void au_iattr_save(struct au_iattr *ia, struct inode *h_inode) -+{ -+ ia->i_ino = h_inode->i_ino; -+ /* ia->i_nlink = h_inode->i_nlink; */ -+ ia->i_uid = h_inode->i_uid; -+ ia->i_gid = h_inode->i_gid; -+ ia->i_version = inode_query_iversion(h_inode); -+/* -+ ia->i_size = h_inode->i_size; -+ ia->i_blocks = h_inode->i_blocks; -+*/ -+ ia->i_mode = (h_inode->i_mode & S_IFMT); -+} -+ -+static int au_iattr_test(struct au_iattr *ia, struct inode *h_inode) -+{ -+ return ia->i_ino != h_inode->i_ino -+ /* || ia->i_nlink != h_inode->i_nlink */ -+ || !uid_eq(ia->i_uid, h_inode->i_uid) -+ || !gid_eq(ia->i_gid, h_inode->i_gid) -+ || !inode_eq_iversion(h_inode, ia->i_version) -+/* -+ || ia->i_size != h_inode->i_size -+ || ia->i_blocks != h_inode->i_blocks -+*/ -+ || ia->i_mode != (h_inode->i_mode & S_IFMT); -+} -+ -+static int au_h_verify_dentry(struct dentry *h_dentry, struct dentry *h_parent, -+ struct au_branch *br) -+{ -+ int err; -+ struct au_iattr ia; -+ struct inode *h_inode; -+ struct dentry *h_d; -+ struct super_block *h_sb; -+ -+ err = 0; -+ memset(&ia, -1, sizeof(ia)); -+ h_sb = h_dentry->d_sb; -+ h_inode = NULL; -+ if (d_is_positive(h_dentry)) { -+ h_inode = d_inode(h_dentry); -+ au_iattr_save(&ia, h_inode); -+ } else if (au_test_nfs(h_sb) || au_test_fuse(h_sb)) -+ /* nfs d_revalidate may return 0 for negative dentry */ -+ /* fuse d_revalidate always return 0 for negative dentry */ -+ goto out; -+ -+ /* main purpose is namei.c:cached_lookup() and d_revalidate */ -+ h_d = vfsub_lkup_one(&h_dentry->d_name, h_parent); -+ err = PTR_ERR(h_d); -+ if (IS_ERR(h_d)) -+ goto out; -+ -+ err = 0; -+ if (unlikely(h_d != h_dentry -+ || d_inode(h_d) != h_inode -+ || (h_inode && au_iattr_test(&ia, h_inode)))) -+ err = au_busy_or_stale(); -+ dput(h_d); -+ -+out: -+ AuTraceErr(err); -+ return err; -+} -+ -+int au_h_verify(struct dentry *h_dentry, unsigned int udba, struct inode *h_dir, -+ struct dentry *h_parent, struct au_branch *br) -+{ -+ int err; -+ -+ err = 0; -+ if (udba == AuOpt_UDBA_REVAL -+ && !au_test_fs_remote(h_dentry->d_sb)) { -+ IMustLock(h_dir); -+ err = (d_inode(h_dentry->d_parent) != h_dir); -+ } else if (udba != AuOpt_UDBA_NONE) -+ err = au_h_verify_dentry(h_dentry, h_parent, br); -+ -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+static int au_do_refresh_hdentry(struct dentry *dentry, struct dentry *parent) -+{ -+ int err; -+ aufs_bindex_t new_bindex, bindex, bbot, bwh, bdiropq; -+ struct au_hdentry tmp, *p, *q; -+ struct au_dinfo *dinfo; -+ struct super_block *sb; -+ -+ DiMustWriteLock(dentry); -+ -+ sb = dentry->d_sb; -+ dinfo = au_di(dentry); -+ bbot = dinfo->di_bbot; -+ bwh = dinfo->di_bwh; -+ bdiropq = dinfo->di_bdiropq; -+ bindex = dinfo->di_btop; -+ p = au_hdentry(dinfo, bindex); -+ for (; bindex <= bbot; bindex++, p++) { -+ if (!p->hd_dentry) -+ continue; -+ -+ new_bindex = au_br_index(sb, p->hd_id); -+ if (new_bindex == bindex) -+ continue; -+ -+ if (dinfo->di_bwh == bindex) -+ bwh = new_bindex; -+ if (dinfo->di_bdiropq == bindex) -+ bdiropq = new_bindex; -+ if (new_bindex < 0) { -+ au_hdput(p); -+ p->hd_dentry = NULL; -+ continue; -+ } -+ -+ /* swap two lower dentries, and loop again */ -+ q = au_hdentry(dinfo, new_bindex); -+ tmp = *q; -+ *q = *p; -+ *p = tmp; -+ if (tmp.hd_dentry) { -+ bindex--; -+ p--; -+ } -+ } -+ -+ dinfo->di_bwh = -1; -+ if (bwh >= 0 && bwh <= au_sbbot(sb) && au_sbr_whable(sb, bwh)) -+ dinfo->di_bwh = bwh; -+ -+ dinfo->di_bdiropq = -1; -+ if (bdiropq >= 0 -+ && bdiropq <= au_sbbot(sb) -+ && au_sbr_whable(sb, bdiropq)) -+ dinfo->di_bdiropq = bdiropq; -+ -+ err = -EIO; -+ dinfo->di_btop = -1; -+ dinfo->di_bbot = -1; -+ bbot = au_dbbot(parent); -+ bindex = 0; -+ p = au_hdentry(dinfo, bindex); -+ for (; bindex <= bbot; bindex++, p++) -+ if (p->hd_dentry) { -+ dinfo->di_btop = bindex; -+ break; -+ } -+ -+ if (dinfo->di_btop >= 0) { -+ bindex = bbot; -+ p = au_hdentry(dinfo, bindex); -+ for (; bindex >= 0; bindex--, p--) -+ if (p->hd_dentry) { -+ dinfo->di_bbot = bindex; -+ err = 0; -+ break; -+ } -+ } -+ -+ return err; -+} -+ -+static void au_do_hide(struct dentry *dentry) -+{ -+ struct inode *inode; -+ -+ if (d_really_is_positive(dentry)) { -+ inode = d_inode(dentry); -+ if (!d_is_dir(dentry)) { -+ if (inode->i_nlink && !d_unhashed(dentry)) -+ drop_nlink(inode); -+ } else { -+ clear_nlink(inode); -+ /* stop next lookup */ -+ inode->i_flags |= S_DEAD; -+ } -+ smp_mb(); /* necessary? */ -+ } -+ d_drop(dentry); -+} -+ -+static int au_hide_children(struct dentry *parent) -+{ -+ int err, i, j, ndentry; -+ struct au_dcsub_pages dpages; -+ struct au_dpage *dpage; -+ struct dentry *dentry; -+ -+ err = au_dpages_init(&dpages, GFP_NOFS); -+ if (unlikely(err)) -+ goto out; -+ err = au_dcsub_pages(&dpages, parent, NULL, NULL); -+ if (unlikely(err)) -+ goto out_dpages; -+ -+ /* in reverse order */ -+ for (i = dpages.ndpage - 1; i >= 0; i--) { -+ dpage = dpages.dpages + i; -+ ndentry = dpage->ndentry; -+ for (j = ndentry - 1; j >= 0; j--) { -+ dentry = dpage->dentries[j]; -+ if (dentry != parent) -+ au_do_hide(dentry); -+ } -+ } -+ -+out_dpages: -+ au_dpages_free(&dpages); -+out: -+ return err; -+} -+ -+static void au_hide(struct dentry *dentry) -+{ -+ int err; -+ -+ AuDbgDentry(dentry); -+ if (d_is_dir(dentry)) { -+ /* shrink_dcache_parent(dentry); */ -+ err = au_hide_children(dentry); -+ if (unlikely(err)) -+ AuIOErr("%pd, failed hiding children, ignored %d\n", -+ dentry, err); -+ } -+ au_do_hide(dentry); -+} -+ -+/* -+ * By adding a dirty branch, a cached dentry may be affected in various ways. -+ * -+ * a dirty branch is added -+ * - on the top of layers -+ * - in the middle of layers -+ * - to the bottom of layers -+ * -+ * on the added branch there exists -+ * - a whiteout -+ * - a diropq -+ * - a same named entry -+ * + exist -+ * * negative --> positive -+ * * positive --> positive -+ * - type is unchanged -+ * - type is changed -+ * + doesn't exist -+ * * negative --> negative -+ * * positive --> negative (rejected by au_br_del() for non-dir case) -+ * - none -+ */ -+static int au_refresh_by_dinfo(struct dentry *dentry, struct au_dinfo *dinfo, -+ struct au_dinfo *tmp) -+{ -+ int err; -+ aufs_bindex_t bindex, bbot; -+ struct { -+ struct dentry *dentry; -+ struct inode *inode; -+ mode_t mode; -+ } orig_h, tmp_h = { -+ .dentry = NULL -+ }; -+ struct au_hdentry *hd; -+ struct inode *inode, *h_inode; -+ struct dentry *h_dentry; -+ -+ err = 0; -+ AuDebugOn(dinfo->di_btop < 0); -+ orig_h.mode = 0; -+ orig_h.dentry = au_hdentry(dinfo, dinfo->di_btop)->hd_dentry; -+ orig_h.inode = NULL; -+ if (d_is_positive(orig_h.dentry)) { -+ orig_h.inode = d_inode(orig_h.dentry); -+ orig_h.mode = orig_h.inode->i_mode & S_IFMT; -+ } -+ if (tmp->di_btop >= 0) { -+ tmp_h.dentry = au_hdentry(tmp, tmp->di_btop)->hd_dentry; -+ if (d_is_positive(tmp_h.dentry)) { -+ tmp_h.inode = d_inode(tmp_h.dentry); -+ tmp_h.mode = tmp_h.inode->i_mode & S_IFMT; -+ } -+ } -+ -+ inode = NULL; -+ if (d_really_is_positive(dentry)) -+ inode = d_inode(dentry); -+ if (!orig_h.inode) { -+ AuDbg("negative originally\n"); -+ if (inode) { -+ au_hide(dentry); -+ goto out; -+ } -+ AuDebugOn(inode); -+ AuDebugOn(dinfo->di_btop != dinfo->di_bbot); -+ AuDebugOn(dinfo->di_bdiropq != -1); -+ -+ if (!tmp_h.inode) { -+ AuDbg("negative --> negative\n"); -+ /* should have only one negative lower */ -+ if (tmp->di_btop >= 0 -+ && tmp->di_btop < dinfo->di_btop) { -+ AuDebugOn(tmp->di_btop != tmp->di_bbot); -+ AuDebugOn(dinfo->di_btop != dinfo->di_bbot); -+ au_set_h_dptr(dentry, dinfo->di_btop, NULL); -+ au_di_cp(dinfo, tmp); -+ hd = au_hdentry(tmp, tmp->di_btop); -+ au_set_h_dptr(dentry, tmp->di_btop, -+ dget(hd->hd_dentry)); -+ } -+ au_dbg_verify_dinode(dentry); -+ } else { -+ AuDbg("negative --> positive\n"); -+ /* -+ * similar to the behaviour of creating with bypassing -+ * aufs. -+ * unhash it in order to force an error in the -+ * succeeding create operation. -+ * we should not set S_DEAD here. -+ */ -+ d_drop(dentry); -+ /* au_di_swap(tmp, dinfo); */ -+ au_dbg_verify_dinode(dentry); -+ } -+ } else { -+ AuDbg("positive originally\n"); -+ /* inode may be NULL */ -+ AuDebugOn(inode && (inode->i_mode & S_IFMT) != orig_h.mode); -+ if (!tmp_h.inode) { -+ AuDbg("positive --> negative\n"); -+ /* or bypassing aufs */ -+ au_hide(dentry); -+ if (tmp->di_bwh >= 0 && tmp->di_bwh <= dinfo->di_btop) -+ dinfo->di_bwh = tmp->di_bwh; -+ if (inode) -+ err = au_refresh_hinode_self(inode); -+ au_dbg_verify_dinode(dentry); -+ } else if (orig_h.mode == tmp_h.mode) { -+ AuDbg("positive --> positive, same type\n"); -+ if (!S_ISDIR(orig_h.mode) -+ && dinfo->di_btop > tmp->di_btop) { -+ /* -+ * similar to the behaviour of removing and -+ * creating. -+ */ -+ au_hide(dentry); -+ if (inode) -+ err = au_refresh_hinode_self(inode); -+ au_dbg_verify_dinode(dentry); -+ } else { -+ /* fill empty slots */ -+ if (dinfo->di_btop > tmp->di_btop) -+ dinfo->di_btop = tmp->di_btop; -+ if (dinfo->di_bbot < tmp->di_bbot) -+ dinfo->di_bbot = tmp->di_bbot; -+ dinfo->di_bwh = tmp->di_bwh; -+ dinfo->di_bdiropq = tmp->di_bdiropq; -+ bbot = dinfo->di_bbot; -+ bindex = tmp->di_btop; -+ hd = au_hdentry(tmp, bindex); -+ for (; bindex <= bbot; bindex++, hd++) { -+ if (au_h_dptr(dentry, bindex)) -+ continue; -+ h_dentry = hd->hd_dentry; -+ if (!h_dentry) -+ continue; -+ AuDebugOn(d_is_negative(h_dentry)); -+ h_inode = d_inode(h_dentry); -+ AuDebugOn(orig_h.mode -+ != (h_inode->i_mode -+ & S_IFMT)); -+ au_set_h_dptr(dentry, bindex, -+ dget(h_dentry)); -+ } -+ if (inode) -+ err = au_refresh_hinode(inode, dentry); -+ au_dbg_verify_dinode(dentry); -+ } -+ } else { -+ AuDbg("positive --> positive, different type\n"); -+ /* similar to the behaviour of removing and creating */ -+ au_hide(dentry); -+ if (inode) -+ err = au_refresh_hinode_self(inode); -+ au_dbg_verify_dinode(dentry); -+ } -+ } -+ -+out: -+ return err; -+} -+ -+void au_refresh_dop(struct dentry *dentry, int force_reval) -+{ -+ const struct dentry_operations *dop -+ = force_reval ? &aufs_dop : dentry->d_sb->s_d_op; -+ static const unsigned int mask -+ = DCACHE_OP_REVALIDATE | DCACHE_OP_WEAK_REVALIDATE; -+ -+ BUILD_BUG_ON(sizeof(mask) != sizeof(dentry->d_flags)); -+ -+ if (dentry->d_op == dop) -+ return; -+ -+ AuDbg("%pd\n", dentry); -+ spin_lock(&dentry->d_lock); -+ if (dop == &aufs_dop) -+ dentry->d_flags |= mask; -+ else -+ dentry->d_flags &= ~mask; -+ dentry->d_op = dop; -+ spin_unlock(&dentry->d_lock); -+} -+ -+int au_refresh_dentry(struct dentry *dentry, struct dentry *parent) -+{ -+ int err, ebrange, nbr; -+ unsigned int sigen; -+ struct au_dinfo *dinfo, *tmp; -+ struct super_block *sb; -+ struct inode *inode; -+ -+ DiMustWriteLock(dentry); -+ AuDebugOn(IS_ROOT(dentry)); -+ AuDebugOn(d_really_is_negative(parent)); -+ -+ sb = dentry->d_sb; -+ sigen = au_sigen(sb); -+ err = au_digen_test(parent, sigen); -+ if (unlikely(err)) -+ goto out; -+ -+ nbr = au_sbbot(sb) + 1; -+ dinfo = au_di(dentry); -+ err = au_di_realloc(dinfo, nbr, /*may_shrink*/0); -+ if (unlikely(err)) -+ goto out; -+ ebrange = au_dbrange_test(dentry); -+ if (!ebrange) -+ ebrange = au_do_refresh_hdentry(dentry, parent); -+ -+ if (d_unhashed(dentry) || ebrange /* || dinfo->di_tmpfile */) { -+ AuDebugOn(au_dbtop(dentry) < 0 && au_dbbot(dentry) >= 0); -+ if (d_really_is_positive(dentry)) { -+ inode = d_inode(dentry); -+ err = au_refresh_hinode_self(inode); -+ } -+ au_dbg_verify_dinode(dentry); -+ if (!err) -+ goto out_dgen; /* success */ -+ goto out; -+ } -+ -+ /* temporary dinfo */ -+ AuDbgDentry(dentry); -+ err = -ENOMEM; -+ tmp = au_di_alloc(sb, AuLsc_DI_TMP); -+ if (unlikely(!tmp)) -+ goto out; -+ au_di_swap(tmp, dinfo); -+ /* returns the number of positive dentries */ -+ /* -+ * if current working dir is removed, it returns an error. -+ * but the dentry is legal. -+ */ -+ err = au_lkup_dentry(dentry, /*btop*/0, AuLkup_ALLOW_NEG); -+ AuDbgDentry(dentry); -+ au_di_swap(tmp, dinfo); -+ if (err == -ENOENT) -+ err = 0; -+ if (err >= 0) { -+ /* compare/refresh by dinfo */ -+ AuDbgDentry(dentry); -+ err = au_refresh_by_dinfo(dentry, dinfo, tmp); -+ au_dbg_verify_dinode(dentry); -+ AuTraceErr(err); -+ } -+ au_di_realloc(dinfo, nbr, /*may_shrink*/1); /* harmless if err */ -+ au_rw_write_unlock(&tmp->di_rwsem); -+ au_di_free(tmp); -+ if (unlikely(err)) -+ goto out; -+ -+out_dgen: -+ au_update_digen(dentry); -+out: -+ if (unlikely(err && !(dentry->d_flags & DCACHE_NFSFS_RENAMED))) { -+ AuIOErr("failed refreshing %pd, %d\n", dentry, err); -+ AuDbgDentry(dentry); -+ } -+ AuTraceErr(err); -+ return err; -+} -+ -+static int au_do_h_d_reval(struct dentry *h_dentry, unsigned int flags, -+ struct dentry *dentry, aufs_bindex_t bindex) -+{ -+ int err, valid; -+ -+ err = 0; -+ if (!(h_dentry->d_flags & DCACHE_OP_REVALIDATE)) -+ goto out; -+ -+ AuDbg("b%d\n", bindex); -+ /* -+ * gave up supporting LOOKUP_CREATE/OPEN for lower fs, -+ * due to whiteout and branch permission. -+ */ -+ flags &= ~(/*LOOKUP_PARENT |*/ LOOKUP_OPEN | LOOKUP_CREATE -+ | LOOKUP_FOLLOW | LOOKUP_EXCL); -+ /* it may return tri-state */ -+ valid = h_dentry->d_op->d_revalidate(h_dentry, flags); -+ -+ if (unlikely(valid < 0)) -+ err = valid; -+ else if (!valid) -+ err = -EINVAL; -+ -+out: -+ AuTraceErr(err); -+ return err; -+} -+ -+/* todo: remove this */ -+static int h_d_revalidate(struct dentry *dentry, struct inode *inode, -+ unsigned int flags, int do_udba, int dirren) -+{ -+ int err; -+ umode_t mode, h_mode; -+ aufs_bindex_t bindex, btail, btop, ibs, ibe; -+ unsigned char plus, unhashed, is_root, h_plus, h_nfs, tmpfile; -+ struct inode *h_inode, *h_cached_inode; -+ struct dentry *h_dentry; -+ struct qstr *name, *h_name; -+ -+ err = 0; -+ plus = 0; -+ mode = 0; -+ ibs = -1; -+ ibe = -1; -+ unhashed = !!d_unhashed(dentry); -+ is_root = !!IS_ROOT(dentry); -+ name = &dentry->d_name; -+ tmpfile = au_di(dentry)->di_tmpfile; -+ -+ /* -+ * Theoretically, REVAL test should be unnecessary in case of -+ * {FS,I}NOTIFY. -+ * But {fs,i}notify doesn't fire some necessary events, -+ * IN_ATTRIB for atime/nlink/pageio -+ * Let's do REVAL test too. -+ */ -+ if (do_udba && inode) { -+ mode = (inode->i_mode & S_IFMT); -+ plus = (inode->i_nlink > 0); -+ ibs = au_ibtop(inode); -+ ibe = au_ibbot(inode); -+ } -+ -+ btop = au_dbtop(dentry); -+ btail = btop; -+ if (inode && S_ISDIR(inode->i_mode)) -+ btail = au_dbtaildir(dentry); -+ for (bindex = btop; bindex <= btail; bindex++) { -+ h_dentry = au_h_dptr(dentry, bindex); -+ if (!h_dentry) -+ continue; -+ -+ AuDbg("b%d, %pd\n", bindex, h_dentry); -+ h_nfs = !!au_test_nfs(h_dentry->d_sb); -+ spin_lock(&h_dentry->d_lock); -+ h_name = &h_dentry->d_name; -+ if (unlikely(do_udba -+ && !is_root -+ && ((!h_nfs -+ && (unhashed != !!d_unhashed(h_dentry) -+ || (!tmpfile && !dirren -+ && !au_qstreq(name, h_name)) -+ )) -+ || (h_nfs -+ && !(flags & LOOKUP_OPEN) -+ && (h_dentry->d_flags -+ & DCACHE_NFSFS_RENAMED))) -+ )) { -+ int h_unhashed; -+ -+ h_unhashed = d_unhashed(h_dentry); -+ spin_unlock(&h_dentry->d_lock); -+ AuDbg("unhash 0x%x 0x%x, %pd %pd\n", -+ unhashed, h_unhashed, dentry, h_dentry); -+ goto err; -+ } -+ spin_unlock(&h_dentry->d_lock); -+ -+ err = au_do_h_d_reval(h_dentry, flags, dentry, bindex); -+ if (unlikely(err)) -+ /* do not goto err, to keep the errno */ -+ break; -+ -+ /* todo: plink too? */ -+ if (!do_udba) -+ continue; -+ -+ /* UDBA tests */ -+ if (unlikely(!!inode != d_is_positive(h_dentry))) -+ goto err; -+ -+ h_inode = NULL; -+ if (d_is_positive(h_dentry)) -+ h_inode = d_inode(h_dentry); -+ h_plus = plus; -+ h_mode = mode; -+ h_cached_inode = h_inode; -+ if (h_inode) { -+ h_mode = (h_inode->i_mode & S_IFMT); -+ h_plus = (h_inode->i_nlink > 0); -+ } -+ if (inode && ibs <= bindex && bindex <= ibe) -+ h_cached_inode = au_h_iptr(inode, bindex); -+ -+ if (!h_nfs) { -+ if (unlikely(plus != h_plus && !tmpfile)) -+ goto err; -+ } else { -+ if (unlikely(!(h_dentry->d_flags & DCACHE_NFSFS_RENAMED) -+ && !is_root -+ && !IS_ROOT(h_dentry) -+ && unhashed != d_unhashed(h_dentry))) -+ goto err; -+ } -+ if (unlikely(mode != h_mode -+ || h_cached_inode != h_inode)) -+ goto err; -+ continue; -+ -+err: -+ err = -EINVAL; -+ break; -+ } -+ -+ AuTraceErr(err); -+ return err; -+} -+ -+/* todo: consolidate with do_refresh() and au_reval_for_attr() */ -+static int simple_reval_dpath(struct dentry *dentry, unsigned int sigen) -+{ -+ int err; -+ struct dentry *parent; -+ -+ if (!au_digen_test(dentry, sigen)) -+ return 0; -+ -+ parent = dget_parent(dentry); -+ di_read_lock_parent(parent, AuLock_IR); -+ AuDebugOn(au_digen_test(parent, sigen)); -+ au_dbg_verify_gen(parent, sigen); -+ err = au_refresh_dentry(dentry, parent); -+ di_read_unlock(parent, AuLock_IR); -+ dput(parent); -+ AuTraceErr(err); -+ return err; -+} -+ -+int au_reval_dpath(struct dentry *dentry, unsigned int sigen) -+{ -+ int err; -+ struct dentry *d, *parent; -+ -+ if (!au_ftest_si(au_sbi(dentry->d_sb), FAILED_REFRESH_DIR)) -+ return simple_reval_dpath(dentry, sigen); -+ -+ /* slow loop, keep it simple and stupid */ -+ /* cf: au_cpup_dirs() */ -+ err = 0; -+ parent = NULL; -+ while (au_digen_test(dentry, sigen)) { -+ d = dentry; -+ while (1) { -+ dput(parent); -+ parent = dget_parent(d); -+ if (!au_digen_test(parent, sigen)) -+ break; -+ d = parent; -+ } -+ -+ if (d != dentry) -+ di_write_lock_child2(d); -+ -+ /* someone might update our dentry while we were sleeping */ -+ if (au_digen_test(d, sigen)) { -+ /* -+ * todo: consolidate with simple_reval_dpath(), -+ * do_refresh() and au_reval_for_attr(). -+ */ -+ di_read_lock_parent(parent, AuLock_IR); -+ err = au_refresh_dentry(d, parent); -+ di_read_unlock(parent, AuLock_IR); -+ } -+ -+ if (d != dentry) -+ di_write_unlock(d); -+ dput(parent); -+ if (unlikely(err)) -+ break; -+ } -+ -+ return err; -+} -+ -+/* -+ * if valid returns 1, otherwise 0. -+ */ -+static int aufs_d_revalidate(struct dentry *dentry, unsigned int flags) -+{ -+ int valid, err; -+ unsigned int sigen; -+ unsigned char do_udba, dirren; -+ struct super_block *sb; -+ struct inode *inode; -+ -+ /* todo: support rcu-walk? */ -+ if (flags & LOOKUP_RCU) -+ return -ECHILD; -+ -+ valid = 0; -+ if (unlikely(!au_di(dentry))) -+ goto out; -+ -+ valid = 1; -+ sb = dentry->d_sb; -+ /* -+ * todo: very ugly -+ * i_mutex of parent dir may be held, -+ * but we should not return 'invalid' due to busy. -+ */ -+ err = aufs_read_lock(dentry, AuLock_FLUSH | AuLock_DW | AuLock_NOPLM); -+ if (unlikely(err)) { -+ valid = err; -+ AuTraceErr(err); -+ goto out; -+ } -+ inode = NULL; -+ if (d_really_is_positive(dentry)) -+ inode = d_inode(dentry); -+ if (unlikely(inode && au_is_bad_inode(inode))) { -+ err = -EINVAL; -+ AuTraceErr(err); -+ goto out_dgrade; -+ } -+ if (unlikely(au_dbrange_test(dentry))) { -+ err = -EINVAL; -+ AuTraceErr(err); -+ goto out_dgrade; -+ } -+ -+ sigen = au_sigen(sb); -+ if (au_digen_test(dentry, sigen)) { -+ AuDebugOn(IS_ROOT(dentry)); -+ err = au_reval_dpath(dentry, sigen); -+ if (unlikely(err)) { -+ AuTraceErr(err); -+ goto out_dgrade; -+ } -+ } -+ di_downgrade_lock(dentry, AuLock_IR); -+ -+ err = -EINVAL; -+ if (!(flags & (LOOKUP_OPEN | LOOKUP_EMPTY)) -+ && inode -+ && !(inode->i_state && I_LINKABLE) -+ && (IS_DEADDIR(inode) || !inode->i_nlink)) { -+ AuTraceErr(err); -+ goto out_inval; -+ } -+ -+ do_udba = !au_opt_test(au_mntflags(sb), UDBA_NONE); -+ if (do_udba && inode) { -+ aufs_bindex_t btop = au_ibtop(inode); -+ struct inode *h_inode; -+ -+ if (btop >= 0) { -+ h_inode = au_h_iptr(inode, btop); -+ if (h_inode && au_test_higen(inode, h_inode)) { -+ AuTraceErr(err); -+ goto out_inval; -+ } -+ } -+ } -+ -+ dirren = !!au_opt_test(au_mntflags(sb), DIRREN); -+ err = h_d_revalidate(dentry, inode, flags, do_udba, dirren); -+ if (unlikely(!err && do_udba && au_dbtop(dentry) < 0)) { -+ err = -EIO; -+ AuDbg("both of real entry and whiteout found, %p, err %d\n", -+ dentry, err); -+ } -+ goto out_inval; -+ -+out_dgrade: -+ di_downgrade_lock(dentry, AuLock_IR); -+out_inval: -+ aufs_read_unlock(dentry, AuLock_IR); -+ AuTraceErr(err); -+ valid = !err; -+out: -+ if (!valid) { -+ AuDbg("%pd invalid, %d\n", dentry, valid); -+ d_drop(dentry); -+ } -+ return valid; -+} -+ -+static void aufs_d_release(struct dentry *dentry) -+{ -+ if (au_di(dentry)) { -+ au_di_fin(dentry); -+ au_hn_di_reinit(dentry); -+ } -+} -+ -+const struct dentry_operations aufs_dop = { -+ .d_revalidate = aufs_d_revalidate, -+ .d_weak_revalidate = aufs_d_revalidate, -+ .d_release = aufs_d_release -+}; -+ -+/* aufs_dop without d_revalidate */ -+const struct dentry_operations aufs_dop_noreval = { -+ .d_release = aufs_d_release -+}; -diff --git a/fs/aufs/dentry.h b/fs/aufs/dentry.h -new file mode 100644 -index 000000000000..086f6ccf4b15 ---- /dev/null -+++ b/fs/aufs/dentry.h -@@ -0,0 +1,255 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * lookup and dentry operations -+ */ -+ -+#ifndef __AUFS_DENTRY_H__ -+#define __AUFS_DENTRY_H__ -+ -+#ifdef __KERNEL__ -+ -+#include -+#include "dirren.h" -+#include "rwsem.h" -+ -+struct au_hdentry { -+ struct dentry *hd_dentry; -+ aufs_bindex_t hd_id; -+}; -+ -+struct au_dinfo { -+ atomic_t di_generation; -+ -+ struct au_rwsem di_rwsem; -+ aufs_bindex_t di_btop, di_bbot, di_bwh, di_bdiropq; -+ unsigned char di_tmpfile; /* to allow the different name */ -+ struct au_hdentry *di_hdentry; -+ struct rcu_head rcu; -+} ____cacheline_aligned_in_smp; -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* flags for au_lkup_dentry() */ -+#define AuLkup_ALLOW_NEG 1 -+#define AuLkup_IGNORE_PERM (1 << 1) -+#define AuLkup_DIRREN (1 << 2) -+#define au_ftest_lkup(flags, name) ((flags) & AuLkup_##name) -+#define au_fset_lkup(flags, name) \ -+ do { (flags) |= AuLkup_##name; } while (0) -+#define au_fclr_lkup(flags, name) \ -+ do { (flags) &= ~AuLkup_##name; } while (0) -+ -+#ifndef CONFIG_AUFS_DIRREN -+#undef AuLkup_DIRREN -+#define AuLkup_DIRREN 0 -+#endif -+ -+struct au_do_lookup_args { -+ unsigned int flags; -+ mode_t type; -+ struct qstr whname, *name; -+ struct au_dr_lookup dirren; -+}; -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* dentry.c */ -+extern const struct dentry_operations aufs_dop, aufs_dop_noreval; -+struct au_branch; -+struct dentry *au_sio_lkup_one(struct qstr *name, struct dentry *parent); -+int au_h_verify(struct dentry *h_dentry, unsigned int udba, struct inode *h_dir, -+ struct dentry *h_parent, struct au_branch *br); -+ -+int au_lkup_dentry(struct dentry *dentry, aufs_bindex_t btop, -+ unsigned int flags); -+int au_lkup_neg(struct dentry *dentry, aufs_bindex_t bindex, int wh); -+int au_refresh_dentry(struct dentry *dentry, struct dentry *parent); -+int au_reval_dpath(struct dentry *dentry, unsigned int sigen); -+void au_refresh_dop(struct dentry *dentry, int force_reval); -+ -+/* dinfo.c */ -+void au_di_init_once(void *_di); -+struct au_dinfo *au_di_alloc(struct super_block *sb, unsigned int lsc); -+void au_di_free(struct au_dinfo *dinfo); -+void au_di_swap(struct au_dinfo *a, struct au_dinfo *b); -+void au_di_cp(struct au_dinfo *dst, struct au_dinfo *src); -+int au_di_init(struct dentry *dentry); -+void au_di_fin(struct dentry *dentry); -+int au_di_realloc(struct au_dinfo *dinfo, int nbr, int may_shrink); -+ -+void di_read_lock(struct dentry *d, int flags, unsigned int lsc); -+void di_read_unlock(struct dentry *d, int flags); -+void di_downgrade_lock(struct dentry *d, int flags); -+void di_write_lock(struct dentry *d, unsigned int lsc); -+void di_write_unlock(struct dentry *d); -+void di_write_lock2_child(struct dentry *d1, struct dentry *d2, int isdir); -+void di_write_lock2_parent(struct dentry *d1, struct dentry *d2, int isdir); -+void di_write_unlock2(struct dentry *d1, struct dentry *d2); -+ -+struct dentry *au_h_dptr(struct dentry *dentry, aufs_bindex_t bindex); -+struct dentry *au_h_d_alias(struct dentry *dentry, aufs_bindex_t bindex); -+aufs_bindex_t au_dbtail(struct dentry *dentry); -+aufs_bindex_t au_dbtaildir(struct dentry *dentry); -+ -+void au_set_h_dptr(struct dentry *dentry, aufs_bindex_t bindex, -+ struct dentry *h_dentry); -+int au_digen_test(struct dentry *dentry, unsigned int sigen); -+int au_dbrange_test(struct dentry *dentry); -+void au_update_digen(struct dentry *dentry); -+void au_update_dbrange(struct dentry *dentry, int do_put_zero); -+void au_update_dbtop(struct dentry *dentry); -+void au_update_dbbot(struct dentry *dentry); -+int au_find_dbindex(struct dentry *dentry, struct dentry *h_dentry); -+ -+/* ---------------------------------------------------------------------- */ -+ -+static inline struct au_dinfo *au_di(struct dentry *dentry) -+{ -+ return dentry->d_fsdata; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* lock subclass for dinfo */ -+enum { -+ AuLsc_DI_CHILD, /* child first */ -+ AuLsc_DI_CHILD2, /* rename(2), link(2), and cpup at hnotify */ -+ AuLsc_DI_CHILD3, /* copyup dirs */ -+ AuLsc_DI_PARENT, -+ AuLsc_DI_PARENT2, -+ AuLsc_DI_PARENT3, -+ AuLsc_DI_TMP /* temp for replacing dinfo */ -+}; -+ -+/* -+ * di_read_lock_child, di_write_lock_child, -+ * di_read_lock_child2, di_write_lock_child2, -+ * di_read_lock_child3, di_write_lock_child3, -+ * di_read_lock_parent, di_write_lock_parent, -+ * di_read_lock_parent2, di_write_lock_parent2, -+ * di_read_lock_parent3, di_write_lock_parent3, -+ */ -+#define AuReadLockFunc(name, lsc) \ -+static inline void di_read_lock_##name(struct dentry *d, int flags) \ -+{ di_read_lock(d, flags, AuLsc_DI_##lsc); } -+ -+#define AuWriteLockFunc(name, lsc) \ -+static inline void di_write_lock_##name(struct dentry *d) \ -+{ di_write_lock(d, AuLsc_DI_##lsc); } -+ -+#define AuRWLockFuncs(name, lsc) \ -+ AuReadLockFunc(name, lsc) \ -+ AuWriteLockFunc(name, lsc) -+ -+AuRWLockFuncs(child, CHILD); -+AuRWLockFuncs(child2, CHILD2); -+AuRWLockFuncs(child3, CHILD3); -+AuRWLockFuncs(parent, PARENT); -+AuRWLockFuncs(parent2, PARENT2); -+AuRWLockFuncs(parent3, PARENT3); -+ -+#undef AuReadLockFunc -+#undef AuWriteLockFunc -+#undef AuRWLockFuncs -+ -+#define DiMustNoWaiters(d) AuRwMustNoWaiters(&au_di(d)->di_rwsem) -+#define DiMustAnyLock(d) AuRwMustAnyLock(&au_di(d)->di_rwsem) -+#define DiMustWriteLock(d) AuRwMustWriteLock(&au_di(d)->di_rwsem) -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* todo: memory barrier? */ -+static inline unsigned int au_digen(struct dentry *d) -+{ -+ return atomic_read(&au_di(d)->di_generation); -+} -+ -+static inline void au_h_dentry_init(struct au_hdentry *hdentry) -+{ -+ hdentry->hd_dentry = NULL; -+} -+ -+static inline struct au_hdentry *au_hdentry(struct au_dinfo *di, -+ aufs_bindex_t bindex) -+{ -+ return di->di_hdentry + bindex; -+} -+ -+static inline void au_hdput(struct au_hdentry *hd) -+{ -+ if (hd) -+ dput(hd->hd_dentry); -+} -+ -+static inline aufs_bindex_t au_dbtop(struct dentry *dentry) -+{ -+ DiMustAnyLock(dentry); -+ return au_di(dentry)->di_btop; -+} -+ -+static inline aufs_bindex_t au_dbbot(struct dentry *dentry) -+{ -+ DiMustAnyLock(dentry); -+ return au_di(dentry)->di_bbot; -+} -+ -+static inline aufs_bindex_t au_dbwh(struct dentry *dentry) -+{ -+ DiMustAnyLock(dentry); -+ return au_di(dentry)->di_bwh; -+} -+ -+static inline aufs_bindex_t au_dbdiropq(struct dentry *dentry) -+{ -+ DiMustAnyLock(dentry); -+ return au_di(dentry)->di_bdiropq; -+} -+ -+/* todo: hard/soft set? */ -+static inline void au_set_dbtop(struct dentry *dentry, aufs_bindex_t bindex) -+{ -+ DiMustWriteLock(dentry); -+ au_di(dentry)->di_btop = bindex; -+} -+ -+static inline void au_set_dbbot(struct dentry *dentry, aufs_bindex_t bindex) -+{ -+ DiMustWriteLock(dentry); -+ au_di(dentry)->di_bbot = bindex; -+} -+ -+static inline void au_set_dbwh(struct dentry *dentry, aufs_bindex_t bindex) -+{ -+ DiMustWriteLock(dentry); -+ /* dbwh can be outside of btop - bbot range */ -+ au_di(dentry)->di_bwh = bindex; -+} -+ -+static inline void au_set_dbdiropq(struct dentry *dentry, aufs_bindex_t bindex) -+{ -+ DiMustWriteLock(dentry); -+ au_di(dentry)->di_bdiropq = bindex; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+#ifdef CONFIG_AUFS_HNOTIFY -+static inline void au_digen_dec(struct dentry *d) -+{ -+ atomic_dec(&au_di(d)->di_generation); -+} -+ -+static inline void au_hn_di_reinit(struct dentry *dentry) -+{ -+ dentry->d_fsdata = NULL; -+} -+#else -+AuStubVoid(au_hn_di_reinit, struct dentry *dentry __maybe_unused) -+#endif /* CONFIG_AUFS_HNOTIFY */ -+ -+#endif /* __KERNEL__ */ -+#endif /* __AUFS_DENTRY_H__ */ -diff --git a/fs/aufs/dinfo.c b/fs/aufs/dinfo.c -new file mode 100644 -index 000000000000..aed5314e5e24 ---- /dev/null -+++ b/fs/aufs/dinfo.c -@@ -0,0 +1,541 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * dentry private data -+ */ -+ -+#include "aufs.h" -+ -+void au_di_init_once(void *_dinfo) -+{ -+ struct au_dinfo *dinfo = _dinfo; -+ -+ au_rw_init(&dinfo->di_rwsem); -+} -+ -+struct au_dinfo *au_di_alloc(struct super_block *sb, unsigned int lsc) -+{ -+ struct au_dinfo *dinfo; -+ int nbr, i; -+ -+ dinfo = au_cache_alloc_dinfo(); -+ if (unlikely(!dinfo)) -+ goto out; -+ -+ nbr = au_sbbot(sb) + 1; -+ if (nbr <= 0) -+ nbr = 1; -+ dinfo->di_hdentry = kcalloc(nbr, sizeof(*dinfo->di_hdentry), GFP_NOFS); -+ if (dinfo->di_hdentry) { -+ au_rw_write_lock_nested(&dinfo->di_rwsem, lsc); -+ dinfo->di_btop = -1; -+ dinfo->di_bbot = -1; -+ dinfo->di_bwh = -1; -+ dinfo->di_bdiropq = -1; -+ dinfo->di_tmpfile = 0; -+ for (i = 0; i < nbr; i++) -+ dinfo->di_hdentry[i].hd_id = -1; -+ goto out; -+ } -+ -+ au_cache_free_dinfo(dinfo); -+ dinfo = NULL; -+ -+out: -+ return dinfo; -+} -+ -+void au_di_free(struct au_dinfo *dinfo) -+{ -+ struct au_hdentry *p; -+ aufs_bindex_t bbot, bindex; -+ -+ /* dentry may not be revalidated */ -+ bindex = dinfo->di_btop; -+ if (bindex >= 0) { -+ bbot = dinfo->di_bbot; -+ p = au_hdentry(dinfo, bindex); -+ while (bindex++ <= bbot) -+ au_hdput(p++); -+ } -+ au_kfree_try_rcu(dinfo->di_hdentry); -+ au_cache_free_dinfo(dinfo); -+} -+ -+void au_di_swap(struct au_dinfo *a, struct au_dinfo *b) -+{ -+ struct au_hdentry *p; -+ aufs_bindex_t bi; -+ -+ AuRwMustWriteLock(&a->di_rwsem); -+ AuRwMustWriteLock(&b->di_rwsem); -+ -+#define DiSwap(v, name) \ -+ do { \ -+ v = a->di_##name; \ -+ a->di_##name = b->di_##name; \ -+ b->di_##name = v; \ -+ } while (0) -+ -+ DiSwap(p, hdentry); -+ DiSwap(bi, btop); -+ DiSwap(bi, bbot); -+ DiSwap(bi, bwh); -+ DiSwap(bi, bdiropq); -+ /* smp_mb(); */ -+ -+#undef DiSwap -+} -+ -+void au_di_cp(struct au_dinfo *dst, struct au_dinfo *src) -+{ -+ AuRwMustWriteLock(&dst->di_rwsem); -+ AuRwMustWriteLock(&src->di_rwsem); -+ -+ dst->di_btop = src->di_btop; -+ dst->di_bbot = src->di_bbot; -+ dst->di_bwh = src->di_bwh; -+ dst->di_bdiropq = src->di_bdiropq; -+ /* smp_mb(); */ -+} -+ -+int au_di_init(struct dentry *dentry) -+{ -+ int err; -+ struct super_block *sb; -+ struct au_dinfo *dinfo; -+ -+ err = 0; -+ sb = dentry->d_sb; -+ dinfo = au_di_alloc(sb, AuLsc_DI_CHILD); -+ if (dinfo) { -+ atomic_set(&dinfo->di_generation, au_sigen(sb)); -+ /* smp_mb(); */ /* atomic_set */ -+ dentry->d_fsdata = dinfo; -+ } else -+ err = -ENOMEM; -+ -+ return err; -+} -+ -+void au_di_fin(struct dentry *dentry) -+{ -+ struct au_dinfo *dinfo; -+ -+ dinfo = au_di(dentry); -+ AuRwDestroy(&dinfo->di_rwsem); -+ au_di_free(dinfo); -+} -+ -+int au_di_realloc(struct au_dinfo *dinfo, int nbr, int may_shrink) -+{ -+ int err, sz; -+ struct au_hdentry *hdp; -+ -+ AuRwMustWriteLock(&dinfo->di_rwsem); -+ -+ err = -ENOMEM; -+ sz = sizeof(*hdp) * (dinfo->di_bbot + 1); -+ if (!sz) -+ sz = sizeof(*hdp); -+ hdp = au_kzrealloc(dinfo->di_hdentry, sz, sizeof(*hdp) * nbr, GFP_NOFS, -+ may_shrink); -+ if (hdp) { -+ dinfo->di_hdentry = hdp; -+ err = 0; -+ } -+ -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+static void do_ii_write_lock(struct inode *inode, unsigned int lsc) -+{ -+ switch (lsc) { -+ case AuLsc_DI_CHILD: -+ ii_write_lock_child(inode); -+ break; -+ case AuLsc_DI_CHILD2: -+ ii_write_lock_child2(inode); -+ break; -+ case AuLsc_DI_CHILD3: -+ ii_write_lock_child3(inode); -+ break; -+ case AuLsc_DI_PARENT: -+ ii_write_lock_parent(inode); -+ break; -+ case AuLsc_DI_PARENT2: -+ ii_write_lock_parent2(inode); -+ break; -+ case AuLsc_DI_PARENT3: -+ ii_write_lock_parent3(inode); -+ break; -+ default: -+ BUG(); -+ } -+} -+ -+static void do_ii_read_lock(struct inode *inode, unsigned int lsc) -+{ -+ switch (lsc) { -+ case AuLsc_DI_CHILD: -+ ii_read_lock_child(inode); -+ break; -+ case AuLsc_DI_CHILD2: -+ ii_read_lock_child2(inode); -+ break; -+ case AuLsc_DI_CHILD3: -+ ii_read_lock_child3(inode); -+ break; -+ case AuLsc_DI_PARENT: -+ ii_read_lock_parent(inode); -+ break; -+ case AuLsc_DI_PARENT2: -+ ii_read_lock_parent2(inode); -+ break; -+ case AuLsc_DI_PARENT3: -+ ii_read_lock_parent3(inode); -+ break; -+ default: -+ BUG(); -+ } -+} -+ -+void di_read_lock(struct dentry *d, int flags, unsigned int lsc) -+{ -+ struct inode *inode; -+ -+ au_rw_read_lock_nested(&au_di(d)->di_rwsem, lsc); -+ if (d_really_is_positive(d)) { -+ inode = d_inode(d); -+ if (au_ftest_lock(flags, IW)) -+ do_ii_write_lock(inode, lsc); -+ else if (au_ftest_lock(flags, IR)) -+ do_ii_read_lock(inode, lsc); -+ } -+} -+ -+void di_read_unlock(struct dentry *d, int flags) -+{ -+ struct inode *inode; -+ -+ if (d_really_is_positive(d)) { -+ inode = d_inode(d); -+ if (au_ftest_lock(flags, IW)) { -+ au_dbg_verify_dinode(d); -+ ii_write_unlock(inode); -+ } else if (au_ftest_lock(flags, IR)) { -+ au_dbg_verify_dinode(d); -+ ii_read_unlock(inode); -+ } -+ } -+ au_rw_read_unlock(&au_di(d)->di_rwsem); -+} -+ -+void di_downgrade_lock(struct dentry *d, int flags) -+{ -+ if (d_really_is_positive(d) && au_ftest_lock(flags, IR)) -+ ii_downgrade_lock(d_inode(d)); -+ au_rw_dgrade_lock(&au_di(d)->di_rwsem); -+} -+ -+void di_write_lock(struct dentry *d, unsigned int lsc) -+{ -+ au_rw_write_lock_nested(&au_di(d)->di_rwsem, lsc); -+ if (d_really_is_positive(d)) -+ do_ii_write_lock(d_inode(d), lsc); -+} -+ -+void di_write_unlock(struct dentry *d) -+{ -+ au_dbg_verify_dinode(d); -+ if (d_really_is_positive(d)) -+ ii_write_unlock(d_inode(d)); -+ au_rw_write_unlock(&au_di(d)->di_rwsem); -+} -+ -+void di_write_lock2_child(struct dentry *d1, struct dentry *d2, int isdir) -+{ -+ AuDebugOn(d1 == d2 -+ || d_inode(d1) == d_inode(d2) -+ || d1->d_sb != d2->d_sb); -+ -+ if ((isdir && au_test_subdir(d1, d2)) -+ || d1 < d2) { -+ di_write_lock_child(d1); -+ di_write_lock_child2(d2); -+ } else { -+ di_write_lock_child(d2); -+ di_write_lock_child2(d1); -+ } -+} -+ -+void di_write_lock2_parent(struct dentry *d1, struct dentry *d2, int isdir) -+{ -+ AuDebugOn(d1 == d2 -+ || d_inode(d1) == d_inode(d2) -+ || d1->d_sb != d2->d_sb); -+ -+ if ((isdir && au_test_subdir(d1, d2)) -+ || d1 < d2) { -+ di_write_lock_parent(d1); -+ di_write_lock_parent2(d2); -+ } else { -+ di_write_lock_parent(d2); -+ di_write_lock_parent2(d1); -+ } -+} -+ -+void di_write_unlock2(struct dentry *d1, struct dentry *d2) -+{ -+ di_write_unlock(d1); -+ if (d_inode(d1) == d_inode(d2)) -+ au_rw_write_unlock(&au_di(d2)->di_rwsem); -+ else -+ di_write_unlock(d2); -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+struct dentry *au_h_dptr(struct dentry *dentry, aufs_bindex_t bindex) -+{ -+ struct dentry *d; -+ -+ DiMustAnyLock(dentry); -+ -+ if (au_dbtop(dentry) < 0 || bindex < au_dbtop(dentry)) -+ return NULL; -+ AuDebugOn(bindex < 0); -+ d = au_hdentry(au_di(dentry), bindex)->hd_dentry; -+ AuDebugOn(d && au_dcount(d) <= 0); -+ return d; -+} -+ -+/* -+ * extended version of au_h_dptr(). -+ * returns a hashed and positive (or linkable) h_dentry in bindex, NULL, or -+ * error. -+ */ -+struct dentry *au_h_d_alias(struct dentry *dentry, aufs_bindex_t bindex) -+{ -+ struct dentry *h_dentry; -+ struct inode *inode, *h_inode; -+ -+ AuDebugOn(d_really_is_negative(dentry)); -+ -+ h_dentry = NULL; -+ if (au_dbtop(dentry) <= bindex -+ && bindex <= au_dbbot(dentry)) -+ h_dentry = au_h_dptr(dentry, bindex); -+ if (h_dentry && !au_d_linkable(h_dentry)) { -+ dget(h_dentry); -+ goto out; /* success */ -+ } -+ -+ inode = d_inode(dentry); -+ AuDebugOn(bindex < au_ibtop(inode)); -+ AuDebugOn(au_ibbot(inode) < bindex); -+ h_inode = au_h_iptr(inode, bindex); -+ h_dentry = d_find_alias(h_inode); -+ if (h_dentry) { -+ if (!IS_ERR(h_dentry)) { -+ if (!au_d_linkable(h_dentry)) -+ goto out; /* success */ -+ dput(h_dentry); -+ } else -+ goto out; -+ } -+ -+ if (au_opt_test(au_mntflags(dentry->d_sb), PLINK)) { -+ h_dentry = au_plink_lkup(inode, bindex); -+ AuDebugOn(!h_dentry); -+ if (!IS_ERR(h_dentry)) { -+ if (!au_d_hashed_positive(h_dentry)) -+ goto out; /* success */ -+ dput(h_dentry); -+ h_dentry = NULL; -+ } -+ } -+ -+out: -+ AuDbgDentry(h_dentry); -+ return h_dentry; -+} -+ -+aufs_bindex_t au_dbtail(struct dentry *dentry) -+{ -+ aufs_bindex_t bbot, bwh; -+ -+ bbot = au_dbbot(dentry); -+ if (0 <= bbot) { -+ bwh = au_dbwh(dentry); -+ if (!bwh) -+ return bwh; -+ if (0 < bwh && bwh < bbot) -+ return bwh - 1; -+ } -+ return bbot; -+} -+ -+aufs_bindex_t au_dbtaildir(struct dentry *dentry) -+{ -+ aufs_bindex_t bbot, bopq; -+ -+ bbot = au_dbtail(dentry); -+ if (0 <= bbot) { -+ bopq = au_dbdiropq(dentry); -+ if (0 <= bopq && bopq < bbot) -+ bbot = bopq; -+ } -+ return bbot; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+void au_set_h_dptr(struct dentry *dentry, aufs_bindex_t bindex, -+ struct dentry *h_dentry) -+{ -+ struct au_dinfo *dinfo; -+ struct au_hdentry *hd; -+ struct au_branch *br; -+ -+ DiMustWriteLock(dentry); -+ -+ dinfo = au_di(dentry); -+ hd = au_hdentry(dinfo, bindex); -+ au_hdput(hd); -+ hd->hd_dentry = h_dentry; -+ if (h_dentry) { -+ br = au_sbr(dentry->d_sb, bindex); -+ hd->hd_id = br->br_id; -+ } -+} -+ -+int au_dbrange_test(struct dentry *dentry) -+{ -+ int err; -+ aufs_bindex_t btop, bbot; -+ -+ err = 0; -+ btop = au_dbtop(dentry); -+ bbot = au_dbbot(dentry); -+ if (btop >= 0) -+ AuDebugOn(bbot < 0 && btop > bbot); -+ else { -+ err = -EIO; -+ AuDebugOn(bbot >= 0); -+ } -+ -+ return err; -+} -+ -+int au_digen_test(struct dentry *dentry, unsigned int sigen) -+{ -+ int err; -+ -+ err = 0; -+ if (unlikely(au_digen(dentry) != sigen -+ || au_iigen_test(d_inode(dentry), sigen))) -+ err = -EIO; -+ -+ return err; -+} -+ -+void au_update_digen(struct dentry *dentry) -+{ -+ atomic_set(&au_di(dentry)->di_generation, au_sigen(dentry->d_sb)); -+ /* smp_mb(); */ /* atomic_set */ -+} -+ -+void au_update_dbrange(struct dentry *dentry, int do_put_zero) -+{ -+ struct au_dinfo *dinfo; -+ struct dentry *h_d; -+ struct au_hdentry *hdp; -+ aufs_bindex_t bindex, bbot; -+ -+ DiMustWriteLock(dentry); -+ -+ dinfo = au_di(dentry); -+ if (!dinfo || dinfo->di_btop < 0) -+ return; -+ -+ if (do_put_zero) { -+ bbot = dinfo->di_bbot; -+ bindex = dinfo->di_btop; -+ hdp = au_hdentry(dinfo, bindex); -+ for (; bindex <= bbot; bindex++, hdp++) { -+ h_d = hdp->hd_dentry; -+ if (h_d && d_is_negative(h_d)) -+ au_set_h_dptr(dentry, bindex, NULL); -+ } -+ } -+ -+ dinfo->di_btop = 0; -+ hdp = au_hdentry(dinfo, dinfo->di_btop); -+ for (; dinfo->di_btop <= dinfo->di_bbot; dinfo->di_btop++, hdp++) -+ if (hdp->hd_dentry) -+ break; -+ if (dinfo->di_btop > dinfo->di_bbot) { -+ dinfo->di_btop = -1; -+ dinfo->di_bbot = -1; -+ return; -+ } -+ -+ hdp = au_hdentry(dinfo, dinfo->di_bbot); -+ for (; dinfo->di_bbot >= 0; dinfo->di_bbot--, hdp--) -+ if (hdp->hd_dentry) -+ break; -+ AuDebugOn(dinfo->di_btop > dinfo->di_bbot || dinfo->di_bbot < 0); -+} -+ -+void au_update_dbtop(struct dentry *dentry) -+{ -+ aufs_bindex_t bindex, bbot; -+ struct dentry *h_dentry; -+ -+ bbot = au_dbbot(dentry); -+ for (bindex = au_dbtop(dentry); bindex <= bbot; bindex++) { -+ h_dentry = au_h_dptr(dentry, bindex); -+ if (!h_dentry) -+ continue; -+ if (d_is_positive(h_dentry)) { -+ au_set_dbtop(dentry, bindex); -+ return; -+ } -+ au_set_h_dptr(dentry, bindex, NULL); -+ } -+} -+ -+void au_update_dbbot(struct dentry *dentry) -+{ -+ aufs_bindex_t bindex, btop; -+ struct dentry *h_dentry; -+ -+ btop = au_dbtop(dentry); -+ for (bindex = au_dbbot(dentry); bindex >= btop; bindex--) { -+ h_dentry = au_h_dptr(dentry, bindex); -+ if (!h_dentry) -+ continue; -+ if (d_is_positive(h_dentry)) { -+ au_set_dbbot(dentry, bindex); -+ return; -+ } -+ au_set_h_dptr(dentry, bindex, NULL); -+ } -+} -+ -+int au_find_dbindex(struct dentry *dentry, struct dentry *h_dentry) -+{ -+ aufs_bindex_t bindex, bbot; -+ -+ bbot = au_dbbot(dentry); -+ for (bindex = au_dbtop(dentry); bindex <= bbot; bindex++) -+ if (au_h_dptr(dentry, bindex) == h_dentry) -+ return bindex; -+ return -1; -+} -diff --git a/fs/aufs/dir.c b/fs/aufs/dir.c -new file mode 100644 -index 000000000000..44adae19efb1 ---- /dev/null -+++ b/fs/aufs/dir.c -@@ -0,0 +1,750 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * directory operations -+ */ -+ -+#include -+#include -+#include "aufs.h" -+ -+void au_add_nlink(struct inode *dir, struct inode *h_dir) -+{ -+ unsigned int nlink; -+ -+ AuDebugOn(!S_ISDIR(dir->i_mode) || !S_ISDIR(h_dir->i_mode)); -+ -+ nlink = dir->i_nlink; -+ nlink += h_dir->i_nlink - 2; -+ if (h_dir->i_nlink < 2) -+ nlink += 2; -+ smp_mb(); /* for i_nlink */ -+ /* 0 can happen in revaliding */ -+ set_nlink(dir, nlink); -+} -+ -+void au_sub_nlink(struct inode *dir, struct inode *h_dir) -+{ -+ unsigned int nlink; -+ -+ AuDebugOn(!S_ISDIR(dir->i_mode) || !S_ISDIR(h_dir->i_mode)); -+ -+ nlink = dir->i_nlink; -+ nlink -= h_dir->i_nlink - 2; -+ if (h_dir->i_nlink < 2) -+ nlink -= 2; -+ smp_mb(); /* for i_nlink */ -+ /* nlink == 0 means the branch-fs is broken */ -+ set_nlink(dir, nlink); -+} -+ -+loff_t au_dir_size(struct file *file, struct dentry *dentry) -+{ -+ loff_t sz; -+ aufs_bindex_t bindex, bbot; -+ struct file *h_file; -+ struct dentry *h_dentry; -+ -+ sz = 0; -+ if (file) { -+ AuDebugOn(!d_is_dir(file->f_path.dentry)); -+ -+ bbot = au_fbbot_dir(file); -+ for (bindex = au_fbtop(file); -+ bindex <= bbot && sz < KMALLOC_MAX_SIZE; -+ bindex++) { -+ h_file = au_hf_dir(file, bindex); -+ if (h_file && file_inode(h_file)) -+ sz += vfsub_f_size_read(h_file); -+ } -+ } else { -+ AuDebugOn(!dentry); -+ AuDebugOn(!d_is_dir(dentry)); -+ -+ bbot = au_dbtaildir(dentry); -+ for (bindex = au_dbtop(dentry); -+ bindex <= bbot && sz < KMALLOC_MAX_SIZE; -+ bindex++) { -+ h_dentry = au_h_dptr(dentry, bindex); -+ if (h_dentry && d_is_positive(h_dentry)) -+ sz += i_size_read(d_inode(h_dentry)); -+ } -+ } -+ if (sz < KMALLOC_MAX_SIZE) -+ sz = roundup_pow_of_two(sz); -+ if (sz > KMALLOC_MAX_SIZE) -+ sz = KMALLOC_MAX_SIZE; -+ else if (sz < NAME_MAX) { -+ BUILD_BUG_ON(AUFS_RDBLK_DEF < NAME_MAX); -+ sz = AUFS_RDBLK_DEF; -+ } -+ return sz; -+} -+ -+struct au_dir_ts_arg { -+ struct dentry *dentry; -+ aufs_bindex_t brid; -+}; -+ -+static void au_do_dir_ts(void *arg) -+{ -+ struct au_dir_ts_arg *a = arg; -+ struct au_dtime dt; -+ struct path h_path; -+ struct inode *dir, *h_dir; -+ struct super_block *sb; -+ struct au_branch *br; -+ struct au_hinode *hdir; -+ int err; -+ aufs_bindex_t btop, bindex; -+ -+ sb = a->dentry->d_sb; -+ if (d_really_is_negative(a->dentry)) -+ goto out; -+ /* no dir->i_mutex lock */ -+ aufs_read_lock(a->dentry, AuLock_DW); /* noflush */ -+ -+ dir = d_inode(a->dentry); -+ btop = au_ibtop(dir); -+ bindex = au_br_index(sb, a->brid); -+ if (bindex < btop) -+ goto out_unlock; -+ -+ br = au_sbr(sb, bindex); -+ h_path.dentry = au_h_dptr(a->dentry, bindex); -+ if (!h_path.dentry) -+ goto out_unlock; -+ h_path.mnt = au_br_mnt(br); -+ au_dtime_store(&dt, a->dentry, &h_path); -+ -+ br = au_sbr(sb, btop); -+ if (!au_br_writable(br->br_perm)) -+ goto out_unlock; -+ h_path.dentry = au_h_dptr(a->dentry, btop); -+ h_path.mnt = au_br_mnt(br); -+ err = vfsub_mnt_want_write(h_path.mnt); -+ if (err) -+ goto out_unlock; -+ hdir = au_hi(dir, btop); -+ au_hn_inode_lock_nested(hdir, AuLsc_I_PARENT); -+ h_dir = au_h_iptr(dir, btop); -+ if (h_dir->i_nlink -+ && timespec64_compare(&h_dir->i_mtime, &dt.dt_mtime) < 0) { -+ dt.dt_h_path = h_path; -+ au_dtime_revert(&dt); -+ } -+ au_hn_inode_unlock(hdir); -+ vfsub_mnt_drop_write(h_path.mnt); -+ au_cpup_attr_timesizes(dir); -+ -+out_unlock: -+ aufs_read_unlock(a->dentry, AuLock_DW); -+out: -+ dput(a->dentry); -+ au_nwt_done(&au_sbi(sb)->si_nowait); -+ au_kfree_try_rcu(arg); -+} -+ -+void au_dir_ts(struct inode *dir, aufs_bindex_t bindex) -+{ -+ int perm, wkq_err; -+ aufs_bindex_t btop; -+ struct au_dir_ts_arg *arg; -+ struct dentry *dentry; -+ struct super_block *sb; -+ -+ IMustLock(dir); -+ -+ dentry = d_find_any_alias(dir); -+ AuDebugOn(!dentry); -+ sb = dentry->d_sb; -+ btop = au_ibtop(dir); -+ if (btop == bindex) { -+ au_cpup_attr_timesizes(dir); -+ goto out; -+ } -+ -+ perm = au_sbr_perm(sb, btop); -+ if (!au_br_writable(perm)) -+ goto out; -+ -+ arg = kmalloc(sizeof(*arg), GFP_NOFS); -+ if (!arg) -+ goto out; -+ -+ arg->dentry = dget(dentry); /* will be dput-ted by au_do_dir_ts() */ -+ arg->brid = au_sbr_id(sb, bindex); -+ wkq_err = au_wkq_nowait(au_do_dir_ts, arg, sb, /*flags*/0); -+ if (unlikely(wkq_err)) { -+ pr_err("wkq %d\n", wkq_err); -+ dput(dentry); -+ au_kfree_try_rcu(arg); -+ } -+ -+out: -+ dput(dentry); -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+static int reopen_dir(struct file *file) -+{ -+ int err; -+ unsigned int flags; -+ aufs_bindex_t bindex, btail, btop; -+ struct dentry *dentry, *h_dentry; -+ struct file *h_file; -+ -+ /* open all lower dirs */ -+ dentry = file->f_path.dentry; -+ btop = au_dbtop(dentry); -+ for (bindex = au_fbtop(file); bindex < btop; bindex++) -+ au_set_h_fptr(file, bindex, NULL); -+ au_set_fbtop(file, btop); -+ -+ btail = au_dbtaildir(dentry); -+ for (bindex = au_fbbot_dir(file); btail < bindex; bindex--) -+ au_set_h_fptr(file, bindex, NULL); -+ au_set_fbbot_dir(file, btail); -+ -+ flags = vfsub_file_flags(file); -+ for (bindex = btop; bindex <= btail; bindex++) { -+ h_dentry = au_h_dptr(dentry, bindex); -+ if (!h_dentry) -+ continue; -+ h_file = au_hf_dir(file, bindex); -+ if (h_file) -+ continue; -+ -+ h_file = au_h_open(dentry, bindex, flags, file, /*force_wr*/0); -+ err = PTR_ERR(h_file); -+ if (IS_ERR(h_file)) -+ goto out; /* close all? */ -+ au_set_h_fptr(file, bindex, h_file); -+ } -+ au_update_figen(file); -+ /* todo: necessary? */ -+ /* file->f_ra = h_file->f_ra; */ -+ err = 0; -+ -+out: -+ return err; -+} -+ -+static int do_open_dir(struct file *file, int flags, struct file *h_file) -+{ -+ int err; -+ aufs_bindex_t bindex, btail; -+ struct dentry *dentry, *h_dentry; -+ struct vfsmount *mnt; -+ -+ FiMustWriteLock(file); -+ AuDebugOn(h_file); -+ -+ err = 0; -+ mnt = file->f_path.mnt; -+ dentry = file->f_path.dentry; -+ file->f_version = inode_query_iversion(d_inode(dentry)); -+ bindex = au_dbtop(dentry); -+ au_set_fbtop(file, bindex); -+ btail = au_dbtaildir(dentry); -+ au_set_fbbot_dir(file, btail); -+ for (; !err && bindex <= btail; bindex++) { -+ h_dentry = au_h_dptr(dentry, bindex); -+ if (!h_dentry) -+ continue; -+ -+ err = vfsub_test_mntns(mnt, h_dentry->d_sb); -+ if (unlikely(err)) -+ break; -+ h_file = au_h_open(dentry, bindex, flags, file, /*force_wr*/0); -+ if (IS_ERR(h_file)) { -+ err = PTR_ERR(h_file); -+ break; -+ } -+ au_set_h_fptr(file, bindex, h_file); -+ } -+ au_update_figen(file); -+ /* todo: necessary? */ -+ /* file->f_ra = h_file->f_ra; */ -+ if (!err) -+ return 0; /* success */ -+ -+ /* close all */ -+ for (bindex = au_fbtop(file); bindex <= btail; bindex++) -+ au_set_h_fptr(file, bindex, NULL); -+ au_set_fbtop(file, -1); -+ au_set_fbbot_dir(file, -1); -+ -+ return err; -+} -+ -+static int aufs_open_dir(struct inode *inode __maybe_unused, -+ struct file *file) -+{ -+ int err; -+ struct super_block *sb; -+ struct au_fidir *fidir; -+ -+ err = -ENOMEM; -+ sb = file->f_path.dentry->d_sb; -+ si_read_lock(sb, AuLock_FLUSH); -+ fidir = au_fidir_alloc(sb); -+ if (fidir) { -+ struct au_do_open_args args = { -+ .open = do_open_dir, -+ .fidir = fidir -+ }; -+ err = au_do_open(file, &args); -+ if (unlikely(err)) -+ au_kfree_rcu(fidir); -+ } -+ si_read_unlock(sb); -+ return err; -+} -+ -+static int aufs_release_dir(struct inode *inode __maybe_unused, -+ struct file *file) -+{ -+ struct au_vdir *vdir_cache; -+ struct au_finfo *finfo; -+ struct au_fidir *fidir; -+ struct au_hfile *hf; -+ aufs_bindex_t bindex, bbot; -+ -+ finfo = au_fi(file); -+ fidir = finfo->fi_hdir; -+ if (fidir) { -+ au_hbl_del(&finfo->fi_hlist, -+ &au_sbi(file->f_path.dentry->d_sb)->si_files); -+ vdir_cache = fidir->fd_vdir_cache; /* lock-free */ -+ if (vdir_cache) -+ au_vdir_free(vdir_cache); -+ -+ bindex = finfo->fi_btop; -+ if (bindex >= 0) { -+ hf = fidir->fd_hfile + bindex; -+ /* -+ * calls fput() instead of filp_close(), -+ * since no dnotify or lock for the lower file. -+ */ -+ bbot = fidir->fd_bbot; -+ for (; bindex <= bbot; bindex++, hf++) -+ if (hf->hf_file) -+ au_hfput(hf, /*execed*/0); -+ } -+ au_kfree_rcu(fidir); -+ finfo->fi_hdir = NULL; -+ } -+ au_finfo_fin(file); -+ return 0; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+static int au_do_flush_dir(struct file *file, fl_owner_t id) -+{ -+ int err; -+ aufs_bindex_t bindex, bbot; -+ struct file *h_file; -+ -+ err = 0; -+ bbot = au_fbbot_dir(file); -+ for (bindex = au_fbtop(file); !err && bindex <= bbot; bindex++) { -+ h_file = au_hf_dir(file, bindex); -+ if (h_file) -+ err = vfsub_flush(h_file, id); -+ } -+ return err; -+} -+ -+static int aufs_flush_dir(struct file *file, fl_owner_t id) -+{ -+ return au_do_flush(file, id, au_do_flush_dir); -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+static int au_do_fsync_dir_no_file(struct dentry *dentry, int datasync) -+{ -+ int err; -+ aufs_bindex_t bbot, bindex; -+ struct inode *inode; -+ struct super_block *sb; -+ -+ err = 0; -+ sb = dentry->d_sb; -+ inode = d_inode(dentry); -+ IMustLock(inode); -+ bbot = au_dbbot(dentry); -+ for (bindex = au_dbtop(dentry); !err && bindex <= bbot; bindex++) { -+ struct path h_path; -+ -+ if (au_test_ro(sb, bindex, inode)) -+ continue; -+ h_path.dentry = au_h_dptr(dentry, bindex); -+ if (!h_path.dentry) -+ continue; -+ -+ h_path.mnt = au_sbr_mnt(sb, bindex); -+ err = vfsub_fsync(NULL, &h_path, datasync); -+ } -+ -+ return err; -+} -+ -+static int au_do_fsync_dir(struct file *file, int datasync) -+{ -+ int err; -+ aufs_bindex_t bbot, bindex; -+ struct file *h_file; -+ struct super_block *sb; -+ struct inode *inode; -+ -+ err = au_reval_and_lock_fdi(file, reopen_dir, /*wlock*/1, /*fi_lsc*/0); -+ if (unlikely(err)) -+ goto out; -+ -+ inode = file_inode(file); -+ sb = inode->i_sb; -+ bbot = au_fbbot_dir(file); -+ for (bindex = au_fbtop(file); !err && bindex <= bbot; bindex++) { -+ h_file = au_hf_dir(file, bindex); -+ if (!h_file || au_test_ro(sb, bindex, inode)) -+ continue; -+ -+ err = vfsub_fsync(h_file, &h_file->f_path, datasync); -+ } -+ -+out: -+ return err; -+} -+ -+/* -+ * @file may be NULL -+ */ -+static int aufs_fsync_dir(struct file *file, loff_t start, loff_t end, -+ int datasync) -+{ -+ int err; -+ struct dentry *dentry; -+ struct inode *inode; -+ struct super_block *sb; -+ -+ err = 0; -+ dentry = file->f_path.dentry; -+ inode = d_inode(dentry); -+ inode_lock(inode); -+ sb = dentry->d_sb; -+ si_noflush_read_lock(sb); -+ if (file) -+ err = au_do_fsync_dir(file, datasync); -+ else { -+ di_write_lock_child(dentry); -+ err = au_do_fsync_dir_no_file(dentry, datasync); -+ } -+ au_cpup_attr_timesizes(inode); -+ di_write_unlock(dentry); -+ if (file) -+ fi_write_unlock(file); -+ -+ si_read_unlock(sb); -+ inode_unlock(inode); -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+static int aufs_iterate_shared(struct file *file, struct dir_context *ctx) -+{ -+ int err; -+ struct dentry *dentry; -+ struct inode *inode, *h_inode; -+ struct super_block *sb; -+ -+ AuDbg("%pD, ctx{%ps, %llu}\n", file, ctx->actor, ctx->pos); -+ -+ dentry = file->f_path.dentry; -+ inode = d_inode(dentry); -+ IMustLock(inode); -+ -+ sb = dentry->d_sb; -+ si_read_lock(sb, AuLock_FLUSH); -+ err = au_reval_and_lock_fdi(file, reopen_dir, /*wlock*/1, /*fi_lsc*/0); -+ if (unlikely(err)) -+ goto out; -+ err = au_alive_dir(dentry); -+ if (!err) -+ err = au_vdir_init(file); -+ di_downgrade_lock(dentry, AuLock_IR); -+ if (unlikely(err)) -+ goto out_unlock; -+ -+ h_inode = au_h_iptr(inode, au_ibtop(inode)); -+ if (!au_test_nfsd()) { -+ err = au_vdir_fill_de(file, ctx); -+ fsstack_copy_attr_atime(inode, h_inode); -+ } else { -+ /* -+ * nfsd filldir may call lookup_one_len(), vfs_getattr(), -+ * encode_fh() and others. -+ */ -+ atomic_inc(&h_inode->i_count); -+ di_read_unlock(dentry, AuLock_IR); -+ si_read_unlock(sb); -+ err = au_vdir_fill_de(file, ctx); -+ fsstack_copy_attr_atime(inode, h_inode); -+ fi_write_unlock(file); -+ iput(h_inode); -+ -+ AuTraceErr(err); -+ return err; -+ } -+ -+out_unlock: -+ di_read_unlock(dentry, AuLock_IR); -+ fi_write_unlock(file); -+out: -+ si_read_unlock(sb); -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+#define AuTestEmpty_WHONLY 1 -+#define AuTestEmpty_CALLED (1 << 1) -+#define AuTestEmpty_SHWH (1 << 2) -+#define au_ftest_testempty(flags, name) ((flags) & AuTestEmpty_##name) -+#define au_fset_testempty(flags, name) \ -+ do { (flags) |= AuTestEmpty_##name; } while (0) -+#define au_fclr_testempty(flags, name) \ -+ do { (flags) &= ~AuTestEmpty_##name; } while (0) -+ -+#ifndef CONFIG_AUFS_SHWH -+#undef AuTestEmpty_SHWH -+#define AuTestEmpty_SHWH 0 -+#endif -+ -+struct test_empty_arg { -+ struct dir_context ctx; -+ struct au_nhash *whlist; -+ unsigned int flags; -+ int err; -+ aufs_bindex_t bindex; -+}; -+ -+static int test_empty_cb(struct dir_context *ctx, const char *__name, -+ int namelen, loff_t offset __maybe_unused, u64 ino, -+ unsigned int d_type) -+{ -+ struct test_empty_arg *arg = container_of(ctx, struct test_empty_arg, -+ ctx); -+ char *name = (void *)__name; -+ -+ arg->err = 0; -+ au_fset_testempty(arg->flags, CALLED); -+ /* smp_mb(); */ -+ if (name[0] == '.' -+ && (namelen == 1 || (name[1] == '.' && namelen == 2))) -+ goto out; /* success */ -+ -+ if (namelen <= AUFS_WH_PFX_LEN -+ || memcmp(name, AUFS_WH_PFX, AUFS_WH_PFX_LEN)) { -+ if (au_ftest_testempty(arg->flags, WHONLY) -+ && !au_nhash_test_known_wh(arg->whlist, name, namelen)) -+ arg->err = -ENOTEMPTY; -+ goto out; -+ } -+ -+ name += AUFS_WH_PFX_LEN; -+ namelen -= AUFS_WH_PFX_LEN; -+ if (!au_nhash_test_known_wh(arg->whlist, name, namelen)) -+ arg->err = au_nhash_append_wh -+ (arg->whlist, name, namelen, ino, d_type, arg->bindex, -+ au_ftest_testempty(arg->flags, SHWH)); -+ -+out: -+ /* smp_mb(); */ -+ AuTraceErr(arg->err); -+ return arg->err; -+} -+ -+static int do_test_empty(struct dentry *dentry, struct test_empty_arg *arg) -+{ -+ int err; -+ struct file *h_file; -+ struct au_branch *br; -+ -+ h_file = au_h_open(dentry, arg->bindex, -+ O_RDONLY | O_NONBLOCK | O_DIRECTORY | O_LARGEFILE, -+ /*file*/NULL, /*force_wr*/0); -+ err = PTR_ERR(h_file); -+ if (IS_ERR(h_file)) -+ goto out; -+ -+ err = 0; -+ if (!au_opt_test(au_mntflags(dentry->d_sb), UDBA_NONE) -+ && !file_inode(h_file)->i_nlink) -+ goto out_put; -+ -+ do { -+ arg->err = 0; -+ au_fclr_testempty(arg->flags, CALLED); -+ /* smp_mb(); */ -+ err = vfsub_iterate_dir(h_file, &arg->ctx); -+ if (err >= 0) -+ err = arg->err; -+ } while (!err && au_ftest_testempty(arg->flags, CALLED)); -+ -+out_put: -+ fput(h_file); -+ br = au_sbr(dentry->d_sb, arg->bindex); -+ au_lcnt_dec(&br->br_nfiles); -+out: -+ return err; -+} -+ -+struct do_test_empty_args { -+ int *errp; -+ struct dentry *dentry; -+ struct test_empty_arg *arg; -+}; -+ -+static void call_do_test_empty(void *args) -+{ -+ struct do_test_empty_args *a = args; -+ *a->errp = do_test_empty(a->dentry, a->arg); -+} -+ -+static int sio_test_empty(struct dentry *dentry, struct test_empty_arg *arg) -+{ -+ int err, wkq_err; -+ struct dentry *h_dentry; -+ struct inode *h_inode; -+ -+ h_dentry = au_h_dptr(dentry, arg->bindex); -+ h_inode = d_inode(h_dentry); -+ /* todo: i_mode changes anytime? */ -+ inode_lock_shared_nested(h_inode, AuLsc_I_CHILD); -+ err = au_test_h_perm_sio(h_inode, MAY_EXEC | MAY_READ); -+ inode_unlock_shared(h_inode); -+ if (!err) -+ err = do_test_empty(dentry, arg); -+ else { -+ struct do_test_empty_args args = { -+ .errp = &err, -+ .dentry = dentry, -+ .arg = arg -+ }; -+ unsigned int flags = arg->flags; -+ -+ wkq_err = au_wkq_wait(call_do_test_empty, &args); -+ if (unlikely(wkq_err)) -+ err = wkq_err; -+ arg->flags = flags; -+ } -+ -+ return err; -+} -+ -+int au_test_empty_lower(struct dentry *dentry) -+{ -+ int err; -+ unsigned int rdhash; -+ aufs_bindex_t bindex, btop, btail; -+ struct au_nhash whlist; -+ struct test_empty_arg arg = { -+ .ctx = { -+ .actor = test_empty_cb -+ } -+ }; -+ int (*test_empty)(struct dentry *dentry, struct test_empty_arg *arg); -+ -+ SiMustAnyLock(dentry->d_sb); -+ -+ rdhash = au_sbi(dentry->d_sb)->si_rdhash; -+ if (!rdhash) -+ rdhash = au_rdhash_est(au_dir_size(/*file*/NULL, dentry)); -+ err = au_nhash_alloc(&whlist, rdhash, GFP_NOFS); -+ if (unlikely(err)) -+ goto out; -+ -+ arg.flags = 0; -+ arg.whlist = &whlist; -+ btop = au_dbtop(dentry); -+ if (au_opt_test(au_mntflags(dentry->d_sb), SHWH)) -+ au_fset_testempty(arg.flags, SHWH); -+ test_empty = do_test_empty; -+ if (au_opt_test(au_mntflags(dentry->d_sb), DIRPERM1)) -+ test_empty = sio_test_empty; -+ arg.bindex = btop; -+ err = test_empty(dentry, &arg); -+ if (unlikely(err)) -+ goto out_whlist; -+ -+ au_fset_testempty(arg.flags, WHONLY); -+ btail = au_dbtaildir(dentry); -+ for (bindex = btop + 1; !err && bindex <= btail; bindex++) { -+ struct dentry *h_dentry; -+ -+ h_dentry = au_h_dptr(dentry, bindex); -+ if (h_dentry && d_is_positive(h_dentry)) { -+ arg.bindex = bindex; -+ err = test_empty(dentry, &arg); -+ } -+ } -+ -+out_whlist: -+ au_nhash_wh_free(&whlist); -+out: -+ return err; -+} -+ -+int au_test_empty(struct dentry *dentry, struct au_nhash *whlist) -+{ -+ int err; -+ struct test_empty_arg arg = { -+ .ctx = { -+ .actor = test_empty_cb -+ } -+ }; -+ aufs_bindex_t bindex, btail; -+ -+ err = 0; -+ arg.whlist = whlist; -+ arg.flags = AuTestEmpty_WHONLY; -+ if (au_opt_test(au_mntflags(dentry->d_sb), SHWH)) -+ au_fset_testempty(arg.flags, SHWH); -+ btail = au_dbtaildir(dentry); -+ for (bindex = au_dbtop(dentry); !err && bindex <= btail; bindex++) { -+ struct dentry *h_dentry; -+ -+ h_dentry = au_h_dptr(dentry, bindex); -+ if (h_dentry && d_is_positive(h_dentry)) { -+ arg.bindex = bindex; -+ err = sio_test_empty(dentry, &arg); -+ } -+ } -+ -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+const struct file_operations aufs_dir_fop = { -+ .owner = THIS_MODULE, -+ .llseek = default_llseek, -+ .read = generic_read_dir, -+ .iterate_shared = aufs_iterate_shared, -+ .unlocked_ioctl = aufs_ioctl_dir, -+#ifdef CONFIG_COMPAT -+ .compat_ioctl = aufs_compat_ioctl_dir, -+#endif -+ .open = aufs_open_dir, -+ .release = aufs_release_dir, -+ .flush = aufs_flush_dir, -+ .fsync = aufs_fsync_dir -+}; -diff --git a/fs/aufs/dir.h b/fs/aufs/dir.h -new file mode 100644 -index 000000000000..75fad78d2278 ---- /dev/null -+++ b/fs/aufs/dir.h -@@ -0,0 +1,121 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * directory operations -+ */ -+ -+#ifndef __AUFS_DIR_H__ -+#define __AUFS_DIR_H__ -+ -+#ifdef __KERNEL__ -+ -+#include -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* need to be faster and smaller */ -+ -+struct au_nhash { -+ unsigned int nh_num; -+ struct hlist_head *nh_head; -+}; -+ -+struct au_vdir_destr { -+ unsigned char len; -+ unsigned char name[]; -+} __packed; -+ -+struct au_vdir_dehstr { -+ struct hlist_node hash; -+ struct au_vdir_destr *str; -+ struct rcu_head rcu; -+} ____cacheline_aligned_in_smp; -+ -+struct au_vdir_de { -+ ino_t de_ino; -+ unsigned char de_type; -+ /* caution: packed */ -+ struct au_vdir_destr de_str; -+} __packed; -+ -+struct au_vdir_wh { -+ struct hlist_node wh_hash; -+#ifdef CONFIG_AUFS_SHWH -+ ino_t wh_ino; -+ aufs_bindex_t wh_bindex; -+ unsigned char wh_type; -+#else -+ aufs_bindex_t wh_bindex; -+#endif -+ /* caution: packed */ -+ struct au_vdir_destr wh_str; -+} __packed; -+ -+union au_vdir_deblk_p { -+ unsigned char *deblk; -+ struct au_vdir_de *de; -+}; -+ -+struct au_vdir { -+ unsigned char **vd_deblk; -+ unsigned long vd_nblk; -+ struct { -+ unsigned long ul; -+ union au_vdir_deblk_p p; -+ } vd_last; -+ -+ u64 vd_version; -+ unsigned int vd_deblk_sz; -+ unsigned long vd_jiffy; -+ struct rcu_head rcu; -+} ____cacheline_aligned_in_smp; -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* dir.c */ -+extern const struct file_operations aufs_dir_fop; -+void au_add_nlink(struct inode *dir, struct inode *h_dir); -+void au_sub_nlink(struct inode *dir, struct inode *h_dir); -+loff_t au_dir_size(struct file *file, struct dentry *dentry); -+void au_dir_ts(struct inode *dir, aufs_bindex_t bsrc); -+int au_test_empty_lower(struct dentry *dentry); -+int au_test_empty(struct dentry *dentry, struct au_nhash *whlist); -+ -+/* vdir.c */ -+unsigned int au_rdhash_est(loff_t sz); -+int au_nhash_alloc(struct au_nhash *nhash, unsigned int num_hash, gfp_t gfp); -+void au_nhash_wh_free(struct au_nhash *whlist); -+int au_nhash_test_longer_wh(struct au_nhash *whlist, aufs_bindex_t btgt, -+ int limit); -+int au_nhash_test_known_wh(struct au_nhash *whlist, char *name, int nlen); -+int au_nhash_append_wh(struct au_nhash *whlist, char *name, int nlen, ino_t ino, -+ unsigned int d_type, aufs_bindex_t bindex, -+ unsigned char shwh); -+void au_vdir_free(struct au_vdir *vdir); -+int au_vdir_init(struct file *file); -+int au_vdir_fill_de(struct file *file, struct dir_context *ctx); -+ -+/* ioctl.c */ -+long aufs_ioctl_dir(struct file *file, unsigned int cmd, unsigned long arg); -+ -+#ifdef CONFIG_AUFS_RDU -+/* rdu.c */ -+long au_rdu_ioctl(struct file *file, unsigned int cmd, unsigned long arg); -+#ifdef CONFIG_COMPAT -+long au_rdu_compat_ioctl(struct file *file, unsigned int cmd, -+ unsigned long arg); -+#endif -+#else -+AuStub(long, au_rdu_ioctl, return -EINVAL, struct file *file, -+ unsigned int cmd, unsigned long arg) -+#ifdef CONFIG_COMPAT -+AuStub(long, au_rdu_compat_ioctl, return -EINVAL, struct file *file, -+ unsigned int cmd, unsigned long arg) -+#endif -+#endif -+ -+#endif /* __KERNEL__ */ -+#endif /* __AUFS_DIR_H__ */ -diff --git a/fs/aufs/dirren.c b/fs/aufs/dirren.c -new file mode 100644 -index 000000000000..12b56c47f2dd ---- /dev/null -+++ b/fs/aufs/dirren.c -@@ -0,0 +1,1303 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2017-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * special handling in renaming a directory -+ * in order to support looking-up the before-renamed name on the lower readonly -+ * branches -+ */ -+ -+#include -+#include "aufs.h" -+ -+static void au_dr_hino_del(struct au_dr_br *dr, struct au_dr_hino *ent) -+{ -+ int idx; -+ -+ idx = au_dr_ihash(ent->dr_h_ino); -+ au_hbl_del(&ent->dr_hnode, dr->dr_h_ino + idx); -+} -+ -+static int au_dr_hino_test_empty(struct au_dr_br *dr) -+{ -+ int ret, i; -+ struct hlist_bl_head *hbl; -+ -+ ret = 1; -+ for (i = 0; ret && i < AuDirren_NHASH; i++) { -+ hbl = dr->dr_h_ino + i; -+ hlist_bl_lock(hbl); -+ ret &= hlist_bl_empty(hbl); -+ hlist_bl_unlock(hbl); -+ } -+ -+ return ret; -+} -+ -+static struct au_dr_hino *au_dr_hino_find(struct au_dr_br *dr, ino_t ino) -+{ -+ struct au_dr_hino *found, *ent; -+ struct hlist_bl_head *hbl; -+ struct hlist_bl_node *pos; -+ int idx; -+ -+ found = NULL; -+ idx = au_dr_ihash(ino); -+ hbl = dr->dr_h_ino + idx; -+ hlist_bl_lock(hbl); -+ hlist_bl_for_each_entry(ent, pos, hbl, dr_hnode) -+ if (ent->dr_h_ino == ino) { -+ found = ent; -+ break; -+ } -+ hlist_bl_unlock(hbl); -+ -+ return found; -+} -+ -+int au_dr_hino_test_add(struct au_dr_br *dr, ino_t ino, -+ struct au_dr_hino *add_ent) -+{ -+ int found, idx; -+ struct hlist_bl_head *hbl; -+ struct hlist_bl_node *pos; -+ struct au_dr_hino *ent; -+ -+ found = 0; -+ idx = au_dr_ihash(ino); -+ hbl = dr->dr_h_ino + idx; -+#if 0 /* debug print */ -+ { -+ struct hlist_bl_node *tmp; -+ -+ hlist_bl_for_each_entry_safe(ent, pos, tmp, hbl, dr_hnode) -+ AuDbg("hi%llu\n", (unsigned long long)ent->dr_h_ino); -+ } -+#endif -+ hlist_bl_lock(hbl); -+ hlist_bl_for_each_entry(ent, pos, hbl, dr_hnode) -+ if (ent->dr_h_ino == ino) { -+ found = 1; -+ break; -+ } -+ if (!found && add_ent) -+ hlist_bl_add_head(&add_ent->dr_hnode, hbl); -+ hlist_bl_unlock(hbl); -+ -+ if (!found && add_ent) -+ AuDbg("i%llu added\n", (unsigned long long)add_ent->dr_h_ino); -+ -+ return found; -+} -+ -+void au_dr_hino_free(struct au_dr_br *dr) -+{ -+ int i; -+ struct hlist_bl_head *hbl; -+ struct hlist_bl_node *pos, *tmp; -+ struct au_dr_hino *ent; -+ -+ /* SiMustWriteLock(sb); */ -+ -+ for (i = 0; i < AuDirren_NHASH; i++) { -+ hbl = dr->dr_h_ino + i; -+ /* no spinlock since sbinfo must be write-locked */ -+ hlist_bl_for_each_entry_safe(ent, pos, tmp, hbl, dr_hnode) -+ au_kfree_rcu(ent); -+ INIT_HLIST_BL_HEAD(hbl); -+ } -+} -+ -+/* returns the number of inodes or an error */ -+static int au_dr_hino_store(struct super_block *sb, struct au_branch *br, -+ struct file *hinofile) -+{ -+ int err, i; -+ ssize_t ssz; -+ loff_t pos, oldsize; -+ __be64 u64; -+ struct inode *hinoinode; -+ struct hlist_bl_head *hbl; -+ struct hlist_bl_node *n1, *n2; -+ struct au_dr_hino *ent; -+ -+ SiMustWriteLock(sb); -+ AuDebugOn(!au_br_writable(br->br_perm)); -+ -+ hinoinode = file_inode(hinofile); -+ oldsize = i_size_read(hinoinode); -+ -+ err = 0; -+ pos = 0; -+ hbl = br->br_dirren.dr_h_ino; -+ for (i = 0; !err && i < AuDirren_NHASH; i++, hbl++) { -+ /* no bit-lock since sbinfo must be write-locked */ -+ hlist_bl_for_each_entry_safe(ent, n1, n2, hbl, dr_hnode) { -+ AuDbg("hi%llu, %pD2\n", -+ (unsigned long long)ent->dr_h_ino, hinofile); -+ u64 = cpu_to_be64(ent->dr_h_ino); -+ ssz = vfsub_write_k(hinofile, &u64, sizeof(u64), &pos); -+ if (ssz == sizeof(u64)) -+ continue; -+ -+ /* write error */ -+ pr_err("ssz %zd, %pD2\n", ssz, hinofile); -+ err = -ENOSPC; -+ if (ssz < 0) -+ err = ssz; -+ break; -+ } -+ } -+ /* regardless the error */ -+ if (pos < oldsize) { -+ err = vfsub_trunc(&hinofile->f_path, pos, /*attr*/0, hinofile); -+ AuTraceErr(err); -+ } -+ -+ AuTraceErr(err); -+ return err; -+} -+ -+static int au_dr_hino_load(struct au_dr_br *dr, struct file *hinofile) -+{ -+ int err, hidx; -+ ssize_t ssz; -+ size_t sz, n; -+ loff_t pos; -+ uint64_t u64; -+ struct au_dr_hino *ent; -+ struct inode *hinoinode; -+ struct hlist_bl_head *hbl; -+ -+ err = 0; -+ pos = 0; -+ hbl = dr->dr_h_ino; -+ hinoinode = file_inode(hinofile); -+ sz = i_size_read(hinoinode); -+ AuDebugOn(sz % sizeof(u64)); -+ n = sz / sizeof(u64); -+ while (n--) { -+ ssz = vfsub_read_k(hinofile, &u64, sizeof(u64), &pos); -+ if (unlikely(ssz != sizeof(u64))) { -+ pr_err("ssz %zd, %pD2\n", ssz, hinofile); -+ err = -EINVAL; -+ if (ssz < 0) -+ err = ssz; -+ goto out_free; -+ } -+ -+ ent = kmalloc(sizeof(*ent), GFP_NOFS); -+ if (!ent) { -+ err = -ENOMEM; -+ AuTraceErr(err); -+ goto out_free; -+ } -+ ent->dr_h_ino = be64_to_cpu((__force __be64)u64); -+ AuDbg("hi%llu, %pD2\n", -+ (unsigned long long)ent->dr_h_ino, hinofile); -+ hidx = au_dr_ihash(ent->dr_h_ino); -+ au_hbl_add(&ent->dr_hnode, hbl + hidx); -+ } -+ goto out; /* success */ -+ -+out_free: -+ au_dr_hino_free(dr); -+out: -+ AuTraceErr(err); -+ return err; -+} -+ -+/* -+ * @bindex/@br is a switch to distinguish whether suspending hnotify or not. -+ * @path is a switch to distinguish load and store. -+ */ -+static int au_dr_hino(struct super_block *sb, aufs_bindex_t bindex, -+ struct au_branch *br, const struct path *path) -+{ -+ int err, flags; -+ unsigned char load, suspend; -+ struct file *hinofile; -+ struct au_hinode *hdir; -+ struct inode *dir, *delegated; -+ struct path hinopath; -+ struct qstr hinoname = QSTR_INIT(AUFS_WH_DR_BRHINO, -+ sizeof(AUFS_WH_DR_BRHINO) - 1); -+ -+ AuDebugOn(bindex < 0 && !br); -+ AuDebugOn(bindex >= 0 && br); -+ -+ err = -EINVAL; -+ suspend = !br; -+ if (suspend) -+ br = au_sbr(sb, bindex); -+ load = !!path; -+ if (!load) { -+ path = &br->br_path; -+ AuDebugOn(!au_br_writable(br->br_perm)); -+ if (unlikely(!au_br_writable(br->br_perm))) -+ goto out; -+ } -+ -+ hdir = NULL; -+ if (suspend) { -+ dir = d_inode(sb->s_root); -+ hdir = au_hinode(au_ii(dir), bindex); -+ dir = hdir->hi_inode; -+ au_hn_inode_lock_nested(hdir, AuLsc_I_CHILD); -+ } else { -+ dir = d_inode(path->dentry); -+ inode_lock_nested(dir, AuLsc_I_CHILD); -+ } -+ hinopath.dentry = vfsub_lkup_one(&hinoname, path->dentry); -+ err = PTR_ERR(hinopath.dentry); -+ if (IS_ERR(hinopath.dentry)) -+ goto out_unlock; -+ -+ err = 0; -+ flags = O_RDONLY; -+ if (load) { -+ if (d_is_negative(hinopath.dentry)) -+ goto out_dput; /* success */ -+ } else { -+ if (au_dr_hino_test_empty(&br->br_dirren)) { -+ if (d_is_positive(hinopath.dentry)) { -+ delegated = NULL; -+ err = vfsub_unlink(dir, &hinopath, &delegated, -+ /*force*/0); -+ AuTraceErr(err); -+ if (unlikely(err)) -+ pr_err("ignored err %d, %pd2\n", -+ err, hinopath.dentry); -+ if (unlikely(err == -EWOULDBLOCK)) -+ iput(delegated); -+ err = 0; -+ } -+ goto out_dput; -+ } else if (!d_is_positive(hinopath.dentry)) { -+ err = vfsub_create(dir, &hinopath, 0600, -+ /*want_excl*/false); -+ AuTraceErr(err); -+ if (unlikely(err)) -+ goto out_dput; -+ } -+ flags = O_WRONLY; -+ } -+ hinopath.mnt = path->mnt; -+ hinofile = vfsub_dentry_open(&hinopath, flags); -+ if (suspend) -+ au_hn_inode_unlock(hdir); -+ else -+ inode_unlock(dir); -+ dput(hinopath.dentry); -+ AuTraceErrPtr(hinofile); -+ if (IS_ERR(hinofile)) { -+ err = PTR_ERR(hinofile); -+ goto out; -+ } -+ -+ if (load) -+ err = au_dr_hino_load(&br->br_dirren, hinofile); -+ else -+ err = au_dr_hino_store(sb, br, hinofile); -+ fput(hinofile); -+ goto out; -+ -+out_dput: -+ dput(hinopath.dentry); -+out_unlock: -+ if (suspend) -+ au_hn_inode_unlock(hdir); -+ else -+ inode_unlock(dir); -+out: -+ AuTraceErr(err); -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+static int au_dr_brid_init(struct au_dr_brid *brid, const struct path *path) -+{ -+ int err; -+ struct kstatfs kstfs; -+ dev_t dev; -+ struct dentry *dentry; -+ struct super_block *sb; -+ -+ err = vfs_statfs((void *)path, &kstfs); -+ AuTraceErr(err); -+ if (unlikely(err)) -+ goto out; -+ -+ /* todo: support for UUID */ -+ -+ if (kstfs.f_fsid.val[0] || kstfs.f_fsid.val[1]) { -+ brid->type = AuBrid_FSID; -+ brid->fsid = kstfs.f_fsid; -+ } else { -+ dentry = path->dentry; -+ sb = dentry->d_sb; -+ dev = sb->s_dev; -+ if (dev) { -+ brid->type = AuBrid_DEV; -+ brid->dev = dev; -+ } -+ } -+ -+out: -+ return err; -+} -+ -+int au_dr_br_init(struct super_block *sb, struct au_branch *br, -+ const struct path *path) -+{ -+ int err, i; -+ struct au_dr_br *dr; -+ struct hlist_bl_head *hbl; -+ -+ dr = &br->br_dirren; -+ hbl = dr->dr_h_ino; -+ for (i = 0; i < AuDirren_NHASH; i++, hbl++) -+ INIT_HLIST_BL_HEAD(hbl); -+ -+ err = au_dr_brid_init(&dr->dr_brid, path); -+ if (unlikely(err)) -+ goto out; -+ -+ if (au_opt_test(au_mntflags(sb), DIRREN)) -+ err = au_dr_hino(sb, /*bindex*/-1, br, path); -+ -+out: -+ AuTraceErr(err); -+ return err; -+} -+ -+int au_dr_br_fin(struct super_block *sb, struct au_branch *br) -+{ -+ int err; -+ -+ err = 0; -+ if (au_br_writable(br->br_perm)) -+ err = au_dr_hino(sb, /*bindex*/-1, br, /*path*/NULL); -+ if (!err) -+ au_dr_hino_free(&br->br_dirren); -+ -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+static int au_brid_str(struct au_dr_brid *brid, struct inode *h_inode, -+ char *buf, size_t sz) -+{ -+ int err; -+ unsigned int major, minor; -+ char *p; -+ -+ p = buf; -+ err = snprintf(p, sz, "%d_", brid->type); -+ AuDebugOn(err > sz); -+ p += err; -+ sz -= err; -+ switch (brid->type) { -+ case AuBrid_Unset: -+ return -EINVAL; -+ case AuBrid_UUID: -+ err = snprintf(p, sz, "%pU", brid->uuid.b); -+ break; -+ case AuBrid_FSID: -+ err = snprintf(p, sz, "%08x-%08x", -+ brid->fsid.val[0], brid->fsid.val[1]); -+ break; -+ case AuBrid_DEV: -+ major = MAJOR(brid->dev); -+ minor = MINOR(brid->dev); -+ if (major <= 0xff && minor <= 0xff) -+ err = snprintf(p, sz, "%02x%02x", major, minor); -+ else -+ err = snprintf(p, sz, "%03x:%05x", major, minor); -+ break; -+ } -+ AuDebugOn(err > sz); -+ p += err; -+ sz -= err; -+ err = snprintf(p, sz, "_%llu", (unsigned long long)h_inode->i_ino); -+ AuDebugOn(err > sz); -+ p += err; -+ sz -= err; -+ -+ return p - buf; -+} -+ -+static int au_drinfo_name(struct au_branch *br, char *name, int len) -+{ -+ int rlen; -+ struct dentry *br_dentry; -+ struct inode *br_inode; -+ -+ br_dentry = au_br_dentry(br); -+ br_inode = d_inode(br_dentry); -+ rlen = au_brid_str(&br->br_dirren.dr_brid, br_inode, name, len); -+ AuDebugOn(rlen >= AUFS_DIRREN_ENV_VAL_SZ); -+ AuDebugOn(rlen > len); -+ -+ return rlen; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* -+ * from the given @h_dentry, construct drinfo at @*fdata. -+ * when the size of @*fdata is not enough, reallocate and return new @fdata and -+ * @allocated. -+ */ -+static int au_drinfo_construct(struct au_drinfo_fdata **fdata, -+ struct dentry *h_dentry, -+ unsigned char *allocated) -+{ -+ int err, v; -+ struct au_drinfo_fdata *f, *p; -+ struct au_drinfo *drinfo; -+ struct inode *h_inode; -+ struct qstr *qname; -+ -+ err = 0; -+ f = *fdata; -+ h_inode = d_inode(h_dentry); -+ qname = &h_dentry->d_name; -+ drinfo = &f->drinfo; -+ drinfo->ino = (__force uint64_t)cpu_to_be64(h_inode->i_ino); -+ drinfo->oldnamelen = qname->len; -+ if (*allocated < sizeof(*f) + qname->len) { -+ v = roundup_pow_of_two(*allocated + qname->len); -+ p = au_krealloc(f, v, GFP_NOFS, /*may_shrink*/0); -+ if (unlikely(!p)) { -+ err = -ENOMEM; -+ AuTraceErr(err); -+ goto out; -+ } -+ f = p; -+ *fdata = f; -+ *allocated = v; -+ drinfo = &f->drinfo; -+ } -+ memcpy(drinfo->oldname, qname->name, qname->len); -+ AuDbg("i%llu, %.*s\n", -+ be64_to_cpu((__force __be64)drinfo->ino), drinfo->oldnamelen, -+ drinfo->oldname); -+ -+out: -+ AuTraceErr(err); -+ return err; -+} -+ -+/* callers have to free the return value */ -+static struct au_drinfo *au_drinfo_read_k(struct file *file, ino_t h_ino) -+{ -+ struct au_drinfo *ret, *drinfo; -+ struct au_drinfo_fdata fdata; -+ int len; -+ loff_t pos; -+ ssize_t ssz; -+ -+ ret = ERR_PTR(-EIO); -+ pos = 0; -+ ssz = vfsub_read_k(file, &fdata, sizeof(fdata), &pos); -+ if (unlikely(ssz != sizeof(fdata))) { -+ AuIOErr("ssz %zd, %u, %pD2\n", -+ ssz, (unsigned int)sizeof(fdata), file); -+ goto out; -+ } -+ -+ fdata.magic = ntohl((__force __be32)fdata.magic); -+ switch (fdata.magic) { -+ case AUFS_DRINFO_MAGIC_V1: -+ break; -+ default: -+ AuIOErr("magic-num 0x%x, 0x%x, %pD2\n", -+ fdata.magic, AUFS_DRINFO_MAGIC_V1, file); -+ goto out; -+ } -+ -+ drinfo = &fdata.drinfo; -+ len = drinfo->oldnamelen; -+ if (!len) { -+ AuIOErr("broken drinfo %pD2\n", file); -+ goto out; -+ } -+ -+ ret = NULL; -+ drinfo->ino = be64_to_cpu((__force __be64)drinfo->ino); -+ if (unlikely(h_ino && drinfo->ino != h_ino)) { -+ AuDbg("ignored i%llu, i%llu, %pD2\n", -+ (unsigned long long)drinfo->ino, -+ (unsigned long long)h_ino, file); -+ goto out; /* success */ -+ } -+ -+ ret = kmalloc(sizeof(*ret) + len, GFP_NOFS); -+ if (unlikely(!ret)) { -+ ret = ERR_PTR(-ENOMEM); -+ AuTraceErrPtr(ret); -+ goto out; -+ } -+ -+ *ret = *drinfo; -+ ssz = vfsub_read_k(file, (void *)ret->oldname, len, &pos); -+ if (unlikely(ssz != len)) { -+ au_kfree_rcu(ret); -+ ret = ERR_PTR(-EIO); -+ AuIOErr("ssz %zd, %u, %pD2\n", ssz, len, file); -+ goto out; -+ } -+ -+ AuDbg("oldname %.*s\n", ret->oldnamelen, ret->oldname); -+ -+out: -+ return ret; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* in order to be revertible */ -+struct au_drinfo_rev_elm { -+ int created; -+ struct dentry *info_dentry; -+ struct au_drinfo *info_last; -+}; -+ -+struct au_drinfo_rev { -+ unsigned char already; -+ aufs_bindex_t nelm; -+ struct au_drinfo_rev_elm elm[]; -+}; -+ -+/* todo: isn't it too large? */ -+struct au_drinfo_store { -+ struct path h_ppath; -+ struct dentry *h_dentry; -+ struct au_drinfo_fdata *fdata; -+ char *infoname; /* inside of whname, just after PFX */ -+ char whname[sizeof(AUFS_WH_DR_INFO_PFX) + AUFS_DIRREN_ENV_VAL_SZ]; -+ aufs_bindex_t btgt, btail; -+ unsigned char no_sio, -+ allocated, /* current size of *fdata */ -+ infonamelen, /* room size for p */ -+ whnamelen, /* length of the generated name */ -+ renameback; /* renamed back */ -+}; -+ -+/* on rename(2) error, the caller should revert it using @elm */ -+static int au_drinfo_do_store(struct au_drinfo_store *w, -+ struct au_drinfo_rev_elm *elm) -+{ -+ int err, len; -+ ssize_t ssz; -+ loff_t pos; -+ struct path infopath = { -+ .mnt = w->h_ppath.mnt -+ }; -+ struct inode *h_dir, *h_inode, *delegated; -+ struct file *infofile; -+ struct qstr *qname; -+ -+ AuDebugOn(elm -+ && memcmp(elm, page_address(ZERO_PAGE(0)), sizeof(*elm))); -+ -+ infopath.dentry = vfsub_lookup_one_len(w->whname, w->h_ppath.dentry, -+ w->whnamelen); -+ AuTraceErrPtr(infopath.dentry); -+ if (IS_ERR(infopath.dentry)) { -+ err = PTR_ERR(infopath.dentry); -+ goto out; -+ } -+ -+ err = 0; -+ h_dir = d_inode(w->h_ppath.dentry); -+ if (elm && d_is_negative(infopath.dentry)) { -+ err = vfsub_create(h_dir, &infopath, 0600, /*want_excl*/true); -+ AuTraceErr(err); -+ if (unlikely(err)) -+ goto out_dput; -+ elm->created = 1; -+ elm->info_dentry = dget(infopath.dentry); -+ } -+ -+ infofile = vfsub_dentry_open(&infopath, O_RDWR); -+ AuTraceErrPtr(infofile); -+ if (IS_ERR(infofile)) { -+ err = PTR_ERR(infofile); -+ goto out_dput; -+ } -+ -+ h_inode = d_inode(infopath.dentry); -+ if (elm && i_size_read(h_inode)) { -+ h_inode = d_inode(w->h_dentry); -+ elm->info_last = au_drinfo_read_k(infofile, h_inode->i_ino); -+ AuTraceErrPtr(elm->info_last); -+ if (IS_ERR(elm->info_last)) { -+ err = PTR_ERR(elm->info_last); -+ elm->info_last = NULL; -+ AuDebugOn(elm->info_dentry); -+ goto out_fput; -+ } -+ } -+ -+ if (elm && w->renameback) { -+ delegated = NULL; -+ err = vfsub_unlink(h_dir, &infopath, &delegated, /*force*/0); -+ AuTraceErr(err); -+ if (unlikely(err == -EWOULDBLOCK)) -+ iput(delegated); -+ goto out_fput; -+ } -+ -+ pos = 0; -+ qname = &w->h_dentry->d_name; -+ len = sizeof(*w->fdata) + qname->len; -+ if (!elm) -+ len = sizeof(*w->fdata) + w->fdata->drinfo.oldnamelen; -+ ssz = vfsub_write_k(infofile, w->fdata, len, &pos); -+ if (ssz == len) { -+ AuDbg("hi%llu, %.*s\n", w->fdata->drinfo.ino, -+ w->fdata->drinfo.oldnamelen, w->fdata->drinfo.oldname); -+ goto out_fput; /* success */ -+ } else { -+ err = -EIO; -+ if (ssz < 0) -+ err = ssz; -+ /* the caller should revert it using @elm */ -+ } -+ -+out_fput: -+ fput(infofile); -+out_dput: -+ dput(infopath.dentry); -+out: -+ AuTraceErr(err); -+ return err; -+} -+ -+struct au_call_drinfo_do_store_args { -+ int *errp; -+ struct au_drinfo_store *w; -+ struct au_drinfo_rev_elm *elm; -+}; -+ -+static void au_call_drinfo_do_store(void *args) -+{ -+ struct au_call_drinfo_do_store_args *a = args; -+ -+ *a->errp = au_drinfo_do_store(a->w, a->elm); -+} -+ -+static int au_drinfo_store_sio(struct au_drinfo_store *w, -+ struct au_drinfo_rev_elm *elm) -+{ -+ int err, wkq_err; -+ -+ if (w->no_sio) -+ err = au_drinfo_do_store(w, elm); -+ else { -+ struct au_call_drinfo_do_store_args a = { -+ .errp = &err, -+ .w = w, -+ .elm = elm -+ }; -+ wkq_err = au_wkq_wait(au_call_drinfo_do_store, &a); -+ if (unlikely(wkq_err)) -+ err = wkq_err; -+ } -+ AuTraceErr(err); -+ -+ return err; -+} -+ -+static int au_drinfo_store_work_init(struct au_drinfo_store *w, -+ aufs_bindex_t btgt) -+{ -+ int err; -+ -+ memset(w, 0, sizeof(*w)); -+ w->allocated = roundup_pow_of_two(sizeof(*w->fdata) + 40); -+ strcpy(w->whname, AUFS_WH_DR_INFO_PFX); -+ w->infoname = w->whname + sizeof(AUFS_WH_DR_INFO_PFX) - 1; -+ w->infonamelen = sizeof(w->whname) - sizeof(AUFS_WH_DR_INFO_PFX); -+ w->btgt = btgt; -+ w->no_sio = !!uid_eq(current_fsuid(), GLOBAL_ROOT_UID); -+ -+ err = -ENOMEM; -+ w->fdata = kcalloc(1, w->allocated, GFP_NOFS); -+ if (unlikely(!w->fdata)) { -+ AuTraceErr(err); -+ goto out; -+ } -+ w->fdata->magic = (__force uint32_t)htonl(AUFS_DRINFO_MAGIC_V1); -+ err = 0; -+ -+out: -+ return err; -+} -+ -+static void au_drinfo_store_work_fin(struct au_drinfo_store *w) -+{ -+ au_kfree_rcu(w->fdata); -+} -+ -+static void au_drinfo_store_rev(struct au_drinfo_rev *rev, -+ struct au_drinfo_store *w) -+{ -+ struct au_drinfo_rev_elm *elm; -+ struct inode *h_dir, *delegated; -+ int err, nelm; -+ struct path infopath = { -+ .mnt = w->h_ppath.mnt -+ }; -+ -+ h_dir = d_inode(w->h_ppath.dentry); -+ IMustLock(h_dir); -+ -+ err = 0; -+ elm = rev->elm; -+ for (nelm = rev->nelm; nelm > 0; nelm--, elm++) { -+ AuDebugOn(elm->created && elm->info_last); -+ if (elm->created) { -+ AuDbg("here\n"); -+ delegated = NULL; -+ infopath.dentry = elm->info_dentry; -+ err = vfsub_unlink(h_dir, &infopath, &delegated, -+ !w->no_sio); -+ AuTraceErr(err); -+ if (unlikely(err == -EWOULDBLOCK)) -+ iput(delegated); -+ dput(elm->info_dentry); -+ } else if (elm->info_last) { -+ AuDbg("here\n"); -+ w->fdata->drinfo = *elm->info_last; -+ memcpy(w->fdata->drinfo.oldname, -+ elm->info_last->oldname, -+ elm->info_last->oldnamelen); -+ err = au_drinfo_store_sio(w, /*elm*/NULL); -+ au_kfree_rcu(elm->info_last); -+ } -+ if (unlikely(err)) -+ AuIOErr("%d, %s\n", err, w->whname); -+ /* go on even if err */ -+ } -+} -+ -+/* caller has to call au_dr_rename_fin() later */ -+static int au_drinfo_store(struct dentry *dentry, aufs_bindex_t btgt, -+ struct qstr *dst_name, void *_rev) -+{ -+ int err, sz, nelm; -+ aufs_bindex_t bindex, btail; -+ struct au_drinfo_store work; -+ struct au_drinfo_rev *rev, **p; -+ struct au_drinfo_rev_elm *elm; -+ struct super_block *sb; -+ struct au_branch *br; -+ struct au_hinode *hdir; -+ -+ err = au_drinfo_store_work_init(&work, btgt); -+ AuTraceErr(err); -+ if (unlikely(err)) -+ goto out; -+ -+ err = -ENOMEM; -+ btail = au_dbtaildir(dentry); -+ nelm = btail - btgt; -+ sz = sizeof(*rev) + sizeof(*elm) * nelm; -+ rev = kcalloc(1, sz, GFP_NOFS); -+ if (unlikely(!rev)) { -+ AuTraceErr(err); -+ goto out_args; -+ } -+ rev->nelm = nelm; -+ elm = rev->elm; -+ p = _rev; -+ *p = rev; -+ -+ err = 0; -+ sb = dentry->d_sb; -+ work.h_ppath.dentry = au_h_dptr(dentry, btgt); -+ work.h_ppath.mnt = au_sbr_mnt(sb, btgt); -+ hdir = au_hi(d_inode(dentry), btgt); -+ au_hn_inode_lock_nested(hdir, AuLsc_I_CHILD); -+ for (bindex = btgt + 1; bindex <= btail; bindex++, elm++) { -+ work.h_dentry = au_h_dptr(dentry, bindex); -+ if (!work.h_dentry) -+ continue; -+ -+ err = au_drinfo_construct(&work.fdata, work.h_dentry, -+ &work.allocated); -+ AuTraceErr(err); -+ if (unlikely(err)) -+ break; -+ -+ work.renameback = au_qstreq(&work.h_dentry->d_name, dst_name); -+ br = au_sbr(sb, bindex); -+ work.whnamelen = sizeof(AUFS_WH_DR_INFO_PFX) - 1; -+ work.whnamelen += au_drinfo_name(br, work.infoname, -+ work.infonamelen); -+ AuDbg("whname %.*s, i%llu, %.*s\n", -+ work.whnamelen, work.whname, -+ be64_to_cpu((__force __be64)work.fdata->drinfo.ino), -+ work.fdata->drinfo.oldnamelen, -+ work.fdata->drinfo.oldname); -+ -+ err = au_drinfo_store_sio(&work, elm); -+ AuTraceErr(err); -+ if (unlikely(err)) -+ break; -+ } -+ if (unlikely(err)) { -+ /* revert all drinfo */ -+ au_drinfo_store_rev(rev, &work); -+ au_kfree_try_rcu(rev); -+ *p = NULL; -+ } -+ au_hn_inode_unlock(hdir); -+ -+out_args: -+ au_drinfo_store_work_fin(&work); -+out: -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+int au_dr_rename(struct dentry *src, aufs_bindex_t bindex, -+ struct qstr *dst_name, void *_rev) -+{ -+ int err, already; -+ ino_t ino; -+ struct super_block *sb; -+ struct au_branch *br; -+ struct au_dr_br *dr; -+ struct dentry *h_dentry; -+ struct inode *h_inode; -+ struct au_dr_hino *ent; -+ struct au_drinfo_rev *rev, **p; -+ -+ AuDbg("bindex %d\n", bindex); -+ -+ err = -ENOMEM; -+ ent = kmalloc(sizeof(*ent), GFP_NOFS); -+ if (unlikely(!ent)) -+ goto out; -+ -+ sb = src->d_sb; -+ br = au_sbr(sb, bindex); -+ dr = &br->br_dirren; -+ h_dentry = au_h_dptr(src, bindex); -+ h_inode = d_inode(h_dentry); -+ ino = h_inode->i_ino; -+ ent->dr_h_ino = ino; -+ already = au_dr_hino_test_add(dr, ino, ent); -+ AuDbg("b%d, hi%llu, already %d\n", -+ bindex, (unsigned long long)ino, already); -+ -+ err = au_drinfo_store(src, bindex, dst_name, _rev); -+ AuTraceErr(err); -+ if (!err) { -+ p = _rev; -+ rev = *p; -+ rev->already = already; -+ goto out; /* success */ -+ } -+ -+ /* revert */ -+ if (!already) -+ au_dr_hino_del(dr, ent); -+ au_kfree_rcu(ent); -+ -+out: -+ AuTraceErr(err); -+ return err; -+} -+ -+void au_dr_rename_fin(struct dentry *src, aufs_bindex_t btgt, void *_rev) -+{ -+ struct au_drinfo_rev *rev; -+ struct au_drinfo_rev_elm *elm; -+ int nelm; -+ -+ rev = _rev; -+ elm = rev->elm; -+ for (nelm = rev->nelm; nelm > 0; nelm--, elm++) { -+ dput(elm->info_dentry); -+ au_kfree_rcu(elm->info_last); -+ } -+ au_kfree_try_rcu(rev); -+} -+ -+void au_dr_rename_rev(struct dentry *src, aufs_bindex_t btgt, void *_rev) -+{ -+ int err; -+ struct au_drinfo_store work; -+ struct au_drinfo_rev *rev = _rev; -+ struct super_block *sb; -+ struct au_branch *br; -+ struct inode *h_inode; -+ struct au_dr_br *dr; -+ struct au_dr_hino *ent; -+ -+ err = au_drinfo_store_work_init(&work, btgt); -+ if (unlikely(err)) -+ goto out; -+ -+ sb = src->d_sb; -+ br = au_sbr(sb, btgt); -+ work.h_ppath.dentry = au_h_dptr(src, btgt); -+ work.h_ppath.mnt = au_br_mnt(br); -+ au_drinfo_store_rev(rev, &work); -+ au_drinfo_store_work_fin(&work); -+ if (rev->already) -+ goto out; -+ -+ dr = &br->br_dirren; -+ h_inode = d_inode(work.h_ppath.dentry); -+ ent = au_dr_hino_find(dr, h_inode->i_ino); -+ BUG_ON(!ent); -+ au_dr_hino_del(dr, ent); -+ au_kfree_rcu(ent); -+ -+out: -+ au_kfree_try_rcu(rev); -+ if (unlikely(err)) -+ pr_err("failed to remove dirren info\n"); -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+static struct au_drinfo *au_drinfo_do_load(struct path *h_ppath, -+ char *whname, int whnamelen, -+ struct dentry **info_dentry) -+{ -+ struct au_drinfo *drinfo; -+ struct file *f; -+ struct inode *h_dir; -+ struct path infopath; -+ int unlocked; -+ -+ AuDbg("%pd/%.*s\n", h_ppath->dentry, whnamelen, whname); -+ -+ *info_dentry = NULL; -+ drinfo = NULL; -+ unlocked = 0; -+ h_dir = d_inode(h_ppath->dentry); -+ inode_lock_shared_nested(h_dir, AuLsc_I_PARENT); -+ infopath.dentry = vfsub_lookup_one_len(whname, h_ppath->dentry, -+ whnamelen); -+ if (IS_ERR(infopath.dentry)) { -+ drinfo = (void *)infopath.dentry; -+ goto out; -+ } -+ -+ if (d_is_negative(infopath.dentry)) -+ goto out_dput; /* success */ -+ -+ infopath.mnt = h_ppath->mnt; -+ f = vfsub_dentry_open(&infopath, O_RDONLY); -+ inode_unlock_shared(h_dir); -+ unlocked = 1; -+ if (IS_ERR(f)) { -+ drinfo = (void *)f; -+ goto out_dput; -+ } -+ -+ drinfo = au_drinfo_read_k(f, /*h_ino*/0); -+ if (IS_ERR_OR_NULL(drinfo)) -+ goto out_fput; -+ -+ AuDbg("oldname %.*s\n", drinfo->oldnamelen, drinfo->oldname); -+ *info_dentry = dget(infopath.dentry); /* keep it alive */ -+ -+out_fput: -+ fput(f); -+out_dput: -+ dput(infopath.dentry); -+out: -+ if (!unlocked) -+ inode_unlock_shared(h_dir); -+ AuTraceErrPtr(drinfo); -+ return drinfo; -+} -+ -+struct au_drinfo_do_load_args { -+ struct au_drinfo **drinfop; -+ struct path *h_ppath; -+ char *whname; -+ int whnamelen; -+ struct dentry **info_dentry; -+}; -+ -+static void au_call_drinfo_do_load(void *args) -+{ -+ struct au_drinfo_do_load_args *a = args; -+ -+ *a->drinfop = au_drinfo_do_load(a->h_ppath, a->whname, a->whnamelen, -+ a->info_dentry); -+} -+ -+struct au_drinfo_load { -+ struct path h_ppath; -+ struct qstr *qname; -+ unsigned char no_sio; -+ -+ aufs_bindex_t ninfo; -+ struct au_drinfo **drinfo; -+}; -+ -+static int au_drinfo_load(struct au_drinfo_load *w, aufs_bindex_t bindex, -+ struct au_branch *br) -+{ -+ int err, wkq_err, whnamelen, e; -+ char whname[sizeof(AUFS_WH_DR_INFO_PFX) + AUFS_DIRREN_ENV_VAL_SZ] -+ = AUFS_WH_DR_INFO_PFX; -+ struct au_drinfo *drinfo; -+ struct qstr oldname; -+ struct inode *h_dir, *delegated; -+ struct dentry *info_dentry; -+ struct path infopath; -+ -+ whnamelen = sizeof(AUFS_WH_DR_INFO_PFX) - 1; -+ whnamelen += au_drinfo_name(br, whname + whnamelen, -+ sizeof(whname) - whnamelen); -+ if (w->no_sio) -+ drinfo = au_drinfo_do_load(&w->h_ppath, whname, whnamelen, -+ &info_dentry); -+ else { -+ struct au_drinfo_do_load_args args = { -+ .drinfop = &drinfo, -+ .h_ppath = &w->h_ppath, -+ .whname = whname, -+ .whnamelen = whnamelen, -+ .info_dentry = &info_dentry -+ }; -+ wkq_err = au_wkq_wait(au_call_drinfo_do_load, &args); -+ if (unlikely(wkq_err)) -+ drinfo = ERR_PTR(wkq_err); -+ } -+ err = PTR_ERR(drinfo); -+ if (IS_ERR_OR_NULL(drinfo)) -+ goto out; -+ -+ err = 0; -+ oldname.len = drinfo->oldnamelen; -+ oldname.name = drinfo->oldname; -+ if (au_qstreq(w->qname, &oldname)) { -+ /* the name is renamed back */ -+ au_kfree_rcu(drinfo); -+ drinfo = NULL; -+ -+ infopath.dentry = info_dentry; -+ infopath.mnt = w->h_ppath.mnt; -+ h_dir = d_inode(w->h_ppath.dentry); -+ delegated = NULL; -+ inode_lock_nested(h_dir, AuLsc_I_PARENT); -+ e = vfsub_unlink(h_dir, &infopath, &delegated, !w->no_sio); -+ inode_unlock(h_dir); -+ if (unlikely(e)) -+ AuIOErr("ignored %d, %pd2\n", e, &infopath.dentry); -+ if (unlikely(e == -EWOULDBLOCK)) -+ iput(delegated); -+ } -+ au_kfree_rcu(w->drinfo[bindex]); -+ w->drinfo[bindex] = drinfo; -+ dput(info_dentry); -+ -+out: -+ AuTraceErr(err); -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+static void au_dr_lkup_free(struct au_drinfo **drinfo, int n) -+{ -+ struct au_drinfo **p = drinfo; -+ -+ while (n-- > 0) -+ au_kfree_rcu(*drinfo++); -+ au_kfree_try_rcu(p); -+} -+ -+int au_dr_lkup(struct au_do_lookup_args *lkup, struct dentry *dentry, -+ aufs_bindex_t btgt) -+{ -+ int err, ninfo; -+ struct au_drinfo_load w; -+ aufs_bindex_t bindex, bbot; -+ struct au_branch *br; -+ struct inode *h_dir; -+ struct au_dr_hino *ent; -+ struct super_block *sb; -+ -+ AuDbg("%.*s, name %.*s, whname %.*s, b%d\n", -+ AuLNPair(&dentry->d_name), AuLNPair(&lkup->dirren.dr_name), -+ AuLNPair(&lkup->whname), btgt); -+ -+ sb = dentry->d_sb; -+ bbot = au_sbbot(sb); -+ w.ninfo = bbot + 1; -+ if (!lkup->dirren.drinfo) { -+ lkup->dirren.drinfo = kcalloc(w.ninfo, -+ sizeof(*lkup->dirren.drinfo), -+ GFP_NOFS); -+ if (unlikely(!lkup->dirren.drinfo)) { -+ err = -ENOMEM; -+ goto out; -+ } -+ lkup->dirren.ninfo = w.ninfo; -+ } -+ w.drinfo = lkup->dirren.drinfo; -+ w.no_sio = !!uid_eq(current_fsuid(), GLOBAL_ROOT_UID); -+ w.h_ppath.dentry = au_h_dptr(dentry, btgt); -+ AuDebugOn(!w.h_ppath.dentry); -+ w.h_ppath.mnt = au_sbr_mnt(sb, btgt); -+ w.qname = &dentry->d_name; -+ -+ ninfo = 0; -+ for (bindex = btgt + 1; bindex <= bbot; bindex++) { -+ br = au_sbr(sb, bindex); -+ err = au_drinfo_load(&w, bindex, br); -+ if (unlikely(err)) -+ goto out_free; -+ if (w.drinfo[bindex]) -+ ninfo++; -+ } -+ if (!ninfo) { -+ br = au_sbr(sb, btgt); -+ h_dir = d_inode(w.h_ppath.dentry); -+ ent = au_dr_hino_find(&br->br_dirren, h_dir->i_ino); -+ AuDebugOn(!ent); -+ au_dr_hino_del(&br->br_dirren, ent); -+ au_kfree_rcu(ent); -+ } -+ goto out; /* success */ -+ -+out_free: -+ au_dr_lkup_free(lkup->dirren.drinfo, lkup->dirren.ninfo); -+ lkup->dirren.ninfo = 0; -+ lkup->dirren.drinfo = NULL; -+out: -+ AuTraceErr(err); -+ return err; -+} -+ -+void au_dr_lkup_fin(struct au_do_lookup_args *lkup) -+{ -+ au_dr_lkup_free(lkup->dirren.drinfo, lkup->dirren.ninfo); -+} -+ -+int au_dr_lkup_name(struct au_do_lookup_args *lkup, aufs_bindex_t btgt) -+{ -+ int err; -+ struct au_drinfo *drinfo; -+ -+ err = 0; -+ if (!lkup->dirren.drinfo) -+ goto out; -+ AuDebugOn(lkup->dirren.ninfo <= btgt); -+ drinfo = lkup->dirren.drinfo[btgt]; -+ if (!drinfo) -+ goto out; -+ -+ au_kfree_try_rcu(lkup->whname.name); -+ lkup->whname.name = NULL; -+ lkup->dirren.dr_name.len = drinfo->oldnamelen; -+ lkup->dirren.dr_name.name = drinfo->oldname; -+ lkup->name = &lkup->dirren.dr_name; -+ err = au_wh_name_alloc(&lkup->whname, lkup->name); -+ if (!err) -+ AuDbg("name %.*s, whname %.*s, b%d\n", -+ AuLNPair(lkup->name), AuLNPair(&lkup->whname), -+ btgt); -+ -+out: -+ AuTraceErr(err); -+ return err; -+} -+ -+int au_dr_lkup_h_ino(struct au_do_lookup_args *lkup, aufs_bindex_t bindex, -+ ino_t h_ino) -+{ -+ int match; -+ struct au_drinfo *drinfo; -+ -+ match = 1; -+ if (!lkup->dirren.drinfo) -+ goto out; -+ AuDebugOn(lkup->dirren.ninfo <= bindex); -+ drinfo = lkup->dirren.drinfo[bindex]; -+ if (!drinfo) -+ goto out; -+ -+ match = (drinfo->ino == h_ino); -+ AuDbg("match %d\n", match); -+ -+out: -+ return match; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+int au_dr_opt_set(struct super_block *sb) -+{ -+ int err; -+ aufs_bindex_t bindex, bbot; -+ struct au_branch *br; -+ -+ err = 0; -+ bbot = au_sbbot(sb); -+ for (bindex = 0; !err && bindex <= bbot; bindex++) { -+ br = au_sbr(sb, bindex); -+ err = au_dr_hino(sb, bindex, /*br*/NULL, &br->br_path); -+ } -+ -+ return err; -+} -+ -+int au_dr_opt_flush(struct super_block *sb) -+{ -+ int err; -+ aufs_bindex_t bindex, bbot; -+ struct au_branch *br; -+ -+ err = 0; -+ bbot = au_sbbot(sb); -+ for (bindex = 0; !err && bindex <= bbot; bindex++) { -+ br = au_sbr(sb, bindex); -+ if (au_br_writable(br->br_perm)) -+ err = au_dr_hino(sb, bindex, /*br*/NULL, /*path*/NULL); -+ } -+ -+ return err; -+} -+ -+int au_dr_opt_clr(struct super_block *sb, int no_flush) -+{ -+ int err; -+ aufs_bindex_t bindex, bbot; -+ struct au_branch *br; -+ -+ err = 0; -+ if (!no_flush) { -+ err = au_dr_opt_flush(sb); -+ if (unlikely(err)) -+ goto out; -+ } -+ -+ bbot = au_sbbot(sb); -+ for (bindex = 0; bindex <= bbot; bindex++) { -+ br = au_sbr(sb, bindex); -+ au_dr_hino_free(&br->br_dirren); -+ } -+ -+out: -+ return err; -+} -diff --git a/fs/aufs/dirren.h b/fs/aufs/dirren.h -new file mode 100644 -index 000000000000..ade589d2e75c ---- /dev/null -+++ b/fs/aufs/dirren.h -@@ -0,0 +1,127 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * Copyright (C) 2017-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * renamed dir info -+ */ -+ -+#ifndef __AUFS_DIRREN_H__ -+#define __AUFS_DIRREN_H__ -+ -+#ifdef __KERNEL__ -+ -+#include -+#include -+#include -+#include "hbl.h" -+ -+#define AuDirren_NHASH 100 -+ -+#ifdef CONFIG_AUFS_DIRREN -+enum au_brid_type { -+ AuBrid_Unset, -+ AuBrid_UUID, -+ AuBrid_FSID, -+ AuBrid_DEV -+}; -+ -+struct au_dr_brid { -+ enum au_brid_type type; -+ union { -+ uuid_t uuid; /* unimplemented yet */ -+ fsid_t fsid; -+ dev_t dev; -+ }; -+}; -+ -+/* 20 is the max digits length of ulong 64 */ -+/* brid-type "_" uuid "_" inum */ -+#define AUFS_DIRREN_FNAME_SZ (1 + 1 + UUID_STRING_LEN + 20) -+#define AUFS_DIRREN_ENV_VAL_SZ (AUFS_DIRREN_FNAME_SZ + 1 + 20) -+ -+struct au_dr_hino { -+ struct hlist_bl_node dr_hnode; -+ ino_t dr_h_ino; -+}; -+ -+struct au_dr_br { -+ struct hlist_bl_head dr_h_ino[AuDirren_NHASH]; -+ struct au_dr_brid dr_brid; -+}; -+ -+struct au_dr_lookup { -+ /* dr_name is pointed by struct au_do_lookup_args.name */ -+ struct qstr dr_name; /* subset of dr_info */ -+ aufs_bindex_t ninfo; -+ struct au_drinfo **drinfo; -+}; -+#else -+struct au_dr_hino; -+/* empty */ -+struct au_dr_br { }; -+struct au_dr_lookup { }; -+#endif -+ -+/* ---------------------------------------------------------------------- */ -+ -+struct au_branch; -+struct au_do_lookup_args; -+struct au_hinode; -+#ifdef CONFIG_AUFS_DIRREN -+int au_dr_hino_test_add(struct au_dr_br *dr, ino_t h_ino, -+ struct au_dr_hino *add_ent); -+void au_dr_hino_free(struct au_dr_br *dr); -+int au_dr_br_init(struct super_block *sb, struct au_branch *br, -+ const struct path *path); -+int au_dr_br_fin(struct super_block *sb, struct au_branch *br); -+int au_dr_rename(struct dentry *src, aufs_bindex_t bindex, -+ struct qstr *dst_name, void *_rev); -+void au_dr_rename_fin(struct dentry *src, aufs_bindex_t btgt, void *rev); -+void au_dr_rename_rev(struct dentry *src, aufs_bindex_t bindex, void *rev); -+int au_dr_lkup(struct au_do_lookup_args *lkup, struct dentry *dentry, -+ aufs_bindex_t bindex); -+int au_dr_lkup_name(struct au_do_lookup_args *lkup, aufs_bindex_t btgt); -+int au_dr_lkup_h_ino(struct au_do_lookup_args *lkup, aufs_bindex_t bindex, -+ ino_t h_ino); -+void au_dr_lkup_fin(struct au_do_lookup_args *lkup); -+int au_dr_opt_set(struct super_block *sb); -+int au_dr_opt_flush(struct super_block *sb); -+int au_dr_opt_clr(struct super_block *sb, int no_flush); -+#else -+AuStubInt0(au_dr_hino_test_add, struct au_dr_br *dr, ino_t h_ino, -+ struct au_dr_hino *add_ent); -+AuStubVoid(au_dr_hino_free, struct au_dr_br *dr); -+AuStubInt0(au_dr_br_init, struct super_block *sb, struct au_branch *br, -+ const struct path *path); -+AuStubInt0(au_dr_br_fin, struct super_block *sb, struct au_branch *br); -+AuStubInt0(au_dr_rename, struct dentry *src, aufs_bindex_t bindex, -+ struct qstr *dst_name, void *_rev); -+AuStubVoid(au_dr_rename_fin, struct dentry *src, aufs_bindex_t btgt, void *rev); -+AuStubVoid(au_dr_rename_rev, struct dentry *src, aufs_bindex_t bindex, -+ void *rev); -+AuStubInt0(au_dr_lkup, struct au_do_lookup_args *lkup, struct dentry *dentry, -+ aufs_bindex_t bindex); -+AuStubInt0(au_dr_lkup_name, struct au_do_lookup_args *lkup, aufs_bindex_t btgt); -+AuStubInt0(au_dr_lkup_h_ino, struct au_do_lookup_args *lkup, -+ aufs_bindex_t bindex, ino_t h_ino); -+AuStubVoid(au_dr_lkup_fin, struct au_do_lookup_args *lkup); -+AuStubInt0(au_dr_opt_set, struct super_block *sb); -+AuStubInt0(au_dr_opt_flush, struct super_block *sb); -+AuStubInt0(au_dr_opt_clr, struct super_block *sb, int no_flush); -+#endif -+ -+/* ---------------------------------------------------------------------- */ -+ -+#ifdef CONFIG_AUFS_DIRREN -+static inline int au_dr_ihash(ino_t h_ino) -+{ -+ return h_ino % AuDirren_NHASH; -+} -+#else -+AuStubInt0(au_dr_ihash, ino_t h_ino); -+#endif -+ -+#endif /* __KERNEL__ */ -+#endif /* __AUFS_DIRREN_H__ */ -diff --git a/fs/aufs/dynop.c b/fs/aufs/dynop.c -new file mode 100644 -index 000000000000..5dbb7193591b ---- /dev/null -+++ b/fs/aufs/dynop.c -@@ -0,0 +1,355 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2010-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * dynamically customizable operations for regular files -+ */ -+ -+#include "aufs.h" -+ -+#define DyPrSym(key) AuDbgSym(key->dk_op.dy_hop) -+ -+/* -+ * How large will these lists be? -+ * Usually just a few elements, 20-30 at most for each, I guess. -+ */ -+static struct hlist_bl_head dynop[AuDyLast]; -+ -+static struct au_dykey *dy_gfind_get(struct hlist_bl_head *hbl, -+ const void *h_op) -+{ -+ struct au_dykey *key, *tmp; -+ struct hlist_bl_node *pos; -+ -+ key = NULL; -+ hlist_bl_lock(hbl); -+ hlist_bl_for_each_entry(tmp, pos, hbl, dk_hnode) -+ if (tmp->dk_op.dy_hop == h_op) { -+ if (kref_get_unless_zero(&tmp->dk_kref)) -+ key = tmp; -+ break; -+ } -+ hlist_bl_unlock(hbl); -+ -+ return key; -+} -+ -+static struct au_dykey *dy_bradd(struct au_branch *br, struct au_dykey *key) -+{ -+ struct au_dykey **k, *found; -+ const void *h_op = key->dk_op.dy_hop; -+ int i; -+ -+ found = NULL; -+ k = br->br_dykey; -+ for (i = 0; i < AuBrDynOp; i++) -+ if (k[i]) { -+ if (k[i]->dk_op.dy_hop == h_op) { -+ found = k[i]; -+ break; -+ } -+ } else -+ break; -+ if (!found) { -+ spin_lock(&br->br_dykey_lock); -+ for (; i < AuBrDynOp; i++) -+ if (k[i]) { -+ if (k[i]->dk_op.dy_hop == h_op) { -+ found = k[i]; -+ break; -+ } -+ } else { -+ k[i] = key; -+ break; -+ } -+ spin_unlock(&br->br_dykey_lock); -+ BUG_ON(i == AuBrDynOp); /* expand the array */ -+ } -+ -+ return found; -+} -+ -+/* kref_get() if @key is already added */ -+static struct au_dykey *dy_gadd(struct hlist_bl_head *hbl, struct au_dykey *key) -+{ -+ struct au_dykey *tmp, *found; -+ struct hlist_bl_node *pos; -+ const void *h_op = key->dk_op.dy_hop; -+ -+ found = NULL; -+ hlist_bl_lock(hbl); -+ hlist_bl_for_each_entry(tmp, pos, hbl, dk_hnode) -+ if (tmp->dk_op.dy_hop == h_op) { -+ if (kref_get_unless_zero(&tmp->dk_kref)) -+ found = tmp; -+ break; -+ } -+ if (!found) -+ hlist_bl_add_head(&key->dk_hnode, hbl); -+ hlist_bl_unlock(hbl); -+ -+ if (!found) -+ DyPrSym(key); -+ return found; -+} -+ -+static void dy_free_rcu(struct rcu_head *rcu) -+{ -+ struct au_dykey *key; -+ -+ key = container_of(rcu, struct au_dykey, dk_rcu); -+ DyPrSym(key); -+ kfree(key); -+} -+ -+static void dy_free(struct kref *kref) -+{ -+ struct au_dykey *key; -+ struct hlist_bl_head *hbl; -+ -+ key = container_of(kref, struct au_dykey, dk_kref); -+ hbl = dynop + key->dk_op.dy_type; -+ au_hbl_del(&key->dk_hnode, hbl); -+ call_rcu(&key->dk_rcu, dy_free_rcu); -+} -+ -+void au_dy_put(struct au_dykey *key) -+{ -+ kref_put(&key->dk_kref, dy_free); -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+#define DyDbgSize(cnt, op) AuDebugOn(cnt != sizeof(op)/sizeof(void *)) -+ -+#ifdef CONFIG_AUFS_DEBUG -+#define DyDbgDeclare(cnt) unsigned int cnt = 0 -+#define DyDbgInc(cnt) do { cnt++; } while (0) -+#else -+#define DyDbgDeclare(cnt) do {} while (0) -+#define DyDbgInc(cnt) do {} while (0) -+#endif -+ -+#define DySet(func, dst, src, h_op, h_sb) do { \ -+ DyDbgInc(cnt); \ -+ if (h_op->func) { \ -+ if (src.func) \ -+ dst.func = src.func; \ -+ else \ -+ AuDbg("%s %s\n", au_sbtype(h_sb), #func); \ -+ } \ -+} while (0) -+ -+#define DySetForce(func, dst, src) do { \ -+ AuDebugOn(!src.func); \ -+ DyDbgInc(cnt); \ -+ dst.func = src.func; \ -+} while (0) -+ -+#define DySetAop(func) \ -+ DySet(func, dyaop->da_op, aufs_aop, h_aop, h_sb) -+#define DySetAopForce(func) \ -+ DySetForce(func, dyaop->da_op, aufs_aop) -+ -+static void dy_aop(struct au_dykey *key, const void *h_op, -+ struct super_block *h_sb __maybe_unused) -+{ -+ struct au_dyaop *dyaop = (void *)key; -+ const struct address_space_operations *h_aop = h_op; -+ DyDbgDeclare(cnt); -+ -+ AuDbg("%s\n", au_sbtype(h_sb)); -+ -+ DySetAop(writepage); -+ DySetAopForce(readpage); /* force */ -+ DySetAop(writepages); -+ DySetAop(set_page_dirty); -+ DySetAop(readpages); -+ DySetAop(readahead); -+ DySetAop(write_begin); -+ DySetAop(write_end); -+ DySetAop(bmap); -+ DySetAop(invalidatepage); -+ DySetAop(releasepage); -+ DySetAop(freepage); -+ /* this one will be changed according to an aufs mount option */ -+ DySetAop(direct_IO); -+ DySetAop(migratepage); -+ DySetAop(isolate_page); -+ DySetAop(putback_page); -+ DySetAop(launder_page); -+ DySetAop(is_partially_uptodate); -+ DySetAop(is_dirty_writeback); -+ DySetAop(error_remove_page); -+ DySetAop(swap_activate); -+ DySetAop(swap_deactivate); -+ -+ DyDbgSize(cnt, *h_aop); -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+static void dy_bug(struct kref *kref) -+{ -+ BUG(); -+} -+ -+static struct au_dykey *dy_get(struct au_dynop *op, struct au_branch *br) -+{ -+ struct au_dykey *key, *old; -+ struct hlist_bl_head *hbl; -+ struct op { -+ unsigned int sz; -+ void (*set)(struct au_dykey *key, const void *h_op, -+ struct super_block *h_sb __maybe_unused); -+ }; -+ static const struct op a[] = { -+ [AuDy_AOP] = { -+ .sz = sizeof(struct au_dyaop), -+ .set = dy_aop -+ } -+ }; -+ const struct op *p; -+ -+ hbl = dynop + op->dy_type; -+ key = dy_gfind_get(hbl, op->dy_hop); -+ if (key) -+ goto out_add; /* success */ -+ -+ p = a + op->dy_type; -+ key = kzalloc(p->sz, GFP_NOFS); -+ if (unlikely(!key)) { -+ key = ERR_PTR(-ENOMEM); -+ goto out; -+ } -+ -+ key->dk_op.dy_hop = op->dy_hop; -+ kref_init(&key->dk_kref); -+ p->set(key, op->dy_hop, au_br_sb(br)); -+ old = dy_gadd(hbl, key); -+ if (old) { -+ au_kfree_rcu(key); -+ key = old; -+ } -+ -+out_add: -+ old = dy_bradd(br, key); -+ if (old) -+ /* its ref-count should never be zero here */ -+ kref_put(&key->dk_kref, dy_bug); -+out: -+ return key; -+} -+ -+/* ---------------------------------------------------------------------- */ -+/* -+ * Aufs prohibits O_DIRECT by default even if the branch supports it. -+ * This behaviour is necessary to return an error from open(O_DIRECT) instead -+ * of the succeeding I/O. The dio mount option enables O_DIRECT and makes -+ * open(O_DIRECT) always succeed, but the succeeding I/O may return an error. -+ * See the aufs manual in detail. -+ */ -+static void dy_adx(struct au_dyaop *dyaop, int do_dx) -+{ -+ if (!do_dx) -+ dyaop->da_op.direct_IO = NULL; -+ else -+ dyaop->da_op.direct_IO = aufs_aop.direct_IO; -+} -+ -+static struct au_dyaop *dy_aget(struct au_branch *br, -+ const struct address_space_operations *h_aop, -+ int do_dx) -+{ -+ struct au_dyaop *dyaop; -+ struct au_dynop op; -+ -+ op.dy_type = AuDy_AOP; -+ op.dy_haop = h_aop; -+ dyaop = (void *)dy_get(&op, br); -+ if (IS_ERR(dyaop)) -+ goto out; -+ dy_adx(dyaop, do_dx); -+ -+out: -+ return dyaop; -+} -+ -+int au_dy_iaop(struct inode *inode, aufs_bindex_t bindex, -+ struct inode *h_inode) -+{ -+ int err, do_dx; -+ struct super_block *sb; -+ struct au_branch *br; -+ struct au_dyaop *dyaop; -+ -+ AuDebugOn(!S_ISREG(h_inode->i_mode)); -+ IiMustWriteLock(inode); -+ -+ sb = inode->i_sb; -+ br = au_sbr(sb, bindex); -+ do_dx = !!au_opt_test(au_mntflags(sb), DIO); -+ dyaop = dy_aget(br, h_inode->i_mapping->a_ops, do_dx); -+ err = PTR_ERR(dyaop); -+ if (IS_ERR(dyaop)) -+ /* unnecessary to call dy_fput() */ -+ goto out; -+ -+ err = 0; -+ inode->i_mapping->a_ops = &dyaop->da_op; -+ -+out: -+ return err; -+} -+ -+/* -+ * Is it safe to replace a_ops during the inode/file is in operation? -+ * Yes, I hope so. -+ */ -+int au_dy_irefresh(struct inode *inode) -+{ -+ int err; -+ aufs_bindex_t btop; -+ struct inode *h_inode; -+ -+ err = 0; -+ if (S_ISREG(inode->i_mode)) { -+ btop = au_ibtop(inode); -+ h_inode = au_h_iptr(inode, btop); -+ err = au_dy_iaop(inode, btop, h_inode); -+ } -+ return err; -+} -+ -+void au_dy_arefresh(int do_dx) -+{ -+ struct hlist_bl_head *hbl; -+ struct hlist_bl_node *pos; -+ struct au_dykey *key; -+ -+ hbl = dynop + AuDy_AOP; -+ hlist_bl_lock(hbl); -+ hlist_bl_for_each_entry(key, pos, hbl, dk_hnode) -+ dy_adx((void *)key, do_dx); -+ hlist_bl_unlock(hbl); -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+void __init au_dy_init(void) -+{ -+ int i; -+ -+ for (i = 0; i < AuDyLast; i++) -+ INIT_HLIST_BL_HEAD(dynop + i); -+} -+ -+void au_dy_fin(void) -+{ -+ int i; -+ -+ for (i = 0; i < AuDyLast; i++) -+ WARN_ON(!hlist_bl_empty(dynop + i)); -+} -diff --git a/fs/aufs/dynop.h b/fs/aufs/dynop.h -new file mode 100644 -index 000000000000..66ac96bbf2ff ---- /dev/null -+++ b/fs/aufs/dynop.h -@@ -0,0 +1,64 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * Copyright (C) 2010-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * dynamically customizable operations (for regular files only) -+ */ -+ -+#ifndef __AUFS_DYNOP_H__ -+#define __AUFS_DYNOP_H__ -+ -+#ifdef __KERNEL__ -+ -+#include -+#include -+ -+enum {AuDy_AOP, AuDyLast}; -+ -+struct au_dynop { -+ int dy_type; -+ union { -+ const void *dy_hop; -+ const struct address_space_operations *dy_haop; -+ }; -+}; -+ -+struct au_dykey { -+ union { -+ struct hlist_bl_node dk_hnode; -+ struct rcu_head dk_rcu; -+ }; -+ struct au_dynop dk_op; -+ -+ /* -+ * during I am in the branch local array, kref is gotten. when the -+ * branch is removed, kref is put. -+ */ -+ struct kref dk_kref; -+}; -+ -+/* stop unioning since their sizes are very different from each other */ -+struct au_dyaop { -+ struct au_dykey da_key; -+ struct address_space_operations da_op; /* not const */ -+}; -+/* make sure that 'struct au_dykey *' can be any type */ -+static_assert(!offsetof(struct au_dyaop, da_key)); -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* dynop.c */ -+struct au_branch; -+void au_dy_put(struct au_dykey *key); -+int au_dy_iaop(struct inode *inode, aufs_bindex_t bindex, -+ struct inode *h_inode); -+int au_dy_irefresh(struct inode *inode); -+void au_dy_arefresh(int do_dio); -+ -+void __init au_dy_init(void); -+void au_dy_fin(void); -+ -+#endif /* __KERNEL__ */ -+#endif /* __AUFS_DYNOP_H__ */ -diff --git a/fs/aufs/export.c b/fs/aufs/export.c -new file mode 100644 -index 000000000000..94005688ac0b ---- /dev/null -+++ b/fs/aufs/export.c -@@ -0,0 +1,824 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * export via nfs -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include "aufs.h" -+ -+union conv { -+#ifdef CONFIG_AUFS_INO_T_64 -+ __u32 a[2]; -+#else -+ __u32 a[1]; -+#endif -+ ino_t ino; -+}; -+ -+static ino_t decode_ino(__u32 *a) -+{ -+ union conv u; -+ -+ BUILD_BUG_ON(sizeof(u.ino) != sizeof(u.a)); -+ u.a[0] = a[0]; -+#ifdef CONFIG_AUFS_INO_T_64 -+ u.a[1] = a[1]; -+#endif -+ return u.ino; -+} -+ -+static void encode_ino(__u32 *a, ino_t ino) -+{ -+ union conv u; -+ -+ u.ino = ino; -+ a[0] = u.a[0]; -+#ifdef CONFIG_AUFS_INO_T_64 -+ a[1] = u.a[1]; -+#endif -+} -+ -+/* NFS file handle */ -+enum { -+ Fh_br_id, -+ Fh_sigen, -+#ifdef CONFIG_AUFS_INO_T_64 -+ /* support 64bit inode number */ -+ Fh_ino1, -+ Fh_ino2, -+ Fh_dir_ino1, -+ Fh_dir_ino2, -+#else -+ Fh_ino1, -+ Fh_dir_ino1, -+#endif -+ Fh_igen, -+ Fh_h_type, -+ Fh_tail, -+ -+ Fh_ino = Fh_ino1, -+ Fh_dir_ino = Fh_dir_ino1 -+}; -+ -+static int au_test_anon(struct dentry *dentry) -+{ -+ /* note: read d_flags without d_lock */ -+ return !!(dentry->d_flags & DCACHE_DISCONNECTED); -+} -+ -+int au_test_nfsd(void) -+{ -+ int ret; -+ struct task_struct *tsk = current; -+ char comm[sizeof(tsk->comm)]; -+ -+ ret = 0; -+ if (tsk->flags & PF_KTHREAD) { -+ get_task_comm(comm, tsk); -+ ret = !strcmp(comm, "nfsd"); -+ } -+ -+ return ret; -+} -+ -+/* ---------------------------------------------------------------------- */ -+/* inode generation external table */ -+ -+void au_xigen_inc(struct inode *inode) -+{ -+ loff_t pos; -+ ssize_t sz; -+ __u32 igen; -+ struct super_block *sb; -+ struct au_sbinfo *sbinfo; -+ -+ sb = inode->i_sb; -+ AuDebugOn(!au_opt_test(au_mntflags(sb), XINO)); -+ -+ sbinfo = au_sbi(sb); -+ pos = inode->i_ino; -+ pos *= sizeof(igen); -+ igen = inode->i_generation + 1; -+ sz = xino_fwrite(sbinfo->si_xigen, &igen, sizeof(igen), &pos); -+ if (sz == sizeof(igen)) -+ return; /* success */ -+ -+ if (unlikely(sz >= 0)) -+ AuIOErr("xigen error (%zd)\n", sz); -+} -+ -+int au_xigen_new(struct inode *inode) -+{ -+ int err; -+ loff_t pos; -+ ssize_t sz; -+ struct super_block *sb; -+ struct au_sbinfo *sbinfo; -+ struct file *file; -+ -+ err = 0; -+ /* todo: dirty, at mount time */ -+ if (inode->i_ino == AUFS_ROOT_INO) -+ goto out; -+ sb = inode->i_sb; -+ SiMustAnyLock(sb); -+ if (unlikely(!au_opt_test(au_mntflags(sb), XINO))) -+ goto out; -+ -+ err = -EFBIG; -+ pos = inode->i_ino; -+ if (unlikely(au_loff_max / sizeof(inode->i_generation) - 1 < pos)) { -+ AuIOErr1("too large i%lld\n", pos); -+ goto out; -+ } -+ pos *= sizeof(inode->i_generation); -+ -+ err = 0; -+ sbinfo = au_sbi(sb); -+ file = sbinfo->si_xigen; -+ BUG_ON(!file); -+ -+ if (vfsub_f_size_read(file) -+ < pos + sizeof(inode->i_generation)) { -+ inode->i_generation = atomic_inc_return(&sbinfo->si_xigen_next); -+ sz = xino_fwrite(file, &inode->i_generation, -+ sizeof(inode->i_generation), &pos); -+ } else -+ sz = xino_fread(file, &inode->i_generation, -+ sizeof(inode->i_generation), &pos); -+ if (sz == sizeof(inode->i_generation)) -+ goto out; /* success */ -+ -+ err = sz; -+ if (unlikely(sz >= 0)) { -+ err = -EIO; -+ AuIOErr("xigen error (%zd)\n", sz); -+ } -+ -+out: -+ return err; -+} -+ -+int au_xigen_set(struct super_block *sb, struct path *path) -+{ -+ int err; -+ struct au_sbinfo *sbinfo; -+ struct file *file; -+ -+ SiMustWriteLock(sb); -+ -+ sbinfo = au_sbi(sb); -+ file = au_xino_create2(sb, path, sbinfo->si_xigen); -+ err = PTR_ERR(file); -+ if (IS_ERR(file)) -+ goto out; -+ err = 0; -+ if (sbinfo->si_xigen) -+ fput(sbinfo->si_xigen); -+ sbinfo->si_xigen = file; -+ -+out: -+ AuTraceErr(err); -+ return err; -+} -+ -+void au_xigen_clr(struct super_block *sb) -+{ -+ struct au_sbinfo *sbinfo; -+ -+ SiMustWriteLock(sb); -+ -+ sbinfo = au_sbi(sb); -+ if (sbinfo->si_xigen) { -+ fput(sbinfo->si_xigen); -+ sbinfo->si_xigen = NULL; -+ } -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+static struct dentry *decode_by_ino(struct super_block *sb, ino_t ino, -+ ino_t dir_ino) -+{ -+ struct dentry *dentry, *d; -+ struct inode *inode; -+ unsigned int sigen; -+ -+ dentry = NULL; -+ inode = ilookup(sb, ino); -+ if (!inode) -+ goto out; -+ -+ dentry = ERR_PTR(-ESTALE); -+ sigen = au_sigen(sb); -+ if (unlikely(au_is_bad_inode(inode) -+ || IS_DEADDIR(inode) -+ || sigen != au_iigen(inode, NULL))) -+ goto out_iput; -+ -+ dentry = NULL; -+ if (!dir_ino || S_ISDIR(inode->i_mode)) -+ dentry = d_find_alias(inode); -+ else { -+ spin_lock(&inode->i_lock); -+ hlist_for_each_entry(d, &inode->i_dentry, d_u.d_alias) { -+ spin_lock(&d->d_lock); -+ if (!au_test_anon(d) -+ && d_inode(d->d_parent)->i_ino == dir_ino) { -+ dentry = dget_dlock(d); -+ spin_unlock(&d->d_lock); -+ break; -+ } -+ spin_unlock(&d->d_lock); -+ } -+ spin_unlock(&inode->i_lock); -+ } -+ if (unlikely(dentry && au_digen_test(dentry, sigen))) { -+ /* need to refresh */ -+ dput(dentry); -+ dentry = NULL; -+ } -+ -+out_iput: -+ iput(inode); -+out: -+ AuTraceErrPtr(dentry); -+ return dentry; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* todo: dirty? */ -+/* if exportfs_decode_fh() passed vfsmount*, we could be happy */ -+ -+struct au_compare_mnt_args { -+ /* input */ -+ struct super_block *sb; -+ -+ /* output */ -+ struct vfsmount *mnt; -+}; -+ -+static int au_compare_mnt(struct vfsmount *mnt, void *arg) -+{ -+ struct au_compare_mnt_args *a = arg; -+ -+ if (mnt->mnt_sb != a->sb) -+ return 0; -+ a->mnt = mntget(mnt); -+ return 1; -+} -+ -+static struct vfsmount *au_mnt_get(struct super_block *sb) -+{ -+ int err; -+ struct path root; -+ struct au_compare_mnt_args args = { -+ .sb = sb -+ }; -+ -+ get_fs_root(current->fs, &root); -+ rcu_read_lock(); -+ err = iterate_mounts(au_compare_mnt, &args, root.mnt); -+ rcu_read_unlock(); -+ path_put(&root); -+ AuDebugOn(!err); -+ AuDebugOn(!args.mnt); -+ return args.mnt; -+} -+ -+struct au_nfsd_si_lock { -+ unsigned int sigen; -+ aufs_bindex_t bindex, br_id; -+ unsigned char force_lock; -+}; -+ -+static int si_nfsd_read_lock(struct super_block *sb, -+ struct au_nfsd_si_lock *nsi_lock) -+{ -+ int err; -+ aufs_bindex_t bindex; -+ -+ si_read_lock(sb, AuLock_FLUSH); -+ -+ /* branch id may be wrapped around */ -+ err = 0; -+ bindex = au_br_index(sb, nsi_lock->br_id); -+ if (bindex >= 0 && nsi_lock->sigen + AUFS_BRANCH_MAX > au_sigen(sb)) -+ goto out; /* success */ -+ -+ err = -ESTALE; -+ bindex = -1; -+ if (!nsi_lock->force_lock) -+ si_read_unlock(sb); -+ -+out: -+ nsi_lock->bindex = bindex; -+ return err; -+} -+ -+struct find_name_by_ino { -+ struct dir_context ctx; -+ int called, found; -+ ino_t ino; -+ char *name; -+ int namelen; -+}; -+ -+static int -+find_name_by_ino(struct dir_context *ctx, const char *name, int namelen, -+ loff_t offset, u64 ino, unsigned int d_type) -+{ -+ struct find_name_by_ino *a = container_of(ctx, struct find_name_by_ino, -+ ctx); -+ -+ a->called++; -+ if (a->ino != ino) -+ return 0; -+ -+ memcpy(a->name, name, namelen); -+ a->namelen = namelen; -+ a->found = 1; -+ return 1; -+} -+ -+static struct dentry *au_lkup_by_ino(struct path *path, ino_t ino, -+ struct au_nfsd_si_lock *nsi_lock) -+{ -+ struct dentry *dentry, *parent; -+ struct file *file; -+ struct inode *dir; -+ struct find_name_by_ino arg = { -+ .ctx = { -+ .actor = find_name_by_ino -+ } -+ }; -+ int err; -+ -+ parent = path->dentry; -+ if (nsi_lock) -+ si_read_unlock(parent->d_sb); -+ file = vfsub_dentry_open(path, au_dir_roflags); -+ dentry = (void *)file; -+ if (IS_ERR(file)) -+ goto out; -+ -+ dentry = ERR_PTR(-ENOMEM); -+ arg.name = (void *)__get_free_page(GFP_NOFS); -+ if (unlikely(!arg.name)) -+ goto out_file; -+ arg.ino = ino; -+ arg.found = 0; -+ do { -+ arg.called = 0; -+ /* smp_mb(); */ -+ err = vfsub_iterate_dir(file, &arg.ctx); -+ } while (!err && !arg.found && arg.called); -+ dentry = ERR_PTR(err); -+ if (unlikely(err)) -+ goto out_name; -+ /* instead of ENOENT */ -+ dentry = ERR_PTR(-ESTALE); -+ if (!arg.found) -+ goto out_name; -+ -+ /* do not call vfsub_lkup_one() */ -+ dir = d_inode(parent); -+ dentry = vfsub_lookup_one_len_unlocked(arg.name, parent, arg.namelen); -+ AuTraceErrPtr(dentry); -+ if (IS_ERR(dentry)) -+ goto out_name; -+ AuDebugOn(au_test_anon(dentry)); -+ if (unlikely(d_really_is_negative(dentry))) { -+ dput(dentry); -+ dentry = ERR_PTR(-ENOENT); -+ } -+ -+out_name: -+ free_page((unsigned long)arg.name); -+out_file: -+ fput(file); -+out: -+ if (unlikely(nsi_lock -+ && si_nfsd_read_lock(parent->d_sb, nsi_lock) < 0)) -+ if (!IS_ERR(dentry)) { -+ dput(dentry); -+ dentry = ERR_PTR(-ESTALE); -+ } -+ AuTraceErrPtr(dentry); -+ return dentry; -+} -+ -+static struct dentry *decode_by_dir_ino(struct super_block *sb, ino_t ino, -+ ino_t dir_ino, -+ struct au_nfsd_si_lock *nsi_lock) -+{ -+ struct dentry *dentry; -+ struct path path; -+ -+ if (dir_ino != AUFS_ROOT_INO) { -+ path.dentry = decode_by_ino(sb, dir_ino, 0); -+ dentry = path.dentry; -+ if (!path.dentry || IS_ERR(path.dentry)) -+ goto out; -+ AuDebugOn(au_test_anon(path.dentry)); -+ } else -+ path.dentry = dget(sb->s_root); -+ -+ path.mnt = au_mnt_get(sb); -+ dentry = au_lkup_by_ino(&path, ino, nsi_lock); -+ path_put(&path); -+ -+out: -+ AuTraceErrPtr(dentry); -+ return dentry; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+static int h_acceptable(void *expv, struct dentry *dentry) -+{ -+ return 1; -+} -+ -+static char *au_build_path(struct dentry *h_parent, struct path *h_rootpath, -+ char *buf, int len, struct super_block *sb) -+{ -+ char *p; -+ int n; -+ struct path path; -+ -+ p = d_path(h_rootpath, buf, len); -+ if (IS_ERR(p)) -+ goto out; -+ n = strlen(p); -+ -+ path.mnt = h_rootpath->mnt; -+ path.dentry = h_parent; -+ p = d_path(&path, buf, len); -+ if (IS_ERR(p)) -+ goto out; -+ if (n != 1) -+ p += n; -+ -+ path.mnt = au_mnt_get(sb); -+ path.dentry = sb->s_root; -+ p = d_path(&path, buf, len - strlen(p)); -+ mntput(path.mnt); -+ if (IS_ERR(p)) -+ goto out; -+ if (n != 1) -+ p[strlen(p)] = '/'; -+ -+out: -+ AuTraceErrPtr(p); -+ return p; -+} -+ -+static -+struct dentry *decode_by_path(struct super_block *sb, ino_t ino, __u32 *fh, -+ int fh_len, struct au_nfsd_si_lock *nsi_lock) -+{ -+ struct dentry *dentry, *h_parent, *root; -+ struct super_block *h_sb; -+ char *pathname, *p; -+ struct vfsmount *h_mnt; -+ struct au_branch *br; -+ int err; -+ struct path path; -+ -+ br = au_sbr(sb, nsi_lock->bindex); -+ h_mnt = au_br_mnt(br); -+ h_sb = h_mnt->mnt_sb; -+ /* todo: call lower fh_to_dentry()? fh_to_parent()? */ -+ lockdep_off(); -+ h_parent = exportfs_decode_fh(h_mnt, (void *)(fh + Fh_tail), -+ fh_len - Fh_tail, fh[Fh_h_type], -+ h_acceptable, /*context*/NULL); -+ lockdep_on(); -+ dentry = h_parent; -+ if (unlikely(!h_parent || IS_ERR(h_parent))) { -+ AuWarn1("%s decode_fh failed, %ld\n", -+ au_sbtype(h_sb), PTR_ERR(h_parent)); -+ goto out; -+ } -+ dentry = NULL; -+ if (unlikely(au_test_anon(h_parent))) { -+ AuWarn1("%s decode_fh returned a disconnected dentry\n", -+ au_sbtype(h_sb)); -+ goto out_h_parent; -+ } -+ -+ dentry = ERR_PTR(-ENOMEM); -+ pathname = (void *)__get_free_page(GFP_NOFS); -+ if (unlikely(!pathname)) -+ goto out_h_parent; -+ -+ root = sb->s_root; -+ path.mnt = h_mnt; -+ di_read_lock_parent(root, !AuLock_IR); -+ path.dentry = au_h_dptr(root, nsi_lock->bindex); -+ di_read_unlock(root, !AuLock_IR); -+ p = au_build_path(h_parent, &path, pathname, PAGE_SIZE, sb); -+ dentry = (void *)p; -+ if (IS_ERR(p)) -+ goto out_pathname; -+ -+ si_read_unlock(sb); -+ err = vfsub_kern_path(p, LOOKUP_FOLLOW | LOOKUP_DIRECTORY, &path); -+ dentry = ERR_PTR(err); -+ if (unlikely(err)) -+ goto out_relock; -+ -+ dentry = ERR_PTR(-ENOENT); -+ AuDebugOn(au_test_anon(path.dentry)); -+ if (unlikely(d_really_is_negative(path.dentry))) -+ goto out_path; -+ -+ if (ino != d_inode(path.dentry)->i_ino) -+ dentry = au_lkup_by_ino(&path, ino, /*nsi_lock*/NULL); -+ else -+ dentry = dget(path.dentry); -+ -+out_path: -+ path_put(&path); -+out_relock: -+ if (unlikely(si_nfsd_read_lock(sb, nsi_lock) < 0)) -+ if (!IS_ERR(dentry)) { -+ dput(dentry); -+ dentry = ERR_PTR(-ESTALE); -+ } -+out_pathname: -+ free_page((unsigned long)pathname); -+out_h_parent: -+ dput(h_parent); -+out: -+ AuTraceErrPtr(dentry); -+ return dentry; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+static struct dentry * -+aufs_fh_to_dentry(struct super_block *sb, struct fid *fid, int fh_len, -+ int fh_type) -+{ -+ struct dentry *dentry; -+ __u32 *fh = fid->raw; -+ struct au_branch *br; -+ ino_t ino, dir_ino; -+ struct au_nfsd_si_lock nsi_lock = { -+ .force_lock = 0 -+ }; -+ -+ dentry = ERR_PTR(-ESTALE); -+ /* it should never happen, but the file handle is unreliable */ -+ if (unlikely(fh_len < Fh_tail)) -+ goto out; -+ nsi_lock.sigen = fh[Fh_sigen]; -+ nsi_lock.br_id = fh[Fh_br_id]; -+ -+ /* branch id may be wrapped around */ -+ br = NULL; -+ if (unlikely(si_nfsd_read_lock(sb, &nsi_lock))) -+ goto out; -+ nsi_lock.force_lock = 1; -+ -+ /* is this inode still cached? */ -+ ino = decode_ino(fh + Fh_ino); -+ /* it should never happen */ -+ if (unlikely(ino == AUFS_ROOT_INO)) -+ goto out_unlock; -+ -+ dir_ino = decode_ino(fh + Fh_dir_ino); -+ dentry = decode_by_ino(sb, ino, dir_ino); -+ if (IS_ERR(dentry)) -+ goto out_unlock; -+ if (dentry) -+ goto accept; -+ -+ /* is the parent dir cached? */ -+ br = au_sbr(sb, nsi_lock.bindex); -+ au_lcnt_inc(&br->br_nfiles); -+ dentry = decode_by_dir_ino(sb, ino, dir_ino, &nsi_lock); -+ if (IS_ERR(dentry)) -+ goto out_unlock; -+ if (dentry) -+ goto accept; -+ -+ /* lookup path */ -+ dentry = decode_by_path(sb, ino, fh, fh_len, &nsi_lock); -+ if (IS_ERR(dentry)) -+ goto out_unlock; -+ if (unlikely(!dentry)) -+ /* todo?: make it ESTALE */ -+ goto out_unlock; -+ -+accept: -+ if (!au_digen_test(dentry, au_sigen(sb)) -+ && d_inode(dentry)->i_generation == fh[Fh_igen]) -+ goto out_unlock; /* success */ -+ -+ dput(dentry); -+ dentry = ERR_PTR(-ESTALE); -+out_unlock: -+ if (br) -+ au_lcnt_dec(&br->br_nfiles); -+ si_read_unlock(sb); -+out: -+ AuTraceErrPtr(dentry); -+ return dentry; -+} -+ -+#if 0 /* reserved for future use */ -+/* support subtreecheck option */ -+static struct dentry *aufs_fh_to_parent(struct super_block *sb, struct fid *fid, -+ int fh_len, int fh_type) -+{ -+ struct dentry *parent; -+ __u32 *fh = fid->raw; -+ ino_t dir_ino; -+ -+ dir_ino = decode_ino(fh + Fh_dir_ino); -+ parent = decode_by_ino(sb, dir_ino, 0); -+ if (IS_ERR(parent)) -+ goto out; -+ if (!parent) -+ parent = decode_by_path(sb, au_br_index(sb, fh[Fh_br_id]), -+ dir_ino, fh, fh_len); -+ -+out: -+ AuTraceErrPtr(parent); -+ return parent; -+} -+#endif -+ -+/* ---------------------------------------------------------------------- */ -+ -+static int aufs_encode_fh(struct inode *inode, __u32 *fh, int *max_len, -+ struct inode *dir) -+{ -+ int err; -+ aufs_bindex_t bindex; -+ struct super_block *sb, *h_sb; -+ struct dentry *dentry, *parent, *h_parent; -+ struct inode *h_dir; -+ struct au_branch *br; -+ -+ err = -ENOSPC; -+ if (unlikely(*max_len <= Fh_tail)) { -+ AuWarn1("NFSv2 client (max_len %d)?\n", *max_len); -+ goto out; -+ } -+ -+ err = FILEID_ROOT; -+ if (inode->i_ino == AUFS_ROOT_INO) { -+ AuDebugOn(inode->i_ino != AUFS_ROOT_INO); -+ goto out; -+ } -+ -+ h_parent = NULL; -+ sb = inode->i_sb; -+ err = si_read_lock(sb, AuLock_FLUSH); -+ if (unlikely(err)) -+ goto out; -+ -+#ifdef CONFIG_AUFS_DEBUG -+ if (unlikely(!au_opt_test(au_mntflags(sb), XINO))) -+ AuWarn1("NFS-exporting requires xino\n"); -+#endif -+ err = -EIO; -+ parent = NULL; -+ ii_read_lock_child(inode); -+ bindex = au_ibtop(inode); -+ if (!dir) { -+ dentry = d_find_any_alias(inode); -+ if (unlikely(!dentry)) -+ goto out_unlock; -+ AuDebugOn(au_test_anon(dentry)); -+ parent = dget_parent(dentry); -+ dput(dentry); -+ if (unlikely(!parent)) -+ goto out_unlock; -+ if (d_really_is_positive(parent)) -+ dir = d_inode(parent); -+ } -+ -+ ii_read_lock_parent(dir); -+ h_dir = au_h_iptr(dir, bindex); -+ ii_read_unlock(dir); -+ if (unlikely(!h_dir)) -+ goto out_parent; -+ h_parent = d_find_any_alias(h_dir); -+ if (unlikely(!h_parent)) -+ goto out_hparent; -+ -+ err = -EPERM; -+ br = au_sbr(sb, bindex); -+ h_sb = au_br_sb(br); -+ if (unlikely(!h_sb->s_export_op)) { -+ AuErr1("%s branch is not exportable\n", au_sbtype(h_sb)); -+ goto out_hparent; -+ } -+ -+ fh[Fh_br_id] = br->br_id; -+ fh[Fh_sigen] = au_sigen(sb); -+ encode_ino(fh + Fh_ino, inode->i_ino); -+ encode_ino(fh + Fh_dir_ino, dir->i_ino); -+ fh[Fh_igen] = inode->i_generation; -+ -+ *max_len -= Fh_tail; -+ fh[Fh_h_type] = exportfs_encode_fh(h_parent, (void *)(fh + Fh_tail), -+ max_len, -+ /*connectable or subtreecheck*/0); -+ err = fh[Fh_h_type]; -+ *max_len += Fh_tail; -+ /* todo: macros? */ -+ if (err != FILEID_INVALID) -+ err = 99; -+ else -+ AuWarn1("%s encode_fh failed\n", au_sbtype(h_sb)); -+ -+out_hparent: -+ dput(h_parent); -+out_parent: -+ dput(parent); -+out_unlock: -+ ii_read_unlock(inode); -+ si_read_unlock(sb); -+out: -+ if (unlikely(err < 0)) -+ err = FILEID_INVALID; -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+static int aufs_commit_metadata(struct inode *inode) -+{ -+ int err; -+ aufs_bindex_t bindex; -+ struct super_block *sb; -+ struct inode *h_inode; -+ int (*f)(struct inode *inode); -+ -+ sb = inode->i_sb; -+ si_read_lock(sb, AuLock_FLUSH | AuLock_NOPLMW); -+ ii_write_lock_child(inode); -+ bindex = au_ibtop(inode); -+ AuDebugOn(bindex < 0); -+ h_inode = au_h_iptr(inode, bindex); -+ -+ f = h_inode->i_sb->s_export_op->commit_metadata; -+ if (f) -+ err = f(h_inode); -+ else { -+ struct writeback_control wbc = { -+ .sync_mode = WB_SYNC_ALL, -+ .nr_to_write = 0 /* metadata only */ -+ }; -+ -+ err = sync_inode(h_inode, &wbc); -+ } -+ -+ au_cpup_attr_timesizes(inode); -+ ii_write_unlock(inode); -+ si_read_unlock(sb); -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+static struct export_operations aufs_export_op = { -+ .fh_to_dentry = aufs_fh_to_dentry, -+ /* .fh_to_parent = aufs_fh_to_parent, */ -+ .encode_fh = aufs_encode_fh, -+ .commit_metadata = aufs_commit_metadata -+}; -+ -+void au_export_init(struct super_block *sb) -+{ -+ struct au_sbinfo *sbinfo; -+ __u32 u; -+ -+ BUILD_BUG_ON_MSG(IS_BUILTIN(CONFIG_AUFS_FS) -+ && IS_MODULE(CONFIG_EXPORTFS), -+ AUFS_NAME ": unsupported configuration " -+ "CONFIG_EXPORTFS=m and CONFIG_AUFS_FS=y"); -+ -+ sb->s_export_op = &aufs_export_op; -+ sbinfo = au_sbi(sb); -+ sbinfo->si_xigen = NULL; -+ get_random_bytes(&u, sizeof(u)); -+ BUILD_BUG_ON(sizeof(u) != sizeof(int)); -+ atomic_set(&sbinfo->si_xigen_next, u); -+} -diff --git a/fs/aufs/f_op.c b/fs/aufs/f_op.c -new file mode 100644 -index 000000000000..7e9298b963aa ---- /dev/null -+++ b/fs/aufs/f_op.c -@@ -0,0 +1,749 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * file and vm operations -+ */ -+ -+#include -+#include -+#include -+#include -+#include "aufs.h" -+ -+int au_do_open_nondir(struct file *file, int flags, struct file *h_file) -+{ -+ int err; -+ aufs_bindex_t bindex; -+ struct dentry *dentry, *h_dentry; -+ struct au_finfo *finfo; -+ struct inode *h_inode; -+ -+ FiMustWriteLock(file); -+ -+ err = 0; -+ dentry = file->f_path.dentry; -+ AuDebugOn(IS_ERR_OR_NULL(dentry)); -+ finfo = au_fi(file); -+ memset(&finfo->fi_htop, 0, sizeof(finfo->fi_htop)); -+ atomic_set(&finfo->fi_mmapped, 0); -+ bindex = au_dbtop(dentry); -+ if (!h_file) { -+ h_dentry = au_h_dptr(dentry, bindex); -+ err = vfsub_test_mntns(file->f_path.mnt, h_dentry->d_sb); -+ if (unlikely(err)) -+ goto out; -+ h_file = au_h_open(dentry, bindex, flags, file, /*force_wr*/0); -+ if (IS_ERR(h_file)) { -+ err = PTR_ERR(h_file); -+ goto out; -+ } -+ } else { -+ h_dentry = h_file->f_path.dentry; -+ err = vfsub_test_mntns(file->f_path.mnt, h_dentry->d_sb); -+ if (unlikely(err)) -+ goto out; -+ /* br ref is already inc-ed */ -+ } -+ -+ if ((flags & __O_TMPFILE) -+ && !(flags & O_EXCL)) { -+ h_inode = file_inode(h_file); -+ spin_lock(&h_inode->i_lock); -+ h_inode->i_state |= I_LINKABLE; -+ spin_unlock(&h_inode->i_lock); -+ } -+ au_set_fbtop(file, bindex); -+ au_set_h_fptr(file, bindex, h_file); -+ au_update_figen(file); -+ /* todo: necessary? */ -+ /* file->f_ra = h_file->f_ra; */ -+ -+out: -+ return err; -+} -+ -+static int aufs_open_nondir(struct inode *inode __maybe_unused, -+ struct file *file) -+{ -+ int err; -+ struct super_block *sb; -+ struct au_do_open_args args = { -+ .open = au_do_open_nondir -+ }; -+ -+ AuDbg("%pD, f_flags 0x%x, f_mode 0x%x\n", -+ file, vfsub_file_flags(file), file->f_mode); -+ -+ sb = file->f_path.dentry->d_sb; -+ si_read_lock(sb, AuLock_FLUSH); -+ err = au_do_open(file, &args); -+ si_read_unlock(sb); -+ return err; -+} -+ -+int aufs_release_nondir(struct inode *inode __maybe_unused, struct file *file) -+{ -+ struct au_finfo *finfo; -+ aufs_bindex_t bindex; -+ -+ finfo = au_fi(file); -+ au_hbl_del(&finfo->fi_hlist, -+ &au_sbi(file->f_path.dentry->d_sb)->si_files); -+ bindex = finfo->fi_btop; -+ if (bindex >= 0) -+ au_set_h_fptr(file, bindex, NULL); -+ -+ au_finfo_fin(file); -+ return 0; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+static int au_do_flush_nondir(struct file *file, fl_owner_t id) -+{ -+ int err; -+ struct file *h_file; -+ -+ err = 0; -+ h_file = au_hf_top(file); -+ if (h_file) -+ err = vfsub_flush(h_file, id); -+ return err; -+} -+ -+static int aufs_flush_nondir(struct file *file, fl_owner_t id) -+{ -+ return au_do_flush(file, id, au_do_flush_nondir); -+} -+ -+/* ---------------------------------------------------------------------- */ -+/* -+ * read and write functions acquire [fdi]_rwsem once, but release before -+ * mmap_sem. This is because to stop a race condition between mmap(2). -+ * Releasing these aufs-rwsem should be safe, no branch-management (by keeping -+ * si_rwsem), no harmful copy-up should happen. Actually copy-up may happen in -+ * read functions after [fdi]_rwsem are released, but it should be harmless. -+ */ -+ -+/* Callers should call au_read_post() or fput() in the end */ -+struct file *au_read_pre(struct file *file, int keep_fi, unsigned int lsc) -+{ -+ struct file *h_file; -+ int err; -+ -+ err = au_reval_and_lock_fdi(file, au_reopen_nondir, /*wlock*/0, lsc); -+ if (!err) { -+ di_read_unlock(file->f_path.dentry, AuLock_IR); -+ h_file = au_hf_top(file); -+ get_file(h_file); -+ if (!keep_fi) -+ fi_read_unlock(file); -+ } else -+ h_file = ERR_PTR(err); -+ -+ return h_file; -+} -+ -+static void au_read_post(struct inode *inode, struct file *h_file) -+{ -+ /* update without lock, I don't think it a problem */ -+ fsstack_copy_attr_atime(inode, file_inode(h_file)); -+ fput(h_file); -+} -+ -+struct au_write_pre { -+ /* input */ -+ unsigned int lsc; -+ -+ /* output */ -+ blkcnt_t blks; -+ aufs_bindex_t btop; -+}; -+ -+/* -+ * return with iinfo is write-locked -+ * callers should call au_write_post() or iinfo_write_unlock() + fput() in the -+ * end -+ */ -+static struct file *au_write_pre(struct file *file, int do_ready, -+ struct au_write_pre *wpre) -+{ -+ struct file *h_file; -+ struct dentry *dentry; -+ int err; -+ unsigned int lsc; -+ struct au_pin pin; -+ -+ lsc = 0; -+ if (wpre) -+ lsc = wpre->lsc; -+ err = au_reval_and_lock_fdi(file, au_reopen_nondir, /*wlock*/1, lsc); -+ h_file = ERR_PTR(err); -+ if (unlikely(err)) -+ goto out; -+ -+ dentry = file->f_path.dentry; -+ if (do_ready) { -+ err = au_ready_to_write(file, -1, &pin); -+ if (unlikely(err)) { -+ h_file = ERR_PTR(err); -+ di_write_unlock(dentry); -+ goto out_fi; -+ } -+ } -+ -+ di_downgrade_lock(dentry, /*flags*/0); -+ if (wpre) -+ wpre->btop = au_fbtop(file); -+ h_file = au_hf_top(file); -+ get_file(h_file); -+ if (wpre) -+ wpre->blks = file_inode(h_file)->i_blocks; -+ if (do_ready) -+ au_unpin(&pin); -+ di_read_unlock(dentry, /*flags*/0); -+ -+out_fi: -+ fi_write_unlock(file); -+out: -+ return h_file; -+} -+ -+static void au_write_post(struct inode *inode, struct file *h_file, -+ struct au_write_pre *wpre, ssize_t written) -+{ -+ struct inode *h_inode; -+ -+ au_cpup_attr_timesizes(inode); -+ AuDebugOn(au_ibtop(inode) != wpre->btop); -+ h_inode = file_inode(h_file); -+ inode->i_mode = h_inode->i_mode; -+ ii_write_unlock(inode); -+ /* AuDbg("blks %llu, %llu\n", (u64)blks, (u64)h_inode->i_blocks); */ -+ if (written > 0) -+ au_fhsm_wrote(inode->i_sb, wpre->btop, -+ /*force*/h_inode->i_blocks > wpre->blks); -+ fput(h_file); -+} -+ -+/* -+ * todo: very ugly -+ * it locks both of i_mutex and si_rwsem for read in safe. -+ * if the plink maintenance mode continues forever (that is the problem), -+ * may loop forever. -+ */ -+static void au_mtx_and_read_lock(struct inode *inode) -+{ -+ int err; -+ struct super_block *sb = inode->i_sb; -+ -+ while (1) { -+ inode_lock(inode); -+ err = si_read_lock(sb, AuLock_FLUSH | AuLock_NOPLM); -+ if (!err) -+ break; -+ inode_unlock(inode); -+ si_read_lock(sb, AuLock_NOPLMW); -+ si_read_unlock(sb); -+ } -+} -+ -+static ssize_t au_do_iter(struct file *h_file, int rw, struct kiocb *kio, -+ struct iov_iter *iov_iter) -+{ -+ ssize_t err; -+ struct file *file; -+ ssize_t (*iter)(struct kiocb *, struct iov_iter *); -+ -+ err = security_file_permission(h_file, rw); -+ if (unlikely(err)) -+ goto out; -+ -+ err = -ENOSYS; /* the branch doesn't have its ->(read|write)_iter() */ -+ iter = NULL; -+ if (rw == MAY_READ) -+ iter = h_file->f_op->read_iter; -+ else if (rw == MAY_WRITE) -+ iter = h_file->f_op->write_iter; -+ -+ file = kio->ki_filp; -+ kio->ki_filp = h_file; -+ if (iter) { -+ lockdep_off(); -+ err = iter(kio, iov_iter); -+ lockdep_on(); -+ } else -+ /* currently there is no such fs */ -+ WARN_ON_ONCE(1); -+ kio->ki_filp = file; -+ -+out: -+ return err; -+} -+ -+static ssize_t aufs_read_iter(struct kiocb *kio, struct iov_iter *iov_iter) -+{ -+ ssize_t err; -+ struct file *file, *h_file; -+ struct inode *inode; -+ struct super_block *sb; -+ -+ file = kio->ki_filp; -+ inode = file_inode(file); -+ sb = inode->i_sb; -+ si_read_lock(sb, AuLock_FLUSH | AuLock_NOPLMW); -+ -+ h_file = au_read_pre(file, /*keep_fi*/1, /*lsc*/0); -+ err = PTR_ERR(h_file); -+ if (IS_ERR(h_file)) -+ goto out; -+ -+ if (au_test_loopback_kthread()) { -+ au_warn_loopback(h_file->f_path.dentry->d_sb); -+ if (file->f_mapping != h_file->f_mapping) { -+ file->f_mapping = h_file->f_mapping; -+ smp_mb(); /* unnecessary? */ -+ } -+ } -+ fi_read_unlock(file); -+ -+ err = au_do_iter(h_file, MAY_READ, kio, iov_iter); -+ /* todo: necessary? */ -+ /* file->f_ra = h_file->f_ra; */ -+ au_read_post(inode, h_file); -+ -+out: -+ si_read_unlock(sb); -+ return err; -+} -+ -+static ssize_t aufs_write_iter(struct kiocb *kio, struct iov_iter *iov_iter) -+{ -+ ssize_t err; -+ struct au_write_pre wpre; -+ struct inode *inode; -+ struct file *file, *h_file; -+ -+ file = kio->ki_filp; -+ inode = file_inode(file); -+ au_mtx_and_read_lock(inode); -+ -+ wpre.lsc = 0; -+ h_file = au_write_pre(file, /*do_ready*/1, &wpre); -+ err = PTR_ERR(h_file); -+ if (IS_ERR(h_file)) -+ goto out; -+ -+ err = au_do_iter(h_file, MAY_WRITE, kio, iov_iter); -+ au_write_post(inode, h_file, &wpre, err); -+ -+out: -+ si_read_unlock(inode->i_sb); -+ inode_unlock(inode); -+ return err; -+} -+ -+static ssize_t aufs_splice_read(struct file *file, loff_t *ppos, -+ struct pipe_inode_info *pipe, size_t len, -+ unsigned int flags) -+{ -+ ssize_t err; -+ struct file *h_file; -+ struct inode *inode; -+ struct super_block *sb; -+ -+ inode = file_inode(file); -+ sb = inode->i_sb; -+ si_read_lock(sb, AuLock_FLUSH | AuLock_NOPLMW); -+ -+ h_file = au_read_pre(file, /*keep_fi*/0, /*lsc*/0); -+ err = PTR_ERR(h_file); -+ if (IS_ERR(h_file)) -+ goto out; -+ -+ err = vfsub_splice_to(h_file, ppos, pipe, len, flags); -+ /* todo: necessary? */ -+ /* file->f_ra = h_file->f_ra; */ -+ au_read_post(inode, h_file); -+ -+out: -+ si_read_unlock(sb); -+ return err; -+} -+ -+static ssize_t -+aufs_splice_write(struct pipe_inode_info *pipe, struct file *file, loff_t *ppos, -+ size_t len, unsigned int flags) -+{ -+ ssize_t err; -+ struct au_write_pre wpre; -+ struct inode *inode; -+ struct file *h_file; -+ -+ inode = file_inode(file); -+ au_mtx_and_read_lock(inode); -+ -+ wpre.lsc = 0; -+ h_file = au_write_pre(file, /*do_ready*/1, &wpre); -+ err = PTR_ERR(h_file); -+ if (IS_ERR(h_file)) -+ goto out; -+ -+ err = vfsub_splice_from(pipe, h_file, ppos, len, flags); -+ au_write_post(inode, h_file, &wpre, err); -+ -+out: -+ si_read_unlock(inode->i_sb); -+ inode_unlock(inode); -+ return err; -+} -+ -+static long aufs_fallocate(struct file *file, int mode, loff_t offset, -+ loff_t len) -+{ -+ long err; -+ struct au_write_pre wpre; -+ struct inode *inode; -+ struct file *h_file; -+ -+ inode = file_inode(file); -+ au_mtx_and_read_lock(inode); -+ -+ wpre.lsc = 0; -+ h_file = au_write_pre(file, /*do_ready*/1, &wpre); -+ err = PTR_ERR(h_file); -+ if (IS_ERR(h_file)) -+ goto out; -+ -+ lockdep_off(); -+ err = vfs_fallocate(h_file, mode, offset, len); -+ lockdep_on(); -+ au_write_post(inode, h_file, &wpre, /*written*/1); -+ -+out: -+ si_read_unlock(inode->i_sb); -+ inode_unlock(inode); -+ return err; -+} -+ -+static ssize_t aufs_copy_file_range(struct file *src, loff_t src_pos, -+ struct file *dst, loff_t dst_pos, -+ size_t len, unsigned int flags) -+{ -+ ssize_t err; -+ struct au_write_pre wpre; -+ enum { SRC, DST }; -+ struct { -+ struct inode *inode; -+ struct file *h_file; -+ struct super_block *h_sb; -+ } a[2]; -+#define a_src a[SRC] -+#define a_dst a[DST] -+ -+ err = -EINVAL; -+ a_src.inode = file_inode(src); -+ if (unlikely(!S_ISREG(a_src.inode->i_mode))) -+ goto out; -+ a_dst.inode = file_inode(dst); -+ if (unlikely(!S_ISREG(a_dst.inode->i_mode))) -+ goto out; -+ -+ au_mtx_and_read_lock(a_dst.inode); -+ /* -+ * in order to match the order in di_write_lock2_{child,parent}(), -+ * use f_path.dentry for this comparison. -+ */ -+ if (src->f_path.dentry < dst->f_path.dentry) { -+ a_src.h_file = au_read_pre(src, /*keep_fi*/1, AuLsc_FI_1); -+ err = PTR_ERR(a_src.h_file); -+ if (IS_ERR(a_src.h_file)) -+ goto out_si; -+ -+ wpre.lsc = AuLsc_FI_2; -+ a_dst.h_file = au_write_pre(dst, /*do_ready*/1, &wpre); -+ err = PTR_ERR(a_dst.h_file); -+ if (IS_ERR(a_dst.h_file)) { -+ au_read_post(a_src.inode, a_src.h_file); -+ goto out_si; -+ } -+ } else { -+ wpre.lsc = AuLsc_FI_1; -+ a_dst.h_file = au_write_pre(dst, /*do_ready*/1, &wpre); -+ err = PTR_ERR(a_dst.h_file); -+ if (IS_ERR(a_dst.h_file)) -+ goto out_si; -+ -+ a_src.h_file = au_read_pre(src, /*keep_fi*/1, AuLsc_FI_2); -+ err = PTR_ERR(a_src.h_file); -+ if (IS_ERR(a_src.h_file)) { -+ au_write_post(a_dst.inode, a_dst.h_file, &wpre, -+ /*written*/0); -+ goto out_si; -+ } -+ } -+ -+ err = -EXDEV; -+ a_src.h_sb = file_inode(a_src.h_file)->i_sb; -+ a_dst.h_sb = file_inode(a_dst.h_file)->i_sb; -+ if (unlikely(a_src.h_sb != a_dst.h_sb)) { -+ AuDbgFile(src); -+ AuDbgFile(dst); -+ goto out_file; -+ } -+ -+ err = vfsub_copy_file_range(a_src.h_file, src_pos, a_dst.h_file, -+ dst_pos, len, flags); -+ -+out_file: -+ au_write_post(a_dst.inode, a_dst.h_file, &wpre, err); -+ fi_read_unlock(src); -+ au_read_post(a_src.inode, a_src.h_file); -+out_si: -+ si_read_unlock(a_dst.inode->i_sb); -+ inode_unlock(a_dst.inode); -+out: -+ return err; -+#undef a_src -+#undef a_dst -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* -+ * The locking order around current->mmap_sem. -+ * - in most and regular cases -+ * file I/O syscall -- aufs_read() or something -+ * -- si_rwsem for read -- mmap_sem -+ * (Note that [fdi]i_rwsem are released before mmap_sem). -+ * - in mmap case -+ * mmap(2) -- mmap_sem -- aufs_mmap() -- si_rwsem for read -- [fdi]i_rwsem -+ * This AB-BA order is definitely bad, but is not a problem since "si_rwsem for -+ * read" allows multiple processes to acquire it and [fdi]i_rwsem are not held -+ * in file I/O. Aufs needs to stop lockdep in aufs_mmap() though. -+ * It means that when aufs acquires si_rwsem for write, the process should never -+ * acquire mmap_sem. -+ * -+ * Actually aufs_iterate() holds [fdi]i_rwsem before mmap_sem, but this is not a -+ * problem either since any directory is not able to be mmap-ed. -+ * The similar scenario is applied to aufs_readlink() too. -+ */ -+ -+#if 0 /* stop calling security_file_mmap() */ -+/* cf. linux/include/linux/mman.h: calc_vm_prot_bits() */ -+#define AuConv_VM_PROT(f, b) _calc_vm_trans(f, VM_##b, PROT_##b) -+ -+static unsigned long au_arch_prot_conv(unsigned long flags) -+{ -+ /* currently ppc64 only */ -+#ifdef CONFIG_PPC64 -+ /* cf. linux/arch/powerpc/include/asm/mman.h */ -+ AuDebugOn(arch_calc_vm_prot_bits(-1) != VM_SAO); -+ return AuConv_VM_PROT(flags, SAO); -+#else -+ AuDebugOn(arch_calc_vm_prot_bits(-1)); -+ return 0; -+#endif -+} -+ -+static unsigned long au_prot_conv(unsigned long flags) -+{ -+ return AuConv_VM_PROT(flags, READ) -+ | AuConv_VM_PROT(flags, WRITE) -+ | AuConv_VM_PROT(flags, EXEC) -+ | au_arch_prot_conv(flags); -+} -+ -+/* cf. linux/include/linux/mman.h: calc_vm_flag_bits() */ -+#define AuConv_VM_MAP(f, b) _calc_vm_trans(f, VM_##b, MAP_##b) -+ -+static unsigned long au_flag_conv(unsigned long flags) -+{ -+ return AuConv_VM_MAP(flags, GROWSDOWN) -+ | AuConv_VM_MAP(flags, DENYWRITE) -+ | AuConv_VM_MAP(flags, LOCKED); -+} -+#endif -+ -+static int aufs_mmap(struct file *file, struct vm_area_struct *vma) -+{ -+ int err; -+ const unsigned char wlock -+ = (file->f_mode & FMODE_WRITE) && (vma->vm_flags & VM_SHARED); -+ struct super_block *sb; -+ struct file *h_file; -+ struct inode *inode; -+ -+ AuDbgVmRegion(file, vma); -+ -+ inode = file_inode(file); -+ sb = inode->i_sb; -+ lockdep_off(); -+ si_read_lock(sb, AuLock_NOPLMW); -+ -+ h_file = au_write_pre(file, wlock, /*wpre*/NULL); -+ lockdep_on(); -+ err = PTR_ERR(h_file); -+ if (IS_ERR(h_file)) -+ goto out; -+ -+ err = 0; -+ au_set_mmapped(file); -+ au_vm_file_reset(vma, h_file); -+ /* -+ * we cannot call security_mmap_file() here since it may acquire -+ * mmap_sem or i_mutex. -+ * -+ * err = security_mmap_file(h_file, au_prot_conv(vma->vm_flags), -+ * au_flag_conv(vma->vm_flags)); -+ */ -+ if (!err) -+ err = call_mmap(h_file, vma); -+ if (!err) { -+ au_vm_prfile_set(vma, file); -+ fsstack_copy_attr_atime(inode, file_inode(h_file)); -+ goto out_fput; /* success */ -+ } -+ au_unset_mmapped(file); -+ au_vm_file_reset(vma, file); -+ -+out_fput: -+ lockdep_off(); -+ ii_write_unlock(inode); -+ lockdep_on(); -+ fput(h_file); -+out: -+ lockdep_off(); -+ si_read_unlock(sb); -+ lockdep_on(); -+ AuTraceErr(err); -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+static int aufs_fsync_nondir(struct file *file, loff_t start, loff_t end, -+ int datasync) -+{ -+ int err; -+ struct au_write_pre wpre; -+ struct inode *inode; -+ struct file *h_file; -+ -+ err = 0; /* -EBADF; */ /* posix? */ -+ if (unlikely(!(file->f_mode & FMODE_WRITE))) -+ goto out; -+ -+ inode = file_inode(file); -+ au_mtx_and_read_lock(inode); -+ -+ wpre.lsc = 0; -+ h_file = au_write_pre(file, /*do_ready*/1, &wpre); -+ err = PTR_ERR(h_file); -+ if (IS_ERR(h_file)) -+ goto out_unlock; -+ -+ err = vfsub_fsync(h_file, &h_file->f_path, datasync); -+ au_write_post(inode, h_file, &wpre, /*written*/0); -+ -+out_unlock: -+ si_read_unlock(inode->i_sb); -+ inode_unlock(inode); -+out: -+ return err; -+} -+ -+static int aufs_fasync(int fd, struct file *file, int flag) -+{ -+ int err; -+ struct file *h_file; -+ struct super_block *sb; -+ -+ sb = file->f_path.dentry->d_sb; -+ si_read_lock(sb, AuLock_FLUSH | AuLock_NOPLMW); -+ -+ h_file = au_read_pre(file, /*keep_fi*/0, /*lsc*/0); -+ err = PTR_ERR(h_file); -+ if (IS_ERR(h_file)) -+ goto out; -+ -+ if (h_file->f_op->fasync) -+ err = h_file->f_op->fasync(fd, h_file, flag); -+ fput(h_file); /* instead of au_read_post() */ -+ -+out: -+ si_read_unlock(sb); -+ return err; -+} -+ -+static int aufs_setfl(struct file *file, unsigned long arg) -+{ -+ int err; -+ struct file *h_file; -+ struct super_block *sb; -+ -+ sb = file->f_path.dentry->d_sb; -+ si_read_lock(sb, AuLock_FLUSH | AuLock_NOPLMW); -+ -+ h_file = au_read_pre(file, /*keep_fi*/0, /*lsc*/0); -+ err = PTR_ERR(h_file); -+ if (IS_ERR(h_file)) -+ goto out; -+ -+ /* stop calling h_file->fasync */ -+ arg |= vfsub_file_flags(file) & FASYNC; -+ err = setfl(/*unused fd*/-1, h_file, arg); -+ fput(h_file); /* instead of au_read_post() */ -+ -+out: -+ si_read_unlock(sb); -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* no one supports this operation, currently */ -+#if 0 /* reserved for future use */ -+static ssize_t aufs_sendpage(struct file *file, struct page *page, int offset, -+ size_t len, loff_t *pos, int more) -+{ -+} -+#endif -+ -+/* ---------------------------------------------------------------------- */ -+ -+const struct file_operations aufs_file_fop = { -+ .owner = THIS_MODULE, -+ -+ .llseek = default_llseek, -+ -+ .read_iter = aufs_read_iter, -+ .write_iter = aufs_write_iter, -+ -+#ifdef CONFIG_AUFS_POLL -+ .poll = aufs_poll, -+#endif -+ .unlocked_ioctl = aufs_ioctl_nondir, -+#ifdef CONFIG_COMPAT -+ .compat_ioctl = aufs_compat_ioctl_nondir, -+#endif -+ .mmap = aufs_mmap, -+ .open = aufs_open_nondir, -+ .flush = aufs_flush_nondir, -+ .release = aufs_release_nondir, -+ .fsync = aufs_fsync_nondir, -+ .fasync = aufs_fasync, -+ /* .sendpage = aufs_sendpage, */ -+ .setfl = aufs_setfl, -+ .splice_write = aufs_splice_write, -+ .splice_read = aufs_splice_read, -+#if 0 /* reserved for future use */ -+ .aio_splice_write = aufs_aio_splice_write, -+ .aio_splice_read = aufs_aio_splice_read, -+#endif -+ .fallocate = aufs_fallocate, -+ .copy_file_range = aufs_copy_file_range -+}; -diff --git a/fs/aufs/fhsm.c b/fs/aufs/fhsm.c -new file mode 100644 -index 000000000000..cb054052cf9a ---- /dev/null -+++ b/fs/aufs/fhsm.c -@@ -0,0 +1,413 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2011-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * File-based Hierarchy Storage Management -+ */ -+ -+#include -+#include -+#include -+#include -+#include "aufs.h" -+ -+static aufs_bindex_t au_fhsm_bottom(struct super_block *sb) -+{ -+ struct au_sbinfo *sbinfo; -+ struct au_fhsm *fhsm; -+ -+ SiMustAnyLock(sb); -+ -+ sbinfo = au_sbi(sb); -+ fhsm = &sbinfo->si_fhsm; -+ AuDebugOn(!fhsm); -+ return fhsm->fhsm_bottom; -+} -+ -+void au_fhsm_set_bottom(struct super_block *sb, aufs_bindex_t bindex) -+{ -+ struct au_sbinfo *sbinfo; -+ struct au_fhsm *fhsm; -+ -+ SiMustWriteLock(sb); -+ -+ sbinfo = au_sbi(sb); -+ fhsm = &sbinfo->si_fhsm; -+ AuDebugOn(!fhsm); -+ fhsm->fhsm_bottom = bindex; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+static int au_fhsm_test_jiffy(struct au_sbinfo *sbinfo, struct au_branch *br) -+{ -+ struct au_br_fhsm *bf; -+ -+ bf = br->br_fhsm; -+ MtxMustLock(&bf->bf_lock); -+ -+ return !bf->bf_readable -+ || time_after(jiffies, -+ bf->bf_jiffy + sbinfo->si_fhsm.fhsm_expire); -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+static void au_fhsm_notify(struct super_block *sb, int val) -+{ -+ struct au_sbinfo *sbinfo; -+ struct au_fhsm *fhsm; -+ -+ SiMustAnyLock(sb); -+ -+ sbinfo = au_sbi(sb); -+ fhsm = &sbinfo->si_fhsm; -+ if (au_fhsm_pid(fhsm) -+ && atomic_read(&fhsm->fhsm_readable) != -1) { -+ atomic_set(&fhsm->fhsm_readable, val); -+ if (val) -+ wake_up(&fhsm->fhsm_wqh); -+ } -+} -+ -+static int au_fhsm_stfs(struct super_block *sb, aufs_bindex_t bindex, -+ struct aufs_stfs *rstfs, int do_lock, int do_notify) -+{ -+ int err; -+ struct au_branch *br; -+ struct au_br_fhsm *bf; -+ -+ br = au_sbr(sb, bindex); -+ AuDebugOn(au_br_rdonly(br)); -+ bf = br->br_fhsm; -+ AuDebugOn(!bf); -+ -+ if (do_lock) -+ mutex_lock(&bf->bf_lock); -+ else -+ MtxMustLock(&bf->bf_lock); -+ -+ /* sb->s_root for NFS is unreliable */ -+ err = au_br_stfs(br, &bf->bf_stfs); -+ if (unlikely(err)) { -+ AuErr1("FHSM failed (%d), b%d, ignored.\n", bindex, err); -+ goto out; -+ } -+ -+ bf->bf_jiffy = jiffies; -+ bf->bf_readable = 1; -+ if (do_notify) -+ au_fhsm_notify(sb, /*val*/1); -+ if (rstfs) -+ *rstfs = bf->bf_stfs; -+ -+out: -+ if (do_lock) -+ mutex_unlock(&bf->bf_lock); -+ au_fhsm_notify(sb, /*val*/1); -+ -+ return err; -+} -+ -+void au_fhsm_wrote(struct super_block *sb, aufs_bindex_t bindex, int force) -+{ -+ int err; -+ struct au_sbinfo *sbinfo; -+ struct au_fhsm *fhsm; -+ struct au_branch *br; -+ struct au_br_fhsm *bf; -+ -+ AuDbg("b%d, force %d\n", bindex, force); -+ SiMustAnyLock(sb); -+ -+ sbinfo = au_sbi(sb); -+ fhsm = &sbinfo->si_fhsm; -+ if (!au_ftest_si(sbinfo, FHSM) -+ || fhsm->fhsm_bottom == bindex) -+ return; -+ -+ br = au_sbr(sb, bindex); -+ bf = br->br_fhsm; -+ AuDebugOn(!bf); -+ mutex_lock(&bf->bf_lock); -+ if (force -+ || au_fhsm_pid(fhsm) -+ || au_fhsm_test_jiffy(sbinfo, br)) -+ err = au_fhsm_stfs(sb, bindex, /*rstfs*/NULL, /*do_lock*/0, -+ /*do_notify*/1); -+ mutex_unlock(&bf->bf_lock); -+} -+ -+void au_fhsm_wrote_all(struct super_block *sb, int force) -+{ -+ aufs_bindex_t bindex, bbot; -+ struct au_branch *br; -+ -+ /* exclude the bottom */ -+ bbot = au_fhsm_bottom(sb); -+ for (bindex = 0; bindex < bbot; bindex++) { -+ br = au_sbr(sb, bindex); -+ if (au_br_fhsm(br->br_perm)) -+ au_fhsm_wrote(sb, bindex, force); -+ } -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+static __poll_t au_fhsm_poll(struct file *file, struct poll_table_struct *wait) -+{ -+ __poll_t mask; -+ struct au_sbinfo *sbinfo; -+ struct au_fhsm *fhsm; -+ -+ mask = 0; -+ sbinfo = file->private_data; -+ fhsm = &sbinfo->si_fhsm; -+ poll_wait(file, &fhsm->fhsm_wqh, wait); -+ if (atomic_read(&fhsm->fhsm_readable)) -+ mask = EPOLLIN /* | EPOLLRDNORM */; -+ -+ if (!mask) -+ AuDbg("mask 0x%x\n", mask); -+ return mask; -+} -+ -+static int au_fhsm_do_read_one(struct aufs_stbr __user *stbr, -+ struct aufs_stfs *stfs, __s16 brid) -+{ -+ int err; -+ -+ err = copy_to_user(&stbr->stfs, stfs, sizeof(*stfs)); -+ if (!err) -+ err = __put_user(brid, &stbr->brid); -+ if (unlikely(err)) -+ err = -EFAULT; -+ -+ return err; -+} -+ -+static ssize_t au_fhsm_do_read(struct super_block *sb, -+ struct aufs_stbr __user *stbr, size_t count) -+{ -+ ssize_t err; -+ int nstbr; -+ aufs_bindex_t bindex, bbot; -+ struct au_branch *br; -+ struct au_br_fhsm *bf; -+ -+ /* except the bottom branch */ -+ err = 0; -+ nstbr = 0; -+ bbot = au_fhsm_bottom(sb); -+ for (bindex = 0; !err && bindex < bbot; bindex++) { -+ br = au_sbr(sb, bindex); -+ if (!au_br_fhsm(br->br_perm)) -+ continue; -+ -+ bf = br->br_fhsm; -+ mutex_lock(&bf->bf_lock); -+ if (bf->bf_readable) { -+ err = -EFAULT; -+ if (count >= sizeof(*stbr)) -+ err = au_fhsm_do_read_one(stbr++, &bf->bf_stfs, -+ br->br_id); -+ if (!err) { -+ bf->bf_readable = 0; -+ count -= sizeof(*stbr); -+ nstbr++; -+ } -+ } -+ mutex_unlock(&bf->bf_lock); -+ } -+ if (!err) -+ err = sizeof(*stbr) * nstbr; -+ -+ return err; -+} -+ -+static ssize_t au_fhsm_read(struct file *file, char __user *buf, size_t count, -+ loff_t *pos) -+{ -+ ssize_t err; -+ int readable; -+ aufs_bindex_t nfhsm, bindex, bbot; -+ struct au_sbinfo *sbinfo; -+ struct au_fhsm *fhsm; -+ struct au_branch *br; -+ struct super_block *sb; -+ -+ err = 0; -+ sbinfo = file->private_data; -+ fhsm = &sbinfo->si_fhsm; -+need_data: -+ spin_lock_irq(&fhsm->fhsm_wqh.lock); -+ if (!atomic_read(&fhsm->fhsm_readable)) { -+ if (vfsub_file_flags(file) & O_NONBLOCK) -+ err = -EAGAIN; -+ else -+ err = wait_event_interruptible_locked_irq -+ (fhsm->fhsm_wqh, -+ atomic_read(&fhsm->fhsm_readable)); -+ } -+ spin_unlock_irq(&fhsm->fhsm_wqh.lock); -+ if (unlikely(err)) -+ goto out; -+ -+ /* sb may already be dead */ -+ au_rw_read_lock(&sbinfo->si_rwsem); -+ readable = atomic_read(&fhsm->fhsm_readable); -+ if (readable > 0) { -+ sb = sbinfo->si_sb; -+ AuDebugOn(!sb); -+ /* exclude the bottom branch */ -+ nfhsm = 0; -+ bbot = au_fhsm_bottom(sb); -+ for (bindex = 0; bindex < bbot; bindex++) { -+ br = au_sbr(sb, bindex); -+ if (au_br_fhsm(br->br_perm)) -+ nfhsm++; -+ } -+ err = -EMSGSIZE; -+ if (nfhsm * sizeof(struct aufs_stbr) <= count) { -+ atomic_set(&fhsm->fhsm_readable, 0); -+ err = au_fhsm_do_read(sbinfo->si_sb, (void __user *)buf, -+ count); -+ } -+ } -+ au_rw_read_unlock(&sbinfo->si_rwsem); -+ if (!readable) -+ goto need_data; -+ -+out: -+ return err; -+} -+ -+static int au_fhsm_release(struct inode *inode, struct file *file) -+{ -+ struct au_sbinfo *sbinfo; -+ struct au_fhsm *fhsm; -+ -+ /* sb may already be dead */ -+ sbinfo = file->private_data; -+ fhsm = &sbinfo->si_fhsm; -+ spin_lock(&fhsm->fhsm_spin); -+ fhsm->fhsm_pid = 0; -+ spin_unlock(&fhsm->fhsm_spin); -+ kobject_put(&sbinfo->si_kobj); -+ -+ return 0; -+} -+ -+static const struct file_operations au_fhsm_fops = { -+ .owner = THIS_MODULE, -+ .llseek = noop_llseek, -+ .read = au_fhsm_read, -+ .poll = au_fhsm_poll, -+ .release = au_fhsm_release -+}; -+ -+int au_fhsm_fd(struct super_block *sb, int oflags) -+{ -+ int err, fd; -+ struct au_sbinfo *sbinfo; -+ struct au_fhsm *fhsm; -+ -+ err = -EPERM; -+ if (unlikely(!capable(CAP_SYS_ADMIN))) -+ goto out; -+ -+ err = -EINVAL; -+ if (unlikely(oflags & ~(O_CLOEXEC | O_NONBLOCK))) -+ goto out; -+ -+ err = 0; -+ sbinfo = au_sbi(sb); -+ fhsm = &sbinfo->si_fhsm; -+ spin_lock(&fhsm->fhsm_spin); -+ if (!fhsm->fhsm_pid) -+ fhsm->fhsm_pid = current->pid; -+ else -+ err = -EBUSY; -+ spin_unlock(&fhsm->fhsm_spin); -+ if (unlikely(err)) -+ goto out; -+ -+ oflags |= O_RDONLY; -+ /* oflags |= FMODE_NONOTIFY; */ -+ fd = anon_inode_getfd("[aufs_fhsm]", &au_fhsm_fops, sbinfo, oflags); -+ err = fd; -+ if (unlikely(fd < 0)) -+ goto out_pid; -+ -+ /* succeed regardless 'fhsm' status */ -+ kobject_get(&sbinfo->si_kobj); -+ si_noflush_read_lock(sb); -+ if (au_ftest_si(sbinfo, FHSM)) -+ au_fhsm_wrote_all(sb, /*force*/0); -+ si_read_unlock(sb); -+ goto out; /* success */ -+ -+out_pid: -+ spin_lock(&fhsm->fhsm_spin); -+ fhsm->fhsm_pid = 0; -+ spin_unlock(&fhsm->fhsm_spin); -+out: -+ AuTraceErr(err); -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+int au_fhsm_br_alloc(struct au_branch *br) -+{ -+ int err; -+ -+ err = 0; -+ br->br_fhsm = kmalloc(sizeof(*br->br_fhsm), GFP_NOFS); -+ if (br->br_fhsm) -+ au_br_fhsm_init(br->br_fhsm); -+ else -+ err = -ENOMEM; -+ -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+void au_fhsm_fin(struct super_block *sb) -+{ -+ au_fhsm_notify(sb, /*val*/-1); -+} -+ -+void au_fhsm_init(struct au_sbinfo *sbinfo) -+{ -+ struct au_fhsm *fhsm; -+ -+ fhsm = &sbinfo->si_fhsm; -+ spin_lock_init(&fhsm->fhsm_spin); -+ init_waitqueue_head(&fhsm->fhsm_wqh); -+ atomic_set(&fhsm->fhsm_readable, 0); -+ fhsm->fhsm_expire -+ = msecs_to_jiffies(AUFS_FHSM_CACHE_DEF_SEC * MSEC_PER_SEC); -+ fhsm->fhsm_bottom = -1; -+} -+ -+void au_fhsm_set(struct au_sbinfo *sbinfo, unsigned int sec) -+{ -+ sbinfo->si_fhsm.fhsm_expire -+ = msecs_to_jiffies(sec * MSEC_PER_SEC); -+} -+ -+void au_fhsm_show(struct seq_file *seq, struct au_sbinfo *sbinfo) -+{ -+ unsigned int u; -+ -+ if (!au_ftest_si(sbinfo, FHSM)) -+ return; -+ -+ u = jiffies_to_msecs(sbinfo->si_fhsm.fhsm_expire) / MSEC_PER_SEC; -+ if (u != AUFS_FHSM_CACHE_DEF_SEC) -+ seq_printf(seq, ",fhsm_sec=%u", u); -+} -diff --git a/fs/aufs/file.c b/fs/aufs/file.c -new file mode 100644 -index 000000000000..3911b2e7e46f ---- /dev/null -+++ b/fs/aufs/file.c -@@ -0,0 +1,850 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * handling file/dir, and address_space operation -+ */ -+ -+#ifdef CONFIG_AUFS_DEBUG -+#include -+#endif -+#include -+#include "aufs.h" -+ -+/* drop flags for writing */ -+unsigned int au_file_roflags(unsigned int flags) -+{ -+ flags &= ~(O_WRONLY | O_RDWR | O_APPEND | O_CREAT | O_TRUNC); -+ flags |= O_RDONLY | O_NOATIME; -+ return flags; -+} -+ -+/* common functions to regular file and dir */ -+struct file *au_h_open(struct dentry *dentry, aufs_bindex_t bindex, int flags, -+ struct file *file, int force_wr) -+{ -+ struct file *h_file; -+ struct dentry *h_dentry; -+ struct inode *h_inode; -+ struct super_block *sb; -+ struct au_branch *br; -+ struct path h_path; -+ int err; -+ -+ /* a race condition can happen between open and unlink/rmdir */ -+ h_file = ERR_PTR(-ENOENT); -+ h_dentry = au_h_dptr(dentry, bindex); -+ if (au_test_nfsd() && (!h_dentry || d_is_negative(h_dentry))) -+ goto out; -+ h_inode = d_inode(h_dentry); -+ spin_lock(&h_dentry->d_lock); -+ err = (!d_unhashed(dentry) && d_unlinked(h_dentry)) -+ /* || !d_inode(dentry)->i_nlink */ -+ ; -+ spin_unlock(&h_dentry->d_lock); -+ if (unlikely(err)) -+ goto out; -+ -+ sb = dentry->d_sb; -+ br = au_sbr(sb, bindex); -+ err = au_br_test_oflag(flags, br); -+ h_file = ERR_PTR(err); -+ if (unlikely(err)) -+ goto out; -+ -+ /* drop flags for writing */ -+ if (au_test_ro(sb, bindex, d_inode(dentry))) { -+ if (force_wr && !(flags & O_WRONLY)) -+ force_wr = 0; -+ flags = au_file_roflags(flags); -+ if (force_wr) { -+ h_file = ERR_PTR(-EROFS); -+ flags = au_file_roflags(flags); -+ if (unlikely(vfsub_native_ro(h_inode) -+ || IS_APPEND(h_inode))) -+ goto out; -+ flags &= ~O_ACCMODE; -+ flags |= O_WRONLY; -+ } -+ } -+ flags &= ~O_CREAT; -+ au_lcnt_inc(&br->br_nfiles); -+ h_path.dentry = h_dentry; -+ h_path.mnt = au_br_mnt(br); -+ h_file = vfsub_dentry_open(&h_path, flags); -+ if (IS_ERR(h_file)) -+ goto out_br; -+ -+ if (flags & __FMODE_EXEC) { -+ err = deny_write_access(h_file); -+ if (unlikely(err)) { -+ fput(h_file); -+ h_file = ERR_PTR(err); -+ goto out_br; -+ } -+ } -+ fsnotify_open(h_file); -+ goto out; /* success */ -+ -+out_br: -+ au_lcnt_dec(&br->br_nfiles); -+out: -+ return h_file; -+} -+ -+static int au_cmoo(struct dentry *dentry) -+{ -+ int err, cmoo, matched; -+ unsigned int udba; -+ struct path h_path; -+ struct au_pin pin; -+ struct au_cp_generic cpg = { -+ .dentry = dentry, -+ .bdst = -1, -+ .bsrc = -1, -+ .len = -1, -+ .pin = &pin, -+ .flags = AuCpup_DTIME | AuCpup_HOPEN -+ }; -+ struct inode *delegated; -+ struct super_block *sb; -+ struct au_sbinfo *sbinfo; -+ struct au_fhsm *fhsm; -+ pid_t pid; -+ struct au_branch *br; -+ struct dentry *parent; -+ struct au_hinode *hdir; -+ -+ DiMustWriteLock(dentry); -+ IiMustWriteLock(d_inode(dentry)); -+ -+ err = 0; -+ if (IS_ROOT(dentry)) -+ goto out; -+ cpg.bsrc = au_dbtop(dentry); -+ if (!cpg.bsrc) -+ goto out; -+ -+ sb = dentry->d_sb; -+ sbinfo = au_sbi(sb); -+ fhsm = &sbinfo->si_fhsm; -+ pid = au_fhsm_pid(fhsm); -+ rcu_read_lock(); -+ matched = (pid -+ && (current->pid == pid -+ || rcu_dereference(current->real_parent)->pid == pid)); -+ rcu_read_unlock(); -+ if (matched) -+ goto out; -+ -+ br = au_sbr(sb, cpg.bsrc); -+ cmoo = au_br_cmoo(br->br_perm); -+ if (!cmoo) -+ goto out; -+ if (!d_is_reg(dentry)) -+ cmoo &= AuBrAttr_COO_ALL; -+ if (!cmoo) -+ goto out; -+ -+ parent = dget_parent(dentry); -+ di_write_lock_parent(parent); -+ err = au_wbr_do_copyup_bu(dentry, cpg.bsrc - 1); -+ cpg.bdst = err; -+ if (unlikely(err < 0)) { -+ err = 0; /* there is no upper writable branch */ -+ goto out_dgrade; -+ } -+ AuDbg("bsrc %d, bdst %d\n", cpg.bsrc, cpg.bdst); -+ -+ /* do not respect the coo attrib for the target branch */ -+ err = au_cpup_dirs(dentry, cpg.bdst); -+ if (unlikely(err)) -+ goto out_dgrade; -+ -+ di_downgrade_lock(parent, AuLock_IR); -+ udba = au_opt_udba(sb); -+ err = au_pin(&pin, dentry, cpg.bdst, udba, -+ AuPin_DI_LOCKED | AuPin_MNT_WRITE); -+ if (unlikely(err)) -+ goto out_parent; -+ -+ err = au_sio_cpup_simple(&cpg); -+ au_unpin(&pin); -+ if (unlikely(err)) -+ goto out_parent; -+ if (!(cmoo & AuBrWAttr_MOO)) -+ goto out_parent; /* success */ -+ -+ err = au_pin(&pin, dentry, cpg.bsrc, udba, -+ AuPin_DI_LOCKED | AuPin_MNT_WRITE); -+ if (unlikely(err)) -+ goto out_parent; -+ -+ h_path.mnt = au_br_mnt(br); -+ h_path.dentry = au_h_dptr(dentry, cpg.bsrc); -+ hdir = au_hi(d_inode(parent), cpg.bsrc); -+ delegated = NULL; -+ err = vfsub_unlink(hdir->hi_inode, &h_path, &delegated, /*force*/1); -+ au_unpin(&pin); -+ /* todo: keep h_dentry or not? */ -+ if (unlikely(err == -EWOULDBLOCK)) { -+ pr_warn("cannot retry for NFSv4 delegation" -+ " for an internal unlink\n"); -+ iput(delegated); -+ } -+ if (unlikely(err)) { -+ pr_err("unlink %pd after coo failed (%d), ignored\n", -+ dentry, err); -+ err = 0; -+ } -+ goto out_parent; /* success */ -+ -+out_dgrade: -+ di_downgrade_lock(parent, AuLock_IR); -+out_parent: -+ di_read_unlock(parent, AuLock_IR); -+ dput(parent); -+out: -+ AuTraceErr(err); -+ return err; -+} -+ -+int au_do_open(struct file *file, struct au_do_open_args *args) -+{ -+ int err, aopen = args->aopen; -+ struct dentry *dentry; -+ struct au_finfo *finfo; -+ -+ if (!aopen) -+ err = au_finfo_init(file, args->fidir); -+ else { -+ lockdep_off(); -+ err = au_finfo_init(file, args->fidir); -+ lockdep_on(); -+ } -+ if (unlikely(err)) -+ goto out; -+ -+ dentry = file->f_path.dentry; -+ AuDebugOn(IS_ERR_OR_NULL(dentry)); -+ di_write_lock_child(dentry); -+ err = au_cmoo(dentry); -+ di_downgrade_lock(dentry, AuLock_IR); -+ if (!err) { -+ if (!aopen) -+ err = args->open(file, vfsub_file_flags(file), NULL); -+ else { -+ lockdep_off(); -+ err = args->open(file, vfsub_file_flags(file), -+ args->h_file); -+ lockdep_on(); -+ } -+ } -+ di_read_unlock(dentry, AuLock_IR); -+ -+ finfo = au_fi(file); -+ if (!err) { -+ finfo->fi_file = file; -+ au_hbl_add(&finfo->fi_hlist, -+ &au_sbi(file->f_path.dentry->d_sb)->si_files); -+ } -+ if (!aopen) -+ fi_write_unlock(file); -+ else { -+ lockdep_off(); -+ fi_write_unlock(file); -+ lockdep_on(); -+ } -+ if (unlikely(err)) { -+ finfo->fi_hdir = NULL; -+ au_finfo_fin(file); -+ } -+ -+out: -+ AuTraceErr(err); -+ return err; -+} -+ -+int au_reopen_nondir(struct file *file) -+{ -+ int err; -+ aufs_bindex_t btop; -+ struct dentry *dentry; -+ struct au_branch *br; -+ struct file *h_file, *h_file_tmp; -+ -+ dentry = file->f_path.dentry; -+ btop = au_dbtop(dentry); -+ br = au_sbr(dentry->d_sb, btop); -+ h_file_tmp = NULL; -+ if (au_fbtop(file) == btop) { -+ h_file = au_hf_top(file); -+ if (file->f_mode == h_file->f_mode) -+ return 0; /* success */ -+ h_file_tmp = h_file; -+ get_file(h_file_tmp); -+ au_lcnt_inc(&br->br_nfiles); -+ au_set_h_fptr(file, btop, NULL); -+ } -+ AuDebugOn(au_fi(file)->fi_hdir); -+ /* -+ * it can happen -+ * file exists on both of rw and ro -+ * open --> dbtop and fbtop are both 0 -+ * prepend a branch as rw, "rw" become ro -+ * remove rw/file -+ * delete the top branch, "rw" becomes rw again -+ * --> dbtop is 1, fbtop is still 0 -+ * write --> fbtop is 0 but dbtop is 1 -+ */ -+ /* AuDebugOn(au_fbtop(file) < btop); */ -+ -+ h_file = au_h_open(dentry, btop, vfsub_file_flags(file) & ~O_TRUNC, -+ file, /*force_wr*/0); -+ err = PTR_ERR(h_file); -+ if (IS_ERR(h_file)) { -+ if (h_file_tmp) { -+ /* revert */ -+ au_set_h_fptr(file, btop, h_file_tmp); -+ h_file_tmp = NULL; -+ } -+ goto out; /* todo: close all? */ -+ } -+ -+ err = 0; -+ au_set_fbtop(file, btop); -+ au_set_h_fptr(file, btop, h_file); -+ au_update_figen(file); -+ /* todo: necessary? */ -+ /* file->f_ra = h_file->f_ra; */ -+ -+out: -+ if (h_file_tmp) { -+ fput(h_file_tmp); -+ au_lcnt_dec(&br->br_nfiles); -+ } -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+static int au_reopen_wh(struct file *file, aufs_bindex_t btgt, -+ struct dentry *hi_wh) -+{ -+ int err; -+ aufs_bindex_t btop; -+ struct au_dinfo *dinfo; -+ struct dentry *h_dentry; -+ struct au_hdentry *hdp; -+ -+ dinfo = au_di(file->f_path.dentry); -+ AuRwMustWriteLock(&dinfo->di_rwsem); -+ -+ btop = dinfo->di_btop; -+ dinfo->di_btop = btgt; -+ hdp = au_hdentry(dinfo, btgt); -+ h_dentry = hdp->hd_dentry; -+ hdp->hd_dentry = hi_wh; -+ err = au_reopen_nondir(file); -+ hdp->hd_dentry = h_dentry; -+ dinfo->di_btop = btop; -+ -+ return err; -+} -+ -+static int au_ready_to_write_wh(struct file *file, loff_t len, -+ aufs_bindex_t bcpup, struct au_pin *pin) -+{ -+ int err; -+ struct inode *inode, *h_inode; -+ struct dentry *h_dentry, *hi_wh; -+ struct au_cp_generic cpg = { -+ .dentry = file->f_path.dentry, -+ .bdst = bcpup, -+ .bsrc = -1, -+ .len = len, -+ .pin = pin -+ }; -+ -+ au_update_dbtop(cpg.dentry); -+ inode = d_inode(cpg.dentry); -+ h_inode = NULL; -+ if (au_dbtop(cpg.dentry) <= bcpup -+ && au_dbbot(cpg.dentry) >= bcpup) { -+ h_dentry = au_h_dptr(cpg.dentry, bcpup); -+ if (h_dentry && d_is_positive(h_dentry)) -+ h_inode = d_inode(h_dentry); -+ } -+ hi_wh = au_hi_wh(inode, bcpup); -+ if (!hi_wh && !h_inode) -+ err = au_sio_cpup_wh(&cpg, file); -+ else -+ /* already copied-up after unlink */ -+ err = au_reopen_wh(file, bcpup, hi_wh); -+ -+ if (!err -+ && (inode->i_nlink > 1 -+ || (inode->i_state & I_LINKABLE)) -+ && au_opt_test(au_mntflags(cpg.dentry->d_sb), PLINK)) -+ au_plink_append(inode, bcpup, au_h_dptr(cpg.dentry, bcpup)); -+ -+ return err; -+} -+ -+/* -+ * prepare the @file for writing. -+ */ -+int au_ready_to_write(struct file *file, loff_t len, struct au_pin *pin) -+{ -+ int err; -+ aufs_bindex_t dbtop; -+ struct dentry *parent; -+ struct inode *inode; -+ struct super_block *sb; -+ struct file *h_file; -+ struct au_cp_generic cpg = { -+ .dentry = file->f_path.dentry, -+ .bdst = -1, -+ .bsrc = -1, -+ .len = len, -+ .pin = pin, -+ .flags = AuCpup_DTIME -+ }; -+ -+ sb = cpg.dentry->d_sb; -+ inode = d_inode(cpg.dentry); -+ cpg.bsrc = au_fbtop(file); -+ err = au_test_ro(sb, cpg.bsrc, inode); -+ if (!err && (au_hf_top(file)->f_mode & FMODE_WRITE)) { -+ err = au_pin(pin, cpg.dentry, cpg.bsrc, AuOpt_UDBA_NONE, -+ /*flags*/0); -+ goto out; -+ } -+ -+ /* need to cpup or reopen */ -+ parent = dget_parent(cpg.dentry); -+ di_write_lock_parent(parent); -+ err = AuWbrCopyup(au_sbi(sb), cpg.dentry); -+ cpg.bdst = err; -+ if (unlikely(err < 0)) -+ goto out_dgrade; -+ err = 0; -+ -+ if (!d_unhashed(cpg.dentry) && !au_h_dptr(parent, cpg.bdst)) { -+ err = au_cpup_dirs(cpg.dentry, cpg.bdst); -+ if (unlikely(err)) -+ goto out_dgrade; -+ } -+ -+ err = au_pin(pin, cpg.dentry, cpg.bdst, AuOpt_UDBA_NONE, -+ AuPin_DI_LOCKED | AuPin_MNT_WRITE); -+ if (unlikely(err)) -+ goto out_dgrade; -+ -+ dbtop = au_dbtop(cpg.dentry); -+ if (dbtop <= cpg.bdst) -+ cpg.bsrc = cpg.bdst; -+ -+ if (dbtop <= cpg.bdst /* just reopen */ -+ || !d_unhashed(cpg.dentry) /* copyup and reopen */ -+ ) { -+ h_file = au_h_open_pre(cpg.dentry, cpg.bsrc, /*force_wr*/0); -+ if (IS_ERR(h_file)) -+ err = PTR_ERR(h_file); -+ else { -+ di_downgrade_lock(parent, AuLock_IR); -+ if (dbtop > cpg.bdst) -+ err = au_sio_cpup_simple(&cpg); -+ if (!err) -+ err = au_reopen_nondir(file); -+ au_h_open_post(cpg.dentry, cpg.bsrc, h_file); -+ } -+ } else { /* copyup as wh and reopen */ -+ /* -+ * since writable hfsplus branch is not supported, -+ * h_open_pre/post() are unnecessary. -+ */ -+ err = au_ready_to_write_wh(file, len, cpg.bdst, pin); -+ di_downgrade_lock(parent, AuLock_IR); -+ } -+ -+ if (!err) { -+ au_pin_set_parent_lflag(pin, /*lflag*/0); -+ goto out_dput; /* success */ -+ } -+ au_unpin(pin); -+ goto out_unlock; -+ -+out_dgrade: -+ di_downgrade_lock(parent, AuLock_IR); -+out_unlock: -+ di_read_unlock(parent, AuLock_IR); -+out_dput: -+ dput(parent); -+out: -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+int au_do_flush(struct file *file, fl_owner_t id, -+ int (*flush)(struct file *file, fl_owner_t id)) -+{ -+ int err; -+ struct super_block *sb; -+ struct inode *inode; -+ -+ inode = file_inode(file); -+ sb = inode->i_sb; -+ si_noflush_read_lock(sb); -+ fi_read_lock(file); -+ ii_read_lock_child(inode); -+ -+ err = flush(file, id); -+ au_cpup_attr_timesizes(inode); -+ -+ ii_read_unlock(inode); -+ fi_read_unlock(file); -+ si_read_unlock(sb); -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+static int au_file_refresh_by_inode(struct file *file, int *need_reopen) -+{ -+ int err; -+ struct au_pin pin; -+ struct au_finfo *finfo; -+ struct dentry *parent, *hi_wh; -+ struct inode *inode; -+ struct super_block *sb; -+ struct au_cp_generic cpg = { -+ .dentry = file->f_path.dentry, -+ .bdst = -1, -+ .bsrc = -1, -+ .len = -1, -+ .pin = &pin, -+ .flags = AuCpup_DTIME -+ }; -+ -+ FiMustWriteLock(file); -+ -+ err = 0; -+ finfo = au_fi(file); -+ sb = cpg.dentry->d_sb; -+ inode = d_inode(cpg.dentry); -+ cpg.bdst = au_ibtop(inode); -+ if (cpg.bdst == finfo->fi_btop || IS_ROOT(cpg.dentry)) -+ goto out; -+ -+ parent = dget_parent(cpg.dentry); -+ if (au_test_ro(sb, cpg.bdst, inode)) { -+ di_read_lock_parent(parent, !AuLock_IR); -+ err = AuWbrCopyup(au_sbi(sb), cpg.dentry); -+ cpg.bdst = err; -+ di_read_unlock(parent, !AuLock_IR); -+ if (unlikely(err < 0)) -+ goto out_parent; -+ err = 0; -+ } -+ -+ di_read_lock_parent(parent, AuLock_IR); -+ hi_wh = au_hi_wh(inode, cpg.bdst); -+ if (!S_ISDIR(inode->i_mode) -+ && au_opt_test(au_mntflags(sb), PLINK) -+ && au_plink_test(inode) -+ && !d_unhashed(cpg.dentry) -+ && cpg.bdst < au_dbtop(cpg.dentry)) { -+ err = au_test_and_cpup_dirs(cpg.dentry, cpg.bdst); -+ if (unlikely(err)) -+ goto out_unlock; -+ -+ /* always superio. */ -+ err = au_pin(&pin, cpg.dentry, cpg.bdst, AuOpt_UDBA_NONE, -+ AuPin_DI_LOCKED | AuPin_MNT_WRITE); -+ if (!err) { -+ err = au_sio_cpup_simple(&cpg); -+ au_unpin(&pin); -+ } -+ } else if (hi_wh) { -+ /* already copied-up after unlink */ -+ err = au_reopen_wh(file, cpg.bdst, hi_wh); -+ *need_reopen = 0; -+ } -+ -+out_unlock: -+ di_read_unlock(parent, AuLock_IR); -+out_parent: -+ dput(parent); -+out: -+ return err; -+} -+ -+static void au_do_refresh_dir(struct file *file) -+{ -+ aufs_bindex_t bindex, bbot, new_bindex, brid; -+ struct au_hfile *p, tmp, *q; -+ struct au_finfo *finfo; -+ struct super_block *sb; -+ struct au_fidir *fidir; -+ -+ FiMustWriteLock(file); -+ -+ sb = file->f_path.dentry->d_sb; -+ finfo = au_fi(file); -+ fidir = finfo->fi_hdir; -+ AuDebugOn(!fidir); -+ p = fidir->fd_hfile + finfo->fi_btop; -+ brid = p->hf_br->br_id; -+ bbot = fidir->fd_bbot; -+ for (bindex = finfo->fi_btop; bindex <= bbot; bindex++, p++) { -+ if (!p->hf_file) -+ continue; -+ -+ new_bindex = au_br_index(sb, p->hf_br->br_id); -+ if (new_bindex == bindex) -+ continue; -+ if (new_bindex < 0) { -+ au_set_h_fptr(file, bindex, NULL); -+ continue; -+ } -+ -+ /* swap two lower inode, and loop again */ -+ q = fidir->fd_hfile + new_bindex; -+ tmp = *q; -+ *q = *p; -+ *p = tmp; -+ if (tmp.hf_file) { -+ bindex--; -+ p--; -+ } -+ } -+ -+ p = fidir->fd_hfile; -+ if (!au_test_mmapped(file) && !d_unlinked(file->f_path.dentry)) { -+ bbot = au_sbbot(sb); -+ for (finfo->fi_btop = 0; finfo->fi_btop <= bbot; -+ finfo->fi_btop++, p++) -+ if (p->hf_file) { -+ if (file_inode(p->hf_file)) -+ break; -+ au_hfput(p, /*execed*/0); -+ } -+ } else { -+ bbot = au_br_index(sb, brid); -+ for (finfo->fi_btop = 0; finfo->fi_btop < bbot; -+ finfo->fi_btop++, p++) -+ if (p->hf_file) -+ au_hfput(p, /*execed*/0); -+ bbot = au_sbbot(sb); -+ } -+ -+ p = fidir->fd_hfile + bbot; -+ for (fidir->fd_bbot = bbot; fidir->fd_bbot >= finfo->fi_btop; -+ fidir->fd_bbot--, p--) -+ if (p->hf_file) { -+ if (file_inode(p->hf_file)) -+ break; -+ au_hfput(p, /*execed*/0); -+ } -+ AuDebugOn(fidir->fd_bbot < finfo->fi_btop); -+} -+ -+/* -+ * after branch manipulating, refresh the file. -+ */ -+static int refresh_file(struct file *file, int (*reopen)(struct file *file)) -+{ -+ int err, need_reopen, nbr; -+ aufs_bindex_t bbot, bindex; -+ struct dentry *dentry; -+ struct super_block *sb; -+ struct au_finfo *finfo; -+ struct au_hfile *hfile; -+ -+ dentry = file->f_path.dentry; -+ sb = dentry->d_sb; -+ nbr = au_sbbot(sb) + 1; -+ finfo = au_fi(file); -+ if (!finfo->fi_hdir) { -+ hfile = &finfo->fi_htop; -+ AuDebugOn(!hfile->hf_file); -+ bindex = au_br_index(sb, hfile->hf_br->br_id); -+ AuDebugOn(bindex < 0); -+ if (bindex != finfo->fi_btop) -+ au_set_fbtop(file, bindex); -+ } else { -+ err = au_fidir_realloc(finfo, nbr, /*may_shrink*/0); -+ if (unlikely(err)) -+ goto out; -+ au_do_refresh_dir(file); -+ } -+ -+ err = 0; -+ need_reopen = 1; -+ if (!au_test_mmapped(file)) -+ err = au_file_refresh_by_inode(file, &need_reopen); -+ if (finfo->fi_hdir) -+ /* harmless if err */ -+ au_fidir_realloc(finfo, nbr, /*may_shrink*/1); -+ if (!err && need_reopen && !d_unlinked(dentry)) -+ err = reopen(file); -+ if (!err) { -+ au_update_figen(file); -+ goto out; /* success */ -+ } -+ -+ /* error, close all lower files */ -+ if (finfo->fi_hdir) { -+ bbot = au_fbbot_dir(file); -+ for (bindex = au_fbtop(file); bindex <= bbot; bindex++) -+ au_set_h_fptr(file, bindex, NULL); -+ } -+ -+out: -+ return err; -+} -+ -+/* common function to regular file and dir */ -+int au_reval_and_lock_fdi(struct file *file, int (*reopen)(struct file *file), -+ int wlock, unsigned int fi_lsc) -+{ -+ int err; -+ unsigned int sigen, figen; -+ aufs_bindex_t btop; -+ unsigned char pseudo_link; -+ struct dentry *dentry; -+ struct inode *inode; -+ -+ err = 0; -+ dentry = file->f_path.dentry; -+ inode = d_inode(dentry); -+ sigen = au_sigen(dentry->d_sb); -+ fi_write_lock_nested(file, fi_lsc); -+ figen = au_figen(file); -+ if (!fi_lsc) -+ di_write_lock_child(dentry); -+ else -+ di_write_lock_child2(dentry); -+ btop = au_dbtop(dentry); -+ pseudo_link = (btop != au_ibtop(inode)); -+ if (sigen == figen && !pseudo_link && au_fbtop(file) == btop) { -+ if (!wlock) { -+ di_downgrade_lock(dentry, AuLock_IR); -+ fi_downgrade_lock(file); -+ } -+ goto out; /* success */ -+ } -+ -+ AuDbg("sigen %d, figen %d\n", sigen, figen); -+ if (au_digen_test(dentry, sigen)) { -+ err = au_reval_dpath(dentry, sigen); -+ AuDebugOn(!err && au_digen_test(dentry, sigen)); -+ } -+ -+ if (!err) -+ err = refresh_file(file, reopen); -+ if (!err) { -+ if (!wlock) { -+ di_downgrade_lock(dentry, AuLock_IR); -+ fi_downgrade_lock(file); -+ } -+ } else { -+ di_write_unlock(dentry); -+ fi_write_unlock(file); -+ } -+ -+out: -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* cf. aufs_nopage() */ -+/* for madvise(2) */ -+static int aufs_readpage(struct file *file __maybe_unused, struct page *page) -+{ -+ unlock_page(page); -+ return 0; -+} -+ -+/* it will never be called, but necessary to support O_DIRECT */ -+static ssize_t aufs_direct_IO(struct kiocb *iocb, struct iov_iter *iter) -+{ BUG(); return 0; } -+ -+/* they will never be called. */ -+#ifdef CONFIG_AUFS_DEBUG -+static int aufs_write_begin(struct file *file, struct address_space *mapping, -+ loff_t pos, unsigned len, unsigned flags, -+ struct page **pagep, void **fsdata) -+{ AuUnsupport(); return 0; } -+static int aufs_write_end(struct file *file, struct address_space *mapping, -+ loff_t pos, unsigned len, unsigned copied, -+ struct page *page, void *fsdata) -+{ AuUnsupport(); return 0; } -+static int aufs_writepage(struct page *page, struct writeback_control *wbc) -+{ AuUnsupport(); return 0; } -+ -+static int aufs_set_page_dirty(struct page *page) -+{ AuUnsupport(); return 0; } -+static void aufs_invalidatepage(struct page *page, unsigned int offset, -+ unsigned int length) -+{ AuUnsupport(); } -+static int aufs_releasepage(struct page *page, gfp_t gfp) -+{ AuUnsupport(); return 0; } -+#if 0 /* called by memory compaction regardless file */ -+static int aufs_migratepage(struct address_space *mapping, struct page *newpage, -+ struct page *page, enum migrate_mode mode) -+{ AuUnsupport(); return 0; } -+#endif -+static bool aufs_isolate_page(struct page *page, isolate_mode_t mode) -+{ AuUnsupport(); return true; } -+static void aufs_putback_page(struct page *page) -+{ AuUnsupport(); } -+static int aufs_launder_page(struct page *page) -+{ AuUnsupport(); return 0; } -+static int aufs_is_partially_uptodate(struct page *page, -+ unsigned long from, -+ unsigned long count) -+{ AuUnsupport(); return 0; } -+static void aufs_is_dirty_writeback(struct page *page, bool *dirty, -+ bool *writeback) -+{ AuUnsupport(); } -+static int aufs_error_remove_page(struct address_space *mapping, -+ struct page *page) -+{ AuUnsupport(); return 0; } -+static int aufs_swap_activate(struct swap_info_struct *sis, struct file *file, -+ sector_t *span) -+{ AuUnsupport(); return 0; } -+static void aufs_swap_deactivate(struct file *file) -+{ AuUnsupport(); } -+#endif /* CONFIG_AUFS_DEBUG */ -+ -+const struct address_space_operations aufs_aop = { -+ .readpage = aufs_readpage, -+ .direct_IO = aufs_direct_IO, -+#ifdef CONFIG_AUFS_DEBUG -+ .writepage = aufs_writepage, -+ /* no writepages, because of writepage */ -+ .set_page_dirty = aufs_set_page_dirty, -+ /* no readpages, because of readpage */ -+ .write_begin = aufs_write_begin, -+ .write_end = aufs_write_end, -+ /* no bmap, no block device */ -+ .invalidatepage = aufs_invalidatepage, -+ .releasepage = aufs_releasepage, -+ /* is fallback_migrate_page ok? */ -+ /* .migratepage = aufs_migratepage, */ -+ .isolate_page = aufs_isolate_page, -+ .putback_page = aufs_putback_page, -+ .launder_page = aufs_launder_page, -+ .is_partially_uptodate = aufs_is_partially_uptodate, -+ .is_dirty_writeback = aufs_is_dirty_writeback, -+ .error_remove_page = aufs_error_remove_page, -+ .swap_activate = aufs_swap_activate, -+ .swap_deactivate = aufs_swap_deactivate -+#endif /* CONFIG_AUFS_DEBUG */ -+}; -diff --git a/fs/aufs/file.h b/fs/aufs/file.h -new file mode 100644 -index 000000000000..8bf8e67650d0 ---- /dev/null -+++ b/fs/aufs/file.h -@@ -0,0 +1,329 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * file operations -+ */ -+ -+#ifndef __AUFS_FILE_H__ -+#define __AUFS_FILE_H__ -+ -+#ifdef __KERNEL__ -+ -+#include -+#include -+#include -+#include -+#include "rwsem.h" -+ -+struct au_branch; -+struct au_hfile { -+ struct file *hf_file; -+ struct au_branch *hf_br; -+}; -+ -+struct au_vdir; -+struct au_fidir { -+ aufs_bindex_t fd_bbot; -+ aufs_bindex_t fd_nent; -+ struct au_vdir *fd_vdir_cache; -+ struct au_hfile fd_hfile[]; -+}; -+ -+static inline int au_fidir_sz(int nent) -+{ -+ AuDebugOn(nent < 0); -+ return sizeof(struct au_fidir) + sizeof(struct au_hfile) * nent; -+} -+ -+struct au_finfo { -+ atomic_t fi_generation; -+ -+ struct au_rwsem fi_rwsem; -+ aufs_bindex_t fi_btop; -+ -+ /* do not union them */ -+ struct { /* for non-dir */ -+ struct au_hfile fi_htop; -+ atomic_t fi_mmapped; -+ }; -+ struct au_fidir *fi_hdir; /* for dir only */ -+ -+ struct hlist_bl_node fi_hlist; -+ struct file *fi_file; /* very ugly */ -+ struct rcu_head rcu; -+} ____cacheline_aligned_in_smp; -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* file.c */ -+extern const struct address_space_operations aufs_aop; -+unsigned int au_file_roflags(unsigned int flags); -+struct file *au_h_open(struct dentry *dentry, aufs_bindex_t bindex, int flags, -+ struct file *file, int force_wr); -+struct au_do_open_args { -+ int aopen; -+ int (*open)(struct file *file, int flags, -+ struct file *h_file); -+ struct au_fidir *fidir; -+ struct file *h_file; -+}; -+int au_do_open(struct file *file, struct au_do_open_args *args); -+int au_reopen_nondir(struct file *file); -+struct au_pin; -+int au_ready_to_write(struct file *file, loff_t len, struct au_pin *pin); -+int au_reval_and_lock_fdi(struct file *file, int (*reopen)(struct file *file), -+ int wlock, unsigned int fi_lsc); -+int au_do_flush(struct file *file, fl_owner_t id, -+ int (*flush)(struct file *file, fl_owner_t id)); -+ -+/* poll.c */ -+#ifdef CONFIG_AUFS_POLL -+__poll_t aufs_poll(struct file *file, struct poll_table_struct *pt); -+#endif -+ -+#ifdef CONFIG_AUFS_BR_HFSPLUS -+/* hfsplus.c */ -+struct file *au_h_open_pre(struct dentry *dentry, aufs_bindex_t bindex, -+ int force_wr); -+void au_h_open_post(struct dentry *dentry, aufs_bindex_t bindex, -+ struct file *h_file); -+#else -+AuStub(struct file *, au_h_open_pre, return NULL, struct dentry *dentry, -+ aufs_bindex_t bindex, int force_wr) -+AuStubVoid(au_h_open_post, struct dentry *dentry, aufs_bindex_t bindex, -+ struct file *h_file); -+#endif -+ -+/* f_op.c */ -+extern const struct file_operations aufs_file_fop; -+int au_do_open_nondir(struct file *file, int flags, struct file *h_file); -+int aufs_release_nondir(struct inode *inode __maybe_unused, struct file *file); -+struct file *au_read_pre(struct file *file, int keep_fi, unsigned int lsc); -+ -+/* finfo.c */ -+void au_hfput(struct au_hfile *hf, int execed); -+void au_set_h_fptr(struct file *file, aufs_bindex_t bindex, -+ struct file *h_file); -+ -+void au_update_figen(struct file *file); -+struct au_fidir *au_fidir_alloc(struct super_block *sb); -+int au_fidir_realloc(struct au_finfo *finfo, int nbr, int may_shrink); -+ -+void au_fi_init_once(void *_fi); -+void au_finfo_fin(struct file *file); -+int au_finfo_init(struct file *file, struct au_fidir *fidir); -+ -+/* ioctl.c */ -+long aufs_ioctl_nondir(struct file *file, unsigned int cmd, unsigned long arg); -+#ifdef CONFIG_COMPAT -+long aufs_compat_ioctl_dir(struct file *file, unsigned int cmd, -+ unsigned long arg); -+long aufs_compat_ioctl_nondir(struct file *file, unsigned int cmd, -+ unsigned long arg); -+#endif -+ -+/* ---------------------------------------------------------------------- */ -+ -+static inline struct au_finfo *au_fi(struct file *file) -+{ -+ return file->private_data; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+#define fi_read_lock(f) au_rw_read_lock(&au_fi(f)->fi_rwsem) -+#define fi_write_lock(f) au_rw_write_lock(&au_fi(f)->fi_rwsem) -+#define fi_read_trylock(f) au_rw_read_trylock(&au_fi(f)->fi_rwsem) -+#define fi_write_trylock(f) au_rw_write_trylock(&au_fi(f)->fi_rwsem) -+/* -+#define fi_read_trylock_nested(f) \ -+ au_rw_read_trylock_nested(&au_fi(f)->fi_rwsem) -+#define fi_write_trylock_nested(f) \ -+ au_rw_write_trylock_nested(&au_fi(f)->fi_rwsem) -+*/ -+ -+#define fi_read_unlock(f) au_rw_read_unlock(&au_fi(f)->fi_rwsem) -+#define fi_write_unlock(f) au_rw_write_unlock(&au_fi(f)->fi_rwsem) -+#define fi_downgrade_lock(f) au_rw_dgrade_lock(&au_fi(f)->fi_rwsem) -+ -+/* lock subclass for finfo */ -+enum { -+ AuLsc_FI_1, -+ AuLsc_FI_2 -+}; -+ -+static inline void fi_read_lock_nested(struct file *f, unsigned int lsc) -+{ -+ au_rw_read_lock_nested(&au_fi(f)->fi_rwsem, lsc); -+} -+ -+static inline void fi_write_lock_nested(struct file *f, unsigned int lsc) -+{ -+ au_rw_write_lock_nested(&au_fi(f)->fi_rwsem, lsc); -+} -+ -+/* -+ * fi_read_lock_1, fi_write_lock_1, -+ * fi_read_lock_2, fi_write_lock_2 -+ */ -+#define AuReadLockFunc(name) \ -+static inline void fi_read_lock_##name(struct file *f) \ -+{ fi_read_lock_nested(f, AuLsc_FI_##name); } -+ -+#define AuWriteLockFunc(name) \ -+static inline void fi_write_lock_##name(struct file *f) \ -+{ fi_write_lock_nested(f, AuLsc_FI_##name); } -+ -+#define AuRWLockFuncs(name) \ -+ AuReadLockFunc(name) \ -+ AuWriteLockFunc(name) -+ -+AuRWLockFuncs(1); -+AuRWLockFuncs(2); -+ -+#undef AuReadLockFunc -+#undef AuWriteLockFunc -+#undef AuRWLockFuncs -+ -+#define FiMustNoWaiters(f) AuRwMustNoWaiters(&au_fi(f)->fi_rwsem) -+#define FiMustAnyLock(f) AuRwMustAnyLock(&au_fi(f)->fi_rwsem) -+#define FiMustWriteLock(f) AuRwMustWriteLock(&au_fi(f)->fi_rwsem) -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* todo: hard/soft set? */ -+static inline aufs_bindex_t au_fbtop(struct file *file) -+{ -+ FiMustAnyLock(file); -+ return au_fi(file)->fi_btop; -+} -+ -+static inline aufs_bindex_t au_fbbot_dir(struct file *file) -+{ -+ FiMustAnyLock(file); -+ AuDebugOn(!au_fi(file)->fi_hdir); -+ return au_fi(file)->fi_hdir->fd_bbot; -+} -+ -+static inline struct au_vdir *au_fvdir_cache(struct file *file) -+{ -+ FiMustAnyLock(file); -+ AuDebugOn(!au_fi(file)->fi_hdir); -+ return au_fi(file)->fi_hdir->fd_vdir_cache; -+} -+ -+static inline void au_set_fbtop(struct file *file, aufs_bindex_t bindex) -+{ -+ FiMustWriteLock(file); -+ au_fi(file)->fi_btop = bindex; -+} -+ -+static inline void au_set_fbbot_dir(struct file *file, aufs_bindex_t bindex) -+{ -+ FiMustWriteLock(file); -+ AuDebugOn(!au_fi(file)->fi_hdir); -+ au_fi(file)->fi_hdir->fd_bbot = bindex; -+} -+ -+static inline void au_set_fvdir_cache(struct file *file, -+ struct au_vdir *vdir_cache) -+{ -+ FiMustWriteLock(file); -+ AuDebugOn(!au_fi(file)->fi_hdir); -+ au_fi(file)->fi_hdir->fd_vdir_cache = vdir_cache; -+} -+ -+static inline struct file *au_hf_top(struct file *file) -+{ -+ FiMustAnyLock(file); -+ AuDebugOn(au_fi(file)->fi_hdir); -+ return au_fi(file)->fi_htop.hf_file; -+} -+ -+static inline struct file *au_hf_dir(struct file *file, aufs_bindex_t bindex) -+{ -+ FiMustAnyLock(file); -+ AuDebugOn(!au_fi(file)->fi_hdir); -+ return au_fi(file)->fi_hdir->fd_hfile[0 + bindex].hf_file; -+} -+ -+/* todo: memory barrier? */ -+static inline unsigned int au_figen(struct file *f) -+{ -+ return atomic_read(&au_fi(f)->fi_generation); -+} -+ -+static inline void au_set_mmapped(struct file *f) -+{ -+ if (atomic_inc_return(&au_fi(f)->fi_mmapped)) -+ return; -+ pr_warn("fi_mmapped wrapped around\n"); -+ while (!atomic_inc_return(&au_fi(f)->fi_mmapped)) -+ ; -+} -+ -+static inline void au_unset_mmapped(struct file *f) -+{ -+ atomic_dec(&au_fi(f)->fi_mmapped); -+} -+ -+static inline int au_test_mmapped(struct file *f) -+{ -+ return atomic_read(&au_fi(f)->fi_mmapped); -+} -+ -+/* customize vma->vm_file */ -+ -+static inline void au_do_vm_file_reset(struct vm_area_struct *vma, -+ struct file *file) -+{ -+ struct file *f; -+ -+ f = vma->vm_file; -+ get_file(file); -+ vma->vm_file = file; -+ fput(f); -+} -+ -+#ifdef CONFIG_MMU -+#define AuDbgVmRegion(file, vma) do {} while (0) -+ -+static inline void au_vm_file_reset(struct vm_area_struct *vma, -+ struct file *file) -+{ -+ au_do_vm_file_reset(vma, file); -+} -+#else -+#define AuDbgVmRegion(file, vma) \ -+ AuDebugOn((vma)->vm_region && (vma)->vm_region->vm_file != (file)) -+ -+static inline void au_vm_file_reset(struct vm_area_struct *vma, -+ struct file *file) -+{ -+ struct file *f; -+ -+ au_do_vm_file_reset(vma, file); -+ f = vma->vm_region->vm_file; -+ get_file(file); -+ vma->vm_region->vm_file = file; -+ fput(f); -+} -+#endif /* CONFIG_MMU */ -+ -+/* handle vma->vm_prfile */ -+static inline void au_vm_prfile_set(struct vm_area_struct *vma, -+ struct file *file) -+{ -+ get_file(file); -+ vma->vm_prfile = file; -+#ifndef CONFIG_MMU -+ get_file(file); -+ vma->vm_region->vm_prfile = file; -+#endif -+} -+ -+#endif /* __KERNEL__ */ -+#endif /* __AUFS_FILE_H__ */ -diff --git a/fs/aufs/finfo.c b/fs/aufs/finfo.c -new file mode 100644 -index 000000000000..e2d6859850b6 ---- /dev/null -+++ b/fs/aufs/finfo.c -@@ -0,0 +1,136 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * file private data -+ */ -+ -+#include "aufs.h" -+ -+void au_hfput(struct au_hfile *hf, int execed) -+{ -+ if (execed) -+ allow_write_access(hf->hf_file); -+ fput(hf->hf_file); -+ hf->hf_file = NULL; -+ au_lcnt_dec(&hf->hf_br->br_nfiles); -+ hf->hf_br = NULL; -+} -+ -+void au_set_h_fptr(struct file *file, aufs_bindex_t bindex, struct file *val) -+{ -+ struct au_finfo *finfo = au_fi(file); -+ struct au_hfile *hf; -+ struct au_fidir *fidir; -+ -+ fidir = finfo->fi_hdir; -+ if (!fidir) { -+ AuDebugOn(finfo->fi_btop != bindex); -+ hf = &finfo->fi_htop; -+ } else -+ hf = fidir->fd_hfile + bindex; -+ -+ if (hf && hf->hf_file) -+ au_hfput(hf, vfsub_file_execed(file)); -+ if (val) { -+ FiMustWriteLock(file); -+ AuDebugOn(IS_ERR_OR_NULL(file->f_path.dentry)); -+ hf->hf_file = val; -+ hf->hf_br = au_sbr(file->f_path.dentry->d_sb, bindex); -+ } -+} -+ -+void au_update_figen(struct file *file) -+{ -+ atomic_set(&au_fi(file)->fi_generation, au_digen(file->f_path.dentry)); -+ /* smp_mb(); */ /* atomic_set */ -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+struct au_fidir *au_fidir_alloc(struct super_block *sb) -+{ -+ struct au_fidir *fidir; -+ int nbr; -+ -+ nbr = au_sbbot(sb) + 1; -+ if (nbr < 2) -+ nbr = 2; /* initial allocate for 2 branches */ -+ fidir = kzalloc(au_fidir_sz(nbr), GFP_NOFS); -+ if (fidir) { -+ fidir->fd_bbot = -1; -+ fidir->fd_nent = nbr; -+ } -+ -+ return fidir; -+} -+ -+int au_fidir_realloc(struct au_finfo *finfo, int nbr, int may_shrink) -+{ -+ int err; -+ struct au_fidir *fidir, *p; -+ -+ AuRwMustWriteLock(&finfo->fi_rwsem); -+ fidir = finfo->fi_hdir; -+ AuDebugOn(!fidir); -+ -+ err = -ENOMEM; -+ p = au_kzrealloc(fidir, au_fidir_sz(fidir->fd_nent), au_fidir_sz(nbr), -+ GFP_NOFS, may_shrink); -+ if (p) { -+ p->fd_nent = nbr; -+ finfo->fi_hdir = p; -+ err = 0; -+ } -+ -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+void au_finfo_fin(struct file *file) -+{ -+ struct au_finfo *finfo; -+ -+ au_lcnt_dec(&au_sbi(file->f_path.dentry->d_sb)->si_nfiles); -+ -+ finfo = au_fi(file); -+ AuDebugOn(finfo->fi_hdir); -+ AuRwDestroy(&finfo->fi_rwsem); -+ au_cache_free_finfo(finfo); -+} -+ -+void au_fi_init_once(void *_finfo) -+{ -+ struct au_finfo *finfo = _finfo; -+ -+ au_rw_init(&finfo->fi_rwsem); -+} -+ -+int au_finfo_init(struct file *file, struct au_fidir *fidir) -+{ -+ int err; -+ struct au_finfo *finfo; -+ struct dentry *dentry; -+ -+ err = -ENOMEM; -+ dentry = file->f_path.dentry; -+ finfo = au_cache_alloc_finfo(); -+ if (unlikely(!finfo)) -+ goto out; -+ -+ err = 0; -+ au_lcnt_inc(&au_sbi(dentry->d_sb)->si_nfiles); -+ au_rw_write_lock(&finfo->fi_rwsem); -+ finfo->fi_btop = -1; -+ finfo->fi_hdir = fidir; -+ atomic_set(&finfo->fi_generation, au_digen(dentry)); -+ /* smp_mb(); */ /* atomic_set */ -+ -+ file->private_data = finfo; -+ -+out: -+ return err; -+} -diff --git a/fs/aufs/fstype.h b/fs/aufs/fstype.h -new file mode 100644 -index 000000000000..7c001dae1859 ---- /dev/null -+++ b/fs/aufs/fstype.h -@@ -0,0 +1,388 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * judging filesystem type -+ */ -+ -+#ifndef __AUFS_FSTYPE_H__ -+#define __AUFS_FSTYPE_H__ -+ -+#ifdef __KERNEL__ -+ -+#include -+#include -+#include -+#include -+ -+static inline int au_test_aufs(struct super_block *sb) -+{ -+ return sb->s_magic == AUFS_SUPER_MAGIC; -+} -+ -+static inline const char *au_sbtype(struct super_block *sb) -+{ -+ return sb->s_type->name; -+} -+ -+static inline int au_test_iso9660(struct super_block *sb __maybe_unused) -+{ -+#if IS_ENABLED(CONFIG_ISO9660_FS) -+ return sb->s_magic == ISOFS_SUPER_MAGIC; -+#else -+ return 0; -+#endif -+} -+ -+static inline int au_test_romfs(struct super_block *sb __maybe_unused) -+{ -+#if IS_ENABLED(CONFIG_ROMFS_FS) -+ return sb->s_magic == ROMFS_MAGIC; -+#else -+ return 0; -+#endif -+} -+ -+static inline int au_test_cramfs(struct super_block *sb __maybe_unused) -+{ -+#if IS_ENABLED(CONFIG_CRAMFS) -+ return sb->s_magic == CRAMFS_MAGIC; -+#endif -+ return 0; -+} -+ -+static inline int au_test_nfs(struct super_block *sb __maybe_unused) -+{ -+#if IS_ENABLED(CONFIG_NFS_FS) -+ return sb->s_magic == NFS_SUPER_MAGIC; -+#else -+ return 0; -+#endif -+} -+ -+static inline int au_test_fuse(struct super_block *sb __maybe_unused) -+{ -+#if IS_ENABLED(CONFIG_FUSE_FS) -+ return sb->s_magic == FUSE_SUPER_MAGIC; -+#else -+ return 0; -+#endif -+} -+ -+static inline int au_test_xfs(struct super_block *sb __maybe_unused) -+{ -+#if IS_ENABLED(CONFIG_XFS_FS) -+ return sb->s_magic == XFS_SB_MAGIC; -+#else -+ return 0; -+#endif -+} -+ -+static inline int au_test_tmpfs(struct super_block *sb __maybe_unused) -+{ -+#ifdef CONFIG_TMPFS -+ return sb->s_magic == TMPFS_MAGIC; -+#else -+ return 0; -+#endif -+} -+ -+static inline int au_test_ecryptfs(struct super_block *sb __maybe_unused) -+{ -+#if IS_ENABLED(CONFIG_ECRYPT_FS) -+ return !strcmp(au_sbtype(sb), "ecryptfs"); -+#else -+ return 0; -+#endif -+} -+ -+static inline int au_test_ramfs(struct super_block *sb) -+{ -+ return sb->s_magic == RAMFS_MAGIC; -+} -+ -+static inline int au_test_ubifs(struct super_block *sb __maybe_unused) -+{ -+#if IS_ENABLED(CONFIG_UBIFS_FS) -+ return sb->s_magic == UBIFS_SUPER_MAGIC; -+#else -+ return 0; -+#endif -+} -+ -+static inline int au_test_procfs(struct super_block *sb __maybe_unused) -+{ -+#ifdef CONFIG_PROC_FS -+ return sb->s_magic == PROC_SUPER_MAGIC; -+#else -+ return 0; -+#endif -+} -+ -+static inline int au_test_sysfs(struct super_block *sb __maybe_unused) -+{ -+#ifdef CONFIG_SYSFS -+ return sb->s_magic == SYSFS_MAGIC; -+#else -+ return 0; -+#endif -+} -+ -+static inline int au_test_configfs(struct super_block *sb __maybe_unused) -+{ -+#if IS_ENABLED(CONFIG_CONFIGFS_FS) -+ return sb->s_magic == CONFIGFS_MAGIC; -+#else -+ return 0; -+#endif -+} -+ -+static inline int au_test_minix(struct super_block *sb __maybe_unused) -+{ -+#if IS_ENABLED(CONFIG_MINIX_FS) -+ return sb->s_magic == MINIX3_SUPER_MAGIC -+ || sb->s_magic == MINIX2_SUPER_MAGIC -+ || sb->s_magic == MINIX2_SUPER_MAGIC2 -+ || sb->s_magic == MINIX_SUPER_MAGIC -+ || sb->s_magic == MINIX_SUPER_MAGIC2; -+#else -+ return 0; -+#endif -+} -+ -+static inline int au_test_fat(struct super_block *sb __maybe_unused) -+{ -+#if IS_ENABLED(CONFIG_FAT_FS) -+ return sb->s_magic == MSDOS_SUPER_MAGIC; -+#else -+ return 0; -+#endif -+} -+ -+static inline int au_test_msdos(struct super_block *sb) -+{ -+ return au_test_fat(sb); -+} -+ -+static inline int au_test_vfat(struct super_block *sb) -+{ -+ return au_test_fat(sb); -+} -+ -+static inline int au_test_securityfs(struct super_block *sb __maybe_unused) -+{ -+#ifdef CONFIG_SECURITYFS -+ return sb->s_magic == SECURITYFS_MAGIC; -+#else -+ return 0; -+#endif -+} -+ -+static inline int au_test_squashfs(struct super_block *sb __maybe_unused) -+{ -+#if IS_ENABLED(CONFIG_SQUASHFS) -+ return sb->s_magic == SQUASHFS_MAGIC; -+#else -+ return 0; -+#endif -+} -+ -+static inline int au_test_btrfs(struct super_block *sb __maybe_unused) -+{ -+#if IS_ENABLED(CONFIG_BTRFS_FS) -+ return sb->s_magic == BTRFS_SUPER_MAGIC; -+#else -+ return 0; -+#endif -+} -+ -+static inline int au_test_xenfs(struct super_block *sb __maybe_unused) -+{ -+#if IS_ENABLED(CONFIG_XENFS) -+ return sb->s_magic == XENFS_SUPER_MAGIC; -+#else -+ return 0; -+#endif -+} -+ -+static inline int au_test_debugfs(struct super_block *sb __maybe_unused) -+{ -+#ifdef CONFIG_DEBUG_FS -+ return sb->s_magic == DEBUGFS_MAGIC; -+#else -+ return 0; -+#endif -+} -+ -+static inline int au_test_nilfs(struct super_block *sb __maybe_unused) -+{ -+#if IS_ENABLED(CONFIG_NILFS) -+ return sb->s_magic == NILFS_SUPER_MAGIC; -+#else -+ return 0; -+#endif -+} -+ -+static inline int au_test_hfsplus(struct super_block *sb __maybe_unused) -+{ -+#if IS_ENABLED(CONFIG_HFSPLUS_FS) -+ return sb->s_magic == HFSPLUS_SUPER_MAGIC; -+#else -+ return 0; -+#endif -+} -+ -+/* ---------------------------------------------------------------------- */ -+/* -+ * they can't be an aufs branch. -+ */ -+static inline int au_test_fs_unsuppoted(struct super_block *sb) -+{ -+ return -+#ifndef CONFIG_AUFS_BR_RAMFS -+ au_test_ramfs(sb) || -+#endif -+ au_test_procfs(sb) -+ || au_test_sysfs(sb) -+ || au_test_configfs(sb) -+ || au_test_debugfs(sb) -+ || au_test_securityfs(sb) -+ || au_test_xenfs(sb) -+ || au_test_ecryptfs(sb) -+ /* || !strcmp(au_sbtype(sb), "unionfs") */ -+ || au_test_aufs(sb); /* will be supported in next version */ -+} -+ -+static inline int au_test_fs_remote(struct super_block *sb) -+{ -+ return !au_test_tmpfs(sb) -+#ifdef CONFIG_AUFS_BR_RAMFS -+ && !au_test_ramfs(sb) -+#endif -+ && !(sb->s_type->fs_flags & FS_REQUIRES_DEV); -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* -+ * Note: these functions (below) are created after reading ->getattr() in all -+ * filesystems under linux/fs. it means we have to do so in every update... -+ */ -+ -+/* -+ * some filesystems require getattr to refresh the inode attributes before -+ * referencing. -+ * in most cases, we can rely on the inode attribute in NFS (or every remote fs) -+ * and leave the work for d_revalidate() -+ */ -+static inline int au_test_fs_refresh_iattr(struct super_block *sb) -+{ -+ return au_test_nfs(sb) -+ || au_test_fuse(sb) -+ /* || au_test_btrfs(sb) */ /* untested */ -+ ; -+} -+ -+/* -+ * filesystems which don't maintain i_size or i_blocks. -+ */ -+static inline int au_test_fs_bad_iattr_size(struct super_block *sb) -+{ -+ return au_test_xfs(sb) -+ || au_test_btrfs(sb) -+ || au_test_ubifs(sb) -+ || au_test_hfsplus(sb) /* maintained, but incorrect */ -+ /* || au_test_minix(sb) */ /* untested */ -+ ; -+} -+ -+/* -+ * filesystems which don't store the correct value in some of their inode -+ * attributes. -+ */ -+static inline int au_test_fs_bad_iattr(struct super_block *sb) -+{ -+ return au_test_fs_bad_iattr_size(sb) -+ || au_test_fat(sb) -+ || au_test_msdos(sb) -+ || au_test_vfat(sb); -+} -+ -+/* they don't check i_nlink in link(2) */ -+static inline int au_test_fs_no_limit_nlink(struct super_block *sb) -+{ -+ return au_test_tmpfs(sb) -+#ifdef CONFIG_AUFS_BR_RAMFS -+ || au_test_ramfs(sb) -+#endif -+ || au_test_ubifs(sb) -+ || au_test_hfsplus(sb); -+} -+ -+/* -+ * filesystems which sets S_NOATIME and S_NOCMTIME. -+ */ -+static inline int au_test_fs_notime(struct super_block *sb) -+{ -+ return au_test_nfs(sb) -+ || au_test_fuse(sb) -+ || au_test_ubifs(sb) -+ ; -+} -+ -+/* temporary support for i#1 in cramfs */ -+static inline int au_test_fs_unique_ino(struct inode *inode) -+{ -+ if (au_test_cramfs(inode->i_sb)) -+ return inode->i_ino != 1; -+ return 1; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* -+ * the filesystem where the xino files placed must support i/o after unlink and -+ * maintain i_size and i_blocks. -+ */ -+static inline int au_test_fs_bad_xino(struct super_block *sb) -+{ -+ return au_test_fs_remote(sb) -+ || au_test_fs_bad_iattr_size(sb) -+ /* don't want unnecessary work for xino */ -+ || au_test_aufs(sb) -+ || au_test_ecryptfs(sb) -+ || au_test_nilfs(sb); -+} -+ -+static inline int au_test_fs_trunc_xino(struct super_block *sb) -+{ -+ return au_test_tmpfs(sb) -+ || au_test_ramfs(sb); -+} -+ -+/* -+ * test if the @sb is real-readonly. -+ */ -+static inline int au_test_fs_rr(struct super_block *sb) -+{ -+ return au_test_squashfs(sb) -+ || au_test_iso9660(sb) -+ || au_test_cramfs(sb) -+ || au_test_romfs(sb); -+} -+ -+/* -+ * test if the @inode is nfs with 'noacl' option -+ * NFS always sets SB_POSIXACL regardless its mount option 'noacl.' -+ */ -+static inline int au_test_nfs_noacl(struct inode *inode) -+{ -+ return au_test_nfs(inode->i_sb) -+ /* && IS_POSIXACL(inode) */ -+ && !nfs_server_capable(inode, NFS_CAP_ACLS); -+} -+ -+#endif /* __KERNEL__ */ -+#endif /* __AUFS_FSTYPE_H__ */ -diff --git a/fs/aufs/hbl.h b/fs/aufs/hbl.h -new file mode 100644 -index 000000000000..571efb1e2300 ---- /dev/null -+++ b/fs/aufs/hbl.h -@@ -0,0 +1,52 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * Copyright (C) 2017-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * helpers for hlist_bl.h -+ */ -+ -+#ifndef __AUFS_HBL_H__ -+#define __AUFS_HBL_H__ -+ -+#ifdef __KERNEL__ -+ -+#include -+ -+static inline void au_hbl_add(struct hlist_bl_node *node, -+ struct hlist_bl_head *hbl) -+{ -+ hlist_bl_lock(hbl); -+ hlist_bl_add_head(node, hbl); -+ hlist_bl_unlock(hbl); -+} -+ -+static inline void au_hbl_del(struct hlist_bl_node *node, -+ struct hlist_bl_head *hbl) -+{ -+ hlist_bl_lock(hbl); -+ hlist_bl_del(node); -+ hlist_bl_unlock(hbl); -+} -+ -+#define au_hbl_for_each(pos, head) \ -+ for (pos = hlist_bl_first(head); \ -+ pos; \ -+ pos = pos->next) -+ -+static inline unsigned long au_hbl_count(struct hlist_bl_head *hbl) -+{ -+ unsigned long cnt; -+ struct hlist_bl_node *pos; -+ -+ cnt = 0; -+ hlist_bl_lock(hbl); -+ au_hbl_for_each(pos, hbl) -+ cnt++; -+ hlist_bl_unlock(hbl); -+ return cnt; -+} -+ -+#endif /* __KERNEL__ */ -+#endif /* __AUFS_HBL_H__ */ -diff --git a/fs/aufs/hfsnotify.c b/fs/aufs/hfsnotify.c -new file mode 100644 -index 000000000000..db3a2605521b ---- /dev/null -+++ b/fs/aufs/hfsnotify.c -@@ -0,0 +1,275 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * fsnotify for the lower directories -+ */ -+ -+#include "aufs.h" -+ -+/* FS_IN_IGNORED is unnecessary */ -+static const __u32 AuHfsnMask = (FS_MOVED_TO | FS_MOVED_FROM | FS_DELETE -+ | FS_CREATE | FS_EVENT_ON_CHILD); -+static DECLARE_WAIT_QUEUE_HEAD(au_hfsn_wq); -+static __cacheline_aligned_in_smp atomic64_t au_hfsn_ifree = ATOMIC64_INIT(0); -+ -+static void au_hfsn_free_mark(struct fsnotify_mark *mark) -+{ -+ struct au_hnotify *hn = container_of(mark, struct au_hnotify, -+ hn_mark); -+ /* AuDbg("here\n"); */ -+ au_cache_free_hnotify(hn); -+ smp_mb__before_atomic(); /* for atomic64_dec */ -+ if (atomic64_dec_and_test(&au_hfsn_ifree)) -+ wake_up(&au_hfsn_wq); -+} -+ -+static int au_hfsn_alloc(struct au_hinode *hinode) -+{ -+ int err; -+ struct au_hnotify *hn; -+ struct super_block *sb; -+ struct au_branch *br; -+ struct fsnotify_mark *mark; -+ aufs_bindex_t bindex; -+ -+ hn = hinode->hi_notify; -+ sb = hn->hn_aufs_inode->i_sb; -+ bindex = au_br_index(sb, hinode->hi_id); -+ br = au_sbr(sb, bindex); -+ AuDebugOn(!br->br_hfsn); -+ -+ mark = &hn->hn_mark; -+ fsnotify_init_mark(mark, br->br_hfsn->hfsn_group); -+ mark->mask = AuHfsnMask; -+ /* -+ * by udba rename or rmdir, aufs assign a new inode to the known -+ * h_inode, so specify 1 to allow dups. -+ */ -+ lockdep_off(); -+ err = fsnotify_add_inode_mark(mark, hinode->hi_inode, /*allow_dups*/1); -+ lockdep_on(); -+ -+ return err; -+} -+ -+static int au_hfsn_free(struct au_hinode *hinode, struct au_hnotify *hn) -+{ -+ struct fsnotify_mark *mark; -+ unsigned long long ull; -+ struct fsnotify_group *group; -+ -+ ull = atomic64_inc_return(&au_hfsn_ifree); -+ BUG_ON(!ull); -+ -+ mark = &hn->hn_mark; -+ spin_lock(&mark->lock); -+ group = mark->group; -+ fsnotify_get_group(group); -+ spin_unlock(&mark->lock); -+ lockdep_off(); -+ fsnotify_destroy_mark(mark, group); -+ fsnotify_put_mark(mark); -+ fsnotify_put_group(group); -+ lockdep_on(); -+ -+ /* free hn by myself */ -+ return 0; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+static void au_hfsn_ctl(struct au_hinode *hinode, int do_set) -+{ -+ struct fsnotify_mark *mark; -+ -+ mark = &hinode->hi_notify->hn_mark; -+ spin_lock(&mark->lock); -+ if (do_set) { -+ AuDebugOn(mark->mask & AuHfsnMask); -+ mark->mask |= AuHfsnMask; -+ } else { -+ AuDebugOn(!(mark->mask & AuHfsnMask)); -+ mark->mask &= ~AuHfsnMask; -+ } -+ spin_unlock(&mark->lock); -+ /* fsnotify_recalc_inode_mask(hinode->hi_inode); */ -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* #define AuDbgHnotify */ -+#ifdef AuDbgHnotify -+static char *au_hfsn_name(u32 mask) -+{ -+#ifdef CONFIG_AUFS_DEBUG -+#define test_ret(flag) \ -+ do { \ -+ if (mask & flag) \ -+ return #flag; \ -+ } while (0) -+ test_ret(FS_ACCESS); -+ test_ret(FS_MODIFY); -+ test_ret(FS_ATTRIB); -+ test_ret(FS_CLOSE_WRITE); -+ test_ret(FS_CLOSE_NOWRITE); -+ test_ret(FS_OPEN); -+ test_ret(FS_MOVED_FROM); -+ test_ret(FS_MOVED_TO); -+ test_ret(FS_CREATE); -+ test_ret(FS_DELETE); -+ test_ret(FS_DELETE_SELF); -+ test_ret(FS_MOVE_SELF); -+ test_ret(FS_UNMOUNT); -+ test_ret(FS_Q_OVERFLOW); -+ test_ret(FS_IN_IGNORED); -+ test_ret(FS_ISDIR); -+ test_ret(FS_IN_ONESHOT); -+ test_ret(FS_EVENT_ON_CHILD); -+ return ""; -+#undef test_ret -+#else -+ return "??"; -+#endif -+} -+#endif -+ -+/* ---------------------------------------------------------------------- */ -+ -+static void au_hfsn_free_group(struct fsnotify_group *group) -+{ -+ struct au_br_hfsnotify *hfsn = group->private; -+ -+ /* AuDbg("here\n"); */ -+ au_kfree_try_rcu(hfsn); -+} -+ -+static int au_hfsn_handle_event(struct fsnotify_group *group, -+ u32 mask, const void *data, int data_type, -+ struct inode *dir, -+ const struct qstr *file_name, u32 cookie, -+ struct fsnotify_iter_info *iter_info) -+{ -+ int err; -+ struct au_hnotify *hnotify; -+ struct inode *h_dir, *h_inode; -+ struct fsnotify_mark *inode_mark; -+ -+ AuDebugOn(data_type != FSNOTIFY_EVENT_INODE); -+ -+ err = 0; -+ /* if FS_UNMOUNT happens, there must be another bug */ -+ AuDebugOn(mask & FS_UNMOUNT); -+ if (mask & (FS_IN_IGNORED | FS_UNMOUNT)) -+ goto out; -+ -+ h_dir = dir; -+ h_inode = NULL; -+#ifdef AuDbgHnotify -+ au_debug_on(); -+ if (1 || h_child_qstr.len != sizeof(AUFS_XINO_FNAME) - 1 -+ || strncmp(h_child_qstr.name, AUFS_XINO_FNAME, h_child_qstr.len)) { -+ AuDbg("i%lu, mask 0x%x %s, hcname %.*s, hi%lu\n", -+ h_dir->i_ino, mask, au_hfsn_name(mask), -+ AuLNPair(&h_child_qstr), h_inode ? h_inode->i_ino : 0); -+ /* WARN_ON(1); */ -+ } -+ au_debug_off(); -+#endif -+ -+ inode_mark = fsnotify_iter_inode_mark(iter_info); -+ AuDebugOn(!inode_mark); -+ hnotify = container_of(inode_mark, struct au_hnotify, hn_mark); -+ err = au_hnotify(h_dir, hnotify, mask, file_name, h_inode); -+ -+out: -+ return err; -+} -+ -+static struct fsnotify_ops au_hfsn_ops = { -+ .handle_event = au_hfsn_handle_event, -+ .free_group_priv = au_hfsn_free_group, -+ .free_mark = au_hfsn_free_mark -+}; -+ -+/* ---------------------------------------------------------------------- */ -+ -+static void au_hfsn_fin_br(struct au_branch *br) -+{ -+ struct au_br_hfsnotify *hfsn; -+ -+ hfsn = br->br_hfsn; -+ if (hfsn) { -+ lockdep_off(); -+ fsnotify_put_group(hfsn->hfsn_group); -+ lockdep_on(); -+ } -+} -+ -+static int au_hfsn_init_br(struct au_branch *br, int perm) -+{ -+ int err; -+ struct fsnotify_group *group; -+ struct au_br_hfsnotify *hfsn; -+ -+ err = 0; -+ br->br_hfsn = NULL; -+ if (!au_br_hnotifyable(perm)) -+ goto out; -+ -+ err = -ENOMEM; -+ hfsn = kmalloc(sizeof(*hfsn), GFP_NOFS); -+ if (unlikely(!hfsn)) -+ goto out; -+ -+ err = 0; -+ group = fsnotify_alloc_group(&au_hfsn_ops); -+ if (IS_ERR(group)) { -+ err = PTR_ERR(group); -+ pr_err("fsnotify_alloc_group() failed, %d\n", err); -+ goto out_hfsn; -+ } -+ -+ group->private = hfsn; -+ hfsn->hfsn_group = group; -+ br->br_hfsn = hfsn; -+ goto out; /* success */ -+ -+out_hfsn: -+ au_kfree_try_rcu(hfsn); -+out: -+ return err; -+} -+ -+static int au_hfsn_reset_br(unsigned int udba, struct au_branch *br, int perm) -+{ -+ int err; -+ -+ err = 0; -+ if (!br->br_hfsn) -+ err = au_hfsn_init_br(br, perm); -+ -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+static void au_hfsn_fin(void) -+{ -+ AuDbg("au_hfsn_ifree %lld\n", (long long)atomic64_read(&au_hfsn_ifree)); -+ wait_event(au_hfsn_wq, !atomic64_read(&au_hfsn_ifree)); -+} -+ -+const struct au_hnotify_op au_hnotify_op = { -+ .ctl = au_hfsn_ctl, -+ .alloc = au_hfsn_alloc, -+ .free = au_hfsn_free, -+ -+ .fin = au_hfsn_fin, -+ -+ .reset_br = au_hfsn_reset_br, -+ .fin_br = au_hfsn_fin_br, -+ .init_br = au_hfsn_init_br -+}; -diff --git a/fs/aufs/hfsplus.c b/fs/aufs/hfsplus.c -new file mode 100644 -index 000000000000..3d4fed48bf16 ---- /dev/null -+++ b/fs/aufs/hfsplus.c -@@ -0,0 +1,47 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2010-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * special support for filesystems which acquires an inode mutex -+ * at final closing a file, eg, hfsplus. -+ * -+ * This trick is very simple and stupid, just to open the file before really -+ * necessary open to tell hfsplus that this is not the final closing. -+ * The caller should call au_h_open_pre() after acquiring the inode mutex, -+ * and au_h_open_post() after releasing it. -+ */ -+ -+#include "aufs.h" -+ -+struct file *au_h_open_pre(struct dentry *dentry, aufs_bindex_t bindex, -+ int force_wr) -+{ -+ struct file *h_file; -+ struct dentry *h_dentry; -+ -+ h_dentry = au_h_dptr(dentry, bindex); -+ AuDebugOn(!h_dentry); -+ AuDebugOn(d_is_negative(h_dentry)); -+ -+ h_file = NULL; -+ if (au_test_hfsplus(h_dentry->d_sb) -+ && d_is_reg(h_dentry)) -+ h_file = au_h_open(dentry, bindex, -+ O_RDONLY | O_NOATIME | O_LARGEFILE, -+ /*file*/NULL, force_wr); -+ return h_file; -+} -+ -+void au_h_open_post(struct dentry *dentry, aufs_bindex_t bindex, -+ struct file *h_file) -+{ -+ struct au_branch *br; -+ -+ if (h_file) { -+ fput(h_file); -+ br = au_sbr(dentry->d_sb, bindex); -+ au_lcnt_dec(&br->br_nfiles); -+ } -+} -diff --git a/fs/aufs/hnotify.c b/fs/aufs/hnotify.c -new file mode 100644 -index 000000000000..ea1060fb7de0 ---- /dev/null -+++ b/fs/aufs/hnotify.c -@@ -0,0 +1,702 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * abstraction to notify the direct changes on lower directories -+ */ -+ -+/* #include */ -+#include "aufs.h" -+ -+int au_hn_alloc(struct au_hinode *hinode, struct inode *inode) -+{ -+ int err; -+ struct au_hnotify *hn; -+ -+ err = -ENOMEM; -+ hn = au_cache_alloc_hnotify(); -+ if (hn) { -+ hn->hn_aufs_inode = inode; -+ hinode->hi_notify = hn; -+ err = au_hnotify_op.alloc(hinode); -+ AuTraceErr(err); -+ if (unlikely(err)) { -+ hinode->hi_notify = NULL; -+ au_cache_free_hnotify(hn); -+ /* -+ * The upper dir was removed by udba, but the same named -+ * dir left. In this case, aufs assigns a new inode -+ * number and set the monitor again. -+ * For the lower dir, the old monitor is still left. -+ */ -+ if (err == -EEXIST) -+ err = 0; -+ } -+ } -+ -+ AuTraceErr(err); -+ return err; -+} -+ -+void au_hn_free(struct au_hinode *hinode) -+{ -+ struct au_hnotify *hn; -+ -+ hn = hinode->hi_notify; -+ if (hn) { -+ hinode->hi_notify = NULL; -+ if (au_hnotify_op.free(hinode, hn)) -+ au_cache_free_hnotify(hn); -+ } -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+void au_hn_ctl(struct au_hinode *hinode, int do_set) -+{ -+ if (hinode->hi_notify) -+ au_hnotify_op.ctl(hinode, do_set); -+} -+ -+void au_hn_reset(struct inode *inode, unsigned int flags) -+{ -+ aufs_bindex_t bindex, bbot; -+ struct inode *hi; -+ struct dentry *iwhdentry; -+ -+ bbot = au_ibbot(inode); -+ for (bindex = au_ibtop(inode); bindex <= bbot; bindex++) { -+ hi = au_h_iptr(inode, bindex); -+ if (!hi) -+ continue; -+ -+ /* inode_lock_nested(hi, AuLsc_I_CHILD); */ -+ iwhdentry = au_hi_wh(inode, bindex); -+ if (iwhdentry) -+ dget(iwhdentry); -+ au_igrab(hi); -+ au_set_h_iptr(inode, bindex, NULL, 0); -+ au_set_h_iptr(inode, bindex, au_igrab(hi), -+ flags & ~AuHi_XINO); -+ iput(hi); -+ dput(iwhdentry); -+ /* inode_unlock(hi); */ -+ } -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+static int hn_xino(struct inode *inode, struct inode *h_inode) -+{ -+ int err; -+ aufs_bindex_t bindex, bbot, bfound, btop; -+ struct inode *h_i; -+ -+ err = 0; -+ if (unlikely(inode->i_ino == AUFS_ROOT_INO)) { -+ pr_warn("branch root dir was changed\n"); -+ goto out; -+ } -+ -+ bfound = -1; -+ bbot = au_ibbot(inode); -+ btop = au_ibtop(inode); -+#if 0 /* reserved for future use */ -+ if (bindex == bbot) { -+ /* keep this ino in rename case */ -+ goto out; -+ } -+#endif -+ for (bindex = btop; bindex <= bbot; bindex++) -+ if (au_h_iptr(inode, bindex) == h_inode) { -+ bfound = bindex; -+ break; -+ } -+ if (bfound < 0) -+ goto out; -+ -+ for (bindex = btop; bindex <= bbot; bindex++) { -+ h_i = au_h_iptr(inode, bindex); -+ if (!h_i) -+ continue; -+ -+ err = au_xino_write(inode->i_sb, bindex, h_i->i_ino, /*ino*/0); -+ /* ignore this error */ -+ /* bad action? */ -+ } -+ -+ /* children inode number will be broken */ -+ -+out: -+ AuTraceErr(err); -+ return err; -+} -+ -+static int hn_gen_tree(struct dentry *dentry) -+{ -+ int err, i, j, ndentry; -+ struct au_dcsub_pages dpages; -+ struct au_dpage *dpage; -+ struct dentry **dentries; -+ -+ err = au_dpages_init(&dpages, GFP_NOFS); -+ if (unlikely(err)) -+ goto out; -+ err = au_dcsub_pages(&dpages, dentry, NULL, NULL); -+ if (unlikely(err)) -+ goto out_dpages; -+ -+ for (i = 0; i < dpages.ndpage; i++) { -+ dpage = dpages.dpages + i; -+ dentries = dpage->dentries; -+ ndentry = dpage->ndentry; -+ for (j = 0; j < ndentry; j++) { -+ struct dentry *d; -+ -+ d = dentries[j]; -+ if (IS_ROOT(d)) -+ continue; -+ -+ au_digen_dec(d); -+ if (d_really_is_positive(d)) -+ /* todo: reset children xino? -+ cached children only? */ -+ au_iigen_dec(d_inode(d)); -+ } -+ } -+ -+out_dpages: -+ au_dpages_free(&dpages); -+out: -+ return err; -+} -+ -+/* -+ * return 0 if processed. -+ */ -+static int hn_gen_by_inode(char *name, unsigned int nlen, struct inode *inode, -+ const unsigned int isdir) -+{ -+ int err; -+ struct dentry *d; -+ struct qstr *dname; -+ -+ err = 1; -+ if (unlikely(inode->i_ino == AUFS_ROOT_INO)) { -+ pr_warn("branch root dir was changed\n"); -+ err = 0; -+ goto out; -+ } -+ -+ if (!isdir) { -+ AuDebugOn(!name); -+ au_iigen_dec(inode); -+ spin_lock(&inode->i_lock); -+ hlist_for_each_entry(d, &inode->i_dentry, d_u.d_alias) { -+ spin_lock(&d->d_lock); -+ dname = &d->d_name; -+ if (dname->len != nlen -+ && memcmp(dname->name, name, nlen)) { -+ spin_unlock(&d->d_lock); -+ continue; -+ } -+ err = 0; -+ au_digen_dec(d); -+ spin_unlock(&d->d_lock); -+ break; -+ } -+ spin_unlock(&inode->i_lock); -+ } else { -+ au_fset_si(au_sbi(inode->i_sb), FAILED_REFRESH_DIR); -+ d = d_find_any_alias(inode); -+ if (!d) { -+ au_iigen_dec(inode); -+ goto out; -+ } -+ -+ spin_lock(&d->d_lock); -+ dname = &d->d_name; -+ if (dname->len == nlen && !memcmp(dname->name, name, nlen)) { -+ spin_unlock(&d->d_lock); -+ err = hn_gen_tree(d); -+ spin_lock(&d->d_lock); -+ } -+ spin_unlock(&d->d_lock); -+ dput(d); -+ } -+ -+out: -+ AuTraceErr(err); -+ return err; -+} -+ -+static int hn_gen_by_name(struct dentry *dentry, const unsigned int isdir) -+{ -+ int err; -+ -+ if (IS_ROOT(dentry)) { -+ pr_warn("branch root dir was changed\n"); -+ return 0; -+ } -+ -+ err = 0; -+ if (!isdir) { -+ au_digen_dec(dentry); -+ if (d_really_is_positive(dentry)) -+ au_iigen_dec(d_inode(dentry)); -+ } else { -+ au_fset_si(au_sbi(dentry->d_sb), FAILED_REFRESH_DIR); -+ if (d_really_is_positive(dentry)) -+ err = hn_gen_tree(dentry); -+ } -+ -+ AuTraceErr(err); -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* hnotify job flags */ -+#define AuHnJob_XINO0 1 -+#define AuHnJob_GEN (1 << 1) -+#define AuHnJob_DIRENT (1 << 2) -+#define AuHnJob_ISDIR (1 << 3) -+#define AuHnJob_TRYXINO0 (1 << 4) -+#define AuHnJob_MNTPNT (1 << 5) -+#define au_ftest_hnjob(flags, name) ((flags) & AuHnJob_##name) -+#define au_fset_hnjob(flags, name) \ -+ do { (flags) |= AuHnJob_##name; } while (0) -+#define au_fclr_hnjob(flags, name) \ -+ do { (flags) &= ~AuHnJob_##name; } while (0) -+ -+enum { -+ AuHn_CHILD, -+ AuHn_PARENT, -+ AuHnLast -+}; -+ -+struct au_hnotify_args { -+ struct inode *h_dir, *dir, *h_child_inode; -+ u32 mask; -+ unsigned int flags[AuHnLast]; -+ unsigned int h_child_nlen; -+ char h_child_name[]; -+}; -+ -+struct hn_job_args { -+ unsigned int flags; -+ struct inode *inode, *h_inode, *dir, *h_dir; -+ struct dentry *dentry; -+ char *h_name; -+ int h_nlen; -+}; -+ -+static int hn_job(struct hn_job_args *a) -+{ -+ const unsigned int isdir = au_ftest_hnjob(a->flags, ISDIR); -+ int e; -+ -+ /* reset xino */ -+ if (au_ftest_hnjob(a->flags, XINO0) && a->inode) -+ hn_xino(a->inode, a->h_inode); /* ignore this error */ -+ -+ if (au_ftest_hnjob(a->flags, TRYXINO0) -+ && a->inode -+ && a->h_inode) { -+ inode_lock_shared_nested(a->h_inode, AuLsc_I_CHILD); -+ if (!a->h_inode->i_nlink -+ && !(a->h_inode->i_state & I_LINKABLE)) -+ hn_xino(a->inode, a->h_inode); /* ignore this error */ -+ inode_unlock_shared(a->h_inode); -+ } -+ -+ /* make the generation obsolete */ -+ if (au_ftest_hnjob(a->flags, GEN)) { -+ e = -1; -+ if (a->inode) -+ e = hn_gen_by_inode(a->h_name, a->h_nlen, a->inode, -+ isdir); -+ if (e && a->dentry) -+ hn_gen_by_name(a->dentry, isdir); -+ /* ignore this error */ -+ } -+ -+ /* make dir entries obsolete */ -+ if (au_ftest_hnjob(a->flags, DIRENT) && a->inode) { -+ struct au_vdir *vdir; -+ -+ vdir = au_ivdir(a->inode); -+ if (vdir) -+ vdir->vd_jiffy = 0; -+ /* IMustLock(a->inode); */ -+ /* inode_inc_iversion(a->inode); */ -+ } -+ -+ /* can do nothing but warn */ -+ if (au_ftest_hnjob(a->flags, MNTPNT) -+ && a->dentry -+ && d_mountpoint(a->dentry)) -+ pr_warn("mount-point %pd is removed or renamed\n", a->dentry); -+ -+ return 0; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+static struct dentry *lookup_wlock_by_name(char *name, unsigned int nlen, -+ struct inode *dir) -+{ -+ struct dentry *dentry, *d, *parent; -+ struct qstr *dname; -+ -+ parent = d_find_any_alias(dir); -+ if (!parent) -+ return NULL; -+ -+ dentry = NULL; -+ spin_lock(&parent->d_lock); -+ list_for_each_entry(d, &parent->d_subdirs, d_child) { -+ /* AuDbg("%pd\n", d); */ -+ spin_lock_nested(&d->d_lock, DENTRY_D_LOCK_NESTED); -+ dname = &d->d_name; -+ if (dname->len != nlen || memcmp(dname->name, name, nlen)) -+ goto cont_unlock; -+ if (au_di(d)) -+ au_digen_dec(d); -+ else -+ goto cont_unlock; -+ if (au_dcount(d) > 0) { -+ dentry = dget_dlock(d); -+ spin_unlock(&d->d_lock); -+ break; -+ } -+ -+cont_unlock: -+ spin_unlock(&d->d_lock); -+ } -+ spin_unlock(&parent->d_lock); -+ dput(parent); -+ -+ if (dentry) -+ di_write_lock_child(dentry); -+ -+ return dentry; -+} -+ -+static struct inode *lookup_wlock_by_ino(struct super_block *sb, -+ aufs_bindex_t bindex, ino_t h_ino) -+{ -+ struct inode *inode; -+ ino_t ino; -+ int err; -+ -+ inode = NULL; -+ err = au_xino_read(sb, bindex, h_ino, &ino); -+ if (!err && ino) -+ inode = ilookup(sb, ino); -+ if (!inode) -+ goto out; -+ -+ if (unlikely(inode->i_ino == AUFS_ROOT_INO)) { -+ pr_warn("wrong root branch\n"); -+ iput(inode); -+ inode = NULL; -+ goto out; -+ } -+ -+ ii_write_lock_child(inode); -+ -+out: -+ return inode; -+} -+ -+static void au_hn_bh(void *_args) -+{ -+ struct au_hnotify_args *a = _args; -+ struct super_block *sb; -+ aufs_bindex_t bindex, bbot, bfound; -+ unsigned char xino, try_iput; -+ int err; -+ struct inode *inode; -+ ino_t h_ino; -+ struct hn_job_args args; -+ struct dentry *dentry; -+ struct au_sbinfo *sbinfo; -+ -+ AuDebugOn(!_args); -+ AuDebugOn(!a->h_dir); -+ AuDebugOn(!a->dir); -+ AuDebugOn(!a->mask); -+ AuDbg("mask 0x%x, i%lu, hi%lu, hci%lu\n", -+ a->mask, a->dir->i_ino, a->h_dir->i_ino, -+ a->h_child_inode ? a->h_child_inode->i_ino : 0); -+ -+ inode = NULL; -+ dentry = NULL; -+ /* -+ * do not lock a->dir->i_mutex here -+ * because of d_revalidate() may cause a deadlock. -+ */ -+ sb = a->dir->i_sb; -+ AuDebugOn(!sb); -+ sbinfo = au_sbi(sb); -+ AuDebugOn(!sbinfo); -+ si_write_lock(sb, AuLock_NOPLMW); -+ -+ if (au_opt_test(sbinfo->si_mntflags, DIRREN)) -+ switch (a->mask & FS_EVENTS_POSS_ON_CHILD) { -+ case FS_MOVED_FROM: -+ case FS_MOVED_TO: -+ AuWarn1("DIRREN with UDBA may not work correctly " -+ "for the direct rename(2)\n"); -+ } -+ -+ ii_read_lock_parent(a->dir); -+ bfound = -1; -+ bbot = au_ibbot(a->dir); -+ for (bindex = au_ibtop(a->dir); bindex <= bbot; bindex++) -+ if (au_h_iptr(a->dir, bindex) == a->h_dir) { -+ bfound = bindex; -+ break; -+ } -+ ii_read_unlock(a->dir); -+ if (unlikely(bfound < 0)) -+ goto out; -+ -+ xino = !!au_opt_test(au_mntflags(sb), XINO); -+ h_ino = 0; -+ if (a->h_child_inode) -+ h_ino = a->h_child_inode->i_ino; -+ -+ if (a->h_child_nlen -+ && (au_ftest_hnjob(a->flags[AuHn_CHILD], GEN) -+ || au_ftest_hnjob(a->flags[AuHn_CHILD], MNTPNT))) -+ dentry = lookup_wlock_by_name(a->h_child_name, a->h_child_nlen, -+ a->dir); -+ try_iput = 0; -+ if (dentry && d_really_is_positive(dentry)) -+ inode = d_inode(dentry); -+ if (xino && !inode && h_ino -+ && (au_ftest_hnjob(a->flags[AuHn_CHILD], XINO0) -+ || au_ftest_hnjob(a->flags[AuHn_CHILD], TRYXINO0) -+ || au_ftest_hnjob(a->flags[AuHn_CHILD], GEN))) { -+ inode = lookup_wlock_by_ino(sb, bfound, h_ino); -+ try_iput = 1; -+ } -+ -+ args.flags = a->flags[AuHn_CHILD]; -+ args.dentry = dentry; -+ args.inode = inode; -+ args.h_inode = a->h_child_inode; -+ args.dir = a->dir; -+ args.h_dir = a->h_dir; -+ args.h_name = a->h_child_name; -+ args.h_nlen = a->h_child_nlen; -+ err = hn_job(&args); -+ if (dentry) { -+ if (au_di(dentry)) -+ di_write_unlock(dentry); -+ dput(dentry); -+ } -+ if (inode && try_iput) { -+ ii_write_unlock(inode); -+ iput(inode); -+ } -+ -+ ii_write_lock_parent(a->dir); -+ args.flags = a->flags[AuHn_PARENT]; -+ args.dentry = NULL; -+ args.inode = a->dir; -+ args.h_inode = a->h_dir; -+ args.dir = NULL; -+ args.h_dir = NULL; -+ args.h_name = NULL; -+ args.h_nlen = 0; -+ err = hn_job(&args); -+ ii_write_unlock(a->dir); -+ -+out: -+ iput(a->h_child_inode); -+ iput(a->h_dir); -+ iput(a->dir); -+ si_write_unlock(sb); -+ au_nwt_done(&sbinfo->si_nowait); -+ au_kfree_rcu(a); -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+int au_hnotify(struct inode *h_dir, struct au_hnotify *hnotify, u32 mask, -+ const struct qstr *h_child_qstr, struct inode *h_child_inode) -+{ -+ int err, len; -+ unsigned int flags[AuHnLast], f; -+ unsigned char isdir, isroot, wh; -+ struct inode *dir; -+ struct au_hnotify_args *args; -+ char *p, *h_child_name; -+ -+ err = 0; -+ AuDebugOn(!hnotify || !hnotify->hn_aufs_inode); -+ dir = igrab(hnotify->hn_aufs_inode); -+ if (!dir) -+ goto out; -+ -+ isroot = (dir->i_ino == AUFS_ROOT_INO); -+ wh = 0; -+ h_child_name = (void *)h_child_qstr->name; -+ len = h_child_qstr->len; -+ if (h_child_name) { -+ if (len > AUFS_WH_PFX_LEN -+ && !memcmp(h_child_name, AUFS_WH_PFX, AUFS_WH_PFX_LEN)) { -+ h_child_name += AUFS_WH_PFX_LEN; -+ len -= AUFS_WH_PFX_LEN; -+ wh = 1; -+ } -+ } -+ -+ isdir = 0; -+ if (h_child_inode) -+ isdir = !!S_ISDIR(h_child_inode->i_mode); -+ flags[AuHn_PARENT] = AuHnJob_ISDIR; -+ flags[AuHn_CHILD] = 0; -+ if (isdir) -+ flags[AuHn_CHILD] = AuHnJob_ISDIR; -+ au_fset_hnjob(flags[AuHn_PARENT], DIRENT); -+ au_fset_hnjob(flags[AuHn_CHILD], GEN); -+ switch (mask & ALL_FSNOTIFY_DIRENT_EVENTS) { -+ case FS_MOVED_FROM: -+ case FS_MOVED_TO: -+ au_fset_hnjob(flags[AuHn_CHILD], XINO0); -+ au_fset_hnjob(flags[AuHn_CHILD], MNTPNT); -+ fallthrough; -+ case FS_CREATE: -+ AuDebugOn(!h_child_name); -+ break; -+ -+ case FS_DELETE: -+ /* -+ * aufs never be able to get this child inode. -+ * revalidation should be in d_revalidate() -+ * by checking i_nlink, i_generation or d_unhashed(). -+ */ -+ AuDebugOn(!h_child_name); -+ au_fset_hnjob(flags[AuHn_CHILD], TRYXINO0); -+ au_fset_hnjob(flags[AuHn_CHILD], MNTPNT); -+ break; -+ -+ default: -+ AuDebugOn(1); -+ } -+ -+ if (wh) -+ h_child_inode = NULL; -+ -+ err = -ENOMEM; -+ /* iput() and kfree() will be called in au_hnotify() */ -+ args = kmalloc(sizeof(*args) + len + 1, GFP_NOFS); -+ if (unlikely(!args)) { -+ AuErr1("no memory\n"); -+ iput(dir); -+ goto out; -+ } -+ args->flags[AuHn_PARENT] = flags[AuHn_PARENT]; -+ args->flags[AuHn_CHILD] = flags[AuHn_CHILD]; -+ args->mask = mask; -+ args->dir = dir; -+ args->h_dir = igrab(h_dir); -+ if (h_child_inode) -+ h_child_inode = igrab(h_child_inode); /* can be NULL */ -+ args->h_child_inode = h_child_inode; -+ args->h_child_nlen = len; -+ if (len) { -+ p = (void *)args; -+ p += sizeof(*args); -+ memcpy(p, h_child_name, len); -+ p[len] = 0; -+ } -+ -+ /* NFS fires the event for silly-renamed one from kworker */ -+ f = 0; -+ if (!dir->i_nlink -+ || (au_test_nfs(h_dir->i_sb) && (mask & FS_DELETE))) -+ f = AuWkq_NEST; -+ err = au_wkq_nowait(au_hn_bh, args, dir->i_sb, f); -+ if (unlikely(err)) { -+ pr_err("wkq %d\n", err); -+ iput(args->h_child_inode); -+ iput(args->h_dir); -+ iput(args->dir); -+ au_kfree_rcu(args); -+ } -+ -+out: -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+int au_hnotify_reset_br(unsigned int udba, struct au_branch *br, int perm) -+{ -+ int err; -+ -+ AuDebugOn(!(udba & AuOptMask_UDBA)); -+ -+ err = 0; -+ if (au_hnotify_op.reset_br) -+ err = au_hnotify_op.reset_br(udba, br, perm); -+ -+ return err; -+} -+ -+int au_hnotify_init_br(struct au_branch *br, int perm) -+{ -+ int err; -+ -+ err = 0; -+ if (au_hnotify_op.init_br) -+ err = au_hnotify_op.init_br(br, perm); -+ -+ return err; -+} -+ -+void au_hnotify_fin_br(struct au_branch *br) -+{ -+ if (au_hnotify_op.fin_br) -+ au_hnotify_op.fin_br(br); -+} -+ -+static void au_hn_destroy_cache(void) -+{ -+ kmem_cache_destroy(au_cache[AuCache_HNOTIFY]); -+ au_cache[AuCache_HNOTIFY] = NULL; -+} -+ -+int __init au_hnotify_init(void) -+{ -+ int err; -+ -+ err = -ENOMEM; -+ au_cache[AuCache_HNOTIFY] = AuCache(au_hnotify); -+ if (au_cache[AuCache_HNOTIFY]) { -+ err = 0; -+ if (au_hnotify_op.init) -+ err = au_hnotify_op.init(); -+ if (unlikely(err)) -+ au_hn_destroy_cache(); -+ } -+ AuTraceErr(err); -+ return err; -+} -+ -+void au_hnotify_fin(void) -+{ -+ if (au_hnotify_op.fin) -+ au_hnotify_op.fin(); -+ -+ /* cf. au_cache_fin() */ -+ if (au_cache[AuCache_HNOTIFY]) -+ au_hn_destroy_cache(); -+} -diff --git a/fs/aufs/i_op.c b/fs/aufs/i_op.c -new file mode 100644 -index 000000000000..42bc497e2630 ---- /dev/null -+++ b/fs/aufs/i_op.c -@@ -0,0 +1,1489 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * inode operations (except add/del/rename) -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include "aufs.h" -+ -+static int h_permission(struct inode *h_inode, int mask, -+ struct path *h_path, int brperm) -+{ -+ int err; -+ const unsigned char write_mask = !!(mask & (MAY_WRITE | MAY_APPEND)); -+ -+ err = -EPERM; -+ if (write_mask && IS_IMMUTABLE(h_inode)) -+ goto out; -+ -+ err = -EACCES; -+ if (((mask & MAY_EXEC) -+ && S_ISREG(h_inode->i_mode) -+ && (path_noexec(h_path) -+ || !(h_inode->i_mode & 0111)))) -+ goto out; -+ -+ /* -+ * - skip the lower fs test in the case of write to ro branch. -+ * - nfs dir permission write check is optimized, but a policy for -+ * link/rename requires a real check. -+ * - nfs always sets SB_POSIXACL regardless its mount option 'noacl.' -+ * in this case, generic_permission() returns -EOPNOTSUPP. -+ */ -+ if ((write_mask && !au_br_writable(brperm)) -+ || (au_test_nfs(h_inode->i_sb) && S_ISDIR(h_inode->i_mode) -+ && write_mask && !(mask & MAY_READ)) -+ || !h_inode->i_op->permission) { -+ /* AuLabel(generic_permission); */ -+ /* AuDbg("get_acl %ps\n", h_inode->i_op->get_acl); */ -+ err = generic_permission(h_inode, mask); -+ if (err == -EOPNOTSUPP && au_test_nfs_noacl(h_inode)) -+ err = h_inode->i_op->permission(h_inode, mask); -+ AuTraceErr(err); -+ } else { -+ /* AuLabel(h_inode->permission); */ -+ err = h_inode->i_op->permission(h_inode, mask); -+ AuTraceErr(err); -+ } -+ -+ if (!err) -+ err = devcgroup_inode_permission(h_inode, mask); -+ if (!err) -+ err = security_inode_permission(h_inode, mask); -+ -+out: -+ return err; -+} -+ -+static int aufs_permission(struct inode *inode, int mask) -+{ -+ int err; -+ aufs_bindex_t bindex, bbot; -+ const unsigned char isdir = !!S_ISDIR(inode->i_mode), -+ write_mask = !!(mask & (MAY_WRITE | MAY_APPEND)); -+ struct inode *h_inode; -+ struct super_block *sb; -+ struct au_branch *br; -+ -+ /* todo: support rcu-walk? */ -+ if (mask & MAY_NOT_BLOCK) -+ return -ECHILD; -+ -+ sb = inode->i_sb; -+ si_read_lock(sb, AuLock_FLUSH); -+ ii_read_lock_child(inode); -+#if 0 /* reserved for future use */ -+ /* -+ * This test may be rather 'too much' since the test is essentially done -+ * in the aufs_lookup(). Theoretically it is possible that the inode -+ * generation doesn't match to the superblock's here. But it isn't a -+ * big deal I suppose. -+ */ -+ err = au_iigen_test(inode, au_sigen(sb)); -+ if (unlikely(err)) -+ goto out; -+#endif -+ -+ if (!isdir -+ || write_mask -+ || au_opt_test(au_mntflags(sb), DIRPERM1)) { -+ err = au_busy_or_stale(); -+ h_inode = au_h_iptr(inode, au_ibtop(inode)); -+ if (unlikely(!h_inode -+ || (h_inode->i_mode & S_IFMT) -+ != (inode->i_mode & S_IFMT))) -+ goto out; -+ -+ err = 0; -+ bindex = au_ibtop(inode); -+ br = au_sbr(sb, bindex); -+ err = h_permission(h_inode, mask, &br->br_path, br->br_perm); -+ if (write_mask -+ && !err -+ && !special_file(h_inode->i_mode)) { -+ /* test whether the upper writable branch exists */ -+ err = -EROFS; -+ for (; bindex >= 0; bindex--) -+ if (!au_br_rdonly(au_sbr(sb, bindex))) { -+ err = 0; -+ break; -+ } -+ } -+ goto out; -+ } -+ -+ /* non-write to dir */ -+ err = 0; -+ bbot = au_ibbot(inode); -+ for (bindex = au_ibtop(inode); !err && bindex <= bbot; bindex++) { -+ h_inode = au_h_iptr(inode, bindex); -+ if (h_inode) { -+ err = au_busy_or_stale(); -+ if (unlikely(!S_ISDIR(h_inode->i_mode))) -+ break; -+ -+ br = au_sbr(sb, bindex); -+ err = h_permission(h_inode, mask, &br->br_path, -+ br->br_perm); -+ } -+ } -+ -+out: -+ ii_read_unlock(inode); -+ si_read_unlock(sb); -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+static struct dentry *aufs_lookup(struct inode *dir, struct dentry *dentry, -+ unsigned int flags) -+{ -+ struct dentry *ret, *parent; -+ struct inode *inode; -+ struct super_block *sb; -+ int err, npositive; -+ -+ IMustLock(dir); -+ -+ /* todo: support rcu-walk? */ -+ ret = ERR_PTR(-ECHILD); -+ if (flags & LOOKUP_RCU) -+ goto out; -+ -+ ret = ERR_PTR(-ENAMETOOLONG); -+ if (unlikely(dentry->d_name.len > AUFS_MAX_NAMELEN)) -+ goto out; -+ -+ sb = dir->i_sb; -+ err = si_read_lock(sb, AuLock_FLUSH | AuLock_NOPLM); -+ ret = ERR_PTR(err); -+ if (unlikely(err)) -+ goto out; -+ -+ err = au_di_init(dentry); -+ ret = ERR_PTR(err); -+ if (unlikely(err)) -+ goto out_si; -+ -+ inode = NULL; -+ npositive = 0; /* suppress a warning */ -+ parent = dentry->d_parent; /* dir inode is locked */ -+ di_read_lock_parent(parent, AuLock_IR); -+ err = au_alive_dir(parent); -+ if (!err) -+ err = au_digen_test(parent, au_sigen(sb)); -+ if (!err) { -+ /* regardless LOOKUP_CREATE, always ALLOW_NEG */ -+ npositive = au_lkup_dentry(dentry, au_dbtop(parent), -+ AuLkup_ALLOW_NEG); -+ err = npositive; -+ } -+ di_read_unlock(parent, AuLock_IR); -+ ret = ERR_PTR(err); -+ if (unlikely(err < 0)) -+ goto out_unlock; -+ -+ if (npositive) { -+ inode = au_new_inode(dentry, /*must_new*/0); -+ if (IS_ERR(inode)) { -+ ret = (void *)inode; -+ inode = NULL; -+ goto out_unlock; -+ } -+ } -+ -+ if (inode) -+ atomic_inc(&inode->i_count); -+ ret = d_splice_alias(inode, dentry); -+#if 0 /* reserved for future use */ -+ if (unlikely(d_need_lookup(dentry))) { -+ spin_lock(&dentry->d_lock); -+ dentry->d_flags &= ~DCACHE_NEED_LOOKUP; -+ spin_unlock(&dentry->d_lock); -+ } else -+#endif -+ if (inode) { -+ if (!IS_ERR(ret)) { -+ iput(inode); -+ if (ret && ret != dentry) -+ ii_write_unlock(inode); -+ } else { -+ ii_write_unlock(inode); -+ iput(inode); -+ inode = NULL; -+ } -+ } -+ -+out_unlock: -+ di_write_unlock(dentry); -+out_si: -+ si_read_unlock(sb); -+out: -+ return ret; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* -+ * very dirty and complicated aufs ->atomic_open(). -+ * aufs_atomic_open() -+ * + au_aopen_or_create() -+ * + add_simple() -+ * + vfsub_atomic_open() -+ * + branch fs ->atomic_open() -+ * may call the actual 'open' for h_file -+ * + inc br_nfiles only if opened -+ * + au_aopen_no_open() or au_aopen_do_open() -+ * -+ * au_aopen_do_open() -+ * + finish_open() -+ * + au_do_aopen() -+ * + au_do_open() the body of all 'open' -+ * + au_do_open_nondir() -+ * set the passed h_file -+ * -+ * au_aopen_no_open() -+ * + finish_no_open() -+ */ -+ -+struct aopen_node { -+ struct hlist_bl_node hblist; -+ struct file *file, *h_file; -+}; -+ -+static int au_do_aopen(struct inode *inode, struct file *file) -+{ -+ struct hlist_bl_head *aopen; -+ struct hlist_bl_node *pos; -+ struct aopen_node *node; -+ struct au_do_open_args args = { -+ .aopen = 1, -+ .open = au_do_open_nondir -+ }; -+ -+ aopen = &au_sbi(inode->i_sb)->si_aopen; -+ hlist_bl_lock(aopen); -+ hlist_bl_for_each_entry(node, pos, aopen, hblist) -+ if (node->file == file) { -+ args.h_file = node->h_file; -+ break; -+ } -+ hlist_bl_unlock(aopen); -+ /* AuDebugOn(!args.h_file); */ -+ -+ return au_do_open(file, &args); -+} -+ -+static int au_aopen_do_open(struct file *file, struct dentry *dentry, -+ struct aopen_node *aopen_node) -+{ -+ int err; -+ struct hlist_bl_head *aopen; -+ -+ AuLabel(here); -+ aopen = &au_sbi(dentry->d_sb)->si_aopen; -+ au_hbl_add(&aopen_node->hblist, aopen); -+ err = finish_open(file, dentry, au_do_aopen); -+ au_hbl_del(&aopen_node->hblist, aopen); -+ /* AuDbgFile(file); */ -+ AuDbg("%pd%s%s\n", dentry, -+ (file->f_mode & FMODE_CREATED) ? " created" : "", -+ (file->f_mode & FMODE_OPENED) ? " opened" : ""); -+ -+ AuTraceErr(err); -+ return err; -+} -+ -+static int au_aopen_no_open(struct file *file, struct dentry *dentry) -+{ -+ int err; -+ -+ AuLabel(here); -+ dget(dentry); -+ err = finish_no_open(file, dentry); -+ -+ AuTraceErr(err); -+ return err; -+} -+ -+static int aufs_atomic_open(struct inode *dir, struct dentry *dentry, -+ struct file *file, unsigned int open_flag, -+ umode_t create_mode) -+{ -+ int err, did_open; -+ unsigned int lkup_flags; -+ aufs_bindex_t bindex; -+ struct super_block *sb; -+ struct dentry *parent, *d; -+ struct vfsub_aopen_args args = { -+ .open_flag = open_flag, -+ .create_mode = create_mode -+ }; -+ struct aopen_node aopen_node = { -+ .file = file -+ }; -+ -+ IMustLock(dir); -+ AuDbg("open_flag 0%o\n", open_flag); -+ AuDbgDentry(dentry); -+ -+ err = 0; -+ if (!au_di(dentry)) { -+ lkup_flags = LOOKUP_OPEN; -+ if (open_flag & O_CREAT) -+ lkup_flags |= LOOKUP_CREATE; -+ d = aufs_lookup(dir, dentry, lkup_flags); -+ if (IS_ERR(d)) { -+ err = PTR_ERR(d); -+ AuTraceErr(err); -+ goto out; -+ } else if (d) { -+ /* -+ * obsoleted dentry found. -+ * another error will be returned later. -+ */ -+ d_drop(d); -+ AuDbgDentry(d); -+ dput(d); -+ } -+ AuDbgDentry(dentry); -+ } -+ -+ if (d_is_positive(dentry) -+ || d_unhashed(dentry) -+ || d_unlinked(dentry) -+ || !(open_flag & O_CREAT)) { -+ err = au_aopen_no_open(file, dentry); -+ goto out; /* success */ -+ } -+ -+ err = aufs_read_lock(dentry, AuLock_DW | AuLock_FLUSH | AuLock_GEN); -+ if (unlikely(err)) -+ goto out; -+ -+ sb = dentry->d_sb; -+ parent = dentry->d_parent; /* dir is locked */ -+ di_write_lock_parent(parent); -+ err = au_lkup_dentry(dentry, /*btop*/0, AuLkup_ALLOW_NEG); -+ if (unlikely(err < 0)) -+ goto out_parent; -+ -+ AuDbgDentry(dentry); -+ if (d_is_positive(dentry)) { -+ err = au_aopen_no_open(file, dentry); -+ goto out_parent; /* success */ -+ } -+ -+ args.file = alloc_empty_file(file->f_flags, current_cred()); -+ err = PTR_ERR(args.file); -+ if (IS_ERR(args.file)) -+ goto out_parent; -+ -+ bindex = au_dbtop(dentry); -+ err = au_aopen_or_create(dir, dentry, &args); -+ AuTraceErr(err); -+ AuDbgFile(args.file); -+ file->f_mode = args.file->f_mode & ~FMODE_OPENED; -+ did_open = !!(args.file->f_mode & FMODE_OPENED); -+ if (!did_open) { -+ fput(args.file); -+ args.file = NULL; -+ } -+ di_write_unlock(parent); -+ di_write_unlock(dentry); -+ if (unlikely(err < 0)) { -+ if (args.file) -+ fput(args.file); -+ goto out_sb; -+ } -+ -+ if (!did_open) -+ err = au_aopen_no_open(file, dentry); -+ else { -+ aopen_node.h_file = args.file; -+ err = au_aopen_do_open(file, dentry, &aopen_node); -+ } -+ if (unlikely(err < 0)) { -+ if (args.file) -+ fput(args.file); -+ if (did_open) -+ au_lcnt_dec(&args.br->br_nfiles); -+ } -+ goto out_sb; /* success */ -+ -+out_parent: -+ di_write_unlock(parent); -+ di_write_unlock(dentry); -+out_sb: -+ si_read_unlock(sb); -+out: -+ AuTraceErr(err); -+ AuDbgFile(file); -+ return err; -+} -+ -+ -+/* ---------------------------------------------------------------------- */ -+ -+static int au_wr_dir_cpup(struct dentry *dentry, struct dentry *parent, -+ const unsigned char add_entry, aufs_bindex_t bcpup, -+ aufs_bindex_t btop) -+{ -+ int err; -+ struct dentry *h_parent; -+ struct inode *h_dir; -+ -+ if (add_entry) -+ IMustLock(d_inode(parent)); -+ else -+ di_write_lock_parent(parent); -+ -+ err = 0; -+ if (!au_h_dptr(parent, bcpup)) { -+ if (btop > bcpup) -+ err = au_cpup_dirs(dentry, bcpup); -+ else if (btop < bcpup) -+ err = au_cpdown_dirs(dentry, bcpup); -+ else -+ BUG(); -+ } -+ if (!err && add_entry && !au_ftest_wrdir(add_entry, TMPFILE)) { -+ h_parent = au_h_dptr(parent, bcpup); -+ h_dir = d_inode(h_parent); -+ inode_lock_shared_nested(h_dir, AuLsc_I_PARENT); -+ err = au_lkup_neg(dentry, bcpup, /*wh*/0); -+ /* todo: no unlock here */ -+ inode_unlock_shared(h_dir); -+ -+ AuDbg("bcpup %d\n", bcpup); -+ if (!err) { -+ if (d_really_is_negative(dentry)) -+ au_set_h_dptr(dentry, btop, NULL); -+ au_update_dbrange(dentry, /*do_put_zero*/0); -+ } -+ } -+ -+ if (!add_entry) -+ di_write_unlock(parent); -+ if (!err) -+ err = bcpup; /* success */ -+ -+ AuTraceErr(err); -+ return err; -+} -+ -+/* -+ * decide the branch and the parent dir where we will create a new entry. -+ * returns new bindex or an error. -+ * copyup the parent dir if needed. -+ */ -+int au_wr_dir(struct dentry *dentry, struct dentry *src_dentry, -+ struct au_wr_dir_args *args) -+{ -+ int err; -+ unsigned int flags; -+ aufs_bindex_t bcpup, btop, src_btop; -+ const unsigned char add_entry -+ = au_ftest_wrdir(args->flags, ADD_ENTRY) -+ | au_ftest_wrdir(args->flags, TMPFILE); -+ struct super_block *sb; -+ struct dentry *parent; -+ struct au_sbinfo *sbinfo; -+ -+ sb = dentry->d_sb; -+ sbinfo = au_sbi(sb); -+ parent = dget_parent(dentry); -+ btop = au_dbtop(dentry); -+ bcpup = btop; -+ if (args->force_btgt < 0) { -+ if (src_dentry) { -+ src_btop = au_dbtop(src_dentry); -+ if (src_btop < btop) -+ bcpup = src_btop; -+ } else if (add_entry) { -+ flags = 0; -+ if (au_ftest_wrdir(args->flags, ISDIR)) -+ au_fset_wbr(flags, DIR); -+ err = AuWbrCreate(sbinfo, dentry, flags); -+ bcpup = err; -+ } -+ -+ if (bcpup < 0 || au_test_ro(sb, bcpup, d_inode(dentry))) { -+ if (add_entry) -+ err = AuWbrCopyup(sbinfo, dentry); -+ else { -+ if (!IS_ROOT(dentry)) { -+ di_read_lock_parent(parent, !AuLock_IR); -+ err = AuWbrCopyup(sbinfo, dentry); -+ di_read_unlock(parent, !AuLock_IR); -+ } else -+ err = AuWbrCopyup(sbinfo, dentry); -+ } -+ bcpup = err; -+ if (unlikely(err < 0)) -+ goto out; -+ } -+ } else { -+ bcpup = args->force_btgt; -+ AuDebugOn(au_test_ro(sb, bcpup, d_inode(dentry))); -+ } -+ -+ AuDbg("btop %d, bcpup %d\n", btop, bcpup); -+ err = bcpup; -+ if (bcpup == btop) -+ goto out; /* success */ -+ -+ /* copyup the new parent into the branch we process */ -+ err = au_wr_dir_cpup(dentry, parent, add_entry, bcpup, btop); -+ if (err >= 0) { -+ if (d_really_is_negative(dentry)) { -+ au_set_h_dptr(dentry, btop, NULL); -+ au_set_dbtop(dentry, bcpup); -+ au_set_dbbot(dentry, bcpup); -+ } -+ AuDebugOn(add_entry -+ && !au_ftest_wrdir(args->flags, TMPFILE) -+ && !au_h_dptr(dentry, bcpup)); -+ } -+ -+out: -+ dput(parent); -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+void au_pin_hdir_unlock(struct au_pin *p) -+{ -+ if (p->hdir) -+ au_hn_inode_unlock(p->hdir); -+} -+ -+int au_pin_hdir_lock(struct au_pin *p) -+{ -+ int err; -+ -+ err = 0; -+ if (!p->hdir) -+ goto out; -+ -+ /* even if an error happens later, keep this lock */ -+ au_hn_inode_lock_nested(p->hdir, p->lsc_hi); -+ -+ err = -EBUSY; -+ if (unlikely(p->hdir->hi_inode != d_inode(p->h_parent))) -+ goto out; -+ -+ err = 0; -+ if (p->h_dentry) -+ err = au_h_verify(p->h_dentry, p->udba, p->hdir->hi_inode, -+ p->h_parent, p->br); -+ -+out: -+ return err; -+} -+ -+int au_pin_hdir_relock(struct au_pin *p) -+{ -+ int err, i; -+ struct inode *h_i; -+ struct dentry *h_d[] = { -+ p->h_dentry, -+ p->h_parent -+ }; -+ -+ err = au_pin_hdir_lock(p); -+ if (unlikely(err)) -+ goto out; -+ -+ for (i = 0; !err && i < sizeof(h_d)/sizeof(*h_d); i++) { -+ if (!h_d[i]) -+ continue; -+ if (d_is_positive(h_d[i])) { -+ h_i = d_inode(h_d[i]); -+ err = !h_i->i_nlink; -+ } -+ } -+ -+out: -+ return err; -+} -+ -+static void au_pin_hdir_set_owner(struct au_pin *p, struct task_struct *task) -+{ -+ atomic_long_set(&p->hdir->hi_inode->i_rwsem.owner, (long)task); -+} -+ -+void au_pin_hdir_acquire_nest(struct au_pin *p) -+{ -+ if (p->hdir) { -+ rwsem_acquire_nest(&p->hdir->hi_inode->i_rwsem.dep_map, -+ p->lsc_hi, 0, NULL, _RET_IP_); -+ au_pin_hdir_set_owner(p, current); -+ } -+} -+ -+void au_pin_hdir_release(struct au_pin *p) -+{ -+ if (p->hdir) { -+ au_pin_hdir_set_owner(p, p->task); -+ rwsem_release(&p->hdir->hi_inode->i_rwsem.dep_map, _RET_IP_); -+ } -+} -+ -+struct dentry *au_pinned_h_parent(struct au_pin *pin) -+{ -+ if (pin && pin->parent) -+ return au_h_dptr(pin->parent, pin->bindex); -+ return NULL; -+} -+ -+void au_unpin(struct au_pin *p) -+{ -+ if (p->hdir) -+ au_pin_hdir_unlock(p); -+ if (p->h_mnt && au_ftest_pin(p->flags, MNT_WRITE)) -+ vfsub_mnt_drop_write(p->h_mnt); -+ if (!p->hdir) -+ return; -+ -+ if (!au_ftest_pin(p->flags, DI_LOCKED)) -+ di_read_unlock(p->parent, AuLock_IR); -+ iput(p->hdir->hi_inode); -+ dput(p->parent); -+ p->parent = NULL; -+ p->hdir = NULL; -+ p->h_mnt = NULL; -+ /* do not clear p->task */ -+} -+ -+int au_do_pin(struct au_pin *p) -+{ -+ int err; -+ struct super_block *sb; -+ struct inode *h_dir; -+ -+ err = 0; -+ sb = p->dentry->d_sb; -+ p->br = au_sbr(sb, p->bindex); -+ if (IS_ROOT(p->dentry)) { -+ if (au_ftest_pin(p->flags, MNT_WRITE)) { -+ p->h_mnt = au_br_mnt(p->br); -+ err = vfsub_mnt_want_write(p->h_mnt); -+ if (unlikely(err)) { -+ au_fclr_pin(p->flags, MNT_WRITE); -+ goto out_err; -+ } -+ } -+ goto out; -+ } -+ -+ p->h_dentry = NULL; -+ if (p->bindex <= au_dbbot(p->dentry)) -+ p->h_dentry = au_h_dptr(p->dentry, p->bindex); -+ -+ p->parent = dget_parent(p->dentry); -+ if (!au_ftest_pin(p->flags, DI_LOCKED)) -+ di_read_lock(p->parent, AuLock_IR, p->lsc_di); -+ -+ h_dir = NULL; -+ p->h_parent = au_h_dptr(p->parent, p->bindex); -+ p->hdir = au_hi(d_inode(p->parent), p->bindex); -+ if (p->hdir) -+ h_dir = p->hdir->hi_inode; -+ -+ /* -+ * udba case, or -+ * if DI_LOCKED is not set, then p->parent may be different -+ * and h_parent can be NULL. -+ */ -+ if (unlikely(!p->hdir || !h_dir || !p->h_parent)) { -+ err = -EBUSY; -+ if (!au_ftest_pin(p->flags, DI_LOCKED)) -+ di_read_unlock(p->parent, AuLock_IR); -+ dput(p->parent); -+ p->parent = NULL; -+ goto out_err; -+ } -+ -+ if (au_ftest_pin(p->flags, MNT_WRITE)) { -+ p->h_mnt = au_br_mnt(p->br); -+ err = vfsub_mnt_want_write(p->h_mnt); -+ if (unlikely(err)) { -+ au_fclr_pin(p->flags, MNT_WRITE); -+ if (!au_ftest_pin(p->flags, DI_LOCKED)) -+ di_read_unlock(p->parent, AuLock_IR); -+ dput(p->parent); -+ p->parent = NULL; -+ goto out_err; -+ } -+ } -+ -+ au_igrab(h_dir); -+ err = au_pin_hdir_lock(p); -+ if (!err) -+ goto out; /* success */ -+ -+ au_unpin(p); -+ -+out_err: -+ pr_err("err %d\n", err); -+ err = au_busy_or_stale(); -+out: -+ return err; -+} -+ -+void au_pin_init(struct au_pin *p, struct dentry *dentry, -+ aufs_bindex_t bindex, int lsc_di, int lsc_hi, -+ unsigned int udba, unsigned char flags) -+{ -+ p->dentry = dentry; -+ p->udba = udba; -+ p->lsc_di = lsc_di; -+ p->lsc_hi = lsc_hi; -+ p->flags = flags; -+ p->bindex = bindex; -+ -+ p->parent = NULL; -+ p->hdir = NULL; -+ p->h_mnt = NULL; -+ -+ p->h_dentry = NULL; -+ p->h_parent = NULL; -+ p->br = NULL; -+ p->task = current; -+} -+ -+int au_pin(struct au_pin *pin, struct dentry *dentry, aufs_bindex_t bindex, -+ unsigned int udba, unsigned char flags) -+{ -+ au_pin_init(pin, dentry, bindex, AuLsc_DI_PARENT, AuLsc_I_PARENT2, -+ udba, flags); -+ return au_do_pin(pin); -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* -+ * ->setattr() and ->getattr() are called in various cases. -+ * chmod, stat: dentry is revalidated. -+ * fchmod, fstat: file and dentry are not revalidated, additionally they may be -+ * unhashed. -+ * for ->setattr(), ia->ia_file is passed from ftruncate only. -+ */ -+/* todo: consolidate with do_refresh() and simple_reval_dpath() */ -+int au_reval_for_attr(struct dentry *dentry, unsigned int sigen) -+{ -+ int err; -+ struct dentry *parent; -+ -+ err = 0; -+ if (au_digen_test(dentry, sigen)) { -+ parent = dget_parent(dentry); -+ di_read_lock_parent(parent, AuLock_IR); -+ err = au_refresh_dentry(dentry, parent); -+ di_read_unlock(parent, AuLock_IR); -+ dput(parent); -+ } -+ -+ AuTraceErr(err); -+ return err; -+} -+ -+int au_pin_and_icpup(struct dentry *dentry, struct iattr *ia, -+ struct au_icpup_args *a) -+{ -+ int err; -+ loff_t sz; -+ aufs_bindex_t btop, ibtop; -+ struct dentry *hi_wh, *parent; -+ struct inode *inode; -+ struct au_wr_dir_args wr_dir_args = { -+ .force_btgt = -1, -+ .flags = 0 -+ }; -+ -+ if (d_is_dir(dentry)) -+ au_fset_wrdir(wr_dir_args.flags, ISDIR); -+ /* plink or hi_wh() case */ -+ btop = au_dbtop(dentry); -+ inode = d_inode(dentry); -+ ibtop = au_ibtop(inode); -+ if (btop != ibtop && !au_test_ro(inode->i_sb, ibtop, inode)) -+ wr_dir_args.force_btgt = ibtop; -+ err = au_wr_dir(dentry, /*src_dentry*/NULL, &wr_dir_args); -+ if (unlikely(err < 0)) -+ goto out; -+ a->btgt = err; -+ if (err != btop) -+ au_fset_icpup(a->flags, DID_CPUP); -+ -+ err = 0; -+ a->pin_flags = AuPin_MNT_WRITE; -+ parent = NULL; -+ if (!IS_ROOT(dentry)) { -+ au_fset_pin(a->pin_flags, DI_LOCKED); -+ parent = dget_parent(dentry); -+ di_write_lock_parent(parent); -+ } -+ -+ err = au_pin(&a->pin, dentry, a->btgt, a->udba, a->pin_flags); -+ if (unlikely(err)) -+ goto out_parent; -+ -+ sz = -1; -+ a->h_path.dentry = au_h_dptr(dentry, btop); -+ a->h_inode = d_inode(a->h_path.dentry); -+ if (ia && (ia->ia_valid & ATTR_SIZE)) { -+ inode_lock_shared_nested(a->h_inode, AuLsc_I_CHILD); -+ if (ia->ia_size < i_size_read(a->h_inode)) -+ sz = ia->ia_size; -+ inode_unlock_shared(a->h_inode); -+ } -+ -+ hi_wh = NULL; -+ if (au_ftest_icpup(a->flags, DID_CPUP) && d_unlinked(dentry)) { -+ hi_wh = au_hi_wh(inode, a->btgt); -+ if (!hi_wh) { -+ struct au_cp_generic cpg = { -+ .dentry = dentry, -+ .bdst = a->btgt, -+ .bsrc = -1, -+ .len = sz, -+ .pin = &a->pin -+ }; -+ err = au_sio_cpup_wh(&cpg, /*file*/NULL); -+ if (unlikely(err)) -+ goto out_unlock; -+ hi_wh = au_hi_wh(inode, a->btgt); -+ /* todo: revalidate hi_wh? */ -+ } -+ } -+ -+ if (parent) { -+ au_pin_set_parent_lflag(&a->pin, /*lflag*/0); -+ di_downgrade_lock(parent, AuLock_IR); -+ dput(parent); -+ parent = NULL; -+ } -+ if (!au_ftest_icpup(a->flags, DID_CPUP)) -+ goto out; /* success */ -+ -+ if (!d_unhashed(dentry)) { -+ struct au_cp_generic cpg = { -+ .dentry = dentry, -+ .bdst = a->btgt, -+ .bsrc = btop, -+ .len = sz, -+ .pin = &a->pin, -+ .flags = AuCpup_DTIME | AuCpup_HOPEN -+ }; -+ err = au_sio_cpup_simple(&cpg); -+ if (!err) -+ a->h_path.dentry = au_h_dptr(dentry, a->btgt); -+ } else if (!hi_wh) -+ a->h_path.dentry = au_h_dptr(dentry, a->btgt); -+ else -+ a->h_path.dentry = hi_wh; /* do not dget here */ -+ -+out_unlock: -+ a->h_inode = d_inode(a->h_path.dentry); -+ if (!err) -+ goto out; /* success */ -+ au_unpin(&a->pin); -+out_parent: -+ if (parent) { -+ di_write_unlock(parent); -+ dput(parent); -+ } -+out: -+ if (!err) -+ inode_lock_nested(a->h_inode, AuLsc_I_CHILD); -+ return err; -+} -+ -+static int aufs_setattr(struct dentry *dentry, struct iattr *ia) -+{ -+ int err; -+ struct inode *inode, *delegated; -+ struct super_block *sb; -+ struct file *file; -+ struct au_icpup_args *a; -+ -+ inode = d_inode(dentry); -+ IMustLock(inode); -+ -+ err = setattr_prepare(dentry, ia); -+ if (unlikely(err)) -+ goto out; -+ -+ err = -ENOMEM; -+ a = kzalloc(sizeof(*a), GFP_NOFS); -+ if (unlikely(!a)) -+ goto out; -+ -+ if (ia->ia_valid & (ATTR_KILL_SUID | ATTR_KILL_SGID)) -+ ia->ia_valid &= ~ATTR_MODE; -+ -+ file = NULL; -+ sb = dentry->d_sb; -+ err = si_read_lock(sb, AuLock_FLUSH | AuLock_NOPLM); -+ if (unlikely(err)) -+ goto out_kfree; -+ -+ if (ia->ia_valid & ATTR_FILE) { -+ /* currently ftruncate(2) only */ -+ AuDebugOn(!d_is_reg(dentry)); -+ file = ia->ia_file; -+ err = au_reval_and_lock_fdi(file, au_reopen_nondir, /*wlock*/1, -+ /*fi_lsc*/0); -+ if (unlikely(err)) -+ goto out_si; -+ ia->ia_file = au_hf_top(file); -+ a->udba = AuOpt_UDBA_NONE; -+ } else { -+ /* fchmod() doesn't pass ia_file */ -+ a->udba = au_opt_udba(sb); -+ di_write_lock_child(dentry); -+ /* no d_unlinked(), to set UDBA_NONE for root */ -+ if (d_unhashed(dentry)) -+ a->udba = AuOpt_UDBA_NONE; -+ if (a->udba != AuOpt_UDBA_NONE) { -+ AuDebugOn(IS_ROOT(dentry)); -+ err = au_reval_for_attr(dentry, au_sigen(sb)); -+ if (unlikely(err)) -+ goto out_dentry; -+ } -+ } -+ -+ err = au_pin_and_icpup(dentry, ia, a); -+ if (unlikely(err < 0)) -+ goto out_dentry; -+ if (au_ftest_icpup(a->flags, DID_CPUP)) { -+ ia->ia_file = NULL; -+ ia->ia_valid &= ~ATTR_FILE; -+ } -+ -+ a->h_path.mnt = au_sbr_mnt(sb, a->btgt); -+ if ((ia->ia_valid & (ATTR_MODE | ATTR_CTIME)) -+ == (ATTR_MODE | ATTR_CTIME)) { -+ err = security_path_chmod(&a->h_path, ia->ia_mode); -+ if (unlikely(err)) -+ goto out_unlock; -+ } else if ((ia->ia_valid & (ATTR_UID | ATTR_GID)) -+ && (ia->ia_valid & ATTR_CTIME)) { -+ err = security_path_chown(&a->h_path, ia->ia_uid, ia->ia_gid); -+ if (unlikely(err)) -+ goto out_unlock; -+ } -+ -+ if (ia->ia_valid & ATTR_SIZE) { -+ struct file *f; -+ -+ if (ia->ia_size < i_size_read(inode)) -+ /* unmap only */ -+ truncate_setsize(inode, ia->ia_size); -+ -+ f = NULL; -+ if (ia->ia_valid & ATTR_FILE) -+ f = ia->ia_file; -+ inode_unlock(a->h_inode); -+ err = vfsub_trunc(&a->h_path, ia->ia_size, ia->ia_valid, f); -+ inode_lock_nested(a->h_inode, AuLsc_I_CHILD); -+ } else { -+ delegated = NULL; -+ while (1) { -+ err = vfsub_notify_change(&a->h_path, ia, &delegated); -+ if (delegated) { -+ err = break_deleg_wait(&delegated); -+ if (!err) -+ continue; -+ } -+ break; -+ } -+ } -+ /* -+ * regardless aufs 'acl' option setting. -+ * why don't all acl-aware fs call this func from their ->setattr()? -+ */ -+ if (!err && (ia->ia_valid & ATTR_MODE)) -+ err = vfsub_acl_chmod(a->h_inode, ia->ia_mode); -+ if (!err) -+ au_cpup_attr_changeable(inode); -+ -+out_unlock: -+ inode_unlock(a->h_inode); -+ au_unpin(&a->pin); -+ if (unlikely(err)) -+ au_update_dbtop(dentry); -+out_dentry: -+ di_write_unlock(dentry); -+ if (file) { -+ fi_write_unlock(file); -+ ia->ia_file = file; -+ ia->ia_valid |= ATTR_FILE; -+ } -+out_si: -+ si_read_unlock(sb); -+out_kfree: -+ au_kfree_rcu(a); -+out: -+ AuTraceErr(err); -+ return err; -+} -+ -+#if IS_ENABLED(CONFIG_AUFS_XATTR) || IS_ENABLED(CONFIG_FS_POSIX_ACL) -+static int au_h_path_to_set_attr(struct dentry *dentry, -+ struct au_icpup_args *a, struct path *h_path) -+{ -+ int err; -+ struct super_block *sb; -+ -+ sb = dentry->d_sb; -+ a->udba = au_opt_udba(sb); -+ /* no d_unlinked(), to set UDBA_NONE for root */ -+ if (d_unhashed(dentry)) -+ a->udba = AuOpt_UDBA_NONE; -+ if (a->udba != AuOpt_UDBA_NONE) { -+ AuDebugOn(IS_ROOT(dentry)); -+ err = au_reval_for_attr(dentry, au_sigen(sb)); -+ if (unlikely(err)) -+ goto out; -+ } -+ err = au_pin_and_icpup(dentry, /*ia*/NULL, a); -+ if (unlikely(err < 0)) -+ goto out; -+ -+ h_path->dentry = a->h_path.dentry; -+ h_path->mnt = au_sbr_mnt(sb, a->btgt); -+ -+out: -+ return err; -+} -+ -+ssize_t au_sxattr(struct dentry *dentry, struct inode *inode, -+ struct au_sxattr *arg) -+{ -+ int err; -+ struct path h_path; -+ struct super_block *sb; -+ struct au_icpup_args *a; -+ struct inode *h_inode; -+ -+ IMustLock(inode); -+ -+ err = -ENOMEM; -+ a = kzalloc(sizeof(*a), GFP_NOFS); -+ if (unlikely(!a)) -+ goto out; -+ -+ sb = dentry->d_sb; -+ err = si_read_lock(sb, AuLock_FLUSH | AuLock_NOPLM); -+ if (unlikely(err)) -+ goto out_kfree; -+ -+ h_path.dentry = NULL; /* silence gcc */ -+ di_write_lock_child(dentry); -+ err = au_h_path_to_set_attr(dentry, a, &h_path); -+ if (unlikely(err)) -+ goto out_di; -+ -+ inode_unlock(a->h_inode); -+ switch (arg->type) { -+ case AU_XATTR_SET: -+ AuDebugOn(d_is_negative(h_path.dentry)); -+ err = vfsub_setxattr(h_path.dentry, -+ arg->u.set.name, arg->u.set.value, -+ arg->u.set.size, arg->u.set.flags); -+ break; -+ case AU_ACL_SET: -+ err = -EOPNOTSUPP; -+ h_inode = d_inode(h_path.dentry); -+ if (h_inode->i_op->set_acl) -+ /* this will call posix_acl_update_mode */ -+ err = h_inode->i_op->set_acl(h_inode, -+ arg->u.acl_set.acl, -+ arg->u.acl_set.type); -+ break; -+ } -+ if (!err) -+ au_cpup_attr_timesizes(inode); -+ -+ au_unpin(&a->pin); -+ if (unlikely(err)) -+ au_update_dbtop(dentry); -+ -+out_di: -+ di_write_unlock(dentry); -+ si_read_unlock(sb); -+out_kfree: -+ au_kfree_rcu(a); -+out: -+ AuTraceErr(err); -+ return err; -+} -+#endif -+ -+static void au_refresh_iattr(struct inode *inode, struct kstat *st, -+ unsigned int nlink) -+{ -+ unsigned int n; -+ -+ inode->i_mode = st->mode; -+ /* don't i_[ug]id_write() here */ -+ inode->i_uid = st->uid; -+ inode->i_gid = st->gid; -+ inode->i_atime = st->atime; -+ inode->i_mtime = st->mtime; -+ inode->i_ctime = st->ctime; -+ -+ au_cpup_attr_nlink(inode, /*force*/0); -+ if (S_ISDIR(inode->i_mode)) { -+ n = inode->i_nlink; -+ n -= nlink; -+ n += st->nlink; -+ smp_mb(); /* for i_nlink */ -+ /* 0 can happen */ -+ set_nlink(inode, n); -+ } -+ -+ spin_lock(&inode->i_lock); -+ inode->i_blocks = st->blocks; -+ i_size_write(inode, st->size); -+ spin_unlock(&inode->i_lock); -+} -+ -+/* -+ * common routine for aufs_getattr() and au_getxattr(). -+ * returns zero or negative (an error). -+ * @dentry will be read-locked in success. -+ */ -+int au_h_path_getattr(struct dentry *dentry, struct inode *inode, int force, -+ struct path *h_path, int locked) -+{ -+ int err; -+ unsigned int mnt_flags, sigen; -+ unsigned char udba_none; -+ aufs_bindex_t bindex; -+ struct super_block *sb, *h_sb; -+ -+ h_path->mnt = NULL; -+ h_path->dentry = NULL; -+ -+ err = 0; -+ sb = dentry->d_sb; -+ mnt_flags = au_mntflags(sb); -+ udba_none = !!au_opt_test(mnt_flags, UDBA_NONE); -+ -+ if (unlikely(locked)) -+ goto body; /* skip locking dinfo */ -+ -+ /* support fstat(2) */ -+ if (!d_unlinked(dentry) && !udba_none) { -+ sigen = au_sigen(sb); -+ err = au_digen_test(dentry, sigen); -+ if (!err) { -+ di_read_lock_child(dentry, AuLock_IR); -+ err = au_dbrange_test(dentry); -+ if (unlikely(err)) { -+ di_read_unlock(dentry, AuLock_IR); -+ goto out; -+ } -+ } else { -+ AuDebugOn(IS_ROOT(dentry)); -+ di_write_lock_child(dentry); -+ err = au_dbrange_test(dentry); -+ if (!err) -+ err = au_reval_for_attr(dentry, sigen); -+ if (!err) -+ di_downgrade_lock(dentry, AuLock_IR); -+ else { -+ di_write_unlock(dentry); -+ goto out; -+ } -+ } -+ } else -+ di_read_lock_child(dentry, AuLock_IR); -+ -+body: -+ if (!inode) { -+ inode = d_inode(dentry); -+ if (unlikely(!inode)) -+ goto out; -+ } -+ bindex = au_ibtop(inode); -+ h_path->mnt = au_sbr_mnt(sb, bindex); -+ h_sb = h_path->mnt->mnt_sb; -+ if (!force -+ && !au_test_fs_bad_iattr(h_sb) -+ && udba_none) -+ goto out; /* success */ -+ -+ if (au_dbtop(dentry) == bindex) -+ h_path->dentry = au_h_dptr(dentry, bindex); -+ else if (au_opt_test(mnt_flags, PLINK) && au_plink_test(inode)) { -+ h_path->dentry = au_plink_lkup(inode, bindex); -+ if (IS_ERR(h_path->dentry)) -+ /* pretending success */ -+ h_path->dentry = NULL; -+ else -+ dput(h_path->dentry); -+ } -+ -+out: -+ return err; -+} -+ -+static int aufs_getattr(const struct path *path, struct kstat *st, -+ u32 request, unsigned int query) -+{ -+ int err; -+ unsigned char positive; -+ struct path h_path; -+ struct dentry *dentry; -+ struct inode *inode; -+ struct super_block *sb; -+ -+ dentry = path->dentry; -+ inode = d_inode(dentry); -+ sb = dentry->d_sb; -+ err = si_read_lock(sb, AuLock_FLUSH | AuLock_NOPLM); -+ if (unlikely(err)) -+ goto out; -+ err = au_h_path_getattr(dentry, /*inode*/NULL, /*force*/0, &h_path, -+ /*locked*/0); -+ if (unlikely(err)) -+ goto out_si; -+ if (unlikely(!h_path.dentry)) -+ /* illegally overlapped or something */ -+ goto out_fill; /* pretending success */ -+ -+ positive = d_is_positive(h_path.dentry); -+ if (positive) -+ /* no vfsub version */ -+ err = vfs_getattr(&h_path, st, request, query); -+ if (!err) { -+ if (positive) -+ au_refresh_iattr(inode, st, -+ d_inode(h_path.dentry)->i_nlink); -+ goto out_fill; /* success */ -+ } -+ AuTraceErr(err); -+ goto out_di; -+ -+out_fill: -+ generic_fillattr(inode, st); -+out_di: -+ di_read_unlock(dentry, AuLock_IR); -+out_si: -+ si_read_unlock(sb); -+out: -+ AuTraceErr(err); -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+static const char *aufs_get_link(struct dentry *dentry, struct inode *inode, -+ struct delayed_call *done) -+{ -+ const char *ret; -+ struct dentry *h_dentry; -+ struct inode *h_inode; -+ int err; -+ aufs_bindex_t bindex; -+ -+ ret = NULL; /* suppress a warning */ -+ err = -ECHILD; -+ if (!dentry) -+ goto out; -+ -+ err = aufs_read_lock(dentry, AuLock_IR | AuLock_GEN); -+ if (unlikely(err)) -+ goto out; -+ -+ err = au_d_hashed_positive(dentry); -+ if (unlikely(err)) -+ goto out_unlock; -+ -+ err = -EINVAL; -+ inode = d_inode(dentry); -+ bindex = au_ibtop(inode); -+ h_inode = au_h_iptr(inode, bindex); -+ if (unlikely(!h_inode->i_op->get_link)) -+ goto out_unlock; -+ -+ err = -EBUSY; -+ h_dentry = NULL; -+ if (au_dbtop(dentry) <= bindex) { -+ h_dentry = au_h_dptr(dentry, bindex); -+ if (h_dentry) -+ dget(h_dentry); -+ } -+ if (!h_dentry) { -+ h_dentry = d_find_any_alias(h_inode); -+ if (IS_ERR(h_dentry)) { -+ err = PTR_ERR(h_dentry); -+ goto out_unlock; -+ } -+ } -+ if (unlikely(!h_dentry)) -+ goto out_unlock; -+ -+ err = 0; -+ AuDbg("%ps\n", h_inode->i_op->get_link); -+ AuDbgDentry(h_dentry); -+ ret = vfs_get_link(h_dentry, done); -+ dput(h_dentry); -+ if (IS_ERR(ret)) -+ err = PTR_ERR(ret); -+ -+out_unlock: -+ aufs_read_unlock(dentry, AuLock_IR); -+out: -+ if (unlikely(err)) -+ ret = ERR_PTR(err); -+ AuTraceErrPtr(ret); -+ return ret; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+static int au_is_special(struct inode *inode) -+{ -+ return (inode->i_mode & (S_IFBLK | S_IFCHR | S_IFIFO | S_IFSOCK)); -+} -+ -+static int aufs_update_time(struct inode *inode, struct timespec64 *ts, -+ int flags) -+{ -+ int err; -+ aufs_bindex_t bindex; -+ struct super_block *sb; -+ struct inode *h_inode; -+ struct vfsmount *h_mnt; -+ -+ sb = inode->i_sb; -+ WARN_ONCE((flags & S_ATIME) && !IS_NOATIME(inode), -+ "unexpected s_flags 0x%lx", sb->s_flags); -+ -+ /* mmap_sem might be acquired already, cf. aufs_mmap() */ -+ lockdep_off(); -+ si_read_lock(sb, AuLock_FLUSH); -+ ii_write_lock_child(inode); -+ -+ err = 0; -+ bindex = au_ibtop(inode); -+ h_inode = au_h_iptr(inode, bindex); -+ if (!au_test_ro(sb, bindex, inode)) { -+ h_mnt = au_sbr_mnt(sb, bindex); -+ err = vfsub_mnt_want_write(h_mnt); -+ if (!err) { -+ err = vfsub_update_time(h_inode, ts, flags); -+ vfsub_mnt_drop_write(h_mnt); -+ } -+ } else if (au_is_special(h_inode)) { -+ /* -+ * Never copy-up here. -+ * These special files may already be opened and used for -+ * communicating. If we copied it up, then the communication -+ * would be corrupted. -+ */ -+ AuWarn1("timestamps for i%lu are ignored " -+ "since it is on readonly branch (hi%lu).\n", -+ inode->i_ino, h_inode->i_ino); -+ } else if (flags & ~S_ATIME) { -+ err = -EIO; -+ AuIOErr1("unexpected flags 0x%x\n", flags); -+ AuDebugOn(1); -+ } -+ -+ if (!err) -+ au_cpup_attr_timesizes(inode); -+ ii_write_unlock(inode); -+ si_read_unlock(sb); -+ lockdep_on(); -+ -+ if (!err && (flags & S_VERSION)) -+ inode_inc_iversion(inode); -+ -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* no getattr version will be set by module.c:aufs_init() */ -+struct inode_operations aufs_iop_nogetattr[AuIop_Last], -+ aufs_iop[] = { -+ [AuIop_SYMLINK] = { -+ .permission = aufs_permission, -+#ifdef CONFIG_FS_POSIX_ACL -+ .get_acl = aufs_get_acl, -+ .set_acl = aufs_set_acl, /* unsupport for symlink? */ -+#endif -+ -+ .setattr = aufs_setattr, -+ .getattr = aufs_getattr, -+ -+#ifdef CONFIG_AUFS_XATTR -+ .listxattr = aufs_listxattr, -+#endif -+ -+ .get_link = aufs_get_link, -+ -+ /* .update_time = aufs_update_time */ -+ }, -+ [AuIop_DIR] = { -+ .create = aufs_create, -+ .lookup = aufs_lookup, -+ .link = aufs_link, -+ .unlink = aufs_unlink, -+ .symlink = aufs_symlink, -+ .mkdir = aufs_mkdir, -+ .rmdir = aufs_rmdir, -+ .mknod = aufs_mknod, -+ .rename = aufs_rename, -+ -+ .permission = aufs_permission, -+#ifdef CONFIG_FS_POSIX_ACL -+ .get_acl = aufs_get_acl, -+ .set_acl = aufs_set_acl, -+#endif -+ -+ .setattr = aufs_setattr, -+ .getattr = aufs_getattr, -+ -+#ifdef CONFIG_AUFS_XATTR -+ .listxattr = aufs_listxattr, -+#endif -+ -+ .update_time = aufs_update_time, -+ .atomic_open = aufs_atomic_open, -+ .tmpfile = aufs_tmpfile -+ }, -+ [AuIop_OTHER] = { -+ .permission = aufs_permission, -+#ifdef CONFIG_FS_POSIX_ACL -+ .get_acl = aufs_get_acl, -+ .set_acl = aufs_set_acl, -+#endif -+ -+ .setattr = aufs_setattr, -+ .getattr = aufs_getattr, -+ -+#ifdef CONFIG_AUFS_XATTR -+ .listxattr = aufs_listxattr, -+#endif -+ -+ .update_time = aufs_update_time -+ } -+}; -diff --git a/fs/aufs/i_op_add.c b/fs/aufs/i_op_add.c -new file mode 100644 -index 000000000000..853c99e200da ---- /dev/null -+++ b/fs/aufs/i_op_add.c -@@ -0,0 +1,923 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * inode operations (add entry) -+ */ -+ -+#include -+#include "aufs.h" -+ -+/* -+ * final procedure of adding a new entry, except link(2). -+ * remove whiteout, instantiate, copyup the parent dir's times and size -+ * and update version. -+ * if it failed, re-create the removed whiteout. -+ */ -+static int epilog(struct inode *dir, aufs_bindex_t bindex, -+ struct dentry *wh_dentry, struct dentry *dentry) -+{ -+ int err, rerr; -+ aufs_bindex_t bwh; -+ struct path h_path; -+ struct super_block *sb; -+ struct inode *inode, *h_dir; -+ struct dentry *wh; -+ -+ bwh = -1; -+ sb = dir->i_sb; -+ if (wh_dentry) { -+ h_dir = d_inode(wh_dentry->d_parent); /* dir inode is locked */ -+ IMustLock(h_dir); -+ AuDebugOn(au_h_iptr(dir, bindex) != h_dir); -+ bwh = au_dbwh(dentry); -+ h_path.dentry = wh_dentry; -+ h_path.mnt = au_sbr_mnt(sb, bindex); -+ err = au_wh_unlink_dentry(au_h_iptr(dir, bindex), &h_path, -+ dentry); -+ if (unlikely(err)) -+ goto out; -+ } -+ -+ inode = au_new_inode(dentry, /*must_new*/1); -+ if (!IS_ERR(inode)) { -+ d_instantiate(dentry, inode); -+ dir = d_inode(dentry->d_parent); /* dir inode is locked */ -+ IMustLock(dir); -+ au_dir_ts(dir, bindex); -+ inode_inc_iversion(dir); -+ au_fhsm_wrote(sb, bindex, /*force*/0); -+ return 0; /* success */ -+ } -+ -+ err = PTR_ERR(inode); -+ if (!wh_dentry) -+ goto out; -+ -+ /* revert */ -+ /* dir inode is locked */ -+ wh = au_wh_create(dentry, bwh, wh_dentry->d_parent); -+ rerr = PTR_ERR(wh); -+ if (IS_ERR(wh)) { -+ AuIOErr("%pd reverting whiteout failed(%d, %d)\n", -+ dentry, err, rerr); -+ err = -EIO; -+ } else -+ dput(wh); -+ -+out: -+ return err; -+} -+ -+static int au_d_may_add(struct dentry *dentry) -+{ -+ int err; -+ -+ err = 0; -+ if (unlikely(d_unhashed(dentry))) -+ err = -ENOENT; -+ if (unlikely(d_really_is_positive(dentry))) -+ err = -EEXIST; -+ return err; -+} -+ -+/* -+ * simple tests for the adding inode operations. -+ * following the checks in vfs, plus the parent-child relationship. -+ */ -+int au_may_add(struct dentry *dentry, aufs_bindex_t bindex, -+ struct dentry *h_parent, int isdir) -+{ -+ int err; -+ umode_t h_mode; -+ struct dentry *h_dentry; -+ struct inode *h_inode; -+ -+ err = -ENAMETOOLONG; -+ if (unlikely(dentry->d_name.len > AUFS_MAX_NAMELEN)) -+ goto out; -+ -+ h_dentry = au_h_dptr(dentry, bindex); -+ if (d_really_is_negative(dentry)) { -+ err = -EEXIST; -+ if (unlikely(d_is_positive(h_dentry))) -+ goto out; -+ } else { -+ /* rename(2) case */ -+ err = -EIO; -+ if (unlikely(d_is_negative(h_dentry))) -+ goto out; -+ h_inode = d_inode(h_dentry); -+ if (unlikely(!h_inode->i_nlink)) -+ goto out; -+ -+ h_mode = h_inode->i_mode; -+ if (!isdir) { -+ err = -EISDIR; -+ if (unlikely(S_ISDIR(h_mode))) -+ goto out; -+ } else if (unlikely(!S_ISDIR(h_mode))) { -+ err = -ENOTDIR; -+ goto out; -+ } -+ } -+ -+ err = 0; -+ /* expected parent dir is locked */ -+ if (unlikely(h_parent != h_dentry->d_parent)) -+ err = -EIO; -+ -+out: -+ AuTraceErr(err); -+ return err; -+} -+ -+/* -+ * initial procedure of adding a new entry. -+ * prepare writable branch and the parent dir, lock it, -+ * and lookup whiteout for the new entry. -+ */ -+static struct dentry* -+lock_hdir_lkup_wh(struct dentry *dentry, struct au_dtime *dt, -+ struct dentry *src_dentry, struct au_pin *pin, -+ struct au_wr_dir_args *wr_dir_args) -+{ -+ struct dentry *wh_dentry, *h_parent; -+ struct super_block *sb; -+ struct au_branch *br; -+ int err; -+ unsigned int udba; -+ aufs_bindex_t bcpup; -+ -+ AuDbg("%pd\n", dentry); -+ -+ err = au_wr_dir(dentry, src_dentry, wr_dir_args); -+ bcpup = err; -+ wh_dentry = ERR_PTR(err); -+ if (unlikely(err < 0)) -+ goto out; -+ -+ sb = dentry->d_sb; -+ udba = au_opt_udba(sb); -+ err = au_pin(pin, dentry, bcpup, udba, -+ AuPin_DI_LOCKED | AuPin_MNT_WRITE); -+ wh_dentry = ERR_PTR(err); -+ if (unlikely(err)) -+ goto out; -+ -+ h_parent = au_pinned_h_parent(pin); -+ if (udba != AuOpt_UDBA_NONE -+ && au_dbtop(dentry) == bcpup) -+ err = au_may_add(dentry, bcpup, h_parent, -+ au_ftest_wrdir(wr_dir_args->flags, ISDIR)); -+ else if (unlikely(dentry->d_name.len > AUFS_MAX_NAMELEN)) -+ err = -ENAMETOOLONG; -+ wh_dentry = ERR_PTR(err); -+ if (unlikely(err)) -+ goto out_unpin; -+ -+ br = au_sbr(sb, bcpup); -+ if (dt) { -+ struct path tmp = { -+ .dentry = h_parent, -+ .mnt = au_br_mnt(br) -+ }; -+ au_dtime_store(dt, au_pinned_parent(pin), &tmp); -+ } -+ -+ wh_dentry = NULL; -+ if (bcpup != au_dbwh(dentry)) -+ goto out; /* success */ -+ -+ /* -+ * ENAMETOOLONG here means that if we allowed create such name, then it -+ * would not be able to removed in the future. So we don't allow such -+ * name here and we don't handle ENAMETOOLONG differently here. -+ */ -+ wh_dentry = au_wh_lkup(h_parent, &dentry->d_name, br); -+ -+out_unpin: -+ if (IS_ERR(wh_dentry)) -+ au_unpin(pin); -+out: -+ return wh_dentry; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+enum { Mknod, Symlink, Creat }; -+struct simple_arg { -+ int type; -+ union { -+ struct { -+ umode_t mode; -+ bool want_excl; -+ bool try_aopen; -+ struct vfsub_aopen_args *aopen; -+ } c; -+ struct { -+ const char *symname; -+ } s; -+ struct { -+ umode_t mode; -+ dev_t dev; -+ } m; -+ } u; -+}; -+ -+static int add_simple(struct inode *dir, struct dentry *dentry, -+ struct simple_arg *arg) -+{ -+ int err, rerr; -+ aufs_bindex_t btop; -+ unsigned char created; -+ const unsigned char try_aopen -+ = (arg->type == Creat && arg->u.c.try_aopen); -+ struct vfsub_aopen_args *aopen = arg->u.c.aopen; -+ struct dentry *wh_dentry, *parent; -+ struct inode *h_dir; -+ struct super_block *sb; -+ struct au_branch *br; -+ /* to reduce stack size */ -+ struct { -+ struct au_dtime dt; -+ struct au_pin pin; -+ struct path h_path; -+ struct au_wr_dir_args wr_dir_args; -+ } *a; -+ -+ AuDbg("%pd\n", dentry); -+ IMustLock(dir); -+ -+ err = -ENOMEM; -+ a = kmalloc(sizeof(*a), GFP_NOFS); -+ if (unlikely(!a)) -+ goto out; -+ a->wr_dir_args.force_btgt = -1; -+ a->wr_dir_args.flags = AuWrDir_ADD_ENTRY; -+ -+ parent = dentry->d_parent; /* dir inode is locked */ -+ if (!try_aopen) { -+ err = aufs_read_lock(dentry, AuLock_DW | AuLock_GEN); -+ if (unlikely(err)) -+ goto out_free; -+ } -+ err = au_d_may_add(dentry); -+ if (unlikely(err)) -+ goto out_unlock; -+ if (!try_aopen) -+ di_write_lock_parent(parent); -+ wh_dentry = lock_hdir_lkup_wh(dentry, &a->dt, /*src_dentry*/NULL, -+ &a->pin, &a->wr_dir_args); -+ err = PTR_ERR(wh_dentry); -+ if (IS_ERR(wh_dentry)) -+ goto out_parent; -+ -+ btop = au_dbtop(dentry); -+ sb = dentry->d_sb; -+ br = au_sbr(sb, btop); -+ a->h_path.dentry = au_h_dptr(dentry, btop); -+ a->h_path.mnt = au_br_mnt(br); -+ h_dir = au_pinned_h_dir(&a->pin); -+ switch (arg->type) { -+ case Creat: -+ if (!try_aopen || !h_dir->i_op->atomic_open) { -+ err = vfsub_create(h_dir, &a->h_path, arg->u.c.mode, -+ arg->u.c.want_excl); -+ created = !err; -+ if (!err && try_aopen) -+ aopen->file->f_mode |= FMODE_CREATED; -+ } else { -+ aopen->br = br; -+ err = vfsub_atomic_open(h_dir, a->h_path.dentry, aopen); -+ AuDbg("err %d\n", err); -+ AuDbgFile(aopen->file); -+ created = err >= 0 -+ && !!(aopen->file->f_mode & FMODE_CREATED); -+ } -+ break; -+ case Symlink: -+ err = vfsub_symlink(h_dir, &a->h_path, arg->u.s.symname); -+ created = !err; -+ break; -+ case Mknod: -+ err = vfsub_mknod(h_dir, &a->h_path, arg->u.m.mode, -+ arg->u.m.dev); -+ created = !err; -+ break; -+ default: -+ BUG(); -+ } -+ if (unlikely(err < 0)) -+ goto out_unpin; -+ -+ err = epilog(dir, btop, wh_dentry, dentry); -+ if (!err) -+ goto out_unpin; /* success */ -+ -+ /* revert */ -+ if (created /* && d_is_positive(a->h_path.dentry) */) { -+ /* no delegation since it is just created */ -+ rerr = vfsub_unlink(h_dir, &a->h_path, /*delegated*/NULL, -+ /*force*/0); -+ if (rerr) { -+ AuIOErr("%pd revert failure(%d, %d)\n", -+ dentry, err, rerr); -+ err = -EIO; -+ } -+ au_dtime_revert(&a->dt); -+ } -+ if (try_aopen && h_dir->i_op->atomic_open -+ && (aopen->file->f_mode & FMODE_OPENED)) -+ /* aopen->file is still opened */ -+ au_lcnt_dec(&aopen->br->br_nfiles); -+ -+out_unpin: -+ au_unpin(&a->pin); -+ dput(wh_dentry); -+out_parent: -+ if (!try_aopen) -+ di_write_unlock(parent); -+out_unlock: -+ if (unlikely(err)) { -+ au_update_dbtop(dentry); -+ d_drop(dentry); -+ } -+ if (!try_aopen) -+ aufs_read_unlock(dentry, AuLock_DW); -+out_free: -+ au_kfree_rcu(a); -+out: -+ return err; -+} -+ -+int aufs_mknod(struct inode *dir, struct dentry *dentry, umode_t mode, -+ dev_t dev) -+{ -+ struct simple_arg arg = { -+ .type = Mknod, -+ .u.m = { -+ .mode = mode, -+ .dev = dev -+ } -+ }; -+ return add_simple(dir, dentry, &arg); -+} -+ -+int aufs_symlink(struct inode *dir, struct dentry *dentry, const char *symname) -+{ -+ struct simple_arg arg = { -+ .type = Symlink, -+ .u.s.symname = symname -+ }; -+ return add_simple(dir, dentry, &arg); -+} -+ -+int aufs_create(struct inode *dir, struct dentry *dentry, umode_t mode, -+ bool want_excl) -+{ -+ struct simple_arg arg = { -+ .type = Creat, -+ .u.c = { -+ .mode = mode, -+ .want_excl = want_excl -+ } -+ }; -+ return add_simple(dir, dentry, &arg); -+} -+ -+int au_aopen_or_create(struct inode *dir, struct dentry *dentry, -+ struct vfsub_aopen_args *aopen_args) -+{ -+ struct simple_arg arg = { -+ .type = Creat, -+ .u.c = { -+ .mode = aopen_args->create_mode, -+ .want_excl = aopen_args->open_flag & O_EXCL, -+ .try_aopen = true, -+ .aopen = aopen_args -+ } -+ }; -+ return add_simple(dir, dentry, &arg); -+} -+ -+int aufs_tmpfile(struct inode *dir, struct dentry *dentry, umode_t mode) -+{ -+ int err; -+ aufs_bindex_t bindex; -+ struct super_block *sb; -+ struct dentry *parent, *h_parent, *h_dentry; -+ struct inode *h_dir, *inode; -+ struct vfsmount *h_mnt; -+ struct au_wr_dir_args wr_dir_args = { -+ .force_btgt = -1, -+ .flags = AuWrDir_TMPFILE -+ }; -+ -+ /* copy-up may happen */ -+ inode_lock(dir); -+ -+ sb = dir->i_sb; -+ err = si_read_lock(sb, AuLock_FLUSH | AuLock_NOPLM); -+ if (unlikely(err)) -+ goto out; -+ -+ err = au_di_init(dentry); -+ if (unlikely(err)) -+ goto out_si; -+ -+ err = -EBUSY; -+ parent = d_find_any_alias(dir); -+ AuDebugOn(!parent); -+ di_write_lock_parent(parent); -+ if (unlikely(d_inode(parent) != dir)) -+ goto out_parent; -+ -+ err = au_digen_test(parent, au_sigen(sb)); -+ if (unlikely(err)) -+ goto out_parent; -+ -+ bindex = au_dbtop(parent); -+ au_set_dbtop(dentry, bindex); -+ au_set_dbbot(dentry, bindex); -+ err = au_wr_dir(dentry, /*src_dentry*/NULL, &wr_dir_args); -+ bindex = err; -+ if (unlikely(err < 0)) -+ goto out_parent; -+ -+ err = -EOPNOTSUPP; -+ h_dir = au_h_iptr(dir, bindex); -+ if (unlikely(!h_dir->i_op->tmpfile)) -+ goto out_parent; -+ -+ h_mnt = au_sbr_mnt(sb, bindex); -+ err = vfsub_mnt_want_write(h_mnt); -+ if (unlikely(err)) -+ goto out_parent; -+ -+ h_parent = au_h_dptr(parent, bindex); -+ h_dentry = vfs_tmpfile(h_parent, mode, /*open_flag*/0); -+ if (IS_ERR(h_dentry)) { -+ err = PTR_ERR(h_dentry); -+ goto out_mnt; -+ } -+ -+ au_set_dbtop(dentry, bindex); -+ au_set_dbbot(dentry, bindex); -+ au_set_h_dptr(dentry, bindex, dget(h_dentry)); -+ inode = au_new_inode(dentry, /*must_new*/1); -+ if (IS_ERR(inode)) { -+ err = PTR_ERR(inode); -+ au_set_h_dptr(dentry, bindex, NULL); -+ au_set_dbtop(dentry, -1); -+ au_set_dbbot(dentry, -1); -+ } else { -+ if (!inode->i_nlink) -+ set_nlink(inode, 1); -+ d_tmpfile(dentry, inode); -+ au_di(dentry)->di_tmpfile = 1; -+ -+ /* update without i_mutex */ -+ if (au_ibtop(dir) == au_dbtop(dentry)) -+ au_cpup_attr_timesizes(dir); -+ } -+ dput(h_dentry); -+ -+out_mnt: -+ vfsub_mnt_drop_write(h_mnt); -+out_parent: -+ di_write_unlock(parent); -+ dput(parent); -+ di_write_unlock(dentry); -+ if (unlikely(err)) { -+ au_di_fin(dentry); -+ dentry->d_fsdata = NULL; -+ } -+out_si: -+ si_read_unlock(sb); -+out: -+ inode_unlock(dir); -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+struct au_link_args { -+ aufs_bindex_t bdst, bsrc; -+ struct au_pin pin; -+ struct path h_path; -+ struct dentry *src_parent, *parent; -+}; -+ -+static int au_cpup_before_link(struct dentry *src_dentry, -+ struct au_link_args *a) -+{ -+ int err; -+ struct dentry *h_src_dentry; -+ struct au_cp_generic cpg = { -+ .dentry = src_dentry, -+ .bdst = a->bdst, -+ .bsrc = a->bsrc, -+ .len = -1, -+ .pin = &a->pin, -+ .flags = AuCpup_DTIME | AuCpup_HOPEN /* | AuCpup_KEEPLINO */ -+ }; -+ -+ di_read_lock_parent(a->src_parent, AuLock_IR); -+ err = au_test_and_cpup_dirs(src_dentry, a->bdst); -+ if (unlikely(err)) -+ goto out; -+ -+ h_src_dentry = au_h_dptr(src_dentry, a->bsrc); -+ err = au_pin(&a->pin, src_dentry, a->bdst, -+ au_opt_udba(src_dentry->d_sb), -+ AuPin_DI_LOCKED | AuPin_MNT_WRITE); -+ if (unlikely(err)) -+ goto out; -+ -+ err = au_sio_cpup_simple(&cpg); -+ au_unpin(&a->pin); -+ -+out: -+ di_read_unlock(a->src_parent, AuLock_IR); -+ return err; -+} -+ -+static int au_cpup_or_link(struct dentry *src_dentry, struct dentry *dentry, -+ struct au_link_args *a) -+{ -+ int err; -+ unsigned char plink; -+ aufs_bindex_t bbot; -+ struct dentry *h_src_dentry; -+ struct inode *h_inode, *inode, *delegated; -+ struct super_block *sb; -+ struct file *h_file; -+ -+ plink = 0; -+ h_inode = NULL; -+ sb = src_dentry->d_sb; -+ inode = d_inode(src_dentry); -+ if (au_ibtop(inode) <= a->bdst) -+ h_inode = au_h_iptr(inode, a->bdst); -+ if (!h_inode || !h_inode->i_nlink) { -+ /* copyup src_dentry as the name of dentry. */ -+ bbot = au_dbbot(dentry); -+ if (bbot < a->bsrc) -+ au_set_dbbot(dentry, a->bsrc); -+ au_set_h_dptr(dentry, a->bsrc, -+ dget(au_h_dptr(src_dentry, a->bsrc))); -+ dget(a->h_path.dentry); -+ au_set_h_dptr(dentry, a->bdst, NULL); -+ AuDbg("temporary d_inode...\n"); -+ spin_lock(&dentry->d_lock); -+ dentry->d_inode = d_inode(src_dentry); /* tmp */ -+ spin_unlock(&dentry->d_lock); -+ h_file = au_h_open_pre(dentry, a->bsrc, /*force_wr*/0); -+ if (IS_ERR(h_file)) -+ err = PTR_ERR(h_file); -+ else { -+ struct au_cp_generic cpg = { -+ .dentry = dentry, -+ .bdst = a->bdst, -+ .bsrc = -1, -+ .len = -1, -+ .pin = &a->pin, -+ .flags = AuCpup_KEEPLINO -+ }; -+ err = au_sio_cpup_simple(&cpg); -+ au_h_open_post(dentry, a->bsrc, h_file); -+ if (!err) { -+ dput(a->h_path.dentry); -+ a->h_path.dentry = au_h_dptr(dentry, a->bdst); -+ } else -+ au_set_h_dptr(dentry, a->bdst, -+ a->h_path.dentry); -+ } -+ spin_lock(&dentry->d_lock); -+ dentry->d_inode = NULL; /* restore */ -+ spin_unlock(&dentry->d_lock); -+ AuDbg("temporary d_inode...done\n"); -+ au_set_h_dptr(dentry, a->bsrc, NULL); -+ au_set_dbbot(dentry, bbot); -+ } else { -+ /* the inode of src_dentry already exists on a.bdst branch */ -+ h_src_dentry = d_find_alias(h_inode); -+ if (!h_src_dentry && au_plink_test(inode)) { -+ plink = 1; -+ h_src_dentry = au_plink_lkup(inode, a->bdst); -+ err = PTR_ERR(h_src_dentry); -+ if (IS_ERR(h_src_dentry)) -+ goto out; -+ -+ if (unlikely(d_is_negative(h_src_dentry))) { -+ dput(h_src_dentry); -+ h_src_dentry = NULL; -+ } -+ -+ } -+ if (h_src_dentry) { -+ delegated = NULL; -+ err = vfsub_link(h_src_dentry, au_pinned_h_dir(&a->pin), -+ &a->h_path, &delegated); -+ if (unlikely(err == -EWOULDBLOCK)) { -+ pr_warn("cannot retry for NFSv4 delegation" -+ " for an internal link\n"); -+ iput(delegated); -+ } -+ dput(h_src_dentry); -+ } else { -+ AuIOErr("no dentry found for hi%lu on b%d\n", -+ h_inode->i_ino, a->bdst); -+ err = -EIO; -+ } -+ } -+ -+ if (!err && !plink) -+ au_plink_append(inode, a->bdst, a->h_path.dentry); -+ -+out: -+ AuTraceErr(err); -+ return err; -+} -+ -+int aufs_link(struct dentry *src_dentry, struct inode *dir, -+ struct dentry *dentry) -+{ -+ int err, rerr; -+ struct au_dtime dt; -+ struct au_link_args *a; -+ struct dentry *wh_dentry, *h_src_dentry; -+ struct inode *inode, *delegated; -+ struct super_block *sb; -+ struct au_wr_dir_args wr_dir_args = { -+ /* .force_btgt = -1, */ -+ .flags = AuWrDir_ADD_ENTRY -+ }; -+ -+ IMustLock(dir); -+ inode = d_inode(src_dentry); -+ IMustLock(inode); -+ -+ err = -ENOMEM; -+ a = kzalloc(sizeof(*a), GFP_NOFS); -+ if (unlikely(!a)) -+ goto out; -+ -+ a->parent = dentry->d_parent; /* dir inode is locked */ -+ err = aufs_read_and_write_lock2(dentry, src_dentry, -+ AuLock_NOPLM | AuLock_GEN); -+ if (unlikely(err)) -+ goto out_kfree; -+ err = au_d_linkable(src_dentry); -+ if (unlikely(err)) -+ goto out_unlock; -+ err = au_d_may_add(dentry); -+ if (unlikely(err)) -+ goto out_unlock; -+ -+ a->src_parent = dget_parent(src_dentry); -+ wr_dir_args.force_btgt = au_ibtop(inode); -+ -+ di_write_lock_parent(a->parent); -+ wr_dir_args.force_btgt = au_wbr(dentry, wr_dir_args.force_btgt); -+ wh_dentry = lock_hdir_lkup_wh(dentry, &dt, src_dentry, &a->pin, -+ &wr_dir_args); -+ err = PTR_ERR(wh_dentry); -+ if (IS_ERR(wh_dentry)) -+ goto out_parent; -+ -+ err = 0; -+ sb = dentry->d_sb; -+ a->bdst = au_dbtop(dentry); -+ a->h_path.dentry = au_h_dptr(dentry, a->bdst); -+ a->h_path.mnt = au_sbr_mnt(sb, a->bdst); -+ a->bsrc = au_ibtop(inode); -+ h_src_dentry = au_h_d_alias(src_dentry, a->bsrc); -+ if (!h_src_dentry && au_di(src_dentry)->di_tmpfile) -+ h_src_dentry = dget(au_hi_wh(inode, a->bsrc)); -+ if (!h_src_dentry) { -+ a->bsrc = au_dbtop(src_dentry); -+ h_src_dentry = au_h_d_alias(src_dentry, a->bsrc); -+ AuDebugOn(!h_src_dentry); -+ } else if (IS_ERR(h_src_dentry)) { -+ err = PTR_ERR(h_src_dentry); -+ goto out_parent; -+ } -+ -+ /* -+ * aufs doesn't touch the credential so -+ * security_dentry_create_files_as() is unnecessary. -+ */ -+ if (au_opt_test(au_mntflags(sb), PLINK)) { -+ if (a->bdst < a->bsrc -+ /* && h_src_dentry->d_sb != a->h_path.dentry->d_sb */) -+ err = au_cpup_or_link(src_dentry, dentry, a); -+ else { -+ delegated = NULL; -+ err = vfsub_link(h_src_dentry, au_pinned_h_dir(&a->pin), -+ &a->h_path, &delegated); -+ if (unlikely(err == -EWOULDBLOCK)) { -+ pr_warn("cannot retry for NFSv4 delegation" -+ " for an internal link\n"); -+ iput(delegated); -+ } -+ } -+ dput(h_src_dentry); -+ } else { -+ /* -+ * copyup src_dentry to the branch we process, -+ * and then link(2) to it. -+ */ -+ dput(h_src_dentry); -+ if (a->bdst < a->bsrc -+ /* && h_src_dentry->d_sb != a->h_path.dentry->d_sb */) { -+ au_unpin(&a->pin); -+ di_write_unlock(a->parent); -+ err = au_cpup_before_link(src_dentry, a); -+ di_write_lock_parent(a->parent); -+ if (!err) -+ err = au_pin(&a->pin, dentry, a->bdst, -+ au_opt_udba(sb), -+ AuPin_DI_LOCKED | AuPin_MNT_WRITE); -+ if (unlikely(err)) -+ goto out_wh; -+ } -+ if (!err) { -+ h_src_dentry = au_h_dptr(src_dentry, a->bdst); -+ err = -ENOENT; -+ if (h_src_dentry && d_is_positive(h_src_dentry)) { -+ delegated = NULL; -+ err = vfsub_link(h_src_dentry, -+ au_pinned_h_dir(&a->pin), -+ &a->h_path, &delegated); -+ if (unlikely(err == -EWOULDBLOCK)) { -+ pr_warn("cannot retry" -+ " for NFSv4 delegation" -+ " for an internal link\n"); -+ iput(delegated); -+ } -+ } -+ } -+ } -+ if (unlikely(err)) -+ goto out_unpin; -+ -+ if (wh_dentry) { -+ a->h_path.dentry = wh_dentry; -+ err = au_wh_unlink_dentry(au_pinned_h_dir(&a->pin), &a->h_path, -+ dentry); -+ if (unlikely(err)) -+ goto out_revert; -+ } -+ -+ au_dir_ts(dir, a->bdst); -+ inode_inc_iversion(dir); -+ inc_nlink(inode); -+ inode->i_ctime = dir->i_ctime; -+ d_instantiate(dentry, au_igrab(inode)); -+ if (d_unhashed(a->h_path.dentry)) -+ /* some filesystem calls d_drop() */ -+ d_drop(dentry); -+ /* some filesystems consume an inode even hardlink */ -+ au_fhsm_wrote(sb, a->bdst, /*force*/0); -+ goto out_unpin; /* success */ -+ -+out_revert: -+ /* no delegation since it is just created */ -+ rerr = vfsub_unlink(au_pinned_h_dir(&a->pin), &a->h_path, -+ /*delegated*/NULL, /*force*/0); -+ if (unlikely(rerr)) { -+ AuIOErr("%pd reverting failed(%d, %d)\n", dentry, err, rerr); -+ err = -EIO; -+ } -+ au_dtime_revert(&dt); -+out_unpin: -+ au_unpin(&a->pin); -+out_wh: -+ dput(wh_dentry); -+out_parent: -+ di_write_unlock(a->parent); -+ dput(a->src_parent); -+out_unlock: -+ if (unlikely(err)) { -+ au_update_dbtop(dentry); -+ d_drop(dentry); -+ } -+ aufs_read_and_write_unlock2(dentry, src_dentry); -+out_kfree: -+ au_kfree_rcu(a); -+out: -+ AuTraceErr(err); -+ return err; -+} -+ -+int aufs_mkdir(struct inode *dir, struct dentry *dentry, umode_t mode) -+{ -+ int err, rerr; -+ aufs_bindex_t bindex; -+ unsigned char diropq; -+ struct path h_path; -+ struct dentry *wh_dentry, *parent, *opq_dentry; -+ struct inode *h_inode; -+ struct super_block *sb; -+ struct { -+ struct au_pin pin; -+ struct au_dtime dt; -+ } *a; /* reduce the stack usage */ -+ struct au_wr_dir_args wr_dir_args = { -+ .force_btgt = -1, -+ .flags = AuWrDir_ADD_ENTRY | AuWrDir_ISDIR -+ }; -+ -+ IMustLock(dir); -+ -+ err = -ENOMEM; -+ a = kmalloc(sizeof(*a), GFP_NOFS); -+ if (unlikely(!a)) -+ goto out; -+ -+ err = aufs_read_lock(dentry, AuLock_DW | AuLock_GEN); -+ if (unlikely(err)) -+ goto out_free; -+ err = au_d_may_add(dentry); -+ if (unlikely(err)) -+ goto out_unlock; -+ -+ parent = dentry->d_parent; /* dir inode is locked */ -+ di_write_lock_parent(parent); -+ wh_dentry = lock_hdir_lkup_wh(dentry, &a->dt, /*src_dentry*/NULL, -+ &a->pin, &wr_dir_args); -+ err = PTR_ERR(wh_dentry); -+ if (IS_ERR(wh_dentry)) -+ goto out_parent; -+ -+ sb = dentry->d_sb; -+ bindex = au_dbtop(dentry); -+ h_path.dentry = au_h_dptr(dentry, bindex); -+ h_path.mnt = au_sbr_mnt(sb, bindex); -+ err = vfsub_mkdir(au_pinned_h_dir(&a->pin), &h_path, mode); -+ if (unlikely(err)) -+ goto out_unpin; -+ -+ /* make the dir opaque */ -+ diropq = 0; -+ h_inode = d_inode(h_path.dentry); -+ if (wh_dentry -+ || au_opt_test(au_mntflags(sb), ALWAYS_DIROPQ)) { -+ inode_lock_nested(h_inode, AuLsc_I_CHILD); -+ opq_dentry = au_diropq_create(dentry, bindex); -+ inode_unlock(h_inode); -+ err = PTR_ERR(opq_dentry); -+ if (IS_ERR(opq_dentry)) -+ goto out_dir; -+ dput(opq_dentry); -+ diropq = 1; -+ } -+ -+ err = epilog(dir, bindex, wh_dentry, dentry); -+ if (!err) { -+ inc_nlink(dir); -+ goto out_unpin; /* success */ -+ } -+ -+ /* revert */ -+ if (diropq) { -+ AuLabel(revert opq); -+ inode_lock_nested(h_inode, AuLsc_I_CHILD); -+ rerr = au_diropq_remove(dentry, bindex); -+ inode_unlock(h_inode); -+ if (rerr) { -+ AuIOErr("%pd reverting diropq failed(%d, %d)\n", -+ dentry, err, rerr); -+ err = -EIO; -+ } -+ } -+ -+out_dir: -+ AuLabel(revert dir); -+ rerr = vfsub_rmdir(au_pinned_h_dir(&a->pin), &h_path); -+ if (rerr) { -+ AuIOErr("%pd reverting dir failed(%d, %d)\n", -+ dentry, err, rerr); -+ err = -EIO; -+ } -+ au_dtime_revert(&a->dt); -+out_unpin: -+ au_unpin(&a->pin); -+ dput(wh_dentry); -+out_parent: -+ di_write_unlock(parent); -+out_unlock: -+ if (unlikely(err)) { -+ au_update_dbtop(dentry); -+ d_drop(dentry); -+ } -+ aufs_read_unlock(dentry, AuLock_DW); -+out_free: -+ au_kfree_rcu(a); -+out: -+ return err; -+} -diff --git a/fs/aufs/i_op_del.c b/fs/aufs/i_op_del.c -new file mode 100644 -index 000000000000..05f5d4219b41 ---- /dev/null -+++ b/fs/aufs/i_op_del.c -@@ -0,0 +1,500 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * inode operations (del entry) -+ */ -+ -+#include -+#include "aufs.h" -+ -+/* -+ * decide if a new whiteout for @dentry is necessary or not. -+ * when it is necessary, prepare the parent dir for the upper branch whose -+ * branch index is @bcpup for creation. the actual creation of the whiteout will -+ * be done by caller. -+ * return value: -+ * 0: wh is unnecessary -+ * plus: wh is necessary -+ * minus: error -+ */ -+int au_wr_dir_need_wh(struct dentry *dentry, int isdir, aufs_bindex_t *bcpup) -+{ -+ int need_wh, err; -+ aufs_bindex_t btop; -+ struct super_block *sb; -+ -+ sb = dentry->d_sb; -+ btop = au_dbtop(dentry); -+ if (*bcpup < 0) { -+ *bcpup = btop; -+ if (au_test_ro(sb, btop, d_inode(dentry))) { -+ err = AuWbrCopyup(au_sbi(sb), dentry); -+ *bcpup = err; -+ if (unlikely(err < 0)) -+ goto out; -+ } -+ } else -+ AuDebugOn(btop < *bcpup -+ || au_test_ro(sb, *bcpup, d_inode(dentry))); -+ AuDbg("bcpup %d, btop %d\n", *bcpup, btop); -+ -+ if (*bcpup != btop) { -+ err = au_cpup_dirs(dentry, *bcpup); -+ if (unlikely(err)) -+ goto out; -+ need_wh = 1; -+ } else { -+ struct au_dinfo *dinfo, *tmp; -+ -+ need_wh = -ENOMEM; -+ dinfo = au_di(dentry); -+ tmp = au_di_alloc(sb, AuLsc_DI_TMP); -+ if (tmp) { -+ au_di_cp(tmp, dinfo); -+ au_di_swap(tmp, dinfo); -+ /* returns the number of positive dentries */ -+ need_wh = au_lkup_dentry(dentry, btop + 1, -+ /* AuLkup_IGNORE_PERM */ 0); -+ au_di_swap(tmp, dinfo); -+ au_rw_write_unlock(&tmp->di_rwsem); -+ au_di_free(tmp); -+ } -+ } -+ AuDbg("need_wh %d\n", need_wh); -+ err = need_wh; -+ -+out: -+ return err; -+} -+ -+/* -+ * simple tests for the del-entry operations. -+ * following the checks in vfs, plus the parent-child relationship. -+ */ -+int au_may_del(struct dentry *dentry, aufs_bindex_t bindex, -+ struct dentry *h_parent, int isdir) -+{ -+ int err; -+ umode_t h_mode; -+ struct dentry *h_dentry, *h_latest; -+ struct inode *h_inode; -+ -+ h_dentry = au_h_dptr(dentry, bindex); -+ if (d_really_is_positive(dentry)) { -+ err = -ENOENT; -+ if (unlikely(d_is_negative(h_dentry))) -+ goto out; -+ h_inode = d_inode(h_dentry); -+ if (unlikely(!h_inode->i_nlink)) -+ goto out; -+ -+ h_mode = h_inode->i_mode; -+ if (!isdir) { -+ err = -EISDIR; -+ if (unlikely(S_ISDIR(h_mode))) -+ goto out; -+ } else if (unlikely(!S_ISDIR(h_mode))) { -+ err = -ENOTDIR; -+ goto out; -+ } -+ } else { -+ /* rename(2) case */ -+ err = -EIO; -+ if (unlikely(d_is_positive(h_dentry))) -+ goto out; -+ } -+ -+ err = -ENOENT; -+ /* expected parent dir is locked */ -+ if (unlikely(h_parent != h_dentry->d_parent)) -+ goto out; -+ err = 0; -+ -+ /* -+ * rmdir a dir may break the consistency on some filesystem. -+ * let's try heavy test. -+ */ -+ err = -EACCES; -+ if (unlikely(!au_opt_test(au_mntflags(dentry->d_sb), DIRPERM1) -+ && au_test_h_perm(d_inode(h_parent), -+ MAY_EXEC | MAY_WRITE))) -+ goto out; -+ -+ h_latest = au_sio_lkup_one(&dentry->d_name, h_parent); -+ err = -EIO; -+ if (IS_ERR(h_latest)) -+ goto out; -+ if (h_latest == h_dentry) -+ err = 0; -+ dput(h_latest); -+ -+out: -+ return err; -+} -+ -+/* -+ * decide the branch where we operate for @dentry. the branch index will be set -+ * @rbcpup. after deciding it, 'pin' it and store the timestamps of the parent -+ * dir for reverting. -+ * when a new whiteout is necessary, create it. -+ */ -+static struct dentry* -+lock_hdir_create_wh(struct dentry *dentry, int isdir, aufs_bindex_t *rbcpup, -+ struct au_dtime *dt, struct au_pin *pin) -+{ -+ struct dentry *wh_dentry; -+ struct super_block *sb; -+ struct path h_path; -+ int err, need_wh; -+ unsigned int udba; -+ aufs_bindex_t bcpup; -+ -+ need_wh = au_wr_dir_need_wh(dentry, isdir, rbcpup); -+ wh_dentry = ERR_PTR(need_wh); -+ if (unlikely(need_wh < 0)) -+ goto out; -+ -+ sb = dentry->d_sb; -+ udba = au_opt_udba(sb); -+ bcpup = *rbcpup; -+ err = au_pin(pin, dentry, bcpup, udba, -+ AuPin_DI_LOCKED | AuPin_MNT_WRITE); -+ wh_dentry = ERR_PTR(err); -+ if (unlikely(err)) -+ goto out; -+ -+ h_path.dentry = au_pinned_h_parent(pin); -+ if (udba != AuOpt_UDBA_NONE -+ && au_dbtop(dentry) == bcpup) { -+ err = au_may_del(dentry, bcpup, h_path.dentry, isdir); -+ wh_dentry = ERR_PTR(err); -+ if (unlikely(err)) -+ goto out_unpin; -+ } -+ -+ h_path.mnt = au_sbr_mnt(sb, bcpup); -+ au_dtime_store(dt, au_pinned_parent(pin), &h_path); -+ wh_dentry = NULL; -+ if (!need_wh) -+ goto out; /* success, no need to create whiteout */ -+ -+ wh_dentry = au_wh_create(dentry, bcpup, h_path.dentry); -+ if (IS_ERR(wh_dentry)) -+ goto out_unpin; -+ -+ /* returns with the parent is locked and wh_dentry is dget-ed */ -+ goto out; /* success */ -+ -+out_unpin: -+ au_unpin(pin); -+out: -+ return wh_dentry; -+} -+ -+/* -+ * when removing a dir, rename it to a unique temporary whiteout-ed name first -+ * in order to be revertible and save time for removing many child whiteouts -+ * under the dir. -+ * returns 1 when there are too many child whiteout and caller should remove -+ * them asynchronously. returns 0 when the number of children is enough small to -+ * remove now or the branch fs is a remote fs. -+ * otherwise return an error. -+ */ -+static int renwh_and_rmdir(struct dentry *dentry, aufs_bindex_t bindex, -+ struct au_nhash *whlist, struct inode *dir) -+{ -+ int rmdir_later, err, dirwh; -+ struct dentry *h_dentry; -+ struct super_block *sb; -+ struct inode *inode; -+ -+ sb = dentry->d_sb; -+ SiMustAnyLock(sb); -+ h_dentry = au_h_dptr(dentry, bindex); -+ err = au_whtmp_ren(h_dentry, au_sbr(sb, bindex)); -+ if (unlikely(err)) -+ goto out; -+ -+ /* stop monitoring */ -+ inode = d_inode(dentry); -+ au_hn_free(au_hi(inode, bindex)); -+ -+ if (!au_test_fs_remote(h_dentry->d_sb)) { -+ dirwh = au_sbi(sb)->si_dirwh; -+ rmdir_later = (dirwh <= 1); -+ if (!rmdir_later) -+ rmdir_later = au_nhash_test_longer_wh(whlist, bindex, -+ dirwh); -+ if (rmdir_later) -+ return rmdir_later; -+ } -+ -+ err = au_whtmp_rmdir(dir, bindex, h_dentry, whlist); -+ if (unlikely(err)) { -+ AuIOErr("rmdir %pd, b%d failed, %d. ignored\n", -+ h_dentry, bindex, err); -+ err = 0; -+ } -+ -+out: -+ AuTraceErr(err); -+ return err; -+} -+ -+/* -+ * final procedure for deleting a entry. -+ * maintain dentry and iattr. -+ */ -+static void epilog(struct inode *dir, struct dentry *dentry, -+ aufs_bindex_t bindex) -+{ -+ struct inode *inode; -+ -+ inode = d_inode(dentry); -+ d_drop(dentry); -+ inode->i_ctime = dir->i_ctime; -+ -+ au_dir_ts(dir, bindex); -+ inode_inc_iversion(dir); -+} -+ -+/* -+ * when an error happened, remove the created whiteout and revert everything. -+ */ -+static int do_revert(int err, struct inode *dir, aufs_bindex_t bindex, -+ aufs_bindex_t bwh, struct dentry *wh_dentry, -+ struct dentry *dentry, struct au_dtime *dt) -+{ -+ int rerr; -+ struct path h_path = { -+ .dentry = wh_dentry, -+ .mnt = au_sbr_mnt(dir->i_sb, bindex) -+ }; -+ -+ rerr = au_wh_unlink_dentry(au_h_iptr(dir, bindex), &h_path, dentry); -+ if (!rerr) { -+ au_set_dbwh(dentry, bwh); -+ au_dtime_revert(dt); -+ return 0; -+ } -+ -+ AuIOErr("%pd reverting whiteout failed(%d, %d)\n", dentry, err, rerr); -+ return -EIO; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+int aufs_unlink(struct inode *dir, struct dentry *dentry) -+{ -+ int err; -+ aufs_bindex_t bwh, bindex, btop; -+ struct inode *inode, *h_dir, *delegated; -+ struct dentry *parent, *wh_dentry; -+ /* to reduce stack size */ -+ struct { -+ struct au_dtime dt; -+ struct au_pin pin; -+ struct path h_path; -+ } *a; -+ -+ IMustLock(dir); -+ -+ err = -ENOMEM; -+ a = kmalloc(sizeof(*a), GFP_NOFS); -+ if (unlikely(!a)) -+ goto out; -+ -+ err = aufs_read_lock(dentry, AuLock_DW | AuLock_GEN); -+ if (unlikely(err)) -+ goto out_free; -+ err = au_d_hashed_positive(dentry); -+ if (unlikely(err)) -+ goto out_unlock; -+ inode = d_inode(dentry); -+ IMustLock(inode); -+ err = -EISDIR; -+ if (unlikely(d_is_dir(dentry))) -+ goto out_unlock; /* possible? */ -+ -+ btop = au_dbtop(dentry); -+ bwh = au_dbwh(dentry); -+ bindex = -1; -+ parent = dentry->d_parent; /* dir inode is locked */ -+ di_write_lock_parent(parent); -+ wh_dentry = lock_hdir_create_wh(dentry, /*isdir*/0, &bindex, &a->dt, -+ &a->pin); -+ err = PTR_ERR(wh_dentry); -+ if (IS_ERR(wh_dentry)) -+ goto out_parent; -+ -+ a->h_path.mnt = au_sbr_mnt(dentry->d_sb, btop); -+ a->h_path.dentry = au_h_dptr(dentry, btop); -+ dget(a->h_path.dentry); -+ if (bindex == btop) { -+ h_dir = au_pinned_h_dir(&a->pin); -+ delegated = NULL; -+ err = vfsub_unlink(h_dir, &a->h_path, &delegated, /*force*/0); -+ if (unlikely(err == -EWOULDBLOCK)) { -+ pr_warn("cannot retry for NFSv4 delegation" -+ " for an internal unlink\n"); -+ iput(delegated); -+ } -+ } else { -+ /* dir inode is locked */ -+ h_dir = d_inode(wh_dentry->d_parent); -+ IMustLock(h_dir); -+ err = 0; -+ } -+ -+ if (!err) { -+ vfsub_drop_nlink(inode); -+ epilog(dir, dentry, bindex); -+ -+ /* update target timestamps */ -+ if (bindex == btop) { -+ vfsub_update_h_iattr(&a->h_path, /*did*/NULL); -+ /*ignore*/ -+ inode->i_ctime = d_inode(a->h_path.dentry)->i_ctime; -+ } else -+ /* todo: this timestamp may be reverted later */ -+ inode->i_ctime = h_dir->i_ctime; -+ goto out_unpin; /* success */ -+ } -+ -+ /* revert */ -+ if (wh_dentry) { -+ int rerr; -+ -+ rerr = do_revert(err, dir, bindex, bwh, wh_dentry, dentry, -+ &a->dt); -+ if (rerr) -+ err = rerr; -+ } -+ -+out_unpin: -+ au_unpin(&a->pin); -+ dput(wh_dentry); -+ dput(a->h_path.dentry); -+out_parent: -+ di_write_unlock(parent); -+out_unlock: -+ aufs_read_unlock(dentry, AuLock_DW); -+out_free: -+ au_kfree_rcu(a); -+out: -+ return err; -+} -+ -+int aufs_rmdir(struct inode *dir, struct dentry *dentry) -+{ -+ int err, rmdir_later; -+ aufs_bindex_t bwh, bindex, btop; -+ struct inode *inode; -+ struct dentry *parent, *wh_dentry, *h_dentry; -+ struct au_whtmp_rmdir *args; -+ /* to reduce stack size */ -+ struct { -+ struct au_dtime dt; -+ struct au_pin pin; -+ } *a; -+ -+ IMustLock(dir); -+ -+ err = -ENOMEM; -+ a = kmalloc(sizeof(*a), GFP_NOFS); -+ if (unlikely(!a)) -+ goto out; -+ -+ err = aufs_read_lock(dentry, AuLock_DW | AuLock_FLUSH | AuLock_GEN); -+ if (unlikely(err)) -+ goto out_free; -+ err = au_alive_dir(dentry); -+ if (unlikely(err)) -+ goto out_unlock; -+ inode = d_inode(dentry); -+ IMustLock(inode); -+ err = -ENOTDIR; -+ if (unlikely(!d_is_dir(dentry))) -+ goto out_unlock; /* possible? */ -+ -+ err = -ENOMEM; -+ args = au_whtmp_rmdir_alloc(dir->i_sb, GFP_NOFS); -+ if (unlikely(!args)) -+ goto out_unlock; -+ -+ parent = dentry->d_parent; /* dir inode is locked */ -+ di_write_lock_parent(parent); -+ err = au_test_empty(dentry, &args->whlist); -+ if (unlikely(err)) -+ goto out_parent; -+ -+ btop = au_dbtop(dentry); -+ bwh = au_dbwh(dentry); -+ bindex = -1; -+ wh_dentry = lock_hdir_create_wh(dentry, /*isdir*/1, &bindex, &a->dt, -+ &a->pin); -+ err = PTR_ERR(wh_dentry); -+ if (IS_ERR(wh_dentry)) -+ goto out_parent; -+ -+ h_dentry = au_h_dptr(dentry, btop); -+ dget(h_dentry); -+ rmdir_later = 0; -+ if (bindex == btop) { -+ err = renwh_and_rmdir(dentry, btop, &args->whlist, dir); -+ if (err > 0) { -+ rmdir_later = err; -+ err = 0; -+ } -+ } else { -+ /* stop monitoring */ -+ au_hn_free(au_hi(inode, btop)); -+ -+ /* dir inode is locked */ -+ IMustLock(d_inode(wh_dentry->d_parent)); -+ err = 0; -+ } -+ -+ if (!err) { -+ vfsub_dead_dir(inode); -+ au_set_dbdiropq(dentry, -1); -+ epilog(dir, dentry, bindex); -+ -+ if (rmdir_later) { -+ au_whtmp_kick_rmdir(dir, btop, h_dentry, args); -+ args = NULL; -+ } -+ -+ goto out_unpin; /* success */ -+ } -+ -+ /* revert */ -+ AuLabel(revert); -+ if (wh_dentry) { -+ int rerr; -+ -+ rerr = do_revert(err, dir, bindex, bwh, wh_dentry, dentry, -+ &a->dt); -+ if (rerr) -+ err = rerr; -+ } -+ -+out_unpin: -+ au_unpin(&a->pin); -+ dput(wh_dentry); -+ dput(h_dentry); -+out_parent: -+ di_write_unlock(parent); -+ if (args) -+ au_whtmp_rmdir_free(args); -+out_unlock: -+ aufs_read_unlock(dentry, AuLock_DW); -+out_free: -+ au_kfree_rcu(a); -+out: -+ AuTraceErr(err); -+ return err; -+} -diff --git a/fs/aufs/i_op_ren.c b/fs/aufs/i_op_ren.c -new file mode 100644 -index 000000000000..37c52390034a ---- /dev/null -+++ b/fs/aufs/i_op_ren.c -@@ -0,0 +1,1237 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * inode operation (rename entry) -+ * todo: this is crazy monster -+ */ -+ -+#include -+#include "aufs.h" -+ -+enum { AuSRC, AuDST, AuSrcDst }; -+enum { AuPARENT, AuCHILD, AuParentChild }; -+ -+#define AuRen_ISDIR_SRC 1 -+#define AuRen_ISDIR_DST (1 << 1) -+#define AuRen_ISSAMEDIR (1 << 2) -+#define AuRen_WHSRC (1 << 3) -+#define AuRen_WHDST (1 << 4) -+#define AuRen_MNT_WRITE (1 << 5) -+#define AuRen_DT_DSTDIR (1 << 6) -+#define AuRen_DIROPQ_SRC (1 << 7) -+#define AuRen_DIROPQ_DST (1 << 8) -+#define AuRen_DIRREN (1 << 9) -+#define AuRen_DROPPED_SRC (1 << 10) -+#define AuRen_DROPPED_DST (1 << 11) -+#define au_ftest_ren(flags, name) ((flags) & AuRen_##name) -+#define au_fset_ren(flags, name) \ -+ do { (flags) |= AuRen_##name; } while (0) -+#define au_fclr_ren(flags, name) \ -+ do { (flags) &= ~AuRen_##name; } while (0) -+ -+#ifndef CONFIG_AUFS_DIRREN -+#undef AuRen_DIRREN -+#define AuRen_DIRREN 0 -+#endif -+ -+struct au_ren_args { -+ struct { -+ struct dentry *dentry, *h_dentry, *parent, *h_parent, -+ *wh_dentry; -+ struct inode *dir, *inode; -+ struct au_hinode *hdir, *hinode; -+ struct au_dtime dt[AuParentChild]; -+ aufs_bindex_t btop, bdiropq; -+ } sd[AuSrcDst]; -+ -+#define src_dentry sd[AuSRC].dentry -+#define src_dir sd[AuSRC].dir -+#define src_inode sd[AuSRC].inode -+#define src_h_dentry sd[AuSRC].h_dentry -+#define src_parent sd[AuSRC].parent -+#define src_h_parent sd[AuSRC].h_parent -+#define src_wh_dentry sd[AuSRC].wh_dentry -+#define src_hdir sd[AuSRC].hdir -+#define src_hinode sd[AuSRC].hinode -+#define src_h_dir sd[AuSRC].hdir->hi_inode -+#define src_dt sd[AuSRC].dt -+#define src_btop sd[AuSRC].btop -+#define src_bdiropq sd[AuSRC].bdiropq -+ -+#define dst_dentry sd[AuDST].dentry -+#define dst_dir sd[AuDST].dir -+#define dst_inode sd[AuDST].inode -+#define dst_h_dentry sd[AuDST].h_dentry -+#define dst_parent sd[AuDST].parent -+#define dst_h_parent sd[AuDST].h_parent -+#define dst_wh_dentry sd[AuDST].wh_dentry -+#define dst_hdir sd[AuDST].hdir -+#define dst_hinode sd[AuDST].hinode -+#define dst_h_dir sd[AuDST].hdir->hi_inode -+#define dst_dt sd[AuDST].dt -+#define dst_btop sd[AuDST].btop -+#define dst_bdiropq sd[AuDST].bdiropq -+ -+ struct dentry *h_trap; -+ struct au_branch *br; -+ struct path h_path; -+ struct au_nhash whlist; -+ aufs_bindex_t btgt, src_bwh; -+ -+ struct { -+ unsigned short auren_flags; -+ unsigned char flags; /* syscall parameter */ -+ unsigned char exchange; -+ } __packed; -+ -+ struct au_whtmp_rmdir *thargs; -+ struct dentry *h_dst; -+ struct au_hinode *h_root; -+}; -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* -+ * functions for reverting. -+ * when an error happened in a single rename systemcall, we should revert -+ * everything as if nothing happened. -+ * we don't need to revert the copied-up/down the parent dir since they are -+ * harmless. -+ */ -+ -+#define RevertFailure(fmt, ...) do { \ -+ AuIOErr("revert failure: " fmt " (%d, %d)\n", \ -+ ##__VA_ARGS__, err, rerr); \ -+ err = -EIO; \ -+} while (0) -+ -+static void au_ren_do_rev_diropq(int err, struct au_ren_args *a, int idx) -+{ -+ int rerr; -+ struct dentry *d; -+#define src_or_dst(member) a->sd[idx].member -+ -+ d = src_or_dst(dentry); /* {src,dst}_dentry */ -+ au_hn_inode_lock_nested(src_or_dst(hinode), AuLsc_I_CHILD); -+ rerr = au_diropq_remove(d, a->btgt); -+ au_hn_inode_unlock(src_or_dst(hinode)); -+ au_set_dbdiropq(d, src_or_dst(bdiropq)); -+ if (rerr) -+ RevertFailure("remove diropq %pd", d); -+ -+#undef src_or_dst_ -+} -+ -+static void au_ren_rev_diropq(int err, struct au_ren_args *a) -+{ -+ if (au_ftest_ren(a->auren_flags, DIROPQ_SRC)) -+ au_ren_do_rev_diropq(err, a, AuSRC); -+ if (au_ftest_ren(a->auren_flags, DIROPQ_DST)) -+ au_ren_do_rev_diropq(err, a, AuDST); -+} -+ -+static void au_ren_rev_rename(int err, struct au_ren_args *a) -+{ -+ int rerr; -+ struct inode *delegated; -+ -+ a->h_path.dentry = vfsub_lkup_one(&a->src_dentry->d_name, -+ a->src_h_parent); -+ rerr = PTR_ERR(a->h_path.dentry); -+ if (IS_ERR(a->h_path.dentry)) { -+ RevertFailure("lkup one %pd", a->src_dentry); -+ return; -+ } -+ -+ delegated = NULL; -+ rerr = vfsub_rename(a->dst_h_dir, -+ au_h_dptr(a->src_dentry, a->btgt), -+ a->src_h_dir, &a->h_path, &delegated, a->flags); -+ if (unlikely(rerr == -EWOULDBLOCK)) { -+ pr_warn("cannot retry for NFSv4 delegation" -+ " for an internal rename\n"); -+ iput(delegated); -+ } -+ d_drop(a->h_path.dentry); -+ dput(a->h_path.dentry); -+ /* au_set_h_dptr(a->src_dentry, a->btgt, NULL); */ -+ if (rerr) -+ RevertFailure("rename %pd", a->src_dentry); -+} -+ -+static void au_ren_rev_whtmp(int err, struct au_ren_args *a) -+{ -+ int rerr; -+ struct inode *delegated; -+ -+ a->h_path.dentry = vfsub_lkup_one(&a->dst_dentry->d_name, -+ a->dst_h_parent); -+ rerr = PTR_ERR(a->h_path.dentry); -+ if (IS_ERR(a->h_path.dentry)) { -+ RevertFailure("lkup one %pd", a->dst_dentry); -+ return; -+ } -+ if (d_is_positive(a->h_path.dentry)) { -+ d_drop(a->h_path.dentry); -+ dput(a->h_path.dentry); -+ return; -+ } -+ -+ delegated = NULL; -+ rerr = vfsub_rename(a->dst_h_dir, a->h_dst, a->dst_h_dir, &a->h_path, -+ &delegated, a->flags); -+ if (unlikely(rerr == -EWOULDBLOCK)) { -+ pr_warn("cannot retry for NFSv4 delegation" -+ " for an internal rename\n"); -+ iput(delegated); -+ } -+ d_drop(a->h_path.dentry); -+ dput(a->h_path.dentry); -+ if (!rerr) -+ au_set_h_dptr(a->dst_dentry, a->btgt, dget(a->h_dst)); -+ else -+ RevertFailure("rename %pd", a->h_dst); -+} -+ -+static void au_ren_rev_whsrc(int err, struct au_ren_args *a) -+{ -+ int rerr; -+ -+ a->h_path.dentry = a->src_wh_dentry; -+ rerr = au_wh_unlink_dentry(a->src_h_dir, &a->h_path, a->src_dentry); -+ au_set_dbwh(a->src_dentry, a->src_bwh); -+ if (rerr) -+ RevertFailure("unlink %pd", a->src_wh_dentry); -+} -+#undef RevertFailure -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* -+ * when we have to copyup the renaming entry, do it with the rename-target name -+ * in order to minimize the cost (the later actual rename is unnecessary). -+ * otherwise rename it on the target branch. -+ */ -+static int au_ren_or_cpup(struct au_ren_args *a) -+{ -+ int err; -+ struct dentry *d; -+ struct inode *delegated; -+ -+ d = a->src_dentry; -+ if (au_dbtop(d) == a->btgt) { -+ a->h_path.dentry = a->dst_h_dentry; -+ AuDebugOn(au_dbtop(d) != a->btgt); -+ delegated = NULL; -+ err = vfsub_rename(a->src_h_dir, au_h_dptr(d, a->btgt), -+ a->dst_h_dir, &a->h_path, &delegated, -+ a->flags); -+ if (unlikely(err == -EWOULDBLOCK)) { -+ pr_warn("cannot retry for NFSv4 delegation" -+ " for an internal rename\n"); -+ iput(delegated); -+ } -+ } else -+ BUG(); -+ -+ if (!err && a->h_dst) -+ /* it will be set to dinfo later */ -+ dget(a->h_dst); -+ -+ return err; -+} -+ -+/* cf. aufs_rmdir() */ -+static int au_ren_del_whtmp(struct au_ren_args *a) -+{ -+ int err; -+ struct inode *dir; -+ -+ dir = a->dst_dir; -+ SiMustAnyLock(dir->i_sb); -+ if (!au_nhash_test_longer_wh(&a->whlist, a->btgt, -+ au_sbi(dir->i_sb)->si_dirwh) -+ || au_test_fs_remote(a->h_dst->d_sb)) { -+ err = au_whtmp_rmdir(dir, a->btgt, a->h_dst, &a->whlist); -+ if (unlikely(err)) -+ pr_warn("failed removing whtmp dir %pd (%d), " -+ "ignored.\n", a->h_dst, err); -+ } else { -+ au_nhash_wh_free(&a->thargs->whlist); -+ a->thargs->whlist = a->whlist; -+ a->whlist.nh_num = 0; -+ au_whtmp_kick_rmdir(dir, a->btgt, a->h_dst, a->thargs); -+ dput(a->h_dst); -+ a->thargs = NULL; -+ } -+ -+ return 0; -+} -+ -+/* make it 'opaque' dir. */ -+static int au_ren_do_diropq(struct au_ren_args *a, int idx) -+{ -+ int err; -+ struct dentry *d, *diropq; -+#define src_or_dst(member) a->sd[idx].member -+ -+ err = 0; -+ d = src_or_dst(dentry); /* {src,dst}_dentry */ -+ src_or_dst(bdiropq) = au_dbdiropq(d); -+ src_or_dst(hinode) = au_hi(src_or_dst(inode), a->btgt); -+ au_hn_inode_lock_nested(src_or_dst(hinode), AuLsc_I_CHILD); -+ diropq = au_diropq_create(d, a->btgt); -+ au_hn_inode_unlock(src_or_dst(hinode)); -+ if (IS_ERR(diropq)) -+ err = PTR_ERR(diropq); -+ else -+ dput(diropq); -+ -+#undef src_or_dst_ -+ return err; -+} -+ -+static int au_ren_diropq(struct au_ren_args *a) -+{ -+ int err; -+ unsigned char always; -+ struct dentry *d; -+ -+ err = 0; -+ d = a->dst_dentry; /* already renamed on the branch */ -+ always = !!au_opt_test(au_mntflags(d->d_sb), ALWAYS_DIROPQ); -+ if (au_ftest_ren(a->auren_flags, ISDIR_SRC) -+ && !au_ftest_ren(a->auren_flags, DIRREN) -+ && a->btgt != au_dbdiropq(a->src_dentry) -+ && (a->dst_wh_dentry -+ || a->btgt <= au_dbdiropq(d) -+ /* hide the lower to keep xino */ -+ /* the lowers may not be a dir, but we hide them anyway */ -+ || a->btgt < au_dbbot(d) -+ || always)) { -+ AuDbg("here\n"); -+ err = au_ren_do_diropq(a, AuSRC); -+ if (unlikely(err)) -+ goto out; -+ au_fset_ren(a->auren_flags, DIROPQ_SRC); -+ } -+ if (!a->exchange) -+ goto out; /* success */ -+ -+ d = a->src_dentry; /* already renamed on the branch */ -+ if (au_ftest_ren(a->auren_flags, ISDIR_DST) -+ && a->btgt != au_dbdiropq(a->dst_dentry) -+ && (a->btgt < au_dbdiropq(d) -+ || a->btgt < au_dbbot(d) -+ || always)) { -+ AuDbgDentry(a->src_dentry); -+ AuDbgDentry(a->dst_dentry); -+ err = au_ren_do_diropq(a, AuDST); -+ if (unlikely(err)) -+ goto out_rev_src; -+ au_fset_ren(a->auren_flags, DIROPQ_DST); -+ } -+ goto out; /* success */ -+ -+out_rev_src: -+ AuDbg("err %d, reverting src\n", err); -+ au_ren_rev_diropq(err, a); -+out: -+ return err; -+} -+ -+static int do_rename(struct au_ren_args *a) -+{ -+ int err; -+ struct dentry *d, *h_d; -+ -+ if (!a->exchange) { -+ /* prepare workqueue args for asynchronous rmdir */ -+ h_d = a->dst_h_dentry; -+ if (au_ftest_ren(a->auren_flags, ISDIR_DST) -+ /* && !au_ftest_ren(a->auren_flags, DIRREN) */ -+ && d_is_positive(h_d)) { -+ err = -ENOMEM; -+ a->thargs = au_whtmp_rmdir_alloc(a->src_dentry->d_sb, -+ GFP_NOFS); -+ if (unlikely(!a->thargs)) -+ goto out; -+ a->h_dst = dget(h_d); -+ } -+ -+ /* create whiteout for src_dentry */ -+ if (au_ftest_ren(a->auren_flags, WHSRC)) { -+ a->src_bwh = au_dbwh(a->src_dentry); -+ AuDebugOn(a->src_bwh >= 0); -+ a->src_wh_dentry = au_wh_create(a->src_dentry, a->btgt, -+ a->src_h_parent); -+ err = PTR_ERR(a->src_wh_dentry); -+ if (IS_ERR(a->src_wh_dentry)) -+ goto out_thargs; -+ } -+ -+ /* lookup whiteout for dentry */ -+ if (au_ftest_ren(a->auren_flags, WHDST)) { -+ h_d = au_wh_lkup(a->dst_h_parent, -+ &a->dst_dentry->d_name, a->br); -+ err = PTR_ERR(h_d); -+ if (IS_ERR(h_d)) -+ goto out_whsrc; -+ if (d_is_negative(h_d)) -+ dput(h_d); -+ else -+ a->dst_wh_dentry = h_d; -+ } -+ -+ /* rename dentry to tmpwh */ -+ if (a->thargs) { -+ err = au_whtmp_ren(a->dst_h_dentry, a->br); -+ if (unlikely(err)) -+ goto out_whdst; -+ -+ d = a->dst_dentry; -+ au_set_h_dptr(d, a->btgt, NULL); -+ err = au_lkup_neg(d, a->btgt, /*wh*/0); -+ if (unlikely(err)) -+ goto out_whtmp; -+ a->dst_h_dentry = au_h_dptr(d, a->btgt); -+ } -+ } -+ -+ BUG_ON(d_is_positive(a->dst_h_dentry) && a->src_btop != a->btgt); -+#if 0 /* debugging */ -+ BUG_ON(!au_ftest_ren(a->auren_flags, DIRREN) -+ && d_is_positive(a->dst_h_dentry) -+ && a->src_btop != a->btgt); -+#endif -+ -+ /* rename by vfs_rename or cpup */ -+ err = au_ren_or_cpup(a); -+ if (unlikely(err)) -+ /* leave the copied-up one */ -+ goto out_whtmp; -+ -+ /* make dir opaque */ -+ err = au_ren_diropq(a); -+ if (unlikely(err)) -+ goto out_rename; -+ -+ /* update target timestamps */ -+ if (a->exchange) { -+ AuDebugOn(au_dbtop(a->dst_dentry) != a->btgt); -+ a->h_path.dentry = au_h_dptr(a->dst_dentry, a->btgt); -+ vfsub_update_h_iattr(&a->h_path, /*did*/NULL); /*ignore*/ -+ a->dst_inode->i_ctime = d_inode(a->h_path.dentry)->i_ctime; -+ } -+ AuDebugOn(au_dbtop(a->src_dentry) != a->btgt); -+ a->h_path.dentry = au_h_dptr(a->src_dentry, a->btgt); -+ vfsub_update_h_iattr(&a->h_path, /*did*/NULL); /*ignore*/ -+ a->src_inode->i_ctime = d_inode(a->h_path.dentry)->i_ctime; -+ -+ if (!a->exchange) { -+ /* remove whiteout for dentry */ -+ if (a->dst_wh_dentry) { -+ a->h_path.dentry = a->dst_wh_dentry; -+ err = au_wh_unlink_dentry(a->dst_h_dir, &a->h_path, -+ a->dst_dentry); -+ if (unlikely(err)) -+ goto out_diropq; -+ } -+ -+ /* remove whtmp */ -+ if (a->thargs) -+ au_ren_del_whtmp(a); /* ignore this error */ -+ -+ au_fhsm_wrote(a->src_dentry->d_sb, a->btgt, /*force*/0); -+ } -+ err = 0; -+ goto out_success; -+ -+out_diropq: -+ au_ren_rev_diropq(err, a); -+out_rename: -+ au_ren_rev_rename(err, a); -+ dput(a->h_dst); -+out_whtmp: -+ if (a->thargs) -+ au_ren_rev_whtmp(err, a); -+out_whdst: -+ dput(a->dst_wh_dentry); -+ a->dst_wh_dentry = NULL; -+out_whsrc: -+ if (a->src_wh_dentry) -+ au_ren_rev_whsrc(err, a); -+out_success: -+ dput(a->src_wh_dentry); -+ dput(a->dst_wh_dentry); -+out_thargs: -+ if (a->thargs) { -+ dput(a->h_dst); -+ au_whtmp_rmdir_free(a->thargs); -+ a->thargs = NULL; -+ } -+out: -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* -+ * test if @dentry dir can be rename destination or not. -+ * success means, it is a logically empty dir. -+ */ -+static int may_rename_dstdir(struct dentry *dentry, struct au_nhash *whlist) -+{ -+ return au_test_empty(dentry, whlist); -+} -+ -+/* -+ * test if @a->src_dentry dir can be rename source or not. -+ * if it can, return 0. -+ * success means, -+ * - it is a logically empty dir. -+ * - or, it exists on writable branch and has no children including whiteouts -+ * on the lower branch unless DIRREN is on. -+ */ -+static int may_rename_srcdir(struct au_ren_args *a) -+{ -+ int err; -+ unsigned int rdhash; -+ aufs_bindex_t btop, btgt; -+ struct dentry *dentry; -+ struct super_block *sb; -+ struct au_sbinfo *sbinfo; -+ -+ dentry = a->src_dentry; -+ sb = dentry->d_sb; -+ sbinfo = au_sbi(sb); -+ if (au_opt_test(sbinfo->si_mntflags, DIRREN)) -+ au_fset_ren(a->auren_flags, DIRREN); -+ -+ btgt = a->btgt; -+ btop = au_dbtop(dentry); -+ if (btop != btgt) { -+ struct au_nhash whlist; -+ -+ SiMustAnyLock(sb); -+ rdhash = sbinfo->si_rdhash; -+ if (!rdhash) -+ rdhash = au_rdhash_est(au_dir_size(/*file*/NULL, -+ dentry)); -+ err = au_nhash_alloc(&whlist, rdhash, GFP_NOFS); -+ if (unlikely(err)) -+ goto out; -+ err = au_test_empty(dentry, &whlist); -+ au_nhash_wh_free(&whlist); -+ goto out; -+ } -+ -+ if (btop == au_dbtaildir(dentry)) -+ return 0; /* success */ -+ -+ err = au_test_empty_lower(dentry); -+ -+out: -+ if (err == -ENOTEMPTY) { -+ if (au_ftest_ren(a->auren_flags, DIRREN)) { -+ err = 0; -+ } else { -+ AuWarn1("renaming dir who has child(ren) on multiple " -+ "branches, is not supported\n"); -+ err = -EXDEV; -+ } -+ } -+ return err; -+} -+ -+/* side effect: sets whlist and h_dentry */ -+static int au_ren_may_dir(struct au_ren_args *a) -+{ -+ int err; -+ unsigned int rdhash; -+ struct dentry *d; -+ -+ d = a->dst_dentry; -+ SiMustAnyLock(d->d_sb); -+ -+ err = 0; -+ if (au_ftest_ren(a->auren_flags, ISDIR_DST) && a->dst_inode) { -+ rdhash = au_sbi(d->d_sb)->si_rdhash; -+ if (!rdhash) -+ rdhash = au_rdhash_est(au_dir_size(/*file*/NULL, d)); -+ err = au_nhash_alloc(&a->whlist, rdhash, GFP_NOFS); -+ if (unlikely(err)) -+ goto out; -+ -+ if (!a->exchange) { -+ au_set_dbtop(d, a->dst_btop); -+ err = may_rename_dstdir(d, &a->whlist); -+ au_set_dbtop(d, a->btgt); -+ } else -+ err = may_rename_srcdir(a); -+ } -+ a->dst_h_dentry = au_h_dptr(d, au_dbtop(d)); -+ if (unlikely(err)) -+ goto out; -+ -+ d = a->src_dentry; -+ a->src_h_dentry = au_h_dptr(d, au_dbtop(d)); -+ if (au_ftest_ren(a->auren_flags, ISDIR_SRC)) { -+ err = may_rename_srcdir(a); -+ if (unlikely(err)) { -+ au_nhash_wh_free(&a->whlist); -+ a->whlist.nh_num = 0; -+ } -+ } -+out: -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* -+ * simple tests for rename. -+ * following the checks in vfs, plus the parent-child relationship. -+ */ -+static int au_may_ren(struct au_ren_args *a) -+{ -+ int err, isdir; -+ struct inode *h_inode; -+ -+ if (a->src_btop == a->btgt) { -+ err = au_may_del(a->src_dentry, a->btgt, a->src_h_parent, -+ au_ftest_ren(a->auren_flags, ISDIR_SRC)); -+ if (unlikely(err)) -+ goto out; -+ err = -EINVAL; -+ if (unlikely(a->src_h_dentry == a->h_trap)) -+ goto out; -+ } -+ -+ err = 0; -+ if (a->dst_btop != a->btgt) -+ goto out; -+ -+ err = -ENOTEMPTY; -+ if (unlikely(a->dst_h_dentry == a->h_trap)) -+ goto out; -+ -+ err = -EIO; -+ isdir = !!au_ftest_ren(a->auren_flags, ISDIR_DST); -+ if (d_really_is_negative(a->dst_dentry)) { -+ if (d_is_negative(a->dst_h_dentry)) -+ err = au_may_add(a->dst_dentry, a->btgt, -+ a->dst_h_parent, isdir); -+ } else { -+ if (unlikely(d_is_negative(a->dst_h_dentry))) -+ goto out; -+ h_inode = d_inode(a->dst_h_dentry); -+ if (h_inode->i_nlink) -+ err = au_may_del(a->dst_dentry, a->btgt, -+ a->dst_h_parent, isdir); -+ } -+ -+out: -+ if (unlikely(err == -ENOENT || err == -EEXIST)) -+ err = -EIO; -+ AuTraceErr(err); -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* -+ * locking order -+ * (VFS) -+ * - src_dir and dir by lock_rename() -+ * - inode if exists -+ * (aufs) -+ * - lock all -+ * + src_dentry and dentry by aufs_read_and_write_lock2() which calls, -+ * + si_read_lock -+ * + di_write_lock2_child() -+ * + di_write_lock_child() -+ * + ii_write_lock_child() -+ * + di_write_lock_child2() -+ * + ii_write_lock_child2() -+ * + src_parent and parent -+ * + di_write_lock_parent() -+ * + ii_write_lock_parent() -+ * + di_write_lock_parent2() -+ * + ii_write_lock_parent2() -+ * + lower src_dir and dir by vfsub_lock_rename() -+ * + verify the every relationships between child and parent. if any -+ * of them failed, unlock all and return -EBUSY. -+ */ -+static void au_ren_unlock(struct au_ren_args *a) -+{ -+ vfsub_unlock_rename(a->src_h_parent, a->src_hdir, -+ a->dst_h_parent, a->dst_hdir); -+ if (au_ftest_ren(a->auren_flags, DIRREN) -+ && a->h_root) -+ au_hn_inode_unlock(a->h_root); -+ if (au_ftest_ren(a->auren_flags, MNT_WRITE)) -+ vfsub_mnt_drop_write(au_br_mnt(a->br)); -+} -+ -+static int au_ren_lock(struct au_ren_args *a) -+{ -+ int err; -+ unsigned int udba; -+ -+ err = 0; -+ a->src_h_parent = au_h_dptr(a->src_parent, a->btgt); -+ a->src_hdir = au_hi(a->src_dir, a->btgt); -+ a->dst_h_parent = au_h_dptr(a->dst_parent, a->btgt); -+ a->dst_hdir = au_hi(a->dst_dir, a->btgt); -+ -+ err = vfsub_mnt_want_write(au_br_mnt(a->br)); -+ if (unlikely(err)) -+ goto out; -+ au_fset_ren(a->auren_flags, MNT_WRITE); -+ if (au_ftest_ren(a->auren_flags, DIRREN)) { -+ struct dentry *root; -+ struct inode *dir; -+ -+ /* -+ * sbinfo is already locked, so this ii_read_lock is -+ * unnecessary. but our debugging feature checks it. -+ */ -+ root = a->src_inode->i_sb->s_root; -+ if (root != a->src_parent && root != a->dst_parent) { -+ dir = d_inode(root); -+ ii_read_lock_parent3(dir); -+ a->h_root = au_hi(dir, a->btgt); -+ ii_read_unlock(dir); -+ au_hn_inode_lock_nested(a->h_root, AuLsc_I_PARENT3); -+ } -+ } -+ a->h_trap = vfsub_lock_rename(a->src_h_parent, a->src_hdir, -+ a->dst_h_parent, a->dst_hdir); -+ udba = au_opt_udba(a->src_dentry->d_sb); -+ if (unlikely(a->src_hdir->hi_inode != d_inode(a->src_h_parent) -+ || a->dst_hdir->hi_inode != d_inode(a->dst_h_parent))) -+ err = au_busy_or_stale(); -+ if (!err && au_dbtop(a->src_dentry) == a->btgt) -+ err = au_h_verify(a->src_h_dentry, udba, -+ d_inode(a->src_h_parent), a->src_h_parent, -+ a->br); -+ if (!err && au_dbtop(a->dst_dentry) == a->btgt) -+ err = au_h_verify(a->dst_h_dentry, udba, -+ d_inode(a->dst_h_parent), a->dst_h_parent, -+ a->br); -+ if (!err) -+ goto out; /* success */ -+ -+ err = au_busy_or_stale(); -+ au_ren_unlock(a); -+ -+out: -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+static void au_ren_refresh_dir(struct au_ren_args *a) -+{ -+ struct inode *dir; -+ -+ dir = a->dst_dir; -+ inode_inc_iversion(dir); -+ if (au_ftest_ren(a->auren_flags, ISDIR_SRC)) { -+ /* is this updating defined in POSIX? */ -+ au_cpup_attr_timesizes(a->src_inode); -+ au_cpup_attr_nlink(dir, /*force*/1); -+ } -+ au_dir_ts(dir, a->btgt); -+ -+ if (a->exchange) { -+ dir = a->src_dir; -+ inode_inc_iversion(dir); -+ if (au_ftest_ren(a->auren_flags, ISDIR_DST)) { -+ /* is this updating defined in POSIX? */ -+ au_cpup_attr_timesizes(a->dst_inode); -+ au_cpup_attr_nlink(dir, /*force*/1); -+ } -+ au_dir_ts(dir, a->btgt); -+ } -+ -+ if (au_ftest_ren(a->auren_flags, ISSAMEDIR)) -+ return; -+ -+ dir = a->src_dir; -+ inode_inc_iversion(dir); -+ if (au_ftest_ren(a->auren_flags, ISDIR_SRC)) -+ au_cpup_attr_nlink(dir, /*force*/1); -+ au_dir_ts(dir, a->btgt); -+} -+ -+static void au_ren_refresh(struct au_ren_args *a) -+{ -+ aufs_bindex_t bbot, bindex; -+ struct dentry *d, *h_d; -+ struct inode *i, *h_i; -+ struct super_block *sb; -+ -+ d = a->dst_dentry; -+ d_drop(d); -+ if (a->h_dst) -+ /* already dget-ed by au_ren_or_cpup() */ -+ au_set_h_dptr(d, a->btgt, a->h_dst); -+ -+ i = a->dst_inode; -+ if (i) { -+ if (!a->exchange) { -+ if (!au_ftest_ren(a->auren_flags, ISDIR_DST)) -+ vfsub_drop_nlink(i); -+ else { -+ vfsub_dead_dir(i); -+ au_cpup_attr_timesizes(i); -+ } -+ au_update_dbrange(d, /*do_put_zero*/1); -+ } else -+ au_cpup_attr_nlink(i, /*force*/1); -+ } else { -+ bbot = a->btgt; -+ for (bindex = au_dbtop(d); bindex < bbot; bindex++) -+ au_set_h_dptr(d, bindex, NULL); -+ bbot = au_dbbot(d); -+ for (bindex = a->btgt + 1; bindex <= bbot; bindex++) -+ au_set_h_dptr(d, bindex, NULL); -+ au_update_dbrange(d, /*do_put_zero*/0); -+ } -+ -+ if (a->exchange -+ || au_ftest_ren(a->auren_flags, DIRREN)) { -+ d_drop(a->src_dentry); -+ if (au_ftest_ren(a->auren_flags, DIRREN)) -+ au_set_dbwh(a->src_dentry, -1); -+ return; -+ } -+ -+ d = a->src_dentry; -+ au_set_dbwh(d, -1); -+ bbot = au_dbbot(d); -+ for (bindex = a->btgt + 1; bindex <= bbot; bindex++) { -+ h_d = au_h_dptr(d, bindex); -+ if (h_d) -+ au_set_h_dptr(d, bindex, NULL); -+ } -+ au_set_dbbot(d, a->btgt); -+ -+ sb = d->d_sb; -+ i = a->src_inode; -+ if (au_opt_test(au_mntflags(sb), PLINK) && au_plink_test(i)) -+ return; /* success */ -+ -+ bbot = au_ibbot(i); -+ for (bindex = a->btgt + 1; bindex <= bbot; bindex++) { -+ h_i = au_h_iptr(i, bindex); -+ if (h_i) { -+ au_xino_write(sb, bindex, h_i->i_ino, /*ino*/0); -+ /* ignore this error */ -+ au_set_h_iptr(i, bindex, NULL, 0); -+ } -+ } -+ au_set_ibbot(i, a->btgt); -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* mainly for link(2) and rename(2) */ -+int au_wbr(struct dentry *dentry, aufs_bindex_t btgt) -+{ -+ aufs_bindex_t bdiropq, bwh; -+ struct dentry *parent; -+ struct au_branch *br; -+ -+ parent = dentry->d_parent; -+ IMustLock(d_inode(parent)); /* dir is locked */ -+ -+ bdiropq = au_dbdiropq(parent); -+ bwh = au_dbwh(dentry); -+ br = au_sbr(dentry->d_sb, btgt); -+ if (au_br_rdonly(br) -+ || (0 <= bdiropq && bdiropq < btgt) -+ || (0 <= bwh && bwh < btgt)) -+ btgt = -1; -+ -+ AuDbg("btgt %d\n", btgt); -+ return btgt; -+} -+ -+/* sets src_btop, dst_btop and btgt */ -+static int au_ren_wbr(struct au_ren_args *a) -+{ -+ int err; -+ struct au_wr_dir_args wr_dir_args = { -+ /* .force_btgt = -1, */ -+ .flags = AuWrDir_ADD_ENTRY -+ }; -+ -+ a->src_btop = au_dbtop(a->src_dentry); -+ a->dst_btop = au_dbtop(a->dst_dentry); -+ if (au_ftest_ren(a->auren_flags, ISDIR_SRC) -+ || au_ftest_ren(a->auren_flags, ISDIR_DST)) -+ au_fset_wrdir(wr_dir_args.flags, ISDIR); -+ wr_dir_args.force_btgt = a->src_btop; -+ if (a->dst_inode && a->dst_btop < a->src_btop) -+ wr_dir_args.force_btgt = a->dst_btop; -+ wr_dir_args.force_btgt = au_wbr(a->dst_dentry, wr_dir_args.force_btgt); -+ err = au_wr_dir(a->dst_dentry, a->src_dentry, &wr_dir_args); -+ a->btgt = err; -+ if (a->exchange) -+ au_update_dbtop(a->dst_dentry); -+ -+ return err; -+} -+ -+static void au_ren_dt(struct au_ren_args *a) -+{ -+ a->h_path.dentry = a->src_h_parent; -+ au_dtime_store(a->src_dt + AuPARENT, a->src_parent, &a->h_path); -+ if (!au_ftest_ren(a->auren_flags, ISSAMEDIR)) { -+ a->h_path.dentry = a->dst_h_parent; -+ au_dtime_store(a->dst_dt + AuPARENT, a->dst_parent, &a->h_path); -+ } -+ -+ au_fclr_ren(a->auren_flags, DT_DSTDIR); -+ if (!au_ftest_ren(a->auren_flags, ISDIR_SRC) -+ && !a->exchange) -+ return; -+ -+ a->h_path.dentry = a->src_h_dentry; -+ au_dtime_store(a->src_dt + AuCHILD, a->src_dentry, &a->h_path); -+ if (d_is_positive(a->dst_h_dentry)) { -+ au_fset_ren(a->auren_flags, DT_DSTDIR); -+ a->h_path.dentry = a->dst_h_dentry; -+ au_dtime_store(a->dst_dt + AuCHILD, a->dst_dentry, &a->h_path); -+ } -+} -+ -+static void au_ren_rev_dt(int err, struct au_ren_args *a) -+{ -+ struct dentry *h_d; -+ struct inode *h_inode; -+ -+ au_dtime_revert(a->src_dt + AuPARENT); -+ if (!au_ftest_ren(a->auren_flags, ISSAMEDIR)) -+ au_dtime_revert(a->dst_dt + AuPARENT); -+ -+ if (au_ftest_ren(a->auren_flags, ISDIR_SRC) && err != -EIO) { -+ h_d = a->src_dt[AuCHILD].dt_h_path.dentry; -+ h_inode = d_inode(h_d); -+ inode_lock_nested(h_inode, AuLsc_I_CHILD); -+ au_dtime_revert(a->src_dt + AuCHILD); -+ inode_unlock(h_inode); -+ -+ if (au_ftest_ren(a->auren_flags, DT_DSTDIR)) { -+ h_d = a->dst_dt[AuCHILD].dt_h_path.dentry; -+ h_inode = d_inode(h_d); -+ inode_lock_nested(h_inode, AuLsc_I_CHILD); -+ au_dtime_revert(a->dst_dt + AuCHILD); -+ inode_unlock(h_inode); -+ } -+ } -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+int aufs_rename(struct inode *_src_dir, struct dentry *_src_dentry, -+ struct inode *_dst_dir, struct dentry *_dst_dentry, -+ unsigned int _flags) -+{ -+ int err, lock_flags; -+ void *rev; -+ /* reduce stack space */ -+ struct au_ren_args *a; -+ struct au_pin pin; -+ -+ AuDbg("%pd, %pd, 0x%x\n", _src_dentry, _dst_dentry, _flags); -+ IMustLock(_src_dir); -+ IMustLock(_dst_dir); -+ -+ err = -EINVAL; -+ if (unlikely(_flags & RENAME_WHITEOUT)) -+ goto out; -+ -+ err = -ENOMEM; -+ BUILD_BUG_ON(sizeof(*a) > PAGE_SIZE); -+ a = kzalloc(sizeof(*a), GFP_NOFS); -+ if (unlikely(!a)) -+ goto out; -+ -+ a->flags = _flags; -+ BUILD_BUG_ON(sizeof(a->exchange) == sizeof(u8) -+ && RENAME_EXCHANGE > U8_MAX); -+ a->exchange = _flags & RENAME_EXCHANGE; -+ a->src_dir = _src_dir; -+ a->src_dentry = _src_dentry; -+ a->src_inode = NULL; -+ if (d_really_is_positive(a->src_dentry)) -+ a->src_inode = d_inode(a->src_dentry); -+ a->src_parent = a->src_dentry->d_parent; /* dir inode is locked */ -+ a->dst_dir = _dst_dir; -+ a->dst_dentry = _dst_dentry; -+ a->dst_inode = NULL; -+ if (d_really_is_positive(a->dst_dentry)) -+ a->dst_inode = d_inode(a->dst_dentry); -+ a->dst_parent = a->dst_dentry->d_parent; /* dir inode is locked */ -+ if (a->dst_inode) { -+ /* -+ * if EXCHANGE && src is non-dir && dst is dir, -+ * dst is not locked. -+ */ -+ /* IMustLock(a->dst_inode); */ -+ au_igrab(a->dst_inode); -+ } -+ -+ err = -ENOTDIR; -+ lock_flags = AuLock_FLUSH | AuLock_NOPLM | AuLock_GEN; -+ if (d_is_dir(a->src_dentry)) { -+ au_fset_ren(a->auren_flags, ISDIR_SRC); -+ if (unlikely(!a->exchange -+ && d_really_is_positive(a->dst_dentry) -+ && !d_is_dir(a->dst_dentry))) -+ goto out_free; -+ lock_flags |= AuLock_DIRS; -+ } -+ if (a->dst_inode && d_is_dir(a->dst_dentry)) { -+ au_fset_ren(a->auren_flags, ISDIR_DST); -+ if (unlikely(!a->exchange -+ && d_really_is_positive(a->src_dentry) -+ && !d_is_dir(a->src_dentry))) -+ goto out_free; -+ lock_flags |= AuLock_DIRS; -+ } -+ err = aufs_read_and_write_lock2(a->dst_dentry, a->src_dentry, -+ lock_flags); -+ if (unlikely(err)) -+ goto out_free; -+ -+ err = au_d_hashed_positive(a->src_dentry); -+ if (unlikely(err)) -+ goto out_unlock; -+ err = -ENOENT; -+ if (a->dst_inode) { -+ /* -+ * If it is a dir, VFS unhash it before this -+ * function. It means we cannot rely upon d_unhashed(). -+ */ -+ if (unlikely(!a->dst_inode->i_nlink)) -+ goto out_unlock; -+ if (!au_ftest_ren(a->auren_flags, ISDIR_DST)) { -+ err = au_d_hashed_positive(a->dst_dentry); -+ if (unlikely(err && !a->exchange)) -+ goto out_unlock; -+ } else if (unlikely(IS_DEADDIR(a->dst_inode))) -+ goto out_unlock; -+ } else if (unlikely(d_unhashed(a->dst_dentry))) -+ goto out_unlock; -+ -+ /* -+ * is it possible? -+ * yes, it happened (in linux-3.3-rcN) but I don't know why. -+ * there may exist a problem somewhere else. -+ */ -+ err = -EINVAL; -+ if (unlikely(d_inode(a->dst_parent) == d_inode(a->src_dentry))) -+ goto out_unlock; -+ -+ au_fset_ren(a->auren_flags, ISSAMEDIR); /* temporary */ -+ di_write_lock_parent(a->dst_parent); -+ -+ /* which branch we process */ -+ err = au_ren_wbr(a); -+ if (unlikely(err < 0)) -+ goto out_parent; -+ a->br = au_sbr(a->dst_dentry->d_sb, a->btgt); -+ a->h_path.mnt = au_br_mnt(a->br); -+ -+ /* are they available to be renamed */ -+ err = au_ren_may_dir(a); -+ if (unlikely(err)) -+ goto out_children; -+ -+ /* prepare the writable parent dir on the same branch */ -+ if (a->dst_btop == a->btgt) { -+ au_fset_ren(a->auren_flags, WHDST); -+ } else { -+ err = au_cpup_dirs(a->dst_dentry, a->btgt); -+ if (unlikely(err)) -+ goto out_children; -+ } -+ -+ err = 0; -+ if (!a->exchange) { -+ if (a->src_dir != a->dst_dir) { -+ /* -+ * this temporary unlock is safe, -+ * because both dir->i_mutex are locked. -+ */ -+ di_write_unlock(a->dst_parent); -+ di_write_lock_parent(a->src_parent); -+ err = au_wr_dir_need_wh(a->src_dentry, -+ au_ftest_ren(a->auren_flags, -+ ISDIR_SRC), -+ &a->btgt); -+ di_write_unlock(a->src_parent); -+ di_write_lock2_parent(a->src_parent, a->dst_parent, -+ /*isdir*/1); -+ au_fclr_ren(a->auren_flags, ISSAMEDIR); -+ } else -+ err = au_wr_dir_need_wh(a->src_dentry, -+ au_ftest_ren(a->auren_flags, -+ ISDIR_SRC), -+ &a->btgt); -+ } -+ if (unlikely(err < 0)) -+ goto out_children; -+ if (err) -+ au_fset_ren(a->auren_flags, WHSRC); -+ -+ /* cpup src */ -+ if (a->src_btop != a->btgt) { -+ err = au_pin(&pin, a->src_dentry, a->btgt, -+ au_opt_udba(a->src_dentry->d_sb), -+ AuPin_DI_LOCKED | AuPin_MNT_WRITE); -+ if (!err) { -+ struct au_cp_generic cpg = { -+ .dentry = a->src_dentry, -+ .bdst = a->btgt, -+ .bsrc = a->src_btop, -+ .len = -1, -+ .pin = &pin, -+ .flags = AuCpup_DTIME | AuCpup_HOPEN -+ }; -+ AuDebugOn(au_dbtop(a->src_dentry) != a->src_btop); -+ err = au_sio_cpup_simple(&cpg); -+ au_unpin(&pin); -+ } -+ if (unlikely(err)) -+ goto out_children; -+ a->src_btop = a->btgt; -+ a->src_h_dentry = au_h_dptr(a->src_dentry, a->btgt); -+ if (!a->exchange) -+ au_fset_ren(a->auren_flags, WHSRC); -+ } -+ -+ /* cpup dst */ -+ if (a->exchange && a->dst_inode -+ && a->dst_btop != a->btgt) { -+ err = au_pin(&pin, a->dst_dentry, a->btgt, -+ au_opt_udba(a->dst_dentry->d_sb), -+ AuPin_DI_LOCKED | AuPin_MNT_WRITE); -+ if (!err) { -+ struct au_cp_generic cpg = { -+ .dentry = a->dst_dentry, -+ .bdst = a->btgt, -+ .bsrc = a->dst_btop, -+ .len = -1, -+ .pin = &pin, -+ .flags = AuCpup_DTIME | AuCpup_HOPEN -+ }; -+ err = au_sio_cpup_simple(&cpg); -+ au_unpin(&pin); -+ } -+ if (unlikely(err)) -+ goto out_children; -+ a->dst_btop = a->btgt; -+ a->dst_h_dentry = au_h_dptr(a->dst_dentry, a->btgt); -+ } -+ -+ /* lock them all */ -+ err = au_ren_lock(a); -+ if (unlikely(err)) -+ /* leave the copied-up one */ -+ goto out_children; -+ -+ if (!a->exchange) { -+ if (!au_opt_test(au_mntflags(a->dst_dir->i_sb), UDBA_NONE)) -+ err = au_may_ren(a); -+ else if (unlikely(a->dst_dentry->d_name.len > AUFS_MAX_NAMELEN)) -+ err = -ENAMETOOLONG; -+ if (unlikely(err)) -+ goto out_hdir; -+ } -+ -+ /* store timestamps to be revertible */ -+ au_ren_dt(a); -+ -+ /* store dirren info */ -+ if (au_ftest_ren(a->auren_flags, DIRREN)) { -+ err = au_dr_rename(a->src_dentry, a->btgt, -+ &a->dst_dentry->d_name, &rev); -+ AuTraceErr(err); -+ if (unlikely(err)) -+ goto out_dt; -+ } -+ -+ /* here we go */ -+ err = do_rename(a); -+ if (unlikely(err)) -+ goto out_dirren; -+ -+ if (au_ftest_ren(a->auren_flags, DIRREN)) -+ au_dr_rename_fin(a->src_dentry, a->btgt, rev); -+ -+ /* update dir attributes */ -+ au_ren_refresh_dir(a); -+ -+ /* dput/iput all lower dentries */ -+ au_ren_refresh(a); -+ -+ goto out_hdir; /* success */ -+ -+out_dirren: -+ if (au_ftest_ren(a->auren_flags, DIRREN)) -+ au_dr_rename_rev(a->src_dentry, a->btgt, rev); -+out_dt: -+ au_ren_rev_dt(err, a); -+out_hdir: -+ au_ren_unlock(a); -+out_children: -+ au_nhash_wh_free(&a->whlist); -+ if (err && a->dst_inode && a->dst_btop != a->btgt) { -+ AuDbg("btop %d, btgt %d\n", a->dst_btop, a->btgt); -+ au_set_h_dptr(a->dst_dentry, a->btgt, NULL); -+ au_set_dbtop(a->dst_dentry, a->dst_btop); -+ } -+out_parent: -+ if (!err) { -+ if (d_unhashed(a->src_dentry)) -+ au_fset_ren(a->auren_flags, DROPPED_SRC); -+ if (d_unhashed(a->dst_dentry)) -+ au_fset_ren(a->auren_flags, DROPPED_DST); -+ if (!a->exchange) -+ d_move(a->src_dentry, a->dst_dentry); -+ else { -+ d_exchange(a->src_dentry, a->dst_dentry); -+ if (au_ftest_ren(a->auren_flags, DROPPED_DST)) -+ d_drop(a->dst_dentry); -+ } -+ if (au_ftest_ren(a->auren_flags, DROPPED_SRC)) -+ d_drop(a->src_dentry); -+ } else { -+ au_update_dbtop(a->dst_dentry); -+ if (!a->dst_inode) -+ d_drop(a->dst_dentry); -+ } -+ if (au_ftest_ren(a->auren_flags, ISSAMEDIR)) -+ di_write_unlock(a->dst_parent); -+ else -+ di_write_unlock2(a->src_parent, a->dst_parent); -+out_unlock: -+ aufs_read_and_write_unlock2(a->dst_dentry, a->src_dentry); -+out_free: -+ iput(a->dst_inode); -+ if (a->thargs) -+ au_whtmp_rmdir_free(a->thargs); -+ au_kfree_rcu(a); -+out: -+ AuTraceErr(err); -+ return err; -+} -diff --git a/fs/aufs/iinfo.c b/fs/aufs/iinfo.c -new file mode 100644 -index 000000000000..5a837d7d0a33 ---- /dev/null -+++ b/fs/aufs/iinfo.c -@@ -0,0 +1,273 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * inode private data -+ */ -+ -+#include "aufs.h" -+ -+struct inode *au_h_iptr(struct inode *inode, aufs_bindex_t bindex) -+{ -+ struct inode *h_inode; -+ struct au_hinode *hinode; -+ -+ IiMustAnyLock(inode); -+ -+ hinode = au_hinode(au_ii(inode), bindex); -+ h_inode = hinode->hi_inode; -+ AuDebugOn(h_inode && atomic_read(&h_inode->i_count) <= 0); -+ return h_inode; -+} -+ -+/* todo: hard/soft set? */ -+void au_hiput(struct au_hinode *hinode) -+{ -+ au_hn_free(hinode); -+ dput(hinode->hi_whdentry); -+ iput(hinode->hi_inode); -+} -+ -+unsigned int au_hi_flags(struct inode *inode, int isdir) -+{ -+ unsigned int flags; -+ const unsigned int mnt_flags = au_mntflags(inode->i_sb); -+ -+ flags = 0; -+ if (au_opt_test(mnt_flags, XINO)) -+ au_fset_hi(flags, XINO); -+ if (isdir && au_opt_test(mnt_flags, UDBA_HNOTIFY)) -+ au_fset_hi(flags, HNOTIFY); -+ return flags; -+} -+ -+void au_set_h_iptr(struct inode *inode, aufs_bindex_t bindex, -+ struct inode *h_inode, unsigned int flags) -+{ -+ struct au_hinode *hinode; -+ struct inode *hi; -+ struct au_iinfo *iinfo = au_ii(inode); -+ -+ IiMustWriteLock(inode); -+ -+ hinode = au_hinode(iinfo, bindex); -+ hi = hinode->hi_inode; -+ AuDebugOn(h_inode && atomic_read(&h_inode->i_count) <= 0); -+ -+ if (hi) -+ au_hiput(hinode); -+ hinode->hi_inode = h_inode; -+ if (h_inode) { -+ int err; -+ struct super_block *sb = inode->i_sb; -+ struct au_branch *br; -+ -+ AuDebugOn(inode->i_mode -+ && (h_inode->i_mode & S_IFMT) -+ != (inode->i_mode & S_IFMT)); -+ if (bindex == iinfo->ii_btop) -+ au_cpup_igen(inode, h_inode); -+ br = au_sbr(sb, bindex); -+ hinode->hi_id = br->br_id; -+ if (au_ftest_hi(flags, XINO)) { -+ err = au_xino_write(sb, bindex, h_inode->i_ino, -+ inode->i_ino); -+ if (unlikely(err)) -+ AuIOErr1("failed au_xino_write() %d\n", err); -+ } -+ -+ if (au_ftest_hi(flags, HNOTIFY) -+ && au_br_hnotifyable(br->br_perm)) { -+ err = au_hn_alloc(hinode, inode); -+ if (unlikely(err)) -+ AuIOErr1("au_hn_alloc() %d\n", err); -+ } -+ } -+} -+ -+void au_set_hi_wh(struct inode *inode, aufs_bindex_t bindex, -+ struct dentry *h_wh) -+{ -+ struct au_hinode *hinode; -+ -+ IiMustWriteLock(inode); -+ -+ hinode = au_hinode(au_ii(inode), bindex); -+ AuDebugOn(hinode->hi_whdentry); -+ hinode->hi_whdentry = h_wh; -+} -+ -+void au_update_iigen(struct inode *inode, int half) -+{ -+ struct au_iinfo *iinfo; -+ struct au_iigen *iigen; -+ unsigned int sigen; -+ -+ sigen = au_sigen(inode->i_sb); -+ iinfo = au_ii(inode); -+ iigen = &iinfo->ii_generation; -+ spin_lock(&iigen->ig_spin); -+ iigen->ig_generation = sigen; -+ if (half) -+ au_ig_fset(iigen->ig_flags, HALF_REFRESHED); -+ else -+ au_ig_fclr(iigen->ig_flags, HALF_REFRESHED); -+ spin_unlock(&iigen->ig_spin); -+} -+ -+/* it may be called at remount time, too */ -+void au_update_ibrange(struct inode *inode, int do_put_zero) -+{ -+ struct au_iinfo *iinfo; -+ aufs_bindex_t bindex, bbot; -+ -+ AuDebugOn(au_is_bad_inode(inode)); -+ IiMustWriteLock(inode); -+ -+ iinfo = au_ii(inode); -+ if (do_put_zero && iinfo->ii_btop >= 0) { -+ for (bindex = iinfo->ii_btop; bindex <= iinfo->ii_bbot; -+ bindex++) { -+ struct inode *h_i; -+ -+ h_i = au_hinode(iinfo, bindex)->hi_inode; -+ if (h_i -+ && !h_i->i_nlink -+ && !(h_i->i_state & I_LINKABLE)) -+ au_set_h_iptr(inode, bindex, NULL, 0); -+ } -+ } -+ -+ iinfo->ii_btop = -1; -+ iinfo->ii_bbot = -1; -+ bbot = au_sbbot(inode->i_sb); -+ for (bindex = 0; bindex <= bbot; bindex++) -+ if (au_hinode(iinfo, bindex)->hi_inode) { -+ iinfo->ii_btop = bindex; -+ break; -+ } -+ if (iinfo->ii_btop >= 0) -+ for (bindex = bbot; bindex >= iinfo->ii_btop; bindex--) -+ if (au_hinode(iinfo, bindex)->hi_inode) { -+ iinfo->ii_bbot = bindex; -+ break; -+ } -+ AuDebugOn(iinfo->ii_btop > iinfo->ii_bbot); -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+void au_icntnr_init_once(void *_c) -+{ -+ struct au_icntnr *c = _c; -+ struct au_iinfo *iinfo = &c->iinfo; -+ -+ spin_lock_init(&iinfo->ii_generation.ig_spin); -+ au_rw_init(&iinfo->ii_rwsem); -+ inode_init_once(&c->vfs_inode); -+} -+ -+void au_hinode_init(struct au_hinode *hinode) -+{ -+ hinode->hi_inode = NULL; -+ hinode->hi_id = -1; -+ au_hn_init(hinode); -+ hinode->hi_whdentry = NULL; -+} -+ -+int au_iinfo_init(struct inode *inode) -+{ -+ struct au_iinfo *iinfo; -+ struct super_block *sb; -+ struct au_hinode *hi; -+ int nbr, i; -+ -+ sb = inode->i_sb; -+ iinfo = &(container_of(inode, struct au_icntnr, vfs_inode)->iinfo); -+ nbr = au_sbbot(sb) + 1; -+ if (unlikely(nbr <= 0)) -+ nbr = 1; -+ hi = kmalloc_array(nbr, sizeof(*iinfo->ii_hinode), GFP_NOFS); -+ if (hi) { -+ au_lcnt_inc(&au_sbi(sb)->si_ninodes); -+ -+ iinfo->ii_hinode = hi; -+ for (i = 0; i < nbr; i++, hi++) -+ au_hinode_init(hi); -+ -+ iinfo->ii_generation.ig_generation = au_sigen(sb); -+ iinfo->ii_btop = -1; -+ iinfo->ii_bbot = -1; -+ iinfo->ii_vdir = NULL; -+ return 0; -+ } -+ return -ENOMEM; -+} -+ -+int au_hinode_realloc(struct au_iinfo *iinfo, int nbr, int may_shrink) -+{ -+ int err, i; -+ struct au_hinode *hip; -+ -+ AuRwMustWriteLock(&iinfo->ii_rwsem); -+ -+ err = -ENOMEM; -+ hip = au_krealloc(iinfo->ii_hinode, sizeof(*hip) * nbr, GFP_NOFS, -+ may_shrink); -+ if (hip) { -+ iinfo->ii_hinode = hip; -+ i = iinfo->ii_bbot + 1; -+ hip += i; -+ for (; i < nbr; i++, hip++) -+ au_hinode_init(hip); -+ err = 0; -+ } -+ -+ return err; -+} -+ -+void au_iinfo_fin(struct inode *inode) -+{ -+ struct au_iinfo *iinfo; -+ struct au_hinode *hi; -+ struct super_block *sb; -+ aufs_bindex_t bindex, bbot; -+ const unsigned char unlinked = !inode->i_nlink; -+ -+ AuDebugOn(au_is_bad_inode(inode)); -+ -+ sb = inode->i_sb; -+ au_lcnt_dec(&au_sbi(sb)->si_ninodes); -+ if (si_pid_test(sb)) -+ au_xino_delete_inode(inode, unlinked); -+ else { -+ /* -+ * it is safe to hide the dependency between sbinfo and -+ * sb->s_umount. -+ */ -+ lockdep_off(); -+ si_noflush_read_lock(sb); -+ au_xino_delete_inode(inode, unlinked); -+ si_read_unlock(sb); -+ lockdep_on(); -+ } -+ -+ iinfo = au_ii(inode); -+ if (iinfo->ii_vdir) -+ au_vdir_free(iinfo->ii_vdir); -+ -+ bindex = iinfo->ii_btop; -+ if (bindex >= 0) { -+ hi = au_hinode(iinfo, bindex); -+ bbot = iinfo->ii_bbot; -+ while (bindex++ <= bbot) { -+ if (hi->hi_inode) -+ au_hiput(hi); -+ hi++; -+ } -+ } -+ au_kfree_rcu(iinfo->ii_hinode); -+ AuRwDestroy(&iinfo->ii_rwsem); -+} -diff --git a/fs/aufs/inode.c b/fs/aufs/inode.c -new file mode 100644 -index 000000000000..c071e525f499 ---- /dev/null -+++ b/fs/aufs/inode.c -@@ -0,0 +1,516 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * inode functions -+ */ -+ -+#include -+#include "aufs.h" -+ -+struct inode *au_igrab(struct inode *inode) -+{ -+ if (inode) { -+ AuDebugOn(!atomic_read(&inode->i_count)); -+ ihold(inode); -+ } -+ return inode; -+} -+ -+static void au_refresh_hinode_attr(struct inode *inode, int do_version) -+{ -+ au_cpup_attr_all(inode, /*force*/0); -+ au_update_iigen(inode, /*half*/1); -+ if (do_version) -+ inode_inc_iversion(inode); -+} -+ -+static int au_ii_refresh(struct inode *inode, int *update) -+{ -+ int err, e, nbr; -+ umode_t type; -+ aufs_bindex_t bindex, new_bindex; -+ struct super_block *sb; -+ struct au_iinfo *iinfo; -+ struct au_hinode *p, *q, tmp; -+ -+ AuDebugOn(au_is_bad_inode(inode)); -+ IiMustWriteLock(inode); -+ -+ *update = 0; -+ sb = inode->i_sb; -+ nbr = au_sbbot(sb) + 1; -+ type = inode->i_mode & S_IFMT; -+ iinfo = au_ii(inode); -+ err = au_hinode_realloc(iinfo, nbr, /*may_shrink*/0); -+ if (unlikely(err)) -+ goto out; -+ -+ AuDebugOn(iinfo->ii_btop < 0); -+ p = au_hinode(iinfo, iinfo->ii_btop); -+ for (bindex = iinfo->ii_btop; bindex <= iinfo->ii_bbot; -+ bindex++, p++) { -+ if (!p->hi_inode) -+ continue; -+ -+ AuDebugOn(type != (p->hi_inode->i_mode & S_IFMT)); -+ new_bindex = au_br_index(sb, p->hi_id); -+ if (new_bindex == bindex) -+ continue; -+ -+ if (new_bindex < 0) { -+ *update = 1; -+ au_hiput(p); -+ p->hi_inode = NULL; -+ continue; -+ } -+ -+ if (new_bindex < iinfo->ii_btop) -+ iinfo->ii_btop = new_bindex; -+ if (iinfo->ii_bbot < new_bindex) -+ iinfo->ii_bbot = new_bindex; -+ /* swap two lower inode, and loop again */ -+ q = au_hinode(iinfo, new_bindex); -+ tmp = *q; -+ *q = *p; -+ *p = tmp; -+ if (tmp.hi_inode) { -+ bindex--; -+ p--; -+ } -+ } -+ au_update_ibrange(inode, /*do_put_zero*/0); -+ au_hinode_realloc(iinfo, nbr, /*may_shrink*/1); /* harmless if err */ -+ e = au_dy_irefresh(inode); -+ if (unlikely(e && !err)) -+ err = e; -+ -+out: -+ AuTraceErr(err); -+ return err; -+} -+ -+void au_refresh_iop(struct inode *inode, int force_getattr) -+{ -+ int type; -+ struct au_sbinfo *sbi = au_sbi(inode->i_sb); -+ const struct inode_operations *iop -+ = force_getattr ? aufs_iop : sbi->si_iop_array; -+ -+ if (inode->i_op == iop) -+ return; -+ -+ switch (inode->i_mode & S_IFMT) { -+ case S_IFDIR: -+ type = AuIop_DIR; -+ break; -+ case S_IFLNK: -+ type = AuIop_SYMLINK; -+ break; -+ default: -+ type = AuIop_OTHER; -+ break; -+ } -+ -+ inode->i_op = iop + type; -+ /* unnecessary smp_wmb() */ -+} -+ -+int au_refresh_hinode_self(struct inode *inode) -+{ -+ int err, update; -+ -+ err = au_ii_refresh(inode, &update); -+ if (!err) -+ au_refresh_hinode_attr(inode, update && S_ISDIR(inode->i_mode)); -+ -+ AuTraceErr(err); -+ return err; -+} -+ -+int au_refresh_hinode(struct inode *inode, struct dentry *dentry) -+{ -+ int err, e, update; -+ unsigned int flags; -+ umode_t mode; -+ aufs_bindex_t bindex, bbot; -+ unsigned char isdir; -+ struct au_hinode *p; -+ struct au_iinfo *iinfo; -+ -+ err = au_ii_refresh(inode, &update); -+ if (unlikely(err)) -+ goto out; -+ -+ update = 0; -+ iinfo = au_ii(inode); -+ p = au_hinode(iinfo, iinfo->ii_btop); -+ mode = (inode->i_mode & S_IFMT); -+ isdir = S_ISDIR(mode); -+ flags = au_hi_flags(inode, isdir); -+ bbot = au_dbbot(dentry); -+ for (bindex = au_dbtop(dentry); bindex <= bbot; bindex++) { -+ struct inode *h_i, *h_inode; -+ struct dentry *h_d; -+ -+ h_d = au_h_dptr(dentry, bindex); -+ if (!h_d || d_is_negative(h_d)) -+ continue; -+ -+ h_inode = d_inode(h_d); -+ AuDebugOn(mode != (h_inode->i_mode & S_IFMT)); -+ if (iinfo->ii_btop <= bindex && bindex <= iinfo->ii_bbot) { -+ h_i = au_h_iptr(inode, bindex); -+ if (h_i) { -+ if (h_i == h_inode) -+ continue; -+ err = -EIO; -+ break; -+ } -+ } -+ if (bindex < iinfo->ii_btop) -+ iinfo->ii_btop = bindex; -+ if (iinfo->ii_bbot < bindex) -+ iinfo->ii_bbot = bindex; -+ au_set_h_iptr(inode, bindex, au_igrab(h_inode), flags); -+ update = 1; -+ } -+ au_update_ibrange(inode, /*do_put_zero*/0); -+ e = au_dy_irefresh(inode); -+ if (unlikely(e && !err)) -+ err = e; -+ if (!err) -+ au_refresh_hinode_attr(inode, update && isdir); -+ -+out: -+ AuTraceErr(err); -+ return err; -+} -+ -+static int set_inode(struct inode *inode, struct dentry *dentry) -+{ -+ int err; -+ unsigned int flags; -+ umode_t mode; -+ aufs_bindex_t bindex, btop, btail; -+ unsigned char isdir; -+ struct dentry *h_dentry; -+ struct inode *h_inode; -+ struct au_iinfo *iinfo; -+ const struct inode_operations *iop; -+ -+ IiMustWriteLock(inode); -+ -+ err = 0; -+ isdir = 0; -+ iop = au_sbi(inode->i_sb)->si_iop_array; -+ btop = au_dbtop(dentry); -+ h_dentry = au_h_dptr(dentry, btop); -+ h_inode = d_inode(h_dentry); -+ mode = h_inode->i_mode; -+ switch (mode & S_IFMT) { -+ case S_IFREG: -+ btail = au_dbtail(dentry); -+ inode->i_op = iop + AuIop_OTHER; -+ inode->i_fop = &aufs_file_fop; -+ err = au_dy_iaop(inode, btop, h_inode); -+ if (unlikely(err)) -+ goto out; -+ break; -+ case S_IFDIR: -+ isdir = 1; -+ btail = au_dbtaildir(dentry); -+ inode->i_op = iop + AuIop_DIR; -+ inode->i_fop = &aufs_dir_fop; -+ break; -+ case S_IFLNK: -+ btail = au_dbtail(dentry); -+ inode->i_op = iop + AuIop_SYMLINK; -+ break; -+ case S_IFBLK: -+ case S_IFCHR: -+ case S_IFIFO: -+ case S_IFSOCK: -+ btail = au_dbtail(dentry); -+ inode->i_op = iop + AuIop_OTHER; -+ init_special_inode(inode, mode, h_inode->i_rdev); -+ break; -+ default: -+ AuIOErr("Unknown file type 0%o\n", mode); -+ err = -EIO; -+ goto out; -+ } -+ -+ /* do not set hnotify for whiteouted dirs (SHWH mode) */ -+ flags = au_hi_flags(inode, isdir); -+ if (au_opt_test(au_mntflags(dentry->d_sb), SHWH) -+ && au_ftest_hi(flags, HNOTIFY) -+ && dentry->d_name.len > AUFS_WH_PFX_LEN -+ && !memcmp(dentry->d_name.name, AUFS_WH_PFX, AUFS_WH_PFX_LEN)) -+ au_fclr_hi(flags, HNOTIFY); -+ iinfo = au_ii(inode); -+ iinfo->ii_btop = btop; -+ iinfo->ii_bbot = btail; -+ for (bindex = btop; bindex <= btail; bindex++) { -+ h_dentry = au_h_dptr(dentry, bindex); -+ if (h_dentry) -+ au_set_h_iptr(inode, bindex, -+ au_igrab(d_inode(h_dentry)), flags); -+ } -+ au_cpup_attr_all(inode, /*force*/1); -+ /* -+ * to force calling aufs_get_acl() every time, -+ * do not call cache_no_acl() for aufs inode. -+ */ -+ -+out: -+ return err; -+} -+ -+/* -+ * successful returns with iinfo write_locked -+ * minus: errno -+ * zero: success, matched -+ * plus: no error, but unmatched -+ */ -+static int reval_inode(struct inode *inode, struct dentry *dentry) -+{ -+ int err; -+ unsigned int gen, igflags; -+ aufs_bindex_t bindex, bbot; -+ struct inode *h_inode, *h_dinode; -+ struct dentry *h_dentry; -+ -+ /* -+ * before this function, if aufs got any iinfo lock, it must be only -+ * one, the parent dir. -+ * it can happen by UDBA and the obsoleted inode number. -+ */ -+ err = -EIO; -+ if (unlikely(inode->i_ino == parent_ino(dentry))) -+ goto out; -+ -+ err = 1; -+ ii_write_lock_new_child(inode); -+ h_dentry = au_h_dptr(dentry, au_dbtop(dentry)); -+ h_dinode = d_inode(h_dentry); -+ bbot = au_ibbot(inode); -+ for (bindex = au_ibtop(inode); bindex <= bbot; bindex++) { -+ h_inode = au_h_iptr(inode, bindex); -+ if (!h_inode || h_inode != h_dinode) -+ continue; -+ -+ err = 0; -+ gen = au_iigen(inode, &igflags); -+ if (gen == au_digen(dentry) -+ && !au_ig_ftest(igflags, HALF_REFRESHED)) -+ break; -+ -+ /* fully refresh inode using dentry */ -+ err = au_refresh_hinode(inode, dentry); -+ if (!err) -+ au_update_iigen(inode, /*half*/0); -+ break; -+ } -+ -+ if (unlikely(err)) -+ ii_write_unlock(inode); -+out: -+ return err; -+} -+ -+int au_ino(struct super_block *sb, aufs_bindex_t bindex, ino_t h_ino, -+ unsigned int d_type, ino_t *ino) -+{ -+ int err, idx; -+ const int isnondir = d_type != DT_DIR; -+ -+ /* prevent hardlinked inode number from race condition */ -+ if (isnondir) { -+ err = au_xinondir_enter(sb, bindex, h_ino, &idx); -+ if (unlikely(err)) -+ goto out; -+ } -+ -+ err = au_xino_read(sb, bindex, h_ino, ino); -+ if (unlikely(err)) -+ goto out_xinondir; -+ -+ if (!*ino) { -+ err = -EIO; -+ *ino = au_xino_new_ino(sb); -+ if (unlikely(!*ino)) -+ goto out_xinondir; -+ err = au_xino_write(sb, bindex, h_ino, *ino); -+ if (unlikely(err)) -+ goto out_xinondir; -+ } -+ -+out_xinondir: -+ if (isnondir && idx >= 0) -+ au_xinondir_leave(sb, bindex, h_ino, idx); -+out: -+ return err; -+} -+ -+/* successful returns with iinfo write_locked */ -+/* todo: return with unlocked? */ -+struct inode *au_new_inode(struct dentry *dentry, int must_new) -+{ -+ struct inode *inode, *h_inode; -+ struct dentry *h_dentry; -+ struct super_block *sb; -+ ino_t h_ino, ino; -+ int err, idx, hlinked; -+ aufs_bindex_t btop; -+ -+ sb = dentry->d_sb; -+ btop = au_dbtop(dentry); -+ h_dentry = au_h_dptr(dentry, btop); -+ h_inode = d_inode(h_dentry); -+ h_ino = h_inode->i_ino; -+ hlinked = !d_is_dir(h_dentry) && h_inode->i_nlink > 1; -+ -+new_ino: -+ /* -+ * stop 'race'-ing between hardlinks under different -+ * parents. -+ */ -+ if (hlinked) { -+ err = au_xinondir_enter(sb, btop, h_ino, &idx); -+ inode = ERR_PTR(err); -+ if (unlikely(err)) -+ goto out; -+ } -+ -+ err = au_xino_read(sb, btop, h_ino, &ino); -+ inode = ERR_PTR(err); -+ if (unlikely(err)) -+ goto out_xinondir; -+ -+ if (!ino) { -+ ino = au_xino_new_ino(sb); -+ if (unlikely(!ino)) { -+ inode = ERR_PTR(-EIO); -+ goto out_xinondir; -+ } -+ } -+ -+ AuDbg("i%lu\n", (unsigned long)ino); -+ inode = au_iget_locked(sb, ino); -+ err = PTR_ERR(inode); -+ if (IS_ERR(inode)) -+ goto out_xinondir; -+ -+ AuDbg("%lx, new %d\n", inode->i_state, !!(inode->i_state & I_NEW)); -+ if (inode->i_state & I_NEW) { -+ ii_write_lock_new_child(inode); -+ err = set_inode(inode, dentry); -+ if (!err) { -+ unlock_new_inode(inode); -+ goto out_xinondir; /* success */ -+ } -+ -+ /* -+ * iget_failed() calls iput(), but we need to call -+ * ii_write_unlock() after iget_failed(). so dirty hack for -+ * i_count. -+ */ -+ atomic_inc(&inode->i_count); -+ iget_failed(inode); -+ ii_write_unlock(inode); -+ au_xino_write(sb, btop, h_ino, /*ino*/0); -+ /* ignore this error */ -+ goto out_iput; -+ } else if (!must_new && !IS_DEADDIR(inode) && inode->i_nlink) { -+ /* -+ * horrible race condition between lookup, readdir and copyup -+ * (or something). -+ */ -+ if (hlinked && idx >= 0) -+ au_xinondir_leave(sb, btop, h_ino, idx); -+ err = reval_inode(inode, dentry); -+ if (unlikely(err < 0)) { -+ hlinked = 0; -+ goto out_iput; -+ } -+ if (!err) -+ goto out; /* success */ -+ else if (hlinked && idx >= 0) { -+ err = au_xinondir_enter(sb, btop, h_ino, &idx); -+ if (unlikely(err)) { -+ iput(inode); -+ inode = ERR_PTR(err); -+ goto out; -+ } -+ } -+ } -+ -+ if (unlikely(au_test_fs_unique_ino(h_inode))) -+ AuWarn1("Warning: Un-notified UDBA or repeatedly renamed dir," -+ " b%d, %s, %pd, hi%lu, i%lu.\n", -+ btop, au_sbtype(h_dentry->d_sb), dentry, -+ (unsigned long)h_ino, (unsigned long)ino); -+ ino = 0; -+ err = au_xino_write(sb, btop, h_ino, /*ino*/0); -+ if (!err) { -+ iput(inode); -+ if (hlinked && idx >= 0) -+ au_xinondir_leave(sb, btop, h_ino, idx); -+ goto new_ino; -+ } -+ -+out_iput: -+ iput(inode); -+ inode = ERR_PTR(err); -+out_xinondir: -+ if (hlinked && idx >= 0) -+ au_xinondir_leave(sb, btop, h_ino, idx); -+out: -+ return inode; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+int au_test_ro(struct super_block *sb, aufs_bindex_t bindex, -+ struct inode *inode) -+{ -+ int err; -+ struct inode *hi; -+ -+ err = au_br_rdonly(au_sbr(sb, bindex)); -+ -+ /* pseudo-link after flushed may happen out of bounds */ -+ if (!err -+ && inode -+ && au_ibtop(inode) <= bindex -+ && bindex <= au_ibbot(inode)) { -+ /* -+ * permission check is unnecessary since vfsub routine -+ * will be called later -+ */ -+ hi = au_h_iptr(inode, bindex); -+ if (hi) -+ err = IS_IMMUTABLE(hi) ? -EROFS : 0; -+ } -+ -+ return err; -+} -+ -+int au_test_h_perm(struct inode *h_inode, int mask) -+{ -+ if (uid_eq(current_fsuid(), GLOBAL_ROOT_UID)) -+ return 0; -+ return inode_permission(h_inode, mask); -+} -+ -+int au_test_h_perm_sio(struct inode *h_inode, int mask) -+{ -+ if (au_test_nfs(h_inode->i_sb) -+ && (mask & MAY_WRITE) -+ && S_ISDIR(h_inode->i_mode)) -+ mask |= MAY_READ; /* force permission check */ -+ return au_test_h_perm(h_inode, mask); -+} -diff --git a/fs/aufs/inode.h b/fs/aufs/inode.h -new file mode 100644 -index 000000000000..7f1992a3ef5c ---- /dev/null -+++ b/fs/aufs/inode.h -@@ -0,0 +1,685 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * inode operations -+ */ -+ -+#ifndef __AUFS_INODE_H__ -+#define __AUFS_INODE_H__ -+ -+#ifdef __KERNEL__ -+ -+#include -+#include "rwsem.h" -+ -+struct vfsmount; -+ -+struct au_hnotify { -+#ifdef CONFIG_AUFS_HNOTIFY -+#ifdef CONFIG_AUFS_HFSNOTIFY -+ /* never use fsnotify_add_vfsmount_mark() */ -+ struct fsnotify_mark hn_mark; -+#endif -+ struct inode *hn_aufs_inode; /* no get/put */ -+ struct rcu_head rcu; -+#endif -+} ____cacheline_aligned_in_smp; -+ -+struct au_hinode { -+ struct inode *hi_inode; -+ aufs_bindex_t hi_id; -+#ifdef CONFIG_AUFS_HNOTIFY -+ struct au_hnotify *hi_notify; -+#endif -+ -+ /* reference to the copied-up whiteout with get/put */ -+ struct dentry *hi_whdentry; -+}; -+ -+/* ig_flags */ -+#define AuIG_HALF_REFRESHED 1 -+#define au_ig_ftest(flags, name) ((flags) & AuIG_##name) -+#define au_ig_fset(flags, name) \ -+ do { (flags) |= AuIG_##name; } while (0) -+#define au_ig_fclr(flags, name) \ -+ do { (flags) &= ~AuIG_##name; } while (0) -+ -+struct au_iigen { -+ spinlock_t ig_spin; -+ __u32 ig_generation, ig_flags; -+}; -+ -+struct au_vdir; -+struct au_iinfo { -+ struct au_iigen ii_generation; -+ struct super_block *ii_hsb1; /* no get/put */ -+ -+ struct au_rwsem ii_rwsem; -+ aufs_bindex_t ii_btop, ii_bbot; -+ __u32 ii_higen; -+ struct au_hinode *ii_hinode; -+ struct au_vdir *ii_vdir; -+}; -+ -+struct au_icntnr { -+ struct au_iinfo iinfo; -+ struct inode vfs_inode; -+ struct hlist_bl_node plink; -+ struct rcu_head rcu; -+} ____cacheline_aligned_in_smp; -+ -+/* au_pin flags */ -+#define AuPin_DI_LOCKED 1 -+#define AuPin_MNT_WRITE (1 << 1) -+#define au_ftest_pin(flags, name) ((flags) & AuPin_##name) -+#define au_fset_pin(flags, name) \ -+ do { (flags) |= AuPin_##name; } while (0) -+#define au_fclr_pin(flags, name) \ -+ do { (flags) &= ~AuPin_##name; } while (0) -+ -+struct au_pin { -+ /* input */ -+ struct dentry *dentry; -+ unsigned int udba; -+ unsigned char lsc_di, lsc_hi, flags; -+ aufs_bindex_t bindex; -+ -+ /* output */ -+ struct dentry *parent; -+ struct au_hinode *hdir; -+ struct vfsmount *h_mnt; -+ -+ /* temporary unlock/relock for copyup */ -+ struct dentry *h_dentry, *h_parent; -+ struct au_branch *br; -+ struct task_struct *task; -+}; -+ -+void au_pin_hdir_unlock(struct au_pin *p); -+int au_pin_hdir_lock(struct au_pin *p); -+int au_pin_hdir_relock(struct au_pin *p); -+void au_pin_hdir_acquire_nest(struct au_pin *p); -+void au_pin_hdir_release(struct au_pin *p); -+ -+/* ---------------------------------------------------------------------- */ -+ -+static inline struct au_iinfo *au_ii(struct inode *inode) -+{ -+ BUG_ON(is_bad_inode(inode)); -+ return &(container_of(inode, struct au_icntnr, vfs_inode)->iinfo); -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* inode.c */ -+struct inode *au_igrab(struct inode *inode); -+void au_refresh_iop(struct inode *inode, int force_getattr); -+int au_refresh_hinode_self(struct inode *inode); -+int au_refresh_hinode(struct inode *inode, struct dentry *dentry); -+int au_ino(struct super_block *sb, aufs_bindex_t bindex, ino_t h_ino, -+ unsigned int d_type, ino_t *ino); -+struct inode *au_new_inode(struct dentry *dentry, int must_new); -+int au_test_ro(struct super_block *sb, aufs_bindex_t bindex, -+ struct inode *inode); -+int au_test_h_perm(struct inode *h_inode, int mask); -+int au_test_h_perm_sio(struct inode *h_inode, int mask); -+ -+static inline int au_wh_ino(struct super_block *sb, aufs_bindex_t bindex, -+ ino_t h_ino, unsigned int d_type, ino_t *ino) -+{ -+#ifdef CONFIG_AUFS_SHWH -+ return au_ino(sb, bindex, h_ino, d_type, ino); -+#else -+ return 0; -+#endif -+} -+ -+/* i_op.c */ -+enum { -+ AuIop_SYMLINK, -+ AuIop_DIR, -+ AuIop_OTHER, -+ AuIop_Last -+}; -+extern struct inode_operations aufs_iop[AuIop_Last], /* not const */ -+ aufs_iop_nogetattr[AuIop_Last]; -+ -+/* au_wr_dir flags */ -+#define AuWrDir_ADD_ENTRY 1 -+#define AuWrDir_ISDIR (1 << 1) -+#define AuWrDir_TMPFILE (1 << 2) -+#define au_ftest_wrdir(flags, name) ((flags) & AuWrDir_##name) -+#define au_fset_wrdir(flags, name) \ -+ do { (flags) |= AuWrDir_##name; } while (0) -+#define au_fclr_wrdir(flags, name) \ -+ do { (flags) &= ~AuWrDir_##name; } while (0) -+ -+struct au_wr_dir_args { -+ aufs_bindex_t force_btgt; -+ unsigned char flags; -+}; -+int au_wr_dir(struct dentry *dentry, struct dentry *src_dentry, -+ struct au_wr_dir_args *args); -+ -+struct dentry *au_pinned_h_parent(struct au_pin *pin); -+void au_pin_init(struct au_pin *pin, struct dentry *dentry, -+ aufs_bindex_t bindex, int lsc_di, int lsc_hi, -+ unsigned int udba, unsigned char flags); -+int au_pin(struct au_pin *pin, struct dentry *dentry, aufs_bindex_t bindex, -+ unsigned int udba, unsigned char flags) __must_check; -+int au_do_pin(struct au_pin *pin) __must_check; -+void au_unpin(struct au_pin *pin); -+int au_reval_for_attr(struct dentry *dentry, unsigned int sigen); -+ -+#define AuIcpup_DID_CPUP 1 -+#define au_ftest_icpup(flags, name) ((flags) & AuIcpup_##name) -+#define au_fset_icpup(flags, name) \ -+ do { (flags) |= AuIcpup_##name; } while (0) -+#define au_fclr_icpup(flags, name) \ -+ do { (flags) &= ~AuIcpup_##name; } while (0) -+ -+struct au_icpup_args { -+ unsigned char flags; -+ unsigned char pin_flags; -+ aufs_bindex_t btgt; -+ unsigned int udba; -+ struct au_pin pin; -+ struct path h_path; -+ struct inode *h_inode; -+}; -+ -+int au_pin_and_icpup(struct dentry *dentry, struct iattr *ia, -+ struct au_icpup_args *a); -+ -+int au_h_path_getattr(struct dentry *dentry, struct inode *inode, int force, -+ struct path *h_path, int locked); -+ -+/* i_op_add.c */ -+int au_may_add(struct dentry *dentry, aufs_bindex_t bindex, -+ struct dentry *h_parent, int isdir); -+int aufs_mknod(struct inode *dir, struct dentry *dentry, umode_t mode, -+ dev_t dev); -+int aufs_symlink(struct inode *dir, struct dentry *dentry, const char *symname); -+int aufs_create(struct inode *dir, struct dentry *dentry, umode_t mode, -+ bool want_excl); -+struct vfsub_aopen_args; -+int au_aopen_or_create(struct inode *dir, struct dentry *dentry, -+ struct vfsub_aopen_args *args); -+int aufs_tmpfile(struct inode *dir, struct dentry *dentry, umode_t mode); -+int aufs_link(struct dentry *src_dentry, struct inode *dir, -+ struct dentry *dentry); -+int aufs_mkdir(struct inode *dir, struct dentry *dentry, umode_t mode); -+ -+/* i_op_del.c */ -+int au_wr_dir_need_wh(struct dentry *dentry, int isdir, aufs_bindex_t *bcpup); -+int au_may_del(struct dentry *dentry, aufs_bindex_t bindex, -+ struct dentry *h_parent, int isdir); -+int aufs_unlink(struct inode *dir, struct dentry *dentry); -+int aufs_rmdir(struct inode *dir, struct dentry *dentry); -+ -+/* i_op_ren.c */ -+int au_wbr(struct dentry *dentry, aufs_bindex_t btgt); -+int aufs_rename(struct inode *src_dir, struct dentry *src_dentry, -+ struct inode *dir, struct dentry *dentry, -+ unsigned int flags); -+ -+/* iinfo.c */ -+struct inode *au_h_iptr(struct inode *inode, aufs_bindex_t bindex); -+void au_hiput(struct au_hinode *hinode); -+void au_set_hi_wh(struct inode *inode, aufs_bindex_t bindex, -+ struct dentry *h_wh); -+unsigned int au_hi_flags(struct inode *inode, int isdir); -+ -+/* hinode flags */ -+#define AuHi_XINO 1 -+#define AuHi_HNOTIFY (1 << 1) -+#define au_ftest_hi(flags, name) ((flags) & AuHi_##name) -+#define au_fset_hi(flags, name) \ -+ do { (flags) |= AuHi_##name; } while (0) -+#define au_fclr_hi(flags, name) \ -+ do { (flags) &= ~AuHi_##name; } while (0) -+ -+#ifndef CONFIG_AUFS_HNOTIFY -+#undef AuHi_HNOTIFY -+#define AuHi_HNOTIFY 0 -+#endif -+ -+void au_set_h_iptr(struct inode *inode, aufs_bindex_t bindex, -+ struct inode *h_inode, unsigned int flags); -+ -+void au_update_iigen(struct inode *inode, int half); -+void au_update_ibrange(struct inode *inode, int do_put_zero); -+ -+void au_icntnr_init_once(void *_c); -+void au_hinode_init(struct au_hinode *hinode); -+int au_iinfo_init(struct inode *inode); -+void au_iinfo_fin(struct inode *inode); -+int au_hinode_realloc(struct au_iinfo *iinfo, int nbr, int may_shrink); -+ -+#ifdef CONFIG_PROC_FS -+/* plink.c */ -+int au_plink_maint(struct super_block *sb, int flags); -+struct au_sbinfo; -+void au_plink_maint_leave(struct au_sbinfo *sbinfo); -+int au_plink_maint_enter(struct super_block *sb); -+#ifdef CONFIG_AUFS_DEBUG -+void au_plink_list(struct super_block *sb); -+#else -+AuStubVoid(au_plink_list, struct super_block *sb) -+#endif -+int au_plink_test(struct inode *inode); -+struct dentry *au_plink_lkup(struct inode *inode, aufs_bindex_t bindex); -+void au_plink_append(struct inode *inode, aufs_bindex_t bindex, -+ struct dentry *h_dentry); -+void au_plink_put(struct super_block *sb, int verbose); -+void au_plink_clean(struct super_block *sb, int verbose); -+void au_plink_half_refresh(struct super_block *sb, aufs_bindex_t br_id); -+#else -+AuStubInt0(au_plink_maint, struct super_block *sb, int flags); -+AuStubVoid(au_plink_maint_leave, struct au_sbinfo *sbinfo); -+AuStubInt0(au_plink_maint_enter, struct super_block *sb); -+AuStubVoid(au_plink_list, struct super_block *sb); -+AuStubInt0(au_plink_test, struct inode *inode); -+AuStub(struct dentry *, au_plink_lkup, return NULL, -+ struct inode *inode, aufs_bindex_t bindex); -+AuStubVoid(au_plink_append, struct inode *inode, aufs_bindex_t bindex, -+ struct dentry *h_dentry); -+AuStubVoid(au_plink_put, struct super_block *sb, int verbose); -+AuStubVoid(au_plink_clean, struct super_block *sb, int verbose); -+AuStubVoid(au_plink_half_refresh, struct super_block *sb, aufs_bindex_t br_id); -+#endif /* CONFIG_PROC_FS */ -+ -+#ifdef CONFIG_AUFS_XATTR -+/* xattr.c */ -+int au_cpup_xattr(struct dentry *h_dst, struct dentry *h_src, int ignore_flags, -+ unsigned int verbose); -+ssize_t aufs_listxattr(struct dentry *dentry, char *list, size_t size); -+void au_xattr_init(struct super_block *sb); -+#else -+AuStubInt0(au_cpup_xattr, struct dentry *h_dst, struct dentry *h_src, -+ int ignore_flags, unsigned int verbose); -+AuStubVoid(au_xattr_init, struct super_block *sb); -+#endif -+ -+#ifdef CONFIG_FS_POSIX_ACL -+struct posix_acl *aufs_get_acl(struct inode *inode, int type); -+int aufs_set_acl(struct inode *inode, struct posix_acl *acl, int type); -+#endif -+ -+#if IS_ENABLED(CONFIG_AUFS_XATTR) || IS_ENABLED(CONFIG_FS_POSIX_ACL) -+enum { -+ AU_XATTR_SET, -+ AU_ACL_SET -+}; -+ -+struct au_sxattr { -+ int type; -+ union { -+ struct { -+ const char *name; -+ const void *value; -+ size_t size; -+ int flags; -+ } set; -+ struct { -+ struct posix_acl *acl; -+ int type; -+ } acl_set; -+ } u; -+}; -+ssize_t au_sxattr(struct dentry *dentry, struct inode *inode, -+ struct au_sxattr *arg); -+#endif -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* lock subclass for iinfo */ -+enum { -+ AuLsc_II_CHILD, /* child first */ -+ AuLsc_II_CHILD2, /* rename(2), link(2), and cpup at hnotify */ -+ AuLsc_II_CHILD3, /* copyup dirs */ -+ AuLsc_II_PARENT, /* see AuLsc_I_PARENT in vfsub.h */ -+ AuLsc_II_PARENT2, -+ AuLsc_II_PARENT3, /* copyup dirs */ -+ AuLsc_II_NEW_CHILD -+}; -+ -+/* -+ * ii_read_lock_child, ii_write_lock_child, -+ * ii_read_lock_child2, ii_write_lock_child2, -+ * ii_read_lock_child3, ii_write_lock_child3, -+ * ii_read_lock_parent, ii_write_lock_parent, -+ * ii_read_lock_parent2, ii_write_lock_parent2, -+ * ii_read_lock_parent3, ii_write_lock_parent3, -+ * ii_read_lock_new_child, ii_write_lock_new_child, -+ */ -+#define AuReadLockFunc(name, lsc) \ -+static inline void ii_read_lock_##name(struct inode *i) \ -+{ \ -+ au_rw_read_lock_nested(&au_ii(i)->ii_rwsem, AuLsc_II_##lsc); \ -+} -+ -+#define AuWriteLockFunc(name, lsc) \ -+static inline void ii_write_lock_##name(struct inode *i) \ -+{ \ -+ au_rw_write_lock_nested(&au_ii(i)->ii_rwsem, AuLsc_II_##lsc); \ -+} -+ -+#define AuRWLockFuncs(name, lsc) \ -+ AuReadLockFunc(name, lsc) \ -+ AuWriteLockFunc(name, lsc) -+ -+AuRWLockFuncs(child, CHILD); -+AuRWLockFuncs(child2, CHILD2); -+AuRWLockFuncs(child3, CHILD3); -+AuRWLockFuncs(parent, PARENT); -+AuRWLockFuncs(parent2, PARENT2); -+AuRWLockFuncs(parent3, PARENT3); -+AuRWLockFuncs(new_child, NEW_CHILD); -+ -+#undef AuReadLockFunc -+#undef AuWriteLockFunc -+#undef AuRWLockFuncs -+ -+#define ii_read_unlock(i) au_rw_read_unlock(&au_ii(i)->ii_rwsem) -+#define ii_write_unlock(i) au_rw_write_unlock(&au_ii(i)->ii_rwsem) -+#define ii_downgrade_lock(i) au_rw_dgrade_lock(&au_ii(i)->ii_rwsem) -+ -+#define IiMustNoWaiters(i) AuRwMustNoWaiters(&au_ii(i)->ii_rwsem) -+#define IiMustAnyLock(i) AuRwMustAnyLock(&au_ii(i)->ii_rwsem) -+#define IiMustWriteLock(i) AuRwMustWriteLock(&au_ii(i)->ii_rwsem) -+ -+/* ---------------------------------------------------------------------- */ -+ -+static inline void au_icntnr_init(struct au_icntnr *c) -+{ -+#ifdef CONFIG_AUFS_DEBUG -+ c->vfs_inode.i_mode = 0; -+#endif -+} -+ -+static inline unsigned int au_iigen(struct inode *inode, unsigned int *igflags) -+{ -+ unsigned int gen; -+ struct au_iinfo *iinfo; -+ struct au_iigen *iigen; -+ -+ iinfo = au_ii(inode); -+ iigen = &iinfo->ii_generation; -+ spin_lock(&iigen->ig_spin); -+ if (igflags) -+ *igflags = iigen->ig_flags; -+ gen = iigen->ig_generation; -+ spin_unlock(&iigen->ig_spin); -+ -+ return gen; -+} -+ -+/* tiny test for inode number */ -+/* tmpfs generation is too rough */ -+static inline int au_test_higen(struct inode *inode, struct inode *h_inode) -+{ -+ struct au_iinfo *iinfo; -+ -+ iinfo = au_ii(inode); -+ AuRwMustAnyLock(&iinfo->ii_rwsem); -+ return !(iinfo->ii_hsb1 == h_inode->i_sb -+ && iinfo->ii_higen == h_inode->i_generation); -+} -+ -+static inline void au_iigen_dec(struct inode *inode) -+{ -+ struct au_iinfo *iinfo; -+ struct au_iigen *iigen; -+ -+ iinfo = au_ii(inode); -+ iigen = &iinfo->ii_generation; -+ spin_lock(&iigen->ig_spin); -+ iigen->ig_generation--; -+ spin_unlock(&iigen->ig_spin); -+} -+ -+static inline int au_iigen_test(struct inode *inode, unsigned int sigen) -+{ -+ int err; -+ -+ err = 0; -+ if (unlikely(inode && au_iigen(inode, NULL) != sigen)) -+ err = -EIO; -+ -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+static inline struct au_hinode *au_hinode(struct au_iinfo *iinfo, -+ aufs_bindex_t bindex) -+{ -+ return iinfo->ii_hinode + bindex; -+} -+ -+static inline int au_is_bad_inode(struct inode *inode) -+{ -+ return !!(is_bad_inode(inode) || !au_hinode(au_ii(inode), 0)); -+} -+ -+static inline aufs_bindex_t au_ii_br_id(struct inode *inode, -+ aufs_bindex_t bindex) -+{ -+ IiMustAnyLock(inode); -+ return au_hinode(au_ii(inode), bindex)->hi_id; -+} -+ -+static inline aufs_bindex_t au_ibtop(struct inode *inode) -+{ -+ IiMustAnyLock(inode); -+ return au_ii(inode)->ii_btop; -+} -+ -+static inline aufs_bindex_t au_ibbot(struct inode *inode) -+{ -+ IiMustAnyLock(inode); -+ return au_ii(inode)->ii_bbot; -+} -+ -+static inline struct au_vdir *au_ivdir(struct inode *inode) -+{ -+ IiMustAnyLock(inode); -+ return au_ii(inode)->ii_vdir; -+} -+ -+static inline struct dentry *au_hi_wh(struct inode *inode, aufs_bindex_t bindex) -+{ -+ IiMustAnyLock(inode); -+ return au_hinode(au_ii(inode), bindex)->hi_whdentry; -+} -+ -+static inline void au_set_ibtop(struct inode *inode, aufs_bindex_t bindex) -+{ -+ IiMustWriteLock(inode); -+ au_ii(inode)->ii_btop = bindex; -+} -+ -+static inline void au_set_ibbot(struct inode *inode, aufs_bindex_t bindex) -+{ -+ IiMustWriteLock(inode); -+ au_ii(inode)->ii_bbot = bindex; -+} -+ -+static inline void au_set_ivdir(struct inode *inode, struct au_vdir *vdir) -+{ -+ IiMustWriteLock(inode); -+ au_ii(inode)->ii_vdir = vdir; -+} -+ -+static inline struct au_hinode *au_hi(struct inode *inode, aufs_bindex_t bindex) -+{ -+ IiMustAnyLock(inode); -+ return au_hinode(au_ii(inode), bindex); -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+static inline struct dentry *au_pinned_parent(struct au_pin *pin) -+{ -+ if (pin) -+ return pin->parent; -+ return NULL; -+} -+ -+static inline struct inode *au_pinned_h_dir(struct au_pin *pin) -+{ -+ if (pin && pin->hdir) -+ return pin->hdir->hi_inode; -+ return NULL; -+} -+ -+static inline struct au_hinode *au_pinned_hdir(struct au_pin *pin) -+{ -+ if (pin) -+ return pin->hdir; -+ return NULL; -+} -+ -+static inline void au_pin_set_dentry(struct au_pin *pin, struct dentry *dentry) -+{ -+ if (pin) -+ pin->dentry = dentry; -+} -+ -+static inline void au_pin_set_parent_lflag(struct au_pin *pin, -+ unsigned char lflag) -+{ -+ if (pin) { -+ if (lflag) -+ au_fset_pin(pin->flags, DI_LOCKED); -+ else -+ au_fclr_pin(pin->flags, DI_LOCKED); -+ } -+} -+ -+#if 0 /* reserved */ -+static inline void au_pin_set_parent(struct au_pin *pin, struct dentry *parent) -+{ -+ if (pin) { -+ dput(pin->parent); -+ pin->parent = dget(parent); -+ } -+} -+#endif -+ -+/* ---------------------------------------------------------------------- */ -+ -+struct au_branch; -+#ifdef CONFIG_AUFS_HNOTIFY -+struct au_hnotify_op { -+ void (*ctl)(struct au_hinode *hinode, int do_set); -+ int (*alloc)(struct au_hinode *hinode); -+ -+ /* -+ * if it returns true, the caller should free hinode->hi_notify, -+ * otherwise ->free() frees it. -+ */ -+ int (*free)(struct au_hinode *hinode, -+ struct au_hnotify *hn) __must_check; -+ -+ void (*fin)(void); -+ int (*init)(void); -+ -+ int (*reset_br)(unsigned int udba, struct au_branch *br, int perm); -+ void (*fin_br)(struct au_branch *br); -+ int (*init_br)(struct au_branch *br, int perm); -+}; -+ -+/* hnotify.c */ -+int au_hn_alloc(struct au_hinode *hinode, struct inode *inode); -+void au_hn_free(struct au_hinode *hinode); -+void au_hn_ctl(struct au_hinode *hinode, int do_set); -+void au_hn_reset(struct inode *inode, unsigned int flags); -+int au_hnotify(struct inode *h_dir, struct au_hnotify *hnotify, u32 mask, -+ const struct qstr *h_child_qstr, struct inode *h_child_inode); -+int au_hnotify_reset_br(unsigned int udba, struct au_branch *br, int perm); -+int au_hnotify_init_br(struct au_branch *br, int perm); -+void au_hnotify_fin_br(struct au_branch *br); -+int __init au_hnotify_init(void); -+void au_hnotify_fin(void); -+ -+/* hfsnotify.c */ -+extern const struct au_hnotify_op au_hnotify_op; -+ -+static inline -+void au_hn_init(struct au_hinode *hinode) -+{ -+ hinode->hi_notify = NULL; -+} -+ -+static inline struct au_hnotify *au_hn(struct au_hinode *hinode) -+{ -+ return hinode->hi_notify; -+} -+ -+#else -+AuStub(int, au_hn_alloc, return -EOPNOTSUPP, -+ struct au_hinode *hinode __maybe_unused, -+ struct inode *inode __maybe_unused) -+AuStub(struct au_hnotify *, au_hn, return NULL, struct au_hinode *hinode) -+AuStubVoid(au_hn_free, struct au_hinode *hinode __maybe_unused) -+AuStubVoid(au_hn_ctl, struct au_hinode *hinode __maybe_unused, -+ int do_set __maybe_unused) -+AuStubVoid(au_hn_reset, struct inode *inode __maybe_unused, -+ unsigned int flags __maybe_unused) -+AuStubInt0(au_hnotify_reset_br, unsigned int udba __maybe_unused, -+ struct au_branch *br __maybe_unused, -+ int perm __maybe_unused) -+AuStubInt0(au_hnotify_init_br, struct au_branch *br __maybe_unused, -+ int perm __maybe_unused) -+AuStubVoid(au_hnotify_fin_br, struct au_branch *br __maybe_unused) -+AuStubInt0(__init au_hnotify_init, void) -+AuStubVoid(au_hnotify_fin, void) -+AuStubVoid(au_hn_init, struct au_hinode *hinode __maybe_unused) -+#endif /* CONFIG_AUFS_HNOTIFY */ -+ -+static inline void au_hn_suspend(struct au_hinode *hdir) -+{ -+ au_hn_ctl(hdir, /*do_set*/0); -+} -+ -+static inline void au_hn_resume(struct au_hinode *hdir) -+{ -+ au_hn_ctl(hdir, /*do_set*/1); -+} -+ -+static inline void au_hn_inode_lock(struct au_hinode *hdir) -+{ -+ inode_lock(hdir->hi_inode); -+ au_hn_suspend(hdir); -+} -+ -+static inline void au_hn_inode_lock_nested(struct au_hinode *hdir, -+ unsigned int sc __maybe_unused) -+{ -+ inode_lock_nested(hdir->hi_inode, sc); -+ au_hn_suspend(hdir); -+} -+ -+#if 0 /* unused */ -+#include "vfsub.h" -+static inline void au_hn_inode_lock_shared_nested(struct au_hinode *hdir, -+ unsigned int sc) -+{ -+ inode_lock_shared_nested(hdir->hi_inode, sc); -+ au_hn_suspend(hdir); -+} -+#endif -+ -+static inline void au_hn_inode_unlock(struct au_hinode *hdir) -+{ -+ au_hn_resume(hdir); -+ inode_unlock(hdir->hi_inode); -+} -+ -+#endif /* __KERNEL__ */ -+#endif /* __AUFS_INODE_H__ */ -diff --git a/fs/aufs/ioctl.c b/fs/aufs/ioctl.c -new file mode 100644 -index 000000000000..9d0e969217a9 ---- /dev/null -+++ b/fs/aufs/ioctl.c -@@ -0,0 +1,207 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * ioctl -+ * plink-management and readdir in userspace. -+ * assist the pathconf(3) wrapper library. -+ * move-down -+ * File-based Hierarchical Storage Management. -+ */ -+ -+#include -+#include -+#include "aufs.h" -+ -+static int au_wbr_fd(struct path *path, struct aufs_wbr_fd __user *arg) -+{ -+ int err, fd; -+ aufs_bindex_t wbi, bindex, bbot; -+ struct file *h_file; -+ struct super_block *sb; -+ struct dentry *root; -+ struct au_branch *br; -+ struct aufs_wbr_fd wbrfd = { -+ .oflags = au_dir_roflags, -+ .brid = -1 -+ }; -+ const int valid = O_RDONLY | O_NONBLOCK | O_LARGEFILE | O_DIRECTORY -+ | O_NOATIME | O_CLOEXEC; -+ -+ AuDebugOn(wbrfd.oflags & ~valid); -+ -+ if (arg) { -+ err = copy_from_user(&wbrfd, arg, sizeof(wbrfd)); -+ if (unlikely(err)) { -+ err = -EFAULT; -+ goto out; -+ } -+ -+ err = -EINVAL; -+ AuDbg("wbrfd{0%o, %d}\n", wbrfd.oflags, wbrfd.brid); -+ wbrfd.oflags |= au_dir_roflags; -+ AuDbg("0%o\n", wbrfd.oflags); -+ if (unlikely(wbrfd.oflags & ~valid)) -+ goto out; -+ } -+ -+ fd = get_unused_fd_flags(0); -+ err = fd; -+ if (unlikely(fd < 0)) -+ goto out; -+ -+ h_file = ERR_PTR(-EINVAL); -+ wbi = 0; -+ br = NULL; -+ sb = path->dentry->d_sb; -+ root = sb->s_root; -+ aufs_read_lock(root, AuLock_IR); -+ bbot = au_sbbot(sb); -+ if (wbrfd.brid >= 0) { -+ wbi = au_br_index(sb, wbrfd.brid); -+ if (unlikely(wbi < 0 || wbi > bbot)) -+ goto out_unlock; -+ } -+ -+ h_file = ERR_PTR(-ENOENT); -+ br = au_sbr(sb, wbi); -+ if (!au_br_writable(br->br_perm)) { -+ if (arg) -+ goto out_unlock; -+ -+ bindex = wbi + 1; -+ wbi = -1; -+ for (; bindex <= bbot; bindex++) { -+ br = au_sbr(sb, bindex); -+ if (au_br_writable(br->br_perm)) { -+ wbi = bindex; -+ br = au_sbr(sb, wbi); -+ break; -+ } -+ } -+ } -+ AuDbg("wbi %d\n", wbi); -+ if (wbi >= 0) -+ h_file = au_h_open(root, wbi, wbrfd.oflags, NULL, -+ /*force_wr*/0); -+ -+out_unlock: -+ aufs_read_unlock(root, AuLock_IR); -+ err = PTR_ERR(h_file); -+ if (IS_ERR(h_file)) -+ goto out_fd; -+ -+ au_lcnt_dec(&br->br_nfiles); /* cf. au_h_open() */ -+ fd_install(fd, h_file); -+ err = fd; -+ goto out; /* success */ -+ -+out_fd: -+ put_unused_fd(fd); -+out: -+ AuTraceErr(err); -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+long aufs_ioctl_dir(struct file *file, unsigned int cmd, unsigned long arg) -+{ -+ long err; -+ struct dentry *dentry; -+ -+ switch (cmd) { -+ case AUFS_CTL_RDU: -+ case AUFS_CTL_RDU_INO: -+ err = au_rdu_ioctl(file, cmd, arg); -+ break; -+ -+ case AUFS_CTL_WBR_FD: -+ err = au_wbr_fd(&file->f_path, (void __user *)arg); -+ break; -+ -+ case AUFS_CTL_IBUSY: -+ err = au_ibusy_ioctl(file, arg); -+ break; -+ -+ case AUFS_CTL_BRINFO: -+ err = au_brinfo_ioctl(file, arg); -+ break; -+ -+ case AUFS_CTL_FHSM_FD: -+ dentry = file->f_path.dentry; -+ if (IS_ROOT(dentry)) -+ err = au_fhsm_fd(dentry->d_sb, arg); -+ else -+ err = -ENOTTY; -+ break; -+ -+ default: -+ /* do not call the lower */ -+ AuDbg("0x%x\n", cmd); -+ err = -ENOTTY; -+ } -+ -+ AuTraceErr(err); -+ return err; -+} -+ -+long aufs_ioctl_nondir(struct file *file, unsigned int cmd, unsigned long arg) -+{ -+ long err; -+ -+ switch (cmd) { -+ case AUFS_CTL_MVDOWN: -+ err = au_mvdown(file->f_path.dentry, (void __user *)arg); -+ break; -+ -+ case AUFS_CTL_WBR_FD: -+ err = au_wbr_fd(&file->f_path, (void __user *)arg); -+ break; -+ -+ default: -+ /* do not call the lower */ -+ AuDbg("0x%x\n", cmd); -+ err = -ENOTTY; -+ } -+ -+ AuTraceErr(err); -+ return err; -+} -+ -+#ifdef CONFIG_COMPAT -+long aufs_compat_ioctl_dir(struct file *file, unsigned int cmd, -+ unsigned long arg) -+{ -+ long err; -+ -+ switch (cmd) { -+ case AUFS_CTL_RDU: -+ case AUFS_CTL_RDU_INO: -+ err = au_rdu_compat_ioctl(file, cmd, arg); -+ break; -+ -+ case AUFS_CTL_IBUSY: -+ err = au_ibusy_compat_ioctl(file, arg); -+ break; -+ -+ case AUFS_CTL_BRINFO: -+ err = au_brinfo_compat_ioctl(file, arg); -+ break; -+ -+ default: -+ err = aufs_ioctl_dir(file, cmd, arg); -+ } -+ -+ AuTraceErr(err); -+ return err; -+} -+ -+long aufs_compat_ioctl_nondir(struct file *file, unsigned int cmd, -+ unsigned long arg) -+{ -+ return aufs_ioctl_nondir(file, cmd, (unsigned long)compat_ptr(arg)); -+} -+#endif -diff --git a/fs/aufs/lcnt.h b/fs/aufs/lcnt.h -new file mode 100644 -index 000000000000..c7db43d9e260 ---- /dev/null -+++ b/fs/aufs/lcnt.h -@@ -0,0 +1,173 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * Copyright (C) 2018-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * simple long counter wrapper -+ */ -+ -+#ifndef __AUFS_LCNT_H__ -+#define __AUFS_LCNT_H__ -+ -+#ifdef __KERNEL__ -+ -+#include "debug.h" -+ -+#define AuLCntATOMIC 1 -+#define AuLCntPCPUCNT 2 -+/* -+ * why does percpu_refcount require extra synchronize_rcu()s in -+ * au_br_do_free() -+ */ -+#define AuLCntPCPUREF 3 -+ -+/* #define AuLCntChosen AuLCntATOMIC */ -+#define AuLCntChosen AuLCntPCPUCNT -+/* #define AuLCntChosen AuLCntPCPUREF */ -+ -+#if AuLCntChosen == AuLCntATOMIC -+#include -+ -+typedef atomic_long_t au_lcnt_t; -+ -+static inline int au_lcnt_init(au_lcnt_t *cnt, void *release __maybe_unused) -+{ -+ atomic_long_set(cnt, 0); -+ return 0; -+} -+ -+static inline void au_lcnt_wait_for_fin(au_lcnt_t *cnt __maybe_unused) -+{ -+ /* empty */ -+} -+ -+static inline void au_lcnt_fin(au_lcnt_t *cnt __maybe_unused, -+ int do_sync __maybe_unused) -+{ -+ /* empty */ -+} -+ -+static inline void au_lcnt_inc(au_lcnt_t *cnt) -+{ -+ atomic_long_inc(cnt); -+} -+ -+static inline void au_lcnt_dec(au_lcnt_t *cnt) -+{ -+ atomic_long_dec(cnt); -+} -+ -+static inline long au_lcnt_read(au_lcnt_t *cnt, int do_rev __maybe_unused) -+{ -+ return atomic_long_read(cnt); -+} -+#endif -+ -+#if AuLCntChosen == AuLCntPCPUCNT -+#include -+ -+typedef struct percpu_counter au_lcnt_t; -+ -+static inline int au_lcnt_init(au_lcnt_t *cnt, void *release __maybe_unused) -+{ -+ return percpu_counter_init(cnt, 0, GFP_NOFS); -+} -+ -+static inline void au_lcnt_wait_for_fin(au_lcnt_t *cnt __maybe_unused) -+{ -+ /* empty */ -+} -+ -+static inline void au_lcnt_fin(au_lcnt_t *cnt, int do_sync __maybe_unused) -+{ -+ percpu_counter_destroy(cnt); -+} -+ -+static inline void au_lcnt_inc(au_lcnt_t *cnt) -+{ -+ percpu_counter_inc(cnt); -+} -+ -+static inline void au_lcnt_dec(au_lcnt_t *cnt) -+{ -+ percpu_counter_dec(cnt); -+} -+ -+static inline long au_lcnt_read(au_lcnt_t *cnt, int do_rev __maybe_unused) -+{ -+ s64 n; -+ -+ n = percpu_counter_sum(cnt); -+ BUG_ON(n < 0); -+ if (LONG_MAX != LLONG_MAX -+ && n > LONG_MAX) -+ AuWarn1("%s\n", "wrap-around"); -+ -+ return n; -+} -+#endif -+ -+#if AuLCntChosen == AuLCntPCPUREF -+#include -+ -+typedef struct percpu_ref au_lcnt_t; -+ -+static inline int au_lcnt_init(au_lcnt_t *cnt, percpu_ref_func_t *release) -+{ -+ if (!release) -+ release = percpu_ref_exit; -+ return percpu_ref_init(cnt, release, /*percpu mode*/0, GFP_NOFS); -+} -+ -+static inline void au_lcnt_wait_for_fin(au_lcnt_t *cnt __maybe_unused) -+{ -+ synchronize_rcu(); -+} -+ -+static inline void au_lcnt_fin(au_lcnt_t *cnt, int do_sync) -+{ -+ percpu_ref_kill(cnt); -+ if (do_sync) -+ au_lcnt_wait_for_fin(cnt); -+} -+ -+static inline void au_lcnt_inc(au_lcnt_t *cnt) -+{ -+ percpu_ref_get(cnt); -+} -+ -+static inline void au_lcnt_dec(au_lcnt_t *cnt) -+{ -+ percpu_ref_put(cnt); -+} -+ -+/* -+ * avoid calling this func as possible. -+ */ -+static inline long au_lcnt_read(au_lcnt_t *cnt, int do_rev) -+{ -+ long l; -+ -+ percpu_ref_switch_to_atomic_sync(cnt); -+ l = atomic_long_read(&cnt->count); -+ if (do_rev) -+ percpu_ref_switch_to_percpu(cnt); -+ -+ /* percpu_ref is initialized by 1 instead of 0 */ -+ return l - 1; -+} -+#endif -+ -+#ifdef CONFIG_AUFS_DEBUG -+#define AuLCntZero(val) do { \ -+ long l = val; \ -+ if (l) \ -+ AuDbg("%s = %ld\n", #val, l); \ -+} while (0) -+#else -+#define AuLCntZero(val) do {} while (0) -+#endif -+ -+#endif /* __KERNEL__ */ -+#endif /* __AUFS_LCNT_H__ */ -diff --git a/fs/aufs/loop.c b/fs/aufs/loop.c -new file mode 100644 -index 000000000000..a8b63acc6204 ---- /dev/null -+++ b/fs/aufs/loop.c -@@ -0,0 +1,135 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * support for loopback block device as a branch -+ */ -+ -+#include "aufs.h" -+ -+/* added into drivers/block/loop.c */ -+static struct file *(*backing_file_func)(struct super_block *sb); -+ -+/* -+ * test if two lower dentries have overlapping branches. -+ */ -+int au_test_loopback_overlap(struct super_block *sb, struct dentry *h_adding) -+{ -+ struct super_block *h_sb; -+ struct file *backing_file; -+ -+ if (unlikely(!backing_file_func)) { -+ /* don't load "loop" module here */ -+ backing_file_func = symbol_get(loop_backing_file); -+ if (unlikely(!backing_file_func)) -+ /* "loop" module is not loaded */ -+ return 0; -+ } -+ -+ h_sb = h_adding->d_sb; -+ backing_file = backing_file_func(h_sb); -+ if (!backing_file) -+ return 0; -+ -+ h_adding = backing_file->f_path.dentry; -+ /* -+ * h_adding can be local NFS. -+ * in this case aufs cannot detect the loop. -+ */ -+ if (unlikely(h_adding->d_sb == sb)) -+ return 1; -+ return !!au_test_subdir(h_adding, sb->s_root); -+} -+ -+/* true if a kernel thread named 'loop[0-9].*' accesses a file */ -+int au_test_loopback_kthread(void) -+{ -+ int ret; -+ struct task_struct *tsk = current; -+ char c, comm[sizeof(tsk->comm)]; -+ -+ ret = 0; -+ if (tsk->flags & PF_KTHREAD) { -+ get_task_comm(comm, tsk); -+ c = comm[4]; -+ ret = ('0' <= c && c <= '9' -+ && !strncmp(comm, "loop", 4)); -+ } -+ -+ return ret; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+#define au_warn_loopback_step 16 -+static int au_warn_loopback_nelem = au_warn_loopback_step; -+static unsigned long *au_warn_loopback_array; -+ -+void au_warn_loopback(struct super_block *h_sb) -+{ -+ int i, new_nelem; -+ unsigned long *a, magic; -+ static DEFINE_SPINLOCK(spin); -+ -+ magic = h_sb->s_magic; -+ spin_lock(&spin); -+ a = au_warn_loopback_array; -+ for (i = 0; i < au_warn_loopback_nelem && *a; i++) -+ if (a[i] == magic) { -+ spin_unlock(&spin); -+ return; -+ } -+ -+ /* h_sb is new to us, print it */ -+ if (i < au_warn_loopback_nelem) { -+ a[i] = magic; -+ goto pr; -+ } -+ -+ /* expand the array */ -+ new_nelem = au_warn_loopback_nelem + au_warn_loopback_step; -+ a = au_kzrealloc(au_warn_loopback_array, -+ au_warn_loopback_nelem * sizeof(unsigned long), -+ new_nelem * sizeof(unsigned long), GFP_ATOMIC, -+ /*may_shrink*/0); -+ if (a) { -+ au_warn_loopback_nelem = new_nelem; -+ au_warn_loopback_array = a; -+ a[i] = magic; -+ goto pr; -+ } -+ -+ spin_unlock(&spin); -+ AuWarn1("realloc failed, ignored\n"); -+ return; -+ -+pr: -+ spin_unlock(&spin); -+ pr_warn("you may want to try another patch for loopback file " -+ "on %s(0x%lx) branch\n", au_sbtype(h_sb), magic); -+} -+ -+int au_loopback_init(void) -+{ -+ int err; -+ struct super_block *sb __maybe_unused; -+ -+ BUILD_BUG_ON(sizeof(sb->s_magic) != sizeof(*au_warn_loopback_array)); -+ -+ err = 0; -+ au_warn_loopback_array = kcalloc(au_warn_loopback_step, -+ sizeof(unsigned long), GFP_NOFS); -+ if (unlikely(!au_warn_loopback_array)) -+ err = -ENOMEM; -+ -+ return err; -+} -+ -+void au_loopback_fin(void) -+{ -+ if (backing_file_func) -+ symbol_put(loop_backing_file); -+ au_kfree_try_rcu(au_warn_loopback_array); -+} -diff --git a/fs/aufs/loop.h b/fs/aufs/loop.h -new file mode 100644 -index 000000000000..94f4f80ae33b ---- /dev/null -+++ b/fs/aufs/loop.h -@@ -0,0 +1,42 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * support for loopback mount as a branch -+ */ -+ -+#ifndef __AUFS_LOOP_H__ -+#define __AUFS_LOOP_H__ -+ -+#ifdef __KERNEL__ -+ -+struct dentry; -+struct super_block; -+ -+#ifdef CONFIG_AUFS_BDEV_LOOP -+/* drivers/block/loop.c */ -+struct file *loop_backing_file(struct super_block *sb); -+ -+/* loop.c */ -+int au_test_loopback_overlap(struct super_block *sb, struct dentry *h_adding); -+int au_test_loopback_kthread(void); -+void au_warn_loopback(struct super_block *h_sb); -+ -+int au_loopback_init(void); -+void au_loopback_fin(void); -+#else -+AuStub(struct file *, loop_backing_file, return NULL, struct super_block *sb) -+ -+AuStubInt0(au_test_loopback_overlap, struct super_block *sb, -+ struct dentry *h_adding) -+AuStubInt0(au_test_loopback_kthread, void) -+AuStubVoid(au_warn_loopback, struct super_block *h_sb) -+ -+AuStubInt0(au_loopback_init, void) -+AuStubVoid(au_loopback_fin, void) -+#endif /* BLK_DEV_LOOP */ -+ -+#endif /* __KERNEL__ */ -+#endif /* __AUFS_LOOP_H__ */ -diff --git a/fs/aufs/magic.mk b/fs/aufs/magic.mk -new file mode 100644 -index 000000000000..7bc9eef3ffec ---- /dev/null -+++ b/fs/aufs/magic.mk -@@ -0,0 +1,31 @@ -+# SPDX-License-Identifier: GPL-2.0 -+ -+# defined in ${srctree}/fs/fuse/inode.c -+# tristate -+ifdef CONFIG_FUSE_FS -+ccflags-y += -DFUSE_SUPER_MAGIC=0x65735546 -+endif -+ -+# defined in ${srctree}/fs/xfs/xfs_sb.h -+# tristate -+ifdef CONFIG_XFS_FS -+ccflags-y += -DXFS_SB_MAGIC=0x58465342 -+endif -+ -+# defined in ${srctree}/fs/configfs/mount.c -+# tristate -+ifdef CONFIG_CONFIGFS_FS -+ccflags-y += -DCONFIGFS_MAGIC=0x62656570 -+endif -+ -+# defined in ${srctree}/fs/ubifs/ubifs.h -+# tristate -+ifdef CONFIG_UBIFS_FS -+ccflags-y += -DUBIFS_SUPER_MAGIC=0x24051905 -+endif -+ -+# defined in ${srctree}/fs/hfsplus/hfsplus_raw.h -+# tristate -+ifdef CONFIG_HFSPLUS_FS -+ccflags-y += -DHFSPLUS_SUPER_MAGIC=0x482b -+endif -diff --git a/fs/aufs/module.c b/fs/aufs/module.c -new file mode 100644 -index 000000000000..18039801580f ---- /dev/null -+++ b/fs/aufs/module.c -@@ -0,0 +1,259 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * module global variables and operations -+ */ -+ -+#include -+#include -+#include "aufs.h" -+ -+/* shrinkable realloc */ -+void *au_krealloc(void *p, unsigned int new_sz, gfp_t gfp, int may_shrink) -+{ -+ size_t sz; -+ int diff; -+ -+ sz = 0; -+ diff = -1; -+ if (p) { -+#if 0 /* unused */ -+ if (!new_sz) { -+ au_kfree_rcu(p); -+ p = NULL; -+ goto out; -+ } -+#else -+ AuDebugOn(!new_sz); -+#endif -+ sz = ksize(p); -+ diff = au_kmidx_sub(sz, new_sz); -+ } -+ if (sz && !diff) -+ goto out; -+ -+ if (sz < new_sz) -+ /* expand or SLOB */ -+ p = krealloc(p, new_sz, gfp); -+ else if (new_sz < sz && may_shrink) { -+ /* shrink */ -+ void *q; -+ -+ q = kmalloc(new_sz, gfp); -+ if (q) { -+ if (p) { -+ memcpy(q, p, new_sz); -+ au_kfree_try_rcu(p); -+ } -+ p = q; -+ } else -+ p = NULL; -+ } -+ -+out: -+ return p; -+} -+ -+void *au_kzrealloc(void *p, unsigned int nused, unsigned int new_sz, gfp_t gfp, -+ int may_shrink) -+{ -+ p = au_krealloc(p, new_sz, gfp, may_shrink); -+ if (p && new_sz > nused) -+ memset(p + nused, 0, new_sz - nused); -+ return p; -+} -+ -+/* ---------------------------------------------------------------------- */ -+/* -+ * aufs caches -+ */ -+struct kmem_cache *au_cache[AuCache_Last]; -+ -+static void au_cache_fin(void) -+{ -+ int i; -+ -+ /* -+ * Make sure all delayed rcu free inodes are flushed before we -+ * destroy cache. -+ */ -+ rcu_barrier(); -+ -+ /* excluding AuCache_HNOTIFY */ -+ BUILD_BUG_ON(AuCache_HNOTIFY + 1 != AuCache_Last); -+ for (i = 0; i < AuCache_HNOTIFY; i++) { -+ kmem_cache_destroy(au_cache[i]); -+ au_cache[i] = NULL; -+ } -+} -+ -+static int __init au_cache_init(void) -+{ -+ au_cache[AuCache_DINFO] = AuCacheCtor(au_dinfo, au_di_init_once); -+ if (au_cache[AuCache_DINFO]) -+ /* SLAB_DESTROY_BY_RCU */ -+ au_cache[AuCache_ICNTNR] = AuCacheCtor(au_icntnr, -+ au_icntnr_init_once); -+ if (au_cache[AuCache_ICNTNR]) -+ au_cache[AuCache_FINFO] = AuCacheCtor(au_finfo, -+ au_fi_init_once); -+ if (au_cache[AuCache_FINFO]) -+ au_cache[AuCache_VDIR] = AuCache(au_vdir); -+ if (au_cache[AuCache_VDIR]) -+ au_cache[AuCache_DEHSTR] = AuCache(au_vdir_dehstr); -+ if (au_cache[AuCache_DEHSTR]) -+ return 0; -+ -+ au_cache_fin(); -+ return -ENOMEM; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+int au_dir_roflags; -+ -+#ifdef CONFIG_AUFS_SBILIST -+/* -+ * iterate_supers_type() doesn't protect us from -+ * remounting (branch management) -+ */ -+struct hlist_bl_head au_sbilist; -+#endif -+ -+/* -+ * functions for module interface. -+ */ -+MODULE_LICENSE("GPL"); -+/* MODULE_LICENSE("GPL v2"); */ -+MODULE_AUTHOR("Junjiro R. Okajima "); -+MODULE_DESCRIPTION(AUFS_NAME -+ " -- Advanced multi layered unification filesystem"); -+MODULE_VERSION(AUFS_VERSION); -+ -+/* this module parameter has no meaning when SYSFS is disabled */ -+int sysaufs_brs = 1; -+MODULE_PARM_DESC(brs, "use /fs/aufs/si_*/brN"); -+module_param_named(brs, sysaufs_brs, int, 0444); -+ -+/* this module parameter has no meaning when USER_NS is disabled */ -+bool au_userns; -+MODULE_PARM_DESC(allow_userns, "allow unprivileged to mount under userns"); -+module_param_named(allow_userns, au_userns, bool, 0444); -+ -+/* ---------------------------------------------------------------------- */ -+ -+static char au_esc_chars[0x20 + 3]; /* 0x01-0x20, backslash, del, and NULL */ -+ -+int au_seq_path(struct seq_file *seq, struct path *path) -+{ -+ int err; -+ -+ err = seq_path(seq, path, au_esc_chars); -+ if (err >= 0) -+ err = 0; -+ else -+ err = -ENOMEM; -+ -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+static int __init aufs_init(void) -+{ -+ int err, i; -+ char *p; -+ -+ p = au_esc_chars; -+ for (i = 1; i <= ' '; i++) -+ *p++ = i; -+ *p++ = '\\'; -+ *p++ = '\x7f'; -+ *p = 0; -+ -+ au_dir_roflags = au_file_roflags(O_DIRECTORY | O_LARGEFILE); -+ -+ memcpy(aufs_iop_nogetattr, aufs_iop, sizeof(aufs_iop)); -+ for (i = 0; i < AuIop_Last; i++) -+ aufs_iop_nogetattr[i].getattr = NULL; -+ -+ memset(au_cache, 0, sizeof(au_cache)); /* including hnotify */ -+ -+ au_sbilist_init(); -+ sysaufs_brs_init(); -+ au_debug_init(); -+ au_dy_init(); -+ err = sysaufs_init(); -+ if (unlikely(err)) -+ goto out; -+ err = dbgaufs_init(); -+ if (unlikely(err)) -+ goto out_sysaufs; -+ err = au_procfs_init(); -+ if (unlikely(err)) -+ goto out_dbgaufs; -+ err = au_wkq_init(); -+ if (unlikely(err)) -+ goto out_procfs; -+ err = au_loopback_init(); -+ if (unlikely(err)) -+ goto out_wkq; -+ err = au_hnotify_init(); -+ if (unlikely(err)) -+ goto out_loopback; -+ err = au_sysrq_init(); -+ if (unlikely(err)) -+ goto out_hin; -+ err = au_cache_init(); -+ if (unlikely(err)) -+ goto out_sysrq; -+ -+ aufs_fs_type.fs_flags |= au_userns ? FS_USERNS_MOUNT : 0; -+ err = register_filesystem(&aufs_fs_type); -+ if (unlikely(err)) -+ goto out_cache; -+ -+ /* since we define pr_fmt, call printk directly */ -+ printk(KERN_INFO AUFS_NAME " " AUFS_VERSION "\n"); -+ goto out; /* success */ -+ -+out_cache: -+ au_cache_fin(); -+out_sysrq: -+ au_sysrq_fin(); -+out_hin: -+ au_hnotify_fin(); -+out_loopback: -+ au_loopback_fin(); -+out_wkq: -+ au_wkq_fin(); -+out_procfs: -+ au_procfs_fin(); -+out_dbgaufs: -+ dbgaufs_fin(); -+out_sysaufs: -+ sysaufs_fin(); -+ au_dy_fin(); -+out: -+ return err; -+} -+ -+static void __exit aufs_exit(void) -+{ -+ unregister_filesystem(&aufs_fs_type); -+ au_cache_fin(); -+ au_sysrq_fin(); -+ au_hnotify_fin(); -+ au_loopback_fin(); -+ au_wkq_fin(); -+ au_procfs_fin(); -+ dbgaufs_fin(); -+ sysaufs_fin(); -+ au_dy_fin(); -+} -+ -+module_init(aufs_init); -+module_exit(aufs_exit); -diff --git a/fs/aufs/module.h b/fs/aufs/module.h -new file mode 100644 -index 000000000000..cf4679c65542 ---- /dev/null -+++ b/fs/aufs/module.h -@@ -0,0 +1,153 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * module initialization and module-global -+ */ -+ -+#ifndef __AUFS_MODULE_H__ -+#define __AUFS_MODULE_H__ -+ -+#ifdef __KERNEL__ -+ -+#include -+#include "debug.h" -+#include "dentry.h" -+#include "dir.h" -+#include "file.h" -+#include "inode.h" -+ -+struct path; -+struct seq_file; -+ -+/* module parameters */ -+extern int sysaufs_brs; -+extern bool au_userns; -+ -+/* ---------------------------------------------------------------------- */ -+ -+extern int au_dir_roflags; -+ -+void *au_krealloc(void *p, unsigned int new_sz, gfp_t gfp, int may_shrink); -+void *au_kzrealloc(void *p, unsigned int nused, unsigned int new_sz, gfp_t gfp, -+ int may_shrink); -+ -+/* -+ * Comparing the size of the object with sizeof(struct rcu_head) -+ * case 1: object is always larger -+ * --> au_kfree_rcu() or au_kfree_do_rcu() -+ * case 2: object is always smaller -+ * --> au_kfree_small() -+ * case 3: object can be any size -+ * --> au_kfree_try_rcu() -+ */ -+ -+static inline void au_kfree_do_rcu(const void *p) -+{ -+ struct { -+ struct rcu_head rcu; -+ } *a = (void *)p; -+ -+ kfree_rcu(a, rcu); -+} -+ -+#define au_kfree_rcu(_p) do { \ -+ typeof(_p) p = (_p); \ -+ BUILD_BUG_ON(sizeof(*p) < sizeof(struct rcu_head)); \ -+ if (p) \ -+ au_kfree_do_rcu(p); \ -+ } while (0) -+ -+#define au_kfree_do_sz_test(sz) (sz >= sizeof(struct rcu_head)) -+#define au_kfree_sz_test(p) (p && au_kfree_do_sz_test(ksize(p))) -+ -+static inline void au_kfree_try_rcu(const void *p) -+{ -+ if (!p) -+ return; -+ if (au_kfree_sz_test(p)) -+ au_kfree_do_rcu(p); -+ else -+ kfree(p); -+} -+ -+static inline void au_kfree_small(const void *p) -+{ -+ if (!p) -+ return; -+ AuDebugOn(au_kfree_sz_test(p)); -+ kfree(p); -+} -+ -+static inline int au_kmidx_sub(size_t sz, size_t new_sz) -+{ -+#ifndef CONFIG_SLOB -+ return kmalloc_index(sz) - kmalloc_index(new_sz); -+#else -+ return -1; /* SLOB is untested */ -+#endif -+} -+ -+int au_seq_path(struct seq_file *seq, struct path *path); -+ -+#ifdef CONFIG_PROC_FS -+/* procfs.c */ -+int __init au_procfs_init(void); -+void au_procfs_fin(void); -+#else -+AuStubInt0(au_procfs_init, void); -+AuStubVoid(au_procfs_fin, void); -+#endif -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* kmem cache */ -+enum { -+ AuCache_DINFO, -+ AuCache_ICNTNR, -+ AuCache_FINFO, -+ AuCache_VDIR, -+ AuCache_DEHSTR, -+ AuCache_HNOTIFY, /* must be last */ -+ AuCache_Last -+}; -+ -+extern struct kmem_cache *au_cache[AuCache_Last]; -+ -+#define AuCacheFlags (SLAB_RECLAIM_ACCOUNT | SLAB_MEM_SPREAD) -+#define AuCache(type) KMEM_CACHE(type, AuCacheFlags) -+#define AuCacheCtor(type, ctor) \ -+ kmem_cache_create(#type, sizeof(struct type), \ -+ __alignof__(struct type), AuCacheFlags, ctor) -+ -+#define AuCacheFuncs(name, index) \ -+ static inline struct au_##name *au_cache_alloc_##name(void) \ -+ { return kmem_cache_alloc(au_cache[AuCache_##index], GFP_NOFS); } \ -+ static inline void au_cache_free_##name##_norcu(struct au_##name *p) \ -+ { kmem_cache_free(au_cache[AuCache_##index], p); } \ -+ \ -+ static inline void au_cache_free_##name##_rcu_cb(struct rcu_head *rcu) \ -+ { void *p = rcu; \ -+ p -= offsetof(struct au_##name, rcu); \ -+ kmem_cache_free(au_cache[AuCache_##index], p); } \ -+ static inline void au_cache_free_##name##_rcu(struct au_##name *p) \ -+ { BUILD_BUG_ON(sizeof(struct au_##name) < sizeof(struct rcu_head)); \ -+ call_rcu(&p->rcu, au_cache_free_##name##_rcu_cb); } \ -+ \ -+ static inline void au_cache_free_##name(struct au_##name *p) \ -+ { /* au_cache_free_##name##_norcu(p); */ \ -+ au_cache_free_##name##_rcu(p); } -+ -+AuCacheFuncs(dinfo, DINFO); -+AuCacheFuncs(icntnr, ICNTNR); -+AuCacheFuncs(finfo, FINFO); -+AuCacheFuncs(vdir, VDIR); -+AuCacheFuncs(vdir_dehstr, DEHSTR); -+#ifdef CONFIG_AUFS_HNOTIFY -+AuCacheFuncs(hnotify, HNOTIFY); -+#endif -+ -+#endif /* __KERNEL__ */ -+#endif /* __AUFS_MODULE_H__ */ -diff --git a/fs/aufs/mvdown.c b/fs/aufs/mvdown.c -new file mode 100644 -index 000000000000..d28a33f4a944 ---- /dev/null -+++ b/fs/aufs/mvdown.c -@@ -0,0 +1,693 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2011-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * move-down, opposite of copy-up -+ */ -+ -+#include "aufs.h" -+ -+struct au_mvd_args { -+ struct { -+ struct super_block *h_sb; -+ struct dentry *h_parent; -+ struct au_hinode *hdir; -+ struct inode *h_dir, *h_inode; -+ struct au_pin pin; -+ } info[AUFS_MVDOWN_NARRAY]; -+ -+ struct aufs_mvdown mvdown; -+ struct dentry *dentry, *parent; -+ struct inode *inode, *dir; -+ struct super_block *sb; -+ aufs_bindex_t bopq, bwh, bfound; -+ unsigned char rename_lock; -+}; -+ -+#define mvd_errno mvdown.au_errno -+#define mvd_bsrc mvdown.stbr[AUFS_MVDOWN_UPPER].bindex -+#define mvd_src_brid mvdown.stbr[AUFS_MVDOWN_UPPER].brid -+#define mvd_bdst mvdown.stbr[AUFS_MVDOWN_LOWER].bindex -+#define mvd_dst_brid mvdown.stbr[AUFS_MVDOWN_LOWER].brid -+ -+#define mvd_h_src_sb info[AUFS_MVDOWN_UPPER].h_sb -+#define mvd_h_src_parent info[AUFS_MVDOWN_UPPER].h_parent -+#define mvd_hdir_src info[AUFS_MVDOWN_UPPER].hdir -+#define mvd_h_src_dir info[AUFS_MVDOWN_UPPER].h_dir -+#define mvd_h_src_inode info[AUFS_MVDOWN_UPPER].h_inode -+#define mvd_pin_src info[AUFS_MVDOWN_UPPER].pin -+ -+#define mvd_h_dst_sb info[AUFS_MVDOWN_LOWER].h_sb -+#define mvd_h_dst_parent info[AUFS_MVDOWN_LOWER].h_parent -+#define mvd_hdir_dst info[AUFS_MVDOWN_LOWER].hdir -+#define mvd_h_dst_dir info[AUFS_MVDOWN_LOWER].h_dir -+#define mvd_h_dst_inode info[AUFS_MVDOWN_LOWER].h_inode -+#define mvd_pin_dst info[AUFS_MVDOWN_LOWER].pin -+ -+#define AU_MVD_PR(flag, ...) do { \ -+ if (flag) \ -+ pr_err(__VA_ARGS__); \ -+ } while (0) -+ -+static int find_lower_writable(struct au_mvd_args *a) -+{ -+ struct super_block *sb; -+ aufs_bindex_t bindex, bbot; -+ struct au_branch *br; -+ -+ sb = a->sb; -+ bindex = a->mvd_bsrc; -+ bbot = au_sbbot(sb); -+ if (a->mvdown.flags & AUFS_MVDOWN_FHSM_LOWER) -+ for (bindex++; bindex <= bbot; bindex++) { -+ br = au_sbr(sb, bindex); -+ if (au_br_fhsm(br->br_perm) -+ && !sb_rdonly(au_br_sb(br))) -+ return bindex; -+ } -+ else if (!(a->mvdown.flags & AUFS_MVDOWN_ROLOWER)) -+ for (bindex++; bindex <= bbot; bindex++) { -+ br = au_sbr(sb, bindex); -+ if (!au_br_rdonly(br)) -+ return bindex; -+ } -+ else -+ for (bindex++; bindex <= bbot; bindex++) { -+ br = au_sbr(sb, bindex); -+ if (!sb_rdonly(au_br_sb(br))) { -+ if (au_br_rdonly(br)) -+ a->mvdown.flags -+ |= AUFS_MVDOWN_ROLOWER_R; -+ return bindex; -+ } -+ } -+ -+ return -1; -+} -+ -+/* make the parent dir on bdst */ -+static int au_do_mkdir(const unsigned char dmsg, struct au_mvd_args *a) -+{ -+ int err; -+ -+ err = 0; -+ a->mvd_hdir_src = au_hi(a->dir, a->mvd_bsrc); -+ a->mvd_hdir_dst = au_hi(a->dir, a->mvd_bdst); -+ a->mvd_h_src_parent = au_h_dptr(a->parent, a->mvd_bsrc); -+ a->mvd_h_dst_parent = NULL; -+ if (au_dbbot(a->parent) >= a->mvd_bdst) -+ a->mvd_h_dst_parent = au_h_dptr(a->parent, a->mvd_bdst); -+ if (!a->mvd_h_dst_parent) { -+ err = au_cpdown_dirs(a->dentry, a->mvd_bdst); -+ if (unlikely(err)) { -+ AU_MVD_PR(dmsg, "cpdown_dirs failed\n"); -+ goto out; -+ } -+ a->mvd_h_dst_parent = au_h_dptr(a->parent, a->mvd_bdst); -+ } -+ -+out: -+ AuTraceErr(err); -+ return err; -+} -+ -+/* lock them all */ -+static int au_do_lock(const unsigned char dmsg, struct au_mvd_args *a) -+{ -+ int err; -+ struct dentry *h_trap; -+ -+ a->mvd_h_src_sb = au_sbr_sb(a->sb, a->mvd_bsrc); -+ a->mvd_h_dst_sb = au_sbr_sb(a->sb, a->mvd_bdst); -+ err = au_pin(&a->mvd_pin_dst, a->dentry, a->mvd_bdst, -+ au_opt_udba(a->sb), -+ AuPin_MNT_WRITE | AuPin_DI_LOCKED); -+ AuTraceErr(err); -+ if (unlikely(err)) { -+ AU_MVD_PR(dmsg, "pin_dst failed\n"); -+ goto out; -+ } -+ -+ if (a->mvd_h_src_sb != a->mvd_h_dst_sb) { -+ a->rename_lock = 0; -+ au_pin_init(&a->mvd_pin_src, a->dentry, a->mvd_bsrc, -+ AuLsc_DI_PARENT, AuLsc_I_PARENT3, -+ au_opt_udba(a->sb), -+ AuPin_MNT_WRITE | AuPin_DI_LOCKED); -+ err = au_do_pin(&a->mvd_pin_src); -+ AuTraceErr(err); -+ a->mvd_h_src_dir = d_inode(a->mvd_h_src_parent); -+ if (unlikely(err)) { -+ AU_MVD_PR(dmsg, "pin_src failed\n"); -+ goto out_dst; -+ } -+ goto out; /* success */ -+ } -+ -+ a->rename_lock = 1; -+ au_pin_hdir_unlock(&a->mvd_pin_dst); -+ err = au_pin(&a->mvd_pin_src, a->dentry, a->mvd_bsrc, -+ au_opt_udba(a->sb), -+ AuPin_MNT_WRITE | AuPin_DI_LOCKED); -+ AuTraceErr(err); -+ a->mvd_h_src_dir = d_inode(a->mvd_h_src_parent); -+ if (unlikely(err)) { -+ AU_MVD_PR(dmsg, "pin_src failed\n"); -+ au_pin_hdir_lock(&a->mvd_pin_dst); -+ goto out_dst; -+ } -+ au_pin_hdir_unlock(&a->mvd_pin_src); -+ h_trap = vfsub_lock_rename(a->mvd_h_src_parent, a->mvd_hdir_src, -+ a->mvd_h_dst_parent, a->mvd_hdir_dst); -+ if (h_trap) { -+ err = (h_trap != a->mvd_h_src_parent); -+ if (err) -+ err = (h_trap != a->mvd_h_dst_parent); -+ } -+ BUG_ON(err); /* it should never happen */ -+ if (unlikely(a->mvd_h_src_dir != au_pinned_h_dir(&a->mvd_pin_src))) { -+ err = -EBUSY; -+ AuTraceErr(err); -+ vfsub_unlock_rename(a->mvd_h_src_parent, a->mvd_hdir_src, -+ a->mvd_h_dst_parent, a->mvd_hdir_dst); -+ au_pin_hdir_lock(&a->mvd_pin_src); -+ au_unpin(&a->mvd_pin_src); -+ au_pin_hdir_lock(&a->mvd_pin_dst); -+ goto out_dst; -+ } -+ goto out; /* success */ -+ -+out_dst: -+ au_unpin(&a->mvd_pin_dst); -+out: -+ AuTraceErr(err); -+ return err; -+} -+ -+static void au_do_unlock(const unsigned char dmsg, struct au_mvd_args *a) -+{ -+ if (!a->rename_lock) -+ au_unpin(&a->mvd_pin_src); -+ else { -+ vfsub_unlock_rename(a->mvd_h_src_parent, a->mvd_hdir_src, -+ a->mvd_h_dst_parent, a->mvd_hdir_dst); -+ au_pin_hdir_lock(&a->mvd_pin_src); -+ au_unpin(&a->mvd_pin_src); -+ au_pin_hdir_lock(&a->mvd_pin_dst); -+ } -+ au_unpin(&a->mvd_pin_dst); -+} -+ -+/* copy-down the file */ -+static int au_do_cpdown(const unsigned char dmsg, struct au_mvd_args *a) -+{ -+ int err; -+ struct au_cp_generic cpg = { -+ .dentry = a->dentry, -+ .bdst = a->mvd_bdst, -+ .bsrc = a->mvd_bsrc, -+ .len = -1, -+ .pin = &a->mvd_pin_dst, -+ .flags = AuCpup_DTIME | AuCpup_HOPEN -+ }; -+ -+ AuDbg("b%d, b%d\n", cpg.bsrc, cpg.bdst); -+ if (a->mvdown.flags & AUFS_MVDOWN_OWLOWER) -+ au_fset_cpup(cpg.flags, OVERWRITE); -+ if (a->mvdown.flags & AUFS_MVDOWN_ROLOWER) -+ au_fset_cpup(cpg.flags, RWDST); -+ err = au_sio_cpdown_simple(&cpg); -+ if (unlikely(err)) -+ AU_MVD_PR(dmsg, "cpdown failed\n"); -+ -+ AuTraceErr(err); -+ return err; -+} -+ -+/* -+ * unlink the whiteout on bdst if exist which may be created by UDBA while we -+ * were sleeping -+ */ -+static int au_do_unlink_wh(const unsigned char dmsg, struct au_mvd_args *a) -+{ -+ int err; -+ struct path h_path; -+ struct au_branch *br; -+ struct inode *delegated; -+ -+ br = au_sbr(a->sb, a->mvd_bdst); -+ h_path.dentry = au_wh_lkup(a->mvd_h_dst_parent, &a->dentry->d_name, br); -+ err = PTR_ERR(h_path.dentry); -+ if (IS_ERR(h_path.dentry)) { -+ AU_MVD_PR(dmsg, "wh_lkup failed\n"); -+ goto out; -+ } -+ -+ err = 0; -+ if (d_is_positive(h_path.dentry)) { -+ h_path.mnt = au_br_mnt(br); -+ delegated = NULL; -+ err = vfsub_unlink(d_inode(a->mvd_h_dst_parent), &h_path, -+ &delegated, /*force*/0); -+ if (unlikely(err == -EWOULDBLOCK)) { -+ pr_warn("cannot retry for NFSv4 delegation" -+ " for an internal unlink\n"); -+ iput(delegated); -+ } -+ if (unlikely(err)) -+ AU_MVD_PR(dmsg, "wh_unlink failed\n"); -+ } -+ dput(h_path.dentry); -+ -+out: -+ AuTraceErr(err); -+ return err; -+} -+ -+/* -+ * unlink the topmost h_dentry -+ */ -+static int au_do_unlink(const unsigned char dmsg, struct au_mvd_args *a) -+{ -+ int err; -+ struct path h_path; -+ struct inode *delegated; -+ -+ h_path.mnt = au_sbr_mnt(a->sb, a->mvd_bsrc); -+ h_path.dentry = au_h_dptr(a->dentry, a->mvd_bsrc); -+ delegated = NULL; -+ err = vfsub_unlink(a->mvd_h_src_dir, &h_path, &delegated, /*force*/0); -+ if (unlikely(err == -EWOULDBLOCK)) { -+ pr_warn("cannot retry for NFSv4 delegation" -+ " for an internal unlink\n"); -+ iput(delegated); -+ } -+ if (unlikely(err)) -+ AU_MVD_PR(dmsg, "unlink failed\n"); -+ -+ AuTraceErr(err); -+ return err; -+} -+ -+/* Since mvdown succeeded, we ignore an error of this function */ -+static void au_do_stfs(const unsigned char dmsg, struct au_mvd_args *a) -+{ -+ int err; -+ struct au_branch *br; -+ -+ a->mvdown.flags |= AUFS_MVDOWN_STFS_FAILED; -+ br = au_sbr(a->sb, a->mvd_bsrc); -+ err = au_br_stfs(br, &a->mvdown.stbr[AUFS_MVDOWN_UPPER].stfs); -+ if (!err) { -+ br = au_sbr(a->sb, a->mvd_bdst); -+ a->mvdown.stbr[AUFS_MVDOWN_LOWER].brid = br->br_id; -+ err = au_br_stfs(br, &a->mvdown.stbr[AUFS_MVDOWN_LOWER].stfs); -+ } -+ if (!err) -+ a->mvdown.flags &= ~AUFS_MVDOWN_STFS_FAILED; -+ else -+ AU_MVD_PR(dmsg, "statfs failed (%d), ignored\n", err); -+} -+ -+/* -+ * copy-down the file and unlink the bsrc file. -+ * - unlink the bdst whout if exist -+ * - copy-down the file (with whtmp name and rename) -+ * - unlink the bsrc file -+ */ -+static int au_do_mvdown(const unsigned char dmsg, struct au_mvd_args *a) -+{ -+ int err; -+ -+ err = au_do_mkdir(dmsg, a); -+ if (!err) -+ err = au_do_lock(dmsg, a); -+ if (unlikely(err)) -+ goto out; -+ -+ /* -+ * do not revert the activities we made on bdst since they should be -+ * harmless in aufs. -+ */ -+ -+ err = au_do_cpdown(dmsg, a); -+ if (!err) -+ err = au_do_unlink_wh(dmsg, a); -+ if (!err && !(a->mvdown.flags & AUFS_MVDOWN_KUPPER)) -+ err = au_do_unlink(dmsg, a); -+ if (unlikely(err)) -+ goto out_unlock; -+ -+ AuDbg("%pd2, 0x%x, %d --> %d\n", -+ a->dentry, a->mvdown.flags, a->mvd_bsrc, a->mvd_bdst); -+ if (find_lower_writable(a) < 0) -+ a->mvdown.flags |= AUFS_MVDOWN_BOTTOM; -+ -+ if (a->mvdown.flags & AUFS_MVDOWN_STFS) -+ au_do_stfs(dmsg, a); -+ -+ /* maintain internal array */ -+ if (!(a->mvdown.flags & AUFS_MVDOWN_KUPPER)) { -+ au_set_h_dptr(a->dentry, a->mvd_bsrc, NULL); -+ au_set_dbtop(a->dentry, a->mvd_bdst); -+ au_set_h_iptr(a->inode, a->mvd_bsrc, NULL, /*flags*/0); -+ au_set_ibtop(a->inode, a->mvd_bdst); -+ } else { -+ /* hide the lower */ -+ au_set_h_dptr(a->dentry, a->mvd_bdst, NULL); -+ au_set_dbbot(a->dentry, a->mvd_bsrc); -+ au_set_h_iptr(a->inode, a->mvd_bdst, NULL, /*flags*/0); -+ au_set_ibbot(a->inode, a->mvd_bsrc); -+ } -+ if (au_dbbot(a->dentry) < a->mvd_bdst) -+ au_set_dbbot(a->dentry, a->mvd_bdst); -+ if (au_ibbot(a->inode) < a->mvd_bdst) -+ au_set_ibbot(a->inode, a->mvd_bdst); -+ -+out_unlock: -+ au_do_unlock(dmsg, a); -+out: -+ AuTraceErr(err); -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* make sure the file is idle */ -+static int au_mvd_args_busy(const unsigned char dmsg, struct au_mvd_args *a) -+{ -+ int err, plinked; -+ -+ err = 0; -+ plinked = !!au_opt_test(au_mntflags(a->sb), PLINK); -+ if (au_dbtop(a->dentry) == a->mvd_bsrc -+ && au_dcount(a->dentry) == 1 -+ && atomic_read(&a->inode->i_count) == 1 -+ /* && a->mvd_h_src_inode->i_nlink == 1 */ -+ && (!plinked || !au_plink_test(a->inode)) -+ && a->inode->i_nlink == 1) -+ goto out; -+ -+ err = -EBUSY; -+ AU_MVD_PR(dmsg, -+ "b%d, d{b%d, c%d?}, i{c%d?, l%u}, hi{l%u}, p{%d, %d}\n", -+ a->mvd_bsrc, au_dbtop(a->dentry), au_dcount(a->dentry), -+ atomic_read(&a->inode->i_count), a->inode->i_nlink, -+ a->mvd_h_src_inode->i_nlink, -+ plinked, plinked ? au_plink_test(a->inode) : 0); -+ -+out: -+ AuTraceErr(err); -+ return err; -+} -+ -+/* make sure the parent dir is fine */ -+static int au_mvd_args_parent(const unsigned char dmsg, -+ struct au_mvd_args *a) -+{ -+ int err; -+ aufs_bindex_t bindex; -+ -+ err = 0; -+ if (unlikely(au_alive_dir(a->parent))) { -+ err = -ENOENT; -+ AU_MVD_PR(dmsg, "parent dir is dead\n"); -+ goto out; -+ } -+ -+ a->bopq = au_dbdiropq(a->parent); -+ bindex = au_wbr_nonopq(a->dentry, a->mvd_bdst); -+ AuDbg("b%d\n", bindex); -+ if (unlikely((bindex >= 0 && bindex < a->mvd_bdst) -+ || (a->bopq != -1 && a->bopq < a->mvd_bdst))) { -+ err = -EINVAL; -+ a->mvd_errno = EAU_MVDOWN_OPAQUE; -+ AU_MVD_PR(dmsg, "ancestor is opaque b%d, b%d\n", -+ a->bopq, a->mvd_bdst); -+ } -+ -+out: -+ AuTraceErr(err); -+ return err; -+} -+ -+static int au_mvd_args_intermediate(const unsigned char dmsg, -+ struct au_mvd_args *a) -+{ -+ int err; -+ struct au_dinfo *dinfo, *tmp; -+ -+ /* lookup the next lower positive entry */ -+ err = -ENOMEM; -+ tmp = au_di_alloc(a->sb, AuLsc_DI_TMP); -+ if (unlikely(!tmp)) -+ goto out; -+ -+ a->bfound = -1; -+ a->bwh = -1; -+ dinfo = au_di(a->dentry); -+ au_di_cp(tmp, dinfo); -+ au_di_swap(tmp, dinfo); -+ -+ /* returns the number of positive dentries */ -+ err = au_lkup_dentry(a->dentry, a->mvd_bsrc + 1, -+ /* AuLkup_IGNORE_PERM */ 0); -+ if (!err) -+ a->bwh = au_dbwh(a->dentry); -+ else if (err > 0) -+ a->bfound = au_dbtop(a->dentry); -+ -+ au_di_swap(tmp, dinfo); -+ au_rw_write_unlock(&tmp->di_rwsem); -+ au_di_free(tmp); -+ if (unlikely(err < 0)) -+ AU_MVD_PR(dmsg, "failed look-up lower\n"); -+ -+ /* -+ * here, we have these cases. -+ * bfound == -1 -+ * no positive dentry under bsrc. there are more sub-cases. -+ * bwh < 0 -+ * there no whiteout, we can safely move-down. -+ * bwh <= bsrc -+ * impossible -+ * bsrc < bwh && bwh < bdst -+ * there is a whiteout on RO branch. cannot proceed. -+ * bwh == bdst -+ * there is a whiteout on the RW target branch. it should -+ * be removed. -+ * bdst < bwh -+ * there is a whiteout somewhere unrelated branch. -+ * -1 < bfound && bfound <= bsrc -+ * impossible. -+ * bfound < bdst -+ * found, but it is on RO branch between bsrc and bdst. cannot -+ * proceed. -+ * bfound == bdst -+ * found, replace it if AUFS_MVDOWN_FORCE is set. otherwise return -+ * error. -+ * bdst < bfound -+ * found, after we create the file on bdst, it will be hidden. -+ */ -+ -+ AuDebugOn(a->bfound == -1 -+ && a->bwh != -1 -+ && a->bwh <= a->mvd_bsrc); -+ AuDebugOn(-1 < a->bfound -+ && a->bfound <= a->mvd_bsrc); -+ -+ err = -EINVAL; -+ if (a->bfound == -1 -+ && a->mvd_bsrc < a->bwh -+ && a->bwh != -1 -+ && a->bwh < a->mvd_bdst) { -+ a->mvd_errno = EAU_MVDOWN_WHITEOUT; -+ AU_MVD_PR(dmsg, "bsrc %d, bdst %d, bfound %d, bwh %d\n", -+ a->mvd_bsrc, a->mvd_bdst, a->bfound, a->bwh); -+ goto out; -+ } else if (a->bfound != -1 && a->bfound < a->mvd_bdst) { -+ a->mvd_errno = EAU_MVDOWN_UPPER; -+ AU_MVD_PR(dmsg, "bdst %d, bfound %d\n", -+ a->mvd_bdst, a->bfound); -+ goto out; -+ } -+ -+ err = 0; /* success */ -+ -+out: -+ AuTraceErr(err); -+ return err; -+} -+ -+static int au_mvd_args_exist(const unsigned char dmsg, struct au_mvd_args *a) -+{ -+ int err; -+ -+ err = 0; -+ if (!(a->mvdown.flags & AUFS_MVDOWN_OWLOWER) -+ && a->bfound == a->mvd_bdst) -+ err = -EEXIST; -+ AuTraceErr(err); -+ return err; -+} -+ -+static int au_mvd_args(const unsigned char dmsg, struct au_mvd_args *a) -+{ -+ int err; -+ struct au_branch *br; -+ -+ err = -EISDIR; -+ if (unlikely(S_ISDIR(a->inode->i_mode))) -+ goto out; -+ -+ err = -EINVAL; -+ if (!(a->mvdown.flags & AUFS_MVDOWN_BRID_UPPER)) -+ a->mvd_bsrc = au_ibtop(a->inode); -+ else { -+ a->mvd_bsrc = au_br_index(a->sb, a->mvd_src_brid); -+ if (unlikely(a->mvd_bsrc < 0 -+ || (a->mvd_bsrc < au_dbtop(a->dentry) -+ || au_dbbot(a->dentry) < a->mvd_bsrc -+ || !au_h_dptr(a->dentry, a->mvd_bsrc)) -+ || (a->mvd_bsrc < au_ibtop(a->inode) -+ || au_ibbot(a->inode) < a->mvd_bsrc -+ || !au_h_iptr(a->inode, a->mvd_bsrc)))) { -+ a->mvd_errno = EAU_MVDOWN_NOUPPER; -+ AU_MVD_PR(dmsg, "no upper\n"); -+ goto out; -+ } -+ } -+ if (unlikely(a->mvd_bsrc == au_sbbot(a->sb))) { -+ a->mvd_errno = EAU_MVDOWN_BOTTOM; -+ AU_MVD_PR(dmsg, "on the bottom\n"); -+ goto out; -+ } -+ a->mvd_h_src_inode = au_h_iptr(a->inode, a->mvd_bsrc); -+ br = au_sbr(a->sb, a->mvd_bsrc); -+ err = au_br_rdonly(br); -+ if (!(a->mvdown.flags & AUFS_MVDOWN_ROUPPER)) { -+ if (unlikely(err)) -+ goto out; -+ } else if (!(vfsub_native_ro(a->mvd_h_src_inode) -+ || IS_APPEND(a->mvd_h_src_inode))) { -+ if (err) -+ a->mvdown.flags |= AUFS_MVDOWN_ROUPPER_R; -+ /* go on */ -+ } else -+ goto out; -+ -+ err = -EINVAL; -+ if (!(a->mvdown.flags & AUFS_MVDOWN_BRID_LOWER)) { -+ a->mvd_bdst = find_lower_writable(a); -+ if (unlikely(a->mvd_bdst < 0)) { -+ a->mvd_errno = EAU_MVDOWN_BOTTOM; -+ AU_MVD_PR(dmsg, "no writable lower branch\n"); -+ goto out; -+ } -+ } else { -+ a->mvd_bdst = au_br_index(a->sb, a->mvd_dst_brid); -+ if (unlikely(a->mvd_bdst < 0 -+ || au_sbbot(a->sb) < a->mvd_bdst)) { -+ a->mvd_errno = EAU_MVDOWN_NOLOWERBR; -+ AU_MVD_PR(dmsg, "no lower brid\n"); -+ goto out; -+ } -+ } -+ -+ err = au_mvd_args_busy(dmsg, a); -+ if (!err) -+ err = au_mvd_args_parent(dmsg, a); -+ if (!err) -+ err = au_mvd_args_intermediate(dmsg, a); -+ if (!err) -+ err = au_mvd_args_exist(dmsg, a); -+ if (!err) -+ AuDbg("b%d, b%d\n", a->mvd_bsrc, a->mvd_bdst); -+ -+out: -+ AuTraceErr(err); -+ return err; -+} -+ -+int au_mvdown(struct dentry *dentry, struct aufs_mvdown __user *uarg) -+{ -+ int err, e; -+ unsigned char dmsg; -+ struct au_mvd_args *args; -+ struct inode *inode; -+ -+ inode = d_inode(dentry); -+ err = -EPERM; -+ if (unlikely(!capable(CAP_SYS_ADMIN))) -+ goto out; -+ -+ err = -ENOMEM; -+ args = kmalloc(sizeof(*args), GFP_NOFS); -+ if (unlikely(!args)) -+ goto out; -+ -+ err = copy_from_user(&args->mvdown, uarg, sizeof(args->mvdown)); -+ if (!err) -+ /* VERIFY_WRITE */ -+ err = !access_ok(uarg, sizeof(*uarg)); -+ if (unlikely(err)) { -+ err = -EFAULT; -+ AuTraceErr(err); -+ goto out_free; -+ } -+ AuDbg("flags 0x%x\n", args->mvdown.flags); -+ args->mvdown.flags &= ~(AUFS_MVDOWN_ROLOWER_R | AUFS_MVDOWN_ROUPPER_R); -+ args->mvdown.au_errno = 0; -+ args->dentry = dentry; -+ args->inode = inode; -+ args->sb = dentry->d_sb; -+ -+ err = -ENOENT; -+ dmsg = !!(args->mvdown.flags & AUFS_MVDOWN_DMSG); -+ args->parent = dget_parent(dentry); -+ args->dir = d_inode(args->parent); -+ inode_lock_nested(args->dir, I_MUTEX_PARENT); -+ dput(args->parent); -+ if (unlikely(args->parent != dentry->d_parent)) { -+ AU_MVD_PR(dmsg, "parent dir is moved\n"); -+ goto out_dir; -+ } -+ -+ inode_lock_nested(inode, I_MUTEX_CHILD); -+ err = aufs_read_lock(dentry, AuLock_DW | AuLock_FLUSH | AuLock_NOPLMW); -+ if (unlikely(err)) -+ goto out_inode; -+ -+ di_write_lock_parent(args->parent); -+ err = au_mvd_args(dmsg, args); -+ if (unlikely(err)) -+ goto out_parent; -+ -+ err = au_do_mvdown(dmsg, args); -+ if (unlikely(err)) -+ goto out_parent; -+ -+ au_cpup_attr_timesizes(args->dir); -+ au_cpup_attr_timesizes(inode); -+ if (!(args->mvdown.flags & AUFS_MVDOWN_KUPPER)) -+ au_cpup_igen(inode, au_h_iptr(inode, args->mvd_bdst)); -+ /* au_digen_dec(dentry); */ -+ -+out_parent: -+ di_write_unlock(args->parent); -+ aufs_read_unlock(dentry, AuLock_DW); -+out_inode: -+ inode_unlock(inode); -+out_dir: -+ inode_unlock(args->dir); -+out_free: -+ e = copy_to_user(uarg, &args->mvdown, sizeof(args->mvdown)); -+ if (unlikely(e)) -+ err = -EFAULT; -+ au_kfree_rcu(args); -+out: -+ AuTraceErr(err); -+ return err; -+} -diff --git a/fs/aufs/opts.c b/fs/aufs/opts.c -new file mode 100644 -index 000000000000..26ecf5604117 ---- /dev/null -+++ b/fs/aufs/opts.c -@@ -0,0 +1,1867 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * mount options/flags -+ */ -+ -+#include -+#include /* a distribution requires */ -+#include -+#include "aufs.h" -+ -+/* ---------------------------------------------------------------------- */ -+ -+enum { -+ Opt_br, -+ Opt_add, Opt_del, Opt_mod, Opt_append, Opt_prepend, -+ Opt_idel, Opt_imod, -+ Opt_dirwh, Opt_rdcache, Opt_rdblk, Opt_rdhash, -+ Opt_rdblk_def, Opt_rdhash_def, -+ Opt_xino, Opt_noxino, -+ Opt_trunc_xino, Opt_trunc_xino_v, Opt_notrunc_xino, -+ Opt_trunc_xino_path, Opt_itrunc_xino, -+ Opt_trunc_xib, Opt_notrunc_xib, -+ Opt_shwh, Opt_noshwh, -+ Opt_plink, Opt_noplink, Opt_list_plink, -+ Opt_udba, -+ Opt_dio, Opt_nodio, -+ Opt_diropq_a, Opt_diropq_w, -+ Opt_warn_perm, Opt_nowarn_perm, -+ Opt_wbr_copyup, Opt_wbr_create, -+ Opt_fhsm_sec, -+ Opt_verbose, Opt_noverbose, -+ Opt_sum, Opt_nosum, Opt_wsum, -+ Opt_dirperm1, Opt_nodirperm1, -+ Opt_dirren, Opt_nodirren, -+ Opt_acl, Opt_noacl, -+ Opt_tail, Opt_ignore, Opt_ignore_silent, Opt_err -+}; -+ -+static match_table_t options = { -+ {Opt_br, "br=%s"}, -+ {Opt_br, "br:%s"}, -+ -+ {Opt_add, "add=%d:%s"}, -+ {Opt_add, "add:%d:%s"}, -+ {Opt_add, "ins=%d:%s"}, -+ {Opt_add, "ins:%d:%s"}, -+ {Opt_append, "append=%s"}, -+ {Opt_append, "append:%s"}, -+ {Opt_prepend, "prepend=%s"}, -+ {Opt_prepend, "prepend:%s"}, -+ -+ {Opt_del, "del=%s"}, -+ {Opt_del, "del:%s"}, -+ /* {Opt_idel, "idel:%d"}, */ -+ {Opt_mod, "mod=%s"}, -+ {Opt_mod, "mod:%s"}, -+ /* {Opt_imod, "imod:%d:%s"}, */ -+ -+ {Opt_dirwh, "dirwh=%d"}, -+ -+ {Opt_xino, "xino=%s"}, -+ {Opt_noxino, "noxino"}, -+ {Opt_trunc_xino, "trunc_xino"}, -+ {Opt_trunc_xino_v, "trunc_xino_v=%d:%d"}, -+ {Opt_notrunc_xino, "notrunc_xino"}, -+ {Opt_trunc_xino_path, "trunc_xino=%s"}, -+ {Opt_itrunc_xino, "itrunc_xino=%d"}, -+ /* {Opt_zxino, "zxino=%s"}, */ -+ {Opt_trunc_xib, "trunc_xib"}, -+ {Opt_notrunc_xib, "notrunc_xib"}, -+ -+#ifdef CONFIG_PROC_FS -+ {Opt_plink, "plink"}, -+#else -+ {Opt_ignore_silent, "plink"}, -+#endif -+ -+ {Opt_noplink, "noplink"}, -+ -+#ifdef CONFIG_AUFS_DEBUG -+ {Opt_list_plink, "list_plink"}, -+#endif -+ -+ {Opt_udba, "udba=%s"}, -+ -+ {Opt_dio, "dio"}, -+ {Opt_nodio, "nodio"}, -+ -+#ifdef CONFIG_AUFS_DIRREN -+ {Opt_dirren, "dirren"}, -+ {Opt_nodirren, "nodirren"}, -+#else -+ {Opt_ignore, "dirren"}, -+ {Opt_ignore_silent, "nodirren"}, -+#endif -+ -+#ifdef CONFIG_AUFS_FHSM -+ {Opt_fhsm_sec, "fhsm_sec=%d"}, -+#else -+ {Opt_ignore, "fhsm_sec=%d"}, -+#endif -+ -+ {Opt_diropq_a, "diropq=always"}, -+ {Opt_diropq_a, "diropq=a"}, -+ {Opt_diropq_w, "diropq=whiteouted"}, -+ {Opt_diropq_w, "diropq=w"}, -+ -+ {Opt_warn_perm, "warn_perm"}, -+ {Opt_nowarn_perm, "nowarn_perm"}, -+ -+ /* keep them temporary */ -+ {Opt_ignore_silent, "nodlgt"}, -+ {Opt_ignore, "clean_plink"}, -+ -+#ifdef CONFIG_AUFS_SHWH -+ {Opt_shwh, "shwh"}, -+#endif -+ {Opt_noshwh, "noshwh"}, -+ -+ {Opt_dirperm1, "dirperm1"}, -+ {Opt_nodirperm1, "nodirperm1"}, -+ -+ {Opt_verbose, "verbose"}, -+ {Opt_verbose, "v"}, -+ {Opt_noverbose, "noverbose"}, -+ {Opt_noverbose, "quiet"}, -+ {Opt_noverbose, "q"}, -+ {Opt_noverbose, "silent"}, -+ -+ {Opt_sum, "sum"}, -+ {Opt_nosum, "nosum"}, -+ {Opt_wsum, "wsum"}, -+ -+ {Opt_rdcache, "rdcache=%d"}, -+ {Opt_rdblk, "rdblk=%d"}, -+ {Opt_rdblk_def, "rdblk=def"}, -+ {Opt_rdhash, "rdhash=%d"}, -+ {Opt_rdhash_def, "rdhash=def"}, -+ -+ {Opt_wbr_create, "create=%s"}, -+ {Opt_wbr_create, "create_policy=%s"}, -+ {Opt_wbr_copyup, "cpup=%s"}, -+ {Opt_wbr_copyup, "copyup=%s"}, -+ {Opt_wbr_copyup, "copyup_policy=%s"}, -+ -+ /* generic VFS flag */ -+#ifdef CONFIG_FS_POSIX_ACL -+ {Opt_acl, "acl"}, -+ {Opt_noacl, "noacl"}, -+#else -+ {Opt_ignore, "acl"}, -+ {Opt_ignore_silent, "noacl"}, -+#endif -+ -+ /* internal use for the scripts */ -+ {Opt_ignore_silent, "si=%s"}, -+ -+ {Opt_br, "dirs=%s"}, -+ {Opt_ignore, "debug=%d"}, -+ {Opt_ignore, "delete=whiteout"}, -+ {Opt_ignore, "delete=all"}, -+ {Opt_ignore, "imap=%s"}, -+ -+ /* temporary workaround, due to old mount(8)? */ -+ {Opt_ignore_silent, "relatime"}, -+ -+ {Opt_err, NULL} -+}; -+ -+/* ---------------------------------------------------------------------- */ -+ -+static const char *au_parser_pattern(int val, match_table_t tbl) -+{ -+ struct match_token *p; -+ -+ p = tbl; -+ while (p->pattern) { -+ if (p->token == val) -+ return p->pattern; -+ p++; -+ } -+ BUG(); -+ return "??"; -+} -+ -+static const char *au_optstr(int *val, match_table_t tbl) -+{ -+ struct match_token *p; -+ int v; -+ -+ v = *val; -+ if (!v) -+ goto out; -+ p = tbl; -+ while (p->pattern) { -+ if (p->token -+ && (v & p->token) == p->token) { -+ *val &= ~p->token; -+ return p->pattern; -+ } -+ p++; -+ } -+ -+out: -+ return NULL; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+static match_table_t brperm = { -+ {AuBrPerm_RO, AUFS_BRPERM_RO}, -+ {AuBrPerm_RR, AUFS_BRPERM_RR}, -+ {AuBrPerm_RW, AUFS_BRPERM_RW}, -+ {0, NULL} -+}; -+ -+static match_table_t brattr = { -+ /* general */ -+ {AuBrAttr_COO_REG, AUFS_BRATTR_COO_REG}, -+ {AuBrAttr_COO_ALL, AUFS_BRATTR_COO_ALL}, -+ /* 'unpin' attrib is meaningless since linux-3.18-rc1 */ -+ {AuBrAttr_UNPIN, AUFS_BRATTR_UNPIN}, -+#ifdef CONFIG_AUFS_FHSM -+ {AuBrAttr_FHSM, AUFS_BRATTR_FHSM}, -+#endif -+#ifdef CONFIG_AUFS_XATTR -+ {AuBrAttr_ICEX, AUFS_BRATTR_ICEX}, -+ {AuBrAttr_ICEX_SEC, AUFS_BRATTR_ICEX_SEC}, -+ {AuBrAttr_ICEX_SYS, AUFS_BRATTR_ICEX_SYS}, -+ {AuBrAttr_ICEX_TR, AUFS_BRATTR_ICEX_TR}, -+ {AuBrAttr_ICEX_USR, AUFS_BRATTR_ICEX_USR}, -+ {AuBrAttr_ICEX_OTH, AUFS_BRATTR_ICEX_OTH}, -+#endif -+ -+ /* ro/rr branch */ -+ {AuBrRAttr_WH, AUFS_BRRATTR_WH}, -+ -+ /* rw branch */ -+ {AuBrWAttr_MOO, AUFS_BRWATTR_MOO}, -+ {AuBrWAttr_NoLinkWH, AUFS_BRWATTR_NLWH}, -+ -+ {0, NULL} -+}; -+ -+static int br_attr_val(char *str, match_table_t table, substring_t args[]) -+{ -+ int attr, v; -+ char *p; -+ -+ attr = 0; -+ do { -+ p = strchr(str, '+'); -+ if (p) -+ *p = 0; -+ v = match_token(str, table, args); -+ if (v) { -+ if (v & AuBrAttr_CMOO_Mask) -+ attr &= ~AuBrAttr_CMOO_Mask; -+ attr |= v; -+ } else { -+ if (p) -+ *p = '+'; -+ pr_warn("ignored branch attribute %s\n", str); -+ break; -+ } -+ if (p) -+ str = p + 1; -+ } while (p); -+ -+ return attr; -+} -+ -+static int au_do_optstr_br_attr(au_br_perm_str_t *str, int perm) -+{ -+ int sz; -+ const char *p; -+ char *q; -+ -+ q = str->a; -+ *q = 0; -+ p = au_optstr(&perm, brattr); -+ if (p) { -+ sz = strlen(p); -+ memcpy(q, p, sz + 1); -+ q += sz; -+ } else -+ goto out; -+ -+ do { -+ p = au_optstr(&perm, brattr); -+ if (p) { -+ *q++ = '+'; -+ sz = strlen(p); -+ memcpy(q, p, sz + 1); -+ q += sz; -+ } -+ } while (p); -+ -+out: -+ return q - str->a; -+} -+ -+static int noinline_for_stack br_perm_val(char *perm) -+{ -+ int val, bad, sz; -+ char *p; -+ substring_t args[MAX_OPT_ARGS]; -+ au_br_perm_str_t attr; -+ -+ p = strchr(perm, '+'); -+ if (p) -+ *p = 0; -+ val = match_token(perm, brperm, args); -+ if (!val) { -+ if (p) -+ *p = '+'; -+ pr_warn("ignored branch permission %s\n", perm); -+ val = AuBrPerm_RO; -+ goto out; -+ } -+ if (!p) -+ goto out; -+ -+ val |= br_attr_val(p + 1, brattr, args); -+ -+ bad = 0; -+ switch (val & AuBrPerm_Mask) { -+ case AuBrPerm_RO: -+ case AuBrPerm_RR: -+ bad = val & AuBrWAttr_Mask; -+ val &= ~AuBrWAttr_Mask; -+ break; -+ case AuBrPerm_RW: -+ bad = val & AuBrRAttr_Mask; -+ val &= ~AuBrRAttr_Mask; -+ break; -+ } -+ -+ /* -+ * 'unpin' attrib becomes meaningless since linux-3.18-rc1, but aufs -+ * does not treat it as an error, just warning. -+ * this is a tiny guard for the user operation. -+ */ -+ if (val & AuBrAttr_UNPIN) { -+ bad |= AuBrAttr_UNPIN; -+ val &= ~AuBrAttr_UNPIN; -+ } -+ -+ if (unlikely(bad)) { -+ sz = au_do_optstr_br_attr(&attr, bad); -+ AuDebugOn(!sz); -+ pr_warn("ignored branch attribute %s\n", attr.a); -+ } -+ -+out: -+ return val; -+} -+ -+void au_optstr_br_perm(au_br_perm_str_t *str, int perm) -+{ -+ au_br_perm_str_t attr; -+ const char *p; -+ char *q; -+ int sz; -+ -+ q = str->a; -+ p = au_optstr(&perm, brperm); -+ AuDebugOn(!p || !*p); -+ sz = strlen(p); -+ memcpy(q, p, sz + 1); -+ q += sz; -+ -+ sz = au_do_optstr_br_attr(&attr, perm); -+ if (sz) { -+ *q++ = '+'; -+ memcpy(q, attr.a, sz + 1); -+ } -+ -+ AuDebugOn(strlen(str->a) >= sizeof(str->a)); -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+static match_table_t udbalevel = { -+ {AuOpt_UDBA_REVAL, "reval"}, -+ {AuOpt_UDBA_NONE, "none"}, -+#ifdef CONFIG_AUFS_HNOTIFY -+ {AuOpt_UDBA_HNOTIFY, "notify"}, /* abstraction */ -+#ifdef CONFIG_AUFS_HFSNOTIFY -+ {AuOpt_UDBA_HNOTIFY, "fsnotify"}, -+#endif -+#endif -+ {-1, NULL} -+}; -+ -+static int noinline_for_stack udba_val(char *str) -+{ -+ substring_t args[MAX_OPT_ARGS]; -+ -+ return match_token(str, udbalevel, args); -+} -+ -+const char *au_optstr_udba(int udba) -+{ -+ return au_parser_pattern(udba, udbalevel); -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+static match_table_t au_wbr_create_policy = { -+ {AuWbrCreate_TDP, "tdp"}, -+ {AuWbrCreate_TDP, "top-down-parent"}, -+ {AuWbrCreate_RR, "rr"}, -+ {AuWbrCreate_RR, "round-robin"}, -+ {AuWbrCreate_MFS, "mfs"}, -+ {AuWbrCreate_MFS, "most-free-space"}, -+ {AuWbrCreate_MFSV, "mfs:%d"}, -+ {AuWbrCreate_MFSV, "most-free-space:%d"}, -+ -+ /* top-down regardless the parent, and then mfs */ -+ {AuWbrCreate_TDMFS, "tdmfs:%d"}, -+ {AuWbrCreate_TDMFSV, "tdmfs:%d:%d"}, -+ -+ {AuWbrCreate_MFSRR, "mfsrr:%d"}, -+ {AuWbrCreate_MFSRRV, "mfsrr:%d:%d"}, -+ {AuWbrCreate_PMFS, "pmfs"}, -+ {AuWbrCreate_PMFSV, "pmfs:%d"}, -+ {AuWbrCreate_PMFSRR, "pmfsrr:%d"}, -+ {AuWbrCreate_PMFSRRV, "pmfsrr:%d:%d"}, -+ -+ {-1, NULL} -+}; -+ -+static int au_wbr_mfs_wmark(substring_t *arg, char *str, -+ struct au_opt_wbr_create *create) -+{ -+ int err; -+ unsigned long long ull; -+ -+ err = 0; -+ if (!match_u64(arg, &ull)) -+ create->mfsrr_watermark = ull; -+ else { -+ pr_err("bad integer in %s\n", str); -+ err = -EINVAL; -+ } -+ -+ return err; -+} -+ -+static int au_wbr_mfs_sec(substring_t *arg, char *str, -+ struct au_opt_wbr_create *create) -+{ -+ int n, err; -+ -+ err = 0; -+ if (!match_int(arg, &n) && 0 <= n && n <= AUFS_MFS_MAX_SEC) -+ create->mfs_second = n; -+ else { -+ pr_err("bad integer in %s\n", str); -+ err = -EINVAL; -+ } -+ -+ return err; -+} -+ -+static int noinline_for_stack -+au_wbr_create_val(char *str, struct au_opt_wbr_create *create) -+{ -+ int err, e; -+ substring_t args[MAX_OPT_ARGS]; -+ -+ err = match_token(str, au_wbr_create_policy, args); -+ create->wbr_create = err; -+ switch (err) { -+ case AuWbrCreate_MFSRRV: -+ case AuWbrCreate_TDMFSV: -+ case AuWbrCreate_PMFSRRV: -+ e = au_wbr_mfs_wmark(&args[0], str, create); -+ if (!e) -+ e = au_wbr_mfs_sec(&args[1], str, create); -+ if (unlikely(e)) -+ err = e; -+ break; -+ case AuWbrCreate_MFSRR: -+ case AuWbrCreate_TDMFS: -+ case AuWbrCreate_PMFSRR: -+ e = au_wbr_mfs_wmark(&args[0], str, create); -+ if (unlikely(e)) { -+ err = e; -+ break; -+ } -+ fallthrough; -+ case AuWbrCreate_MFS: -+ case AuWbrCreate_PMFS: -+ create->mfs_second = AUFS_MFS_DEF_SEC; -+ break; -+ case AuWbrCreate_MFSV: -+ case AuWbrCreate_PMFSV: -+ e = au_wbr_mfs_sec(&args[0], str, create); -+ if (unlikely(e)) -+ err = e; -+ break; -+ } -+ -+ return err; -+} -+ -+const char *au_optstr_wbr_create(int wbr_create) -+{ -+ return au_parser_pattern(wbr_create, au_wbr_create_policy); -+} -+ -+static match_table_t au_wbr_copyup_policy = { -+ {AuWbrCopyup_TDP, "tdp"}, -+ {AuWbrCopyup_TDP, "top-down-parent"}, -+ {AuWbrCopyup_BUP, "bup"}, -+ {AuWbrCopyup_BUP, "bottom-up-parent"}, -+ {AuWbrCopyup_BU, "bu"}, -+ {AuWbrCopyup_BU, "bottom-up"}, -+ {-1, NULL} -+}; -+ -+static int noinline_for_stack au_wbr_copyup_val(char *str) -+{ -+ substring_t args[MAX_OPT_ARGS]; -+ -+ return match_token(str, au_wbr_copyup_policy, args); -+} -+ -+const char *au_optstr_wbr_copyup(int wbr_copyup) -+{ -+ return au_parser_pattern(wbr_copyup, au_wbr_copyup_policy); -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+static const int lkup_dirflags = LOOKUP_FOLLOW | LOOKUP_DIRECTORY; -+ -+static void dump_opts(struct au_opts *opts) -+{ -+#ifdef CONFIG_AUFS_DEBUG -+ /* reduce stack space */ -+ union { -+ struct au_opt_add *add; -+ struct au_opt_del *del; -+ struct au_opt_mod *mod; -+ struct au_opt_xino *xino; -+ struct au_opt_xino_itrunc *xino_itrunc; -+ struct au_opt_wbr_create *create; -+ } u; -+ struct au_opt *opt; -+ -+ opt = opts->opt; -+ while (opt->type != Opt_tail) { -+ switch (opt->type) { -+ case Opt_add: -+ u.add = &opt->add; -+ AuDbg("add {b%d, %s, 0x%x, %p}\n", -+ u.add->bindex, u.add->pathname, u.add->perm, -+ u.add->path.dentry); -+ break; -+ case Opt_del: -+ case Opt_idel: -+ u.del = &opt->del; -+ AuDbg("del {%s, %p}\n", -+ u.del->pathname, u.del->h_path.dentry); -+ break; -+ case Opt_mod: -+ case Opt_imod: -+ u.mod = &opt->mod; -+ AuDbg("mod {%s, 0x%x, %p}\n", -+ u.mod->path, u.mod->perm, u.mod->h_root); -+ break; -+ case Opt_append: -+ u.add = &opt->add; -+ AuDbg("append {b%d, %s, 0x%x, %p}\n", -+ u.add->bindex, u.add->pathname, u.add->perm, -+ u.add->path.dentry); -+ break; -+ case Opt_prepend: -+ u.add = &opt->add; -+ AuDbg("prepend {b%d, %s, 0x%x, %p}\n", -+ u.add->bindex, u.add->pathname, u.add->perm, -+ u.add->path.dentry); -+ break; -+ case Opt_dirwh: -+ AuDbg("dirwh %d\n", opt->dirwh); -+ break; -+ case Opt_rdcache: -+ AuDbg("rdcache %d\n", opt->rdcache); -+ break; -+ case Opt_rdblk: -+ AuDbg("rdblk %u\n", opt->rdblk); -+ break; -+ case Opt_rdblk_def: -+ AuDbg("rdblk_def\n"); -+ break; -+ case Opt_rdhash: -+ AuDbg("rdhash %u\n", opt->rdhash); -+ break; -+ case Opt_rdhash_def: -+ AuDbg("rdhash_def\n"); -+ break; -+ case Opt_xino: -+ u.xino = &opt->xino; -+ AuDbg("xino {%s %pD}\n", u.xino->path, u.xino->file); -+ break; -+ case Opt_trunc_xino: -+ AuLabel(trunc_xino); -+ break; -+ case Opt_notrunc_xino: -+ AuLabel(notrunc_xino); -+ break; -+ case Opt_trunc_xino_path: -+ case Opt_itrunc_xino: -+ u.xino_itrunc = &opt->xino_itrunc; -+ AuDbg("trunc_xino %d\n", u.xino_itrunc->bindex); -+ break; -+ case Opt_noxino: -+ AuLabel(noxino); -+ break; -+ case Opt_trunc_xib: -+ AuLabel(trunc_xib); -+ break; -+ case Opt_notrunc_xib: -+ AuLabel(notrunc_xib); -+ break; -+ case Opt_shwh: -+ AuLabel(shwh); -+ break; -+ case Opt_noshwh: -+ AuLabel(noshwh); -+ break; -+ case Opt_dirperm1: -+ AuLabel(dirperm1); -+ break; -+ case Opt_nodirperm1: -+ AuLabel(nodirperm1); -+ break; -+ case Opt_plink: -+ AuLabel(plink); -+ break; -+ case Opt_noplink: -+ AuLabel(noplink); -+ break; -+ case Opt_list_plink: -+ AuLabel(list_plink); -+ break; -+ case Opt_udba: -+ AuDbg("udba %d, %s\n", -+ opt->udba, au_optstr_udba(opt->udba)); -+ break; -+ case Opt_dio: -+ AuLabel(dio); -+ break; -+ case Opt_nodio: -+ AuLabel(nodio); -+ break; -+ case Opt_diropq_a: -+ AuLabel(diropq_a); -+ break; -+ case Opt_diropq_w: -+ AuLabel(diropq_w); -+ break; -+ case Opt_warn_perm: -+ AuLabel(warn_perm); -+ break; -+ case Opt_nowarn_perm: -+ AuLabel(nowarn_perm); -+ break; -+ case Opt_verbose: -+ AuLabel(verbose); -+ break; -+ case Opt_noverbose: -+ AuLabel(noverbose); -+ break; -+ case Opt_sum: -+ AuLabel(sum); -+ break; -+ case Opt_nosum: -+ AuLabel(nosum); -+ break; -+ case Opt_wsum: -+ AuLabel(wsum); -+ break; -+ case Opt_wbr_create: -+ u.create = &opt->wbr_create; -+ AuDbg("create %d, %s\n", u.create->wbr_create, -+ au_optstr_wbr_create(u.create->wbr_create)); -+ switch (u.create->wbr_create) { -+ case AuWbrCreate_MFSV: -+ case AuWbrCreate_PMFSV: -+ AuDbg("%d sec\n", u.create->mfs_second); -+ break; -+ case AuWbrCreate_MFSRR: -+ case AuWbrCreate_TDMFS: -+ AuDbg("%llu watermark\n", -+ u.create->mfsrr_watermark); -+ break; -+ case AuWbrCreate_MFSRRV: -+ case AuWbrCreate_TDMFSV: -+ case AuWbrCreate_PMFSRRV: -+ AuDbg("%llu watermark, %d sec\n", -+ u.create->mfsrr_watermark, -+ u.create->mfs_second); -+ break; -+ } -+ break; -+ case Opt_wbr_copyup: -+ AuDbg("copyup %d, %s\n", opt->wbr_copyup, -+ au_optstr_wbr_copyup(opt->wbr_copyup)); -+ break; -+ case Opt_fhsm_sec: -+ AuDbg("fhsm_sec %u\n", opt->fhsm_second); -+ break; -+ case Opt_dirren: -+ AuLabel(dirren); -+ break; -+ case Opt_nodirren: -+ AuLabel(nodirren); -+ break; -+ case Opt_acl: -+ AuLabel(acl); -+ break; -+ case Opt_noacl: -+ AuLabel(noacl); -+ break; -+ default: -+ BUG(); -+ } -+ opt++; -+ } -+#endif -+} -+ -+void au_opts_free(struct au_opts *opts) -+{ -+ struct au_opt *opt; -+ -+ opt = opts->opt; -+ while (opt->type != Opt_tail) { -+ switch (opt->type) { -+ case Opt_add: -+ case Opt_append: -+ case Opt_prepend: -+ path_put(&opt->add.path); -+ break; -+ case Opt_del: -+ case Opt_idel: -+ path_put(&opt->del.h_path); -+ break; -+ case Opt_mod: -+ case Opt_imod: -+ dput(opt->mod.h_root); -+ break; -+ case Opt_xino: -+ fput(opt->xino.file); -+ break; -+ } -+ opt++; -+ } -+} -+ -+static int opt_add(struct au_opt *opt, char *opt_str, unsigned long sb_flags, -+ aufs_bindex_t bindex) -+{ -+ int err; -+ struct au_opt_add *add = &opt->add; -+ char *p; -+ -+ add->bindex = bindex; -+ add->perm = AuBrPerm_RO; -+ add->pathname = opt_str; -+ p = strchr(opt_str, '='); -+ if (p) { -+ *p++ = 0; -+ if (*p) -+ add->perm = br_perm_val(p); -+ } -+ -+ err = vfsub_kern_path(add->pathname, lkup_dirflags, &add->path); -+ if (!err) { -+ if (!p) { -+ add->perm = AuBrPerm_RO; -+ if (au_test_fs_rr(add->path.dentry->d_sb)) -+ add->perm = AuBrPerm_RR; -+ else if (!bindex && !(sb_flags & SB_RDONLY)) -+ add->perm = AuBrPerm_RW; -+ } -+ opt->type = Opt_add; -+ goto out; -+ } -+ pr_err("lookup failed %s (%d)\n", add->pathname, err); -+ err = -EINVAL; -+ -+out: -+ return err; -+} -+ -+static int au_opts_parse_del(struct au_opt_del *del, substring_t args[]) -+{ -+ int err; -+ -+ del->pathname = args[0].from; -+ AuDbg("del path %s\n", del->pathname); -+ -+ err = vfsub_kern_path(del->pathname, lkup_dirflags, &del->h_path); -+ if (unlikely(err)) -+ pr_err("lookup failed %s (%d)\n", del->pathname, err); -+ -+ return err; -+} -+ -+#if 0 /* reserved for future use */ -+static int au_opts_parse_idel(struct super_block *sb, aufs_bindex_t bindex, -+ struct au_opt_del *del, substring_t args[]) -+{ -+ int err; -+ struct dentry *root; -+ -+ err = -EINVAL; -+ root = sb->s_root; -+ aufs_read_lock(root, AuLock_FLUSH); -+ if (bindex < 0 || au_sbbot(sb) < bindex) { -+ pr_err("out of bounds, %d\n", bindex); -+ goto out; -+ } -+ -+ err = 0; -+ del->h_path.dentry = dget(au_h_dptr(root, bindex)); -+ del->h_path.mnt = mntget(au_sbr_mnt(sb, bindex)); -+ -+out: -+ aufs_read_unlock(root, !AuLock_IR); -+ return err; -+} -+#endif -+ -+static int noinline_for_stack -+au_opts_parse_mod(struct au_opt_mod *mod, substring_t args[]) -+{ -+ int err; -+ struct path path; -+ char *p; -+ -+ err = -EINVAL; -+ mod->path = args[0].from; -+ p = strchr(mod->path, '='); -+ if (unlikely(!p)) { -+ pr_err("no permission %s\n", args[0].from); -+ goto out; -+ } -+ -+ *p++ = 0; -+ err = vfsub_kern_path(mod->path, lkup_dirflags, &path); -+ if (unlikely(err)) { -+ pr_err("lookup failed %s (%d)\n", mod->path, err); -+ goto out; -+ } -+ -+ mod->perm = br_perm_val(p); -+ AuDbg("mod path %s, perm 0x%x, %s\n", mod->path, mod->perm, p); -+ mod->h_root = dget(path.dentry); -+ path_put(&path); -+ -+out: -+ return err; -+} -+ -+#if 0 /* reserved for future use */ -+static int au_opts_parse_imod(struct super_block *sb, aufs_bindex_t bindex, -+ struct au_opt_mod *mod, substring_t args[]) -+{ -+ int err; -+ struct dentry *root; -+ -+ err = -EINVAL; -+ root = sb->s_root; -+ aufs_read_lock(root, AuLock_FLUSH); -+ if (bindex < 0 || au_sbbot(sb) < bindex) { -+ pr_err("out of bounds, %d\n", bindex); -+ goto out; -+ } -+ -+ err = 0; -+ mod->perm = br_perm_val(args[1].from); -+ AuDbg("mod path %s, perm 0x%x, %s\n", -+ mod->path, mod->perm, args[1].from); -+ mod->h_root = dget(au_h_dptr(root, bindex)); -+ -+out: -+ aufs_read_unlock(root, !AuLock_IR); -+ return err; -+} -+#endif -+ -+static int au_opts_parse_xino(struct super_block *sb, struct au_opt_xino *xino, -+ substring_t args[]) -+{ -+ int err; -+ struct file *file; -+ -+ file = au_xino_create(sb, args[0].from, /*silent*/0, /*wbrtop*/0); -+ err = PTR_ERR(file); -+ if (IS_ERR(file)) -+ goto out; -+ -+ err = -EINVAL; -+ if (unlikely(file->f_path.dentry->d_sb == sb)) { -+ fput(file); -+ pr_err("%s must be outside\n", args[0].from); -+ goto out; -+ } -+ -+ err = 0; -+ xino->file = file; -+ xino->path = args[0].from; -+ -+out: -+ return err; -+} -+ -+static int noinline_for_stack -+au_opts_parse_xino_itrunc_path(struct super_block *sb, -+ struct au_opt_xino_itrunc *xino_itrunc, -+ substring_t args[]) -+{ -+ int err; -+ aufs_bindex_t bbot, bindex; -+ struct path path; -+ struct dentry *root; -+ -+ err = vfsub_kern_path(args[0].from, lkup_dirflags, &path); -+ if (unlikely(err)) { -+ pr_err("lookup failed %s (%d)\n", args[0].from, err); -+ goto out; -+ } -+ -+ xino_itrunc->bindex = -1; -+ root = sb->s_root; -+ aufs_read_lock(root, AuLock_FLUSH); -+ bbot = au_sbbot(sb); -+ for (bindex = 0; bindex <= bbot; bindex++) { -+ if (au_h_dptr(root, bindex) == path.dentry) { -+ xino_itrunc->bindex = bindex; -+ break; -+ } -+ } -+ aufs_read_unlock(root, !AuLock_IR); -+ path_put(&path); -+ -+ if (unlikely(xino_itrunc->bindex < 0)) { -+ pr_err("no such branch %s\n", args[0].from); -+ err = -EINVAL; -+ } -+ -+out: -+ return err; -+} -+ -+/* called without aufs lock */ -+int au_opts_parse(struct super_block *sb, char *str, struct au_opts *opts) -+{ -+ int err, n, token; -+ aufs_bindex_t bindex; -+ unsigned char skipped; -+ struct dentry *root; -+ struct au_opt *opt, *opt_tail; -+ char *opt_str; -+ /* reduce the stack space */ -+ union { -+ struct au_opt_xino_itrunc *xino_itrunc; -+ struct au_opt_wbr_create *create; -+ } u; -+ struct { -+ substring_t args[MAX_OPT_ARGS]; -+ } *a; -+ -+ err = -ENOMEM; -+ a = kmalloc(sizeof(*a), GFP_NOFS); -+ if (unlikely(!a)) -+ goto out; -+ -+ root = sb->s_root; -+ err = 0; -+ bindex = 0; -+ opt = opts->opt; -+ opt_tail = opt + opts->max_opt - 1; -+ opt->type = Opt_tail; -+ while (!err && (opt_str = strsep(&str, ",")) && *opt_str) { -+ err = -EINVAL; -+ skipped = 0; -+ token = match_token(opt_str, options, a->args); -+ switch (token) { -+ case Opt_br: -+ err = 0; -+ while (!err && (opt_str = strsep(&a->args[0].from, ":")) -+ && *opt_str) { -+ err = opt_add(opt, opt_str, opts->sb_flags, -+ bindex++); -+ if (unlikely(!err && ++opt > opt_tail)) { -+ err = -E2BIG; -+ break; -+ } -+ opt->type = Opt_tail; -+ skipped = 1; -+ } -+ break; -+ case Opt_add: -+ if (unlikely(match_int(&a->args[0], &n))) { -+ pr_err("bad integer in %s\n", opt_str); -+ break; -+ } -+ bindex = n; -+ err = opt_add(opt, a->args[1].from, opts->sb_flags, -+ bindex); -+ if (!err) -+ opt->type = token; -+ break; -+ case Opt_append: -+ err = opt_add(opt, a->args[0].from, opts->sb_flags, -+ /*dummy bindex*/1); -+ if (!err) -+ opt->type = token; -+ break; -+ case Opt_prepend: -+ err = opt_add(opt, a->args[0].from, opts->sb_flags, -+ /*bindex*/0); -+ if (!err) -+ opt->type = token; -+ break; -+ case Opt_del: -+ err = au_opts_parse_del(&opt->del, a->args); -+ if (!err) -+ opt->type = token; -+ break; -+#if 0 /* reserved for future use */ -+ case Opt_idel: -+ del->pathname = "(indexed)"; -+ if (unlikely(match_int(&args[0], &n))) { -+ pr_err("bad integer in %s\n", opt_str); -+ break; -+ } -+ err = au_opts_parse_idel(sb, n, &opt->del, a->args); -+ if (!err) -+ opt->type = token; -+ break; -+#endif -+ case Opt_mod: -+ err = au_opts_parse_mod(&opt->mod, a->args); -+ if (!err) -+ opt->type = token; -+ break; -+#ifdef IMOD /* reserved for future use */ -+ case Opt_imod: -+ u.mod->path = "(indexed)"; -+ if (unlikely(match_int(&a->args[0], &n))) { -+ pr_err("bad integer in %s\n", opt_str); -+ break; -+ } -+ err = au_opts_parse_imod(sb, n, &opt->mod, a->args); -+ if (!err) -+ opt->type = token; -+ break; -+#endif -+ case Opt_xino: -+ err = au_opts_parse_xino(sb, &opt->xino, a->args); -+ if (!err) -+ opt->type = token; -+ break; -+ -+ case Opt_trunc_xino_path: -+ err = au_opts_parse_xino_itrunc_path -+ (sb, &opt->xino_itrunc, a->args); -+ if (!err) -+ opt->type = token; -+ break; -+ -+ case Opt_itrunc_xino: -+ u.xino_itrunc = &opt->xino_itrunc; -+ if (unlikely(match_int(&a->args[0], &n))) { -+ pr_err("bad integer in %s\n", opt_str); -+ break; -+ } -+ u.xino_itrunc->bindex = n; -+ aufs_read_lock(root, AuLock_FLUSH); -+ if (n < 0 || au_sbbot(sb) < n) { -+ pr_err("out of bounds, %d\n", n); -+ aufs_read_unlock(root, !AuLock_IR); -+ break; -+ } -+ aufs_read_unlock(root, !AuLock_IR); -+ err = 0; -+ opt->type = token; -+ break; -+ -+ case Opt_dirwh: -+ if (unlikely(match_int(&a->args[0], &opt->dirwh))) -+ break; -+ err = 0; -+ opt->type = token; -+ break; -+ -+ case Opt_rdcache: -+ if (unlikely(match_int(&a->args[0], &n))) { -+ pr_err("bad integer in %s\n", opt_str); -+ break; -+ } -+ if (unlikely(n > AUFS_RDCACHE_MAX)) { -+ pr_err("rdcache must be smaller than %d\n", -+ AUFS_RDCACHE_MAX); -+ break; -+ } -+ opt->rdcache = n; -+ err = 0; -+ opt->type = token; -+ break; -+ case Opt_rdblk: -+ if (unlikely(match_int(&a->args[0], &n) -+ || n < 0 -+ || n > KMALLOC_MAX_SIZE)) { -+ pr_err("bad integer in %s\n", opt_str); -+ break; -+ } -+ if (unlikely(n && n < NAME_MAX)) { -+ pr_err("rdblk must be larger than %d\n", -+ NAME_MAX); -+ break; -+ } -+ opt->rdblk = n; -+ err = 0; -+ opt->type = token; -+ break; -+ case Opt_rdhash: -+ if (unlikely(match_int(&a->args[0], &n) -+ || n < 0 -+ || n * sizeof(struct hlist_head) -+ > KMALLOC_MAX_SIZE)) { -+ pr_err("bad integer in %s\n", opt_str); -+ break; -+ } -+ opt->rdhash = n; -+ err = 0; -+ opt->type = token; -+ break; -+ -+ case Opt_trunc_xino: -+ case Opt_notrunc_xino: -+ case Opt_noxino: -+ case Opt_trunc_xib: -+ case Opt_notrunc_xib: -+ case Opt_shwh: -+ case Opt_noshwh: -+ case Opt_dirperm1: -+ case Opt_nodirperm1: -+ case Opt_plink: -+ case Opt_noplink: -+ case Opt_list_plink: -+ case Opt_dio: -+ case Opt_nodio: -+ case Opt_diropq_a: -+ case Opt_diropq_w: -+ case Opt_warn_perm: -+ case Opt_nowarn_perm: -+ case Opt_verbose: -+ case Opt_noverbose: -+ case Opt_sum: -+ case Opt_nosum: -+ case Opt_wsum: -+ case Opt_rdblk_def: -+ case Opt_rdhash_def: -+ case Opt_dirren: -+ case Opt_nodirren: -+ case Opt_acl: -+ case Opt_noacl: -+ err = 0; -+ opt->type = token; -+ break; -+ -+ case Opt_udba: -+ opt->udba = udba_val(a->args[0].from); -+ if (opt->udba >= 0) { -+ err = 0; -+ opt->type = token; -+ } else -+ pr_err("wrong value, %s\n", opt_str); -+ break; -+ -+ case Opt_wbr_create: -+ u.create = &opt->wbr_create; -+ u.create->wbr_create -+ = au_wbr_create_val(a->args[0].from, u.create); -+ if (u.create->wbr_create >= 0) { -+ err = 0; -+ opt->type = token; -+ } else -+ pr_err("wrong value, %s\n", opt_str); -+ break; -+ case Opt_wbr_copyup: -+ opt->wbr_copyup = au_wbr_copyup_val(a->args[0].from); -+ if (opt->wbr_copyup >= 0) { -+ err = 0; -+ opt->type = token; -+ } else -+ pr_err("wrong value, %s\n", opt_str); -+ break; -+ -+ case Opt_fhsm_sec: -+ if (unlikely(match_int(&a->args[0], &n) -+ || n < 0)) { -+ pr_err("bad integer in %s\n", opt_str); -+ break; -+ } -+ if (sysaufs_brs) { -+ opt->fhsm_second = n; -+ opt->type = token; -+ } else -+ pr_warn("ignored %s\n", opt_str); -+ err = 0; -+ break; -+ -+ case Opt_ignore: -+ pr_warn("ignored %s\n", opt_str); -+ fallthrough; -+ case Opt_ignore_silent: -+ skipped = 1; -+ err = 0; -+ break; -+ case Opt_err: -+ pr_err("unknown option %s\n", opt_str); -+ break; -+ } -+ -+ if (!err && !skipped) { -+ if (unlikely(++opt > opt_tail)) { -+ err = -E2BIG; -+ opt--; -+ opt->type = Opt_tail; -+ break; -+ } -+ opt->type = Opt_tail; -+ } -+ } -+ -+ au_kfree_rcu(a); -+ dump_opts(opts); -+ if (unlikely(err)) -+ au_opts_free(opts); -+ -+out: -+ return err; -+} -+ -+static int au_opt_wbr_create(struct super_block *sb, -+ struct au_opt_wbr_create *create) -+{ -+ int err; -+ struct au_sbinfo *sbinfo; -+ -+ SiMustWriteLock(sb); -+ -+ err = 1; /* handled */ -+ sbinfo = au_sbi(sb); -+ if (sbinfo->si_wbr_create_ops->fin) { -+ err = sbinfo->si_wbr_create_ops->fin(sb); -+ if (!err) -+ err = 1; -+ } -+ -+ sbinfo->si_wbr_create = create->wbr_create; -+ sbinfo->si_wbr_create_ops = au_wbr_create_ops + create->wbr_create; -+ switch (create->wbr_create) { -+ case AuWbrCreate_MFSRRV: -+ case AuWbrCreate_MFSRR: -+ case AuWbrCreate_TDMFS: -+ case AuWbrCreate_TDMFSV: -+ case AuWbrCreate_PMFSRR: -+ case AuWbrCreate_PMFSRRV: -+ sbinfo->si_wbr_mfs.mfsrr_watermark = create->mfsrr_watermark; -+ fallthrough; -+ case AuWbrCreate_MFS: -+ case AuWbrCreate_MFSV: -+ case AuWbrCreate_PMFS: -+ case AuWbrCreate_PMFSV: -+ sbinfo->si_wbr_mfs.mfs_expire -+ = msecs_to_jiffies(create->mfs_second * MSEC_PER_SEC); -+ break; -+ } -+ -+ if (sbinfo->si_wbr_create_ops->init) -+ sbinfo->si_wbr_create_ops->init(sb); /* ignore */ -+ -+ return err; -+} -+ -+/* -+ * returns, -+ * plus: processed without an error -+ * zero: unprocessed -+ */ -+static int au_opt_simple(struct super_block *sb, struct au_opt *opt, -+ struct au_opts *opts) -+{ -+ int err; -+ struct au_sbinfo *sbinfo; -+ -+ SiMustWriteLock(sb); -+ -+ err = 1; /* handled */ -+ sbinfo = au_sbi(sb); -+ switch (opt->type) { -+ case Opt_udba: -+ sbinfo->si_mntflags &= ~AuOptMask_UDBA; -+ sbinfo->si_mntflags |= opt->udba; -+ opts->given_udba |= opt->udba; -+ break; -+ -+ case Opt_plink: -+ au_opt_set(sbinfo->si_mntflags, PLINK); -+ break; -+ case Opt_noplink: -+ if (au_opt_test(sbinfo->si_mntflags, PLINK)) -+ au_plink_put(sb, /*verbose*/1); -+ au_opt_clr(sbinfo->si_mntflags, PLINK); -+ break; -+ case Opt_list_plink: -+ if (au_opt_test(sbinfo->si_mntflags, PLINK)) -+ au_plink_list(sb); -+ break; -+ -+ case Opt_dio: -+ au_opt_set(sbinfo->si_mntflags, DIO); -+ au_fset_opts(opts->flags, REFRESH_DYAOP); -+ break; -+ case Opt_nodio: -+ au_opt_clr(sbinfo->si_mntflags, DIO); -+ au_fset_opts(opts->flags, REFRESH_DYAOP); -+ break; -+ -+ case Opt_fhsm_sec: -+ au_fhsm_set(sbinfo, opt->fhsm_second); -+ break; -+ -+ case Opt_diropq_a: -+ au_opt_set(sbinfo->si_mntflags, ALWAYS_DIROPQ); -+ break; -+ case Opt_diropq_w: -+ au_opt_clr(sbinfo->si_mntflags, ALWAYS_DIROPQ); -+ break; -+ -+ case Opt_warn_perm: -+ au_opt_set(sbinfo->si_mntflags, WARN_PERM); -+ break; -+ case Opt_nowarn_perm: -+ au_opt_clr(sbinfo->si_mntflags, WARN_PERM); -+ break; -+ -+ case Opt_verbose: -+ au_opt_set(sbinfo->si_mntflags, VERBOSE); -+ break; -+ case Opt_noverbose: -+ au_opt_clr(sbinfo->si_mntflags, VERBOSE); -+ break; -+ -+ case Opt_sum: -+ au_opt_set(sbinfo->si_mntflags, SUM); -+ break; -+ case Opt_wsum: -+ au_opt_clr(sbinfo->si_mntflags, SUM); -+ au_opt_set(sbinfo->si_mntflags, SUM_W); -+ break; -+ case Opt_nosum: -+ au_opt_clr(sbinfo->si_mntflags, SUM); -+ au_opt_clr(sbinfo->si_mntflags, SUM_W); -+ break; -+ -+ case Opt_wbr_create: -+ err = au_opt_wbr_create(sb, &opt->wbr_create); -+ break; -+ case Opt_wbr_copyup: -+ sbinfo->si_wbr_copyup = opt->wbr_copyup; -+ sbinfo->si_wbr_copyup_ops = au_wbr_copyup_ops + opt->wbr_copyup; -+ break; -+ -+ case Opt_dirwh: -+ sbinfo->si_dirwh = opt->dirwh; -+ break; -+ -+ case Opt_rdcache: -+ sbinfo->si_rdcache -+ = msecs_to_jiffies(opt->rdcache * MSEC_PER_SEC); -+ break; -+ case Opt_rdblk: -+ sbinfo->si_rdblk = opt->rdblk; -+ break; -+ case Opt_rdblk_def: -+ sbinfo->si_rdblk = AUFS_RDBLK_DEF; -+ break; -+ case Opt_rdhash: -+ sbinfo->si_rdhash = opt->rdhash; -+ break; -+ case Opt_rdhash_def: -+ sbinfo->si_rdhash = AUFS_RDHASH_DEF; -+ break; -+ -+ case Opt_shwh: -+ au_opt_set(sbinfo->si_mntflags, SHWH); -+ break; -+ case Opt_noshwh: -+ au_opt_clr(sbinfo->si_mntflags, SHWH); -+ break; -+ -+ case Opt_dirperm1: -+ au_opt_set(sbinfo->si_mntflags, DIRPERM1); -+ break; -+ case Opt_nodirperm1: -+ au_opt_clr(sbinfo->si_mntflags, DIRPERM1); -+ break; -+ -+ case Opt_trunc_xino: -+ au_opt_set(sbinfo->si_mntflags, TRUNC_XINO); -+ break; -+ case Opt_notrunc_xino: -+ au_opt_clr(sbinfo->si_mntflags, TRUNC_XINO); -+ break; -+ -+ case Opt_trunc_xino_path: -+ case Opt_itrunc_xino: -+ err = au_xino_trunc(sb, opt->xino_itrunc.bindex, -+ /*idx_begin*/0); -+ if (!err) -+ err = 1; -+ break; -+ -+ case Opt_trunc_xib: -+ au_fset_opts(opts->flags, TRUNC_XIB); -+ break; -+ case Opt_notrunc_xib: -+ au_fclr_opts(opts->flags, TRUNC_XIB); -+ break; -+ -+ case Opt_dirren: -+ err = 1; -+ if (!au_opt_test(sbinfo->si_mntflags, DIRREN)) { -+ err = au_dr_opt_set(sb); -+ if (!err) -+ err = 1; -+ } -+ if (err == 1) -+ au_opt_set(sbinfo->si_mntflags, DIRREN); -+ break; -+ case Opt_nodirren: -+ err = 1; -+ if (au_opt_test(sbinfo->si_mntflags, DIRREN)) { -+ err = au_dr_opt_clr(sb, au_ftest_opts(opts->flags, -+ DR_FLUSHED)); -+ if (!err) -+ err = 1; -+ } -+ if (err == 1) -+ au_opt_clr(sbinfo->si_mntflags, DIRREN); -+ break; -+ -+ case Opt_acl: -+ sb->s_flags |= SB_POSIXACL; -+ break; -+ case Opt_noacl: -+ sb->s_flags &= ~SB_POSIXACL; -+ break; -+ -+ default: -+ err = 0; -+ break; -+ } -+ -+ return err; -+} -+ -+/* -+ * returns tri-state. -+ * plus: processed without an error -+ * zero: unprocessed -+ * minus: error -+ */ -+static int au_opt_br(struct super_block *sb, struct au_opt *opt, -+ struct au_opts *opts) -+{ -+ int err, do_refresh; -+ -+ err = 0; -+ switch (opt->type) { -+ case Opt_append: -+ opt->add.bindex = au_sbbot(sb) + 1; -+ if (opt->add.bindex < 0) -+ opt->add.bindex = 0; -+ goto add; -+ /* Always goto add, not fallthrough */ -+ case Opt_prepend: -+ opt->add.bindex = 0; -+ fallthrough; -+ add: /* indented label */ -+ case Opt_add: -+ err = au_br_add(sb, &opt->add, -+ au_ftest_opts(opts->flags, REMOUNT)); -+ if (!err) { -+ err = 1; -+ au_fset_opts(opts->flags, REFRESH); -+ } -+ break; -+ -+ case Opt_del: -+ case Opt_idel: -+ err = au_br_del(sb, &opt->del, -+ au_ftest_opts(opts->flags, REMOUNT)); -+ if (!err) { -+ err = 1; -+ au_fset_opts(opts->flags, TRUNC_XIB); -+ au_fset_opts(opts->flags, REFRESH); -+ } -+ break; -+ -+ case Opt_mod: -+ case Opt_imod: -+ err = au_br_mod(sb, &opt->mod, -+ au_ftest_opts(opts->flags, REMOUNT), -+ &do_refresh); -+ if (!err) { -+ err = 1; -+ if (do_refresh) -+ au_fset_opts(opts->flags, REFRESH); -+ } -+ break; -+ } -+ return err; -+} -+ -+static int au_opt_xino(struct super_block *sb, struct au_opt *opt, -+ struct au_opt_xino **opt_xino, -+ struct au_opts *opts) -+{ -+ int err; -+ -+ err = 0; -+ switch (opt->type) { -+ case Opt_xino: -+ err = au_xino_set(sb, &opt->xino, -+ !!au_ftest_opts(opts->flags, REMOUNT)); -+ if (unlikely(err)) -+ break; -+ -+ *opt_xino = &opt->xino; -+ break; -+ -+ case Opt_noxino: -+ au_xino_clr(sb); -+ *opt_xino = (void *)-1; -+ break; -+ } -+ -+ return err; -+} -+ -+int au_opts_verify(struct super_block *sb, unsigned long sb_flags, -+ unsigned int pending) -+{ -+ int err, fhsm; -+ aufs_bindex_t bindex, bbot; -+ unsigned char do_plink, skip, do_free, can_no_dreval; -+ struct au_branch *br; -+ struct au_wbr *wbr; -+ struct dentry *root, *dentry; -+ struct inode *dir, *h_dir; -+ struct au_sbinfo *sbinfo; -+ struct au_hinode *hdir; -+ -+ SiMustAnyLock(sb); -+ -+ sbinfo = au_sbi(sb); -+ AuDebugOn(!(sbinfo->si_mntflags & AuOptMask_UDBA)); -+ -+ if (!(sb_flags & SB_RDONLY)) { -+ if (unlikely(!au_br_writable(au_sbr_perm(sb, 0)))) -+ pr_warn("first branch should be rw\n"); -+ if (unlikely(au_opt_test(sbinfo->si_mntflags, SHWH))) -+ pr_warn_once("shwh should be used with ro\n"); -+ } -+ -+ if (au_opt_test((sbinfo->si_mntflags | pending), UDBA_HNOTIFY) -+ && !au_opt_test(sbinfo->si_mntflags, XINO)) -+ pr_warn_once("udba=*notify requires xino\n"); -+ -+ if (au_opt_test(sbinfo->si_mntflags, DIRPERM1)) -+ pr_warn_once("dirperm1 breaks the protection" -+ " by the permission bits on the lower branch\n"); -+ -+ err = 0; -+ fhsm = 0; -+ root = sb->s_root; -+ dir = d_inode(root); -+ do_plink = !!au_opt_test(sbinfo->si_mntflags, PLINK); -+ can_no_dreval = !!au_opt_test((sbinfo->si_mntflags | pending), -+ UDBA_NONE); -+ bbot = au_sbbot(sb); -+ for (bindex = 0; !err && bindex <= bbot; bindex++) { -+ skip = 0; -+ h_dir = au_h_iptr(dir, bindex); -+ br = au_sbr(sb, bindex); -+ -+ if ((br->br_perm & AuBrAttr_ICEX) -+ && !h_dir->i_op->listxattr) -+ br->br_perm &= ~AuBrAttr_ICEX; -+#if 0 /* untested */ -+ if ((br->br_perm & AuBrAttr_ICEX_SEC) -+ && (au_br_sb(br)->s_flags & SB_NOSEC)) -+ br->br_perm &= ~AuBrAttr_ICEX_SEC; -+#endif -+ -+ do_free = 0; -+ wbr = br->br_wbr; -+ if (wbr) -+ wbr_wh_read_lock(wbr); -+ -+ if (!au_br_writable(br->br_perm)) { -+ do_free = !!wbr; -+ skip = (!wbr -+ || (!wbr->wbr_whbase -+ && !wbr->wbr_plink -+ && !wbr->wbr_orph)); -+ } else if (!au_br_wh_linkable(br->br_perm)) { -+ /* skip = (!br->br_whbase && !br->br_orph); */ -+ skip = (!wbr || !wbr->wbr_whbase); -+ if (skip && wbr) { -+ if (do_plink) -+ skip = !!wbr->wbr_plink; -+ else -+ skip = !wbr->wbr_plink; -+ } -+ } else { -+ /* skip = (br->br_whbase && br->br_ohph); */ -+ skip = (wbr && wbr->wbr_whbase); -+ if (skip) { -+ if (do_plink) -+ skip = !!wbr->wbr_plink; -+ else -+ skip = !wbr->wbr_plink; -+ } -+ } -+ if (wbr) -+ wbr_wh_read_unlock(wbr); -+ -+ if (can_no_dreval) { -+ dentry = br->br_path.dentry; -+ spin_lock(&dentry->d_lock); -+ if (dentry->d_flags & -+ (DCACHE_OP_REVALIDATE | DCACHE_OP_WEAK_REVALIDATE)) -+ can_no_dreval = 0; -+ spin_unlock(&dentry->d_lock); -+ } -+ -+ if (au_br_fhsm(br->br_perm)) { -+ fhsm++; -+ AuDebugOn(!br->br_fhsm); -+ } -+ -+ if (skip) -+ continue; -+ -+ hdir = au_hi(dir, bindex); -+ au_hn_inode_lock_nested(hdir, AuLsc_I_PARENT); -+ if (wbr) -+ wbr_wh_write_lock(wbr); -+ err = au_wh_init(br, sb); -+ if (wbr) -+ wbr_wh_write_unlock(wbr); -+ au_hn_inode_unlock(hdir); -+ -+ if (!err && do_free) { -+ au_kfree_rcu(wbr); -+ br->br_wbr = NULL; -+ } -+ } -+ -+ if (can_no_dreval) -+ au_fset_si(sbinfo, NO_DREVAL); -+ else -+ au_fclr_si(sbinfo, NO_DREVAL); -+ -+ if (fhsm >= 2) { -+ au_fset_si(sbinfo, FHSM); -+ for (bindex = bbot; bindex >= 0; bindex--) { -+ br = au_sbr(sb, bindex); -+ if (au_br_fhsm(br->br_perm)) { -+ au_fhsm_set_bottom(sb, bindex); -+ break; -+ } -+ } -+ } else { -+ au_fclr_si(sbinfo, FHSM); -+ au_fhsm_set_bottom(sb, -1); -+ } -+ -+ return err; -+} -+ -+int au_opts_mount(struct super_block *sb, struct au_opts *opts) -+{ -+ int err; -+ unsigned int tmp; -+ aufs_bindex_t bindex, bbot; -+ struct au_opt *opt; -+ struct au_opt_xino *opt_xino, xino; -+ struct au_sbinfo *sbinfo; -+ struct au_branch *br; -+ struct inode *dir; -+ -+ SiMustWriteLock(sb); -+ -+ err = 0; -+ opt_xino = NULL; -+ opt = opts->opt; -+ while (err >= 0 && opt->type != Opt_tail) -+ err = au_opt_simple(sb, opt++, opts); -+ if (err > 0) -+ err = 0; -+ else if (unlikely(err < 0)) -+ goto out; -+ -+ /* disable xino and udba temporary */ -+ sbinfo = au_sbi(sb); -+ tmp = sbinfo->si_mntflags; -+ au_opt_clr(sbinfo->si_mntflags, XINO); -+ au_opt_set_udba(sbinfo->si_mntflags, UDBA_REVAL); -+ -+ opt = opts->opt; -+ while (err >= 0 && opt->type != Opt_tail) -+ err = au_opt_br(sb, opt++, opts); -+ if (err > 0) -+ err = 0; -+ else if (unlikely(err < 0)) -+ goto out; -+ -+ bbot = au_sbbot(sb); -+ if (unlikely(bbot < 0)) { -+ err = -EINVAL; -+ pr_err("no branches\n"); -+ goto out; -+ } -+ -+ if (au_opt_test(tmp, XINO)) -+ au_opt_set(sbinfo->si_mntflags, XINO); -+ opt = opts->opt; -+ while (!err && opt->type != Opt_tail) -+ err = au_opt_xino(sb, opt++, &opt_xino, opts); -+ if (unlikely(err)) -+ goto out; -+ -+ err = au_opts_verify(sb, sb->s_flags, tmp); -+ if (unlikely(err)) -+ goto out; -+ -+ /* restore xino */ -+ if (au_opt_test(tmp, XINO) && !opt_xino) { -+ xino.file = au_xino_def(sb); -+ err = PTR_ERR(xino.file); -+ if (IS_ERR(xino.file)) -+ goto out; -+ -+ err = au_xino_set(sb, &xino, /*remount*/0); -+ fput(xino.file); -+ if (unlikely(err)) -+ goto out; -+ } -+ -+ /* restore udba */ -+ tmp &= AuOptMask_UDBA; -+ sbinfo->si_mntflags &= ~AuOptMask_UDBA; -+ sbinfo->si_mntflags |= tmp; -+ bbot = au_sbbot(sb); -+ for (bindex = 0; bindex <= bbot; bindex++) { -+ br = au_sbr(sb, bindex); -+ err = au_hnotify_reset_br(tmp, br, br->br_perm); -+ if (unlikely(err)) -+ AuIOErr("hnotify failed on br %d, %d, ignored\n", -+ bindex, err); -+ /* go on even if err */ -+ } -+ if (au_opt_test(tmp, UDBA_HNOTIFY)) { -+ dir = d_inode(sb->s_root); -+ au_hn_reset(dir, au_hi_flags(dir, /*isdir*/1) & ~AuHi_XINO); -+ } -+ -+out: -+ return err; -+} -+ -+int au_opts_remount(struct super_block *sb, struct au_opts *opts) -+{ -+ int err, rerr; -+ unsigned char no_dreval; -+ struct inode *dir; -+ struct au_opt_xino *opt_xino; -+ struct au_opt *opt; -+ struct au_sbinfo *sbinfo; -+ -+ SiMustWriteLock(sb); -+ -+ err = au_dr_opt_flush(sb); -+ if (unlikely(err)) -+ goto out; -+ au_fset_opts(opts->flags, DR_FLUSHED); -+ -+ dir = d_inode(sb->s_root); -+ sbinfo = au_sbi(sb); -+ opt_xino = NULL; -+ opt = opts->opt; -+ while (err >= 0 && opt->type != Opt_tail) { -+ err = au_opt_simple(sb, opt, opts); -+ if (!err) -+ err = au_opt_br(sb, opt, opts); -+ if (!err) -+ err = au_opt_xino(sb, opt, &opt_xino, opts); -+ opt++; -+ } -+ if (err > 0) -+ err = 0; -+ AuTraceErr(err); -+ /* go on even err */ -+ -+ no_dreval = !!au_ftest_si(sbinfo, NO_DREVAL); -+ rerr = au_opts_verify(sb, opts->sb_flags, /*pending*/0); -+ if (unlikely(rerr && !err)) -+ err = rerr; -+ -+ if (no_dreval != !!au_ftest_si(sbinfo, NO_DREVAL)) -+ au_fset_opts(opts->flags, REFRESH_IDOP); -+ -+ if (au_ftest_opts(opts->flags, TRUNC_XIB)) { -+ rerr = au_xib_trunc(sb); -+ if (unlikely(rerr && !err)) -+ err = rerr; -+ } -+ -+ /* will be handled by the caller */ -+ if (!au_ftest_opts(opts->flags, REFRESH) -+ && (opts->given_udba -+ || au_opt_test(sbinfo->si_mntflags, XINO) -+ || au_ftest_opts(opts->flags, REFRESH_IDOP) -+ )) -+ au_fset_opts(opts->flags, REFRESH); -+ -+ AuDbg("status 0x%x\n", opts->flags); -+ -+out: -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+unsigned int au_opt_udba(struct super_block *sb) -+{ -+ return au_mntflags(sb) & AuOptMask_UDBA; -+} -diff --git a/fs/aufs/opts.h b/fs/aufs/opts.h -new file mode 100644 -index 000000000000..5e00aeac6d21 ---- /dev/null -+++ b/fs/aufs/opts.h -@@ -0,0 +1,212 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * mount options/flags -+ */ -+ -+#ifndef __AUFS_OPTS_H__ -+#define __AUFS_OPTS_H__ -+ -+#ifdef __KERNEL__ -+ -+#include -+ -+struct file; -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* mount flags */ -+#define AuOpt_XINO 1 /* external inode number bitmap -+ and translation table */ -+#define AuOpt_TRUNC_XINO (1 << 1) /* truncate xino files */ -+#define AuOpt_UDBA_NONE (1 << 2) /* users direct branch access */ -+#define AuOpt_UDBA_REVAL (1 << 3) -+#define AuOpt_UDBA_HNOTIFY (1 << 4) -+#define AuOpt_SHWH (1 << 5) /* show whiteout */ -+#define AuOpt_PLINK (1 << 6) /* pseudo-link */ -+#define AuOpt_DIRPERM1 (1 << 7) /* ignore the lower dir's perm -+ bits */ -+#define AuOpt_ALWAYS_DIROPQ (1 << 9) /* policy to creating diropq */ -+#define AuOpt_SUM (1 << 10) /* summation for statfs(2) */ -+#define AuOpt_SUM_W (1 << 11) /* unimplemented */ -+#define AuOpt_WARN_PERM (1 << 12) /* warn when add-branch */ -+#define AuOpt_VERBOSE (1 << 13) /* print the cause of error */ -+#define AuOpt_DIO (1 << 14) /* direct io */ -+#define AuOpt_DIRREN (1 << 15) /* directory rename */ -+ -+#ifndef CONFIG_AUFS_HNOTIFY -+#undef AuOpt_UDBA_HNOTIFY -+#define AuOpt_UDBA_HNOTIFY 0 -+#endif -+#ifndef CONFIG_AUFS_DIRREN -+#undef AuOpt_DIRREN -+#define AuOpt_DIRREN 0 -+#endif -+#ifndef CONFIG_AUFS_SHWH -+#undef AuOpt_SHWH -+#define AuOpt_SHWH 0 -+#endif -+ -+#define AuOpt_Def (AuOpt_XINO \ -+ | AuOpt_UDBA_REVAL \ -+ | AuOpt_PLINK \ -+ /* | AuOpt_DIRPERM1 */ \ -+ | AuOpt_WARN_PERM) -+#define AuOptMask_UDBA (AuOpt_UDBA_NONE \ -+ | AuOpt_UDBA_REVAL \ -+ | AuOpt_UDBA_HNOTIFY) -+ -+#define au_opt_test(flags, name) (flags & AuOpt_##name) -+#define au_opt_set(flags, name) do { \ -+ BUILD_BUG_ON(AuOpt_##name & AuOptMask_UDBA); \ -+ ((flags) |= AuOpt_##name); \ -+} while (0) -+#define au_opt_set_udba(flags, name) do { \ -+ (flags) &= ~AuOptMask_UDBA; \ -+ ((flags) |= AuOpt_##name); \ -+} while (0) -+#define au_opt_clr(flags, name) do { \ -+ ((flags) &= ~AuOpt_##name); \ -+} while (0) -+ -+static inline unsigned int au_opts_plink(unsigned int mntflags) -+{ -+#ifdef CONFIG_PROC_FS -+ return mntflags; -+#else -+ return mntflags & ~AuOpt_PLINK; -+#endif -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* policies to select one among multiple writable branches */ -+enum { -+ AuWbrCreate_TDP, /* top down parent */ -+ AuWbrCreate_RR, /* round robin */ -+ AuWbrCreate_MFS, /* most free space */ -+ AuWbrCreate_MFSV, /* mfs with seconds */ -+ AuWbrCreate_MFSRR, /* mfs then rr */ -+ AuWbrCreate_MFSRRV, /* mfs then rr with seconds */ -+ AuWbrCreate_TDMFS, /* top down regardless parent and mfs */ -+ AuWbrCreate_TDMFSV, /* top down regardless parent and mfs */ -+ AuWbrCreate_PMFS, /* parent and mfs */ -+ AuWbrCreate_PMFSV, /* parent and mfs with seconds */ -+ AuWbrCreate_PMFSRR, /* parent, mfs and round-robin */ -+ AuWbrCreate_PMFSRRV, /* plus seconds */ -+ -+ AuWbrCreate_Def = AuWbrCreate_TDP -+}; -+ -+enum { -+ AuWbrCopyup_TDP, /* top down parent */ -+ AuWbrCopyup_BUP, /* bottom up parent */ -+ AuWbrCopyup_BU, /* bottom up */ -+ -+ AuWbrCopyup_Def = AuWbrCopyup_TDP -+}; -+ -+/* ---------------------------------------------------------------------- */ -+ -+struct au_opt_add { -+ aufs_bindex_t bindex; -+ char *pathname; -+ int perm; -+ struct path path; -+}; -+ -+struct au_opt_del { -+ char *pathname; -+ struct path h_path; -+}; -+ -+struct au_opt_mod { -+ char *path; -+ int perm; -+ struct dentry *h_root; -+}; -+ -+struct au_opt_xino { -+ char *path; -+ struct file *file; -+}; -+ -+struct au_opt_xino_itrunc { -+ aufs_bindex_t bindex; -+}; -+ -+struct au_opt_wbr_create { -+ int wbr_create; -+ int mfs_second; -+ unsigned long long mfsrr_watermark; -+}; -+ -+struct au_opt { -+ int type; -+ union { -+ struct au_opt_xino xino; -+ struct au_opt_xino_itrunc xino_itrunc; -+ struct au_opt_add add; -+ struct au_opt_del del; -+ struct au_opt_mod mod; -+ int dirwh; -+ int rdcache; -+ unsigned int rdblk; -+ unsigned int rdhash; -+ int udba; -+ struct au_opt_wbr_create wbr_create; -+ int wbr_copyup; -+ unsigned int fhsm_second; -+ }; -+}; -+ -+/* opts flags */ -+#define AuOpts_REMOUNT 1 -+#define AuOpts_REFRESH (1 << 1) -+#define AuOpts_TRUNC_XIB (1 << 2) -+#define AuOpts_REFRESH_DYAOP (1 << 3) -+#define AuOpts_REFRESH_IDOP (1 << 4) -+#define AuOpts_DR_FLUSHED (1 << 5) -+#define au_ftest_opts(flags, name) ((flags) & AuOpts_##name) -+#define au_fset_opts(flags, name) \ -+ do { (flags) |= AuOpts_##name; } while (0) -+#define au_fclr_opts(flags, name) \ -+ do { (flags) &= ~AuOpts_##name; } while (0) -+ -+#ifndef CONFIG_AUFS_DIRREN -+#undef AuOpts_DR_FLUSHED -+#define AuOpts_DR_FLUSHED 0 -+#endif -+ -+struct au_opts { -+ struct au_opt *opt; -+ int max_opt; -+ -+ unsigned int given_udba; -+ unsigned int flags; -+ unsigned long sb_flags; -+}; -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* opts.c */ -+void au_optstr_br_perm(au_br_perm_str_t *str, int perm); -+const char *au_optstr_udba(int udba); -+const char *au_optstr_wbr_copyup(int wbr_copyup); -+const char *au_optstr_wbr_create(int wbr_create); -+ -+void au_opts_free(struct au_opts *opts); -+struct super_block; -+int au_opts_parse(struct super_block *sb, char *str, struct au_opts *opts); -+int au_opts_verify(struct super_block *sb, unsigned long sb_flags, -+ unsigned int pending); -+int au_opts_mount(struct super_block *sb, struct au_opts *opts); -+int au_opts_remount(struct super_block *sb, struct au_opts *opts); -+ -+unsigned int au_opt_udba(struct super_block *sb); -+ -+#endif /* __KERNEL__ */ -+#endif /* __AUFS_OPTS_H__ */ -diff --git a/fs/aufs/plink.c b/fs/aufs/plink.c -new file mode 100644 -index 000000000000..1c67183bebfb ---- /dev/null -+++ b/fs/aufs/plink.c -@@ -0,0 +1,503 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * pseudo-link -+ */ -+ -+#include "aufs.h" -+ -+/* -+ * the pseudo-link maintenance mode. -+ * during a user process maintains the pseudo-links, -+ * prohibit adding a new plink and branch manipulation. -+ * -+ * Flags -+ * NOPLM: -+ * For entry functions which will handle plink, and i_mutex is already held -+ * in VFS. -+ * They cannot wait and should return an error at once. -+ * Callers has to check the error. -+ * NOPLMW: -+ * For entry functions which will handle plink, but i_mutex is not held -+ * in VFS. -+ * They can wait the plink maintenance mode to finish. -+ * -+ * They behave like F_SETLK and F_SETLKW. -+ * If the caller never handle plink, then both flags are unnecessary. -+ */ -+ -+int au_plink_maint(struct super_block *sb, int flags) -+{ -+ int err; -+ pid_t pid, ppid; -+ struct task_struct *parent, *prev; -+ struct au_sbinfo *sbi; -+ -+ SiMustAnyLock(sb); -+ -+ err = 0; -+ if (!au_opt_test(au_mntflags(sb), PLINK)) -+ goto out; -+ -+ sbi = au_sbi(sb); -+ pid = sbi->si_plink_maint_pid; -+ if (!pid || pid == current->pid) -+ goto out; -+ -+ /* todo: it highly depends upon /sbin/mount.aufs */ -+ prev = NULL; -+ parent = current; -+ ppid = 0; -+ rcu_read_lock(); -+ while (1) { -+ parent = rcu_dereference(parent->real_parent); -+ if (parent == prev) -+ break; -+ ppid = task_pid_vnr(parent); -+ if (pid == ppid) { -+ rcu_read_unlock(); -+ goto out; -+ } -+ prev = parent; -+ } -+ rcu_read_unlock(); -+ -+ if (au_ftest_lock(flags, NOPLMW)) { -+ /* if there is no i_mutex lock in VFS, we don't need to wait */ -+ /* AuDebugOn(!lockdep_depth(current)); */ -+ while (sbi->si_plink_maint_pid) { -+ si_read_unlock(sb); -+ /* gave up wake_up_bit() */ -+ wait_event(sbi->si_plink_wq, !sbi->si_plink_maint_pid); -+ -+ if (au_ftest_lock(flags, FLUSH)) -+ au_nwt_flush(&sbi->si_nowait); -+ si_noflush_read_lock(sb); -+ } -+ } else if (au_ftest_lock(flags, NOPLM)) { -+ AuDbg("ppid %d, pid %d\n", ppid, pid); -+ err = -EAGAIN; -+ } -+ -+out: -+ return err; -+} -+ -+void au_plink_maint_leave(struct au_sbinfo *sbinfo) -+{ -+ spin_lock(&sbinfo->si_plink_maint_lock); -+ sbinfo->si_plink_maint_pid = 0; -+ spin_unlock(&sbinfo->si_plink_maint_lock); -+ wake_up_all(&sbinfo->si_plink_wq); -+} -+ -+int au_plink_maint_enter(struct super_block *sb) -+{ -+ int err; -+ struct au_sbinfo *sbinfo; -+ -+ err = 0; -+ sbinfo = au_sbi(sb); -+ /* make sure i am the only one in this fs */ -+ si_write_lock(sb, AuLock_FLUSH); -+ if (au_opt_test(au_mntflags(sb), PLINK)) { -+ spin_lock(&sbinfo->si_plink_maint_lock); -+ if (!sbinfo->si_plink_maint_pid) -+ sbinfo->si_plink_maint_pid = current->pid; -+ else -+ err = -EBUSY; -+ spin_unlock(&sbinfo->si_plink_maint_lock); -+ } -+ si_write_unlock(sb); -+ -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+#ifdef CONFIG_AUFS_DEBUG -+void au_plink_list(struct super_block *sb) -+{ -+ int i; -+ struct au_sbinfo *sbinfo; -+ struct hlist_bl_head *hbl; -+ struct hlist_bl_node *pos; -+ struct au_icntnr *icntnr; -+ -+ SiMustAnyLock(sb); -+ -+ sbinfo = au_sbi(sb); -+ AuDebugOn(!au_opt_test(au_mntflags(sb), PLINK)); -+ AuDebugOn(au_plink_maint(sb, AuLock_NOPLM)); -+ -+ for (i = 0; i < AuPlink_NHASH; i++) { -+ hbl = sbinfo->si_plink + i; -+ hlist_bl_lock(hbl); -+ hlist_bl_for_each_entry(icntnr, pos, hbl, plink) -+ AuDbg("%lu\n", icntnr->vfs_inode.i_ino); -+ hlist_bl_unlock(hbl); -+ } -+} -+#endif -+ -+/* is the inode pseudo-linked? */ -+int au_plink_test(struct inode *inode) -+{ -+ int found, i; -+ struct au_sbinfo *sbinfo; -+ struct hlist_bl_head *hbl; -+ struct hlist_bl_node *pos; -+ struct au_icntnr *icntnr; -+ -+ sbinfo = au_sbi(inode->i_sb); -+ AuRwMustAnyLock(&sbinfo->si_rwsem); -+ AuDebugOn(!au_opt_test(au_mntflags(inode->i_sb), PLINK)); -+ AuDebugOn(au_plink_maint(inode->i_sb, AuLock_NOPLM)); -+ -+ found = 0; -+ i = au_plink_hash(inode->i_ino); -+ hbl = sbinfo->si_plink + i; -+ hlist_bl_lock(hbl); -+ hlist_bl_for_each_entry(icntnr, pos, hbl, plink) -+ if (&icntnr->vfs_inode == inode) { -+ found = 1; -+ break; -+ } -+ hlist_bl_unlock(hbl); -+ return found; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* -+ * generate a name for plink. -+ * the file will be stored under AUFS_WH_PLINKDIR. -+ */ -+/* 20 is max digits length of ulong 64 */ -+#define PLINK_NAME_LEN ((20 + 1) * 2) -+ -+static int plink_name(char *name, int len, struct inode *inode, -+ aufs_bindex_t bindex) -+{ -+ int rlen; -+ struct inode *h_inode; -+ -+ h_inode = au_h_iptr(inode, bindex); -+ rlen = snprintf(name, len, "%lu.%lu", inode->i_ino, h_inode->i_ino); -+ return rlen; -+} -+ -+struct au_do_plink_lkup_args { -+ struct dentry **errp; -+ struct qstr *tgtname; -+ struct dentry *h_parent; -+ struct au_branch *br; -+}; -+ -+static struct dentry *au_do_plink_lkup(struct qstr *tgtname, -+ struct dentry *h_parent, -+ struct au_branch *br) -+{ -+ struct dentry *h_dentry; -+ struct inode *h_inode; -+ -+ h_inode = d_inode(h_parent); -+ inode_lock_shared_nested(h_inode, AuLsc_I_CHILD2); -+ h_dentry = vfsub_lkup_one(tgtname, h_parent); -+ inode_unlock_shared(h_inode); -+ return h_dentry; -+} -+ -+static void au_call_do_plink_lkup(void *args) -+{ -+ struct au_do_plink_lkup_args *a = args; -+ *a->errp = au_do_plink_lkup(a->tgtname, a->h_parent, a->br); -+} -+ -+/* lookup the plink-ed @inode under the branch at @bindex */ -+struct dentry *au_plink_lkup(struct inode *inode, aufs_bindex_t bindex) -+{ -+ struct dentry *h_dentry, *h_parent; -+ struct au_branch *br; -+ int wkq_err; -+ char a[PLINK_NAME_LEN]; -+ struct qstr tgtname = QSTR_INIT(a, 0); -+ -+ AuDebugOn(au_plink_maint(inode->i_sb, AuLock_NOPLM)); -+ -+ br = au_sbr(inode->i_sb, bindex); -+ h_parent = br->br_wbr->wbr_plink; -+ tgtname.len = plink_name(a, sizeof(a), inode, bindex); -+ -+ if (!uid_eq(current_fsuid(), GLOBAL_ROOT_UID)) { -+ struct au_do_plink_lkup_args args = { -+ .errp = &h_dentry, -+ .tgtname = &tgtname, -+ .h_parent = h_parent, -+ .br = br -+ }; -+ -+ wkq_err = au_wkq_wait(au_call_do_plink_lkup, &args); -+ if (unlikely(wkq_err)) -+ h_dentry = ERR_PTR(wkq_err); -+ } else -+ h_dentry = au_do_plink_lkup(&tgtname, h_parent, br); -+ -+ return h_dentry; -+} -+ -+/* create a pseudo-link */ -+static int do_whplink(struct qstr *tgt, struct dentry *h_parent, -+ struct dentry *h_dentry, struct au_branch *br) -+{ -+ int err; -+ struct path h_path = { -+ .mnt = au_br_mnt(br) -+ }; -+ struct inode *h_dir, *delegated; -+ -+ h_dir = d_inode(h_parent); -+ inode_lock_nested(h_dir, AuLsc_I_CHILD2); -+again: -+ h_path.dentry = vfsub_lkup_one(tgt, h_parent); -+ err = PTR_ERR(h_path.dentry); -+ if (IS_ERR(h_path.dentry)) -+ goto out; -+ -+ err = 0; -+ /* wh.plink dir is not monitored */ -+ /* todo: is it really safe? */ -+ if (d_is_positive(h_path.dentry) -+ && d_inode(h_path.dentry) != d_inode(h_dentry)) { -+ delegated = NULL; -+ err = vfsub_unlink(h_dir, &h_path, &delegated, /*force*/0); -+ if (unlikely(err == -EWOULDBLOCK)) { -+ pr_warn("cannot retry for NFSv4 delegation" -+ " for an internal unlink\n"); -+ iput(delegated); -+ } -+ dput(h_path.dentry); -+ h_path.dentry = NULL; -+ if (!err) -+ goto again; -+ } -+ if (!err && d_is_negative(h_path.dentry)) { -+ delegated = NULL; -+ err = vfsub_link(h_dentry, h_dir, &h_path, &delegated); -+ if (unlikely(err == -EWOULDBLOCK)) { -+ pr_warn("cannot retry for NFSv4 delegation" -+ " for an internal link\n"); -+ iput(delegated); -+ } -+ } -+ dput(h_path.dentry); -+ -+out: -+ inode_unlock(h_dir); -+ return err; -+} -+ -+struct do_whplink_args { -+ int *errp; -+ struct qstr *tgt; -+ struct dentry *h_parent; -+ struct dentry *h_dentry; -+ struct au_branch *br; -+}; -+ -+static void call_do_whplink(void *args) -+{ -+ struct do_whplink_args *a = args; -+ *a->errp = do_whplink(a->tgt, a->h_parent, a->h_dentry, a->br); -+} -+ -+static int whplink(struct dentry *h_dentry, struct inode *inode, -+ aufs_bindex_t bindex, struct au_branch *br) -+{ -+ int err, wkq_err; -+ struct au_wbr *wbr; -+ struct dentry *h_parent; -+ char a[PLINK_NAME_LEN]; -+ struct qstr tgtname = QSTR_INIT(a, 0); -+ -+ wbr = au_sbr(inode->i_sb, bindex)->br_wbr; -+ h_parent = wbr->wbr_plink; -+ tgtname.len = plink_name(a, sizeof(a), inode, bindex); -+ -+ /* always superio. */ -+ if (!uid_eq(current_fsuid(), GLOBAL_ROOT_UID)) { -+ struct do_whplink_args args = { -+ .errp = &err, -+ .tgt = &tgtname, -+ .h_parent = h_parent, -+ .h_dentry = h_dentry, -+ .br = br -+ }; -+ wkq_err = au_wkq_wait(call_do_whplink, &args); -+ if (unlikely(wkq_err)) -+ err = wkq_err; -+ } else -+ err = do_whplink(&tgtname, h_parent, h_dentry, br); -+ -+ return err; -+} -+ -+/* -+ * create a new pseudo-link for @h_dentry on @bindex. -+ * the linked inode is held in aufs @inode. -+ */ -+void au_plink_append(struct inode *inode, aufs_bindex_t bindex, -+ struct dentry *h_dentry) -+{ -+ struct super_block *sb; -+ struct au_sbinfo *sbinfo; -+ struct hlist_bl_head *hbl; -+ struct hlist_bl_node *pos; -+ struct au_icntnr *icntnr; -+ int found, err, cnt, i; -+ -+ sb = inode->i_sb; -+ sbinfo = au_sbi(sb); -+ AuDebugOn(!au_opt_test(au_mntflags(sb), PLINK)); -+ AuDebugOn(au_plink_maint(sb, AuLock_NOPLM)); -+ -+ found = au_plink_test(inode); -+ if (found) -+ return; -+ -+ i = au_plink_hash(inode->i_ino); -+ hbl = sbinfo->si_plink + i; -+ au_igrab(inode); -+ -+ hlist_bl_lock(hbl); -+ hlist_bl_for_each_entry(icntnr, pos, hbl, plink) { -+ if (&icntnr->vfs_inode == inode) { -+ found = 1; -+ break; -+ } -+ } -+ if (!found) { -+ icntnr = container_of(inode, struct au_icntnr, vfs_inode); -+ hlist_bl_add_head(&icntnr->plink, hbl); -+ } -+ hlist_bl_unlock(hbl); -+ if (!found) { -+ cnt = au_hbl_count(hbl); -+#define msg "unexpectedly unbalanced or too many pseudo-links" -+ if (cnt > AUFS_PLINK_WARN) -+ AuWarn1(msg ", %d\n", cnt); -+#undef msg -+ err = whplink(h_dentry, inode, bindex, au_sbr(sb, bindex)); -+ if (unlikely(err)) { -+ pr_warn("err %d, damaged pseudo link.\n", err); -+ au_hbl_del(&icntnr->plink, hbl); -+ iput(&icntnr->vfs_inode); -+ } -+ } else -+ iput(&icntnr->vfs_inode); -+} -+ -+/* free all plinks */ -+void au_plink_put(struct super_block *sb, int verbose) -+{ -+ int i, warned; -+ struct au_sbinfo *sbinfo; -+ struct hlist_bl_head *hbl; -+ struct hlist_bl_node *pos, *tmp; -+ struct au_icntnr *icntnr; -+ -+ SiMustWriteLock(sb); -+ -+ sbinfo = au_sbi(sb); -+ AuDebugOn(!au_opt_test(au_mntflags(sb), PLINK)); -+ AuDebugOn(au_plink_maint(sb, AuLock_NOPLM)); -+ -+ /* no spin_lock since sbinfo is write-locked */ -+ warned = 0; -+ for (i = 0; i < AuPlink_NHASH; i++) { -+ hbl = sbinfo->si_plink + i; -+ if (!warned && verbose && !hlist_bl_empty(hbl)) { -+ pr_warn("pseudo-link is not flushed"); -+ warned = 1; -+ } -+ hlist_bl_for_each_entry_safe(icntnr, pos, tmp, hbl, plink) -+ iput(&icntnr->vfs_inode); -+ INIT_HLIST_BL_HEAD(hbl); -+ } -+} -+ -+void au_plink_clean(struct super_block *sb, int verbose) -+{ -+ struct dentry *root; -+ -+ root = sb->s_root; -+ aufs_write_lock(root); -+ if (au_opt_test(au_mntflags(sb), PLINK)) -+ au_plink_put(sb, verbose); -+ aufs_write_unlock(root); -+} -+ -+static int au_plink_do_half_refresh(struct inode *inode, aufs_bindex_t br_id) -+{ -+ int do_put; -+ aufs_bindex_t btop, bbot, bindex; -+ -+ do_put = 0; -+ btop = au_ibtop(inode); -+ bbot = au_ibbot(inode); -+ if (btop >= 0) { -+ for (bindex = btop; bindex <= bbot; bindex++) { -+ if (!au_h_iptr(inode, bindex) -+ || au_ii_br_id(inode, bindex) != br_id) -+ continue; -+ au_set_h_iptr(inode, bindex, NULL, 0); -+ do_put = 1; -+ break; -+ } -+ if (do_put) -+ for (bindex = btop; bindex <= bbot; bindex++) -+ if (au_h_iptr(inode, bindex)) { -+ do_put = 0; -+ break; -+ } -+ } else -+ do_put = 1; -+ -+ return do_put; -+} -+ -+/* free the plinks on a branch specified by @br_id */ -+void au_plink_half_refresh(struct super_block *sb, aufs_bindex_t br_id) -+{ -+ struct au_sbinfo *sbinfo; -+ struct hlist_bl_head *hbl; -+ struct hlist_bl_node *pos, *tmp; -+ struct au_icntnr *icntnr; -+ struct inode *inode; -+ int i, do_put; -+ -+ SiMustWriteLock(sb); -+ -+ sbinfo = au_sbi(sb); -+ AuDebugOn(!au_opt_test(au_mntflags(sb), PLINK)); -+ AuDebugOn(au_plink_maint(sb, AuLock_NOPLM)); -+ -+ /* no bit_lock since sbinfo is write-locked */ -+ for (i = 0; i < AuPlink_NHASH; i++) { -+ hbl = sbinfo->si_plink + i; -+ hlist_bl_for_each_entry_safe(icntnr, pos, tmp, hbl, plink) { -+ inode = au_igrab(&icntnr->vfs_inode); -+ ii_write_lock_child(inode); -+ do_put = au_plink_do_half_refresh(inode, br_id); -+ if (do_put) { -+ hlist_bl_del(&icntnr->plink); -+ iput(inode); -+ } -+ ii_write_unlock(inode); -+ iput(inode); -+ } -+ } -+} -diff --git a/fs/aufs/poll.c b/fs/aufs/poll.c -new file mode 100644 -index 000000000000..ff7697c334b4 ---- /dev/null -+++ b/fs/aufs/poll.c -@@ -0,0 +1,38 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * poll operation -+ * There is only one filesystem which implements ->poll operation, currently. -+ */ -+ -+#include "aufs.h" -+ -+__poll_t aufs_poll(struct file *file, struct poll_table_struct *pt) -+{ -+ __poll_t mask; -+ struct file *h_file; -+ struct super_block *sb; -+ -+ /* We should pretend an error happened. */ -+ mask = EPOLLERR /* | EPOLLIN | EPOLLOUT */; -+ sb = file->f_path.dentry->d_sb; -+ si_read_lock(sb, AuLock_FLUSH | AuLock_NOPLMW); -+ -+ h_file = au_read_pre(file, /*keep_fi*/0, /*lsc*/0); -+ if (IS_ERR(h_file)) { -+ AuDbg("h_file %ld\n", PTR_ERR(h_file)); -+ goto out; -+ } -+ -+ mask = vfs_poll(h_file, pt); -+ fput(h_file); /* instead of au_read_post() */ -+ -+out: -+ si_read_unlock(sb); -+ if (mask & EPOLLERR) -+ AuDbg("mask 0x%x\n", mask); -+ return mask; -+} -diff --git a/fs/aufs/posix_acl.c b/fs/aufs/posix_acl.c -new file mode 100644 -index 000000000000..946c2247e78d ---- /dev/null -+++ b/fs/aufs/posix_acl.c -@@ -0,0 +1,92 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2014-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * posix acl operations -+ */ -+ -+#include -+#include "aufs.h" -+ -+struct posix_acl *aufs_get_acl(struct inode *inode, int type) -+{ -+ struct posix_acl *acl; -+ int err; -+ aufs_bindex_t bindex; -+ struct inode *h_inode; -+ struct super_block *sb; -+ -+ acl = NULL; -+ sb = inode->i_sb; -+ si_read_lock(sb, AuLock_FLUSH); -+ ii_read_lock_child(inode); -+ if (!(sb->s_flags & SB_POSIXACL)) -+ goto out; -+ -+ bindex = au_ibtop(inode); -+ h_inode = au_h_iptr(inode, bindex); -+ if (unlikely(!h_inode -+ || ((h_inode->i_mode & S_IFMT) -+ != (inode->i_mode & S_IFMT)))) { -+ err = au_busy_or_stale(); -+ acl = ERR_PTR(err); -+ goto out; -+ } -+ -+ /* always topmost only */ -+ acl = get_acl(h_inode, type); -+ if (IS_ERR(acl)) -+ forget_cached_acl(inode, type); -+ else -+ set_cached_acl(inode, type, acl); -+ -+out: -+ ii_read_unlock(inode); -+ si_read_unlock(sb); -+ -+ AuTraceErrPtr(acl); -+ return acl; -+} -+ -+int aufs_set_acl(struct inode *inode, struct posix_acl *acl, int type) -+{ -+ int err; -+ ssize_t ssz; -+ struct dentry *dentry; -+ struct au_sxattr arg = { -+ .type = AU_ACL_SET, -+ .u.acl_set = { -+ .acl = acl, -+ .type = type -+ }, -+ }; -+ -+ IMustLock(inode); -+ -+ if (inode->i_ino == AUFS_ROOT_INO) -+ dentry = dget(inode->i_sb->s_root); -+ else { -+ dentry = d_find_alias(inode); -+ if (!dentry) -+ dentry = d_find_any_alias(inode); -+ if (!dentry) { -+ pr_warn("cannot handle this inode, " -+ "please report to aufs-users ML\n"); -+ err = -ENOENT; -+ goto out; -+ } -+ } -+ -+ ssz = au_sxattr(dentry, inode, &arg); -+ /* forget even it if succeeds since the branch might set differently */ -+ forget_cached_acl(inode, type); -+ dput(dentry); -+ err = ssz; -+ if (ssz >= 0) -+ err = 0; -+ -+out: -+ return err; -+} -diff --git a/fs/aufs/procfs.c b/fs/aufs/procfs.c -new file mode 100644 -index 000000000000..055e9bcc9af4 ---- /dev/null -+++ b/fs/aufs/procfs.c -@@ -0,0 +1,157 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2010-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * procfs interfaces -+ */ -+ -+#include -+#include "aufs.h" -+ -+static int au_procfs_plm_release(struct inode *inode, struct file *file) -+{ -+ struct au_sbinfo *sbinfo; -+ -+ sbinfo = file->private_data; -+ if (sbinfo) { -+ au_plink_maint_leave(sbinfo); -+ kobject_put(&sbinfo->si_kobj); -+ } -+ -+ return 0; -+} -+ -+static void au_procfs_plm_write_clean(struct file *file) -+{ -+ struct au_sbinfo *sbinfo; -+ -+ sbinfo = file->private_data; -+ if (sbinfo) -+ au_plink_clean(sbinfo->si_sb, /*verbose*/0); -+} -+ -+static int au_procfs_plm_write_si(struct file *file, unsigned long id) -+{ -+ int err; -+ struct super_block *sb; -+ struct au_sbinfo *sbinfo; -+ struct hlist_bl_node *pos; -+ -+ err = -EBUSY; -+ if (unlikely(file->private_data)) -+ goto out; -+ -+ sb = NULL; -+ /* don't use au_sbilist_lock() here */ -+ hlist_bl_lock(&au_sbilist); -+ hlist_bl_for_each_entry(sbinfo, pos, &au_sbilist, si_list) -+ if (id == sysaufs_si_id(sbinfo)) { -+ if (kobject_get_unless_zero(&sbinfo->si_kobj)) -+ sb = sbinfo->si_sb; -+ break; -+ } -+ hlist_bl_unlock(&au_sbilist); -+ -+ err = -EINVAL; -+ if (unlikely(!sb)) -+ goto out; -+ -+ err = au_plink_maint_enter(sb); -+ if (!err) -+ /* keep kobject_get() */ -+ file->private_data = sbinfo; -+ else -+ kobject_put(&sbinfo->si_kobj); -+out: -+ return err; -+} -+ -+/* -+ * Accept a valid "si=xxxx" only. -+ * Once it is accepted successfully, accept "clean" too. -+ */ -+static ssize_t au_procfs_plm_write(struct file *file, const char __user *ubuf, -+ size_t count, loff_t *ppos) -+{ -+ ssize_t err; -+ unsigned long id; -+ /* last newline is allowed */ -+ char buf[3 + sizeof(unsigned long) * 2 + 1]; -+ -+ err = -EACCES; -+ if (unlikely(!capable(CAP_SYS_ADMIN))) -+ goto out; -+ -+ err = -EINVAL; -+ if (unlikely(count > sizeof(buf))) -+ goto out; -+ -+ err = copy_from_user(buf, ubuf, count); -+ if (unlikely(err)) { -+ err = -EFAULT; -+ goto out; -+ } -+ buf[count] = 0; -+ -+ err = -EINVAL; -+ if (!strcmp("clean", buf)) { -+ au_procfs_plm_write_clean(file); -+ goto out_success; -+ } else if (unlikely(strncmp("si=", buf, 3))) -+ goto out; -+ -+ err = kstrtoul(buf + 3, 16, &id); -+ if (unlikely(err)) -+ goto out; -+ -+ err = au_procfs_plm_write_si(file, id); -+ if (unlikely(err)) -+ goto out; -+ -+out_success: -+ err = count; /* success */ -+out: -+ return err; -+} -+ -+static const struct proc_ops au_procfs_plm_op = { -+ .proc_write = au_procfs_plm_write, -+ .proc_release = au_procfs_plm_release -+}; -+ -+/* ---------------------------------------------------------------------- */ -+ -+static struct proc_dir_entry *au_procfs_dir; -+ -+void au_procfs_fin(void) -+{ -+ remove_proc_entry(AUFS_PLINK_MAINT_NAME, au_procfs_dir); -+ remove_proc_entry(AUFS_PLINK_MAINT_DIR, NULL); -+} -+ -+int __init au_procfs_init(void) -+{ -+ int err; -+ struct proc_dir_entry *entry; -+ -+ err = -ENOMEM; -+ au_procfs_dir = proc_mkdir(AUFS_PLINK_MAINT_DIR, NULL); -+ if (unlikely(!au_procfs_dir)) -+ goto out; -+ -+ entry = proc_create(AUFS_PLINK_MAINT_NAME, S_IFREG | 0200, -+ au_procfs_dir, &au_procfs_plm_op); -+ if (unlikely(!entry)) -+ goto out_dir; -+ -+ err = 0; -+ goto out; /* success */ -+ -+ -+out_dir: -+ remove_proc_entry(AUFS_PLINK_MAINT_DIR, NULL); -+out: -+ return err; -+} -diff --git a/fs/aufs/rdu.c b/fs/aufs/rdu.c -new file mode 100644 -index 000000000000..bef4607f057e ---- /dev/null -+++ b/fs/aufs/rdu.c -@@ -0,0 +1,371 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * readdir in userspace. -+ */ -+ -+#include -+#include -+#include -+#include "aufs.h" -+ -+/* bits for struct aufs_rdu.flags */ -+#define AuRdu_CALLED 1 -+#define AuRdu_CONT (1 << 1) -+#define AuRdu_FULL (1 << 2) -+#define au_ftest_rdu(flags, name) ((flags) & AuRdu_##name) -+#define au_fset_rdu(flags, name) \ -+ do { (flags) |= AuRdu_##name; } while (0) -+#define au_fclr_rdu(flags, name) \ -+ do { (flags) &= ~AuRdu_##name; } while (0) -+ -+struct au_rdu_arg { -+ struct dir_context ctx; -+ struct aufs_rdu *rdu; -+ union au_rdu_ent_ul ent; -+ unsigned long end; -+ -+ struct super_block *sb; -+ int err; -+}; -+ -+static int au_rdu_fill(struct dir_context *ctx, const char *name, int nlen, -+ loff_t offset, u64 h_ino, unsigned int d_type) -+{ -+ int err, len; -+ struct au_rdu_arg *arg = container_of(ctx, struct au_rdu_arg, ctx); -+ struct aufs_rdu *rdu = arg->rdu; -+ struct au_rdu_ent ent; -+ -+ err = 0; -+ arg->err = 0; -+ au_fset_rdu(rdu->cookie.flags, CALLED); -+ len = au_rdu_len(nlen); -+ if (arg->ent.ul + len < arg->end) { -+ ent.ino = h_ino; -+ ent.bindex = rdu->cookie.bindex; -+ ent.type = d_type; -+ ent.nlen = nlen; -+ if (unlikely(nlen > AUFS_MAX_NAMELEN)) -+ ent.type = DT_UNKNOWN; -+ -+ /* unnecessary to support mmap_sem since this is a dir */ -+ err = -EFAULT; -+ if (copy_to_user(arg->ent.e, &ent, sizeof(ent))) -+ goto out; -+ if (copy_to_user(arg->ent.e->name, name, nlen)) -+ goto out; -+ /* the terminating NULL */ -+ if (__put_user(0, arg->ent.e->name + nlen)) -+ goto out; -+ err = 0; -+ /* AuDbg("%p, %.*s\n", arg->ent.p, nlen, name); */ -+ arg->ent.ul += len; -+ rdu->rent++; -+ } else { -+ err = -EFAULT; -+ au_fset_rdu(rdu->cookie.flags, FULL); -+ rdu->full = 1; -+ rdu->tail = arg->ent; -+ } -+ -+out: -+ /* AuTraceErr(err); */ -+ return err; -+} -+ -+static int au_rdu_do(struct file *h_file, struct au_rdu_arg *arg) -+{ -+ int err; -+ loff_t offset; -+ struct au_rdu_cookie *cookie = &arg->rdu->cookie; -+ -+ /* we don't have to care (FMODE_32BITHASH | FMODE_64BITHASH) for ext4 */ -+ offset = vfsub_llseek(h_file, cookie->h_pos, SEEK_SET); -+ err = offset; -+ if (unlikely(offset != cookie->h_pos)) -+ goto out; -+ -+ err = 0; -+ do { -+ arg->err = 0; -+ au_fclr_rdu(cookie->flags, CALLED); -+ /* smp_mb(); */ -+ err = vfsub_iterate_dir(h_file, &arg->ctx); -+ if (err >= 0) -+ err = arg->err; -+ } while (!err -+ && au_ftest_rdu(cookie->flags, CALLED) -+ && !au_ftest_rdu(cookie->flags, FULL)); -+ cookie->h_pos = h_file->f_pos; -+ -+out: -+ AuTraceErr(err); -+ return err; -+} -+ -+static int au_rdu(struct file *file, struct aufs_rdu *rdu) -+{ -+ int err; -+ aufs_bindex_t bbot; -+ struct au_rdu_arg arg = { -+ .ctx = { -+ .actor = au_rdu_fill -+ } -+ }; -+ struct dentry *dentry; -+ struct inode *inode; -+ struct file *h_file; -+ struct au_rdu_cookie *cookie = &rdu->cookie; -+ -+ /* VERIFY_WRITE */ -+ err = !access_ok(rdu->ent.e, rdu->sz); -+ if (unlikely(err)) { -+ err = -EFAULT; -+ AuTraceErr(err); -+ goto out; -+ } -+ rdu->rent = 0; -+ rdu->tail = rdu->ent; -+ rdu->full = 0; -+ arg.rdu = rdu; -+ arg.ent = rdu->ent; -+ arg.end = arg.ent.ul; -+ arg.end += rdu->sz; -+ -+ err = -ENOTDIR; -+ if (unlikely(!file->f_op->iterate && !file->f_op->iterate_shared)) -+ goto out; -+ -+ err = security_file_permission(file, MAY_READ); -+ AuTraceErr(err); -+ if (unlikely(err)) -+ goto out; -+ -+ dentry = file->f_path.dentry; -+ inode = d_inode(dentry); -+ inode_lock_shared(inode); -+ -+ arg.sb = inode->i_sb; -+ err = si_read_lock(arg.sb, AuLock_FLUSH | AuLock_NOPLM); -+ if (unlikely(err)) -+ goto out_mtx; -+ err = au_alive_dir(dentry); -+ if (unlikely(err)) -+ goto out_si; -+ /* todo: reval? */ -+ fi_read_lock(file); -+ -+ err = -EAGAIN; -+ if (unlikely(au_ftest_rdu(cookie->flags, CONT) -+ && cookie->generation != au_figen(file))) -+ goto out_unlock; -+ -+ err = 0; -+ if (!rdu->blk) { -+ rdu->blk = au_sbi(arg.sb)->si_rdblk; -+ if (!rdu->blk) -+ rdu->blk = au_dir_size(file, /*dentry*/NULL); -+ } -+ bbot = au_fbtop(file); -+ if (cookie->bindex < bbot) -+ cookie->bindex = bbot; -+ bbot = au_fbbot_dir(file); -+ /* AuDbg("b%d, b%d\n", cookie->bindex, bbot); */ -+ for (; !err && cookie->bindex <= bbot; -+ cookie->bindex++, cookie->h_pos = 0) { -+ h_file = au_hf_dir(file, cookie->bindex); -+ if (!h_file) -+ continue; -+ -+ au_fclr_rdu(cookie->flags, FULL); -+ err = au_rdu_do(h_file, &arg); -+ AuTraceErr(err); -+ if (unlikely(au_ftest_rdu(cookie->flags, FULL) || err)) -+ break; -+ } -+ AuDbg("rent %llu\n", rdu->rent); -+ -+ if (!err && !au_ftest_rdu(cookie->flags, CONT)) { -+ rdu->shwh = !!au_opt_test(au_sbi(arg.sb)->si_mntflags, SHWH); -+ au_fset_rdu(cookie->flags, CONT); -+ cookie->generation = au_figen(file); -+ } -+ -+ ii_read_lock_child(inode); -+ fsstack_copy_attr_atime(inode, au_h_iptr(inode, au_ibtop(inode))); -+ ii_read_unlock(inode); -+ -+out_unlock: -+ fi_read_unlock(file); -+out_si: -+ si_read_unlock(arg.sb); -+out_mtx: -+ inode_unlock_shared(inode); -+out: -+ AuTraceErr(err); -+ return err; -+} -+ -+static int au_rdu_ino(struct file *file, struct aufs_rdu *rdu) -+{ -+ int err; -+ ino_t ino; -+ unsigned long long nent; -+ union au_rdu_ent_ul *u; -+ struct au_rdu_ent ent; -+ struct super_block *sb; -+ -+ err = 0; -+ nent = rdu->nent; -+ u = &rdu->ent; -+ sb = file->f_path.dentry->d_sb; -+ si_read_lock(sb, AuLock_FLUSH); -+ while (nent-- > 0) { -+ /* unnecessary to support mmap_sem since this is a dir */ -+ err = copy_from_user(&ent, u->e, sizeof(ent)); -+ if (!err) -+ /* VERIFY_WRITE */ -+ err = !access_ok(&u->e->ino, sizeof(ino)); -+ if (unlikely(err)) { -+ err = -EFAULT; -+ AuTraceErr(err); -+ break; -+ } -+ -+ /* AuDbg("b%d, i%llu\n", ent.bindex, ent.ino); */ -+ if (!ent.wh) -+ err = au_ino(sb, ent.bindex, ent.ino, ent.type, &ino); -+ else -+ err = au_wh_ino(sb, ent.bindex, ent.ino, ent.type, -+ &ino); -+ if (unlikely(err)) { -+ AuTraceErr(err); -+ break; -+ } -+ -+ err = __put_user(ino, &u->e->ino); -+ if (unlikely(err)) { -+ err = -EFAULT; -+ AuTraceErr(err); -+ break; -+ } -+ u->ul += au_rdu_len(ent.nlen); -+ } -+ si_read_unlock(sb); -+ -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+static int au_rdu_verify(struct aufs_rdu *rdu) -+{ -+ AuDbg("rdu{%llu, %p, %u | %u | %llu, %u, %u | " -+ "%llu, b%d, 0x%x, g%u}\n", -+ rdu->sz, rdu->ent.e, rdu->verify[AufsCtlRduV_SZ], -+ rdu->blk, -+ rdu->rent, rdu->shwh, rdu->full, -+ rdu->cookie.h_pos, rdu->cookie.bindex, rdu->cookie.flags, -+ rdu->cookie.generation); -+ -+ if (rdu->verify[AufsCtlRduV_SZ] == sizeof(*rdu)) -+ return 0; -+ -+ AuDbg("%u:%u\n", -+ rdu->verify[AufsCtlRduV_SZ], (unsigned int)sizeof(*rdu)); -+ return -EINVAL; -+} -+ -+long au_rdu_ioctl(struct file *file, unsigned int cmd, unsigned long arg) -+{ -+ long err, e; -+ struct aufs_rdu rdu; -+ void __user *p = (void __user *)arg; -+ -+ err = copy_from_user(&rdu, p, sizeof(rdu)); -+ if (unlikely(err)) { -+ err = -EFAULT; -+ AuTraceErr(err); -+ goto out; -+ } -+ err = au_rdu_verify(&rdu); -+ if (unlikely(err)) -+ goto out; -+ -+ switch (cmd) { -+ case AUFS_CTL_RDU: -+ err = au_rdu(file, &rdu); -+ if (unlikely(err)) -+ break; -+ -+ e = copy_to_user(p, &rdu, sizeof(rdu)); -+ if (unlikely(e)) { -+ err = -EFAULT; -+ AuTraceErr(err); -+ } -+ break; -+ case AUFS_CTL_RDU_INO: -+ err = au_rdu_ino(file, &rdu); -+ break; -+ -+ default: -+ /* err = -ENOTTY; */ -+ err = -EINVAL; -+ } -+ -+out: -+ AuTraceErr(err); -+ return err; -+} -+ -+#ifdef CONFIG_COMPAT -+long au_rdu_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg) -+{ -+ long err, e; -+ struct aufs_rdu rdu; -+ void __user *p = compat_ptr(arg); -+ -+ /* todo: get_user()? */ -+ err = copy_from_user(&rdu, p, sizeof(rdu)); -+ if (unlikely(err)) { -+ err = -EFAULT; -+ AuTraceErr(err); -+ goto out; -+ } -+ rdu.ent.e = compat_ptr(rdu.ent.ul); -+ err = au_rdu_verify(&rdu); -+ if (unlikely(err)) -+ goto out; -+ -+ switch (cmd) { -+ case AUFS_CTL_RDU: -+ err = au_rdu(file, &rdu); -+ if (unlikely(err)) -+ break; -+ -+ rdu.ent.ul = ptr_to_compat(rdu.ent.e); -+ rdu.tail.ul = ptr_to_compat(rdu.tail.e); -+ e = copy_to_user(p, &rdu, sizeof(rdu)); -+ if (unlikely(e)) { -+ err = -EFAULT; -+ AuTraceErr(err); -+ } -+ break; -+ case AUFS_CTL_RDU_INO: -+ err = au_rdu_ino(file, &rdu); -+ break; -+ -+ default: -+ /* err = -ENOTTY; */ -+ err = -EINVAL; -+ } -+ -+out: -+ AuTraceErr(err); -+ return err; -+} -+#endif -diff --git a/fs/aufs/rwsem.h b/fs/aufs/rwsem.h -new file mode 100644 -index 000000000000..ab5af8236699 ---- /dev/null -+++ b/fs/aufs/rwsem.h -@@ -0,0 +1,60 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * simple read-write semaphore wrappers -+ */ -+ -+#ifndef __AUFS_RWSEM_H__ -+#define __AUFS_RWSEM_H__ -+ -+#ifdef __KERNEL__ -+ -+#include "debug.h" -+ -+/* in the future, the name 'au_rwsem' will be totally gone */ -+#define au_rwsem rw_semaphore -+ -+/* to debug easier, do not make them inlined functions */ -+#define AuRwMustNoWaiters(rw) AuDebugOn(rwsem_is_contended(rw)) -+/* rwsem_is_locked() is unusable */ -+#define AuRwMustReadLock(rw) AuDebugOn(!lockdep_recursing(current) \ -+ && debug_locks \ -+ && !lockdep_is_held_type(rw, 1)) -+#define AuRwMustWriteLock(rw) AuDebugOn(!lockdep_recursing(current) \ -+ && debug_locks \ -+ && !lockdep_is_held_type(rw, 0)) -+#define AuRwMustAnyLock(rw) AuDebugOn(!lockdep_recursing(current) \ -+ && debug_locks \ -+ && !lockdep_is_held(rw)) -+#define AuRwDestroy(rw) AuDebugOn(!lockdep_recursing(current) \ -+ && debug_locks \ -+ && lockdep_is_held(rw)) -+ -+#define au_rw_init(rw) init_rwsem(rw) -+ -+#define au_rw_init_wlock(rw) do { \ -+ au_rw_init(rw); \ -+ down_write(rw); \ -+ } while (0) -+ -+#define au_rw_init_wlock_nested(rw, lsc) do { \ -+ au_rw_init(rw); \ -+ down_write_nested(rw, lsc); \ -+ } while (0) -+ -+#define au_rw_read_lock(rw) down_read(rw) -+#define au_rw_read_lock_nested(rw, lsc) down_read_nested(rw, lsc) -+#define au_rw_read_unlock(rw) up_read(rw) -+#define au_rw_dgrade_lock(rw) downgrade_write(rw) -+#define au_rw_write_lock(rw) down_write(rw) -+#define au_rw_write_lock_nested(rw, lsc) down_write_nested(rw, lsc) -+#define au_rw_write_unlock(rw) up_write(rw) -+/* why is not _nested version defined? */ -+#define au_rw_read_trylock(rw) down_read_trylock(rw) -+#define au_rw_write_trylock(rw) down_write_trylock(rw) -+ -+#endif /* __KERNEL__ */ -+#endif /* __AUFS_RWSEM_H__ */ -diff --git a/fs/aufs/sbinfo.c b/fs/aufs/sbinfo.c -new file mode 100644 -index 000000000000..26c6afab5df6 ---- /dev/null -+++ b/fs/aufs/sbinfo.c -@@ -0,0 +1,301 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * superblock private data -+ */ -+ -+#include -+#include "aufs.h" -+ -+/* -+ * they are necessary regardless sysfs is disabled. -+ */ -+void au_si_free(struct kobject *kobj) -+{ -+ int i; -+ struct au_sbinfo *sbinfo; -+ char *locked __maybe_unused; /* debug only */ -+ -+ sbinfo = container_of(kobj, struct au_sbinfo, si_kobj); -+ for (i = 0; i < AuPlink_NHASH; i++) -+ AuDebugOn(!hlist_bl_empty(sbinfo->si_plink + i)); -+ AuDebugOn(atomic_read(&sbinfo->si_nowait.nw_len)); -+ -+ AuLCntZero(au_lcnt_read(&sbinfo->si_ninodes, /*do_rev*/0)); -+ au_lcnt_fin(&sbinfo->si_ninodes, /*do_sync*/0); -+ AuLCntZero(au_lcnt_read(&sbinfo->si_nfiles, /*do_rev*/0)); -+ au_lcnt_fin(&sbinfo->si_nfiles, /*do_sync*/0); -+ -+ dbgaufs_si_fin(sbinfo); -+ au_rw_write_lock(&sbinfo->si_rwsem); -+ au_br_free(sbinfo); -+ au_rw_write_unlock(&sbinfo->si_rwsem); -+ -+ au_kfree_try_rcu(sbinfo->si_branch); -+ mutex_destroy(&sbinfo->si_xib_mtx); -+ AuRwDestroy(&sbinfo->si_rwsem); -+ -+ au_lcnt_wait_for_fin(&sbinfo->si_ninodes); -+ /* si_nfiles is waited too */ -+ au_kfree_rcu(sbinfo); -+} -+ -+int au_si_alloc(struct super_block *sb) -+{ -+ int err, i; -+ struct au_sbinfo *sbinfo; -+ -+ err = -ENOMEM; -+ sbinfo = kzalloc(sizeof(*sbinfo), GFP_NOFS); -+ if (unlikely(!sbinfo)) -+ goto out; -+ -+ /* will be reallocated separately */ -+ sbinfo->si_branch = kzalloc(sizeof(*sbinfo->si_branch), GFP_NOFS); -+ if (unlikely(!sbinfo->si_branch)) -+ goto out_sbinfo; -+ -+ err = sysaufs_si_init(sbinfo); -+ if (!err) { -+ dbgaufs_si_null(sbinfo); -+ err = dbgaufs_si_init(sbinfo); -+ if (unlikely(err)) -+ kobject_put(&sbinfo->si_kobj); -+ } -+ if (unlikely(err)) -+ goto out_br; -+ -+ au_nwt_init(&sbinfo->si_nowait); -+ au_rw_init_wlock(&sbinfo->si_rwsem); -+ -+ au_lcnt_init(&sbinfo->si_ninodes, /*release*/NULL); -+ au_lcnt_init(&sbinfo->si_nfiles, /*release*/NULL); -+ -+ sbinfo->si_bbot = -1; -+ sbinfo->si_last_br_id = AUFS_BRANCH_MAX / 2; -+ -+ sbinfo->si_wbr_copyup = AuWbrCopyup_Def; -+ sbinfo->si_wbr_create = AuWbrCreate_Def; -+ sbinfo->si_wbr_copyup_ops = au_wbr_copyup_ops + sbinfo->si_wbr_copyup; -+ sbinfo->si_wbr_create_ops = au_wbr_create_ops + sbinfo->si_wbr_create; -+ -+ au_fhsm_init(sbinfo); -+ -+ sbinfo->si_mntflags = au_opts_plink(AuOpt_Def); -+ -+ sbinfo->si_xino_jiffy = jiffies; -+ sbinfo->si_xino_expire -+ = msecs_to_jiffies(AUFS_XINO_DEF_SEC * MSEC_PER_SEC); -+ mutex_init(&sbinfo->si_xib_mtx); -+ /* leave si_xib_last_pindex and si_xib_next_bit */ -+ -+ INIT_HLIST_BL_HEAD(&sbinfo->si_aopen); -+ -+ sbinfo->si_rdcache = msecs_to_jiffies(AUFS_RDCACHE_DEF * MSEC_PER_SEC); -+ sbinfo->si_rdblk = AUFS_RDBLK_DEF; -+ sbinfo->si_rdhash = AUFS_RDHASH_DEF; -+ sbinfo->si_dirwh = AUFS_DIRWH_DEF; -+ -+ for (i = 0; i < AuPlink_NHASH; i++) -+ INIT_HLIST_BL_HEAD(sbinfo->si_plink + i); -+ init_waitqueue_head(&sbinfo->si_plink_wq); -+ spin_lock_init(&sbinfo->si_plink_maint_lock); -+ -+ INIT_HLIST_BL_HEAD(&sbinfo->si_files); -+ -+ /* with getattr by default */ -+ sbinfo->si_iop_array = aufs_iop; -+ -+ /* leave other members for sysaufs and si_mnt. */ -+ sbinfo->si_sb = sb; -+ sb->s_fs_info = sbinfo; -+ si_pid_set(sb); -+ return 0; /* success */ -+ -+out_br: -+ au_kfree_try_rcu(sbinfo->si_branch); -+out_sbinfo: -+ au_kfree_rcu(sbinfo); -+out: -+ return err; -+} -+ -+int au_sbr_realloc(struct au_sbinfo *sbinfo, int nbr, int may_shrink) -+{ -+ int err, sz; -+ struct au_branch **brp; -+ -+ AuRwMustWriteLock(&sbinfo->si_rwsem); -+ -+ err = -ENOMEM; -+ sz = sizeof(*brp) * (sbinfo->si_bbot + 1); -+ if (unlikely(!sz)) -+ sz = sizeof(*brp); -+ brp = au_kzrealloc(sbinfo->si_branch, sz, sizeof(*brp) * nbr, GFP_NOFS, -+ may_shrink); -+ if (brp) { -+ sbinfo->si_branch = brp; -+ err = 0; -+ } -+ -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+unsigned int au_sigen_inc(struct super_block *sb) -+{ -+ unsigned int gen; -+ struct inode *inode; -+ -+ SiMustWriteLock(sb); -+ -+ gen = ++au_sbi(sb)->si_generation; -+ au_update_digen(sb->s_root); -+ inode = d_inode(sb->s_root); -+ au_update_iigen(inode, /*half*/0); -+ inode_inc_iversion(inode); -+ return gen; -+} -+ -+aufs_bindex_t au_new_br_id(struct super_block *sb) -+{ -+ aufs_bindex_t br_id; -+ int i; -+ struct au_sbinfo *sbinfo; -+ -+ SiMustWriteLock(sb); -+ -+ sbinfo = au_sbi(sb); -+ for (i = 0; i <= AUFS_BRANCH_MAX; i++) { -+ br_id = ++sbinfo->si_last_br_id; -+ AuDebugOn(br_id < 0); -+ if (br_id && au_br_index(sb, br_id) < 0) -+ return br_id; -+ } -+ -+ return -1; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* it is ok that new 'nwt' tasks are appended while we are sleeping */ -+int si_read_lock(struct super_block *sb, int flags) -+{ -+ int err; -+ -+ err = 0; -+ if (au_ftest_lock(flags, FLUSH)) -+ au_nwt_flush(&au_sbi(sb)->si_nowait); -+ -+ si_noflush_read_lock(sb); -+ err = au_plink_maint(sb, flags); -+ if (unlikely(err)) -+ si_read_unlock(sb); -+ -+ return err; -+} -+ -+int si_write_lock(struct super_block *sb, int flags) -+{ -+ int err; -+ -+ if (au_ftest_lock(flags, FLUSH)) -+ au_nwt_flush(&au_sbi(sb)->si_nowait); -+ -+ si_noflush_write_lock(sb); -+ err = au_plink_maint(sb, flags); -+ if (unlikely(err)) -+ si_write_unlock(sb); -+ -+ return err; -+} -+ -+/* dentry and super_block lock. call at entry point */ -+int aufs_read_lock(struct dentry *dentry, int flags) -+{ -+ int err; -+ struct super_block *sb; -+ -+ sb = dentry->d_sb; -+ err = si_read_lock(sb, flags); -+ if (unlikely(err)) -+ goto out; -+ -+ if (au_ftest_lock(flags, DW)) -+ di_write_lock_child(dentry); -+ else -+ di_read_lock_child(dentry, flags); -+ -+ if (au_ftest_lock(flags, GEN)) { -+ err = au_digen_test(dentry, au_sigen(sb)); -+ if (!au_opt_test(au_mntflags(sb), UDBA_NONE)) -+ AuDebugOn(!err && au_dbrange_test(dentry)); -+ else if (!err) -+ err = au_dbrange_test(dentry); -+ if (unlikely(err)) -+ aufs_read_unlock(dentry, flags); -+ } -+ -+out: -+ return err; -+} -+ -+void aufs_read_unlock(struct dentry *dentry, int flags) -+{ -+ if (au_ftest_lock(flags, DW)) -+ di_write_unlock(dentry); -+ else -+ di_read_unlock(dentry, flags); -+ si_read_unlock(dentry->d_sb); -+} -+ -+void aufs_write_lock(struct dentry *dentry) -+{ -+ si_write_lock(dentry->d_sb, AuLock_FLUSH | AuLock_NOPLMW); -+ di_write_lock_child(dentry); -+} -+ -+void aufs_write_unlock(struct dentry *dentry) -+{ -+ di_write_unlock(dentry); -+ si_write_unlock(dentry->d_sb); -+} -+ -+int aufs_read_and_write_lock2(struct dentry *d1, struct dentry *d2, int flags) -+{ -+ int err; -+ unsigned int sigen; -+ struct super_block *sb; -+ -+ sb = d1->d_sb; -+ err = si_read_lock(sb, flags); -+ if (unlikely(err)) -+ goto out; -+ -+ di_write_lock2_child(d1, d2, au_ftest_lock(flags, DIRS)); -+ -+ if (au_ftest_lock(flags, GEN)) { -+ sigen = au_sigen(sb); -+ err = au_digen_test(d1, sigen); -+ AuDebugOn(!err && au_dbrange_test(d1)); -+ if (!err) { -+ err = au_digen_test(d2, sigen); -+ AuDebugOn(!err && au_dbrange_test(d2)); -+ } -+ if (unlikely(err)) -+ aufs_read_and_write_unlock2(d1, d2); -+ } -+ -+out: -+ return err; -+} -+ -+void aufs_read_and_write_unlock2(struct dentry *d1, struct dentry *d2) -+{ -+ di_write_unlock2(d1, d2); -+ si_read_unlock(d1->d_sb); -+} -diff --git a/fs/aufs/super.c b/fs/aufs/super.c -new file mode 100644 -index 000000000000..589dd0122020 ---- /dev/null -+++ b/fs/aufs/super.c -@@ -0,0 +1,1034 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * mount and super_block operations -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include "aufs.h" -+ -+/* -+ * super_operations -+ */ -+static struct inode *aufs_alloc_inode(struct super_block *sb __maybe_unused) -+{ -+ struct au_icntnr *c; -+ -+ c = au_cache_alloc_icntnr(); -+ if (c) { -+ au_icntnr_init(c); -+ inode_set_iversion(&c->vfs_inode, 1); /* sigen(sb); */ -+ c->iinfo.ii_hinode = NULL; -+ return &c->vfs_inode; -+ } -+ return NULL; -+} -+ -+static void aufs_destroy_inode(struct inode *inode) -+{ -+ if (!au_is_bad_inode(inode)) -+ au_iinfo_fin(inode); -+} -+ -+static void aufs_free_inode(struct inode *inode) -+{ -+ au_cache_free_icntnr(container_of(inode, struct au_icntnr, vfs_inode)); -+} -+ -+struct inode *au_iget_locked(struct super_block *sb, ino_t ino) -+{ -+ struct inode *inode; -+ int err; -+ -+ inode = iget_locked(sb, ino); -+ if (unlikely(!inode)) { -+ inode = ERR_PTR(-ENOMEM); -+ goto out; -+ } -+ if (!(inode->i_state & I_NEW)) -+ goto out; -+ -+ err = au_xigen_new(inode); -+ if (!err) -+ err = au_iinfo_init(inode); -+ if (!err) -+ inode_inc_iversion(inode); -+ else { -+ iget_failed(inode); -+ inode = ERR_PTR(err); -+ } -+ -+out: -+ /* never return NULL */ -+ AuDebugOn(!inode); -+ AuTraceErrPtr(inode); -+ return inode; -+} -+ -+/* lock free root dinfo */ -+static int au_show_brs(struct seq_file *seq, struct super_block *sb) -+{ -+ int err; -+ aufs_bindex_t bindex, bbot; -+ struct path path; -+ struct au_hdentry *hdp; -+ struct au_branch *br; -+ au_br_perm_str_t perm; -+ -+ err = 0; -+ bbot = au_sbbot(sb); -+ bindex = 0; -+ hdp = au_hdentry(au_di(sb->s_root), bindex); -+ for (; !err && bindex <= bbot; bindex++, hdp++) { -+ br = au_sbr(sb, bindex); -+ path.mnt = au_br_mnt(br); -+ path.dentry = hdp->hd_dentry; -+ err = au_seq_path(seq, &path); -+ if (!err) { -+ au_optstr_br_perm(&perm, br->br_perm); -+ seq_printf(seq, "=%s", perm.a); -+ if (bindex != bbot) -+ seq_putc(seq, ':'); -+ } -+ } -+ if (unlikely(err || seq_has_overflowed(seq))) -+ err = -E2BIG; -+ -+ return err; -+} -+ -+static void au_gen_fmt(char *fmt, int len __maybe_unused, const char *pat, -+ const char *append) -+{ -+ char *p; -+ -+ p = fmt; -+ while (*pat != ':') -+ *p++ = *pat++; -+ *p++ = *pat++; -+ strcpy(p, append); -+ AuDebugOn(strlen(fmt) >= len); -+} -+ -+static void au_show_wbr_create(struct seq_file *m, int v, -+ struct au_sbinfo *sbinfo) -+{ -+ const char *pat; -+ char fmt[32]; -+ struct au_wbr_mfs *mfs; -+ -+ AuRwMustAnyLock(&sbinfo->si_rwsem); -+ -+ seq_puts(m, ",create="); -+ pat = au_optstr_wbr_create(v); -+ mfs = &sbinfo->si_wbr_mfs; -+ switch (v) { -+ case AuWbrCreate_TDP: -+ case AuWbrCreate_RR: -+ case AuWbrCreate_MFS: -+ case AuWbrCreate_PMFS: -+ seq_puts(m, pat); -+ break; -+ case AuWbrCreate_MFSRR: -+ case AuWbrCreate_TDMFS: -+ case AuWbrCreate_PMFSRR: -+ au_gen_fmt(fmt, sizeof(fmt), pat, "%llu"); -+ seq_printf(m, fmt, mfs->mfsrr_watermark); -+ break; -+ case AuWbrCreate_MFSV: -+ case AuWbrCreate_PMFSV: -+ au_gen_fmt(fmt, sizeof(fmt), pat, "%lu"); -+ seq_printf(m, fmt, -+ jiffies_to_msecs(mfs->mfs_expire) -+ / MSEC_PER_SEC); -+ break; -+ case AuWbrCreate_MFSRRV: -+ case AuWbrCreate_TDMFSV: -+ case AuWbrCreate_PMFSRRV: -+ au_gen_fmt(fmt, sizeof(fmt), pat, "%llu:%lu"); -+ seq_printf(m, fmt, mfs->mfsrr_watermark, -+ jiffies_to_msecs(mfs->mfs_expire) / MSEC_PER_SEC); -+ break; -+ default: -+ BUG(); -+ } -+} -+ -+static int au_show_xino(struct seq_file *seq, struct super_block *sb) -+{ -+#ifdef CONFIG_SYSFS -+ return 0; -+#else -+ int err; -+ const int len = sizeof(AUFS_XINO_FNAME) - 1; -+ aufs_bindex_t bindex, brid; -+ struct qstr *name; -+ struct file *f; -+ struct dentry *d, *h_root; -+ struct au_branch *br; -+ -+ AuRwMustAnyLock(&sbinfo->si_rwsem); -+ -+ err = 0; -+ f = au_sbi(sb)->si_xib; -+ if (!f) -+ goto out; -+ -+ /* stop printing the default xino path on the first writable branch */ -+ h_root = NULL; -+ bindex = au_xi_root(sb, f->f_path.dentry); -+ if (bindex >= 0) { -+ br = au_sbr_sb(sb, bindex); -+ h_root = au_br_dentry(br); -+ } -+ -+ d = f->f_path.dentry; -+ name = &d->d_name; -+ /* safe ->d_parent because the file is unlinked */ -+ if (d->d_parent == h_root -+ && name->len == len -+ && !memcmp(name->name, AUFS_XINO_FNAME, len)) -+ goto out; -+ -+ seq_puts(seq, ",xino="); -+ err = au_xino_path(seq, f); -+ -+out: -+ return err; -+#endif -+} -+ -+/* seq_file will re-call me in case of too long string */ -+static int aufs_show_options(struct seq_file *m, struct dentry *dentry) -+{ -+ int err; -+ unsigned int mnt_flags, v; -+ struct super_block *sb; -+ struct au_sbinfo *sbinfo; -+ -+#define AuBool(name, str) do { \ -+ v = au_opt_test(mnt_flags, name); \ -+ if (v != au_opt_test(AuOpt_Def, name)) \ -+ seq_printf(m, ",%s" #str, v ? "" : "no"); \ -+} while (0) -+ -+#define AuStr(name, str) do { \ -+ v = mnt_flags & AuOptMask_##name; \ -+ if (v != (AuOpt_Def & AuOptMask_##name)) \ -+ seq_printf(m, "," #str "=%s", au_optstr_##str(v)); \ -+} while (0) -+ -+#define AuUInt(name, str, val) do { \ -+ if (val != AUFS_##name##_DEF) \ -+ seq_printf(m, "," #str "=%u", val); \ -+} while (0) -+ -+ sb = dentry->d_sb; -+ if (sb->s_flags & SB_POSIXACL) -+ seq_puts(m, ",acl"); -+#if 0 /* reserved for future use */ -+ if (sb->s_flags & SB_I_VERSION) -+ seq_puts(m, ",i_version"); -+#endif -+ -+ /* lock free root dinfo */ -+ si_noflush_read_lock(sb); -+ sbinfo = au_sbi(sb); -+ seq_printf(m, ",si=%lx", sysaufs_si_id(sbinfo)); -+ -+ mnt_flags = au_mntflags(sb); -+ if (au_opt_test(mnt_flags, XINO)) { -+ err = au_show_xino(m, sb); -+ if (unlikely(err)) -+ goto out; -+ } else -+ seq_puts(m, ",noxino"); -+ -+ AuBool(TRUNC_XINO, trunc_xino); -+ AuStr(UDBA, udba); -+ AuBool(SHWH, shwh); -+ AuBool(PLINK, plink); -+ AuBool(DIO, dio); -+ AuBool(DIRPERM1, dirperm1); -+ -+ v = sbinfo->si_wbr_create; -+ if (v != AuWbrCreate_Def) -+ au_show_wbr_create(m, v, sbinfo); -+ -+ v = sbinfo->si_wbr_copyup; -+ if (v != AuWbrCopyup_Def) -+ seq_printf(m, ",cpup=%s", au_optstr_wbr_copyup(v)); -+ -+ v = au_opt_test(mnt_flags, ALWAYS_DIROPQ); -+ if (v != au_opt_test(AuOpt_Def, ALWAYS_DIROPQ)) -+ seq_printf(m, ",diropq=%c", v ? 'a' : 'w'); -+ -+ AuUInt(DIRWH, dirwh, sbinfo->si_dirwh); -+ -+ v = jiffies_to_msecs(sbinfo->si_rdcache) / MSEC_PER_SEC; -+ AuUInt(RDCACHE, rdcache, v); -+ -+ AuUInt(RDBLK, rdblk, sbinfo->si_rdblk); -+ AuUInt(RDHASH, rdhash, sbinfo->si_rdhash); -+ -+ au_fhsm_show(m, sbinfo); -+ -+ AuBool(DIRREN, dirren); -+ AuBool(SUM, sum); -+ /* AuBool(SUM_W, wsum); */ -+ AuBool(WARN_PERM, warn_perm); -+ AuBool(VERBOSE, verbose); -+ -+out: -+ /* be sure to print "br:" last */ -+ if (!sysaufs_brs) { -+ seq_puts(m, ",br:"); -+ au_show_brs(m, sb); -+ } -+ si_read_unlock(sb); -+ return 0; -+ -+#undef AuBool -+#undef AuStr -+#undef AuUInt -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* sum mode which returns the summation for statfs(2) */ -+ -+static u64 au_add_till_max(u64 a, u64 b) -+{ -+ u64 old; -+ -+ old = a; -+ a += b; -+ if (old <= a) -+ return a; -+ return ULLONG_MAX; -+} -+ -+static u64 au_mul_till_max(u64 a, long mul) -+{ -+ u64 old; -+ -+ old = a; -+ a *= mul; -+ if (old <= a) -+ return a; -+ return ULLONG_MAX; -+} -+ -+static int au_statfs_sum(struct super_block *sb, struct kstatfs *buf) -+{ -+ int err; -+ long bsize, factor; -+ u64 blocks, bfree, bavail, files, ffree; -+ aufs_bindex_t bbot, bindex, i; -+ unsigned char shared; -+ struct path h_path; -+ struct super_block *h_sb; -+ -+ err = 0; -+ bsize = LONG_MAX; -+ files = 0; -+ ffree = 0; -+ blocks = 0; -+ bfree = 0; -+ bavail = 0; -+ bbot = au_sbbot(sb); -+ for (bindex = 0; bindex <= bbot; bindex++) { -+ h_path.mnt = au_sbr_mnt(sb, bindex); -+ h_sb = h_path.mnt->mnt_sb; -+ shared = 0; -+ for (i = 0; !shared && i < bindex; i++) -+ shared = (au_sbr_sb(sb, i) == h_sb); -+ if (shared) -+ continue; -+ -+ /* sb->s_root for NFS is unreliable */ -+ h_path.dentry = h_path.mnt->mnt_root; -+ err = vfs_statfs(&h_path, buf); -+ if (unlikely(err)) -+ goto out; -+ -+ if (bsize > buf->f_bsize) { -+ /* -+ * we will reduce bsize, so we have to expand blocks -+ * etc. to match them again -+ */ -+ factor = (bsize / buf->f_bsize); -+ blocks = au_mul_till_max(blocks, factor); -+ bfree = au_mul_till_max(bfree, factor); -+ bavail = au_mul_till_max(bavail, factor); -+ bsize = buf->f_bsize; -+ } -+ -+ factor = (buf->f_bsize / bsize); -+ blocks = au_add_till_max(blocks, -+ au_mul_till_max(buf->f_blocks, factor)); -+ bfree = au_add_till_max(bfree, -+ au_mul_till_max(buf->f_bfree, factor)); -+ bavail = au_add_till_max(bavail, -+ au_mul_till_max(buf->f_bavail, factor)); -+ files = au_add_till_max(files, buf->f_files); -+ ffree = au_add_till_max(ffree, buf->f_ffree); -+ } -+ -+ buf->f_bsize = bsize; -+ buf->f_blocks = blocks; -+ buf->f_bfree = bfree; -+ buf->f_bavail = bavail; -+ buf->f_files = files; -+ buf->f_ffree = ffree; -+ buf->f_frsize = 0; -+ -+out: -+ return err; -+} -+ -+static int aufs_statfs(struct dentry *dentry, struct kstatfs *buf) -+{ -+ int err; -+ struct path h_path; -+ struct super_block *sb; -+ -+ /* lock free root dinfo */ -+ sb = dentry->d_sb; -+ si_noflush_read_lock(sb); -+ if (!au_opt_test(au_mntflags(sb), SUM)) { -+ /* sb->s_root for NFS is unreliable */ -+ h_path.mnt = au_sbr_mnt(sb, 0); -+ h_path.dentry = h_path.mnt->mnt_root; -+ err = vfs_statfs(&h_path, buf); -+ } else -+ err = au_statfs_sum(sb, buf); -+ si_read_unlock(sb); -+ -+ if (!err) { -+ buf->f_type = AUFS_SUPER_MAGIC; -+ buf->f_namelen = AUFS_MAX_NAMELEN; -+ memset(&buf->f_fsid, 0, sizeof(buf->f_fsid)); -+ } -+ /* buf->f_bsize = buf->f_blocks = buf->f_bfree = buf->f_bavail = -1; */ -+ -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+static int aufs_sync_fs(struct super_block *sb, int wait) -+{ -+ int err, e; -+ aufs_bindex_t bbot, bindex; -+ struct au_branch *br; -+ struct super_block *h_sb; -+ -+ err = 0; -+ si_noflush_read_lock(sb); -+ bbot = au_sbbot(sb); -+ for (bindex = 0; bindex <= bbot; bindex++) { -+ br = au_sbr(sb, bindex); -+ if (!au_br_writable(br->br_perm)) -+ continue; -+ -+ h_sb = au_sbr_sb(sb, bindex); -+ e = vfsub_sync_filesystem(h_sb, wait); -+ if (unlikely(e && !err)) -+ err = e; -+ /* go on even if an error happens */ -+ } -+ si_read_unlock(sb); -+ -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* final actions when unmounting a file system */ -+static void aufs_put_super(struct super_block *sb) -+{ -+ struct au_sbinfo *sbinfo; -+ -+ sbinfo = au_sbi(sb); -+ if (sbinfo) -+ kobject_put(&sbinfo->si_kobj); -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+void *au_array_alloc(unsigned long long *hint, au_arraycb_t cb, -+ struct super_block *sb, void *arg) -+{ -+ void *array; -+ unsigned long long n, sz; -+ -+ array = NULL; -+ n = 0; -+ if (!*hint) -+ goto out; -+ -+ if (*hint > ULLONG_MAX / sizeof(array)) { -+ array = ERR_PTR(-EMFILE); -+ pr_err("hint %llu\n", *hint); -+ goto out; -+ } -+ -+ sz = sizeof(array) * *hint; -+ array = kzalloc(sz, GFP_NOFS); -+ if (unlikely(!array)) -+ array = vzalloc(sz); -+ if (unlikely(!array)) { -+ array = ERR_PTR(-ENOMEM); -+ goto out; -+ } -+ -+ n = cb(sb, array, *hint, arg); -+ AuDebugOn(n > *hint); -+ -+out: -+ *hint = n; -+ return array; -+} -+ -+static unsigned long long au_iarray_cb(struct super_block *sb, void *a, -+ unsigned long long max __maybe_unused, -+ void *arg) -+{ -+ unsigned long long n; -+ struct inode **p, *inode; -+ struct list_head *head; -+ -+ n = 0; -+ p = a; -+ head = arg; -+ spin_lock(&sb->s_inode_list_lock); -+ list_for_each_entry(inode, head, i_sb_list) { -+ if (!au_is_bad_inode(inode) -+ && au_ii(inode)->ii_btop >= 0) { -+ spin_lock(&inode->i_lock); -+ if (atomic_read(&inode->i_count)) { -+ au_igrab(inode); -+ *p++ = inode; -+ n++; -+ AuDebugOn(n > max); -+ } -+ spin_unlock(&inode->i_lock); -+ } -+ } -+ spin_unlock(&sb->s_inode_list_lock); -+ -+ return n; -+} -+ -+struct inode **au_iarray_alloc(struct super_block *sb, unsigned long long *max) -+{ -+ struct au_sbinfo *sbi; -+ -+ sbi = au_sbi(sb); -+ *max = au_lcnt_read(&sbi->si_ninodes, /*do_rev*/1); -+ return au_array_alloc(max, au_iarray_cb, sb, &sb->s_inodes); -+} -+ -+void au_iarray_free(struct inode **a, unsigned long long max) -+{ -+ unsigned long long ull; -+ -+ for (ull = 0; ull < max; ull++) -+ iput(a[ull]); -+ kvfree(a); -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* -+ * refresh dentry and inode at remount time. -+ */ -+/* todo: consolidate with simple_reval_dpath() and au_reval_for_attr() */ -+static int au_do_refresh(struct dentry *dentry, unsigned int dir_flags, -+ struct dentry *parent) -+{ -+ int err; -+ -+ di_write_lock_child(dentry); -+ di_read_lock_parent(parent, AuLock_IR); -+ err = au_refresh_dentry(dentry, parent); -+ if (!err && dir_flags) -+ au_hn_reset(d_inode(dentry), dir_flags); -+ di_read_unlock(parent, AuLock_IR); -+ di_write_unlock(dentry); -+ -+ return err; -+} -+ -+static int au_do_refresh_d(struct dentry *dentry, unsigned int sigen, -+ struct au_sbinfo *sbinfo, -+ const unsigned int dir_flags, unsigned int do_idop) -+{ -+ int err; -+ struct dentry *parent; -+ -+ err = 0; -+ parent = dget_parent(dentry); -+ if (!au_digen_test(parent, sigen) && au_digen_test(dentry, sigen)) { -+ if (d_really_is_positive(dentry)) { -+ if (!d_is_dir(dentry)) -+ err = au_do_refresh(dentry, /*dir_flags*/0, -+ parent); -+ else { -+ err = au_do_refresh(dentry, dir_flags, parent); -+ if (unlikely(err)) -+ au_fset_si(sbinfo, FAILED_REFRESH_DIR); -+ } -+ } else -+ err = au_do_refresh(dentry, /*dir_flags*/0, parent); -+ AuDbgDentry(dentry); -+ } -+ dput(parent); -+ -+ if (!err) { -+ if (do_idop) -+ au_refresh_dop(dentry, /*force_reval*/0); -+ } else -+ au_refresh_dop(dentry, /*force_reval*/1); -+ -+ AuTraceErr(err); -+ return err; -+} -+ -+static int au_refresh_d(struct super_block *sb, unsigned int do_idop) -+{ -+ int err, i, j, ndentry, e; -+ unsigned int sigen; -+ struct au_dcsub_pages dpages; -+ struct au_dpage *dpage; -+ struct dentry **dentries, *d; -+ struct au_sbinfo *sbinfo; -+ struct dentry *root = sb->s_root; -+ const unsigned int dir_flags = au_hi_flags(d_inode(root), /*isdir*/1); -+ -+ if (do_idop) -+ au_refresh_dop(root, /*force_reval*/0); -+ -+ err = au_dpages_init(&dpages, GFP_NOFS); -+ if (unlikely(err)) -+ goto out; -+ err = au_dcsub_pages(&dpages, root, NULL, NULL); -+ if (unlikely(err)) -+ goto out_dpages; -+ -+ sigen = au_sigen(sb); -+ sbinfo = au_sbi(sb); -+ for (i = 0; i < dpages.ndpage; i++) { -+ dpage = dpages.dpages + i; -+ dentries = dpage->dentries; -+ ndentry = dpage->ndentry; -+ for (j = 0; j < ndentry; j++) { -+ d = dentries[j]; -+ e = au_do_refresh_d(d, sigen, sbinfo, dir_flags, -+ do_idop); -+ if (unlikely(e && !err)) -+ err = e; -+ /* go on even err */ -+ } -+ } -+ -+out_dpages: -+ au_dpages_free(&dpages); -+out: -+ return err; -+} -+ -+static int au_refresh_i(struct super_block *sb, unsigned int do_idop) -+{ -+ int err, e; -+ unsigned int sigen; -+ unsigned long long max, ull; -+ struct inode *inode, **array; -+ -+ array = au_iarray_alloc(sb, &max); -+ err = PTR_ERR(array); -+ if (IS_ERR(array)) -+ goto out; -+ -+ err = 0; -+ sigen = au_sigen(sb); -+ for (ull = 0; ull < max; ull++) { -+ inode = array[ull]; -+ if (unlikely(!inode)) -+ break; -+ -+ e = 0; -+ ii_write_lock_child(inode); -+ if (au_iigen(inode, NULL) != sigen) { -+ e = au_refresh_hinode_self(inode); -+ if (unlikely(e)) { -+ au_refresh_iop(inode, /*force_getattr*/1); -+ pr_err("error %d, i%lu\n", e, inode->i_ino); -+ if (!err) -+ err = e; -+ /* go on even if err */ -+ } -+ } -+ if (!e && do_idop) -+ au_refresh_iop(inode, /*force_getattr*/0); -+ ii_write_unlock(inode); -+ } -+ -+ au_iarray_free(array, max); -+ -+out: -+ return err; -+} -+ -+static void au_remount_refresh(struct super_block *sb, unsigned int do_idop) -+{ -+ int err, e; -+ unsigned int udba; -+ aufs_bindex_t bindex, bbot; -+ struct dentry *root; -+ struct inode *inode; -+ struct au_branch *br; -+ struct au_sbinfo *sbi; -+ -+ au_sigen_inc(sb); -+ sbi = au_sbi(sb); -+ au_fclr_si(sbi, FAILED_REFRESH_DIR); -+ -+ root = sb->s_root; -+ DiMustNoWaiters(root); -+ inode = d_inode(root); -+ IiMustNoWaiters(inode); -+ -+ udba = au_opt_udba(sb); -+ bbot = au_sbbot(sb); -+ for (bindex = 0; bindex <= bbot; bindex++) { -+ br = au_sbr(sb, bindex); -+ err = au_hnotify_reset_br(udba, br, br->br_perm); -+ if (unlikely(err)) -+ AuIOErr("hnotify failed on br %d, %d, ignored\n", -+ bindex, err); -+ /* go on even if err */ -+ } -+ au_hn_reset(inode, au_hi_flags(inode, /*isdir*/1)); -+ -+ if (do_idop) { -+ if (au_ftest_si(sbi, NO_DREVAL)) { -+ AuDebugOn(sb->s_d_op == &aufs_dop_noreval); -+ sb->s_d_op = &aufs_dop_noreval; -+ AuDebugOn(sbi->si_iop_array == aufs_iop_nogetattr); -+ sbi->si_iop_array = aufs_iop_nogetattr; -+ } else { -+ AuDebugOn(sb->s_d_op == &aufs_dop); -+ sb->s_d_op = &aufs_dop; -+ AuDebugOn(sbi->si_iop_array == aufs_iop); -+ sbi->si_iop_array = aufs_iop; -+ } -+ pr_info("reset to %ps and %ps\n", -+ sb->s_d_op, sbi->si_iop_array); -+ } -+ -+ di_write_unlock(root); -+ err = au_refresh_d(sb, do_idop); -+ e = au_refresh_i(sb, do_idop); -+ if (unlikely(e && !err)) -+ err = e; -+ /* aufs_write_lock() calls ..._child() */ -+ di_write_lock_child(root); -+ -+ au_cpup_attr_all(inode, /*force*/1); -+ -+ if (unlikely(err)) -+ AuIOErr("refresh failed, ignored, %d\n", err); -+} -+ -+/* stop extra interpretation of errno in mount(8), and strange error messages */ -+static int cvt_err(int err) -+{ -+ AuTraceErr(err); -+ -+ switch (err) { -+ case -ENOENT: -+ case -ENOTDIR: -+ case -EEXIST: -+ case -EIO: -+ err = -EINVAL; -+ } -+ return err; -+} -+ -+static int aufs_remount_fs(struct super_block *sb, int *flags, char *data) -+{ -+ int err, do_dx; -+ unsigned int mntflags; -+ struct au_opts opts = { -+ .opt = NULL -+ }; -+ struct dentry *root; -+ struct inode *inode; -+ struct au_sbinfo *sbinfo; -+ -+ err = 0; -+ root = sb->s_root; -+ if (!data || !*data) { -+ err = si_write_lock(sb, AuLock_FLUSH | AuLock_NOPLM); -+ if (!err) { -+ di_write_lock_child(root); -+ err = au_opts_verify(sb, *flags, /*pending*/0); -+ aufs_write_unlock(root); -+ } -+ goto out; -+ } -+ -+ err = -ENOMEM; -+ opts.opt = (void *)__get_free_page(GFP_NOFS); -+ if (unlikely(!opts.opt)) -+ goto out; -+ opts.max_opt = PAGE_SIZE / sizeof(*opts.opt); -+ opts.flags = AuOpts_REMOUNT; -+ opts.sb_flags = *flags; -+ -+ /* parse it before aufs lock */ -+ err = au_opts_parse(sb, data, &opts); -+ if (unlikely(err)) -+ goto out_opts; -+ -+ sbinfo = au_sbi(sb); -+ inode = d_inode(root); -+ inode_lock(inode); -+ err = si_write_lock(sb, AuLock_FLUSH | AuLock_NOPLM); -+ if (unlikely(err)) -+ goto out_mtx; -+ di_write_lock_child(root); -+ -+ /* au_opts_remount() may return an error */ -+ err = au_opts_remount(sb, &opts); -+ au_opts_free(&opts); -+ -+ if (au_ftest_opts(opts.flags, REFRESH)) -+ au_remount_refresh(sb, au_ftest_opts(opts.flags, REFRESH_IDOP)); -+ -+ if (au_ftest_opts(opts.flags, REFRESH_DYAOP)) { -+ mntflags = au_mntflags(sb); -+ do_dx = !!au_opt_test(mntflags, DIO); -+ au_dy_arefresh(do_dx); -+ } -+ -+ au_fhsm_wrote_all(sb, /*force*/1); /* ?? */ -+ aufs_write_unlock(root); -+ -+out_mtx: -+ inode_unlock(inode); -+out_opts: -+ free_page((unsigned long)opts.opt); -+out: -+ err = cvt_err(err); -+ AuTraceErr(err); -+ return err; -+} -+ -+static const struct super_operations aufs_sop = { -+ .alloc_inode = aufs_alloc_inode, -+ .destroy_inode = aufs_destroy_inode, -+ .free_inode = aufs_free_inode, -+ /* always deleting, no clearing */ -+ .drop_inode = generic_delete_inode, -+ .show_options = aufs_show_options, -+ .statfs = aufs_statfs, -+ .put_super = aufs_put_super, -+ .sync_fs = aufs_sync_fs, -+ .remount_fs = aufs_remount_fs -+}; -+ -+/* ---------------------------------------------------------------------- */ -+ -+static int alloc_root(struct super_block *sb) -+{ -+ int err; -+ struct inode *inode; -+ struct dentry *root; -+ -+ err = -ENOMEM; -+ inode = au_iget_locked(sb, AUFS_ROOT_INO); -+ err = PTR_ERR(inode); -+ if (IS_ERR(inode)) -+ goto out; -+ -+ inode->i_op = aufs_iop + AuIop_DIR; /* with getattr by default */ -+ inode->i_fop = &aufs_dir_fop; -+ inode->i_mode = S_IFDIR; -+ set_nlink(inode, 2); -+ unlock_new_inode(inode); -+ -+ root = d_make_root(inode); -+ if (unlikely(!root)) -+ goto out; -+ err = PTR_ERR(root); -+ if (IS_ERR(root)) -+ goto out; -+ -+ err = au_di_init(root); -+ if (!err) { -+ sb->s_root = root; -+ return 0; /* success */ -+ } -+ dput(root); -+ -+out: -+ return err; -+} -+ -+static int aufs_fill_super(struct super_block *sb, void *raw_data, -+ int silent __maybe_unused) -+{ -+ int err; -+ struct au_opts opts = { -+ .opt = NULL -+ }; -+ struct au_sbinfo *sbinfo; -+ struct dentry *root; -+ struct inode *inode; -+ char *arg = raw_data; -+ -+ if (unlikely(!arg || !*arg)) { -+ err = -EINVAL; -+ pr_err("no arg\n"); -+ goto out; -+ } -+ -+ err = -ENOMEM; -+ opts.opt = (void *)__get_free_page(GFP_NOFS); -+ if (unlikely(!opts.opt)) -+ goto out; -+ opts.max_opt = PAGE_SIZE / sizeof(*opts.opt); -+ opts.sb_flags = sb->s_flags; -+ -+ err = au_si_alloc(sb); -+ if (unlikely(err)) -+ goto out_opts; -+ sbinfo = au_sbi(sb); -+ -+ /* all timestamps always follow the ones on the branch */ -+ sb->s_flags |= SB_NOATIME | SB_NODIRATIME; -+ sb->s_flags |= SB_I_VERSION; /* do we really need this? */ -+ sb->s_op = &aufs_sop; -+ sb->s_d_op = &aufs_dop; -+ sb->s_magic = AUFS_SUPER_MAGIC; -+ sb->s_maxbytes = 0; -+ sb->s_stack_depth = 1; -+ au_export_init(sb); -+ au_xattr_init(sb); -+ -+ err = alloc_root(sb); -+ if (unlikely(err)) { -+ si_write_unlock(sb); -+ goto out_info; -+ } -+ root = sb->s_root; -+ inode = d_inode(root); -+ -+ /* -+ * actually we can parse options regardless aufs lock here. -+ * but at remount time, parsing must be done before aufs lock. -+ * so we follow the same rule. -+ */ -+ ii_write_lock_parent(inode); -+ aufs_write_unlock(root); -+ err = au_opts_parse(sb, arg, &opts); -+ if (unlikely(err)) -+ goto out_root; -+ -+ /* lock vfs_inode first, then aufs. */ -+ inode_lock(inode); -+ aufs_write_lock(root); -+ err = au_opts_mount(sb, &opts); -+ au_opts_free(&opts); -+ if (!err && au_ftest_si(sbinfo, NO_DREVAL)) { -+ sb->s_d_op = &aufs_dop_noreval; -+ pr_info("%ps\n", sb->s_d_op); -+ au_refresh_dop(root, /*force_reval*/0); -+ sbinfo->si_iop_array = aufs_iop_nogetattr; -+ au_refresh_iop(inode, /*force_getattr*/0); -+ } -+ aufs_write_unlock(root); -+ inode_unlock(inode); -+ if (!err) -+ goto out_opts; /* success */ -+ -+out_root: -+ dput(root); -+ sb->s_root = NULL; -+out_info: -+ kobject_put(&sbinfo->si_kobj); -+ sb->s_fs_info = NULL; -+out_opts: -+ free_page((unsigned long)opts.opt); -+out: -+ AuTraceErr(err); -+ err = cvt_err(err); -+ AuTraceErr(err); -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+static struct dentry *aufs_mount(struct file_system_type *fs_type, int flags, -+ const char *dev_name __maybe_unused, -+ void *raw_data) -+{ -+ struct dentry *root; -+ -+ /* all timestamps always follow the ones on the branch */ -+ /* mnt->mnt_flags |= MNT_NOATIME | MNT_NODIRATIME; */ -+ root = mount_nodev(fs_type, flags, raw_data, aufs_fill_super); -+ if (IS_ERR(root)) -+ goto out; -+ -+ au_sbilist_add(root->d_sb); -+ -+out: -+ return root; -+} -+ -+static void aufs_kill_sb(struct super_block *sb) -+{ -+ struct au_sbinfo *sbinfo; -+ -+ sbinfo = au_sbi(sb); -+ if (sbinfo) { -+ au_sbilist_del(sb); -+ aufs_write_lock(sb->s_root); -+ au_fhsm_fin(sb); -+ if (sbinfo->si_wbr_create_ops->fin) -+ sbinfo->si_wbr_create_ops->fin(sb); -+ if (au_opt_test(sbinfo->si_mntflags, UDBA_HNOTIFY)) { -+ au_opt_set_udba(sbinfo->si_mntflags, UDBA_NONE); -+ au_remount_refresh(sb, /*do_idop*/0); -+ } -+ if (au_opt_test(sbinfo->si_mntflags, PLINK)) -+ au_plink_put(sb, /*verbose*/1); -+ au_xino_clr(sb); -+ au_dr_opt_flush(sb); -+ sbinfo->si_sb = NULL; -+ aufs_write_unlock(sb->s_root); -+ au_nwt_flush(&sbinfo->si_nowait); -+ } -+ kill_anon_super(sb); -+} -+ -+struct file_system_type aufs_fs_type = { -+ .name = AUFS_FSTYPE, -+ /* a race between rename and others */ -+ .fs_flags = FS_RENAME_DOES_D_MOVE, -+ .mount = aufs_mount, -+ .kill_sb = aufs_kill_sb, -+ /* no need to __module_get() and module_put(). */ -+ .owner = THIS_MODULE, -+}; -diff --git a/fs/aufs/super.h b/fs/aufs/super.h -new file mode 100644 -index 000000000000..f840eedbd572 ---- /dev/null -+++ b/fs/aufs/super.h -@@ -0,0 +1,574 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * super_block operations -+ */ -+ -+#ifndef __AUFS_SUPER_H__ -+#define __AUFS_SUPER_H__ -+ -+#ifdef __KERNEL__ -+ -+#include -+#include -+#include "hbl.h" -+#include "lcnt.h" -+#include "rwsem.h" -+#include "wkq.h" -+ -+/* policies to select one among multiple writable branches */ -+struct au_wbr_copyup_operations { -+ int (*copyup)(struct dentry *dentry); -+}; -+ -+#define AuWbr_DIR 1 /* target is a dir */ -+#define AuWbr_PARENT (1 << 1) /* always require a parent */ -+ -+#define au_ftest_wbr(flags, name) ((flags) & AuWbr_##name) -+#define au_fset_wbr(flags, name) { (flags) |= AuWbr_##name; } -+#define au_fclr_wbr(flags, name) { (flags) &= ~AuWbr_##name; } -+ -+struct au_wbr_create_operations { -+ int (*create)(struct dentry *dentry, unsigned int flags); -+ int (*init)(struct super_block *sb); -+ int (*fin)(struct super_block *sb); -+}; -+ -+struct au_wbr_mfs { -+ struct mutex mfs_lock; /* protect this structure */ -+ unsigned long mfs_jiffy; -+ unsigned long mfs_expire; -+ aufs_bindex_t mfs_bindex; -+ -+ unsigned long long mfsrr_bytes; -+ unsigned long long mfsrr_watermark; -+}; -+ -+#define AuPlink_NHASH 100 -+static inline int au_plink_hash(ino_t ino) -+{ -+ return ino % AuPlink_NHASH; -+} -+ -+/* File-based Hierarchical Storage Management */ -+struct au_fhsm { -+#ifdef CONFIG_AUFS_FHSM -+ /* allow only one process who can receive the notification */ -+ spinlock_t fhsm_spin; -+ pid_t fhsm_pid; -+ wait_queue_head_t fhsm_wqh; -+ atomic_t fhsm_readable; -+ -+ /* these are protected by si_rwsem */ -+ unsigned long fhsm_expire; -+ aufs_bindex_t fhsm_bottom; -+#endif -+}; -+ -+struct au_branch; -+struct au_sbinfo { -+ /* nowait tasks in the system-wide workqueue */ -+ struct au_nowait_tasks si_nowait; -+ -+ /* -+ * tried sb->s_umount, but failed due to the dependency between i_mutex. -+ * rwsem for au_sbinfo is necessary. -+ */ -+ struct au_rwsem si_rwsem; -+ -+ /* -+ * dirty approach to protect sb->sb_inodes and ->s_files (gone) from -+ * remount. -+ */ -+ au_lcnt_t si_ninodes, si_nfiles; -+ -+ /* branch management */ -+ unsigned int si_generation; -+ -+ /* see AuSi_ flags */ -+ unsigned char au_si_status; -+ -+ aufs_bindex_t si_bbot; -+ -+ /* dirty trick to keep br_id plus */ -+ unsigned int si_last_br_id : -+ sizeof(aufs_bindex_t) * BITS_PER_BYTE - 1; -+ struct au_branch **si_branch; -+ -+ /* policy to select a writable branch */ -+ unsigned char si_wbr_copyup; -+ unsigned char si_wbr_create; -+ struct au_wbr_copyup_operations *si_wbr_copyup_ops; -+ struct au_wbr_create_operations *si_wbr_create_ops; -+ -+ /* round robin */ -+ atomic_t si_wbr_rr_next; -+ -+ /* most free space */ -+ struct au_wbr_mfs si_wbr_mfs; -+ -+ /* File-based Hierarchical Storage Management */ -+ struct au_fhsm si_fhsm; -+ -+ /* mount flags */ -+ /* include/asm-ia64/siginfo.h defines a macro named si_flags */ -+ unsigned int si_mntflags; -+ -+ /* external inode number (bitmap and translation table) */ -+ loff_t si_ximaxent; /* max entries in a xino */ -+ -+ struct file *si_xib; -+ struct mutex si_xib_mtx; /* protect xib members */ -+ unsigned long *si_xib_buf; -+ unsigned long si_xib_last_pindex; -+ int si_xib_next_bit; -+ -+ unsigned long si_xino_jiffy; -+ unsigned long si_xino_expire; -+ /* reserved for future use */ -+ /* unsigned long long si_xib_limit; */ /* Max xib file size */ -+ -+#ifdef CONFIG_AUFS_EXPORT -+ /* i_generation */ -+ /* todo: make xigen file an array to support many inode numbers */ -+ struct file *si_xigen; -+ atomic_t si_xigen_next; -+#endif -+ -+ /* dirty trick to support atomic_open */ -+ struct hlist_bl_head si_aopen; -+ -+ /* vdir parameters */ -+ unsigned long si_rdcache; /* max cache time in jiffies */ -+ unsigned int si_rdblk; /* deblk size */ -+ unsigned int si_rdhash; /* hash size */ -+ -+ /* -+ * If the number of whiteouts are larger than si_dirwh, leave all of -+ * them after au_whtmp_ren to reduce the cost of rmdir(2). -+ * future fsck.aufs or kernel thread will remove them later. -+ * Otherwise, remove all whiteouts and the dir in rmdir(2). -+ */ -+ unsigned int si_dirwh; -+ -+ /* pseudo_link list */ -+ struct hlist_bl_head si_plink[AuPlink_NHASH]; -+ wait_queue_head_t si_plink_wq; -+ spinlock_t si_plink_maint_lock; -+ pid_t si_plink_maint_pid; -+ -+ /* file list */ -+ struct hlist_bl_head si_files; -+ -+ /* with/without getattr, brother of sb->s_d_op */ -+ const struct inode_operations *si_iop_array; -+ -+ /* -+ * sysfs and lifetime management. -+ * this is not a small structure and it may be a waste of memory in case -+ * of sysfs is disabled, particularly when many aufs-es are mounted. -+ * but using sysfs is majority. -+ */ -+ struct kobject si_kobj; -+#ifdef CONFIG_DEBUG_FS -+ struct dentry *si_dbgaufs; -+ struct dentry *si_dbgaufs_plink; -+ struct dentry *si_dbgaufs_xib; -+#ifdef CONFIG_AUFS_EXPORT -+ struct dentry *si_dbgaufs_xigen; -+#endif -+#endif -+ -+#ifdef CONFIG_AUFS_SBILIST -+ struct hlist_bl_node si_list; -+#endif -+ -+ /* dirty, necessary for unmounting, sysfs and sysrq */ -+ struct super_block *si_sb; -+}; -+ -+/* sbinfo status flags */ -+/* -+ * set true when refresh_dirs() failed at remount time. -+ * then try refreshing dirs at access time again. -+ * if it is false, refreshing dirs at access time is unnecessary -+ */ -+#define AuSi_FAILED_REFRESH_DIR 1 -+#define AuSi_FHSM (1 << 1) /* fhsm is active now */ -+#define AuSi_NO_DREVAL (1 << 2) /* disable all d_revalidate */ -+ -+#ifndef CONFIG_AUFS_FHSM -+#undef AuSi_FHSM -+#define AuSi_FHSM 0 -+#endif -+ -+static inline unsigned char au_do_ftest_si(struct au_sbinfo *sbi, -+ unsigned int flag) -+{ -+ AuRwMustAnyLock(&sbi->si_rwsem); -+ return sbi->au_si_status & flag; -+} -+#define au_ftest_si(sbinfo, name) au_do_ftest_si(sbinfo, AuSi_##name) -+#define au_fset_si(sbinfo, name) do { \ -+ AuRwMustWriteLock(&(sbinfo)->si_rwsem); \ -+ (sbinfo)->au_si_status |= AuSi_##name; \ -+} while (0) -+#define au_fclr_si(sbinfo, name) do { \ -+ AuRwMustWriteLock(&(sbinfo)->si_rwsem); \ -+ (sbinfo)->au_si_status &= ~AuSi_##name; \ -+} while (0) -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* policy to select one among writable branches */ -+#define AuWbrCopyup(sbinfo, ...) \ -+ ((sbinfo)->si_wbr_copyup_ops->copyup(__VA_ARGS__)) -+#define AuWbrCreate(sbinfo, ...) \ -+ ((sbinfo)->si_wbr_create_ops->create(__VA_ARGS__)) -+ -+/* flags for si_read_lock()/aufs_read_lock()/di_read_lock() */ -+#define AuLock_DW 1 /* write-lock dentry */ -+#define AuLock_IR (1 << 1) /* read-lock inode */ -+#define AuLock_IW (1 << 2) /* write-lock inode */ -+#define AuLock_FLUSH (1 << 3) /* wait for 'nowait' tasks */ -+#define AuLock_DIRS (1 << 4) /* target is a pair of dirs */ -+ /* except RENAME_EXCHANGE */ -+#define AuLock_NOPLM (1 << 5) /* return err in plm mode */ -+#define AuLock_NOPLMW (1 << 6) /* wait for plm mode ends */ -+#define AuLock_GEN (1 << 7) /* test digen/iigen */ -+#define au_ftest_lock(flags, name) ((flags) & AuLock_##name) -+#define au_fset_lock(flags, name) \ -+ do { (flags) |= AuLock_##name; } while (0) -+#define au_fclr_lock(flags, name) \ -+ do { (flags) &= ~AuLock_##name; } while (0) -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* super.c */ -+extern struct file_system_type aufs_fs_type; -+struct inode *au_iget_locked(struct super_block *sb, ino_t ino); -+typedef unsigned long long (*au_arraycb_t)(struct super_block *sb, void *array, -+ unsigned long long max, void *arg); -+void *au_array_alloc(unsigned long long *hint, au_arraycb_t cb, -+ struct super_block *sb, void *arg); -+struct inode **au_iarray_alloc(struct super_block *sb, unsigned long long *max); -+void au_iarray_free(struct inode **a, unsigned long long max); -+ -+/* sbinfo.c */ -+void au_si_free(struct kobject *kobj); -+int au_si_alloc(struct super_block *sb); -+int au_sbr_realloc(struct au_sbinfo *sbinfo, int nbr, int may_shrink); -+ -+unsigned int au_sigen_inc(struct super_block *sb); -+aufs_bindex_t au_new_br_id(struct super_block *sb); -+ -+int si_read_lock(struct super_block *sb, int flags); -+int si_write_lock(struct super_block *sb, int flags); -+int aufs_read_lock(struct dentry *dentry, int flags); -+void aufs_read_unlock(struct dentry *dentry, int flags); -+void aufs_write_lock(struct dentry *dentry); -+void aufs_write_unlock(struct dentry *dentry); -+int aufs_read_and_write_lock2(struct dentry *d1, struct dentry *d2, int flags); -+void aufs_read_and_write_unlock2(struct dentry *d1, struct dentry *d2); -+ -+/* wbr_policy.c */ -+extern struct au_wbr_copyup_operations au_wbr_copyup_ops[]; -+extern struct au_wbr_create_operations au_wbr_create_ops[]; -+int au_cpdown_dirs(struct dentry *dentry, aufs_bindex_t bdst); -+int au_wbr_nonopq(struct dentry *dentry, aufs_bindex_t bindex); -+int au_wbr_do_copyup_bu(struct dentry *dentry, aufs_bindex_t btop); -+ -+/* mvdown.c */ -+int au_mvdown(struct dentry *dentry, struct aufs_mvdown __user *arg); -+ -+#ifdef CONFIG_AUFS_FHSM -+/* fhsm.c */ -+ -+static inline pid_t au_fhsm_pid(struct au_fhsm *fhsm) -+{ -+ pid_t pid; -+ -+ spin_lock(&fhsm->fhsm_spin); -+ pid = fhsm->fhsm_pid; -+ spin_unlock(&fhsm->fhsm_spin); -+ -+ return pid; -+} -+ -+void au_fhsm_wrote(struct super_block *sb, aufs_bindex_t bindex, int force); -+void au_fhsm_wrote_all(struct super_block *sb, int force); -+int au_fhsm_fd(struct super_block *sb, int oflags); -+int au_fhsm_br_alloc(struct au_branch *br); -+void au_fhsm_set_bottom(struct super_block *sb, aufs_bindex_t bindex); -+void au_fhsm_fin(struct super_block *sb); -+void au_fhsm_init(struct au_sbinfo *sbinfo); -+void au_fhsm_set(struct au_sbinfo *sbinfo, unsigned int sec); -+void au_fhsm_show(struct seq_file *seq, struct au_sbinfo *sbinfo); -+#else -+AuStubVoid(au_fhsm_wrote, struct super_block *sb, aufs_bindex_t bindex, -+ int force) -+AuStubVoid(au_fhsm_wrote_all, struct super_block *sb, int force) -+AuStub(int, au_fhsm_fd, return -EOPNOTSUPP, struct super_block *sb, int oflags) -+AuStub(pid_t, au_fhsm_pid, return 0, struct au_fhsm *fhsm) -+AuStubInt0(au_fhsm_br_alloc, struct au_branch *br) -+AuStubVoid(au_fhsm_set_bottom, struct super_block *sb, aufs_bindex_t bindex) -+AuStubVoid(au_fhsm_fin, struct super_block *sb) -+AuStubVoid(au_fhsm_init, struct au_sbinfo *sbinfo) -+AuStubVoid(au_fhsm_set, struct au_sbinfo *sbinfo, unsigned int sec) -+AuStubVoid(au_fhsm_show, struct seq_file *seq, struct au_sbinfo *sbinfo) -+#endif -+ -+/* ---------------------------------------------------------------------- */ -+ -+static inline struct au_sbinfo *au_sbi(struct super_block *sb) -+{ -+ return sb->s_fs_info; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+#ifdef CONFIG_AUFS_EXPORT -+int au_test_nfsd(void); -+void au_export_init(struct super_block *sb); -+void au_xigen_inc(struct inode *inode); -+int au_xigen_new(struct inode *inode); -+int au_xigen_set(struct super_block *sb, struct path *path); -+void au_xigen_clr(struct super_block *sb); -+ -+static inline int au_busy_or_stale(void) -+{ -+ if (!au_test_nfsd()) -+ return -EBUSY; -+ return -ESTALE; -+} -+#else -+AuStubInt0(au_test_nfsd, void) -+AuStubVoid(au_export_init, struct super_block *sb) -+AuStubVoid(au_xigen_inc, struct inode *inode) -+AuStubInt0(au_xigen_new, struct inode *inode) -+AuStubInt0(au_xigen_set, struct super_block *sb, struct path *path) -+AuStubVoid(au_xigen_clr, struct super_block *sb) -+AuStub(int, au_busy_or_stale, return -EBUSY, void) -+#endif /* CONFIG_AUFS_EXPORT */ -+ -+/* ---------------------------------------------------------------------- */ -+ -+#ifdef CONFIG_AUFS_SBILIST -+/* module.c */ -+extern struct hlist_bl_head au_sbilist; -+ -+static inline void au_sbilist_init(void) -+{ -+ INIT_HLIST_BL_HEAD(&au_sbilist); -+} -+ -+static inline void au_sbilist_add(struct super_block *sb) -+{ -+ au_hbl_add(&au_sbi(sb)->si_list, &au_sbilist); -+} -+ -+static inline void au_sbilist_del(struct super_block *sb) -+{ -+ au_hbl_del(&au_sbi(sb)->si_list, &au_sbilist); -+} -+ -+#ifdef CONFIG_AUFS_MAGIC_SYSRQ -+static inline void au_sbilist_lock(void) -+{ -+ hlist_bl_lock(&au_sbilist); -+} -+ -+static inline void au_sbilist_unlock(void) -+{ -+ hlist_bl_unlock(&au_sbilist); -+} -+#define AuGFP_SBILIST GFP_ATOMIC -+#else -+AuStubVoid(au_sbilist_lock, void) -+AuStubVoid(au_sbilist_unlock, void) -+#define AuGFP_SBILIST GFP_NOFS -+#endif /* CONFIG_AUFS_MAGIC_SYSRQ */ -+#else -+AuStubVoid(au_sbilist_init, void) -+AuStubVoid(au_sbilist_add, struct super_block *sb) -+AuStubVoid(au_sbilist_del, struct super_block *sb) -+AuStubVoid(au_sbilist_lock, void) -+AuStubVoid(au_sbilist_unlock, void) -+#define AuGFP_SBILIST GFP_NOFS -+#endif -+ -+/* ---------------------------------------------------------------------- */ -+ -+static inline void dbgaufs_si_null(struct au_sbinfo *sbinfo) -+{ -+ /* -+ * This function is a dynamic '__init' function actually, -+ * so the tiny check for si_rwsem is unnecessary. -+ */ -+ /* AuRwMustWriteLock(&sbinfo->si_rwsem); */ -+#ifdef CONFIG_DEBUG_FS -+ sbinfo->si_dbgaufs = NULL; -+ sbinfo->si_dbgaufs_plink = NULL; -+ sbinfo->si_dbgaufs_xib = NULL; -+#ifdef CONFIG_AUFS_EXPORT -+ sbinfo->si_dbgaufs_xigen = NULL; -+#endif -+#endif -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* current->atomic_flags */ -+/* this value should never corrupt the ones defined in linux/sched.h */ -+#define PFA_AUFS 0x10 -+ -+TASK_PFA_TEST(AUFS, test_aufs) /* task_test_aufs */ -+TASK_PFA_SET(AUFS, aufs) /* task_set_aufs */ -+TASK_PFA_CLEAR(AUFS, aufs) /* task_clear_aufs */ -+ -+static inline int si_pid_test(struct super_block *sb) -+{ -+ return !!task_test_aufs(current); -+} -+ -+static inline void si_pid_clr(struct super_block *sb) -+{ -+ AuDebugOn(!task_test_aufs(current)); -+ task_clear_aufs(current); -+} -+ -+static inline void si_pid_set(struct super_block *sb) -+{ -+ AuDebugOn(task_test_aufs(current)); -+ task_set_aufs(current); -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* lock superblock. mainly for entry point functions */ -+#define __si_read_lock(sb) au_rw_read_lock(&au_sbi(sb)->si_rwsem) -+#define __si_write_lock(sb) au_rw_write_lock(&au_sbi(sb)->si_rwsem) -+#define __si_read_trylock(sb) au_rw_read_trylock(&au_sbi(sb)->si_rwsem) -+#define __si_write_trylock(sb) au_rw_write_trylock(&au_sbi(sb)->si_rwsem) -+/* -+#define __si_read_trylock_nested(sb) \ -+ au_rw_read_trylock_nested(&au_sbi(sb)->si_rwsem) -+#define __si_write_trylock_nested(sb) \ -+ au_rw_write_trylock_nested(&au_sbi(sb)->si_rwsem) -+*/ -+ -+#define __si_read_unlock(sb) au_rw_read_unlock(&au_sbi(sb)->si_rwsem) -+#define __si_write_unlock(sb) au_rw_write_unlock(&au_sbi(sb)->si_rwsem) -+#define __si_downgrade_lock(sb) au_rw_dgrade_lock(&au_sbi(sb)->si_rwsem) -+ -+#define SiMustNoWaiters(sb) AuRwMustNoWaiters(&au_sbi(sb)->si_rwsem) -+#define SiMustAnyLock(sb) AuRwMustAnyLock(&au_sbi(sb)->si_rwsem) -+#define SiMustWriteLock(sb) AuRwMustWriteLock(&au_sbi(sb)->si_rwsem) -+ -+static inline void si_noflush_read_lock(struct super_block *sb) -+{ -+ __si_read_lock(sb); -+ si_pid_set(sb); -+} -+ -+static inline int si_noflush_read_trylock(struct super_block *sb) -+{ -+ int locked; -+ -+ locked = __si_read_trylock(sb); -+ if (locked) -+ si_pid_set(sb); -+ return locked; -+} -+ -+static inline void si_noflush_write_lock(struct super_block *sb) -+{ -+ __si_write_lock(sb); -+ si_pid_set(sb); -+} -+ -+static inline int si_noflush_write_trylock(struct super_block *sb) -+{ -+ int locked; -+ -+ locked = __si_write_trylock(sb); -+ if (locked) -+ si_pid_set(sb); -+ return locked; -+} -+ -+#if 0 /* reserved */ -+static inline int si_read_trylock(struct super_block *sb, int flags) -+{ -+ if (au_ftest_lock(flags, FLUSH)) -+ au_nwt_flush(&au_sbi(sb)->si_nowait); -+ return si_noflush_read_trylock(sb); -+} -+#endif -+ -+static inline void si_read_unlock(struct super_block *sb) -+{ -+ si_pid_clr(sb); -+ __si_read_unlock(sb); -+} -+ -+#if 0 /* reserved */ -+static inline int si_write_trylock(struct super_block *sb, int flags) -+{ -+ if (au_ftest_lock(flags, FLUSH)) -+ au_nwt_flush(&au_sbi(sb)->si_nowait); -+ return si_noflush_write_trylock(sb); -+} -+#endif -+ -+static inline void si_write_unlock(struct super_block *sb) -+{ -+ si_pid_clr(sb); -+ __si_write_unlock(sb); -+} -+ -+#if 0 /* reserved */ -+static inline void si_downgrade_lock(struct super_block *sb) -+{ -+ __si_downgrade_lock(sb); -+} -+#endif -+ -+/* ---------------------------------------------------------------------- */ -+ -+static inline aufs_bindex_t au_sbbot(struct super_block *sb) -+{ -+ SiMustAnyLock(sb); -+ return au_sbi(sb)->si_bbot; -+} -+ -+static inline unsigned int au_mntflags(struct super_block *sb) -+{ -+ SiMustAnyLock(sb); -+ return au_sbi(sb)->si_mntflags; -+} -+ -+static inline unsigned int au_sigen(struct super_block *sb) -+{ -+ SiMustAnyLock(sb); -+ return au_sbi(sb)->si_generation; -+} -+ -+static inline struct au_branch *au_sbr(struct super_block *sb, -+ aufs_bindex_t bindex) -+{ -+ SiMustAnyLock(sb); -+ return au_sbi(sb)->si_branch[0 + bindex]; -+} -+ -+static inline loff_t au_xi_maxent(struct super_block *sb) -+{ -+ SiMustAnyLock(sb); -+ return au_sbi(sb)->si_ximaxent; -+} -+ -+#endif /* __KERNEL__ */ -+#endif /* __AUFS_SUPER_H__ */ -diff --git a/fs/aufs/sysaufs.c b/fs/aufs/sysaufs.c -new file mode 100644 -index 000000000000..88d64b34555e ---- /dev/null -+++ b/fs/aufs/sysaufs.c -@@ -0,0 +1,80 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * sysfs interface and lifetime management -+ * they are necessary regardless sysfs is disabled. -+ */ -+ -+#include -+#include "aufs.h" -+ -+unsigned long sysaufs_si_mask; -+struct kset *sysaufs_kset; -+ -+#define AuSiAttr(_name) { \ -+ .attr = { .name = __stringify(_name), .mode = 0444 }, \ -+ .show = sysaufs_si_##_name, \ -+} -+ -+static struct sysaufs_si_attr sysaufs_si_attr_xi_path = AuSiAttr(xi_path); -+struct attribute *sysaufs_si_attrs[] = { -+ &sysaufs_si_attr_xi_path.attr, -+ NULL, -+}; -+ -+static const struct sysfs_ops au_sbi_ops = { -+ .show = sysaufs_si_show -+}; -+ -+static struct kobj_type au_sbi_ktype = { -+ .release = au_si_free, -+ .sysfs_ops = &au_sbi_ops, -+ .default_attrs = sysaufs_si_attrs -+}; -+ -+/* ---------------------------------------------------------------------- */ -+ -+int sysaufs_si_init(struct au_sbinfo *sbinfo) -+{ -+ int err; -+ -+ sbinfo->si_kobj.kset = sysaufs_kset; -+ /* cf. sysaufs_name() */ -+ err = kobject_init_and_add -+ (&sbinfo->si_kobj, &au_sbi_ktype, /*&sysaufs_kset->kobj*/NULL, -+ SysaufsSiNamePrefix "%lx", sysaufs_si_id(sbinfo)); -+ -+ return err; -+} -+ -+void sysaufs_fin(void) -+{ -+ sysfs_remove_group(&sysaufs_kset->kobj, sysaufs_attr_group); -+ kset_unregister(sysaufs_kset); -+} -+ -+int __init sysaufs_init(void) -+{ -+ int err; -+ -+ do { -+ get_random_bytes(&sysaufs_si_mask, sizeof(sysaufs_si_mask)); -+ } while (!sysaufs_si_mask); -+ -+ err = -EINVAL; -+ sysaufs_kset = kset_create_and_add(AUFS_NAME, NULL, fs_kobj); -+ if (unlikely(!sysaufs_kset)) -+ goto out; -+ err = PTR_ERR(sysaufs_kset); -+ if (IS_ERR(sysaufs_kset)) -+ goto out; -+ err = sysfs_create_group(&sysaufs_kset->kobj, sysaufs_attr_group); -+ if (unlikely(err)) -+ kset_unregister(sysaufs_kset); -+ -+out: -+ return err; -+} -diff --git a/fs/aufs/sysaufs.h b/fs/aufs/sysaufs.h -new file mode 100644 -index 000000000000..0d14752482cf ---- /dev/null -+++ b/fs/aufs/sysaufs.h -@@ -0,0 +1,89 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * sysfs interface and mount lifetime management -+ */ -+ -+#ifndef __SYSAUFS_H__ -+#define __SYSAUFS_H__ -+ -+#ifdef __KERNEL__ -+ -+#include -+#include "module.h" -+ -+struct super_block; -+struct au_sbinfo; -+ -+struct sysaufs_si_attr { -+ struct attribute attr; -+ int (*show)(struct seq_file *seq, struct super_block *sb); -+}; -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* sysaufs.c */ -+extern unsigned long sysaufs_si_mask; -+extern struct kset *sysaufs_kset; -+extern struct attribute *sysaufs_si_attrs[]; -+int sysaufs_si_init(struct au_sbinfo *sbinfo); -+int __init sysaufs_init(void); -+void sysaufs_fin(void); -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* some people doesn't like to show a pointer in kernel */ -+static inline unsigned long sysaufs_si_id(struct au_sbinfo *sbinfo) -+{ -+ return sysaufs_si_mask ^ (unsigned long)sbinfo; -+} -+ -+#define SysaufsSiNamePrefix "si_" -+#define SysaufsSiNameLen (sizeof(SysaufsSiNamePrefix) + 16) -+static inline void sysaufs_name(struct au_sbinfo *sbinfo, char *name) -+{ -+ snprintf(name, SysaufsSiNameLen, SysaufsSiNamePrefix "%lx", -+ sysaufs_si_id(sbinfo)); -+} -+ -+struct au_branch; -+#ifdef CONFIG_SYSFS -+/* sysfs.c */ -+extern struct attribute_group *sysaufs_attr_group; -+ -+int sysaufs_si_xi_path(struct seq_file *seq, struct super_block *sb); -+ssize_t sysaufs_si_show(struct kobject *kobj, struct attribute *attr, -+ char *buf); -+long au_brinfo_ioctl(struct file *file, unsigned long arg); -+#ifdef CONFIG_COMPAT -+long au_brinfo_compat_ioctl(struct file *file, unsigned long arg); -+#endif -+ -+void sysaufs_br_init(struct au_branch *br); -+void sysaufs_brs_add(struct super_block *sb, aufs_bindex_t bindex); -+void sysaufs_brs_del(struct super_block *sb, aufs_bindex_t bindex); -+ -+#define sysaufs_brs_init() do {} while (0) -+ -+#else -+#define sysaufs_attr_group NULL -+ -+AuStubInt0(sysaufs_si_xi_path, struct seq_file *seq, struct super_block *sb) -+AuStub(ssize_t, sysaufs_si_show, return 0, struct kobject *kobj, -+ struct attribute *attr, char *buf) -+AuStubVoid(sysaufs_br_init, struct au_branch *br) -+AuStubVoid(sysaufs_brs_add, struct super_block *sb, aufs_bindex_t bindex) -+AuStubVoid(sysaufs_brs_del, struct super_block *sb, aufs_bindex_t bindex) -+ -+static inline void sysaufs_brs_init(void) -+{ -+ sysaufs_brs = 0; -+} -+ -+#endif /* CONFIG_SYSFS */ -+ -+#endif /* __KERNEL__ */ -+#endif /* __SYSAUFS_H__ */ -diff --git a/fs/aufs/sysfs.c b/fs/aufs/sysfs.c -new file mode 100644 -index 000000000000..955ed071a12a ---- /dev/null -+++ b/fs/aufs/sysfs.c -@@ -0,0 +1,338 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * sysfs interface -+ */ -+ -+#include -+#include -+#include "aufs.h" -+ -+static struct attribute *au_attr[] = { -+ NULL, /* need to NULL terminate the list of attributes */ -+}; -+ -+static struct attribute_group sysaufs_attr_group_body = { -+ .attrs = au_attr -+}; -+ -+struct attribute_group *sysaufs_attr_group = &sysaufs_attr_group_body; -+ -+/* ---------------------------------------------------------------------- */ -+ -+int sysaufs_si_xi_path(struct seq_file *seq, struct super_block *sb) -+{ -+ int err; -+ -+ SiMustAnyLock(sb); -+ -+ err = 0; -+ if (au_opt_test(au_mntflags(sb), XINO)) { -+ err = au_xino_path(seq, au_sbi(sb)->si_xib); -+ seq_putc(seq, '\n'); -+ } -+ return err; -+} -+ -+/* -+ * the lifetime of branch is independent from the entry under sysfs. -+ * sysfs handles the lifetime of the entry, and never call ->show() after it is -+ * unlinked. -+ */ -+static int sysaufs_si_br(struct seq_file *seq, struct super_block *sb, -+ aufs_bindex_t bindex, int idx) -+{ -+ int err; -+ struct path path; -+ struct dentry *root; -+ struct au_branch *br; -+ au_br_perm_str_t perm; -+ -+ AuDbg("b%d\n", bindex); -+ -+ err = 0; -+ root = sb->s_root; -+ di_read_lock_parent(root, !AuLock_IR); -+ br = au_sbr(sb, bindex); -+ -+ switch (idx) { -+ case AuBrSysfs_BR: -+ path.mnt = au_br_mnt(br); -+ path.dentry = au_h_dptr(root, bindex); -+ err = au_seq_path(seq, &path); -+ if (!err) { -+ au_optstr_br_perm(&perm, br->br_perm); -+ seq_printf(seq, "=%s\n", perm.a); -+ } -+ break; -+ case AuBrSysfs_BRID: -+ seq_printf(seq, "%d\n", br->br_id); -+ break; -+ } -+ di_read_unlock(root, !AuLock_IR); -+ if (unlikely(err || seq_has_overflowed(seq))) -+ err = -E2BIG; -+ -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+static struct seq_file *au_seq(char *p, ssize_t len) -+{ -+ struct seq_file *seq; -+ -+ seq = kzalloc(sizeof(*seq), GFP_NOFS); -+ if (seq) { -+ /* mutex_init(&seq.lock); */ -+ seq->buf = p; -+ seq->size = len; -+ return seq; /* success */ -+ } -+ -+ seq = ERR_PTR(-ENOMEM); -+ return seq; -+} -+ -+#define SysaufsBr_PREFIX "br" -+#define SysaufsBrid_PREFIX "brid" -+ -+/* todo: file size may exceed PAGE_SIZE */ -+ssize_t sysaufs_si_show(struct kobject *kobj, struct attribute *attr, -+ char *buf) -+{ -+ ssize_t err; -+ int idx; -+ long l; -+ aufs_bindex_t bbot; -+ struct au_sbinfo *sbinfo; -+ struct super_block *sb; -+ struct seq_file *seq; -+ char *name; -+ struct attribute **cattr; -+ -+ sbinfo = container_of(kobj, struct au_sbinfo, si_kobj); -+ sb = sbinfo->si_sb; -+ -+ /* -+ * prevent a race condition between sysfs and aufs. -+ * for instance, sysfs_file_read() calls sysfs_get_active_two() which -+ * prohibits maintaining the sysfs entries. -+ * hew we acquire read lock after sysfs_get_active_two(). -+ * on the other hand, the remount process may maintain the sysfs/aufs -+ * entries after acquiring write lock. -+ * it can cause a deadlock. -+ * simply we gave up processing read here. -+ */ -+ err = -EBUSY; -+ if (unlikely(!si_noflush_read_trylock(sb))) -+ goto out; -+ -+ seq = au_seq(buf, PAGE_SIZE); -+ err = PTR_ERR(seq); -+ if (IS_ERR(seq)) -+ goto out_unlock; -+ -+ name = (void *)attr->name; -+ cattr = sysaufs_si_attrs; -+ while (*cattr) { -+ if (!strcmp(name, (*cattr)->name)) { -+ err = container_of(*cattr, struct sysaufs_si_attr, attr) -+ ->show(seq, sb); -+ goto out_seq; -+ } -+ cattr++; -+ } -+ -+ if (!strncmp(name, SysaufsBrid_PREFIX, -+ sizeof(SysaufsBrid_PREFIX) - 1)) { -+ idx = AuBrSysfs_BRID; -+ name += sizeof(SysaufsBrid_PREFIX) - 1; -+ } else if (!strncmp(name, SysaufsBr_PREFIX, -+ sizeof(SysaufsBr_PREFIX) - 1)) { -+ idx = AuBrSysfs_BR; -+ name += sizeof(SysaufsBr_PREFIX) - 1; -+ } else -+ BUG(); -+ -+ err = kstrtol(name, 10, &l); -+ if (!err) { -+ bbot = au_sbbot(sb); -+ if (l <= bbot) -+ err = sysaufs_si_br(seq, sb, (aufs_bindex_t)l, idx); -+ else -+ err = -ENOENT; -+ } -+ -+out_seq: -+ if (!err) { -+ err = seq->count; -+ /* sysfs limit */ -+ if (unlikely(err == PAGE_SIZE)) -+ err = -EFBIG; -+ } -+ au_kfree_rcu(seq); -+out_unlock: -+ si_read_unlock(sb); -+out: -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+static int au_brinfo(struct super_block *sb, union aufs_brinfo __user *arg) -+{ -+ int err; -+ int16_t brid; -+ aufs_bindex_t bindex, bbot; -+ size_t sz; -+ char *buf; -+ struct seq_file *seq; -+ struct au_branch *br; -+ -+ si_read_lock(sb, AuLock_FLUSH); -+ bbot = au_sbbot(sb); -+ err = bbot + 1; -+ if (!arg) -+ goto out; -+ -+ err = -ENOMEM; -+ buf = (void *)__get_free_page(GFP_NOFS); -+ if (unlikely(!buf)) -+ goto out; -+ -+ seq = au_seq(buf, PAGE_SIZE); -+ err = PTR_ERR(seq); -+ if (IS_ERR(seq)) -+ goto out_buf; -+ -+ sz = sizeof(*arg) - offsetof(union aufs_brinfo, path); -+ for (bindex = 0; bindex <= bbot; bindex++, arg++) { -+ /* VERIFY_WRITE */ -+ err = !access_ok(arg, sizeof(*arg)); -+ if (unlikely(err)) -+ break; -+ -+ br = au_sbr(sb, bindex); -+ brid = br->br_id; -+ BUILD_BUG_ON(sizeof(brid) != sizeof(arg->id)); -+ err = __put_user(brid, &arg->id); -+ if (unlikely(err)) -+ break; -+ -+ BUILD_BUG_ON(sizeof(br->br_perm) != sizeof(arg->perm)); -+ err = __put_user(br->br_perm, &arg->perm); -+ if (unlikely(err)) -+ break; -+ -+ err = au_seq_path(seq, &br->br_path); -+ if (unlikely(err)) -+ break; -+ seq_putc(seq, '\0'); -+ if (!seq_has_overflowed(seq)) { -+ err = copy_to_user(arg->path, seq->buf, seq->count); -+ seq->count = 0; -+ if (unlikely(err)) -+ break; -+ } else { -+ err = -E2BIG; -+ goto out_seq; -+ } -+ } -+ if (unlikely(err)) -+ err = -EFAULT; -+ -+out_seq: -+ au_kfree_rcu(seq); -+out_buf: -+ free_page((unsigned long)buf); -+out: -+ si_read_unlock(sb); -+ return err; -+} -+ -+long au_brinfo_ioctl(struct file *file, unsigned long arg) -+{ -+ return au_brinfo(file->f_path.dentry->d_sb, (void __user *)arg); -+} -+ -+#ifdef CONFIG_COMPAT -+long au_brinfo_compat_ioctl(struct file *file, unsigned long arg) -+{ -+ return au_brinfo(file->f_path.dentry->d_sb, compat_ptr(arg)); -+} -+#endif -+ -+/* ---------------------------------------------------------------------- */ -+ -+void sysaufs_br_init(struct au_branch *br) -+{ -+ int i; -+ struct au_brsysfs *br_sysfs; -+ struct attribute *attr; -+ -+ br_sysfs = br->br_sysfs; -+ for (i = 0; i < ARRAY_SIZE(br->br_sysfs); i++) { -+ attr = &br_sysfs->attr; -+ sysfs_attr_init(attr); -+ attr->name = br_sysfs->name; -+ attr->mode = 0444; -+ br_sysfs++; -+ } -+} -+ -+void sysaufs_brs_del(struct super_block *sb, aufs_bindex_t bindex) -+{ -+ struct au_branch *br; -+ struct kobject *kobj; -+ struct au_brsysfs *br_sysfs; -+ int i; -+ aufs_bindex_t bbot; -+ -+ if (!sysaufs_brs) -+ return; -+ -+ kobj = &au_sbi(sb)->si_kobj; -+ bbot = au_sbbot(sb); -+ for (; bindex <= bbot; bindex++) { -+ br = au_sbr(sb, bindex); -+ br_sysfs = br->br_sysfs; -+ for (i = 0; i < ARRAY_SIZE(br->br_sysfs); i++) { -+ sysfs_remove_file(kobj, &br_sysfs->attr); -+ br_sysfs++; -+ } -+ } -+} -+ -+void sysaufs_brs_add(struct super_block *sb, aufs_bindex_t bindex) -+{ -+ int err, i; -+ aufs_bindex_t bbot; -+ struct kobject *kobj; -+ struct au_branch *br; -+ struct au_brsysfs *br_sysfs; -+ -+ if (!sysaufs_brs) -+ return; -+ -+ kobj = &au_sbi(sb)->si_kobj; -+ bbot = au_sbbot(sb); -+ for (; bindex <= bbot; bindex++) { -+ br = au_sbr(sb, bindex); -+ br_sysfs = br->br_sysfs; -+ snprintf(br_sysfs[AuBrSysfs_BR].name, sizeof(br_sysfs->name), -+ SysaufsBr_PREFIX "%d", bindex); -+ snprintf(br_sysfs[AuBrSysfs_BRID].name, sizeof(br_sysfs->name), -+ SysaufsBrid_PREFIX "%d", bindex); -+ for (i = 0; i < ARRAY_SIZE(br->br_sysfs); i++) { -+ err = sysfs_create_file(kobj, &br_sysfs->attr); -+ if (unlikely(err)) -+ pr_warn("failed %s under sysfs(%d)\n", -+ br_sysfs->name, err); -+ br_sysfs++; -+ } -+ } -+} -diff --git a/fs/aufs/sysrq.c b/fs/aufs/sysrq.c -new file mode 100644 -index 000000000000..d51b95163e24 ---- /dev/null -+++ b/fs/aufs/sysrq.c -@@ -0,0 +1,136 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * magic sysrq handler -+ */ -+ -+/* #include */ -+#include -+#include "aufs.h" -+ -+/* ---------------------------------------------------------------------- */ -+ -+static void sysrq_sb(struct super_block *sb) -+{ -+ char *plevel; -+ struct au_sbinfo *sbinfo; -+ struct file *file; -+ struct hlist_bl_head *files; -+ struct hlist_bl_node *pos; -+ struct au_finfo *finfo; -+ struct inode *i; -+ -+ plevel = au_plevel; -+ au_plevel = KERN_WARNING; -+ -+ /* since we define pr_fmt, call printk directly */ -+#define pr(str) printk(KERN_WARNING AUFS_NAME ": " str) -+ -+ sbinfo = au_sbi(sb); -+ printk(KERN_WARNING "si=%lx\n", sysaufs_si_id(sbinfo)); -+ pr("superblock\n"); -+ au_dpri_sb(sb); -+ -+#if 0 /* reserved */ -+ do { -+ int err, i, j, ndentry; -+ struct au_dcsub_pages dpages; -+ struct au_dpage *dpage; -+ -+ err = au_dpages_init(&dpages, GFP_ATOMIC); -+ if (unlikely(err)) -+ break; -+ err = au_dcsub_pages(&dpages, sb->s_root, NULL, NULL); -+ if (!err) -+ for (i = 0; i < dpages.ndpage; i++) { -+ dpage = dpages.dpages + i; -+ ndentry = dpage->ndentry; -+ for (j = 0; j < ndentry; j++) -+ au_dpri_dentry(dpage->dentries[j]); -+ } -+ au_dpages_free(&dpages); -+ } while (0); -+#endif -+ -+ pr("isolated inode\n"); -+ spin_lock(&sb->s_inode_list_lock); -+ list_for_each_entry(i, &sb->s_inodes, i_sb_list) { -+ spin_lock(&i->i_lock); -+ if (hlist_empty(&i->i_dentry)) -+ au_dpri_inode(i); -+ spin_unlock(&i->i_lock); -+ } -+ spin_unlock(&sb->s_inode_list_lock); -+ -+ pr("files\n"); -+ files = &au_sbi(sb)->si_files; -+ hlist_bl_lock(files); -+ hlist_bl_for_each_entry(finfo, pos, files, fi_hlist) { -+ umode_t mode; -+ -+ file = finfo->fi_file; -+ mode = file_inode(file)->i_mode; -+ if (!special_file(mode)) -+ au_dpri_file(file); -+ } -+ hlist_bl_unlock(files); -+ pr("done\n"); -+ -+#undef pr -+ au_plevel = plevel; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* module parameter */ -+static char *aufs_sysrq_key = "a"; -+module_param_named(sysrq, aufs_sysrq_key, charp, 0444); -+MODULE_PARM_DESC(sysrq, "MagicSysRq key for " AUFS_NAME); -+ -+static void au_sysrq(int key __maybe_unused) -+{ -+ struct au_sbinfo *sbinfo; -+ struct hlist_bl_node *pos; -+ -+ lockdep_off(); -+ au_sbilist_lock(); -+ hlist_bl_for_each_entry(sbinfo, pos, &au_sbilist, si_list) -+ sysrq_sb(sbinfo->si_sb); -+ au_sbilist_unlock(); -+ lockdep_on(); -+} -+ -+static struct sysrq_key_op au_sysrq_op = { -+ .handler = au_sysrq, -+ .help_msg = "Aufs", -+ .action_msg = "Aufs", -+ .enable_mask = SYSRQ_ENABLE_DUMP -+}; -+ -+/* ---------------------------------------------------------------------- */ -+ -+int __init au_sysrq_init(void) -+{ -+ int err; -+ char key; -+ -+ err = -1; -+ key = *aufs_sysrq_key; -+ if ('a' <= key && key <= 'z') -+ err = register_sysrq_key(key, &au_sysrq_op); -+ if (unlikely(err)) -+ pr_err("err %d, sysrq=%c\n", err, key); -+ return err; -+} -+ -+void au_sysrq_fin(void) -+{ -+ int err; -+ -+ err = unregister_sysrq_key(*aufs_sysrq_key, &au_sysrq_op); -+ if (unlikely(err)) -+ pr_err("err %d (ignored)\n", err); -+} -diff --git a/fs/aufs/vdir.c b/fs/aufs/vdir.c -new file mode 100644 -index 000000000000..6cc7ecf0b0e1 ---- /dev/null -+++ b/fs/aufs/vdir.c -@@ -0,0 +1,883 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * virtual or vertical directory -+ */ -+ -+#include -+#include "aufs.h" -+ -+static unsigned int calc_size(int nlen) -+{ -+ return ALIGN(sizeof(struct au_vdir_de) + nlen, sizeof(ino_t)); -+} -+ -+static int set_deblk_end(union au_vdir_deblk_p *p, -+ union au_vdir_deblk_p *deblk_end) -+{ -+ if (calc_size(0) <= deblk_end->deblk - p->deblk) { -+ p->de->de_str.len = 0; -+ /* smp_mb(); */ -+ return 0; -+ } -+ return -1; /* error */ -+} -+ -+/* returns true or false */ -+static int is_deblk_end(union au_vdir_deblk_p *p, -+ union au_vdir_deblk_p *deblk_end) -+{ -+ if (calc_size(0) <= deblk_end->deblk - p->deblk) -+ return !p->de->de_str.len; -+ return 1; -+} -+ -+static unsigned char *last_deblk(struct au_vdir *vdir) -+{ -+ return vdir->vd_deblk[vdir->vd_nblk - 1]; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* estimate the appropriate size for name hash table */ -+unsigned int au_rdhash_est(loff_t sz) -+{ -+ unsigned int n; -+ -+ n = UINT_MAX; -+ sz >>= 10; -+ if (sz < n) -+ n = sz; -+ if (sz < AUFS_RDHASH_DEF) -+ n = AUFS_RDHASH_DEF; -+ /* pr_info("n %u\n", n); */ -+ return n; -+} -+ -+/* -+ * the allocated memory has to be freed by -+ * au_nhash_wh_free() or au_nhash_de_free(). -+ */ -+int au_nhash_alloc(struct au_nhash *nhash, unsigned int num_hash, gfp_t gfp) -+{ -+ struct hlist_head *head; -+ unsigned int u; -+ size_t sz; -+ -+ sz = sizeof(*nhash->nh_head) * num_hash; -+ head = kmalloc(sz, gfp); -+ if (head) { -+ nhash->nh_num = num_hash; -+ nhash->nh_head = head; -+ for (u = 0; u < num_hash; u++) -+ INIT_HLIST_HEAD(head++); -+ return 0; /* success */ -+ } -+ -+ return -ENOMEM; -+} -+ -+static void nhash_count(struct hlist_head *head) -+{ -+#if 0 /* debugging */ -+ unsigned long n; -+ struct hlist_node *pos; -+ -+ n = 0; -+ hlist_for_each(pos, head) -+ n++; -+ pr_info("%lu\n", n); -+#endif -+} -+ -+static void au_nhash_wh_do_free(struct hlist_head *head) -+{ -+ struct au_vdir_wh *pos; -+ struct hlist_node *node; -+ -+ hlist_for_each_entry_safe(pos, node, head, wh_hash) -+ au_kfree_rcu(pos); -+} -+ -+static void au_nhash_de_do_free(struct hlist_head *head) -+{ -+ struct au_vdir_dehstr *pos; -+ struct hlist_node *node; -+ -+ hlist_for_each_entry_safe(pos, node, head, hash) -+ au_cache_free_vdir_dehstr(pos); -+} -+ -+static void au_nhash_do_free(struct au_nhash *nhash, -+ void (*free)(struct hlist_head *head)) -+{ -+ unsigned int n; -+ struct hlist_head *head; -+ -+ n = nhash->nh_num; -+ if (!n) -+ return; -+ -+ head = nhash->nh_head; -+ while (n-- > 0) { -+ nhash_count(head); -+ free(head++); -+ } -+ au_kfree_try_rcu(nhash->nh_head); -+} -+ -+void au_nhash_wh_free(struct au_nhash *whlist) -+{ -+ au_nhash_do_free(whlist, au_nhash_wh_do_free); -+} -+ -+static void au_nhash_de_free(struct au_nhash *delist) -+{ -+ au_nhash_do_free(delist, au_nhash_de_do_free); -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+int au_nhash_test_longer_wh(struct au_nhash *whlist, aufs_bindex_t btgt, -+ int limit) -+{ -+ int num; -+ unsigned int u, n; -+ struct hlist_head *head; -+ struct au_vdir_wh *pos; -+ -+ num = 0; -+ n = whlist->nh_num; -+ head = whlist->nh_head; -+ for (u = 0; u < n; u++, head++) -+ hlist_for_each_entry(pos, head, wh_hash) -+ if (pos->wh_bindex == btgt && ++num > limit) -+ return 1; -+ return 0; -+} -+ -+static struct hlist_head *au_name_hash(struct au_nhash *nhash, -+ unsigned char *name, -+ unsigned int len) -+{ -+ unsigned int v; -+ /* const unsigned int magic_bit = 12; */ -+ -+ AuDebugOn(!nhash->nh_num || !nhash->nh_head); -+ -+ v = 0; -+ if (len > 8) -+ len = 8; -+ while (len--) -+ v += *name++; -+ /* v = hash_long(v, magic_bit); */ -+ v %= nhash->nh_num; -+ return nhash->nh_head + v; -+} -+ -+static int au_nhash_test_name(struct au_vdir_destr *str, const char *name, -+ int nlen) -+{ -+ return str->len == nlen && !memcmp(str->name, name, nlen); -+} -+ -+/* returns found or not */ -+int au_nhash_test_known_wh(struct au_nhash *whlist, char *name, int nlen) -+{ -+ struct hlist_head *head; -+ struct au_vdir_wh *pos; -+ struct au_vdir_destr *str; -+ -+ head = au_name_hash(whlist, name, nlen); -+ hlist_for_each_entry(pos, head, wh_hash) { -+ str = &pos->wh_str; -+ AuDbg("%.*s\n", str->len, str->name); -+ if (au_nhash_test_name(str, name, nlen)) -+ return 1; -+ } -+ return 0; -+} -+ -+/* returns found(true) or not */ -+static int test_known(struct au_nhash *delist, char *name, int nlen) -+{ -+ struct hlist_head *head; -+ struct au_vdir_dehstr *pos; -+ struct au_vdir_destr *str; -+ -+ head = au_name_hash(delist, name, nlen); -+ hlist_for_each_entry(pos, head, hash) { -+ str = pos->str; -+ AuDbg("%.*s\n", str->len, str->name); -+ if (au_nhash_test_name(str, name, nlen)) -+ return 1; -+ } -+ return 0; -+} -+ -+static void au_shwh_init_wh(struct au_vdir_wh *wh, ino_t ino, -+ unsigned char d_type) -+{ -+#ifdef CONFIG_AUFS_SHWH -+ wh->wh_ino = ino; -+ wh->wh_type = d_type; -+#endif -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+int au_nhash_append_wh(struct au_nhash *whlist, char *name, int nlen, ino_t ino, -+ unsigned int d_type, aufs_bindex_t bindex, -+ unsigned char shwh) -+{ -+ int err; -+ struct au_vdir_destr *str; -+ struct au_vdir_wh *wh; -+ -+ AuDbg("%.*s\n", nlen, name); -+ AuDebugOn(!whlist->nh_num || !whlist->nh_head); -+ -+ err = -ENOMEM; -+ wh = kmalloc(sizeof(*wh) + nlen, GFP_NOFS); -+ if (unlikely(!wh)) -+ goto out; -+ -+ err = 0; -+ wh->wh_bindex = bindex; -+ if (shwh) -+ au_shwh_init_wh(wh, ino, d_type); -+ str = &wh->wh_str; -+ str->len = nlen; -+ memcpy(str->name, name, nlen); -+ hlist_add_head(&wh->wh_hash, au_name_hash(whlist, name, nlen)); -+ /* smp_mb(); */ -+ -+out: -+ return err; -+} -+ -+static int append_deblk(struct au_vdir *vdir) -+{ -+ int err; -+ unsigned long ul; -+ const unsigned int deblk_sz = vdir->vd_deblk_sz; -+ union au_vdir_deblk_p p, deblk_end; -+ unsigned char **o; -+ -+ err = -ENOMEM; -+ o = au_krealloc(vdir->vd_deblk, sizeof(*o) * (vdir->vd_nblk + 1), -+ GFP_NOFS, /*may_shrink*/0); -+ if (unlikely(!o)) -+ goto out; -+ -+ vdir->vd_deblk = o; -+ p.deblk = kmalloc(deblk_sz, GFP_NOFS); -+ if (p.deblk) { -+ ul = vdir->vd_nblk++; -+ vdir->vd_deblk[ul] = p.deblk; -+ vdir->vd_last.ul = ul; -+ vdir->vd_last.p.deblk = p.deblk; -+ deblk_end.deblk = p.deblk + deblk_sz; -+ err = set_deblk_end(&p, &deblk_end); -+ } -+ -+out: -+ return err; -+} -+ -+static int append_de(struct au_vdir *vdir, char *name, int nlen, ino_t ino, -+ unsigned int d_type, struct au_nhash *delist) -+{ -+ int err; -+ unsigned int sz; -+ const unsigned int deblk_sz = vdir->vd_deblk_sz; -+ union au_vdir_deblk_p p, *room, deblk_end; -+ struct au_vdir_dehstr *dehstr; -+ -+ p.deblk = last_deblk(vdir); -+ deblk_end.deblk = p.deblk + deblk_sz; -+ room = &vdir->vd_last.p; -+ AuDebugOn(room->deblk < p.deblk || deblk_end.deblk <= room->deblk -+ || !is_deblk_end(room, &deblk_end)); -+ -+ sz = calc_size(nlen); -+ if (unlikely(sz > deblk_end.deblk - room->deblk)) { -+ err = append_deblk(vdir); -+ if (unlikely(err)) -+ goto out; -+ -+ p.deblk = last_deblk(vdir); -+ deblk_end.deblk = p.deblk + deblk_sz; -+ /* smp_mb(); */ -+ AuDebugOn(room->deblk != p.deblk); -+ } -+ -+ err = -ENOMEM; -+ dehstr = au_cache_alloc_vdir_dehstr(); -+ if (unlikely(!dehstr)) -+ goto out; -+ -+ dehstr->str = &room->de->de_str; -+ hlist_add_head(&dehstr->hash, au_name_hash(delist, name, nlen)); -+ room->de->de_ino = ino; -+ room->de->de_type = d_type; -+ room->de->de_str.len = nlen; -+ memcpy(room->de->de_str.name, name, nlen); -+ -+ err = 0; -+ room->deblk += sz; -+ if (unlikely(set_deblk_end(room, &deblk_end))) -+ err = append_deblk(vdir); -+ /* smp_mb(); */ -+ -+out: -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+void au_vdir_free(struct au_vdir *vdir) -+{ -+ unsigned char **deblk; -+ -+ deblk = vdir->vd_deblk; -+ while (vdir->vd_nblk--) -+ au_kfree_try_rcu(*deblk++); -+ au_kfree_try_rcu(vdir->vd_deblk); -+ au_cache_free_vdir(vdir); -+} -+ -+static struct au_vdir *alloc_vdir(struct file *file) -+{ -+ struct au_vdir *vdir; -+ struct super_block *sb; -+ int err; -+ -+ sb = file->f_path.dentry->d_sb; -+ SiMustAnyLock(sb); -+ -+ err = -ENOMEM; -+ vdir = au_cache_alloc_vdir(); -+ if (unlikely(!vdir)) -+ goto out; -+ -+ vdir->vd_deblk = kzalloc(sizeof(*vdir->vd_deblk), GFP_NOFS); -+ if (unlikely(!vdir->vd_deblk)) -+ goto out_free; -+ -+ vdir->vd_deblk_sz = au_sbi(sb)->si_rdblk; -+ if (!vdir->vd_deblk_sz) { -+ /* estimate the appropriate size for deblk */ -+ vdir->vd_deblk_sz = au_dir_size(file, /*dentry*/NULL); -+ /* pr_info("vd_deblk_sz %u\n", vdir->vd_deblk_sz); */ -+ } -+ vdir->vd_nblk = 0; -+ vdir->vd_version = 0; -+ vdir->vd_jiffy = 0; -+ err = append_deblk(vdir); -+ if (!err) -+ return vdir; /* success */ -+ -+ au_kfree_try_rcu(vdir->vd_deblk); -+ -+out_free: -+ au_cache_free_vdir(vdir); -+out: -+ vdir = ERR_PTR(err); -+ return vdir; -+} -+ -+static int reinit_vdir(struct au_vdir *vdir) -+{ -+ int err; -+ union au_vdir_deblk_p p, deblk_end; -+ -+ while (vdir->vd_nblk > 1) { -+ au_kfree_try_rcu(vdir->vd_deblk[vdir->vd_nblk - 1]); -+ /* vdir->vd_deblk[vdir->vd_nblk - 1] = NULL; */ -+ vdir->vd_nblk--; -+ } -+ p.deblk = vdir->vd_deblk[0]; -+ deblk_end.deblk = p.deblk + vdir->vd_deblk_sz; -+ err = set_deblk_end(&p, &deblk_end); -+ /* keep vd_dblk_sz */ -+ vdir->vd_last.ul = 0; -+ vdir->vd_last.p.deblk = vdir->vd_deblk[0]; -+ vdir->vd_version = 0; -+ vdir->vd_jiffy = 0; -+ /* smp_mb(); */ -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+#define AuFillVdir_CALLED 1 -+#define AuFillVdir_WHABLE (1 << 1) -+#define AuFillVdir_SHWH (1 << 2) -+#define au_ftest_fillvdir(flags, name) ((flags) & AuFillVdir_##name) -+#define au_fset_fillvdir(flags, name) \ -+ do { (flags) |= AuFillVdir_##name; } while (0) -+#define au_fclr_fillvdir(flags, name) \ -+ do { (flags) &= ~AuFillVdir_##name; } while (0) -+ -+#ifndef CONFIG_AUFS_SHWH -+#undef AuFillVdir_SHWH -+#define AuFillVdir_SHWH 0 -+#endif -+ -+struct fillvdir_arg { -+ struct dir_context ctx; -+ struct file *file; -+ struct au_vdir *vdir; -+ struct au_nhash delist; -+ struct au_nhash whlist; -+ aufs_bindex_t bindex; -+ unsigned int flags; -+ int err; -+}; -+ -+static int fillvdir(struct dir_context *ctx, const char *__name, int nlen, -+ loff_t offset __maybe_unused, u64 h_ino, -+ unsigned int d_type) -+{ -+ struct fillvdir_arg *arg = container_of(ctx, struct fillvdir_arg, ctx); -+ char *name = (void *)__name; -+ struct super_block *sb; -+ ino_t ino; -+ const unsigned char shwh = !!au_ftest_fillvdir(arg->flags, SHWH); -+ -+ arg->err = 0; -+ sb = arg->file->f_path.dentry->d_sb; -+ au_fset_fillvdir(arg->flags, CALLED); -+ /* smp_mb(); */ -+ if (nlen <= AUFS_WH_PFX_LEN -+ || memcmp(name, AUFS_WH_PFX, AUFS_WH_PFX_LEN)) { -+ if (test_known(&arg->delist, name, nlen) -+ || au_nhash_test_known_wh(&arg->whlist, name, nlen)) -+ goto out; /* already exists or whiteouted */ -+ -+ arg->err = au_ino(sb, arg->bindex, h_ino, d_type, &ino); -+ if (!arg->err) { -+ if (unlikely(nlen > AUFS_MAX_NAMELEN)) -+ d_type = DT_UNKNOWN; -+ arg->err = append_de(arg->vdir, name, nlen, ino, -+ d_type, &arg->delist); -+ } -+ } else if (au_ftest_fillvdir(arg->flags, WHABLE)) { -+ name += AUFS_WH_PFX_LEN; -+ nlen -= AUFS_WH_PFX_LEN; -+ if (au_nhash_test_known_wh(&arg->whlist, name, nlen)) -+ goto out; /* already whiteouted */ -+ -+ ino = 0; /* just to suppress a warning */ -+ if (shwh) -+ arg->err = au_wh_ino(sb, arg->bindex, h_ino, d_type, -+ &ino); -+ if (!arg->err) { -+ if (nlen <= AUFS_MAX_NAMELEN + AUFS_WH_PFX_LEN) -+ d_type = DT_UNKNOWN; -+ arg->err = au_nhash_append_wh -+ (&arg->whlist, name, nlen, ino, d_type, -+ arg->bindex, shwh); -+ } -+ } -+ -+out: -+ if (!arg->err) -+ arg->vdir->vd_jiffy = jiffies; -+ /* smp_mb(); */ -+ AuTraceErr(arg->err); -+ return arg->err; -+} -+ -+static int au_handle_shwh(struct super_block *sb, struct au_vdir *vdir, -+ struct au_nhash *whlist, struct au_nhash *delist) -+{ -+#ifdef CONFIG_AUFS_SHWH -+ int err; -+ unsigned int nh, u; -+ struct hlist_head *head; -+ struct au_vdir_wh *pos; -+ struct hlist_node *n; -+ char *p, *o; -+ struct au_vdir_destr *destr; -+ -+ AuDebugOn(!au_opt_test(au_mntflags(sb), SHWH)); -+ -+ err = -ENOMEM; -+ o = p = (void *)__get_free_page(GFP_NOFS); -+ if (unlikely(!p)) -+ goto out; -+ -+ err = 0; -+ nh = whlist->nh_num; -+ memcpy(p, AUFS_WH_PFX, AUFS_WH_PFX_LEN); -+ p += AUFS_WH_PFX_LEN; -+ for (u = 0; u < nh; u++) { -+ head = whlist->nh_head + u; -+ hlist_for_each_entry_safe(pos, n, head, wh_hash) { -+ destr = &pos->wh_str; -+ memcpy(p, destr->name, destr->len); -+ err = append_de(vdir, o, destr->len + AUFS_WH_PFX_LEN, -+ pos->wh_ino, pos->wh_type, delist); -+ if (unlikely(err)) -+ break; -+ } -+ } -+ -+ free_page((unsigned long)o); -+ -+out: -+ AuTraceErr(err); -+ return err; -+#else -+ return 0; -+#endif -+} -+ -+static int au_do_read_vdir(struct fillvdir_arg *arg) -+{ -+ int err; -+ unsigned int rdhash; -+ loff_t offset; -+ aufs_bindex_t bbot, bindex, btop; -+ unsigned char shwh; -+ struct file *hf, *file; -+ struct super_block *sb; -+ -+ file = arg->file; -+ sb = file->f_path.dentry->d_sb; -+ SiMustAnyLock(sb); -+ -+ rdhash = au_sbi(sb)->si_rdhash; -+ if (!rdhash) -+ rdhash = au_rdhash_est(au_dir_size(file, /*dentry*/NULL)); -+ err = au_nhash_alloc(&arg->delist, rdhash, GFP_NOFS); -+ if (unlikely(err)) -+ goto out; -+ err = au_nhash_alloc(&arg->whlist, rdhash, GFP_NOFS); -+ if (unlikely(err)) -+ goto out_delist; -+ -+ err = 0; -+ arg->flags = 0; -+ shwh = 0; -+ if (au_opt_test(au_mntflags(sb), SHWH)) { -+ shwh = 1; -+ au_fset_fillvdir(arg->flags, SHWH); -+ } -+ btop = au_fbtop(file); -+ bbot = au_fbbot_dir(file); -+ for (bindex = btop; !err && bindex <= bbot; bindex++) { -+ hf = au_hf_dir(file, bindex); -+ if (!hf) -+ continue; -+ -+ offset = vfsub_llseek(hf, 0, SEEK_SET); -+ err = offset; -+ if (unlikely(offset)) -+ break; -+ -+ arg->bindex = bindex; -+ au_fclr_fillvdir(arg->flags, WHABLE); -+ if (shwh -+ || (bindex != bbot -+ && au_br_whable(au_sbr_perm(sb, bindex)))) -+ au_fset_fillvdir(arg->flags, WHABLE); -+ do { -+ arg->err = 0; -+ au_fclr_fillvdir(arg->flags, CALLED); -+ /* smp_mb(); */ -+ err = vfsub_iterate_dir(hf, &arg->ctx); -+ if (err >= 0) -+ err = arg->err; -+ } while (!err && au_ftest_fillvdir(arg->flags, CALLED)); -+ -+ /* -+ * dir_relax() may be good for concurrency, but aufs should not -+ * use it since it will cause a lockdep problem. -+ */ -+ } -+ -+ if (!err && shwh) -+ err = au_handle_shwh(sb, arg->vdir, &arg->whlist, &arg->delist); -+ -+ au_nhash_wh_free(&arg->whlist); -+ -+out_delist: -+ au_nhash_de_free(&arg->delist); -+out: -+ return err; -+} -+ -+static int read_vdir(struct file *file, int may_read) -+{ -+ int err; -+ unsigned long expire; -+ unsigned char do_read; -+ struct fillvdir_arg arg = { -+ .ctx = { -+ .actor = fillvdir -+ } -+ }; -+ struct inode *inode; -+ struct au_vdir *vdir, *allocated; -+ -+ err = 0; -+ inode = file_inode(file); -+ IMustLock(inode); -+ IiMustWriteLock(inode); -+ SiMustAnyLock(inode->i_sb); -+ -+ allocated = NULL; -+ do_read = 0; -+ expire = au_sbi(inode->i_sb)->si_rdcache; -+ vdir = au_ivdir(inode); -+ if (!vdir) { -+ do_read = 1; -+ vdir = alloc_vdir(file); -+ err = PTR_ERR(vdir); -+ if (IS_ERR(vdir)) -+ goto out; -+ err = 0; -+ allocated = vdir; -+ } else if (may_read -+ && (!inode_eq_iversion(inode, vdir->vd_version) -+ || time_after(jiffies, vdir->vd_jiffy + expire))) { -+ do_read = 1; -+ err = reinit_vdir(vdir); -+ if (unlikely(err)) -+ goto out; -+ } -+ -+ if (!do_read) -+ return 0; /* success */ -+ -+ arg.file = file; -+ arg.vdir = vdir; -+ err = au_do_read_vdir(&arg); -+ if (!err) { -+ /* file->f_pos = 0; */ /* todo: ctx->pos? */ -+ vdir->vd_version = inode_query_iversion(inode); -+ vdir->vd_last.ul = 0; -+ vdir->vd_last.p.deblk = vdir->vd_deblk[0]; -+ if (allocated) -+ au_set_ivdir(inode, allocated); -+ } else if (allocated) -+ au_vdir_free(allocated); -+ -+out: -+ return err; -+} -+ -+static int copy_vdir(struct au_vdir *tgt, struct au_vdir *src) -+{ -+ int err, rerr; -+ unsigned long ul, n; -+ const unsigned int deblk_sz = src->vd_deblk_sz; -+ -+ AuDebugOn(tgt->vd_nblk != 1); -+ -+ err = -ENOMEM; -+ if (tgt->vd_nblk < src->vd_nblk) { -+ unsigned char **p; -+ -+ p = au_krealloc(tgt->vd_deblk, sizeof(*p) * src->vd_nblk, -+ GFP_NOFS, /*may_shrink*/0); -+ if (unlikely(!p)) -+ goto out; -+ tgt->vd_deblk = p; -+ } -+ -+ if (tgt->vd_deblk_sz != deblk_sz) { -+ unsigned char *p; -+ -+ tgt->vd_deblk_sz = deblk_sz; -+ p = au_krealloc(tgt->vd_deblk[0], deblk_sz, GFP_NOFS, -+ /*may_shrink*/1); -+ if (unlikely(!p)) -+ goto out; -+ tgt->vd_deblk[0] = p; -+ } -+ memcpy(tgt->vd_deblk[0], src->vd_deblk[0], deblk_sz); -+ tgt->vd_version = src->vd_version; -+ tgt->vd_jiffy = src->vd_jiffy; -+ -+ n = src->vd_nblk; -+ for (ul = 1; ul < n; ul++) { -+ tgt->vd_deblk[ul] = kmemdup(src->vd_deblk[ul], deblk_sz, -+ GFP_NOFS); -+ if (unlikely(!tgt->vd_deblk[ul])) -+ goto out; -+ tgt->vd_nblk++; -+ } -+ tgt->vd_nblk = n; -+ tgt->vd_last.ul = tgt->vd_last.ul; -+ tgt->vd_last.p.deblk = tgt->vd_deblk[tgt->vd_last.ul]; -+ tgt->vd_last.p.deblk += src->vd_last.p.deblk -+ - src->vd_deblk[src->vd_last.ul]; -+ /* smp_mb(); */ -+ return 0; /* success */ -+ -+out: -+ rerr = reinit_vdir(tgt); -+ BUG_ON(rerr); -+ return err; -+} -+ -+int au_vdir_init(struct file *file) -+{ -+ int err; -+ struct inode *inode; -+ struct au_vdir *vdir_cache, *allocated; -+ -+ /* test file->f_pos here instead of ctx->pos */ -+ err = read_vdir(file, !file->f_pos); -+ if (unlikely(err)) -+ goto out; -+ -+ allocated = NULL; -+ vdir_cache = au_fvdir_cache(file); -+ if (!vdir_cache) { -+ vdir_cache = alloc_vdir(file); -+ err = PTR_ERR(vdir_cache); -+ if (IS_ERR(vdir_cache)) -+ goto out; -+ allocated = vdir_cache; -+ } else if (!file->f_pos && vdir_cache->vd_version != file->f_version) { -+ /* test file->f_pos here instead of ctx->pos */ -+ err = reinit_vdir(vdir_cache); -+ if (unlikely(err)) -+ goto out; -+ } else -+ return 0; /* success */ -+ -+ inode = file_inode(file); -+ err = copy_vdir(vdir_cache, au_ivdir(inode)); -+ if (!err) { -+ file->f_version = inode_query_iversion(inode); -+ if (allocated) -+ au_set_fvdir_cache(file, allocated); -+ } else if (allocated) -+ au_vdir_free(allocated); -+ -+out: -+ return err; -+} -+ -+static loff_t calc_offset(struct au_vdir *vdir) -+{ -+ loff_t offset; -+ union au_vdir_deblk_p p; -+ -+ p.deblk = vdir->vd_deblk[vdir->vd_last.ul]; -+ offset = vdir->vd_last.p.deblk - p.deblk; -+ offset += vdir->vd_deblk_sz * vdir->vd_last.ul; -+ return offset; -+} -+ -+/* returns true or false */ -+static int seek_vdir(struct file *file, struct dir_context *ctx) -+{ -+ int valid; -+ unsigned int deblk_sz; -+ unsigned long ul, n; -+ loff_t offset; -+ union au_vdir_deblk_p p, deblk_end; -+ struct au_vdir *vdir_cache; -+ -+ valid = 1; -+ vdir_cache = au_fvdir_cache(file); -+ offset = calc_offset(vdir_cache); -+ AuDbg("offset %lld\n", offset); -+ if (ctx->pos == offset) -+ goto out; -+ -+ vdir_cache->vd_last.ul = 0; -+ vdir_cache->vd_last.p.deblk = vdir_cache->vd_deblk[0]; -+ if (!ctx->pos) -+ goto out; -+ -+ valid = 0; -+ deblk_sz = vdir_cache->vd_deblk_sz; -+ ul = div64_u64(ctx->pos, deblk_sz); -+ AuDbg("ul %lu\n", ul); -+ if (ul >= vdir_cache->vd_nblk) -+ goto out; -+ -+ n = vdir_cache->vd_nblk; -+ for (; ul < n; ul++) { -+ p.deblk = vdir_cache->vd_deblk[ul]; -+ deblk_end.deblk = p.deblk + deblk_sz; -+ offset = ul; -+ offset *= deblk_sz; -+ while (!is_deblk_end(&p, &deblk_end) && offset < ctx->pos) { -+ unsigned int l; -+ -+ l = calc_size(p.de->de_str.len); -+ offset += l; -+ p.deblk += l; -+ } -+ if (!is_deblk_end(&p, &deblk_end)) { -+ valid = 1; -+ vdir_cache->vd_last.ul = ul; -+ vdir_cache->vd_last.p = p; -+ break; -+ } -+ } -+ -+out: -+ /* smp_mb(); */ -+ if (!valid) -+ AuDbg("valid %d\n", !valid); -+ return valid; -+} -+ -+int au_vdir_fill_de(struct file *file, struct dir_context *ctx) -+{ -+ unsigned int l, deblk_sz; -+ union au_vdir_deblk_p deblk_end; -+ struct au_vdir *vdir_cache; -+ struct au_vdir_de *de; -+ -+ if (!seek_vdir(file, ctx)) -+ return 0; -+ -+ vdir_cache = au_fvdir_cache(file); -+ deblk_sz = vdir_cache->vd_deblk_sz; -+ while (1) { -+ deblk_end.deblk = vdir_cache->vd_deblk[vdir_cache->vd_last.ul]; -+ deblk_end.deblk += deblk_sz; -+ while (!is_deblk_end(&vdir_cache->vd_last.p, &deblk_end)) { -+ de = vdir_cache->vd_last.p.de; -+ AuDbg("%.*s, off%lld, i%lu, dt%d\n", -+ de->de_str.len, de->de_str.name, ctx->pos, -+ (unsigned long)de->de_ino, de->de_type); -+ if (unlikely(!dir_emit(ctx, de->de_str.name, -+ de->de_str.len, de->de_ino, -+ de->de_type))) { -+ /* todo: ignore the error caused by udba? */ -+ /* return err; */ -+ return 0; -+ } -+ -+ l = calc_size(de->de_str.len); -+ vdir_cache->vd_last.p.deblk += l; -+ ctx->pos += l; -+ } -+ if (vdir_cache->vd_last.ul < vdir_cache->vd_nblk - 1) { -+ vdir_cache->vd_last.ul++; -+ vdir_cache->vd_last.p.deblk -+ = vdir_cache->vd_deblk[vdir_cache->vd_last.ul]; -+ ctx->pos = deblk_sz * vdir_cache->vd_last.ul; -+ continue; -+ } -+ break; -+ } -+ -+ /* smp_mb(); */ -+ return 0; -+} -diff --git a/fs/aufs/vfsub.c b/fs/aufs/vfsub.c -new file mode 100644 -index 000000000000..fa29c543cc28 ---- /dev/null -+++ b/fs/aufs/vfsub.c -@@ -0,0 +1,872 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * sub-routines for VFS -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include "aufs.h" -+ -+#ifdef CONFIG_AUFS_BR_FUSE -+int vfsub_test_mntns(struct vfsmount *mnt, struct super_block *h_sb) -+{ -+ if (!au_test_fuse(h_sb) || !au_userns) -+ return 0; -+ -+ return is_current_mnt_ns(mnt) ? 0 : -EACCES; -+} -+#endif -+ -+int vfsub_sync_filesystem(struct super_block *h_sb, int wait) -+{ -+ int err; -+ -+ lockdep_off(); -+ down_read(&h_sb->s_umount); -+ err = __sync_filesystem(h_sb, wait); -+ up_read(&h_sb->s_umount); -+ lockdep_on(); -+ -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+int vfsub_update_h_iattr(struct path *h_path, int *did) -+{ -+ int err; -+ struct kstat st; -+ struct super_block *h_sb; -+ -+ /* for remote fs, leave work for its getattr or d_revalidate */ -+ /* for bad i_attr fs, handle them in aufs_getattr() */ -+ /* still some fs may acquire i_mutex. we need to skip them */ -+ err = 0; -+ if (!did) -+ did = &err; -+ h_sb = h_path->dentry->d_sb; -+ *did = (!au_test_fs_remote(h_sb) && au_test_fs_refresh_iattr(h_sb)); -+ if (*did) -+ err = vfsub_getattr(h_path, &st); -+ -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+struct file *vfsub_dentry_open(struct path *path, int flags) -+{ -+ return dentry_open(path, flags /* | __FMODE_NONOTIFY */, -+ current_cred()); -+} -+ -+struct file *vfsub_filp_open(const char *path, int oflags, int mode) -+{ -+ struct file *file; -+ -+ lockdep_off(); -+ file = filp_open(path, -+ oflags /* | __FMODE_NONOTIFY */, -+ mode); -+ lockdep_on(); -+ if (IS_ERR(file)) -+ goto out; -+ vfsub_update_h_iattr(&file->f_path, /*did*/NULL); /*ignore*/ -+ -+out: -+ return file; -+} -+ -+/* -+ * Ideally this function should call VFS:do_last() in order to keep all its -+ * checkings. But it is very hard for aufs to regenerate several VFS internal -+ * structure such as nameidata. This is a second (or third) best approach. -+ * cf. linux/fs/namei.c:do_last(), lookup_open() and atomic_open(). -+ */ -+int vfsub_atomic_open(struct inode *dir, struct dentry *dentry, -+ struct vfsub_aopen_args *args) -+{ -+ int err; -+ struct au_branch *br = args->br; -+ struct file *file = args->file; -+ /* copied from linux/fs/namei.c:atomic_open() */ -+ struct dentry *const DENTRY_NOT_SET = (void *)-1UL; -+ -+ IMustLock(dir); -+ AuDebugOn(!dir->i_op->atomic_open); -+ -+ err = au_br_test_oflag(args->open_flag, br); -+ if (unlikely(err)) -+ goto out; -+ -+ au_lcnt_inc(&br->br_nfiles); -+ file->f_path.dentry = DENTRY_NOT_SET; -+ file->f_path.mnt = au_br_mnt(br); -+ AuDbg("%ps\n", dir->i_op->atomic_open); -+ err = dir->i_op->atomic_open(dir, dentry, file, args->open_flag, -+ args->create_mode); -+ if (unlikely(err < 0)) { -+ au_lcnt_dec(&br->br_nfiles); -+ goto out; -+ } -+ -+ /* temporary workaround for nfsv4 branch */ -+ if (au_test_nfs(dir->i_sb)) -+ nfs_mark_for_revalidate(dir); -+ -+ if (file->f_mode & FMODE_CREATED) -+ fsnotify_create(dir, dentry); -+ if (!(file->f_mode & FMODE_OPENED)) { -+ au_lcnt_dec(&br->br_nfiles); -+ goto out; -+ } -+ -+ /* todo: call VFS:may_open() here */ -+ /* todo: ima_file_check() too? */ -+ if (!err && (args->open_flag & __FMODE_EXEC)) -+ err = deny_write_access(file); -+ if (!err) -+ fsnotify_open(file); -+ else -+ au_lcnt_dec(&br->br_nfiles); -+ /* note that the file is created and still opened */ -+ -+out: -+ return err; -+} -+ -+int vfsub_kern_path(const char *name, unsigned int flags, struct path *path) -+{ -+ int err; -+ -+ err = kern_path(name, flags, path); -+ if (!err && d_is_positive(path->dentry)) -+ vfsub_update_h_iattr(path, /*did*/NULL); /*ignore*/ -+ return err; -+} -+ -+struct dentry *vfsub_lookup_one_len_unlocked(const char *name, -+ struct dentry *parent, int len) -+{ -+ struct path path = { -+ .mnt = NULL -+ }; -+ -+ path.dentry = lookup_one_len_unlocked(name, parent, len); -+ if (IS_ERR(path.dentry)) -+ goto out; -+ if (d_is_positive(path.dentry)) -+ vfsub_update_h_iattr(&path, /*did*/NULL); /*ignore*/ -+ -+out: -+ AuTraceErrPtr(path.dentry); -+ return path.dentry; -+} -+ -+struct dentry *vfsub_lookup_one_len(const char *name, struct dentry *parent, -+ int len) -+{ -+ struct path path = { -+ .mnt = NULL -+ }; -+ -+ /* VFS checks it too, but by WARN_ON_ONCE() */ -+ IMustLock(d_inode(parent)); -+ -+ path.dentry = lookup_one_len(name, parent, len); -+ if (IS_ERR(path.dentry)) -+ goto out; -+ if (d_is_positive(path.dentry)) -+ vfsub_update_h_iattr(&path, /*did*/NULL); /*ignore*/ -+ -+out: -+ AuTraceErrPtr(path.dentry); -+ return path.dentry; -+} -+ -+void vfsub_call_lkup_one(void *args) -+{ -+ struct vfsub_lkup_one_args *a = args; -+ *a->errp = vfsub_lkup_one(a->name, a->parent); -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+struct dentry *vfsub_lock_rename(struct dentry *d1, struct au_hinode *hdir1, -+ struct dentry *d2, struct au_hinode *hdir2) -+{ -+ struct dentry *d; -+ -+ lockdep_off(); -+ d = lock_rename(d1, d2); -+ lockdep_on(); -+ au_hn_suspend(hdir1); -+ if (hdir1 != hdir2) -+ au_hn_suspend(hdir2); -+ -+ return d; -+} -+ -+void vfsub_unlock_rename(struct dentry *d1, struct au_hinode *hdir1, -+ struct dentry *d2, struct au_hinode *hdir2) -+{ -+ au_hn_resume(hdir1); -+ if (hdir1 != hdir2) -+ au_hn_resume(hdir2); -+ lockdep_off(); -+ unlock_rename(d1, d2); -+ lockdep_on(); -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+int vfsub_create(struct inode *dir, struct path *path, int mode, bool want_excl) -+{ -+ int err; -+ struct dentry *d; -+ -+ IMustLock(dir); -+ -+ d = path->dentry; -+ path->dentry = d->d_parent; -+ err = security_path_mknod(path, d, mode, 0); -+ path->dentry = d; -+ if (unlikely(err)) -+ goto out; -+ -+ lockdep_off(); -+ err = vfs_create(dir, path->dentry, mode, want_excl); -+ lockdep_on(); -+ if (!err) { -+ struct path tmp = *path; -+ int did; -+ -+ vfsub_update_h_iattr(&tmp, &did); -+ if (did) { -+ tmp.dentry = path->dentry->d_parent; -+ vfsub_update_h_iattr(&tmp, /*did*/NULL); -+ } -+ /*ignore*/ -+ } -+ -+out: -+ return err; -+} -+ -+int vfsub_symlink(struct inode *dir, struct path *path, const char *symname) -+{ -+ int err; -+ struct dentry *d; -+ -+ IMustLock(dir); -+ -+ d = path->dentry; -+ path->dentry = d->d_parent; -+ err = security_path_symlink(path, d, symname); -+ path->dentry = d; -+ if (unlikely(err)) -+ goto out; -+ -+ lockdep_off(); -+ err = vfs_symlink(dir, path->dentry, symname); -+ lockdep_on(); -+ if (!err) { -+ struct path tmp = *path; -+ int did; -+ -+ vfsub_update_h_iattr(&tmp, &did); -+ if (did) { -+ tmp.dentry = path->dentry->d_parent; -+ vfsub_update_h_iattr(&tmp, /*did*/NULL); -+ } -+ /*ignore*/ -+ } -+ -+out: -+ return err; -+} -+ -+int vfsub_mknod(struct inode *dir, struct path *path, int mode, dev_t dev) -+{ -+ int err; -+ struct dentry *d; -+ -+ IMustLock(dir); -+ -+ d = path->dentry; -+ path->dentry = d->d_parent; -+ err = security_path_mknod(path, d, mode, new_encode_dev(dev)); -+ path->dentry = d; -+ if (unlikely(err)) -+ goto out; -+ -+ lockdep_off(); -+ err = vfs_mknod(dir, path->dentry, mode, dev); -+ lockdep_on(); -+ if (!err) { -+ struct path tmp = *path; -+ int did; -+ -+ vfsub_update_h_iattr(&tmp, &did); -+ if (did) { -+ tmp.dentry = path->dentry->d_parent; -+ vfsub_update_h_iattr(&tmp, /*did*/NULL); -+ } -+ /*ignore*/ -+ } -+ -+out: -+ return err; -+} -+ -+static int au_test_nlink(struct inode *inode) -+{ -+ const unsigned int link_max = UINT_MAX >> 1; /* rough margin */ -+ -+ if (!au_test_fs_no_limit_nlink(inode->i_sb) -+ || inode->i_nlink < link_max) -+ return 0; -+ return -EMLINK; -+} -+ -+int vfsub_link(struct dentry *src_dentry, struct inode *dir, struct path *path, -+ struct inode **delegated_inode) -+{ -+ int err; -+ struct dentry *d; -+ -+ IMustLock(dir); -+ -+ err = au_test_nlink(d_inode(src_dentry)); -+ if (unlikely(err)) -+ return err; -+ -+ /* we don't call may_linkat() */ -+ d = path->dentry; -+ path->dentry = d->d_parent; -+ err = security_path_link(src_dentry, path, d); -+ path->dentry = d; -+ if (unlikely(err)) -+ goto out; -+ -+ lockdep_off(); -+ err = vfs_link(src_dentry, dir, path->dentry, delegated_inode); -+ lockdep_on(); -+ if (!err) { -+ struct path tmp = *path; -+ int did; -+ -+ /* fuse has different memory inode for the same inumber */ -+ vfsub_update_h_iattr(&tmp, &did); -+ if (did) { -+ tmp.dentry = path->dentry->d_parent; -+ vfsub_update_h_iattr(&tmp, /*did*/NULL); -+ tmp.dentry = src_dentry; -+ vfsub_update_h_iattr(&tmp, /*did*/NULL); -+ } -+ /*ignore*/ -+ } -+ -+out: -+ return err; -+} -+ -+int vfsub_rename(struct inode *src_dir, struct dentry *src_dentry, -+ struct inode *dir, struct path *path, -+ struct inode **delegated_inode, unsigned int flags) -+{ -+ int err; -+ struct path tmp = { -+ .mnt = path->mnt -+ }; -+ struct dentry *d; -+ -+ IMustLock(dir); -+ IMustLock(src_dir); -+ -+ d = path->dentry; -+ path->dentry = d->d_parent; -+ tmp.dentry = src_dentry->d_parent; -+ err = security_path_rename(&tmp, src_dentry, path, d, /*flags*/0); -+ path->dentry = d; -+ if (unlikely(err)) -+ goto out; -+ -+ lockdep_off(); -+ err = vfs_rename(src_dir, src_dentry, dir, path->dentry, -+ delegated_inode, flags); -+ lockdep_on(); -+ if (!err) { -+ int did; -+ -+ tmp.dentry = d->d_parent; -+ vfsub_update_h_iattr(&tmp, &did); -+ if (did) { -+ tmp.dentry = src_dentry; -+ vfsub_update_h_iattr(&tmp, /*did*/NULL); -+ tmp.dentry = src_dentry->d_parent; -+ vfsub_update_h_iattr(&tmp, /*did*/NULL); -+ } -+ /*ignore*/ -+ } -+ -+out: -+ return err; -+} -+ -+int vfsub_mkdir(struct inode *dir, struct path *path, int mode) -+{ -+ int err; -+ struct dentry *d; -+ -+ IMustLock(dir); -+ -+ d = path->dentry; -+ path->dentry = d->d_parent; -+ err = security_path_mkdir(path, d, mode); -+ path->dentry = d; -+ if (unlikely(err)) -+ goto out; -+ -+ lockdep_off(); -+ err = vfs_mkdir(dir, path->dentry, mode); -+ lockdep_on(); -+ if (!err) { -+ struct path tmp = *path; -+ int did; -+ -+ vfsub_update_h_iattr(&tmp, &did); -+ if (did) { -+ tmp.dentry = path->dentry->d_parent; -+ vfsub_update_h_iattr(&tmp, /*did*/NULL); -+ } -+ /*ignore*/ -+ } -+ -+out: -+ return err; -+} -+ -+int vfsub_rmdir(struct inode *dir, struct path *path) -+{ -+ int err; -+ struct dentry *d; -+ -+ IMustLock(dir); -+ -+ d = path->dentry; -+ path->dentry = d->d_parent; -+ err = security_path_rmdir(path, d); -+ path->dentry = d; -+ if (unlikely(err)) -+ goto out; -+ -+ lockdep_off(); -+ err = vfs_rmdir(dir, path->dentry); -+ lockdep_on(); -+ if (!err) { -+ struct path tmp = { -+ .dentry = path->dentry->d_parent, -+ .mnt = path->mnt -+ }; -+ -+ vfsub_update_h_iattr(&tmp, /*did*/NULL); /*ignore*/ -+ } -+ -+out: -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* todo: support mmap_sem? */ -+ssize_t vfsub_read_u(struct file *file, char __user *ubuf, size_t count, -+ loff_t *ppos) -+{ -+ ssize_t err; -+ -+ lockdep_off(); -+ err = vfs_read(file, ubuf, count, ppos); -+ lockdep_on(); -+ if (err >= 0) -+ vfsub_update_h_iattr(&file->f_path, /*did*/NULL); /*ignore*/ -+ return err; -+} -+ -+ssize_t vfsub_read_k(struct file *file, void *kbuf, size_t count, -+ loff_t *ppos) -+{ -+ ssize_t err; -+ -+ lockdep_off(); -+ err = kernel_read(file, kbuf, count, ppos); -+ lockdep_on(); -+ AuTraceErr(err); -+ if (err >= 0) -+ vfsub_update_h_iattr(&file->f_path, /*did*/NULL); /*ignore*/ -+ return err; -+} -+ -+ssize_t vfsub_write_u(struct file *file, const char __user *ubuf, size_t count, -+ loff_t *ppos) -+{ -+ ssize_t err; -+ -+ lockdep_off(); -+ err = vfs_write(file, ubuf, count, ppos); -+ lockdep_on(); -+ if (err >= 0) -+ vfsub_update_h_iattr(&file->f_path, /*did*/NULL); /*ignore*/ -+ return err; -+} -+ -+ssize_t vfsub_write_k(struct file *file, void *kbuf, size_t count, loff_t *ppos) -+{ -+ ssize_t err; -+ -+ lockdep_off(); -+ err = kernel_write(file, kbuf, count, ppos); -+ lockdep_on(); -+ if (err >= 0) -+ vfsub_update_h_iattr(&file->f_path, /*did*/NULL); /*ignore*/ -+ return err; -+} -+ -+int vfsub_flush(struct file *file, fl_owner_t id) -+{ -+ int err; -+ -+ err = 0; -+ if (file->f_op->flush) { -+ if (!au_test_nfs(file->f_path.dentry->d_sb)) -+ err = file->f_op->flush(file, id); -+ else { -+ lockdep_off(); -+ err = file->f_op->flush(file, id); -+ lockdep_on(); -+ } -+ if (!err) -+ vfsub_update_h_iattr(&file->f_path, /*did*/NULL); -+ /*ignore*/ -+ } -+ return err; -+} -+ -+int vfsub_iterate_dir(struct file *file, struct dir_context *ctx) -+{ -+ int err; -+ -+ AuDbg("%pD, ctx{%ps, %llu}\n", file, ctx->actor, ctx->pos); -+ -+ lockdep_off(); -+ err = iterate_dir(file, ctx); -+ lockdep_on(); -+ if (err >= 0) -+ vfsub_update_h_iattr(&file->f_path, /*did*/NULL); /*ignore*/ -+ -+ return err; -+} -+ -+long vfsub_splice_to(struct file *in, loff_t *ppos, -+ struct pipe_inode_info *pipe, size_t len, -+ unsigned int flags) -+{ -+ long err; -+ -+ lockdep_off(); -+ err = do_splice_to(in, ppos, pipe, len, flags); -+ lockdep_on(); -+ file_accessed(in); -+ if (err >= 0) -+ vfsub_update_h_iattr(&in->f_path, /*did*/NULL); /*ignore*/ -+ return err; -+} -+ -+long vfsub_splice_from(struct pipe_inode_info *pipe, struct file *out, -+ loff_t *ppos, size_t len, unsigned int flags) -+{ -+ long err; -+ -+ lockdep_off(); -+ err = do_splice_from(pipe, out, ppos, len, flags); -+ lockdep_on(); -+ if (err >= 0) -+ vfsub_update_h_iattr(&out->f_path, /*did*/NULL); /*ignore*/ -+ return err; -+} -+ -+int vfsub_fsync(struct file *file, struct path *path, int datasync) -+{ -+ int err; -+ -+ /* file can be NULL */ -+ lockdep_off(); -+ err = vfs_fsync(file, datasync); -+ lockdep_on(); -+ if (!err) { -+ if (!path) { -+ AuDebugOn(!file); -+ path = &file->f_path; -+ } -+ vfsub_update_h_iattr(path, /*did*/NULL); /*ignore*/ -+ } -+ return err; -+} -+ -+/* cf. open.c:do_sys_truncate() and do_sys_ftruncate() */ -+int vfsub_trunc(struct path *h_path, loff_t length, unsigned int attr, -+ struct file *h_file) -+{ -+ int err; -+ struct inode *h_inode; -+ struct super_block *h_sb; -+ -+ if (!h_file) { -+ err = vfsub_truncate(h_path, length); -+ goto out; -+ } -+ -+ h_inode = d_inode(h_path->dentry); -+ h_sb = h_inode->i_sb; -+ lockdep_off(); -+ sb_start_write(h_sb); -+ lockdep_on(); -+ err = locks_verify_truncate(h_inode, h_file, length); -+ if (!err) -+ err = security_path_truncate(h_path); -+ if (!err) { -+ lockdep_off(); -+ err = do_truncate(h_path->dentry, length, attr, h_file); -+ lockdep_on(); -+ } -+ lockdep_off(); -+ sb_end_write(h_sb); -+ lockdep_on(); -+ -+out: -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+struct au_vfsub_mkdir_args { -+ int *errp; -+ struct inode *dir; -+ struct path *path; -+ int mode; -+}; -+ -+static void au_call_vfsub_mkdir(void *args) -+{ -+ struct au_vfsub_mkdir_args *a = args; -+ *a->errp = vfsub_mkdir(a->dir, a->path, a->mode); -+} -+ -+int vfsub_sio_mkdir(struct inode *dir, struct path *path, int mode) -+{ -+ int err, do_sio, wkq_err; -+ -+ do_sio = au_test_h_perm_sio(dir, MAY_EXEC | MAY_WRITE); -+ if (!do_sio) { -+ lockdep_off(); -+ err = vfsub_mkdir(dir, path, mode); -+ lockdep_on(); -+ } else { -+ struct au_vfsub_mkdir_args args = { -+ .errp = &err, -+ .dir = dir, -+ .path = path, -+ .mode = mode -+ }; -+ wkq_err = au_wkq_wait(au_call_vfsub_mkdir, &args); -+ if (unlikely(wkq_err)) -+ err = wkq_err; -+ } -+ -+ return err; -+} -+ -+struct au_vfsub_rmdir_args { -+ int *errp; -+ struct inode *dir; -+ struct path *path; -+}; -+ -+static void au_call_vfsub_rmdir(void *args) -+{ -+ struct au_vfsub_rmdir_args *a = args; -+ *a->errp = vfsub_rmdir(a->dir, a->path); -+} -+ -+int vfsub_sio_rmdir(struct inode *dir, struct path *path) -+{ -+ int err, do_sio, wkq_err; -+ -+ do_sio = au_test_h_perm_sio(dir, MAY_EXEC | MAY_WRITE); -+ if (!do_sio) { -+ lockdep_off(); -+ err = vfsub_rmdir(dir, path); -+ lockdep_on(); -+ } else { -+ struct au_vfsub_rmdir_args args = { -+ .errp = &err, -+ .dir = dir, -+ .path = path -+ }; -+ wkq_err = au_wkq_wait(au_call_vfsub_rmdir, &args); -+ if (unlikely(wkq_err)) -+ err = wkq_err; -+ } -+ -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+struct notify_change_args { -+ int *errp; -+ struct path *path; -+ struct iattr *ia; -+ struct inode **delegated_inode; -+}; -+ -+static void call_notify_change(void *args) -+{ -+ struct notify_change_args *a = args; -+ struct inode *h_inode; -+ -+ h_inode = d_inode(a->path->dentry); -+ IMustLock(h_inode); -+ -+ *a->errp = -EPERM; -+ if (!IS_IMMUTABLE(h_inode) && !IS_APPEND(h_inode)) { -+ lockdep_off(); -+ *a->errp = notify_change(a->path->dentry, a->ia, -+ a->delegated_inode); -+ lockdep_on(); -+ if (!*a->errp) -+ vfsub_update_h_iattr(a->path, /*did*/NULL); /*ignore*/ -+ } -+ AuTraceErr(*a->errp); -+} -+ -+int vfsub_notify_change(struct path *path, struct iattr *ia, -+ struct inode **delegated_inode) -+{ -+ int err; -+ struct notify_change_args args = { -+ .errp = &err, -+ .path = path, -+ .ia = ia, -+ .delegated_inode = delegated_inode -+ }; -+ -+ call_notify_change(&args); -+ -+ return err; -+} -+ -+int vfsub_sio_notify_change(struct path *path, struct iattr *ia, -+ struct inode **delegated_inode) -+{ -+ int err, wkq_err; -+ struct notify_change_args args = { -+ .errp = &err, -+ .path = path, -+ .ia = ia, -+ .delegated_inode = delegated_inode -+ }; -+ -+ wkq_err = au_wkq_wait(call_notify_change, &args); -+ if (unlikely(wkq_err)) -+ err = wkq_err; -+ -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+struct unlink_args { -+ int *errp; -+ struct inode *dir; -+ struct path *path; -+ struct inode **delegated_inode; -+}; -+ -+static void call_unlink(void *args) -+{ -+ struct unlink_args *a = args; -+ struct dentry *d = a->path->dentry; -+ struct inode *h_inode; -+ const int stop_sillyrename = (au_test_nfs(d->d_sb) -+ && au_dcount(d) == 1); -+ -+ IMustLock(a->dir); -+ -+ a->path->dentry = d->d_parent; -+ *a->errp = security_path_unlink(a->path, d); -+ a->path->dentry = d; -+ if (unlikely(*a->errp)) -+ return; -+ -+ if (!stop_sillyrename) -+ dget(d); -+ h_inode = NULL; -+ if (d_is_positive(d)) { -+ h_inode = d_inode(d); -+ ihold(h_inode); -+ } -+ -+ lockdep_off(); -+ *a->errp = vfs_unlink(a->dir, d, a->delegated_inode); -+ lockdep_on(); -+ if (!*a->errp) { -+ struct path tmp = { -+ .dentry = d->d_parent, -+ .mnt = a->path->mnt -+ }; -+ vfsub_update_h_iattr(&tmp, /*did*/NULL); /*ignore*/ -+ } -+ -+ if (!stop_sillyrename) -+ dput(d); -+ if (h_inode) -+ iput(h_inode); -+ -+ AuTraceErr(*a->errp); -+} -+ -+/* -+ * @dir: must be locked. -+ * @dentry: target dentry. -+ */ -+int vfsub_unlink(struct inode *dir, struct path *path, -+ struct inode **delegated_inode, int force) -+{ -+ int err; -+ struct unlink_args args = { -+ .errp = &err, -+ .dir = dir, -+ .path = path, -+ .delegated_inode = delegated_inode -+ }; -+ -+ if (!force) -+ call_unlink(&args); -+ else { -+ int wkq_err; -+ -+ wkq_err = au_wkq_wait(call_unlink, &args); -+ if (unlikely(wkq_err)) -+ err = wkq_err; -+ } -+ -+ return err; -+} -diff --git a/fs/aufs/vfsub.h b/fs/aufs/vfsub.h -new file mode 100644 -index 000000000000..7d8993052cd5 ---- /dev/null -+++ b/fs/aufs/vfsub.h -@@ -0,0 +1,341 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * sub-routines for VFS -+ */ -+ -+#ifndef __AUFS_VFSUB_H__ -+#define __AUFS_VFSUB_H__ -+ -+#ifdef __KERNEL__ -+ -+#include -+#include -+#include -+#include -+#include "debug.h" -+ -+/* copied from linux/fs/internal.h */ -+/* todo: BAD approach!! */ -+extern void __mnt_drop_write(struct vfsmount *); -+extern struct file *alloc_empty_file(int, const struct cred *); -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* lock subclass for lower inode */ -+/* default MAX_LOCKDEP_SUBCLASSES(8) is not enough */ -+/* reduce? gave up. */ -+enum { -+ AuLsc_I_Begin = I_MUTEX_PARENT2, /* 5 */ -+ AuLsc_I_PARENT, /* lower inode, parent first */ -+ AuLsc_I_PARENT2, /* copyup dirs */ -+ AuLsc_I_PARENT3, /* copyup wh */ -+ AuLsc_I_CHILD, -+ AuLsc_I_CHILD2, -+ AuLsc_I_End -+}; -+ -+/* to debug easier, do not make them inlined functions */ -+#define MtxMustLock(mtx) AuDebugOn(!mutex_is_locked(mtx)) -+#define IMustLock(i) AuDebugOn(!inode_is_locked(i)) -+ -+/* ---------------------------------------------------------------------- */ -+ -+static inline void vfsub_drop_nlink(struct inode *inode) -+{ -+ AuDebugOn(!inode->i_nlink); -+ drop_nlink(inode); -+} -+ -+static inline void vfsub_dead_dir(struct inode *inode) -+{ -+ AuDebugOn(!S_ISDIR(inode->i_mode)); -+ inode->i_flags |= S_DEAD; -+ clear_nlink(inode); -+} -+ -+static inline int vfsub_native_ro(struct inode *inode) -+{ -+ return sb_rdonly(inode->i_sb) -+ || IS_RDONLY(inode) -+ /* || IS_APPEND(inode) */ -+ || IS_IMMUTABLE(inode); -+} -+ -+#ifdef CONFIG_AUFS_BR_FUSE -+int vfsub_test_mntns(struct vfsmount *mnt, struct super_block *h_sb); -+#else -+AuStubInt0(vfsub_test_mntns, struct vfsmount *mnt, struct super_block *h_sb); -+#endif -+ -+int vfsub_sync_filesystem(struct super_block *h_sb, int wait); -+ -+/* ---------------------------------------------------------------------- */ -+ -+int vfsub_update_h_iattr(struct path *h_path, int *did); -+struct file *vfsub_dentry_open(struct path *path, int flags); -+struct file *vfsub_filp_open(const char *path, int oflags, int mode); -+struct au_branch; -+struct vfsub_aopen_args { -+ struct file *file; -+ unsigned int open_flag; -+ umode_t create_mode; -+ struct au_branch *br; -+}; -+int vfsub_atomic_open(struct inode *dir, struct dentry *dentry, -+ struct vfsub_aopen_args *args); -+int vfsub_kern_path(const char *name, unsigned int flags, struct path *path); -+ -+struct dentry *vfsub_lookup_one_len_unlocked(const char *name, -+ struct dentry *parent, int len); -+struct dentry *vfsub_lookup_one_len(const char *name, struct dentry *parent, -+ int len); -+ -+struct vfsub_lkup_one_args { -+ struct dentry **errp; -+ struct qstr *name; -+ struct dentry *parent; -+}; -+ -+static inline struct dentry *vfsub_lkup_one(struct qstr *name, -+ struct dentry *parent) -+{ -+ return vfsub_lookup_one_len(name->name, parent, name->len); -+} -+ -+void vfsub_call_lkup_one(void *args); -+ -+/* ---------------------------------------------------------------------- */ -+ -+static inline int vfsub_mnt_want_write(struct vfsmount *mnt) -+{ -+ int err; -+ -+ lockdep_off(); -+ err = mnt_want_write(mnt); -+ lockdep_on(); -+ return err; -+} -+ -+static inline void vfsub_mnt_drop_write(struct vfsmount *mnt) -+{ -+ lockdep_off(); -+ mnt_drop_write(mnt); -+ lockdep_on(); -+} -+ -+#if 0 /* reserved */ -+static inline void vfsub_mnt_drop_write_file(struct file *file) -+{ -+ lockdep_off(); -+ mnt_drop_write_file(file); -+ lockdep_on(); -+} -+#endif -+ -+/* ---------------------------------------------------------------------- */ -+ -+struct au_hinode; -+struct dentry *vfsub_lock_rename(struct dentry *d1, struct au_hinode *hdir1, -+ struct dentry *d2, struct au_hinode *hdir2); -+void vfsub_unlock_rename(struct dentry *d1, struct au_hinode *hdir1, -+ struct dentry *d2, struct au_hinode *hdir2); -+ -+int vfsub_create(struct inode *dir, struct path *path, int mode, -+ bool want_excl); -+int vfsub_symlink(struct inode *dir, struct path *path, -+ const char *symname); -+int vfsub_mknod(struct inode *dir, struct path *path, int mode, dev_t dev); -+int vfsub_link(struct dentry *src_dentry, struct inode *dir, -+ struct path *path, struct inode **delegated_inode); -+int vfsub_rename(struct inode *src_hdir, struct dentry *src_dentry, -+ struct inode *hdir, struct path *path, -+ struct inode **delegated_inode, unsigned int flags); -+int vfsub_mkdir(struct inode *dir, struct path *path, int mode); -+int vfsub_rmdir(struct inode *dir, struct path *path); -+ -+/* ---------------------------------------------------------------------- */ -+ -+ssize_t vfsub_read_u(struct file *file, char __user *ubuf, size_t count, -+ loff_t *ppos); -+ssize_t vfsub_read_k(struct file *file, void *kbuf, size_t count, -+ loff_t *ppos); -+ssize_t vfsub_write_u(struct file *file, const char __user *ubuf, size_t count, -+ loff_t *ppos); -+ssize_t vfsub_write_k(struct file *file, void *kbuf, size_t count, -+ loff_t *ppos); -+int vfsub_flush(struct file *file, fl_owner_t id); -+int vfsub_iterate_dir(struct file *file, struct dir_context *ctx); -+ -+static inline loff_t vfsub_f_size_read(struct file *file) -+{ -+ return i_size_read(file_inode(file)); -+} -+ -+static inline unsigned int vfsub_file_flags(struct file *file) -+{ -+ unsigned int flags; -+ -+ spin_lock(&file->f_lock); -+ flags = file->f_flags; -+ spin_unlock(&file->f_lock); -+ -+ return flags; -+} -+ -+static inline int vfsub_file_execed(struct file *file) -+{ -+ /* todo: direct access f_flags */ -+ return !!(vfsub_file_flags(file) & __FMODE_EXEC); -+} -+ -+#if 0 /* reserved */ -+static inline void vfsub_file_accessed(struct file *h_file) -+{ -+ file_accessed(h_file); -+ vfsub_update_h_iattr(&h_file->f_path, /*did*/NULL); /*ignore*/ -+} -+#endif -+ -+#if 0 /* reserved */ -+static inline void vfsub_touch_atime(struct vfsmount *h_mnt, -+ struct dentry *h_dentry) -+{ -+ struct path h_path = { -+ .dentry = h_dentry, -+ .mnt = h_mnt -+ }; -+ touch_atime(&h_path); -+ vfsub_update_h_iattr(&h_path, /*did*/NULL); /*ignore*/ -+} -+#endif -+ -+static inline int vfsub_update_time(struct inode *h_inode, -+ struct timespec64 *ts, int flags) -+{ -+ return update_time(h_inode, ts, flags); -+ /* no vfsub_update_h_iattr() since we don't have struct path */ -+} -+ -+#ifdef CONFIG_FS_POSIX_ACL -+static inline int vfsub_acl_chmod(struct inode *h_inode, umode_t h_mode) -+{ -+ int err; -+ -+ err = posix_acl_chmod(h_inode, h_mode); -+ if (err == -EOPNOTSUPP) -+ err = 0; -+ return err; -+} -+#else -+AuStubInt0(vfsub_acl_chmod, struct inode *h_inode, umode_t h_mode); -+#endif -+ -+long vfsub_splice_to(struct file *in, loff_t *ppos, -+ struct pipe_inode_info *pipe, size_t len, -+ unsigned int flags); -+long vfsub_splice_from(struct pipe_inode_info *pipe, struct file *out, -+ loff_t *ppos, size_t len, unsigned int flags); -+ -+static inline long vfsub_truncate(struct path *path, loff_t length) -+{ -+ long err; -+ -+ lockdep_off(); -+ err = vfs_truncate(path, length); -+ lockdep_on(); -+ return err; -+} -+ -+int vfsub_trunc(struct path *h_path, loff_t length, unsigned int attr, -+ struct file *h_file); -+int vfsub_fsync(struct file *file, struct path *path, int datasync); -+ -+/* -+ * re-use branch fs's ioctl(FICLONE) while aufs itself doesn't support such -+ * ioctl. -+ */ -+static inline loff_t vfsub_clone_file_range(struct file *src, struct file *dst, -+ loff_t len) -+{ -+ loff_t err; -+ -+ lockdep_off(); -+ err = vfs_clone_file_range(src, 0, dst, 0, len, /*remap_flags*/0); -+ lockdep_on(); -+ -+ return err; -+} -+ -+/* copy_file_range(2) is a systemcall */ -+static inline ssize_t vfsub_copy_file_range(struct file *src, loff_t src_pos, -+ struct file *dst, loff_t dst_pos, -+ size_t len, unsigned int flags) -+{ -+ ssize_t ssz; -+ -+ lockdep_off(); -+ ssz = vfs_copy_file_range(src, src_pos, dst, dst_pos, len, flags); -+ lockdep_on(); -+ -+ return ssz; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+static inline loff_t vfsub_llseek(struct file *file, loff_t offset, int origin) -+{ -+ loff_t err; -+ -+ lockdep_off(); -+ err = vfs_llseek(file, offset, origin); -+ lockdep_on(); -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+int vfsub_sio_mkdir(struct inode *dir, struct path *path, int mode); -+int vfsub_sio_rmdir(struct inode *dir, struct path *path); -+int vfsub_sio_notify_change(struct path *path, struct iattr *ia, -+ struct inode **delegated_inode); -+int vfsub_notify_change(struct path *path, struct iattr *ia, -+ struct inode **delegated_inode); -+int vfsub_unlink(struct inode *dir, struct path *path, -+ struct inode **delegated_inode, int force); -+ -+static inline int vfsub_getattr(const struct path *path, struct kstat *st) -+{ -+ return vfs_getattr(path, st, STATX_BASIC_STATS, AT_STATX_SYNC_AS_STAT); -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+static inline int vfsub_setxattr(struct dentry *dentry, const char *name, -+ const void *value, size_t size, int flags) -+{ -+ int err; -+ -+ lockdep_off(); -+ err = vfs_setxattr(dentry, name, value, size, flags); -+ lockdep_on(); -+ -+ return err; -+} -+ -+static inline int vfsub_removexattr(struct dentry *dentry, const char *name) -+{ -+ int err; -+ -+ lockdep_off(); -+ err = vfs_removexattr(dentry, name); -+ lockdep_on(); -+ -+ return err; -+} -+ -+#endif /* __KERNEL__ */ -+#endif /* __AUFS_VFSUB_H__ */ -diff --git a/fs/aufs/wbr_policy.c b/fs/aufs/wbr_policy.c -new file mode 100644 -index 000000000000..a18045b12573 ---- /dev/null -+++ b/fs/aufs/wbr_policy.c -@@ -0,0 +1,817 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * policies for selecting one among multiple writable branches -+ */ -+ -+#include -+#include "aufs.h" -+ -+/* subset of cpup_attr() */ -+static noinline_for_stack -+int au_cpdown_attr(struct path *h_path, struct dentry *h_src) -+{ -+ int err, sbits; -+ struct iattr ia; -+ struct inode *h_isrc; -+ -+ h_isrc = d_inode(h_src); -+ ia.ia_valid = ATTR_FORCE | ATTR_MODE | ATTR_UID | ATTR_GID; -+ ia.ia_mode = h_isrc->i_mode; -+ ia.ia_uid = h_isrc->i_uid; -+ ia.ia_gid = h_isrc->i_gid; -+ sbits = !!(ia.ia_mode & (S_ISUID | S_ISGID)); -+ au_cpup_attr_flags(d_inode(h_path->dentry), h_isrc->i_flags); -+ /* no delegation since it is just created */ -+ err = vfsub_sio_notify_change(h_path, &ia, /*delegated*/NULL); -+ -+ /* is this nfs only? */ -+ if (!err && sbits && au_test_nfs(h_path->dentry->d_sb)) { -+ ia.ia_valid = ATTR_FORCE | ATTR_MODE; -+ ia.ia_mode = h_isrc->i_mode; -+ err = vfsub_sio_notify_change(h_path, &ia, /*delegated*/NULL); -+ } -+ -+ return err; -+} -+ -+#define AuCpdown_PARENT_OPQ 1 -+#define AuCpdown_WHED (1 << 1) -+#define AuCpdown_MADE_DIR (1 << 2) -+#define AuCpdown_DIROPQ (1 << 3) -+#define au_ftest_cpdown(flags, name) ((flags) & AuCpdown_##name) -+#define au_fset_cpdown(flags, name) \ -+ do { (flags) |= AuCpdown_##name; } while (0) -+#define au_fclr_cpdown(flags, name) \ -+ do { (flags) &= ~AuCpdown_##name; } while (0) -+ -+static int au_cpdown_dir_opq(struct dentry *dentry, aufs_bindex_t bdst, -+ unsigned int *flags) -+{ -+ int err; -+ struct dentry *opq_dentry; -+ -+ opq_dentry = au_diropq_create(dentry, bdst); -+ err = PTR_ERR(opq_dentry); -+ if (IS_ERR(opq_dentry)) -+ goto out; -+ dput(opq_dentry); -+ au_fset_cpdown(*flags, DIROPQ); -+ -+out: -+ return err; -+} -+ -+static int au_cpdown_dir_wh(struct dentry *dentry, struct dentry *h_parent, -+ struct inode *dir, aufs_bindex_t bdst) -+{ -+ int err; -+ struct path h_path; -+ struct au_branch *br; -+ -+ br = au_sbr(dentry->d_sb, bdst); -+ h_path.dentry = au_wh_lkup(h_parent, &dentry->d_name, br); -+ err = PTR_ERR(h_path.dentry); -+ if (IS_ERR(h_path.dentry)) -+ goto out; -+ -+ err = 0; -+ if (d_is_positive(h_path.dentry)) { -+ h_path.mnt = au_br_mnt(br); -+ err = au_wh_unlink_dentry(au_h_iptr(dir, bdst), &h_path, -+ dentry); -+ } -+ dput(h_path.dentry); -+ -+out: -+ return err; -+} -+ -+static int au_cpdown_dir(struct dentry *dentry, aufs_bindex_t bdst, -+ struct au_pin *pin, -+ struct dentry *h_parent, void *arg) -+{ -+ int err, rerr; -+ aufs_bindex_t bopq, btop; -+ struct path h_path; -+ struct dentry *parent; -+ struct inode *h_dir, *h_inode, *inode, *dir; -+ unsigned int *flags = arg; -+ -+ btop = au_dbtop(dentry); -+ /* dentry is di-locked */ -+ parent = dget_parent(dentry); -+ dir = d_inode(parent); -+ h_dir = d_inode(h_parent); -+ AuDebugOn(h_dir != au_h_iptr(dir, bdst)); -+ IMustLock(h_dir); -+ -+ err = au_lkup_neg(dentry, bdst, /*wh*/0); -+ if (unlikely(err < 0)) -+ goto out; -+ h_path.dentry = au_h_dptr(dentry, bdst); -+ h_path.mnt = au_sbr_mnt(dentry->d_sb, bdst); -+ err = vfsub_sio_mkdir(au_h_iptr(dir, bdst), &h_path, 0755); -+ if (unlikely(err)) -+ goto out_put; -+ au_fset_cpdown(*flags, MADE_DIR); -+ -+ bopq = au_dbdiropq(dentry); -+ au_fclr_cpdown(*flags, WHED); -+ au_fclr_cpdown(*flags, DIROPQ); -+ if (au_dbwh(dentry) == bdst) -+ au_fset_cpdown(*flags, WHED); -+ if (!au_ftest_cpdown(*flags, PARENT_OPQ) && bopq <= bdst) -+ au_fset_cpdown(*flags, PARENT_OPQ); -+ h_inode = d_inode(h_path.dentry); -+ inode_lock_nested(h_inode, AuLsc_I_CHILD); -+ if (au_ftest_cpdown(*flags, WHED)) { -+ err = au_cpdown_dir_opq(dentry, bdst, flags); -+ if (unlikely(err)) { -+ inode_unlock(h_inode); -+ goto out_dir; -+ } -+ } -+ -+ err = au_cpdown_attr(&h_path, au_h_dptr(dentry, btop)); -+ inode_unlock(h_inode); -+ if (unlikely(err)) -+ goto out_opq; -+ -+ if (au_ftest_cpdown(*flags, WHED)) { -+ err = au_cpdown_dir_wh(dentry, h_parent, dir, bdst); -+ if (unlikely(err)) -+ goto out_opq; -+ } -+ -+ inode = d_inode(dentry); -+ if (au_ibbot(inode) < bdst) -+ au_set_ibbot(inode, bdst); -+ au_set_h_iptr(inode, bdst, au_igrab(h_inode), -+ au_hi_flags(inode, /*isdir*/1)); -+ au_fhsm_wrote(dentry->d_sb, bdst, /*force*/0); -+ goto out; /* success */ -+ -+ /* revert */ -+out_opq: -+ if (au_ftest_cpdown(*flags, DIROPQ)) { -+ inode_lock_nested(h_inode, AuLsc_I_CHILD); -+ rerr = au_diropq_remove(dentry, bdst); -+ inode_unlock(h_inode); -+ if (unlikely(rerr)) { -+ AuIOErr("failed removing diropq for %pd b%d (%d)\n", -+ dentry, bdst, rerr); -+ err = -EIO; -+ goto out; -+ } -+ } -+out_dir: -+ if (au_ftest_cpdown(*flags, MADE_DIR)) { -+ rerr = vfsub_sio_rmdir(au_h_iptr(dir, bdst), &h_path); -+ if (unlikely(rerr)) { -+ AuIOErr("failed removing %pd b%d (%d)\n", -+ dentry, bdst, rerr); -+ err = -EIO; -+ } -+ } -+out_put: -+ au_set_h_dptr(dentry, bdst, NULL); -+ if (au_dbbot(dentry) == bdst) -+ au_update_dbbot(dentry); -+out: -+ dput(parent); -+ return err; -+} -+ -+int au_cpdown_dirs(struct dentry *dentry, aufs_bindex_t bdst) -+{ -+ int err; -+ unsigned int flags; -+ -+ flags = 0; -+ err = au_cp_dirs(dentry, bdst, au_cpdown_dir, &flags); -+ -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* policies for create */ -+ -+int au_wbr_nonopq(struct dentry *dentry, aufs_bindex_t bindex) -+{ -+ int err, i, j, ndentry; -+ aufs_bindex_t bopq; -+ struct au_dcsub_pages dpages; -+ struct au_dpage *dpage; -+ struct dentry **dentries, *parent, *d; -+ -+ err = au_dpages_init(&dpages, GFP_NOFS); -+ if (unlikely(err)) -+ goto out; -+ parent = dget_parent(dentry); -+ err = au_dcsub_pages_rev_aufs(&dpages, parent, /*do_include*/0); -+ if (unlikely(err)) -+ goto out_free; -+ -+ err = bindex; -+ for (i = 0; i < dpages.ndpage; i++) { -+ dpage = dpages.dpages + i; -+ dentries = dpage->dentries; -+ ndentry = dpage->ndentry; -+ for (j = 0; j < ndentry; j++) { -+ d = dentries[j]; -+ di_read_lock_parent2(d, !AuLock_IR); -+ bopq = au_dbdiropq(d); -+ di_read_unlock(d, !AuLock_IR); -+ if (bopq >= 0 && bopq < err) -+ err = bopq; -+ } -+ } -+ -+out_free: -+ dput(parent); -+ au_dpages_free(&dpages); -+out: -+ return err; -+} -+ -+static int au_wbr_bu(struct super_block *sb, aufs_bindex_t bindex) -+{ -+ for (; bindex >= 0; bindex--) -+ if (!au_br_rdonly(au_sbr(sb, bindex))) -+ return bindex; -+ return -EROFS; -+} -+ -+/* top down parent */ -+static int au_wbr_create_tdp(struct dentry *dentry, -+ unsigned int flags __maybe_unused) -+{ -+ int err; -+ aufs_bindex_t btop, bindex; -+ struct super_block *sb; -+ struct dentry *parent, *h_parent; -+ -+ sb = dentry->d_sb; -+ btop = au_dbtop(dentry); -+ err = btop; -+ if (!au_br_rdonly(au_sbr(sb, btop))) -+ goto out; -+ -+ err = -EROFS; -+ parent = dget_parent(dentry); -+ for (bindex = au_dbtop(parent); bindex < btop; bindex++) { -+ h_parent = au_h_dptr(parent, bindex); -+ if (!h_parent || d_is_negative(h_parent)) -+ continue; -+ -+ if (!au_br_rdonly(au_sbr(sb, bindex))) { -+ err = bindex; -+ break; -+ } -+ } -+ dput(parent); -+ -+ /* bottom up here */ -+ if (unlikely(err < 0)) { -+ err = au_wbr_bu(sb, btop - 1); -+ if (err >= 0) -+ err = au_wbr_nonopq(dentry, err); -+ } -+ -+out: -+ AuDbg("b%d\n", err); -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* an exception for the policy other than tdp */ -+static int au_wbr_create_exp(struct dentry *dentry) -+{ -+ int err; -+ aufs_bindex_t bwh, bdiropq; -+ struct dentry *parent; -+ -+ err = -1; -+ bwh = au_dbwh(dentry); -+ parent = dget_parent(dentry); -+ bdiropq = au_dbdiropq(parent); -+ if (bwh >= 0) { -+ if (bdiropq >= 0) -+ err = min(bdiropq, bwh); -+ else -+ err = bwh; -+ AuDbg("%d\n", err); -+ } else if (bdiropq >= 0) { -+ err = bdiropq; -+ AuDbg("%d\n", err); -+ } -+ dput(parent); -+ -+ if (err >= 0) -+ err = au_wbr_nonopq(dentry, err); -+ -+ if (err >= 0 && au_br_rdonly(au_sbr(dentry->d_sb, err))) -+ err = -1; -+ -+ AuDbg("%d\n", err); -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* round robin */ -+static int au_wbr_create_init_rr(struct super_block *sb) -+{ -+ int err; -+ -+ err = au_wbr_bu(sb, au_sbbot(sb)); -+ atomic_set(&au_sbi(sb)->si_wbr_rr_next, -err); /* less important */ -+ /* smp_mb(); */ -+ -+ AuDbg("b%d\n", err); -+ return err; -+} -+ -+static int au_wbr_create_rr(struct dentry *dentry, unsigned int flags) -+{ -+ int err, nbr; -+ unsigned int u; -+ aufs_bindex_t bindex, bbot; -+ struct super_block *sb; -+ atomic_t *next; -+ -+ err = au_wbr_create_exp(dentry); -+ if (err >= 0) -+ goto out; -+ -+ sb = dentry->d_sb; -+ next = &au_sbi(sb)->si_wbr_rr_next; -+ bbot = au_sbbot(sb); -+ nbr = bbot + 1; -+ for (bindex = 0; bindex <= bbot; bindex++) { -+ if (!au_ftest_wbr(flags, DIR)) { -+ err = atomic_dec_return(next) + 1; -+ /* modulo for 0 is meaningless */ -+ if (unlikely(!err)) -+ err = atomic_dec_return(next) + 1; -+ } else -+ err = atomic_read(next); -+ AuDbg("%d\n", err); -+ u = err; -+ err = u % nbr; -+ AuDbg("%d\n", err); -+ if (!au_br_rdonly(au_sbr(sb, err))) -+ break; -+ err = -EROFS; -+ } -+ -+ if (err >= 0) -+ err = au_wbr_nonopq(dentry, err); -+ -+out: -+ AuDbg("%d\n", err); -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* most free space */ -+static void au_mfs(struct dentry *dentry, struct dentry *parent) -+{ -+ struct super_block *sb; -+ struct au_branch *br; -+ struct au_wbr_mfs *mfs; -+ struct dentry *h_parent; -+ aufs_bindex_t bindex, bbot; -+ int err; -+ unsigned long long b, bavail; -+ struct path h_path; -+ /* reduce the stack usage */ -+ struct kstatfs *st; -+ -+ st = kmalloc(sizeof(*st), GFP_NOFS); -+ if (unlikely(!st)) { -+ AuWarn1("failed updating mfs(%d), ignored\n", -ENOMEM); -+ return; -+ } -+ -+ bavail = 0; -+ sb = dentry->d_sb; -+ mfs = &au_sbi(sb)->si_wbr_mfs; -+ MtxMustLock(&mfs->mfs_lock); -+ mfs->mfs_bindex = -EROFS; -+ mfs->mfsrr_bytes = 0; -+ if (!parent) { -+ bindex = 0; -+ bbot = au_sbbot(sb); -+ } else { -+ bindex = au_dbtop(parent); -+ bbot = au_dbtaildir(parent); -+ } -+ -+ for (; bindex <= bbot; bindex++) { -+ if (parent) { -+ h_parent = au_h_dptr(parent, bindex); -+ if (!h_parent || d_is_negative(h_parent)) -+ continue; -+ } -+ br = au_sbr(sb, bindex); -+ if (au_br_rdonly(br)) -+ continue; -+ -+ /* sb->s_root for NFS is unreliable */ -+ h_path.mnt = au_br_mnt(br); -+ h_path.dentry = h_path.mnt->mnt_root; -+ err = vfs_statfs(&h_path, st); -+ if (unlikely(err)) { -+ AuWarn1("failed statfs, b%d, %d\n", bindex, err); -+ continue; -+ } -+ -+ /* when the available size is equal, select the lower one */ -+ BUILD_BUG_ON(sizeof(b) < sizeof(st->f_bavail) -+ || sizeof(b) < sizeof(st->f_bsize)); -+ b = st->f_bavail * st->f_bsize; -+ br->br_wbr->wbr_bytes = b; -+ if (b >= bavail) { -+ bavail = b; -+ mfs->mfs_bindex = bindex; -+ mfs->mfs_jiffy = jiffies; -+ } -+ } -+ -+ mfs->mfsrr_bytes = bavail; -+ AuDbg("b%d\n", mfs->mfs_bindex); -+ au_kfree_rcu(st); -+} -+ -+static int au_wbr_create_mfs(struct dentry *dentry, unsigned int flags) -+{ -+ int err; -+ struct dentry *parent; -+ struct super_block *sb; -+ struct au_wbr_mfs *mfs; -+ -+ err = au_wbr_create_exp(dentry); -+ if (err >= 0) -+ goto out; -+ -+ sb = dentry->d_sb; -+ parent = NULL; -+ if (au_ftest_wbr(flags, PARENT)) -+ parent = dget_parent(dentry); -+ mfs = &au_sbi(sb)->si_wbr_mfs; -+ mutex_lock(&mfs->mfs_lock); -+ if (time_after(jiffies, mfs->mfs_jiffy + mfs->mfs_expire) -+ || mfs->mfs_bindex < 0 -+ || au_br_rdonly(au_sbr(sb, mfs->mfs_bindex))) -+ au_mfs(dentry, parent); -+ mutex_unlock(&mfs->mfs_lock); -+ err = mfs->mfs_bindex; -+ dput(parent); -+ -+ if (err >= 0) -+ err = au_wbr_nonopq(dentry, err); -+ -+out: -+ AuDbg("b%d\n", err); -+ return err; -+} -+ -+static int au_wbr_create_init_mfs(struct super_block *sb) -+{ -+ struct au_wbr_mfs *mfs; -+ -+ mfs = &au_sbi(sb)->si_wbr_mfs; -+ mutex_init(&mfs->mfs_lock); -+ mfs->mfs_jiffy = 0; -+ mfs->mfs_bindex = -EROFS; -+ -+ return 0; -+} -+ -+static int au_wbr_create_fin_mfs(struct super_block *sb __maybe_unused) -+{ -+ mutex_destroy(&au_sbi(sb)->si_wbr_mfs.mfs_lock); -+ return 0; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* top down regardless parent, and then mfs */ -+static int au_wbr_create_tdmfs(struct dentry *dentry, -+ unsigned int flags __maybe_unused) -+{ -+ int err; -+ aufs_bindex_t bwh, btail, bindex, bfound, bmfs; -+ unsigned long long watermark; -+ struct super_block *sb; -+ struct au_wbr_mfs *mfs; -+ struct au_branch *br; -+ struct dentry *parent; -+ -+ sb = dentry->d_sb; -+ mfs = &au_sbi(sb)->si_wbr_mfs; -+ mutex_lock(&mfs->mfs_lock); -+ if (time_after(jiffies, mfs->mfs_jiffy + mfs->mfs_expire) -+ || mfs->mfs_bindex < 0) -+ au_mfs(dentry, /*parent*/NULL); -+ watermark = mfs->mfsrr_watermark; -+ bmfs = mfs->mfs_bindex; -+ mutex_unlock(&mfs->mfs_lock); -+ -+ /* another style of au_wbr_create_exp() */ -+ bwh = au_dbwh(dentry); -+ parent = dget_parent(dentry); -+ btail = au_dbtaildir(parent); -+ if (bwh >= 0 && bwh < btail) -+ btail = bwh; -+ -+ err = au_wbr_nonopq(dentry, btail); -+ if (unlikely(err < 0)) -+ goto out; -+ btail = err; -+ bfound = -1; -+ for (bindex = 0; bindex <= btail; bindex++) { -+ br = au_sbr(sb, bindex); -+ if (au_br_rdonly(br)) -+ continue; -+ if (br->br_wbr->wbr_bytes > watermark) { -+ bfound = bindex; -+ break; -+ } -+ } -+ err = bfound; -+ if (err < 0) -+ err = bmfs; -+ -+out: -+ dput(parent); -+ AuDbg("b%d\n", err); -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* most free space and then round robin */ -+static int au_wbr_create_mfsrr(struct dentry *dentry, unsigned int flags) -+{ -+ int err; -+ struct au_wbr_mfs *mfs; -+ -+ err = au_wbr_create_mfs(dentry, flags); -+ if (err >= 0) { -+ mfs = &au_sbi(dentry->d_sb)->si_wbr_mfs; -+ mutex_lock(&mfs->mfs_lock); -+ if (mfs->mfsrr_bytes < mfs->mfsrr_watermark) -+ err = au_wbr_create_rr(dentry, flags); -+ mutex_unlock(&mfs->mfs_lock); -+ } -+ -+ AuDbg("b%d\n", err); -+ return err; -+} -+ -+static int au_wbr_create_init_mfsrr(struct super_block *sb) -+{ -+ int err; -+ -+ au_wbr_create_init_mfs(sb); /* ignore */ -+ err = au_wbr_create_init_rr(sb); -+ -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* top down parent and most free space */ -+static int au_wbr_create_pmfs(struct dentry *dentry, unsigned int flags) -+{ -+ int err, e2; -+ unsigned long long b; -+ aufs_bindex_t bindex, btop, bbot; -+ struct super_block *sb; -+ struct dentry *parent, *h_parent; -+ struct au_branch *br; -+ -+ err = au_wbr_create_tdp(dentry, flags); -+ if (unlikely(err < 0)) -+ goto out; -+ parent = dget_parent(dentry); -+ btop = au_dbtop(parent); -+ bbot = au_dbtaildir(parent); -+ if (btop == bbot) -+ goto out_parent; /* success */ -+ -+ e2 = au_wbr_create_mfs(dentry, flags); -+ if (e2 < 0) -+ goto out_parent; /* success */ -+ -+ /* when the available size is equal, select upper one */ -+ sb = dentry->d_sb; -+ br = au_sbr(sb, err); -+ b = br->br_wbr->wbr_bytes; -+ AuDbg("b%d, %llu\n", err, b); -+ -+ for (bindex = btop; bindex <= bbot; bindex++) { -+ h_parent = au_h_dptr(parent, bindex); -+ if (!h_parent || d_is_negative(h_parent)) -+ continue; -+ -+ br = au_sbr(sb, bindex); -+ if (!au_br_rdonly(br) && br->br_wbr->wbr_bytes > b) { -+ b = br->br_wbr->wbr_bytes; -+ err = bindex; -+ AuDbg("b%d, %llu\n", err, b); -+ } -+ } -+ -+ if (err >= 0) -+ err = au_wbr_nonopq(dentry, err); -+ -+out_parent: -+ dput(parent); -+out: -+ AuDbg("b%d\n", err); -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* -+ * - top down parent -+ * - most free space with parent -+ * - most free space round-robin regardless parent -+ */ -+static int au_wbr_create_pmfsrr(struct dentry *dentry, unsigned int flags) -+{ -+ int err; -+ unsigned long long watermark; -+ struct super_block *sb; -+ struct au_branch *br; -+ struct au_wbr_mfs *mfs; -+ -+ err = au_wbr_create_pmfs(dentry, flags | AuWbr_PARENT); -+ if (unlikely(err < 0)) -+ goto out; -+ -+ sb = dentry->d_sb; -+ br = au_sbr(sb, err); -+ mfs = &au_sbi(sb)->si_wbr_mfs; -+ mutex_lock(&mfs->mfs_lock); -+ watermark = mfs->mfsrr_watermark; -+ mutex_unlock(&mfs->mfs_lock); -+ if (br->br_wbr->wbr_bytes < watermark) -+ /* regardless the parent dir */ -+ err = au_wbr_create_mfsrr(dentry, flags); -+ -+out: -+ AuDbg("b%d\n", err); -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* policies for copyup */ -+ -+/* top down parent */ -+static int au_wbr_copyup_tdp(struct dentry *dentry) -+{ -+ return au_wbr_create_tdp(dentry, /*flags, anything is ok*/0); -+} -+ -+/* bottom up parent */ -+static int au_wbr_copyup_bup(struct dentry *dentry) -+{ -+ int err; -+ aufs_bindex_t bindex, btop; -+ struct dentry *parent, *h_parent; -+ struct super_block *sb; -+ -+ err = -EROFS; -+ sb = dentry->d_sb; -+ parent = dget_parent(dentry); -+ btop = au_dbtop(parent); -+ for (bindex = au_dbtop(dentry); bindex >= btop; bindex--) { -+ h_parent = au_h_dptr(parent, bindex); -+ if (!h_parent || d_is_negative(h_parent)) -+ continue; -+ -+ if (!au_br_rdonly(au_sbr(sb, bindex))) { -+ err = bindex; -+ break; -+ } -+ } -+ dput(parent); -+ -+ /* bottom up here */ -+ if (unlikely(err < 0)) -+ err = au_wbr_bu(sb, btop - 1); -+ -+ AuDbg("b%d\n", err); -+ return err; -+} -+ -+/* bottom up */ -+int au_wbr_do_copyup_bu(struct dentry *dentry, aufs_bindex_t btop) -+{ -+ int err; -+ -+ err = au_wbr_bu(dentry->d_sb, btop); -+ AuDbg("b%d\n", err); -+ if (err > btop) -+ err = au_wbr_nonopq(dentry, err); -+ -+ AuDbg("b%d\n", err); -+ return err; -+} -+ -+static int au_wbr_copyup_bu(struct dentry *dentry) -+{ -+ int err; -+ aufs_bindex_t btop; -+ -+ btop = au_dbtop(dentry); -+ err = au_wbr_do_copyup_bu(dentry, btop); -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+struct au_wbr_copyup_operations au_wbr_copyup_ops[] = { -+ [AuWbrCopyup_TDP] = { -+ .copyup = au_wbr_copyup_tdp -+ }, -+ [AuWbrCopyup_BUP] = { -+ .copyup = au_wbr_copyup_bup -+ }, -+ [AuWbrCopyup_BU] = { -+ .copyup = au_wbr_copyup_bu -+ } -+}; -+ -+struct au_wbr_create_operations au_wbr_create_ops[] = { -+ [AuWbrCreate_TDP] = { -+ .create = au_wbr_create_tdp -+ }, -+ [AuWbrCreate_RR] = { -+ .create = au_wbr_create_rr, -+ .init = au_wbr_create_init_rr -+ }, -+ [AuWbrCreate_MFS] = { -+ .create = au_wbr_create_mfs, -+ .init = au_wbr_create_init_mfs, -+ .fin = au_wbr_create_fin_mfs -+ }, -+ [AuWbrCreate_MFSV] = { -+ .create = au_wbr_create_mfs, -+ .init = au_wbr_create_init_mfs, -+ .fin = au_wbr_create_fin_mfs -+ }, -+ [AuWbrCreate_MFSRR] = { -+ .create = au_wbr_create_mfsrr, -+ .init = au_wbr_create_init_mfsrr, -+ .fin = au_wbr_create_fin_mfs -+ }, -+ [AuWbrCreate_MFSRRV] = { -+ .create = au_wbr_create_mfsrr, -+ .init = au_wbr_create_init_mfsrr, -+ .fin = au_wbr_create_fin_mfs -+ }, -+ [AuWbrCreate_TDMFS] = { -+ .create = au_wbr_create_tdmfs, -+ .init = au_wbr_create_init_mfs, -+ .fin = au_wbr_create_fin_mfs -+ }, -+ [AuWbrCreate_TDMFSV] = { -+ .create = au_wbr_create_tdmfs, -+ .init = au_wbr_create_init_mfs, -+ .fin = au_wbr_create_fin_mfs -+ }, -+ [AuWbrCreate_PMFS] = { -+ .create = au_wbr_create_pmfs, -+ .init = au_wbr_create_init_mfs, -+ .fin = au_wbr_create_fin_mfs -+ }, -+ [AuWbrCreate_PMFSV] = { -+ .create = au_wbr_create_pmfs, -+ .init = au_wbr_create_init_mfs, -+ .fin = au_wbr_create_fin_mfs -+ }, -+ [AuWbrCreate_PMFSRR] = { -+ .create = au_wbr_create_pmfsrr, -+ .init = au_wbr_create_init_mfsrr, -+ .fin = au_wbr_create_fin_mfs -+ }, -+ [AuWbrCreate_PMFSRRV] = { -+ .create = au_wbr_create_pmfsrr, -+ .init = au_wbr_create_init_mfsrr, -+ .fin = au_wbr_create_fin_mfs -+ } -+}; -diff --git a/fs/aufs/whout.c b/fs/aufs/whout.c -new file mode 100644 -index 000000000000..9363954c4b06 ---- /dev/null -+++ b/fs/aufs/whout.c -@@ -0,0 +1,1049 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * whiteout for logical deletion and opaque directory -+ */ -+ -+#include "aufs.h" -+ -+#define WH_MASK 0444 -+ -+/* -+ * If a directory contains this file, then it is opaque. We start with the -+ * .wh. flag so that it is blocked by lookup. -+ */ -+static struct qstr diropq_name = QSTR_INIT(AUFS_WH_DIROPQ, -+ sizeof(AUFS_WH_DIROPQ) - 1); -+ -+/* -+ * generate whiteout name, which is NOT terminated by NULL. -+ * @name: original d_name.name -+ * @len: original d_name.len -+ * @wh: whiteout qstr -+ * returns zero when succeeds, otherwise error. -+ * succeeded value as wh->name should be freed by kfree(). -+ */ -+int au_wh_name_alloc(struct qstr *wh, const struct qstr *name) -+{ -+ char *p; -+ -+ if (unlikely(name->len > PATH_MAX - AUFS_WH_PFX_LEN)) -+ return -ENAMETOOLONG; -+ -+ wh->len = name->len + AUFS_WH_PFX_LEN; -+ p = kmalloc(wh->len, GFP_NOFS); -+ wh->name = p; -+ if (p) { -+ memcpy(p, AUFS_WH_PFX, AUFS_WH_PFX_LEN); -+ memcpy(p + AUFS_WH_PFX_LEN, name->name, name->len); -+ /* smp_mb(); */ -+ return 0; -+ } -+ return -ENOMEM; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* -+ * test if the @wh_name exists under @h_parent. -+ * @try_sio specifies the necessary of super-io. -+ */ -+int au_wh_test(struct dentry *h_parent, struct qstr *wh_name, int try_sio) -+{ -+ int err; -+ struct dentry *wh_dentry; -+ -+ if (!try_sio) -+ wh_dentry = vfsub_lkup_one(wh_name, h_parent); -+ else -+ wh_dentry = au_sio_lkup_one(wh_name, h_parent); -+ err = PTR_ERR(wh_dentry); -+ if (IS_ERR(wh_dentry)) { -+ if (err == -ENAMETOOLONG) -+ err = 0; -+ goto out; -+ } -+ -+ err = 0; -+ if (d_is_negative(wh_dentry)) -+ goto out_wh; /* success */ -+ -+ err = 1; -+ if (d_is_reg(wh_dentry)) -+ goto out_wh; /* success */ -+ -+ err = -EIO; -+ AuIOErr("%pd Invalid whiteout entry type 0%o.\n", -+ wh_dentry, d_inode(wh_dentry)->i_mode); -+ -+out_wh: -+ dput(wh_dentry); -+out: -+ return err; -+} -+ -+/* -+ * test if the @h_dentry sets opaque or not. -+ */ -+int au_diropq_test(struct dentry *h_dentry) -+{ -+ int err; -+ struct inode *h_dir; -+ -+ h_dir = d_inode(h_dentry); -+ err = au_wh_test(h_dentry, &diropq_name, -+ au_test_h_perm_sio(h_dir, MAY_EXEC)); -+ return err; -+} -+ -+/* -+ * returns a negative dentry whose name is unique and temporary. -+ */ -+struct dentry *au_whtmp_lkup(struct dentry *h_parent, struct au_branch *br, -+ struct qstr *prefix) -+{ -+ struct dentry *dentry; -+ int i; -+ char defname[NAME_MAX - AUFS_MAX_NAMELEN + DNAME_INLINE_LEN + 1], -+ *name, *p; -+ /* strict atomic_t is unnecessary here */ -+ static unsigned short cnt; -+ struct qstr qs; -+ -+ BUILD_BUG_ON(sizeof(cnt) * 2 > AUFS_WH_TMP_LEN); -+ -+ name = defname; -+ qs.len = sizeof(defname) - DNAME_INLINE_LEN + prefix->len - 1; -+ if (unlikely(prefix->len > DNAME_INLINE_LEN)) { -+ dentry = ERR_PTR(-ENAMETOOLONG); -+ if (unlikely(qs.len > NAME_MAX)) -+ goto out; -+ dentry = ERR_PTR(-ENOMEM); -+ name = kmalloc(qs.len + 1, GFP_NOFS); -+ if (unlikely(!name)) -+ goto out; -+ } -+ -+ /* doubly whiteout-ed */ -+ memcpy(name, AUFS_WH_PFX AUFS_WH_PFX, AUFS_WH_PFX_LEN * 2); -+ p = name + AUFS_WH_PFX_LEN * 2; -+ memcpy(p, prefix->name, prefix->len); -+ p += prefix->len; -+ *p++ = '.'; -+ AuDebugOn(name + qs.len + 1 - p <= AUFS_WH_TMP_LEN); -+ -+ qs.name = name; -+ for (i = 0; i < 3; i++) { -+ sprintf(p, "%.*x", AUFS_WH_TMP_LEN, cnt++); -+ dentry = au_sio_lkup_one(&qs, h_parent); -+ if (IS_ERR(dentry) || d_is_negative(dentry)) -+ goto out_name; -+ dput(dentry); -+ } -+ /* pr_warn("could not get random name\n"); */ -+ dentry = ERR_PTR(-EEXIST); -+ AuDbg("%.*s\n", AuLNPair(&qs)); -+ BUG(); -+ -+out_name: -+ if (name != defname) -+ au_kfree_try_rcu(name); -+out: -+ AuTraceErrPtr(dentry); -+ return dentry; -+} -+ -+/* -+ * rename the @h_dentry on @br to the whiteouted temporary name. -+ */ -+int au_whtmp_ren(struct dentry *h_dentry, struct au_branch *br) -+{ -+ int err; -+ struct path h_path = { -+ .mnt = au_br_mnt(br) -+ }; -+ struct inode *h_dir, *delegated; -+ struct dentry *h_parent; -+ -+ h_parent = h_dentry->d_parent; /* dir inode is locked */ -+ h_dir = d_inode(h_parent); -+ IMustLock(h_dir); -+ -+ h_path.dentry = au_whtmp_lkup(h_parent, br, &h_dentry->d_name); -+ err = PTR_ERR(h_path.dentry); -+ if (IS_ERR(h_path.dentry)) -+ goto out; -+ -+ /* under the same dir, no need to lock_rename() */ -+ delegated = NULL; -+ err = vfsub_rename(h_dir, h_dentry, h_dir, &h_path, &delegated, -+ /*flags*/0); -+ AuTraceErr(err); -+ if (unlikely(err == -EWOULDBLOCK)) { -+ pr_warn("cannot retry for NFSv4 delegation" -+ " for an internal rename\n"); -+ iput(delegated); -+ } -+ dput(h_path.dentry); -+ -+out: -+ AuTraceErr(err); -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+/* -+ * functions for removing a whiteout -+ */ -+ -+static int do_unlink_wh(struct inode *h_dir, struct path *h_path) -+{ -+ int err, force; -+ struct inode *delegated; -+ -+ /* -+ * forces superio when the dir has a sticky bit. -+ * this may be a violation of unix fs semantics. -+ */ -+ force = (h_dir->i_mode & S_ISVTX) -+ && !uid_eq(current_fsuid(), d_inode(h_path->dentry)->i_uid); -+ delegated = NULL; -+ err = vfsub_unlink(h_dir, h_path, &delegated, force); -+ if (unlikely(err == -EWOULDBLOCK)) { -+ pr_warn("cannot retry for NFSv4 delegation" -+ " for an internal unlink\n"); -+ iput(delegated); -+ } -+ return err; -+} -+ -+int au_wh_unlink_dentry(struct inode *h_dir, struct path *h_path, -+ struct dentry *dentry) -+{ -+ int err; -+ -+ err = do_unlink_wh(h_dir, h_path); -+ if (!err && dentry) -+ au_set_dbwh(dentry, -1); -+ -+ return err; -+} -+ -+static int unlink_wh_name(struct dentry *h_parent, struct qstr *wh, -+ struct au_branch *br) -+{ -+ int err; -+ struct path h_path = { -+ .mnt = au_br_mnt(br) -+ }; -+ -+ err = 0; -+ h_path.dentry = vfsub_lkup_one(wh, h_parent); -+ if (IS_ERR(h_path.dentry)) -+ err = PTR_ERR(h_path.dentry); -+ else { -+ if (d_is_reg(h_path.dentry)) -+ err = do_unlink_wh(d_inode(h_parent), &h_path); -+ dput(h_path.dentry); -+ } -+ -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+/* -+ * initialize/clean whiteout for a branch -+ */ -+ -+static void au_wh_clean(struct inode *h_dir, struct path *whpath, -+ const int isdir) -+{ -+ int err; -+ struct inode *delegated; -+ -+ if (d_is_negative(whpath->dentry)) -+ return; -+ -+ if (isdir) -+ err = vfsub_rmdir(h_dir, whpath); -+ else { -+ delegated = NULL; -+ err = vfsub_unlink(h_dir, whpath, &delegated, /*force*/0); -+ if (unlikely(err == -EWOULDBLOCK)) { -+ pr_warn("cannot retry for NFSv4 delegation" -+ " for an internal unlink\n"); -+ iput(delegated); -+ } -+ } -+ if (unlikely(err)) -+ pr_warn("failed removing %pd (%d), ignored.\n", -+ whpath->dentry, err); -+} -+ -+static int test_linkable(struct dentry *h_root) -+{ -+ struct inode *h_dir = d_inode(h_root); -+ -+ if (h_dir->i_op->link) -+ return 0; -+ -+ pr_err("%pd (%s) doesn't support link(2), use noplink and rw+nolwh\n", -+ h_root, au_sbtype(h_root->d_sb)); -+ return -ENOSYS; /* the branch doesn't have its ->link() */ -+} -+ -+/* todo: should this mkdir be done in /sbin/mount.aufs helper? */ -+static int au_whdir(struct inode *h_dir, struct path *path) -+{ -+ int err; -+ -+ err = -EEXIST; -+ if (d_is_negative(path->dentry)) { -+ int mode = 0700; -+ -+ if (au_test_nfs(path->dentry->d_sb)) -+ mode |= 0111; -+ err = vfsub_mkdir(h_dir, path, mode); -+ } else if (d_is_dir(path->dentry)) -+ err = 0; -+ else -+ pr_err("unknown %pd exists\n", path->dentry); -+ -+ return err; -+} -+ -+struct au_wh_base { -+ const struct qstr *name; -+ struct dentry *dentry; -+}; -+ -+static void au_wh_init_ro(struct inode *h_dir, struct au_wh_base base[], -+ struct path *h_path) -+{ -+ h_path->dentry = base[AuBrWh_BASE].dentry; -+ au_wh_clean(h_dir, h_path, /*isdir*/0); -+ h_path->dentry = base[AuBrWh_PLINK].dentry; -+ au_wh_clean(h_dir, h_path, /*isdir*/1); -+ h_path->dentry = base[AuBrWh_ORPH].dentry; -+ au_wh_clean(h_dir, h_path, /*isdir*/1); -+} -+ -+/* -+ * returns tri-state, -+ * minus: error, caller should print the message -+ * zero: success -+ * plus: error, caller should NOT print the message -+ */ -+static int au_wh_init_rw_nolink(struct dentry *h_root, struct au_wbr *wbr, -+ int do_plink, struct au_wh_base base[], -+ struct path *h_path) -+{ -+ int err; -+ struct inode *h_dir; -+ -+ h_dir = d_inode(h_root); -+ h_path->dentry = base[AuBrWh_BASE].dentry; -+ au_wh_clean(h_dir, h_path, /*isdir*/0); -+ h_path->dentry = base[AuBrWh_PLINK].dentry; -+ if (do_plink) { -+ err = test_linkable(h_root); -+ if (unlikely(err)) { -+ err = 1; -+ goto out; -+ } -+ -+ err = au_whdir(h_dir, h_path); -+ if (unlikely(err)) -+ goto out; -+ wbr->wbr_plink = dget(base[AuBrWh_PLINK].dentry); -+ } else -+ au_wh_clean(h_dir, h_path, /*isdir*/1); -+ h_path->dentry = base[AuBrWh_ORPH].dentry; -+ err = au_whdir(h_dir, h_path); -+ if (unlikely(err)) -+ goto out; -+ wbr->wbr_orph = dget(base[AuBrWh_ORPH].dentry); -+ -+out: -+ return err; -+} -+ -+/* -+ * for the moment, aufs supports the branch filesystem which does not support -+ * link(2). testing on FAT which does not support i_op->setattr() fully either, -+ * copyup failed. finally, such filesystem will not be used as the writable -+ * branch. -+ * -+ * returns tri-state, see above. -+ */ -+static int au_wh_init_rw(struct dentry *h_root, struct au_wbr *wbr, -+ int do_plink, struct au_wh_base base[], -+ struct path *h_path) -+{ -+ int err; -+ struct inode *h_dir; -+ -+ WbrWhMustWriteLock(wbr); -+ -+ err = test_linkable(h_root); -+ if (unlikely(err)) { -+ err = 1; -+ goto out; -+ } -+ -+ /* -+ * todo: should this create be done in /sbin/mount.aufs helper? -+ */ -+ err = -EEXIST; -+ h_dir = d_inode(h_root); -+ if (d_is_negative(base[AuBrWh_BASE].dentry)) { -+ h_path->dentry = base[AuBrWh_BASE].dentry; -+ err = vfsub_create(h_dir, h_path, WH_MASK, /*want_excl*/true); -+ } else if (d_is_reg(base[AuBrWh_BASE].dentry)) -+ err = 0; -+ else -+ pr_err("unknown %pd2 exists\n", base[AuBrWh_BASE].dentry); -+ if (unlikely(err)) -+ goto out; -+ -+ h_path->dentry = base[AuBrWh_PLINK].dentry; -+ if (do_plink) { -+ err = au_whdir(h_dir, h_path); -+ if (unlikely(err)) -+ goto out; -+ wbr->wbr_plink = dget(base[AuBrWh_PLINK].dentry); -+ } else -+ au_wh_clean(h_dir, h_path, /*isdir*/1); -+ wbr->wbr_whbase = dget(base[AuBrWh_BASE].dentry); -+ -+ h_path->dentry = base[AuBrWh_ORPH].dentry; -+ err = au_whdir(h_dir, h_path); -+ if (unlikely(err)) -+ goto out; -+ wbr->wbr_orph = dget(base[AuBrWh_ORPH].dentry); -+ -+out: -+ return err; -+} -+ -+/* -+ * initialize the whiteout base file/dir for @br. -+ */ -+int au_wh_init(struct au_branch *br, struct super_block *sb) -+{ -+ int err, i; -+ const unsigned char do_plink -+ = !!au_opt_test(au_mntflags(sb), PLINK); -+ struct inode *h_dir; -+ struct path path = br->br_path; -+ struct dentry *h_root = path.dentry; -+ struct au_wbr *wbr = br->br_wbr; -+ static const struct qstr base_name[] = { -+ [AuBrWh_BASE] = QSTR_INIT(AUFS_BASE_NAME, -+ sizeof(AUFS_BASE_NAME) - 1), -+ [AuBrWh_PLINK] = QSTR_INIT(AUFS_PLINKDIR_NAME, -+ sizeof(AUFS_PLINKDIR_NAME) - 1), -+ [AuBrWh_ORPH] = QSTR_INIT(AUFS_ORPHDIR_NAME, -+ sizeof(AUFS_ORPHDIR_NAME) - 1) -+ }; -+ struct au_wh_base base[] = { -+ [AuBrWh_BASE] = { -+ .name = base_name + AuBrWh_BASE, -+ .dentry = NULL -+ }, -+ [AuBrWh_PLINK] = { -+ .name = base_name + AuBrWh_PLINK, -+ .dentry = NULL -+ }, -+ [AuBrWh_ORPH] = { -+ .name = base_name + AuBrWh_ORPH, -+ .dentry = NULL -+ } -+ }; -+ -+ if (wbr) -+ WbrWhMustWriteLock(wbr); -+ -+ for (i = 0; i < AuBrWh_Last; i++) { -+ /* doubly whiteouted */ -+ struct dentry *d; -+ -+ d = au_wh_lkup(h_root, (void *)base[i].name, br); -+ err = PTR_ERR(d); -+ if (IS_ERR(d)) -+ goto out; -+ -+ base[i].dentry = d; -+ AuDebugOn(wbr -+ && wbr->wbr_wh[i] -+ && wbr->wbr_wh[i] != base[i].dentry); -+ } -+ -+ if (wbr) -+ for (i = 0; i < AuBrWh_Last; i++) { -+ dput(wbr->wbr_wh[i]); -+ wbr->wbr_wh[i] = NULL; -+ } -+ -+ err = 0; -+ if (!au_br_writable(br->br_perm)) { -+ h_dir = d_inode(h_root); -+ au_wh_init_ro(h_dir, base, &path); -+ } else if (!au_br_wh_linkable(br->br_perm)) { -+ err = au_wh_init_rw_nolink(h_root, wbr, do_plink, base, &path); -+ if (err > 0) -+ goto out; -+ else if (err) -+ goto out_err; -+ } else { -+ err = au_wh_init_rw(h_root, wbr, do_plink, base, &path); -+ if (err > 0) -+ goto out; -+ else if (err) -+ goto out_err; -+ } -+ goto out; /* success */ -+ -+out_err: -+ pr_err("an error(%d) on the writable branch %pd(%s)\n", -+ err, h_root, au_sbtype(h_root->d_sb)); -+out: -+ for (i = 0; i < AuBrWh_Last; i++) -+ dput(base[i].dentry); -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+/* -+ * whiteouts are all hard-linked usually. -+ * when its link count reaches a ceiling, we create a new whiteout base -+ * asynchronously. -+ */ -+ -+struct reinit_br_wh { -+ struct super_block *sb; -+ struct au_branch *br; -+}; -+ -+static void reinit_br_wh(void *arg) -+{ -+ int err; -+ aufs_bindex_t bindex; -+ struct path h_path; -+ struct reinit_br_wh *a = arg; -+ struct au_wbr *wbr; -+ struct inode *dir, *delegated; -+ struct dentry *h_root; -+ struct au_hinode *hdir; -+ -+ err = 0; -+ wbr = a->br->br_wbr; -+ /* big aufs lock */ -+ si_noflush_write_lock(a->sb); -+ if (!au_br_writable(a->br->br_perm)) -+ goto out; -+ bindex = au_br_index(a->sb, a->br->br_id); -+ if (unlikely(bindex < 0)) -+ goto out; -+ -+ di_read_lock_parent(a->sb->s_root, AuLock_IR); -+ dir = d_inode(a->sb->s_root); -+ hdir = au_hi(dir, bindex); -+ h_root = au_h_dptr(a->sb->s_root, bindex); -+ AuDebugOn(h_root != au_br_dentry(a->br)); -+ -+ au_hn_inode_lock_nested(hdir, AuLsc_I_PARENT); -+ wbr_wh_write_lock(wbr); -+ err = au_h_verify(wbr->wbr_whbase, au_opt_udba(a->sb), hdir->hi_inode, -+ h_root, a->br); -+ if (!err) { -+ h_path.dentry = wbr->wbr_whbase; -+ h_path.mnt = au_br_mnt(a->br); -+ delegated = NULL; -+ err = vfsub_unlink(hdir->hi_inode, &h_path, &delegated, -+ /*force*/0); -+ if (unlikely(err == -EWOULDBLOCK)) { -+ pr_warn("cannot retry for NFSv4 delegation" -+ " for an internal unlink\n"); -+ iput(delegated); -+ } -+ } else { -+ pr_warn("%pd is moved, ignored\n", wbr->wbr_whbase); -+ err = 0; -+ } -+ dput(wbr->wbr_whbase); -+ wbr->wbr_whbase = NULL; -+ if (!err) -+ err = au_wh_init(a->br, a->sb); -+ wbr_wh_write_unlock(wbr); -+ au_hn_inode_unlock(hdir); -+ di_read_unlock(a->sb->s_root, AuLock_IR); -+ if (!err) -+ au_fhsm_wrote(a->sb, bindex, /*force*/0); -+ -+out: -+ if (wbr) -+ atomic_dec(&wbr->wbr_wh_running); -+ au_lcnt_dec(&a->br->br_count); -+ si_write_unlock(a->sb); -+ au_nwt_done(&au_sbi(a->sb)->si_nowait); -+ au_kfree_rcu(a); -+ if (unlikely(err)) -+ AuIOErr("err %d\n", err); -+} -+ -+static void kick_reinit_br_wh(struct super_block *sb, struct au_branch *br) -+{ -+ int do_dec, wkq_err; -+ struct reinit_br_wh *arg; -+ -+ do_dec = 1; -+ if (atomic_inc_return(&br->br_wbr->wbr_wh_running) != 1) -+ goto out; -+ -+ /* ignore ENOMEM */ -+ arg = kmalloc(sizeof(*arg), GFP_NOFS); -+ if (arg) { -+ /* -+ * dec(wh_running), kfree(arg) and dec(br_count) -+ * in reinit function -+ */ -+ arg->sb = sb; -+ arg->br = br; -+ au_lcnt_inc(&br->br_count); -+ wkq_err = au_wkq_nowait(reinit_br_wh, arg, sb, /*flags*/0); -+ if (unlikely(wkq_err)) { -+ atomic_dec(&br->br_wbr->wbr_wh_running); -+ au_lcnt_dec(&br->br_count); -+ au_kfree_rcu(arg); -+ } -+ do_dec = 0; -+ } -+ -+out: -+ if (do_dec) -+ atomic_dec(&br->br_wbr->wbr_wh_running); -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* -+ * create the whiteout @wh. -+ */ -+static int link_or_create_wh(struct super_block *sb, aufs_bindex_t bindex, -+ struct dentry *wh) -+{ -+ int err; -+ struct path h_path = { -+ .dentry = wh -+ }; -+ struct au_branch *br; -+ struct au_wbr *wbr; -+ struct dentry *h_parent; -+ struct inode *h_dir, *delegated; -+ -+ h_parent = wh->d_parent; /* dir inode is locked */ -+ h_dir = d_inode(h_parent); -+ IMustLock(h_dir); -+ -+ br = au_sbr(sb, bindex); -+ h_path.mnt = au_br_mnt(br); -+ wbr = br->br_wbr; -+ wbr_wh_read_lock(wbr); -+ if (wbr->wbr_whbase) { -+ delegated = NULL; -+ err = vfsub_link(wbr->wbr_whbase, h_dir, &h_path, &delegated); -+ if (unlikely(err == -EWOULDBLOCK)) { -+ pr_warn("cannot retry for NFSv4 delegation" -+ " for an internal link\n"); -+ iput(delegated); -+ } -+ if (!err || err != -EMLINK) -+ goto out; -+ -+ /* link count full. re-initialize br_whbase. */ -+ kick_reinit_br_wh(sb, br); -+ } -+ -+ /* return this error in this context */ -+ err = vfsub_create(h_dir, &h_path, WH_MASK, /*want_excl*/true); -+ if (!err) -+ au_fhsm_wrote(sb, bindex, /*force*/0); -+ -+out: -+ wbr_wh_read_unlock(wbr); -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* -+ * create or remove the diropq. -+ */ -+static struct dentry *do_diropq(struct dentry *dentry, aufs_bindex_t bindex, -+ unsigned int flags) -+{ -+ struct dentry *opq_dentry, *h_dentry; -+ struct super_block *sb; -+ struct au_branch *br; -+ int err; -+ -+ sb = dentry->d_sb; -+ br = au_sbr(sb, bindex); -+ h_dentry = au_h_dptr(dentry, bindex); -+ opq_dentry = vfsub_lkup_one(&diropq_name, h_dentry); -+ if (IS_ERR(opq_dentry)) -+ goto out; -+ -+ if (au_ftest_diropq(flags, CREATE)) { -+ err = link_or_create_wh(sb, bindex, opq_dentry); -+ if (!err) { -+ au_set_dbdiropq(dentry, bindex); -+ goto out; /* success */ -+ } -+ } else { -+ struct path tmp = { -+ .dentry = opq_dentry, -+ .mnt = au_br_mnt(br) -+ }; -+ err = do_unlink_wh(au_h_iptr(d_inode(dentry), bindex), &tmp); -+ if (!err) -+ au_set_dbdiropq(dentry, -1); -+ } -+ dput(opq_dentry); -+ opq_dentry = ERR_PTR(err); -+ -+out: -+ return opq_dentry; -+} -+ -+struct do_diropq_args { -+ struct dentry **errp; -+ struct dentry *dentry; -+ aufs_bindex_t bindex; -+ unsigned int flags; -+}; -+ -+static void call_do_diropq(void *args) -+{ -+ struct do_diropq_args *a = args; -+ *a->errp = do_diropq(a->dentry, a->bindex, a->flags); -+} -+ -+struct dentry *au_diropq_sio(struct dentry *dentry, aufs_bindex_t bindex, -+ unsigned int flags) -+{ -+ struct dentry *diropq, *h_dentry; -+ -+ h_dentry = au_h_dptr(dentry, bindex); -+ if (!au_test_h_perm_sio(d_inode(h_dentry), MAY_EXEC | MAY_WRITE)) -+ diropq = do_diropq(dentry, bindex, flags); -+ else { -+ int wkq_err; -+ struct do_diropq_args args = { -+ .errp = &diropq, -+ .dentry = dentry, -+ .bindex = bindex, -+ .flags = flags -+ }; -+ -+ wkq_err = au_wkq_wait(call_do_diropq, &args); -+ if (unlikely(wkq_err)) -+ diropq = ERR_PTR(wkq_err); -+ } -+ -+ return diropq; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* -+ * lookup whiteout dentry. -+ * @h_parent: lower parent dentry which must exist and be locked -+ * @base_name: name of dentry which will be whiteouted -+ * returns dentry for whiteout. -+ */ -+struct dentry *au_wh_lkup(struct dentry *h_parent, struct qstr *base_name, -+ struct au_branch *br) -+{ -+ int err; -+ struct qstr wh_name; -+ struct dentry *wh_dentry; -+ -+ err = au_wh_name_alloc(&wh_name, base_name); -+ wh_dentry = ERR_PTR(err); -+ if (!err) { -+ wh_dentry = vfsub_lkup_one(&wh_name, h_parent); -+ au_kfree_try_rcu(wh_name.name); -+ } -+ return wh_dentry; -+} -+ -+/* -+ * link/create a whiteout for @dentry on @bindex. -+ */ -+struct dentry *au_wh_create(struct dentry *dentry, aufs_bindex_t bindex, -+ struct dentry *h_parent) -+{ -+ struct dentry *wh_dentry; -+ struct super_block *sb; -+ int err; -+ -+ sb = dentry->d_sb; -+ wh_dentry = au_wh_lkup(h_parent, &dentry->d_name, au_sbr(sb, bindex)); -+ if (!IS_ERR(wh_dentry) && d_is_negative(wh_dentry)) { -+ err = link_or_create_wh(sb, bindex, wh_dentry); -+ if (!err) { -+ au_set_dbwh(dentry, bindex); -+ au_fhsm_wrote(sb, bindex, /*force*/0); -+ } else { -+ dput(wh_dentry); -+ wh_dentry = ERR_PTR(err); -+ } -+ } -+ -+ return wh_dentry; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* Delete all whiteouts in this directory on branch bindex. */ -+static int del_wh_children(struct dentry *h_dentry, struct au_nhash *whlist, -+ aufs_bindex_t bindex, struct au_branch *br) -+{ -+ int err; -+ unsigned long ul, n; -+ struct qstr wh_name; -+ char *p; -+ struct hlist_head *head; -+ struct au_vdir_wh *pos; -+ struct au_vdir_destr *str; -+ -+ err = -ENOMEM; -+ p = (void *)__get_free_page(GFP_NOFS); -+ wh_name.name = p; -+ if (unlikely(!wh_name.name)) -+ goto out; -+ -+ err = 0; -+ memcpy(p, AUFS_WH_PFX, AUFS_WH_PFX_LEN); -+ p += AUFS_WH_PFX_LEN; -+ n = whlist->nh_num; -+ head = whlist->nh_head; -+ for (ul = 0; !err && ul < n; ul++, head++) { -+ hlist_for_each_entry(pos, head, wh_hash) { -+ if (pos->wh_bindex != bindex) -+ continue; -+ -+ str = &pos->wh_str; -+ if (str->len + AUFS_WH_PFX_LEN <= PATH_MAX) { -+ memcpy(p, str->name, str->len); -+ wh_name.len = AUFS_WH_PFX_LEN + str->len; -+ err = unlink_wh_name(h_dentry, &wh_name, br); -+ if (!err) -+ continue; -+ break; -+ } -+ AuIOErr("whiteout name too long %.*s\n", -+ str->len, str->name); -+ err = -EIO; -+ break; -+ } -+ } -+ free_page((unsigned long)wh_name.name); -+ -+out: -+ return err; -+} -+ -+struct del_wh_children_args { -+ int *errp; -+ struct dentry *h_dentry; -+ struct au_nhash *whlist; -+ aufs_bindex_t bindex; -+ struct au_branch *br; -+}; -+ -+static void call_del_wh_children(void *args) -+{ -+ struct del_wh_children_args *a = args; -+ *a->errp = del_wh_children(a->h_dentry, a->whlist, a->bindex, a->br); -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+struct au_whtmp_rmdir *au_whtmp_rmdir_alloc(struct super_block *sb, gfp_t gfp) -+{ -+ struct au_whtmp_rmdir *whtmp; -+ int err; -+ unsigned int rdhash; -+ -+ SiMustAnyLock(sb); -+ -+ whtmp = kzalloc(sizeof(*whtmp), gfp); -+ if (unlikely(!whtmp)) { -+ whtmp = ERR_PTR(-ENOMEM); -+ goto out; -+ } -+ -+ /* no estimation for dir size */ -+ rdhash = au_sbi(sb)->si_rdhash; -+ if (!rdhash) -+ rdhash = AUFS_RDHASH_DEF; -+ err = au_nhash_alloc(&whtmp->whlist, rdhash, gfp); -+ if (unlikely(err)) { -+ au_kfree_rcu(whtmp); -+ whtmp = ERR_PTR(err); -+ } -+ -+out: -+ return whtmp; -+} -+ -+void au_whtmp_rmdir_free(struct au_whtmp_rmdir *whtmp) -+{ -+ if (whtmp->br) -+ au_lcnt_dec(&whtmp->br->br_count); -+ dput(whtmp->wh_dentry); -+ iput(whtmp->dir); -+ au_nhash_wh_free(&whtmp->whlist); -+ au_kfree_rcu(whtmp); -+} -+ -+/* -+ * rmdir the whiteouted temporary named dir @h_dentry. -+ * @whlist: whiteouted children. -+ */ -+int au_whtmp_rmdir(struct inode *dir, aufs_bindex_t bindex, -+ struct dentry *wh_dentry, struct au_nhash *whlist) -+{ -+ int err; -+ unsigned int h_nlink; -+ struct path h_tmp; -+ struct inode *wh_inode, *h_dir; -+ struct au_branch *br; -+ -+ h_dir = d_inode(wh_dentry->d_parent); /* dir inode is locked */ -+ IMustLock(h_dir); -+ -+ br = au_sbr(dir->i_sb, bindex); -+ wh_inode = d_inode(wh_dentry); -+ inode_lock_nested(wh_inode, AuLsc_I_CHILD); -+ -+ /* -+ * someone else might change some whiteouts while we were sleeping. -+ * it means this whlist may have an obsoleted entry. -+ */ -+ if (!au_test_h_perm_sio(wh_inode, MAY_EXEC | MAY_WRITE)) -+ err = del_wh_children(wh_dentry, whlist, bindex, br); -+ else { -+ int wkq_err; -+ struct del_wh_children_args args = { -+ .errp = &err, -+ .h_dentry = wh_dentry, -+ .whlist = whlist, -+ .bindex = bindex, -+ .br = br -+ }; -+ -+ wkq_err = au_wkq_wait(call_del_wh_children, &args); -+ if (unlikely(wkq_err)) -+ err = wkq_err; -+ } -+ inode_unlock(wh_inode); -+ -+ if (!err) { -+ h_tmp.dentry = wh_dentry; -+ h_tmp.mnt = au_br_mnt(br); -+ h_nlink = h_dir->i_nlink; -+ err = vfsub_rmdir(h_dir, &h_tmp); -+ /* some fs doesn't change the parent nlink in some cases */ -+ h_nlink -= h_dir->i_nlink; -+ } -+ -+ if (!err) { -+ if (au_ibtop(dir) == bindex) { -+ /* todo: dir->i_mutex is necessary */ -+ au_cpup_attr_timesizes(dir); -+ if (h_nlink) -+ vfsub_drop_nlink(dir); -+ } -+ return 0; /* success */ -+ } -+ -+ pr_warn("failed removing %pd(%d), ignored\n", wh_dentry, err); -+ return err; -+} -+ -+static void call_rmdir_whtmp(void *args) -+{ -+ int err; -+ aufs_bindex_t bindex; -+ struct au_whtmp_rmdir *a = args; -+ struct super_block *sb; -+ struct dentry *h_parent; -+ struct inode *h_dir; -+ struct au_hinode *hdir; -+ -+ /* rmdir by nfsd may cause deadlock with this i_mutex */ -+ /* inode_lock(a->dir); */ -+ err = -EROFS; -+ sb = a->dir->i_sb; -+ si_read_lock(sb, !AuLock_FLUSH); -+ if (!au_br_writable(a->br->br_perm)) -+ goto out; -+ bindex = au_br_index(sb, a->br->br_id); -+ if (unlikely(bindex < 0)) -+ goto out; -+ -+ err = -EIO; -+ ii_write_lock_parent(a->dir); -+ h_parent = dget_parent(a->wh_dentry); -+ h_dir = d_inode(h_parent); -+ hdir = au_hi(a->dir, bindex); -+ err = vfsub_mnt_want_write(au_br_mnt(a->br)); -+ if (unlikely(err)) -+ goto out_mnt; -+ au_hn_inode_lock_nested(hdir, AuLsc_I_PARENT); -+ err = au_h_verify(a->wh_dentry, au_opt_udba(sb), h_dir, h_parent, -+ a->br); -+ if (!err) -+ err = au_whtmp_rmdir(a->dir, bindex, a->wh_dentry, &a->whlist); -+ au_hn_inode_unlock(hdir); -+ vfsub_mnt_drop_write(au_br_mnt(a->br)); -+ -+out_mnt: -+ dput(h_parent); -+ ii_write_unlock(a->dir); -+out: -+ /* inode_unlock(a->dir); */ -+ au_whtmp_rmdir_free(a); -+ si_read_unlock(sb); -+ au_nwt_done(&au_sbi(sb)->si_nowait); -+ if (unlikely(err)) -+ AuIOErr("err %d\n", err); -+} -+ -+void au_whtmp_kick_rmdir(struct inode *dir, aufs_bindex_t bindex, -+ struct dentry *wh_dentry, struct au_whtmp_rmdir *args) -+{ -+ int wkq_err; -+ struct super_block *sb; -+ -+ IMustLock(dir); -+ -+ /* all post-process will be done in do_rmdir_whtmp(). */ -+ sb = dir->i_sb; -+ args->dir = au_igrab(dir); -+ args->br = au_sbr(sb, bindex); -+ au_lcnt_inc(&args->br->br_count); -+ args->wh_dentry = dget(wh_dentry); -+ wkq_err = au_wkq_nowait(call_rmdir_whtmp, args, sb, /*flags*/0); -+ if (unlikely(wkq_err)) { -+ pr_warn("rmdir error %pd (%d), ignored\n", wh_dentry, wkq_err); -+ au_whtmp_rmdir_free(args); -+ } -+} -diff --git a/fs/aufs/whout.h b/fs/aufs/whout.h -new file mode 100644 -index 000000000000..dc4eb41e70dd ---- /dev/null -+++ b/fs/aufs/whout.h -@@ -0,0 +1,73 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * whiteout for logical deletion and opaque directory -+ */ -+ -+#ifndef __AUFS_WHOUT_H__ -+#define __AUFS_WHOUT_H__ -+ -+#ifdef __KERNEL__ -+ -+#include "dir.h" -+ -+/* whout.c */ -+int au_wh_name_alloc(struct qstr *wh, const struct qstr *name); -+int au_wh_test(struct dentry *h_parent, struct qstr *wh_name, int try_sio); -+int au_diropq_test(struct dentry *h_dentry); -+struct au_branch; -+struct dentry *au_whtmp_lkup(struct dentry *h_parent, struct au_branch *br, -+ struct qstr *prefix); -+int au_whtmp_ren(struct dentry *h_dentry, struct au_branch *br); -+int au_wh_unlink_dentry(struct inode *h_dir, struct path *h_path, -+ struct dentry *dentry); -+int au_wh_init(struct au_branch *br, struct super_block *sb); -+ -+/* diropq flags */ -+#define AuDiropq_CREATE 1 -+#define au_ftest_diropq(flags, name) ((flags) & AuDiropq_##name) -+#define au_fset_diropq(flags, name) \ -+ do { (flags) |= AuDiropq_##name; } while (0) -+#define au_fclr_diropq(flags, name) \ -+ do { (flags) &= ~AuDiropq_##name; } while (0) -+ -+struct dentry *au_diropq_sio(struct dentry *dentry, aufs_bindex_t bindex, -+ unsigned int flags); -+struct dentry *au_wh_lkup(struct dentry *h_parent, struct qstr *base_name, -+ struct au_branch *br); -+struct dentry *au_wh_create(struct dentry *dentry, aufs_bindex_t bindex, -+ struct dentry *h_parent); -+ -+/* real rmdir for the whiteout-ed dir */ -+struct au_whtmp_rmdir { -+ struct inode *dir; -+ struct au_branch *br; -+ struct dentry *wh_dentry; -+ struct au_nhash whlist; -+}; -+ -+struct au_whtmp_rmdir *au_whtmp_rmdir_alloc(struct super_block *sb, gfp_t gfp); -+void au_whtmp_rmdir_free(struct au_whtmp_rmdir *whtmp); -+int au_whtmp_rmdir(struct inode *dir, aufs_bindex_t bindex, -+ struct dentry *wh_dentry, struct au_nhash *whlist); -+void au_whtmp_kick_rmdir(struct inode *dir, aufs_bindex_t bindex, -+ struct dentry *wh_dentry, struct au_whtmp_rmdir *args); -+ -+/* ---------------------------------------------------------------------- */ -+ -+static inline struct dentry *au_diropq_create(struct dentry *dentry, -+ aufs_bindex_t bindex) -+{ -+ return au_diropq_sio(dentry, bindex, AuDiropq_CREATE); -+} -+ -+static inline int au_diropq_remove(struct dentry *dentry, aufs_bindex_t bindex) -+{ -+ return PTR_ERR(au_diropq_sio(dentry, bindex, !AuDiropq_CREATE)); -+} -+ -+#endif /* __KERNEL__ */ -+#endif /* __AUFS_WHOUT_H__ */ -diff --git a/fs/aufs/wkq.c b/fs/aufs/wkq.c -new file mode 100644 -index 000000000000..288f5cf4b200 ---- /dev/null -+++ b/fs/aufs/wkq.c -@@ -0,0 +1,359 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * workqueue for asynchronous/super-io operations -+ * todo: try new credential scheme -+ */ -+ -+#include -+#include "aufs.h" -+ -+/* internal workqueue named AUFS_WKQ_NAME */ -+ -+static struct workqueue_struct *au_wkq; -+ -+struct au_wkinfo { -+ struct work_struct wk; -+ struct kobject *kobj; -+ -+ unsigned int flags; /* see wkq.h */ -+ -+ au_wkq_func_t func; -+ void *args; -+ -+#ifdef CONFIG_LOCKDEP -+ int dont_check; -+ struct held_lock **hlock; -+#endif -+ -+ struct completion *comp; -+}; -+ -+/* ---------------------------------------------------------------------- */ -+/* -+ * Aufs passes some operations to the workqueue such as the internal copyup. -+ * This scheme looks rather unnatural for LOCKDEP debugging feature, since the -+ * job run by workqueue depends upon the locks acquired in the other task. -+ * Delegating a small operation to the workqueue, aufs passes its lockdep -+ * information too. And the job in the workqueue restores the info in order to -+ * pretend as if it acquired those locks. This is just to make LOCKDEP work -+ * correctly and expectedly. -+ */ -+ -+#ifndef CONFIG_LOCKDEP -+AuStubInt0(au_wkq_lockdep_alloc, struct au_wkinfo *wkinfo); -+AuStubVoid(au_wkq_lockdep_free, struct au_wkinfo *wkinfo); -+AuStubVoid(au_wkq_lockdep_pre, struct au_wkinfo *wkinfo); -+AuStubVoid(au_wkq_lockdep_post, struct au_wkinfo *wkinfo); -+AuStubVoid(au_wkq_lockdep_init, struct au_wkinfo *wkinfo); -+#else -+static void au_wkq_lockdep_init(struct au_wkinfo *wkinfo) -+{ -+ wkinfo->hlock = NULL; -+ wkinfo->dont_check = 0; -+} -+ -+/* -+ * 1: matched -+ * 0: unmatched -+ */ -+static int au_wkq_lockdep_test(struct lock_class_key *key, const char *name) -+{ -+ static DEFINE_SPINLOCK(spin); -+ static struct { -+ char *name; -+ struct lock_class_key *key; -+ } a[] = { -+ { .name = "&sbinfo->si_rwsem" }, -+ { .name = "&finfo->fi_rwsem" }, -+ { .name = "&dinfo->di_rwsem" }, -+ { .name = "&iinfo->ii_rwsem" } -+ }; -+ static int set; -+ int i; -+ -+ /* lockless read from 'set.' see below */ -+ if (set == ARRAY_SIZE(a)) { -+ for (i = 0; i < ARRAY_SIZE(a); i++) -+ if (a[i].key == key) -+ goto match; -+ goto unmatch; -+ } -+ -+ spin_lock(&spin); -+ if (set) -+ for (i = 0; i < ARRAY_SIZE(a); i++) -+ if (a[i].key == key) { -+ spin_unlock(&spin); -+ goto match; -+ } -+ for (i = 0; i < ARRAY_SIZE(a); i++) { -+ if (a[i].key) { -+ if (unlikely(a[i].key == key)) { /* rare but possible */ -+ spin_unlock(&spin); -+ goto match; -+ } else -+ continue; -+ } -+ if (strstr(a[i].name, name)) { -+ /* -+ * the order of these three lines is important for the -+ * lockless read above. -+ */ -+ a[i].key = key; -+ spin_unlock(&spin); -+ set++; -+ /* AuDbg("%d, %s\n", set, name); */ -+ goto match; -+ } -+ } -+ spin_unlock(&spin); -+ goto unmatch; -+ -+match: -+ return 1; -+unmatch: -+ return 0; -+} -+ -+static int au_wkq_lockdep_alloc(struct au_wkinfo *wkinfo) -+{ -+ int err, n; -+ struct task_struct *curr; -+ struct held_lock **hl, *held_locks, *p; -+ -+ err = 0; -+ curr = current; -+ wkinfo->dont_check = lockdep_recursing(curr); -+ if (wkinfo->dont_check) -+ goto out; -+ n = curr->lockdep_depth; -+ if (!n) -+ goto out; -+ -+ err = -ENOMEM; -+ wkinfo->hlock = kmalloc_array(n + 1, sizeof(*wkinfo->hlock), GFP_NOFS); -+ if (unlikely(!wkinfo->hlock)) -+ goto out; -+ -+ err = 0; -+#if 0 /* left for debugging */ -+ if (0 && au_debug_test()) -+ lockdep_print_held_locks(curr); -+#endif -+ held_locks = curr->held_locks; -+ hl = wkinfo->hlock; -+ while (n--) { -+ p = held_locks++; -+ if (au_wkq_lockdep_test(p->instance->key, p->instance->name)) -+ *hl++ = p; -+ } -+ *hl = NULL; -+ -+out: -+ return err; -+} -+ -+static void au_wkq_lockdep_free(struct au_wkinfo *wkinfo) -+{ -+ au_kfree_try_rcu(wkinfo->hlock); -+} -+ -+static void au_wkq_lockdep_pre(struct au_wkinfo *wkinfo) -+{ -+ struct held_lock *p, **hl = wkinfo->hlock; -+ int subclass; -+ -+ if (wkinfo->dont_check) -+ lockdep_off(); -+ if (!hl) -+ return; -+ while ((p = *hl++)) { /* assignment */ -+ subclass = lockdep_hlock_class(p)->subclass; -+ /* AuDbg("%s, %d\n", p->instance->name, subclass); */ -+ if (p->read) -+ rwsem_acquire_read(p->instance, subclass, 0, -+ /*p->acquire_ip*/_RET_IP_); -+ else -+ rwsem_acquire(p->instance, subclass, 0, -+ /*p->acquire_ip*/_RET_IP_); -+ } -+} -+ -+static void au_wkq_lockdep_post(struct au_wkinfo *wkinfo) -+{ -+ struct held_lock *p, **hl = wkinfo->hlock; -+ -+ if (wkinfo->dont_check) -+ lockdep_on(); -+ if (!hl) -+ return; -+ while ((p = *hl++)) /* assignment */ -+ rwsem_release(p->instance, /*p->acquire_ip*/_RET_IP_); -+} -+#endif -+ -+static void wkq_func(struct work_struct *wk) -+{ -+ struct au_wkinfo *wkinfo = container_of(wk, struct au_wkinfo, wk); -+ -+ AuDebugOn(!uid_eq(current_fsuid(), GLOBAL_ROOT_UID)); -+ AuDebugOn(rlimit(RLIMIT_FSIZE) != RLIM_INFINITY); -+ -+ au_wkq_lockdep_pre(wkinfo); -+ wkinfo->func(wkinfo->args); -+ au_wkq_lockdep_post(wkinfo); -+ if (au_ftest_wkq(wkinfo->flags, WAIT)) -+ complete(wkinfo->comp); -+ else { -+ kobject_put(wkinfo->kobj); -+ module_put(THIS_MODULE); /* todo: ?? */ -+ au_kfree_rcu(wkinfo); -+ } -+} -+ -+/* -+ * Since struct completion is large, try allocating it dynamically. -+ */ -+#define AuWkqCompDeclare(name) struct completion *comp = NULL -+ -+static int au_wkq_comp_alloc(struct au_wkinfo *wkinfo, struct completion **comp) -+{ -+ *comp = kmalloc(sizeof(**comp), GFP_NOFS); -+ if (*comp) { -+ init_completion(*comp); -+ wkinfo->comp = *comp; -+ return 0; -+ } -+ return -ENOMEM; -+} -+ -+static void au_wkq_comp_free(struct completion *comp) -+{ -+ au_kfree_rcu(comp); -+} -+ -+static void au_wkq_run(struct au_wkinfo *wkinfo) -+{ -+ if (au_ftest_wkq(wkinfo->flags, NEST)) { -+ if (au_wkq_test()) { -+ AuWarn1("wkq from wkq, unless silly-rename on NFS," -+ " due to a dead dir by UDBA," -+ " or async xino write?\n"); -+ AuDebugOn(au_ftest_wkq(wkinfo->flags, WAIT)); -+ } -+ } else -+ au_dbg_verify_kthread(); -+ -+ if (au_ftest_wkq(wkinfo->flags, WAIT)) { -+ INIT_WORK_ONSTACK(&wkinfo->wk, wkq_func); -+ queue_work(au_wkq, &wkinfo->wk); -+ } else { -+ INIT_WORK(&wkinfo->wk, wkq_func); -+ schedule_work(&wkinfo->wk); -+ } -+} -+ -+/* -+ * Be careful. It is easy to make deadlock happen. -+ * processA: lock, wkq and wait -+ * processB: wkq and wait, lock in wkq -+ * --> deadlock -+ */ -+int au_wkq_do_wait(unsigned int flags, au_wkq_func_t func, void *args) -+{ -+ int err; -+ AuWkqCompDeclare(comp); -+ struct au_wkinfo wkinfo = { -+ .flags = flags, -+ .func = func, -+ .args = args -+ }; -+ -+ err = au_wkq_comp_alloc(&wkinfo, &comp); -+ if (unlikely(err)) -+ goto out; -+ err = au_wkq_lockdep_alloc(&wkinfo); -+ if (unlikely(err)) -+ goto out_comp; -+ if (!err) { -+ au_wkq_run(&wkinfo); -+ /* no timeout, no interrupt */ -+ wait_for_completion(wkinfo.comp); -+ } -+ au_wkq_lockdep_free(&wkinfo); -+ -+out_comp: -+ au_wkq_comp_free(comp); -+out: -+ destroy_work_on_stack(&wkinfo.wk); -+ return err; -+} -+ -+/* -+ * Note: dget/dput() in func for aufs dentries are not supported. It will be a -+ * problem in a concurrent umounting. -+ */ -+int au_wkq_nowait(au_wkq_func_t func, void *args, struct super_block *sb, -+ unsigned int flags) -+{ -+ int err; -+ struct au_wkinfo *wkinfo; -+ -+ atomic_inc(&au_sbi(sb)->si_nowait.nw_len); -+ -+ /* -+ * wkq_func() must free this wkinfo. -+ * it highly depends upon the implementation of workqueue. -+ */ -+ err = 0; -+ wkinfo = kmalloc(sizeof(*wkinfo), GFP_NOFS); -+ if (wkinfo) { -+ wkinfo->kobj = &au_sbi(sb)->si_kobj; -+ wkinfo->flags = flags & ~AuWkq_WAIT; -+ wkinfo->func = func; -+ wkinfo->args = args; -+ wkinfo->comp = NULL; -+ au_wkq_lockdep_init(wkinfo); -+ kobject_get(wkinfo->kobj); -+ __module_get(THIS_MODULE); /* todo: ?? */ -+ -+ au_wkq_run(wkinfo); -+ } else { -+ err = -ENOMEM; -+ au_nwt_done(&au_sbi(sb)->si_nowait); -+ } -+ -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+void au_nwt_init(struct au_nowait_tasks *nwt) -+{ -+ atomic_set(&nwt->nw_len, 0); -+ /* smp_mb(); */ /* atomic_set */ -+ init_waitqueue_head(&nwt->nw_wq); -+} -+ -+void au_wkq_fin(void) -+{ -+ destroy_workqueue(au_wkq); -+} -+ -+int __init au_wkq_init(void) -+{ -+ int err; -+ -+ err = 0; -+ au_wkq = alloc_workqueue(AUFS_WKQ_NAME, 0, WQ_DFL_ACTIVE); -+ if (IS_ERR(au_wkq)) -+ err = PTR_ERR(au_wkq); -+ else if (!au_wkq) -+ err = -ENOMEM; -+ -+ return err; -+} -diff --git a/fs/aufs/wkq.h b/fs/aufs/wkq.h -new file mode 100644 -index 000000000000..850085fdd2d2 ---- /dev/null -+++ b/fs/aufs/wkq.h -@@ -0,0 +1,76 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * workqueue for asynchronous/super-io operations -+ * todo: try new credentials management scheme -+ */ -+ -+#ifndef __AUFS_WKQ_H__ -+#define __AUFS_WKQ_H__ -+ -+#ifdef __KERNEL__ -+ -+#include -+ -+struct super_block; -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* -+ * in the next operation, wait for the 'nowait' tasks in system-wide workqueue -+ */ -+struct au_nowait_tasks { -+ atomic_t nw_len; -+ wait_queue_head_t nw_wq; -+}; -+ -+/* ---------------------------------------------------------------------- */ -+ -+typedef void (*au_wkq_func_t)(void *args); -+ -+/* wkq flags */ -+#define AuWkq_WAIT 1 -+#define AuWkq_NEST (1 << 1) -+#define au_ftest_wkq(flags, name) ((flags) & AuWkq_##name) -+#define au_fset_wkq(flags, name) \ -+ do { (flags) |= AuWkq_##name; } while (0) -+#define au_fclr_wkq(flags, name) \ -+ do { (flags) &= ~AuWkq_##name; } while (0) -+ -+/* wkq.c */ -+int au_wkq_do_wait(unsigned int flags, au_wkq_func_t func, void *args); -+int au_wkq_nowait(au_wkq_func_t func, void *args, struct super_block *sb, -+ unsigned int flags); -+void au_nwt_init(struct au_nowait_tasks *nwt); -+int __init au_wkq_init(void); -+void au_wkq_fin(void); -+ -+/* ---------------------------------------------------------------------- */ -+ -+static inline int au_wkq_test(void) -+{ -+ return current->flags & PF_WQ_WORKER; -+} -+ -+static inline int au_wkq_wait(au_wkq_func_t func, void *args) -+{ -+ return au_wkq_do_wait(AuWkq_WAIT, func, args); -+} -+ -+static inline void au_nwt_done(struct au_nowait_tasks *nwt) -+{ -+ if (atomic_dec_and_test(&nwt->nw_len)) -+ wake_up_all(&nwt->nw_wq); -+} -+ -+static inline int au_nwt_flush(struct au_nowait_tasks *nwt) -+{ -+ wait_event(nwt->nw_wq, !atomic_read(&nwt->nw_len)); -+ return 0; -+} -+ -+#endif /* __KERNEL__ */ -+#endif /* __AUFS_WKQ_H__ */ -diff --git a/fs/aufs/xattr.c b/fs/aufs/xattr.c -new file mode 100644 -index 000000000000..a71145b741b1 ---- /dev/null -+++ b/fs/aufs/xattr.c -@@ -0,0 +1,343 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2014-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * handling xattr functions -+ */ -+ -+#include -+#include -+#include -+#include "aufs.h" -+ -+static int au_xattr_ignore(int err, char *name, unsigned int ignore_flags) -+{ -+ if (!ignore_flags) -+ goto out; -+ switch (err) { -+ case -ENOMEM: -+ case -EDQUOT: -+ goto out; -+ } -+ -+ if ((ignore_flags & AuBrAttr_ICEX) == AuBrAttr_ICEX) { -+ err = 0; -+ goto out; -+ } -+ -+#define cmp(brattr, prefix) do { \ -+ if (!strncmp(name, XATTR_##prefix##_PREFIX, \ -+ XATTR_##prefix##_PREFIX_LEN)) { \ -+ if (ignore_flags & AuBrAttr_ICEX_##brattr) \ -+ err = 0; \ -+ goto out; \ -+ } \ -+ } while (0) -+ -+ cmp(SEC, SECURITY); -+ cmp(SYS, SYSTEM); -+ cmp(TR, TRUSTED); -+ cmp(USR, USER); -+#undef cmp -+ -+ if (ignore_flags & AuBrAttr_ICEX_OTH) -+ err = 0; -+ -+out: -+ return err; -+} -+ -+static const int au_xattr_out_of_list = AuBrAttr_ICEX_OTH << 1; -+ -+static int au_do_cpup_xattr(struct dentry *h_dst, struct dentry *h_src, -+ char *name, char **buf, unsigned int ignore_flags, -+ unsigned int verbose) -+{ -+ int err; -+ ssize_t ssz; -+ struct inode *h_idst; -+ -+ ssz = vfs_getxattr_alloc(h_src, name, buf, 0, GFP_NOFS); -+ err = ssz; -+ if (unlikely(err <= 0)) { -+ if (err == -ENODATA -+ || (err == -EOPNOTSUPP -+ && ((ignore_flags & au_xattr_out_of_list) -+ || (au_test_nfs_noacl(d_inode(h_src)) -+ && (!strcmp(name, XATTR_NAME_POSIX_ACL_ACCESS) -+ || !strcmp(name, -+ XATTR_NAME_POSIX_ACL_DEFAULT)))) -+ )) -+ err = 0; -+ if (err && (verbose || au_debug_test())) -+ pr_err("%s, err %d\n", name, err); -+ goto out; -+ } -+ -+ /* unlock it temporary */ -+ h_idst = d_inode(h_dst); -+ inode_unlock(h_idst); -+ err = vfsub_setxattr(h_dst, name, *buf, ssz, /*flags*/0); -+ inode_lock_nested(h_idst, AuLsc_I_CHILD2); -+ if (unlikely(err)) { -+ if (verbose || au_debug_test()) -+ pr_err("%s, err %d\n", name, err); -+ err = au_xattr_ignore(err, name, ignore_flags); -+ } -+ -+out: -+ return err; -+} -+ -+int au_cpup_xattr(struct dentry *h_dst, struct dentry *h_src, int ignore_flags, -+ unsigned int verbose) -+{ -+ int err, unlocked, acl_access, acl_default; -+ ssize_t ssz; -+ struct inode *h_isrc, *h_idst; -+ char *value, *p, *o, *e; -+ -+ /* try stopping to update the source inode while we are referencing */ -+ /* there should not be the parent-child relationship between them */ -+ h_isrc = d_inode(h_src); -+ h_idst = d_inode(h_dst); -+ inode_unlock(h_idst); -+ inode_lock_shared_nested(h_isrc, AuLsc_I_CHILD); -+ inode_lock_nested(h_idst, AuLsc_I_CHILD2); -+ unlocked = 0; -+ -+ /* some filesystems don't list POSIX ACL, for example tmpfs */ -+ ssz = vfs_listxattr(h_src, NULL, 0); -+ err = ssz; -+ if (unlikely(err < 0)) { -+ AuTraceErr(err); -+ if (err == -ENODATA -+ || err == -EOPNOTSUPP) -+ err = 0; /* ignore */ -+ goto out; -+ } -+ -+ err = 0; -+ p = NULL; -+ o = NULL; -+ if (ssz) { -+ err = -ENOMEM; -+ p = kmalloc(ssz, GFP_NOFS); -+ o = p; -+ if (unlikely(!p)) -+ goto out; -+ err = vfs_listxattr(h_src, p, ssz); -+ } -+ inode_unlock_shared(h_isrc); -+ unlocked = 1; -+ AuDbg("err %d, ssz %zd\n", err, ssz); -+ if (unlikely(err < 0)) -+ goto out_free; -+ -+ err = 0; -+ e = p + ssz; -+ value = NULL; -+ acl_access = 0; -+ acl_default = 0; -+ while (!err && p < e) { -+ acl_access |= !strncmp(p, XATTR_NAME_POSIX_ACL_ACCESS, -+ sizeof(XATTR_NAME_POSIX_ACL_ACCESS) - 1); -+ acl_default |= !strncmp(p, XATTR_NAME_POSIX_ACL_DEFAULT, -+ sizeof(XATTR_NAME_POSIX_ACL_DEFAULT) -+ - 1); -+ err = au_do_cpup_xattr(h_dst, h_src, p, &value, ignore_flags, -+ verbose); -+ p += strlen(p) + 1; -+ } -+ AuTraceErr(err); -+ ignore_flags |= au_xattr_out_of_list; -+ if (!err && !acl_access) { -+ err = au_do_cpup_xattr(h_dst, h_src, -+ XATTR_NAME_POSIX_ACL_ACCESS, &value, -+ ignore_flags, verbose); -+ AuTraceErr(err); -+ } -+ if (!err && !acl_default) { -+ err = au_do_cpup_xattr(h_dst, h_src, -+ XATTR_NAME_POSIX_ACL_DEFAULT, &value, -+ ignore_flags, verbose); -+ AuTraceErr(err); -+ } -+ -+ au_kfree_try_rcu(value); -+ -+out_free: -+ au_kfree_try_rcu(o); -+out: -+ if (!unlocked) -+ inode_unlock_shared(h_isrc); -+ AuTraceErr(err); -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+static int au_smack_reentering(struct super_block *sb) -+{ -+#if IS_ENABLED(CONFIG_SECURITY_SMACK) || IS_ENABLED(CONFIG_SECURITY_SELINUX) -+ /* -+ * as a part of lookup, smack_d_instantiate() is called, and it calls -+ * i_op->getxattr(). ouch. -+ */ -+ return si_pid_test(sb); -+#else -+ return 0; -+#endif -+} -+ -+enum { -+ AU_XATTR_LIST, -+ AU_XATTR_GET -+}; -+ -+struct au_lgxattr { -+ int type; -+ union { -+ struct { -+ char *list; -+ size_t size; -+ } list; -+ struct { -+ const char *name; -+ void *value; -+ size_t size; -+ } get; -+ } u; -+}; -+ -+static ssize_t au_lgxattr(struct dentry *dentry, struct inode *inode, -+ struct au_lgxattr *arg) -+{ -+ ssize_t err; -+ int reenter; -+ struct path h_path; -+ struct super_block *sb; -+ -+ sb = dentry->d_sb; -+ reenter = au_smack_reentering(sb); -+ if (!reenter) { -+ err = si_read_lock(sb, AuLock_FLUSH | AuLock_NOPLM); -+ if (unlikely(err)) -+ goto out; -+ } -+ err = au_h_path_getattr(dentry, inode, /*force*/1, &h_path, reenter); -+ if (unlikely(err)) -+ goto out_si; -+ if (unlikely(!h_path.dentry)) -+ /* illegally overlapped or something */ -+ goto out_di; /* pretending success */ -+ -+ /* always topmost entry only */ -+ switch (arg->type) { -+ case AU_XATTR_LIST: -+ err = vfs_listxattr(h_path.dentry, -+ arg->u.list.list, arg->u.list.size); -+ break; -+ case AU_XATTR_GET: -+ AuDebugOn(d_is_negative(h_path.dentry)); -+ err = vfs_getxattr(h_path.dentry, -+ arg->u.get.name, arg->u.get.value, -+ arg->u.get.size); -+ break; -+ } -+ -+out_di: -+ if (!reenter) -+ di_read_unlock(dentry, AuLock_IR); -+out_si: -+ if (!reenter) -+ si_read_unlock(sb); -+out: -+ AuTraceErr(err); -+ return err; -+} -+ -+ssize_t aufs_listxattr(struct dentry *dentry, char *list, size_t size) -+{ -+ struct au_lgxattr arg = { -+ .type = AU_XATTR_LIST, -+ .u.list = { -+ .list = list, -+ .size = size -+ }, -+ }; -+ -+ return au_lgxattr(dentry, /*inode*/NULL, &arg); -+} -+ -+static ssize_t au_getxattr(struct dentry *dentry, struct inode *inode, -+ const char *name, void *value, size_t size) -+{ -+ struct au_lgxattr arg = { -+ .type = AU_XATTR_GET, -+ .u.get = { -+ .name = name, -+ .value = value, -+ .size = size -+ }, -+ }; -+ -+ return au_lgxattr(dentry, inode, &arg); -+} -+ -+static int au_setxattr(struct dentry *dentry, struct inode *inode, -+ const char *name, const void *value, size_t size, -+ int flags) -+{ -+ struct au_sxattr arg = { -+ .type = AU_XATTR_SET, -+ .u.set = { -+ .name = name, -+ .value = value, -+ .size = size, -+ .flags = flags -+ }, -+ }; -+ -+ return au_sxattr(dentry, inode, &arg); -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+static int au_xattr_get(const struct xattr_handler *handler, -+ struct dentry *dentry, struct inode *inode, -+ const char *name, void *buffer, size_t size) -+{ -+ return au_getxattr(dentry, inode, name, buffer, size); -+} -+ -+static int au_xattr_set(const struct xattr_handler *handler, -+ struct dentry *dentry, struct inode *inode, -+ const char *name, const void *value, size_t size, -+ int flags) -+{ -+ return au_setxattr(dentry, inode, name, value, size, flags); -+} -+ -+static const struct xattr_handler au_xattr_handler = { -+ .name = "", -+ .prefix = "", -+ .get = au_xattr_get, -+ .set = au_xattr_set -+}; -+ -+static const struct xattr_handler *au_xattr_handlers[] = { -+#ifdef CONFIG_FS_POSIX_ACL -+ &posix_acl_access_xattr_handler, -+ &posix_acl_default_xattr_handler, -+#endif -+ &au_xattr_handler, /* must be last */ -+ NULL -+}; -+ -+void au_xattr_init(struct super_block *sb) -+{ -+ sb->s_xattr = au_xattr_handlers; -+} -diff --git a/fs/aufs/xino.c b/fs/aufs/xino.c -new file mode 100644 -index 000000000000..753e92a3d6d7 ---- /dev/null -+++ b/fs/aufs/xino.c -@@ -0,0 +1,1912 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+/* -+ * external inode number translation table and bitmap -+ * -+ * things to consider -+ * - the lifetime -+ * + au_xino object -+ * + XINO files (xino, xib, xigen) -+ * + dynamic debugfs entries (xiN) -+ * + static debugfs entries (xib, xigen) -+ * + static sysfs entry (xi_path) -+ * - several entry points to handle them. -+ * + mount(2) without xino option (default) -+ * + mount(2) with xino option -+ * + mount(2) with noxino option -+ * + umount(2) -+ * + remount with add/del branches -+ * + remount with xino/noxino options -+ */ -+ -+#include -+#include -+#include "aufs.h" -+ -+static aufs_bindex_t sbr_find_shared(struct super_block *sb, aufs_bindex_t btop, -+ aufs_bindex_t bbot, -+ struct super_block *h_sb) -+{ -+ /* todo: try binary-search if the branches are many */ -+ for (; btop <= bbot; btop++) -+ if (h_sb == au_sbr_sb(sb, btop)) -+ return btop; -+ return -1; -+} -+ -+/* -+ * find another branch who is on the same filesystem of the specified -+ * branch{@btgt}. search until @bbot. -+ */ -+static aufs_bindex_t is_sb_shared(struct super_block *sb, aufs_bindex_t btgt, -+ aufs_bindex_t bbot) -+{ -+ aufs_bindex_t bindex; -+ struct super_block *tgt_sb; -+ -+ tgt_sb = au_sbr_sb(sb, btgt); -+ bindex = sbr_find_shared(sb, /*btop*/0, btgt - 1, tgt_sb); -+ if (bindex < 0) -+ bindex = sbr_find_shared(sb, btgt + 1, bbot, tgt_sb); -+ -+ return bindex; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* -+ * stop unnecessary notify events at creating xino files -+ */ -+ -+aufs_bindex_t au_xi_root(struct super_block *sb, struct dentry *dentry) -+{ -+ aufs_bindex_t bfound, bindex, bbot; -+ struct dentry *parent; -+ struct au_branch *br; -+ -+ bfound = -1; -+ parent = dentry->d_parent; /* safe d_parent access */ -+ bbot = au_sbbot(sb); -+ for (bindex = 0; bindex <= bbot; bindex++) { -+ br = au_sbr(sb, bindex); -+ if (au_br_dentry(br) == parent) { -+ bfound = bindex; -+ break; -+ } -+ } -+ -+ AuDbg("bfound b%d\n", bfound); -+ return bfound; -+} -+ -+struct au_xino_lock_dir { -+ struct au_hinode *hdir; -+ struct dentry *parent; -+ struct inode *dir; -+}; -+ -+static struct dentry *au_dget_parent_lock(struct dentry *dentry, -+ unsigned int lsc) -+{ -+ struct dentry *parent; -+ struct inode *dir; -+ -+ parent = dget_parent(dentry); -+ dir = d_inode(parent); -+ inode_lock_nested(dir, lsc); -+#if 0 /* it should not happen */ -+ spin_lock(&dentry->d_lock); -+ if (unlikely(dentry->d_parent != parent)) { -+ spin_unlock(&dentry->d_lock); -+ inode_unlock(dir); -+ dput(parent); -+ parent = NULL; -+ goto out; -+ } -+ spin_unlock(&dentry->d_lock); -+ -+out: -+#endif -+ return parent; -+} -+ -+static void au_xino_lock_dir(struct super_block *sb, struct path *xipath, -+ struct au_xino_lock_dir *ldir) -+{ -+ aufs_bindex_t bindex; -+ -+ ldir->hdir = NULL; -+ bindex = au_xi_root(sb, xipath->dentry); -+ if (bindex >= 0) { -+ /* rw branch root */ -+ ldir->hdir = au_hi(d_inode(sb->s_root), bindex); -+ au_hn_inode_lock_nested(ldir->hdir, AuLsc_I_PARENT); -+ } else { -+ /* other */ -+ ldir->parent = au_dget_parent_lock(xipath->dentry, -+ AuLsc_I_PARENT); -+ ldir->dir = d_inode(ldir->parent); -+ } -+} -+ -+static void au_xino_unlock_dir(struct au_xino_lock_dir *ldir) -+{ -+ if (ldir->hdir) -+ au_hn_inode_unlock(ldir->hdir); -+ else { -+ inode_unlock(ldir->dir); -+ dput(ldir->parent); -+ } -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* -+ * create and set a new xino file -+ */ -+struct file *au_xino_create(struct super_block *sb, char *fpath, int silent, -+ int wbrtop) -+{ -+ struct file *file; -+ struct dentry *h_parent, *d; -+ struct inode *h_dir, *inode; -+ int err; -+ static DEFINE_MUTEX(mtx); -+ -+ /* -+ * at mount-time, and the xino file is the default path, -+ * hnotify is disabled so we have no notify events to ignore. -+ * when a user specified the xino, we cannot get au_hdir to be ignored. -+ */ -+ if (!wbrtop) -+ mutex_lock(&mtx); -+ file = vfsub_filp_open(fpath, O_RDWR | O_CREAT | O_EXCL | O_LARGEFILE -+ /* | __FMODE_NONOTIFY */, -+ 0666); -+ if (IS_ERR(file)) { -+ if (!wbrtop) -+ mutex_unlock(&mtx); -+ if (!silent) -+ pr_err("open %s(%ld)\n", fpath, PTR_ERR(file)); -+ return file; -+ } -+ -+ /* keep file count */ -+ err = 0; -+ d = file->f_path.dentry; -+ h_parent = au_dget_parent_lock(d, AuLsc_I_PARENT); -+ if (!wbrtop) -+ mutex_unlock(&mtx); -+ /* mnt_want_write() is unnecessary here */ -+ h_dir = d_inode(h_parent); -+ inode = file_inode(file); -+ /* no delegation since it is just created */ -+ if (inode->i_nlink) -+ err = vfsub_unlink(h_dir, &file->f_path, /*delegated*/NULL, -+ /*force*/0); -+ inode_unlock(h_dir); -+ dput(h_parent); -+ if (unlikely(err)) { -+ if (!silent) -+ pr_err("unlink %s(%d)\n", fpath, err); -+ goto out; -+ } -+ -+ err = -EINVAL; -+ if (unlikely(sb == d->d_sb)) { -+ if (!silent) -+ pr_err("%s must be outside\n", fpath); -+ goto out; -+ } -+ if (unlikely(au_test_fs_bad_xino(d->d_sb))) { -+ if (!silent) -+ pr_err("xino doesn't support %s(%s)\n", -+ fpath, au_sbtype(d->d_sb)); -+ goto out; -+ } -+ return file; /* success */ -+ -+out: -+ fput(file); -+ file = ERR_PTR(err); -+ return file; -+} -+ -+/* -+ * create a new xinofile at the same place/path as @base. -+ */ -+struct file *au_xino_create2(struct super_block *sb, struct path *base, -+ struct file *copy_src) -+{ -+ struct file *file; -+ struct dentry *dentry, *parent; -+ struct inode *dir, *delegated; -+ struct qstr *name; -+ struct path path; -+ int err, do_unlock; -+ struct au_xino_lock_dir ldir; -+ -+ do_unlock = 1; -+ au_xino_lock_dir(sb, base, &ldir); -+ dentry = base->dentry; -+ parent = dentry->d_parent; /* dir inode is locked */ -+ dir = d_inode(parent); -+ IMustLock(dir); -+ -+ name = &dentry->d_name; -+ path.dentry = vfsub_lookup_one_len(name->name, parent, name->len); -+ if (IS_ERR(path.dentry)) { -+ file = (void *)path.dentry; -+ pr_err("%pd lookup err %ld\n", dentry, PTR_ERR(path.dentry)); -+ goto out; -+ } -+ -+ /* no need to mnt_want_write() since we call dentry_open() later */ -+ err = vfs_create(dir, path.dentry, 0666, NULL); -+ if (unlikely(err)) { -+ file = ERR_PTR(err); -+ pr_err("%pd create err %d\n", dentry, err); -+ goto out_dput; -+ } -+ -+ path.mnt = base->mnt; -+ file = vfsub_dentry_open(&path, -+ O_RDWR | O_CREAT | O_EXCL | O_LARGEFILE -+ /* | __FMODE_NONOTIFY */); -+ if (IS_ERR(file)) { -+ pr_err("%pd open err %ld\n", dentry, PTR_ERR(file)); -+ goto out_dput; -+ } -+ -+ delegated = NULL; -+ err = vfsub_unlink(dir, &file->f_path, &delegated, /*force*/0); -+ au_xino_unlock_dir(&ldir); -+ do_unlock = 0; -+ if (unlikely(err == -EWOULDBLOCK)) { -+ pr_warn("cannot retry for NFSv4 delegation" -+ " for an internal unlink\n"); -+ iput(delegated); -+ } -+ if (unlikely(err)) { -+ pr_err("%pd unlink err %d\n", dentry, err); -+ goto out_fput; -+ } -+ -+ if (copy_src) { -+ /* no one can touch copy_src xino */ -+ err = au_copy_file(file, copy_src, vfsub_f_size_read(copy_src)); -+ if (unlikely(err)) { -+ pr_err("%pd copy err %d\n", dentry, err); -+ goto out_fput; -+ } -+ } -+ goto out_dput; /* success */ -+ -+out_fput: -+ fput(file); -+ file = ERR_PTR(err); -+out_dput: -+ dput(path.dentry); -+out: -+ if (do_unlock) -+ au_xino_unlock_dir(&ldir); -+ return file; -+} -+ -+struct file *au_xino_file1(struct au_xino *xi) -+{ -+ struct file *file; -+ unsigned int u, nfile; -+ -+ file = NULL; -+ nfile = xi->xi_nfile; -+ for (u = 0; u < nfile; u++) { -+ file = xi->xi_file[u]; -+ if (file) -+ break; -+ } -+ -+ return file; -+} -+ -+static int au_xino_file_set(struct au_xino *xi, int idx, struct file *file) -+{ -+ int err; -+ struct file *f; -+ void *p; -+ -+ if (file) -+ get_file(file); -+ -+ err = 0; -+ f = NULL; -+ if (idx < xi->xi_nfile) { -+ f = xi->xi_file[idx]; -+ if (f) -+ fput(f); -+ } else { -+ p = au_kzrealloc(xi->xi_file, -+ sizeof(*xi->xi_file) * xi->xi_nfile, -+ sizeof(*xi->xi_file) * (idx + 1), -+ GFP_NOFS, /*may_shrink*/0); -+ if (p) { -+ MtxMustLock(&xi->xi_mtx); -+ xi->xi_file = p; -+ xi->xi_nfile = idx + 1; -+ } else { -+ err = -ENOMEM; -+ if (file) -+ fput(file); -+ goto out; -+ } -+ } -+ xi->xi_file[idx] = file; -+ -+out: -+ return err; -+} -+ -+/* -+ * if @xinew->xi is not set, then create new xigen file. -+ */ -+struct file *au_xi_new(struct super_block *sb, struct au_xi_new *xinew) -+{ -+ struct file *file; -+ int err; -+ -+ SiMustAnyLock(sb); -+ -+ file = au_xino_create2(sb, xinew->base, xinew->copy_src); -+ if (IS_ERR(file)) { -+ err = PTR_ERR(file); -+ pr_err("%s[%d], err %d\n", -+ xinew->xi ? "xino" : "xigen", -+ xinew->idx, err); -+ goto out; -+ } -+ -+ if (xinew->xi) -+ err = au_xino_file_set(xinew->xi, xinew->idx, file); -+ else { -+ BUG(); -+ /* todo: make xigen file an array */ -+ /* err = au_xigen_file_set(sb, xinew->idx, file); */ -+ } -+ fput(file); -+ if (unlikely(err)) -+ file = ERR_PTR(err); -+ -+out: -+ return file; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* -+ * truncate xino files -+ */ -+static int au_xino_do_trunc(struct super_block *sb, aufs_bindex_t bindex, -+ int idx, struct kstatfs *st) -+{ -+ int err; -+ blkcnt_t blocks; -+ struct file *file, *new_xino; -+ struct au_xi_new xinew = { -+ .idx = idx -+ }; -+ -+ err = 0; -+ xinew.xi = au_sbr(sb, bindex)->br_xino; -+ file = au_xino_file(xinew.xi, idx); -+ if (!file) -+ goto out; -+ -+ xinew.base = &file->f_path; -+ err = vfs_statfs(xinew.base, st); -+ if (unlikely(err)) { -+ AuErr1("statfs err %d, ignored\n", err); -+ err = 0; -+ goto out; -+ } -+ -+ blocks = file_inode(file)->i_blocks; -+ pr_info("begin truncating xino(b%d-%d), ib%llu, %llu/%llu free blks\n", -+ bindex, idx, (u64)blocks, st->f_bfree, st->f_blocks); -+ -+ xinew.copy_src = file; -+ new_xino = au_xi_new(sb, &xinew); -+ if (IS_ERR(new_xino)) { -+ err = PTR_ERR(new_xino); -+ pr_err("xino(b%d-%d), err %d, ignored\n", bindex, idx, err); -+ goto out; -+ } -+ -+ err = vfs_statfs(&new_xino->f_path, st); -+ if (!err) -+ pr_info("end truncating xino(b%d-%d), ib%llu, %llu/%llu free blks\n", -+ bindex, idx, (u64)file_inode(new_xino)->i_blocks, -+ st->f_bfree, st->f_blocks); -+ else { -+ AuErr1("statfs err %d, ignored\n", err); -+ err = 0; -+ } -+ -+out: -+ return err; -+} -+ -+int au_xino_trunc(struct super_block *sb, aufs_bindex_t bindex, int idx_begin) -+{ -+ int err, i; -+ unsigned long jiffy; -+ aufs_bindex_t bbot; -+ struct kstatfs *st; -+ struct au_branch *br; -+ struct au_xino *xi; -+ -+ err = -ENOMEM; -+ st = kmalloc(sizeof(*st), GFP_NOFS); -+ if (unlikely(!st)) -+ goto out; -+ -+ err = -EINVAL; -+ bbot = au_sbbot(sb); -+ if (unlikely(bindex < 0 || bbot < bindex)) -+ goto out_st; -+ -+ err = 0; -+ jiffy = jiffies; -+ br = au_sbr(sb, bindex); -+ xi = br->br_xino; -+ for (i = idx_begin; !err && i < xi->xi_nfile; i++) -+ err = au_xino_do_trunc(sb, bindex, i, st); -+ if (!err) -+ au_sbi(sb)->si_xino_jiffy = jiffy; -+ -+out_st: -+ au_kfree_rcu(st); -+out: -+ return err; -+} -+ -+struct xino_do_trunc_args { -+ struct super_block *sb; -+ struct au_branch *br; -+ int idx; -+}; -+ -+static void xino_do_trunc(void *_args) -+{ -+ struct xino_do_trunc_args *args = _args; -+ struct super_block *sb; -+ struct au_branch *br; -+ struct inode *dir; -+ int err, idx; -+ aufs_bindex_t bindex; -+ -+ err = 0; -+ sb = args->sb; -+ dir = d_inode(sb->s_root); -+ br = args->br; -+ idx = args->idx; -+ -+ si_noflush_write_lock(sb); -+ ii_read_lock_parent(dir); -+ bindex = au_br_index(sb, br->br_id); -+ err = au_xino_trunc(sb, bindex, idx); -+ ii_read_unlock(dir); -+ if (unlikely(err)) -+ pr_warn("err b%d, (%d)\n", bindex, err); -+ atomic_dec(&br->br_xino->xi_truncating); -+ au_lcnt_dec(&br->br_count); -+ si_write_unlock(sb); -+ au_nwt_done(&au_sbi(sb)->si_nowait); -+ au_kfree_rcu(args); -+} -+ -+/* -+ * returns the index in the xi_file array whose corresponding file is necessary -+ * to truncate, or -1 which means no need to truncate. -+ */ -+static int xino_trunc_test(struct super_block *sb, struct au_branch *br) -+{ -+ int err; -+ unsigned int u; -+ struct kstatfs st; -+ struct au_sbinfo *sbinfo; -+ struct au_xino *xi; -+ struct file *file; -+ -+ /* todo: si_xino_expire and the ratio should be customizable */ -+ sbinfo = au_sbi(sb); -+ if (time_before(jiffies, -+ sbinfo->si_xino_jiffy + sbinfo->si_xino_expire)) -+ return -1; -+ -+ /* truncation border */ -+ xi = br->br_xino; -+ for (u = 0; u < xi->xi_nfile; u++) { -+ file = au_xino_file(xi, u); -+ if (!file) -+ continue; -+ -+ err = vfs_statfs(&file->f_path, &st); -+ if (unlikely(err)) { -+ AuErr1("statfs err %d, ignored\n", err); -+ return -1; -+ } -+ if (div64_u64(st.f_bfree * 100, st.f_blocks) -+ >= AUFS_XINO_DEF_TRUNC) -+ return u; -+ } -+ -+ return -1; -+} -+ -+static void xino_try_trunc(struct super_block *sb, struct au_branch *br) -+{ -+ int idx; -+ struct xino_do_trunc_args *args; -+ int wkq_err; -+ -+ idx = xino_trunc_test(sb, br); -+ if (idx < 0) -+ return; -+ -+ if (atomic_inc_return(&br->br_xino->xi_truncating) > 1) -+ goto out; -+ -+ /* lock and kfree() will be called in trunc_xino() */ -+ args = kmalloc(sizeof(*args), GFP_NOFS); -+ if (unlikely(!args)) { -+ AuErr1("no memory\n"); -+ goto out; -+ } -+ -+ au_lcnt_inc(&br->br_count); -+ args->sb = sb; -+ args->br = br; -+ args->idx = idx; -+ wkq_err = au_wkq_nowait(xino_do_trunc, args, sb, /*flags*/0); -+ if (!wkq_err) -+ return; /* success */ -+ -+ pr_err("wkq %d\n", wkq_err); -+ au_lcnt_dec(&br->br_count); -+ au_kfree_rcu(args); -+ -+out: -+ atomic_dec(&br->br_xino->xi_truncating); -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+struct au_xi_calc { -+ int idx; -+ loff_t pos; -+}; -+ -+static void au_xi_calc(struct super_block *sb, ino_t h_ino, -+ struct au_xi_calc *calc) -+{ -+ loff_t maxent; -+ -+ maxent = au_xi_maxent(sb); -+ calc->idx = div64_u64_rem(h_ino, maxent, &calc->pos); -+ calc->pos *= sizeof(ino_t); -+} -+ -+static int au_xino_do_new_async(struct super_block *sb, struct au_branch *br, -+ struct au_xi_calc *calc) -+{ -+ int err; -+ struct file *file; -+ struct au_xino *xi = br->br_xino; -+ struct au_xi_new xinew = { -+ .xi = xi -+ }; -+ -+ SiMustAnyLock(sb); -+ -+ err = 0; -+ if (!xi) -+ goto out; -+ -+ mutex_lock(&xi->xi_mtx); -+ file = au_xino_file(xi, calc->idx); -+ if (file) -+ goto out_mtx; -+ -+ file = au_xino_file(xi, /*idx*/-1); -+ AuDebugOn(!file); -+ xinew.idx = calc->idx; -+ xinew.base = &file->f_path; -+ /* xinew.copy_src = NULL; */ -+ file = au_xi_new(sb, &xinew); -+ if (IS_ERR(file)) -+ err = PTR_ERR(file); -+ -+out_mtx: -+ mutex_unlock(&xi->xi_mtx); -+out: -+ return err; -+} -+ -+struct au_xino_do_new_async_args { -+ struct super_block *sb; -+ struct au_branch *br; -+ struct au_xi_calc calc; -+ ino_t ino; -+}; -+ -+struct au_xi_writing { -+ struct hlist_bl_node node; -+ ino_t h_ino, ino; -+}; -+ -+static int au_xino_do_write(struct file *file, struct au_xi_calc *calc, -+ ino_t ino); -+ -+static void au_xino_call_do_new_async(void *args) -+{ -+ struct au_xino_do_new_async_args *a = args; -+ struct au_branch *br; -+ struct super_block *sb; -+ struct au_sbinfo *sbi; -+ struct inode *root; -+ struct file *file; -+ struct au_xi_writing *del, *p; -+ struct hlist_bl_head *hbl; -+ struct hlist_bl_node *pos; -+ int err; -+ -+ br = a->br; -+ sb = a->sb; -+ sbi = au_sbi(sb); -+ si_noflush_read_lock(sb); -+ root = d_inode(sb->s_root); -+ ii_read_lock_child(root); -+ err = au_xino_do_new_async(sb, br, &a->calc); -+ if (unlikely(err)) { -+ AuIOErr("err %d\n", err); -+ goto out; -+ } -+ -+ file = au_xino_file(br->br_xino, a->calc.idx); -+ AuDebugOn(!file); -+ err = au_xino_do_write(file, &a->calc, a->ino); -+ if (unlikely(err)) { -+ AuIOErr("err %d\n", err); -+ goto out; -+ } -+ -+ del = NULL; -+ hbl = &br->br_xino->xi_writing; -+ hlist_bl_lock(hbl); -+ au_hbl_for_each(pos, hbl) { -+ p = container_of(pos, struct au_xi_writing, node); -+ if (p->ino == a->ino) { -+ del = p; -+ hlist_bl_del(&p->node); -+ break; -+ } -+ } -+ hlist_bl_unlock(hbl); -+ au_kfree_rcu(del); -+ -+out: -+ au_lcnt_dec(&br->br_count); -+ ii_read_unlock(root); -+ si_read_unlock(sb); -+ au_nwt_done(&sbi->si_nowait); -+ au_kfree_rcu(a); -+} -+ -+/* -+ * create a new xino file asynchronously -+ */ -+static int au_xino_new_async(struct super_block *sb, struct au_branch *br, -+ struct au_xi_calc *calc, ino_t ino) -+{ -+ int err; -+ struct au_xino_do_new_async_args *arg; -+ -+ err = -ENOMEM; -+ arg = kmalloc(sizeof(*arg), GFP_NOFS); -+ if (unlikely(!arg)) -+ goto out; -+ -+ arg->sb = sb; -+ arg->br = br; -+ arg->calc = *calc; -+ arg->ino = ino; -+ au_lcnt_inc(&br->br_count); -+ err = au_wkq_nowait(au_xino_call_do_new_async, arg, sb, AuWkq_NEST); -+ if (unlikely(err)) { -+ pr_err("wkq %d\n", err); -+ au_lcnt_dec(&br->br_count); -+ au_kfree_rcu(arg); -+ } -+ -+out: -+ return err; -+} -+ -+/* -+ * read @ino from xinofile for the specified branch{@sb, @bindex} -+ * at the position of @h_ino. -+ */ -+int au_xino_read(struct super_block *sb, aufs_bindex_t bindex, ino_t h_ino, -+ ino_t *ino) -+{ -+ int err; -+ ssize_t sz; -+ struct au_xi_calc calc; -+ struct au_sbinfo *sbinfo; -+ struct file *file; -+ struct au_xino *xi; -+ struct hlist_bl_head *hbl; -+ struct hlist_bl_node *pos; -+ struct au_xi_writing *p; -+ -+ *ino = 0; -+ if (!au_opt_test(au_mntflags(sb), XINO)) -+ return 0; /* no xino */ -+ -+ err = 0; -+ au_xi_calc(sb, h_ino, &calc); -+ xi = au_sbr(sb, bindex)->br_xino; -+ file = au_xino_file(xi, calc.idx); -+ if (!file) { -+ hbl = &xi->xi_writing; -+ hlist_bl_lock(hbl); -+ au_hbl_for_each(pos, hbl) { -+ p = container_of(pos, struct au_xi_writing, node); -+ if (p->h_ino == h_ino) { -+ AuDbg("hi%llu, i%llu, found\n", -+ (u64)p->h_ino, (u64)p->ino); -+ *ino = p->ino; -+ break; -+ } -+ } -+ hlist_bl_unlock(hbl); -+ return 0; -+ } else if (vfsub_f_size_read(file) < calc.pos + sizeof(*ino)) -+ return 0; /* no xino */ -+ -+ sbinfo = au_sbi(sb); -+ sz = xino_fread(file, ino, sizeof(*ino), &calc.pos); -+ if (sz == sizeof(*ino)) -+ return 0; /* success */ -+ -+ err = sz; -+ if (unlikely(sz >= 0)) { -+ err = -EIO; -+ AuIOErr("xino read error (%zd)\n", sz); -+ } -+ return err; -+} -+ -+static int au_xino_do_write(struct file *file, struct au_xi_calc *calc, -+ ino_t ino) -+{ -+ ssize_t sz; -+ -+ sz = xino_fwrite(file, &ino, sizeof(ino), &calc->pos); -+ if (sz == sizeof(ino)) -+ return 0; /* success */ -+ -+ AuIOErr("write failed (%zd)\n", sz); -+ return -EIO; -+} -+ -+/* -+ * write @ino to the xinofile for the specified branch{@sb, @bindex} -+ * at the position of @h_ino. -+ * even if @ino is zero, it is written to the xinofile and means no entry. -+ * if the size of the xino file on a specific filesystem exceeds the watermark, -+ * try truncating it. -+ */ -+int au_xino_write(struct super_block *sb, aufs_bindex_t bindex, ino_t h_ino, -+ ino_t ino) -+{ -+ int err; -+ unsigned int mnt_flags; -+ struct au_xi_calc calc; -+ struct file *file; -+ struct au_branch *br; -+ struct au_xino *xi; -+ struct au_xi_writing *p; -+ -+ SiMustAnyLock(sb); -+ -+ mnt_flags = au_mntflags(sb); -+ if (!au_opt_test(mnt_flags, XINO)) -+ return 0; -+ -+ au_xi_calc(sb, h_ino, &calc); -+ br = au_sbr(sb, bindex); -+ xi = br->br_xino; -+ file = au_xino_file(xi, calc.idx); -+ if (!file) { -+ /* store the inum pair into the list */ -+ p = kmalloc(sizeof(*p), GFP_NOFS | __GFP_NOFAIL); -+ p->h_ino = h_ino; -+ p->ino = ino; -+ au_hbl_add(&p->node, &xi->xi_writing); -+ -+ /* create and write a new xino file asynchronously */ -+ err = au_xino_new_async(sb, br, &calc, ino); -+ if (!err) -+ return 0; /* success */ -+ goto out; -+ } -+ -+ err = au_xino_do_write(file, &calc, ino); -+ if (!err) { -+ br = au_sbr(sb, bindex); -+ if (au_opt_test(mnt_flags, TRUNC_XINO) -+ && au_test_fs_trunc_xino(au_br_sb(br))) -+ xino_try_trunc(sb, br); -+ return 0; /* success */ -+ } -+ -+out: -+ AuIOErr("write failed (%d)\n", err); -+ return -EIO; -+} -+ -+static ssize_t xino_fread_wkq(struct file *file, void *buf, size_t size, -+ loff_t *pos); -+ -+/* todo: unnecessary to support mmap_sem since kernel-space? */ -+ssize_t xino_fread(struct file *file, void *kbuf, size_t size, loff_t *pos) -+{ -+ ssize_t err; -+ int i; -+ const int prevent_endless = 10; -+ -+ i = 0; -+ do { -+ err = vfsub_read_k(file, kbuf, size, pos); -+ if (err == -EINTR -+ && !au_wkq_test() -+ && fatal_signal_pending(current)) { -+ err = xino_fread_wkq(file, kbuf, size, pos); -+ BUG_ON(err == -EINTR); -+ } -+ } while (i++ < prevent_endless -+ && (err == -EAGAIN || err == -EINTR)); -+ -+#if 0 /* reserved for future use */ -+ if (err > 0) -+ fsnotify_access(file->f_path.dentry); -+#endif -+ -+ return err; -+} -+ -+struct xino_fread_args { -+ ssize_t *errp; -+ struct file *file; -+ void *buf; -+ size_t size; -+ loff_t *pos; -+}; -+ -+static void call_xino_fread(void *args) -+{ -+ struct xino_fread_args *a = args; -+ *a->errp = xino_fread(a->file, a->buf, a->size, a->pos); -+} -+ -+static ssize_t xino_fread_wkq(struct file *file, void *buf, size_t size, -+ loff_t *pos) -+{ -+ ssize_t err; -+ int wkq_err; -+ struct xino_fread_args args = { -+ .errp = &err, -+ .file = file, -+ .buf = buf, -+ .size = size, -+ .pos = pos -+ }; -+ -+ wkq_err = au_wkq_wait(call_xino_fread, &args); -+ if (unlikely(wkq_err)) -+ err = wkq_err; -+ -+ return err; -+} -+ -+static ssize_t xino_fwrite_wkq(struct file *file, void *buf, size_t size, -+ loff_t *pos); -+ -+static ssize_t do_xino_fwrite(struct file *file, void *kbuf, size_t size, -+ loff_t *pos) -+{ -+ ssize_t err; -+ int i; -+ const int prevent_endless = 10; -+ -+ i = 0; -+ do { -+ err = vfsub_write_k(file, kbuf, size, pos); -+ if (err == -EINTR -+ && !au_wkq_test() -+ && fatal_signal_pending(current)) { -+ err = xino_fwrite_wkq(file, kbuf, size, pos); -+ BUG_ON(err == -EINTR); -+ } -+ } while (i++ < prevent_endless -+ && (err == -EAGAIN || err == -EINTR)); -+ -+#if 0 /* reserved for future use */ -+ if (err > 0) -+ fsnotify_modify(file->f_path.dentry); -+#endif -+ -+ return err; -+} -+ -+struct do_xino_fwrite_args { -+ ssize_t *errp; -+ struct file *file; -+ void *buf; -+ size_t size; -+ loff_t *pos; -+}; -+ -+static void call_do_xino_fwrite(void *args) -+{ -+ struct do_xino_fwrite_args *a = args; -+ *a->errp = do_xino_fwrite(a->file, a->buf, a->size, a->pos); -+} -+ -+static ssize_t xino_fwrite_wkq(struct file *file, void *buf, size_t size, -+ loff_t *pos) -+{ -+ ssize_t err; -+ int wkq_err; -+ struct do_xino_fwrite_args args = { -+ .errp = &err, -+ .file = file, -+ .buf = buf, -+ .size = size, -+ .pos = pos -+ }; -+ -+ /* -+ * it breaks RLIMIT_FSIZE and normal user's limit, -+ * users should care about quota and real 'filesystem full.' -+ */ -+ wkq_err = au_wkq_wait(call_do_xino_fwrite, &args); -+ if (unlikely(wkq_err)) -+ err = wkq_err; -+ -+ return err; -+} -+ -+ssize_t xino_fwrite(struct file *file, void *buf, size_t size, loff_t *pos) -+{ -+ ssize_t err; -+ -+ if (rlimit(RLIMIT_FSIZE) == RLIM_INFINITY) { -+ lockdep_off(); -+ err = do_xino_fwrite(file, buf, size, pos); -+ lockdep_on(); -+ } else { -+ lockdep_off(); -+ err = xino_fwrite_wkq(file, buf, size, pos); -+ lockdep_on(); -+ } -+ -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* -+ * inode number bitmap -+ */ -+static const int page_bits = (int)PAGE_SIZE * BITS_PER_BYTE; -+static ino_t xib_calc_ino(unsigned long pindex, int bit) -+{ -+ ino_t ino; -+ -+ AuDebugOn(bit < 0 || page_bits <= bit); -+ ino = AUFS_FIRST_INO + pindex * page_bits + bit; -+ return ino; -+} -+ -+static void xib_calc_bit(ino_t ino, unsigned long *pindex, int *bit) -+{ -+ AuDebugOn(ino < AUFS_FIRST_INO); -+ ino -= AUFS_FIRST_INO; -+ *pindex = ino / page_bits; -+ *bit = ino % page_bits; -+} -+ -+static int xib_pindex(struct super_block *sb, unsigned long pindex) -+{ -+ int err; -+ loff_t pos; -+ ssize_t sz; -+ struct au_sbinfo *sbinfo; -+ struct file *xib; -+ unsigned long *p; -+ -+ sbinfo = au_sbi(sb); -+ MtxMustLock(&sbinfo->si_xib_mtx); -+ AuDebugOn(pindex > ULONG_MAX / PAGE_SIZE -+ || !au_opt_test(sbinfo->si_mntflags, XINO)); -+ -+ if (pindex == sbinfo->si_xib_last_pindex) -+ return 0; -+ -+ xib = sbinfo->si_xib; -+ p = sbinfo->si_xib_buf; -+ pos = sbinfo->si_xib_last_pindex; -+ pos *= PAGE_SIZE; -+ sz = xino_fwrite(xib, p, PAGE_SIZE, &pos); -+ if (unlikely(sz != PAGE_SIZE)) -+ goto out; -+ -+ pos = pindex; -+ pos *= PAGE_SIZE; -+ if (vfsub_f_size_read(xib) >= pos + PAGE_SIZE) -+ sz = xino_fread(xib, p, PAGE_SIZE, &pos); -+ else { -+ memset(p, 0, PAGE_SIZE); -+ sz = xino_fwrite(xib, p, PAGE_SIZE, &pos); -+ } -+ if (sz == PAGE_SIZE) { -+ sbinfo->si_xib_last_pindex = pindex; -+ return 0; /* success */ -+ } -+ -+out: -+ AuIOErr1("write failed (%zd)\n", sz); -+ err = sz; -+ if (sz >= 0) -+ err = -EIO; -+ return err; -+} -+ -+static void au_xib_clear_bit(struct inode *inode) -+{ -+ int err, bit; -+ unsigned long pindex; -+ struct super_block *sb; -+ struct au_sbinfo *sbinfo; -+ -+ AuDebugOn(inode->i_nlink); -+ -+ sb = inode->i_sb; -+ xib_calc_bit(inode->i_ino, &pindex, &bit); -+ AuDebugOn(page_bits <= bit); -+ sbinfo = au_sbi(sb); -+ mutex_lock(&sbinfo->si_xib_mtx); -+ err = xib_pindex(sb, pindex); -+ if (!err) { -+ clear_bit(bit, sbinfo->si_xib_buf); -+ sbinfo->si_xib_next_bit = bit; -+ } -+ mutex_unlock(&sbinfo->si_xib_mtx); -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* -+ * truncate a xino bitmap file -+ */ -+ -+/* todo: slow */ -+static int do_xib_restore(struct super_block *sb, struct file *file, void *page) -+{ -+ int err, bit; -+ ssize_t sz; -+ unsigned long pindex; -+ loff_t pos, pend; -+ struct au_sbinfo *sbinfo; -+ ino_t *ino; -+ unsigned long *p; -+ -+ err = 0; -+ sbinfo = au_sbi(sb); -+ MtxMustLock(&sbinfo->si_xib_mtx); -+ p = sbinfo->si_xib_buf; -+ pend = vfsub_f_size_read(file); -+ pos = 0; -+ while (pos < pend) { -+ sz = xino_fread(file, page, PAGE_SIZE, &pos); -+ err = sz; -+ if (unlikely(sz <= 0)) -+ goto out; -+ -+ err = 0; -+ for (ino = page; sz > 0; ino++, sz -= sizeof(ino)) { -+ if (unlikely(*ino < AUFS_FIRST_INO)) -+ continue; -+ -+ xib_calc_bit(*ino, &pindex, &bit); -+ AuDebugOn(page_bits <= bit); -+ err = xib_pindex(sb, pindex); -+ if (!err) -+ set_bit(bit, p); -+ else -+ goto out; -+ } -+ } -+ -+out: -+ return err; -+} -+ -+static int xib_restore(struct super_block *sb) -+{ -+ int err, i; -+ unsigned int nfile; -+ aufs_bindex_t bindex, bbot; -+ void *page; -+ struct au_branch *br; -+ struct au_xino *xi; -+ struct file *file; -+ -+ err = -ENOMEM; -+ page = (void *)__get_free_page(GFP_NOFS); -+ if (unlikely(!page)) -+ goto out; -+ -+ err = 0; -+ bbot = au_sbbot(sb); -+ for (bindex = 0; !err && bindex <= bbot; bindex++) -+ if (!bindex || is_sb_shared(sb, bindex, bindex - 1) < 0) { -+ br = au_sbr(sb, bindex); -+ xi = br->br_xino; -+ nfile = xi->xi_nfile; -+ for (i = 0; i < nfile; i++) { -+ file = au_xino_file(xi, i); -+ if (file) -+ err = do_xib_restore(sb, file, page); -+ } -+ } else -+ AuDbg("skip shared b%d\n", bindex); -+ free_page((unsigned long)page); -+ -+out: -+ return err; -+} -+ -+int au_xib_trunc(struct super_block *sb) -+{ -+ int err; -+ ssize_t sz; -+ loff_t pos; -+ struct au_sbinfo *sbinfo; -+ unsigned long *p; -+ struct file *file; -+ -+ SiMustWriteLock(sb); -+ -+ err = 0; -+ sbinfo = au_sbi(sb); -+ if (!au_opt_test(sbinfo->si_mntflags, XINO)) -+ goto out; -+ -+ file = sbinfo->si_xib; -+ if (vfsub_f_size_read(file) <= PAGE_SIZE) -+ goto out; -+ -+ file = au_xino_create2(sb, &sbinfo->si_xib->f_path, NULL); -+ err = PTR_ERR(file); -+ if (IS_ERR(file)) -+ goto out; -+ fput(sbinfo->si_xib); -+ sbinfo->si_xib = file; -+ -+ p = sbinfo->si_xib_buf; -+ memset(p, 0, PAGE_SIZE); -+ pos = 0; -+ sz = xino_fwrite(sbinfo->si_xib, p, PAGE_SIZE, &pos); -+ if (unlikely(sz != PAGE_SIZE)) { -+ err = sz; -+ AuIOErr("err %d\n", err); -+ if (sz >= 0) -+ err = -EIO; -+ goto out; -+ } -+ -+ mutex_lock(&sbinfo->si_xib_mtx); -+ /* mnt_want_write() is unnecessary here */ -+ err = xib_restore(sb); -+ mutex_unlock(&sbinfo->si_xib_mtx); -+ -+out: -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+struct au_xino *au_xino_alloc(unsigned int nfile) -+{ -+ struct au_xino *xi; -+ -+ xi = kzalloc(sizeof(*xi), GFP_NOFS); -+ if (unlikely(!xi)) -+ goto out; -+ xi->xi_nfile = nfile; -+ xi->xi_file = kcalloc(nfile, sizeof(*xi->xi_file), GFP_NOFS); -+ if (unlikely(!xi->xi_file)) -+ goto out_free; -+ -+ xi->xi_nondir.total = 8; /* initial size */ -+ xi->xi_nondir.array = kcalloc(xi->xi_nondir.total, sizeof(ino_t), -+ GFP_NOFS); -+ if (unlikely(!xi->xi_nondir.array)) -+ goto out_file; -+ -+ spin_lock_init(&xi->xi_nondir.spin); -+ init_waitqueue_head(&xi->xi_nondir.wqh); -+ mutex_init(&xi->xi_mtx); -+ INIT_HLIST_BL_HEAD(&xi->xi_writing); -+ atomic_set(&xi->xi_truncating, 0); -+ kref_init(&xi->xi_kref); -+ goto out; /* success */ -+ -+out_file: -+ au_kfree_try_rcu(xi->xi_file); -+out_free: -+ au_kfree_rcu(xi); -+ xi = NULL; -+out: -+ return xi; -+} -+ -+static int au_xino_init(struct au_branch *br, int idx, struct file *file) -+{ -+ int err; -+ struct au_xino *xi; -+ -+ err = 0; -+ xi = au_xino_alloc(idx + 1); -+ if (unlikely(!xi)) { -+ err = -ENOMEM; -+ goto out; -+ } -+ -+ if (file) -+ get_file(file); -+ xi->xi_file[idx] = file; -+ AuDebugOn(br->br_xino); -+ br->br_xino = xi; -+ -+out: -+ return err; -+} -+ -+static void au_xino_release(struct kref *kref) -+{ -+ struct au_xino *xi; -+ int i; -+ unsigned long ul; -+ struct hlist_bl_head *hbl; -+ struct hlist_bl_node *pos, *n; -+ struct au_xi_writing *p; -+ -+ xi = container_of(kref, struct au_xino, xi_kref); -+ for (i = 0; i < xi->xi_nfile; i++) -+ if (xi->xi_file[i]) -+ fput(xi->xi_file[i]); -+ for (i = xi->xi_nondir.total - 1; i >= 0; i--) -+ AuDebugOn(xi->xi_nondir.array[i]); -+ mutex_destroy(&xi->xi_mtx); -+ hbl = &xi->xi_writing; -+ ul = au_hbl_count(hbl); -+ if (unlikely(ul)) { -+ pr_warn("xi_writing %lu\n", ul); -+ hlist_bl_lock(hbl); -+ hlist_bl_for_each_entry_safe(p, pos, n, hbl, node) { -+ hlist_bl_del(&p->node); -+ /* kmemleak reported au_kfree_rcu() doesn't free it */ -+ kfree(p); -+ } -+ hlist_bl_unlock(hbl); -+ } -+ au_kfree_try_rcu(xi->xi_file); -+ au_kfree_try_rcu(xi->xi_nondir.array); -+ au_kfree_rcu(xi); -+} -+ -+int au_xino_put(struct au_branch *br) -+{ -+ int ret; -+ struct au_xino *xi; -+ -+ ret = 0; -+ xi = br->br_xino; -+ if (xi) { -+ br->br_xino = NULL; -+ ret = kref_put(&xi->xi_kref, au_xino_release); -+ } -+ -+ return ret; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* -+ * xino mount option handlers -+ */ -+ -+/* xino bitmap */ -+static void xino_clear_xib(struct super_block *sb) -+{ -+ struct au_sbinfo *sbinfo; -+ -+ SiMustWriteLock(sb); -+ -+ sbinfo = au_sbi(sb); -+ if (sbinfo->si_xib) -+ fput(sbinfo->si_xib); -+ sbinfo->si_xib = NULL; -+ if (sbinfo->si_xib_buf) -+ free_page((unsigned long)sbinfo->si_xib_buf); -+ sbinfo->si_xib_buf = NULL; -+} -+ -+static int au_xino_set_xib(struct super_block *sb, struct path *path) -+{ -+ int err; -+ loff_t pos; -+ struct au_sbinfo *sbinfo; -+ struct file *file; -+ struct super_block *xi_sb; -+ -+ SiMustWriteLock(sb); -+ -+ sbinfo = au_sbi(sb); -+ file = au_xino_create2(sb, path, sbinfo->si_xib); -+ err = PTR_ERR(file); -+ if (IS_ERR(file)) -+ goto out; -+ if (sbinfo->si_xib) -+ fput(sbinfo->si_xib); -+ sbinfo->si_xib = file; -+ xi_sb = file_inode(file)->i_sb; -+ sbinfo->si_ximaxent = xi_sb->s_maxbytes; -+ if (unlikely(sbinfo->si_ximaxent < PAGE_SIZE)) { -+ err = -EIO; -+ pr_err("s_maxbytes(%llu) on %s is too small\n", -+ (u64)sbinfo->si_ximaxent, au_sbtype(xi_sb)); -+ goto out_unset; -+ } -+ sbinfo->si_ximaxent /= sizeof(ino_t); -+ -+ err = -ENOMEM; -+ if (!sbinfo->si_xib_buf) -+ sbinfo->si_xib_buf = (void *)get_zeroed_page(GFP_NOFS); -+ if (unlikely(!sbinfo->si_xib_buf)) -+ goto out_unset; -+ -+ sbinfo->si_xib_last_pindex = 0; -+ sbinfo->si_xib_next_bit = 0; -+ if (vfsub_f_size_read(file) < PAGE_SIZE) { -+ pos = 0; -+ err = xino_fwrite(file, sbinfo->si_xib_buf, PAGE_SIZE, &pos); -+ if (unlikely(err != PAGE_SIZE)) -+ goto out_free; -+ } -+ err = 0; -+ goto out; /* success */ -+ -+out_free: -+ if (sbinfo->si_xib_buf) -+ free_page((unsigned long)sbinfo->si_xib_buf); -+ sbinfo->si_xib_buf = NULL; -+ if (err >= 0) -+ err = -EIO; -+out_unset: -+ fput(sbinfo->si_xib); -+ sbinfo->si_xib = NULL; -+out: -+ AuTraceErr(err); -+ return err; -+} -+ -+/* xino for each branch */ -+static void xino_clear_br(struct super_block *sb) -+{ -+ aufs_bindex_t bindex, bbot; -+ struct au_branch *br; -+ -+ bbot = au_sbbot(sb); -+ for (bindex = 0; bindex <= bbot; bindex++) { -+ br = au_sbr(sb, bindex); -+ AuDebugOn(!br); -+ au_xino_put(br); -+ } -+} -+ -+static void au_xino_set_br_shared(struct super_block *sb, struct au_branch *br, -+ aufs_bindex_t bshared) -+{ -+ struct au_branch *brshared; -+ -+ brshared = au_sbr(sb, bshared); -+ AuDebugOn(!brshared->br_xino); -+ AuDebugOn(!brshared->br_xino->xi_file); -+ if (br->br_xino != brshared->br_xino) { -+ au_xino_get(brshared); -+ au_xino_put(br); -+ br->br_xino = brshared->br_xino; -+ } -+} -+ -+struct au_xino_do_set_br { -+ struct au_branch *br; -+ ino_t h_ino; -+ aufs_bindex_t bshared; -+}; -+ -+static int au_xino_do_set_br(struct super_block *sb, struct path *path, -+ struct au_xino_do_set_br *args) -+{ -+ int err; -+ struct au_xi_calc calc; -+ struct file *file; -+ struct au_branch *br; -+ struct au_xi_new xinew = { -+ .base = path -+ }; -+ -+ br = args->br; -+ xinew.xi = br->br_xino; -+ au_xi_calc(sb, args->h_ino, &calc); -+ xinew.copy_src = au_xino_file(xinew.xi, calc.idx); -+ if (args->bshared >= 0) -+ /* shared xino */ -+ au_xino_set_br_shared(sb, br, args->bshared); -+ else if (!xinew.xi) { -+ /* new xino */ -+ err = au_xino_init(br, calc.idx, xinew.copy_src); -+ if (unlikely(err)) -+ goto out; -+ } -+ -+ /* force re-creating */ -+ xinew.xi = br->br_xino; -+ xinew.idx = calc.idx; -+ mutex_lock(&xinew.xi->xi_mtx); -+ file = au_xi_new(sb, &xinew); -+ mutex_unlock(&xinew.xi->xi_mtx); -+ err = PTR_ERR(file); -+ if (IS_ERR(file)) -+ goto out; -+ AuDebugOn(!file); -+ -+ err = au_xino_do_write(file, &calc, AUFS_ROOT_INO); -+ if (unlikely(err)) -+ au_xino_put(br); -+ -+out: -+ AuTraceErr(err); -+ return err; -+} -+ -+static int au_xino_set_br(struct super_block *sb, struct path *path) -+{ -+ int err; -+ aufs_bindex_t bindex, bbot; -+ struct au_xino_do_set_br args; -+ struct inode *inode; -+ -+ SiMustWriteLock(sb); -+ -+ bbot = au_sbbot(sb); -+ inode = d_inode(sb->s_root); -+ for (bindex = 0; bindex <= bbot; bindex++) { -+ args.h_ino = au_h_iptr(inode, bindex)->i_ino; -+ args.br = au_sbr(sb, bindex); -+ args.bshared = is_sb_shared(sb, bindex, bindex - 1); -+ err = au_xino_do_set_br(sb, path, &args); -+ if (unlikely(err)) -+ break; -+ } -+ -+ AuTraceErr(err); -+ return err; -+} -+ -+void au_xino_clr(struct super_block *sb) -+{ -+ struct au_sbinfo *sbinfo; -+ -+ au_xigen_clr(sb); -+ xino_clear_xib(sb); -+ xino_clear_br(sb); -+ dbgaufs_brs_del(sb, 0); -+ sbinfo = au_sbi(sb); -+ /* lvalue, do not call au_mntflags() */ -+ au_opt_clr(sbinfo->si_mntflags, XINO); -+} -+ -+int au_xino_set(struct super_block *sb, struct au_opt_xino *xiopt, int remount) -+{ -+ int err, skip; -+ struct dentry *dentry, *parent, *cur_dentry, *cur_parent; -+ struct qstr *dname, *cur_name; -+ struct file *cur_xino; -+ struct au_sbinfo *sbinfo; -+ struct path *path, *cur_path; -+ -+ SiMustWriteLock(sb); -+ -+ err = 0; -+ sbinfo = au_sbi(sb); -+ path = &xiopt->file->f_path; -+ dentry = path->dentry; -+ parent = dget_parent(dentry); -+ if (remount) { -+ skip = 0; -+ cur_xino = sbinfo->si_xib; -+ if (cur_xino) { -+ cur_path = &cur_xino->f_path; -+ cur_dentry = cur_path->dentry; -+ cur_parent = dget_parent(cur_dentry); -+ cur_name = &cur_dentry->d_name; -+ dname = &dentry->d_name; -+ skip = (cur_parent == parent -+ && au_qstreq(dname, cur_name)); -+ dput(cur_parent); -+ } -+ if (skip) -+ goto out; -+ } -+ -+ au_opt_set(sbinfo->si_mntflags, XINO); -+ err = au_xino_set_xib(sb, path); -+ /* si_x{read,write} are set */ -+ if (!err) -+ err = au_xigen_set(sb, path); -+ if (!err) -+ err = au_xino_set_br(sb, path); -+ if (!err) { -+ dbgaufs_brs_add(sb, 0, /*topdown*/1); -+ goto out; /* success */ -+ } -+ -+ /* reset all */ -+ AuIOErr("failed setting xino(%d).\n", err); -+ au_xino_clr(sb); -+ -+out: -+ dput(parent); -+ return err; -+} -+ -+/* -+ * create a xinofile at the default place/path. -+ */ -+struct file *au_xino_def(struct super_block *sb) -+{ -+ struct file *file; -+ char *page, *p; -+ struct au_branch *br; -+ struct super_block *h_sb; -+ struct path path; -+ aufs_bindex_t bbot, bindex, bwr; -+ -+ br = NULL; -+ bbot = au_sbbot(sb); -+ bwr = -1; -+ for (bindex = 0; bindex <= bbot; bindex++) { -+ br = au_sbr(sb, bindex); -+ if (au_br_writable(br->br_perm) -+ && !au_test_fs_bad_xino(au_br_sb(br))) { -+ bwr = bindex; -+ break; -+ } -+ } -+ -+ if (bwr >= 0) { -+ file = ERR_PTR(-ENOMEM); -+ page = (void *)__get_free_page(GFP_NOFS); -+ if (unlikely(!page)) -+ goto out; -+ path.mnt = au_br_mnt(br); -+ path.dentry = au_h_dptr(sb->s_root, bwr); -+ p = d_path(&path, page, PATH_MAX - sizeof(AUFS_XINO_FNAME)); -+ file = (void *)p; -+ if (!IS_ERR(p)) { -+ strcat(p, "/" AUFS_XINO_FNAME); -+ AuDbg("%s\n", p); -+ file = au_xino_create(sb, p, /*silent*/0, /*wbrtop*/1); -+ } -+ free_page((unsigned long)page); -+ } else { -+ file = au_xino_create(sb, AUFS_XINO_DEFPATH, /*silent*/0, -+ /*wbrtop*/0); -+ if (IS_ERR(file)) -+ goto out; -+ h_sb = file->f_path.dentry->d_sb; -+ if (unlikely(au_test_fs_bad_xino(h_sb))) { -+ pr_err("xino doesn't support %s(%s)\n", -+ AUFS_XINO_DEFPATH, au_sbtype(h_sb)); -+ fput(file); -+ file = ERR_PTR(-EINVAL); -+ } -+ } -+ -+out: -+ return file; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* -+ * initialize the xinofile for the specified branch @br -+ * at the place/path where @base_file indicates. -+ * test whether another branch is on the same filesystem or not, -+ * if found then share the xinofile with another branch. -+ */ -+int au_xino_init_br(struct super_block *sb, struct au_branch *br, ino_t h_ino, -+ struct path *base) -+{ -+ int err; -+ struct au_xino_do_set_br args = { -+ .h_ino = h_ino, -+ .br = br -+ }; -+ -+ args.bshared = sbr_find_shared(sb, /*btop*/0, au_sbbot(sb), -+ au_br_sb(br)); -+ err = au_xino_do_set_br(sb, base, &args); -+ if (unlikely(err)) -+ au_xino_put(br); -+ -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* -+ * get an unused inode number from bitmap -+ */ -+ino_t au_xino_new_ino(struct super_block *sb) -+{ -+ ino_t ino; -+ unsigned long *p, pindex, ul, pend; -+ struct au_sbinfo *sbinfo; -+ struct file *file; -+ int free_bit, err; -+ -+ if (!au_opt_test(au_mntflags(sb), XINO)) -+ return iunique(sb, AUFS_FIRST_INO); -+ -+ sbinfo = au_sbi(sb); -+ mutex_lock(&sbinfo->si_xib_mtx); -+ p = sbinfo->si_xib_buf; -+ free_bit = sbinfo->si_xib_next_bit; -+ if (free_bit < page_bits && !test_bit(free_bit, p)) -+ goto out; /* success */ -+ free_bit = find_first_zero_bit(p, page_bits); -+ if (free_bit < page_bits) -+ goto out; /* success */ -+ -+ pindex = sbinfo->si_xib_last_pindex; -+ for (ul = pindex - 1; ul < ULONG_MAX; ul--) { -+ err = xib_pindex(sb, ul); -+ if (unlikely(err)) -+ goto out_err; -+ free_bit = find_first_zero_bit(p, page_bits); -+ if (free_bit < page_bits) -+ goto out; /* success */ -+ } -+ -+ file = sbinfo->si_xib; -+ pend = vfsub_f_size_read(file) / PAGE_SIZE; -+ for (ul = pindex + 1; ul <= pend; ul++) { -+ err = xib_pindex(sb, ul); -+ if (unlikely(err)) -+ goto out_err; -+ free_bit = find_first_zero_bit(p, page_bits); -+ if (free_bit < page_bits) -+ goto out; /* success */ -+ } -+ BUG(); -+ -+out: -+ set_bit(free_bit, p); -+ sbinfo->si_xib_next_bit = free_bit + 1; -+ pindex = sbinfo->si_xib_last_pindex; -+ mutex_unlock(&sbinfo->si_xib_mtx); -+ ino = xib_calc_ino(pindex, free_bit); -+ AuDbg("i%lu\n", (unsigned long)ino); -+ return ino; -+out_err: -+ mutex_unlock(&sbinfo->si_xib_mtx); -+ AuDbg("i0\n"); -+ return 0; -+} -+ -+/* for s_op->delete_inode() */ -+void au_xino_delete_inode(struct inode *inode, const int unlinked) -+{ -+ int err; -+ unsigned int mnt_flags; -+ aufs_bindex_t bindex, bbot, bi; -+ unsigned char try_trunc; -+ struct au_iinfo *iinfo; -+ struct super_block *sb; -+ struct au_hinode *hi; -+ struct inode *h_inode; -+ struct au_branch *br; -+ struct au_xi_calc calc; -+ struct file *file; -+ -+ AuDebugOn(au_is_bad_inode(inode)); -+ -+ sb = inode->i_sb; -+ mnt_flags = au_mntflags(sb); -+ if (!au_opt_test(mnt_flags, XINO) -+ || inode->i_ino == AUFS_ROOT_INO) -+ return; -+ -+ if (unlinked) { -+ au_xigen_inc(inode); -+ au_xib_clear_bit(inode); -+ } -+ -+ iinfo = au_ii(inode); -+ bindex = iinfo->ii_btop; -+ if (bindex < 0) -+ return; -+ -+ try_trunc = !!au_opt_test(mnt_flags, TRUNC_XINO); -+ hi = au_hinode(iinfo, bindex); -+ bbot = iinfo->ii_bbot; -+ for (; bindex <= bbot; bindex++, hi++) { -+ h_inode = hi->hi_inode; -+ if (!h_inode -+ || (!unlinked && h_inode->i_nlink)) -+ continue; -+ -+ /* inode may not be revalidated */ -+ bi = au_br_index(sb, hi->hi_id); -+ if (bi < 0) -+ continue; -+ -+ br = au_sbr(sb, bi); -+ au_xi_calc(sb, h_inode->i_ino, &calc); -+ file = au_xino_file(br->br_xino, calc.idx); -+ if (IS_ERR_OR_NULL(file)) -+ continue; -+ -+ err = au_xino_do_write(file, &calc, /*ino*/0); -+ if (!err && try_trunc -+ && au_test_fs_trunc_xino(au_br_sb(br))) -+ xino_try_trunc(sb, br); -+ } -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+static int au_xinondir_find(struct au_xino *xi, ino_t h_ino) -+{ -+ int found, total, i; -+ -+ found = -1; -+ total = xi->xi_nondir.total; -+ for (i = 0; i < total; i++) { -+ if (xi->xi_nondir.array[i] != h_ino) -+ continue; -+ found = i; -+ break; -+ } -+ -+ return found; -+} -+ -+static int au_xinondir_expand(struct au_xino *xi) -+{ -+ int err, sz; -+ ino_t *p; -+ -+ BUILD_BUG_ON(KMALLOC_MAX_SIZE > INT_MAX); -+ -+ err = -ENOMEM; -+ sz = xi->xi_nondir.total * sizeof(ino_t); -+ if (unlikely(sz > KMALLOC_MAX_SIZE / 2)) -+ goto out; -+ p = au_kzrealloc(xi->xi_nondir.array, sz, sz << 1, GFP_ATOMIC, -+ /*may_shrink*/0); -+ if (p) { -+ xi->xi_nondir.array = p; -+ xi->xi_nondir.total <<= 1; -+ AuDbg("xi_nondir.total %d\n", xi->xi_nondir.total); -+ err = 0; -+ } -+ -+out: -+ return err; -+} -+ -+void au_xinondir_leave(struct super_block *sb, aufs_bindex_t bindex, -+ ino_t h_ino, int idx) -+{ -+ struct au_xino *xi; -+ -+ AuDebugOn(!au_opt_test(au_mntflags(sb), XINO)); -+ xi = au_sbr(sb, bindex)->br_xino; -+ AuDebugOn(idx < 0 || xi->xi_nondir.total <= idx); -+ -+ spin_lock(&xi->xi_nondir.spin); -+ AuDebugOn(xi->xi_nondir.array[idx] != h_ino); -+ xi->xi_nondir.array[idx] = 0; -+ spin_unlock(&xi->xi_nondir.spin); -+ wake_up_all(&xi->xi_nondir.wqh); -+} -+ -+int au_xinondir_enter(struct super_block *sb, aufs_bindex_t bindex, ino_t h_ino, -+ int *idx) -+{ -+ int err, found, empty; -+ struct au_xino *xi; -+ -+ err = 0; -+ *idx = -1; -+ if (!au_opt_test(au_mntflags(sb), XINO)) -+ goto out; /* no xino */ -+ -+ xi = au_sbr(sb, bindex)->br_xino; -+ -+again: -+ spin_lock(&xi->xi_nondir.spin); -+ found = au_xinondir_find(xi, h_ino); -+ if (found == -1) { -+ empty = au_xinondir_find(xi, /*h_ino*/0); -+ if (empty == -1) { -+ empty = xi->xi_nondir.total; -+ err = au_xinondir_expand(xi); -+ if (unlikely(err)) -+ goto out_unlock; -+ } -+ xi->xi_nondir.array[empty] = h_ino; -+ *idx = empty; -+ } else { -+ spin_unlock(&xi->xi_nondir.spin); -+ wait_event(xi->xi_nondir.wqh, -+ xi->xi_nondir.array[found] != h_ino); -+ goto again; -+ } -+ -+out_unlock: -+ spin_unlock(&xi->xi_nondir.spin); -+out: -+ return err; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+int au_xino_path(struct seq_file *seq, struct file *file) -+{ -+ int err; -+ -+ err = au_seq_path(seq, &file->f_path); -+ if (unlikely(err)) -+ goto out; -+ -+#define Deleted "\\040(deleted)" -+ seq->count -= sizeof(Deleted) - 1; -+ AuDebugOn(memcmp(seq->buf + seq->count, Deleted, -+ sizeof(Deleted) - 1)); -+#undef Deleted -+ -+out: -+ return err; -+} -diff --git a/fs/dcache.c b/fs/dcache.c -index ea0485861d93..ddca6240e0db 100644 ---- a/fs/dcache.c -+++ b/fs/dcache.c -@@ -1285,7 +1285,7 @@ enum d_walk_ret { - * - * The @enter() callbacks are called with d_lock held. - */ --static void d_walk(struct dentry *parent, void *data, -+void d_walk(struct dentry *parent, void *data, - enum d_walk_ret (*enter)(void *, struct dentry *)) - { - struct dentry *this_parent; -diff --git a/fs/fcntl.c b/fs/fcntl.c -index 19ac5baad50f..073ca6af500f 100644 ---- a/fs/fcntl.c -+++ b/fs/fcntl.c -@@ -32,7 +32,7 @@ - - #define SETFL_MASK (O_APPEND | O_NONBLOCK | O_NDELAY | O_DIRECT | O_NOATIME) - --static int setfl(int fd, struct file * filp, unsigned long arg) -+int setfl(int fd, struct file *filp, unsigned long arg) - { - struct inode * inode = file_inode(filp); - int error = 0; -@@ -63,6 +63,8 @@ static int setfl(int fd, struct file * filp, unsigned long arg) - - if (filp->f_op->check_flags) - error = filp->f_op->check_flags(arg); -+ if (!error && filp->f_op->setfl) -+ error = filp->f_op->setfl(filp, arg); - if (error) - return error; - -diff --git a/fs/inode.c b/fs/inode.c -index 9d78c37b00b8..e7f0c614a58f 100644 ---- a/fs/inode.c -+++ b/fs/inode.c -@@ -1770,7 +1770,7 @@ EXPORT_SYMBOL(generic_update_time); - * This does the actual work of updating an inodes time or version. Must have - * had called mnt_want_write() before calling this. - */ --static int update_time(struct inode *inode, struct timespec64 *time, int flags) -+int update_time(struct inode *inode, struct timespec64 *time, int flags) - { - if (inode->i_op->update_time) - return inode->i_op->update_time(inode, time, flags); -diff --git a/fs/namespace.c b/fs/namespace.c -index cebaa3e81794..451dee24a546 100644 ---- a/fs/namespace.c -+++ b/fs/namespace.c -@@ -792,6 +792,12 @@ static inline int check_mnt(struct mount *mnt) - return mnt->mnt_ns == current->nsproxy->mnt_ns; - } - -+/* for aufs, CONFIG_AUFS_BR_FUSE */ -+int is_current_mnt_ns(struct vfsmount *mnt) -+{ -+ return check_mnt(real_mount(mnt)); -+} -+ - /* - * vfsmount lock must be held for write - */ -diff --git a/fs/proc/base.c b/fs/proc/base.c -index b362523a9829..669448bb8a73 100644 ---- a/fs/proc/base.c -+++ b/fs/proc/base.c -@@ -2184,7 +2184,7 @@ static int map_files_get_link(struct dentry *dentry, struct path *path) - rc = -ENOENT; - vma = find_exact_vma(mm, vm_start, vm_end); - if (vma && vma->vm_file) { -- *path = vma->vm_file->f_path; -+ *path = vma_pr_or_file(vma)->f_path; - path_get(path); - rc = 0; - } -diff --git a/fs/proc/nommu.c b/fs/proc/nommu.c -index 13452b32e2bd..38acccfef9d4 100644 ---- a/fs/proc/nommu.c -+++ b/fs/proc/nommu.c -@@ -40,7 +40,10 @@ static int nommu_region_show(struct seq_file *m, struct vm_region *region) - file = region->vm_file; - - if (file) { -- struct inode *inode = file_inode(region->vm_file); -+ struct inode *inode; -+ -+ file = vmr_pr_or_file(region); -+ inode = file_inode(file); - dev = inode->i_sb->s_dev; - ino = inode->i_ino; - } -diff --git a/fs/proc/task_mmu.c b/fs/proc/task_mmu.c -index ee5a235b3056..80a46dcede7b 100644 ---- a/fs/proc/task_mmu.c -+++ b/fs/proc/task_mmu.c -@@ -280,7 +280,10 @@ show_map_vma(struct seq_file *m, struct vm_area_struct *vma) - const char *name = NULL; - - if (file) { -- struct inode *inode = file_inode(vma->vm_file); -+ struct inode *inode; -+ -+ file = vma_pr_or_file(vma); -+ inode = file_inode(file); - dev = inode->i_sb->s_dev; - ino = inode->i_ino; - pgoff = ((loff_t)vma->vm_pgoff) << PAGE_SHIFT; -@@ -1855,7 +1858,7 @@ static int show_numa_map(struct seq_file *m, void *v) - struct proc_maps_private *proc_priv = &numa_priv->proc_maps; - struct vm_area_struct *vma = v; - struct numa_maps *md = &numa_priv->md; -- struct file *file = vma->vm_file; -+ struct file *file = vma_pr_or_file(vma); - struct mm_struct *mm = vma->vm_mm; - struct mempolicy *pol; - char buffer[64]; -diff --git a/fs/proc/task_nommu.c b/fs/proc/task_nommu.c -index a6d21fc0033c..02c2de31196e 100644 ---- a/fs/proc/task_nommu.c -+++ b/fs/proc/task_nommu.c -@@ -155,7 +155,10 @@ static int nommu_vma_show(struct seq_file *m, struct vm_area_struct *vma) - file = vma->vm_file; - - if (file) { -- struct inode *inode = file_inode(vma->vm_file); -+ struct inode *inode; -+ -+ file = vma_pr_or_file(vma); -+ inode = file_inode(file); - dev = inode->i_sb->s_dev; - ino = inode->i_ino; - pgoff = (loff_t)vma->vm_pgoff << PAGE_SHIFT; -diff --git a/fs/splice.c b/fs/splice.c -index 866d5c2367b2..55b535626208 100644 ---- a/fs/splice.c -+++ b/fs/splice.c -@@ -756,8 +756,8 @@ static int warn_unsupported(struct file *file, const char *op) - /* - * Attempt to initiate a splice from pipe to file. - */ --static long do_splice_from(struct pipe_inode_info *pipe, struct file *out, -- loff_t *ppos, size_t len, unsigned int flags) -+long do_splice_from(struct pipe_inode_info *pipe, struct file *out, -+ loff_t *ppos, size_t len, unsigned int flags) - { - if (unlikely(!out->f_op->splice_write)) - return warn_unsupported(out, "write"); -@@ -767,9 +767,9 @@ static long do_splice_from(struct pipe_inode_info *pipe, struct file *out, - /* - * Attempt to initiate a splice from a file to a pipe. - */ --static long do_splice_to(struct file *in, loff_t *ppos, -- struct pipe_inode_info *pipe, size_t len, -- unsigned int flags) -+long do_splice_to(struct file *in, loff_t *ppos, -+ struct pipe_inode_info *pipe, size_t len, -+ unsigned int flags) - { - int ret; - -diff --git a/fs/sync.c b/fs/sync.c -index 1373a610dc78..b7b5a0a0df6f 100644 ---- a/fs/sync.c -+++ b/fs/sync.c -@@ -28,7 +28,7 @@ - * wait == 1 case since in that case write_inode() functions do - * sync_dirty_buffer() and thus effectively write one block at a time. - */ --static int __sync_filesystem(struct super_block *sb, int wait) -+int __sync_filesystem(struct super_block *sb, int wait) - { - if (wait) - sync_inodes_sb(sb); -diff --git a/include/linux/fs.h b/include/linux/fs.h -index 8667d0cdc71e..837dd6e727e4 100644 ---- a/include/linux/fs.h -+++ b/include/linux/fs.h -@@ -1332,6 +1332,7 @@ extern void fasync_free(struct fasync_struct *); - /* can be called from interrupts */ - extern void kill_fasync(struct fasync_struct **, int, int); - -+extern int setfl(int fd, struct file *filp, unsigned long arg); - extern void __f_setown(struct file *filp, struct pid *, enum pid_type, int force); - extern int f_setown(struct file *filp, unsigned long arg, int force); - extern void f_delown(struct file *filp); -@@ -1843,6 +1844,7 @@ struct file_operations { - ssize_t (*sendpage) (struct file *, struct page *, int, size_t, loff_t *, int); - unsigned long (*get_unmapped_area)(struct file *, unsigned long, unsigned long, unsigned long, unsigned long); - int (*check_flags)(int); -+ int (*setfl)(struct file *, unsigned long); - int (*flock) (struct file *, int, struct file_lock *); - ssize_t (*splice_write)(struct pipe_inode_info *, struct file *, loff_t *, size_t, unsigned int); - ssize_t (*splice_read)(struct file *, loff_t *, struct pipe_inode_info *, size_t, unsigned int); -@@ -2328,6 +2330,7 @@ extern int current_umask(void); - extern void ihold(struct inode * inode); - extern void iput(struct inode *); - extern int generic_update_time(struct inode *, struct timespec64 *, int); -+extern int update_time(struct inode *, struct timespec64 *, int); - - /* /sys/fs */ - extern struct kobject *fs_kobj; -@@ -2564,6 +2567,7 @@ static inline bool sb_is_blkdev_sb(struct super_block *sb) - } - - void emergency_thaw_all(void); -+extern int __sync_filesystem(struct super_block *, int); - extern int sync_filesystem(struct super_block *); - extern const struct file_operations def_blk_fops; - extern const struct file_operations def_chr_fops; -diff --git a/include/linux/lockdep.h b/include/linux/lockdep.h -index f5594879175a..93bb86198167 100644 ---- a/include/linux/lockdep.h -+++ b/include/linux/lockdep.h -@@ -241,6 +241,8 @@ static inline int lockdep_match_key(struct lockdep_map *lock, - return lock->key == key; - } - -+struct lock_class *lockdep_hlock_class(struct held_lock *hlock); -+ - /* - * Acquire a lock. - * -@@ -375,6 +377,7 @@ static inline void lockdep_unregister_key(struct lock_class_key *key) - - #define lockdep_depth(tsk) (0) - -+#define lockdep_is_held(lock) (1) - #define lockdep_is_held_type(l, r) (1) - - #define lockdep_assert_held(l) do { (void)(l); } while (0) -diff --git a/include/linux/mm.h b/include/linux/mm.h -index db6ae4d3fb4e..1a632192d9d9 100644 ---- a/include/linux/mm.h -+++ b/include/linux/mm.h -@@ -1712,6 +1712,28 @@ static inline void unmap_shared_mapping_range(struct address_space *mapping, - unmap_mapping_range(mapping, holebegin, holelen, 0); - } - -+extern void vma_do_file_update_time(struct vm_area_struct *, const char[], int); -+extern struct file *vma_do_pr_or_file(struct vm_area_struct *, const char[], -+ int); -+extern void vma_do_get_file(struct vm_area_struct *, const char[], int); -+extern void vma_do_fput(struct vm_area_struct *, const char[], int); -+ -+#define vma_file_update_time(vma) vma_do_file_update_time(vma, __func__, \ -+ __LINE__) -+#define vma_pr_or_file(vma) vma_do_pr_or_file(vma, __func__, \ -+ __LINE__) -+#define vma_get_file(vma) vma_do_get_file(vma, __func__, __LINE__) -+#define vma_fput(vma) vma_do_fput(vma, __func__, __LINE__) -+ -+#ifndef CONFIG_MMU -+extern struct file *vmr_do_pr_or_file(struct vm_region *, const char[], int); -+extern void vmr_do_fput(struct vm_region *, const char[], int); -+ -+#define vmr_pr_or_file(region) vmr_do_pr_or_file(region, __func__, \ -+ __LINE__) -+#define vmr_fput(region) vmr_do_fput(region, __func__, __LINE__) -+#endif /* !CONFIG_MMU */ -+ - extern int access_process_vm(struct task_struct *tsk, unsigned long addr, - void *buf, int len, unsigned int gup_flags); - extern int access_remote_vm(struct mm_struct *mm, unsigned long addr, -diff --git a/include/linux/mm_types.h b/include/linux/mm_types.h -index 5a9238f6caad..ad387c3cb14f 100644 ---- a/include/linux/mm_types.h -+++ b/include/linux/mm_types.h -@@ -280,6 +280,7 @@ struct vm_region { - unsigned long vm_top; /* region allocated to here */ - unsigned long vm_pgoff; /* the offset in vm_file corresponding to vm_start */ - struct file *vm_file; /* the backing file or NULL */ -+ struct file *vm_prfile; /* the virtual backing file or NULL */ - - int vm_usage; /* region usage count (access under nommu_region_sem) */ - bool vm_icache_flushed : 1; /* true if the icache has been flushed for -@@ -359,6 +360,7 @@ struct vm_area_struct { - unsigned long vm_pgoff; /* Offset (within vm_file) in PAGE_SIZE - units */ - struct file * vm_file; /* File we map to (can be NULL). */ -+ struct file *vm_prfile; /* shadow of vm_file */ - void * vm_private_data; /* was vm_pte (shared mem) */ - - #ifdef CONFIG_SWAP -diff --git a/include/linux/mnt_namespace.h b/include/linux/mnt_namespace.h -index 8f882f5881e8..6b9808f09843 100644 ---- a/include/linux/mnt_namespace.h -+++ b/include/linux/mnt_namespace.h -@@ -7,12 +7,15 @@ struct mnt_namespace; - struct fs_struct; - struct user_namespace; - struct ns_common; -+struct vfsmount; - - extern struct mnt_namespace *copy_mnt_ns(unsigned long, struct mnt_namespace *, - struct user_namespace *, struct fs_struct *); - extern void put_mnt_ns(struct mnt_namespace *ns); - extern struct ns_common *from_mnt_ns(struct mnt_namespace *); - -+extern int is_current_mnt_ns(struct vfsmount *mnt); -+ - extern const struct file_operations proc_mounts_operations; - extern const struct file_operations proc_mountinfo_operations; - extern const struct file_operations proc_mountstats_operations; -diff --git a/include/linux/splice.h b/include/linux/splice.h -index a55179fd60fc..8e21c53cf883 100644 ---- a/include/linux/splice.h -+++ b/include/linux/splice.h -@@ -93,4 +93,10 @@ extern void splice_shrink_spd(struct splice_pipe_desc *); - - extern const struct pipe_buf_operations page_cache_pipe_buf_ops; - extern const struct pipe_buf_operations default_pipe_buf_ops; -+ -+extern long do_splice_from(struct pipe_inode_info *pipe, struct file *out, -+ loff_t *ppos, size_t len, unsigned int flags); -+extern long do_splice_to(struct file *in, loff_t *ppos, -+ struct pipe_inode_info *pipe, size_t len, -+ unsigned int flags); - #endif -diff --git a/include/uapi/linux/aufs_type.h b/include/uapi/linux/aufs_type.h -new file mode 100644 -index 000000000000..a1f4e7081d06 ---- /dev/null -+++ b/include/uapi/linux/aufs_type.h -@@ -0,0 +1,439 @@ -+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ -+/* -+ * Copyright (C) 2005-2020 Junjiro R. Okajima -+ */ -+ -+#ifndef __AUFS_TYPE_H__ -+#define __AUFS_TYPE_H__ -+ -+#define AUFS_NAME "aufs" -+ -+#ifdef __KERNEL__ -+/* -+ * define it before including all other headers. -+ * sched.h may use pr_* macros before defining "current", so define the -+ * no-current version first, and re-define later. -+ */ -+#define pr_fmt(fmt) AUFS_NAME " %s:%d: " fmt, __func__, __LINE__ -+#include -+#undef pr_fmt -+#define pr_fmt(fmt) \ -+ AUFS_NAME " %s:%d:%.*s[%d]: " fmt, __func__, __LINE__, \ -+ (int)sizeof(current->comm), current->comm, current->pid -+#include -+#else -+#include -+#include -+#include -+#endif /* __KERNEL__ */ -+ -+#define AUFS_VERSION "5.x-rcN" -+ -+/* todo? move this to linux-2.6.19/include/magic.h */ -+#define AUFS_SUPER_MAGIC ('a' << 24 | 'u' << 16 | 'f' << 8 | 's') -+ -+/* ---------------------------------------------------------------------- */ -+ -+#ifdef __KERNEL__ -+#ifdef CONFIG_AUFS_BRANCH_MAX_127 -+typedef int8_t aufs_bindex_t; -+#define AUFS_BRANCH_MAX 127 -+#else -+typedef int16_t aufs_bindex_t; -+#ifdef CONFIG_AUFS_BRANCH_MAX_511 -+#define AUFS_BRANCH_MAX 511 -+#elif defined(CONFIG_AUFS_BRANCH_MAX_1023) -+#define AUFS_BRANCH_MAX 1023 -+#elif defined(CONFIG_AUFS_BRANCH_MAX_32767) -+#define AUFS_BRANCH_MAX 32767 -+#endif -+#endif -+ -+#ifndef AUFS_BRANCH_MAX -+#error unknown CONFIG_AUFS_BRANCH_MAX value -+#endif -+#endif /* __KERNEL__ */ -+ -+/* ---------------------------------------------------------------------- */ -+ -+#define AUFS_FSTYPE AUFS_NAME -+ -+#define AUFS_ROOT_INO 2 -+#define AUFS_FIRST_INO 11 -+ -+#define AUFS_WH_PFX ".wh." -+#define AUFS_WH_PFX_LEN ((int)sizeof(AUFS_WH_PFX) - 1) -+#define AUFS_WH_TMP_LEN 4 -+/* a limit for rmdir/rename a dir and copyup */ -+#define AUFS_MAX_NAMELEN (NAME_MAX \ -+ - AUFS_WH_PFX_LEN * 2 /* doubly whiteouted */\ -+ - 1 /* dot */\ -+ - AUFS_WH_TMP_LEN) /* hex */ -+#define AUFS_XINO_FNAME "." AUFS_NAME ".xino" -+#define AUFS_XINO_DEFPATH "/tmp/" AUFS_XINO_FNAME -+#define AUFS_XINO_DEF_SEC 30 /* seconds */ -+#define AUFS_XINO_DEF_TRUNC 45 /* percentage */ -+#define AUFS_DIRWH_DEF 3 -+#define AUFS_RDCACHE_DEF 10 /* seconds */ -+#define AUFS_RDCACHE_MAX 3600 /* seconds */ -+#define AUFS_RDBLK_DEF 512 /* bytes */ -+#define AUFS_RDHASH_DEF 32 -+#define AUFS_WKQ_NAME AUFS_NAME "d" -+#define AUFS_MFS_DEF_SEC 30 /* seconds */ -+#define AUFS_MFS_MAX_SEC 3600 /* seconds */ -+#define AUFS_FHSM_CACHE_DEF_SEC 30 /* seconds */ -+#define AUFS_PLINK_WARN 50 /* number of plinks in a single bucket */ -+ -+/* pseudo-link maintenace under /proc */ -+#define AUFS_PLINK_MAINT_NAME "plink_maint" -+#define AUFS_PLINK_MAINT_DIR "fs/" AUFS_NAME -+#define AUFS_PLINK_MAINT_PATH AUFS_PLINK_MAINT_DIR "/" AUFS_PLINK_MAINT_NAME -+ -+/* dirren, renamed dir */ -+#define AUFS_DR_INFO_PFX AUFS_WH_PFX ".dr." -+#define AUFS_DR_BRHINO_NAME AUFS_WH_PFX "hino" -+/* whiteouted doubly */ -+#define AUFS_WH_DR_INFO_PFX AUFS_WH_PFX AUFS_DR_INFO_PFX -+#define AUFS_WH_DR_BRHINO AUFS_WH_PFX AUFS_DR_BRHINO_NAME -+ -+#define AUFS_DIROPQ_NAME AUFS_WH_PFX ".opq" /* whiteouted doubly */ -+#define AUFS_WH_DIROPQ AUFS_WH_PFX AUFS_DIROPQ_NAME -+ -+#define AUFS_BASE_NAME AUFS_WH_PFX AUFS_NAME -+#define AUFS_PLINKDIR_NAME AUFS_WH_PFX "plnk" -+#define AUFS_ORPHDIR_NAME AUFS_WH_PFX "orph" -+ -+/* doubly whiteouted */ -+#define AUFS_WH_BASE AUFS_WH_PFX AUFS_BASE_NAME -+#define AUFS_WH_PLINKDIR AUFS_WH_PFX AUFS_PLINKDIR_NAME -+#define AUFS_WH_ORPHDIR AUFS_WH_PFX AUFS_ORPHDIR_NAME -+ -+/* branch permissions and attributes */ -+#define AUFS_BRPERM_RW "rw" -+#define AUFS_BRPERM_RO "ro" -+#define AUFS_BRPERM_RR "rr" -+#define AUFS_BRATTR_COO_REG "coo_reg" -+#define AUFS_BRATTR_COO_ALL "coo_all" -+#define AUFS_BRATTR_FHSM "fhsm" -+#define AUFS_BRATTR_UNPIN "unpin" -+#define AUFS_BRATTR_ICEX "icex" -+#define AUFS_BRATTR_ICEX_SEC "icexsec" -+#define AUFS_BRATTR_ICEX_SYS "icexsys" -+#define AUFS_BRATTR_ICEX_TR "icextr" -+#define AUFS_BRATTR_ICEX_USR "icexusr" -+#define AUFS_BRATTR_ICEX_OTH "icexoth" -+#define AUFS_BRRATTR_WH "wh" -+#define AUFS_BRWATTR_NLWH "nolwh" -+#define AUFS_BRWATTR_MOO "moo" -+ -+#define AuBrPerm_RW 1 /* writable, hardlinkable wh */ -+#define AuBrPerm_RO (1 << 1) /* readonly */ -+#define AuBrPerm_RR (1 << 2) /* natively readonly */ -+#define AuBrPerm_Mask (AuBrPerm_RW | AuBrPerm_RO | AuBrPerm_RR) -+ -+#define AuBrAttr_COO_REG (1 << 3) /* copy-up on open */ -+#define AuBrAttr_COO_ALL (1 << 4) -+#define AuBrAttr_COO_Mask (AuBrAttr_COO_REG | AuBrAttr_COO_ALL) -+ -+#define AuBrAttr_FHSM (1 << 5) /* file-based hsm */ -+#define AuBrAttr_UNPIN (1 << 6) /* rename-able top dir of -+ branch. meaningless since -+ linux-3.18-rc1 */ -+ -+/* ignore error in copying XATTR */ -+#define AuBrAttr_ICEX_SEC (1 << 7) -+#define AuBrAttr_ICEX_SYS (1 << 8) -+#define AuBrAttr_ICEX_TR (1 << 9) -+#define AuBrAttr_ICEX_USR (1 << 10) -+#define AuBrAttr_ICEX_OTH (1 << 11) -+#define AuBrAttr_ICEX (AuBrAttr_ICEX_SEC \ -+ | AuBrAttr_ICEX_SYS \ -+ | AuBrAttr_ICEX_TR \ -+ | AuBrAttr_ICEX_USR \ -+ | AuBrAttr_ICEX_OTH) -+ -+#define AuBrRAttr_WH (1 << 12) /* whiteout-able */ -+#define AuBrRAttr_Mask AuBrRAttr_WH -+ -+#define AuBrWAttr_NoLinkWH (1 << 13) /* un-hardlinkable whiteouts */ -+#define AuBrWAttr_MOO (1 << 14) /* move-up on open */ -+#define AuBrWAttr_Mask (AuBrWAttr_NoLinkWH | AuBrWAttr_MOO) -+ -+#define AuBrAttr_CMOO_Mask (AuBrAttr_COO_Mask | AuBrWAttr_MOO) -+ -+/* #warning test userspace */ -+#ifdef __KERNEL__ -+#ifndef CONFIG_AUFS_FHSM -+#undef AuBrAttr_FHSM -+#define AuBrAttr_FHSM 0 -+#endif -+#ifndef CONFIG_AUFS_XATTR -+#undef AuBrAttr_ICEX -+#define AuBrAttr_ICEX 0 -+#undef AuBrAttr_ICEX_SEC -+#define AuBrAttr_ICEX_SEC 0 -+#undef AuBrAttr_ICEX_SYS -+#define AuBrAttr_ICEX_SYS 0 -+#undef AuBrAttr_ICEX_TR -+#define AuBrAttr_ICEX_TR 0 -+#undef AuBrAttr_ICEX_USR -+#define AuBrAttr_ICEX_USR 0 -+#undef AuBrAttr_ICEX_OTH -+#define AuBrAttr_ICEX_OTH 0 -+#endif -+#endif -+ -+/* the longest combination */ -+/* AUFS_BRATTR_ICEX and AUFS_BRATTR_ICEX_TR don't affect here */ -+#define AuBrPermStrSz sizeof(AUFS_BRPERM_RW \ -+ "+" AUFS_BRATTR_COO_REG \ -+ "+" AUFS_BRATTR_FHSM \ -+ "+" AUFS_BRATTR_UNPIN \ -+ "+" AUFS_BRATTR_ICEX_SEC \ -+ "+" AUFS_BRATTR_ICEX_SYS \ -+ "+" AUFS_BRATTR_ICEX_USR \ -+ "+" AUFS_BRATTR_ICEX_OTH \ -+ "+" AUFS_BRWATTR_NLWH) -+ -+typedef struct { -+ char a[AuBrPermStrSz]; -+} au_br_perm_str_t; -+ -+static inline int au_br_writable(int brperm) -+{ -+ return brperm & AuBrPerm_RW; -+} -+ -+static inline int au_br_whable(int brperm) -+{ -+ return brperm & (AuBrPerm_RW | AuBrRAttr_WH); -+} -+ -+static inline int au_br_wh_linkable(int brperm) -+{ -+ return !(brperm & AuBrWAttr_NoLinkWH); -+} -+ -+static inline int au_br_cmoo(int brperm) -+{ -+ return brperm & AuBrAttr_CMOO_Mask; -+} -+ -+static inline int au_br_fhsm(int brperm) -+{ -+ return brperm & AuBrAttr_FHSM; -+} -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* ioctl */ -+enum { -+ /* readdir in userspace */ -+ AuCtl_RDU, -+ AuCtl_RDU_INO, -+ -+ AuCtl_WBR_FD, /* pathconf wrapper */ -+ AuCtl_IBUSY, /* busy inode */ -+ AuCtl_MVDOWN, /* move-down */ -+ AuCtl_BR, /* info about branches */ -+ AuCtl_FHSM_FD /* connection for fhsm */ -+}; -+ -+/* borrowed from linux/include/linux/kernel.h */ -+#ifndef ALIGN -+#ifdef _GNU_SOURCE -+#define ALIGN(x, a) __ALIGN_MASK(x, (typeof(x))(a)-1) -+#else -+#define ALIGN(x, a) (((x) + (a) - 1) & ~((a) - 1)) -+#endif -+#define __ALIGN_MASK(x, mask) (((x)+(mask))&~(mask)) -+#endif -+ -+/* borrowed from linux/include/linux/compiler-gcc3.h */ -+#ifndef __aligned -+#define __aligned(x) __attribute__((aligned(x))) -+#endif -+ -+#ifdef __KERNEL__ -+#ifndef __packed -+#define __packed __attribute__((packed)) -+#endif -+#endif -+ -+struct au_rdu_cookie { -+ uint64_t h_pos; -+ int16_t bindex; -+ uint8_t flags; -+ uint8_t pad; -+ uint32_t generation; -+} __aligned(8); -+ -+struct au_rdu_ent { -+ uint64_t ino; -+ int16_t bindex; -+ uint8_t type; -+ uint8_t nlen; -+ uint8_t wh; -+ char name[]; -+} __aligned(8); -+ -+static inline int au_rdu_len(int nlen) -+{ -+ /* include the terminating NULL */ -+ return ALIGN(sizeof(struct au_rdu_ent) + nlen + 1, -+ sizeof(uint64_t)); -+} -+ -+union au_rdu_ent_ul { -+ struct au_rdu_ent __user *e; -+ uint64_t ul; -+}; -+ -+enum { -+ AufsCtlRduV_SZ, -+ AufsCtlRduV_End -+}; -+ -+struct aufs_rdu { -+ /* input */ -+ union { -+ uint64_t sz; /* AuCtl_RDU */ -+ uint64_t nent; /* AuCtl_RDU_INO */ -+ }; -+ union au_rdu_ent_ul ent; -+ uint16_t verify[AufsCtlRduV_End]; -+ -+ /* input/output */ -+ uint32_t blk; -+ -+ /* output */ -+ union au_rdu_ent_ul tail; -+ /* number of entries which were added in a single call */ -+ uint64_t rent; -+ uint8_t full; -+ uint8_t shwh; -+ -+ struct au_rdu_cookie cookie; -+} __aligned(8); -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* dirren. the branch is identified by the filename who contains this */ -+struct au_drinfo { -+ uint64_t ino; -+ union { -+ uint8_t oldnamelen; -+ uint64_t _padding; -+ }; -+ uint8_t oldname[]; -+} __aligned(8); -+ -+struct au_drinfo_fdata { -+ uint32_t magic; -+ struct au_drinfo drinfo; -+} __aligned(8); -+ -+#define AUFS_DRINFO_MAGIC_V1 ('a' << 24 | 'd' << 16 | 'r' << 8 | 0x01) -+/* future */ -+#define AUFS_DRINFO_MAGIC_V2 ('a' << 24 | 'd' << 16 | 'r' << 8 | 0x02) -+ -+/* ---------------------------------------------------------------------- */ -+ -+struct aufs_wbr_fd { -+ uint32_t oflags; -+ int16_t brid; -+} __aligned(8); -+ -+/* ---------------------------------------------------------------------- */ -+ -+struct aufs_ibusy { -+ uint64_t ino, h_ino; -+ int16_t bindex; -+} __aligned(8); -+ -+/* ---------------------------------------------------------------------- */ -+ -+/* error code for move-down */ -+/* the actual message strings are implemented in aufs-util.git */ -+enum { -+ EAU_MVDOWN_OPAQUE = 1, -+ EAU_MVDOWN_WHITEOUT, -+ EAU_MVDOWN_UPPER, -+ EAU_MVDOWN_BOTTOM, -+ EAU_MVDOWN_NOUPPER, -+ EAU_MVDOWN_NOLOWERBR, -+ EAU_Last -+}; -+ -+/* flags for move-down */ -+#define AUFS_MVDOWN_DMSG 1 -+#define AUFS_MVDOWN_OWLOWER (1 << 1) /* overwrite lower */ -+#define AUFS_MVDOWN_KUPPER (1 << 2) /* keep upper */ -+#define AUFS_MVDOWN_ROLOWER (1 << 3) /* do even if lower is RO */ -+#define AUFS_MVDOWN_ROLOWER_R (1 << 4) /* did on lower RO */ -+#define AUFS_MVDOWN_ROUPPER (1 << 5) /* do even if upper is RO */ -+#define AUFS_MVDOWN_ROUPPER_R (1 << 6) /* did on upper RO */ -+#define AUFS_MVDOWN_BRID_UPPER (1 << 7) /* upper brid */ -+#define AUFS_MVDOWN_BRID_LOWER (1 << 8) /* lower brid */ -+#define AUFS_MVDOWN_FHSM_LOWER (1 << 9) /* find fhsm attr for lower */ -+#define AUFS_MVDOWN_STFS (1 << 10) /* req. stfs */ -+#define AUFS_MVDOWN_STFS_FAILED (1 << 11) /* output: stfs is unusable */ -+#define AUFS_MVDOWN_BOTTOM (1 << 12) /* output: no more lowers */ -+ -+/* index for move-down */ -+enum { -+ AUFS_MVDOWN_UPPER, -+ AUFS_MVDOWN_LOWER, -+ AUFS_MVDOWN_NARRAY -+}; -+ -+/* -+ * additional info of move-down -+ * number of free blocks and inodes. -+ * subset of struct kstatfs, but smaller and always 64bit. -+ */ -+struct aufs_stfs { -+ uint64_t f_blocks; -+ uint64_t f_bavail; -+ uint64_t f_files; -+ uint64_t f_ffree; -+}; -+ -+struct aufs_stbr { -+ int16_t brid; /* optional input */ -+ int16_t bindex; /* output */ -+ struct aufs_stfs stfs; /* output when AUFS_MVDOWN_STFS set */ -+} __aligned(8); -+ -+struct aufs_mvdown { -+ uint32_t flags; /* input/output */ -+ struct aufs_stbr stbr[AUFS_MVDOWN_NARRAY]; /* input/output */ -+ int8_t au_errno; /* output */ -+} __aligned(8); -+ -+/* ---------------------------------------------------------------------- */ -+ -+union aufs_brinfo { -+ /* PATH_MAX may differ between kernel-space and user-space */ -+ char _spacer[4096]; -+ struct { -+ int16_t id; -+ int perm; -+ char path[]; -+ }; -+} __aligned(8); -+ -+/* ---------------------------------------------------------------------- */ -+ -+#define AuCtlType 'A' -+#define AUFS_CTL_RDU _IOWR(AuCtlType, AuCtl_RDU, struct aufs_rdu) -+#define AUFS_CTL_RDU_INO _IOWR(AuCtlType, AuCtl_RDU_INO, struct aufs_rdu) -+#define AUFS_CTL_WBR_FD _IOW(AuCtlType, AuCtl_WBR_FD, \ -+ struct aufs_wbr_fd) -+#define AUFS_CTL_IBUSY _IOWR(AuCtlType, AuCtl_IBUSY, struct aufs_ibusy) -+#define AUFS_CTL_MVDOWN _IOWR(AuCtlType, AuCtl_MVDOWN, \ -+ struct aufs_mvdown) -+#define AUFS_CTL_BRINFO _IOW(AuCtlType, AuCtl_BR, union aufs_brinfo) -+#define AUFS_CTL_FHSM_FD _IOW(AuCtlType, AuCtl_FHSM_FD, int) -+ -+#endif /* __AUFS_TYPE_H__ */ -diff --git a/kernel/fork.c b/kernel/fork.c -index 6d266388d380..dd7f13c3bee7 100644 ---- a/kernel/fork.c -+++ b/kernel/fork.c -@@ -554,7 +554,7 @@ static __latent_entropy int dup_mmap(struct mm_struct *mm, - struct inode *inode = file_inode(file); - struct address_space *mapping = file->f_mapping; - -- get_file(file); -+ vma_get_file(tmp); - if (tmp->vm_flags & VM_DENYWRITE) - put_write_access(inode); - i_mmap_lock_write(mapping); -diff --git a/kernel/locking/lockdep.c b/kernel/locking/lockdep.c -index c1418b47f625..7f006a47790c 100644 ---- a/kernel/locking/lockdep.c -+++ b/kernel/locking/lockdep.c -@@ -188,7 +188,7 @@ static - struct lock_class lock_classes[MAX_LOCKDEP_KEYS]; - static DECLARE_BITMAP(lock_classes_in_use, MAX_LOCKDEP_KEYS); - --static inline struct lock_class *hlock_class(struct held_lock *hlock) -+inline struct lock_class *lockdep_hlock_class(struct held_lock *hlock) - { - unsigned int class_idx = hlock->class_idx; - -@@ -209,6 +209,7 @@ static inline struct lock_class *hlock_class(struct held_lock *hlock) - */ - return lock_classes + class_idx; - } -+#define hlock_class(hlock) lockdep_hlock_class(hlock) - - #ifdef CONFIG_LOCK_STAT - static DEFINE_PER_CPU(struct lock_class_stats[MAX_LOCKDEP_KEYS], cpu_lock_stats); -diff --git a/mm/Makefile b/mm/Makefile -index d73aed0fc99c..93076a66ad6a 100644 ---- a/mm/Makefile -+++ b/mm/Makefile -@@ -52,7 +52,7 @@ obj-y := filemap.o mempool.o oom_kill.o fadvise.o \ - mm_init.o percpu.o slab_common.o \ - compaction.o vmacache.o \ - interval_tree.o list_lru.o workingset.o \ -- debug.o gup.o $(mmu-y) -+ prfile.o debug.o gup.o $(mmu-y) - - # Give 'page_alloc' its own module-parameter namespace - page-alloc-y := page_alloc.o -diff --git a/mm/filemap.c b/mm/filemap.c -index 0b2067b3c328..3334207431c7 100644 ---- a/mm/filemap.c -+++ b/mm/filemap.c -@@ -2909,7 +2909,7 @@ vm_fault_t filemap_page_mkwrite(struct vm_fault *vmf) - vm_fault_t ret = VM_FAULT_LOCKED; - - sb_start_pagefault(inode->i_sb); -- file_update_time(vmf->vma->vm_file); -+ vma_file_update_time(vmf->vma); - lock_page(page); - if (page->mapping != inode->i_mapping) { - unlock_page(page); -diff --git a/mm/mmap.c b/mm/mmap.c -index 5c8b4485860d..59f2f758d77e 100644 ---- a/mm/mmap.c -+++ b/mm/mmap.c -@@ -179,7 +179,7 @@ static struct vm_area_struct *remove_vma(struct vm_area_struct *vma) - if (vma->vm_ops && vma->vm_ops->close) - vma->vm_ops->close(vma); - if (vma->vm_file) -- fput(vma->vm_file); -+ vma_fput(vma); - mpol_put(vma_policy(vma)); - vm_area_free(vma); - return next; -@@ -951,7 +951,7 @@ int __vma_adjust(struct vm_area_struct *vma, unsigned long start, - if (remove_next) { - if (file) { - uprobe_munmap(next, next->vm_start, next->vm_end); -- fput(file); -+ vma_fput(vma); - } - if (next->anon_vma) - anon_vma_merge(vma, next); -@@ -1897,8 +1897,8 @@ unsigned long mmap_region(struct file *file, unsigned long addr, - return addr; - - unmap_and_free_vma: -+ vma_fput(vma); - vma->vm_file = NULL; -- fput(file); - - /* Undo any partial mapping done by a device driver. */ - unmap_region(mm, vma, prev, vma->vm_start, vma->vm_end); -@@ -2757,7 +2757,7 @@ int __split_vma(struct mm_struct *mm, struct vm_area_struct *vma, - goto out_free_mpol; - - if (new->vm_file) -- get_file(new->vm_file); -+ vma_get_file(new); - - if (new->vm_ops && new->vm_ops->open) - new->vm_ops->open(new); -@@ -2776,7 +2776,7 @@ int __split_vma(struct mm_struct *mm, struct vm_area_struct *vma, - if (new->vm_ops && new->vm_ops->close) - new->vm_ops->close(new); - if (new->vm_file) -- fput(new->vm_file); -+ vma_fput(new); - unlink_anon_vmas(new); - out_free_mpol: - mpol_put(vma_policy(new)); -@@ -2969,7 +2969,7 @@ SYSCALL_DEFINE5(remap_file_pages, unsigned long, start, unsigned long, size, - struct vm_area_struct *vma; - unsigned long populate = 0; - unsigned long ret = -EINVAL; -- struct file *file; -+ struct file *file, *prfile; - - pr_warn_once("%s (%d) uses deprecated remap_file_pages() syscall. See Documentation/vm/remap_file_pages.rst.\n", - current->comm, current->pid); -@@ -3044,10 +3044,27 @@ SYSCALL_DEFINE5(remap_file_pages, unsigned long, start, unsigned long, size, - } - } - -- file = get_file(vma->vm_file); -+ vma_get_file(vma); -+ file = vma->vm_file; -+ prfile = vma->vm_prfile; - ret = do_mmap(vma->vm_file, start, size, - prot, flags, pgoff, &populate, NULL); -+ if (!IS_ERR_VALUE(ret) && file && prfile) { -+ struct vm_area_struct *new_vma; -+ -+ new_vma = find_vma(mm, ret); -+ if (!new_vma->vm_prfile) -+ new_vma->vm_prfile = prfile; -+ if (new_vma != vma) -+ get_file(prfile); -+ } -+ /* -+ * two fput()s instead of vma_fput(vma), -+ * coz vma may not be available anymore. -+ */ - fput(file); -+ if (prfile) -+ fput(prfile); - out: - mmap_write_unlock(mm); - if (populate) -@@ -3334,7 +3351,7 @@ struct vm_area_struct *copy_vma(struct vm_area_struct **vmap, - if (anon_vma_clone(new_vma, vma)) - goto out_free_mempol; - if (new_vma->vm_file) -- get_file(new_vma->vm_file); -+ vma_get_file(new_vma); - if (new_vma->vm_ops && new_vma->vm_ops->open) - new_vma->vm_ops->open(new_vma); - vma_link(mm, new_vma, prev, rb_link, rb_parent); -diff --git a/mm/nommu.c b/mm/nommu.c -index 0faf39b32cdb..78ecad7204c8 100644 ---- a/mm/nommu.c -+++ b/mm/nommu.c -@@ -533,7 +533,7 @@ static void __put_nommu_region(struct vm_region *region) - up_write(&nommu_region_sem); - - if (region->vm_file) -- fput(region->vm_file); -+ vmr_fput(region); - - /* IO memory and memory shared directly out of the pagecache - * from ramfs/tmpfs mustn't be released here */ -@@ -665,7 +665,7 @@ static void delete_vma(struct mm_struct *mm, struct vm_area_struct *vma) - if (vma->vm_ops && vma->vm_ops->close) - vma->vm_ops->close(vma); - if (vma->vm_file) -- fput(vma->vm_file); -+ vma_fput(vma); - put_nommu_region(vma->vm_region); - vm_area_free(vma); - } -@@ -1188,7 +1188,7 @@ unsigned long do_mmap(struct file *file, - goto error_just_free; - } - } -- fput(region->vm_file); -+ vmr_fput(region); - kmem_cache_free(vm_region_jar, region); - region = pregion; - result = start; -@@ -1265,10 +1265,10 @@ unsigned long do_mmap(struct file *file, - up_write(&nommu_region_sem); - error: - if (region->vm_file) -- fput(region->vm_file); -+ vmr_fput(region); - kmem_cache_free(vm_region_jar, region); - if (vma->vm_file) -- fput(vma->vm_file); -+ vma_fput(vma); - vm_area_free(vma); - return ret; - -diff --git a/mm/prfile.c b/mm/prfile.c -new file mode 100644 -index 000000000000..00d51187c325 ---- /dev/null -+++ b/mm/prfile.c -@@ -0,0 +1,86 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Mainly for aufs which mmap(2) different file and wants to print different -+ * path in /proc/PID/maps. -+ * Call these functions via macros defined in linux/mm.h. -+ * -+ * See Documentation/filesystems/aufs/design/06mmap.txt -+ * -+ * Copyright (c) 2014-2020 Junjro R. Okajima -+ * Copyright (c) 2014 Ian Campbell -+ */ -+ -+#include -+#include -+#include -+ -+/* #define PRFILE_TRACE */ -+static inline void prfile_trace(struct file *f, struct file *pr, -+ const char func[], int line, const char func2[]) -+{ -+#ifdef PRFILE_TRACE -+ if (pr) -+ pr_info("%s:%d: %s, %pD2\n", func, line, func2, f); -+#endif -+} -+ -+void vma_do_file_update_time(struct vm_area_struct *vma, const char func[], -+ int line) -+{ -+ struct file *f = vma->vm_file, *pr = vma->vm_prfile; -+ -+ prfile_trace(f, pr, func, line, __func__); -+ file_update_time(f); -+ if (f && pr) -+ file_update_time(pr); -+} -+ -+struct file *vma_do_pr_or_file(struct vm_area_struct *vma, const char func[], -+ int line) -+{ -+ struct file *f = vma->vm_file, *pr = vma->vm_prfile; -+ -+ prfile_trace(f, pr, func, line, __func__); -+ return (f && pr) ? pr : f; -+} -+ -+void vma_do_get_file(struct vm_area_struct *vma, const char func[], int line) -+{ -+ struct file *f = vma->vm_file, *pr = vma->vm_prfile; -+ -+ prfile_trace(f, pr, func, line, __func__); -+ get_file(f); -+ if (f && pr) -+ get_file(pr); -+} -+ -+void vma_do_fput(struct vm_area_struct *vma, const char func[], int line) -+{ -+ struct file *f = vma->vm_file, *pr = vma->vm_prfile; -+ -+ prfile_trace(f, pr, func, line, __func__); -+ fput(f); -+ if (f && pr) -+ fput(pr); -+} -+ -+#ifndef CONFIG_MMU -+struct file *vmr_do_pr_or_file(struct vm_region *region, const char func[], -+ int line) -+{ -+ struct file *f = region->vm_file, *pr = region->vm_prfile; -+ -+ prfile_trace(f, pr, func, line, __func__); -+ return (f && pr) ? pr : f; -+} -+ -+void vmr_do_fput(struct vm_region *region, const char func[], int line) -+{ -+ struct file *f = region->vm_file, *pr = region->vm_prfile; -+ -+ prfile_trace(f, pr, func, line, __func__); -+ fput(f); -+ if (f && pr) -+ fput(pr); -+} -+#endif /* !CONFIG_MMU */ diff --git a/kernel/tools/cpupowertools/files/patches/mageia/fs-aufs5.15-symbol-exports.patch b/kernel/tools/cpupowertools/files/patches/mageia/fs-aufs5.15-symbol-exports.patch deleted file mode 100644 index 32dab496..00000000 --- a/kernel/tools/cpupowertools/files/patches/mageia/fs-aufs5.15-symbol-exports.patch +++ /dev/null @@ -1,260 +0,0 @@ - - fs/dcache.c | 2 ++ - fs/exec.c | 1 + - fs/fcntl.c | 1 + - fs/file_table.c | 2 ++ - fs/namespace.c | 3 +++ - fs/notify/group.c | 1 + - fs/open.c | 1 + - fs/read_write.c | 2 ++ - fs/splice.c | 2 ++ - fs/xattr.c | 1 + - kernel/locking/lockdep.c | 1 + - kernel/task_work.c | 1 + - security/security.c | 8 ++++++++ - 13 files changed, 26 insertions(+) - -diff -Nurp linux-5.15.37-aufs/fs/dcache.c linux-5.15.37-aufs-mod/fs/dcache.c ---- linux-5.15.37-aufs/fs/dcache.c 2022-04-08 20:22:30.617616719 +0300 -+++ linux-5.15.37-aufs-mod/fs/dcache.c 2022-04-08 20:24:23.624148779 +0300 -@@ -1450,6 +1450,7 @@ rename_retry: - seq = 1; - goto again; - } -+EXPORT_SYMBOL_GPL(d_walk); - - struct check_mount { - struct vfsmount *mnt; -@@ -2995,6 +2996,7 @@ void d_exchange(struct dentry *dentry1, - - write_sequnlock(&rename_lock); - } -+EXPORT_SYMBOL_GPL(d_exchange); - - /** - * d_ancestor - search for an ancestor -diff -Nurp linux-5.15.37-aufs/fs/exec.c linux-5.15.37-aufs-mod/fs/exec.c ---- linux-5.15.37-aufs/fs/exec.c 2022-04-08 20:07:30.690498863 +0300 -+++ linux-5.15.37-aufs-mod/fs/exec.c 2022-04-08 20:24:23.624148779 +0300 -@@ -112,6 +112,7 @@ bool path_noexec(const struct path *path - return (path->mnt->mnt_flags & MNT_NOEXEC) || - (path->mnt->mnt_sb->s_iflags & SB_I_NOEXEC); - } -+EXPORT_SYMBOL_GPL(path_noexec); - - #ifdef CONFIG_USELIB - /* -diff -Nurp linux-5.15.37-aufs/fs/fcntl.c linux-5.15.37-aufs-mod/fs/fcntl.c ---- linux-5.15.37-aufs/fs/fcntl.c 2022-04-08 20:22:30.617616719 +0300 -+++ linux-5.15.37-aufs-mod/fs/fcntl.c 2022-04-08 20:24:23.624148779 +0300 -@@ -86,6 +86,7 @@ int setfl(int fd, struct file *filp, uns - out: - return error; - } -+EXPORT_SYMBOL_GPL(setfl); - - static void f_modown(struct file *filp, struct pid *pid, enum pid_type type, - int force) -diff -Nurp linux-5.15.37-aufs/fs/file_table.c linux-5.15.37-aufs-mod/fs/file_table.c ---- linux-5.15.37-aufs/fs/file_table.c 2022-03-20 22:14:17.000000000 +0200 -+++ linux-5.15.37-aufs-mod/fs/file_table.c 2022-04-08 20:24:23.624148779 +0300 -@@ -198,6 +198,7 @@ over: - } - return ERR_PTR(-ENFILE); - } -+EXPORT_SYMBOL_GPL(alloc_empty_file); - - /* - * Variant of alloc_empty_file() that doesn't check and modify nr_files. -@@ -412,6 +413,7 @@ void __fput_sync(struct file *file) - } - - EXPORT_SYMBOL(fput); -+EXPORT_SYMBOL_GPL(__fput_sync); - - void __init files_init(void) - { -diff -Nurp linux-5.15.37-aufs/fs/namespace.c linux-5.15.37-aufs-mod/fs/namespace.c ---- linux-5.15.37-aufs/fs/namespace.c 2022-04-08 20:22:30.617616719 +0300 -+++ linux-5.15.37-aufs-mod/fs/namespace.c 2022-04-08 20:24:23.624148779 +0300 -@@ -440,6 +440,7 @@ void __mnt_drop_write(struct vfsmount *m - mnt_dec_writers(real_mount(mnt)); - preempt_enable(); - } -+EXPORT_SYMBOL_GPL(__mnt_drop_write); - - /** - * mnt_drop_write - give up write access to a mount -@@ -844,6 +845,7 @@ int is_current_mnt_ns(struct vfsmount *m - { - return check_mnt(real_mount(mnt)); - } -+EXPORT_SYMBOL_GPL(is_current_mnt_ns); - - /* - * vfsmount lock must be held for write -@@ -2047,6 +2049,7 @@ int iterate_mounts(int (*f)(struct vfsmo - } - return 0; - } -+EXPORT_SYMBOL_GPL(iterate_mounts); - - static void lock_mnt_tree(struct mount *mnt) - { -diff -Nurp linux-5.15.37-aufs/fs/notify/group.c linux-5.15.37-aufs-mod/fs/notify/group.c ---- linux-5.15.37-aufs/fs/notify/group.c 2022-03-20 22:14:17.000000000 +0200 -+++ linux-5.15.37-aufs-mod/fs/notify/group.c 2022-04-08 20:24:23.624148779 +0300 -@@ -100,6 +100,7 @@ void fsnotify_get_group(struct fsnotify_ - { - refcount_inc(&group->refcnt); - } -+EXPORT_SYMBOL_GPL(fsnotify_get_group); - - /* - * Drop a reference to a group. Free it if it's through. -diff -Nurp linux-5.15.37-aufs/fs/open.c linux-5.15.37-aufs-mod/fs/open.c ---- linux-5.15.37-aufs/fs/open.c 2022-03-20 22:14:17.000000000 +0200 -+++ linux-5.15.37-aufs-mod/fs/open.c 2022-04-08 20:24:23.625148828 +0300 -@@ -66,6 +66,7 @@ int do_truncate(struct user_namespace *m - inode_unlock(dentry->d_inode); - return ret; - } -+EXPORT_SYMBOL_GPL(do_truncate); - - long vfs_truncate(const struct path *path, loff_t length) - { -diff -Nurp linux-5.15.37-aufs/fs/read_write.c linux-5.15.37-aufs-mod/fs/read_write.c ---- linux-5.15.37-aufs/fs/read_write.c 2022-03-20 22:14:17.000000000 +0200 -+++ linux-5.15.37-aufs-mod/fs/read_write.c 2022-04-08 20:24:23.625148828 +0300 -@@ -488,6 +488,7 @@ ssize_t vfs_read(struct file *file, char - inc_syscr(current); - return ret; - } -+EXPORT_SYMBOL_GPL(vfs_read); - - static ssize_t new_sync_write(struct file *filp, const char __user *buf, size_t len, loff_t *ppos) - { -@@ -598,6 +599,7 @@ ssize_t vfs_write(struct file *file, con - file_end_write(file); - return ret; - } -+EXPORT_SYMBOL_GPL(vfs_write); - - /* file_ppos returns &file->f_pos or NULL if file is stream */ - static inline loff_t *file_ppos(struct file *file) -diff -Nurp linux-5.15.37-aufs/fs/splice.c linux-5.15.37-aufs-mod/fs/splice.c ---- linux-5.15.37-aufs/fs/splice.c 2022-04-08 20:22:30.617616719 +0300 -+++ linux-5.15.37-aufs-mod/fs/splice.c 2022-04-08 20:24:23.625148828 +0300 -@@ -766,6 +766,7 @@ long do_splice_from(struct pipe_inode_in - return warn_unsupported(out, "write"); - return out->f_op->splice_write(pipe, out, ppos, len, flags); - } -+EXPORT_SYMBOL_GPL(do_splice_from); - - /* - * Attempt to initiate a splice from a file to a pipe. -@@ -795,6 +796,7 @@ long do_splice_to(struct file *in, loff_ - return warn_unsupported(in, "read"); - return in->f_op->splice_read(in, ppos, pipe, len, flags); - } -+EXPORT_SYMBOL_GPL(do_splice_to); - - /** - * splice_direct_to_actor - splices data directly between two non-pipes -diff -Nurp linux-5.15.37-aufs/fs/xattr.c linux-5.15.37-aufs-mod/fs/xattr.c ---- linux-5.15.37-aufs/fs/xattr.c 2022-03-20 22:14:17.000000000 +0200 -+++ linux-5.15.37-aufs-mod/fs/xattr.c 2022-04-08 20:24:23.625148828 +0300 -@@ -384,6 +384,7 @@ vfs_getxattr_alloc(struct user_namespace - *xattr_value = value; - return error; - } -+EXPORT_SYMBOL_GPL(vfs_getxattr_alloc); - - ssize_t - __vfs_getxattr(struct dentry *dentry, struct inode *inode, const char *name, -diff -Nurp linux-5.15.37-aufs/kernel/locking/lockdep.c linux-5.15.37-aufs-mod/kernel/locking/lockdep.c ---- linux-5.15.37-aufs/kernel/locking/lockdep.c 2022-04-08 20:22:30.619616817 +0300 -+++ linux-5.15.37-aufs-mod/kernel/locking/lockdep.c 2022-04-08 20:24:23.625148828 +0300 -@@ -208,6 +208,7 @@ inline struct lock_class *lockdep_hlock_ - */ - return lock_classes + class_idx; - } -+EXPORT_SYMBOL_GPL(lockdep_hlock_class); - #define hlock_class(hlock) lockdep_hlock_class(hlock) - - #ifdef CONFIG_LOCK_STAT -diff -Nurp linux-5.15.37-aufs/kernel/task_work.c linux-5.15.37-aufs-mod/kernel/task_work.c ---- linux-5.15.37-aufs/kernel/task_work.c 2022-03-20 22:14:17.000000000 +0200 -+++ linux-5.15.37-aufs-mod/kernel/task_work.c 2022-04-08 20:24:23.625148828 +0300 -@@ -167,3 +167,4 @@ void task_work_run(void) - } while (work); - } - } -+EXPORT_SYMBOL_GPL(task_work_run); -diff -Nurp linux-5.15.37-aufs/security/security.c linux-5.15.37-aufs-mod/security/security.c ---- linux-5.15.37-aufs/security/security.c 2022-04-08 20:07:30.718500239 +0300 -+++ linux-5.15.37-aufs-mod/security/security.c 2022-04-08 20:24:23.626148877 +0300 -@@ -1164,6 +1164,7 @@ int security_path_rmdir(const struct pat - return 0; - return call_int_hook(path_rmdir, 0, dir, dentry); - } -+EXPORT_SYMBOL_GPL(security_path_rmdir); - - int security_path_unlink(const struct path *dir, struct dentry *dentry) - { -@@ -1180,6 +1181,7 @@ int security_path_symlink(const struct p - return 0; - return call_int_hook(path_symlink, 0, dir, dentry, old_name); - } -+EXPORT_SYMBOL_GPL(security_path_symlink); - - int security_path_link(struct dentry *old_dentry, const struct path *new_dir, - struct dentry *new_dentry) -@@ -1188,6 +1190,7 @@ int security_path_link(struct dentry *ol - return 0; - return call_int_hook(path_link, 0, old_dentry, new_dir, new_dentry); - } -+EXPORT_SYMBOL_GPL(security_path_link); - - int security_path_rename(const struct path *old_dir, struct dentry *old_dentry, - const struct path *new_dir, struct dentry *new_dentry, -@@ -1215,6 +1218,7 @@ int security_path_truncate(const struct - return 0; - return call_int_hook(path_truncate, 0, path); - } -+EXPORT_SYMBOL_GPL(security_path_truncate); - - int security_path_chmod(const struct path *path, umode_t mode) - { -@@ -1222,6 +1226,7 @@ int security_path_chmod(const struct pat - return 0; - return call_int_hook(path_chmod, 0, path, mode); - } -+EXPORT_SYMBOL_GPL(security_path_chmod); - - int security_path_chown(const struct path *path, kuid_t uid, kgid_t gid) - { -@@ -1229,6 +1234,7 @@ int security_path_chown(const struct pat - return 0; - return call_int_hook(path_chown, 0, path, uid, gid); - } -+EXPORT_SYMBOL_GPL(security_path_chown); - - int security_path_chroot(const struct path *path) - { -@@ -1329,6 +1335,7 @@ int security_inode_permission(struct ino - return 0; - return call_int_hook(inode_permission, 0, inode, mask); - } -+EXPORT_SYMBOL_GPL(security_inode_permission); - - int security_inode_setattr(struct dentry *dentry, struct iattr *attr) - { -@@ -1526,6 +1533,7 @@ int security_file_permission(struct file - - return fsnotify_perm(file, mask); - } -+EXPORT_SYMBOL_GPL(security_file_permission); - - int security_file_alloc(struct file *file) - { diff --git a/kernel/tools/cpupowertools/files/patches/mageia/fs-aufs5.15-tristate.patch b/kernel/tools/cpupowertools/files/patches/mageia/fs-aufs5.15-tristate.patch deleted file mode 100644 index f95f4ab6..00000000 --- a/kernel/tools/cpupowertools/files/patches/mageia/fs-aufs5.15-tristate.patch +++ /dev/null @@ -1,24 +0,0 @@ - -Allow aufs to be built as module. - -Signed-off-by: Thomas Backlund - ---- a/fs/aufs/Kconfig -+++ b/fs/aufs/Kconfig -@@ -1,6 +1,6 @@ - # SPDX-License-Identifier: GPL-2.0 - config AUFS_FS -- bool "Aufs (Advanced multi layered unification filesystem) support" -+ tristate "Aufs (Advanced multi layered unification filesystem) support" - help - Aufs is a stackable unification filesystem such as Unionfs, - which unifies several directories and provides a merged single -@@ -72,7 +72,7 @@ endchoice - - config AUFS_EXPORT - bool "NFS-exportable aufs" -- depends on EXPORTFS = y -+ depends on EXPORTFS - help - If you want to export your mounted aufs via NFS, then enable this - option. There are several requirements for this configuration. diff --git a/kernel/tools/cpupowertools/files/patches/mageia/fs-procfs-do-not-list-TID-0-in-proc-pid-task.patch b/kernel/tools/cpupowertools/files/patches/mageia/fs-procfs-do-not-list-TID-0-in-proc-pid-task.patch deleted file mode 100644 index c366d5b7..00000000 --- a/kernel/tools/cpupowertools/files/patches/mageia/fs-procfs-do-not-list-TID-0-in-proc-pid-task.patch +++ /dev/null @@ -1,36 +0,0 @@ -From 435664ed44c4a17e6715d007061e2b155d3535c8 Mon Sep 17 00:00:00 2001 -From: Florian Weimer -Date: Fri, 1 Oct 2021 13:38:15 +1000 -Subject: procfs: do not list TID 0 in /proc//task - -If a task exits concurrently, task_pid_nr_ns may return 0. - -Link: https://lkml.kernel.org/r/8735pn5dx7.fsf@oldenburg.str.redhat.com -Signed-off-by: Florian Weimer -Acked-by: Christian Brauner -Cc: Kees Cook -Cc: "Eric W. Biederman" -Cc: Alexey Dobriyan -Signed-off-by: Andrew Morton -Signed-off-by: Stephen Rothwell ---- - fs/proc/base.c | 3 +++ - 1 file changed, 3 insertions(+) - -diff --git a/fs/proc/base.c b/fs/proc/base.c -index 533d5836eb9a4..54f29399088f0 100644 ---- a/fs/proc/base.c -+++ b/fs/proc/base.c -@@ -3800,6 +3800,9 @@ static int proc_task_readdir(struct file *file, struct dir_context *ctx) - char name[10 + 1]; - unsigned int len; - tid = task_pid_nr_ns(task, ns); -+ if (!tid) -+ /* The task has just exited. */ -+ continue; - len = snprintf(name, sizeof(name), "%u", tid); - if (!proc_fill_cache(file, ctx, name, len, - proc_task_instantiate, task, NULL)) { --- -cgit 1.2.3-1.el7 - diff --git a/kernel/tools/cpupowertools/files/patches/mageia/hack-broken-rtla-cleaner.patch b/kernel/tools/cpupowertools/files/patches/mageia/hack-broken-rtla-cleaner.patch new file mode 100644 index 00000000..09fb63d8 --- /dev/null +++ b/kernel/tools/cpupowertools/files/patches/mageia/hack-broken-rtla-cleaner.patch @@ -0,0 +1,17 @@ + tools/tracing/rtla/Makefile | 5 ----- + 1 file changed, 5 deletions(-) + +--- linux-6.1/tools/tracing/rtla/Makefile.orig ++++ linux-6.1/tools/tracing/rtla/Makefile +@@ -124,11 +124,6 @@ install: doc_install + + .PHONY: clean tarball + clean: doc_clean +- @test ! -f rtla || rm rtla +- @test ! -f rtla-static || rm rtla-static +- @test ! -f src/rtla.o || rm src/rtla.o +- @test ! -f $(TARBALL) || rm -f $(TARBALL) +- @rm -rf *~ $(OBJ) *.tar.$(CEXT) + + tarball: clean + rm -rf $(NAME)-$(VERSION) && mkdir $(NAME)-$(VERSION) diff --git a/kernel/tools/cpupowertools/files/patches/mageia/lib-zstd-Fix-comment-typo.patch b/kernel/tools/cpupowertools/files/patches/mageia/lib-zstd-Fix-comment-typo.patch new file mode 100644 index 00000000..41837b10 --- /dev/null +++ b/kernel/tools/cpupowertools/files/patches/mageia/lib-zstd-Fix-comment-typo.patch @@ -0,0 +1,29 @@ +From 19d7df98472851e1d2d11e00c177988d0f49683d Mon Sep 17 00:00:00 2001 +From: Xin Gao +Date: Mon, 17 Oct 2022 15:18:59 -0700 +Subject: [PATCH 4/6] lib: zstd: Fix comment typo + +The double `when' is duplicated in line 999, remove one. + +Signed-off-by: Xin Gao +Signed-off-by: Nick Terrell +--- + lib/zstd/decompress/zstd_decompress.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/lib/zstd/decompress/zstd_decompress.c b/lib/zstd/decompress/zstd_decompress.c +index b4d81d84479a..6928e85f9d19 100644 +--- a/lib/zstd/decompress/zstd_decompress.c ++++ b/lib/zstd/decompress/zstd_decompress.c +@@ -996,7 +996,7 @@ size_t ZSTD_decompress(void* dst, size_t dstCapacity, const void* src, size_t sr + size_t ZSTD_nextSrcSizeToDecompress(ZSTD_DCtx* dctx) { return dctx->expected; } + + /* +- * Similar to ZSTD_nextSrcSizeToDecompress(), but when when a block input can be streamed, ++ * Similar to ZSTD_nextSrcSizeToDecompress(), but when a block input can be streamed, + * we allow taking a partial block as the input. Currently only raw uncompressed blocks can + * be streamed. + * +-- +2.30.6 + diff --git a/kernel/tools/cpupowertools/files/patches/mageia/lib-zstd-clean-up-double-word-in-comment.patch b/kernel/tools/cpupowertools/files/patches/mageia/lib-zstd-clean-up-double-word-in-comment.patch new file mode 100644 index 00000000..4290a3c3 --- /dev/null +++ b/kernel/tools/cpupowertools/files/patches/mageia/lib-zstd-clean-up-double-word-in-comment.patch @@ -0,0 +1,38 @@ +From 88a309465b3f05a100c3b81966982c0f9f5d23a6 Mon Sep 17 00:00:00 2001 +From: Tom Rix +Date: Thu, 20 Jan 2022 05:20:06 -0800 +Subject: [PATCH 1/6] lib: zstd: clean up double word in comment. + +Remove the second 'a' and 'into'. + +Signed-off-by: Tom Rix +Signed-off-by: Nick Terrell +--- + include/linux/zstd_lib.h | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/include/linux/zstd_lib.h b/include/linux/zstd_lib.h +index b8c7dbf98390..6b91758b61af 100644 +--- a/include/linux/zstd_lib.h ++++ b/include/linux/zstd_lib.h +@@ -1330,7 +1330,7 @@ ZSTDLIB_API size_t ZSTD_generateSequences(ZSTD_CCtx* zc, ZSTD_Sequence* outSeqs, + + /*! ZSTD_mergeBlockDelimiters() : + * Given an array of ZSTD_Sequence, remove all sequences that represent block delimiters/last literals +- * by merging them into into the literals of the next sequence. ++ * by merging them into the literals of the next sequence. + * + * As such, the final generated result has no explicit representation of block boundaries, + * and the final last literals segment is not represented in the sequences. +@@ -1377,7 +1377,7 @@ ZSTDLIB_API size_t ZSTD_compressSequences(ZSTD_CCtx* const cctx, void* dst, size + /*! ZSTD_writeSkippableFrame() : + * Generates a zstd skippable frame containing data given by src, and writes it to dst buffer. + * +- * Skippable frames begin with a a 4-byte magic number. There are 16 possible choices of magic number, ++ * Skippable frames begin with a 4-byte magic number. There are 16 possible choices of magic number, + * ranging from ZSTD_MAGIC_SKIPPABLE_START to ZSTD_MAGIC_SKIPPABLE_START+15. + * As such, the parameter magicVariant controls the exact skippable frame magic number variant used, so + * the magic number used will be ZSTD_MAGIC_SKIPPABLE_START + magicVariant. +-- +2.30.6 + diff --git a/kernel/tools/cpupowertools/files/patches/mageia/lib-zstd-fix-repeated-words-in-comments.patch b/kernel/tools/cpupowertools/files/patches/mageia/lib-zstd-fix-repeated-words-in-comments.patch new file mode 100644 index 00000000..cce0a6a1 --- /dev/null +++ b/kernel/tools/cpupowertools/files/patches/mageia/lib-zstd-fix-repeated-words-in-comments.patch @@ -0,0 +1,29 @@ +From 7486f5c6e7b197400678f1bb603ac9e4027fb830 Mon Sep 17 00:00:00 2001 +From: Jilin Yuan +Date: Fri, 2 Sep 2022 09:32:12 +0800 +Subject: [PATCH 3/6] lib: zstd: fix repeated words in comments + +Delete the redundant word 'the'. + +Signed-off-by: Jilin Yuan +Signed-off-by: Nick Terrell +--- + lib/zstd/compress/zstd_compress.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/lib/zstd/compress/zstd_compress.c b/lib/zstd/compress/zstd_compress.c +index a4e916008b3a..73fff4c60149 100644 +--- a/lib/zstd/compress/zstd_compress.c ++++ b/lib/zstd/compress/zstd_compress.c +@@ -4441,7 +4441,7 @@ static size_t ZSTD_validateSequence(U32 offCode, U32 matchLength, + size_t posInSrc, U32 windowLog, size_t dictSize, U32 minMatch) { + size_t offsetBound; + U32 windowSize = 1 << windowLog; +- /* posInSrc represents the amount of data the the decoder would decode up to this point. ++ /* posInSrc represents the amount of data the decoder would decode up to this point. + * As long as the amount of data decoded is less than or equal to window size, offsets may be + * larger than the total length of output decoded in order to reference the dict, even larger than + * window size. After output surpasses windowSize, we're limited to windowSize offsets again. +-- +2.30.6 + diff --git a/kernel/tools/cpupowertools/files/patches/mageia/net-wireless-iwlwifi-add-new-pci-id-for-6235.patch b/kernel/tools/cpupowertools/files/patches/mageia/net-wireless-iwlwifi-add-new-pci-id-for-6235.patch new file mode 100644 index 00000000..f34dd942 --- /dev/null +++ b/kernel/tools/cpupowertools/files/patches/mageia/net-wireless-iwlwifi-add-new-pci-id-for-6235.patch @@ -0,0 +1,31 @@ +From: Alex Hung +Subject: [PATCH] iwlwifi: add new pci id for 6235 +Date: Mon, 22 Mar 2021 01:11:21 -0600 + +lspci output: +Network controller [0280]: Intel Corporation Centrino Advanced-N6235 + [8086:088f] (rev 24) + Subsystem: Intel Corporation Centrino Advanced-N 6235 [8086:526a] + +Cc: stable-u79uwXL29TY76Z2rM5mHXA@public.gmane.org +Signed-off-by: Alex Hung +--- + drivers/net/wireless/intel/iwlwifi/pcie/drv.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/net/wireless/intel/iwlwifi/pcie/drv.c b/drivers/net/wireless/intel/iwlwifi/pcie/drv.c +index ffaf973..f85fe36 100644 +--- a/drivers/net/wireless/intel/iwlwifi/pcie/drv.c ++++ b/drivers/net/wireless/intel/iwlwifi/pcie/drv.c +@@ -200,6 +200,7 @@ static const struct pci_device_id iwl_hw_card_ids[] = { + {IWL_PCI_DEVICE(0x088E, 0x446A, iwl6035_2agn_sff_cfg)}, + {IWL_PCI_DEVICE(0x088E, 0x4860, iwl6035_2agn_cfg)}, + {IWL_PCI_DEVICE(0x088F, 0x5260, iwl6035_2agn_cfg)}, ++ {IWL_PCI_DEVICE(0x088F, 0x526A, iwl6035_2agn_cfg)}, + + /* 105 Series */ + {IWL_PCI_DEVICE(0x0894, 0x0022, iwl105_bgn_cfg)}, +-- +2.7.4 + + diff --git a/kernel/tools/cpupowertools/files/patches/mageia/net-wireless-rtw88-6.2-git.patch b/kernel/tools/cpupowertools/files/patches/mageia/net-wireless-rtw88-6.2-git.patch new file mode 100644 index 00000000..e13bb5d8 --- /dev/null +++ b/kernel/tools/cpupowertools/files/patches/mageia/net-wireless-rtw88-6.2-git.patch @@ -0,0 +1,2377 @@ + + drivers/net/wireless/realtek/rtw88/Kconfig | 47 +++++++++ + drivers/net/wireless/realtek/rtw88/Makefile | 15 +++ + drivers/net/wireless/realtek/rtw88/coex.c | 3 + drivers/net/wireless/realtek/rtw88/debug.c | 15 +++ + drivers/net/wireless/realtek/rtw88/fw.c | 31 +++--- + drivers/net/wireless/realtek/rtw88/fw.h | 11 ++ + drivers/net/wireless/realtek/rtw88/hci.h | 9 - + drivers/net/wireless/realtek/rtw88/mac.c | 21 ++++ + drivers/net/wireless/realtek/rtw88/mac80211.c | 2 + drivers/net/wireless/realtek/rtw88/main.c | 12 +- + drivers/net/wireless/realtek/rtw88/main.h | 12 +- + drivers/net/wireless/realtek/rtw88/phy.c | 6 - + drivers/net/wireless/realtek/rtw88/ps.c | 2 + drivers/net/wireless/realtek/rtw88/reg.h | 1 + drivers/net/wireless/realtek/rtw88/rtw8723d.c | 28 +++++ + drivers/net/wireless/realtek/rtw88/rtw8723d.h | 13 ++ + drivers/net/wireless/realtek/rtw88/rtw8723du.c | 36 +++++++ + drivers/net/wireless/realtek/rtw88/rtw8821c.c | 18 +++ + drivers/net/wireless/realtek/rtw88/rtw8821c.h | 21 ++++ + drivers/net/wireless/realtek/rtw88/rtw8821cu.c | 50 ++++++++++ + drivers/net/wireless/realtek/rtw88/rtw8822b.c | 19 +++ + drivers/net/wireless/realtek/rtw88/rtw8822bu.c | 90 ++++++++++++++++++ + drivers/net/wireless/realtek/rtw88/rtw8822c.c | 24 ++++ + drivers/net/wireless/realtek/rtw88/rtw8822cu.c | 44 ++++++++ + drivers/net/wireless/realtek/rtw88/tx.h | 31 ++++++ + drivers/net/wireless/realtek/rtw88/usb.c | 911 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + drivers/net/wireless/realtek/rtw88/usb.h | 107 +++++++++++++++++++++ + drivers/net/wireless/realtek/rtw88/util.c | 103 ++++++++++++++++++++ + drivers/net/wireless/realtek/rtw88/util.h | 12 +- + 29 files changed, 1650 insertions(+), 44 deletions(-) + +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw88/coex.c linux-6.2/drivers/net/wireless/realtek/rtw88/coex.c +--- linux-6.1/drivers/net/wireless/realtek/rtw88/coex.c 2022-12-12 00:15:18.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw88/coex.c 2022-12-24 00:49:25.771376835 +0200 +@@ -633,7 +633,7 @@ static struct sk_buff *rtw_coex_info_req + struct rtw_coex *coex = &rtwdev->coex; + struct sk_buff *skb_resp = NULL; + +- mutex_lock(&coex->mutex); ++ lockdep_assert_held(&rtwdev->mutex); + + rtw_fw_query_bt_mp_info(rtwdev, req); + +@@ -650,7 +650,6 @@ static struct sk_buff *rtw_coex_info_req + } + + out: +- mutex_unlock(&coex->mutex); + return skb_resp; + } + +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw88/debug.c linux-6.2/drivers/net/wireless/realtek/rtw88/debug.c +--- linux-6.1/drivers/net/wireless/realtek/rtw88/debug.c 2022-12-12 00:15:18.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw88/debug.c 2022-12-24 00:49:25.771376835 +0200 +@@ -144,7 +144,9 @@ static int rtw_debugfs_get_rf_read(struc + addr = debugfs_priv->rf_addr; + mask = debugfs_priv->rf_mask; + ++ mutex_lock(&rtwdev->mutex); + val = rtw_read_rf(rtwdev, path, addr, mask); ++ mutex_unlock(&rtwdev->mutex); + + seq_printf(m, "rf_read path:%d addr:0x%08x mask:0x%08x val=0x%08x\n", + path, addr, mask, val); +@@ -390,7 +392,9 @@ static ssize_t rtw_debugfs_set_h2c(struc + return -EINVAL; + } + ++ mutex_lock(&rtwdev->mutex); + rtw_fw_h2c_cmd_dbg(rtwdev, param); ++ mutex_unlock(&rtwdev->mutex); + + return count; + } +@@ -414,7 +418,9 @@ static ssize_t rtw_debugfs_set_rf_write( + return count; + } + ++ mutex_lock(&rtwdev->mutex); + rtw_write_rf(rtwdev, path, addr, mask, val); ++ mutex_unlock(&rtwdev->mutex); + rtw_dbg(rtwdev, RTW_DBG_DEBUGFS, + "write_rf path:%d addr:0x%08x mask:0x%08x, val:0x%08x\n", + path, addr, mask, val); +@@ -519,6 +525,8 @@ static int rtw_debug_get_rf_dump(struct + u32 addr, offset, data; + u8 path; + ++ mutex_lock(&rtwdev->mutex); ++ + for (path = 0; path < rtwdev->hal.rf_path_num; path++) { + seq_printf(m, "RF path:%d\n", path); + for (addr = 0; addr < 0x100; addr += 4) { +@@ -533,6 +541,8 @@ static int rtw_debug_get_rf_dump(struct + seq_puts(m, "\n"); + } + ++ mutex_unlock(&rtwdev->mutex); ++ + return 0; + } + +@@ -831,7 +841,9 @@ static int rtw_debugfs_get_coex_info(str + struct rtw_debugfs_priv *debugfs_priv = m->private; + struct rtw_dev *rtwdev = debugfs_priv->rtwdev; + ++ mutex_lock(&rtwdev->mutex); + rtw_coex_display_coex_info(rtwdev, m); ++ mutex_unlock(&rtwdev->mutex); + + return 0; + } +@@ -1026,6 +1038,8 @@ static void dump_gapk_status(struct rtw_ + dm_info->dm_flags & BIT(RTW_DM_CAP_TXGAPK) ? '-' : '+', + rtw_dm_cap_strs[RTW_DM_CAP_TXGAPK]); + ++ mutex_lock(&rtwdev->mutex); ++ + for (path = 0; path < rtwdev->hal.rf_path_num; path++) { + val = rtw_read_rf(rtwdev, path, RF_GAINTX, RFREG_MASK); + seq_printf(m, "path %d:\n0x%x = 0x%x\n", path, RF_GAINTX, val); +@@ -1035,6 +1049,7 @@ static void dump_gapk_status(struct rtw_ + txgapk->rf3f_fs[path][i], i); + seq_puts(m, "\n"); + } ++ mutex_unlock(&rtwdev->mutex); + } + + static int rtw_debugfs_get_dm_cap(struct seq_file *m, void *v) +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw88/fw.c linux-6.2/drivers/net/wireless/realtek/rtw88/fw.c +--- linux-6.1/drivers/net/wireless/realtek/rtw88/fw.c 2022-12-12 00:15:18.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw88/fw.c 2022-12-24 00:49:25.771376835 +0200 +@@ -311,10 +311,10 @@ EXPORT_SYMBOL(rtw_fw_c2h_cmd_isr); + static void rtw_fw_send_h2c_command(struct rtw_dev *rtwdev, + u8 *h2c) + { ++ struct rtw_h2c_cmd *h2c_cmd = (struct rtw_h2c_cmd *)h2c; + u8 box; + u8 box_state; + u32 box_reg, box_ex_reg; +- int idx; + int ret; + + rtw_dbg(rtwdev, RTW_DBG_FW, +@@ -322,7 +322,7 @@ static void rtw_fw_send_h2c_command(stru + h2c[3], h2c[2], h2c[1], h2c[0], + h2c[7], h2c[6], h2c[5], h2c[4]); + +- spin_lock(&rtwdev->h2c.lock); ++ lockdep_assert_held(&rtwdev->mutex); + + box = rtwdev->h2c.last_box_num; + switch (box) { +@@ -344,7 +344,7 @@ static void rtw_fw_send_h2c_command(stru + break; + default: + WARN(1, "invalid h2c mail box number\n"); +- goto out; ++ return; + } + + ret = read_poll_timeout_atomic(rtw_read8, box_state, +@@ -353,19 +353,14 @@ static void rtw_fw_send_h2c_command(stru + + if (ret) { + rtw_err(rtwdev, "failed to send h2c command\n"); +- goto out; ++ return; + } + +- for (idx = 0; idx < 4; idx++) +- rtw_write8(rtwdev, box_reg + idx, h2c[idx]); +- for (idx = 0; idx < 4; idx++) +- rtw_write8(rtwdev, box_ex_reg + idx, h2c[idx + 4]); ++ rtw_write32(rtwdev, box_ex_reg, le32_to_cpu(h2c_cmd->msg_ext)); ++ rtw_write32(rtwdev, box_reg, le32_to_cpu(h2c_cmd->msg)); + + if (++rtwdev->h2c.last_box_num >= 4) + rtwdev->h2c.last_box_num = 0; +- +-out: +- spin_unlock(&rtwdev->h2c.lock); + } + + void rtw_fw_h2c_cmd_dbg(struct rtw_dev *rtwdev, u8 *h2c) +@@ -377,15 +372,13 @@ static void rtw_fw_send_h2c_packet(struc + { + int ret; + +- spin_lock(&rtwdev->h2c.lock); ++ lockdep_assert_held(&rtwdev->mutex); + + FW_OFFLOAD_H2C_SET_SEQ_NUM(h2c_pkt, rtwdev->h2c.seq); + ret = rtw_hci_write_data_h2c(rtwdev, h2c_pkt, H2C_PKT_SIZE); + if (ret) + rtw_err(rtwdev, "failed to send h2c packet\n"); + rtwdev->h2c.seq++; +- +- spin_unlock(&rtwdev->h2c.lock); + } + + void +@@ -823,6 +816,16 @@ void rtw_fw_set_nlo_info(struct rtw_dev + + rtw_fw_send_h2c_command(rtwdev, h2c_pkt); + } ++ ++void rtw_fw_set_recover_bt_device(struct rtw_dev *rtwdev) ++{ ++ u8 h2c_pkt[H2C_PKT_SIZE] = {0}; ++ ++ SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_RECOVER_BT_DEV); ++ SET_RECOVER_BT_DEV_EN(h2c_pkt, 1); ++ ++ rtw_fw_send_h2c_command(rtwdev, h2c_pkt); ++} + + void rtw_fw_set_pg_info(struct rtw_dev *rtwdev) + { +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw88/fw.h linux-6.2/drivers/net/wireless/realtek/rtw88/fw.h +--- linux-6.1/drivers/net/wireless/realtek/rtw88/fw.h 2022-12-12 00:15:18.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw88/fw.h 2022-12-24 00:49:25.771376835 +0200 +@@ -81,6 +81,11 @@ struct rtw_c2h_adaptivity { + u8 option; + } __packed; + ++struct rtw_h2c_cmd { ++ __le32 msg; ++ __le32 msg_ext; ++} __packed; ++ + enum rtw_rsvd_packet_type { + RSVD_BEACON, + RSVD_DUMMY, +@@ -550,6 +555,8 @@ static inline void rtw_h2c_pkt_set_heade + #define H2C_CMD_AOAC_GLOBAL_INFO 0x82 + #define H2C_CMD_NLO_INFO 0x8C + ++#define H2C_CMD_RECOVER_BT_DEV 0xD1 ++ + #define SET_H2C_CMD_ID_CLASS(h2c_pkt, value) \ + le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(7, 0)) + +@@ -749,6 +756,9 @@ static inline void rtw_h2c_pkt_set_heade + #define SET_NLO_LOC_NLO_INFO(h2c_pkt, value) \ + le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16)) + ++#define SET_RECOVER_BT_DEV_EN(h2c_pkt, value) \ ++ le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8)) ++ + #define GET_FW_DUMP_LEN(_header) \ + le32_get_bits(*((__le32 *)(_header) + 0x00), GENMASK(15, 0)) + #define GET_FW_DUMP_SEQ(_header) \ +@@ -838,6 +848,7 @@ void rtw_fw_set_aoac_global_info_cmd(str + u8 group_key_enc); + + void rtw_fw_set_nlo_info(struct rtw_dev *rtwdev, bool enable); ++void rtw_fw_set_recover_bt_device(struct rtw_dev *rtwdev); + void rtw_fw_update_pkt_probe_req(struct rtw_dev *rtwdev, + struct cfg80211_ssid *ssid); + void rtw_fw_channel_switch(struct rtw_dev *rtwdev, bool enable); +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw88/hci.h linux-6.2/drivers/net/wireless/realtek/rtw88/hci.h +--- linux-6.1/drivers/net/wireless/realtek/rtw88/hci.h 2022-12-12 00:15:18.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw88/hci.h 2022-12-24 00:49:25.771376835 +0200 +@@ -166,12 +166,11 @@ static inline u32 + rtw_read_rf(struct rtw_dev *rtwdev, enum rtw_rf_path rf_path, + u32 addr, u32 mask) + { +- unsigned long flags; + u32 val; + +- spin_lock_irqsave(&rtwdev->rf_lock, flags); ++ lockdep_assert_held(&rtwdev->mutex); ++ + val = rtwdev->chip->ops->read_rf(rtwdev, rf_path, addr, mask); +- spin_unlock_irqrestore(&rtwdev->rf_lock, flags); + + return val; + } +@@ -180,11 +179,9 @@ static inline void + rtw_write_rf(struct rtw_dev *rtwdev, enum rtw_rf_path rf_path, + u32 addr, u32 mask, u32 data) + { +- unsigned long flags; ++ lockdep_assert_held(&rtwdev->mutex); + +- spin_lock_irqsave(&rtwdev->rf_lock, flags); + rtwdev->chip->ops->write_rf(rtwdev, rf_path, addr, mask, data); +- spin_unlock_irqrestore(&rtwdev->rf_lock, flags); + } + + static inline u32 +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw88/Kconfig linux-6.2/drivers/net/wireless/realtek/rtw88/Kconfig +--- linux-6.1/drivers/net/wireless/realtek/rtw88/Kconfig 2022-12-12 00:15:18.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw88/Kconfig 2022-12-24 00:49:25.770376835 +0200 +@@ -16,6 +16,9 @@ config RTW88_CORE + config RTW88_PCI + tristate + ++config RTW88_USB ++ tristate ++ + config RTW88_8822B + tristate + +@@ -39,6 +42,17 @@ config RTW88_8822BE + + 802.11ac PCIe wireless network adapter + ++config RTW88_8822BU ++ tristate "Realtek 8822BU USB wireless network adapter" ++ depends on USB ++ select RTW88_CORE ++ select RTW88_USB ++ select RTW88_8822B ++ help ++ Select this option will enable support for 8822BU chipset ++ ++ 802.11ac USB wireless network adapter ++ + config RTW88_8822CE + tristate "Realtek 8822CE PCI wireless network adapter" + depends on PCI +@@ -50,6 +64,17 @@ config RTW88_8822CE + + 802.11ac PCIe wireless network adapter + ++config RTW88_8822CU ++ tristate "Realtek 8822CU USB wireless network adapter" ++ depends on USB ++ select RTW88_CORE ++ select RTW88_USB ++ select RTW88_8822C ++ help ++ Select this option will enable support for 8822CU chipset ++ ++ 802.11ac USB wireless network adapter ++ + config RTW88_8723DE + tristate "Realtek 8723DE PCI wireless network adapter" + depends on PCI +@@ -61,6 +86,17 @@ config RTW88_8723DE + + 802.11n PCIe wireless network adapter + ++config RTW88_8723DU ++ tristate "Realtek 8723DU USB wireless network adapter" ++ depends on USB ++ select RTW88_CORE ++ select RTW88_USB ++ select RTW88_8723D ++ help ++ Select this option will enable support for 8723DU chipset ++ ++ 802.11n USB wireless network adapter ++ + config RTW88_8821CE + tristate "Realtek 8821CE PCI wireless network adapter" + depends on PCI +@@ -72,6 +108,17 @@ config RTW88_8821CE + + 802.11ac PCIe wireless network adapter + ++config RTW88_8821CU ++ tristate "Realtek 8821CU USB wireless network adapter" ++ depends on USB ++ select RTW88_CORE ++ select RTW88_USB ++ select RTW88_8821C ++ help ++ Select this option will enable support for 8821CU chipset ++ ++ 802.11ac USB wireless network adapter ++ + config RTW88_DEBUG + bool "Realtek rtw88 debug support" + depends on RTW88_CORE +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw88/mac80211.c linux-6.2/drivers/net/wireless/realtek/rtw88/mac80211.c +--- linux-6.1/drivers/net/wireless/realtek/rtw88/mac80211.c 2022-12-12 00:15:18.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw88/mac80211.c 2022-12-24 00:49:25.772376835 +0200 +@@ -487,8 +487,8 @@ static int rtw_ops_sta_remove(struct iee + { + struct rtw_dev *rtwdev = hw->priv; + +- rtw_fw_beacon_filter_config(rtwdev, false, vif); + mutex_lock(&rtwdev->mutex); ++ rtw_fw_beacon_filter_config(rtwdev, false, vif); + rtw_sta_remove(rtwdev, sta, true); + mutex_unlock(&rtwdev->mutex); + +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw88/mac.c linux-6.2/drivers/net/wireless/realtek/rtw88/mac.c +--- linux-6.1/drivers/net/wireless/realtek/rtw88/mac.c 2022-12-12 00:15:18.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw88/mac.c 2022-12-24 00:49:25.772376835 +0200 +@@ -906,7 +906,8 @@ out: + return ret; + } + +-int rtw_download_firmware(struct rtw_dev *rtwdev, struct rtw_fw_state *fw) ++static ++int _rtw_download_firmware(struct rtw_dev *rtwdev, struct rtw_fw_state *fw) + { + if (rtw_chip_wcpu_11n(rtwdev)) + return __rtw_download_firmware_legacy(rtwdev, fw); +@@ -914,6 +915,21 @@ int rtw_download_firmware(struct rtw_dev + return __rtw_download_firmware(rtwdev, fw); + } + ++int rtw_download_firmware(struct rtw_dev *rtwdev, struct rtw_fw_state *fw) ++{ ++ int ret; ++ ++ ret = _rtw_download_firmware(rtwdev, fw); ++ if (ret) ++ return ret; ++ ++ if (rtw_hci_type(rtwdev) == RTW_HCI_TYPE_PCIE && ++ rtwdev->chip->id == RTW_CHIP_TYPE_8821C) ++ rtw_fw_set_recover_bt_device(rtwdev); ++ ++ return 0; ++} ++ + static u32 get_priority_queues(struct rtw_dev *rtwdev, u32 queues) + { + const struct rtw_rqpn *rqpn = rtwdev->fifo.rqpn; +@@ -1032,6 +1048,9 @@ static int txdma_queue_mapping(struct rt + if (rtw_chip_wcpu_11ac(rtwdev)) + rtw_write32(rtwdev, REG_H2CQ_CSR, BIT_H2CQ_FULL); + ++ if (rtw_hci_type(rtwdev) == RTW_HCI_TYPE_USB) ++ rtw_write8_set(rtwdev, REG_TXDMA_PQ_MAP, BIT_RXDMA_ARBBW_EN); ++ + return 0; + } + +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw88/main.c linux-6.2/drivers/net/wireless/realtek/rtw88/main.c +--- linux-6.1/drivers/net/wireless/realtek/rtw88/main.c 2022-12-12 00:15:18.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw88/main.c 2022-12-24 00:49:25.772376835 +0200 +@@ -1731,7 +1731,8 @@ static void rtw_load_firmware_cb(const s + update_firmware_info(rtwdev, fw); + complete_all(&fw->completion); + +- rtw_info(rtwdev, "Firmware version %u.%u.%u, H2C version %u\n", ++ rtw_info(rtwdev, "%sFirmware version %u.%u.%u, H2C version %u\n", ++ fw->type == RTW_WOWLAN_FW ? "WOW " : "", + fw->version, fw->sub_version, fw->sub_index, fw->h2c_version); + } + +@@ -1757,6 +1758,7 @@ static int rtw_load_firmware(struct rtw_ + return -ENOENT; + } + ++ fw->type = type; + fw->rtwdev = rtwdev; + init_completion(&fw->completion); + +@@ -1781,6 +1783,10 @@ static int rtw_chip_parameter_setup(stru + rtwdev->hci.rpwm_addr = 0x03d9; + rtwdev->hci.cpwm_addr = 0x03da; + break; ++ case RTW_HCI_TYPE_USB: ++ rtwdev->hci.rpwm_addr = 0xfe58; ++ rtwdev->hci.cpwm_addr = 0xfe57; ++ break; + default: + rtw_err(rtwdev, "unsupported hci type\n"); + return -EINVAL; +@@ -2065,13 +2071,10 @@ int rtw_core_init(struct rtw_dev *rtwdev + skb_queue_head_init(&rtwdev->coex.queue); + skb_queue_head_init(&rtwdev->tx_report.queue); + +- spin_lock_init(&rtwdev->rf_lock); +- spin_lock_init(&rtwdev->h2c.lock); + spin_lock_init(&rtwdev->txq_lock); + spin_lock_init(&rtwdev->tx_report.q_lock); + + mutex_init(&rtwdev->mutex); +- mutex_init(&rtwdev->coex.mutex); + mutex_init(&rtwdev->hal.tx_power_mutex); + + init_waitqueue_head(&rtwdev->coex.wait); +@@ -2143,7 +2146,6 @@ void rtw_core_deinit(struct rtw_dev *rtw + } + + mutex_destroy(&rtwdev->mutex); +- mutex_destroy(&rtwdev->coex.mutex); + mutex_destroy(&rtwdev->hal.tx_power_mutex); + } + EXPORT_SYMBOL(rtw_core_deinit); +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw88/main.h linux-6.2/drivers/net/wireless/realtek/rtw88/main.h +--- linux-6.1/drivers/net/wireless/realtek/rtw88/main.h 2022-12-12 00:15:18.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw88/main.h 2022-12-24 00:49:25.773376835 +0200 +@@ -871,6 +871,10 @@ struct rtw_chip_ops { + bool is_tx2_path); + void (*config_txrx_mode)(struct rtw_dev *rtwdev, u8 tx_path, + u8 rx_path, bool is_tx2_path); ++ /* for USB/SDIO only */ ++ void (*fill_txdesc_checksum)(struct rtw_dev *rtwdev, ++ struct rtw_tx_pkt_info *pkt_info, ++ u8 *txdesc); + + /* for coex */ + void (*coex_set_init)(struct rtw_dev *rtwdev); +@@ -1501,8 +1505,6 @@ struct rtw_coex_stat { + }; + + struct rtw_coex { +- /* protects coex info request section */ +- struct mutex mutex; + struct sk_buff_head queue; + wait_queue_head_t wait; + +@@ -1851,6 +1853,7 @@ struct rtw_fw_state { + u16 h2c_version; + u32 feature; + u32 feature_ext; ++ enum rtw_fw_type type; + }; + + enum rtw_sar_sources { +@@ -1994,9 +1997,6 @@ struct rtw_dev { + /* ensures exclusive access from mac80211 callbacks */ + struct mutex mutex; + +- /* read/write rf register */ +- spinlock_t rf_lock; +- + /* watch dog every 2 sec */ + struct delayed_work watch_dog_work; + u32 watch_dog_cnt; +@@ -2022,8 +2022,6 @@ struct rtw_dev { + struct { + /* incicate the mail box to use with fw */ + u8 last_box_num; +- /* protect to send h2c to fw */ +- spinlock_t lock; + u32 seq; + } h2c; + +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw88/Makefile linux-6.2/drivers/net/wireless/realtek/rtw88/Makefile +--- linux-6.1/drivers/net/wireless/realtek/rtw88/Makefile 2022-12-12 00:15:18.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw88/Makefile 2022-12-24 00:49:25.770376835 +0200 +@@ -26,23 +26,38 @@ rtw88_8822b-objs := rtw8822b.o rtw8822b + obj-$(CONFIG_RTW88_8822BE) += rtw88_8822be.o + rtw88_8822be-objs := rtw8822be.o + ++obj-$(CONFIG_RTW88_8822BU) += rtw88_8822bu.o ++rtw88_8822bu-objs := rtw8822bu.o ++ + obj-$(CONFIG_RTW88_8822C) += rtw88_8822c.o + rtw88_8822c-objs := rtw8822c.o rtw8822c_table.o + + obj-$(CONFIG_RTW88_8822CE) += rtw88_8822ce.o + rtw88_8822ce-objs := rtw8822ce.o + ++obj-$(CONFIG_RTW88_8822CU) += rtw88_8822cu.o ++rtw88_8822cu-objs := rtw8822cu.o ++ + obj-$(CONFIG_RTW88_8723D) += rtw88_8723d.o + rtw88_8723d-objs := rtw8723d.o rtw8723d_table.o + + obj-$(CONFIG_RTW88_8723DE) += rtw88_8723de.o + rtw88_8723de-objs := rtw8723de.o + ++obj-$(CONFIG_RTW88_8723DU) += rtw88_8723du.o ++rtw88_8723du-objs := rtw8723du.o ++ + obj-$(CONFIG_RTW88_8821C) += rtw88_8821c.o + rtw88_8821c-objs := rtw8821c.o rtw8821c_table.o + + obj-$(CONFIG_RTW88_8821CE) += rtw88_8821ce.o + rtw88_8821ce-objs := rtw8821ce.o + ++obj-$(CONFIG_RTW88_8821CU) += rtw88_8821cu.o ++rtw88_8821cu-objs := rtw8821cu.o ++ + obj-$(CONFIG_RTW88_PCI) += rtw88_pci.o + rtw88_pci-objs := pci.o ++ ++obj-$(CONFIG_RTW88_USB) += rtw88_usb.o ++rtw88_usb-objs := usb.o +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw88/phy.c linux-6.2/drivers/net/wireless/realtek/rtw88/phy.c +--- linux-6.1/drivers/net/wireless/realtek/rtw88/phy.c 2022-12-12 00:15:18.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw88/phy.c 2022-12-24 00:49:25.773376835 +0200 +@@ -300,7 +300,7 @@ static void rtw_phy_stat_rssi(struct rtw + + data.rtwdev = rtwdev; + data.min_rssi = U8_MAX; +- rtw_iterate_stas_atomic(rtwdev, rtw_phy_stat_rssi_iter, &data); ++ rtw_iterate_stas(rtwdev, rtw_phy_stat_rssi_iter, &data); + + dm_info->pre_min_rssi = dm_info->min_rssi; + dm_info->min_rssi = data.min_rssi; +@@ -544,7 +544,7 @@ static void rtw_phy_ra_info_update(struc + if (rtwdev->watch_dog_cnt & 0x3) + return; + +- rtw_iterate_stas_atomic(rtwdev, rtw_phy_ra_info_update_iter, rtwdev); ++ rtw_iterate_stas(rtwdev, rtw_phy_ra_info_update_iter, rtwdev); + } + + static u32 rtw_phy_get_rrsr_mask(struct rtw_dev *rtwdev, u8 rate_idx) +@@ -597,7 +597,7 @@ static void rtw_phy_rrsr_update(struct r + struct rtw_dm_info *dm_info = &rtwdev->dm_info; + + dm_info->rrsr_mask_min = RRSR_RATE_ORDER_MAX; +- rtw_iterate_stas_atomic(rtwdev, rtw_phy_rrsr_mask_min_iter, rtwdev); ++ rtw_iterate_stas(rtwdev, rtw_phy_rrsr_mask_min_iter, rtwdev); + rtw_write32(rtwdev, REG_RRSR, dm_info->rrsr_val_init & dm_info->rrsr_mask_min); + } + +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw88/ps.c linux-6.2/drivers/net/wireless/realtek/rtw88/ps.c +--- linux-6.1/drivers/net/wireless/realtek/rtw88/ps.c 2022-12-12 00:15:18.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw88/ps.c 2022-12-24 00:49:25.773376835 +0200 +@@ -61,7 +61,7 @@ int rtw_leave_ips(struct rtw_dev *rtwdev + return ret; + } + +- rtw_iterate_vifs_atomic(rtwdev, rtw_restore_port_cfg_iter, rtwdev); ++ rtw_iterate_vifs(rtwdev, rtw_restore_port_cfg_iter, rtwdev); + + rtw_coex_ips_notify(rtwdev, COEX_IPS_LEAVE); + +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw88/reg.h linux-6.2/drivers/net/wireless/realtek/rtw88/reg.h +--- linux-6.1/drivers/net/wireless/realtek/rtw88/reg.h 2022-12-12 00:15:18.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw88/reg.h 2022-12-24 00:49:25.773376835 +0200 +@@ -184,6 +184,7 @@ + #define BIT_TXDMA_VIQ_MAP(x) \ + (((x) & BIT_MASK_TXDMA_VIQ_MAP) << BIT_SHIFT_TXDMA_VIQ_MAP) + #define REG_TXDMA_PQ_MAP 0x010C ++#define BIT_RXDMA_ARBBW_EN BIT(0) + #define BIT_SHIFT_TXDMA_BEQ_MAP 8 + #define BIT_MASK_TXDMA_BEQ_MAP 0x3 + #define BIT_TXDMA_BEQ_MAP(x) \ +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw88/rtw8723d.c linux-6.2/drivers/net/wireless/realtek/rtw88/rtw8723d.c +--- linux-6.1/drivers/net/wireless/realtek/rtw88/rtw8723d.c 2022-12-12 00:15:18.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw88/rtw8723d.c 2022-12-24 00:49:25.773376835 +0200 +@@ -210,6 +210,12 @@ static void rtw8723de_efuse_parsing(stru + ether_addr_copy(efuse->addr, map->e.mac_addr); + } + ++static void rtw8723du_efuse_parsing(struct rtw_efuse *efuse, ++ struct rtw8723d_efuse *map) ++{ ++ ether_addr_copy(efuse->addr, map->u.mac_addr); ++} ++ + static int rtw8723d_read_efuse(struct rtw_dev *rtwdev, u8 *log_map) + { + struct rtw_efuse *efuse = &rtwdev->efuse; +@@ -239,6 +245,9 @@ static int rtw8723d_read_efuse(struct rt + case RTW_HCI_TYPE_PCIE: + rtw8723de_efuse_parsing(efuse, map); + break; ++ case RTW_HCI_TYPE_USB: ++ rtw8723du_efuse_parsing(efuse, map); ++ break; + default: + /* unsupported now */ + return -ENOTSUPP; +@@ -1945,6 +1954,24 @@ static void rtw8723d_pwr_track(struct rt + dm_info->pwr_trk_triggered = false; + } + ++static void rtw8723d_fill_txdesc_checksum(struct rtw_dev *rtwdev, ++ struct rtw_tx_pkt_info *pkt_info, ++ u8 *txdesc) ++{ ++ size_t words = 32 / 2; /* calculate the first 32 bytes (16 words) */ ++ __le16 chksum = 0; ++ __le16 *data = (__le16 *)(txdesc); ++ ++ SET_TX_DESC_TXDESC_CHECKSUM(txdesc, 0x0000); ++ ++ while (words--) ++ chksum ^= *data++; ++ ++ chksum = ~chksum; ++ ++ SET_TX_DESC_TXDESC_CHECKSUM(txdesc, __le16_to_cpu(chksum)); ++} ++ + static struct rtw_chip_ops rtw8723d_ops = { + .phy_set_param = rtw8723d_phy_set_param, + .read_efuse = rtw8723d_read_efuse, +@@ -1965,6 +1992,7 @@ static struct rtw_chip_ops rtw8723d_ops + .config_bfee = NULL, + .set_gid_table = NULL, + .cfg_csi_rate = NULL, ++ .fill_txdesc_checksum = rtw8723d_fill_txdesc_checksum, + + .coex_set_init = rtw8723d_coex_cfg_init, + .coex_set_ant_switch = NULL, +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw88/rtw8723d.h linux-6.2/drivers/net/wireless/realtek/rtw88/rtw8723d.h +--- linux-6.1/drivers/net/wireless/realtek/rtw88/rtw8723d.h 2022-12-12 00:15:18.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw88/rtw8723d.h 2022-12-24 00:49:25.773376835 +0200 +@@ -41,6 +41,14 @@ struct rtw8723de_efuse { + u8 sub_device_id[2]; + }; + ++struct rtw8723du_efuse { ++ u8 res4[48]; /* 0xd0 */ ++ u8 vender_id[2]; /* 0x100 */ ++ u8 product_id[2]; /* 0x102 */ ++ u8 usb_option; /* 0x104 */ ++ u8 mac_addr[ETH_ALEN]; /* 0x107 */ ++}; ++ + struct rtw8723d_efuse { + __le16 rtl_id; + u8 rsvd[2]; +@@ -69,7 +77,10 @@ struct rtw8723d_efuse { + u8 rfe_option; + u8 country_code[2]; + u8 res[3]; +- struct rtw8723de_efuse e; ++ union { ++ struct rtw8723de_efuse e; ++ struct rtw8723du_efuse u; ++ }; + }; + + extern const struct rtw_chip_info rtw8723d_hw_spec; +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw88/rtw8723du.c linux-6.2/drivers/net/wireless/realtek/rtw88/rtw8723du.c +--- linux-6.1/drivers/net/wireless/realtek/rtw88/rtw8723du.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw88/rtw8723du.c 2022-12-24 00:49:25.773376835 +0200 +@@ -0,0 +1,36 @@ ++// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause ++/* Copyright(c) 2018-2019 Realtek Corporation ++ */ ++ ++#include ++#include ++#include "main.h" ++#include "rtw8723d.h" ++#include "usb.h" ++ ++static const struct usb_device_id rtw_8723du_id_table[] = { ++ { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0xd723, 0xff, 0xff, 0xff), ++ .driver_info = (kernel_ulong_t)&(rtw8723d_hw_spec) }, /* 8723DU 1*1 */ ++ { USB_DEVICE_AND_INTERFACE_INFO(0x7392, 0xd611, 0xff, 0xff, 0xff), ++ .driver_info = (kernel_ulong_t)&(rtw8723d_hw_spec) }, /* Edimax EW-7611ULB V2 */ ++ { }, ++}; ++MODULE_DEVICE_TABLE(usb, rtw_8723du_id_table); ++ ++static int rtw8723du_probe(struct usb_interface *intf, ++ const struct usb_device_id *id) ++{ ++ return rtw_usb_probe(intf, id); ++} ++ ++static struct usb_driver rtw_8723du_driver = { ++ .name = "rtw_8723du", ++ .id_table = rtw_8723du_id_table, ++ .probe = rtw8723du_probe, ++ .disconnect = rtw_usb_disconnect, ++}; ++module_usb_driver(rtw_8723du_driver); ++ ++MODULE_AUTHOR("Hans Ulli Kroll "); ++MODULE_DESCRIPTION("Realtek 802.11n wireless 8723du driver"); ++MODULE_LICENSE("Dual BSD/GPL"); +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw88/rtw8821c.c linux-6.2/drivers/net/wireless/realtek/rtw88/rtw8821c.c +--- linux-6.1/drivers/net/wireless/realtek/rtw88/rtw8821c.c 2022-12-12 00:15:18.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw88/rtw8821c.c 2022-12-24 00:49:25.774376835 +0200 +@@ -26,6 +26,12 @@ static void rtw8821ce_efuse_parsing(stru + ether_addr_copy(efuse->addr, map->e.mac_addr); + } + ++static void rtw8821cu_efuse_parsing(struct rtw_efuse *efuse, ++ struct rtw8821c_efuse *map) ++{ ++ ether_addr_copy(efuse->addr, map->u.mac_addr); ++} ++ + enum rtw8821ce_rf_set { + SWITCH_TO_BTG, + SWITCH_TO_WLG, +@@ -68,6 +74,9 @@ static int rtw8821c_read_efuse(struct rt + case RTW_HCI_TYPE_PCIE: + rtw8821ce_efuse_parsing(efuse, map); + break; ++ case RTW_HCI_TYPE_USB: ++ rtw8821cu_efuse_parsing(efuse, map); ++ break; + default: + /* unsupported now */ + return -ENOTSUPP; +@@ -1148,6 +1157,13 @@ static void rtw8821c_phy_cck_pd_set(stru + dm_info->cck_pd_default + new_lvl * 2); + } + ++static void rtw8821c_fill_txdesc_checksum(struct rtw_dev *rtwdev, ++ struct rtw_tx_pkt_info *pkt_info, ++ u8 *txdesc) ++{ ++ fill_txdesc_checksum_common(txdesc, 16); ++} ++ + static struct rtw_pwr_seq_cmd trans_carddis_to_cardemu_8821c[] = { + {0x0086, + RTW_PWR_CUT_ALL_MSK, +@@ -1521,6 +1537,7 @@ static const struct rtw_rfe_def rtw8821c + [2] = RTW_DEF_RFE_EXT(8821c, 0, 0, 2), + [4] = RTW_DEF_RFE_EXT(8821c, 0, 0, 2), + [6] = RTW_DEF_RFE(8821c, 0, 0), ++ [34] = RTW_DEF_RFE(8821c, 0, 0), + }; + + static struct rtw_hw_reg rtw8821c_dig[] = { +@@ -1595,6 +1612,7 @@ static struct rtw_chip_ops rtw8821c_ops + .config_bfee = rtw8821c_bf_config_bfee, + .set_gid_table = rtw_bf_set_gid_table, + .cfg_csi_rate = rtw_bf_cfg_csi_rate, ++ .fill_txdesc_checksum = rtw8821c_fill_txdesc_checksum, + + .coex_set_init = rtw8821c_coex_cfg_init, + .coex_set_ant_switch = rtw8821c_coex_cfg_ant_switch, +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw88/rtw8821c.h linux-6.2/drivers/net/wireless/realtek/rtw88/rtw8821c.h +--- linux-6.1/drivers/net/wireless/realtek/rtw88/rtw8821c.h 2022-12-12 00:15:18.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw88/rtw8821c.h 2022-12-24 00:49:25.774376835 +0200 +@@ -9,6 +9,26 @@ + + #define RCR_VHT_ACK BIT(26) + ++struct rtw8821cu_efuse { ++ u8 res4[4]; /* 0xd0 */ ++ u8 usb_optional_function; ++ u8 res5[0x1e]; ++ u8 res6[2]; ++ u8 serial[0x0b]; /* 0xf5 */ ++ u8 vid; /* 0x100 */ ++ u8 res7; ++ u8 pid; ++ u8 res8[4]; ++ u8 mac_addr[ETH_ALEN]; /* 0x107 */ ++ u8 res9[2]; ++ u8 vendor_name[0x07]; ++ u8 res10[2]; ++ u8 device_name[0x14]; ++ u8 res11[0xcf]; ++ u8 package_type; /* 0x1fb */ ++ u8 res12[0x4]; ++}; ++ + struct rtw8821ce_efuse { + u8 mac_addr[ETH_ALEN]; /* 0xd0 */ + u8 vender_id[2]; +@@ -73,6 +93,7 @@ struct rtw8821c_efuse { + u8 res[3]; + union { + struct rtw8821ce_efuse e; ++ struct rtw8821cu_efuse u; + }; + }; + +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw88/rtw8821cu.c linux-6.2/drivers/net/wireless/realtek/rtw88/rtw8821cu.c +--- linux-6.1/drivers/net/wireless/realtek/rtw88/rtw8821cu.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw88/rtw8821cu.c 2022-12-24 00:49:25.774376835 +0200 +@@ -0,0 +1,50 @@ ++// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause ++/* Copyright(c) 2018-2019 Realtek Corporation ++ */ ++ ++#include ++#include ++#include "main.h" ++#include "rtw8821c.h" ++#include "usb.h" ++ ++static const struct usb_device_id rtw_8821cu_id_table[] = { ++ { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0xb82b, 0xff, 0xff, 0xff), ++ .driver_info = (kernel_ulong_t)&(rtw8821c_hw_spec) }, /* 8821CU */ ++ { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0xb820, 0xff, 0xff, 0xff), ++ .driver_info = (kernel_ulong_t)&(rtw8821c_hw_spec) }, /* 8821CU */ ++ { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0xc821, 0xff, 0xff, 0xff), ++ .driver_info = (kernel_ulong_t)&(rtw8821c_hw_spec) }, /* 8821CU */ ++ { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0xc820, 0xff, 0xff, 0xff), ++ .driver_info = (kernel_ulong_t)&(rtw8821c_hw_spec) }, /* 8821CU */ ++ { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0xc82a, 0xff, 0xff, 0xff), ++ .driver_info = (kernel_ulong_t)&(rtw8821c_hw_spec) }, /* 8821CU */ ++ { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0xc82b, 0xff, 0xff, 0xff), ++ .driver_info = (kernel_ulong_t)&(rtw8821c_hw_spec) }, /* 8821CU */ ++ { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0xc811, 0xff, 0xff, 0xff), ++ .driver_info = (kernel_ulong_t)&(rtw8821c_hw_spec) }, /* 8811CU */ ++ { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0x8811, 0xff, 0xff, 0xff), ++ .driver_info = (kernel_ulong_t)&(rtw8821c_hw_spec) }, /* 8811CU */ ++ { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0x2006, 0xff, 0xff, 0xff), ++ .driver_info = (kernel_ulong_t)&(rtw8821c_hw_spec) }, /* TOTOLINK A650UA v3 */ ++ {}, ++}; ++MODULE_DEVICE_TABLE(usb, rtw_8821cu_id_table); ++ ++static int rtw_8821cu_probe(struct usb_interface *intf, ++ const struct usb_device_id *id) ++{ ++ return rtw_usb_probe(intf, id); ++} ++ ++static struct usb_driver rtw_8821cu_driver = { ++ .name = "rtw_8821cu", ++ .id_table = rtw_8821cu_id_table, ++ .probe = rtw_8821cu_probe, ++ .disconnect = rtw_usb_disconnect, ++}; ++module_usb_driver(rtw_8821cu_driver); ++ ++MODULE_AUTHOR("Hans Ulli Kroll "); ++MODULE_DESCRIPTION("Realtek 802.11ac wireless 8821cu driver"); ++MODULE_LICENSE("Dual BSD/GPL"); +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw88/rtw8822b.c linux-6.2/drivers/net/wireless/realtek/rtw88/rtw8822b.c +--- linux-6.1/drivers/net/wireless/realtek/rtw88/rtw8822b.c 2022-12-12 00:15:18.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw88/rtw8822b.c 2022-12-24 00:49:25.774376835 +0200 +@@ -26,6 +26,12 @@ static void rtw8822be_efuse_parsing(stru + ether_addr_copy(efuse->addr, map->e.mac_addr); + } + ++static void rtw8822bu_efuse_parsing(struct rtw_efuse *efuse, ++ struct rtw8822b_efuse *map) ++{ ++ ether_addr_copy(efuse->addr, map->u.mac_addr); ++} ++ + static int rtw8822b_read_efuse(struct rtw_dev *rtwdev, u8 *log_map) + { + struct rtw_efuse *efuse = &rtwdev->efuse; +@@ -56,6 +62,9 @@ static int rtw8822b_read_efuse(struct rt + case RTW_HCI_TYPE_PCIE: + rtw8822be_efuse_parsing(efuse, map); + break; ++ case RTW_HCI_TYPE_USB: ++ rtw8822bu_efuse_parsing(efuse, map); ++ break; + default: + /* unsupported now */ + return -ENOTSUPP; +@@ -1588,6 +1597,15 @@ static void rtw8822b_adaptivity(struct r + rtw_phy_set_edcca_th(rtwdev, l2h, h2l); + } + ++static void rtw8822b_fill_txdesc_checksum(struct rtw_dev *rtwdev, ++ struct rtw_tx_pkt_info *pkt_info, ++ u8 *txdesc) ++{ ++ size_t words = 32 / 2; /* calculate the first 32 bytes (16 words) */ ++ ++ fill_txdesc_checksum_common(txdesc, words); ++} ++ + static const struct rtw_pwr_seq_cmd trans_carddis_to_cardemu_8822b[] = { + {0x0086, + RTW_PWR_CUT_ALL_MSK, +@@ -2163,6 +2181,7 @@ static struct rtw_chip_ops rtw8822b_ops + .cfg_csi_rate = rtw_bf_cfg_csi_rate, + .adaptivity_init = rtw8822b_adaptivity_init, + .adaptivity = rtw8822b_adaptivity, ++ .fill_txdesc_checksum = rtw8822b_fill_txdesc_checksum, + + .coex_set_init = rtw8822b_coex_cfg_init, + .coex_set_ant_switch = rtw8822b_coex_cfg_ant_switch, +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw88/rtw8822bu.c linux-6.2/drivers/net/wireless/realtek/rtw88/rtw8822bu.c +--- linux-6.1/drivers/net/wireless/realtek/rtw88/rtw8822bu.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw88/rtw8822bu.c 2022-12-24 00:49:25.774376835 +0200 +@@ -0,0 +1,90 @@ ++// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause ++/* Copyright(c) 2018-2019 Realtek Corporation ++ */ ++ ++#include ++#include ++#include "main.h" ++#include "rtw8822b.h" ++#include "usb.h" ++ ++static const struct usb_device_id rtw_8822bu_id_table[] = { ++ { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0xb812, 0xff, 0xff, 0xff), ++ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, ++ { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0xb82c, 0xff, 0xff, 0xff), ++ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, ++ { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0x2102, 0xff, 0xff, 0xff), ++ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* CCNC */ ++ { USB_DEVICE_AND_INTERFACE_INFO(0x7392, 0xb822, 0xff, 0xff, 0xff), ++ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* Edimax EW-7822ULC */ ++ { USB_DEVICE_AND_INTERFACE_INFO(0x7392, 0xc822, 0xff, 0xff, 0xff), ++ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* Edimax EW-7822UTC */ ++ { USB_DEVICE_AND_INTERFACE_INFO(0x7392, 0xd822, 0xff, 0xff, 0xff), ++ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* Edimax */ ++ { USB_DEVICE_AND_INTERFACE_INFO(0x7392, 0xe822, 0xff, 0xff, 0xff), ++ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* Edimax */ ++ { USB_DEVICE_AND_INTERFACE_INFO(0x7392, 0xf822, 0xff, 0xff, 0xff), ++ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* Edimax EW-7822UAD */ ++ { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0xb81a, 0xff, 0xff, 0xff), ++ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* Default ID */ ++ { USB_DEVICE_AND_INTERFACE_INFO(0x0b05, 0x1841, 0xff, 0xff, 0xff), ++ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* ASUS AC1300 USB-AC55 B1 */ ++ { USB_DEVICE_AND_INTERFACE_INFO(0x0b05, 0x184c, 0xff, 0xff, 0xff), ++ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* ASUS U2 */ ++ { USB_DEVICE_AND_INTERFACE_INFO(0x0B05, 0x19aa, 0xff, 0xff, 0xff), ++ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* ASUS - USB-AC58 rev A1 */ ++ { USB_DEVICE_AND_INTERFACE_INFO(0x0B05, 0x1870, 0xff, 0xff, 0xff), ++ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* ASUS */ ++ { USB_DEVICE_AND_INTERFACE_INFO(0x0B05, 0x1874, 0xff, 0xff, 0xff), ++ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* ASUS */ ++ { USB_DEVICE_AND_INTERFACE_INFO(0x2001, 0x331e, 0xff, 0xff, 0xff), ++ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* Dlink - DWA-181 */ ++ { USB_DEVICE_AND_INTERFACE_INFO(0x2001, 0x331c, 0xff, 0xff, 0xff), ++ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* Dlink - DWA-182 - D1 */ ++ {USB_DEVICE_AND_INTERFACE_INFO(0x2001, 0x331f, 0xff, 0xff, 0xff), ++ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec)}, /* Dlink - DWA-183 D Ver */ ++ { USB_DEVICE_AND_INTERFACE_INFO(0x13b1, 0x0043, 0xff, 0xff, 0xff), ++ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* Linksys WUSB6400M */ ++ { USB_DEVICE_AND_INTERFACE_INFO(0x13b1, 0x0045, 0xff, 0xff, 0xff), ++ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* Linksys WUSB3600 v2 */ ++ { USB_DEVICE_AND_INTERFACE_INFO(0x2357, 0x012d, 0xff, 0xff, 0xff), ++ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* TP-Link Archer T3U v1 */ ++ { USB_DEVICE_AND_INTERFACE_INFO(0x2357, 0x0138, 0xff, 0xff, 0xff), ++ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* TP-Link Archer T3U Plus v1 */ ++ { USB_DEVICE_AND_INTERFACE_INFO(0x2357, 0x0115, 0xff, 0xff, 0xff), ++ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* TP-Link Archer T4U V3 */ ++ { USB_DEVICE_AND_INTERFACE_INFO(0x2357, 0x012e, 0xff, 0xff, 0xff), ++ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* TP-LINK */ ++ { USB_DEVICE_AND_INTERFACE_INFO(0x2357, 0x0116, 0xff, 0xff, 0xff), ++ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* TP-LINK */ ++ { USB_DEVICE_AND_INTERFACE_INFO(0x2357, 0x0117, 0xff, 0xff, 0xff), ++ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* TP-LINK */ ++ { USB_DEVICE_AND_INTERFACE_INFO(0x0846, 0x9055, 0xff, 0xff, 0xff), ++ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* Netgear A6150 */ ++ { USB_DEVICE_AND_INTERFACE_INFO(0x0e66, 0x0025, 0xff, 0xff, 0xff), ++ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* Hawking HW12ACU */ ++ { USB_DEVICE_AND_INTERFACE_INFO(0x04ca, 0x8602, 0xff, 0xff, 0xff), ++ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* LiteOn */ ++ { USB_DEVICE_AND_INTERFACE_INFO(0x20f4, 0x808a, 0xff, 0xff, 0xff), ++ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* TRENDnet TEW-808UBM */ ++ {}, ++}; ++MODULE_DEVICE_TABLE(usb, rtw_8822bu_id_table); ++ ++static int rtw8822bu_probe(struct usb_interface *intf, ++ const struct usb_device_id *id) ++{ ++ return rtw_usb_probe(intf, id); ++} ++ ++static struct usb_driver rtw_8822bu_driver = { ++ .name = "rtw_8822bu", ++ .id_table = rtw_8822bu_id_table, ++ .probe = rtw8822bu_probe, ++ .disconnect = rtw_usb_disconnect, ++}; ++module_usb_driver(rtw_8822bu_driver); ++ ++MODULE_AUTHOR("Realtek Corporation"); ++MODULE_DESCRIPTION("Realtek 802.11ac wireless 8822bu driver"); ++MODULE_LICENSE("Dual BSD/GPL"); +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw88/rtw8822c.c linux-6.2/drivers/net/wireless/realtek/rtw88/rtw8822c.c +--- linux-6.1/drivers/net/wireless/realtek/rtw88/rtw8822c.c 2022-12-12 00:15:18.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw88/rtw8822c.c 2022-12-24 00:49:25.775376835 +0200 +@@ -29,6 +29,12 @@ static void rtw8822ce_efuse_parsing(stru + ether_addr_copy(efuse->addr, map->e.mac_addr); + } + ++static void rtw8822cu_efuse_parsing(struct rtw_efuse *efuse, ++ struct rtw8822c_efuse *map) ++{ ++ ether_addr_copy(efuse->addr, map->u.mac_addr); ++} ++ + static int rtw8822c_read_efuse(struct rtw_dev *rtwdev, u8 *log_map) + { + struct rtw_efuse *efuse = &rtwdev->efuse; +@@ -58,6 +64,9 @@ static int rtw8822c_read_efuse(struct rt + case RTW_HCI_TYPE_PCIE: + rtw8822ce_efuse_parsing(efuse, map); + break; ++ case RTW_HCI_TYPE_USB: ++ rtw8822cu_efuse_parsing(efuse, map); ++ break; + default: + /* unsupported now */ + return -ENOTSUPP; +@@ -4557,6 +4566,18 @@ static void rtw8822c_adaptivity(struct r + rtw_phy_set_edcca_th(rtwdev, l2h, h2l); + } + ++static void rtw8822c_fill_txdesc_checksum(struct rtw_dev *rtwdev, ++ struct rtw_tx_pkt_info *pkt_info, ++ u8 *txdesc) ++{ ++ const struct rtw_chip_info *chip = rtwdev->chip; ++ size_t words; ++ ++ words = (pkt_info->pkt_offset * 8 + chip->tx_pkt_desc_sz) / 2; ++ ++ fill_txdesc_checksum_common(txdesc, words); ++} ++ + static const struct rtw_pwr_seq_cmd trans_carddis_to_cardemu_8822c[] = { + {0x0086, + RTW_PWR_CUT_ALL_MSK, +@@ -4895,6 +4916,8 @@ static const struct rtw_rfe_def rtw8822c + [0] = RTW_DEF_RFE(8822c, 0, 0), + [1] = RTW_DEF_RFE(8822c, 0, 0), + [2] = RTW_DEF_RFE(8822c, 0, 0), ++ [3] = RTW_DEF_RFE(8822c, 0, 0), ++ [4] = RTW_DEF_RFE(8822c, 0, 0), + [5] = RTW_DEF_RFE(8822c, 0, 5), + [6] = RTW_DEF_RFE(8822c, 0, 0), + }; +@@ -4978,6 +5001,7 @@ static struct rtw_chip_ops rtw8822c_ops + .cfo_track = rtw8822c_cfo_track, + .config_tx_path = rtw8822c_config_tx_path, + .config_txrx_mode = rtw8822c_config_trx_mode, ++ .fill_txdesc_checksum = rtw8822c_fill_txdesc_checksum, + + .coex_set_init = rtw8822c_coex_cfg_init, + .coex_set_ant_switch = NULL, +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw88/rtw8822cu.c linux-6.2/drivers/net/wireless/realtek/rtw88/rtw8822cu.c +--- linux-6.1/drivers/net/wireless/realtek/rtw88/rtw8822cu.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw88/rtw8822cu.c 2022-12-24 00:49:25.775376835 +0200 +@@ -0,0 +1,44 @@ ++// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause ++/* Copyright(c) 2018-2019 Realtek Corporation ++ */ ++ ++#include ++#include ++#include "main.h" ++#include "rtw8822c.h" ++#include "usb.h" ++ ++static const struct usb_device_id rtw_8822cu_id_table[] = { ++ { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0xc82c, 0xff, 0xff, 0xff), ++ .driver_info = (kernel_ulong_t)&(rtw8822c_hw_spec) }, ++ { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0xc812, 0xff, 0xff, 0xff), ++ .driver_info = (kernel_ulong_t)&(rtw8822c_hw_spec) }, ++ { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0xc82e, 0xff, 0xff, 0xff), ++ .driver_info = (kernel_ulong_t)&(rtw8822c_hw_spec) }, ++ { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0xd820, 0xff, 0xff, 0xff), ++ .driver_info = (kernel_ulong_t)&(rtw8822c_hw_spec) }, ++ { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0xd82b, 0xff, 0xff, 0xff), ++ .driver_info = (kernel_ulong_t)&(rtw8822c_hw_spec) }, ++ { USB_DEVICE_AND_INTERFACE_INFO(0x13b1, 0x0043, 0xff, 0xff, 0xff), ++ .driver_info = (kernel_ulong_t)&(rtw8822c_hw_spec) }, /* Alpha - Alpha */ ++ {}, ++}; ++MODULE_DEVICE_TABLE(usb, rtw_8822cu_id_table); ++ ++static int rtw8822bu_probe(struct usb_interface *intf, ++ const struct usb_device_id *id) ++{ ++ return rtw_usb_probe(intf, id); ++} ++ ++static struct usb_driver rtw_8822cu_driver = { ++ .name = "rtw_8822cu", ++ .id_table = rtw_8822cu_id_table, ++ .probe = rtw8822bu_probe, ++ .disconnect = rtw_usb_disconnect, ++}; ++module_usb_driver(rtw_8822cu_driver); ++ ++MODULE_AUTHOR("Realtek Corporation"); ++MODULE_DESCRIPTION("Realtek 802.11ac wireless 8822cu driver"); ++MODULE_LICENSE("Dual BSD/GPL"); +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw88/tx.h linux-6.2/drivers/net/wireless/realtek/rtw88/tx.h +--- linux-6.1/drivers/net/wireless/realtek/rtw88/tx.h 2022-12-12 00:15:18.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw88/tx.h 2022-12-24 00:49:25.775376835 +0200 +@@ -71,6 +71,14 @@ + le32p_replace_bits((__le32 *)(txdesc) + 0x03, value, BIT(15)) + #define SET_TX_DESC_BT_NULL(txdesc, value) \ + le32p_replace_bits((__le32 *)(txdesc) + 0x02, value, BIT(23)) ++#define SET_TX_DESC_TXDESC_CHECKSUM(txdesc, value) \ ++ le32p_replace_bits((__le32 *)(txdesc) + 0x07, value, GENMASK(15, 0)) ++#define SET_TX_DESC_DMA_TXAGG_NUM(txdesc, value) \ ++ le32p_replace_bits((__le32 *)(txdesc) + 0x07, value, GENMASK(31, 24)) ++#define GET_TX_DESC_PKT_OFFSET(txdesc) \ ++ le32_get_bits(*((__le32 *)(txdesc) + 0x01), GENMASK(28, 24)) ++#define GET_TX_DESC_QSEL(txdesc) \ ++ le32_get_bits(*((__le32 *)(txdesc) + 0x01), GENMASK(12, 8)) + + enum rtw_tx_desc_queue_select { + TX_DESC_QSEL_TID0 = 0, +@@ -123,4 +131,27 @@ rtw_tx_write_data_h2c_get(struct rtw_dev + struct rtw_tx_pkt_info *pkt_info, + u8 *buf, u32 size); + ++static inline ++void fill_txdesc_checksum_common(u8 *txdesc, size_t words) ++{ ++ __le16 chksum = 0; ++ __le16 *data = (__le16 *)(txdesc); ++ ++ SET_TX_DESC_TXDESC_CHECKSUM(txdesc, 0x0000); ++ ++ while (words--) ++ chksum ^= *data++; ++ ++ SET_TX_DESC_TXDESC_CHECKSUM(txdesc, __le16_to_cpu(chksum)); ++} ++ ++static inline void rtw_tx_fill_txdesc_checksum(struct rtw_dev *rtwdev, ++ struct rtw_tx_pkt_info *pkt_info, ++ u8 *txdesc) ++{ ++ const struct rtw_chip_info *chip = rtwdev->chip; ++ ++ chip->ops->fill_txdesc_checksum(rtwdev, pkt_info, txdesc); ++} ++ + #endif +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw88/usb.c linux-6.2/drivers/net/wireless/realtek/rtw88/usb.c +--- linux-6.1/drivers/net/wireless/realtek/rtw88/usb.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw88/usb.c 2022-12-24 00:49:25.775376835 +0200 +@@ -0,0 +1,911 @@ ++// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause ++/* Copyright(c) 2018-2019 Realtek Corporation ++ */ ++ ++#include ++#include ++#include ++#include "main.h" ++#include "debug.h" ++#include "reg.h" ++#include "tx.h" ++#include "rx.h" ++#include "fw.h" ++#include "ps.h" ++#include "usb.h" ++ ++#define RTW_USB_MAX_RXQ_LEN 512 ++ ++struct rtw_usb_txcb { ++ struct rtw_dev *rtwdev; ++ struct sk_buff_head tx_ack_queue; ++}; ++ ++static void rtw_usb_fill_tx_checksum(struct rtw_usb *rtwusb, ++ struct sk_buff *skb, int agg_num) ++{ ++ struct rtw_dev *rtwdev = rtwusb->rtwdev; ++ struct rtw_tx_pkt_info pkt_info; ++ ++ SET_TX_DESC_DMA_TXAGG_NUM(skb->data, agg_num); ++ pkt_info.pkt_offset = GET_TX_DESC_PKT_OFFSET(skb->data); ++ rtw_tx_fill_txdesc_checksum(rtwdev, &pkt_info, skb->data); ++} ++ ++static u32 rtw_usb_read(struct rtw_dev *rtwdev, u32 addr, u16 len) ++{ ++ struct rtw_usb *rtwusb = rtw_get_usb_priv(rtwdev); ++ struct usb_device *udev = rtwusb->udev; ++ __le32 *data; ++ unsigned long flags; ++ int idx, ret; ++ static int count; ++ ++ spin_lock_irqsave(&rtwusb->usb_lock, flags); ++ ++ idx = rtwusb->usb_data_index; ++ rtwusb->usb_data_index = (idx + 1) & (RTW_USB_MAX_RXTX_COUNT - 1); ++ ++ spin_unlock_irqrestore(&rtwusb->usb_lock, flags); ++ ++ data = &rtwusb->usb_data[idx]; ++ ++ ret = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0), ++ RTW_USB_CMD_REQ, RTW_USB_CMD_READ, addr, ++ RTW_USB_VENQT_CMD_IDX, data, len, 1000); ++ if (ret < 0 && ret != -ENODEV && count++ < 4) ++ rtw_err(rtwdev, "read register 0x%x failed with %d\n", ++ addr, ret); ++ ++ return le32_to_cpu(*data); ++} ++ ++static u8 rtw_usb_read8(struct rtw_dev *rtwdev, u32 addr) ++{ ++ return (u8)rtw_usb_read(rtwdev, addr, 1); ++} ++ ++static u16 rtw_usb_read16(struct rtw_dev *rtwdev, u32 addr) ++{ ++ return (u16)rtw_usb_read(rtwdev, addr, 2); ++} ++ ++static u32 rtw_usb_read32(struct rtw_dev *rtwdev, u32 addr) ++{ ++ return (u32)rtw_usb_read(rtwdev, addr, 4); ++} ++ ++static void rtw_usb_write(struct rtw_dev *rtwdev, u32 addr, u32 val, int len) ++{ ++ struct rtw_usb *rtwusb = (struct rtw_usb *)rtwdev->priv; ++ struct usb_device *udev = rtwusb->udev; ++ unsigned long flags; ++ __le32 *data; ++ int idx, ret; ++ static int count; ++ ++ spin_lock_irqsave(&rtwusb->usb_lock, flags); ++ ++ idx = rtwusb->usb_data_index; ++ rtwusb->usb_data_index = (idx + 1) & (RTW_USB_MAX_RXTX_COUNT - 1); ++ ++ spin_unlock_irqrestore(&rtwusb->usb_lock, flags); ++ ++ data = &rtwusb->usb_data[idx]; ++ ++ *data = cpu_to_le32(val); ++ ++ ret = usb_control_msg(udev, usb_sndctrlpipe(udev, 0), ++ RTW_USB_CMD_REQ, RTW_USB_CMD_WRITE, ++ addr, 0, data, len, 30000); ++ if (ret < 0 && ret != -ENODEV && count++ < 4) ++ rtw_err(rtwdev, "write register 0x%x failed with %d\n", ++ addr, ret); ++} ++ ++static void rtw_usb_write8(struct rtw_dev *rtwdev, u32 addr, u8 val) ++{ ++ rtw_usb_write(rtwdev, addr, val, 1); ++} ++ ++static void rtw_usb_write16(struct rtw_dev *rtwdev, u32 addr, u16 val) ++{ ++ rtw_usb_write(rtwdev, addr, val, 2); ++} ++ ++static void rtw_usb_write32(struct rtw_dev *rtwdev, u32 addr, u32 val) ++{ ++ rtw_usb_write(rtwdev, addr, val, 4); ++} ++ ++static int rtw_usb_parse(struct rtw_dev *rtwdev, ++ struct usb_interface *interface) ++{ ++ struct rtw_usb *rtwusb = rtw_get_usb_priv(rtwdev); ++ struct usb_host_interface *host_interface = &interface->altsetting[0]; ++ struct usb_interface_descriptor *interface_desc = &host_interface->desc; ++ struct usb_endpoint_descriptor *endpoint; ++ struct usb_device *usbd = interface_to_usbdev(interface); ++ int num_out_pipes = 0; ++ int i; ++ u8 num; ++ ++ for (i = 0; i < interface_desc->bNumEndpoints; i++) { ++ endpoint = &host_interface->endpoint[i].desc; ++ num = usb_endpoint_num(endpoint); ++ ++ if (usb_endpoint_dir_in(endpoint) && ++ usb_endpoint_xfer_bulk(endpoint)) { ++ if (rtwusb->pipe_in) { ++ rtw_err(rtwdev, "IN pipes overflow\n"); ++ return -EINVAL; ++ } ++ ++ rtwusb->pipe_in = num; ++ } ++ ++ if (usb_endpoint_dir_in(endpoint) && ++ usb_endpoint_xfer_int(endpoint)) { ++ if (rtwusb->pipe_interrupt) { ++ rtw_err(rtwdev, "INT pipes overflow\n"); ++ return -EINVAL; ++ } ++ ++ rtwusb->pipe_interrupt = num; ++ } ++ ++ if (usb_endpoint_dir_out(endpoint) && ++ usb_endpoint_xfer_bulk(endpoint)) { ++ if (num_out_pipes >= ARRAY_SIZE(rtwusb->out_ep)) { ++ rtw_err(rtwdev, "OUT pipes overflow\n"); ++ return -EINVAL; ++ } ++ ++ rtwusb->out_ep[num_out_pipes++] = num; ++ } ++ } ++ ++ switch (usbd->speed) { ++ case USB_SPEED_LOW: ++ case USB_SPEED_FULL: ++ rtwusb->bulkout_size = RTW_USB_FULL_SPEED_BULK_SIZE; ++ break; ++ case USB_SPEED_HIGH: ++ rtwusb->bulkout_size = RTW_USB_HIGH_SPEED_BULK_SIZE; ++ break; ++ case USB_SPEED_SUPER: ++ rtwusb->bulkout_size = RTW_USB_SUPER_SPEED_BULK_SIZE; ++ break; ++ default: ++ rtw_err(rtwdev, "failed to detect usb speed\n"); ++ return -EINVAL; ++ } ++ ++ rtwdev->hci.bulkout_num = num_out_pipes; ++ ++ switch (num_out_pipes) { ++ case 4: ++ case 3: ++ rtwusb->qsel_to_ep[TX_DESC_QSEL_TID0] = 2; ++ rtwusb->qsel_to_ep[TX_DESC_QSEL_TID1] = 2; ++ rtwusb->qsel_to_ep[TX_DESC_QSEL_TID2] = 2; ++ rtwusb->qsel_to_ep[TX_DESC_QSEL_TID3] = 2; ++ rtwusb->qsel_to_ep[TX_DESC_QSEL_TID4] = 1; ++ rtwusb->qsel_to_ep[TX_DESC_QSEL_TID5] = 1; ++ rtwusb->qsel_to_ep[TX_DESC_QSEL_TID6] = 0; ++ rtwusb->qsel_to_ep[TX_DESC_QSEL_TID7] = 0; ++ break; ++ case 2: ++ rtwusb->qsel_to_ep[TX_DESC_QSEL_TID0] = 1; ++ rtwusb->qsel_to_ep[TX_DESC_QSEL_TID1] = 1; ++ rtwusb->qsel_to_ep[TX_DESC_QSEL_TID2] = 1; ++ rtwusb->qsel_to_ep[TX_DESC_QSEL_TID3] = 1; ++ break; ++ case 1: ++ break; ++ default: ++ rtw_err(rtwdev, "failed to get out_pipes(%d)\n", num_out_pipes); ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++static void rtw_usb_write_port_tx_complete(struct urb *urb) ++{ ++ struct rtw_usb_txcb *txcb = urb->context; ++ struct rtw_dev *rtwdev = txcb->rtwdev; ++ struct ieee80211_hw *hw = rtwdev->hw; ++ ++ while (true) { ++ struct sk_buff *skb = skb_dequeue(&txcb->tx_ack_queue); ++ struct ieee80211_tx_info *info; ++ struct rtw_usb_tx_data *tx_data; ++ ++ if (!skb) ++ break; ++ ++ info = IEEE80211_SKB_CB(skb); ++ tx_data = rtw_usb_get_tx_data(skb); ++ ++ /* enqueue to wait for tx report */ ++ if (info->flags & IEEE80211_TX_CTL_REQ_TX_STATUS) { ++ rtw_tx_report_enqueue(rtwdev, skb, tx_data->sn); ++ continue; ++ } ++ ++ /* always ACK for others, then they won't be marked as drop */ ++ ieee80211_tx_info_clear_status(info); ++ if (info->flags & IEEE80211_TX_CTL_NO_ACK) ++ info->flags |= IEEE80211_TX_STAT_NOACK_TRANSMITTED; ++ else ++ info->flags |= IEEE80211_TX_STAT_ACK; ++ ++ ieee80211_tx_status_irqsafe(hw, skb); ++ } ++ ++ kfree(txcb); ++} ++ ++static int qsel_to_ep(struct rtw_usb *rtwusb, unsigned int qsel) ++{ ++ if (qsel >= ARRAY_SIZE(rtwusb->qsel_to_ep)) ++ return 0; ++ ++ return rtwusb->qsel_to_ep[qsel]; ++} ++ ++static int rtw_usb_write_port(struct rtw_dev *rtwdev, u8 qsel, struct sk_buff *skb, ++ usb_complete_t cb, void *context) ++{ ++ struct rtw_usb *rtwusb = rtw_get_usb_priv(rtwdev); ++ struct usb_device *usbd = rtwusb->udev; ++ struct urb *urb; ++ unsigned int pipe; ++ int ret; ++ int ep = qsel_to_ep(rtwusb, qsel); ++ ++ pipe = usb_sndbulkpipe(usbd, rtwusb->out_ep[ep]); ++ urb = usb_alloc_urb(0, GFP_ATOMIC); ++ if (!urb) ++ return -ENOMEM; ++ ++ usb_fill_bulk_urb(urb, usbd, pipe, skb->data, skb->len, cb, context); ++ ret = usb_submit_urb(urb, GFP_ATOMIC); ++ ++ usb_free_urb(urb); ++ ++ return ret; ++} ++ ++static bool rtw_usb_tx_agg_skb(struct rtw_usb *rtwusb, struct sk_buff_head *list) ++{ ++ struct rtw_dev *rtwdev = rtwusb->rtwdev; ++ struct rtw_usb_txcb *txcb; ++ struct sk_buff *skb_head; ++ struct sk_buff *skb_iter; ++ int agg_num = 0; ++ unsigned int align_next = 0; ++ ++ if (skb_queue_empty(list)) ++ return false; ++ ++ txcb = kmalloc(sizeof(*txcb), GFP_ATOMIC); ++ if (!txcb) ++ return false; ++ ++ txcb->rtwdev = rtwdev; ++ skb_queue_head_init(&txcb->tx_ack_queue); ++ ++ skb_iter = skb_dequeue(list); ++ ++ if (skb_queue_empty(list)) { ++ skb_head = skb_iter; ++ goto queue; ++ } ++ ++ skb_head = dev_alloc_skb(RTW_USB_MAX_XMITBUF_SZ); ++ if (!skb_head) { ++ skb_head = skb_iter; ++ goto queue; ++ } ++ ++ while (skb_iter) { ++ unsigned long flags; ++ ++ skb_put(skb_head, align_next); ++ skb_put_data(skb_head, skb_iter->data, skb_iter->len); ++ ++ align_next = ALIGN(skb_iter->len, 8) - skb_iter->len; ++ ++ agg_num++; ++ ++ skb_queue_tail(&txcb->tx_ack_queue, skb_iter); ++ ++ spin_lock_irqsave(&list->lock, flags); ++ ++ skb_iter = skb_peek(list); ++ ++ if (skb_iter && skb_iter->len + skb_head->len <= RTW_USB_MAX_XMITBUF_SZ) ++ __skb_unlink(skb_iter, list); ++ else ++ skb_iter = NULL; ++ spin_unlock_irqrestore(&list->lock, flags); ++ } ++ ++ if (agg_num > 1) ++ rtw_usb_fill_tx_checksum(rtwusb, skb_head, agg_num); ++ ++queue: ++ skb_queue_tail(&txcb->tx_ack_queue, skb_head); ++ ++ rtw_usb_write_port(rtwdev, GET_TX_DESC_QSEL(skb_head->data), skb_head, ++ rtw_usb_write_port_tx_complete, txcb); ++ ++ return true; ++} ++ ++static void rtw_usb_tx_handler(struct work_struct *work) ++{ ++ struct rtw_usb *rtwusb = container_of(work, struct rtw_usb, tx_work); ++ int i, limit; ++ ++ for (i = ARRAY_SIZE(rtwusb->tx_queue) - 1; i >= 0; i--) { ++ for (limit = 0; limit < 200; limit++) { ++ struct sk_buff_head *list = &rtwusb->tx_queue[i]; ++ ++ if (!rtw_usb_tx_agg_skb(rtwusb, list)) ++ break; ++ } ++ } ++} ++ ++static void rtw_usb_tx_queue_purge(struct rtw_usb *rtwusb) ++{ ++ int i; ++ ++ for (i = 0; i < ARRAY_SIZE(rtwusb->tx_queue); i++) ++ skb_queue_purge(&rtwusb->tx_queue[i]); ++} ++ ++static void rtw_usb_write_port_complete(struct urb *urb) ++{ ++ struct sk_buff *skb = urb->context; ++ ++ dev_kfree_skb_any(skb); ++} ++ ++static int rtw_usb_write_data(struct rtw_dev *rtwdev, ++ struct rtw_tx_pkt_info *pkt_info, ++ u8 *buf) ++{ ++ const struct rtw_chip_info *chip = rtwdev->chip; ++ struct sk_buff *skb; ++ unsigned int desclen, headsize, size; ++ u8 qsel; ++ int ret = 0; ++ ++ size = pkt_info->tx_pkt_size; ++ qsel = pkt_info->qsel; ++ desclen = chip->tx_pkt_desc_sz; ++ headsize = pkt_info->offset ? pkt_info->offset : desclen; ++ ++ skb = dev_alloc_skb(headsize + size); ++ if (unlikely(!skb)) ++ return -ENOMEM; ++ ++ skb_reserve(skb, headsize); ++ skb_put_data(skb, buf, size); ++ skb_push(skb, headsize); ++ memset(skb->data, 0, headsize); ++ rtw_tx_fill_tx_desc(pkt_info, skb); ++ rtw_tx_fill_txdesc_checksum(rtwdev, pkt_info, skb->data); ++ ++ ret = rtw_usb_write_port(rtwdev, qsel, skb, ++ rtw_usb_write_port_complete, skb); ++ if (unlikely(ret)) ++ rtw_err(rtwdev, "failed to do USB write, ret=%d\n", ret); ++ ++ return ret; ++} ++ ++static int rtw_usb_write_data_rsvd_page(struct rtw_dev *rtwdev, u8 *buf, ++ u32 size) ++{ ++ const struct rtw_chip_info *chip = rtwdev->chip; ++ struct rtw_usb *rtwusb; ++ struct rtw_tx_pkt_info pkt_info = {0}; ++ u32 len, desclen; ++ ++ rtwusb = rtw_get_usb_priv(rtwdev); ++ ++ pkt_info.tx_pkt_size = size; ++ pkt_info.qsel = TX_DESC_QSEL_BEACON; ++ ++ desclen = chip->tx_pkt_desc_sz; ++ len = desclen + size; ++ if (len % rtwusb->bulkout_size == 0) { ++ len += RTW_USB_PACKET_OFFSET_SZ; ++ pkt_info.offset = desclen + RTW_USB_PACKET_OFFSET_SZ; ++ pkt_info.pkt_offset = 1; ++ } else { ++ pkt_info.offset = desclen; ++ } ++ ++ return rtw_usb_write_data(rtwdev, &pkt_info, buf); ++} ++ ++static int rtw_usb_write_data_h2c(struct rtw_dev *rtwdev, u8 *buf, u32 size) ++{ ++ struct rtw_tx_pkt_info pkt_info = {0}; ++ ++ pkt_info.tx_pkt_size = size; ++ pkt_info.qsel = TX_DESC_QSEL_H2C; ++ ++ return rtw_usb_write_data(rtwdev, &pkt_info, buf); ++} ++ ++static u8 rtw_usb_tx_queue_mapping_to_qsel(struct sk_buff *skb) ++{ ++ struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; ++ __le16 fc = hdr->frame_control; ++ u8 qsel; ++ ++ if (unlikely(ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc))) ++ qsel = TX_DESC_QSEL_MGMT; ++ else if (skb_get_queue_mapping(skb) <= IEEE80211_AC_BK) ++ qsel = skb->priority; ++ else ++ qsel = TX_DESC_QSEL_BEACON; ++ ++ return qsel; ++} ++ ++static int rtw_usb_tx_write(struct rtw_dev *rtwdev, ++ struct rtw_tx_pkt_info *pkt_info, ++ struct sk_buff *skb) ++{ ++ struct rtw_usb *rtwusb = rtw_get_usb_priv(rtwdev); ++ const struct rtw_chip_info *chip = rtwdev->chip; ++ struct rtw_usb_tx_data *tx_data; ++ u8 *pkt_desc; ++ int ep; ++ ++ pkt_desc = skb_push(skb, chip->tx_pkt_desc_sz); ++ memset(pkt_desc, 0, chip->tx_pkt_desc_sz); ++ pkt_info->qsel = rtw_usb_tx_queue_mapping_to_qsel(skb); ++ ep = qsel_to_ep(rtwusb, pkt_info->qsel); ++ rtw_tx_fill_tx_desc(pkt_info, skb); ++ rtw_tx_fill_txdesc_checksum(rtwdev, pkt_info, skb->data); ++ tx_data = rtw_usb_get_tx_data(skb); ++ tx_data->sn = pkt_info->sn; ++ ++ skb_queue_tail(&rtwusb->tx_queue[ep], skb); ++ ++ return 0; ++} ++ ++static void rtw_usb_tx_kick_off(struct rtw_dev *rtwdev) ++{ ++ struct rtw_usb *rtwusb = rtw_get_usb_priv(rtwdev); ++ ++ queue_work(rtwusb->txwq, &rtwusb->tx_work); ++} ++ ++static void rtw_usb_rx_handler(struct work_struct *work) ++{ ++ struct rtw_usb *rtwusb = container_of(work, struct rtw_usb, rx_work); ++ struct rtw_dev *rtwdev = rtwusb->rtwdev; ++ const struct rtw_chip_info *chip = rtwdev->chip; ++ struct rtw_rx_pkt_stat pkt_stat; ++ struct ieee80211_rx_status rx_status; ++ struct sk_buff *skb; ++ u32 pkt_desc_sz = chip->rx_pkt_desc_sz; ++ u32 pkt_offset; ++ u8 *rx_desc; ++ int limit; ++ ++ for (limit = 0; limit < 200; limit++) { ++ skb = skb_dequeue(&rtwusb->rx_queue); ++ if (!skb) ++ break; ++ ++ rx_desc = skb->data; ++ chip->ops->query_rx_desc(rtwdev, rx_desc, &pkt_stat, ++ &rx_status); ++ pkt_offset = pkt_desc_sz + pkt_stat.drv_info_sz + ++ pkt_stat.shift; ++ ++ if (pkt_stat.is_c2h) { ++ skb_put(skb, pkt_stat.pkt_len + pkt_offset); ++ rtw_fw_c2h_cmd_rx_irqsafe(rtwdev, pkt_offset, skb); ++ continue; ++ } ++ ++ if (skb_queue_len(&rtwusb->rx_queue) >= RTW_USB_MAX_RXQ_LEN) { ++ rtw_err(rtwdev, "failed to get rx_queue, overflow\n"); ++ dev_kfree_skb_any(skb); ++ continue; ++ } ++ ++ skb_put(skb, pkt_stat.pkt_len); ++ skb_reserve(skb, pkt_offset); ++ memcpy(skb->cb, &rx_status, sizeof(rx_status)); ++ ieee80211_rx_irqsafe(rtwdev->hw, skb); ++ } ++} ++ ++static void rtw_usb_read_port_complete(struct urb *urb); ++ ++static void rtw_usb_rx_resubmit(struct rtw_usb *rtwusb, struct rx_usb_ctrl_block *rxcb) ++{ ++ struct rtw_dev *rtwdev = rtwusb->rtwdev; ++ int error; ++ ++ rxcb->rx_skb = alloc_skb(RTW_USB_MAX_RECVBUF_SZ, GFP_ATOMIC); ++ if (!rxcb->rx_skb) ++ return; ++ ++ usb_fill_bulk_urb(rxcb->rx_urb, rtwusb->udev, ++ usb_rcvbulkpipe(rtwusb->udev, rtwusb->pipe_in), ++ rxcb->rx_skb->data, RTW_USB_MAX_RECVBUF_SZ, ++ rtw_usb_read_port_complete, rxcb); ++ ++ error = usb_submit_urb(rxcb->rx_urb, GFP_ATOMIC); ++ if (error) { ++ kfree_skb(rxcb->rx_skb); ++ if (error != -ENODEV) ++ rtw_err(rtwdev, "Err sending rx data urb %d\n", ++ error); ++ } ++} ++ ++static void rtw_usb_read_port_complete(struct urb *urb) ++{ ++ struct rx_usb_ctrl_block *rxcb = urb->context; ++ struct rtw_dev *rtwdev = rxcb->rtwdev; ++ struct rtw_usb *rtwusb = rtw_get_usb_priv(rtwdev); ++ struct sk_buff *skb = rxcb->rx_skb; ++ ++ if (urb->status == 0) { ++ if (urb->actual_length >= RTW_USB_MAX_RECVBUF_SZ || ++ urb->actual_length < 24) { ++ rtw_err(rtwdev, "failed to get urb length:%d\n", ++ urb->actual_length); ++ if (skb) ++ dev_kfree_skb_any(skb); ++ } else { ++ skb_queue_tail(&rtwusb->rx_queue, skb); ++ queue_work(rtwusb->rxwq, &rtwusb->rx_work); ++ } ++ rtw_usb_rx_resubmit(rtwusb, rxcb); ++ } else { ++ switch (urb->status) { ++ case -EINVAL: ++ case -EPIPE: ++ case -ENODEV: ++ case -ESHUTDOWN: ++ case -ENOENT: ++ case -EPROTO: ++ case -EILSEQ: ++ case -ETIME: ++ case -ECOMM: ++ case -EOVERFLOW: ++ case -EINPROGRESS: ++ break; ++ default: ++ rtw_err(rtwdev, "status %d\n", urb->status); ++ break; ++ } ++ if (skb) ++ dev_kfree_skb_any(skb); ++ } ++} ++ ++static void rtw_usb_cancel_rx_bufs(struct rtw_usb *rtwusb) ++{ ++ struct rx_usb_ctrl_block *rxcb; ++ int i; ++ ++ for (i = 0; i < RTW_USB_RXCB_NUM; i++) { ++ rxcb = &rtwusb->rx_cb[i]; ++ if (rxcb->rx_urb) ++ usb_kill_urb(rxcb->rx_urb); ++ } ++} ++ ++static void rtw_usb_free_rx_bufs(struct rtw_usb *rtwusb) ++{ ++ struct rx_usb_ctrl_block *rxcb; ++ int i; ++ ++ for (i = 0; i < RTW_USB_RXCB_NUM; i++) { ++ rxcb = &rtwusb->rx_cb[i]; ++ if (rxcb->rx_urb) { ++ usb_kill_urb(rxcb->rx_urb); ++ usb_free_urb(rxcb->rx_urb); ++ } ++ } ++} ++ ++static int rtw_usb_alloc_rx_bufs(struct rtw_usb *rtwusb) ++{ ++ int i; ++ ++ for (i = 0; i < RTW_USB_RXCB_NUM; i++) { ++ struct rx_usb_ctrl_block *rxcb = &rtwusb->rx_cb[i]; ++ ++ rxcb->n = i; ++ rxcb->rtwdev = rtwusb->rtwdev; ++ rxcb->rx_urb = usb_alloc_urb(0, GFP_KERNEL); ++ if (!rxcb->rx_urb) ++ goto err; ++ } ++ ++ return 0; ++err: ++ rtw_usb_free_rx_bufs(rtwusb); ++ return -ENOMEM; ++} ++ ++static int rtw_usb_setup(struct rtw_dev *rtwdev) ++{ ++ /* empty function for rtw_hci_ops */ ++ return 0; ++} ++ ++static int rtw_usb_start(struct rtw_dev *rtwdev) ++{ ++ return 0; ++} ++ ++static void rtw_usb_stop(struct rtw_dev *rtwdev) ++{ ++} ++ ++static void rtw_usb_deep_ps(struct rtw_dev *rtwdev, bool enter) ++{ ++ /* empty function for rtw_hci_ops */ ++} ++ ++static void rtw_usb_link_ps(struct rtw_dev *rtwdev, bool enter) ++{ ++ /* empty function for rtw_hci_ops */ ++} ++ ++static void rtw_usb_interface_cfg(struct rtw_dev *rtwdev) ++{ ++ /* empty function for rtw_hci_ops */ ++} ++ ++static struct rtw_hci_ops rtw_usb_ops = { ++ .tx_write = rtw_usb_tx_write, ++ .tx_kick_off = rtw_usb_tx_kick_off, ++ .setup = rtw_usb_setup, ++ .start = rtw_usb_start, ++ .stop = rtw_usb_stop, ++ .deep_ps = rtw_usb_deep_ps, ++ .link_ps = rtw_usb_link_ps, ++ .interface_cfg = rtw_usb_interface_cfg, ++ ++ .write8 = rtw_usb_write8, ++ .write16 = rtw_usb_write16, ++ .write32 = rtw_usb_write32, ++ .read8 = rtw_usb_read8, ++ .read16 = rtw_usb_read16, ++ .read32 = rtw_usb_read32, ++ ++ .write_data_rsvd_page = rtw_usb_write_data_rsvd_page, ++ .write_data_h2c = rtw_usb_write_data_h2c, ++}; ++ ++static int rtw_usb_init_rx(struct rtw_dev *rtwdev) ++{ ++ struct rtw_usb *rtwusb = rtw_get_usb_priv(rtwdev); ++ int i; ++ ++ rtwusb->rxwq = create_singlethread_workqueue("rtw88_usb: rx wq"); ++ if (!rtwusb->rxwq) { ++ rtw_err(rtwdev, "failed to create RX work queue\n"); ++ return -ENOMEM; ++ } ++ ++ skb_queue_head_init(&rtwusb->rx_queue); ++ ++ INIT_WORK(&rtwusb->rx_work, rtw_usb_rx_handler); ++ ++ for (i = 0; i < RTW_USB_RXCB_NUM; i++) { ++ struct rx_usb_ctrl_block *rxcb = &rtwusb->rx_cb[i]; ++ ++ rtw_usb_rx_resubmit(rtwusb, rxcb); ++ } ++ ++ return 0; ++} ++ ++static void rtw_usb_deinit_rx(struct rtw_dev *rtwdev) ++{ ++ struct rtw_usb *rtwusb = rtw_get_usb_priv(rtwdev); ++ ++ skb_queue_purge(&rtwusb->rx_queue); ++ ++ flush_workqueue(rtwusb->rxwq); ++ destroy_workqueue(rtwusb->rxwq); ++} ++ ++static int rtw_usb_init_tx(struct rtw_dev *rtwdev) ++{ ++ struct rtw_usb *rtwusb = rtw_get_usb_priv(rtwdev); ++ int i; ++ ++ rtwusb->txwq = create_singlethread_workqueue("rtw88_usb: tx wq"); ++ if (!rtwusb->txwq) { ++ rtw_err(rtwdev, "failed to create TX work queue\n"); ++ return -ENOMEM; ++ } ++ ++ for (i = 0; i < ARRAY_SIZE(rtwusb->tx_queue); i++) ++ skb_queue_head_init(&rtwusb->tx_queue[i]); ++ ++ INIT_WORK(&rtwusb->tx_work, rtw_usb_tx_handler); ++ ++ return 0; ++} ++ ++static void rtw_usb_deinit_tx(struct rtw_dev *rtwdev) ++{ ++ struct rtw_usb *rtwusb = rtw_get_usb_priv(rtwdev); ++ ++ rtw_usb_tx_queue_purge(rtwusb); ++ flush_workqueue(rtwusb->txwq); ++ destroy_workqueue(rtwusb->txwq); ++} ++ ++static int rtw_usb_intf_init(struct rtw_dev *rtwdev, ++ struct usb_interface *intf) ++{ ++ struct rtw_usb *rtwusb = rtw_get_usb_priv(rtwdev); ++ struct usb_device *udev = usb_get_dev(interface_to_usbdev(intf)); ++ int ret; ++ ++ rtwusb->udev = udev; ++ ret = rtw_usb_parse(rtwdev, intf); ++ if (ret) ++ return ret; ++ ++ rtwusb->usb_data = kcalloc(RTW_USB_MAX_RXTX_COUNT, sizeof(u32), ++ GFP_KERNEL); ++ if (!rtwusb->usb_data) ++ return -ENOMEM; ++ ++ usb_set_intfdata(intf, rtwdev->hw); ++ ++ SET_IEEE80211_DEV(rtwdev->hw, &intf->dev); ++ spin_lock_init(&rtwusb->usb_lock); ++ ++ return 0; ++} ++ ++static void rtw_usb_intf_deinit(struct rtw_dev *rtwdev, ++ struct usb_interface *intf) ++{ ++ struct rtw_usb *rtwusb = rtw_get_usb_priv(rtwdev); ++ ++ usb_put_dev(rtwusb->udev); ++ usb_set_intfdata(intf, NULL); ++} ++ ++int rtw_usb_probe(struct usb_interface *intf, const struct usb_device_id *id) ++{ ++ struct rtw_dev *rtwdev; ++ struct ieee80211_hw *hw; ++ struct rtw_usb *rtwusb; ++ int drv_data_size; ++ int ret; ++ ++ drv_data_size = sizeof(struct rtw_dev) + sizeof(struct rtw_usb); ++ hw = ieee80211_alloc_hw(drv_data_size, &rtw_ops); ++ if (!hw) ++ return -ENOMEM; ++ ++ rtwdev = hw->priv; ++ rtwdev->hw = hw; ++ rtwdev->dev = &intf->dev; ++ rtwdev->chip = (struct rtw_chip_info *)id->driver_info; ++ rtwdev->hci.ops = &rtw_usb_ops; ++ rtwdev->hci.type = RTW_HCI_TYPE_USB; ++ ++ rtwusb = rtw_get_usb_priv(rtwdev); ++ rtwusb->rtwdev = rtwdev; ++ ++ ret = rtw_usb_alloc_rx_bufs(rtwusb); ++ if (ret) ++ return ret; ++ ++ ret = rtw_core_init(rtwdev); ++ if (ret) ++ goto err_release_hw; ++ ++ ret = rtw_usb_intf_init(rtwdev, intf); ++ if (ret) { ++ rtw_err(rtwdev, "failed to init USB interface\n"); ++ goto err_deinit_core; ++ } ++ ++ ret = rtw_usb_init_tx(rtwdev); ++ if (ret) { ++ rtw_err(rtwdev, "failed to init USB TX\n"); ++ goto err_destroy_usb; ++ } ++ ++ ret = rtw_usb_init_rx(rtwdev); ++ if (ret) { ++ rtw_err(rtwdev, "failed to init USB RX\n"); ++ goto err_destroy_txwq; ++ } ++ ++ ret = rtw_chip_info_setup(rtwdev); ++ if (ret) { ++ rtw_err(rtwdev, "failed to setup chip information\n"); ++ goto err_destroy_rxwq; ++ } ++ ++ ret = rtw_register_hw(rtwdev, rtwdev->hw); ++ if (ret) { ++ rtw_err(rtwdev, "failed to register hw\n"); ++ goto err_destroy_rxwq; ++ } ++ ++ return 0; ++ ++err_destroy_rxwq: ++ rtw_usb_deinit_rx(rtwdev); ++ ++err_destroy_txwq: ++ rtw_usb_deinit_tx(rtwdev); ++ ++err_destroy_usb: ++ rtw_usb_intf_deinit(rtwdev, intf); ++ ++err_deinit_core: ++ rtw_core_deinit(rtwdev); ++ ++err_release_hw: ++ ieee80211_free_hw(hw); ++ ++ return ret; ++} ++EXPORT_SYMBOL(rtw_usb_probe); ++ ++void rtw_usb_disconnect(struct usb_interface *intf) ++{ ++ struct ieee80211_hw *hw = usb_get_intfdata(intf); ++ struct rtw_dev *rtwdev; ++ struct rtw_usb *rtwusb; ++ ++ if (!hw) ++ return; ++ ++ rtwdev = hw->priv; ++ rtwusb = rtw_get_usb_priv(rtwdev); ++ ++ rtw_usb_cancel_rx_bufs(rtwusb); ++ ++ rtw_unregister_hw(rtwdev, hw); ++ rtw_usb_deinit_tx(rtwdev); ++ rtw_usb_deinit_rx(rtwdev); ++ ++ if (rtwusb->udev->state != USB_STATE_NOTATTACHED) ++ usb_reset_device(rtwusb->udev); ++ ++ rtw_usb_free_rx_bufs(rtwusb); ++ ++ rtw_usb_intf_deinit(rtwdev, intf); ++ rtw_core_deinit(rtwdev); ++ ieee80211_free_hw(hw); ++} ++EXPORT_SYMBOL(rtw_usb_disconnect); ++ ++MODULE_AUTHOR("Realtek Corporation"); ++MODULE_DESCRIPTION("Realtek 802.11ac wireless USB driver"); ++MODULE_LICENSE("Dual BSD/GPL"); +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw88/usb.h linux-6.2/drivers/net/wireless/realtek/rtw88/usb.h +--- linux-6.1/drivers/net/wireless/realtek/rtw88/usb.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw88/usb.h 2022-12-24 00:49:25.775376835 +0200 +@@ -0,0 +1,107 @@ ++/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ ++/* Copyright(c) 2018-2019 Realtek Corporation ++ */ ++ ++#ifndef __RTW_USB_H_ ++#define __RTW_USB_H_ ++ ++#define FW_8192C_START_ADDRESS 0x1000 ++#define FW_8192C_END_ADDRESS 0x5fff ++ ++#define RTW_USB_MAX_RXTX_COUNT 128 ++#define RTW_USB_VENQT_MAX_BUF_SIZE 254 ++#define MAX_USBCTRL_VENDORREQ_TIMES 10 ++ ++#define RTW_USB_CMD_READ 0xc0 ++#define RTW_USB_CMD_WRITE 0x40 ++#define RTW_USB_CMD_REQ 0x05 ++ ++#define RTW_USB_VENQT_CMD_IDX 0x00 ++ ++#define RTW_USB_SUPER_SPEED_BULK_SIZE 1024 ++#define RTW_USB_HIGH_SPEED_BULK_SIZE 512 ++#define RTW_USB_FULL_SPEED_BULK_SIZE 64 ++ ++#define RTW_USB_TX_SEL_HQ BIT(0) ++#define RTW_USB_TX_SEL_LQ BIT(1) ++#define RTW_USB_TX_SEL_NQ BIT(2) ++#define RTW_USB_TX_SEL_EQ BIT(3) ++ ++#define RTW_USB_BULK_IN_ADDR 0x80 ++#define RTW_USB_INT_IN_ADDR 0x81 ++ ++#define RTW_USB_HW_QUEUE_ENTRY 8 ++ ++#define RTW_USB_PACKET_OFFSET_SZ 8 ++#define RTW_USB_MAX_XMITBUF_SZ (1024 * 20) ++#define RTW_USB_MAX_RECVBUF_SZ 32768 ++ ++#define RTW_USB_RECVBUFF_ALIGN_SZ 8 ++ ++#define RTW_USB_RXAGG_SIZE 6 ++#define RTW_USB_RXAGG_TIMEOUT 10 ++ ++#define RTW_USB_RXCB_NUM 4 ++ ++#define RTW_USB_EP_MAX 4 ++ ++#define TX_DESC_QSEL_MAX 20 ++ ++#define RTW_USB_VENDOR_ID_REALTEK 0x0bda ++ ++static inline struct rtw_usb *rtw_get_usb_priv(struct rtw_dev *rtwdev) ++{ ++ return (struct rtw_usb *)rtwdev->priv; ++} ++ ++struct rx_usb_ctrl_block { ++ struct rtw_dev *rtwdev; ++ struct urb *rx_urb; ++ struct sk_buff *rx_skb; ++ int n; ++}; ++ ++struct rtw_usb_tx_data { ++ u8 sn; ++}; ++ ++struct rtw_usb { ++ struct rtw_dev *rtwdev; ++ struct usb_device *udev; ++ ++ /* protects usb_data_index */ ++ spinlock_t usb_lock; ++ __le32 *usb_data; ++ unsigned int usb_data_index; ++ ++ u32 bulkout_size; ++ u8 pipe_interrupt; ++ u8 pipe_in; ++ u8 out_ep[RTW_USB_EP_MAX]; ++ u8 qsel_to_ep[TX_DESC_QSEL_MAX]; ++ u8 usb_txagg_num; ++ ++ struct workqueue_struct *txwq, *rxwq; ++ ++ struct sk_buff_head tx_queue[RTW_USB_EP_MAX]; ++ struct work_struct tx_work; ++ ++ struct rx_usb_ctrl_block rx_cb[RTW_USB_RXCB_NUM]; ++ struct sk_buff_head rx_queue; ++ struct work_struct rx_work; ++}; ++ ++static inline struct rtw_usb_tx_data *rtw_usb_get_tx_data(struct sk_buff *skb) ++{ ++ struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); ++ ++ BUILD_BUG_ON(sizeof(struct rtw_usb_tx_data) > ++ sizeof(info->status.status_driver_data)); ++ ++ return (struct rtw_usb_tx_data *)info->status.status_driver_data; ++} ++ ++int rtw_usb_probe(struct usb_interface *intf, const struct usb_device_id *id); ++void rtw_usb_disconnect(struct usb_interface *intf); ++ ++#endif +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw88/util.c linux-6.2/drivers/net/wireless/realtek/rtw88/util.c +--- linux-6.1/drivers/net/wireless/realtek/rtw88/util.c 2022-12-12 00:15:18.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw88/util.c 2022-12-24 00:49:25.775376835 +0200 +@@ -105,3 +105,106 @@ void rtw_desc_to_mcsrate(u16 rate, u8 *m + *mcs = rate - DESC_RATEMCS0; + } + } ++ ++struct rtw_stas_entry { ++ struct list_head list; ++ struct ieee80211_sta *sta; ++}; ++ ++struct rtw_iter_stas_data { ++ struct rtw_dev *rtwdev; ++ struct list_head list; ++}; ++ ++static void rtw_collect_sta_iter(void *data, struct ieee80211_sta *sta) ++{ ++ struct rtw_iter_stas_data *iter_stas = data; ++ struct rtw_stas_entry *stas_entry; ++ ++ stas_entry = kmalloc(sizeof(*stas_entry), GFP_ATOMIC); ++ if (!stas_entry) ++ return; ++ ++ stas_entry->sta = sta; ++ list_add_tail(&stas_entry->list, &iter_stas->list); ++} ++ ++void rtw_iterate_stas(struct rtw_dev *rtwdev, ++ void (*iterator)(void *data, ++ struct ieee80211_sta *sta), ++ void *data) ++{ ++ struct rtw_iter_stas_data iter_data; ++ struct rtw_stas_entry *sta_entry, *tmp; ++ ++ /* &rtwdev->mutex makes sure no stations can be removed between ++ * collecting the stations and iterating over them. ++ */ ++ lockdep_assert_held(&rtwdev->mutex); ++ ++ iter_data.rtwdev = rtwdev; ++ INIT_LIST_HEAD(&iter_data.list); ++ ++ ieee80211_iterate_stations_atomic(rtwdev->hw, rtw_collect_sta_iter, ++ &iter_data); ++ ++ list_for_each_entry_safe(sta_entry, tmp, &iter_data.list, ++ list) { ++ list_del_init(&sta_entry->list); ++ iterator(data, sta_entry->sta); ++ kfree(sta_entry); ++ } ++} ++ ++struct rtw_vifs_entry { ++ struct list_head list; ++ struct ieee80211_vif *vif; ++ u8 mac[ETH_ALEN]; ++}; ++ ++struct rtw_iter_vifs_data { ++ struct rtw_dev *rtwdev; ++ struct list_head list; ++}; ++ ++static void rtw_collect_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif) ++{ ++ struct rtw_iter_vifs_data *iter_stas = data; ++ struct rtw_vifs_entry *vifs_entry; ++ ++ vifs_entry = kmalloc(sizeof(*vifs_entry), GFP_ATOMIC); ++ if (!vifs_entry) ++ return; ++ ++ vifs_entry->vif = vif; ++ ether_addr_copy(vifs_entry->mac, mac); ++ list_add_tail(&vifs_entry->list, &iter_stas->list); ++} ++ ++void rtw_iterate_vifs(struct rtw_dev *rtwdev, ++ void (*iterator)(void *data, u8 *mac, ++ struct ieee80211_vif *vif), ++ void *data) ++{ ++ struct rtw_iter_vifs_data iter_data; ++ struct rtw_vifs_entry *vif_entry, *tmp; ++ ++ /* &rtwdev->mutex makes sure no interfaces can be removed between ++ * collecting the interfaces and iterating over them. ++ */ ++ lockdep_assert_held(&rtwdev->mutex); ++ ++ iter_data.rtwdev = rtwdev; ++ INIT_LIST_HEAD(&iter_data.list); ++ ++ ieee80211_iterate_active_interfaces_atomic(rtwdev->hw, ++ IEEE80211_IFACE_ITER_NORMAL, ++ rtw_collect_vif_iter, &iter_data); ++ ++ list_for_each_entry_safe(vif_entry, tmp, &iter_data.list, ++ list) { ++ list_del_init(&vif_entry->list); ++ iterator(data, vif_entry->mac, vif_entry->vif); ++ kfree(vif_entry); ++ } ++} +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw88/util.h linux-6.2/drivers/net/wireless/realtek/rtw88/util.h +--- linux-6.1/drivers/net/wireless/realtek/rtw88/util.h 2022-12-12 00:15:18.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw88/util.h 2022-12-24 00:49:25.775376835 +0200 +@@ -7,9 +7,6 @@ + + struct rtw_dev; + +-#define rtw_iterate_vifs(rtwdev, iterator, data) \ +- ieee80211_iterate_active_interfaces(rtwdev->hw, \ +- IEEE80211_IFACE_ITER_NORMAL, iterator, data) + #define rtw_iterate_vifs_atomic(rtwdev, iterator, data) \ + ieee80211_iterate_active_interfaces_atomic(rtwdev->hw, \ + IEEE80211_IFACE_ITER_NORMAL, iterator, data) +@@ -20,6 +17,15 @@ struct rtw_dev; + #define rtw_iterate_keys_rcu(rtwdev, vif, iterator, data) \ + ieee80211_iter_keys_rcu((rtwdev)->hw, vif, iterator, data) + ++void rtw_iterate_vifs(struct rtw_dev *rtwdev, ++ void (*iterator)(void *data, u8 *mac, ++ struct ieee80211_vif *vif), ++ void *data); ++void rtw_iterate_stas(struct rtw_dev *rtwdev, ++ void (*iterator)(void *data, ++ struct ieee80211_sta *sta), ++ void *data); ++ + static inline u8 *get_hdr_bssid(struct ieee80211_hdr *hdr) + { + __le16 fc = hdr->frame_control; diff --git a/kernel/tools/cpupowertools/files/patches/mageia/net-wireless-rtw88-8822c-update-rx-settings-to-prevent-potential-hw-deadlock.patch b/kernel/tools/cpupowertools/files/patches/mageia/net-wireless-rtw88-8822c-update-rx-settings-to-prevent-potential-hw-deadlock.patch deleted file mode 100644 index 16ca2f1c..00000000 --- a/kernel/tools/cpupowertools/files/patches/mageia/net-wireless-rtw88-8822c-update-rx-settings-to-prevent-potential-hw-deadlock.patch +++ /dev/null @@ -1,74 +0,0 @@ -From c1afb26727d9e507d3e17a9890e7aaf7fc85cd55 Mon Sep 17 00:00:00 2001 -From: Po-Hao Huang -Date: Fri, 17 Dec 2021 09:27:08 +0800 -Subject: rtw88: 8822c: update rx settings to prevent potential hw deadlock - -These settings enables mac to detect and recover when rx fifo -circuit deadlock occurs. Previous version missed this, so we fix it. - -Signed-off-by: Po-Hao Huang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20211217012708.8623-1-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw88/main.c | 2 +- - drivers/net/wireless/realtek/rtw88/rtw8821c.h | 2 +- - drivers/net/wireless/realtek/rtw88/rtw8822b.c | 2 +- - drivers/net/wireless/realtek/rtw88/rtw8822c.c | 2 +- - 4 files changed, 4 insertions(+), 4 deletions(-) - -diff --git a/drivers/net/wireless/realtek/rtw88/main.c b/drivers/net/wireless/realtek/rtw88/main.c -index 78fcbc20942db..274e0af959177 100644 ---- a/drivers/net/wireless/realtek/rtw88/main.c -+++ b/drivers/net/wireless/realtek/rtw88/main.c -@@ -1869,7 +1869,7 @@ int rtw_core_init(struct rtw_dev *rtwdev) - - /* default rx filter setting */ - rtwdev->hal.rcr = BIT_APP_FCS | BIT_APP_MIC | BIT_APP_ICV | -- BIT_HTC_LOC_CTRL | BIT_APP_PHYSTS | -+ BIT_PKTCTL_DLEN | BIT_HTC_LOC_CTRL | BIT_APP_PHYSTS | - BIT_AB | BIT_AM | BIT_APM; - - ret = rtw_load_firmware(rtwdev, RTW_NORMAL_FW); -diff --git a/drivers/net/wireless/realtek/rtw88/rtw8821c.h b/drivers/net/wireless/realtek/rtw88/rtw8821c.h -index 112faa60f653e..d9fbddd7b0f35 100644 ---- a/drivers/net/wireless/realtek/rtw88/rtw8821c.h -+++ b/drivers/net/wireless/realtek/rtw88/rtw8821c.h -@@ -131,7 +131,7 @@ _rtw_write32s_mask(struct rtw_dev *rtwdev, u32 addr, u32 mask, u32 data) - #define WLAN_TX_FUNC_CFG2 0x30 - #define WLAN_MAC_OPT_NORM_FUNC1 0x98 - #define WLAN_MAC_OPT_LB_FUNC1 0x80 --#define WLAN_MAC_OPT_FUNC2 0x30810041 -+#define WLAN_MAC_OPT_FUNC2 0xb0810041 - - #define WLAN_SIFS_CFG (WLAN_SIFS_CCK_CONT_TX | \ - (WLAN_SIFS_OFDM_CONT_TX << BIT_SHIFT_SIFS_OFDM_CTX) | \ -diff --git a/drivers/net/wireless/realtek/rtw88/rtw8822b.c b/drivers/net/wireless/realtek/rtw88/rtw8822b.c -index a4cbcc6bdcd14..dd4fbb82750d5 100644 ---- a/drivers/net/wireless/realtek/rtw88/rtw8822b.c -+++ b/drivers/net/wireless/realtek/rtw88/rtw8822b.c -@@ -205,7 +205,7 @@ static void rtw8822b_phy_set_param(struct rtw_dev *rtwdev) - #define WLAN_TX_FUNC_CFG2 0x30 - #define WLAN_MAC_OPT_NORM_FUNC1 0x98 - #define WLAN_MAC_OPT_LB_FUNC1 0x80 --#define WLAN_MAC_OPT_FUNC2 0x30810041 -+#define WLAN_MAC_OPT_FUNC2 0xb0810041 - - #define WLAN_SIFS_CFG (WLAN_SIFS_CCK_CONT_TX | \ - (WLAN_SIFS_OFDM_CONT_TX << BIT_SHIFT_SIFS_OFDM_CTX) | \ -diff --git a/drivers/net/wireless/realtek/rtw88/rtw8822c.c b/drivers/net/wireless/realtek/rtw88/rtw8822c.c -index a8b95dcdb8e90..e01d61b5d104b 100644 ---- a/drivers/net/wireless/realtek/rtw88/rtw8822c.c -+++ b/drivers/net/wireless/realtek/rtw88/rtw8822c.c -@@ -1962,7 +1962,7 @@ static void rtw8822c_phy_set_param(struct rtw_dev *rtwdev) - #define WLAN_TX_FUNC_CFG2 0x30 - #define WLAN_MAC_OPT_NORM_FUNC1 0x98 - #define WLAN_MAC_OPT_LB_FUNC1 0x80 --#define WLAN_MAC_OPT_FUNC2 0x30810041 -+#define WLAN_MAC_OPT_FUNC2 0xb0810041 - #define WLAN_MAC_INT_MIG_CFG 0x33330000 - - #define WLAN_SIFS_CFG (WLAN_SIFS_CCK_CONT_TX | \ --- -cgit 1.2.3-1.el7 - diff --git a/kernel/tools/cpupowertools/files/patches/mageia/net-wireless-rtw88-add-8723de-alias.patch b/kernel/tools/cpupowertools/files/patches/mageia/net-wireless-rtw88-add-8723de-alias.patch new file mode 100644 index 00000000..17540ff2 --- /dev/null +++ b/kernel/tools/cpupowertools/files/patches/mageia/net-wireless-rtw88-add-8723de-alias.patch @@ -0,0 +1,14 @@ + +Replace 3rdparty 8723de driver by the new rtw88 driver. + +Add a module alias to keep upgrade path. + +Signed-off-by: Thomas Backlund + +--- a/drivers/net/wireless/realtek/rtw88/rtw8723de.c ++++ b/drivers/net/wireless/realtek/rtw88/rtw8723de.c +@@ -28,3 +28,4 @@ module_pci_driver(rtw_8723de_driver); + MODULE_AUTHOR("Realtek Corporation"); + MODULE_DESCRIPTION("Realtek 802.11n wireless 8723de driver"); + MODULE_LICENSE("Dual BSD/GPL"); ++MODULE_ALIAS("8723de"); diff --git a/kernel/tools/cpupowertools/files/patches/mageia/net-wireless-rtw88-dont-check-CRC-of-VHT-SIG-B-in-802.11ac-signal.patch b/kernel/tools/cpupowertools/files/patches/mageia/net-wireless-rtw88-dont-check-CRC-of-VHT-SIG-B-in-802.11ac-signal.patch deleted file mode 100644 index 6e9e1060..00000000 --- a/kernel/tools/cpupowertools/files/patches/mageia/net-wireless-rtw88-dont-check-CRC-of-VHT-SIG-B-in-802.11ac-signal.patch +++ /dev/null @@ -1,143 +0,0 @@ -From a3fd1f9aa79a7d3885faa486acb02c838533f332 Mon Sep 17 00:00:00 2001 -From: Chin-Yen Lee -Date: Fri, 17 Dec 2021 09:24:21 +0800 -Subject: rtw88: don't check CRC of VHT-SIG-B in 802.11ac signal - -Currently all realtek wifi chip is set to check CRC of VHT-SIG-B -in 802.11ac signal, but some AP don't calculate the CRC and packets -from these AP can't be received and lead to disconnection. -We disable the check defaultly to avoid this case. - -Signed-off-by: Chin-Yen Lee -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20211217012421.7859-1-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw88/bf.c | 14 +++++++++----- - drivers/net/wireless/realtek/rtw88/bf.h | 7 +++++-- - drivers/net/wireless/realtek/rtw88/rtw8821c.c | 3 ++- - drivers/net/wireless/realtek/rtw88/rtw8822b.c | 2 ++ - drivers/net/wireless/realtek/rtw88/rtw8822c.c | 2 ++ - 5 files changed, 20 insertions(+), 8 deletions(-) - -diff --git a/drivers/net/wireless/realtek/rtw88/bf.c b/drivers/net/wireless/realtek/rtw88/bf.c -index aff70e4ae0288..df750b3a35e9d 100644 ---- a/drivers/net/wireless/realtek/rtw88/bf.c -+++ b/drivers/net/wireless/realtek/rtw88/bf.c -@@ -130,7 +130,8 @@ void rtw_bf_cfg_sounding(struct rtw_dev *rtwdev, struct rtw_vif *vif, - BIT_WMAC_USE_NDPARATE | - (csi_rsc << 13); - -- rtw_write8(rtwdev, REG_SND_PTCL_CTRL, RTW_SND_CTRL_SOUNDING); -+ rtw_write8_mask(rtwdev, REG_SND_PTCL_CTRL, BIT_MASK_BEAMFORM, -+ RTW_SND_CTRL_SOUNDING); - rtw_write8(rtwdev, REG_SND_PTCL_CTRL + 3, 0x26); - rtw_write8_clr(rtwdev, REG_RXFLTMAP1, BIT_RXFLTMAP1_BF_REPORT_POLL); - rtw_write8_clr(rtwdev, REG_RXFLTMAP4, BIT_RXFLTMAP4_BF_REPORT_POLL); -@@ -177,7 +178,7 @@ void rtw_bf_del_bfer_entry_mu(struct rtw_dev *rtwdev) - - void rtw_bf_del_sounding(struct rtw_dev *rtwdev) - { -- rtw_write8(rtwdev, REG_SND_PTCL_CTRL, 0); -+ rtw_write8_mask(rtwdev, REG_SND_PTCL_CTRL, BIT_MASK_BEAMFORM, 0); - } - - void rtw_bf_enable_bfee_su(struct rtw_dev *rtwdev, struct rtw_vif *vif, -@@ -204,7 +205,8 @@ void rtw_bf_enable_bfee_su(struct rtw_dev *rtwdev, struct rtw_vif *vif, - } - - /* Sounding protocol control */ -- rtw_write8(rtwdev, REG_SND_PTCL_CTRL, RTW_SND_CTRL_SOUNDING); -+ rtw_write8_mask(rtwdev, REG_SND_PTCL_CTRL, BIT_MASK_BEAMFORM, -+ RTW_SND_CTRL_SOUNDING); - - /* MAC address/Partial AID of Beamformer */ - for (i = 0; i < ETH_ALEN; i++) -@@ -273,7 +275,8 @@ void rtw_bf_remove_bfee_su(struct rtw_dev *rtwdev, - struct rtw_bf_info *bfinfo = &rtwdev->bf_info; - - rtw_dbg(rtwdev, RTW_DBG_BF, "remove as a su bfee\n"); -- rtw_write8(rtwdev, REG_SND_PTCL_CTRL, RTW_SND_CTRL_REMOVE); -+ rtw_write8_mask(rtwdev, REG_SND_PTCL_CTRL, BIT_MASK_BEAMFORM, -+ RTW_SND_CTRL_REMOVE); - - switch (bfee->su_reg_index) { - case 0: -@@ -298,7 +301,8 @@ void rtw_bf_remove_bfee_mu(struct rtw_dev *rtwdev, - { - struct rtw_bf_info *bfinfo = &rtwdev->bf_info; - -- rtw_write8(rtwdev, REG_SND_PTCL_CTRL, RTW_SND_CTRL_REMOVE); -+ rtw_write8_mask(rtwdev, REG_SND_PTCL_CTRL, BIT_MASK_BEAMFORM, -+ RTW_SND_CTRL_REMOVE); - - rtw_bf_del_bfer_entry_mu(rtwdev); - -diff --git a/drivers/net/wireless/realtek/rtw88/bf.h b/drivers/net/wireless/realtek/rtw88/bf.h -index 17855edb5006a..7b40c2c038560 100644 ---- a/drivers/net/wireless/realtek/rtw88/bf.h -+++ b/drivers/net/wireless/realtek/rtw88/bf.h -@@ -13,6 +13,9 @@ - #define REG_ASSOCIATED_BFMER1_INFO 0x06EC - #define REG_TX_CSI_RPT_PARAM_BW20 0x06F4 - #define REG_SND_PTCL_CTRL 0x0718 -+#define BIT_DIS_CHK_VHTSIGB_CRC BIT(6) -+#define BIT_DIS_CHK_VHTSIGA_CRC BIT(5) -+#define BIT_MASK_BEAMFORM (GENMASK(4, 0) | BIT(7)) - #define REG_MU_TX_CTL 0x14C0 - #define REG_MU_STA_GID_VLD 0x14C4 - #define REG_MU_STA_USER_POS_INFO 0x14C8 -@@ -42,8 +45,8 @@ - #define BIT_RXFLTMAP4_BF_REPORT_POLL BIT(4) - - #define RTW_NDP_RX_STANDBY_TIME 0x70 --#define RTW_SND_CTRL_REMOVE 0xD8 --#define RTW_SND_CTRL_SOUNDING 0xDB -+#define RTW_SND_CTRL_REMOVE 0x98 -+#define RTW_SND_CTRL_SOUNDING 0x9B - - enum csi_seg_len { - HAL_CSI_SEG_4K = 0, -diff --git a/drivers/net/wireless/realtek/rtw88/rtw8821c.c b/drivers/net/wireless/realtek/rtw88/rtw8821c.c -index 80a6f4da6acd9..db078df63f855 100644 ---- a/drivers/net/wireless/realtek/rtw88/rtw8821c.c -+++ b/drivers/net/wireless/realtek/rtw88/rtw8821c.c -@@ -223,7 +223,8 @@ static int rtw8821c_mac_init(struct rtw_dev *rtwdev) - rtw_write8(rtwdev, REG_TCR + 1, WLAN_TX_FUNC_CFG1); - rtw_write8(rtwdev, REG_ACKTO_CCK, 0x40); - rtw_write8_set(rtwdev, REG_WMAC_TRXPTCL_CTL_H, BIT(1)); -- rtw_write8_set(rtwdev, REG_SND_PTCL_CTRL, BIT(6)); -+ rtw_write8_set(rtwdev, REG_SND_PTCL_CTRL, -+ BIT_DIS_CHK_VHTSIGB_CRC); - rtw_write32(rtwdev, REG_WMAC_OPTION_FUNCTION + 8, WLAN_MAC_OPT_FUNC2); - rtw_write8(rtwdev, REG_WMAC_OPTION_FUNCTION + 4, WLAN_MAC_OPT_NORM_FUNC1); - -diff --git a/drivers/net/wireless/realtek/rtw88/rtw8822b.c b/drivers/net/wireless/realtek/rtw88/rtw8822b.c -index c409c8c29ec8b..a4cbcc6bdcd14 100644 ---- a/drivers/net/wireless/realtek/rtw88/rtw8822b.c -+++ b/drivers/net/wireless/realtek/rtw88/rtw8822b.c -@@ -262,6 +262,8 @@ static int rtw8822b_mac_init(struct rtw_dev *rtwdev) - rtw_write8(rtwdev, REG_TCR + 1, WLAN_TX_FUNC_CFG1); - rtw_write32(rtwdev, REG_WMAC_OPTION_FUNCTION + 8, WLAN_MAC_OPT_FUNC2); - rtw_write8(rtwdev, REG_WMAC_OPTION_FUNCTION + 4, WLAN_MAC_OPT_NORM_FUNC1); -+ rtw_write8_set(rtwdev, REG_SND_PTCL_CTRL, -+ BIT_DIS_CHK_VHTSIGB_CRC); - - return 0; - } -diff --git a/drivers/net/wireless/realtek/rtw88/rtw8822c.c b/drivers/net/wireless/realtek/rtw88/rtw8822c.c -index 46b881e8e4feb..a8b95dcdb8e90 100644 ---- a/drivers/net/wireless/realtek/rtw88/rtw8822c.c -+++ b/drivers/net/wireless/realtek/rtw88/rtw8822c.c -@@ -2102,6 +2102,8 @@ static int rtw8822c_mac_init(struct rtw_dev *rtwdev) - BIT_RXPSF_CONT_ERRCHKEN); - value16 = BIT_SET_RXPSF_ERRTHR(value16, 0x07); - rtw_write16(rtwdev, REG_RXPSF_CTRL, value16); -+ rtw_write8_set(rtwdev, REG_SND_PTCL_CTRL, -+ BIT_DIS_CHK_VHTSIGB_CRC); - - /* Interrupt migration configuration */ - rtw_write32(rtwdev, REG_INT_MIG, WLAN_MAC_INT_MIG_CFG); --- -cgit 1.2.3-1.el7 - diff --git a/kernel/tools/cpupowertools/files/patches/mageia/net-wireless-rtw89-6.2-git.patch b/kernel/tools/cpupowertools/files/patches/mageia/net-wireless-rtw89-6.2-git.patch new file mode 100644 index 00000000..6941b5b6 --- /dev/null +++ b/kernel/tools/cpupowertools/files/patches/mageia/net-wireless-rtw89-6.2-git.patch @@ -0,0 +1,40911 @@ + + drivers/net/wireless/realtek/rtw89/Kconfig | 14 + drivers/net/wireless/realtek/rtw89/Makefile | 11 + drivers/net/wireless/realtek/rtw89/chan.c | 40 + drivers/net/wireless/realtek/rtw89/coex.c | 9 + drivers/net/wireless/realtek/rtw89/core.c | 100 + drivers/net/wireless/realtek/rtw89/core.h | 238 + + drivers/net/wireless/realtek/rtw89/debug.c | 1050 +++++++ + drivers/net/wireless/realtek/rtw89/debug.h | 2 + drivers/net/wireless/realtek/rtw89/fw.c | 792 +++++- + drivers/net/wireless/realtek/rtw89/fw.h | 731 +++++ + drivers/net/wireless/realtek/rtw89/mac.c | 764 ++++- + drivers/net/wireless/realtek/rtw89/mac.h | 120 + drivers/net/wireless/realtek/rtw89/mac80211.c | 70 + drivers/net/wireless/realtek/rtw89/pci.c | 41 + drivers/net/wireless/realtek/rtw89/pci.h | 12 + drivers/net/wireless/realtek/rtw89/phy.c | 356 ++ + drivers/net/wireless/realtek/rtw89/phy.h | 87 + drivers/net/wireless/realtek/rtw89/ps.c | 2 + drivers/net/wireless/realtek/rtw89/ps.h | 1 + drivers/net/wireless/realtek/rtw89/reg.h | 466 +++ + drivers/net/wireless/realtek/rtw89/rtw8852a.c | 179 - + drivers/net/wireless/realtek/rtw89/rtw8852a.h | 1 + drivers/net/wireless/realtek/rtw89/rtw8852b.c | 2445 ++++++++++++++++++ + drivers/net/wireless/realtek/rtw89/rtw8852b.h | 137 + + drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.c | 4174 +++++++++++++++++++++++++++++++ + drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.h | 25 + drivers/net/wireless/realtek/rtw89/rtw8852b_rfk_table.c | 794 ++++++ + drivers/net/wireless/realtek/rtw89/rtw8852b_rfk_table.h | 62 + drivers/net/wireless/realtek/rtw89/rtw8852b_table.c |22877 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + drivers/net/wireless/realtek/rtw89/rtw8852b_table.h | 30 + drivers/net/wireless/realtek/rtw89/rtw8852be.c | 64 + drivers/net/wireless/realtek/rtw89/rtw8852c.c | 232 - + drivers/net/wireless/realtek/rtw89/rtw8852c.h | 1 + drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c | 25 + drivers/net/wireless/realtek/rtw89/rtw8852c_table.c | 988 ++++++- + drivers/net/wireless/realtek/rtw89/txrx.h | 4 + drivers/net/wireless/realtek/rtw89/util.h | 11 + drivers/net/wireless/realtek/rtw89/wow.c | 859 ++++++ + drivers/net/wireless/realtek/rtw89/wow.h | 21 + 39 files changed, 37041 insertions(+), 794 deletions(-) + +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw89/chan.c linux-6.2/drivers/net/wireless/realtek/rtw89/chan.c +--- linux-6.1/drivers/net/wireless/realtek/rtw89/chan.c 2022-12-12 00:15:18.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw89/chan.c 2022-12-24 00:49:25.775376835 +0200 +@@ -4,6 +4,7 @@ + + #include "chan.h" + #include "debug.h" ++#include "util.h" + + static enum rtw89_subband rtw89_get_subband_type(enum rtw89_band band, + u8 center_chan) +@@ -108,8 +109,8 @@ bool rtw89_assign_entity_chan(struct rtw + const struct rtw89_chan *new) + { + struct rtw89_hal *hal = &rtwdev->hal; +- struct rtw89_chan *chan = &hal->chan[idx]; +- struct rtw89_chan_rcd *rcd = &hal->chan_rcd[idx]; ++ struct rtw89_chan *chan = &hal->sub[idx].chan; ++ struct rtw89_chan_rcd *rcd = &hal->sub[idx].rcd; + bool band_changed; + + rcd->prev_primary_channel = chan->primary_channel; +@@ -127,7 +128,7 @@ static void __rtw89_config_entity_chande + { + struct rtw89_hal *hal = &rtwdev->hal; + +- hal->chandef[idx] = *chandef; ++ hal->sub[idx].chandef = *chandef; + + if (from_stack) + set_bit(idx, hal->entity_map); +@@ -195,6 +196,7 @@ int rtw89_chanctx_ops_add(struct rtw89_d + rtw89_config_entity_chandef(rtwdev, idx, &ctx->def); + rtw89_set_channel(rtwdev); + cfg->idx = idx; ++ hal->sub[idx].cfg = cfg; + return 0; + } + +@@ -203,8 +205,34 @@ void rtw89_chanctx_ops_remove(struct rtw + { + struct rtw89_hal *hal = &rtwdev->hal; + struct rtw89_chanctx_cfg *cfg = (struct rtw89_chanctx_cfg *)ctx->drv_priv; ++ struct rtw89_vif *rtwvif; ++ u8 drop, roll; + +- clear_bit(cfg->idx, hal->entity_map); ++ drop = cfg->idx; ++ if (drop != RTW89_SUB_ENTITY_0) ++ goto out; ++ ++ roll = find_next_bit(hal->entity_map, NUM_OF_RTW89_SUB_ENTITY, drop + 1); ++ ++ /* Follow rtw89_config_default_chandef() when rtw89_entity_recalc(). */ ++ if (roll == NUM_OF_RTW89_SUB_ENTITY) ++ goto out; ++ ++ /* RTW89_SUB_ENTITY_0 is going to release, and another exists. ++ * Make another roll down to RTW89_SUB_ENTITY_0 to replace. ++ */ ++ hal->sub[roll].cfg->idx = RTW89_SUB_ENTITY_0; ++ hal->sub[RTW89_SUB_ENTITY_0] = hal->sub[roll]; ++ ++ rtw89_for_each_rtwvif(rtwdev, rtwvif) { ++ if (rtwvif->sub_entity_idx == roll) ++ rtwvif->sub_entity_idx = RTW89_SUB_ENTITY_0; ++ } ++ ++ drop = roll; ++ ++out: ++ clear_bit(drop, hal->entity_map); + rtw89_set_channel(rtwdev); + } + +@@ -225,6 +253,9 @@ int rtw89_chanctx_ops_assign_vif(struct + struct rtw89_vif *rtwvif, + struct ieee80211_chanctx_conf *ctx) + { ++ struct rtw89_chanctx_cfg *cfg = (struct rtw89_chanctx_cfg *)ctx->drv_priv; ++ ++ rtwvif->sub_entity_idx = cfg->idx; + return 0; + } + +@@ -232,4 +263,5 @@ void rtw89_chanctx_ops_unassign_vif(stru + struct rtw89_vif *rtwvif, + struct ieee80211_chanctx_conf *ctx) + { ++ rtwvif->sub_entity_idx = RTW89_SUB_ENTITY_0; + } +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw89/coex.c linux-6.2/drivers/net/wireless/realtek/rtw89/coex.c +--- linux-6.1/drivers/net/wireless/realtek/rtw89/coex.c 2022-12-12 00:15:18.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw89/coex.c 2022-12-24 00:49:25.776376835 +0200 +@@ -1809,13 +1809,18 @@ static void _set_rf_trx_para(struct rtw8 + struct rtw89_btc_dm *dm = &btc->dm; + struct rtw89_btc_wl_info *wl = &btc->cx.wl; + struct rtw89_btc_bt_info *bt = &btc->cx.bt; ++ struct rtw89_btc_bt_link_info *b = &bt->link_info; + struct rtw89_btc_rf_trx_para para; + u32 wl_stb_chg = 0; + u8 level_id = 0; + + if (!dm->freerun) { +- dm->trx_para_level = 0; +- chip->ops->btc_bt_aci_imp(rtwdev); ++ /* fix LNA2 = level-5 for BT ACI issue at BTG */ ++ if ((btc->dm.wl_btg_rx && b->profile_cnt.now != 0) || ++ dm->bt_only == 1) ++ dm->trx_para_level = 1; ++ else ++ dm->trx_para_level = 0; + } + + level_id = (u8)dm->trx_para_level; +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw89/core.c linux-6.2/drivers/net/wireless/realtek/rtw89/core.c +--- linux-6.1/drivers/net/wireless/realtek/rtw89/core.c 2022-12-31 22:58:05.366710726 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw89/core.c 2022-12-24 00:49:25.776376835 +0200 +@@ -171,7 +171,7 @@ bool rtw89_ra_report_to_bitrate(struct r + return true; + } + +-static struct ieee80211_supported_band rtw89_sband_2ghz = { ++static const struct ieee80211_supported_band rtw89_sband_2ghz = { + .band = NL80211_BAND_2GHZ, + .channels = rtw89_channels_2ghz, + .n_channels = ARRAY_SIZE(rtw89_channels_2ghz), +@@ -181,7 +181,7 @@ static struct ieee80211_supported_band r + .vht_cap = {0}, + }; + +-static struct ieee80211_supported_band rtw89_sband_5ghz = { ++static const struct ieee80211_supported_band rtw89_sband_5ghz = { + .band = NL80211_BAND_5GHZ, + .channels = rtw89_channels_5ghz, + .n_channels = ARRAY_SIZE(rtw89_channels_5ghz), +@@ -193,7 +193,7 @@ static struct ieee80211_supported_band r + .vht_cap = {0}, + }; + +-static struct ieee80211_supported_band rtw89_sband_6ghz = { ++static const struct ieee80211_supported_band rtw89_sband_6ghz = { + .band = NL80211_BAND_6GHZ, + .channels = rtw89_channels_6ghz, + .n_channels = ARRAY_SIZE(rtw89_channels_6ghz), +@@ -1196,7 +1196,11 @@ static void rtw89_core_parse_phy_status_ + if (phy_ppdu->rate < RTW89_HW_RATE_OFDM6) + return; + /* sign conversion for S(12,2) */ +- cfo = sign_extend32(RTW89_GET_PHY_STS_IE01_CFO(addr), 11); ++ if (rtwdev->chip->cfo_src_fd) ++ cfo = sign_extend32(RTW89_GET_PHY_STS_IE01_FD_CFO(addr), 11); ++ else ++ cfo = sign_extend32(RTW89_GET_PHY_STS_IE01_PREMB_CFO(addr), 11); ++ + rtw89_phy_cfo_parse(rtwdev, cfo, phy_ppdu); + } + +@@ -1255,6 +1259,9 @@ static int rtw89_core_rx_parse_phy_sts(s + if (phy_ppdu->ie < RTW89_CCK_PKT) + return -EINVAL; + ++ if (!phy_ppdu->to_self) ++ return 0; ++ + pos = (u8 *)phy_ppdu->buf + PHY_STS_HDR_LEN; + end = (u8 *)phy_ppdu->buf + phy_ppdu->len; + while (pos < end) { +@@ -1398,6 +1405,9 @@ static void rtw89_vif_rx_stats_iter(void + struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; + const u8 *bssid = iter_data->bssid; + ++ if (!vif->bss_conf.bssid) ++ return; ++ + if (ieee80211_is_trigger(hdr->frame_control)) { + rtw89_stats_trigger_frame(rtwdev, vif, skb); + return; +@@ -1470,6 +1480,27 @@ static void rtw89_core_hw_to_sband_rate( + rx_status->rate_idx -= 4; + } + ++static void rtw89_core_update_radiotap(struct rtw89_dev *rtwdev, ++ struct sk_buff *skb, ++ struct ieee80211_rx_status *rx_status) ++{ ++ static const struct ieee80211_radiotap_he known_he = { ++ .data1 = cpu_to_le16(IEEE80211_RADIOTAP_HE_DATA1_DATA_MCS_KNOWN | ++ IEEE80211_RADIOTAP_HE_DATA1_BW_RU_ALLOC_KNOWN), ++ .data2 = cpu_to_le16(IEEE80211_RADIOTAP_HE_DATA2_GI_KNOWN), ++ }; ++ struct ieee80211_radiotap_he *he; ++ ++ if (!(rtwdev->hw->conf.flags & IEEE80211_CONF_MONITOR)) ++ return; ++ ++ if (rx_status->encoding == RX_ENC_HE) { ++ rx_status->flag |= RX_FLAG_RADIOTAP_HE; ++ he = skb_push(skb, sizeof(*he)); ++ *he = known_he; ++ } ++} ++ + static void rtw89_core_rx_to_mac80211(struct rtw89_dev *rtwdev, + struct rtw89_rx_phy_ppdu *phy_ppdu, + struct rtw89_rx_desc_info *desc_info, +@@ -1484,6 +1515,7 @@ static void rtw89_core_rx_to_mac80211(st + + rtw89_core_hw_to_sband_rate(rx_status); + rtw89_core_rx_stats(rtwdev, phy_ppdu, desc_info, skb_ppdu); ++ rtw89_core_update_radiotap(rtwdev, skb_ppdu, rx_status); + /* In low power mode, it does RX in thread context. */ + local_bh_disable(); + ieee80211_rx_napi(rtwdev->hw, NULL, skb_ppdu, napi); +@@ -2201,6 +2233,9 @@ static void rtw89_track_work(struct work + track_work.work); + bool tfc_changed; + ++ if (test_bit(RTW89_FLAG_FORBIDDEN_TRACK_WROK, rtwdev->flags)) ++ return; ++ + mutex_lock(&rtwdev->mutex); + + if (!test_bit(RTW89_FLAG_RUNNING, rtwdev->flags)) +@@ -2227,6 +2262,7 @@ static void rtw89_track_work(struct work + rtw89_phy_ra_update(rtwdev); + rtw89_phy_cfo_track(rtwdev); + rtw89_phy_tx_path_div_track(rtwdev); ++ rtw89_phy_ul_tb_ctrl_track(rtwdev); + + if (rtwdev->lps_enabled && !rtwdev->btc.lps) + rtw89_enter_lps_track(rtwdev); +@@ -2375,6 +2411,8 @@ void rtw89_vif_type_mapping(struct ieee8 + rtwvif->self_role = RTW89_SELF_ROLE_CLIENT; + rtwvif->addr_cam.sec_ent_mode = RTW89_ADDR_CAM_SEC_NORMAL; + break; ++ case NL80211_IFTYPE_MONITOR: ++ break; + default: + WARN_ON(1); + break; +@@ -2410,6 +2448,8 @@ int rtw89_core_sta_add(struct rtw89_dev + } else if (vif->type == NL80211_IFTYPE_AP || sta->tdls) { + rtwsta->mac_id = rtw89_core_acquire_bit_map(rtwdev->mac_id_map, + RTW89_MAX_MAC_ID_NUM); ++ if (rtwsta->mac_id == RTW89_MAX_MAC_ID_NUM) ++ return -ENOSPC; + } + + return 0; +@@ -2548,6 +2588,7 @@ int rtw89_core_sta_assoc(struct rtw89_de + rtw89_btc_ntfy_role_info(rtwdev, rtwvif, rtwsta, + BTC_ROLE_MSTS_STA_CONN_END); + rtw89_core_get_no_ul_ofdma_htc(rtwdev, &rtwsta->htc_template); ++ rtw89_phy_ul_tb_assoc(rtwdev, rtwvif); + } + + return ret; +@@ -2933,6 +2974,41 @@ void rtw89_core_update_beacon_work(struc + mutex_unlock(&rtwdev->mutex); + } + ++int rtw89_wait_for_cond(struct rtw89_wait_info *wait, unsigned int cond) ++{ ++ struct completion *cmpl = &wait->completion; ++ unsigned long timeout; ++ unsigned int cur; ++ ++ cur = atomic_cmpxchg(&wait->cond, RTW89_WAIT_COND_IDLE, cond); ++ if (cur != RTW89_WAIT_COND_IDLE) ++ return -EBUSY; ++ ++ timeout = wait_for_completion_timeout(cmpl, RTW89_WAIT_FOR_COND_TIMEOUT); ++ if (timeout == 0) { ++ atomic_set(&wait->cond, RTW89_WAIT_COND_IDLE); ++ return -ETIMEDOUT; ++ } ++ ++ if (wait->data.err) ++ return -EFAULT; ++ ++ return 0; ++} ++ ++void rtw89_complete_cond(struct rtw89_wait_info *wait, unsigned int cond, ++ const struct rtw89_completion_data *data) ++{ ++ unsigned int cur; ++ ++ cur = atomic_cmpxchg(&wait->cond, cond, RTW89_WAIT_COND_IDLE); ++ if (cur != cond) ++ return; ++ ++ wait->data = *data; ++ complete(&wait->completion); ++} ++ + int rtw89_core_start(struct rtw89_dev *rtwdev) + { + int ret; +@@ -2957,7 +3033,7 @@ int rtw89_core_start(struct rtw89_dev *r + return ret; + + rtw89_phy_init_bb_reg(rtwdev); +- rtw89_phy_init_rf_reg(rtwdev); ++ rtw89_phy_init_rf_reg(rtwdev, false); + + rtw89_btc_ntfy_init(rtwdev, BTC_MODE_NORMAL); + +@@ -3037,6 +3113,7 @@ int rtw89_core_init(struct rtw89_dev *rt + continue; + INIT_LIST_HEAD(&rtwdev->scan_info.pkt_list[band]); + } ++ INIT_LIST_HEAD(&rtwdev->wow.pkt_list); + INIT_WORK(&rtwdev->ba_work, rtw89_core_ba_work); + INIT_WORK(&rtwdev->txq_work, rtw89_core_txq_work); + INIT_DELAYED_WORK(&rtwdev->txq_reinvoke_work, rtw89_core_txq_reinvoke_work); +@@ -3053,6 +3130,8 @@ int rtw89_core_init(struct rtw89_dev *rt + mutex_init(&rtwdev->rf_mutex); + rtwdev->total_sta_assoc = 0; + ++ rtw89_init_wait(&rtwdev->mcc.wait); ++ + INIT_WORK(&rtwdev->c2h_work, rtw89_fw_c2h_work); + INIT_WORK(&rtwdev->ips_work, rtw89_ips_work); + skb_queue_head_init(&rtwdev->c2h_queue); +@@ -3251,6 +3330,7 @@ static int rtw89_core_register_hw(struct + ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS); + ieee80211_hw_set(hw, SINGLE_SCAN_ON_ALL_BANDS); + ieee80211_hw_set(hw, SUPPORTS_MULTI_BSSID); ++ ieee80211_hw_set(hw, WANT_MONITOR_VIF); + + hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) | + BIT(NL80211_IFTYPE_AP) | +@@ -3268,6 +3348,10 @@ static int rtw89_core_register_hw(struct + hw->wiphy->max_scan_ssids = RTW89_SCANOFLD_MAX_SSID; + hw->wiphy->max_scan_ie_len = RTW89_SCANOFLD_MAX_IE_LEN; + ++#ifdef CONFIG_PM ++ hw->wiphy->wowlan = rtwdev->chip->wowlan_stub; ++#endif ++ + hw->wiphy->tid_config_support.vif |= BIT(NL80211_TID_CONFIG_ATTR_AMPDU_CTRL); + hw->wiphy->tid_config_support.peer |= BIT(NL80211_TID_CONFIG_ATTR_AMPDU_CTRL); + hw->wiphy->tid_config_support.vif |= BIT(NL80211_TID_CONFIG_ATTR_AMSDU_CTRL); +@@ -3336,6 +3420,7 @@ struct rtw89_dev *rtw89_alloc_ieee80211_ + u32 bus_data_size, + const struct rtw89_chip_info *chip) + { ++ const struct firmware *firmware; + struct ieee80211_hw *hw; + struct rtw89_dev *rtwdev; + struct ieee80211_ops *ops; +@@ -3343,7 +3428,7 @@ struct rtw89_dev *rtw89_alloc_ieee80211_ + u32 early_feat_map = 0; + bool no_chanctx; + +- rtw89_early_fw_feature_recognize(device, chip, &early_feat_map); ++ firmware = rtw89_early_fw_feature_recognize(device, chip, &early_feat_map); + + ops = kmemdup(&rtw89_ops, sizeof(rtw89_ops), GFP_KERNEL); + if (!ops) +@@ -3370,6 +3455,7 @@ struct rtw89_dev *rtw89_alloc_ieee80211_ + rtwdev->dev = device; + rtwdev->ops = ops; + rtwdev->chip = chip; ++ rtwdev->fw.firmware = firmware; + + rtw89_debug(rtwdev, RTW89_DBG_FW, "probe driver %s chanctx\n", + no_chanctx ? "without" : "with"); +@@ -3378,6 +3464,7 @@ struct rtw89_dev *rtw89_alloc_ieee80211_ + + err: + kfree(ops); ++ release_firmware(firmware); + return NULL; + } + EXPORT_SYMBOL(rtw89_alloc_ieee80211_hw); +@@ -3385,6 +3472,7 @@ EXPORT_SYMBOL(rtw89_alloc_ieee80211_hw); + void rtw89_free_ieee80211_hw(struct rtw89_dev *rtwdev) + { + kfree(rtwdev->ops); ++ release_firmware(rtwdev->fw.firmware); + ieee80211_free_hw(rtwdev->hw); + } + EXPORT_SYMBOL(rtw89_free_ieee80211_hw); +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw89/core.h linux-6.2/drivers/net/wireless/realtek/rtw89/core.h +--- linux-6.1/drivers/net/wireless/realtek/rtw89/core.h 2022-12-12 00:15:18.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw89/core.h 2022-12-24 00:49:25.777376835 +0200 +@@ -35,6 +35,7 @@ extern const struct ieee80211_ops rtw89_ + #define RSSI_FACTOR 1 + #define RTW89_RSSI_RAW_TO_DBM(rssi) ((s8)((rssi) >> RSSI_FACTOR) - MAX_RSSI) + #define RTW89_TX_DIV_RSSI_RAW_TH (2 << RSSI_FACTOR) ++#define RTW89_RADIOTAP_ROOM ALIGN(sizeof(struct ieee80211_radiotap_he), 64) + + #define RTW89_HTC_MASK_VARIANT GENMASK(1, 0) + #define RTW89_HTC_VARIANT_HE 3 +@@ -84,6 +85,7 @@ enum rtw89_subband { + RTW89_CH_6G_BAND_IDX7, /* Ultra-high */ + + RTW89_SUBBAND_NR, ++ RTW89_SUBBAND_2GHZ_5GHZ_NR = RTW89_CH_5G_BAND_4 + 1, + }; + + enum rtw89_gain_offset { +@@ -177,7 +179,9 @@ enum rtw89_upd_mode { + RTW89_ROLE_REMOVE, + RTW89_ROLE_TYPE_CHANGE, + RTW89_ROLE_INFO_CHANGE, +- RTW89_ROLE_CON_DISCONN ++ RTW89_ROLE_CON_DISCONN, ++ RTW89_ROLE_BAND_SW, ++ RTW89_ROLE_FW_RESTORE, + }; + + enum rtw89_self_role { +@@ -476,6 +480,20 @@ enum rtw89_regulation_type { + RTW89_REGD_NUM, + }; + ++enum rtw89_fw_pkt_ofld_type { ++ RTW89_PKT_OFLD_TYPE_PROBE_RSP = 0, ++ RTW89_PKT_OFLD_TYPE_PS_POLL = 1, ++ RTW89_PKT_OFLD_TYPE_NULL_DATA = 2, ++ RTW89_PKT_OFLD_TYPE_QOS_NULL = 3, ++ RTW89_PKT_OFLD_TYPE_CTS2SELF = 4, ++ RTW89_PKT_OFLD_TYPE_ARP_RSP = 5, ++ RTW89_PKT_OFLD_TYPE_NDP = 6, ++ RTW89_PKT_OFLD_TYPE_EAPOL_KEY = 7, ++ RTW89_PKT_OFLD_TYPE_SA_QUERY = 8, ++ RTW89_PKT_OFLD_TYPE_PROBE_REQ = 12, ++ RTW89_PKT_OFLD_TYPE_NUM, ++}; ++ + struct rtw89_txpwr_byrate { + s8 cck[RTW89_RATE_CCK_MAX]; + s8 ofdm[RTW89_RATE_OFDM_MAX]; +@@ -490,6 +508,8 @@ enum rtw89_bandwidth_section_num { + RTW89_BW80_SEC_NUM = 2, + }; + ++#define RTW89_TXPWR_LMT_PAGE_SIZE 40 ++ + struct rtw89_txpwr_limit { + s8 cck_20m[RTW89_BF_NUM]; + s8 cck_40m[RTW89_BF_NUM]; +@@ -504,6 +524,8 @@ struct rtw89_txpwr_limit { + + #define RTW89_RU_SEC_NUM 8 + ++#define RTW89_TXPWR_LMT_RU_PAGE_SIZE 24 ++ + struct rtw89_txpwr_limit_ru { + s8 ru26[RTW89_RU_SEC_NUM]; + s8 ru52[RTW89_RU_SEC_NUM]; +@@ -631,6 +653,13 @@ enum rtw89_sc_offset { + RTW89_SC_40_LOWER = 10, + }; + ++enum rtw89_wow_flags { ++ RTW89_WOW_FLAG_EN_MAGIC_PKT, ++ RTW89_WOW_FLAG_EN_REKEY_PKT, ++ RTW89_WOW_FLAG_EN_DISCONNECT, ++ RTW89_WOW_FLAG_NUM, ++}; ++ + struct rtw89_chan { + u8 channel; + u8 primary_channel; +@@ -2192,6 +2221,7 @@ struct rtw89_sta { + + struct rtw89_efuse { + bool valid; ++ bool power_k_valid; + u8 xtal_cap; + u8 addr[ETH_ALEN]; + u8 rfe_type; +@@ -2210,6 +2240,8 @@ struct rtw89_phy_rate_pattern { + struct rtw89_vif { + struct list_head list; + struct rtw89_dev *rtwdev; ++ enum rtw89_sub_entity_idx sub_entity_idx; ++ + u8 mac_id; + u8 port; + u8 mac_addr[ETH_ALEN]; +@@ -2232,6 +2264,8 @@ struct rtw89_vif { + bool wowlan_magic; + bool is_hesta; + bool last_a_ctrl; ++ bool dyn_tb_bedge_en; ++ u8 def_tri_idx; + struct work_struct update_beacon_work; + struct rtw89_addr_cam_entry addr_cam; + struct rtw89_bssid_cam_entry bssid_cam; +@@ -2280,6 +2314,16 @@ struct rtw89_hci_ops { + */ + void (*recovery_start)(struct rtw89_dev *rtwdev); + void (*recovery_complete)(struct rtw89_dev *rtwdev); ++ ++ void (*ctrl_txdma_ch)(struct rtw89_dev *rtwdev, bool enable); ++ void (*ctrl_txdma_fw_ch)(struct rtw89_dev *rtwdev, bool enable); ++ void (*ctrl_trxhci)(struct rtw89_dev *rtwdev, bool enable); ++ int (*poll_txdma_ch)(struct rtw89_dev *rtwdev); ++ void (*clr_idx_all)(struct rtw89_dev *rtwdev); ++ void (*clear)(struct rtw89_dev *rtwdev, struct pci_dev *pdev); ++ void (*disable_intr)(struct rtw89_dev *rtwdev); ++ void (*enable_intr)(struct rtw89_dev *rtwdev); ++ int (*rst_bdram)(struct rtw89_dev *rtwdev); + }; + + struct rtw89_hci_info { +@@ -2357,7 +2401,6 @@ struct rtw89_chip_ops { + void (*btc_set_wl_pri)(struct rtw89_dev *rtwdev, u8 map, bool state); + void (*btc_set_wl_txpwr_ctrl)(struct rtw89_dev *rtwdev, u32 txpwr_val); + s8 (*btc_get_bt_rssi)(struct rtw89_dev *rtwdev, s8 val); +- void (*btc_bt_aci_imp)(struct rtw89_dev *rtwdev); + void (*btc_update_bt_cnt)(struct rtw89_dev *rtwdev); + void (*btc_wl_s1_standby)(struct rtw89_dev *rtwdev, bool state); + void (*btc_set_policy)(struct rtw89_dev *rtwdev, u16 policy_type); +@@ -2384,6 +2427,7 @@ enum rtw89_dma_ch { + enum rtw89_qta_mode { + RTW89_QTA_SCC, + RTW89_QTA_DLFW, ++ RTW89_QTA_WOW, + + /* keep last */ + RTW89_QTA_INVALID, +@@ -2607,6 +2651,11 @@ struct rtw89_dig_regs { + struct rtw89_reg_def p1_s20_pagcugc_en; + }; + ++struct rtw89_phy_ul_tb_info { ++ bool dyn_tb_tri_en; ++ u8 def_if_bandedge; ++}; ++ + struct rtw89_chip_info { + enum rtw89_core_chip_id chip_id; + const struct rtw89_chip_ops *ops; +@@ -2618,10 +2667,13 @@ struct rtw89_chip_info { + u32 rsvd_ple_ofst; + const struct rtw89_hfc_param_ini *hfc_param_ini; + const struct rtw89_dle_mem *dle_mem; ++ u8 wde_qempty_acq_num; ++ u8 wde_qempty_mgq_sel; + u32 rf_base_addr[2]; + u8 support_chanctx_num; + u8 support_bands; + bool support_bw160; ++ bool support_ul_tb_ctrl; + bool hw_sec_hdr; + u8 rf_path_num; + u8 tx_nss; +@@ -2714,11 +2766,13 @@ struct rtw89_chip_info { + u32 c2h_ctrl_reg; + const u32 *c2h_regs; + const struct rtw89_page_regs *page_regs; ++ bool cfo_src_fd; + const struct rtw89_reg_def *dcfo_comp; + u8 dcfo_comp_sft; + const struct rtw89_imr_info *imr_info; + const struct rtw89_rrsr_cfgs *rrsr_cfgs; + u32 dma_ch_mask; ++ const struct wiphy_wowlan_support *wowlan_stub; + }; + + union rtw89_bus_info { +@@ -2760,6 +2814,28 @@ struct rtw89_mac_info { + u8 cpwm_seq_num; + }; + ++#define RTW89_COMPLETION_BUF_SIZE 24 ++#define RTW89_WAIT_COND_IDLE UINT_MAX ++ ++struct rtw89_completion_data { ++ bool err; ++ u8 buf[RTW89_COMPLETION_BUF_SIZE]; ++}; ++ ++struct rtw89_wait_info { ++ atomic_t cond; ++ struct completion completion; ++ struct rtw89_completion_data data; ++}; ++ ++#define RTW89_WAIT_FOR_COND_TIMEOUT msecs_to_jiffies(100) ++ ++static inline void rtw89_init_wait(struct rtw89_wait_info *wait) ++{ ++ init_completion(&wait->completion); ++ atomic_set(&wait->cond, RTW89_WAIT_COND_IDLE); ++} ++ + enum rtw89_fw_type { + RTW89_FW_NORMAL = 1, + RTW89_FW_WOWLAN = 3, +@@ -2879,6 +2955,13 @@ enum rtw89_entity_mode { + RTW89_ENTITY_MODE_SCC, + }; + ++struct rtw89_sub_entity { ++ struct cfg80211_chan_def chandef; ++ struct rtw89_chan chan; ++ struct rtw89_chan_rcd rcd; ++ struct rtw89_chanctx_cfg *cfg; ++}; ++ + struct rtw89_hal { + u32 rx_fltr; + u8 cv; +@@ -2892,13 +2975,10 @@ struct rtw89_hal { + bool support_igi; + + DECLARE_BITMAP(entity_map, NUM_OF_RTW89_SUB_ENTITY); +- struct cfg80211_chan_def chandef[NUM_OF_RTW89_SUB_ENTITY]; ++ struct rtw89_sub_entity sub[NUM_OF_RTW89_SUB_ENTITY]; + + bool entity_active; + enum rtw89_entity_mode entity_mode; +- +- struct rtw89_chan chan[NUM_OF_RTW89_SUB_ENTITY]; +- struct rtw89_chan_rcd chan_rcd[NUM_OF_RTW89_SUB_ENTITY]; + }; + + #define RTW89_MAX_MAC_ID_NUM 128 +@@ -2915,6 +2995,9 @@ enum rtw89_flags { + RTW89_FLAG_LOW_POWER_MODE, + RTW89_FLAG_INACTIVE_PS, + RTW89_FLAG_CRASH_SIMULATING, ++ RTW89_FLAG_WOWLAN, ++ RTW89_FLAG_FORBIDDEN_TRACK_WROK, ++ RTW89_FLAG_CHANGING_INTERFACE, + + NUM_OF_RTW89_FLAGS, + }; +@@ -2943,6 +3026,7 @@ struct rtw89_pkt_drop_params { + u8 port; + u8 mbssid; + bool tf_trs; ++ u32 macid_band_sel[4]; + }; + + struct rtw89_pkt_stat { +@@ -2976,7 +3060,7 @@ struct rtw89_dack_info { + #define RTW89_IQK_CHS_NR 2 + #define RTW89_IQK_PATH_NR 4 + +-struct rtw89_mcc_info { ++struct rtw89_rfk_mcc_info { + u8 ch[RTW89_IQK_CHS_NR]; + u8 band[RTW89_IQK_CHS_NR]; + u8 table_idx; +@@ -3044,6 +3128,7 @@ struct rtw89_dpk_bkup_para { + struct rtw89_dpk_info { + bool is_dpk_enable; + bool is_dpk_reload_en; ++ u8 dpk_gs[RTW89_PHY_MAX]; + u16 dc_i[RTW89_DPK_RF_PATH][RTW89_DPK_BKUP_NUM]; + u16 dc_q[RTW89_DPK_RF_PATH][RTW89_DPK_BKUP_NUM]; + u8 corr_val[RTW89_DPK_RF_PATH][RTW89_DPK_BKUP_NUM]; +@@ -3159,6 +3244,14 @@ struct rtw89_cfo_tracking_info { + u8 lock_cnt; + }; + ++enum rtw89_tssi_alimk_band { ++ TSSI_ALIMK_2G = 0, ++ TSSI_ALIMK_5GL, ++ TSSI_ALIMK_5GM, ++ TSSI_ALIMK_5GH, ++ TSSI_ALIMK_MAX ++}; ++ + /* 2GL, 2GH, 5GL1, 5GH1, 5GM1, 5GM2, 5GH1, 5GH2 */ + #define TSSI_TRIM_CH_GROUP_NUM 8 + #define TSSI_TRIM_CH_GROUP_NUM_6G 16 +@@ -3169,6 +3262,8 @@ struct rtw89_cfo_tracking_info { + #define TSSI_MCS_6G_CH_GROUP_NUM 32 + #define TSSI_MCS_CH_GROUP_NUM \ + (TSSI_MCS_2G_CH_GROUP_NUM + TSSI_MCS_5G_CH_GROUP_NUM) ++#define TSSI_MAX_CH_NUM 67 ++#define TSSI_ALIMK_VALUE_NUM 8 + + struct rtw89_tssi_info { + u8 thermal[RF_PATH_MAX]; +@@ -3181,6 +3276,11 @@ struct rtw89_tssi_info { + bool tssi_tracking_check[RF_PATH_MAX]; + u8 default_txagc_offset[RF_PATH_MAX]; + u32 base_thermal[RF_PATH_MAX]; ++ bool check_backup_aligmk[RF_PATH_MAX][TSSI_MAX_CH_NUM]; ++ u32 alignment_backup_by_ch[RF_PATH_MAX][TSSI_MAX_CH_NUM][TSSI_ALIMK_VALUE_NUM]; ++ u32 alignment_value[RF_PATH_MAX][TSSI_ALIMK_MAX][TSSI_ALIMK_VALUE_NUM]; ++ bool alignment_done[RF_PATH_MAX][TSSI_ALIMK_MAX]; ++ u32 tssi_alimk_time; + }; + + struct rtw89_power_trim_info { +@@ -3421,8 +3521,40 @@ struct rtw89_phy_bb_gain_info { + + struct rtw89_phy_efuse_gain { + bool offset_valid; ++ bool comp_valid; + s8 offset[RF_PATH_MAX][RTW89_GAIN_OFFSET_NR]; /* S(8, 0) */ + s8 offset_base[RTW89_PHY_MAX]; /* S(8, 4) */ ++ s8 rssi_base[RTW89_PHY_MAX]; /* S(8, 4) */ ++ s8 comp[RF_PATH_MAX][RTW89_SUBBAND_NR]; /* S(8, 0) */ ++}; ++ ++#define RTW89_MAX_PATTERN_NUM 18 ++#define RTW89_MAX_PATTERN_MASK_SIZE 4 ++#define RTW89_MAX_PATTERN_SIZE 128 ++ ++struct rtw89_wow_cam_info { ++ bool r_w; ++ u8 idx; ++ u32 mask[RTW89_MAX_PATTERN_MASK_SIZE]; ++ u16 crc; ++ bool negative_pattern_match; ++ bool skip_mac_hdr; ++ bool uc; ++ bool mc; ++ bool bc; ++ bool valid; ++}; ++ ++struct rtw89_wow_param { ++ struct ieee80211_vif *wow_vif; ++ DECLARE_BITMAP(flags, RTW89_WOW_FLAG_NUM); ++ struct rtw89_wow_cam_info patterns[RTW89_MAX_PATTERN_NUM]; ++ u8 pattern_cnt; ++ struct list_head pkt_list; ++}; ++ ++struct rtw89_mcc_info { ++ struct rtw89_wait_info wait; + }; + + struct rtw89_dev { +@@ -3435,6 +3567,7 @@ struct rtw89_dev { + const struct rtw89_chip_info *chip; + const struct rtw89_pci_info *pci_info; + struct rtw89_hal hal; ++ struct rtw89_mcc_info mcc; + struct rtw89_mac_info mac; + struct rtw89_fw_info fw; + struct rtw89_hci_info hci; +@@ -3478,7 +3611,7 @@ struct rtw89_dev { + struct rtw89_dack_info dack; + struct rtw89_iqk_info iqk; + struct rtw89_dpk_info dpk; +- struct rtw89_mcc_info mcc; ++ struct rtw89_rfk_mcc_info rfk_mcc; + struct rtw89_lck_info lck; + struct rtw89_rx_dck_info rx_dck; + bool is_tssi_mode[RF_PATH_MAX]; +@@ -3495,6 +3628,7 @@ struct rtw89_dev { + struct rtw89_phy_ch_info ch_info; + struct rtw89_phy_bb_gain_info bb_gain; + struct rtw89_phy_efuse_gain efuse_gain; ++ struct rtw89_phy_ul_tb_info ul_tb_info; + + struct delayed_work track_work; + struct delayed_work coex_act1_work; +@@ -3513,6 +3647,8 @@ struct rtw89_dev { + enum rtw89_ps_mode ps_mode; + bool lps_enabled; + ++ struct rtw89_wow_param wow; ++ + /* napi structure */ + struct net_device netdev; + struct napi_struct napi; +@@ -3595,6 +3731,66 @@ static inline void rtw89_hci_recovery_co + rtwdev->hci.ops->recovery_complete(rtwdev); + } + ++static inline void rtw89_hci_enable_intr(struct rtw89_dev *rtwdev) ++{ ++ if (rtwdev->hci.ops->enable_intr) ++ rtwdev->hci.ops->enable_intr(rtwdev); ++} ++ ++static inline void rtw89_hci_disable_intr(struct rtw89_dev *rtwdev) ++{ ++ if (rtwdev->hci.ops->disable_intr) ++ rtwdev->hci.ops->disable_intr(rtwdev); ++} ++ ++static inline void rtw89_hci_ctrl_txdma_ch(struct rtw89_dev *rtwdev, bool enable) ++{ ++ if (rtwdev->hci.ops->ctrl_txdma_ch) ++ rtwdev->hci.ops->ctrl_txdma_ch(rtwdev, enable); ++} ++ ++static inline void rtw89_hci_ctrl_txdma_fw_ch(struct rtw89_dev *rtwdev, bool enable) ++{ ++ if (rtwdev->hci.ops->ctrl_txdma_fw_ch) ++ rtwdev->hci.ops->ctrl_txdma_fw_ch(rtwdev, enable); ++} ++ ++static inline void rtw89_hci_ctrl_trxhci(struct rtw89_dev *rtwdev, bool enable) ++{ ++ if (rtwdev->hci.ops->ctrl_trxhci) ++ rtwdev->hci.ops->ctrl_trxhci(rtwdev, enable); ++} ++ ++static inline int rtw89_hci_poll_txdma_ch(struct rtw89_dev *rtwdev) ++{ ++ int ret = 0; ++ ++ if (rtwdev->hci.ops->poll_txdma_ch) ++ ret = rtwdev->hci.ops->poll_txdma_ch(rtwdev); ++ return ret; ++} ++ ++static inline void rtw89_hci_clr_idx_all(struct rtw89_dev *rtwdev) ++{ ++ if (rtwdev->hci.ops->clr_idx_all) ++ rtwdev->hci.ops->clr_idx_all(rtwdev); ++} ++ ++static inline int rtw89_hci_rst_bdram(struct rtw89_dev *rtwdev) ++{ ++ int ret = 0; ++ ++ if (rtwdev->hci.ops->rst_bdram) ++ ret = rtwdev->hci.ops->rst_bdram(rtwdev); ++ return ret; ++} ++ ++static inline void rtw89_hci_clear(struct rtw89_dev *rtwdev, struct pci_dev *pdev) ++{ ++ if (rtwdev->hci.ops->clear) ++ rtwdev->hci.ops->clear(rtwdev, pdev); ++} ++ + static inline u8 rtw89_read8(struct rtw89_dev *rtwdev, u32 addr) + { + return rtwdev->hci.ops->read8(rtwdev, addr); +@@ -3948,7 +4144,7 @@ const struct cfg80211_chan_def *rtw89_ch + { + struct rtw89_hal *hal = &rtwdev->hal; + +- return &hal->chandef[idx]; ++ return &hal->sub[idx].chandef; + } + + static inline +@@ -3957,7 +4153,7 @@ const struct rtw89_chan *rtw89_chan_get( + { + struct rtw89_hal *hal = &rtwdev->hal; + +- return &hal->chan[idx]; ++ return &hal->sub[idx].chan; + } + + static inline +@@ -3966,7 +4162,7 @@ const struct rtw89_chan_rcd *rtw89_chan_ + { + struct rtw89_hal *hal = &rtwdev->hal; + +- return &hal->chan_rcd[idx]; ++ return &hal->sub[idx].rcd; + } + + static inline void rtw89_chip_fem_setup(struct rtw89_dev *rtwdev) +@@ -4221,6 +4417,23 @@ static inline struct rtw89_fw_suit *rtw8 + return &fw_info->normal; + } + ++static inline struct sk_buff *rtw89_alloc_skb_for_rx(struct rtw89_dev *rtwdev, ++ unsigned int length) ++{ ++ struct sk_buff *skb; ++ ++ if (rtwdev->hw->conf.flags & IEEE80211_CONF_MONITOR) { ++ skb = dev_alloc_skb(length + RTW89_RADIOTAP_ROOM); ++ if (!skb) ++ return NULL; ++ ++ skb_reserve(skb, RTW89_RADIOTAP_ROOM); ++ return skb; ++ } ++ ++ return dev_alloc_skb(length); ++} ++ + int rtw89_core_tx_write(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif, + struct ieee80211_sta *sta, struct sk_buff *skb, int *qsel); + int rtw89_h2c_tx(struct rtw89_dev *rtwdev, +@@ -4289,6 +4502,9 @@ int rtw89_regd_init(struct rtw89_dev *rt + void rtw89_regd_notifier(struct wiphy *wiphy, struct regulatory_request *request); + void rtw89_traffic_stats_init(struct rtw89_dev *rtwdev, + struct rtw89_traffic_stats *stats); ++int rtw89_wait_for_cond(struct rtw89_wait_info *wait, unsigned int cond); ++void rtw89_complete_cond(struct rtw89_wait_info *wait, unsigned int cond, ++ const struct rtw89_completion_data *data); + int rtw89_core_start(struct rtw89_dev *rtwdev); + void rtw89_core_stop(struct rtw89_dev *rtwdev); + void rtw89_core_update_beacon_work(struct work_struct *work); +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw89/debug.c linux-6.2/drivers/net/wireless/realtek/rtw89/debug.c +--- linux-6.1/drivers/net/wireless/realtek/rtw89/debug.c 2022-12-12 00:15:18.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw89/debug.c 2022-12-24 00:49:25.778376835 +0200 +@@ -8,6 +8,7 @@ + #include "debug.h" + #include "fw.h" + #include "mac.h" ++#include "pci.h" + #include "ps.h" + #include "reg.h" + #include "sar.h" +@@ -51,6 +52,22 @@ struct rtw89_debugfs_priv { + }; + }; + ++static const u16 rtw89_rate_info_bw_to_mhz_map[] = { ++ [RATE_INFO_BW_20] = 20, ++ [RATE_INFO_BW_40] = 40, ++ [RATE_INFO_BW_80] = 80, ++ [RATE_INFO_BW_160] = 160, ++ [RATE_INFO_BW_320] = 320, ++}; ++ ++static u16 rtw89_rate_info_bw_to_mhz(enum rate_info_bw bw) ++{ ++ if (bw < ARRAY_SIZE(rtw89_rate_info_bw_to_mhz_map)) ++ return rtw89_rate_info_bw_to_mhz_map[bw]; ++ ++ return 0; ++} ++ + static int rtw89_debugfs_single_show(struct seq_file *m, void *v) + { + struct rtw89_debugfs_priv *debugfs_priv = m->private; +@@ -464,7 +481,7 @@ static const struct txpwr_map __txpwr_ma + }; + + static u8 __print_txpwr_ent(struct seq_file *m, const struct txpwr_ent *ent, +- const u8 *buf, const u8 cur) ++ const s8 *buf, const u8 cur) + { + char *fmt; + +@@ -493,8 +510,9 @@ static int __print_txpwr_map(struct seq_ + const struct txpwr_map *map) + { + u8 fct = rtwdev->chip->txpwr_factor_mac; +- u8 *buf, cur, i; + u32 val, addr; ++ s8 *buf, tmp; ++ u8 cur, i; + int ret; + + buf = vzalloc(map->addr_to - map->addr_from + 4); +@@ -507,8 +525,11 @@ static int __print_txpwr_map(struct seq_ + val = MASKDWORD; + + cur = addr - map->addr_from; +- for (i = 0; i < 4; i++, val >>= 8) +- buf[cur + i] = FIELD_GET(MASKBYTE0, val) >> fct; ++ for (i = 0; i < 4; i++, val >>= 8) { ++ /* signed 7 bits, and reserved BIT(7) */ ++ tmp = sign_extend32(val, 6); ++ buf[cur + i] = tmp >> fct; ++ } + } + + for (cur = 0, i = 0; i < map->size; i++) +@@ -770,13 +791,34 @@ rtw89_debug_priv_mac_mem_dump_get(struct + { + struct rtw89_debugfs_priv *debugfs_priv = m->private; + struct rtw89_dev *rtwdev = debugfs_priv->rtwdev; ++ bool grant_read = false; ++ ++ if (debugfs_priv->mac_mem.sel >= RTW89_MAC_MEM_NUM) ++ return -ENOENT; ++ ++ if (rtwdev->chip->chip_id == RTL8852C) { ++ switch (debugfs_priv->mac_mem.sel) { ++ case RTW89_MAC_MEM_TXD_FIFO_0_V1: ++ case RTW89_MAC_MEM_TXD_FIFO_1_V1: ++ case RTW89_MAC_MEM_TXDATA_FIFO_0: ++ case RTW89_MAC_MEM_TXDATA_FIFO_1: ++ grant_read = true; ++ break; ++ default: ++ break; ++ } ++ } + + mutex_lock(&rtwdev->mutex); + rtw89_leave_ps_mode(rtwdev); ++ if (grant_read) ++ rtw89_write32_set(rtwdev, R_AX_TCR1, B_AX_TCR_FORCE_READ_TXDFIFO); + rtw89_debug_dump_mac_mem(m, rtwdev, + debugfs_priv->mac_mem.sel, + debugfs_priv->mac_mem.start, + debugfs_priv->mac_mem.len); ++ if (grant_read) ++ rtw89_write32_clr(rtwdev, R_AX_TCR1, B_AX_TCR_FORCE_READ_TXDFIFO); + mutex_unlock(&rtwdev->mutex); + + return 0; +@@ -947,7 +989,9 @@ static int rtw89_debug_mac_dump_dle_dbg( + static int rtw89_debug_mac_dump_dmac_dbg(struct rtw89_dev *rtwdev, + struct seq_file *m) + { +- int ret; ++ const struct rtw89_chip_info *chip = rtwdev->chip; ++ u32 dmac_err; ++ int i, ret; + + ret = rtw89_mac_check_mac_en(rtwdev, 0, RTW89_DMAC_SEL); + if (ret) { +@@ -955,98 +999,347 @@ static int rtw89_debug_mac_dump_dmac_dbg + return ret; + } + +- seq_printf(m, "R_AX_DMAC_ERR_ISR=0x%08x\n", +- rtw89_read32(rtwdev, R_AX_DMAC_ERR_ISR)); +- seq_printf(m, "[0]R_AX_WDRLS_ERR_ISR=0x%08x\n", +- rtw89_read32(rtwdev, R_AX_WDRLS_ERR_ISR)); +- seq_printf(m, "[1]R_AX_SEC_ERR_IMR_ISR=0x%08x\n", +- rtw89_read32(rtwdev, R_AX_SEC_ERR_IMR_ISR)); +- seq_printf(m, "[2.1]R_AX_MPDU_TX_ERR_ISR=0x%08x\n", +- rtw89_read32(rtwdev, R_AX_MPDU_TX_ERR_ISR)); +- seq_printf(m, "[2.2]R_AX_MPDU_RX_ERR_ISR=0x%08x\n", +- rtw89_read32(rtwdev, R_AX_MPDU_RX_ERR_ISR)); +- seq_printf(m, "[3]R_AX_STA_SCHEDULER_ERR_ISR=0x%08x\n", +- rtw89_read32(rtwdev, R_AX_STA_SCHEDULER_ERR_ISR)); +- seq_printf(m, "[4]R_AX_WDE_ERR_ISR=0x%08x\n", +- rtw89_read32(rtwdev, R_AX_WDE_ERR_ISR)); +- seq_printf(m, "[5.1]R_AX_TXPKTCTL_ERR_IMR_ISR=0x%08x\n", +- rtw89_read32(rtwdev, R_AX_TXPKTCTL_ERR_IMR_ISR)); +- seq_printf(m, "[5.2]R_AX_TXPKTCTL_ERR_IMR_ISR_B1=0x%08x\n", +- rtw89_read32(rtwdev, R_AX_TXPKTCTL_ERR_IMR_ISR_B1)); +- seq_printf(m, "[6]R_AX_PLE_ERR_FLAG_ISR=0x%08x\n", +- rtw89_read32(rtwdev, R_AX_PLE_ERR_FLAG_ISR)); +- seq_printf(m, "[7]R_AX_PKTIN_ERR_ISR=0x%08x\n", +- rtw89_read32(rtwdev, R_AX_PKTIN_ERR_ISR)); +- seq_printf(m, "[8.1]R_AX_OTHER_DISPATCHER_ERR_ISR=0x%08x\n", +- rtw89_read32(rtwdev, R_AX_OTHER_DISPATCHER_ERR_ISR)); +- seq_printf(m, "[8.2]R_AX_HOST_DISPATCHER_ERR_ISR=0x%08x\n", +- rtw89_read32(rtwdev, R_AX_HOST_DISPATCHER_ERR_ISR)); +- seq_printf(m, "[8.3]R_AX_CPU_DISPATCHER_ERR_ISR=0x%08x\n", +- rtw89_read32(rtwdev, R_AX_CPU_DISPATCHER_ERR_ISR)); +- seq_printf(m, "[10]R_AX_CPUIO_ERR_ISR=0x%08x\n", +- rtw89_read32(rtwdev, R_AX_CPUIO_ERR_ISR)); +- seq_printf(m, "[11.1]R_AX_BBRPT_COM_ERR_IMR_ISR=0x%08x\n", +- rtw89_read32(rtwdev, R_AX_BBRPT_COM_ERR_IMR_ISR)); +- seq_printf(m, "[11.2]R_AX_BBRPT_CHINFO_ERR_IMR_ISR=0x%08x\n", +- rtw89_read32(rtwdev, R_AX_BBRPT_CHINFO_ERR_IMR_ISR)); +- seq_printf(m, "[11.3]R_AX_BBRPT_DFS_ERR_IMR_ISR=0x%08x\n", +- rtw89_read32(rtwdev, R_AX_BBRPT_DFS_ERR_IMR_ISR)); +- seq_printf(m, "[11.4]R_AX_LA_ERRFLAG=0x%08x\n", +- rtw89_read32(rtwdev, R_AX_LA_ERRFLAG)); ++ dmac_err = rtw89_read32(rtwdev, R_AX_DMAC_ERR_ISR); ++ seq_printf(m, "R_AX_DMAC_ERR_ISR=0x%08x\n", dmac_err); ++ seq_printf(m, "R_AX_DMAC_ERR_IMR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_DMAC_ERR_IMR)); ++ ++ if (dmac_err) { ++ seq_printf(m, "R_AX_WDE_ERR_FLAG_CFG=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_WDE_ERR_FLAG_CFG_NUM1)); ++ seq_printf(m, "R_AX_PLE_ERR_FLAG_CFG=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_PLE_ERR_FLAG_CFG_NUM1)); ++ if (chip->chip_id == RTL8852C) { ++ seq_printf(m, "R_AX_PLE_ERRFLAG_MSG=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_PLE_ERRFLAG_MSG)); ++ seq_printf(m, "R_AX_WDE_ERRFLAG_MSG=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_WDE_ERRFLAG_MSG)); ++ seq_printf(m, "R_AX_PLE_DBGERR_LOCKEN=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_PLE_DBGERR_LOCKEN)); ++ seq_printf(m, "R_AX_PLE_DBGERR_STS=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_PLE_DBGERR_STS)); ++ } ++ } ++ ++ if (dmac_err & B_AX_WDRLS_ERR_FLAG) { ++ seq_printf(m, "R_AX_WDRLS_ERR_IMR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_WDRLS_ERR_IMR)); ++ seq_printf(m, "R_AX_WDRLS_ERR_ISR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_WDRLS_ERR_ISR)); ++ if (chip->chip_id == RTL8852C) ++ seq_printf(m, "R_AX_RPQ_RXBD_IDX=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_RPQ_RXBD_IDX_V1)); ++ else ++ seq_printf(m, "R_AX_RPQ_RXBD_IDX=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_RPQ_RXBD_IDX)); ++ } ++ ++ if (dmac_err & B_AX_WSEC_ERR_FLAG) { ++ if (chip->chip_id == RTL8852C) { ++ seq_printf(m, "R_AX_SEC_ERR_IMR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_SEC_ERROR_FLAG_IMR)); ++ seq_printf(m, "R_AX_SEC_ERR_ISR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_SEC_ERROR_FLAG)); ++ seq_printf(m, "R_AX_SEC_ENG_CTRL=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_SEC_ENG_CTRL)); ++ seq_printf(m, "R_AX_SEC_MPDU_PROC=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_SEC_MPDU_PROC)); ++ seq_printf(m, "R_AX_SEC_CAM_ACCESS=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_SEC_CAM_ACCESS)); ++ seq_printf(m, "R_AX_SEC_CAM_RDATA=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_SEC_CAM_RDATA)); ++ seq_printf(m, "R_AX_SEC_DEBUG1=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_SEC_DEBUG1)); ++ seq_printf(m, "R_AX_SEC_TX_DEBUG=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_SEC_TX_DEBUG)); ++ seq_printf(m, "R_AX_SEC_RX_DEBUG=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_SEC_RX_DEBUG)); ++ ++ rtw89_write32_mask(rtwdev, R_AX_DBG_CTRL, ++ B_AX_DBG_SEL0, 0x8B); ++ rtw89_write32_mask(rtwdev, R_AX_DBG_CTRL, ++ B_AX_DBG_SEL1, 0x8B); ++ rtw89_write32_mask(rtwdev, R_AX_SYS_STATUS1, ++ B_AX_SEL_0XC0_MASK, 1); ++ for (i = 0; i < 0x10; i++) { ++ rtw89_write32_mask(rtwdev, R_AX_SEC_ENG_CTRL, ++ B_AX_SEC_DBG_PORT_FIELD_MASK, i); ++ seq_printf(m, "sel=%x,R_AX_SEC_DEBUG2=0x%08x\n", ++ i, rtw89_read32(rtwdev, R_AX_SEC_DEBUG2)); ++ } ++ } else { ++ seq_printf(m, "R_AX_SEC_ERR_IMR_ISR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_SEC_DEBUG)); ++ seq_printf(m, "R_AX_SEC_ENG_CTRL=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_SEC_ENG_CTRL)); ++ seq_printf(m, "R_AX_SEC_MPDU_PROC=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_SEC_MPDU_PROC)); ++ seq_printf(m, "R_AX_SEC_CAM_ACCESS=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_SEC_CAM_ACCESS)); ++ seq_printf(m, "R_AX_SEC_CAM_RDATA=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_SEC_CAM_RDATA)); ++ seq_printf(m, "R_AX_SEC_CAM_WDATA=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_SEC_CAM_WDATA)); ++ seq_printf(m, "R_AX_SEC_TX_DEBUG=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_SEC_TX_DEBUG)); ++ seq_printf(m, "R_AX_SEC_RX_DEBUG=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_SEC_RX_DEBUG)); ++ seq_printf(m, "R_AX_SEC_TRX_PKT_CNT=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_SEC_TRX_PKT_CNT)); ++ seq_printf(m, "R_AX_SEC_TRX_BLK_CNT=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_SEC_TRX_BLK_CNT)); ++ } ++ } ++ ++ if (dmac_err & B_AX_MPDU_ERR_FLAG) { ++ seq_printf(m, "R_AX_MPDU_TX_ERR_IMR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_MPDU_TX_ERR_IMR)); ++ seq_printf(m, "R_AX_MPDU_TX_ERR_ISR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_MPDU_TX_ERR_ISR)); ++ seq_printf(m, "R_AX_MPDU_RX_ERR_IMR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_MPDU_RX_ERR_IMR)); ++ seq_printf(m, "R_AX_MPDU_RX_ERR_ISR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_MPDU_RX_ERR_ISR)); ++ } ++ ++ if (dmac_err & B_AX_STA_SCHEDULER_ERR_FLAG) { ++ seq_printf(m, "R_AX_STA_SCHEDULER_ERR_IMR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_STA_SCHEDULER_ERR_IMR)); ++ seq_printf(m, "R_AX_STA_SCHEDULER_ERR_ISR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_STA_SCHEDULER_ERR_ISR)); ++ } ++ ++ if (dmac_err & B_AX_WDE_DLE_ERR_FLAG) { ++ seq_printf(m, "R_AX_WDE_ERR_IMR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_WDE_ERR_IMR)); ++ seq_printf(m, "R_AX_WDE_ERR_ISR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_WDE_ERR_ISR)); ++ seq_printf(m, "R_AX_PLE_ERR_IMR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_PLE_ERR_IMR)); ++ seq_printf(m, "R_AX_PLE_ERR_FLAG_ISR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_PLE_ERR_FLAG_ISR)); ++ } ++ ++ if (dmac_err & B_AX_TXPKTCTRL_ERR_FLAG) { ++ if (chip->chip_id == RTL8852C) { ++ seq_printf(m, "R_AX_TXPKTCTL_B0_ERRFLAG_IMR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_TXPKTCTL_B0_ERRFLAG_IMR)); ++ seq_printf(m, "R_AX_TXPKTCTL_B0_ERRFLAG_ISR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_TXPKTCTL_B0_ERRFLAG_ISR)); ++ seq_printf(m, "R_AX_TXPKTCTL_B1_ERRFLAG_IMR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_TXPKTCTL_B1_ERRFLAG_IMR)); ++ seq_printf(m, "R_AX_TXPKTCTL_B1_ERRFLAG_ISR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_TXPKTCTL_B1_ERRFLAG_ISR)); ++ } else { ++ seq_printf(m, "R_AX_TXPKTCTL_ERR_IMR_ISR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_TXPKTCTL_ERR_IMR_ISR)); ++ seq_printf(m, "R_AX_TXPKTCTL_ERR_IMR_ISR_B1=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_TXPKTCTL_ERR_IMR_ISR_B1)); ++ } ++ } ++ ++ if (dmac_err & B_AX_PLE_DLE_ERR_FLAG) { ++ seq_printf(m, "R_AX_WDE_ERR_IMR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_WDE_ERR_IMR)); ++ seq_printf(m, "R_AX_WDE_ERR_ISR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_WDE_ERR_ISR)); ++ seq_printf(m, "R_AX_PLE_ERR_IMR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_PLE_ERR_IMR)); ++ seq_printf(m, "R_AX_PLE_ERR_FLAG_ISR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_PLE_ERR_FLAG_ISR)); ++ seq_printf(m, "R_AX_WD_CPUQ_OP_0=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_WD_CPUQ_OP_0)); ++ seq_printf(m, "R_AX_WD_CPUQ_OP_1=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_WD_CPUQ_OP_1)); ++ seq_printf(m, "R_AX_WD_CPUQ_OP_2=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_WD_CPUQ_OP_2)); ++ seq_printf(m, "R_AX_WD_CPUQ_OP_STATUS=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_WD_CPUQ_OP_STATUS)); ++ seq_printf(m, "R_AX_PL_CPUQ_OP_0=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_PL_CPUQ_OP_0)); ++ seq_printf(m, "R_AX_PL_CPUQ_OP_1=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_PL_CPUQ_OP_1)); ++ seq_printf(m, "R_AX_PL_CPUQ_OP_2=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_PL_CPUQ_OP_2)); ++ seq_printf(m, "R_AX_PL_CPUQ_OP_STATUS=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_PL_CPUQ_OP_STATUS)); ++ if (chip->chip_id == RTL8852C) { ++ seq_printf(m, "R_AX_RX_CTRL0=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_RX_CTRL0)); ++ seq_printf(m, "R_AX_RX_CTRL1=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_RX_CTRL1)); ++ seq_printf(m, "R_AX_RX_CTRL2=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_RX_CTRL2)); ++ } else { ++ seq_printf(m, "R_AX_RXDMA_PKT_INFO_0=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_RXDMA_PKT_INFO_0)); ++ seq_printf(m, "R_AX_RXDMA_PKT_INFO_1=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_RXDMA_PKT_INFO_1)); ++ seq_printf(m, "R_AX_RXDMA_PKT_INFO_2=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_RXDMA_PKT_INFO_2)); ++ } ++ } ++ ++ if (dmac_err & B_AX_PKTIN_ERR_FLAG) { ++ seq_printf(m, "R_AX_PKTIN_ERR_IMR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_PKTIN_ERR_IMR)); ++ seq_printf(m, "R_AX_PKTIN_ERR_ISR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_PKTIN_ERR_ISR)); ++ } ++ ++ if (dmac_err & B_AX_DISPATCH_ERR_FLAG) { ++ seq_printf(m, "R_AX_HOST_DISPATCHER_ERR_IMR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_HOST_DISPATCHER_ERR_IMR)); ++ seq_printf(m, "R_AX_HOST_DISPATCHER_ERR_ISR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_HOST_DISPATCHER_ERR_ISR)); ++ seq_printf(m, "R_AX_CPU_DISPATCHER_ERR_IMR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_CPU_DISPATCHER_ERR_IMR)); ++ seq_printf(m, "R_AX_CPU_DISPATCHER_ERR_ISR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_CPU_DISPATCHER_ERR_ISR)); ++ seq_printf(m, "R_AX_OTHER_DISPATCHER_ERR_IMR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_OTHER_DISPATCHER_ERR_IMR)); ++ seq_printf(m, "R_AX_OTHER_DISPATCHER_ERR_ISR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_OTHER_DISPATCHER_ERR_ISR)); ++ } ++ ++ if (dmac_err & B_AX_BBRPT_ERR_FLAG) { ++ if (chip->chip_id == RTL8852C) { ++ seq_printf(m, "R_AX_BBRPT_COM_ERR_IMR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_BBRPT_COM_ERR_IMR)); ++ seq_printf(m, "R_AX_BBRPT_COM_ERR_ISR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_BBRPT_COM_ERR_ISR)); ++ seq_printf(m, "R_AX_BBRPT_CHINFO_ERR_ISR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_BBRPT_CHINFO_ERR_ISR)); ++ seq_printf(m, "R_AX_BBRPT_CHINFO_ERR_IMR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_BBRPT_CHINFO_ERR_IMR)); ++ seq_printf(m, "R_AX_BBRPT_DFS_ERR_IMR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_BBRPT_DFS_ERR_IMR)); ++ seq_printf(m, "R_AX_BBRPT_DFS_ERR_ISR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_BBRPT_DFS_ERR_ISR)); ++ } else { ++ seq_printf(m, "R_AX_BBRPT_COM_ERR_IMR_ISR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_BBRPT_COM_ERR_IMR_ISR)); ++ seq_printf(m, "R_AX_BBRPT_CHINFO_ERR_ISR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_BBRPT_CHINFO_ERR_ISR)); ++ seq_printf(m, "R_AX_BBRPT_CHINFO_ERR_IMR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_BBRPT_CHINFO_ERR_IMR)); ++ seq_printf(m, "R_AX_BBRPT_DFS_ERR_IMR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_BBRPT_DFS_ERR_IMR)); ++ seq_printf(m, "R_AX_BBRPT_DFS_ERR_ISR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_BBRPT_DFS_ERR_ISR)); ++ } ++ } ++ ++ if (dmac_err & B_AX_HAXIDMA_ERR_FLAG && chip->chip_id == RTL8852C) { ++ seq_printf(m, "R_AX_HAXIDMA_ERR_IMR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_HAXI_IDCT_MSK)); ++ seq_printf(m, "R_AX_HAXIDMA_ERR_ISR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_HAXI_IDCT)); ++ } + + return 0; + } + +-static int rtw89_debug_mac_dump_cmac_dbg(struct rtw89_dev *rtwdev, +- struct seq_file *m) ++static int rtw89_debug_mac_dump_cmac_err(struct rtw89_dev *rtwdev, ++ struct seq_file *m, ++ enum rtw89_mac_idx band) + { ++ const struct rtw89_chip_info *chip = rtwdev->chip; ++ u32 offset = 0; ++ u32 cmac_err; + int ret; + +- ret = rtw89_mac_check_mac_en(rtwdev, 0, RTW89_CMAC_SEL); ++ ret = rtw89_mac_check_mac_en(rtwdev, band, RTW89_CMAC_SEL); + if (ret) { +- seq_puts(m, "[CMAC] : CMAC 0 not enabled\n"); ++ if (band) ++ seq_puts(m, "[CMAC] : CMAC1 not enabled\n"); ++ else ++ seq_puts(m, "[CMAC] : CMAC0 not enabled\n"); + return ret; + } + +- seq_printf(m, "R_AX_CMAC_ERR_ISR=0x%08x\n", +- rtw89_read32(rtwdev, R_AX_CMAC_ERR_ISR)); +- seq_printf(m, "[0]R_AX_SCHEDULE_ERR_ISR=0x%08x\n", +- rtw89_read32(rtwdev, R_AX_SCHEDULE_ERR_ISR)); +- seq_printf(m, "[1]R_AX_PTCL_ISR0=0x%08x\n", +- rtw89_read32(rtwdev, R_AX_PTCL_ISR0)); +- seq_printf(m, "[3]R_AX_DLE_CTRL=0x%08x\n", +- rtw89_read32(rtwdev, R_AX_DLE_CTRL)); +- seq_printf(m, "[4]R_AX_PHYINFO_ERR_ISR=0x%08x\n", +- rtw89_read32(rtwdev, R_AX_PHYINFO_ERR_ISR)); +- seq_printf(m, "[5]R_AX_TXPWR_ISR=0x%08x\n", +- rtw89_read32(rtwdev, R_AX_TXPWR_ISR)); +- seq_printf(m, "[6]R_AX_RMAC_ERR_ISR=0x%08x\n", +- rtw89_read32(rtwdev, R_AX_RMAC_ERR_ISR)); +- seq_printf(m, "[7]R_AX_TMAC_ERR_IMR_ISR=0x%08x\n", +- rtw89_read32(rtwdev, R_AX_TMAC_ERR_IMR_ISR)); ++ if (band) ++ offset = RTW89_MAC_AX_BAND_REG_OFFSET; + +- ret = rtw89_mac_check_mac_en(rtwdev, 1, RTW89_CMAC_SEL); +- if (ret) { +- seq_puts(m, "[CMAC] : CMAC 1 not enabled\n"); +- return ret; ++ cmac_err = rtw89_read32(rtwdev, R_AX_CMAC_ERR_ISR + offset); ++ seq_printf(m, "R_AX_CMAC_ERR_ISR [%d]=0x%08x\n", band, ++ rtw89_read32(rtwdev, R_AX_CMAC_ERR_ISR + offset)); ++ seq_printf(m, "R_AX_CMAC_FUNC_EN [%d]=0x%08x\n", band, ++ rtw89_read32(rtwdev, R_AX_CMAC_FUNC_EN + offset)); ++ seq_printf(m, "R_AX_CK_EN [%d]=0x%08x\n", band, ++ rtw89_read32(rtwdev, R_AX_CK_EN + offset)); ++ ++ if (cmac_err & B_AX_SCHEDULE_TOP_ERR_IND) { ++ seq_printf(m, "R_AX_SCHEDULE_ERR_IMR [%d]=0x%08x\n", band, ++ rtw89_read32(rtwdev, R_AX_SCHEDULE_ERR_IMR + offset)); ++ seq_printf(m, "R_AX_SCHEDULE_ERR_ISR [%d]=0x%08x\n", band, ++ rtw89_read32(rtwdev, R_AX_SCHEDULE_ERR_ISR + offset)); ++ } ++ ++ if (cmac_err & B_AX_PTCL_TOP_ERR_IND) { ++ seq_printf(m, "R_AX_PTCL_IMR0 [%d]=0x%08x\n", band, ++ rtw89_read32(rtwdev, R_AX_PTCL_IMR0 + offset)); ++ seq_printf(m, "R_AX_PTCL_ISR0 [%d]=0x%08x\n", band, ++ rtw89_read32(rtwdev, R_AX_PTCL_ISR0 + offset)); ++ } ++ ++ if (cmac_err & B_AX_DMA_TOP_ERR_IND) { ++ if (chip->chip_id == RTL8852C) { ++ seq_printf(m, "R_AX_RX_ERR_FLAG [%d]=0x%08x\n", band, ++ rtw89_read32(rtwdev, R_AX_RX_ERR_FLAG + offset)); ++ seq_printf(m, "R_AX_RX_ERR_FLAG_IMR [%d]=0x%08x\n", band, ++ rtw89_read32(rtwdev, R_AX_RX_ERR_FLAG_IMR + offset)); ++ } else { ++ seq_printf(m, "R_AX_DLE_CTRL [%d]=0x%08x\n", band, ++ rtw89_read32(rtwdev, R_AX_DLE_CTRL + offset)); ++ } ++ } ++ ++ if (cmac_err & B_AX_DMA_TOP_ERR_IND || cmac_err & B_AX_WMAC_RX_ERR_IND) { ++ if (chip->chip_id == RTL8852C) { ++ seq_printf(m, "R_AX_PHYINFO_ERR_ISR [%d]=0x%08x\n", band, ++ rtw89_read32(rtwdev, R_AX_PHYINFO_ERR_ISR + offset)); ++ seq_printf(m, "R_AX_PHYINFO_ERR_IMR [%d]=0x%08x\n", band, ++ rtw89_read32(rtwdev, R_AX_PHYINFO_ERR_IMR + offset)); ++ } else { ++ seq_printf(m, "R_AX_PHYINFO_ERR_IMR [%d]=0x%08x\n", band, ++ rtw89_read32(rtwdev, R_AX_PHYINFO_ERR_IMR + offset)); ++ } + } + +- seq_printf(m, "R_AX_CMAC_ERR_ISR_C1=0x%08x\n", +- rtw89_read32(rtwdev, R_AX_CMAC_ERR_ISR_C1)); +- seq_printf(m, "[0]R_AX_SCHEDULE_ERR_ISR_C1=0x%08x\n", +- rtw89_read32(rtwdev, R_AX_SCHEDULE_ERR_ISR_C1)); +- seq_printf(m, "[1]R_AX_PTCL_ISR0_C1=0x%08x\n", +- rtw89_read32(rtwdev, R_AX_PTCL_ISR0_C1)); +- seq_printf(m, "[3]R_AX_DLE_CTRL_C1=0x%08x\n", +- rtw89_read32(rtwdev, R_AX_DLE_CTRL_C1)); +- seq_printf(m, "[4]R_AX_PHYINFO_ERR_ISR_C1=0x%02x\n", +- rtw89_read32(rtwdev, R_AX_PHYINFO_ERR_ISR_C1)); +- seq_printf(m, "[5]R_AX_TXPWR_ISR_C1=0x%08x\n", +- rtw89_read32(rtwdev, R_AX_TXPWR_ISR_C1)); +- seq_printf(m, "[6]R_AX_RMAC_ERR_ISR_C1=0x%08x\n", +- rtw89_read32(rtwdev, R_AX_RMAC_ERR_ISR_C1)); +- seq_printf(m, "[7]R_AX_TMAC_ERR_IMR_ISR_C1=0x%08x\n", +- rtw89_read32(rtwdev, R_AX_TMAC_ERR_IMR_ISR_C1)); ++ if (cmac_err & B_AX_TXPWR_CTRL_ERR_IND) { ++ seq_printf(m, "R_AX_TXPWR_IMR [%d]=0x%08x\n", band, ++ rtw89_read32(rtwdev, R_AX_TXPWR_IMR + offset)); ++ seq_printf(m, "R_AX_TXPWR_ISR [%d]=0x%08x\n", band, ++ rtw89_read32(rtwdev, R_AX_TXPWR_ISR + offset)); ++ } ++ ++ if (cmac_err & B_AX_WMAC_TX_ERR_IND) { ++ if (chip->chip_id == RTL8852C) { ++ seq_printf(m, "R_AX_TRXPTCL_ERROR_INDICA [%d]=0x%08x\n", band, ++ rtw89_read32(rtwdev, R_AX_TRXPTCL_ERROR_INDICA + offset)); ++ seq_printf(m, "R_AX_TRXPTCL_ERROR_INDICA_MASK [%d]=0x%08x\n", band, ++ rtw89_read32(rtwdev, R_AX_TRXPTCL_ERROR_INDICA_MASK + offset)); ++ } else { ++ seq_printf(m, "R_AX_TMAC_ERR_IMR_ISR [%d]=0x%08x\n", band, ++ rtw89_read32(rtwdev, R_AX_TMAC_ERR_IMR_ISR + offset)); ++ } ++ seq_printf(m, "R_AX_DBGSEL_TRXPTCL [%d]=0x%08x\n", band, ++ rtw89_read32(rtwdev, R_AX_DBGSEL_TRXPTCL + offset)); ++ } ++ ++ seq_printf(m, "R_AX_CMAC_ERR_IMR [%d]=0x%08x\n", band, ++ rtw89_read32(rtwdev, R_AX_CMAC_ERR_IMR + offset)); ++ ++ return 0; ++} ++ ++static int rtw89_debug_mac_dump_cmac_dbg(struct rtw89_dev *rtwdev, ++ struct seq_file *m) ++{ ++ rtw89_debug_mac_dump_cmac_err(rtwdev, m, RTW89_MAC_0); ++ if (rtwdev->dbcc_en) ++ rtw89_debug_mac_dump_cmac_err(rtwdev, m, RTW89_MAC_1); + + return 0; + } +@@ -1073,6 +1366,303 @@ static const struct rtw89_mac_dbg_port_i + .rd_msk = B_AX_PTCL_DBG_INFO_MASK + }; + ++static const struct rtw89_mac_dbg_port_info dbg_port_dspt_hdt_tx0_5 = { ++ .sel_addr = R_AX_DISPATCHER_DBG_PORT, ++ .sel_byte = 2, ++ .sel_msk = B_AX_DISPATCHER_DBG_SEL_MASK, ++ .srt = 0x0, ++ .end = 0xD, ++ .rd_addr = R_AX_DBG_PORT_SEL, ++ .rd_byte = 4, ++ .rd_msk = B_AX_DEBUG_ST_MASK ++}; ++ ++static const struct rtw89_mac_dbg_port_info dbg_port_dspt_hdt_tx6 = { ++ .sel_addr = R_AX_DISPATCHER_DBG_PORT, ++ .sel_byte = 2, ++ .sel_msk = B_AX_DISPATCHER_DBG_SEL_MASK, ++ .srt = 0x0, ++ .end = 0x5, ++ .rd_addr = R_AX_DBG_PORT_SEL, ++ .rd_byte = 4, ++ .rd_msk = B_AX_DEBUG_ST_MASK ++}; ++ ++static const struct rtw89_mac_dbg_port_info dbg_port_dspt_hdt_tx7 = { ++ .sel_addr = R_AX_DISPATCHER_DBG_PORT, ++ .sel_byte = 2, ++ .sel_msk = B_AX_DISPATCHER_DBG_SEL_MASK, ++ .srt = 0x0, ++ .end = 0x9, ++ .rd_addr = R_AX_DBG_PORT_SEL, ++ .rd_byte = 4, ++ .rd_msk = B_AX_DEBUG_ST_MASK ++}; ++ ++static const struct rtw89_mac_dbg_port_info dbg_port_dspt_hdt_tx8 = { ++ .sel_addr = R_AX_DISPATCHER_DBG_PORT, ++ .sel_byte = 2, ++ .sel_msk = B_AX_DISPATCHER_DBG_SEL_MASK, ++ .srt = 0x0, ++ .end = 0x3, ++ .rd_addr = R_AX_DBG_PORT_SEL, ++ .rd_byte = 4, ++ .rd_msk = B_AX_DEBUG_ST_MASK ++}; ++ ++static const struct rtw89_mac_dbg_port_info dbg_port_dspt_hdt_tx9_C = { ++ .sel_addr = R_AX_DISPATCHER_DBG_PORT, ++ .sel_byte = 2, ++ .sel_msk = B_AX_DISPATCHER_DBG_SEL_MASK, ++ .srt = 0x0, ++ .end = 0x1, ++ .rd_addr = R_AX_DBG_PORT_SEL, ++ .rd_byte = 4, ++ .rd_msk = B_AX_DEBUG_ST_MASK ++}; ++ ++static const struct rtw89_mac_dbg_port_info dbg_port_dspt_hdt_txD = { ++ .sel_addr = R_AX_DISPATCHER_DBG_PORT, ++ .sel_byte = 2, ++ .sel_msk = B_AX_DISPATCHER_DBG_SEL_MASK, ++ .srt = 0x0, ++ .end = 0x0, ++ .rd_addr = R_AX_DBG_PORT_SEL, ++ .rd_byte = 4, ++ .rd_msk = B_AX_DEBUG_ST_MASK ++}; ++ ++static const struct rtw89_mac_dbg_port_info dbg_port_dspt_cdt_tx0 = { ++ .sel_addr = R_AX_DISPATCHER_DBG_PORT, ++ .sel_byte = 2, ++ .sel_msk = B_AX_DISPATCHER_DBG_SEL_MASK, ++ .srt = 0x0, ++ .end = 0xB, ++ .rd_addr = R_AX_DBG_PORT_SEL, ++ .rd_byte = 4, ++ .rd_msk = B_AX_DEBUG_ST_MASK ++}; ++ ++static const struct rtw89_mac_dbg_port_info dbg_port_dspt_cdt_tx1 = { ++ .sel_addr = R_AX_DISPATCHER_DBG_PORT, ++ .sel_byte = 2, ++ .sel_msk = B_AX_DISPATCHER_DBG_SEL_MASK, ++ .srt = 0x0, ++ .end = 0x4, ++ .rd_addr = R_AX_DBG_PORT_SEL, ++ .rd_byte = 4, ++ .rd_msk = B_AX_DEBUG_ST_MASK ++}; ++ ++static const struct rtw89_mac_dbg_port_info dbg_port_dspt_cdt_tx3 = { ++ .sel_addr = R_AX_DISPATCHER_DBG_PORT, ++ .sel_byte = 2, ++ .sel_msk = B_AX_DISPATCHER_DBG_SEL_MASK, ++ .srt = 0x0, ++ .end = 0x8, ++ .rd_addr = R_AX_DBG_PORT_SEL, ++ .rd_byte = 4, ++ .rd_msk = B_AX_DEBUG_ST_MASK ++}; ++ ++static const struct rtw89_mac_dbg_port_info dbg_port_dspt_cdt_tx4 = { ++ .sel_addr = R_AX_DISPATCHER_DBG_PORT, ++ .sel_byte = 2, ++ .sel_msk = B_AX_DISPATCHER_DBG_SEL_MASK, ++ .srt = 0x0, ++ .end = 0x7, ++ .rd_addr = R_AX_DBG_PORT_SEL, ++ .rd_byte = 4, ++ .rd_msk = B_AX_DEBUG_ST_MASK ++}; ++ ++static const struct rtw89_mac_dbg_port_info dbg_port_dspt_cdt_tx5_8 = { ++ .sel_addr = R_AX_DISPATCHER_DBG_PORT, ++ .sel_byte = 2, ++ .sel_msk = B_AX_DISPATCHER_DBG_SEL_MASK, ++ .srt = 0x0, ++ .end = 0x1, ++ .rd_addr = R_AX_DBG_PORT_SEL, ++ .rd_byte = 4, ++ .rd_msk = B_AX_DEBUG_ST_MASK ++}; ++ ++static const struct rtw89_mac_dbg_port_info dbg_port_dspt_cdt_tx9 = { ++ .sel_addr = R_AX_DISPATCHER_DBG_PORT, ++ .sel_byte = 2, ++ .sel_msk = B_AX_DISPATCHER_DBG_SEL_MASK, ++ .srt = 0x0, ++ .end = 0x3, ++ .rd_addr = R_AX_DBG_PORT_SEL, ++ .rd_byte = 4, ++ .rd_msk = B_AX_DEBUG_ST_MASK ++}; ++ ++static const struct rtw89_mac_dbg_port_info dbg_port_dspt_cdt_txA_C = { ++ .sel_addr = R_AX_DISPATCHER_DBG_PORT, ++ .sel_byte = 2, ++ .sel_msk = B_AX_DISPATCHER_DBG_SEL_MASK, ++ .srt = 0x0, ++ .end = 0x0, ++ .rd_addr = R_AX_DBG_PORT_SEL, ++ .rd_byte = 4, ++ .rd_msk = B_AX_DEBUG_ST_MASK ++}; ++ ++static const struct rtw89_mac_dbg_port_info dbg_port_dspt_hdt_rx0 = { ++ .sel_addr = R_AX_DISPATCHER_DBG_PORT, ++ .sel_byte = 2, ++ .sel_msk = B_AX_DISPATCHER_DBG_SEL_MASK, ++ .srt = 0x0, ++ .end = 0x8, ++ .rd_addr = R_AX_DBG_PORT_SEL, ++ .rd_byte = 4, ++ .rd_msk = B_AX_DEBUG_ST_MASK ++}; ++ ++static const struct rtw89_mac_dbg_port_info dbg_port_dspt_hdt_rx1_2 = { ++ .sel_addr = R_AX_DISPATCHER_DBG_PORT, ++ .sel_byte = 2, ++ .sel_msk = B_AX_DISPATCHER_DBG_SEL_MASK, ++ .srt = 0x0, ++ .end = 0x0, ++ .rd_addr = R_AX_DBG_PORT_SEL, ++ .rd_byte = 4, ++ .rd_msk = B_AX_DEBUG_ST_MASK ++}; ++ ++static const struct rtw89_mac_dbg_port_info dbg_port_dspt_hdt_rx3 = { ++ .sel_addr = R_AX_DISPATCHER_DBG_PORT, ++ .sel_byte = 2, ++ .sel_msk = B_AX_DISPATCHER_DBG_SEL_MASK, ++ .srt = 0x0, ++ .end = 0x6, ++ .rd_addr = R_AX_DBG_PORT_SEL, ++ .rd_byte = 4, ++ .rd_msk = B_AX_DEBUG_ST_MASK ++}; ++ ++static const struct rtw89_mac_dbg_port_info dbg_port_dspt_hdt_rx4 = { ++ .sel_addr = R_AX_DISPATCHER_DBG_PORT, ++ .sel_byte = 2, ++ .sel_msk = B_AX_DISPATCHER_DBG_SEL_MASK, ++ .srt = 0x0, ++ .end = 0x0, ++ .rd_addr = R_AX_DBG_PORT_SEL, ++ .rd_byte = 4, ++ .rd_msk = B_AX_DEBUG_ST_MASK ++}; ++ ++static const struct rtw89_mac_dbg_port_info dbg_port_dspt_hdt_rx5 = { ++ .sel_addr = R_AX_DISPATCHER_DBG_PORT, ++ .sel_byte = 2, ++ .sel_msk = B_AX_DISPATCHER_DBG_SEL_MASK, ++ .srt = 0x0, ++ .end = 0x0, ++ .rd_addr = R_AX_DBG_PORT_SEL, ++ .rd_byte = 4, ++ .rd_msk = B_AX_DEBUG_ST_MASK ++}; ++ ++static const struct rtw89_mac_dbg_port_info dbg_port_dspt_cdt_rx_p0_0 = { ++ .sel_addr = R_AX_DISPATCHER_DBG_PORT, ++ .sel_byte = 1, ++ .sel_msk = B_AX_DISPATCHER_CH_SEL_MASK, ++ .srt = 0x0, ++ .end = 0x3, ++ .rd_addr = R_AX_DBG_PORT_SEL, ++ .rd_byte = 4, ++ .rd_msk = B_AX_DEBUG_ST_MASK ++}; ++ ++static const struct rtw89_mac_dbg_port_info dbg_port_dspt_cdt_rx_p0_1 = { ++ .sel_addr = R_AX_DISPATCHER_DBG_PORT, ++ .sel_byte = 1, ++ .sel_msk = B_AX_DISPATCHER_CH_SEL_MASK, ++ .srt = 0x0, ++ .end = 0x6, ++ .rd_addr = R_AX_DBG_PORT_SEL, ++ .rd_byte = 4, ++ .rd_msk = B_AX_DEBUG_ST_MASK ++}; ++ ++static const struct rtw89_mac_dbg_port_info dbg_port_dspt_cdt_rx_p0_2 = { ++ .sel_addr = R_AX_DISPATCHER_DBG_PORT, ++ .sel_byte = 1, ++ .sel_msk = B_AX_DISPATCHER_CH_SEL_MASK, ++ .srt = 0x0, ++ .end = 0x0, ++ .rd_addr = R_AX_DBG_PORT_SEL, ++ .rd_byte = 4, ++ .rd_msk = B_AX_DEBUG_ST_MASK ++}; ++ ++static const struct rtw89_mac_dbg_port_info dbg_port_dspt_cdt_rx_p1 = { ++ .sel_addr = R_AX_DISPATCHER_DBG_PORT, ++ .sel_byte = 1, ++ .sel_msk = B_AX_DISPATCHER_CH_SEL_MASK, ++ .srt = 0x8, ++ .end = 0xE, ++ .rd_addr = R_AX_DBG_PORT_SEL, ++ .rd_byte = 4, ++ .rd_msk = B_AX_DEBUG_ST_MASK ++}; ++ ++static const struct rtw89_mac_dbg_port_info dbg_port_dspt_stf_ctrl = { ++ .sel_addr = R_AX_DISPATCHER_DBG_PORT, ++ .sel_byte = 1, ++ .sel_msk = B_AX_DISPATCHER_CH_SEL_MASK, ++ .srt = 0x0, ++ .end = 0x5, ++ .rd_addr = R_AX_DBG_PORT_SEL, ++ .rd_byte = 4, ++ .rd_msk = B_AX_DEBUG_ST_MASK ++}; ++ ++static const struct rtw89_mac_dbg_port_info dbg_port_dspt_addr_ctrl = { ++ .sel_addr = R_AX_DISPATCHER_DBG_PORT, ++ .sel_byte = 1, ++ .sel_msk = B_AX_DISPATCHER_CH_SEL_MASK, ++ .srt = 0x0, ++ .end = 0x6, ++ .rd_addr = R_AX_DBG_PORT_SEL, ++ .rd_byte = 4, ++ .rd_msk = B_AX_DEBUG_ST_MASK ++}; ++ ++static const struct rtw89_mac_dbg_port_info dbg_port_dspt_wde_intf = { ++ .sel_addr = R_AX_DISPATCHER_DBG_PORT, ++ .sel_byte = 1, ++ .sel_msk = B_AX_DISPATCHER_CH_SEL_MASK, ++ .srt = 0x0, ++ .end = 0xF, ++ .rd_addr = R_AX_DBG_PORT_SEL, ++ .rd_byte = 4, ++ .rd_msk = B_AX_DEBUG_ST_MASK ++}; ++ ++static const struct rtw89_mac_dbg_port_info dbg_port_dspt_ple_intf = { ++ .sel_addr = R_AX_DISPATCHER_DBG_PORT, ++ .sel_byte = 1, ++ .sel_msk = B_AX_DISPATCHER_CH_SEL_MASK, ++ .srt = 0x0, ++ .end = 0x9, ++ .rd_addr = R_AX_DBG_PORT_SEL, ++ .rd_byte = 4, ++ .rd_msk = B_AX_DEBUG_ST_MASK ++}; ++ ++static const struct rtw89_mac_dbg_port_info dbg_port_dspt_flow_ctrl = { ++ .sel_addr = R_AX_DISPATCHER_DBG_PORT, ++ .sel_byte = 1, ++ .sel_msk = B_AX_DISPATCHER_CH_SEL_MASK, ++ .srt = 0x0, ++ .end = 0x3, ++ .rd_addr = R_AX_DBG_PORT_SEL, ++ .rd_byte = 4, ++ .rd_msk = B_AX_DEBUG_ST_MASK ++}; ++ + static const struct rtw89_mac_dbg_port_info dbg_port_sch_c0 = { + .sel_addr = R_AX_SCH_DBG_SEL, + .sel_byte = 1, +@@ -1483,7 +2073,7 @@ static const struct rtw89_mac_dbg_port_i + static const struct rtw89_mac_dbg_port_info dbg_port_pcie_txdma = { + .sel_addr = R_AX_PCIE_DBG_CTRL, + .sel_byte = 2, +- .sel_msk = B_AX_DBG_SEL_MASK, ++ .sel_msk = B_AX_PCIE_DBG_SEL_MASK, + .srt = 0x00, + .end = 0x03, + .rd_addr = R_AX_DBG_PORT_SEL, +@@ -1494,7 +2084,7 @@ static const struct rtw89_mac_dbg_port_i + static const struct rtw89_mac_dbg_port_info dbg_port_pcie_rxdma = { + .sel_addr = R_AX_PCIE_DBG_CTRL, + .sel_byte = 2, +- .sel_msk = B_AX_DBG_SEL_MASK, ++ .sel_msk = B_AX_PCIE_DBG_SEL_MASK, + .srt = 0x00, + .end = 0x04, + .rd_addr = R_AX_DBG_PORT_SEL, +@@ -1505,7 +2095,7 @@ static const struct rtw89_mac_dbg_port_i + static const struct rtw89_mac_dbg_port_info dbg_port_pcie_cvt = { + .sel_addr = R_AX_PCIE_DBG_CTRL, + .sel_byte = 2, +- .sel_msk = B_AX_DBG_SEL_MASK, ++ .sel_msk = B_AX_PCIE_DBG_SEL_MASK, + .srt = 0x00, + .end = 0x01, + .rd_addr = R_AX_DBG_PORT_SEL, +@@ -1516,7 +2106,7 @@ static const struct rtw89_mac_dbg_port_i + static const struct rtw89_mac_dbg_port_info dbg_port_pcie_cxpl = { + .sel_addr = R_AX_PCIE_DBG_CTRL, + .sel_byte = 2, +- .sel_msk = B_AX_DBG_SEL_MASK, ++ .sel_msk = B_AX_PCIE_DBG_SEL_MASK, + .srt = 0x00, + .end = 0x05, + .rd_addr = R_AX_DBG_PORT_SEL, +@@ -1527,7 +2117,7 @@ static const struct rtw89_mac_dbg_port_i + static const struct rtw89_mac_dbg_port_info dbg_port_pcie_io = { + .sel_addr = R_AX_PCIE_DBG_CTRL, + .sel_byte = 2, +- .sel_msk = B_AX_DBG_SEL_MASK, ++ .sel_msk = B_AX_PCIE_DBG_SEL_MASK, + .srt = 0x00, + .end = 0x05, + .rd_addr = R_AX_DBG_PORT_SEL, +@@ -1538,7 +2128,7 @@ static const struct rtw89_mac_dbg_port_i + static const struct rtw89_mac_dbg_port_info dbg_port_pcie_misc = { + .sel_addr = R_AX_PCIE_DBG_CTRL, + .sel_byte = 2, +- .sel_msk = B_AX_DBG_SEL_MASK, ++ .sel_msk = B_AX_PCIE_DBG_SEL_MASK, + .srt = 0x00, + .end = 0x06, + .rd_addr = R_AX_DBG_PORT_SEL, +@@ -1562,6 +2152,7 @@ rtw89_debug_mac_dbg_port_sel(struct seq_ + struct rtw89_dev *rtwdev, u32 sel) + { + const struct rtw89_mac_dbg_port_info *info; ++ u32 index; + u32 val32; + u16 val16; + u8 val8; +@@ -1837,6 +2428,235 @@ rtw89_debug_mac_dbg_port_sel(struct seq_ + info = &dbg_port_pktinfo; + seq_puts(m, "Enable pktinfo dump.\n"); + break; ++ case RTW89_DBG_PORT_SEL_DSPT_HDT_TX0: ++ rtw89_write32_mask(rtwdev, R_AX_DBG_CTRL, ++ B_AX_DBG_SEL0, 0x80); ++ rtw89_write32_mask(rtwdev, R_AX_SYS_STATUS1, ++ B_AX_SEL_0XC0_MASK, 1); ++ fallthrough; ++ case RTW89_DBG_PORT_SEL_DSPT_HDT_TX1: ++ case RTW89_DBG_PORT_SEL_DSPT_HDT_TX2: ++ case RTW89_DBG_PORT_SEL_DSPT_HDT_TX3: ++ case RTW89_DBG_PORT_SEL_DSPT_HDT_TX4: ++ case RTW89_DBG_PORT_SEL_DSPT_HDT_TX5: ++ info = &dbg_port_dspt_hdt_tx0_5; ++ index = sel - RTW89_DBG_PORT_SEL_DSPT_HDT_TX0; ++ rtw89_write16_mask(rtwdev, info->sel_addr, ++ B_AX_DISPATCHER_INTN_SEL_MASK, 0); ++ rtw89_write16_mask(rtwdev, info->sel_addr, ++ B_AX_DISPATCHER_CH_SEL_MASK, index); ++ seq_printf(m, "Enable Dispatcher hdt tx%x dump.\n", index); ++ break; ++ case RTW89_DBG_PORT_SEL_DSPT_HDT_TX6: ++ info = &dbg_port_dspt_hdt_tx6; ++ rtw89_write16_mask(rtwdev, info->sel_addr, ++ B_AX_DISPATCHER_INTN_SEL_MASK, 0); ++ rtw89_write16_mask(rtwdev, info->sel_addr, ++ B_AX_DISPATCHER_CH_SEL_MASK, 6); ++ seq_puts(m, "Enable Dispatcher hdt tx6 dump.\n"); ++ break; ++ case RTW89_DBG_PORT_SEL_DSPT_HDT_TX7: ++ info = &dbg_port_dspt_hdt_tx7; ++ rtw89_write16_mask(rtwdev, info->sel_addr, ++ B_AX_DISPATCHER_INTN_SEL_MASK, 0); ++ rtw89_write16_mask(rtwdev, info->sel_addr, ++ B_AX_DISPATCHER_CH_SEL_MASK, 7); ++ seq_puts(m, "Enable Dispatcher hdt tx7 dump.\n"); ++ break; ++ case RTW89_DBG_PORT_SEL_DSPT_HDT_TX8: ++ info = &dbg_port_dspt_hdt_tx8; ++ rtw89_write16_mask(rtwdev, info->sel_addr, ++ B_AX_DISPATCHER_INTN_SEL_MASK, 0); ++ rtw89_write16_mask(rtwdev, info->sel_addr, ++ B_AX_DISPATCHER_CH_SEL_MASK, 8); ++ seq_puts(m, "Enable Dispatcher hdt tx8 dump.\n"); ++ break; ++ case RTW89_DBG_PORT_SEL_DSPT_HDT_TX9: ++ case RTW89_DBG_PORT_SEL_DSPT_HDT_TXA: ++ case RTW89_DBG_PORT_SEL_DSPT_HDT_TXB: ++ case RTW89_DBG_PORT_SEL_DSPT_HDT_TXC: ++ info = &dbg_port_dspt_hdt_tx9_C; ++ index = sel + 9 - RTW89_DBG_PORT_SEL_DSPT_HDT_TX9; ++ rtw89_write16_mask(rtwdev, info->sel_addr, ++ B_AX_DISPATCHER_INTN_SEL_MASK, 0); ++ rtw89_write16_mask(rtwdev, info->sel_addr, ++ B_AX_DISPATCHER_CH_SEL_MASK, index); ++ seq_printf(m, "Enable Dispatcher hdt tx%x dump.\n", index); ++ break; ++ case RTW89_DBG_PORT_SEL_DSPT_HDT_TXD: ++ info = &dbg_port_dspt_hdt_txD; ++ rtw89_write16_mask(rtwdev, info->sel_addr, ++ B_AX_DISPATCHER_INTN_SEL_MASK, 0); ++ rtw89_write16_mask(rtwdev, info->sel_addr, ++ B_AX_DISPATCHER_CH_SEL_MASK, 0xD); ++ seq_puts(m, "Enable Dispatcher hdt txD dump.\n"); ++ break; ++ case RTW89_DBG_PORT_SEL_DSPT_CDT_TX0: ++ info = &dbg_port_dspt_cdt_tx0; ++ rtw89_write16_mask(rtwdev, info->sel_addr, ++ B_AX_DISPATCHER_INTN_SEL_MASK, 1); ++ rtw89_write16_mask(rtwdev, info->sel_addr, ++ B_AX_DISPATCHER_CH_SEL_MASK, 0); ++ seq_puts(m, "Enable Dispatcher cdt tx0 dump.\n"); ++ break; ++ case RTW89_DBG_PORT_SEL_DSPT_CDT_TX1: ++ info = &dbg_port_dspt_cdt_tx1; ++ rtw89_write16_mask(rtwdev, info->sel_addr, ++ B_AX_DISPATCHER_INTN_SEL_MASK, 1); ++ rtw89_write16_mask(rtwdev, info->sel_addr, ++ B_AX_DISPATCHER_CH_SEL_MASK, 1); ++ seq_puts(m, "Enable Dispatcher cdt tx1 dump.\n"); ++ break; ++ case RTW89_DBG_PORT_SEL_DSPT_CDT_TX3: ++ info = &dbg_port_dspt_cdt_tx3; ++ rtw89_write16_mask(rtwdev, info->sel_addr, ++ B_AX_DISPATCHER_INTN_SEL_MASK, 1); ++ rtw89_write16_mask(rtwdev, info->sel_addr, ++ B_AX_DISPATCHER_CH_SEL_MASK, 3); ++ seq_puts(m, "Enable Dispatcher cdt tx3 dump.\n"); ++ break; ++ case RTW89_DBG_PORT_SEL_DSPT_CDT_TX4: ++ info = &dbg_port_dspt_cdt_tx4; ++ rtw89_write16_mask(rtwdev, info->sel_addr, ++ B_AX_DISPATCHER_INTN_SEL_MASK, 1); ++ rtw89_write16_mask(rtwdev, info->sel_addr, ++ B_AX_DISPATCHER_CH_SEL_MASK, 4); ++ seq_puts(m, "Enable Dispatcher cdt tx4 dump.\n"); ++ break; ++ case RTW89_DBG_PORT_SEL_DSPT_CDT_TX5: ++ case RTW89_DBG_PORT_SEL_DSPT_CDT_TX6: ++ case RTW89_DBG_PORT_SEL_DSPT_CDT_TX7: ++ case RTW89_DBG_PORT_SEL_DSPT_CDT_TX8: ++ info = &dbg_port_dspt_cdt_tx5_8; ++ index = sel + 5 - RTW89_DBG_PORT_SEL_DSPT_CDT_TX5; ++ rtw89_write16_mask(rtwdev, info->sel_addr, ++ B_AX_DISPATCHER_INTN_SEL_MASK, 1); ++ rtw89_write16_mask(rtwdev, info->sel_addr, ++ B_AX_DISPATCHER_CH_SEL_MASK, index); ++ seq_printf(m, "Enable Dispatcher cdt tx%x dump.\n", index); ++ break; ++ case RTW89_DBG_PORT_SEL_DSPT_CDT_TX9: ++ info = &dbg_port_dspt_cdt_tx9; ++ rtw89_write16_mask(rtwdev, info->sel_addr, ++ B_AX_DISPATCHER_INTN_SEL_MASK, 1); ++ rtw89_write16_mask(rtwdev, info->sel_addr, ++ B_AX_DISPATCHER_CH_SEL_MASK, 9); ++ seq_puts(m, "Enable Dispatcher cdt tx9 dump.\n"); ++ break; ++ case RTW89_DBG_PORT_SEL_DSPT_CDT_TXA: ++ case RTW89_DBG_PORT_SEL_DSPT_CDT_TXB: ++ case RTW89_DBG_PORT_SEL_DSPT_CDT_TXC: ++ info = &dbg_port_dspt_cdt_txA_C; ++ index = sel + 0xA - RTW89_DBG_PORT_SEL_DSPT_CDT_TXA; ++ rtw89_write16_mask(rtwdev, info->sel_addr, ++ B_AX_DISPATCHER_INTN_SEL_MASK, 1); ++ rtw89_write16_mask(rtwdev, info->sel_addr, ++ B_AX_DISPATCHER_CH_SEL_MASK, index); ++ seq_printf(m, "Enable Dispatcher cdt tx%x dump.\n", index); ++ break; ++ case RTW89_DBG_PORT_SEL_DSPT_HDT_RX0: ++ info = &dbg_port_dspt_hdt_rx0; ++ rtw89_write16_mask(rtwdev, info->sel_addr, ++ B_AX_DISPATCHER_INTN_SEL_MASK, 2); ++ rtw89_write16_mask(rtwdev, info->sel_addr, ++ B_AX_DISPATCHER_CH_SEL_MASK, 0); ++ seq_puts(m, "Enable Dispatcher hdt rx0 dump.\n"); ++ break; ++ case RTW89_DBG_PORT_SEL_DSPT_HDT_RX1: ++ case RTW89_DBG_PORT_SEL_DSPT_HDT_RX2: ++ info = &dbg_port_dspt_hdt_rx1_2; ++ index = sel + 1 - RTW89_DBG_PORT_SEL_DSPT_HDT_RX1; ++ rtw89_write16_mask(rtwdev, info->sel_addr, ++ B_AX_DISPATCHER_INTN_SEL_MASK, 2); ++ rtw89_write16_mask(rtwdev, info->sel_addr, ++ B_AX_DISPATCHER_CH_SEL_MASK, index); ++ seq_printf(m, "Enable Dispatcher hdt rx%x dump.\n", index); ++ break; ++ case RTW89_DBG_PORT_SEL_DSPT_HDT_RX3: ++ info = &dbg_port_dspt_hdt_rx3; ++ rtw89_write16_mask(rtwdev, info->sel_addr, ++ B_AX_DISPATCHER_INTN_SEL_MASK, 2); ++ rtw89_write16_mask(rtwdev, info->sel_addr, ++ B_AX_DISPATCHER_CH_SEL_MASK, 3); ++ seq_puts(m, "Enable Dispatcher hdt rx3 dump.\n"); ++ break; ++ case RTW89_DBG_PORT_SEL_DSPT_HDT_RX4: ++ info = &dbg_port_dspt_hdt_rx4; ++ rtw89_write16_mask(rtwdev, info->sel_addr, ++ B_AX_DISPATCHER_INTN_SEL_MASK, 2); ++ rtw89_write16_mask(rtwdev, info->sel_addr, ++ B_AX_DISPATCHER_CH_SEL_MASK, 4); ++ seq_puts(m, "Enable Dispatcher hdt rx4 dump.\n"); ++ break; ++ case RTW89_DBG_PORT_SEL_DSPT_HDT_RX5: ++ info = &dbg_port_dspt_hdt_rx5; ++ rtw89_write16_mask(rtwdev, info->sel_addr, ++ B_AX_DISPATCHER_INTN_SEL_MASK, 2); ++ rtw89_write16_mask(rtwdev, info->sel_addr, ++ B_AX_DISPATCHER_CH_SEL_MASK, 5); ++ seq_puts(m, "Enable Dispatcher hdt rx5 dump.\n"); ++ break; ++ case RTW89_DBG_PORT_SEL_DSPT_CDT_RX_P0_0: ++ info = &dbg_port_dspt_cdt_rx_p0_0; ++ rtw89_write16_mask(rtwdev, info->sel_addr, ++ B_AX_DISPATCHER_INTN_SEL_MASK, 3); ++ rtw89_write16_mask(rtwdev, info->sel_addr, ++ B_AX_DISPATCHER_CH_SEL_MASK, 0); ++ seq_puts(m, "Enable Dispatcher cdt rx part0 0 dump.\n"); ++ break; ++ case RTW89_DBG_PORT_SEL_DSPT_CDT_RX_P0: ++ case RTW89_DBG_PORT_SEL_DSPT_CDT_RX_P0_1: ++ info = &dbg_port_dspt_cdt_rx_p0_1; ++ rtw89_write16_mask(rtwdev, info->sel_addr, ++ B_AX_DISPATCHER_INTN_SEL_MASK, 3); ++ rtw89_write16_mask(rtwdev, info->sel_addr, ++ B_AX_DISPATCHER_CH_SEL_MASK, 1); ++ seq_puts(m, "Enable Dispatcher cdt rx part0 1 dump.\n"); ++ break; ++ case RTW89_DBG_PORT_SEL_DSPT_CDT_RX_P0_2: ++ info = &dbg_port_dspt_cdt_rx_p0_2; ++ rtw89_write16_mask(rtwdev, info->sel_addr, ++ B_AX_DISPATCHER_INTN_SEL_MASK, 3); ++ rtw89_write16_mask(rtwdev, info->sel_addr, ++ B_AX_DISPATCHER_CH_SEL_MASK, 2); ++ seq_puts(m, "Enable Dispatcher cdt rx part0 2 dump.\n"); ++ break; ++ case RTW89_DBG_PORT_SEL_DSPT_CDT_RX_P1: ++ info = &dbg_port_dspt_cdt_rx_p1; ++ rtw89_write8_mask(rtwdev, info->sel_addr, ++ B_AX_DISPATCHER_INTN_SEL_MASK, 3); ++ seq_puts(m, "Enable Dispatcher cdt rx part1 dump.\n"); ++ break; ++ case RTW89_DBG_PORT_SEL_DSPT_STF_CTRL: ++ info = &dbg_port_dspt_stf_ctrl; ++ rtw89_write8_mask(rtwdev, info->sel_addr, ++ B_AX_DISPATCHER_INTN_SEL_MASK, 4); ++ seq_puts(m, "Enable Dispatcher stf control dump.\n"); ++ break; ++ case RTW89_DBG_PORT_SEL_DSPT_ADDR_CTRL: ++ info = &dbg_port_dspt_addr_ctrl; ++ rtw89_write8_mask(rtwdev, info->sel_addr, ++ B_AX_DISPATCHER_INTN_SEL_MASK, 5); ++ seq_puts(m, "Enable Dispatcher addr control dump.\n"); ++ break; ++ case RTW89_DBG_PORT_SEL_DSPT_WDE_INTF: ++ info = &dbg_port_dspt_wde_intf; ++ rtw89_write8_mask(rtwdev, info->sel_addr, ++ B_AX_DISPATCHER_INTN_SEL_MASK, 6); ++ seq_puts(m, "Enable Dispatcher wde interface dump.\n"); ++ break; ++ case RTW89_DBG_PORT_SEL_DSPT_PLE_INTF: ++ info = &dbg_port_dspt_ple_intf; ++ rtw89_write8_mask(rtwdev, info->sel_addr, ++ B_AX_DISPATCHER_INTN_SEL_MASK, 7); ++ seq_puts(m, "Enable Dispatcher ple interface dump.\n"); ++ break; ++ case RTW89_DBG_PORT_SEL_DSPT_FLOW_CTRL: ++ info = &dbg_port_dspt_flow_ctrl; ++ rtw89_write8_mask(rtwdev, info->sel_addr, ++ B_AX_DISPATCHER_INTN_SEL_MASK, 8); ++ seq_puts(m, "Enable Dispatcher flow control dump.\n"); ++ break; + case RTW89_DBG_PORT_SEL_PCIE_TXDMA: + info = &dbg_port_pcie_txdma; + val32 = rtw89_read32(rtwdev, R_AX_DBG_CTRL); +@@ -1889,7 +2709,7 @@ rtw89_debug_mac_dbg_port_sel(struct seq_ + info = &dbg_port_pcie_misc2; + val16 = rtw89_read16(rtwdev, R_AX_PCIE_DBG_CTRL); + val16 = u16_replace_bits(val16, PCIE_MISC2_DBG_SEL, +- B_AX_DBG_SEL_MASK); ++ B_AX_PCIE_DBG_SEL_MASK); + rtw89_write16(rtwdev, R_AX_PCIE_DBG_CTRL, val16); + seq_puts(m, "Enable pcie misc2 dump.\n"); + break; +@@ -1915,6 +2735,10 @@ static bool is_dbg_port_valid(struct rtw + sel >= RTW89_DBG_PORT_SEL_WDE_BUFMGN_FREEPG && + sel <= RTW89_DBG_PORT_SEL_PKTINFO) + return false; ++ if (rtw89_mac_check_mac_en(rtwdev, 0, RTW89_DMAC_SEL) && ++ sel >= RTW89_DBG_PORT_SEL_DSPT_HDT_TX0 && ++ sel <= RTW89_DBG_PORT_SEL_DSPT_FLOW_CTRL) ++ return false; + if (rtw89_mac_check_mac_en(rtwdev, 0, RTW89_CMAC_SEL) && + sel >= RTW89_DBG_PORT_SEL_PTCL_C0 && + sel <= RTW89_DBG_PORT_SEL_TXTF_INFOH_C0) +@@ -1985,6 +2809,50 @@ static int rtw89_debug_mac_dbg_port_dump + case_DBG_SEL(PLE_QUEMGN_QLNKTBL); + case_DBG_SEL(PLE_QUEMGN_QEMPTY); + case_DBG_SEL(PKTINFO); ++ case_DBG_SEL(DSPT_HDT_TX0); ++ case_DBG_SEL(DSPT_HDT_TX1); ++ case_DBG_SEL(DSPT_HDT_TX2); ++ case_DBG_SEL(DSPT_HDT_TX3); ++ case_DBG_SEL(DSPT_HDT_TX4); ++ case_DBG_SEL(DSPT_HDT_TX5); ++ case_DBG_SEL(DSPT_HDT_TX6); ++ case_DBG_SEL(DSPT_HDT_TX7); ++ case_DBG_SEL(DSPT_HDT_TX8); ++ case_DBG_SEL(DSPT_HDT_TX9); ++ case_DBG_SEL(DSPT_HDT_TXA); ++ case_DBG_SEL(DSPT_HDT_TXB); ++ case_DBG_SEL(DSPT_HDT_TXC); ++ case_DBG_SEL(DSPT_HDT_TXD); ++ case_DBG_SEL(DSPT_HDT_TXE); ++ case_DBG_SEL(DSPT_HDT_TXF); ++ case_DBG_SEL(DSPT_CDT_TX0); ++ case_DBG_SEL(DSPT_CDT_TX1); ++ case_DBG_SEL(DSPT_CDT_TX3); ++ case_DBG_SEL(DSPT_CDT_TX4); ++ case_DBG_SEL(DSPT_CDT_TX5); ++ case_DBG_SEL(DSPT_CDT_TX6); ++ case_DBG_SEL(DSPT_CDT_TX7); ++ case_DBG_SEL(DSPT_CDT_TX8); ++ case_DBG_SEL(DSPT_CDT_TX9); ++ case_DBG_SEL(DSPT_CDT_TXA); ++ case_DBG_SEL(DSPT_CDT_TXB); ++ case_DBG_SEL(DSPT_CDT_TXC); ++ case_DBG_SEL(DSPT_HDT_RX0); ++ case_DBG_SEL(DSPT_HDT_RX1); ++ case_DBG_SEL(DSPT_HDT_RX2); ++ case_DBG_SEL(DSPT_HDT_RX3); ++ case_DBG_SEL(DSPT_HDT_RX4); ++ case_DBG_SEL(DSPT_HDT_RX5); ++ case_DBG_SEL(DSPT_CDT_RX_P0); ++ case_DBG_SEL(DSPT_CDT_RX_P0_0); ++ case_DBG_SEL(DSPT_CDT_RX_P0_1); ++ case_DBG_SEL(DSPT_CDT_RX_P0_2); ++ case_DBG_SEL(DSPT_CDT_RX_P1); ++ case_DBG_SEL(DSPT_STF_CTRL); ++ case_DBG_SEL(DSPT_ADDR_CTRL); ++ case_DBG_SEL(DSPT_WDE_INTF); ++ case_DBG_SEL(DSPT_PLE_INTF); ++ case_DBG_SEL(DSPT_FLOW_CTRL); + case_DBG_SEL(PCIE_TXDMA); + case_DBG_SEL(PCIE_RXDMA); + case_DBG_SEL(PCIE_CVT); +@@ -2354,6 +3222,7 @@ static void rtw89_sta_info_get_iter(void + else + seq_printf(m, "Legacy %d", rate->legacy); + seq_printf(m, "%s", rtwsta->ra_report.might_fallback_legacy ? " FB_G" : ""); ++ seq_printf(m, " BW:%u", rtw89_rate_info_bw_to_mhz(rate->bw)); + seq_printf(m, "\t(hw_rate=0x%x)", rtwsta->ra_report.hw_rate); + seq_printf(m, "\t==> agg_wait=%d (%d)\n", rtwsta->max_agg_wait, + sta->deflink.agg.max_rc_amsdu_len); +@@ -2379,6 +3248,7 @@ static void rtw89_sta_info_get_iter(void + he_gi_str[rate->he_gi] : "N/A"); + break; + } ++ seq_printf(m, " BW:%u", rtw89_rate_info_bw_to_mhz(status->bw)); + seq_printf(m, "\t(hw_rate=0x%x)\n", rtwsta->rx_hw_rate); + + rssi = ewma_rssi_read(&rtwsta->avg_rssi); +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw89/debug.h linux-6.2/drivers/net/wireless/realtek/rtw89/debug.h +--- linux-6.1/drivers/net/wireless/realtek/rtw89/debug.h 2022-12-12 00:15:18.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw89/debug.h 2022-12-24 00:49:25.778376835 +0200 +@@ -26,6 +26,8 @@ enum rtw89_debug_mask { + RTW89_DBG_HW_SCAN = BIT(15), + RTW89_DBG_SAR = BIT(16), + RTW89_DBG_STATE = BIT(17), ++ RTW89_DBG_WOW = BIT(18), ++ RTW89_DBG_UL_TB = BIT(19), + + RTW89_DBG_UNEXP = BIT(31), + }; +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw89/fw.c linux-6.2/drivers/net/wireless/realtek/rtw89/fw.c +--- linux-6.1/drivers/net/wireless/realtek/rtw89/fw.c 2022-12-12 00:15:18.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw89/fw.c 2022-12-24 00:49:25.778376835 +0200 +@@ -11,6 +11,9 @@ + #include "phy.h" + #include "reg.h" + ++static void rtw89_fw_c2h_cmd_handle(struct rtw89_dev *rtwdev, ++ struct sk_buff *skb); ++ + static struct sk_buff *rtw89_fw_h2c_alloc_skb(struct rtw89_dev *rtwdev, u32 len, + bool header) + { +@@ -85,15 +88,31 @@ static int rtw89_fw_hdr_parser(struct rt + { + struct rtw89_fw_hdr_section_info *section_info; + const u8 *fw_end = fw + len; ++ const u8 *fwdynhdr; + const u8 *bin; ++ u32 base_hdr_len; + u32 i; + + if (!info) + return -EINVAL; + + info->section_num = GET_FW_HDR_SEC_NUM(fw); +- info->hdr_len = RTW89_FW_HDR_SIZE + +- info->section_num * RTW89_FW_SECTION_HDR_SIZE; ++ base_hdr_len = RTW89_FW_HDR_SIZE + ++ info->section_num * RTW89_FW_SECTION_HDR_SIZE; ++ info->dynamic_hdr_en = GET_FW_HDR_DYN_HDR(fw); ++ ++ if (info->dynamic_hdr_en) { ++ info->hdr_len = GET_FW_HDR_LEN(fw); ++ info->dynamic_hdr_len = info->hdr_len - base_hdr_len; ++ fwdynhdr = fw + base_hdr_len; ++ if (GET_FW_DYNHDR_LEN(fwdynhdr) != info->dynamic_hdr_len) { ++ rtw89_err(rtwdev, "[ERR]invalid fw dynamic header len\n"); ++ return -EINVAL; ++ } ++ } else { ++ info->hdr_len = base_hdr_len; ++ info->dynamic_hdr_len = 0; ++ } + + bin = fw + info->hdr_len; + +@@ -254,29 +273,42 @@ static void rtw89_fw_recognize_features( + } + } + +-void rtw89_early_fw_feature_recognize(struct device *device, +- const struct rtw89_chip_info *chip, +- u32 *early_feat_map) +-{ +- union { +- struct rtw89_mfw_hdr mfw_hdr; +- u8 fw_hdr[RTW89_FW_HDR_SIZE]; +- } buf = {}; ++const struct firmware * ++rtw89_early_fw_feature_recognize(struct device *device, ++ const struct rtw89_chip_info *chip, ++ u32 *early_feat_map) ++{ ++ union rtw89_compat_fw_hdr buf = {}; + const struct firmware *firmware; ++ bool full_req = false; + u32 ver_code; + int ret; + int i; + +- ret = request_partial_firmware_into_buf(&firmware, chip->fw_name, +- device, &buf, sizeof(buf), 0); ++ /* If SECURITY_LOADPIN_ENFORCE is enabled, reading partial files will ++ * be denied (-EPERM). Then, we don't get right firmware things as ++ * expected. So, in this case, we have to request full firmware here. ++ */ ++ if (IS_ENABLED(CONFIG_SECURITY_LOADPIN_ENFORCE)) ++ full_req = true; ++ ++ if (full_req) ++ ret = request_firmware(&firmware, chip->fw_name, device); ++ else ++ ret = request_partial_firmware_into_buf(&firmware, chip->fw_name, ++ device, &buf, sizeof(buf), ++ 0); ++ + if (ret) { + dev_err(device, "failed to early request firmware: %d\n", ret); +- return; ++ return NULL; + } + +- ver_code = buf.mfw_hdr.sig != RTW89_MFW_SIG ? +- RTW89_FW_HDR_VER_CODE(&buf.fw_hdr) : +- RTW89_MFW_HDR_VER_CODE(&buf.mfw_hdr); ++ if (full_req) ++ ver_code = rtw89_compat_fw_hdr_ver_code(firmware->data); ++ else ++ ver_code = rtw89_compat_fw_hdr_ver_code(&buf); ++ + if (!ver_code) + goto out; + +@@ -291,7 +323,11 @@ void rtw89_early_fw_feature_recognize(st + } + + out: ++ if (full_req) ++ return firmware; ++ + release_firmware(firmware); ++ return NULL; + } + + int rtw89_fw_recognize(struct rtw89_dev *rtwdev) +@@ -515,6 +551,11 @@ int rtw89_fw_download(struct rtw89_dev * + u8 val; + int ret; + ++ rtw89_mac_disable_cpu(rtwdev); ++ ret = rtw89_mac_enable_cpu(rtwdev, 0, true); ++ if (ret) ++ return ret; ++ + if (!fw || !len) { + rtw89_err(rtwdev, "fw type %d isn't recognized\n", type); + return -ENOENT; +@@ -534,7 +575,7 @@ int rtw89_fw_download(struct rtw89_dev * + goto fwdl_err; + } + +- ret = rtw89_fw_download_hdr(rtwdev, fw, info.hdr_len); ++ ret = rtw89_fw_download_hdr(rtwdev, fw, info.hdr_len - info.dynamic_hdr_len); + if (ret) { + ret = -EBUSY; + goto fwdl_err; +@@ -593,6 +634,13 @@ int rtw89_load_firmware(struct rtw89_dev + fw->rtwdev = rtwdev; + init_completion(&fw->completion); + ++ if (fw->firmware) { ++ rtw89_debug(rtwdev, RTW89_DBG_FW, ++ "full firmware has been early requested\n"); ++ complete_all(&fw->completion); ++ return 0; ++ } ++ + ret = request_firmware_nowait(THIS_MODULE, true, fw_name, rtwdev->dev, + GFP_KERNEL, fw, rtw89_load_firmware_cb); + if (ret) { +@@ -609,8 +657,14 @@ void rtw89_unload_firmware(struct rtw89_ + + rtw89_wait_firmware_completion(rtwdev); + +- if (fw->firmware) ++ if (fw->firmware) { + release_firmware(fw->firmware); ++ ++ /* assign NULL back in case rtw89_free_ieee80211_hw() ++ * try to release the same one again. ++ */ ++ fw->firmware = NULL; ++ } + } + + #define H2C_CAM_LEN 60 +@@ -848,6 +902,56 @@ fail: + return ret; + } + ++static int rtw89_fw_h2c_add_wow_fw_ofld(struct rtw89_dev *rtwdev, ++ struct rtw89_vif *rtwvif, ++ enum rtw89_fw_pkt_ofld_type type, ++ u8 *id) ++{ ++ struct ieee80211_vif *vif = rtwvif_to_vif(rtwvif); ++ struct rtw89_wow_param *rtw_wow = &rtwdev->wow; ++ struct rtw89_pktofld_info *info; ++ struct sk_buff *skb; ++ int ret; ++ ++ info = kzalloc(sizeof(*info), GFP_KERNEL); ++ if (!info) ++ return -ENOMEM; ++ ++ switch (type) { ++ case RTW89_PKT_OFLD_TYPE_PS_POLL: ++ skb = ieee80211_pspoll_get(rtwdev->hw, vif); ++ break; ++ case RTW89_PKT_OFLD_TYPE_PROBE_RSP: ++ skb = ieee80211_proberesp_get(rtwdev->hw, vif); ++ break; ++ case RTW89_PKT_OFLD_TYPE_NULL_DATA: ++ skb = ieee80211_nullfunc_get(rtwdev->hw, vif, -1, false); ++ break; ++ case RTW89_PKT_OFLD_TYPE_QOS_NULL: ++ skb = ieee80211_nullfunc_get(rtwdev->hw, vif, -1, true); ++ break; ++ default: ++ goto err; ++ } ++ ++ if (!skb) ++ goto err; ++ ++ list_add_tail(&info->list, &rtw_wow->pkt_list); ++ ret = rtw89_fw_h2c_add_pkt_offload(rtwdev, &info->id, skb); ++ kfree_skb(skb); ++ ++ if (ret) ++ return ret; ++ ++ *id = info->id; ++ return 0; ++ ++err: ++ kfree(info); ++ return -ENOMEM; ++} ++ + #define H2C_GENERAL_PKT_LEN 6 + #define H2C_GENERAL_PKT_ID_UND 0xff + int rtw89_fw_h2c_general_pkt(struct rtw89_dev *rtwdev, u8 macid) +@@ -2192,7 +2296,7 @@ fail: + int rtw89_fw_h2c_rf_ntfy_mcc(struct rtw89_dev *rtwdev) + { + const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); +- struct rtw89_mcc_info *mcc_info = &rtwdev->mcc; ++ struct rtw89_rfk_mcc_info *rfk_mcc = &rtwdev->rfk_mcc; + struct rtw89_fw_h2c_rf_get_mccch *mccch; + struct sk_buff *skb; + int ret; +@@ -2205,10 +2309,10 @@ int rtw89_fw_h2c_rf_ntfy_mcc(struct rtw8 + skb_put(skb, sizeof(*mccch)); + mccch = (struct rtw89_fw_h2c_rf_get_mccch *)skb->data; + +- mccch->ch_0 = cpu_to_le32(mcc_info->ch[0]); +- mccch->ch_1 = cpu_to_le32(mcc_info->ch[1]); +- mccch->band_0 = cpu_to_le32(mcc_info->band[0]); +- mccch->band_1 = cpu_to_le32(mcc_info->band[1]); ++ mccch->ch_0 = cpu_to_le32(rfk_mcc->ch[0]); ++ mccch->ch_1 = cpu_to_le32(rfk_mcc->ch[1]); ++ mccch->band_0 = cpu_to_le32(rfk_mcc->band[0]); ++ mccch->band_1 = cpu_to_le32(rfk_mcc->band[1]); + mccch->current_channel = cpu_to_le32(chan->channel); + mccch->current_band_type = cpu_to_le32(chan->band_type); + +@@ -2311,8 +2415,43 @@ void rtw89_fw_free_all_early_h2c(struct + mutex_unlock(&rtwdev->mutex); + } + ++static void rtw89_fw_c2h_parse_attr(struct sk_buff *c2h) ++{ ++ struct rtw89_fw_c2h_attr *attr = RTW89_SKB_C2H_CB(c2h); ++ ++ attr->category = RTW89_GET_C2H_CATEGORY(c2h->data); ++ attr->class = RTW89_GET_C2H_CLASS(c2h->data); ++ attr->func = RTW89_GET_C2H_FUNC(c2h->data); ++ attr->len = RTW89_GET_C2H_LEN(c2h->data); ++} ++ ++static bool rtw89_fw_c2h_chk_atomic(struct rtw89_dev *rtwdev, ++ struct sk_buff *c2h) ++{ ++ struct rtw89_fw_c2h_attr *attr = RTW89_SKB_C2H_CB(c2h); ++ u8 category = attr->category; ++ u8 class = attr->class; ++ u8 func = attr->func; ++ ++ switch (category) { ++ default: ++ return false; ++ case RTW89_C2H_CAT_MAC: ++ return rtw89_mac_c2h_chk_atomic(rtwdev, class, func); ++ } ++} ++ + void rtw89_fw_c2h_irqsafe(struct rtw89_dev *rtwdev, struct sk_buff *c2h) + { ++ rtw89_fw_c2h_parse_attr(c2h); ++ if (!rtw89_fw_c2h_chk_atomic(rtwdev, c2h)) ++ goto enqueue; ++ ++ rtw89_fw_c2h_cmd_handle(rtwdev, c2h); ++ dev_kfree_skb_any(c2h); ++ return; ++ ++enqueue: + skb_queue_tail(&rtwdev->c2h_queue, c2h); + ieee80211_queue_work(rtwdev->hw, &rtwdev->c2h_work); + } +@@ -2320,10 +2459,11 @@ void rtw89_fw_c2h_irqsafe(struct rtw89_d + static void rtw89_fw_c2h_cmd_handle(struct rtw89_dev *rtwdev, + struct sk_buff *skb) + { +- u8 category = RTW89_GET_C2H_CATEGORY(skb->data); +- u8 class = RTW89_GET_C2H_CLASS(skb->data); +- u8 func = RTW89_GET_C2H_FUNC(skb->data); +- u16 len = RTW89_GET_C2H_LEN(skb->data); ++ struct rtw89_fw_c2h_attr *attr = RTW89_SKB_C2H_CB(skb); ++ u8 category = attr->category; ++ u8 class = attr->class; ++ u8 func = attr->func; ++ u16 len = attr->len; + bool dump = true; + + if (!test_bit(RTW89_FLAG_RUNNING, rtwdev->flags)) +@@ -2565,6 +2705,9 @@ static void rtw89_hw_scan_add_chan(struc + struct rtw89_mac_chinfo *ch_info) + { + struct rtw89_hw_scan_info *scan_info = &rtwdev->scan_info; ++ struct ieee80211_vif *vif = rtwdev->scan_info.scanning_vif; ++ struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; ++ struct cfg80211_scan_request *req = rtwvif->scan_req; + struct rtw89_pktofld_info *info; + u8 band, probe_count = 0; + +@@ -2576,13 +2719,13 @@ static void rtw89_hw_scan_add_chan(struc + ch_info->tx_pwr_idx = 0; + ch_info->tx_null = false; + ch_info->pause_data = false; ++ ch_info->probe_id = RTW89_SCANOFLD_PKT_NONE; + + if (ssid_num) { + ch_info->num_pkt = ssid_num; + band = rtw89_hw_to_nl80211_band(ch_info->ch_band); + + list_for_each_entry(info, &scan_info->pkt_list[band], list) { +- ch_info->probe_id = info->id; + ch_info->pkt_id[probe_count] = info->id; + if (++probe_count >= ssid_num) + break; +@@ -2591,9 +2734,16 @@ static void rtw89_hw_scan_add_chan(struc + rtw89_err(rtwdev, "SSID num differs from list len\n"); + } + ++ if (ch_info->ch_band == RTW89_BAND_6G) { ++ if (ssid_num == 1 && req->ssids[0].ssid_len == 0) { ++ ch_info->tx_pkt = false; ++ if (!req->duration_mandatory) ++ ch_info->period -= RTW89_DWELL_TIME; ++ } ++ } ++ + switch (chan_type) { + case RTW89_CHAN_OPERATE: +- ch_info->probe_id = RTW89_SCANOFLD_PKT_NONE; + ch_info->central_ch = scan_info->op_chan; + ch_info->pri_ch = scan_info->op_pri_ch; + ch_info->ch_band = scan_info->op_band; +@@ -2602,8 +2752,9 @@ static void rtw89_hw_scan_add_chan(struc + ch_info->num_pkt = 0; + break; + case RTW89_CHAN_DFS: +- ch_info->period = max_t(u8, ch_info->period, +- RTW89_DFS_CHAN_TIME); ++ if (ch_info->ch_band != RTW89_BAND_6G) ++ ch_info->period = max_t(u8, ch_info->period, ++ RTW89_DFS_CHAN_TIME); + ch_info->dwell_time = RTW89_DWELL_TIME; + break; + case RTW89_CHAN_ACTIVE: +@@ -2637,8 +2788,13 @@ static int rtw89_hw_scan_add_chan_list(s + goto out; + } + +- ch_info->period = req->duration_mandatory ? +- req->duration : RTW89_CHANNEL_TIME; ++ if (req->duration_mandatory) ++ ch_info->period = req->duration; ++ else if (channel->band == NL80211_BAND_6GHZ) ++ ch_info->period = RTW89_CHANNEL_TIME_6G + RTW89_DWELL_TIME; ++ else ++ ch_info->period = RTW89_CHANNEL_TIME; ++ + ch_info->ch_band = rtw89_nl80211_to_hw_band(channel->band); + ch_info->central_ch = channel->hw_value; + ch_info->pri_ch = channel->hw_value; +@@ -2757,6 +2913,7 @@ void rtw89_hw_scan_complete(struct rtw89 + + if (rtwvif->net_type != RTW89_NET_TYPE_NO_LINK) + rtw89_store_op_chan(rtwdev, false); ++ rtw89_set_channel(rtwdev); + } + + void rtw89_hw_scan_abort(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif) +@@ -2862,6 +3019,7 @@ int rtw89_fw_h2c_pkt_drop(struct rtw89_d + case RTW89_PKT_DROP_SEL_MACID_BK_ONCE: + case RTW89_PKT_DROP_SEL_MACID_VI_ONCE: + case RTW89_PKT_DROP_SEL_MACID_VO_ONCE: ++ case RTW89_PKT_DROP_SEL_BAND_ONCE: + break; + default: + rtw89_debug(rtwdev, RTW89_DBG_FW, +@@ -2877,6 +3035,14 @@ int rtw89_fw_h2c_pkt_drop(struct rtw89_d + RTW89_SET_FWCMD_PKT_DROP_PORT(skb->data, params->port); + RTW89_SET_FWCMD_PKT_DROP_MBSSID(skb->data, params->mbssid); + RTW89_SET_FWCMD_PKT_DROP_ROLE_A_INFO_TF_TRS(skb->data, params->tf_trs); ++ RTW89_SET_FWCMD_PKT_DROP_MACID_BAND_SEL_0(skb->data, ++ params->macid_band_sel[0]); ++ RTW89_SET_FWCMD_PKT_DROP_MACID_BAND_SEL_1(skb->data, ++ params->macid_band_sel[1]); ++ RTW89_SET_FWCMD_PKT_DROP_MACID_BAND_SEL_2(skb->data, ++ params->macid_band_sel[2]); ++ RTW89_SET_FWCMD_PKT_DROP_MACID_BAND_SEL_3(skb->data, ++ params->macid_band_sel[3]); + + rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, + H2C_CAT_MAC, +@@ -2896,3 +3062,563 @@ fail: + dev_kfree_skb_any(skb); + return ret; + } ++ ++#define H2C_KEEP_ALIVE_LEN 4 ++int rtw89_fw_h2c_keep_alive(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif, ++ bool enable) ++{ ++ struct sk_buff *skb; ++ u8 pkt_id = 0; ++ int ret; ++ ++ if (enable) { ++ ret = rtw89_fw_h2c_add_wow_fw_ofld(rtwdev, rtwvif, ++ RTW89_PKT_OFLD_TYPE_NULL_DATA, &pkt_id); ++ if (ret) ++ return -EPERM; ++ } ++ ++ skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_KEEP_ALIVE_LEN); ++ if (!skb) { ++ rtw89_err(rtwdev, "failed to alloc skb for keep alive\n"); ++ return -ENOMEM; ++ } ++ ++ skb_put(skb, H2C_KEEP_ALIVE_LEN); ++ ++ RTW89_SET_KEEP_ALIVE_ENABLE(skb->data, enable); ++ RTW89_SET_KEEP_ALIVE_PKT_NULL_ID(skb->data, pkt_id); ++ RTW89_SET_KEEP_ALIVE_PERIOD(skb->data, 5); ++ RTW89_SET_KEEP_ALIVE_MACID(skb->data, rtwvif->mac_id); ++ ++ rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, ++ H2C_CAT_MAC, ++ H2C_CL_MAC_WOW, ++ H2C_FUNC_KEEP_ALIVE, 0, 1, ++ H2C_KEEP_ALIVE_LEN); ++ ++ ret = rtw89_h2c_tx(rtwdev, skb, false); ++ if (ret) { ++ rtw89_err(rtwdev, "failed to send h2c\n"); ++ goto fail; ++ } ++ ++ return 0; ++ ++fail: ++ dev_kfree_skb_any(skb); ++ ++ return ret; ++} ++ ++#define H2C_DISCONNECT_DETECT_LEN 8 ++int rtw89_fw_h2c_disconnect_detect(struct rtw89_dev *rtwdev, ++ struct rtw89_vif *rtwvif, bool enable) ++{ ++ struct rtw89_wow_param *rtw_wow = &rtwdev->wow; ++ struct sk_buff *skb; ++ u8 macid = rtwvif->mac_id; ++ int ret; ++ ++ skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_DISCONNECT_DETECT_LEN); ++ if (!skb) { ++ rtw89_err(rtwdev, "failed to alloc skb for keep alive\n"); ++ return -ENOMEM; ++ } ++ ++ skb_put(skb, H2C_DISCONNECT_DETECT_LEN); ++ ++ if (test_bit(RTW89_WOW_FLAG_EN_DISCONNECT, rtw_wow->flags)) { ++ RTW89_SET_DISCONNECT_DETECT_ENABLE(skb->data, enable); ++ RTW89_SET_DISCONNECT_DETECT_DISCONNECT(skb->data, !enable); ++ RTW89_SET_DISCONNECT_DETECT_MAC_ID(skb->data, macid); ++ RTW89_SET_DISCONNECT_DETECT_CHECK_PERIOD(skb->data, 100); ++ RTW89_SET_DISCONNECT_DETECT_TRY_PKT_COUNT(skb->data, 5); ++ } ++ ++ rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, ++ H2C_CAT_MAC, ++ H2C_CL_MAC_WOW, ++ H2C_FUNC_DISCONNECT_DETECT, 0, 1, ++ H2C_DISCONNECT_DETECT_LEN); ++ ++ ret = rtw89_h2c_tx(rtwdev, skb, false); ++ if (ret) { ++ rtw89_err(rtwdev, "failed to send h2c\n"); ++ goto fail; ++ } ++ ++ return 0; ++ ++fail: ++ dev_kfree_skb_any(skb); ++ ++ return ret; ++} ++ ++#define H2C_WOW_GLOBAL_LEN 8 ++int rtw89_fw_h2c_wow_global(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif, ++ bool enable) ++{ ++ struct sk_buff *skb; ++ u8 macid = rtwvif->mac_id; ++ int ret; ++ ++ skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_WOW_GLOBAL_LEN); ++ if (!skb) { ++ rtw89_err(rtwdev, "failed to alloc skb for keep alive\n"); ++ return -ENOMEM; ++ } ++ ++ skb_put(skb, H2C_WOW_GLOBAL_LEN); ++ ++ RTW89_SET_WOW_GLOBAL_ENABLE(skb->data, enable); ++ RTW89_SET_WOW_GLOBAL_MAC_ID(skb->data, macid); ++ ++ rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, ++ H2C_CAT_MAC, ++ H2C_CL_MAC_WOW, ++ H2C_FUNC_WOW_GLOBAL, 0, 1, ++ H2C_WOW_GLOBAL_LEN); ++ ++ ret = rtw89_h2c_tx(rtwdev, skb, false); ++ if (ret) { ++ rtw89_err(rtwdev, "failed to send h2c\n"); ++ goto fail; ++ } ++ ++ return 0; ++ ++fail: ++ dev_kfree_skb_any(skb); ++ ++ return ret; ++} ++ ++#define H2C_WAKEUP_CTRL_LEN 4 ++int rtw89_fw_h2c_wow_wakeup_ctrl(struct rtw89_dev *rtwdev, ++ struct rtw89_vif *rtwvif, ++ bool enable) ++{ ++ struct rtw89_wow_param *rtw_wow = &rtwdev->wow; ++ struct sk_buff *skb; ++ u8 macid = rtwvif->mac_id; ++ int ret; ++ ++ skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_WAKEUP_CTRL_LEN); ++ if (!skb) { ++ rtw89_err(rtwdev, "failed to alloc skb for keep alive\n"); ++ return -ENOMEM; ++ } ++ ++ skb_put(skb, H2C_WAKEUP_CTRL_LEN); ++ ++ if (rtw_wow->pattern_cnt) ++ RTW89_SET_WOW_WAKEUP_CTRL_PATTERN_MATCH_ENABLE(skb->data, enable); ++ if (test_bit(RTW89_WOW_FLAG_EN_MAGIC_PKT, rtw_wow->flags)) ++ RTW89_SET_WOW_WAKEUP_CTRL_MAGIC_ENABLE(skb->data, enable); ++ if (test_bit(RTW89_WOW_FLAG_EN_DISCONNECT, rtw_wow->flags)) ++ RTW89_SET_WOW_WAKEUP_CTRL_DEAUTH_ENABLE(skb->data, enable); ++ ++ RTW89_SET_WOW_WAKEUP_CTRL_MAC_ID(skb->data, macid); ++ ++ rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, ++ H2C_CAT_MAC, ++ H2C_CL_MAC_WOW, ++ H2C_FUNC_WAKEUP_CTRL, 0, 1, ++ H2C_WAKEUP_CTRL_LEN); ++ ++ ret = rtw89_h2c_tx(rtwdev, skb, false); ++ if (ret) { ++ rtw89_err(rtwdev, "failed to send h2c\n"); ++ goto fail; ++ } ++ ++ return 0; ++ ++fail: ++ dev_kfree_skb_any(skb); ++ ++ return ret; ++} ++ ++#define H2C_WOW_CAM_UPD_LEN 24 ++int rtw89_fw_wow_cam_update(struct rtw89_dev *rtwdev, ++ struct rtw89_wow_cam_info *cam_info) ++{ ++ struct sk_buff *skb; ++ int ret; ++ ++ skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_WOW_CAM_UPD_LEN); ++ if (!skb) { ++ rtw89_err(rtwdev, "failed to alloc skb for keep alive\n"); ++ return -ENOMEM; ++ } ++ ++ skb_put(skb, H2C_WOW_CAM_UPD_LEN); ++ ++ RTW89_SET_WOW_CAM_UPD_R_W(skb->data, cam_info->r_w); ++ RTW89_SET_WOW_CAM_UPD_IDX(skb->data, cam_info->idx); ++ if (cam_info->valid) { ++ RTW89_SET_WOW_CAM_UPD_WKFM1(skb->data, cam_info->mask[0]); ++ RTW89_SET_WOW_CAM_UPD_WKFM2(skb->data, cam_info->mask[1]); ++ RTW89_SET_WOW_CAM_UPD_WKFM3(skb->data, cam_info->mask[2]); ++ RTW89_SET_WOW_CAM_UPD_WKFM4(skb->data, cam_info->mask[3]); ++ RTW89_SET_WOW_CAM_UPD_CRC(skb->data, cam_info->crc); ++ RTW89_SET_WOW_CAM_UPD_NEGATIVE_PATTERN_MATCH(skb->data, ++ cam_info->negative_pattern_match); ++ RTW89_SET_WOW_CAM_UPD_SKIP_MAC_HDR(skb->data, ++ cam_info->skip_mac_hdr); ++ RTW89_SET_WOW_CAM_UPD_UC(skb->data, cam_info->uc); ++ RTW89_SET_WOW_CAM_UPD_MC(skb->data, cam_info->mc); ++ RTW89_SET_WOW_CAM_UPD_BC(skb->data, cam_info->bc); ++ } ++ RTW89_SET_WOW_CAM_UPD_VALID(skb->data, cam_info->valid); ++ ++ rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, ++ H2C_CAT_MAC, ++ H2C_CL_MAC_WOW, ++ H2C_FUNC_WOW_CAM_UPD, 0, 1, ++ H2C_WOW_CAM_UPD_LEN); ++ ++ ret = rtw89_h2c_tx(rtwdev, skb, false); ++ if (ret) { ++ rtw89_err(rtwdev, "failed to send h2c\n"); ++ goto fail; ++ } ++ ++ return 0; ++fail: ++ dev_kfree_skb_any(skb); ++ ++ return ret; ++} ++ ++static int rtw89_h2c_tx_and_wait(struct rtw89_dev *rtwdev, struct sk_buff *skb, ++ struct rtw89_wait_info *wait, unsigned int cond) ++{ ++ int ret; ++ ++ ret = rtw89_h2c_tx(rtwdev, skb, false); ++ if (ret) { ++ rtw89_err(rtwdev, "failed to send h2c\n"); ++ dev_kfree_skb_any(skb); ++ return -EBUSY; ++ } ++ ++ return rtw89_wait_for_cond(wait, cond); ++} ++ ++#define H2C_ADD_MCC_LEN 16 ++int rtw89_fw_h2c_add_mcc(struct rtw89_dev *rtwdev, ++ const struct rtw89_fw_mcc_add_req *p) ++{ ++ struct rtw89_wait_info *wait = &rtwdev->mcc.wait; ++ struct sk_buff *skb; ++ unsigned int cond; ++ ++ skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_ADD_MCC_LEN); ++ if (!skb) { ++ rtw89_err(rtwdev, ++ "failed to alloc skb for add mcc\n"); ++ return -ENOMEM; ++ } ++ ++ skb_put(skb, H2C_ADD_MCC_LEN); ++ RTW89_SET_FWCMD_ADD_MCC_MACID(skb->data, p->macid); ++ RTW89_SET_FWCMD_ADD_MCC_CENTRAL_CH_SEG0(skb->data, p->central_ch_seg0); ++ RTW89_SET_FWCMD_ADD_MCC_CENTRAL_CH_SEG1(skb->data, p->central_ch_seg1); ++ RTW89_SET_FWCMD_ADD_MCC_PRIMARY_CH(skb->data, p->primary_ch); ++ RTW89_SET_FWCMD_ADD_MCC_BANDWIDTH(skb->data, p->bandwidth); ++ RTW89_SET_FWCMD_ADD_MCC_GROUP(skb->data, p->group); ++ RTW89_SET_FWCMD_ADD_MCC_C2H_RPT(skb->data, p->c2h_rpt); ++ RTW89_SET_FWCMD_ADD_MCC_DIS_TX_NULL(skb->data, p->dis_tx_null); ++ RTW89_SET_FWCMD_ADD_MCC_DIS_SW_RETRY(skb->data, p->dis_sw_retry); ++ RTW89_SET_FWCMD_ADD_MCC_IN_CURR_CH(skb->data, p->in_curr_ch); ++ RTW89_SET_FWCMD_ADD_MCC_SW_RETRY_COUNT(skb->data, p->sw_retry_count); ++ RTW89_SET_FWCMD_ADD_MCC_TX_NULL_EARLY(skb->data, p->tx_null_early); ++ RTW89_SET_FWCMD_ADD_MCC_BTC_IN_2G(skb->data, p->btc_in_2g); ++ RTW89_SET_FWCMD_ADD_MCC_PTA_EN(skb->data, p->pta_en); ++ RTW89_SET_FWCMD_ADD_MCC_RFK_BY_PASS(skb->data, p->rfk_by_pass); ++ RTW89_SET_FWCMD_ADD_MCC_CH_BAND_TYPE(skb->data, p->ch_band_type); ++ RTW89_SET_FWCMD_ADD_MCC_DURATION(skb->data, p->duration); ++ RTW89_SET_FWCMD_ADD_MCC_COURTESY_EN(skb->data, p->courtesy_en); ++ RTW89_SET_FWCMD_ADD_MCC_COURTESY_NUM(skb->data, p->courtesy_num); ++ RTW89_SET_FWCMD_ADD_MCC_COURTESY_TARGET(skb->data, p->courtesy_target); ++ ++ rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, ++ H2C_CAT_MAC, ++ H2C_CL_MCC, ++ H2C_FUNC_ADD_MCC, 0, 0, ++ H2C_ADD_MCC_LEN); ++ ++ cond = RTW89_MCC_WAIT_COND(p->group, H2C_FUNC_ADD_MCC); ++ return rtw89_h2c_tx_and_wait(rtwdev, skb, wait, cond); ++} ++ ++#define H2C_START_MCC_LEN 12 ++int rtw89_fw_h2c_start_mcc(struct rtw89_dev *rtwdev, ++ const struct rtw89_fw_mcc_start_req *p) ++{ ++ struct rtw89_wait_info *wait = &rtwdev->mcc.wait; ++ struct sk_buff *skb; ++ unsigned int cond; ++ ++ skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_START_MCC_LEN); ++ if (!skb) { ++ rtw89_err(rtwdev, ++ "failed to alloc skb for start mcc\n"); ++ return -ENOMEM; ++ } ++ ++ skb_put(skb, H2C_START_MCC_LEN); ++ RTW89_SET_FWCMD_START_MCC_GROUP(skb->data, p->group); ++ RTW89_SET_FWCMD_START_MCC_BTC_IN_GROUP(skb->data, p->btc_in_group); ++ RTW89_SET_FWCMD_START_MCC_OLD_GROUP_ACTION(skb->data, p->old_group_action); ++ RTW89_SET_FWCMD_START_MCC_OLD_GROUP(skb->data, p->old_group); ++ RTW89_SET_FWCMD_START_MCC_NOTIFY_CNT(skb->data, p->notify_cnt); ++ RTW89_SET_FWCMD_START_MCC_NOTIFY_RXDBG_EN(skb->data, p->notify_rxdbg_en); ++ RTW89_SET_FWCMD_START_MCC_MACID(skb->data, p->macid); ++ RTW89_SET_FWCMD_START_MCC_TSF_LOW(skb->data, p->tsf_low); ++ RTW89_SET_FWCMD_START_MCC_TSF_HIGH(skb->data, p->tsf_high); ++ ++ rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, ++ H2C_CAT_MAC, ++ H2C_CL_MCC, ++ H2C_FUNC_START_MCC, 0, 0, ++ H2C_START_MCC_LEN); ++ ++ cond = RTW89_MCC_WAIT_COND(p->group, H2C_FUNC_START_MCC); ++ return rtw89_h2c_tx_and_wait(rtwdev, skb, wait, cond); ++} ++ ++#define H2C_STOP_MCC_LEN 4 ++int rtw89_fw_h2c_stop_mcc(struct rtw89_dev *rtwdev, u8 group, u8 macid, ++ bool prev_groups) ++{ ++ struct rtw89_wait_info *wait = &rtwdev->mcc.wait; ++ struct sk_buff *skb; ++ unsigned int cond; ++ ++ skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_STOP_MCC_LEN); ++ if (!skb) { ++ rtw89_err(rtwdev, ++ "failed to alloc skb for stop mcc\n"); ++ return -ENOMEM; ++ } ++ ++ skb_put(skb, H2C_STOP_MCC_LEN); ++ RTW89_SET_FWCMD_STOP_MCC_MACID(skb->data, macid); ++ RTW89_SET_FWCMD_STOP_MCC_GROUP(skb->data, group); ++ RTW89_SET_FWCMD_STOP_MCC_PREV_GROUPS(skb->data, prev_groups); ++ ++ rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, ++ H2C_CAT_MAC, ++ H2C_CL_MCC, ++ H2C_FUNC_STOP_MCC, 0, 0, ++ H2C_STOP_MCC_LEN); ++ ++ cond = RTW89_MCC_WAIT_COND(group, H2C_FUNC_STOP_MCC); ++ return rtw89_h2c_tx_and_wait(rtwdev, skb, wait, cond); ++} ++ ++#define H2C_DEL_MCC_GROUP_LEN 4 ++int rtw89_fw_h2c_del_mcc_group(struct rtw89_dev *rtwdev, u8 group, ++ bool prev_groups) ++{ ++ struct rtw89_wait_info *wait = &rtwdev->mcc.wait; ++ struct sk_buff *skb; ++ unsigned int cond; ++ ++ skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_DEL_MCC_GROUP_LEN); ++ if (!skb) { ++ rtw89_err(rtwdev, ++ "failed to alloc skb for del mcc group\n"); ++ return -ENOMEM; ++ } ++ ++ skb_put(skb, H2C_DEL_MCC_GROUP_LEN); ++ RTW89_SET_FWCMD_DEL_MCC_GROUP_GROUP(skb->data, group); ++ RTW89_SET_FWCMD_DEL_MCC_GROUP_PREV_GROUPS(skb->data, prev_groups); ++ ++ rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, ++ H2C_CAT_MAC, ++ H2C_CL_MCC, ++ H2C_FUNC_DEL_MCC_GROUP, 0, 0, ++ H2C_DEL_MCC_GROUP_LEN); ++ ++ cond = RTW89_MCC_WAIT_COND(group, H2C_FUNC_DEL_MCC_GROUP); ++ return rtw89_h2c_tx_and_wait(rtwdev, skb, wait, cond); ++} ++ ++#define H2C_RESET_MCC_GROUP_LEN 4 ++int rtw89_fw_h2c_reset_mcc_group(struct rtw89_dev *rtwdev, u8 group) ++{ ++ struct rtw89_wait_info *wait = &rtwdev->mcc.wait; ++ struct sk_buff *skb; ++ unsigned int cond; ++ ++ skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_RESET_MCC_GROUP_LEN); ++ if (!skb) { ++ rtw89_err(rtwdev, ++ "failed to alloc skb for reset mcc group\n"); ++ return -ENOMEM; ++ } ++ ++ skb_put(skb, H2C_RESET_MCC_GROUP_LEN); ++ RTW89_SET_FWCMD_RESET_MCC_GROUP_GROUP(skb->data, group); ++ ++ rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, ++ H2C_CAT_MAC, ++ H2C_CL_MCC, ++ H2C_FUNC_RESET_MCC_GROUP, 0, 0, ++ H2C_RESET_MCC_GROUP_LEN); ++ ++ cond = RTW89_MCC_WAIT_COND(group, H2C_FUNC_RESET_MCC_GROUP); ++ return rtw89_h2c_tx_and_wait(rtwdev, skb, wait, cond); ++} ++ ++#define H2C_MCC_REQ_TSF_LEN 4 ++int rtw89_fw_h2c_mcc_req_tsf(struct rtw89_dev *rtwdev, ++ const struct rtw89_fw_mcc_tsf_req *req, ++ struct rtw89_mac_mcc_tsf_rpt *rpt) ++{ ++ struct rtw89_wait_info *wait = &rtwdev->mcc.wait; ++ struct rtw89_mac_mcc_tsf_rpt *tmp; ++ struct sk_buff *skb; ++ unsigned int cond; ++ int ret; ++ ++ skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_MCC_REQ_TSF_LEN); ++ if (!skb) { ++ rtw89_err(rtwdev, ++ "failed to alloc skb for mcc req tsf\n"); ++ return -ENOMEM; ++ } ++ ++ skb_put(skb, H2C_MCC_REQ_TSF_LEN); ++ RTW89_SET_FWCMD_MCC_REQ_TSF_GROUP(skb->data, req->group); ++ RTW89_SET_FWCMD_MCC_REQ_TSF_MACID_X(skb->data, req->macid_x); ++ RTW89_SET_FWCMD_MCC_REQ_TSF_MACID_Y(skb->data, req->macid_y); ++ ++ rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, ++ H2C_CAT_MAC, ++ H2C_CL_MCC, ++ H2C_FUNC_MCC_REQ_TSF, 0, 0, ++ H2C_MCC_REQ_TSF_LEN); ++ ++ cond = RTW89_MCC_WAIT_COND(req->group, H2C_FUNC_MCC_REQ_TSF); ++ ret = rtw89_h2c_tx_and_wait(rtwdev, skb, wait, cond); ++ if (ret) ++ return ret; ++ ++ tmp = (struct rtw89_mac_mcc_tsf_rpt *)wait->data.buf; ++ *rpt = *tmp; ++ ++ return 0; ++} ++ ++#define H2C_MCC_MACID_BITMAP_DSC_LEN 4 ++int rtw89_fw_h2c_mcc_macid_bitamp(struct rtw89_dev *rtwdev, u8 group, u8 macid, ++ u8 *bitmap) ++{ ++ struct rtw89_wait_info *wait = &rtwdev->mcc.wait; ++ struct sk_buff *skb; ++ unsigned int cond; ++ u8 map_len; ++ u8 h2c_len; ++ ++ BUILD_BUG_ON(RTW89_MAX_MAC_ID_NUM % 8); ++ map_len = RTW89_MAX_MAC_ID_NUM / 8; ++ h2c_len = H2C_MCC_MACID_BITMAP_DSC_LEN + map_len; ++ skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, h2c_len); ++ if (!skb) { ++ rtw89_err(rtwdev, ++ "failed to alloc skb for mcc macid bitmap\n"); ++ return -ENOMEM; ++ } ++ ++ skb_put(skb, h2c_len); ++ RTW89_SET_FWCMD_MCC_MACID_BITMAP_GROUP(skb->data, group); ++ RTW89_SET_FWCMD_MCC_MACID_BITMAP_MACID(skb->data, macid); ++ RTW89_SET_FWCMD_MCC_MACID_BITMAP_BITMAP_LENGTH(skb->data, map_len); ++ RTW89_SET_FWCMD_MCC_MACID_BITMAP_BITMAP(skb->data, bitmap, map_len); ++ ++ rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, ++ H2C_CAT_MAC, ++ H2C_CL_MCC, ++ H2C_FUNC_MCC_MACID_BITMAP, 0, 0, ++ h2c_len); ++ ++ cond = RTW89_MCC_WAIT_COND(group, H2C_FUNC_MCC_MACID_BITMAP); ++ return rtw89_h2c_tx_and_wait(rtwdev, skb, wait, cond); ++} ++ ++#define H2C_MCC_SYNC_LEN 4 ++int rtw89_fw_h2c_mcc_sync(struct rtw89_dev *rtwdev, u8 group, u8 source, ++ u8 target, u8 offset) ++{ ++ struct rtw89_wait_info *wait = &rtwdev->mcc.wait; ++ struct sk_buff *skb; ++ unsigned int cond; ++ ++ skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_MCC_SYNC_LEN); ++ if (!skb) { ++ rtw89_err(rtwdev, ++ "failed to alloc skb for mcc sync\n"); ++ return -ENOMEM; ++ } ++ ++ skb_put(skb, H2C_MCC_SYNC_LEN); ++ RTW89_SET_FWCMD_MCC_SYNC_GROUP(skb->data, group); ++ RTW89_SET_FWCMD_MCC_SYNC_MACID_SOURCE(skb->data, source); ++ RTW89_SET_FWCMD_MCC_SYNC_MACID_TARGET(skb->data, target); ++ RTW89_SET_FWCMD_MCC_SYNC_SYNC_OFFSET(skb->data, offset); ++ ++ rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, ++ H2C_CAT_MAC, ++ H2C_CL_MCC, ++ H2C_FUNC_MCC_SYNC, 0, 0, ++ H2C_MCC_SYNC_LEN); ++ ++ cond = RTW89_MCC_WAIT_COND(group, H2C_FUNC_MCC_SYNC); ++ return rtw89_h2c_tx_and_wait(rtwdev, skb, wait, cond); ++} ++ ++#define H2C_MCC_SET_DURATION_LEN 20 ++int rtw89_fw_h2c_mcc_set_duration(struct rtw89_dev *rtwdev, ++ const struct rtw89_fw_mcc_duration *p) ++{ ++ struct rtw89_wait_info *wait = &rtwdev->mcc.wait; ++ struct sk_buff *skb; ++ unsigned int cond; ++ ++ skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_MCC_SET_DURATION_LEN); ++ if (!skb) { ++ rtw89_err(rtwdev, ++ "failed to alloc skb for mcc set duration\n"); ++ return -ENOMEM; ++ } ++ ++ skb_put(skb, H2C_MCC_SET_DURATION_LEN); ++ RTW89_SET_FWCMD_MCC_SET_DURATION_GROUP(skb->data, p->group); ++ RTW89_SET_FWCMD_MCC_SET_DURATION_BTC_IN_GROUP(skb->data, p->btc_in_group); ++ RTW89_SET_FWCMD_MCC_SET_DURATION_START_MACID(skb->data, p->start_macid); ++ RTW89_SET_FWCMD_MCC_SET_DURATION_MACID_X(skb->data, p->macid_x); ++ RTW89_SET_FWCMD_MCC_SET_DURATION_MACID_Y(skb->data, p->macid_y); ++ RTW89_SET_FWCMD_MCC_SET_DURATION_START_TSF_LOW(skb->data, ++ p->start_tsf_low); ++ RTW89_SET_FWCMD_MCC_SET_DURATION_START_TSF_HIGH(skb->data, ++ p->start_tsf_high); ++ RTW89_SET_FWCMD_MCC_SET_DURATION_DURATION_X(skb->data, p->duration_x); ++ RTW89_SET_FWCMD_MCC_SET_DURATION_DURATION_Y(skb->data, p->duration_y); ++ ++ rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, ++ H2C_CAT_MAC, ++ H2C_CL_MCC, ++ H2C_FUNC_MCC_SET_DURATION, 0, 0, ++ H2C_MCC_SET_DURATION_LEN); ++ ++ cond = RTW89_MCC_WAIT_COND(p->group, H2C_FUNC_MCC_SET_DURATION); ++ return rtw89_h2c_tx_and_wait(rtwdev, skb, wait, cond); ++} +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw89/fw.h linux-6.2/drivers/net/wireless/realtek/rtw89/fw.h +--- linux-6.1/drivers/net/wireless/realtek/rtw89/fw.h 2022-12-12 00:15:18.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw89/fw.h 2022-12-24 00:49:25.778376835 +0200 +@@ -176,6 +176,8 @@ struct rtw89_fw_hdr_section_info { + struct rtw89_fw_bin_info { + u8 section_num; + u32 hdr_len; ++ bool dynamic_hdr_en; ++ u32 dynamic_hdr_len; + struct rtw89_fw_hdr_section_info section_info[FWDL_SECTION_MAX_NUM]; + }; + +@@ -197,6 +199,7 @@ struct rtw89_h2creg_sch_tx_en { + + #define RTW89_H2C_MAX_SIZE 2048 + #define RTW89_CHANNEL_TIME 45 ++#define RTW89_CHANNEL_TIME_6G 20 + #define RTW89_DFS_CHAN_TIME 105 + #define RTW89_OFF_CHAN_TIME 100 + #define RTW89_DWELL_TIME 20 +@@ -494,6 +497,8 @@ static inline void RTW89_SET_EDCA_PARAM( + le32_get_bits(*((const __le32 *)(fwhdr) + 1), GENMASK(23, 16)) + #define GET_FW_HDR_SUBINDEX(fwhdr) \ + le32_get_bits(*((const __le32 *)(fwhdr) + 1), GENMASK(31, 24)) ++#define GET_FW_HDR_LEN(fwhdr) \ ++ le32_get_bits(*((const __le32 *)(fwhdr) + 3), GENMASK(23, 16)) + #define GET_FW_HDR_MONTH(fwhdr) \ + le32_get_bits(*((const __le32 *)(fwhdr) + 4), GENMASK(7, 0)) + #define GET_FW_HDR_DATE(fwhdr) \ +@@ -506,8 +511,16 @@ static inline void RTW89_SET_EDCA_PARAM( + le32_get_bits(*((const __le32 *)(fwhdr) + 5), GENMASK(31, 0)) + #define GET_FW_HDR_SEC_NUM(fwhdr) \ + le32_get_bits(*((const __le32 *)(fwhdr) + 6), GENMASK(15, 8)) ++#define GET_FW_HDR_DYN_HDR(fwhdr) \ ++ le32_get_bits(*((const __le32 *)(fwhdr) + 7), BIT(16)) + #define GET_FW_HDR_CMD_VERSERION(fwhdr) \ + le32_get_bits(*((const __le32 *)(fwhdr) + 7), GENMASK(31, 24)) ++ ++#define GET_FW_DYNHDR_LEN(fwdynhdr) \ ++ le32_get_bits(*((const __le32 *)(fwdynhdr)), GENMASK(31, 0)) ++#define GET_FW_DYNHDR_COUNT(fwdynhdr) \ ++ le32_get_bits(*((const __le32 *)(fwdynhdr) + 1), GENMASK(31, 0)) ++ + static inline void SET_FW_HDR_PART_SIZE(void *fwhdr, u32 val) + { + le32p_replace_bits((__le32 *)fwhdr + 7, val, GENMASK(15, 0)); +@@ -1860,6 +1873,231 @@ static inline void RTW89_SET_FWCMD_PKT_D + le32p_replace_bits((__le32 *)cmd + 1, val, GENMASK(15, 8)); + } + ++static inline void RTW89_SET_FWCMD_PKT_DROP_MACID_BAND_SEL_0(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd + 2, val, GENMASK(31, 0)); ++} ++ ++static inline void RTW89_SET_FWCMD_PKT_DROP_MACID_BAND_SEL_1(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd + 3, val, GENMASK(31, 0)); ++} ++ ++static inline void RTW89_SET_FWCMD_PKT_DROP_MACID_BAND_SEL_2(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd + 4, val, GENMASK(31, 0)); ++} ++ ++static inline void RTW89_SET_FWCMD_PKT_DROP_MACID_BAND_SEL_3(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd + 5, val, GENMASK(31, 0)); ++} ++ ++static inline void RTW89_SET_KEEP_ALIVE_ENABLE(void *h2c, u32 val) ++{ ++ le32p_replace_bits((__le32 *)h2c, val, GENMASK(1, 0)); ++} ++ ++static inline void RTW89_SET_KEEP_ALIVE_PKT_NULL_ID(void *h2c, u32 val) ++{ ++ le32p_replace_bits((__le32 *)h2c, val, GENMASK(15, 8)); ++} ++ ++static inline void RTW89_SET_KEEP_ALIVE_PERIOD(void *h2c, u32 val) ++{ ++ le32p_replace_bits((__le32 *)h2c, val, GENMASK(24, 16)); ++} ++ ++static inline void RTW89_SET_KEEP_ALIVE_MACID(void *h2c, u32 val) ++{ ++ le32p_replace_bits((__le32 *)h2c, val, GENMASK(31, 24)); ++} ++ ++static inline void RTW89_SET_DISCONNECT_DETECT_ENABLE(void *h2c, u32 val) ++{ ++ le32p_replace_bits((__le32 *)h2c, val, BIT(0)); ++} ++ ++static inline void RTW89_SET_DISCONNECT_DETECT_TRYOK_BCNFAIL_COUNT_EN(void *h2c, u32 val) ++{ ++ le32p_replace_bits((__le32 *)h2c, val, BIT(1)); ++} ++ ++static inline void RTW89_SET_DISCONNECT_DETECT_DISCONNECT(void *h2c, u32 val) ++{ ++ le32p_replace_bits((__le32 *)h2c, val, BIT(2)); ++} ++ ++static inline void RTW89_SET_DISCONNECT_DETECT_MAC_ID(void *h2c, u32 val) ++{ ++ le32p_replace_bits((__le32 *)h2c, val, GENMASK(15, 8)); ++} ++ ++static inline void RTW89_SET_DISCONNECT_DETECT_CHECK_PERIOD(void *h2c, u32 val) ++{ ++ le32p_replace_bits((__le32 *)h2c, val, GENMASK(23, 16)); ++} ++ ++static inline void RTW89_SET_DISCONNECT_DETECT_TRY_PKT_COUNT(void *h2c, u32 val) ++{ ++ le32p_replace_bits((__le32 *)h2c, val, GENMASK(31, 24)); ++} ++ ++static inline void RTW89_SET_DISCONNECT_DETECT_TRYOK_BCNFAIL_COUNT_LIMIT(void *h2c, u32 val) ++{ ++ le32p_replace_bits((__le32 *)(h2c) + 1, val, GENMASK(7, 0)); ++} ++ ++static inline void RTW89_SET_WOW_GLOBAL_ENABLE(void *h2c, u32 val) ++{ ++ le32p_replace_bits((__le32 *)h2c, val, BIT(0)); ++} ++ ++static inline void RTW89_SET_WOW_GLOBAL_DROP_ALL_PKT(void *h2c, u32 val) ++{ ++ le32p_replace_bits((__le32 *)h2c, val, BIT(1)); ++} ++ ++static inline void RTW89_SET_WOW_GLOBAL_RX_PARSE_AFTER_WAKE(void *h2c, u32 val) ++{ ++ le32p_replace_bits((__le32 *)h2c, val, BIT(2)); ++} ++ ++static inline void RTW89_SET_WOW_GLOBAL_WAKE_BAR_PULLED(void *h2c, u32 val) ++{ ++ le32p_replace_bits((__le32 *)h2c, val, BIT(3)); ++} ++ ++static inline void RTW89_SET_WOW_GLOBAL_MAC_ID(void *h2c, u32 val) ++{ ++ le32p_replace_bits((__le32 *)h2c, val, GENMASK(15, 8)); ++} ++ ++static inline void RTW89_SET_WOW_GLOBAL_PAIRWISE_SEC_ALGO(void *h2c, u32 val) ++{ ++ le32p_replace_bits((__le32 *)h2c, val, GENMASK(23, 16)); ++} ++ ++static inline void RTW89_SET_WOW_GLOBAL_GROUP_SEC_ALGO(void *h2c, u32 val) ++{ ++ le32p_replace_bits((__le32 *)h2c, val, GENMASK(31, 24)); ++} ++ ++static inline void RTW89_SET_WOW_GLOBAL_REMOTECTRL_INFO_CONTENT(void *h2c, u32 val) ++{ ++ le32p_replace_bits((__le32 *)(h2c) + 1, val, GENMASK(31, 0)); ++} ++ ++static inline void RTW89_SET_WOW_WAKEUP_CTRL_PATTERN_MATCH_ENABLE(void *h2c, u32 val) ++{ ++ le32p_replace_bits((__le32 *)h2c, val, BIT(0)); ++} ++ ++static inline void RTW89_SET_WOW_WAKEUP_CTRL_MAGIC_ENABLE(void *h2c, u32 val) ++{ ++ le32p_replace_bits((__le32 *)h2c, val, BIT(1)); ++} ++ ++static inline void RTW89_SET_WOW_WAKEUP_CTRL_HW_UNICAST_ENABLE(void *h2c, u32 val) ++{ ++ le32p_replace_bits((__le32 *)h2c, val, BIT(2)); ++} ++ ++static inline void RTW89_SET_WOW_WAKEUP_CTRL_FW_UNICAST_ENABLE(void *h2c, u32 val) ++{ ++ le32p_replace_bits((__le32 *)h2c, val, BIT(3)); ++} ++ ++static inline void RTW89_SET_WOW_WAKEUP_CTRL_DEAUTH_ENABLE(void *h2c, u32 val) ++{ ++ le32p_replace_bits((__le32 *)h2c, val, BIT(4)); ++} ++ ++static inline void RTW89_SET_WOW_WAKEUP_CTRL_REKEYP_ENABLE(void *h2c, u32 val) ++{ ++ le32p_replace_bits((__le32 *)h2c, val, BIT(5)); ++} ++ ++static inline void RTW89_SET_WOW_WAKEUP_CTRL_EAP_ENABLE(void *h2c, u32 val) ++{ ++ le32p_replace_bits((__le32 *)h2c, val, BIT(6)); ++} ++ ++static inline void RTW89_SET_WOW_WAKEUP_CTRL_ALL_DATA_ENABLE(void *h2c, u32 val) ++{ ++ le32p_replace_bits((__le32 *)h2c, val, BIT(7)); ++} ++ ++static inline void RTW89_SET_WOW_WAKEUP_CTRL_MAC_ID(void *h2c, u32 val) ++{ ++ le32p_replace_bits((__le32 *)h2c, val, GENMASK(31, 24)); ++} ++ ++static inline void RTW89_SET_WOW_CAM_UPD_R_W(void *h2c, u32 val) ++{ ++ le32p_replace_bits((__le32 *)h2c, val, BIT(0)); ++} ++ ++static inline void RTW89_SET_WOW_CAM_UPD_IDX(void *h2c, u32 val) ++{ ++ le32p_replace_bits((__le32 *)h2c, val, GENMASK(7, 1)); ++} ++ ++static inline void RTW89_SET_WOW_CAM_UPD_WKFM1(void *h2c, u32 val) ++{ ++ le32p_replace_bits((__le32 *)h2c + 1, val, GENMASK(31, 0)); ++} ++ ++static inline void RTW89_SET_WOW_CAM_UPD_WKFM2(void *h2c, u32 val) ++{ ++ le32p_replace_bits((__le32 *)h2c + 2, val, GENMASK(31, 0)); ++} ++ ++static inline void RTW89_SET_WOW_CAM_UPD_WKFM3(void *h2c, u32 val) ++{ ++ le32p_replace_bits((__le32 *)h2c + 3, val, GENMASK(31, 0)); ++} ++ ++static inline void RTW89_SET_WOW_CAM_UPD_WKFM4(void *h2c, u32 val) ++{ ++ le32p_replace_bits((__le32 *)h2c + 4, val, GENMASK(31, 0)); ++} ++ ++static inline void RTW89_SET_WOW_CAM_UPD_CRC(void *h2c, u32 val) ++{ ++ le32p_replace_bits((__le32 *)h2c + 5, val, GENMASK(15, 0)); ++} ++ ++static inline void RTW89_SET_WOW_CAM_UPD_NEGATIVE_PATTERN_MATCH(void *h2c, u32 val) ++{ ++ le32p_replace_bits((__le32 *)h2c + 5, val, BIT(22)); ++} ++ ++static inline void RTW89_SET_WOW_CAM_UPD_SKIP_MAC_HDR(void *h2c, u32 val) ++{ ++ le32p_replace_bits((__le32 *)h2c + 5, val, BIT(23)); ++} ++ ++static inline void RTW89_SET_WOW_CAM_UPD_UC(void *h2c, u32 val) ++{ ++ le32p_replace_bits((__le32 *)h2c + 5, val, BIT(24)); ++} ++ ++static inline void RTW89_SET_WOW_CAM_UPD_MC(void *h2c, u32 val) ++{ ++ le32p_replace_bits((__le32 *)h2c + 5, val, BIT(25)); ++} ++ ++static inline void RTW89_SET_WOW_CAM_UPD_BC(void *h2c, u32 val) ++{ ++ le32p_replace_bits((__le32 *)h2c + 5, val, BIT(26)); ++} ++ ++static inline void RTW89_SET_WOW_CAM_UPD_VALID(void *h2c, u32 val) ++{ ++ le32p_replace_bits((__le32 *)h2c + 5, val, BIT(31)); ++} ++ + enum rtw89_btc_btf_h2c_class { + BTFC_SET = 0x10, + BTFC_GET = 0x11, +@@ -2529,6 +2767,355 @@ static inline void RTW89_SET_FWCMD_TSF32 + le32p_replace_bits((__le32 *)cmd, val, GENMASK(31, 16)); + } + ++enum rtw89_fw_mcc_c2h_rpt_cfg { ++ RTW89_FW_MCC_C2H_RPT_OFF = 0, ++ RTW89_FW_MCC_C2H_RPT_FAIL_ONLY = 1, ++ RTW89_FW_MCC_C2H_RPT_ALL = 2, ++}; ++ ++struct rtw89_fw_mcc_add_req { ++ u8 macid; ++ u8 central_ch_seg0; ++ u8 central_ch_seg1; ++ u8 primary_ch; ++ enum rtw89_bandwidth bandwidth: 4; ++ u32 group: 2; ++ u32 c2h_rpt: 2; ++ u32 dis_tx_null: 1; ++ u32 dis_sw_retry: 1; ++ u32 in_curr_ch: 1; ++ u32 sw_retry_count: 3; ++ u32 tx_null_early: 4; ++ u32 btc_in_2g: 1; ++ u32 pta_en: 1; ++ u32 rfk_by_pass: 1; ++ u32 ch_band_type: 2; ++ u32 rsvd0: 9; ++ u32 duration; ++ u8 courtesy_en; ++ u8 courtesy_num; ++ u8 courtesy_target; ++ u8 rsvd1; ++}; ++ ++static inline void RTW89_SET_FWCMD_ADD_MCC_MACID(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd, val, GENMASK(7, 0)); ++} ++ ++static inline void RTW89_SET_FWCMD_ADD_MCC_CENTRAL_CH_SEG0(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd, val, GENMASK(15, 8)); ++} ++ ++static inline void RTW89_SET_FWCMD_ADD_MCC_CENTRAL_CH_SEG1(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd, val, GENMASK(23, 16)); ++} ++ ++static inline void RTW89_SET_FWCMD_ADD_MCC_PRIMARY_CH(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd, val, GENMASK(31, 24)); ++} ++ ++static inline void RTW89_SET_FWCMD_ADD_MCC_BANDWIDTH(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd + 1, val, GENMASK(3, 0)); ++} ++ ++static inline void RTW89_SET_FWCMD_ADD_MCC_GROUP(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd + 1, val, GENMASK(5, 4)); ++} ++ ++static inline void RTW89_SET_FWCMD_ADD_MCC_C2H_RPT(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd + 1, val, GENMASK(7, 6)); ++} ++ ++static inline void RTW89_SET_FWCMD_ADD_MCC_DIS_TX_NULL(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd + 1, val, BIT(8)); ++} ++ ++static inline void RTW89_SET_FWCMD_ADD_MCC_DIS_SW_RETRY(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd + 1, val, BIT(9)); ++} ++ ++static inline void RTW89_SET_FWCMD_ADD_MCC_IN_CURR_CH(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd + 1, val, BIT(10)); ++} ++ ++static inline void RTW89_SET_FWCMD_ADD_MCC_SW_RETRY_COUNT(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd + 1, val, GENMASK(13, 11)); ++} ++ ++static inline void RTW89_SET_FWCMD_ADD_MCC_TX_NULL_EARLY(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd + 1, val, GENMASK(17, 14)); ++} ++ ++static inline void RTW89_SET_FWCMD_ADD_MCC_BTC_IN_2G(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd + 1, val, BIT(18)); ++} ++ ++static inline void RTW89_SET_FWCMD_ADD_MCC_PTA_EN(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd + 1, val, BIT(19)); ++} ++ ++static inline void RTW89_SET_FWCMD_ADD_MCC_RFK_BY_PASS(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd + 1, val, BIT(20)); ++} ++ ++static inline void RTW89_SET_FWCMD_ADD_MCC_CH_BAND_TYPE(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd + 1, val, GENMASK(22, 21)); ++} ++ ++static inline void RTW89_SET_FWCMD_ADD_MCC_DURATION(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd + 2, val, GENMASK(31, 0)); ++} ++ ++static inline void RTW89_SET_FWCMD_ADD_MCC_COURTESY_EN(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd + 3, val, BIT(0)); ++} ++ ++static inline void RTW89_SET_FWCMD_ADD_MCC_COURTESY_NUM(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd + 3, val, GENMASK(15, 8)); ++} ++ ++static inline void RTW89_SET_FWCMD_ADD_MCC_COURTESY_TARGET(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd + 3, val, GENMASK(23, 16)); ++} ++ ++struct rtw89_fw_mcc_start_req { ++ u32 group: 2; ++ u32 btc_in_group: 1; ++ u32 old_group_action: 2; ++ u32 old_group: 2; ++ u32 rsvd0: 9; ++ u32 notify_cnt: 3; ++ u32 rsvd1: 2; ++ u32 notify_rxdbg_en: 1; ++ u32 rsvd2: 2; ++ u32 macid: 8; ++ u32 tsf_low; ++ u32 tsf_high; ++}; ++ ++static inline void RTW89_SET_FWCMD_START_MCC_GROUP(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd, val, GENMASK(1, 0)); ++} ++ ++static inline void RTW89_SET_FWCMD_START_MCC_BTC_IN_GROUP(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd, val, BIT(2)); ++} ++ ++static inline void RTW89_SET_FWCMD_START_MCC_OLD_GROUP_ACTION(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd, val, GENMASK(4, 3)); ++} ++ ++static inline void RTW89_SET_FWCMD_START_MCC_OLD_GROUP(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd, val, GENMASK(6, 5)); ++} ++ ++static inline void RTW89_SET_FWCMD_START_MCC_NOTIFY_CNT(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd, val, GENMASK(18, 16)); ++} ++ ++static inline void RTW89_SET_FWCMD_START_MCC_NOTIFY_RXDBG_EN(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd, val, BIT(21)); ++} ++ ++static inline void RTW89_SET_FWCMD_START_MCC_MACID(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd, val, GENMASK(31, 24)); ++} ++ ++static inline void RTW89_SET_FWCMD_START_MCC_TSF_LOW(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd + 1, val, GENMASK(31, 0)); ++} ++ ++static inline void RTW89_SET_FWCMD_START_MCC_TSF_HIGH(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd + 2, val, GENMASK(31, 0)); ++} ++ ++static inline void RTW89_SET_FWCMD_STOP_MCC_MACID(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd, val, GENMASK(7, 0)); ++} ++ ++static inline void RTW89_SET_FWCMD_STOP_MCC_GROUP(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd, val, GENMASK(9, 8)); ++} ++ ++static inline void RTW89_SET_FWCMD_STOP_MCC_PREV_GROUPS(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd, val, BIT(10)); ++} ++ ++static inline void RTW89_SET_FWCMD_DEL_MCC_GROUP_GROUP(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd, val, GENMASK(1, 0)); ++} ++ ++static inline void RTW89_SET_FWCMD_DEL_MCC_GROUP_PREV_GROUPS(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd, val, BIT(2)); ++} ++ ++static inline void RTW89_SET_FWCMD_RESET_MCC_GROUP_GROUP(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd, val, GENMASK(1, 0)); ++} ++ ++struct rtw89_fw_mcc_tsf_req { ++ u8 group: 2; ++ u8 rsvd0: 6; ++ u8 macid_x; ++ u8 macid_y; ++ u8 rsvd1; ++}; ++ ++static inline void RTW89_SET_FWCMD_MCC_REQ_TSF_GROUP(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd, val, GENMASK(1, 0)); ++} ++ ++static inline void RTW89_SET_FWCMD_MCC_REQ_TSF_MACID_X(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd, val, GENMASK(15, 8)); ++} ++ ++static inline void RTW89_SET_FWCMD_MCC_REQ_TSF_MACID_Y(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd, val, GENMASK(23, 16)); ++} ++ ++static inline void RTW89_SET_FWCMD_MCC_MACID_BITMAP_GROUP(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd, val, GENMASK(1, 0)); ++} ++ ++static inline void RTW89_SET_FWCMD_MCC_MACID_BITMAP_MACID(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd, val, GENMASK(15, 8)); ++} ++ ++static inline void RTW89_SET_FWCMD_MCC_MACID_BITMAP_BITMAP_LENGTH(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd, val, GENMASK(23, 16)); ++} ++ ++static inline void RTW89_SET_FWCMD_MCC_MACID_BITMAP_BITMAP(void *cmd, ++ u8 *bitmap, u8 len) ++{ ++ memcpy((__le32 *)cmd + 1, bitmap, len); ++} ++ ++static inline void RTW89_SET_FWCMD_MCC_SYNC_GROUP(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd, val, GENMASK(1, 0)); ++} ++ ++static inline void RTW89_SET_FWCMD_MCC_SYNC_MACID_SOURCE(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd, val, GENMASK(15, 8)); ++} ++ ++static inline void RTW89_SET_FWCMD_MCC_SYNC_MACID_TARGET(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd, val, GENMASK(23, 16)); ++} ++ ++static inline void RTW89_SET_FWCMD_MCC_SYNC_SYNC_OFFSET(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd, val, GENMASK(31, 24)); ++} ++ ++struct rtw89_fw_mcc_duration { ++ u32 group: 2; ++ u32 btc_in_group: 1; ++ u32 rsvd0: 5; ++ u32 start_macid: 8; ++ u32 macid_x: 8; ++ u32 macid_y: 8; ++ u32 start_tsf_low; ++ u32 start_tsf_high; ++ u32 duration_x; ++ u32 duration_y; ++}; ++ ++static inline void RTW89_SET_FWCMD_MCC_SET_DURATION_GROUP(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd, val, GENMASK(1, 0)); ++} ++ ++static ++inline void RTW89_SET_FWCMD_MCC_SET_DURATION_BTC_IN_GROUP(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd, val, BIT(2)); ++} ++ ++static ++inline void RTW89_SET_FWCMD_MCC_SET_DURATION_START_MACID(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd, val, GENMASK(15, 8)); ++} ++ ++static inline void RTW89_SET_FWCMD_MCC_SET_DURATION_MACID_X(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd, val, GENMASK(23, 16)); ++} ++ ++static inline void RTW89_SET_FWCMD_MCC_SET_DURATION_MACID_Y(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd, val, GENMASK(31, 24)); ++} ++ ++static ++inline void RTW89_SET_FWCMD_MCC_SET_DURATION_START_TSF_LOW(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd + 1, val, GENMASK(31, 0)); ++} ++ ++static ++inline void RTW89_SET_FWCMD_MCC_SET_DURATION_START_TSF_HIGH(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd + 2, val, GENMASK(31, 0)); ++} ++ ++static ++inline void RTW89_SET_FWCMD_MCC_SET_DURATION_DURATION_X(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd + 3, val, GENMASK(31, 0)); ++} ++ ++static ++inline void RTW89_SET_FWCMD_MCC_SET_DURATION_DURATION_Y(void *cmd, u32 val) ++{ ++ le32p_replace_bits((__le32 *)cmd + 4, val, GENMASK(31, 0)); ++} ++ + #define RTW89_C2H_HEADER_LEN 8 + + #define RTW89_GET_C2H_CATEGORY(c2h) \ +@@ -2540,6 +3127,20 @@ static inline void RTW89_SET_FWCMD_TSF32 + #define RTW89_GET_C2H_LEN(c2h) \ + le32_get_bits(*((const __le32 *)(c2h) + 1), GENMASK(13, 0)) + ++struct rtw89_fw_c2h_attr { ++ u8 category; ++ u8 class; ++ u8 func; ++ u16 len; ++}; ++ ++static inline struct rtw89_fw_c2h_attr *RTW89_SKB_C2H_CB(struct sk_buff *skb) ++{ ++ static_assert(sizeof(skb->cb) >= sizeof(struct rtw89_fw_c2h_attr)); ++ ++ return (struct rtw89_fw_c2h_attr *)skb->cb; ++} ++ + #define RTW89_GET_C2H_LOG_SRT_PRT(c2h) (char *)((__le32 *)(c2h) + 2) + #define RTW89_GET_C2H_LOG_LEN(len) ((len) - RTW89_C2H_HEADER_LEN) + +@@ -2607,6 +3208,55 @@ static inline void RTW89_SET_FWCMD_TSF32 + #define RTW89_GET_MAC_C2H_SCANOFLD_BAND(c2h) \ + le32_get_bits(*((const __le32 *)(c2h) + 5), GENMASK(25, 24)) + ++#define RTW89_GET_MAC_C2H_MCC_RCV_ACK_GROUP(c2h) \ ++ le32_get_bits(*((const __le32 *)(c2h)), GENMASK(1, 0)) ++#define RTW89_GET_MAC_C2H_MCC_RCV_ACK_H2C_FUNC(c2h) \ ++ le32_get_bits(*((const __le32 *)(c2h)), GENMASK(15, 8)) ++ ++#define RTW89_GET_MAC_C2H_MCC_REQ_ACK_GROUP(c2h) \ ++ le32_get_bits(*((const __le32 *)(c2h)), GENMASK(1, 0)) ++#define RTW89_GET_MAC_C2H_MCC_REQ_ACK_H2C_RETURN(c2h) \ ++ le32_get_bits(*((const __le32 *)(c2h)), GENMASK(7, 2)) ++#define RTW89_GET_MAC_C2H_MCC_REQ_ACK_H2C_FUNC(c2h) \ ++ le32_get_bits(*((const __le32 *)(c2h)), GENMASK(15, 8)) ++ ++struct rtw89_mac_mcc_tsf_rpt { ++ u32 macid_x; ++ u32 macid_y; ++ u32 tsf_x_low; ++ u32 tsf_x_high; ++ u32 tsf_y_low; ++ u32 tsf_y_high; ++}; ++ ++static_assert(sizeof(struct rtw89_mac_mcc_tsf_rpt) <= RTW89_COMPLETION_BUF_SIZE); ++ ++#define RTW89_GET_MAC_C2H_MCC_TSF_RPT_MACID_X(c2h) \ ++ le32_get_bits(*((const __le32 *)(c2h)), GENMASK(7, 0)) ++#define RTW89_GET_MAC_C2H_MCC_TSF_RPT_MACID_Y(c2h) \ ++ le32_get_bits(*((const __le32 *)(c2h)), GENMASK(15, 8)) ++#define RTW89_GET_MAC_C2H_MCC_TSF_RPT_GROUP(c2h) \ ++ le32_get_bits(*((const __le32 *)(c2h)), GENMASK(17, 16)) ++#define RTW89_GET_MAC_C2H_MCC_TSF_RPT_TSF_LOW_X(c2h) \ ++ le32_get_bits(*((const __le32 *)(c2h) + 1), GENMASK(31, 0)) ++#define RTW89_GET_MAC_C2H_MCC_TSF_RPT_TSF_HIGH_X(c2h) \ ++ le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(31, 0)) ++#define RTW89_GET_MAC_C2H_MCC_TSF_RPT_TSF_LOW_Y(c2h) \ ++ le32_get_bits(*((const __le32 *)(c2h) + 3), GENMASK(31, 0)) ++#define RTW89_GET_MAC_C2H_MCC_TSF_RPT_TSF_HIGH_Y(c2h) \ ++ le32_get_bits(*((const __le32 *)(c2h) + 4), GENMASK(31, 0)) ++ ++#define RTW89_GET_MAC_C2H_MCC_STATUS_RPT_STATUS(c2h) \ ++ le32_get_bits(*((const __le32 *)(c2h)), GENMASK(5, 0)) ++#define RTW89_GET_MAC_C2H_MCC_STATUS_RPT_GROUP(c2h) \ ++ le32_get_bits(*((const __le32 *)(c2h)), GENMASK(7, 6)) ++#define RTW89_GET_MAC_C2H_MCC_STATUS_RPT_MACID(c2h) \ ++ le32_get_bits(*((const __le32 *)(c2h)), GENMASK(15, 8)) ++#define RTW89_GET_MAC_C2H_MCC_STATUS_RPT_TSF_LOW(c2h) \ ++ le32_get_bits(*((const __le32 *)(c2h) + 1), GENMASK(31, 0)) ++#define RTW89_GET_MAC_C2H_MCC_STATUS_RPT_TSF_HIGH(c2h) \ ++ le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(31, 0)) ++ + #define RTW89_FW_HDR_SIZE 32 + #define RTW89_FW_SECTION_HDR_SIZE 16 + +@@ -2641,6 +3291,21 @@ struct fwcmd_hdr { + __le32 hdr1; + }; + ++union rtw89_compat_fw_hdr { ++ struct rtw89_mfw_hdr mfw_hdr; ++ u8 fw_hdr[RTW89_FW_HDR_SIZE]; ++}; ++ ++static inline u32 rtw89_compat_fw_hdr_ver_code(const void *fw_buf) ++{ ++ const union rtw89_compat_fw_hdr *compat = (typeof(compat))fw_buf; ++ ++ if (compat->mfw_hdr.sig == RTW89_MFW_SIG) ++ return RTW89_MFW_HDR_VER_CODE(&compat->mfw_hdr); ++ else ++ return RTW89_FW_HDR_VER_CODE(&compat->fw_hdr); ++} ++ + #define RTW89_H2C_RF_PAGE_SIZE 500 + #define RTW89_H2C_RF_PAGE_NUM 3 + struct rtw89_fw_h2c_rf_reg_info { +@@ -2676,6 +3341,14 @@ struct rtw89_fw_h2c_rf_reg_info { + #define H2C_FUNC_LOG_CFG 0x0 + #define H2C_FUNC_MAC_GENERAL_PKT 0x1 + ++/* CLASS 1 - WOW */ ++#define H2C_CL_MAC_WOW 0x1 ++#define H2C_FUNC_KEEP_ALIVE 0x0 ++#define H2C_FUNC_DISCONNECT_DETECT 0x1 ++#define H2C_FUNC_WOW_GLOBAL 0x2 ++#define H2C_FUNC_WAKEUP_CTRL 0x8 ++#define H2C_FUNC_WOW_CAM_UPD 0xC ++ + /* CLASS 2 - PS */ + #define H2C_CL_MAC_PS 0x2 + #define H2C_FUNC_MAC_LPS_PARM 0x0 +@@ -2720,6 +3393,25 @@ struct rtw89_fw_h2c_rf_reg_info { + #define H2C_CL_BA_CAM 0xc + #define H2C_FUNC_MAC_BA_CAM 0x0 + ++/* CLASS 14 - MCC */ ++#define H2C_CL_MCC 0xe ++enum rtw89_mcc_h2c_func { ++ H2C_FUNC_ADD_MCC = 0x0, ++ H2C_FUNC_START_MCC = 0x1, ++ H2C_FUNC_STOP_MCC = 0x2, ++ H2C_FUNC_DEL_MCC_GROUP = 0x3, ++ H2C_FUNC_RESET_MCC_GROUP = 0x4, ++ H2C_FUNC_MCC_REQ_TSF = 0x5, ++ H2C_FUNC_MCC_MACID_BITMAP = 0x6, ++ H2C_FUNC_MCC_SYNC = 0x7, ++ H2C_FUNC_MCC_SET_DURATION = 0x8, ++ ++ NUM_OF_RTW89_MCC_H2C_FUNC, ++}; ++ ++#define RTW89_MCC_WAIT_COND(group, func) \ ++ ((group) * NUM_OF_RTW89_MCC_H2C_FUNC + (func)) ++ + #define H2C_CAT_OUTSRC 0x2 + + #define H2C_CL_OUTSRC_RA 0x1 +@@ -2752,9 +3444,10 @@ struct rtw89_fw_h2c_rf_get_mccch { + + int rtw89_fw_check_rdy(struct rtw89_dev *rtwdev); + int rtw89_fw_recognize(struct rtw89_dev *rtwdev); +-void rtw89_early_fw_feature_recognize(struct device *device, +- const struct rtw89_chip_info *chip, +- u32 *early_feat_map); ++const struct firmware * ++rtw89_early_fw_feature_recognize(struct device *device, ++ const struct rtw89_chip_info *chip, ++ u32 *early_feat_map); + int rtw89_fw_download(struct rtw89_dev *rtwdev, enum rtw89_fw_type type); + int rtw89_load_firmware(struct rtw89_dev *rtwdev); + void rtw89_unload_firmware(struct rtw89_dev *rtwdev); +@@ -2845,6 +3538,38 @@ int rtw89_fw_h2c_p2p_act(struct rtw89_de + u8 act, u8 noa_id); + int rtw89_fw_h2c_tsf32_toggle(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif, + bool en); ++int rtw89_fw_h2c_wow_global(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif, ++ bool enable); ++int rtw89_fw_h2c_wow_wakeup_ctrl(struct rtw89_dev *rtwdev, ++ struct rtw89_vif *rtwvif, bool enable); ++int rtw89_fw_h2c_keep_alive(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif, ++ bool enable); ++int rtw89_fw_h2c_disconnect_detect(struct rtw89_dev *rtwdev, ++ struct rtw89_vif *rtwvif, bool enable); ++int rtw89_fw_h2c_wow_global(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif, ++ bool enable); ++int rtw89_fw_h2c_wow_wakeup_ctrl(struct rtw89_dev *rtwdev, ++ struct rtw89_vif *rtwvif, bool enable); ++int rtw89_fw_wow_cam_update(struct rtw89_dev *rtwdev, ++ struct rtw89_wow_cam_info *cam_info); ++int rtw89_fw_h2c_add_mcc(struct rtw89_dev *rtwdev, ++ const struct rtw89_fw_mcc_add_req *p); ++int rtw89_fw_h2c_start_mcc(struct rtw89_dev *rtwdev, ++ const struct rtw89_fw_mcc_start_req *p); ++int rtw89_fw_h2c_stop_mcc(struct rtw89_dev *rtwdev, u8 group, u8 macid, ++ bool prev_groups); ++int rtw89_fw_h2c_del_mcc_group(struct rtw89_dev *rtwdev, u8 group, ++ bool prev_groups); ++int rtw89_fw_h2c_reset_mcc_group(struct rtw89_dev *rtwdev, u8 group); ++int rtw89_fw_h2c_mcc_req_tsf(struct rtw89_dev *rtwdev, ++ const struct rtw89_fw_mcc_tsf_req *req, ++ struct rtw89_mac_mcc_tsf_rpt *rpt); ++int rtw89_fw_h2c_mcc_macid_bitamp(struct rtw89_dev *rtwdev, u8 group, u8 macid, ++ u8 *bitmap); ++int rtw89_fw_h2c_mcc_sync(struct rtw89_dev *rtwdev, u8 group, u8 source, ++ u8 target, u8 offset); ++int rtw89_fw_h2c_mcc_set_duration(struct rtw89_dev *rtwdev, ++ const struct rtw89_fw_mcc_duration *p); + + static inline void rtw89_fw_h2c_init_ba_cam(struct rtw89_dev *rtwdev) + { +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw89/Kconfig linux-6.2/drivers/net/wireless/realtek/rtw89/Kconfig +--- linux-6.1/drivers/net/wireless/realtek/rtw89/Kconfig 2022-12-12 00:15:18.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw89/Kconfig 2022-12-24 00:49:25.775376835 +0200 +@@ -19,6 +19,9 @@ config RTW89_PCI + config RTW89_8852A + tristate + ++config RTW89_8852B ++ tristate ++ + config RTW89_8852C + tristate + +@@ -33,6 +36,17 @@ config RTW89_8852AE + + 802.11ax PCIe wireless network (Wi-Fi 6) adapter + ++config RTW89_8852BE ++ tristate "Realtek 8852BE PCI wireless network (Wi-Fi 6) adapter" ++ depends on PCI ++ select RTW89_CORE ++ select RTW89_PCI ++ select RTW89_8852B ++ help ++ Select this option will enable support for 8852BE chipset ++ ++ 802.11ax PCIe wireless network (Wi-Fi 6) adapter ++ + config RTW89_8852CE + tristate "Realtek 8852CE PCI wireless network (Wi-Fi 6E) adapter" + depends on PCI +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw89/mac80211.c linux-6.2/drivers/net/wireless/realtek/rtw89/mac80211.c +--- linux-6.1/drivers/net/wireless/realtek/rtw89/mac80211.c 2022-12-12 00:15:18.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw89/mac80211.c 2022-12-24 00:49:25.779376835 +0200 +@@ -14,6 +14,7 @@ + #include "sar.h" + #include "ser.h" + #include "util.h" ++#include "wow.h" + + static void rtw89_ops_tx(struct ieee80211_hw *hw, + struct ieee80211_tx_control *control, +@@ -124,18 +125,21 @@ static int rtw89_ops_add_interface(struc + RTW89_PORT_NUM); + if (rtwvif->port == RTW89_PORT_NUM) { + ret = -ENOSPC; ++ list_del_init(&rtwvif->list); + goto out; + } + + rtwvif->bcn_hit_cond = 0; + rtwvif->mac_idx = RTW89_MAC_0; + rtwvif->phy_idx = RTW89_PHY_0; ++ rtwvif->sub_entity_idx = RTW89_SUB_ENTITY_0; + rtwvif->hit_rule = 0; + ether_addr_copy(rtwvif->mac_addr, vif->addr); + + ret = rtw89_mac_add_vif(rtwdev, rtwvif); + if (ret) { + rtw89_core_release_bit_map(rtwdev->hw_port, rtwvif->port); ++ list_del_init(&rtwvif->list); + goto out; + } + +@@ -173,6 +177,9 @@ static int rtw89_ops_change_interface(st + enum nl80211_iftype type, bool p2p) + { + struct rtw89_dev *rtwdev = hw->priv; ++ int ret; ++ ++ set_bit(RTW89_FLAG_CHANGING_INTERFACE, rtwdev->flags); + + rtw89_debug(rtwdev, RTW89_DBG_STATE, "change vif %pM (%d)->(%d), p2p (%d)->(%d)\n", + vif->addr, vif->type, type, vif->p2p, p2p); +@@ -182,7 +189,13 @@ static int rtw89_ops_change_interface(st + vif->type = type; + vif->p2p = p2p; + +- return rtw89_ops_add_interface(hw, vif); ++ ret = rtw89_ops_add_interface(hw, vif); ++ if (ret) ++ rtw89_warn(rtwdev, "failed to change interface %d\n", ret); ++ ++ clear_bit(RTW89_FLAG_CHANGING_INTERFACE, rtwdev->flags); ++ ++ return ret; + } + + static void rtw89_ops_configure_filter(struct ieee80211_hw *hw, +@@ -443,6 +456,7 @@ void rtw89_ops_stop_ap(struct ieee80211_ + struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; + + mutex_lock(&rtwdev->mutex); ++ rtw89_mac_stop_ap(rtwdev, rtwvif); + rtw89_fw_h2c_assoc_cmac_tbl(rtwdev, vif, NULL); + rtw89_fw_h2c_join_info(rtwdev, rtwvif, NULL, true); + mutex_unlock(&rtwdev->mutex); +@@ -916,6 +930,55 @@ static int rtw89_ops_set_tid_config(stru + return 0; + } + ++#ifdef CONFIG_PM ++static int rtw89_ops_suspend(struct ieee80211_hw *hw, ++ struct cfg80211_wowlan *wowlan) ++{ ++ struct rtw89_dev *rtwdev = hw->priv; ++ int ret; ++ ++ set_bit(RTW89_FLAG_FORBIDDEN_TRACK_WROK, rtwdev->flags); ++ cancel_delayed_work_sync(&rtwdev->track_work); ++ ++ mutex_lock(&rtwdev->mutex); ++ ret = rtw89_wow_suspend(rtwdev, wowlan); ++ mutex_unlock(&rtwdev->mutex); ++ ++ if (ret) { ++ rtw89_warn(rtwdev, "failed to suspend for wow %d\n", ret); ++ clear_bit(RTW89_FLAG_FORBIDDEN_TRACK_WROK, rtwdev->flags); ++ return 1; ++ } ++ ++ return 0; ++} ++ ++static int rtw89_ops_resume(struct ieee80211_hw *hw) ++{ ++ struct rtw89_dev *rtwdev = hw->priv; ++ int ret; ++ ++ mutex_lock(&rtwdev->mutex); ++ ret = rtw89_wow_resume(rtwdev); ++ if (ret) ++ rtw89_warn(rtwdev, "failed to resume for wow %d\n", ret); ++ mutex_unlock(&rtwdev->mutex); ++ ++ clear_bit(RTW89_FLAG_FORBIDDEN_TRACK_WROK, rtwdev->flags); ++ ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->track_work, ++ RTW89_TRACK_WORK_PERIOD); ++ ++ return ret ? 1 : 0; ++} ++ ++static void rtw89_ops_set_wakeup(struct ieee80211_hw *hw, bool enabled) ++{ ++ struct rtw89_dev *rtwdev = hw->priv; ++ ++ device_set_wakeup_enable(rtwdev->dev, enabled); ++} ++#endif ++ + const struct ieee80211_ops rtw89_ops = { + .tx = rtw89_ops_tx, + .wake_tx_queue = rtw89_ops_wake_tx_queue, +@@ -953,5 +1016,10 @@ const struct ieee80211_ops rtw89_ops = { + .set_sar_specs = rtw89_ops_set_sar_specs, + .sta_rc_update = rtw89_ops_sta_rc_update, + .set_tid_config = rtw89_ops_set_tid_config, ++#ifdef CONFIG_PM ++ .suspend = rtw89_ops_suspend, ++ .resume = rtw89_ops_resume, ++ .set_wakeup = rtw89_ops_set_wakeup, ++#endif + }; + EXPORT_SYMBOL(rtw89_ops); +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw89/mac.c linux-6.2/drivers/net/wireless/realtek/rtw89/mac.c +--- linux-6.1/drivers/net/wireless/realtek/rtw89/mac.c 2022-12-31 22:58:05.367710726 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw89/mac.c 2022-12-24 00:49:25.779376835 +0200 +@@ -7,6 +7,7 @@ + #include "debug.h" + #include "fw.h" + #include "mac.h" ++#include "pci.h" + #include "ps.h" + #include "reg.h" + #include "util.h" +@@ -31,6 +32,8 @@ const u32 rtw89_mac_mem_base_addrs[RTW89 + [RTW89_MAC_MEM_TXDATA_FIFO_1] = TXDATA_FIFO_1_BASE_ADDR, + [RTW89_MAC_MEM_CPU_LOCAL] = CPU_LOCAL_BASE_ADDR, + [RTW89_MAC_MEM_BSSID_CAM] = BSSID_CAM_BASE_ADDR, ++ [RTW89_MAC_MEM_TXD_FIFO_0_V1] = TXD_FIFO_0_BASE_ADDR_V1, ++ [RTW89_MAC_MEM_TXD_FIFO_1_V1] = TXD_FIFO_1_BASE_ADDR_V1, + }; + + static void rtw89_mac_mem_write(struct rtw89_dev *rtwdev, u32 offset, +@@ -272,106 +275,163 @@ static void rtw89_mac_dump_l0_to_l1(stru + } + } + +-static void rtw89_mac_dump_err_status(struct rtw89_dev *rtwdev, +- enum mac_ax_err_info err) ++static void rtw89_mac_dump_dmac_err_status(struct rtw89_dev *rtwdev) + { +- u32 dmac_err, cmac_err; ++ const struct rtw89_chip_info *chip = rtwdev->chip; ++ u32 dmac_err; ++ int i, ret; + +- if (err != MAC_AX_ERR_L1_ERR_DMAC && +- err != MAC_AX_ERR_L0_PROMOTE_TO_L1 && +- err != MAC_AX_ERR_L0_ERR_CMAC0 && +- err != MAC_AX_ERR_L0_ERR_CMAC1) ++ ret = rtw89_mac_check_mac_en(rtwdev, 0, RTW89_DMAC_SEL); ++ if (ret) { ++ rtw89_warn(rtwdev, "[DMAC] : DMAC not enabled\n"); + return; ++ } + +- rtw89_info(rtwdev, "--->\nerr=0x%x\n", err); +- rtw89_info(rtwdev, "R_AX_SER_DBG_INFO =0x%08x\n", +- rtw89_read32(rtwdev, R_AX_SER_DBG_INFO)); +- +- cmac_err = rtw89_read32(rtwdev, R_AX_CMAC_ERR_ISR); +- rtw89_info(rtwdev, "R_AX_CMAC_ERR_ISR =0x%08x\n", cmac_err); + dmac_err = rtw89_read32(rtwdev, R_AX_DMAC_ERR_ISR); +- rtw89_info(rtwdev, "R_AX_DMAC_ERR_ISR =0x%08x\n", dmac_err); ++ rtw89_info(rtwdev, "R_AX_DMAC_ERR_ISR=0x%08x\n", dmac_err); ++ rtw89_info(rtwdev, "R_AX_DMAC_ERR_IMR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_DMAC_ERR_IMR)); + + if (dmac_err) { +- rtw89_info(rtwdev, "R_AX_WDE_ERR_FLAG_CFG =0x%08x ", +- rtw89_read32(rtwdev, R_AX_WDE_ERR_FLAG_CFG)); +- rtw89_info(rtwdev, "R_AX_PLE_ERR_FLAG_CFG =0x%08x\n", +- rtw89_read32(rtwdev, R_AX_PLE_ERR_FLAG_CFG)); ++ rtw89_info(rtwdev, "R_AX_WDE_ERR_FLAG_CFG=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_WDE_ERR_FLAG_CFG_NUM1)); ++ rtw89_info(rtwdev, "R_AX_PLE_ERR_FLAG_CFG=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_PLE_ERR_FLAG_CFG_NUM1)); ++ if (chip->chip_id == RTL8852C) { ++ rtw89_info(rtwdev, "R_AX_PLE_ERRFLAG_MSG=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_PLE_ERRFLAG_MSG)); ++ rtw89_info(rtwdev, "R_AX_WDE_ERRFLAG_MSG=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_WDE_ERRFLAG_MSG)); ++ rtw89_info(rtwdev, "R_AX_PLE_DBGERR_LOCKEN=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_PLE_DBGERR_LOCKEN)); ++ rtw89_info(rtwdev, "R_AX_PLE_DBGERR_STS=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_PLE_DBGERR_STS)); ++ } + } + + if (dmac_err & B_AX_WDRLS_ERR_FLAG) { +- rtw89_info(rtwdev, "R_AX_WDRLS_ERR_IMR =0x%08x ", ++ rtw89_info(rtwdev, "R_AX_WDRLS_ERR_IMR=0x%08x\n", + rtw89_read32(rtwdev, R_AX_WDRLS_ERR_IMR)); +- rtw89_info(rtwdev, "R_AX_WDRLS_ERR_ISR =0x%08x\n", ++ rtw89_info(rtwdev, "R_AX_WDRLS_ERR_ISR=0x%08x\n", + rtw89_read32(rtwdev, R_AX_WDRLS_ERR_ISR)); ++ if (chip->chip_id == RTL8852C) ++ rtw89_info(rtwdev, "R_AX_RPQ_RXBD_IDX=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_RPQ_RXBD_IDX_V1)); ++ else ++ rtw89_info(rtwdev, "R_AX_RPQ_RXBD_IDX=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_RPQ_RXBD_IDX)); + } + + if (dmac_err & B_AX_WSEC_ERR_FLAG) { +- rtw89_info(rtwdev, "R_AX_SEC_ERR_IMR_ISR =0x%08x\n", +- rtw89_read32(rtwdev, R_AX_SEC_DEBUG)); +- rtw89_info(rtwdev, "SEC_local_Register 0x9D00 =0x%08x\n", +- rtw89_read32(rtwdev, R_AX_SEC_ENG_CTRL)); +- rtw89_info(rtwdev, "SEC_local_Register 0x9D04 =0x%08x\n", +- rtw89_read32(rtwdev, R_AX_SEC_MPDU_PROC)); +- rtw89_info(rtwdev, "SEC_local_Register 0x9D10 =0x%08x\n", +- rtw89_read32(rtwdev, R_AX_SEC_CAM_ACCESS)); +- rtw89_info(rtwdev, "SEC_local_Register 0x9D14 =0x%08x\n", +- rtw89_read32(rtwdev, R_AX_SEC_CAM_RDATA)); +- rtw89_info(rtwdev, "SEC_local_Register 0x9D18 =0x%08x\n", +- rtw89_read32(rtwdev, R_AX_SEC_CAM_WDATA)); +- rtw89_info(rtwdev, "SEC_local_Register 0x9D20 =0x%08x\n", +- rtw89_read32(rtwdev, R_AX_SEC_TX_DEBUG)); +- rtw89_info(rtwdev, "SEC_local_Register 0x9D24 =0x%08x\n", +- rtw89_read32(rtwdev, R_AX_SEC_RX_DEBUG)); +- rtw89_info(rtwdev, "SEC_local_Register 0x9D28 =0x%08x\n", +- rtw89_read32(rtwdev, R_AX_SEC_TRX_PKT_CNT)); +- rtw89_info(rtwdev, "SEC_local_Register 0x9D2C =0x%08x\n", +- rtw89_read32(rtwdev, R_AX_SEC_TRX_BLK_CNT)); ++ if (chip->chip_id == RTL8852C) { ++ rtw89_info(rtwdev, "R_AX_SEC_ERR_IMR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_SEC_ERROR_FLAG_IMR)); ++ rtw89_info(rtwdev, "R_AX_SEC_ERR_ISR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_SEC_ERROR_FLAG)); ++ rtw89_info(rtwdev, "R_AX_SEC_ENG_CTRL=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_SEC_ENG_CTRL)); ++ rtw89_info(rtwdev, "R_AX_SEC_MPDU_PROC=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_SEC_MPDU_PROC)); ++ rtw89_info(rtwdev, "R_AX_SEC_CAM_ACCESS=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_SEC_CAM_ACCESS)); ++ rtw89_info(rtwdev, "R_AX_SEC_CAM_RDATA=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_SEC_CAM_RDATA)); ++ rtw89_info(rtwdev, "R_AX_SEC_DEBUG1=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_SEC_DEBUG1)); ++ rtw89_info(rtwdev, "R_AX_SEC_TX_DEBUG=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_SEC_TX_DEBUG)); ++ rtw89_info(rtwdev, "R_AX_SEC_RX_DEBUG=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_SEC_RX_DEBUG)); ++ ++ rtw89_write32_mask(rtwdev, R_AX_DBG_CTRL, ++ B_AX_DBG_SEL0, 0x8B); ++ rtw89_write32_mask(rtwdev, R_AX_DBG_CTRL, ++ B_AX_DBG_SEL1, 0x8B); ++ rtw89_write32_mask(rtwdev, R_AX_SYS_STATUS1, ++ B_AX_SEL_0XC0_MASK, 1); ++ for (i = 0; i < 0x10; i++) { ++ rtw89_write32_mask(rtwdev, R_AX_SEC_ENG_CTRL, ++ B_AX_SEC_DBG_PORT_FIELD_MASK, i); ++ rtw89_info(rtwdev, "sel=%x,R_AX_SEC_DEBUG2=0x%08x\n", ++ i, rtw89_read32(rtwdev, R_AX_SEC_DEBUG2)); ++ } ++ } else { ++ rtw89_info(rtwdev, "R_AX_SEC_ERR_IMR_ISR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_SEC_DEBUG)); ++ rtw89_info(rtwdev, "R_AX_SEC_ENG_CTRL=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_SEC_ENG_CTRL)); ++ rtw89_info(rtwdev, "R_AX_SEC_MPDU_PROC=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_SEC_MPDU_PROC)); ++ rtw89_info(rtwdev, "R_AX_SEC_CAM_ACCESS=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_SEC_CAM_ACCESS)); ++ rtw89_info(rtwdev, "R_AX_SEC_CAM_RDATA=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_SEC_CAM_RDATA)); ++ rtw89_info(rtwdev, "R_AX_SEC_CAM_WDATA=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_SEC_CAM_WDATA)); ++ rtw89_info(rtwdev, "R_AX_SEC_TX_DEBUG=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_SEC_TX_DEBUG)); ++ rtw89_info(rtwdev, "R_AX_SEC_RX_DEBUG=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_SEC_RX_DEBUG)); ++ rtw89_info(rtwdev, "R_AX_SEC_TRX_PKT_CNT=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_SEC_TRX_PKT_CNT)); ++ rtw89_info(rtwdev, "R_AX_SEC_TRX_BLK_CNT=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_SEC_TRX_BLK_CNT)); ++ } + } + + if (dmac_err & B_AX_MPDU_ERR_FLAG) { +- rtw89_info(rtwdev, "R_AX_MPDU_TX_ERR_IMR =0x%08x ", ++ rtw89_info(rtwdev, "R_AX_MPDU_TX_ERR_IMR=0x%08x\n", + rtw89_read32(rtwdev, R_AX_MPDU_TX_ERR_IMR)); +- rtw89_info(rtwdev, "R_AX_MPDU_TX_ERR_ISR =0x%08x\n", ++ rtw89_info(rtwdev, "R_AX_MPDU_TX_ERR_ISR=0x%08x\n", + rtw89_read32(rtwdev, R_AX_MPDU_TX_ERR_ISR)); +- rtw89_info(rtwdev, "R_AX_MPDU_RX_ERR_IMR =0x%08x ", ++ rtw89_info(rtwdev, "R_AX_MPDU_RX_ERR_IMR=0x%08x\n", + rtw89_read32(rtwdev, R_AX_MPDU_RX_ERR_IMR)); +- rtw89_info(rtwdev, "R_AX_MPDU_RX_ERR_ISR =0x%08x\n", ++ rtw89_info(rtwdev, "R_AX_MPDU_RX_ERR_ISR=0x%08x\n", + rtw89_read32(rtwdev, R_AX_MPDU_RX_ERR_ISR)); + } + + if (dmac_err & B_AX_STA_SCHEDULER_ERR_FLAG) { +- rtw89_info(rtwdev, "R_AX_STA_SCHEDULER_ERR_IMR =0x%08x ", ++ rtw89_info(rtwdev, "R_AX_STA_SCHEDULER_ERR_IMR=0x%08x\n", + rtw89_read32(rtwdev, R_AX_STA_SCHEDULER_ERR_IMR)); +- rtw89_info(rtwdev, "R_AX_STA_SCHEDULER_ERR_ISR= 0x%08x\n", ++ rtw89_info(rtwdev, "R_AX_STA_SCHEDULER_ERR_ISR=0x%08x\n", + rtw89_read32(rtwdev, R_AX_STA_SCHEDULER_ERR_ISR)); + } + + if (dmac_err & B_AX_WDE_DLE_ERR_FLAG) { +- rtw89_info(rtwdev, "R_AX_WDE_ERR_IMR=0x%08x ", ++ rtw89_info(rtwdev, "R_AX_WDE_ERR_IMR=0x%08x\n", + rtw89_read32(rtwdev, R_AX_WDE_ERR_IMR)); + rtw89_info(rtwdev, "R_AX_WDE_ERR_ISR=0x%08x\n", + rtw89_read32(rtwdev, R_AX_WDE_ERR_ISR)); +- rtw89_info(rtwdev, "R_AX_PLE_ERR_IMR=0x%08x ", ++ rtw89_info(rtwdev, "R_AX_PLE_ERR_IMR=0x%08x\n", + rtw89_read32(rtwdev, R_AX_PLE_ERR_IMR)); + rtw89_info(rtwdev, "R_AX_PLE_ERR_FLAG_ISR=0x%08x\n", + rtw89_read32(rtwdev, R_AX_PLE_ERR_FLAG_ISR)); +- dump_err_status_dispatcher(rtwdev); + } + + if (dmac_err & B_AX_TXPKTCTRL_ERR_FLAG) { +- rtw89_info(rtwdev, "R_AX_TXPKTCTL_ERR_IMR_ISR=0x%08x\n", +- rtw89_read32(rtwdev, R_AX_TXPKTCTL_ERR_IMR_ISR)); +- rtw89_info(rtwdev, "R_AX_TXPKTCTL_ERR_IMR_ISR_B1=0x%08x\n", +- rtw89_read32(rtwdev, R_AX_TXPKTCTL_ERR_IMR_ISR_B1)); ++ if (chip->chip_id == RTL8852C) { ++ rtw89_info(rtwdev, "R_AX_TXPKTCTL_B0_ERRFLAG_IMR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_TXPKTCTL_B0_ERRFLAG_IMR)); ++ rtw89_info(rtwdev, "R_AX_TXPKTCTL_B0_ERRFLAG_ISR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_TXPKTCTL_B0_ERRFLAG_ISR)); ++ rtw89_info(rtwdev, "R_AX_TXPKTCTL_B1_ERRFLAG_IMR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_TXPKTCTL_B1_ERRFLAG_IMR)); ++ rtw89_info(rtwdev, "R_AX_TXPKTCTL_B1_ERRFLAG_ISR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_TXPKTCTL_B1_ERRFLAG_ISR)); ++ } else { ++ rtw89_info(rtwdev, "R_AX_TXPKTCTL_ERR_IMR_ISR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_TXPKTCTL_ERR_IMR_ISR)); ++ rtw89_info(rtwdev, "R_AX_TXPKTCTL_ERR_IMR_ISR_B1=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_TXPKTCTL_ERR_IMR_ISR_B1)); ++ } + } + + if (dmac_err & B_AX_PLE_DLE_ERR_FLAG) { +- rtw89_info(rtwdev, "R_AX_WDE_ERR_IMR=0x%08x ", ++ rtw89_info(rtwdev, "R_AX_WDE_ERR_IMR=0x%08x\n", + rtw89_read32(rtwdev, R_AX_WDE_ERR_IMR)); + rtw89_info(rtwdev, "R_AX_WDE_ERR_ISR=0x%08x\n", + rtw89_read32(rtwdev, R_AX_WDE_ERR_ISR)); +- rtw89_info(rtwdev, "R_AX_PLE_ERR_IMR=0x%08x ", ++ rtw89_info(rtwdev, "R_AX_PLE_ERR_IMR=0x%08x\n", + rtw89_read32(rtwdev, R_AX_PLE_ERR_IMR)); + rtw89_info(rtwdev, "R_AX_PLE_ERR_FLAG_ISR=0x%08x\n", + rtw89_read32(rtwdev, R_AX_PLE_ERR_FLAG_ISR)); +@@ -391,86 +451,190 @@ static void rtw89_mac_dump_err_status(st + rtw89_read32(rtwdev, R_AX_PL_CPUQ_OP_2)); + rtw89_info(rtwdev, "R_AX_PL_CPUQ_OP_STATUS=0x%08x\n", + rtw89_read32(rtwdev, R_AX_PL_CPUQ_OP_STATUS)); +- rtw89_info(rtwdev, "R_AX_RXDMA_PKT_INFO_0=0x%08x\n", +- rtw89_read32(rtwdev, R_AX_RXDMA_PKT_INFO_0)); +- rtw89_info(rtwdev, "R_AX_RXDMA_PKT_INFO_1=0x%08x\n", +- rtw89_read32(rtwdev, R_AX_RXDMA_PKT_INFO_1)); +- rtw89_info(rtwdev, "R_AX_RXDMA_PKT_INFO_2=0x%08x\n", +- rtw89_read32(rtwdev, R_AX_RXDMA_PKT_INFO_2)); +- dump_err_status_dispatcher(rtwdev); ++ if (chip->chip_id == RTL8852C) { ++ rtw89_info(rtwdev, "R_AX_RX_CTRL0=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_RX_CTRL0)); ++ rtw89_info(rtwdev, "R_AX_RX_CTRL1=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_RX_CTRL1)); ++ rtw89_info(rtwdev, "R_AX_RX_CTRL2=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_RX_CTRL2)); ++ } else { ++ rtw89_info(rtwdev, "R_AX_RXDMA_PKT_INFO_0=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_RXDMA_PKT_INFO_0)); ++ rtw89_info(rtwdev, "R_AX_RXDMA_PKT_INFO_1=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_RXDMA_PKT_INFO_1)); ++ rtw89_info(rtwdev, "R_AX_RXDMA_PKT_INFO_2=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_RXDMA_PKT_INFO_2)); ++ } + } + + if (dmac_err & B_AX_PKTIN_ERR_FLAG) { +- rtw89_info(rtwdev, "R_AX_PKTIN_ERR_IMR =0x%08x ", +- rtw89_read32(rtwdev, R_AX_PKTIN_ERR_IMR)); +- rtw89_info(rtwdev, "R_AX_PKTIN_ERR_ISR =0x%08x\n", +- rtw89_read32(rtwdev, R_AX_PKTIN_ERR_ISR)); +- rtw89_info(rtwdev, "R_AX_PKTIN_ERR_IMR =0x%08x ", ++ rtw89_info(rtwdev, "R_AX_PKTIN_ERR_IMR=0x%08x\n", + rtw89_read32(rtwdev, R_AX_PKTIN_ERR_IMR)); +- rtw89_info(rtwdev, "R_AX_PKTIN_ERR_ISR =0x%08x\n", ++ rtw89_info(rtwdev, "R_AX_PKTIN_ERR_ISR=0x%08x\n", + rtw89_read32(rtwdev, R_AX_PKTIN_ERR_ISR)); + } + +- if (dmac_err & B_AX_DISPATCH_ERR_FLAG) +- dump_err_status_dispatcher(rtwdev); ++ if (dmac_err & B_AX_DISPATCH_ERR_FLAG) { ++ rtw89_info(rtwdev, "R_AX_HOST_DISPATCHER_ERR_IMR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_HOST_DISPATCHER_ERR_IMR)); ++ rtw89_info(rtwdev, "R_AX_HOST_DISPATCHER_ERR_ISR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_HOST_DISPATCHER_ERR_ISR)); ++ rtw89_info(rtwdev, "R_AX_CPU_DISPATCHER_ERR_IMR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_CPU_DISPATCHER_ERR_IMR)); ++ rtw89_info(rtwdev, "R_AX_CPU_DISPATCHER_ERR_ISR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_CPU_DISPATCHER_ERR_ISR)); ++ rtw89_info(rtwdev, "R_AX_OTHER_DISPATCHER_ERR_IMR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_OTHER_DISPATCHER_ERR_IMR)); ++ rtw89_info(rtwdev, "R_AX_OTHER_DISPATCHER_ERR_ISR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_OTHER_DISPATCHER_ERR_ISR)); ++ } ++ ++ if (dmac_err & B_AX_BBRPT_ERR_FLAG) { ++ if (chip->chip_id == RTL8852C) { ++ rtw89_info(rtwdev, "R_AX_BBRPT_COM_ERR_IMR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_BBRPT_COM_ERR_IMR)); ++ rtw89_info(rtwdev, "R_AX_BBRPT_COM_ERR_ISR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_BBRPT_COM_ERR_ISR)); ++ rtw89_info(rtwdev, "R_AX_BBRPT_CHINFO_ERR_ISR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_BBRPT_CHINFO_ERR_ISR)); ++ rtw89_info(rtwdev, "R_AX_BBRPT_CHINFO_ERR_IMR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_BBRPT_CHINFO_ERR_IMR)); ++ rtw89_info(rtwdev, "R_AX_BBRPT_DFS_ERR_IMR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_BBRPT_DFS_ERR_IMR)); ++ rtw89_info(rtwdev, "R_AX_BBRPT_DFS_ERR_ISR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_BBRPT_DFS_ERR_ISR)); ++ } else { ++ rtw89_info(rtwdev, "R_AX_BBRPT_COM_ERR_IMR_ISR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_BBRPT_COM_ERR_IMR_ISR)); ++ rtw89_info(rtwdev, "R_AX_BBRPT_CHINFO_ERR_ISR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_BBRPT_CHINFO_ERR_ISR)); ++ rtw89_info(rtwdev, "R_AX_BBRPT_CHINFO_ERR_IMR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_BBRPT_CHINFO_ERR_IMR)); ++ rtw89_info(rtwdev, "R_AX_BBRPT_DFS_ERR_IMR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_BBRPT_DFS_ERR_IMR)); ++ rtw89_info(rtwdev, "R_AX_BBRPT_DFS_ERR_ISR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_BBRPT_DFS_ERR_ISR)); ++ } ++ } + +- if (dmac_err & B_AX_DLE_CPUIO_ERR_FLAG) { +- rtw89_info(rtwdev, "R_AX_CPUIO_ERR_IMR=0x%08x ", +- rtw89_read32(rtwdev, R_AX_CPUIO_ERR_IMR)); +- rtw89_info(rtwdev, "R_AX_CPUIO_ERR_ISR=0x%08x\n", +- rtw89_read32(rtwdev, R_AX_CPUIO_ERR_ISR)); ++ if (dmac_err & B_AX_HAXIDMA_ERR_FLAG && chip->chip_id == RTL8852C) { ++ rtw89_info(rtwdev, "R_AX_HAXIDMA_ERR_IMR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_HAXI_IDCT_MSK)); ++ rtw89_info(rtwdev, "R_AX_HAXIDMA_ERR_ISR=0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_HAXI_IDCT)); + } ++} + +- if (dmac_err & BIT(11)) { +- rtw89_info(rtwdev, "R_AX_BBRPT_COM_ERR_IMR_ISR=0x%08x\n", +- rtw89_read32(rtwdev, R_AX_BBRPT_COM_ERR_IMR_ISR)); ++static void rtw89_mac_dump_cmac_err_status(struct rtw89_dev *rtwdev, ++ u8 band) ++{ ++ const struct rtw89_chip_info *chip = rtwdev->chip; ++ u32 offset = 0; ++ u32 cmac_err; ++ int ret; ++ ++ ret = rtw89_mac_check_mac_en(rtwdev, band, RTW89_CMAC_SEL); ++ if (ret) { ++ if (band) ++ rtw89_warn(rtwdev, "[CMAC] : CMAC1 not enabled\n"); ++ else ++ rtw89_warn(rtwdev, "[CMAC] : CMAC0 not enabled\n"); ++ return; + } + ++ if (band) ++ offset = RTW89_MAC_AX_BAND_REG_OFFSET; ++ ++ cmac_err = rtw89_read32(rtwdev, R_AX_CMAC_ERR_ISR + offset); ++ rtw89_info(rtwdev, "R_AX_CMAC_ERR_ISR [%d]=0x%08x\n", band, ++ rtw89_read32(rtwdev, R_AX_CMAC_ERR_ISR + offset)); ++ rtw89_info(rtwdev, "R_AX_CMAC_FUNC_EN [%d]=0x%08x\n", band, ++ rtw89_read32(rtwdev, R_AX_CMAC_FUNC_EN + offset)); ++ rtw89_info(rtwdev, "R_AX_CK_EN [%d]=0x%08x\n", band, ++ rtw89_read32(rtwdev, R_AX_CK_EN + offset)); ++ + if (cmac_err & B_AX_SCHEDULE_TOP_ERR_IND) { +- rtw89_info(rtwdev, "R_AX_SCHEDULE_ERR_IMR=0x%08x ", +- rtw89_read32(rtwdev, R_AX_SCHEDULE_ERR_IMR)); +- rtw89_info(rtwdev, "R_AX_SCHEDULE_ERR_ISR=0x%04x\n", +- rtw89_read16(rtwdev, R_AX_SCHEDULE_ERR_ISR)); ++ rtw89_info(rtwdev, "R_AX_SCHEDULE_ERR_IMR [%d]=0x%08x\n", band, ++ rtw89_read32(rtwdev, R_AX_SCHEDULE_ERR_IMR + offset)); ++ rtw89_info(rtwdev, "R_AX_SCHEDULE_ERR_ISR [%d]=0x%08x\n", band, ++ rtw89_read32(rtwdev, R_AX_SCHEDULE_ERR_ISR + offset)); + } + + if (cmac_err & B_AX_PTCL_TOP_ERR_IND) { +- rtw89_info(rtwdev, "R_AX_PTCL_IMR0=0x%08x ", +- rtw89_read32(rtwdev, R_AX_PTCL_IMR0)); +- rtw89_info(rtwdev, "R_AX_PTCL_ISR0=0x%08x\n", +- rtw89_read32(rtwdev, R_AX_PTCL_ISR0)); ++ rtw89_info(rtwdev, "R_AX_PTCL_IMR0 [%d]=0x%08x\n", band, ++ rtw89_read32(rtwdev, R_AX_PTCL_IMR0 + offset)); ++ rtw89_info(rtwdev, "R_AX_PTCL_ISR0 [%d]=0x%08x\n", band, ++ rtw89_read32(rtwdev, R_AX_PTCL_ISR0 + offset)); + } + + if (cmac_err & B_AX_DMA_TOP_ERR_IND) { +- rtw89_info(rtwdev, "R_AX_DLE_CTRL=0x%08x\n", +- rtw89_read32(rtwdev, R_AX_DLE_CTRL)); ++ if (chip->chip_id == RTL8852C) { ++ rtw89_info(rtwdev, "R_AX_RX_ERR_FLAG [%d]=0x%08x\n", band, ++ rtw89_read32(rtwdev, R_AX_RX_ERR_FLAG + offset)); ++ rtw89_info(rtwdev, "R_AX_RX_ERR_FLAG_IMR [%d]=0x%08x\n", band, ++ rtw89_read32(rtwdev, R_AX_RX_ERR_FLAG_IMR + offset)); ++ } else { ++ rtw89_info(rtwdev, "R_AX_DLE_CTRL [%d]=0x%08x\n", band, ++ rtw89_read32(rtwdev, R_AX_DLE_CTRL + offset)); ++ } + } + +- if (cmac_err & B_AX_PHYINTF_ERR_IND) { +- rtw89_info(rtwdev, "R_AX_PHYINFO_ERR_IMR=0x%08x\n", +- rtw89_read32(rtwdev, R_AX_PHYINFO_ERR_IMR)); ++ if (cmac_err & B_AX_DMA_TOP_ERR_IND || cmac_err & B_AX_WMAC_RX_ERR_IND) { ++ if (chip->chip_id == RTL8852C) { ++ rtw89_info(rtwdev, "R_AX_PHYINFO_ERR_ISR [%d]=0x%08x\n", band, ++ rtw89_read32(rtwdev, R_AX_PHYINFO_ERR_ISR + offset)); ++ rtw89_info(rtwdev, "R_AX_PHYINFO_ERR_IMR [%d]=0x%08x\n", band, ++ rtw89_read32(rtwdev, R_AX_PHYINFO_ERR_IMR + offset)); ++ } else { ++ rtw89_info(rtwdev, "R_AX_PHYINFO_ERR_IMR [%d]=0x%08x\n", band, ++ rtw89_read32(rtwdev, R_AX_PHYINFO_ERR_IMR + offset)); ++ } + } + + if (cmac_err & B_AX_TXPWR_CTRL_ERR_IND) { +- rtw89_info(rtwdev, "R_AX_TXPWR_IMR=0x%08x ", +- rtw89_read32(rtwdev, R_AX_TXPWR_IMR)); +- rtw89_info(rtwdev, "R_AX_TXPWR_ISR=0x%08x\n", +- rtw89_read32(rtwdev, R_AX_TXPWR_ISR)); +- } +- +- if (cmac_err & B_AX_WMAC_RX_ERR_IND) { +- rtw89_info(rtwdev, "R_AX_DBGSEL_TRXPTCL=0x%08x ", +- rtw89_read32(rtwdev, R_AX_DBGSEL_TRXPTCL)); +- rtw89_info(rtwdev, "R_AX_PHYINFO_ERR_ISR=0x%08x\n", +- rtw89_read32(rtwdev, R_AX_PHYINFO_ERR_ISR)); ++ rtw89_info(rtwdev, "R_AX_TXPWR_IMR [%d]=0x%08x\n", band, ++ rtw89_read32(rtwdev, R_AX_TXPWR_IMR + offset)); ++ rtw89_info(rtwdev, "R_AX_TXPWR_ISR [%d]=0x%08x\n", band, ++ rtw89_read32(rtwdev, R_AX_TXPWR_ISR + offset)); + } + + if (cmac_err & B_AX_WMAC_TX_ERR_IND) { +- rtw89_info(rtwdev, "R_AX_TMAC_ERR_IMR_ISR=0x%08x ", +- rtw89_read32(rtwdev, R_AX_TMAC_ERR_IMR_ISR)); +- rtw89_info(rtwdev, "R_AX_DBGSEL_TRXPTCL=0x%08x\n", +- rtw89_read32(rtwdev, R_AX_DBGSEL_TRXPTCL)); ++ if (chip->chip_id == RTL8852C) { ++ rtw89_info(rtwdev, "R_AX_TRXPTCL_ERROR_INDICA [%d]=0x%08x\n", band, ++ rtw89_read32(rtwdev, R_AX_TRXPTCL_ERROR_INDICA + offset)); ++ rtw89_info(rtwdev, "R_AX_TRXPTCL_ERROR_INDICA_MASK [%d]=0x%08x\n", band, ++ rtw89_read32(rtwdev, R_AX_TRXPTCL_ERROR_INDICA_MASK + offset)); ++ } else { ++ rtw89_info(rtwdev, "R_AX_TMAC_ERR_IMR_ISR [%d]=0x%08x\n", band, ++ rtw89_read32(rtwdev, R_AX_TMAC_ERR_IMR_ISR + offset)); ++ } ++ rtw89_info(rtwdev, "R_AX_DBGSEL_TRXPTCL [%d]=0x%08x\n", band, ++ rtw89_read32(rtwdev, R_AX_DBGSEL_TRXPTCL + offset)); + } + ++ rtw89_info(rtwdev, "R_AX_CMAC_ERR_IMR [%d]=0x%08x\n", band, ++ rtw89_read32(rtwdev, R_AX_CMAC_ERR_IMR + offset)); ++} ++ ++static void rtw89_mac_dump_err_status(struct rtw89_dev *rtwdev, ++ enum mac_ax_err_info err) ++{ ++ if (err != MAC_AX_ERR_L1_ERR_DMAC && ++ err != MAC_AX_ERR_L0_PROMOTE_TO_L1 && ++ err != MAC_AX_ERR_L0_ERR_CMAC0 && ++ err != MAC_AX_ERR_L0_ERR_CMAC1) ++ return; ++ ++ rtw89_info(rtwdev, "--->\nerr=0x%x\n", err); ++ rtw89_info(rtwdev, "R_AX_SER_DBG_INFO =0x%08x\n", ++ rtw89_read32(rtwdev, R_AX_SER_DBG_INFO)); ++ ++ rtw89_mac_dump_dmac_err_status(rtwdev); ++ rtw89_mac_dump_cmac_err_status(rtwdev, RTW89_MAC_0); ++ if (rtwdev->dbcc_en) ++ rtw89_mac_dump_cmac_err_status(rtwdev, RTW89_MAC_1); ++ + rtwdev->hci.ops->dump_err_status(rtwdev); + + if (err == MAC_AX_ERR_L0_PROMOTE_TO_L1) +@@ -1304,6 +1468,8 @@ const struct rtw89_mac_size_set rtw89_ma + .ple_qt47 = {525, 0, 32, 20, 1034, 13, 1199, 0, 1053, 62, 160, 1037,}, + /* PCIE 64 */ + .ple_qt58 = {147, 0, 16, 20, 157, 13, 229, 0, 172, 14, 24, 0,}, ++ /* 8852A PCIE WOW */ ++ .ple_qt_52a_wow = {264, 0, 32, 20, 64, 13, 1005, 0, 64, 128, 120,}, + }; + EXPORT_SYMBOL(rtw89_mac_size); + +@@ -1331,6 +1497,60 @@ static const struct rtw89_dle_mem *get_d + return cfg; + } + ++static bool mac_is_txq_empty(struct rtw89_dev *rtwdev) ++{ ++ struct rtw89_mac_dle_dfi_qempty qempty; ++ u32 qnum, qtmp, val32, msk32; ++ int i, j, ret; ++ ++ qnum = rtwdev->chip->wde_qempty_acq_num; ++ qempty.dle_type = DLE_CTRL_TYPE_WDE; ++ ++ for (i = 0; i < qnum; i++) { ++ qempty.grpsel = i; ++ ret = dle_dfi_qempty(rtwdev, &qempty); ++ if (ret) { ++ rtw89_warn(rtwdev, "dle dfi acq empty %d\n", ret); ++ return false; ++ } ++ qtmp = qempty.qempty; ++ for (j = 0 ; j < QEMP_ACQ_GRP_MACID_NUM; j++) { ++ val32 = FIELD_GET(QEMP_ACQ_GRP_QSEL_MASK, qtmp); ++ if (val32 != QEMP_ACQ_GRP_QSEL_MASK) ++ return false; ++ qtmp >>= QEMP_ACQ_GRP_QSEL_SH; ++ } ++ } ++ ++ qempty.grpsel = rtwdev->chip->wde_qempty_mgq_sel; ++ ret = dle_dfi_qempty(rtwdev, &qempty); ++ if (ret) { ++ rtw89_warn(rtwdev, "dle dfi mgq empty %d\n", ret); ++ return false; ++ } ++ msk32 = B_CMAC0_MGQ_NORMAL | B_CMAC0_MGQ_NO_PWRSAV | B_CMAC0_CPUMGQ; ++ if ((qempty.qempty & msk32) != msk32) ++ return false; ++ ++ if (rtwdev->dbcc_en) { ++ msk32 |= B_CMAC1_MGQ_NORMAL | B_CMAC1_MGQ_NO_PWRSAV | B_CMAC1_CPUMGQ; ++ if ((qempty.qempty & msk32) != msk32) ++ return false; ++ } ++ ++ msk32 = B_AX_WDE_EMPTY_QTA_DMAC_WLAN_CPU | B_AX_WDE_EMPTY_QTA_DMAC_DATA_CPU | ++ B_AX_PLE_EMPTY_QTA_DMAC_WLAN_CPU | B_AX_PLE_EMPTY_QTA_DMAC_H2C | ++ B_AX_WDE_EMPTY_QUE_OTHERS | B_AX_PLE_EMPTY_QUE_DMAC_MPDU_TX | ++ B_AX_WDE_EMPTY_QTA_DMAC_CPUIO | B_AX_PLE_EMPTY_QTA_DMAC_CPUIO | ++ B_AX_WDE_EMPTY_QUE_DMAC_PKTIN | B_AX_WDE_EMPTY_QTA_DMAC_HIF | ++ B_AX_PLE_EMPTY_QUE_DMAC_SEC_TX | B_AX_WDE_EMPTY_QTA_DMAC_PKTIN | ++ B_AX_PLE_EMPTY_QTA_DMAC_B0_TXPL | B_AX_PLE_EMPTY_QTA_DMAC_B1_TXPL | ++ B_AX_PLE_EMPTY_QTA_DMAC_MPDU_TX; ++ val32 = rtw89_read32(rtwdev, R_AX_DLE_EMPTY0); ++ ++ return (val32 & msk32) == msk32; ++} ++ + static inline u32 dle_used_size(const struct rtw89_dle_size *wde, + const struct rtw89_dle_size *ple) + { +@@ -1474,8 +1694,48 @@ static void ple_quota_cfg(struct rtw89_d + SET_QUOTA(tx_rpt, PLE, 11); + } + ++int rtw89_mac_resize_ple_rx_quota(struct rtw89_dev *rtwdev, bool wow) ++{ ++ const struct rtw89_ple_quota *min_cfg, *max_cfg; ++ const struct rtw89_dle_mem *cfg; ++ u32 val; ++ ++ if (rtwdev->chip->chip_id == RTL8852C) ++ return 0; ++ ++ if (rtwdev->mac.qta_mode != RTW89_QTA_SCC) { ++ rtw89_err(rtwdev, "[ERR]support SCC mode only\n"); ++ return -EINVAL; ++ } ++ ++ if (wow) ++ cfg = get_dle_mem_cfg(rtwdev, RTW89_QTA_WOW); ++ else ++ cfg = get_dle_mem_cfg(rtwdev, RTW89_QTA_SCC); ++ if (!cfg) { ++ rtw89_err(rtwdev, "[ERR]get_dle_mem_cfg\n"); ++ return -EINVAL; ++ } ++ ++ min_cfg = cfg->ple_min_qt; ++ max_cfg = cfg->ple_max_qt; ++ SET_QUOTA(cma0_dma, PLE, 6); ++ SET_QUOTA(cma1_dma, PLE, 7); ++ ++ return 0; ++} + #undef SET_QUOTA + ++void rtw89_mac_hw_mgnt_sec(struct rtw89_dev *rtwdev, bool enable) ++{ ++ u32 msk32 = B_AX_UC_MGNT_DEC | B_AX_BMC_MGNT_DEC; ++ ++ if (enable) ++ rtw89_write32_set(rtwdev, R_AX_SEC_ENG_CTRL, msk32); ++ else ++ rtw89_write32_clr(rtwdev, R_AX_SEC_ENG_CTRL, msk32); ++} ++ + static void dle_quota_cfg(struct rtw89_dev *rtwdev, + const struct rtw89_dle_mem *cfg, + u16 ext_wde_min_qt_wcpu) +@@ -1825,10 +2085,10 @@ static int scheduler_init(struct rtw89_d + return 0; + } + +-static int rtw89_mac_typ_fltr_opt(struct rtw89_dev *rtwdev, +- enum rtw89_machdr_frame_type type, +- enum rtw89_mac_fwd_target fwd_target, +- u8 mac_idx) ++int rtw89_mac_typ_fltr_opt(struct rtw89_dev *rtwdev, ++ enum rtw89_machdr_frame_type type, ++ enum rtw89_mac_fwd_target fwd_target, ++ u8 mac_idx) + { + u32 reg; + u32 val; +@@ -3112,7 +3372,7 @@ static void rtw89_disable_fw_watchdog(st + rtw89_mac_mem_write(rtwdev, R_AX_WDT_STATUS, val32, RTW89_MAC_MEM_CPU_LOCAL); + } + +-static void rtw89_mac_disable_cpu(struct rtw89_dev *rtwdev) ++void rtw89_mac_disable_cpu(struct rtw89_dev *rtwdev) + { + clear_bit(RTW89_FLAG_FW_RDY, rtwdev->flags); + +@@ -3127,8 +3387,7 @@ static void rtw89_mac_disable_cpu(struct + rtw89_write32_set(rtwdev, R_AX_PLATFORM_ENABLE, B_AX_PLATFORM_EN); + } + +-static int rtw89_mac_enable_cpu(struct rtw89_dev *rtwdev, u8 boot_reason, +- bool dlfw) ++int rtw89_mac_enable_cpu(struct rtw89_dev *rtwdev, u8 boot_reason, bool dlfw) + { + u32 val; + int ret; +@@ -3267,11 +3526,6 @@ int rtw89_mac_partial_init(struct rtw89_ + return ret; + } + +- rtw89_mac_disable_cpu(rtwdev); +- ret = rtw89_mac_enable_cpu(rtwdev, 0, true); +- if (ret) +- return ret; +- + ret = rtw89_fw_download(rtwdev, RTW89_FW_NORMAL); + if (ret) + return ret; +@@ -3346,6 +3600,13 @@ int rtw89_mac_set_macid_pause(struct rtw + u8 grp = macid >> 5; + int ret; + ++ /* If this is called by change_interface() in the case of P2P, it could ++ * be power-off, so ignore this operation. ++ */ ++ if (test_bit(RTW89_FLAG_CHANGING_INTERFACE, rtwdev->flags) && ++ !test_bit(RTW89_FLAG_POWERON, rtwdev->flags)) ++ return 0; ++ + ret = rtw89_mac_check_mac_en(rtwdev, RTW89_MAC_0, RTW89_CMAC_SEL); + if (ret) + return ret; +@@ -3616,11 +3877,16 @@ static void rtw89_mac_port_cfg_hiq_drop( + } + + static void rtw89_mac_port_cfg_func_en(struct rtw89_dev *rtwdev, +- struct rtw89_vif *rtwvif) ++ struct rtw89_vif *rtwvif, bool enable) + { + const struct rtw89_port_reg *p = &rtw_port_base; + +- rtw89_write32_port_set(rtwdev, rtwvif, p->port_cfg, B_AX_PORT_FUNC_EN); ++ if (enable) ++ rtw89_write32_port_set(rtwdev, rtwvif, p->port_cfg, ++ B_AX_PORT_FUNC_EN); ++ else ++ rtw89_write32_port_clr(rtwdev, rtwvif, p->port_cfg, ++ B_AX_PORT_FUNC_EN); + } + + static void rtw89_mac_port_cfg_bcn_early(struct rtw89_dev *rtwdev, +@@ -3652,6 +3918,49 @@ static void rtw89_mac_port_cfg_tbtt_shif + B_AX_TBTT_SHIFT_OFST_MASK, val); + } + ++static void rtw89_mac_port_tsf_sync(struct rtw89_dev *rtwdev, ++ struct rtw89_vif *rtwvif, ++ struct rtw89_vif *rtwvif_src, u8 offset, ++ int *n_offset) ++{ ++ u32 val, reg; ++ ++ if (rtwvif->net_type != RTW89_NET_TYPE_AP_MODE || rtwvif == rtwvif_src) ++ return; ++ ++ /* adjust offset randomly to avoid beacon conflict */ ++ offset = offset - offset / 4 + get_random_u32() % (offset / 2); ++ val = RTW89_PORT_OFFSET_MS_TO_32US((*n_offset)++, offset); ++ reg = rtw89_mac_reg_by_idx(R_AX_PORT0_TSF_SYNC + rtwvif->port * 4, ++ rtwvif->mac_idx); ++ ++ rtw89_write32_mask(rtwdev, reg, B_AX_SYNC_PORT_SRC, rtwvif_src->port); ++ rtw89_write32_mask(rtwdev, reg, B_AX_SYNC_PORT_OFFSET_VAL, val); ++ rtw89_write32_set(rtwdev, reg, B_AX_SYNC_NOW); ++} ++ ++static void rtw89_mac_port_tsf_resync_all(struct rtw89_dev *rtwdev) ++{ ++ struct rtw89_vif *src = NULL, *tmp; ++ u8 offset = 100, vif_aps = 0; ++ int n_offset = 1; ++ ++ rtw89_for_each_rtwvif(rtwdev, tmp) { ++ if (!src || tmp->net_type == RTW89_NET_TYPE_INFRA) ++ src = tmp; ++ if (tmp->net_type == RTW89_NET_TYPE_AP_MODE) ++ vif_aps++; ++ } ++ ++ if (vif_aps == 0) ++ return; ++ ++ offset /= (vif_aps + 1); ++ ++ rtw89_for_each_rtwvif(rtwdev, tmp) ++ rtw89_mac_port_tsf_sync(rtwdev, tmp, src, offset, &n_offset); ++} ++ + int rtw89_mac_vif_init(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif) + { + int ret; +@@ -3671,6 +3980,10 @@ int rtw89_mac_vif_init(struct rtw89_dev + if (ret) + return ret; + ++ ret = rtw89_fw_h2c_join_info(rtwdev, rtwvif, NULL, true); ++ if (ret) ++ return ret; ++ + ret = rtw89_cam_init(rtwdev, rtwvif); + if (ret) + return ret; +@@ -3729,7 +4042,8 @@ int rtw89_mac_port_update(struct rtw89_d + rtw89_mac_port_cfg_tbtt_shift(rtwdev, rtwvif); + rtw89_mac_port_cfg_bss_color(rtwdev, rtwvif); + rtw89_mac_port_cfg_mbssid(rtwdev, rtwvif); +- rtw89_mac_port_cfg_func_en(rtwdev, rtwvif); ++ rtw89_mac_port_cfg_func_en(rtwdev, rtwvif, true); ++ rtw89_mac_port_tsf_resync_all(rtwdev); + fsleep(BCN_ERLY_SET_DLY); + rtw89_mac_port_cfg_bcn_early(rtwdev, rtwvif); + +@@ -3780,6 +4094,11 @@ void rtw89_mac_set_he_obss_narrow_bw_ru( + rtw89_write32_set(rtwdev, reg, B_AX_RXTRIG_RU26_DIS); + } + ++void rtw89_mac_stop_ap(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif) ++{ ++ rtw89_mac_port_cfg_func_en(rtwdev, rtwvif, false); ++} ++ + int rtw89_mac_add_vif(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif) + { + int ret; +@@ -3926,6 +4245,164 @@ rtw89_mac_c2h_tsf32_toggle_rpt(struct rt + { + } + ++static void ++rtw89_mac_c2h_mcc_rcv_ack(struct rtw89_dev *rtwdev, struct sk_buff *c2h, u32 len) ++{ ++ u8 group = RTW89_GET_MAC_C2H_MCC_RCV_ACK_GROUP(c2h->data); ++ u8 func = RTW89_GET_MAC_C2H_MCC_RCV_ACK_H2C_FUNC(c2h->data); ++ ++ switch (func) { ++ case H2C_FUNC_ADD_MCC: ++ case H2C_FUNC_START_MCC: ++ case H2C_FUNC_STOP_MCC: ++ case H2C_FUNC_DEL_MCC_GROUP: ++ case H2C_FUNC_RESET_MCC_GROUP: ++ case H2C_FUNC_MCC_REQ_TSF: ++ case H2C_FUNC_MCC_MACID_BITMAP: ++ case H2C_FUNC_MCC_SYNC: ++ case H2C_FUNC_MCC_SET_DURATION: ++ break; ++ default: ++ rtw89_debug(rtwdev, RTW89_DBG_FW, ++ "invalid MCC C2H RCV ACK: func %d\n", func); ++ return; ++ } ++ ++ rtw89_debug(rtwdev, RTW89_DBG_FW, ++ "MCC C2H RCV ACK: group %d, func %d\n", group, func); ++} ++ ++static void ++rtw89_mac_c2h_mcc_req_ack(struct rtw89_dev *rtwdev, struct sk_buff *c2h, u32 len) ++{ ++ u8 group = RTW89_GET_MAC_C2H_MCC_REQ_ACK_GROUP(c2h->data); ++ u8 func = RTW89_GET_MAC_C2H_MCC_REQ_ACK_H2C_FUNC(c2h->data); ++ u8 retcode = RTW89_GET_MAC_C2H_MCC_REQ_ACK_H2C_RETURN(c2h->data); ++ struct rtw89_completion_data data = {}; ++ unsigned int cond; ++ bool next = false; ++ ++ switch (func) { ++ case H2C_FUNC_MCC_REQ_TSF: ++ next = true; ++ break; ++ case H2C_FUNC_MCC_MACID_BITMAP: ++ case H2C_FUNC_MCC_SYNC: ++ case H2C_FUNC_MCC_SET_DURATION: ++ break; ++ case H2C_FUNC_ADD_MCC: ++ case H2C_FUNC_START_MCC: ++ case H2C_FUNC_STOP_MCC: ++ case H2C_FUNC_DEL_MCC_GROUP: ++ case H2C_FUNC_RESET_MCC_GROUP: ++ default: ++ rtw89_debug(rtwdev, RTW89_DBG_FW, ++ "invalid MCC C2H REQ ACK: func %d\n", func); ++ return; ++ } ++ ++ rtw89_debug(rtwdev, RTW89_DBG_FW, ++ "MCC C2H REQ ACK: group %d, func %d, return code %d\n", ++ group, func, retcode); ++ ++ if (!retcode && next) ++ return; ++ ++ data.err = !!retcode; ++ cond = RTW89_MCC_WAIT_COND(group, func); ++ rtw89_complete_cond(&rtwdev->mcc.wait, cond, &data); ++} ++ ++static void ++rtw89_mac_c2h_mcc_tsf_rpt(struct rtw89_dev *rtwdev, struct sk_buff *c2h, u32 len) ++{ ++ u8 group = RTW89_GET_MAC_C2H_MCC_TSF_RPT_GROUP(c2h->data); ++ struct rtw89_completion_data data = {}; ++ struct rtw89_mac_mcc_tsf_rpt *rpt; ++ unsigned int cond; ++ ++ rpt = (struct rtw89_mac_mcc_tsf_rpt *)data.buf; ++ rpt->macid_x = RTW89_GET_MAC_C2H_MCC_TSF_RPT_MACID_X(c2h->data); ++ rpt->macid_y = RTW89_GET_MAC_C2H_MCC_TSF_RPT_MACID_Y(c2h->data); ++ rpt->tsf_x_low = RTW89_GET_MAC_C2H_MCC_TSF_RPT_TSF_LOW_X(c2h->data); ++ rpt->tsf_x_high = RTW89_GET_MAC_C2H_MCC_TSF_RPT_TSF_HIGH_X(c2h->data); ++ rpt->tsf_y_low = RTW89_GET_MAC_C2H_MCC_TSF_RPT_TSF_LOW_Y(c2h->data); ++ rpt->tsf_y_high = RTW89_GET_MAC_C2H_MCC_TSF_RPT_TSF_HIGH_Y(c2h->data); ++ ++ cond = RTW89_MCC_WAIT_COND(group, H2C_FUNC_MCC_REQ_TSF); ++ rtw89_complete_cond(&rtwdev->mcc.wait, cond, &data); ++} ++ ++static void ++rtw89_mac_c2h_mcc_status_rpt(struct rtw89_dev *rtwdev, struct sk_buff *c2h, u32 len) ++{ ++ u8 group = RTW89_GET_MAC_C2H_MCC_STATUS_RPT_GROUP(c2h->data); ++ u8 macid = RTW89_GET_MAC_C2H_MCC_STATUS_RPT_MACID(c2h->data); ++ u8 status = RTW89_GET_MAC_C2H_MCC_STATUS_RPT_STATUS(c2h->data); ++ u32 tsf_low = RTW89_GET_MAC_C2H_MCC_STATUS_RPT_TSF_LOW(c2h->data); ++ u32 tsf_high = RTW89_GET_MAC_C2H_MCC_STATUS_RPT_TSF_HIGH(c2h->data); ++ struct rtw89_completion_data data = {}; ++ unsigned int cond; ++ bool rsp = true; ++ bool err; ++ u8 func; ++ ++ switch (status) { ++ case RTW89_MAC_MCC_ADD_ROLE_OK: ++ case RTW89_MAC_MCC_ADD_ROLE_FAIL: ++ func = H2C_FUNC_ADD_MCC; ++ err = status == RTW89_MAC_MCC_ADD_ROLE_FAIL; ++ break; ++ case RTW89_MAC_MCC_START_GROUP_OK: ++ case RTW89_MAC_MCC_START_GROUP_FAIL: ++ func = H2C_FUNC_START_MCC; ++ err = status == RTW89_MAC_MCC_START_GROUP_FAIL; ++ break; ++ case RTW89_MAC_MCC_STOP_GROUP_OK: ++ case RTW89_MAC_MCC_STOP_GROUP_FAIL: ++ func = H2C_FUNC_STOP_MCC; ++ err = status == RTW89_MAC_MCC_STOP_GROUP_FAIL; ++ break; ++ case RTW89_MAC_MCC_DEL_GROUP_OK: ++ case RTW89_MAC_MCC_DEL_GROUP_FAIL: ++ func = H2C_FUNC_DEL_MCC_GROUP; ++ err = status == RTW89_MAC_MCC_DEL_GROUP_FAIL; ++ break; ++ case RTW89_MAC_MCC_RESET_GROUP_OK: ++ case RTW89_MAC_MCC_RESET_GROUP_FAIL: ++ func = H2C_FUNC_RESET_MCC_GROUP; ++ err = status == RTW89_MAC_MCC_RESET_GROUP_FAIL; ++ break; ++ case RTW89_MAC_MCC_SWITCH_CH_OK: ++ case RTW89_MAC_MCC_SWITCH_CH_FAIL: ++ case RTW89_MAC_MCC_TXNULL0_OK: ++ case RTW89_MAC_MCC_TXNULL0_FAIL: ++ case RTW89_MAC_MCC_TXNULL1_OK: ++ case RTW89_MAC_MCC_TXNULL1_FAIL: ++ case RTW89_MAC_MCC_SWITCH_EARLY: ++ case RTW89_MAC_MCC_TBTT: ++ case RTW89_MAC_MCC_DURATION_START: ++ case RTW89_MAC_MCC_DURATION_END: ++ rsp = false; ++ break; ++ default: ++ rtw89_debug(rtwdev, RTW89_DBG_FW, ++ "invalid MCC C2H STS RPT: status %d\n", status); ++ return; ++ } ++ ++ rtw89_debug(rtwdev, RTW89_DBG_FW, ++ "MCC C2H STS RPT: group %d, macid %d, status %d, tsf {%d, %d}\n", ++ group, macid, status, tsf_low, tsf_high); ++ ++ if (!rsp) ++ return; ++ ++ data.err = err; ++ cond = RTW89_MCC_WAIT_COND(group, func); ++ rtw89_complete_cond(&rtwdev->mcc.wait, cond, &data); ++} ++ + static + void (* const rtw89_mac_c2h_ofld_handler[])(struct rtw89_dev *rtwdev, + struct sk_buff *c2h, u32 len) = { +@@ -3947,6 +4424,25 @@ void (* const rtw89_mac_c2h_info_handler + [RTW89_MAC_C2H_FUNC_BCN_CNT] = rtw89_mac_c2h_bcn_cnt, + }; + ++static ++void (* const rtw89_mac_c2h_mcc_handler[])(struct rtw89_dev *rtwdev, ++ struct sk_buff *c2h, u32 len) = { ++ [RTW89_MAC_C2H_FUNC_MCC_RCV_ACK] = rtw89_mac_c2h_mcc_rcv_ack, ++ [RTW89_MAC_C2H_FUNC_MCC_REQ_ACK] = rtw89_mac_c2h_mcc_req_ack, ++ [RTW89_MAC_C2H_FUNC_MCC_TSF_RPT] = rtw89_mac_c2h_mcc_tsf_rpt, ++ [RTW89_MAC_C2H_FUNC_MCC_STATUS_RPT] = rtw89_mac_c2h_mcc_status_rpt, ++}; ++ ++bool rtw89_mac_c2h_chk_atomic(struct rtw89_dev *rtwdev, u8 class, u8 func) ++{ ++ switch (class) { ++ default: ++ return false; ++ case RTW89_MAC_C2H_CLASS_MCC: ++ return true; ++ } ++} ++ + void rtw89_mac_c2h_handle(struct rtw89_dev *rtwdev, struct sk_buff *skb, + u32 len, u8 class, u8 func) + { +@@ -3962,6 +4458,10 @@ void rtw89_mac_c2h_handle(struct rtw89_d + if (func < RTW89_MAC_C2H_FUNC_OFLD_MAX) + handler = rtw89_mac_c2h_ofld_handler[func]; + break; ++ case RTW89_MAC_C2H_CLASS_MCC: ++ if (func < NUM_OF_RTW89_MAC_C2H_FUNC_MCC) ++ handler = rtw89_mac_c2h_mcc_handler[func]; ++ break; + case RTW89_MAC_C2H_CLASS_FWDBG: + return; + default: +@@ -4817,6 +5317,7 @@ int rtw89_mac_read_xtal_si(struct rtw89_ + + return 0; + } ++EXPORT_SYMBOL(rtw89_mac_read_xtal_si); + + static + void rtw89_mac_pkt_drop_sta(struct rtw89_dev *rtwdev, struct rtw89_sta *rtwsta) +@@ -4862,3 +5363,24 @@ void rtw89_mac_pkt_drop_vif(struct rtw89 + rtw89_mac_pkt_drop_vif_iter, + rtwvif); + } ++ ++int rtw89_mac_ptk_drop_by_band_and_wait(struct rtw89_dev *rtwdev, ++ enum rtw89_mac_idx band) ++{ ++ struct rtw89_pkt_drop_params params = {0}; ++ bool empty; ++ int i, ret = 0, try_cnt = 3; ++ ++ params.mac_band = band; ++ params.sel = RTW89_PKT_DROP_SEL_BAND_ONCE; ++ ++ for (i = 0; i < try_cnt; i++) { ++ ret = read_poll_timeout(mac_is_txq_empty, empty, empty, 50, ++ 50000, false, rtwdev); ++ if (ret) ++ rtw89_fw_h2c_pkt_drop(rtwdev, ¶ms); ++ else ++ return 0; ++ } ++ return ret; ++} +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw89/mac.h linux-6.2/drivers/net/wireless/realtek/rtw89/mac.h +--- linux-6.1/drivers/net/wireless/realtek/rtw89/mac.h 2022-12-12 00:15:18.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw89/mac.h 2022-12-24 00:49:25.779376835 +0200 +@@ -168,6 +168,8 @@ enum rtw89_mac_ax_l0_to_l1_event { + MAC_AX_L0_TO_L1_EVENT_MAX = 15, + }; + ++#define RTW89_PORT_OFFSET_MS_TO_32US(n, shift_ms) ((n) * (shift_ms) * 1000 / 32) ++ + enum rtw89_mac_dbg_port_sel { + /* CMAC 0 related */ + RTW89_DBG_PORT_SEL_PTCL_C0 = 0, +@@ -211,6 +213,51 @@ enum rtw89_mac_dbg_port_sel { + RTW89_DBG_PORT_SEL_PLE_QUEMGN_QLNKTBL, + RTW89_DBG_PORT_SEL_PLE_QUEMGN_QEMPTY, + RTW89_DBG_PORT_SEL_PKTINFO, ++ /* DISPATCHER related */ ++ RTW89_DBG_PORT_SEL_DSPT_HDT_TX0, ++ RTW89_DBG_PORT_SEL_DSPT_HDT_TX1, ++ RTW89_DBG_PORT_SEL_DSPT_HDT_TX2, ++ RTW89_DBG_PORT_SEL_DSPT_HDT_TX3, ++ RTW89_DBG_PORT_SEL_DSPT_HDT_TX4, ++ RTW89_DBG_PORT_SEL_DSPT_HDT_TX5, ++ RTW89_DBG_PORT_SEL_DSPT_HDT_TX6, ++ RTW89_DBG_PORT_SEL_DSPT_HDT_TX7, ++ RTW89_DBG_PORT_SEL_DSPT_HDT_TX8, ++ RTW89_DBG_PORT_SEL_DSPT_HDT_TX9, ++ RTW89_DBG_PORT_SEL_DSPT_HDT_TXA, ++ RTW89_DBG_PORT_SEL_DSPT_HDT_TXB, ++ RTW89_DBG_PORT_SEL_DSPT_HDT_TXC, ++ RTW89_DBG_PORT_SEL_DSPT_HDT_TXD, ++ RTW89_DBG_PORT_SEL_DSPT_HDT_TXE, ++ RTW89_DBG_PORT_SEL_DSPT_HDT_TXF, ++ RTW89_DBG_PORT_SEL_DSPT_CDT_TX0, ++ RTW89_DBG_PORT_SEL_DSPT_CDT_TX1, ++ RTW89_DBG_PORT_SEL_DSPT_CDT_TX3, ++ RTW89_DBG_PORT_SEL_DSPT_CDT_TX4, ++ RTW89_DBG_PORT_SEL_DSPT_CDT_TX5, ++ RTW89_DBG_PORT_SEL_DSPT_CDT_TX6, ++ RTW89_DBG_PORT_SEL_DSPT_CDT_TX7, ++ RTW89_DBG_PORT_SEL_DSPT_CDT_TX8, ++ RTW89_DBG_PORT_SEL_DSPT_CDT_TX9, ++ RTW89_DBG_PORT_SEL_DSPT_CDT_TXA, ++ RTW89_DBG_PORT_SEL_DSPT_CDT_TXB, ++ RTW89_DBG_PORT_SEL_DSPT_CDT_TXC, ++ RTW89_DBG_PORT_SEL_DSPT_HDT_RX0, ++ RTW89_DBG_PORT_SEL_DSPT_HDT_RX1, ++ RTW89_DBG_PORT_SEL_DSPT_HDT_RX2, ++ RTW89_DBG_PORT_SEL_DSPT_HDT_RX3, ++ RTW89_DBG_PORT_SEL_DSPT_HDT_RX4, ++ RTW89_DBG_PORT_SEL_DSPT_HDT_RX5, ++ RTW89_DBG_PORT_SEL_DSPT_CDT_RX_P0, ++ RTW89_DBG_PORT_SEL_DSPT_CDT_RX_P0_0, ++ RTW89_DBG_PORT_SEL_DSPT_CDT_RX_P0_1, ++ RTW89_DBG_PORT_SEL_DSPT_CDT_RX_P0_2, ++ RTW89_DBG_PORT_SEL_DSPT_CDT_RX_P1, ++ RTW89_DBG_PORT_SEL_DSPT_STF_CTRL, ++ RTW89_DBG_PORT_SEL_DSPT_ADDR_CTRL, ++ RTW89_DBG_PORT_SEL_DSPT_WDE_INTF, ++ RTW89_DBG_PORT_SEL_DSPT_PLE_INTF, ++ RTW89_DBG_PORT_SEL_DSPT_FLOW_CTRL, + /* PCIE related */ + RTW89_DBG_PORT_SEL_PCIE_TXDMA, + RTW89_DBG_PORT_SEL_PCIE_RXDMA, +@@ -245,6 +292,8 @@ enum rtw89_mac_dbg_port_sel { + #define BCN_IE_CAM1_BASE_ADDR 0x188A0000 + #define TXD_FIFO_0_BASE_ADDR 0x18856200 + #define TXD_FIFO_1_BASE_ADDR 0x188A1080 ++#define TXD_FIFO_0_BASE_ADDR_V1 0x18856400 /* for 8852C */ ++#define TXD_FIFO_1_BASE_ADDR_V1 0x188A1080 /* for 8852C */ + #define TXDATA_FIFO_0_BASE_ADDR 0x18856000 + #define TXDATA_FIFO_1_BASE_ADDR 0x188A1000 + #define CPU_LOCAL_BASE_ADDR 0x18003000 +@@ -271,6 +320,8 @@ enum rtw89_mac_mem_sel { + RTW89_MAC_MEM_TXDATA_FIFO_1, + RTW89_MAC_MEM_CPU_LOCAL, + RTW89_MAC_MEM_BSSID_CAM, ++ RTW89_MAC_MEM_TXD_FIFO_0_V1, ++ RTW89_MAC_MEM_TXD_FIFO_1_V1, + + /* keep last */ + RTW89_MAC_MEM_NUM, +@@ -319,6 +370,15 @@ enum rtw89_mac_c2h_info_func { + RTW89_MAC_C2H_FUNC_INFO_MAX, + }; + ++enum rtw89_mac_c2h_mcc_func { ++ RTW89_MAC_C2H_FUNC_MCC_RCV_ACK = 0, ++ RTW89_MAC_C2H_FUNC_MCC_REQ_ACK = 1, ++ RTW89_MAC_C2H_FUNC_MCC_TSF_RPT = 2, ++ RTW89_MAC_C2H_FUNC_MCC_STATUS_RPT = 3, ++ ++ NUM_OF_RTW89_MAC_C2H_FUNC_MCC, ++}; ++ + enum rtw89_mac_c2h_class { + RTW89_MAC_C2H_CLASS_INFO, + RTW89_MAC_C2H_CLASS_OFLD, +@@ -329,6 +389,31 @@ enum rtw89_mac_c2h_class { + RTW89_MAC_C2H_CLASS_MAX, + }; + ++enum rtw89_mac_mcc_status { ++ RTW89_MAC_MCC_ADD_ROLE_OK = 0, ++ RTW89_MAC_MCC_START_GROUP_OK = 1, ++ RTW89_MAC_MCC_STOP_GROUP_OK = 2, ++ RTW89_MAC_MCC_DEL_GROUP_OK = 3, ++ RTW89_MAC_MCC_RESET_GROUP_OK = 4, ++ RTW89_MAC_MCC_SWITCH_CH_OK = 5, ++ RTW89_MAC_MCC_TXNULL0_OK = 6, ++ RTW89_MAC_MCC_TXNULL1_OK = 7, ++ ++ RTW89_MAC_MCC_SWITCH_EARLY = 10, ++ RTW89_MAC_MCC_TBTT = 11, ++ RTW89_MAC_MCC_DURATION_START = 12, ++ RTW89_MAC_MCC_DURATION_END = 13, ++ ++ RTW89_MAC_MCC_ADD_ROLE_FAIL = 20, ++ RTW89_MAC_MCC_START_GROUP_FAIL = 21, ++ RTW89_MAC_MCC_STOP_GROUP_FAIL = 22, ++ RTW89_MAC_MCC_DEL_GROUP_FAIL = 23, ++ RTW89_MAC_MCC_RESET_GROUP_FAIL = 24, ++ RTW89_MAC_MCC_SWITCH_CH_FAIL = 25, ++ RTW89_MAC_MCC_TXNULL0_FAIL = 26, ++ RTW89_MAC_MCC_TXNULL1_FAIL = 27, ++}; ++ + struct rtw89_mac_ax_coex { + #define RTW89_MAC_AX_COEX_RTK_MODE 0 + #define RTW89_MAC_AX_COEX_CSR_MODE 1 +@@ -391,6 +476,7 @@ enum rtw89_mac_bf_rrsc_rate { + #define ACCESS_CMAC(_addr) \ + ({typeof(_addr) __addr = (_addr); \ + __addr >= R_AX_CMAC_REG_START && __addr <= R_AX_CMAC_REG_END; }) ++#define RTW89_MAC_AX_BAND_REG_OFFSET 0x2000 + + #define PTCL_IDLE_POLL_CNT 10000 + #define SW_CVR_DUR_US 8 +@@ -416,6 +502,17 @@ enum rtw89_mac_bf_rrsc_rate { + #define S_AX_PLE_PAGE_SEL_128 1 + #define S_AX_PLE_PAGE_SEL_256 2 + ++#define B_CMAC0_MGQ_NORMAL BIT(2) ++#define B_CMAC0_MGQ_NO_PWRSAV BIT(3) ++#define B_CMAC0_CPUMGQ BIT(4) ++#define B_CMAC1_MGQ_NORMAL BIT(10) ++#define B_CMAC1_MGQ_NO_PWRSAV BIT(11) ++#define B_CMAC1_CPUMGQ BIT(12) ++ ++#define QEMP_ACQ_GRP_MACID_NUM 8 ++#define QEMP_ACQ_GRP_QSEL_SH 4 ++#define QEMP_ACQ_GRP_QSEL_MASK 0xF ++ + #define SDIO_LOCAL_BASE_ADDR 0x80000000 + + #define PWR_CMD_WRITE 0 +@@ -715,6 +812,7 @@ struct rtw89_mac_size_set { + const struct rtw89_ple_quota ple_qt46; + const struct rtw89_ple_quota ple_qt47; + const struct rtw89_ple_quota ple_qt58; ++ const struct rtw89_ple_quota ple_qt_52a_wow; + }; + + extern const struct rtw89_mac_size_set rtw89_mac_size; +@@ -810,7 +908,10 @@ int rtw89_mac_add_vif(struct rtw89_dev * + int rtw89_mac_port_update(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif); + void rtw89_mac_set_he_obss_narrow_bw_ru(struct rtw89_dev *rtwdev, + struct ieee80211_vif *vif); ++void rtw89_mac_stop_ap(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif); + int rtw89_mac_remove_vif(struct rtw89_dev *rtwdev, struct rtw89_vif *vif); ++void rtw89_mac_disable_cpu(struct rtw89_dev *rtwdev); ++int rtw89_mac_enable_cpu(struct rtw89_dev *rtwdev, u8 boot_reason, bool dlfw); + int rtw89_mac_enable_bb_rf(struct rtw89_dev *rtwdev); + int rtw89_mac_disable_bb_rf(struct rtw89_dev *rtwdev); + +@@ -830,6 +931,7 @@ static inline int rtw89_chip_disable_bb_ + + u32 rtw89_mac_get_err_status(struct rtw89_dev *rtwdev); + int rtw89_mac_set_err_status(struct rtw89_dev *rtwdev, u32 err); ++bool rtw89_mac_c2h_chk_atomic(struct rtw89_dev *rtwdev, u8 class, u8 func); + void rtw89_mac_c2h_handle(struct rtw89_dev *rtwdev, struct sk_buff *skb, + u32 len, u8 class, u8 func); + int rtw89_mac_setup_phycap(struct rtw89_dev *rtwdev); +@@ -962,6 +1064,16 @@ static inline void rtw89_mac_ctrl_hci_dm + B_AX_HCI_TXDMA_EN | B_AX_HCI_RXDMA_EN); + } + ++static inline bool rtw89_mac_get_power_state(struct rtw89_dev *rtwdev) ++{ ++ u32 val; ++ ++ val = rtw89_read32_mask(rtwdev, R_AX_IC_PWR_STATE, ++ B_AX_WLMAC_PWR_STE_MASK); ++ ++ return !!val; ++} ++ + int rtw89_mac_set_tx_time(struct rtw89_dev *rtwdev, struct rtw89_sta *rtwsta, + bool resume, u32 tx_time); + int rtw89_mac_get_tx_time(struct rtw89_dev *rtwdev, struct rtw89_sta *rtwsta, +@@ -1010,6 +1122,7 @@ enum rtw89_mac_xtal_si_offset { + #define XTAL_SI_PON_EI BIT(1) + #define XTAL_SI_PON_WEI BIT(0) + XTAL_SI_SRAM_CTRL = 0xA1, ++#define XTAL_SI_SRAM_DIS BIT(1) + #define FULL_BIT_MASK GENMASK(7, 0) + }; + +@@ -1019,5 +1132,12 @@ void rtw89_mac_pkt_drop_vif(struct rtw89 + u16 rtw89_mac_dle_buf_req(struct rtw89_dev *rtwdev, u16 buf_len, bool wd); + int rtw89_mac_set_cpuio(struct rtw89_dev *rtwdev, + struct rtw89_cpuio_ctrl *ctrl_para, bool wd); ++int rtw89_mac_typ_fltr_opt(struct rtw89_dev *rtwdev, ++ enum rtw89_machdr_frame_type type, ++ enum rtw89_mac_fwd_target fwd_target, u8 mac_idx); ++int rtw89_mac_resize_ple_rx_quota(struct rtw89_dev *rtwdev, bool wow); ++int rtw89_mac_ptk_drop_by_band_and_wait(struct rtw89_dev *rtwdev, ++ enum rtw89_mac_idx band); ++void rtw89_mac_hw_mgnt_sec(struct rtw89_dev *rtwdev, bool wow); + + #endif +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw89/Makefile linux-6.2/drivers/net/wireless/realtek/rtw89/Makefile +--- linux-6.1/drivers/net/wireless/realtek/rtw89/Makefile 2022-12-12 00:15:18.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw89/Makefile 2022-12-24 00:49:25.775376835 +0200 +@@ -15,6 +15,8 @@ rtw89_core-y += core.o \ + chan.o \ + ser.o + ++rtw89_core-$(CONFIG_PM) += wow.o ++ + obj-$(CONFIG_RTW89_8852A) += rtw89_8852a.o + rtw89_8852a-objs := rtw8852a.o \ + rtw8852a_table.o \ +@@ -24,6 +26,15 @@ rtw89_8852a-objs := rtw8852a.o \ + obj-$(CONFIG_RTW89_8852AE) += rtw89_8852ae.o + rtw89_8852ae-objs := rtw8852ae.o + ++obj-$(CONFIG_RTW89_8852B) += rtw89_8852b.o ++rtw89_8852b-objs := rtw8852b.o \ ++ rtw8852b_table.o \ ++ rtw8852b_rfk.o \ ++ rtw8852b_rfk_table.o ++ ++obj-$(CONFIG_RTW89_8852BE) += rtw89_8852be.o ++rtw89_8852be-objs := rtw8852be.o ++ + obj-$(CONFIG_RTW89_8852C) += rtw89_8852c.o + rtw89_8852c-objs := rtw8852c.o \ + rtw8852c_table.o \ +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw89/pci.c linux-6.2/drivers/net/wireless/realtek/rtw89/pci.c +--- linux-6.1/drivers/net/wireless/realtek/rtw89/pci.c 2022-12-12 00:15:18.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw89/pci.c 2022-12-24 00:49:25.780376835 +0200 +@@ -186,6 +186,17 @@ static void rtw89_pci_ctrl_txdma_ch_pcie + } + } + ++static void rtw89_pci_ctrl_txdma_fw_ch_pcie(struct rtw89_dev *rtwdev, bool enable) ++{ ++ const struct rtw89_pci_info *info = rtwdev->pci_info; ++ const struct rtw89_reg_def *dma_stop1 = &info->dma_stop1; ++ ++ if (enable) ++ rtw89_write32_clr(rtwdev, dma_stop1->addr, B_AX_STOP_CH12); ++ else ++ rtw89_write32_set(rtwdev, dma_stop1->addr, B_AX_STOP_CH12); ++} ++ + static bool + rtw89_skb_put_rx_data(struct rtw89_dev *rtwdev, bool fs, bool ls, + struct sk_buff *new, +@@ -256,7 +267,7 @@ static u32 rtw89_pci_rxbd_deliver_skbs(s + + rtw89_core_query_rxdesc(rtwdev, desc_info, skb->data, rxinfo_size); + +- new = dev_alloc_skb(desc_info->pkt_size); ++ new = rtw89_alloc_skb_for_rx(rtwdev, desc_info->pkt_size); + if (!new) + goto err_sync_device; + +@@ -960,8 +971,10 @@ static u32 __rtw89_pci_check_and_reclaim + struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; + struct rtw89_pci_tx_ring *tx_ring = &rtwpci->tx_rings[txch]; + struct rtw89_pci_tx_wd_ring *wd_ring = &tx_ring->wd_ring; ++ const struct rtw89_chip_info *chip = rtwdev->chip; + u32 bd_cnt, wd_cnt, min_cnt = 0; + struct rtw89_pci_rx_ring *rx_ring; ++ enum rtw89_debug_mask debug_mask; + u32 cnt; + + rx_ring = &rtwpci->rx_rings[RTW89_RXCH_RPQ]; +@@ -985,10 +998,20 @@ static u32 __rtw89_pci_check_and_reclaim + bd_cnt = rtw89_pci_get_avail_txbd_num(tx_ring); + wd_cnt = wd_ring->curr_num; + min_cnt = min(bd_cnt, wd_cnt); +- if (min_cnt == 0) +- rtw89_debug(rtwdev, rtwpci->low_power ? RTW89_DBG_TXRX : RTW89_DBG_UNEXP, ++ if (min_cnt == 0) { ++ /* This message can be frequently shown in low power mode or ++ * high traffic with 8852B, and we have recognized it as normal ++ * behavior, so print with mask RTW89_DBG_TXRX in these situations. ++ */ ++ if (rtwpci->low_power || chip->chip_id == RTL8852B) ++ debug_mask = RTW89_DBG_TXRX; ++ else ++ debug_mask = RTW89_DBG_UNEXP; ++ ++ rtw89_debug(rtwdev, debug_mask, + "still no tx resource after reclaim: wd_cnt=%d bd_cnt=%d\n", + wd_cnt, bd_cnt); ++ } + + out_unlock: + spin_unlock_bh(&rtwpci->trx_lock); +@@ -2513,7 +2536,7 @@ static int rtw89_pci_ops_mac_pre_init(st + + /* disable all channels except to FW CMD channel to download firmware */ + rtw89_pci_ctrl_txdma_ch_pcie(rtwdev, false); +- rtw89_write32_clr(rtwdev, info->dma_stop1.addr, B_AX_STOP_CH12); ++ rtw89_pci_ctrl_txdma_fw_ch_pcie(rtwdev, true); + + /* start DMA activities */ + rtw89_pci_ctrl_dma_all(rtwdev, true); +@@ -3771,6 +3794,16 @@ static const struct rtw89_hci_ops rtw89_ + + .recovery_start = rtw89_pci_ops_recovery_start, + .recovery_complete = rtw89_pci_ops_recovery_complete, ++ ++ .ctrl_txdma_ch = rtw89_pci_ctrl_txdma_ch_pcie, ++ .ctrl_txdma_fw_ch = rtw89_pci_ctrl_txdma_fw_ch_pcie, ++ .ctrl_trxhci = rtw89_pci_ctrl_dma_trx, ++ .poll_txdma_ch = rtw89_poll_txdma_ch_idle_pcie, ++ .clr_idx_all = rtw89_pci_clr_idx_all, ++ .clear = rtw89_pci_clear_resource, ++ .disable_intr = rtw89_pci_disable_intr_lock, ++ .enable_intr = rtw89_pci_enable_intr_lock, ++ .rst_bdram = rtw89_pci_rst_bdram_pcie, + }; + + int rtw89_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw89/pci.h linux-6.2/drivers/net/wireless/realtek/rtw89/pci.h +--- linux-6.1/drivers/net/wireless/realtek/rtw89/pci.h 2022-12-12 00:15:18.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw89/pci.h 2022-12-24 00:49:25.780376835 +0200 +@@ -202,6 +202,18 @@ + #define B_AX_RXP1DMA_INT BIT(1) + #define B_AX_RXDMA_INT BIT(0) + ++#define R_AX_HAXI_IDCT_MSK 0x10B8 ++#define B_AX_TXBD_LEN0_ERR_IDCT_MSK BIT(3) ++#define B_AX_TXBD_4KBOUND_ERR_IDCT_MSK BIT(2) ++#define B_AX_RXMDA_STUCK_IDCT_MSK BIT(1) ++#define B_AX_TXMDA_STUCK_IDCT_MSK BIT(0) ++ ++#define R_AX_HAXI_IDCT 0x10BC ++#define B_AX_TXBD_LEN0_ERR_IDCT BIT(3) ++#define B_AX_TXBD_4KBOUND_ERR_IDCT BIT(2) ++#define B_AX_RXMDA_STUCK_IDCT BIT(1) ++#define B_AX_TXMDA_STUCK_IDCT BIT(0) ++ + #define R_AX_HAXI_HIMR10 0x11E0 + #define B_AX_TXDMA_CH11_INT_EN_V1 BIT(1) + #define B_AX_TXDMA_CH10_INT_EN_V1 BIT(0) +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw89/phy.c linux-6.2/drivers/net/wireless/realtek/rtw89/phy.c +--- linux-6.1/drivers/net/wireless/realtek/rtw89/phy.c 2022-12-31 22:58:05.367710726 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw89/phy.c 2022-12-24 00:49:25.781376835 +0200 +@@ -2,6 +2,7 @@ + /* Copyright(c) 2019-2020 Realtek Corporation + */ + ++#include "coex.h" + #include "debug.h" + #include "fw.h" + #include "mac.h" +@@ -9,7 +10,7 @@ + #include "ps.h" + #include "reg.h" + #include "sar.h" +-#include "coex.h" ++#include "util.h" + + static u16 get_max_amsdu_len(struct rtw89_dev *rtwdev, + const struct rtw89_ra_report *report) +@@ -801,6 +802,11 @@ bool rtw89_phy_write_rf_v1(struct rtw89_ + } + EXPORT_SYMBOL(rtw89_phy_write_rf_v1); + ++static bool rtw89_chip_rf_v1(struct rtw89_dev *rtwdev) ++{ ++ return rtwdev->chip->ops->write_rf == rtw89_phy_write_rf_v1; ++} ++ + static void rtw89_phy_bb_reset(struct rtw89_dev *rtwdev, + enum rtw89_phy_idx phy_idx) + { +@@ -1036,6 +1042,7 @@ static void rtw89_phy_config_bb_gain(str + { + const struct rtw89_chip_info *chip = rtwdev->chip; + union rtw89_phy_bb_gain_arg arg = { .addr = reg->addr }; ++ struct rtw89_efuse *efuse = &rtwdev->efuse; + + if (arg.gain_band >= RTW89_BB_GAIN_BAND_NR) + return; +@@ -1061,6 +1068,11 @@ static void rtw89_phy_config_bb_gain(str + case 3: + rtw89_phy_cfg_bb_gain_op1db(rtwdev, arg, reg->data); + break; ++ case 4: ++ /* This cfg_type is only used by rfe_type >= 50 with eFEM */ ++ if (efuse->rfe_type < 50) ++ break; ++ fallthrough; + default: + rtw89_warn(rtwdev, + "bb gain {0x%x:0x%x} with unknown cfg type: %d\n", +@@ -1117,6 +1129,24 @@ out: + return ret; + } + ++static void rtw89_phy_config_rf_reg_noio(struct rtw89_dev *rtwdev, ++ const struct rtw89_reg2_def *reg, ++ enum rtw89_rf_path rf_path, ++ void *extra_data) ++{ ++ u32 addr = reg->addr; ++ ++ if (addr == 0xfe || addr == 0xfd || addr == 0xfc || addr == 0xfb || ++ addr == 0xfa || addr == 0xf9) ++ return; ++ ++ if (rtw89_chip_rf_v1(rtwdev) && addr < 0x100) ++ return; ++ ++ rtw89_phy_cofig_rf_reg_store(rtwdev, reg, rf_path, ++ (struct rtw89_fw_h2c_rf_reg_info *)extra_data); ++} ++ + static void rtw89_phy_config_rf_reg(struct rtw89_dev *rtwdev, + const struct rtw89_reg2_def *reg, + enum rtw89_rf_path rf_path, +@@ -1329,7 +1359,7 @@ static u32 rtw89_phy_nctl_poll(struct rt + return rtw89_phy_read32(rtwdev, 0x8080); + } + +-void rtw89_phy_init_rf_reg(struct rtw89_dev *rtwdev) ++void rtw89_phy_init_rf_reg(struct rtw89_dev *rtwdev, bool noio) + { + void (*config)(struct rtw89_dev *rtwdev, const struct rtw89_reg2_def *reg, + enum rtw89_rf_path rf_path, void *data); +@@ -1345,7 +1375,11 @@ void rtw89_phy_init_rf_reg(struct rtw89_ + for (path = RF_PATH_A; path < chip->rf_path_num; path++) { + rf_table = chip->rf_table[path]; + rf_reg_info->rf_path = rf_table->rf_path; +- config = rf_table->config ? rf_table->config : rtw89_phy_config_rf_reg; ++ if (noio) ++ config = rtw89_phy_config_rf_reg_noio; ++ else ++ config = rf_table->config ? rf_table->config : ++ rtw89_phy_config_rf_reg; + rtw89_phy_init_reg(rtwdev, rf_table, config, (void *)rf_reg_info); + if (rtw89_phy_config_rf_reg_fw(rtwdev, rf_reg_info)) + rtw89_warn(rtwdev, "rf path %d reg h2c config failed\n", +@@ -1362,13 +1396,15 @@ static void rtw89_phy_init_rf_nctl(struc + int ret; + + /* IQK/DPK clock & reset */ +- rtw89_phy_write32_set(rtwdev, 0x0c60, 0x3); +- rtw89_phy_write32_set(rtwdev, 0x0c6c, 0x1); +- rtw89_phy_write32_set(rtwdev, 0x58ac, 0x8000000); +- rtw89_phy_write32_set(rtwdev, 0x78ac, 0x8000000); ++ rtw89_phy_write32_set(rtwdev, R_IOQ_IQK_DPK, 0x3); ++ rtw89_phy_write32_set(rtwdev, R_GNT_BT_WGT_EN, 0x1); ++ rtw89_phy_write32_set(rtwdev, R_P0_PATH_RST, 0x8000000); ++ rtw89_phy_write32_set(rtwdev, R_P1_PATH_RST, 0x8000000); ++ if (chip->chip_id == RTL8852B) ++ rtw89_phy_write32_set(rtwdev, R_IOQ_IQK_DPK, 0x2); + + /* check 0x8080 */ +- rtw89_phy_write32(rtwdev, 0x8000, 0x8); ++ rtw89_phy_write32(rtwdev, R_NCTL_CFG, 0x8); + + ret = read_poll_timeout(rtw89_phy_nctl_poll, val, val == 0x4, 10, + 1000, false, rtwdev); +@@ -1419,6 +1455,15 @@ void rtw89_phy_write32_idx(struct rtw89_ + } + EXPORT_SYMBOL(rtw89_phy_write32_idx); + ++u32 rtw89_phy_read32_idx(struct rtw89_dev *rtwdev, u32 addr, u32 mask, ++ enum rtw89_phy_idx phy_idx) ++{ ++ if (rtwdev->dbcc_en && phy_idx == RTW89_PHY_1) ++ addr += rtw89_phy0_phy1_offset(rtwdev, addr); ++ return rtw89_phy_read32_mask(rtwdev, addr, mask); ++} ++EXPORT_SYMBOL(rtw89_phy_read32_idx); ++ + void rtw89_phy_set_phy_regs(struct rtw89_dev *rtwdev, u32 addr, u32 mask, + u32 val) + { +@@ -1443,23 +1488,21 @@ void rtw89_phy_write_reg3_tbl(struct rtw + } + EXPORT_SYMBOL(rtw89_phy_write_reg3_tbl); + +-const u8 rtw89_rs_idx_max[] = { ++static const u8 rtw89_rs_idx_max[] = { + [RTW89_RS_CCK] = RTW89_RATE_CCK_MAX, + [RTW89_RS_OFDM] = RTW89_RATE_OFDM_MAX, + [RTW89_RS_MCS] = RTW89_RATE_MCS_MAX, + [RTW89_RS_HEDCM] = RTW89_RATE_HEDCM_MAX, + [RTW89_RS_OFFSET] = RTW89_RATE_OFFSET_MAX, + }; +-EXPORT_SYMBOL(rtw89_rs_idx_max); + +-const u8 rtw89_rs_nss_max[] = { ++static const u8 rtw89_rs_nss_max[] = { + [RTW89_RS_CCK] = 1, + [RTW89_RS_OFDM] = 1, + [RTW89_RS_MCS] = RTW89_NSS_MAX, + [RTW89_RS_HEDCM] = RTW89_NSS_HEDCM_MAX, + [RTW89_RS_OFFSET] = 1, + }; +-EXPORT_SYMBOL(rtw89_rs_nss_max); + + static const u8 _byr_of_rs[] = { + [RTW89_RS_CCK] = offsetof(struct rtw89_txpwr_byrate, cck), +@@ -1501,6 +1544,7 @@ EXPORT_SYMBOL(rtw89_phy_load_txpwr_byrat + (txpwr_rf) >> (__c->txpwr_factor_rf - __c->txpwr_factor_mac); \ + }) + ++static + s8 rtw89_phy_read_txpwr_byrate(struct rtw89_dev *rtwdev, u8 band, + const struct rtw89_rate_desc *rate_desc) + { +@@ -1523,7 +1567,6 @@ s8 rtw89_phy_read_txpwr_byrate(struct rt + + return _phy_txpwr_rf_to_mac(rtwdev, byr[idx]); + } +-EXPORT_SYMBOL(rtw89_phy_read_txpwr_byrate); + + static u8 rtw89_channel_6g_to_idx(struct rtw89_dev *rtwdev, u8 channel_6g) + { +@@ -1783,6 +1826,7 @@ static void rtw89_phy_fill_txpwr_limit_1 + lmt->mcs_40m_2p5[i] = min_t(s8, val_2p5_n[i], val_2p5_p[i]); + } + ++static + void rtw89_phy_fill_txpwr_limit(struct rtw89_dev *rtwdev, + const struct rtw89_chan *chan, + struct rtw89_txpwr_limit *lmt, +@@ -1813,7 +1857,6 @@ void rtw89_phy_fill_txpwr_limit(struct r + break; + } + } +-EXPORT_SYMBOL(rtw89_phy_fill_txpwr_limit); + + static s8 rtw89_phy_read_txpwr_limit_ru(struct rtw89_dev *rtwdev, u8 band, + u8 ru, u8 ntx, u8 ch) +@@ -1962,6 +2005,7 @@ rtw89_phy_fill_txpwr_limit_ru_160m(struc + } + } + ++static + void rtw89_phy_fill_txpwr_limit_ru(struct rtw89_dev *rtwdev, + const struct rtw89_chan *chan, + struct rtw89_txpwr_limit_ru *lmt_ru, +@@ -1992,7 +2036,161 @@ void rtw89_phy_fill_txpwr_limit_ru(struc + break; + } + } +-EXPORT_SYMBOL(rtw89_phy_fill_txpwr_limit_ru); ++ ++void rtw89_phy_set_txpwr_byrate(struct rtw89_dev *rtwdev, ++ const struct rtw89_chan *chan, ++ enum rtw89_phy_idx phy_idx) ++{ ++ static const u8 rs[] = { ++ RTW89_RS_CCK, ++ RTW89_RS_OFDM, ++ RTW89_RS_MCS, ++ RTW89_RS_HEDCM, ++ }; ++ struct rtw89_rate_desc cur; ++ u8 band = chan->band_type; ++ u8 ch = chan->channel; ++ u32 addr, val; ++ s8 v[4] = {}; ++ u8 i; ++ ++ rtw89_debug(rtwdev, RTW89_DBG_TXPWR, ++ "[TXPWR] set txpwr byrate with ch=%d\n", ch); ++ ++ BUILD_BUG_ON(rtw89_rs_idx_max[RTW89_RS_CCK] % 4); ++ BUILD_BUG_ON(rtw89_rs_idx_max[RTW89_RS_OFDM] % 4); ++ BUILD_BUG_ON(rtw89_rs_idx_max[RTW89_RS_MCS] % 4); ++ BUILD_BUG_ON(rtw89_rs_idx_max[RTW89_RS_HEDCM] % 4); ++ ++ addr = R_AX_PWR_BY_RATE; ++ for (cur.nss = 0; cur.nss <= RTW89_NSS_2; cur.nss++) { ++ for (i = 0; i < ARRAY_SIZE(rs); i++) { ++ if (cur.nss >= rtw89_rs_nss_max[rs[i]]) ++ continue; ++ ++ cur.rs = rs[i]; ++ for (cur.idx = 0; cur.idx < rtw89_rs_idx_max[rs[i]]; ++ cur.idx++) { ++ v[cur.idx % 4] = ++ rtw89_phy_read_txpwr_byrate(rtwdev, ++ band, ++ &cur); ++ ++ if ((cur.idx + 1) % 4) ++ continue; ++ ++ val = FIELD_PREP(GENMASK(7, 0), v[0]) | ++ FIELD_PREP(GENMASK(15, 8), v[1]) | ++ FIELD_PREP(GENMASK(23, 16), v[2]) | ++ FIELD_PREP(GENMASK(31, 24), v[3]); ++ ++ rtw89_mac_txpwr_write32(rtwdev, phy_idx, addr, ++ val); ++ addr += 4; ++ } ++ } ++ } ++} ++EXPORT_SYMBOL(rtw89_phy_set_txpwr_byrate); ++ ++void rtw89_phy_set_txpwr_offset(struct rtw89_dev *rtwdev, ++ const struct rtw89_chan *chan, ++ enum rtw89_phy_idx phy_idx) ++{ ++ struct rtw89_rate_desc desc = { ++ .nss = RTW89_NSS_1, ++ .rs = RTW89_RS_OFFSET, ++ }; ++ u8 band = chan->band_type; ++ s8 v[RTW89_RATE_OFFSET_MAX] = {}; ++ u32 val; ++ ++ rtw89_debug(rtwdev, RTW89_DBG_TXPWR, "[TXPWR] set txpwr offset\n"); ++ ++ for (desc.idx = 0; desc.idx < RTW89_RATE_OFFSET_MAX; desc.idx++) ++ v[desc.idx] = rtw89_phy_read_txpwr_byrate(rtwdev, band, &desc); ++ ++ BUILD_BUG_ON(RTW89_RATE_OFFSET_MAX != 5); ++ val = FIELD_PREP(GENMASK(3, 0), v[0]) | ++ FIELD_PREP(GENMASK(7, 4), v[1]) | ++ FIELD_PREP(GENMASK(11, 8), v[2]) | ++ FIELD_PREP(GENMASK(15, 12), v[3]) | ++ FIELD_PREP(GENMASK(19, 16), v[4]); ++ ++ rtw89_mac_txpwr_write32_mask(rtwdev, phy_idx, R_AX_PWR_RATE_OFST_CTRL, ++ GENMASK(19, 0), val); ++} ++EXPORT_SYMBOL(rtw89_phy_set_txpwr_offset); ++ ++void rtw89_phy_set_txpwr_limit(struct rtw89_dev *rtwdev, ++ const struct rtw89_chan *chan, ++ enum rtw89_phy_idx phy_idx) ++{ ++ struct rtw89_txpwr_limit lmt; ++ u8 ch = chan->channel; ++ u8 bw = chan->band_width; ++ const s8 *ptr; ++ u32 addr, val; ++ u8 i, j; ++ ++ rtw89_debug(rtwdev, RTW89_DBG_TXPWR, ++ "[TXPWR] set txpwr limit with ch=%d bw=%d\n", ch, bw); ++ ++ BUILD_BUG_ON(sizeof(struct rtw89_txpwr_limit) != ++ RTW89_TXPWR_LMT_PAGE_SIZE); ++ ++ addr = R_AX_PWR_LMT; ++ for (i = 0; i < RTW89_NTX_NUM; i++) { ++ rtw89_phy_fill_txpwr_limit(rtwdev, chan, &lmt, i); ++ ++ ptr = (s8 *)&lmt; ++ for (j = 0; j < RTW89_TXPWR_LMT_PAGE_SIZE; ++ j += 4, addr += 4, ptr += 4) { ++ val = FIELD_PREP(GENMASK(7, 0), ptr[0]) | ++ FIELD_PREP(GENMASK(15, 8), ptr[1]) | ++ FIELD_PREP(GENMASK(23, 16), ptr[2]) | ++ FIELD_PREP(GENMASK(31, 24), ptr[3]); ++ ++ rtw89_mac_txpwr_write32(rtwdev, phy_idx, addr, val); ++ } ++ } ++} ++EXPORT_SYMBOL(rtw89_phy_set_txpwr_limit); ++ ++void rtw89_phy_set_txpwr_limit_ru(struct rtw89_dev *rtwdev, ++ const struct rtw89_chan *chan, ++ enum rtw89_phy_idx phy_idx) ++{ ++ struct rtw89_txpwr_limit_ru lmt_ru; ++ u8 ch = chan->channel; ++ u8 bw = chan->band_width; ++ const s8 *ptr; ++ u32 addr, val; ++ u8 i, j; ++ ++ rtw89_debug(rtwdev, RTW89_DBG_TXPWR, ++ "[TXPWR] set txpwr limit ru with ch=%d bw=%d\n", ch, bw); ++ ++ BUILD_BUG_ON(sizeof(struct rtw89_txpwr_limit_ru) != ++ RTW89_TXPWR_LMT_RU_PAGE_SIZE); ++ ++ addr = R_AX_PWR_RU_LMT; ++ for (i = 0; i < RTW89_NTX_NUM; i++) { ++ rtw89_phy_fill_txpwr_limit_ru(rtwdev, chan, &lmt_ru, i); ++ ++ ptr = (s8 *)&lmt_ru; ++ for (j = 0; j < RTW89_TXPWR_LMT_RU_PAGE_SIZE; ++ j += 4, addr += 4, ptr += 4) { ++ val = FIELD_PREP(GENMASK(7, 0), ptr[0]) | ++ FIELD_PREP(GENMASK(15, 8), ptr[1]) | ++ FIELD_PREP(GENMASK(23, 16), ptr[2]) | ++ FIELD_PREP(GENMASK(31, 24), ptr[3]); ++ ++ rtw89_mac_txpwr_write32(rtwdev, phy_idx, addr, val); ++ } ++ } ++} ++EXPORT_SYMBOL(rtw89_phy_set_txpwr_limit_ru); + + struct rtw89_phy_iter_ra_data { + struct rtw89_dev *rtwdev; +@@ -2106,6 +2304,10 @@ void rtw89_phy_c2h_handle(struct rtw89_d + if (func < RTW89_PHY_C2H_FUNC_RA_MAX) + handler = rtw89_phy_c2h_ra_handler[func]; + break; ++ case RTW89_PHY_C2H_CLASS_DM: ++ if (func == RTW89_PHY_C2H_DM_FUNC_LOWRT_RTY) ++ return; ++ fallthrough; + default: + rtw89_info(rtwdev, "c2h class %d not support\n", class); + return; +@@ -2593,6 +2795,129 @@ void rtw89_phy_cfo_parse(struct rtw89_de + cfo->packet_count++; + } + ++void rtw89_phy_ul_tb_assoc(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif) ++{ ++ const struct rtw89_chip_info *chip = rtwdev->chip; ++ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); ++ struct rtw89_phy_ul_tb_info *ul_tb_info = &rtwdev->ul_tb_info; ++ ++ if (!chip->support_ul_tb_ctrl) ++ return; ++ ++ rtwvif->def_tri_idx = ++ rtw89_phy_read32_mask(rtwdev, R_DCFO_OPT, B_TXSHAPE_TRIANGULAR_CFG); ++ ++ if (chip->chip_id == RTL8852B && rtwdev->hal.cv > CHIP_CBV) ++ rtwvif->dyn_tb_bedge_en = false; ++ else if (chan->band_type >= RTW89_BAND_5G && ++ chan->band_width >= RTW89_CHANNEL_WIDTH_40) ++ rtwvif->dyn_tb_bedge_en = true; ++ else ++ rtwvif->dyn_tb_bedge_en = false; ++ ++ rtw89_debug(rtwdev, RTW89_DBG_UL_TB, ++ "[ULTB] def_if_bandedge=%d, def_tri_idx=%d\n", ++ ul_tb_info->def_if_bandedge, rtwvif->def_tri_idx); ++ rtw89_debug(rtwdev, RTW89_DBG_UL_TB, ++ "[ULTB] dyn_tb_begde_en=%d, dyn_tb_tri_en=%d\n", ++ rtwvif->dyn_tb_bedge_en, ul_tb_info->dyn_tb_tri_en); ++} ++ ++struct rtw89_phy_ul_tb_check_data { ++ bool valid; ++ bool high_tf_client; ++ bool low_tf_client; ++ bool dyn_tb_bedge_en; ++ u8 def_tri_idx; ++}; ++ ++static ++void rtw89_phy_ul_tb_ctrl_check(struct rtw89_dev *rtwdev, ++ struct rtw89_vif *rtwvif, ++ struct rtw89_phy_ul_tb_check_data *ul_tb_data) ++{ ++ struct rtw89_traffic_stats *stats = &rtwdev->stats; ++ struct ieee80211_vif *vif = rtwvif_to_vif(rtwvif); ++ ++ if (rtwvif->wifi_role != RTW89_WIFI_ROLE_STATION) ++ return; ++ ++ if (!vif->cfg.assoc) ++ return; ++ ++ if (stats->rx_tf_periodic > UL_TB_TF_CNT_L2H_TH) ++ ul_tb_data->high_tf_client = true; ++ else if (stats->rx_tf_periodic < UL_TB_TF_CNT_H2L_TH) ++ ul_tb_data->low_tf_client = true; ++ ++ ul_tb_data->valid = true; ++ ul_tb_data->def_tri_idx = rtwvif->def_tri_idx; ++ ul_tb_data->dyn_tb_bedge_en = rtwvif->dyn_tb_bedge_en; ++} ++ ++void rtw89_phy_ul_tb_ctrl_track(struct rtw89_dev *rtwdev) ++{ ++ const struct rtw89_chip_info *chip = rtwdev->chip; ++ struct rtw89_phy_ul_tb_info *ul_tb_info = &rtwdev->ul_tb_info; ++ struct rtw89_phy_ul_tb_check_data ul_tb_data = {}; ++ struct rtw89_vif *rtwvif; ++ ++ if (!chip->support_ul_tb_ctrl) ++ return; ++ ++ if (rtwdev->total_sta_assoc != 1) ++ return; ++ ++ rtw89_for_each_rtwvif(rtwdev, rtwvif) ++ rtw89_phy_ul_tb_ctrl_check(rtwdev, rtwvif, &ul_tb_data); ++ ++ if (!ul_tb_data.valid) ++ return; ++ ++ if (ul_tb_data.dyn_tb_bedge_en) { ++ if (ul_tb_data.high_tf_client) { ++ rtw89_phy_write32_mask(rtwdev, R_BANDEDGE, B_BANDEDGE_EN, 0); ++ rtw89_debug(rtwdev, RTW89_DBG_UL_TB, ++ "[ULTB] Turn off if_bandedge\n"); ++ } else if (ul_tb_data.low_tf_client) { ++ rtw89_phy_write32_mask(rtwdev, R_BANDEDGE, B_BANDEDGE_EN, ++ ul_tb_info->def_if_bandedge); ++ rtw89_debug(rtwdev, RTW89_DBG_UL_TB, ++ "[ULTB] Set to default if_bandedge = %d\n", ++ ul_tb_info->def_if_bandedge); ++ } ++ } ++ ++ if (ul_tb_info->dyn_tb_tri_en) { ++ if (ul_tb_data.high_tf_client) { ++ rtw89_phy_write32_mask(rtwdev, R_DCFO_OPT, ++ B_TXSHAPE_TRIANGULAR_CFG, 0); ++ rtw89_debug(rtwdev, RTW89_DBG_UL_TB, ++ "[ULTB] Turn off Tx triangle\n"); ++ } else if (ul_tb_data.low_tf_client) { ++ rtw89_phy_write32_mask(rtwdev, R_DCFO_OPT, ++ B_TXSHAPE_TRIANGULAR_CFG, ++ ul_tb_data.def_tri_idx); ++ rtw89_debug(rtwdev, RTW89_DBG_UL_TB, ++ "[ULTB] Set to default tx_shap_idx = %d\n", ++ ul_tb_data.def_tri_idx); ++ } ++ } ++} ++ ++static void rtw89_phy_ul_tb_info_init(struct rtw89_dev *rtwdev) ++{ ++ const struct rtw89_chip_info *chip = rtwdev->chip; ++ struct rtw89_phy_ul_tb_info *ul_tb_info = &rtwdev->ul_tb_info; ++ ++ if (!chip->support_ul_tb_ctrl) ++ return; ++ ++ ul_tb_info->dyn_tb_tri_en = true; ++ ul_tb_info->def_if_bandedge = ++ rtw89_phy_read32_mask(rtwdev, R_BANDEDGE, B_BANDEDGE_EN); ++} ++ + static void rtw89_phy_stat_thermal_update(struct rtw89_dev *rtwdev) + { + struct rtw89_phy_stat *phystat = &rtwdev->phystat; +@@ -3779,6 +4104,7 @@ void rtw89_phy_dm_init(struct rtw89_dev + rtw89_physts_parsing_init(rtwdev); + rtw89_phy_dig_init(rtwdev); + rtw89_phy_cfo_init(rtwdev); ++ rtw89_phy_ul_tb_info_init(rtwdev); + + rtw89_phy_init_rf_nctl(rtwdev); + rtw89_chip_rfk_init(rtwdev); +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw89/phy.h linux-6.2/drivers/net/wireless/realtek/rtw89/phy.h +--- linux-6.1/drivers/net/wireless/realtek/rtw89/phy.h 2022-12-12 00:15:18.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw89/phy.h 2022-12-24 00:49:25.781376835 +0200 +@@ -64,6 +64,9 @@ + #define MAX_CFO_TOLERANCE 30 + #define CFO_TF_CNT_TH 300 + ++#define UL_TB_TF_CNT_L2H_TH 100 ++#define UL_TB_TF_CNT_H2L_TH 70 ++ + #define CCX_MAX_PERIOD 2097 + #define CCX_MAX_PERIOD_UNIT 32 + #define MS_TO_4US_RATIO 250 +@@ -114,6 +117,15 @@ enum rtw89_phy_c2h_ra_func { + RTW89_PHY_C2H_FUNC_RA_MAX, + }; + ++enum rtw89_phy_c2h_dm_func { ++ RTW89_PHY_C2H_DM_FUNC_FW_TEST, ++ RTW89_PHY_C2H_DM_FUNC_FW_TRIG_TX_RPT, ++ RTW89_PHY_C2H_DM_FUNC_SIGB, ++ RTW89_PHY_C2H_DM_FUNC_LOWRT_RTY, ++ RTW89_PHY_C2H_DM_FUNC_MCC_DIG, ++ RTW89_PHY_C2H_DM_FUNC_NUM, ++}; ++ + enum rtw89_phy_c2h_class { + RTW89_PHY_C2H_CLASS_RUA, + RTW89_PHY_C2H_CLASS_RA, +@@ -317,9 +329,6 @@ struct rtw89_nbi_reg_def { + struct rtw89_reg_def notch2_en; + }; + +-extern const u8 rtw89_rs_idx_max[RTW89_RS_MAX]; +-extern const u8 rtw89_rs_nss_max[RTW89_RS_MAX]; +- + static inline void rtw89_phy_write8(struct rtw89_dev *rtwdev, + u32 addr, u8 data) + { +@@ -377,6 +386,50 @@ static inline u32 rtw89_phy_read32_mask( + return rtw89_read32_mask(rtwdev, addr | RTW89_PHY_ADDR_OFFSET, mask); + } + ++static inline ++enum rtw89_gain_offset rtw89_subband_to_gain_offset_band_of_ofdm(enum rtw89_subband subband) ++{ ++ switch (subband) { ++ default: ++ case RTW89_CH_2G: ++ return RTW89_GAIN_OFFSET_2G_OFDM; ++ case RTW89_CH_5G_BAND_1: ++ return RTW89_GAIN_OFFSET_5G_LOW; ++ case RTW89_CH_5G_BAND_3: ++ return RTW89_GAIN_OFFSET_5G_MID; ++ case RTW89_CH_5G_BAND_4: ++ return RTW89_GAIN_OFFSET_5G_HIGH; ++ } ++} ++ ++static inline ++enum rtw89_phy_bb_gain_band rtw89_subband_to_bb_gain_band(enum rtw89_subband subband) ++{ ++ switch (subband) { ++ default: ++ case RTW89_CH_2G: ++ return RTW89_BB_GAIN_BAND_2G; ++ case RTW89_CH_5G_BAND_1: ++ return RTW89_BB_GAIN_BAND_5G_L; ++ case RTW89_CH_5G_BAND_3: ++ return RTW89_BB_GAIN_BAND_5G_M; ++ case RTW89_CH_5G_BAND_4: ++ return RTW89_BB_GAIN_BAND_5G_H; ++ case RTW89_CH_6G_BAND_IDX0: ++ case RTW89_CH_6G_BAND_IDX1: ++ return RTW89_BB_GAIN_BAND_6G_L; ++ case RTW89_CH_6G_BAND_IDX2: ++ case RTW89_CH_6G_BAND_IDX3: ++ return RTW89_BB_GAIN_BAND_6G_M; ++ case RTW89_CH_6G_BAND_IDX4: ++ case RTW89_CH_6G_BAND_IDX5: ++ return RTW89_BB_GAIN_BAND_6G_H; ++ case RTW89_CH_6G_BAND_IDX6: ++ case RTW89_CH_6G_BAND_IDX7: ++ return RTW89_BB_GAIN_BAND_6G_UH; ++ } ++} ++ + enum rtw89_rfk_flag { + RTW89_RFK_F_WRF = 0, + RTW89_RFK_F_WM = 1, +@@ -450,7 +503,7 @@ bool rtw89_phy_write_rf(struct rtw89_dev + bool rtw89_phy_write_rf_v1(struct rtw89_dev *rtwdev, enum rtw89_rf_path rf_path, + u32 addr, u32 mask, u32 data); + void rtw89_phy_init_bb_reg(struct rtw89_dev *rtwdev); +-void rtw89_phy_init_rf_reg(struct rtw89_dev *rtwdev); ++void rtw89_phy_init_rf_reg(struct rtw89_dev *rtwdev, bool noio); + void rtw89_phy_config_rf_reg_v1(struct rtw89_dev *rtwdev, + const struct rtw89_reg2_def *reg, + enum rtw89_rf_path rf_path, +@@ -458,20 +511,24 @@ void rtw89_phy_config_rf_reg_v1(struct r + void rtw89_phy_dm_init(struct rtw89_dev *rtwdev); + void rtw89_phy_write32_idx(struct rtw89_dev *rtwdev, u32 addr, u32 mask, + u32 data, enum rtw89_phy_idx phy_idx); ++u32 rtw89_phy_read32_idx(struct rtw89_dev *rtwdev, u32 addr, u32 mask, ++ enum rtw89_phy_idx phy_idx); + void rtw89_phy_load_txpwr_byrate(struct rtw89_dev *rtwdev, + const struct rtw89_txpwr_table *tbl); +-s8 rtw89_phy_read_txpwr_byrate(struct rtw89_dev *rtwdev, u8 band, +- const struct rtw89_rate_desc *rate_desc); +-void rtw89_phy_fill_txpwr_limit(struct rtw89_dev *rtwdev, +- const struct rtw89_chan *chan, +- struct rtw89_txpwr_limit *lmt, +- u8 ntx); +-void rtw89_phy_fill_txpwr_limit_ru(struct rtw89_dev *rtwdev, +- const struct rtw89_chan *chan, +- struct rtw89_txpwr_limit_ru *lmt_ru, +- u8 ntx); + s8 rtw89_phy_read_txpwr_limit(struct rtw89_dev *rtwdev, u8 band, + u8 bw, u8 ntx, u8 rs, u8 bf, u8 ch); ++void rtw89_phy_set_txpwr_byrate(struct rtw89_dev *rtwdev, ++ const struct rtw89_chan *chan, ++ enum rtw89_phy_idx phy_idx); ++void rtw89_phy_set_txpwr_offset(struct rtw89_dev *rtwdev, ++ const struct rtw89_chan *chan, ++ enum rtw89_phy_idx phy_idx); ++void rtw89_phy_set_txpwr_limit(struct rtw89_dev *rtwdev, ++ const struct rtw89_chan *chan, ++ enum rtw89_phy_idx phy_idx); ++void rtw89_phy_set_txpwr_limit_ru(struct rtw89_dev *rtwdev, ++ const struct rtw89_chan *chan, ++ enum rtw89_phy_idx phy_idx); + void rtw89_phy_ra_assoc(struct rtw89_dev *rtwdev, struct ieee80211_sta *sta); + void rtw89_phy_ra_update(struct rtw89_dev *rtwdev); + void rtw89_phy_ra_updata_sta(struct rtw89_dev *rtwdev, struct ieee80211_sta *sta, +@@ -496,5 +553,7 @@ void rtw89_phy_set_bss_color(struct rtw8 + void rtw89_phy_tssi_ctrl_set_bandedge_cfg(struct rtw89_dev *rtwdev, + enum rtw89_mac_idx mac_idx, + enum rtw89_tssi_bandedge_cfg bandedge_cfg); ++void rtw89_phy_ul_tb_assoc(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif); ++void rtw89_phy_ul_tb_ctrl_track(struct rtw89_dev *rtwdev); + + #endif +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw89/ps.c linux-6.2/drivers/net/wireless/realtek/rtw89/ps.c +--- linux-6.1/drivers/net/wireless/realtek/rtw89/ps.c 2022-12-12 00:15:18.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw89/ps.c 2022-12-24 00:49:25.781376835 +0200 +@@ -59,7 +59,7 @@ static void rtw89_ps_power_mode_change(s + rtw89_mac_power_mode_change(rtwdev, enter); + } + +-static void __rtw89_enter_ps_mode(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif) ++void __rtw89_enter_ps_mode(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif) + { + if (rtwvif->wifi_role == RTW89_WIFI_ROLE_P2P_CLIENT) + return; +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw89/ps.h linux-6.2/drivers/net/wireless/realtek/rtw89/ps.h +--- linux-6.1/drivers/net/wireless/realtek/rtw89/ps.h 2022-12-12 00:15:18.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw89/ps.h 2022-12-24 00:49:25.781376835 +0200 +@@ -8,6 +8,7 @@ + void rtw89_enter_lps(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif); + void rtw89_leave_lps(struct rtw89_dev *rtwdev); + void __rtw89_leave_ps_mode(struct rtw89_dev *rtwdev); ++void __rtw89_enter_ps_mode(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif); + void rtw89_leave_ps_mode(struct rtw89_dev *rtwdev); + void rtw89_enter_ips(struct rtw89_dev *rtwdev); + void rtw89_leave_ips(struct rtw89_dev *rtwdev); +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw89/reg.h linux-6.2/drivers/net/wireless/realtek/rtw89/reg.h +--- linux-6.1/drivers/net/wireless/realtek/rtw89/reg.h 2022-12-12 00:15:18.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw89/reg.h 2022-12-24 00:49:25.781376835 +0200 +@@ -34,6 +34,9 @@ + #define R_AX_SYS_CLK_CTRL 0x0008 + #define B_AX_CPU_CLK_EN BIT(14) + ++#define R_AX_SYS_SWR_CTRL1 0x0010 ++#define B_AX_SYM_CTRL_SPS_PWMFREQ BIT(10) ++ + #define R_AX_SYS_ADIE_PAD_PWR_CTRL 0x0018 + #define B_AX_SYM_PADPDN_WL_PTA_1P3 BIT(6) + #define B_AX_SYM_PADPDN_WL_RFC_1P3 BIT(5) +@@ -42,6 +45,9 @@ + #define B_AX_R_DIS_PRST BIT(6) + #define B_AX_WLOCK_1C_BIT6 BIT(5) + ++#define R_AX_AFE_LDO_CTRL 0x0020 ++#define B_AX_AON_OFF_PC_EN BIT(23) ++ + #define R_AX_EFUSE_CTRL_1 0x0038 + #define B_AX_EF_PGPD_MASK GENMASK(30, 28) + #define B_AX_EF_RDT BIT(27) +@@ -118,6 +124,9 @@ + #define B_AX_R_AX_BG_LPF BIT(2) + #define B_AX_R_AX_BG GENMASK(1, 0) + ++#define R_AX_HCI_LDO_CTRL 0x007A ++#define B_AX_R_AX_VADJ_MASK GENMASK(3, 0) ++ + #define R_AX_PLATFORM_ENABLE 0x0088 + #define B_AX_AXIDMA_EN BIT(3) + #define B_AX_WCPU_EN BIT(1) +@@ -125,6 +134,7 @@ + + #define R_AX_WLLPS_CTRL 0x0090 + #define B_AX_DIS_WLBT_LPSEN_LOPC BIT(1) ++#define SW_LPS_OPTION 0x0001A0B2 + + #define R_AX_SCOREBOARD 0x00AC + #define B_AX_TOGGLE BIT(31) +@@ -229,6 +239,13 @@ + + #define R_AX_GPIO0_7_FUNC_SEL 0x02D0 + ++#define R_AX_EECS_EESK_FUNC_SEL 0x02D8 ++#define B_AX_PINMUX_EESK_FUNC_SEL_MASK GENMASK(7, 4) ++ ++#define R_AX_LED1_FUNC_SEL 0x02DC ++#define B_AX_PINMUX_EESK_FUNC_SEL_V1_MASK GENMASK(27, 24) ++#define PINMUX_EESK_FUNC_SEL_BT_LOG 0x1 ++ + #define R_AX_GPIO0_15_EECS_EESK_LED1_PULL_LOW_EN 0x02E4 + #define B_AX_LED1_PULL_LOW_EN BIT(18) + #define B_AX_EESK_PULL_LOW_EN BIT(17) +@@ -249,6 +266,10 @@ + #define B_AX_USB_HCISYS_PWR_STE_MASK GENMASK(3, 2) + #define B_AX_PCIE_HCISYS_PWR_STE_MASK GENMASK(1, 0) + ++#define R_AX_SPS_DIG_OFF_CTRL0 0x0400 ++#define B_AX_C3_L1_MASK GENMASK(5, 4) ++#define B_AX_C1_L1_MASK GENMASK(1, 0) ++ + #define R_AX_AFE_OFF_CTRL1 0x0444 + #define B_AX_S1_LDO_VSEL_F_MASK GENMASK(25, 24) + #define B_AX_S1_LDO2PWRCUT_F BIT(23) +@@ -305,8 +326,7 @@ + + #define R_AX_PCIE_DBG_CTRL 0x11C0 + #define B_AX_DBG_DUMMY_MASK GENMASK(23, 16) +-#define B_AX_DBG_SEL_MASK GENMASK(15, 13) +-#define B_AX_PCIE_DBG_SEL BIT(12) ++#define B_AX_PCIE_DBG_SEL_MASK GENMASK(15, 13) + #define B_AX_MRD_TIMEOUT_EN BIT(10) + #define B_AX_ASFF_FULL_NO_STK BIT(1) + #define B_AX_EN_STUCK_DBG BIT(0) +@@ -445,6 +465,7 @@ + #define B_AX_DISPATCHER_EN BIT(18) + #define B_AX_BBRPT_EN BIT(17) + #define B_AX_MAC_SEC_EN BIT(16) ++#define B_AX_DMACREG_GCKEN BIT(15) + #define B_AX_MAC_UN_EN BIT(15) + #define B_AX_H_AXIDMA_EN BIT(14) + +@@ -523,6 +544,19 @@ + #define B_AX_WDE_EMPTY_QUE_CMAC0_MBH BIT(1) + #define B_AX_WDE_EMPTY_QUE_CMAC0_ALL_AC BIT(0) + ++#define R_AX_DLE_EMPTY1 0x8434 ++#define B_AX_PLE_EMPTY_QTA_DMAC_WDRLS BIT(20) ++#define B_AX_PLE_EMPTY_QTA_CMAC1_DMA_BBRPT BIT(19) ++#define B_AX_PLE_EMPTY_QTA_CMAC1_DMA_RX BIT(18) ++#define B_AX_PLE_EMPTY_QTA_CMAC0_DMA_RX BIT(17) ++#define B_AX_PLE_EMPTY_QTA_DMAC_C2H BIT(16) ++#define B_AX_PLE_EMPTY_QUE_DMAC_PLRLS BIT(5) ++#define B_AX_PLE_EMPTY_QUE_DMAC_CPUIO BIT(4) ++#define B_AX_PLE_EMPTY_QUE_DMAC_SEC_RX BIT(3) ++#define B_AX_PLE_EMPTY_QUE_DMAC_MPDU_RX BIT(2) ++#define B_AX_PLE_EMPTY_QUE_DMAC_HDP BIT(1) ++#define B_AX_WDE_EMPTY_QUE_DMAC_WDRLS BIT(0) ++ + #define R_AX_DMAC_ERR_IMR 0x8520 + #define B_AX_DLE_CPUIO_ERR_INT_EN BIT(10) + #define B_AX_APB_BRIDGE_ERR_INT_EN BIT(9) +@@ -539,6 +573,10 @@ + #define DMAC_ERR_IMR_DIS 0 + + #define R_AX_DMAC_ERR_ISR 0x8524 ++#define B_AX_HAXIDMA_ERR_FLAG BIT(14) ++#define B_AX_PAXIDMA_ERR_FLAG BIT(13) ++#define B_AX_HCI_BUF_ERR_FLAG BIT(12) ++#define B_AX_BBRPT_ERR_FLAG BIT(11) + #define B_AX_DLE_CPUIO_ERR_FLAG BIT(10) + #define B_AX_APB_BRIDGE_ERR_FLAG BIT(9) + #define B_AX_DISPATCH_ERR_FLAG BIT(8) +@@ -917,6 +955,14 @@ + B_AX_STF_OQT_OVERFLOW_ERR_INT_EN | \ + B_AX_STF_OQT_UNDERFLOW_ERR_INT_EN) + ++#define R_AX_DISPATCHER_DBG_PORT 0x8860 ++#define B_AX_DISPATCHER_DBG_SEL_MASK GENMASK(11, 8) ++#define B_AX_DISPATCHER_INTN_SEL_MASK GENMASK(7, 4) ++#define B_AX_DISPATCHER_CH_SEL_MASK GENMASK(3, 0) ++ ++#define R_AX_RX_FUNCTION_STOP 0x8920 ++#define B_AX_HDR_RX_STOP BIT(0) ++ + #define R_AX_HCI_FC_CTRL 0x8A00 + #define B_AX_HCI_FC_CH12_FULL_COND_MASK GENMASK(11, 10) + #define B_AX_HCI_FC_WP_CH811_FULL_COND_MASK GENMASK(9, 8) +@@ -998,7 +1044,13 @@ + #define R_AX_WDE_ERRFLAG_MSG 0x8C30 + #define B_AX_WDE_ERR_FLAG_MSG_MASK GENMASK(31, 0) + +-#define R_AX_WDE_ERR_FLAG_CFG 0x8C34 ++#define R_AX_WDE_ERR_FLAG_CFG_NUM1 0x8C34 ++#define B_AX_WDE_ERR_FLAG_NUM1_VLD BIT(31) ++#define B_AX_WDE_ERR_FLAG_NUM1_MSTIDX_MASK GENMASK(27, 24) ++#define B_AX_WDE_ERR_FLAG_NUM1_ISRIDX_MASK GENMASK(20, 16) ++#define B_AX_WDE_DATCHN_FRZTMR_MODE BIT(2) ++#define B_AX_WDE_QUEMGN_FRZTMR_MODE BIT(1) ++#define B_AX_WDE_BUFMGN_FRZTMR_MODE BIT(0) + + #define R_AX_WDE_ERR_IMR 0x8C38 + #define B_AX_WDE_DATCHN_RRDY_ERR_INT_EN BIT(27) +@@ -1182,7 +1234,59 @@ + #define B_AX_PLE_START_BOUND_MASK GENMASK(13, 8) + #define B_AX_PLE_PAGE_SEL_MASK GENMASK(1, 0) + #define B_AX_PLE_FREE_PAGE_NUM_MASK GENMASK(28, 16) +-#define R_AX_PLE_ERR_FLAG_CFG 0x9034 ++ ++#define R_AX_PLE_DBGERR_LOCKEN 0x9020 ++#define B_AX_PLE_LOCKEN_DLEPIF07 BIT(7) ++#define B_AX_PLE_LOCKEN_DLEPIF06 BIT(6) ++#define B_AX_PLE_LOCKEN_DLEPIF05 BIT(5) ++#define B_AX_PLE_LOCKEN_DLEPIF04 BIT(4) ++#define B_AX_PLE_LOCKEN_DLEPIF03 BIT(3) ++#define B_AX_PLE_LOCKEN_DLEPIF02 BIT(2) ++#define B_AX_PLE_LOCKEN_DLEPIF01 BIT(1) ++#define B_AX_PLE_LOCKEN_DLEPIF00 BIT(0) ++ ++#define R_AX_PLE_DBGERR_STS 0x9024 ++#define B_AX_PLE_LOCKON_DLEPIF07 BIT(7) ++#define B_AX_PLE_LOCKON_DLEPIF06 BIT(6) ++#define B_AX_PLE_LOCKON_DLEPIF05 BIT(5) ++#define B_AX_PLE_LOCKON_DLEPIF04 BIT(4) ++#define B_AX_PLE_LOCKON_DLEPIF03 BIT(3) ++#define B_AX_PLE_LOCKON_DLEPIF02 BIT(2) ++#define B_AX_PLE_LOCKON_DLEPIF01 BIT(1) ++#define B_AX_PLE_LOCKON_DLEPIF00 BIT(0) ++ ++#define R_AX_PLE_ERR_FLAG_CFG_NUM1 0x9034 ++#define B_AX_PLE_ERR_FLAG_NUM1_VLD BIT(31) ++#define B_AX_PLE_ERR_FLAG_NUM1_MSTIDX_MASK GENMASK(27, 24) ++#define B_AX_PLE_ERR_FLAG_NUM1_ISRIDX_MASK GENMASK(20, 16) ++#define B_AX_PLE_DATCHN_FRZTMR_MODE BIT(2) ++#define B_AX_PLE_QUEMGN_FRZTMR_MODE BIT(1) ++#define B_AX_PLE_BUFMGN_FRZTMR_MODE BIT(0) ++ ++#define R_AX_PLE_ERRFLAG_MSG 0x9030 ++#define B_AX_PLE_ERR_FLAG_MSG_MASK GENMASK(31, 0) ++#define B_AX_PLE_DATCHN_CAMREQ_ERR_INT_EN BIT(29) ++#define B_AX_PLE_DATCHN_ADRERR_ERR_INT_EN BIT(28) ++#define B_AX_PLE_BUFMGN_FRZTO_ERR_INT_EN_V1 BIT(9) ++#define B_AX_PLE_GETNPG_PGOFST_ERR_INT_EN_V1 BIT(8) ++#define B_AX_PLE_GETNPG_STRPG_ERR_INT_EN_V1 BIT(7) ++#define B_AX_PLE_BUFREQ_SRCHTAILPG_ERR_INT_EN_V1 BIT(6) ++#define B_AX_PLE_BUFRTN_SIZE_ERR_INT_EN_V1 BIT(5) ++#define B_AX_PLE_BUFRTN_INVLD_PKTID_ERR_INT_EN_V1 BIT(4) ++#define B_AX_PLE_BUFREQ_UNAVAL_ERR_INT_EN_V1 BIT(3) ++#define B_AX_PLE_BUFREQ_SIZELMT_INT_EN BIT(2) ++#define B_AX_PLE_BUFREQ_SIZE0_INT_EN BIT(1) ++#define B_AX_PLE_DATCHN_CAMREQ_ERR BIT(29) ++#define B_AX_PLE_DATCHN_ADRERR_ERR BIT(28) ++#define B_AX_PLE_BUFMGN_FRZTO_ERR_V1 BIT(9) ++#define B_AX_PLE_GETNPG_PGOFST_ERR_V1 BIT(8) ++#define B_AX_PLE_GETNPG_STRPG_ERR_V1 BIT(7) ++#define B_AX_PLE_BUFREQ_SRCHTAILPG_ERR_V1 BIT(6) ++#define B_AX_PLE_BUFRTN_SIZE_ERR_V1 BIT(5) ++#define B_AX_PLE_BUFRTN_INVLD_PKTID_ERR_V1 BIT(4) ++#define B_AX_PLE_BUFREQ_UNAVAL_ERR_V1 BIT(3) ++#define B_AX_PLE_BUFREQ_SIZELMT_ERR BIT(2) ++#define B_AX_PLE_BUFREQ_SIZE0_ERR BIT(1) + + #define R_AX_PLE_ERR_IMR 0x9038 + #define B_AX_PLE_DATCHN_RRDY_ERR_INT_EN BIT(27) +@@ -1393,6 +1497,19 @@ + #define B_AX_BBRPT_COM_NULL_PLPKTID_ERR BIT(16) + #define B_AX_BBRPT_COM_NULL_PLPKTID_ERR_INT_EN BIT(0) + ++#define R_AX_BBRPT_COM_ERR_ISR 0x960C ++#define B_AX_BBRPT_COM_NULL_PLPKTID_ERR_INT_V1 BIT(0) ++ ++#define R_AX_BBRPT_CHINFO_ERR_ISR 0x962C ++#define B_AX_BBPRT_CHIF_TO_ERR_V1 BIT(7) ++#define B_AX_BBPRT_CHIF_NULL_ERR_V1 BIT(6) ++#define B_AX_BBPRT_CHIF_LEFT2_ERR_V1 BIT(5) ++#define B_AX_BBPRT_CHIF_LEFT1_ERR_V1 BIT(4) ++#define B_AX_BBPRT_CHIF_HDRL_ERR_V1 BIT(3) ++#define B_AX_BBPRT_CHIF_BOVF_ERR_V1 BIT(2) ++#define B_AX_BBPRT_CHIF_OVF_ERR_V1 BIT(1) ++#define B_AX_BBPRT_CHIF_BB_TO_ERR_V1 BIT(0) ++ + #define R_AX_BBRPT_CHINFO_ERR_IMR 0x9628 + #define B_AX_BBPRT_CHIF_TO_ERR_INT_EN BIT(7) + #define B_AX_BBPRT_CHIF_NULL_ERR_INT_EN BIT(6) +@@ -1444,6 +1561,9 @@ + #define B_AX_BBRPT_DFS_TO_ERR BIT(16) + #define B_AX_BBRPT_DFS_TO_ERR_INT_EN BIT(0) + ++#define R_AX_BBRPT_DFS_ERR_ISR 0x963C ++#define B_AX_BBRPT_DFS_TO_ERR_V1 BIT(0) ++ + #define R_AX_LA_ERRFLAG 0x966C + #define B_AX_LA_ISR_DATA_LOSS_ERR BIT(16) + #define B_AX_LA_IMR_DATA_LOSS_ERR BIT(0) +@@ -1535,6 +1655,8 @@ + #define R_AX_ACTION_FWD0 0x9C04 + #define TRXCFG_MPDU_PROC_ACT_FRWD 0x02A95A95 + ++#define R_AX_ACTION_FWD1 0x9C08 ++ + #define R_AX_TF_FWD 0x9C14 + #define TRXCFG_MPDU_PROC_TF_FRWD 0x0000AA55 + +@@ -1546,6 +1668,9 @@ + #define R_AX_CUT_AMSDU_CTRL 0x9C40 + #define TRXCFG_MPDU_PROC_CUT_CTRL 0x010E05F0 + ++#define R_AX_WOW_CTRL 0x9C50 ++#define B_AX_WOW_WOWEN BIT(1) ++ + #define R_AX_MPDU_RX_ERR_ISR 0x9CF0 + #define R_AX_MPDU_RX_ERR_IMR 0x9CF4 + #define B_AX_RPT_ERR_INT_EN BIT(3) +@@ -1554,6 +1679,7 @@ + #define B_AX_MPDU_RX_IMR_SET_V1 B_AX_RPT_ERR_INT_EN + + #define R_AX_SEC_ENG_CTRL 0x9D00 ++#define B_AX_SEC_DBG_PORT_FIELD_MASK GENMASK(19, 16) + #define B_AX_TX_PARTIAL_MODE BIT(11) + #define B_AX_CLK_EN_CGCMP BIT(10) + #define B_AX_CLK_EN_WAPI BIT(9) +@@ -1583,12 +1709,21 @@ + #define R_AX_SEC_TX_DEBUG 0x9D20 + #define R_AX_SEC_RX_DEBUG 0x9D24 + #define R_AX_SEC_TRX_PKT_CNT 0x9D28 ++ ++#define R_AX_SEC_DEBUG2 0x9D28 ++#define B_AX_DBG_READ_SH 2 ++#define B_AX_DBG_READ_MSK 0x3fffffff ++ + #define R_AX_SEC_TRX_BLK_CNT 0x9D2C + + #define R_AX_SEC_ERROR_FLAG_IMR 0x9D2C + #define B_AX_RX_HANG_IMR BIT(1) + #define B_AX_TX_HANG_IMR BIT(0) + ++#define R_AX_SEC_ERROR_FLAG 0x9D30 ++#define B_AX_RX_HANG_ERROR_V1 BIT(1) ++#define B_AX_TX_HANG_ERROR_V1 BIT(0) ++ + #define R_AX_SS_CTRL 0x9E10 + #define B_AX_SS_INIT_DONE_1 BIT(31) + #define B_AX_SS_WARM_INIT_FLG BIT(29) +@@ -1723,6 +1858,28 @@ + B_AX_B0_IMR_ERR_PRELD_RLSPKTSZERR | \ + B_AX_B0_IMR_ERR_PRELD_ENTNUMCFG) + ++#define R_AX_TXPKTCTL_B0_ERRFLAG_ISR 0x9F7C ++#define B_AX_B0_ISR_ERR_PRELD_EVT3 BIT(23) ++#define B_AX_B0_ISR_ERR_PRELD_EVT2 BIT(22) ++#define B_AX_B0_ISR_ERR_PRELD_ENTNUMCFG BIT(21) ++#define B_AX_B0_ISR_ERR_PRELD_RLSPKTSZERR BIT(20) ++#define B_AX_B0_ISR_ERR_MPDUIF_ERR1 BIT(19) ++#define B_AX_B0_ISR_ERR_MPDUIF_DATAERR BIT(18) ++#define B_AX_B0_ISR_ERR_MPDUINFO_ERR1 BIT(17) ++#define B_AX_B0_ISR_ERR_MPDUINFO_RECFG BIT(16) ++#define B_AX_B0_ISR_ERR_CMDPSR_TBLSZ BIT(11) ++#define B_AX_B0_ISR_ERR_CMDPSR_FRZTO BIT(10) ++#define B_AX_B0_ISR_ERR_CMDPSR_CMDTYPE BIT(9) ++#define B_AX_B0_ISR_ERR_CMDPSR_1STCMDERR BIT(8) ++#define B_AX_B0_ISR_ERR_USRCTL_EVT7 BIT(7) ++#define B_AX_B0_ISR_ERR_USRCTL_EVT6 BIT(6) ++#define B_AX_B0_ISR_ERR_USRCTL_EVT5 BIT(5) ++#define B_AX_B0_ISR_ERR_USRCTL_EVT4 BIT(4) ++#define B_AX_B0_ISR_ERR_USRCTL_RLSBMPLEN BIT(3) ++#define B_AX_B0_ISR_ERR_USRCTL_RDNRLSCMD BIT(2) ++#define B_AX_B0_ISR_ERR_USRCTL_NOINIT BIT(1) ++#define B_AX_B0_ISR_ERR_USRCTL_REINIT BIT(0) ++ + #define R_AX_TXPKTCTL_B1_PRELD_CFG0 0x9F88 + #define B_AX_B1_PRELD_FEN BIT(31) + #define B_AX_B1_PRELD_USEMAXSZ_MASK GENMASK(25, 16) +@@ -1770,6 +1927,28 @@ + B_AX_B1_IMR_ERR_PRELD_RLSPKTSZERR | \ + B_AX_B1_IMR_ERR_PRELD_ENTNUMCFG) + ++#define R_AX_TXPKTCTL_B1_ERRFLAG_ISR 0x9FBC ++#define B_AX_B1_ISR_ERR_PRELD_EVT3 BIT(23) ++#define B_AX_B1_ISR_ERR_PRELD_EVT2 BIT(22) ++#define B_AX_B1_ISR_ERR_PRELD_ENTNUMCFG BIT(21) ++#define B_AX_B1_ISR_ERR_PRELD_RLSPKTSZERR BIT(20) ++#define B_AX_B1_ISR_ERR_MPDUIF_ERR1 BIT(19) ++#define B_AX_B1_ISR_ERR_MPDUIF_DATAERR BIT(18) ++#define B_AX_B1_ISR_ERR_MPDUINFO_ERR1 BIT(17) ++#define B_AX_B1_ISR_ERR_MPDUINFO_RECFG BIT(16) ++#define B_AX_B1_ISR_ERR_CMDPSR_TBLSZ BIT(11) ++#define B_AX_B1_ISR_ERR_CMDPSR_FRZTO BIT(10) ++#define B_AX_B1_ISR_ERR_CMDPSR_CMDTYPE BIT(9) ++#define B_AX_B1_ISR_ERR_CMDPSR_1STCMDERR BIT(8) ++#define B_AX_B1_ISR_ERR_USRCTL_EVT7 BIT(7) ++#define B_AX_B1_ISR_ERR_USRCTL_EVT6 BIT(6) ++#define B_AX_B1_ISR_ERR_USRCTL_EVT5 BIT(5) ++#define B_AX_B1_ISR_ERR_USRCTL_EVT4 BIT(4) ++#define B_AX_B1_ISR_ERR_USRCTL_RLSBMPLEN BIT(3) ++#define B_AX_B1_ISR_ERR_USRCTL_RDNRLSCMD BIT(2) ++#define B_AX_B1_ISR_ERR_USRCTL_NOINIT BIT(1) ++#define B_AX_B1_ISR_ERR_USRCTL_REINIT BIT(0) ++ + #define R_AX_AFE_CTRL1 0x0024 + + #define B_AX_R_SYM_WLCMAC1_P4_PC_EN BIT(4) +@@ -1869,6 +2048,23 @@ + #define B_AX_PTCL_TOP_ERR_IND BIT(1) + #define B_AX_SCHEDULE_TOP_ERR_IND BIT(0) + ++#define R_AX_PORT0_TSF_SYNC 0xC2A0 ++#define R_AX_PORT0_TSF_SYNC_C1 0xE2A0 ++#define R_AX_PORT1_TSF_SYNC 0xC2A4 ++#define R_AX_PORT1_TSF_SYNC_C1 0xE2A4 ++#define R_AX_PORT2_TSF_SYNC 0xC2A8 ++#define R_AX_PORT2_TSF_SYNC_C1 0xE2A8 ++#define R_AX_PORT3_TSF_SYNC 0xC2AC ++#define R_AX_PORT3_TSF_SYNC_C1 0xE2AC ++#define R_AX_PORT4_TSF_SYNC 0xC2B0 ++#define R_AX_PORT4_TSF_SYNC_C1 0xE2B0 ++#define B_AX_SYNC_NOW BIT(30) ++#define B_AX_SYNC_ONCE BIT(29) ++#define B_AX_SYNC_AUTO BIT(28) ++#define B_AX_SYNC_PORT_SRC GENMASK(26, 24) ++#define B_AX_SYNC_PORT_OFFSET_SIGN BIT(18) ++#define B_AX_SYNC_PORT_OFFSET_VAL GENMASK(17, 0) ++ + #define R_AX_MACID_SLEEP_0 0xC2C0 + #define R_AX_MACID_SLEEP_0_C1 0xE2C0 + #define B_AX_MACID31_0_SLEEP_SH 0 +@@ -2338,6 +2534,41 @@ + #define B_AX_DLE_IMR_SET (B_AX_RXSTS_FSM_HANG_ERROR_IMR | \ + B_AX_RXDATA_FSM_HANG_ERROR_IMR) + ++#define R_AX_RX_ERR_FLAG 0xC800 ++#define R_AX_RX_ERR_FLAG_C1 0xE800 ++#define B_AX_RX_GET_NO_PAGE_ERR BIT(31) ++#define B_AX_RX_GET_NULL_PKT_ERR BIT(30) ++#define B_AX_RX_RU0_FSM_HANG_ERR BIT(29) ++#define B_AX_RX_RU1_FSM_HANG_ERR BIT(28) ++#define B_AX_RX_RU2_FSM_HANG_ERR BIT(27) ++#define B_AX_RX_RU3_FSM_HANG_ERR BIT(26) ++#define B_AX_RX_RU4_FSM_HANG_ERR BIT(25) ++#define B_AX_RX_RU5_FSM_HANG_ERR BIT(24) ++#define B_AX_RX_RU6_FSM_HANG_ERR BIT(23) ++#define B_AX_RX_RU7_FSM_HANG_ERR BIT(22) ++#define B_AX_RX_RXSTS_FSM_HANG_ERR BIT(21) ++#define B_AX_RX_CSI_FSM_HANG_ERR BIT(20) ++#define B_AX_RX_TXRPT_FSM_HANG_ERR BIT(19) ++#define B_AX_RX_F2PCMD_FSM_HANG_ERR BIT(18) ++#define B_AX_RX_RU0_ZERO_LEN_ERR BIT(17) ++#define B_AX_RX_RU1_ZERO_LEN_ERR BIT(16) ++#define B_AX_RX_RU2_ZERO_LEN_ERR BIT(15) ++#define B_AX_RX_RU3_ZERO_LEN_ERR BIT(14) ++#define B_AX_RX_RU4_ZERO_LEN_ERR BIT(13) ++#define B_AX_RX_RU5_ZERO_LEN_ERR BIT(12) ++#define B_AX_RX_RU6_ZERO_LEN_ERR BIT(11) ++#define B_AX_RX_RU7_ZERO_LEN_ERR BIT(10) ++#define B_AX_RX_RXSTS_ZERO_LEN_ERR BIT(9) ++#define B_AX_RX_CSI_ZERO_LEN_ERR BIT(8) ++#define B_AX_PLE_DATA_OPT_FSM_HANG BIT(7) ++#define B_AX_PLE_RXDATA_REQ_BUF_FSM_HANG BIT(6) ++#define B_AX_PLE_TXRPT_REQ_BUF_FSM_HANG BIT(5) ++#define B_AX_PLE_WD_OPT_FSM_HANG BIT(4) ++#define B_AX_PLE_ENQ_FSM_HANG BIT(3) ++#define B_AX_RXDATA_ENQUE_ORDER_ERR BIT(2) ++#define B_AX_RXSTS_ENQUE_ORDER_ERR BIT(1) ++#define B_AX_RX_CSI_PKT_NUM_ERR BIT(0) ++ + #define R_AX_RXDMA_CTRL_0 0xC804 + #define R_AX_RXDMA_CTRL_0_C1 0xE804 + #define B_AX_RXDMA_DBGOUT_EN BIT(31) +@@ -2360,6 +2591,49 @@ + B_AX_RU2_PTR_FULL_MODE | B_AX_RU3_PTR_FULL_MODE | \ + B_AX_CSI_PTR_FULL_MODE | B_AX_RXSTS_PTR_FULL_MODE) + ++#define R_AX_RX_CTRL0 0xC808 ++#define R_AX_RX_CTRL0_C1 0xE808 ++#define B_AX_DLE_CLOCK_FORCE_V1 BIT(31) ++#define B_AX_TXDMA_CLOCK_FORCE_V1 BIT(30) ++#define B_AX_RXDMA_CLOCK_FORCE_V1 BIT(29) ++#define B_AX_RXDMA_DEFAULT_PAGE_V1_MASK GENMASK(28, 24) ++#define B_AX_RXDMA_CSI_TGT_QUEID_MASK GENMASK(23, 18) ++#define B_AX_RXDMA_CSI_TGT_PRID_MASK GENMASK(17, 15) ++#define B_AX_RXDMA_DIS_CSI_RELEASE_V1 BIT(14) ++#define B_AX_CSI_PTR_FULL_MODE_V1 BIT(13) ++#define B_AX_RXDATA_PTR_FULL_MODE BIT(12) ++#define B_AX_RXSTS_PTR_FULL_MODE_V1 BIT(11) ++#define B_AX_TXRPT_FULL_RSV_DEPTH_V1_MASK GENMASK(10, 8) ++#define B_AX_RXDATA_FULL_RSV_DEPTH_MASK GENMASK(7, 5) ++#define B_AX_RXSTS_FULL_RSV_DEPTH_V1_MASK GENMASK(4, 2) ++#define B_AX_ORDER_FIFO_MASK GENMASK(1, 0) ++ ++#define R_AX_RX_CTRL1 0xC80C ++#define R_AX_RX_CTRL1_C1 0xE80C ++#define B_AX_RXDMA_TXRPT_QUEUE_ID_SW_EN BIT(31) ++#define B_AX_RXDMA_TXRPT_QUEUE_ID_SW_V1_MASK GENMASK(30, 25) ++#define B_AX_RXDMA_F2PCMD_QUEUE_ID_SW_EN BIT(24) ++#define B_AX_RXDMA_F2PCMD_QUEUE_ID_SW_V1_MASK GENMASK(23, 18) ++#define B_AX_RXDMA_TXRPT_QUEUE_ID_TGT_SW_EN BIT(17) ++#define B_AX_RXDMA_TXRPT_QUEUE_ID_TGT_SW_1_MASK GENMASK(16, 11) ++#define B_AX_RXDMA_F2PCMD_QUEUE_ID_TGT_SW_EN BIT(10) ++#define B_AX_RXDMA_F2PCMD_QUEUE_ID_TGT_SW_1_MASK GENMASK(9, 4) ++#define B_AX_ORDER_FIFO_OUT BIT(3) ++#define B_AX_ORDER_FIFO_EMPTY BIT(2) ++#define B_AX_DBG_SEL_MASK GENMASK(1, 0) ++ ++#define R_AX_RX_CTRL2 0xC810 ++#define R_AX_RX_CTRL2_C1 0xE810 ++#define B_AX_DLE_WDE_STATE_V1_MASK GENMASK(31, 30) ++#define B_AX_DLE_PLE_STATE_V1_MASK GENMASK(29, 28) ++#define B_AX_DLE_REQ_BUF_STATE_MASK GENMASK(27, 26) ++#define B_AX_DLE_ENQ_STATE_V1 BIT(25) ++#define B_AX_RX_DBG_SEL_MASK GENMASK(24, 19) ++#define B_AX_MACRX_CS_MASK GENMASK(18, 14) ++#define B_AX_RXSTS_CS_MASK GENMASK(13, 9) ++#define B_AX_ERR_INDICATOR BIT(5) ++#define B_AX_TXRPT_CS_MASK GENMASK(4, 0) ++ + #define R_AX_RXDMA_PKT_INFO_0 0xC814 + #define R_AX_RXDMA_PKT_INFO_1 0xC818 + #define R_AX_RXDMA_PKT_INFO_2 0xC81C +@@ -2667,6 +2941,18 @@ + B_AX_TMAC_MIMO_CTRL | \ + B_AX_RMAC_FTM) + ++#define R_AX_TRXPTCL_ERROR_INDICA 0xCCC0 ++#define R_AX_TRXPTCL_ERROR_INDICA_C1 0xECC0 ++#define B_AX_FTM_ERROR_FLAG_CLR BIT(8) ++#define B_AX_CSI_ERROR_FLAG_CLR BIT(7) ++#define B_AX_MIMOCTRL_ERROR_FLAG_CLR BIT(6) ++#define B_AX_RXTB_ERROR_FLAG_CLR BIT(5) ++#define B_AX_HWSIGB_GEN_ERROR_FLAG_CLR BIT(4) ++#define B_AX_TXPLCP_ERROR_FLAG_CLR BIT(3) ++#define B_AX_RESP_ERROR_FLAG_CLR BIT(2) ++#define B_AX_TXCTL_ERROR_FLAG_CLR BIT(1) ++#define B_AX_MACTX_ERROR_FLAG_CLR BIT(0) ++ + #define R_AX_WMAC_TX_TF_INFO_0 0xCCD0 + #define R_AX_WMAC_TX_TF_INFO_0_C1 0xECD0 + #define B_AX_WMAC_TX_TF_INFO_SEL_MASK GENMASK(2, 0) +@@ -2991,6 +3277,7 @@ + + #define R_AX_PWR_RATE_CTRL 0xD200 + #define R_AX_PWR_RATE_CTRL_C1 0xF200 ++#define B_AX_PWR_REF GENMASK(27, 10) + #define B_AX_FORCE_PWR_BY_RATE_EN BIT(9) + #define B_AX_FORCE_PWR_BY_RATE_VALUE_MASK GENMASK(8, 0) + +@@ -3128,6 +3415,7 @@ + #define BTC_BREAK_PARAM 0xf0ffffff + + #define R_BTC_BT_COEX_MSK_TABLE 0xDA30 ++#define B_BTC_PRI_MASK_RXCCK_V1 BIT(28) + #define B_BTC_PRI_MASK_TX_RESP_V1 BIT(3) + + #define R_AX_BT_COEX_CFG_2 0xDA34 +@@ -3271,8 +3559,10 @@ + #define RR_MOD_IQK GENMASK(19, 4) + #define RR_MOD_DPK GENMASK(19, 5) + #define RR_MOD_MASK GENMASK(19, 16) ++#define RR_MOD_RGM GENMASK(13, 4) + #define RR_MOD_V_DOWN 0x0 + #define RR_MOD_V_STANDBY 0x1 ++#define RR_TXAGC 0x10001 + #define RR_MOD_V_TX 0x2 + #define RR_MOD_V_RX 0x3 + #define RR_MOD_V_TXIQK 0x4 +@@ -3308,6 +3598,10 @@ + #define CFGCH_BAND1_2G 0 + #define CFGCH_BAND1_5G 1 + #define CFGCH_BAND1_6G 3 ++#define RR_CFGCH_POW_LCK BIT(15) ++#define RR_CFGCH_TRX_AH BIT(14) ++#define RR_CFGCH_BCN BIT(13) ++#define RR_CFGCH_BW2 BIT(12) + #define RR_CFGCH_BAND0 GENMASK(9, 8) + #define CFGCH_BAND0_2G 0 + #define CFGCH_BAND0_5G 1 +@@ -3340,6 +3634,7 @@ + #define RR_RXK_PLLEN BIT(5) + #define RR_LUTWA 0x33 + #define RR_LUTWA_MASK GENMASK(9, 0) ++#define RR_LUTWA_M1 GENMASK(7, 0) + #define RR_LUTWA_M2 GENMASK(4, 0) + #define RR_LUTWD1 0x3e + #define RR_LUTWD0 0x3f +@@ -3359,6 +3654,8 @@ + #define RR_TXGA_TRK_EN BIT(7) + #define RR_TXGA_LOK_EXT GENMASK(4, 0) + #define RR_TXGA_LOK_EN BIT(0) ++#define RR_TXGA_V1 0x10055 ++#define RR_TXGA_V1_TRK_EN BIT(7) + #define RR_GAINTX 0x56 + #define RR_GAINTX_ALL GENMASK(15, 0) + #define RR_GAINTX_PAD GENMASK(9, 5) +@@ -3387,6 +3684,8 @@ + #define RR_TXA2_LDO GENMASK(19, 16) + #define RR_TRXIQ 0x66 + #define RR_RSV6 0x6d ++#define RR_TXVBUF 0x7c ++#define RR_TXVBUF_DACEN BIT(5) + #define RR_TXPOW 0x7f + #define RR_TXPOW_TXA BIT(8) + #define RR_TXPOW_TXAS BIT(7) +@@ -3397,6 +3696,7 @@ + #define RR_RXBB_VOBUF GENMASK(15, 12) + #define RR_RXBB_C2G GENMASK(16, 10) + #define RR_RXBB_C1G GENMASK(9, 8) ++#define RR_RXBB_FATT GENMASK(7, 0) + #define RR_RXBB_ATTR GENMASK(7, 4) + #define RR_RXBB_ATTC GENMASK(2, 0) + #define RR_RXG 0x84 +@@ -3407,10 +3707,14 @@ + #define RR_RXAE_IQKMOD GENMASK(3, 0) + #define RR_RXA 0x8a + #define RR_RXA_DPK GENMASK(9, 8) ++#define RR_RXA_LNA 0x8b + #define RR_RXA2 0x8c ++#define RR_RAA2_SWATT GENMASK(15, 9) + #define RR_RXA2_C1 GENMASK(12, 10) + #define RR_RXA2_C2 GENMASK(9, 3) ++#define RR_RXA2_CC2 GENMASK(8, 7) + #define RR_RXA2_IATT GENMASK(7, 4) ++#define RR_RXA2_HATT GENMASK(6, 0) + #define RR_RXA2_ATT GENMASK(3, 0) + #define RR_RXIQGEN 0x8d + #define RR_RXIQGEN_ATTL GENMASK(12, 8) +@@ -3422,6 +3726,7 @@ + #define RR_RXBB2_IDAC GENMASK(11, 9) + #define RR_RXBB2_EBW GENMASK(6, 5) + #define RR_XALNA2 0x90 ++#define RR_XALNA2_SW2 GENMASK(9, 8) + #define RR_XALNA2_SW GENMASK(1, 0) + #define RR_DCK 0x92 + #define RR_DCK_DONE GENMASK(7, 5) +@@ -3439,18 +3744,36 @@ + #define RR_IQGEN_BIAS GENMASK(11, 8) + #define RR_TXIQK 0x98 + #define RR_TXIQK_ATT2 GENMASK(15, 12) ++#define RR_TXIQK_ATT1 GENMASK(6, 0) + #define RR_TIA 0x9e + #define RR_TIA_N6 BIT(8) + #define RR_MIXER 0x9f + #define RR_MIXER_GN GENMASK(4, 3) ++#define RR_POW 0xa0 ++#define RR_POW_SYN GENMASK(3, 2) + #define RR_LOGEN 0xa3 + #define RR_LOGEN_RPT GENMASK(19, 16) ++#define RR_SX 0xaf ++#define RR_LDO 0xb1 ++#define RR_LDO_SEL GENMASK(8, 6) ++#define RR_VCO 0xb2 ++#define RR_LPF 0xb7 ++#define RR_LPF_BUSY BIT(8) + #define RR_XTALX2 0xb8 + #define RR_MALSEL 0xbe ++#define RR_SYNFB 0xc5 ++#define RR_SYNFB_LK BIT(15) ++#define RR_LCKST 0xcf ++#define RR_LCKST_BIN BIT(0) + #define RR_LCK_TRG 0xd3 + #define RR_LCK_TRGSEL BIT(8) ++#define RR_MMD 0xd5 ++#define RR_MMD_RST_EN BIT(8) ++#define RR_MMD_RST_SYN BIT(6) + #define RR_IQKPLL 0xdc + #define RR_IQKPLL_MOD GENMASK(9, 8) ++#define RR_SYNLUT 0xdd ++#define RR_SYNLUT_MOD BIT(4) + #define RR_RCKD 0xde + #define RR_RCKD_POW GENMASK(19, 13) + #define RR_RCKD_BW BIT(2) +@@ -3479,11 +3802,14 @@ + #define B_ANAPAR_ADCCLK BIT(30) + #define B_ANAPAR_FLTRST BIT(22) + #define B_ANAPAR_CRXBB GENMASK(18, 16) ++#define B_ANAPAR_EN BIT(16) + #define B_ANAPAR_14 GENMASK(15, 0) + #define R_RFE_E_A2 0x0334 + #define R_RFE_O_SEL_A2 0x0338 + #define R_RFE_SEL0_A2 0x033C + #define R_RFE_SEL32_A2 0x0340 ++#define R_CIRST 0x035c ++#define B_CIRST_SYN GENMASK(11, 10) + #define R_SWSI_DATA_V1 0x0370 + #define B_SWSI_DATA_VAL_V1 GENMASK(19, 0) + #define B_SWSI_DATA_ADDR_V1 GENMASK(27, 20) +@@ -3619,6 +3945,10 @@ + #define R_P0_RFMODE 0x12AC + #define B_P0_RFMODE_ORI_TXRX_FTM_TX GENMASK(31, 4) + #define B_P0_RFMODE_MUX GENMASK(11, 4) ++#define R_P0_RFMODE_ORI_RX 0x12AC ++#define B_P0_RFMODE_ORI_RX_ALL GENMASK(23, 12) ++#define R_P0_RFMODE_FTM_RX 0x12B0 ++#define B_P0_RFMODE_FTM_RX GENMASK(11, 0) + #define R_P0_NRBW 0x12B8 + #define B_P0_NRBW_DBG BIT(30) + #define R_S0_RXDC 0x12D4 +@@ -3671,6 +4001,9 @@ + #define B_TXAGC_TP GENMASK(2, 0) + #define R_TSSI_THER 0x1C10 + #define B_TSSI_THER GENMASK(29, 24) ++#define R_TSSI_CWRPT 0x1C18 ++#define B_TSSI_CWRPT_RDY BIT(16) ++#define B_TSSI_CWRPT GENMASK(8, 0) + #define R_TXAGC_BTP 0x1CA0 + #define B_TXAGC_BTP GENMASK(31, 24) + #define R_TXAGC_BB 0x1C60 +@@ -3712,6 +4045,8 @@ + #define B_RXCCA_DIS_V1 BIT(0) + #define R_RXSC 0x237C + #define B_RXSC_EN BIT(0) ++#define R_RX_RPL_OFST 0x23AC ++#define B_RX_RPL_OFST_CCK_MASK GENMASK(6, 0) + #define R_RXSCOBC 0x23B0 + #define B_RXSCOBC_TH GENMASK(18, 0) + #define R_RXSCOCCK 0x23B4 +@@ -3725,9 +4060,18 @@ + #define B_P1_EN_SOUND_WO_NDP BIT(1) + #define R_S1_HW_SI_DIS 0x3200 + #define B_S1_HW_SI_DIS_W_R_TRIG GENMASK(30, 28) ++#define R_P1_RXCK 0x32A0 ++#define B_P1_RXCK_BW3 BIT(30) ++#define B_P1_TXCK_ALL GENMASK(19, 12) ++#define B_P1_RXCK_ON BIT(19) ++#define B_P1_RXCK_VAL GENMASK(18, 16) + #define R_P1_RFMODE 0x32AC + #define B_P1_RFMODE_ORI_TXRX_FTM_TX GENMASK(31, 4) + #define B_P1_RFMODE_MUX GENMASK(11, 4) ++#define R_P1_RFMODE_ORI_RX 0x32AC ++#define B_P1_RFMODE_ORI_RX_ALL GENMASK(23, 12) ++#define R_P1_RFMODE_FTM_RX 0x32B0 ++#define B_P1_RFMODE_FTM_RX GENMASK(11, 0) + #define R_P1_DBGMOD 0x32B8 + #define B_P1_DBGMOD_ON BIT(30) + #define R_S1_RXDC 0x32D4 +@@ -3761,7 +4105,10 @@ + #define R_T2F_GI_COMB 0x4424 + #define B_T2F_GI_COMB_EN BIT(2) + #define R_BT_DYN_DC_EST_EN 0x441C ++#define R_BT_DYN_DC_EST_EN_V1 0x4420 + #define B_BT_DYN_DC_EST_EN_MSK BIT(31) ++#define R_ASSIGN_SBD_OPT_V1 0x4440 ++#define B_ASSIGN_SBD_OPT_EN_V1 BIT(31) + #define R_ASSIGN_SBD_OPT 0x4450 + #define B_ASSIGN_SBD_OPT_EN BIT(24) + #define R_DCFO_COMP_S0 0x448C +@@ -3770,8 +4117,12 @@ + #define B_DCFO_WEIGHT_MSK GENMASK(27, 24) + #define R_DCFO_OPT 0x4494 + #define B_DCFO_OPT_EN BIT(29) ++#define B_TXSHAPE_TRIANGULAR_CFG GENMASK(25, 24) + #define R_BANDEDGE 0x4498 + #define B_BANDEDGE_EN BIT(30) ++#define R_DPD_BF 0x44a0 ++#define B_DPD_BF_OFDM GENMASK(16, 12) ++#define B_DPD_BF_SCA GENMASK(6, 0) + #define R_TXPATH_SEL 0x458C + #define B_TXPATH_SEL_MSK GENMASK(31, 28) + #define R_TXPWR 0x4594 +@@ -3902,6 +4253,8 @@ + #define R_P1_NBIIDX 0x4770 + #define B_P1_NBIIDX_VAL GENMASK(11, 0) + #define B_P1_NBIIDX_NOTCH_EN BIT(12) ++#define R_PKT_CTRL 0x47D4 ++#define B_PKT_POP_EN BIT(8) + #define R_SEG0R_PD 0x481C + #define R_SEG0R_PD_V1 0x4860 + #define B_SEG0R_PD_SPATIAL_REUSE_EN_MSK_V1 BIT(30) +@@ -3910,20 +4263,42 @@ + #define R_2P4G_BAND 0x4970 + #define B_2P4G_BAND_SEL BIT(1) + #define R_FC0_BW 0x4974 +-#define B_FC0_BW_INV GENMASK(6, 0) ++#define R_FC0_BW_V1 0x49C0 + #define B_FC0_BW_SET GENMASK(31, 30) + #define B_ANT_RX_BT_SEG0 GENMASK(25, 22) + #define B_ANT_RX_1RCCA_SEG1 GENMASK(21, 18) + #define B_ANT_RX_1RCCA_SEG0 GENMASK(17, 14) ++#define B_FC0_BW_INV GENMASK(6, 0) + #define R_CHBW_MOD 0x4978 ++#define R_CHBW_MOD_V1 0x49C4 + #define B_BT_SHARE BIT(14) + #define B_CHBW_MOD_SBW GENMASK(13, 12) + #define B_CHBW_MOD_PRICH GENMASK(11, 8) + #define B_ANT_RX_SEG0 GENMASK(3, 0) ++#define R_P0_RPL1 0x49B0 ++#define B_P0_RPL1_41_MASK GENMASK(31, 24) ++#define B_P0_RPL1_40_MASK GENMASK(23, 16) ++#define B_P0_RPL1_20_MASK GENMASK(15, 8) ++#define B_P0_RPL1_MASK (B_P0_RPL1_41_MASK | B_P0_RPL1_40_MASK | B_P0_RPL1_20_MASK) ++#define B_P0_RPL1_SHIFT 8 ++#define B_P0_RPL1_BIAS_MASK GENMASK(7, 0) ++#define R_P0_RPL2 0x49B4 ++#define B_P0_RTL2_8A_MASK GENMASK(31, 24) ++#define B_P0_RTL2_81_MASK GENMASK(23, 16) ++#define B_P0_RTL2_80_MASK GENMASK(15, 8) ++#define B_P0_RTL2_42_MASK GENMASK(7, 0) ++#define R_P0_RPL3 0x49B8 ++#define B_P0_RTL3_89_MASK GENMASK(31, 24) ++#define B_P0_RTL3_84_MASK GENMASK(23, 16) ++#define B_P0_RTL3_83_MASK GENMASK(15, 8) ++#define B_P0_RTL3_82_MASK GENMASK(7, 0) + #define R_PD_BOOST_EN 0x49E8 + #define B_PD_BOOST_EN BIT(7) + #define R_P1_BACKOFF_IBADC_V1 0x49F0 + #define B_P1_BACKOFF_IBADC_V1 GENMASK(31, 26) ++#define R_P1_RPL1 0x4A00 ++#define R_P1_RPL2 0x4A04 ++#define R_P1_RPL3 0x4A08 + #define R_BK_FC0_INV_V1 0x4A1C + #define B_BK_FC0_INV_MSK_V1 GENMASK(18, 0) + #define R_CCK_FC0_INV_V1 0x4A20 +@@ -3934,8 +4309,10 @@ + #define B_P1_AGC_EN BIT(31) + #define R_PATH1_TIA_INIT_V1 0x4AA8 + #define B_PATH1_TIA_INIT_IDX_MSK_V1 BIT(9) ++#define R_P0_AGC_RSVD 0x4ACC + #define R_PATH0_RXBB_V1 0x4AD4 + #define B_PATH0_RXBB_MSK_V1 GENMASK(31, 0) ++#define R_P1_AGC_RSVD 0x4AD8 + #define R_PATH1_RXBB_V1 0x4AE0 + #define B_PATH1_RXBB_MSK_V1 GENMASK(31, 0) + #define R_PATH0_BT_BACKOFF_V1 0x4AE4 +@@ -3951,6 +4328,7 @@ + #define B_PATH0_NOTCH2_EN BIT(12) + #define B_PATH0_NOTCH2_VAL GENMASK(11, 0) + #define R_PATH0_5MDET 0x4C4C ++#define R_PATH0_5MDET_V1 0x46F8 + #define B_PATH0_5MDET_EN BIT(12) + #define B_PATH0_5MDET_SB2 BIT(8) + #define B_PATH0_5MDET_SB0 BIT(6) +@@ -3964,6 +4342,7 @@ + #define B_PATH1_NOTCH2_EN BIT(12) + #define B_PATH1_NOTCH2_VAL GENMASK(11, 0) + #define R_PATH1_5MDET 0x4D10 ++#define R_PATH1_5MDET_V1 0x47B8 + #define B_PATH1_5MDET_EN BIT(12) + #define B_PATH1_5MDET_SB2 BIT(8) + #define B_PATH1_5MDET_SB0 BIT(6) +@@ -3992,6 +4371,20 @@ + #define B_CFO_COMP_VALID_BIT BIT(29) + #define B_CFO_COMP_WEIGHT_MSK GENMASK(27, 24) + #define B_CFO_COMP_VAL_MSK GENMASK(11, 0) ++#define R_TSSI_PA_K1 0x5600 ++#define R_TSSI_PA_K2 0x5604 ++#define R_P0_TSSI_ALIM1 0x5630 ++#define B_P0_TSSI_ALIM1 GENMASK(29, 0) ++#define B_P0_TSSI_ALIM11 GENMASK(29, 20) ++#define B_P0_TSSI_ALIM12 GENMASK(19, 10) ++#define B_P0_TSSI_ALIM13 GENMASK(9, 0) ++#define R_P0_TSSI_ALIM3 0x5634 ++#define B_P0_TSSI_ALIM31 GENMASK(9, 0) ++#define R_TSSI_PA_K5 0x5638 ++#define R_P0_TSSI_ALIM2 0x563c ++#define B_P0_TSSI_ALIM2 GENMASK(29, 0) ++#define R_P0_TSSI_ALIM4 0x5640 ++#define R_TSSI_PA_K8 0x5644 + #define R_UPD_CLK 0x5670 + #define B_DAC_VAL BIT(31) + #define B_ACK_VAL GENMASK(30, 29) +@@ -4003,6 +4396,11 @@ + #define B_TXPWRB_VAL GENMASK(27, 19) + #define R_DPD_OFT_EN 0x5800 + #define B_DPD_OFT_EN BIT(28) ++#define B_DPD_TSSI_CW GENMASK(26, 18) ++#define B_DPD_PWR_CW GENMASK(17, 9) ++#define B_DPD_REF GENMASK(8, 0) ++#define R_P0_TSSIC 0x5814 ++#define B_P0_TSSIC_BYPASS BIT(11) + #define R_DPD_OFT_ADDR 0x5804 + #define B_DPD_OFT_ADDR GENMASK(31, 27) + #define R_TXPWRB_H 0x580c +@@ -4011,13 +4409,18 @@ + #define B_P0_TMETER GENMASK(15, 10) + #define B_P0_TMETER_DIS BIT(16) + #define B_P0_TMETER_TRK BIT(24) ++#define R_P1_TSSIC 0x7814 ++#define B_P1_TSSIC_BYPASS BIT(11) + #define R_P0_TSSI_TRK 0x5818 + #define B_P0_TSSI_TRK_EN BIT(30) ++#define B_P0_TSSI_RFC GENMASK(28, 27) + #define B_P0_TSSI_OFT_EN BIT(28) + #define B_P0_TSSI_OFT GENMASK(7, 0) + #define R_P0_TSSI_AVG 0x5820 ++#define B_P0_TSSI_EN BIT(31) + #define B_P0_TSSI_AVG GENMASK(15, 12) + #define R_P0_RFCTM 0x5864 ++#define B_P0_RFCTM_EN BIT(29) + #define B_P0_RFCTM_VAL GENMASK(25, 20) + #define R_P0_RFCTM_RDY BIT(26) + #define R_P0_TRSW 0x5868 +@@ -4030,13 +4433,16 @@ + #define B_P0_RFM_TX_OPT BIT(6) + #define B_P0_RFM_BT_EN BIT(5) + #define B_P0_RFM_OUT GENMASK(4, 0) ++#define R_P0_PATH_RST 0x58AC + #define R_P0_TXDPD 0x58D4 + #define B_P0_TXDPD GENMASK(31, 28) + #define R_P0_TXPW_RSTB 0x58DC + #define B_P0_TXPW_RSTB_MANON BIT(30) + #define B_P0_TXPW_RSTB_TSSI BIT(31) + #define R_P0_TSSI_MV_AVG 0x58E4 ++#define B_P0_TSSI_MV_MIX GENMASK(19, 11) + #define B_P0_TSSI_MV_AVG GENMASK(13, 11) ++#define B_P0_TSSI_MV_CLR BIT(14) + #define R_TXGAIN_SCALE 0x58F0 + #define B_TXGAIN_SCALE_EN BIT(19) + #define B_TXGAIN_SCALE_OFT GENMASK(31, 24) +@@ -4061,24 +4467,41 @@ + #define B_S0_DACKQ8_K GENMASK(15, 8) + #define R_RPL_BIAS_COMP1 0x6DF0 + #define B_RPL_BIAS_COMP1_MASK GENMASK(7, 0) ++#define R_P1_TSSI_ALIM1 0x7630 ++#define B_P1_TSSI_ALIM1 GENMASK(29, 0) ++#define B_P1_TSSI_ALIM11 GENMASK(29, 20) ++#define B_P1_TSSI_ALIM12 GENMASK(19, 10) ++#define B_P1_TSSI_ALIM13 GENMASK(9, 0) ++#define R_P1_TSSI_ALIM3 0x7634 ++#define B_P1_TSSI_ALIM31 GENMASK(9, 0) ++#define R_P1_TSSI_ALIM2 0x763c ++#define B_P1_TSSI_ALIM2 GENMASK(29, 0) ++#define R_P1_TSSIC 0x7814 ++#define B_P1_TSSIC_BYPASS BIT(11) + #define R_P1_TMETER 0x7810 + #define B_P1_TMETER GENMASK(15, 10) + #define B_P1_TMETER_DIS BIT(16) + #define B_P1_TMETER_TRK BIT(24) + #define R_P1_TSSI_TRK 0x7818 + #define B_P1_TSSI_TRK_EN BIT(30) ++#define B_P1_TSSI_RFC GENMASK(28, 27) + #define B_P1_TSSI_OFT_EN BIT(28) + #define B_P1_TSSI_OFT GENMASK(7, 0) + #define R_P1_TSSI_AVG 0x7820 ++#define B_P1_TSSI_EN BIT(31) + #define B_P1_TSSI_AVG GENMASK(15, 12) + #define R_P1_RFCTM 0x7864 + #define R_P1_RFCTM_RDY BIT(26) + #define B_P1_RFCTM_VAL GENMASK(25, 20) ++#define B_P1_RFCTM_DEL GENMASK(19, 11) ++#define R_P1_PATH_RST 0x78AC + #define R_P1_TXPW_RSTB 0x78DC + #define B_P1_TXPW_RSTB_MANON BIT(30) + #define B_P1_TXPW_RSTB_TSSI BIT(31) + #define R_P1_TSSI_MV_AVG 0x78E4 ++#define B_P1_TSSI_MV_MIX GENMASK(19, 11) + #define B_P1_TSSI_MV_AVG GENMASK(13, 11) ++#define B_P1_TSSI_MV_CLR BIT(14) + #define R_TSSI_THOF 0x7C00 + #define R_S1_DACKI 0x7E00 + #define B_S1_DACKI_AR GENMASK(31, 28) +@@ -4148,6 +4571,7 @@ + #define B_KPATH_CFG_ED GENMASK(21, 20) + #define R_KIP_RPT1 0x80D4 + #define B_KIP_RPT1_SEL GENMASK(21, 16) ++#define B_KIP_RPT1_SEL_V1 GENMASK(19, 16) + #define R_SRAM_IQRX 0x80D8 + #define R_GAPK 0x80E0 + #define B_GAPK_ADR BIT(0) +@@ -4169,12 +4593,14 @@ + #define B_PRT_COM_GL GENMASK(7, 4) + #define B_PRT_COM_CORI GENMASK(7, 0) + #define B_PRT_COM_RXBB GENMASK(5, 0) ++#define B_PRT_COM_RXBB_V1 GENMASK(4, 0) + #define B_PRT_COM_DONE BIT(0) + #define R_COEF_SEL 0x8104 + #define B_COEF_SEL_IQC BIT(0) + #define B_COEF_SEL_MDPD BIT(8) + #define R_CFIR_SYS 0x8120 + #define R_IQK_RES 0x8124 ++#define B_IQK_RES_K BIT(28) + #define B_IQK_RES_TXCFIR GENMASK(11, 8) + #define B_IQK_RES_RXCFIR GENMASK(3, 0) + #define R_TXIQC 0x8138 +@@ -4206,13 +4632,18 @@ + #define B_DPD_LBK BIT(7) + #define R_DPD_CH0 0x81AC + #define R_DPD_BND 0x81B4 ++#define B_DPD_BND_1 GENMASK(24, 16) ++#define B_DPD_BND_0 GENMASK(8, 0) + #define R_DPD_CH0A 0x81BC + #define B_DPD_MEN GENMASK(31, 28) + #define B_DPD_ORDER GENMASK(26, 24) ++#define B_DPD_ORDER_V1 GENMASK(26, 25) ++#define B_DPD_CFG GENMASK(22, 0) + #define B_DPD_SEL GENMASK(13, 8) + #define R_TXAGC_RFK 0x81C4 + #define B_TXAGC_RFK_CH0 GENMASK(5, 0) + #define R_DPD_COM 0x81C8 ++#define B_DPD_COM_OF BIT(15) + #define R_KIP_IQP 0x81CC + #define B_KIP_IQP_SW GENMASK(13, 12) + #define B_KIP_IQP_IQSW GENMASK(5, 0) +@@ -4231,6 +4662,9 @@ + #define B_RPT_PER_TSSI GENMASK(28, 16) + #define B_RPT_PER_OF GENMASK(15, 8) + #define B_RPT_PER_TH GENMASK(5, 0) ++#define R_IQRSN 0x8220 ++#define B_IQRSN_K1 BIT(28) ++#define B_IQRSN_K2 BIT(16) + #define R_RXCFIR_P0C0 0x8D40 + #define R_RXCFIR_P0C1 0x8D84 + #define R_RXCFIR_P0C2 0x8DC8 +@@ -4288,6 +4722,8 @@ + #define B_DACK_S0P3_OK BIT(2) + #define R_DACK_DADCK01 0xC084 + #define B_DACK_DADCK01 GENMASK(31, 24) ++#define R_DRCK_FH 0xC094 ++#define B_DRCK_LAT BIT(9) + #define R_DRCK 0xC0C4 + #define B_DRCK_IDLE BIT(9) + #define B_DRCK_EN BIT(6) +@@ -4295,15 +4731,29 @@ + #define R_DRCK_RES 0xC0C8 + #define B_DRCK_RES GENMASK(19, 15) + #define B_DRCK_POL BIT(3) ++#define R_DRCK_V1 0xC0CC ++#define B_DRCK_V1_SEL BIT(9) ++#define B_DRCK_V1_KICK BIT(6) ++#define B_DRCK_V1_CV GENMASK(4, 0) ++#define R_DRCK_RS 0xC0D0 ++#define B_DRCK_RS_LPS GENMASK(19, 15) ++#define B_DRCK_RS_DONE BIT(3) + #define R_PATH0_SAMPL_DLY_T_V1 0xC0D4 + #define B_PATH0_SAMPL_DLY_T_MSK_V1 GENMASK(27, 26) + #define R_P0_CFCH_BW0 0xC0D4 + #define B_P0_CFCH_BW0 GENMASK(27, 26) + #define R_P0_CFCH_BW1 0xC0D8 ++#define B_P0_CFCH_EX BIT(13) + #define B_P0_CFCH_BW1 GENMASK(8, 5) ++#define R_ADDCK0D 0xC0F0 ++#define B_ADDCK0D_VAL2 GENMASK(31, 26) ++#define B_ADDCK0D_VAL GENMASK(25, 16) + #define R_ADDCK0 0xC0F4 ++#define B_ADDCK0_TRG BIT(11) + #define B_ADDCK0 GENMASK(9, 8) ++#define B_ADDCK0_MAN GENMASK(5, 4) + #define B_ADDCK0_EN BIT(4) ++#define B_ADDCK0_VAL GENMASK(3, 0) + #define B_ADDCK0_RST BIT(2) + #define R_ADDCK0_RL 0xC0F8 + #define B_ADDCK0_RLS GENMASK(29, 28) +@@ -4343,9 +4793,15 @@ + #define R_PATH0_BW_SEL_V1 0xC0D8 + #define B_PATH0_BW_SEL_MSK_V1 GENMASK(8, 5) + #define R_PATH1_BW_SEL_V1 0xC1D8 ++#define B_PATH1_BW_SEL_EX BIT(13) + #define B_PATH1_BW_SEL_MSK_V1 GENMASK(8, 5) ++#define R_ADDCK1D 0xC1F0 ++#define B_ADDCK1D_VAL2 GENMASK(31, 26) ++#define B_ADDCK1D_VAL GENMASK(25, 16) + #define R_ADDCK1 0xC1F4 ++#define B_ADDCK1_TRG BIT(11) + #define B_ADDCK1 GENMASK(9, 8) ++#define B_ADDCK1_MAN GENMASK(5, 4) + #define B_ADDCK1_EN BIT(4) + #define B_ADDCK1_RST BIT(2) + #define R_ADDCK1_RL 0xC1F8 +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw89/rtw8852a.c linux-6.2/drivers/net/wireless/realtek/rtw89/rtw8852a.c +--- linux-6.1/drivers/net/wireless/realtek/rtw89/rtw8852a.c 2022-12-12 00:15:18.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw89/rtw8852a.c 2022-12-24 00:49:25.782376835 +0200 +@@ -48,6 +48,10 @@ static const struct rtw89_dle_mem rtw885 + &rtw89_mac_size.ple_size0, &rtw89_mac_size.wde_qt0, + &rtw89_mac_size.wde_qt0, &rtw89_mac_size.ple_qt4, + &rtw89_mac_size.ple_qt5}, ++ [RTW89_QTA_WOW] = {RTW89_QTA_WOW, &rtw89_mac_size.wde_size0, ++ &rtw89_mac_size.ple_size0, &rtw89_mac_size.wde_qt0, ++ &rtw89_mac_size.wde_qt0, &rtw89_mac_size.ple_qt4, ++ &rtw89_mac_size.ple_qt_52a_wow}, + [RTW89_QTA_DLFW] = {RTW89_QTA_DLFW, &rtw89_mac_size.wde_size4, + &rtw89_mac_size.ple_size4, &rtw89_mac_size.wde_qt4, + &rtw89_mac_size.wde_qt4, &rtw89_mac_size.ple_qt13, +@@ -1410,151 +1414,14 @@ static void rtw8852a_set_txpwr_ref(struc + phy_idx); + } + +-static void rtw8852a_set_txpwr_byrate(struct rtw89_dev *rtwdev, +- const struct rtw89_chan *chan, +- enum rtw89_phy_idx phy_idx) +-{ +- u8 band = chan->band_type; +- u8 ch = chan->channel; +- static const u8 rs[] = { +- RTW89_RS_CCK, +- RTW89_RS_OFDM, +- RTW89_RS_MCS, +- RTW89_RS_HEDCM, +- }; +- s8 tmp; +- u8 i, j; +- u32 val, shf, addr = R_AX_PWR_BY_RATE; +- struct rtw89_rate_desc cur; +- +- rtw89_debug(rtwdev, RTW89_DBG_TXPWR, +- "[TXPWR] set txpwr byrate with ch=%d\n", ch); +- +- for (cur.nss = 0; cur.nss <= RTW89_NSS_2; cur.nss++) { +- for (i = 0; i < ARRAY_SIZE(rs); i++) { +- if (cur.nss >= rtw89_rs_nss_max[rs[i]]) +- continue; +- +- val = 0; +- cur.rs = rs[i]; +- +- for (j = 0; j < rtw89_rs_idx_max[rs[i]]; j++) { +- cur.idx = j; +- shf = (j % 4) * 8; +- tmp = rtw89_phy_read_txpwr_byrate(rtwdev, band, +- &cur); +- val |= (tmp << shf); +- +- if ((j + 1) % 4) +- continue; +- +- rtw89_mac_txpwr_write32(rtwdev, phy_idx, addr, val); +- val = 0; +- addr += 4; +- } +- } +- } +-} +- +-static void rtw8852a_set_txpwr_offset(struct rtw89_dev *rtwdev, +- const struct rtw89_chan *chan, +- enum rtw89_phy_idx phy_idx) +-{ +- u8 band = chan->band_type; +- struct rtw89_rate_desc desc = { +- .nss = RTW89_NSS_1, +- .rs = RTW89_RS_OFFSET, +- }; +- u32 val = 0; +- s8 v; +- +- rtw89_debug(rtwdev, RTW89_DBG_TXPWR, "[TXPWR] set txpwr offset\n"); +- +- for (desc.idx = 0; desc.idx < RTW89_RATE_OFFSET_MAX; desc.idx++) { +- v = rtw89_phy_read_txpwr_byrate(rtwdev, band, &desc); +- val |= ((v & 0xf) << (4 * desc.idx)); +- } +- +- rtw89_mac_txpwr_write32_mask(rtwdev, phy_idx, R_AX_PWR_RATE_OFST_CTRL, +- GENMASK(19, 0), val); +-} +- +-static void rtw8852a_set_txpwr_limit(struct rtw89_dev *rtwdev, +- const struct rtw89_chan *chan, +- enum rtw89_phy_idx phy_idx) +-{ +-#define __MAC_TXPWR_LMT_PAGE_SIZE 40 +- u8 ch = chan->channel; +- u8 bw = chan->band_width; +- struct rtw89_txpwr_limit lmt[NTX_NUM_8852A]; +- u32 addr, val; +- const s8 *ptr; +- u8 i, j; +- +- rtw89_debug(rtwdev, RTW89_DBG_TXPWR, +- "[TXPWR] set txpwr limit with ch=%d bw=%d\n", ch, bw); +- +- for (i = 0; i < NTX_NUM_8852A; i++) { +- rtw89_phy_fill_txpwr_limit(rtwdev, chan, &lmt[i], i); +- +- for (j = 0; j < __MAC_TXPWR_LMT_PAGE_SIZE; j += 4) { +- addr = R_AX_PWR_LMT + j + __MAC_TXPWR_LMT_PAGE_SIZE * i; +- ptr = (s8 *)&lmt[i] + j; +- +- val = FIELD_PREP(GENMASK(7, 0), ptr[0]) | +- FIELD_PREP(GENMASK(15, 8), ptr[1]) | +- FIELD_PREP(GENMASK(23, 16), ptr[2]) | +- FIELD_PREP(GENMASK(31, 24), ptr[3]); +- +- rtw89_mac_txpwr_write32(rtwdev, phy_idx, addr, val); +- } +- } +-#undef __MAC_TXPWR_LMT_PAGE_SIZE +-} +- +-static void rtw8852a_set_txpwr_limit_ru(struct rtw89_dev *rtwdev, +- const struct rtw89_chan *chan, +- enum rtw89_phy_idx phy_idx) +-{ +-#define __MAC_TXPWR_LMT_RU_PAGE_SIZE 24 +- u8 ch = chan->channel; +- u8 bw = chan->band_width; +- struct rtw89_txpwr_limit_ru lmt_ru[NTX_NUM_8852A]; +- u32 addr, val; +- const s8 *ptr; +- u8 i, j; +- +- rtw89_debug(rtwdev, RTW89_DBG_TXPWR, +- "[TXPWR] set txpwr limit ru with ch=%d bw=%d\n", ch, bw); +- +- for (i = 0; i < NTX_NUM_8852A; i++) { +- rtw89_phy_fill_txpwr_limit_ru(rtwdev, chan, &lmt_ru[i], i); +- +- for (j = 0; j < __MAC_TXPWR_LMT_RU_PAGE_SIZE; j += 4) { +- addr = R_AX_PWR_RU_LMT + j + +- __MAC_TXPWR_LMT_RU_PAGE_SIZE * i; +- ptr = (s8 *)&lmt_ru[i] + j; +- +- val = FIELD_PREP(GENMASK(7, 0), ptr[0]) | +- FIELD_PREP(GENMASK(15, 8), ptr[1]) | +- FIELD_PREP(GENMASK(23, 16), ptr[2]) | +- FIELD_PREP(GENMASK(31, 24), ptr[3]); +- +- rtw89_mac_txpwr_write32(rtwdev, phy_idx, addr, val); +- } +- } +- +-#undef __MAC_TXPWR_LMT_RU_PAGE_SIZE +-} +- + static void rtw8852a_set_txpwr(struct rtw89_dev *rtwdev, + const struct rtw89_chan *chan, + enum rtw89_phy_idx phy_idx) + { +- rtw8852a_set_txpwr_byrate(rtwdev, chan, phy_idx); +- rtw8852a_set_txpwr_offset(rtwdev, chan, phy_idx); +- rtw8852a_set_txpwr_limit(rtwdev, chan, phy_idx); +- rtw8852a_set_txpwr_limit_ru(rtwdev, chan, phy_idx); ++ rtw89_phy_set_txpwr_byrate(rtwdev, chan, phy_idx); ++ rtw89_phy_set_txpwr_offset(rtwdev, chan, phy_idx); ++ rtw89_phy_set_txpwr_limit(rtwdev, chan, phy_idx); ++ rtw89_phy_set_txpwr_limit_ru(rtwdev, chan, phy_idx); + } + + static void rtw8852a_set_txpwr_ctrl(struct rtw89_dev *rtwdev, +@@ -2008,19 +1875,6 @@ static struct rtw89_btc_fbtc_mreg rtw89_ + }; + + static +-void rtw8852a_btc_bt_aci_imp(struct rtw89_dev *rtwdev) +-{ +- struct rtw89_btc *btc = &rtwdev->btc; +- struct rtw89_btc_dm *dm = &btc->dm; +- struct rtw89_btc_bt_info *bt = &btc->cx.bt; +- struct rtw89_btc_bt_link_info *b = &bt->link_info; +- +- /* fix LNA2 = level-5 for BT ACI issue at BTG */ +- if (btc->dm.wl_btg_rx && b->profile_cnt.now != 0) +- dm->trx_para_level = 1; +-} +- +-static + void rtw8852a_btc_update_bt_cnt(struct rtw89_dev *rtwdev) + { + struct rtw89_btc *btc = &rtwdev->btc; +@@ -2136,6 +1990,15 @@ static void rtw8852a_query_ppdu(struct r + rtw8852a_fill_freq_with_ppdu(rtwdev, phy_ppdu, status); + } + ++#ifdef CONFIG_PM ++static const struct wiphy_wowlan_support rtw_wowlan_stub_8852a = { ++ .flags = WIPHY_WOWLAN_MAGIC_PKT | WIPHY_WOWLAN_DISCONNECT, ++ .n_patterns = RTW89_MAX_PATTERN_NUM, ++ .pattern_max_len = RTW89_MAX_PATTERN_SIZE, ++ .pattern_min_len = 1, ++}; ++#endif ++ + static const struct rtw89_chip_ops rtw8852a_chip_ops = { + .enable_bb_rf = rtw89_mac_enable_bb_rf, + .disable_bb_rf = rtw89_mac_disable_bb_rf, +@@ -2178,7 +2041,6 @@ static const struct rtw89_chip_ops rtw88 + .btc_set_wl_pri = rtw8852a_btc_set_wl_pri, + .btc_set_wl_txpwr_ctrl = rtw8852a_btc_set_wl_txpwr_ctrl, + .btc_get_bt_rssi = rtw8852a_btc_get_bt_rssi, +- .btc_bt_aci_imp = rtw8852a_btc_bt_aci_imp, + .btc_update_bt_cnt = rtw8852a_btc_update_bt_cnt, + .btc_wl_s1_standby = rtw8852a_btc_wl_s1_standby, + .btc_set_wl_rx_gain = rtw8852a_btc_set_wl_rx_gain, +@@ -2196,6 +2058,8 @@ const struct rtw89_chip_info rtw8852a_ch + .rsvd_ple_ofst = 0x6f800, + .hfc_param_ini = rtw8852a_hfc_param_ini_pcie, + .dle_mem = rtw8852a_dle_mem_pcie, ++ .wde_qempty_acq_num = 16, ++ .wde_qempty_mgq_sel = 16, + .rf_base_addr = {0xc000, 0xd000}, + .pwr_on_seq = pwr_on_seq_8852a, + .pwr_off_seq = pwr_off_seq_8852a, +@@ -2218,6 +2082,7 @@ const struct rtw89_chip_info rtw8852a_ch + .support_bands = BIT(NL80211_BAND_2GHZ) | + BIT(NL80211_BAND_5GHZ), + .support_bw160 = false, ++ .support_ul_tb_ctrl = false, + .hw_sec_hdr = false, + .rf_path_num = 2, + .tx_nss = 2, +@@ -2279,11 +2144,15 @@ const struct rtw89_chip_info rtw8852a_ch + .c2h_ctrl_reg = R_AX_C2HREG_CTRL, + .c2h_regs = rtw8852a_c2h_regs, + .page_regs = &rtw8852a_page_regs, ++ .cfo_src_fd = false, + .dcfo_comp = &rtw8852a_dcfo_comp, + .dcfo_comp_sft = 3, + .imr_info = &rtw8852a_imr_info, + .rrsr_cfgs = &rtw8852a_rrsr_cfgs, + .dma_ch_mask = 0, ++#ifdef CONFIG_PM ++ .wowlan_stub = &rtw_wowlan_stub_8852a, ++#endif + }; + EXPORT_SYMBOL(rtw8852a_chip_info); + +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw89/rtw8852a.h linux-6.2/drivers/net/wireless/realtek/rtw89/rtw8852a.h +--- linux-6.1/drivers/net/wireless/realtek/rtw89/rtw8852a.h 2022-12-12 00:15:18.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw89/rtw8852a.h 2022-12-24 00:49:25.782376835 +0200 +@@ -8,7 +8,6 @@ + #include "core.h" + + #define RF_PATH_NUM_8852A 2 +-#define NTX_NUM_8852A 2 + + enum rtw8852a_pmac_mode { + NONE_TEST, +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw89/rtw8852b.c linux-6.2/drivers/net/wireless/realtek/rtw89/rtw8852b.c +--- linux-6.1/drivers/net/wireless/realtek/rtw89/rtw8852b.c 2022-12-12 00:15:18.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw89/rtw8852b.c 2022-12-24 00:49:25.782376835 +0200 +@@ -2,9 +2,46 @@ + /* Copyright(c) 2019-2022 Realtek Corporation + */ + +-#include "core.h" ++#include "coex.h" ++#include "fw.h" + #include "mac.h" ++#include "phy.h" + #include "reg.h" ++#include "rtw8852b.h" ++#include "rtw8852b_rfk.h" ++#include "rtw8852b_table.h" ++#include "txrx.h" ++ ++static const struct rtw89_hfc_ch_cfg rtw8852b_hfc_chcfg_pcie[] = { ++ {5, 343, grp_0}, /* ACH 0 */ ++ {5, 343, grp_0}, /* ACH 1 */ ++ {5, 343, grp_0}, /* ACH 2 */ ++ {5, 343, grp_0}, /* ACH 3 */ ++ {0, 0, grp_0}, /* ACH 4 */ ++ {0, 0, grp_0}, /* ACH 5 */ ++ {0, 0, grp_0}, /* ACH 6 */ ++ {0, 0, grp_0}, /* ACH 7 */ ++ {4, 344, grp_0}, /* B0MGQ */ ++ {4, 344, grp_0}, /* B0HIQ */ ++ {0, 0, grp_0}, /* B1MGQ */ ++ {0, 0, grp_0}, /* B1HIQ */ ++ {40, 0, 0} /* FWCMDQ */ ++}; ++ ++static const struct rtw89_hfc_pub_cfg rtw8852b_hfc_pubcfg_pcie = { ++ 448, /* Group 0 */ ++ 0, /* Group 1 */ ++ 448, /* Public Max */ ++ 0 /* WP threshold */ ++}; ++ ++static const struct rtw89_hfc_param_ini rtw8852b_hfc_param_ini_pcie[] = { ++ [RTW89_QTA_SCC] = {rtw8852b_hfc_chcfg_pcie, &rtw8852b_hfc_pubcfg_pcie, ++ &rtw89_mac_size.hfc_preccfg_pcie, RTW89_HCIFC_POH}, ++ [RTW89_QTA_DLFW] = {NULL, NULL, &rtw89_mac_size.hfc_preccfg_pcie, ++ RTW89_HCIFC_POH}, ++ [RTW89_QTA_INVALID] = {NULL}, ++}; + + static const struct rtw89_dle_mem rtw8852b_dle_mem_pcie[] = { + [RTW89_QTA_SCC] = {RTW89_QTA_SCC, &rtw89_mac_size.wde_size6, +@@ -19,6 +56,2275 @@ static const struct rtw89_dle_mem rtw885 + NULL}, + }; + ++static const struct rtw89_reg3_def rtw8852b_pmac_ht20_mcs7_tbl[] = { ++ {0x4580, 0x0000ffff, 0x0}, ++ {0x4580, 0xffff0000, 0x0}, ++ {0x4584, 0x0000ffff, 0x0}, ++ {0x4584, 0xffff0000, 0x0}, ++ {0x4580, 0x0000ffff, 0x1}, ++ {0x4578, 0x00ffffff, 0x2018b}, ++ {0x4570, 0x03ffffff, 0x7}, ++ {0x4574, 0x03ffffff, 0x32407}, ++ {0x45b8, 0x00000010, 0x0}, ++ {0x45b8, 0x00000100, 0x0}, ++ {0x45b8, 0x00000080, 0x0}, ++ {0x45b8, 0x00000008, 0x0}, ++ {0x45a0, 0x0000ff00, 0x0}, ++ {0x45a0, 0xff000000, 0x1}, ++ {0x45a4, 0x0000ff00, 0x2}, ++ {0x45a4, 0xff000000, 0x3}, ++ {0x45b8, 0x00000020, 0x0}, ++ {0x4568, 0xe0000000, 0x0}, ++ {0x45b8, 0x00000002, 0x1}, ++ {0x456c, 0xe0000000, 0x0}, ++ {0x45b4, 0x00006000, 0x0}, ++ {0x45b4, 0x00001800, 0x1}, ++ {0x45b8, 0x00000040, 0x0}, ++ {0x45b8, 0x00000004, 0x0}, ++ {0x45b8, 0x00000200, 0x0}, ++ {0x4598, 0xf8000000, 0x0}, ++ {0x45b8, 0x00100000, 0x0}, ++ {0x45a8, 0x00000fc0, 0x0}, ++ {0x45b8, 0x00200000, 0x0}, ++ {0x45b0, 0x00000038, 0x0}, ++ {0x45b0, 0x000001c0, 0x0}, ++ {0x45a0, 0x000000ff, 0x0}, ++ {0x45b8, 0x00400000, 0x0}, ++ {0x4590, 0x000007ff, 0x0}, ++ {0x45b0, 0x00000e00, 0x0}, ++ {0x45ac, 0x0000001f, 0x0}, ++ {0x45b8, 0x00800000, 0x0}, ++ {0x45a8, 0x0003f000, 0x0}, ++ {0x45b8, 0x01000000, 0x0}, ++ {0x45b0, 0x00007000, 0x0}, ++ {0x45b0, 0x00038000, 0x0}, ++ {0x45a0, 0x00ff0000, 0x0}, ++ {0x45b8, 0x02000000, 0x0}, ++ {0x4590, 0x003ff800, 0x0}, ++ {0x45b0, 0x001c0000, 0x0}, ++ {0x45ac, 0x000003e0, 0x0}, ++ {0x45b8, 0x04000000, 0x0}, ++ {0x45a8, 0x00fc0000, 0x0}, ++ {0x45b8, 0x08000000, 0x0}, ++ {0x45b0, 0x00e00000, 0x0}, ++ {0x45b0, 0x07000000, 0x0}, ++ {0x45a4, 0x000000ff, 0x0}, ++ {0x45b8, 0x10000000, 0x0}, ++ {0x4594, 0x000007ff, 0x0}, ++ {0x45b0, 0x38000000, 0x0}, ++ {0x45ac, 0x00007c00, 0x0}, ++ {0x45b8, 0x20000000, 0x0}, ++ {0x45a8, 0x3f000000, 0x0}, ++ {0x45b8, 0x40000000, 0x0}, ++ {0x45b4, 0x00000007, 0x0}, ++ {0x45b4, 0x00000038, 0x0}, ++ {0x45a4, 0x00ff0000, 0x0}, ++ {0x45b8, 0x80000000, 0x0}, ++ {0x4594, 0x003ff800, 0x0}, ++ {0x45b4, 0x000001c0, 0x0}, ++ {0x4598, 0xf8000000, 0x0}, ++ {0x45b8, 0x00100000, 0x0}, ++ {0x45a8, 0x00000fc0, 0x7}, ++ {0x45b8, 0x00200000, 0x0}, ++ {0x45b0, 0x00000038, 0x0}, ++ {0x45b0, 0x000001c0, 0x0}, ++ {0x45a0, 0x000000ff, 0x0}, ++ {0x45b4, 0x06000000, 0x0}, ++ {0x45b0, 0x00000007, 0x0}, ++ {0x45b8, 0x00080000, 0x0}, ++ {0x45a8, 0x0000003f, 0x0}, ++ {0x457c, 0xffe00000, 0x1}, ++ {0x4530, 0xffffffff, 0x0}, ++ {0x4588, 0x00003fff, 0x0}, ++ {0x4598, 0x000001ff, 0x0}, ++ {0x4534, 0xffffffff, 0x0}, ++ {0x4538, 0xffffffff, 0x0}, ++ {0x453c, 0xffffffff, 0x0}, ++ {0x4588, 0x0fffc000, 0x0}, ++ {0x4598, 0x0003fe00, 0x0}, ++ {0x4540, 0xffffffff, 0x0}, ++ {0x4544, 0xffffffff, 0x0}, ++ {0x4548, 0xffffffff, 0x0}, ++ {0x458c, 0x00003fff, 0x0}, ++ {0x4598, 0x07fc0000, 0x0}, ++ {0x454c, 0xffffffff, 0x0}, ++ {0x4550, 0xffffffff, 0x0}, ++ {0x4554, 0xffffffff, 0x0}, ++ {0x458c, 0x0fffc000, 0x0}, ++ {0x459c, 0x000001ff, 0x0}, ++ {0x4558, 0xffffffff, 0x0}, ++ {0x455c, 0xffffffff, 0x0}, ++ {0x4530, 0xffffffff, 0x4e790001}, ++ {0x4588, 0x00003fff, 0x0}, ++ {0x4598, 0x000001ff, 0x1}, ++ {0x4534, 0xffffffff, 0x0}, ++ {0x4538, 0xffffffff, 0x4b}, ++ {0x45ac, 0x38000000, 0x7}, ++ {0x4588, 0xf0000000, 0x0}, ++ {0x459c, 0x7e000000, 0x0}, ++ {0x45b8, 0x00040000, 0x0}, ++ {0x45b8, 0x00020000, 0x0}, ++ {0x4590, 0xffc00000, 0x0}, ++ {0x45b8, 0x00004000, 0x0}, ++ {0x4578, 0xff000000, 0x0}, ++ {0x45b8, 0x00000400, 0x0}, ++ {0x45b8, 0x00000800, 0x0}, ++ {0x45b8, 0x00001000, 0x0}, ++ {0x45b8, 0x00002000, 0x0}, ++ {0x45b4, 0x00018000, 0x0}, ++ {0x45ac, 0x07800000, 0x0}, ++ {0x45b4, 0x00000600, 0x2}, ++ {0x459c, 0x0001fe00, 0x80}, ++ {0x45ac, 0x00078000, 0x3}, ++ {0x459c, 0x01fe0000, 0x1}, ++}; ++ ++static const struct rtw89_reg3_def rtw8852b_btc_preagc_en_defs[] = { ++ {0x46D0, GENMASK(1, 0), 0x3}, ++ {0x4790, GENMASK(1, 0), 0x3}, ++ {0x4AD4, GENMASK(31, 0), 0xf}, ++ {0x4AE0, GENMASK(31, 0), 0xf}, ++ {0x4688, GENMASK(31, 24), 0x80}, ++ {0x476C, GENMASK(31, 24), 0x80}, ++ {0x4694, GENMASK(7, 0), 0x80}, ++ {0x4694, GENMASK(15, 8), 0x80}, ++ {0x4778, GENMASK(7, 0), 0x80}, ++ {0x4778, GENMASK(15, 8), 0x80}, ++ {0x4AE4, GENMASK(23, 0), 0x780D1E}, ++ {0x4AEC, GENMASK(23, 0), 0x780D1E}, ++ {0x469C, GENMASK(31, 26), 0x34}, ++ {0x49F0, GENMASK(31, 26), 0x34}, ++}; ++ ++static DECLARE_PHY_REG3_TBL(rtw8852b_btc_preagc_en_defs); ++ ++static const struct rtw89_reg3_def rtw8852b_btc_preagc_dis_defs[] = { ++ {0x46D0, GENMASK(1, 0), 0x0}, ++ {0x4790, GENMASK(1, 0), 0x0}, ++ {0x4AD4, GENMASK(31, 0), 0x60}, ++ {0x4AE0, GENMASK(31, 0), 0x60}, ++ {0x4688, GENMASK(31, 24), 0x1a}, ++ {0x476C, GENMASK(31, 24), 0x1a}, ++ {0x4694, GENMASK(7, 0), 0x2a}, ++ {0x4694, GENMASK(15, 8), 0x2a}, ++ {0x4778, GENMASK(7, 0), 0x2a}, ++ {0x4778, GENMASK(15, 8), 0x2a}, ++ {0x4AE4, GENMASK(23, 0), 0x79E99E}, ++ {0x4AEC, GENMASK(23, 0), 0x79E99E}, ++ {0x469C, GENMASK(31, 26), 0x26}, ++ {0x49F0, GENMASK(31, 26), 0x26}, ++}; ++ ++static DECLARE_PHY_REG3_TBL(rtw8852b_btc_preagc_dis_defs); ++ ++static const u32 rtw8852b_h2c_regs[RTW89_H2CREG_MAX] = { ++ R_AX_H2CREG_DATA0, R_AX_H2CREG_DATA1, R_AX_H2CREG_DATA2, ++ R_AX_H2CREG_DATA3 ++}; ++ ++static const u32 rtw8852b_c2h_regs[RTW89_C2HREG_MAX] = { ++ R_AX_C2HREG_DATA0, R_AX_C2HREG_DATA1, R_AX_C2HREG_DATA2, ++ R_AX_C2HREG_DATA3 ++}; ++ ++static const struct rtw89_page_regs rtw8852b_page_regs = { ++ .hci_fc_ctrl = R_AX_HCI_FC_CTRL, ++ .ch_page_ctrl = R_AX_CH_PAGE_CTRL, ++ .ach_page_ctrl = R_AX_ACH0_PAGE_CTRL, ++ .ach_page_info = R_AX_ACH0_PAGE_INFO, ++ .pub_page_info3 = R_AX_PUB_PAGE_INFO3, ++ .pub_page_ctrl1 = R_AX_PUB_PAGE_CTRL1, ++ .pub_page_ctrl2 = R_AX_PUB_PAGE_CTRL2, ++ .pub_page_info1 = R_AX_PUB_PAGE_INFO1, ++ .pub_page_info2 = R_AX_PUB_PAGE_INFO2, ++ .wp_page_ctrl1 = R_AX_WP_PAGE_CTRL1, ++ .wp_page_ctrl2 = R_AX_WP_PAGE_CTRL2, ++ .wp_page_info1 = R_AX_WP_PAGE_INFO1, ++}; ++ ++static const struct rtw89_reg_def rtw8852b_dcfo_comp = { ++ R_DCFO_COMP_S0, B_DCFO_COMP_S0_MSK ++}; ++ ++static const struct rtw89_imr_info rtw8852b_imr_info = { ++ .wdrls_imr_set = B_AX_WDRLS_IMR_SET, ++ .wsec_imr_reg = R_AX_SEC_DEBUG, ++ .wsec_imr_set = B_AX_IMR_ERROR, ++ .mpdu_tx_imr_set = 0, ++ .mpdu_rx_imr_set = 0, ++ .sta_sch_imr_set = B_AX_STA_SCHEDULER_IMR_SET, ++ .txpktctl_imr_b0_reg = R_AX_TXPKTCTL_ERR_IMR_ISR, ++ .txpktctl_imr_b0_clr = B_AX_TXPKTCTL_IMR_B0_CLR, ++ .txpktctl_imr_b0_set = B_AX_TXPKTCTL_IMR_B0_SET, ++ .txpktctl_imr_b1_reg = R_AX_TXPKTCTL_ERR_IMR_ISR_B1, ++ .txpktctl_imr_b1_clr = B_AX_TXPKTCTL_IMR_B1_CLR, ++ .txpktctl_imr_b1_set = B_AX_TXPKTCTL_IMR_B1_SET, ++ .wde_imr_clr = B_AX_WDE_IMR_CLR, ++ .wde_imr_set = B_AX_WDE_IMR_SET, ++ .ple_imr_clr = B_AX_PLE_IMR_CLR, ++ .ple_imr_set = B_AX_PLE_IMR_SET, ++ .host_disp_imr_clr = B_AX_HOST_DISP_IMR_CLR, ++ .host_disp_imr_set = B_AX_HOST_DISP_IMR_SET, ++ .cpu_disp_imr_clr = B_AX_CPU_DISP_IMR_CLR, ++ .cpu_disp_imr_set = B_AX_CPU_DISP_IMR_SET, ++ .other_disp_imr_clr = B_AX_OTHER_DISP_IMR_CLR, ++ .other_disp_imr_set = 0, ++ .bbrpt_com_err_imr_reg = R_AX_BBRPT_COM_ERR_IMR_ISR, ++ .bbrpt_chinfo_err_imr_reg = R_AX_BBRPT_CHINFO_ERR_IMR_ISR, ++ .bbrpt_err_imr_set = 0, ++ .bbrpt_dfs_err_imr_reg = R_AX_BBRPT_DFS_ERR_IMR_ISR, ++ .ptcl_imr_clr = B_AX_PTCL_IMR_CLR_ALL, ++ .ptcl_imr_set = B_AX_PTCL_IMR_SET, ++ .cdma_imr_0_reg = R_AX_DLE_CTRL, ++ .cdma_imr_0_clr = B_AX_DLE_IMR_CLR, ++ .cdma_imr_0_set = B_AX_DLE_IMR_SET, ++ .cdma_imr_1_reg = 0, ++ .cdma_imr_1_clr = 0, ++ .cdma_imr_1_set = 0, ++ .phy_intf_imr_reg = R_AX_PHYINFO_ERR_IMR, ++ .phy_intf_imr_clr = 0, ++ .phy_intf_imr_set = 0, ++ .rmac_imr_reg = R_AX_RMAC_ERR_ISR, ++ .rmac_imr_clr = B_AX_RMAC_IMR_CLR, ++ .rmac_imr_set = B_AX_RMAC_IMR_SET, ++ .tmac_imr_reg = R_AX_TMAC_ERR_IMR_ISR, ++ .tmac_imr_clr = B_AX_TMAC_IMR_CLR, ++ .tmac_imr_set = B_AX_TMAC_IMR_SET, ++}; ++ ++static const struct rtw89_rrsr_cfgs rtw8852b_rrsr_cfgs = { ++ .ref_rate = {R_AX_TRXPTCL_RRSR_CTL_0, B_AX_WMAC_RESP_REF_RATE_SEL, 0}, ++ .rsc = {R_AX_TRXPTCL_RRSR_CTL_0, B_AX_WMAC_RESP_RSC_MASK, 2}, ++}; ++ ++static const struct rtw89_dig_regs rtw8852b_dig_regs = { ++ .seg0_pd_reg = R_SEG0R_PD_V1, ++ .pd_lower_bound_mask = B_SEG0R_PD_LOWER_BOUND_MSK, ++ .pd_spatial_reuse_en = B_SEG0R_PD_SPATIAL_REUSE_EN_MSK_V1, ++ .p0_lna_init = {R_PATH0_LNA_INIT_V1, B_PATH0_LNA_INIT_IDX_MSK}, ++ .p1_lna_init = {R_PATH1_LNA_INIT_V1, B_PATH1_LNA_INIT_IDX_MSK}, ++ .p0_tia_init = {R_PATH0_TIA_INIT_V1, B_PATH0_TIA_INIT_IDX_MSK_V1}, ++ .p1_tia_init = {R_PATH1_TIA_INIT_V1, B_PATH1_TIA_INIT_IDX_MSK_V1}, ++ .p0_rxb_init = {R_PATH0_RXB_INIT_V1, B_PATH0_RXB_INIT_IDX_MSK_V1}, ++ .p1_rxb_init = {R_PATH1_RXB_INIT_V1, B_PATH1_RXB_INIT_IDX_MSK_V1}, ++ .p0_p20_pagcugc_en = {R_PATH0_P20_FOLLOW_BY_PAGCUGC_V2, ++ B_PATH0_P20_FOLLOW_BY_PAGCUGC_EN_MSK}, ++ .p0_s20_pagcugc_en = {R_PATH0_S20_FOLLOW_BY_PAGCUGC_V2, ++ B_PATH0_S20_FOLLOW_BY_PAGCUGC_EN_MSK}, ++ .p1_p20_pagcugc_en = {R_PATH1_P20_FOLLOW_BY_PAGCUGC_V2, ++ B_PATH1_P20_FOLLOW_BY_PAGCUGC_EN_MSK}, ++ .p1_s20_pagcugc_en = {R_PATH1_S20_FOLLOW_BY_PAGCUGC_V2, ++ B_PATH1_S20_FOLLOW_BY_PAGCUGC_EN_MSK}, ++}; ++ ++static const struct rtw89_btc_rf_trx_para rtw89_btc_8852b_rf_ul[] = { ++ {255, 0, 0, 7}, /* 0 -> original */ ++ {255, 2, 0, 7}, /* 1 -> for BT-connected ACI issue && BTG co-rx */ ++ {255, 0, 0, 7}, /* 2 ->reserved for shared-antenna */ ++ {255, 0, 0, 7}, /* 3- >reserved for shared-antenna */ ++ {255, 0, 0, 7}, /* 4 ->reserved for shared-antenna */ ++ {255, 0, 0, 7}, /* the below id is for non-shared-antenna free-run */ ++ {6, 1, 0, 7}, ++ {13, 1, 0, 7}, ++ {13, 1, 0, 7} ++}; ++ ++static const struct rtw89_btc_rf_trx_para rtw89_btc_8852b_rf_dl[] = { ++ {255, 0, 0, 7}, /* 0 -> original */ ++ {255, 2, 0, 7}, /* 1 -> reserved for shared-antenna */ ++ {255, 0, 0, 7}, /* 2 ->reserved for shared-antenna */ ++ {255, 0, 0, 7}, /* 3- >reserved for shared-antenna */ ++ {255, 0, 0, 7}, /* 4 ->reserved for shared-antenna */ ++ {255, 0, 0, 7}, /* the below id is for non-shared-antenna free-run */ ++ {255, 1, 0, 7}, ++ {255, 1, 0, 7}, ++ {255, 1, 0, 7} ++}; ++ ++static const struct rtw89_btc_fbtc_mreg rtw89_btc_8852b_mon_reg[] = { ++ RTW89_DEF_FBTC_MREG(REG_MAC, 4, 0xda24), ++ RTW89_DEF_FBTC_MREG(REG_MAC, 4, 0xda28), ++ RTW89_DEF_FBTC_MREG(REG_MAC, 4, 0xda2c), ++ RTW89_DEF_FBTC_MREG(REG_MAC, 4, 0xda30), ++ RTW89_DEF_FBTC_MREG(REG_MAC, 4, 0xda4c), ++ RTW89_DEF_FBTC_MREG(REG_MAC, 4, 0xda10), ++ RTW89_DEF_FBTC_MREG(REG_MAC, 4, 0xda20), ++ RTW89_DEF_FBTC_MREG(REG_MAC, 4, 0xda34), ++ RTW89_DEF_FBTC_MREG(REG_MAC, 4, 0xcef4), ++ RTW89_DEF_FBTC_MREG(REG_MAC, 4, 0x8424), ++ RTW89_DEF_FBTC_MREG(REG_MAC, 4, 0xd200), ++ RTW89_DEF_FBTC_MREG(REG_MAC, 4, 0xd220), ++ RTW89_DEF_FBTC_MREG(REG_BB, 4, 0x980), ++ RTW89_DEF_FBTC_MREG(REG_BT_MODEM, 4, 0x178), ++}; ++ ++static const u8 rtw89_btc_8852b_wl_rssi_thres[BTC_WL_RSSI_THMAX] = {70, 60, 50, 40}; ++static const u8 rtw89_btc_8852b_bt_rssi_thres[BTC_BT_RSSI_THMAX] = {50, 40, 30, 20}; ++ ++static int rtw8852b_pwr_on_func(struct rtw89_dev *rtwdev) ++{ ++ u32 val32; ++ u32 ret; ++ ++ rtw89_write32_clr(rtwdev, R_AX_SYS_PW_CTRL, B_AX_AFSM_WLSUS_EN | ++ B_AX_AFSM_PCIE_SUS_EN); ++ rtw89_write32_set(rtwdev, R_AX_SYS_PW_CTRL, B_AX_DIS_WLBT_PDNSUSEN_SOPC); ++ rtw89_write32_set(rtwdev, R_AX_WLLPS_CTRL, B_AX_DIS_WLBT_LPSEN_LOPC); ++ rtw89_write32_clr(rtwdev, R_AX_SYS_PW_CTRL, B_AX_APDM_HPDN); ++ rtw89_write32_clr(rtwdev, R_AX_SYS_PW_CTRL, B_AX_APFM_SWLPS); ++ ++ ret = read_poll_timeout(rtw89_read32, val32, val32 & B_AX_RDY_SYSPWR, ++ 1000, 20000, false, rtwdev, R_AX_SYS_PW_CTRL); ++ if (ret) ++ return ret; ++ ++ rtw89_write32_set(rtwdev, R_AX_AFE_LDO_CTRL, B_AX_AON_OFF_PC_EN); ++ ret = read_poll_timeout(rtw89_read32, val32, val32 & B_AX_AON_OFF_PC_EN, ++ 1000, 20000, false, rtwdev, R_AX_AFE_LDO_CTRL); ++ if (ret) ++ return ret; ++ ++ rtw89_write32_mask(rtwdev, R_AX_SPS_DIG_OFF_CTRL0, B_AX_C1_L1_MASK, 0x1); ++ rtw89_write32_mask(rtwdev, R_AX_SPS_DIG_OFF_CTRL0, B_AX_C3_L1_MASK, 0x3); ++ rtw89_write32_set(rtwdev, R_AX_SYS_PW_CTRL, B_AX_EN_WLON); ++ rtw89_write32_set(rtwdev, R_AX_SYS_PW_CTRL, B_AX_APFN_ONMAC); ++ ++ ret = read_poll_timeout(rtw89_read32, val32, !(val32 & B_AX_APFN_ONMAC), ++ 1000, 20000, false, rtwdev, R_AX_SYS_PW_CTRL); ++ if (ret) ++ return ret; ++ ++ rtw89_write8_set(rtwdev, R_AX_PLATFORM_ENABLE, B_AX_PLATFORM_EN); ++ rtw89_write8_clr(rtwdev, R_AX_PLATFORM_ENABLE, B_AX_PLATFORM_EN); ++ rtw89_write8_set(rtwdev, R_AX_PLATFORM_ENABLE, B_AX_PLATFORM_EN); ++ rtw89_write8_clr(rtwdev, R_AX_PLATFORM_ENABLE, B_AX_PLATFORM_EN); ++ ++ rtw89_write8_set(rtwdev, R_AX_PLATFORM_ENABLE, B_AX_PLATFORM_EN); ++ rtw89_write32_clr(rtwdev, R_AX_SYS_SDIO_CTRL, B_AX_PCIE_CALIB_EN_V1); ++ ++ rtw89_write32_set(rtwdev, R_AX_SYS_ADIE_PAD_PWR_CTRL, B_AX_SYM_PADPDN_WL_PTA_1P3); ++ ++ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, ++ XTAL_SI_GND_SHDN_WL, XTAL_SI_GND_SHDN_WL); ++ if (ret) ++ return ret; ++ ++ rtw89_write32_set(rtwdev, R_AX_SYS_ADIE_PAD_PWR_CTRL, B_AX_SYM_PADPDN_WL_RFC_1P3); ++ ++ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, ++ XTAL_SI_SHDN_WL, XTAL_SI_SHDN_WL); ++ if (ret) ++ return ret; ++ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, XTAL_SI_OFF_WEI, ++ XTAL_SI_OFF_WEI); ++ if (ret) ++ return ret; ++ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, XTAL_SI_OFF_EI, ++ XTAL_SI_OFF_EI); ++ if (ret) ++ return ret; ++ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, 0, XTAL_SI_RFC2RF); ++ if (ret) ++ return ret; ++ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, XTAL_SI_PON_WEI, ++ XTAL_SI_PON_WEI); ++ if (ret) ++ return ret; ++ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, XTAL_SI_PON_EI, ++ XTAL_SI_PON_EI); ++ if (ret) ++ return ret; ++ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, 0, XTAL_SI_SRAM2RFC); ++ if (ret) ++ return ret; ++ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_SRAM_CTRL, 0, XTAL_SI_SRAM_DIS); ++ if (ret) ++ return ret; ++ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_XTAL_XMD_2, 0, XTAL_SI_LDO_LPS); ++ if (ret) ++ return ret; ++ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_XTAL_XMD_4, 0, XTAL_SI_LPS_CAP); ++ if (ret) ++ return ret; ++ ++ rtw89_write32_set(rtwdev, R_AX_PMC_DBG_CTRL2, B_AX_SYSON_DIS_PMCR_AX_WRMSK); ++ rtw89_write32_set(rtwdev, R_AX_SYS_ISO_CTRL, B_AX_ISO_EB2CORE); ++ rtw89_write32_clr(rtwdev, R_AX_SYS_ISO_CTRL, B_AX_PWC_EV2EF_B15); ++ ++ fsleep(1000); ++ ++ rtw89_write32_clr(rtwdev, R_AX_SYS_ISO_CTRL, B_AX_PWC_EV2EF_B14); ++ rtw89_write32_clr(rtwdev, R_AX_PMC_DBG_CTRL2, B_AX_SYSON_DIS_PMCR_AX_WRMSK); ++ ++ if (!rtwdev->efuse.valid || rtwdev->efuse.power_k_valid) ++ goto func_en; ++ ++ rtw89_write32_mask(rtwdev, R_AX_SPS_DIG_ON_CTRL0, B_AX_VOL_L1_MASK, 0x9); ++ rtw89_write32_mask(rtwdev, R_AX_SPS_DIG_ON_CTRL0, B_AX_VREFPFM_L_MASK, 0xA); ++ ++ if (rtwdev->hal.cv == CHIP_CBV) { ++ rtw89_write32_set(rtwdev, R_AX_PMC_DBG_CTRL2, B_AX_SYSON_DIS_PMCR_AX_WRMSK); ++ rtw89_write16_mask(rtwdev, R_AX_HCI_LDO_CTRL, B_AX_R_AX_VADJ_MASK, 0xA); ++ rtw89_write32_clr(rtwdev, R_AX_PMC_DBG_CTRL2, B_AX_SYSON_DIS_PMCR_AX_WRMSK); ++ } ++ ++func_en: ++ rtw89_write32_set(rtwdev, R_AX_DMAC_FUNC_EN, ++ B_AX_MAC_FUNC_EN | B_AX_DMAC_FUNC_EN | B_AX_MPDU_PROC_EN | ++ B_AX_WD_RLS_EN | B_AX_DLE_WDE_EN | B_AX_TXPKT_CTRL_EN | ++ B_AX_STA_SCH_EN | B_AX_DLE_PLE_EN | B_AX_PKT_BUF_EN | ++ B_AX_DMAC_TBL_EN | B_AX_PKT_IN_EN | B_AX_DLE_CPUIO_EN | ++ B_AX_DISPATCHER_EN | B_AX_BBRPT_EN | B_AX_MAC_SEC_EN | ++ B_AX_DMACREG_GCKEN); ++ rtw89_write32_set(rtwdev, R_AX_CMAC_FUNC_EN, ++ B_AX_CMAC_EN | B_AX_CMAC_TXEN | B_AX_CMAC_RXEN | ++ B_AX_FORCE_CMACREG_GCKEN | B_AX_PHYINTF_EN | B_AX_CMAC_DMA_EN | ++ B_AX_PTCLTOP_EN | B_AX_SCHEDULER_EN | B_AX_TMAC_EN | ++ B_AX_RMAC_EN); ++ ++ rtw89_write32_mask(rtwdev, R_AX_EECS_EESK_FUNC_SEL, B_AX_PINMUX_EESK_FUNC_SEL_MASK, ++ PINMUX_EESK_FUNC_SEL_BT_LOG); ++ ++ return 0; ++} ++ ++static int rtw8852b_pwr_off_func(struct rtw89_dev *rtwdev) ++{ ++ u32 val32; ++ u32 ret; ++ ++ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, XTAL_SI_RFC2RF, ++ XTAL_SI_RFC2RF); ++ if (ret) ++ return ret; ++ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, 0, XTAL_SI_OFF_EI); ++ if (ret) ++ return ret; ++ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, 0, XTAL_SI_OFF_WEI); ++ if (ret) ++ return ret; ++ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_WL_RFC_S0, 0, XTAL_SI_RF00); ++ if (ret) ++ return ret; ++ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_WL_RFC_S1, 0, XTAL_SI_RF10); ++ if (ret) ++ return ret; ++ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, XTAL_SI_SRAM2RFC, ++ XTAL_SI_SRAM2RFC); ++ if (ret) ++ return ret; ++ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, 0, XTAL_SI_PON_EI); ++ if (ret) ++ return ret; ++ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, 0, XTAL_SI_PON_WEI); ++ if (ret) ++ return ret; ++ ++ rtw89_write32_set(rtwdev, R_AX_SYS_PW_CTRL, B_AX_EN_WLON); ++ rtw89_write8_clr(rtwdev, R_AX_SYS_FUNC_EN, B_AX_FEN_BB_GLB_RSTN | B_AX_FEN_BBRSTB); ++ rtw89_write32_clr(rtwdev, R_AX_SYS_ADIE_PAD_PWR_CTRL, B_AX_SYM_PADPDN_WL_RFC_1P3); ++ ++ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, 0, XTAL_SI_SHDN_WL); ++ if (ret) ++ return ret; ++ ++ rtw89_write32_clr(rtwdev, R_AX_SYS_ADIE_PAD_PWR_CTRL, B_AX_SYM_PADPDN_WL_PTA_1P3); ++ ++ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, 0, XTAL_SI_GND_SHDN_WL); ++ if (ret) ++ return ret; ++ ++ rtw89_write32_set(rtwdev, R_AX_SYS_PW_CTRL, B_AX_APFM_OFFMAC); ++ ++ ret = read_poll_timeout(rtw89_read32, val32, !(val32 & B_AX_APFM_OFFMAC), ++ 1000, 20000, false, rtwdev, R_AX_SYS_PW_CTRL); ++ if (ret) ++ return ret; ++ ++ rtw89_write32(rtwdev, R_AX_WLLPS_CTRL, SW_LPS_OPTION); ++ rtw89_write32_set(rtwdev, R_AX_SYS_SWR_CTRL1, B_AX_SYM_CTRL_SPS_PWMFREQ); ++ rtw89_write32_mask(rtwdev, R_AX_SPS_DIG_ON_CTRL0, B_AX_REG_ZCDC_H_MASK, 0x3); ++ rtw89_write32_set(rtwdev, R_AX_SYS_PW_CTRL, B_AX_APFM_SWLPS); ++ ++ return 0; ++} ++ ++static void rtw8852be_efuse_parsing(struct rtw89_efuse *efuse, ++ struct rtw8852b_efuse *map) ++{ ++ ether_addr_copy(efuse->addr, map->e.mac_addr); ++ efuse->rfe_type = map->rfe_type; ++ efuse->xtal_cap = map->xtal_k; ++} ++ ++static void rtw8852b_efuse_parsing_tssi(struct rtw89_dev *rtwdev, ++ struct rtw8852b_efuse *map) ++{ ++ struct rtw89_tssi_info *tssi = &rtwdev->tssi; ++ struct rtw8852b_tssi_offset *ofst[] = {&map->path_a_tssi, &map->path_b_tssi}; ++ u8 i, j; ++ ++ tssi->thermal[RF_PATH_A] = map->path_a_therm; ++ tssi->thermal[RF_PATH_B] = map->path_b_therm; ++ ++ for (i = 0; i < RF_PATH_NUM_8852B; i++) { ++ memcpy(tssi->tssi_cck[i], ofst[i]->cck_tssi, ++ sizeof(ofst[i]->cck_tssi)); ++ ++ for (j = 0; j < TSSI_CCK_CH_GROUP_NUM; j++) ++ rtw89_debug(rtwdev, RTW89_DBG_TSSI, ++ "[TSSI][EFUSE] path=%d cck[%d]=0x%x\n", ++ i, j, tssi->tssi_cck[i][j]); ++ ++ memcpy(tssi->tssi_mcs[i], ofst[i]->bw40_tssi, ++ sizeof(ofst[i]->bw40_tssi)); ++ memcpy(tssi->tssi_mcs[i] + TSSI_MCS_2G_CH_GROUP_NUM, ++ ofst[i]->bw40_1s_tssi_5g, sizeof(ofst[i]->bw40_1s_tssi_5g)); ++ ++ for (j = 0; j < TSSI_MCS_CH_GROUP_NUM; j++) ++ rtw89_debug(rtwdev, RTW89_DBG_TSSI, ++ "[TSSI][EFUSE] path=%d mcs[%d]=0x%x\n", ++ i, j, tssi->tssi_mcs[i][j]); ++ } ++} ++ ++static bool _decode_efuse_gain(u8 data, s8 *high, s8 *low) ++{ ++ if (high) ++ *high = sign_extend32(FIELD_GET(GENMASK(7, 4), data), 3); ++ if (low) ++ *low = sign_extend32(FIELD_GET(GENMASK(3, 0), data), 3); ++ ++ return data != 0xff; ++} ++ ++static void rtw8852b_efuse_parsing_gain_offset(struct rtw89_dev *rtwdev, ++ struct rtw8852b_efuse *map) ++{ ++ struct rtw89_phy_efuse_gain *gain = &rtwdev->efuse_gain; ++ bool valid = false; ++ ++ valid |= _decode_efuse_gain(map->rx_gain_2g_cck, ++ &gain->offset[RF_PATH_A][RTW89_GAIN_OFFSET_2G_CCK], ++ &gain->offset[RF_PATH_B][RTW89_GAIN_OFFSET_2G_CCK]); ++ valid |= _decode_efuse_gain(map->rx_gain_2g_ofdm, ++ &gain->offset[RF_PATH_A][RTW89_GAIN_OFFSET_2G_OFDM], ++ &gain->offset[RF_PATH_B][RTW89_GAIN_OFFSET_2G_OFDM]); ++ valid |= _decode_efuse_gain(map->rx_gain_5g_low, ++ &gain->offset[RF_PATH_A][RTW89_GAIN_OFFSET_5G_LOW], ++ &gain->offset[RF_PATH_B][RTW89_GAIN_OFFSET_5G_LOW]); ++ valid |= _decode_efuse_gain(map->rx_gain_5g_mid, ++ &gain->offset[RF_PATH_A][RTW89_GAIN_OFFSET_5G_MID], ++ &gain->offset[RF_PATH_B][RTW89_GAIN_OFFSET_5G_MID]); ++ valid |= _decode_efuse_gain(map->rx_gain_5g_high, ++ &gain->offset[RF_PATH_A][RTW89_GAIN_OFFSET_5G_HIGH], ++ &gain->offset[RF_PATH_B][RTW89_GAIN_OFFSET_5G_HIGH]); ++ ++ gain->offset_valid = valid; ++} ++ ++static int rtw8852b_read_efuse(struct rtw89_dev *rtwdev, u8 *log_map) ++{ ++ struct rtw89_efuse *efuse = &rtwdev->efuse; ++ struct rtw8852b_efuse *map; ++ ++ map = (struct rtw8852b_efuse *)log_map; ++ ++ efuse->country_code[0] = map->country_code[0]; ++ efuse->country_code[1] = map->country_code[1]; ++ rtw8852b_efuse_parsing_tssi(rtwdev, map); ++ rtw8852b_efuse_parsing_gain_offset(rtwdev, map); ++ ++ switch (rtwdev->hci.type) { ++ case RTW89_HCI_TYPE_PCIE: ++ rtw8852be_efuse_parsing(efuse, map); ++ break; ++ default: ++ return -EOPNOTSUPP; ++ } ++ ++ rtw89_info(rtwdev, "chip rfe_type is %d\n", efuse->rfe_type); ++ ++ return 0; ++} ++ ++static void rtw8852b_phycap_parsing_power_cal(struct rtw89_dev *rtwdev, u8 *phycap_map) ++{ ++#define PWR_K_CHK_OFFSET 0x5E9 ++#define PWR_K_CHK_VALUE 0xAA ++ u32 offset = PWR_K_CHK_OFFSET - rtwdev->chip->phycap_addr; ++ ++ if (phycap_map[offset] == PWR_K_CHK_VALUE) ++ rtwdev->efuse.power_k_valid = true; ++} ++ ++static void rtw8852b_phycap_parsing_tssi(struct rtw89_dev *rtwdev, u8 *phycap_map) ++{ ++ struct rtw89_tssi_info *tssi = &rtwdev->tssi; ++ static const u32 tssi_trim_addr[RF_PATH_NUM_8852B] = {0x5D6, 0x5AB}; ++ u32 addr = rtwdev->chip->phycap_addr; ++ bool pg = false; ++ u32 ofst; ++ u8 i, j; ++ ++ for (i = 0; i < RF_PATH_NUM_8852B; i++) { ++ for (j = 0; j < TSSI_TRIM_CH_GROUP_NUM; j++) { ++ /* addrs are in decreasing order */ ++ ofst = tssi_trim_addr[i] - addr - j; ++ tssi->tssi_trim[i][j] = phycap_map[ofst]; ++ ++ if (phycap_map[ofst] != 0xff) ++ pg = true; ++ } ++ } ++ ++ if (!pg) { ++ memset(tssi->tssi_trim, 0, sizeof(tssi->tssi_trim)); ++ rtw89_debug(rtwdev, RTW89_DBG_TSSI, ++ "[TSSI][TRIM] no PG, set all trim info to 0\n"); ++ } ++ ++ for (i = 0; i < RF_PATH_NUM_8852B; i++) ++ for (j = 0; j < TSSI_TRIM_CH_GROUP_NUM; j++) ++ rtw89_debug(rtwdev, RTW89_DBG_TSSI, ++ "[TSSI] path=%d idx=%d trim=0x%x addr=0x%x\n", ++ i, j, tssi->tssi_trim[i][j], ++ tssi_trim_addr[i] - j); ++} ++ ++static void rtw8852b_phycap_parsing_thermal_trim(struct rtw89_dev *rtwdev, ++ u8 *phycap_map) ++{ ++ struct rtw89_power_trim_info *info = &rtwdev->pwr_trim; ++ static const u32 thm_trim_addr[RF_PATH_NUM_8852B] = {0x5DF, 0x5DC}; ++ u32 addr = rtwdev->chip->phycap_addr; ++ u8 i; ++ ++ for (i = 0; i < RF_PATH_NUM_8852B; i++) { ++ info->thermal_trim[i] = phycap_map[thm_trim_addr[i] - addr]; ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[THERMAL][TRIM] path=%d thermal_trim=0x%x\n", ++ i, info->thermal_trim[i]); ++ ++ if (info->thermal_trim[i] != 0xff) ++ info->pg_thermal_trim = true; ++ } ++} ++ ++static void rtw8852b_thermal_trim(struct rtw89_dev *rtwdev) ++{ ++#define __thm_setting(raw) \ ++({ \ ++ u8 __v = (raw); \ ++ ((__v & 0x1) << 3) | ((__v & 0x1f) >> 1); \ ++}) ++ struct rtw89_power_trim_info *info = &rtwdev->pwr_trim; ++ u8 i, val; ++ ++ if (!info->pg_thermal_trim) { ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[THERMAL][TRIM] no PG, do nothing\n"); ++ ++ return; ++ } ++ ++ for (i = 0; i < RF_PATH_NUM_8852B; i++) { ++ val = __thm_setting(info->thermal_trim[i]); ++ rtw89_write_rf(rtwdev, i, RR_TM2, RR_TM2_OFF, val); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[THERMAL][TRIM] path=%d thermal_setting=0x%x\n", ++ i, val); ++ } ++#undef __thm_setting ++} ++ ++static void rtw8852b_phycap_parsing_pa_bias_trim(struct rtw89_dev *rtwdev, ++ u8 *phycap_map) ++{ ++ struct rtw89_power_trim_info *info = &rtwdev->pwr_trim; ++ static const u32 pabias_trim_addr[RF_PATH_NUM_8852B] = {0x5DE, 0x5DB}; ++ u32 addr = rtwdev->chip->phycap_addr; ++ u8 i; ++ ++ for (i = 0; i < RF_PATH_NUM_8852B; i++) { ++ info->pa_bias_trim[i] = phycap_map[pabias_trim_addr[i] - addr]; ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[PA_BIAS][TRIM] path=%d pa_bias_trim=0x%x\n", ++ i, info->pa_bias_trim[i]); ++ ++ if (info->pa_bias_trim[i] != 0xff) ++ info->pg_pa_bias_trim = true; ++ } ++} ++ ++static void rtw8852b_pa_bias_trim(struct rtw89_dev *rtwdev) ++{ ++ struct rtw89_power_trim_info *info = &rtwdev->pwr_trim; ++ u8 pabias_2g, pabias_5g; ++ u8 i; ++ ++ if (!info->pg_pa_bias_trim) { ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[PA_BIAS][TRIM] no PG, do nothing\n"); ++ ++ return; ++ } ++ ++ for (i = 0; i < RF_PATH_NUM_8852B; i++) { ++ pabias_2g = FIELD_GET(GENMASK(3, 0), info->pa_bias_trim[i]); ++ pabias_5g = FIELD_GET(GENMASK(7, 4), info->pa_bias_trim[i]); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[PA_BIAS][TRIM] path=%d 2G=0x%x 5G=0x%x\n", ++ i, pabias_2g, pabias_5g); ++ ++ rtw89_write_rf(rtwdev, i, RR_BIASA, RR_BIASA_TXG, pabias_2g); ++ rtw89_write_rf(rtwdev, i, RR_BIASA, RR_BIASA_TXA, pabias_5g); ++ } ++} ++ ++static void rtw8852b_phycap_parsing_gain_comp(struct rtw89_dev *rtwdev, u8 *phycap_map) ++{ ++ static const u32 comp_addrs[][RTW89_SUBBAND_2GHZ_5GHZ_NR] = { ++ {0x5BB, 0x5BA, 0, 0x5B9, 0x5B8}, ++ {0x590, 0x58F, 0, 0x58E, 0x58D}, ++ }; ++ struct rtw89_phy_efuse_gain *gain = &rtwdev->efuse_gain; ++ u32 phycap_addr = rtwdev->chip->phycap_addr; ++ bool valid = false; ++ int path, i; ++ u8 data; ++ ++ for (path = 0; path < 2; path++) ++ for (i = 0; i < RTW89_SUBBAND_2GHZ_5GHZ_NR; i++) { ++ if (comp_addrs[path][i] == 0) ++ continue; ++ ++ data = phycap_map[comp_addrs[path][i] - phycap_addr]; ++ valid |= _decode_efuse_gain(data, NULL, ++ &gain->comp[path][i]); ++ } ++ ++ gain->comp_valid = valid; ++} ++ ++static int rtw8852b_read_phycap(struct rtw89_dev *rtwdev, u8 *phycap_map) ++{ ++ rtw8852b_phycap_parsing_power_cal(rtwdev, phycap_map); ++ rtw8852b_phycap_parsing_tssi(rtwdev, phycap_map); ++ rtw8852b_phycap_parsing_thermal_trim(rtwdev, phycap_map); ++ rtw8852b_phycap_parsing_pa_bias_trim(rtwdev, phycap_map); ++ rtw8852b_phycap_parsing_gain_comp(rtwdev, phycap_map); ++ ++ return 0; ++} ++ ++static void rtw8852b_power_trim(struct rtw89_dev *rtwdev) ++{ ++ rtw8852b_thermal_trim(rtwdev); ++ rtw8852b_pa_bias_trim(rtwdev); ++} ++ ++static void rtw8852b_set_channel_mac(struct rtw89_dev *rtwdev, ++ const struct rtw89_chan *chan, ++ u8 mac_idx) ++{ ++ u32 rf_mod = rtw89_mac_reg_by_idx(R_AX_WMAC_RFMOD, mac_idx); ++ u32 sub_carr = rtw89_mac_reg_by_idx(R_AX_TX_SUB_CARRIER_VALUE, mac_idx); ++ u32 chk_rate = rtw89_mac_reg_by_idx(R_AX_TXRATE_CHK, mac_idx); ++ u8 txsc20 = 0, txsc40 = 0; ++ ++ switch (chan->band_width) { ++ case RTW89_CHANNEL_WIDTH_80: ++ txsc40 = rtw89_phy_get_txsc(rtwdev, chan, RTW89_CHANNEL_WIDTH_40); ++ fallthrough; ++ case RTW89_CHANNEL_WIDTH_40: ++ txsc20 = rtw89_phy_get_txsc(rtwdev, chan, RTW89_CHANNEL_WIDTH_20); ++ break; ++ default: ++ break; ++ } ++ ++ switch (chan->band_width) { ++ case RTW89_CHANNEL_WIDTH_80: ++ rtw89_write8_mask(rtwdev, rf_mod, B_AX_WMAC_RFMOD_MASK, BIT(1)); ++ rtw89_write32(rtwdev, sub_carr, txsc20 | (txsc40 << 4)); ++ break; ++ case RTW89_CHANNEL_WIDTH_40: ++ rtw89_write8_mask(rtwdev, rf_mod, B_AX_WMAC_RFMOD_MASK, BIT(0)); ++ rtw89_write32(rtwdev, sub_carr, txsc20); ++ break; ++ case RTW89_CHANNEL_WIDTH_20: ++ rtw89_write8_clr(rtwdev, rf_mod, B_AX_WMAC_RFMOD_MASK); ++ rtw89_write32(rtwdev, sub_carr, 0); ++ break; ++ default: ++ break; ++ } ++ ++ if (chan->channel > 14) { ++ rtw89_write8_clr(rtwdev, chk_rate, B_AX_BAND_MODE); ++ rtw89_write8_set(rtwdev, chk_rate, ++ B_AX_CHECK_CCK_EN | B_AX_RTS_LIMIT_IN_OFDM6); ++ } else { ++ rtw89_write8_set(rtwdev, chk_rate, B_AX_BAND_MODE); ++ rtw89_write8_clr(rtwdev, chk_rate, ++ B_AX_CHECK_CCK_EN | B_AX_RTS_LIMIT_IN_OFDM6); ++ } ++} ++ ++static const u32 rtw8852b_sco_barker_threshold[14] = { ++ 0x1cfea, 0x1d0e1, 0x1d1d7, 0x1d2cd, 0x1d3c3, 0x1d4b9, 0x1d5b0, 0x1d6a6, ++ 0x1d79c, 0x1d892, 0x1d988, 0x1da7f, 0x1db75, 0x1ddc4 ++}; ++ ++static const u32 rtw8852b_sco_cck_threshold[14] = { ++ 0x27de3, 0x27f35, 0x28088, 0x281da, 0x2832d, 0x2847f, 0x285d2, 0x28724, ++ 0x28877, 0x289c9, 0x28b1c, 0x28c6e, 0x28dc1, 0x290ed ++}; ++ ++static void rtw8852b_ctrl_sco_cck(struct rtw89_dev *rtwdev, u8 primary_ch) ++{ ++ u8 ch_element = primary_ch - 1; ++ ++ rtw89_phy_write32_mask(rtwdev, R_RXSCOBC, B_RXSCOBC_TH, ++ rtw8852b_sco_barker_threshold[ch_element]); ++ rtw89_phy_write32_mask(rtwdev, R_RXSCOCCK, B_RXSCOCCK_TH, ++ rtw8852b_sco_cck_threshold[ch_element]); ++} ++ ++static u8 rtw8852b_sco_mapping(u8 central_ch) ++{ ++ if (central_ch == 1) ++ return 109; ++ else if (central_ch >= 2 && central_ch <= 6) ++ return 108; ++ else if (central_ch >= 7 && central_ch <= 10) ++ return 107; ++ else if (central_ch >= 11 && central_ch <= 14) ++ return 106; ++ else if (central_ch == 36 || central_ch == 38) ++ return 51; ++ else if (central_ch >= 40 && central_ch <= 58) ++ return 50; ++ else if (central_ch >= 60 && central_ch <= 64) ++ return 49; ++ else if (central_ch == 100 || central_ch == 102) ++ return 48; ++ else if (central_ch >= 104 && central_ch <= 126) ++ return 47; ++ else if (central_ch >= 128 && central_ch <= 151) ++ return 46; ++ else if (central_ch >= 153 && central_ch <= 177) ++ return 45; ++ else ++ return 0; ++} ++ ++struct rtw8852b_bb_gain { ++ u32 gain_g[BB_PATH_NUM_8852B]; ++ u32 gain_a[BB_PATH_NUM_8852B]; ++ u32 gain_mask; ++}; ++ ++static const struct rtw8852b_bb_gain bb_gain_lna[LNA_GAIN_NUM] = { ++ { .gain_g = {0x4678, 0x475C}, .gain_a = {0x45DC, 0x4740}, ++ .gain_mask = 0x00ff0000 }, ++ { .gain_g = {0x4678, 0x475C}, .gain_a = {0x45DC, 0x4740}, ++ .gain_mask = 0xff000000 }, ++ { .gain_g = {0x467C, 0x4760}, .gain_a = {0x4660, 0x4744}, ++ .gain_mask = 0x000000ff }, ++ { .gain_g = {0x467C, 0x4760}, .gain_a = {0x4660, 0x4744}, ++ .gain_mask = 0x0000ff00 }, ++ { .gain_g = {0x467C, 0x4760}, .gain_a = {0x4660, 0x4744}, ++ .gain_mask = 0x00ff0000 }, ++ { .gain_g = {0x467C, 0x4760}, .gain_a = {0x4660, 0x4744}, ++ .gain_mask = 0xff000000 }, ++ { .gain_g = {0x4680, 0x4764}, .gain_a = {0x4664, 0x4748}, ++ .gain_mask = 0x000000ff }, ++}; ++ ++static const struct rtw8852b_bb_gain bb_gain_tia[TIA_GAIN_NUM] = { ++ { .gain_g = {0x4680, 0x4764}, .gain_a = {0x4664, 0x4748}, ++ .gain_mask = 0x00ff0000 }, ++ { .gain_g = {0x4680, 0x4764}, .gain_a = {0x4664, 0x4748}, ++ .gain_mask = 0xff000000 }, ++}; ++ ++static void rtw8852b_set_gain_error(struct rtw89_dev *rtwdev, ++ enum rtw89_subband subband, ++ enum rtw89_rf_path path) ++{ ++ const struct rtw89_phy_bb_gain_info *gain = &rtwdev->bb_gain; ++ u8 gain_band = rtw89_subband_to_bb_gain_band(subband); ++ s32 val; ++ u32 reg; ++ u32 mask; ++ int i; ++ ++ for (i = 0; i < LNA_GAIN_NUM; i++) { ++ if (subband == RTW89_CH_2G) ++ reg = bb_gain_lna[i].gain_g[path]; ++ else ++ reg = bb_gain_lna[i].gain_a[path]; ++ ++ mask = bb_gain_lna[i].gain_mask; ++ val = gain->lna_gain[gain_band][path][i]; ++ rtw89_phy_write32_mask(rtwdev, reg, mask, val); ++ } ++ ++ for (i = 0; i < TIA_GAIN_NUM; i++) { ++ if (subband == RTW89_CH_2G) ++ reg = bb_gain_tia[i].gain_g[path]; ++ else ++ reg = bb_gain_tia[i].gain_a[path]; ++ ++ mask = bb_gain_tia[i].gain_mask; ++ val = gain->tia_gain[gain_band][path][i]; ++ rtw89_phy_write32_mask(rtwdev, reg, mask, val); ++ } ++} ++ ++static void rtw8852b_set_gain_offset(struct rtw89_dev *rtwdev, ++ enum rtw89_subband subband, ++ enum rtw89_phy_idx phy_idx) ++{ ++ static const u32 gain_err_addr[2] = {R_P0_AGC_RSVD, R_P1_AGC_RSVD}; ++ static const u32 rssi_ofst_addr[2] = {R_PATH0_G_TIA1_LNA6_OP1DB_V1, ++ R_PATH1_G_TIA1_LNA6_OP1DB_V1}; ++ struct rtw89_hal *hal = &rtwdev->hal; ++ struct rtw89_phy_efuse_gain *efuse_gain = &rtwdev->efuse_gain; ++ enum rtw89_gain_offset gain_ofdm_band; ++ s32 offset_a, offset_b; ++ s32 offset_ofdm, offset_cck; ++ s32 tmp; ++ u8 path; ++ ++ if (!efuse_gain->comp_valid) ++ goto next; ++ ++ for (path = RF_PATH_A; path < BB_PATH_NUM_8852B; path++) { ++ tmp = efuse_gain->comp[path][subband]; ++ tmp = clamp_t(s32, tmp << 2, S8_MIN, S8_MAX); ++ rtw89_phy_write32_mask(rtwdev, gain_err_addr[path], MASKBYTE0, tmp); ++ } ++ ++next: ++ if (!efuse_gain->offset_valid) ++ return; ++ ++ gain_ofdm_band = rtw89_subband_to_gain_offset_band_of_ofdm(subband); ++ ++ offset_a = -efuse_gain->offset[RF_PATH_A][gain_ofdm_band]; ++ offset_b = -efuse_gain->offset[RF_PATH_B][gain_ofdm_band]; ++ ++ tmp = -((offset_a << 2) + (efuse_gain->offset_base[RTW89_PHY_0] >> 2)); ++ tmp = clamp_t(s32, tmp, S8_MIN, S8_MAX); ++ rtw89_phy_write32_mask(rtwdev, rssi_ofst_addr[RF_PATH_A], B_PATH0_R_G_OFST_MASK, tmp); ++ ++ tmp = -((offset_b << 2) + (efuse_gain->offset_base[RTW89_PHY_0] >> 2)); ++ tmp = clamp_t(s32, tmp, S8_MIN, S8_MAX); ++ rtw89_phy_write32_mask(rtwdev, rssi_ofst_addr[RF_PATH_B], B_PATH0_R_G_OFST_MASK, tmp); ++ ++ if (hal->antenna_rx == RF_B) { ++ offset_ofdm = -efuse_gain->offset[RF_PATH_B][gain_ofdm_band]; ++ offset_cck = -efuse_gain->offset[RF_PATH_B][0]; ++ } else { ++ offset_ofdm = -efuse_gain->offset[RF_PATH_A][gain_ofdm_band]; ++ offset_cck = -efuse_gain->offset[RF_PATH_A][0]; ++ } ++ ++ tmp = (offset_ofdm << 4) + efuse_gain->offset_base[RTW89_PHY_0]; ++ tmp = clamp_t(s32, tmp, S8_MIN, S8_MAX); ++ rtw89_phy_write32_idx(rtwdev, R_P0_RPL1, B_P0_RPL1_BIAS_MASK, tmp, phy_idx); ++ ++ tmp = (offset_ofdm << 4) + efuse_gain->rssi_base[RTW89_PHY_0]; ++ tmp = clamp_t(s32, tmp, S8_MIN, S8_MAX); ++ rtw89_phy_write32_idx(rtwdev, R_P1_RPL1, B_P0_RPL1_BIAS_MASK, tmp, phy_idx); ++ ++ if (subband == RTW89_CH_2G) { ++ tmp = (offset_cck << 3) + (efuse_gain->offset_base[RTW89_PHY_0] >> 1); ++ tmp = clamp_t(s32, tmp, S8_MIN >> 1, S8_MAX >> 1); ++ rtw89_phy_write32_mask(rtwdev, R_RX_RPL_OFST, ++ B_RX_RPL_OFST_CCK_MASK, tmp); ++ } ++} ++ ++static ++void rtw8852b_set_rxsc_rpl_comp(struct rtw89_dev *rtwdev, enum rtw89_subband subband) ++{ ++ const struct rtw89_phy_bb_gain_info *gain = &rtwdev->bb_gain; ++ u8 band = rtw89_subband_to_bb_gain_band(subband); ++ u32 val; ++ ++ val = FIELD_PREP(B_P0_RPL1_20_MASK, (gain->rpl_ofst_20[band][RF_PATH_A] + ++ gain->rpl_ofst_20[band][RF_PATH_B]) / 2) | ++ FIELD_PREP(B_P0_RPL1_40_MASK, (gain->rpl_ofst_40[band][RF_PATH_A][0] + ++ gain->rpl_ofst_40[band][RF_PATH_B][0]) / 2) | ++ FIELD_PREP(B_P0_RPL1_41_MASK, (gain->rpl_ofst_40[band][RF_PATH_A][1] + ++ gain->rpl_ofst_40[band][RF_PATH_B][1]) / 2); ++ val >>= B_P0_RPL1_SHIFT; ++ rtw89_phy_write32_mask(rtwdev, R_P0_RPL1, B_P0_RPL1_MASK, val); ++ rtw89_phy_write32_mask(rtwdev, R_P1_RPL1, B_P0_RPL1_MASK, val); ++ ++ val = FIELD_PREP(B_P0_RTL2_42_MASK, (gain->rpl_ofst_40[band][RF_PATH_A][2] + ++ gain->rpl_ofst_40[band][RF_PATH_B][2]) / 2) | ++ FIELD_PREP(B_P0_RTL2_80_MASK, (gain->rpl_ofst_80[band][RF_PATH_A][0] + ++ gain->rpl_ofst_80[band][RF_PATH_B][0]) / 2) | ++ FIELD_PREP(B_P0_RTL2_81_MASK, (gain->rpl_ofst_80[band][RF_PATH_A][1] + ++ gain->rpl_ofst_80[band][RF_PATH_B][1]) / 2) | ++ FIELD_PREP(B_P0_RTL2_8A_MASK, (gain->rpl_ofst_80[band][RF_PATH_A][10] + ++ gain->rpl_ofst_80[band][RF_PATH_B][10]) / 2); ++ rtw89_phy_write32(rtwdev, R_P0_RPL2, val); ++ rtw89_phy_write32(rtwdev, R_P1_RPL2, val); ++ ++ val = FIELD_PREP(B_P0_RTL3_82_MASK, (gain->rpl_ofst_80[band][RF_PATH_A][2] + ++ gain->rpl_ofst_80[band][RF_PATH_B][2]) / 2) | ++ FIELD_PREP(B_P0_RTL3_83_MASK, (gain->rpl_ofst_80[band][RF_PATH_A][3] + ++ gain->rpl_ofst_80[band][RF_PATH_B][3]) / 2) | ++ FIELD_PREP(B_P0_RTL3_84_MASK, (gain->rpl_ofst_80[band][RF_PATH_A][4] + ++ gain->rpl_ofst_80[band][RF_PATH_B][4]) / 2) | ++ FIELD_PREP(B_P0_RTL3_89_MASK, (gain->rpl_ofst_80[band][RF_PATH_A][9] + ++ gain->rpl_ofst_80[band][RF_PATH_B][9]) / 2); ++ rtw89_phy_write32(rtwdev, R_P0_RPL3, val); ++ rtw89_phy_write32(rtwdev, R_P1_RPL3, val); ++} ++ ++static void rtw8852b_ctrl_ch(struct rtw89_dev *rtwdev, ++ const struct rtw89_chan *chan, ++ enum rtw89_phy_idx phy_idx) ++{ ++ u8 central_ch = chan->channel; ++ u8 subband = chan->subband_type; ++ u8 sco_comp; ++ bool is_2g = central_ch <= 14; ++ ++ /* Path A */ ++ if (is_2g) ++ rtw89_phy_write32_idx(rtwdev, R_PATH0_BAND_SEL_V1, ++ B_PATH0_BAND_SEL_MSK_V1, 1, phy_idx); ++ else ++ rtw89_phy_write32_idx(rtwdev, R_PATH0_BAND_SEL_V1, ++ B_PATH0_BAND_SEL_MSK_V1, 0, phy_idx); ++ ++ /* Path B */ ++ if (is_2g) ++ rtw89_phy_write32_idx(rtwdev, R_PATH1_BAND_SEL_V1, ++ B_PATH1_BAND_SEL_MSK_V1, 1, phy_idx); ++ else ++ rtw89_phy_write32_idx(rtwdev, R_PATH1_BAND_SEL_V1, ++ B_PATH1_BAND_SEL_MSK_V1, 0, phy_idx); ++ ++ /* SCO compensate FC setting */ ++ sco_comp = rtw8852b_sco_mapping(central_ch); ++ rtw89_phy_write32_idx(rtwdev, R_FC0_BW_V1, B_FC0_BW_INV, sco_comp, phy_idx); ++ ++ if (chan->band_type == RTW89_BAND_6G) ++ return; ++ ++ /* CCK parameters */ ++ if (central_ch == 14) { ++ rtw89_phy_write32_mask(rtwdev, R_TXFIR0, B_TXFIR_C01, 0x3b13ff); ++ rtw89_phy_write32_mask(rtwdev, R_TXFIR2, B_TXFIR_C23, 0x1c42de); ++ rtw89_phy_write32_mask(rtwdev, R_TXFIR4, B_TXFIR_C45, 0xfdb0ad); ++ rtw89_phy_write32_mask(rtwdev, R_TXFIR6, B_TXFIR_C67, 0xf60f6e); ++ rtw89_phy_write32_mask(rtwdev, R_TXFIR8, B_TXFIR_C89, 0xfd8f92); ++ rtw89_phy_write32_mask(rtwdev, R_TXFIRA, B_TXFIR_CAB, 0x2d011); ++ rtw89_phy_write32_mask(rtwdev, R_TXFIRC, B_TXFIR_CCD, 0x1c02c); ++ rtw89_phy_write32_mask(rtwdev, R_TXFIRE, B_TXFIR_CEF, 0xfff00a); ++ } else { ++ rtw89_phy_write32_mask(rtwdev, R_TXFIR0, B_TXFIR_C01, 0x3d23ff); ++ rtw89_phy_write32_mask(rtwdev, R_TXFIR2, B_TXFIR_C23, 0x29b354); ++ rtw89_phy_write32_mask(rtwdev, R_TXFIR4, B_TXFIR_C45, 0xfc1c8); ++ rtw89_phy_write32_mask(rtwdev, R_TXFIR6, B_TXFIR_C67, 0xfdb053); ++ rtw89_phy_write32_mask(rtwdev, R_TXFIR8, B_TXFIR_C89, 0xf86f9a); ++ rtw89_phy_write32_mask(rtwdev, R_TXFIRA, B_TXFIR_CAB, 0xfaef92); ++ rtw89_phy_write32_mask(rtwdev, R_TXFIRC, B_TXFIR_CCD, 0xfe5fcc); ++ rtw89_phy_write32_mask(rtwdev, R_TXFIRE, B_TXFIR_CEF, 0xffdff5); ++ } ++ ++ rtw8852b_set_gain_error(rtwdev, subband, RF_PATH_A); ++ rtw8852b_set_gain_error(rtwdev, subband, RF_PATH_B); ++ rtw8852b_set_gain_offset(rtwdev, subband, phy_idx); ++ rtw8852b_set_rxsc_rpl_comp(rtwdev, subband); ++} ++ ++static void rtw8852b_bw_setting(struct rtw89_dev *rtwdev, u8 bw, u8 path) ++{ ++ static const u32 adc_sel[2] = {0xC0EC, 0xC1EC}; ++ static const u32 wbadc_sel[2] = {0xC0E4, 0xC1E4}; ++ ++ switch (bw) { ++ case RTW89_CHANNEL_WIDTH_5: ++ rtw89_phy_write32_mask(rtwdev, adc_sel[path], 0x6000, 0x1); ++ rtw89_phy_write32_mask(rtwdev, wbadc_sel[path], 0x30, 0x0); ++ break; ++ case RTW89_CHANNEL_WIDTH_10: ++ rtw89_phy_write32_mask(rtwdev, adc_sel[path], 0x6000, 0x2); ++ rtw89_phy_write32_mask(rtwdev, wbadc_sel[path], 0x30, 0x1); ++ break; ++ case RTW89_CHANNEL_WIDTH_20: ++ rtw89_phy_write32_mask(rtwdev, adc_sel[path], 0x6000, 0x0); ++ rtw89_phy_write32_mask(rtwdev, wbadc_sel[path], 0x30, 0x2); ++ break; ++ case RTW89_CHANNEL_WIDTH_40: ++ rtw89_phy_write32_mask(rtwdev, adc_sel[path], 0x6000, 0x0); ++ rtw89_phy_write32_mask(rtwdev, wbadc_sel[path], 0x30, 0x2); ++ break; ++ case RTW89_CHANNEL_WIDTH_80: ++ rtw89_phy_write32_mask(rtwdev, adc_sel[path], 0x6000, 0x0); ++ rtw89_phy_write32_mask(rtwdev, wbadc_sel[path], 0x30, 0x2); ++ break; ++ default: ++ rtw89_warn(rtwdev, "Fail to set ADC\n"); ++ } ++} ++ ++static void rtw8852b_ctrl_bw(struct rtw89_dev *rtwdev, u8 pri_ch, u8 bw, ++ enum rtw89_phy_idx phy_idx) ++{ ++ u32 rx_path_0; ++ ++ switch (bw) { ++ case RTW89_CHANNEL_WIDTH_5: ++ rtw89_phy_write32_idx(rtwdev, R_FC0_BW_V1, B_FC0_BW_SET, 0x0, phy_idx); ++ rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD_V1, B_CHBW_MOD_SBW, 0x1, phy_idx); ++ rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD_V1, B_CHBW_MOD_PRICH, 0x0, phy_idx); ++ ++ /*Set RF mode at 3 */ ++ rtw89_phy_write32_idx(rtwdev, R_P0_RFMODE_ORI_RX, ++ B_P0_RFMODE_ORI_RX_ALL, 0x333, phy_idx); ++ rtw89_phy_write32_idx(rtwdev, R_P1_RFMODE_ORI_RX, ++ B_P1_RFMODE_ORI_RX_ALL, 0x333, phy_idx); ++ break; ++ case RTW89_CHANNEL_WIDTH_10: ++ rtw89_phy_write32_idx(rtwdev, R_FC0_BW_V1, B_FC0_BW_SET, 0x0, phy_idx); ++ rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD_V1, B_CHBW_MOD_SBW, 0x2, phy_idx); ++ rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD_V1, B_CHBW_MOD_PRICH, 0x0, phy_idx); ++ ++ /*Set RF mode at 3 */ ++ rtw89_phy_write32_idx(rtwdev, R_P0_RFMODE_ORI_RX, ++ B_P0_RFMODE_ORI_RX_ALL, 0x333, phy_idx); ++ rtw89_phy_write32_idx(rtwdev, R_P1_RFMODE_ORI_RX, ++ B_P1_RFMODE_ORI_RX_ALL, 0x333, phy_idx); ++ break; ++ case RTW89_CHANNEL_WIDTH_20: ++ rtw89_phy_write32_idx(rtwdev, R_FC0_BW_V1, B_FC0_BW_SET, 0x0, phy_idx); ++ rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD_V1, B_CHBW_MOD_SBW, 0x0, phy_idx); ++ rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD_V1, B_CHBW_MOD_PRICH, 0x0, phy_idx); ++ ++ /*Set RF mode at 3 */ ++ rtw89_phy_write32_idx(rtwdev, R_P0_RFMODE_ORI_RX, ++ B_P0_RFMODE_ORI_RX_ALL, 0x333, phy_idx); ++ rtw89_phy_write32_idx(rtwdev, R_P1_RFMODE_ORI_RX, ++ B_P1_RFMODE_ORI_RX_ALL, 0x333, phy_idx); ++ break; ++ case RTW89_CHANNEL_WIDTH_40: ++ rtw89_phy_write32_idx(rtwdev, R_FC0_BW_V1, B_FC0_BW_SET, 0x1, phy_idx); ++ rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD_V1, B_CHBW_MOD_SBW, 0x0, phy_idx); ++ rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD_V1, B_CHBW_MOD_PRICH, ++ pri_ch, phy_idx); ++ ++ /*Set RF mode at 3 */ ++ rtw89_phy_write32_idx(rtwdev, R_P0_RFMODE_ORI_RX, ++ B_P0_RFMODE_ORI_RX_ALL, 0x333, phy_idx); ++ rtw89_phy_write32_idx(rtwdev, R_P1_RFMODE_ORI_RX, ++ B_P1_RFMODE_ORI_RX_ALL, 0x333, phy_idx); ++ /*CCK primary channel */ ++ if (pri_ch == RTW89_SC_20_UPPER) ++ rtw89_phy_write32_mask(rtwdev, R_RXSC, B_RXSC_EN, 1); ++ else ++ rtw89_phy_write32_mask(rtwdev, R_RXSC, B_RXSC_EN, 0); ++ ++ break; ++ case RTW89_CHANNEL_WIDTH_80: ++ rtw89_phy_write32_idx(rtwdev, R_FC0_BW_V1, B_FC0_BW_SET, 0x2, phy_idx); ++ rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD_V1, B_CHBW_MOD_SBW, 0x0, phy_idx); ++ rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD_V1, B_CHBW_MOD_PRICH, ++ pri_ch, phy_idx); ++ ++ /*Set RF mode at A */ ++ rtw89_phy_write32_idx(rtwdev, R_P0_RFMODE_ORI_RX, ++ B_P0_RFMODE_ORI_RX_ALL, 0xaaa, phy_idx); ++ rtw89_phy_write32_idx(rtwdev, R_P1_RFMODE_ORI_RX, ++ B_P1_RFMODE_ORI_RX_ALL, 0xaaa, phy_idx); ++ break; ++ default: ++ rtw89_warn(rtwdev, "Fail to switch bw (bw:%d, pri ch:%d)\n", bw, ++ pri_ch); ++ } ++ ++ rtw8852b_bw_setting(rtwdev, bw, RF_PATH_A); ++ rtw8852b_bw_setting(rtwdev, bw, RF_PATH_B); ++ ++ rx_path_0 = rtw89_phy_read32_idx(rtwdev, R_CHBW_MOD_V1, B_ANT_RX_SEG0, ++ phy_idx); ++ if (rx_path_0 == 0x1) ++ rtw89_phy_write32_idx(rtwdev, R_P1_RFMODE_ORI_RX, ++ B_P1_RFMODE_ORI_RX_ALL, 0x111, phy_idx); ++ else if (rx_path_0 == 0x2) ++ rtw89_phy_write32_idx(rtwdev, R_P0_RFMODE_ORI_RX, ++ B_P0_RFMODE_ORI_RX_ALL, 0x111, phy_idx); ++} ++ ++static void rtw8852b_ctrl_cck_en(struct rtw89_dev *rtwdev, bool cck_en) ++{ ++ if (cck_en) { ++ rtw89_phy_write32_mask(rtwdev, R_UPD_CLK_ADC, B_ENABLE_CCK, 1); ++ rtw89_phy_write32_mask(rtwdev, R_RXCCA, B_RXCCA_DIS, 0); ++ } else { ++ rtw89_phy_write32_mask(rtwdev, R_UPD_CLK_ADC, B_ENABLE_CCK, 0); ++ rtw89_phy_write32_mask(rtwdev, R_RXCCA, B_RXCCA_DIS, 1); ++ } ++} ++ ++static void rtw8852b_5m_mask(struct rtw89_dev *rtwdev, const struct rtw89_chan *chan, ++ enum rtw89_phy_idx phy_idx) ++{ ++ u8 pri_ch = chan->primary_channel; ++ bool mask_5m_low; ++ bool mask_5m_en; ++ ++ switch (chan->band_width) { ++ case RTW89_CHANNEL_WIDTH_40: ++ /* Prich=1: Mask 5M High, Prich=2: Mask 5M Low */ ++ mask_5m_en = true; ++ mask_5m_low = pri_ch == 2; ++ break; ++ case RTW89_CHANNEL_WIDTH_80: ++ /* Prich=3: Mask 5M High, Prich=4: Mask 5M Low, Else: Disable */ ++ mask_5m_en = pri_ch == 3 || pri_ch == 4; ++ mask_5m_low = pri_ch == 4; ++ break; ++ default: ++ mask_5m_en = false; ++ break; ++ } ++ ++ if (!mask_5m_en) { ++ rtw89_phy_write32_mask(rtwdev, R_PATH0_5MDET_V1, B_PATH0_5MDET_EN, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_PATH1_5MDET_V1, B_PATH1_5MDET_EN, 0x0); ++ rtw89_phy_write32_idx(rtwdev, R_ASSIGN_SBD_OPT_V1, ++ B_ASSIGN_SBD_OPT_EN_V1, 0x0, phy_idx); ++ return; ++ } ++ ++ if (mask_5m_low) { ++ rtw89_phy_write32_mask(rtwdev, R_PATH0_5MDET_V1, B_PATH0_5MDET_TH, 0x4); ++ rtw89_phy_write32_mask(rtwdev, R_PATH0_5MDET_V1, B_PATH0_5MDET_EN, 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_PATH0_5MDET_V1, B_PATH0_5MDET_SB2, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_PATH0_5MDET_V1, B_PATH0_5MDET_SB0, 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_PATH1_5MDET_V1, B_PATH1_5MDET_TH, 0x4); ++ rtw89_phy_write32_mask(rtwdev, R_PATH1_5MDET_V1, B_PATH1_5MDET_EN, 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_PATH1_5MDET_V1, B_PATH1_5MDET_SB2, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_PATH1_5MDET_V1, B_PATH1_5MDET_SB0, 0x1); ++ } else { ++ rtw89_phy_write32_mask(rtwdev, R_PATH0_5MDET_V1, B_PATH0_5MDET_TH, 0x4); ++ rtw89_phy_write32_mask(rtwdev, R_PATH0_5MDET_V1, B_PATH0_5MDET_EN, 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_PATH0_5MDET_V1, B_PATH0_5MDET_SB2, 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_PATH0_5MDET_V1, B_PATH0_5MDET_SB0, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_PATH1_5MDET_V1, B_PATH1_5MDET_TH, 0x4); ++ rtw89_phy_write32_mask(rtwdev, R_PATH1_5MDET_V1, B_PATH1_5MDET_EN, 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_PATH1_5MDET_V1, B_PATH1_5MDET_SB2, 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_PATH1_5MDET_V1, B_PATH1_5MDET_SB0, 0x0); ++ } ++ rtw89_phy_write32_idx(rtwdev, R_ASSIGN_SBD_OPT_V1, ++ B_ASSIGN_SBD_OPT_EN_V1, 0x1, phy_idx); ++} ++ ++static void rtw8852b_bb_reset_all(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx) ++{ ++ rtw89_phy_write32_idx(rtwdev, R_S0_HW_SI_DIS, B_S0_HW_SI_DIS_W_R_TRIG, 0x7, phy_idx); ++ rtw89_phy_write32_idx(rtwdev, R_S1_HW_SI_DIS, B_S1_HW_SI_DIS_W_R_TRIG, 0x7, phy_idx); ++ fsleep(1); ++ rtw89_phy_write32_idx(rtwdev, R_RSTB_ASYNC, B_RSTB_ASYNC_ALL, 1, phy_idx); ++ rtw89_phy_write32_idx(rtwdev, R_RSTB_ASYNC, B_RSTB_ASYNC_ALL, 0, phy_idx); ++ rtw89_phy_write32_idx(rtwdev, R_S0_HW_SI_DIS, B_S0_HW_SI_DIS_W_R_TRIG, 0x0, phy_idx); ++ rtw89_phy_write32_idx(rtwdev, R_S1_HW_SI_DIS, B_S1_HW_SI_DIS_W_R_TRIG, 0x0, phy_idx); ++ rtw89_phy_write32_idx(rtwdev, R_RSTB_ASYNC, B_RSTB_ASYNC_ALL, 1, phy_idx); ++} ++ ++static void rtw8852b_bb_reset_en(struct rtw89_dev *rtwdev, enum rtw89_band band, ++ enum rtw89_phy_idx phy_idx, bool en) ++{ ++ if (en) { ++ rtw89_phy_write32_idx(rtwdev, R_S0_HW_SI_DIS, ++ B_S0_HW_SI_DIS_W_R_TRIG, 0x0, phy_idx); ++ rtw89_phy_write32_idx(rtwdev, R_S1_HW_SI_DIS, ++ B_S1_HW_SI_DIS_W_R_TRIG, 0x0, phy_idx); ++ rtw89_phy_write32_idx(rtwdev, R_RSTB_ASYNC, B_RSTB_ASYNC_ALL, 1, phy_idx); ++ if (band == RTW89_BAND_2G) ++ rtw89_phy_write32_mask(rtwdev, R_RXCCA, B_RXCCA_DIS, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_PD_CTRL, B_PD_HIT_DIS, 0x0); ++ } else { ++ rtw89_phy_write32_mask(rtwdev, R_RXCCA, B_RXCCA_DIS, 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_PD_CTRL, B_PD_HIT_DIS, 0x1); ++ rtw89_phy_write32_idx(rtwdev, R_S0_HW_SI_DIS, ++ B_S0_HW_SI_DIS_W_R_TRIG, 0x7, phy_idx); ++ rtw89_phy_write32_idx(rtwdev, R_S1_HW_SI_DIS, ++ B_S1_HW_SI_DIS_W_R_TRIG, 0x7, phy_idx); ++ fsleep(1); ++ rtw89_phy_write32_idx(rtwdev, R_RSTB_ASYNC, B_RSTB_ASYNC_ALL, 0, phy_idx); ++ } ++} ++ ++static void rtw8852b_bb_reset(struct rtw89_dev *rtwdev, ++ enum rtw89_phy_idx phy_idx) ++{ ++ rtw89_phy_write32_set(rtwdev, R_P0_TXPW_RSTB, B_P0_TXPW_RSTB_MANON); ++ rtw89_phy_write32_set(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_TRK_EN); ++ rtw89_phy_write32_set(rtwdev, R_P1_TXPW_RSTB, B_P1_TXPW_RSTB_MANON); ++ rtw89_phy_write32_set(rtwdev, R_P1_TSSI_TRK, B_P1_TSSI_TRK_EN); ++ rtw8852b_bb_reset_all(rtwdev, phy_idx); ++ rtw89_phy_write32_clr(rtwdev, R_P0_TXPW_RSTB, B_P0_TXPW_RSTB_MANON); ++ rtw89_phy_write32_clr(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_TRK_EN); ++ rtw89_phy_write32_clr(rtwdev, R_P1_TXPW_RSTB, B_P1_TXPW_RSTB_MANON); ++ rtw89_phy_write32_clr(rtwdev, R_P1_TSSI_TRK, B_P1_TSSI_TRK_EN); ++} ++ ++static void rtw8852b_bb_macid_ctrl_init(struct rtw89_dev *rtwdev, ++ enum rtw89_phy_idx phy_idx) ++{ ++ u32 addr; ++ ++ for (addr = R_AX_PWR_MACID_LMT_TABLE0; ++ addr <= R_AX_PWR_MACID_LMT_TABLE127; addr += 4) ++ rtw89_mac_txpwr_write32(rtwdev, phy_idx, addr, 0); ++} ++ ++static void rtw8852b_bb_sethw(struct rtw89_dev *rtwdev) ++{ ++ struct rtw89_phy_efuse_gain *gain = &rtwdev->efuse_gain; ++ ++ rtw89_phy_write32_clr(rtwdev, R_P0_EN_SOUND_WO_NDP, B_P0_EN_SOUND_WO_NDP); ++ rtw89_phy_write32_clr(rtwdev, R_P1_EN_SOUND_WO_NDP, B_P1_EN_SOUND_WO_NDP); ++ ++ rtw8852b_bb_macid_ctrl_init(rtwdev, RTW89_PHY_0); ++ ++ /* read these registers after loading BB parameters */ ++ gain->offset_base[RTW89_PHY_0] = ++ rtw89_phy_read32_mask(rtwdev, R_P0_RPL1, B_P0_RPL1_BIAS_MASK); ++ gain->rssi_base[RTW89_PHY_0] = ++ rtw89_phy_read32_mask(rtwdev, R_P1_RPL1, B_P0_RPL1_BIAS_MASK); ++} ++ ++static void rtw8852b_bb_set_pop(struct rtw89_dev *rtwdev) ++{ ++ if (rtwdev->hw->conf.flags & IEEE80211_CONF_MONITOR) ++ rtw89_phy_write32_clr(rtwdev, R_PKT_CTRL, B_PKT_POP_EN); ++} ++ ++static void rtw8852b_set_channel_bb(struct rtw89_dev *rtwdev, const struct rtw89_chan *chan, ++ enum rtw89_phy_idx phy_idx) ++{ ++ bool cck_en = chan->channel <= 14; ++ u8 pri_ch_idx = chan->pri_ch_idx; ++ ++ if (cck_en) ++ rtw8852b_ctrl_sco_cck(rtwdev, chan->primary_channel); ++ ++ rtw8852b_ctrl_ch(rtwdev, chan, phy_idx); ++ rtw8852b_ctrl_bw(rtwdev, pri_ch_idx, chan->band_width, phy_idx); ++ rtw8852b_ctrl_cck_en(rtwdev, cck_en); ++ if (chan->band_type == RTW89_BAND_5G) { ++ rtw89_phy_write32_mask(rtwdev, R_PATH0_BT_SHARE_V1, ++ B_PATH0_BT_SHARE_V1, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_PATH0_BTG_PATH_V1, ++ B_PATH0_BTG_PATH_V1, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_PATH1_BT_SHARE_V1, ++ B_PATH1_BT_SHARE_V1, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_PATH1_BTG_PATH_V1, ++ B_PATH1_BTG_PATH_V1, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_CHBW_MOD_V1, B_BT_SHARE, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_FC0_BW_V1, B_ANT_RX_BT_SEG0, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_BT_DYN_DC_EST_EN_V1, ++ B_BT_DYN_DC_EST_EN_MSK, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_GNT_BT_WGT_EN, B_GNT_BT_WGT_EN, 0x0); ++ } ++ rtw89_phy_write32_mask(rtwdev, R_MAC_PIN_SEL, B_CH_IDX_SEG0, ++ chan->primary_channel); ++ rtw8852b_5m_mask(rtwdev, chan, phy_idx); ++ rtw8852b_bb_set_pop(rtwdev); ++ rtw8852b_bb_reset_all(rtwdev, phy_idx); ++} ++ ++static void rtw8852b_set_channel(struct rtw89_dev *rtwdev, ++ const struct rtw89_chan *chan, ++ enum rtw89_mac_idx mac_idx, ++ enum rtw89_phy_idx phy_idx) ++{ ++ rtw8852b_set_channel_mac(rtwdev, chan, mac_idx); ++ rtw8852b_set_channel_bb(rtwdev, chan, phy_idx); ++ rtw8852b_set_channel_rf(rtwdev, chan, phy_idx); ++} ++ ++static void rtw8852b_tssi_cont_en(struct rtw89_dev *rtwdev, bool en, ++ enum rtw89_rf_path path) ++{ ++ static const u32 tssi_trk[2] = {R_P0_TSSI_TRK, R_P1_TSSI_TRK}; ++ static const u32 ctrl_bbrst[2] = {R_P0_TXPW_RSTB, R_P1_TXPW_RSTB}; ++ ++ if (en) { ++ rtw89_phy_write32_mask(rtwdev, ctrl_bbrst[path], B_P0_TXPW_RSTB_MANON, 0x0); ++ rtw89_phy_write32_mask(rtwdev, tssi_trk[path], B_P0_TSSI_TRK_EN, 0x0); ++ } else { ++ rtw89_phy_write32_mask(rtwdev, ctrl_bbrst[path], B_P0_TXPW_RSTB_MANON, 0x1); ++ rtw89_phy_write32_mask(rtwdev, tssi_trk[path], B_P0_TSSI_TRK_EN, 0x1); ++ } ++} ++ ++static void rtw8852b_tssi_cont_en_phyidx(struct rtw89_dev *rtwdev, bool en, ++ u8 phy_idx) ++{ ++ if (!rtwdev->dbcc_en) { ++ rtw8852b_tssi_cont_en(rtwdev, en, RF_PATH_A); ++ rtw8852b_tssi_cont_en(rtwdev, en, RF_PATH_B); ++ } else { ++ if (phy_idx == RTW89_PHY_0) ++ rtw8852b_tssi_cont_en(rtwdev, en, RF_PATH_A); ++ else ++ rtw8852b_tssi_cont_en(rtwdev, en, RF_PATH_B); ++ } ++} ++ ++static void rtw8852b_adc_en(struct rtw89_dev *rtwdev, bool en) ++{ ++ if (en) ++ rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_RST, 0x0); ++ else ++ rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_RST, 0xf); ++} ++ ++static void rtw8852b_set_channel_help(struct rtw89_dev *rtwdev, bool enter, ++ struct rtw89_channel_help_params *p, ++ const struct rtw89_chan *chan, ++ enum rtw89_mac_idx mac_idx, ++ enum rtw89_phy_idx phy_idx) ++{ ++ if (enter) { ++ rtw89_chip_stop_sch_tx(rtwdev, RTW89_MAC_0, &p->tx_en, RTW89_SCH_TX_SEL_ALL); ++ rtw89_mac_cfg_ppdu_status(rtwdev, RTW89_MAC_0, false); ++ rtw8852b_tssi_cont_en_phyidx(rtwdev, false, RTW89_PHY_0); ++ rtw8852b_adc_en(rtwdev, false); ++ fsleep(40); ++ rtw8852b_bb_reset_en(rtwdev, chan->band_type, phy_idx, false); ++ } else { ++ rtw89_mac_cfg_ppdu_status(rtwdev, RTW89_MAC_0, true); ++ rtw8852b_adc_en(rtwdev, true); ++ rtw8852b_tssi_cont_en_phyidx(rtwdev, true, RTW89_PHY_0); ++ rtw8852b_bb_reset_en(rtwdev, chan->band_type, phy_idx, true); ++ rtw89_chip_resume_sch_tx(rtwdev, RTW89_MAC_0, p->tx_en); ++ } ++} ++ ++static void rtw8852b_rfk_init(struct rtw89_dev *rtwdev) ++{ ++ rtwdev->is_tssi_mode[RF_PATH_A] = false; ++ rtwdev->is_tssi_mode[RF_PATH_B] = false; ++ ++ rtw8852b_dpk_init(rtwdev); ++ rtw8852b_rck(rtwdev); ++ rtw8852b_dack(rtwdev); ++ rtw8852b_rx_dck(rtwdev, RTW89_PHY_0); ++} ++ ++static void rtw8852b_rfk_channel(struct rtw89_dev *rtwdev) ++{ ++ enum rtw89_phy_idx phy_idx = RTW89_PHY_0; ++ ++ rtw8852b_rx_dck(rtwdev, phy_idx); ++ rtw8852b_iqk(rtwdev, phy_idx); ++ rtw8852b_tssi(rtwdev, phy_idx, true); ++ rtw8852b_dpk(rtwdev, phy_idx); ++} ++ ++static void rtw8852b_rfk_band_changed(struct rtw89_dev *rtwdev, ++ enum rtw89_phy_idx phy_idx) ++{ ++ rtw8852b_tssi_scan(rtwdev, phy_idx); ++} ++ ++static void rtw8852b_rfk_scan(struct rtw89_dev *rtwdev, bool start) ++{ ++ rtw8852b_wifi_scan_notify(rtwdev, start, RTW89_PHY_0); ++} ++ ++static void rtw8852b_rfk_track(struct rtw89_dev *rtwdev) ++{ ++ rtw8852b_dpk_track(rtwdev); ++} ++ ++static u32 rtw8852b_bb_cal_txpwr_ref(struct rtw89_dev *rtwdev, ++ enum rtw89_phy_idx phy_idx, s16 ref) ++{ ++ const u16 tssi_16dbm_cw = 0x12c; ++ const u8 base_cw_0db = 0x27; ++ const s8 ofst_int = 0; ++ s16 pwr_s10_3; ++ s16 rf_pwr_cw; ++ u16 bb_pwr_cw; ++ u32 pwr_cw; ++ u32 tssi_ofst_cw; ++ ++ pwr_s10_3 = (ref << 1) + (s16)(ofst_int) + (s16)(base_cw_0db << 3); ++ bb_pwr_cw = FIELD_GET(GENMASK(2, 0), pwr_s10_3); ++ rf_pwr_cw = FIELD_GET(GENMASK(8, 3), pwr_s10_3); ++ rf_pwr_cw = clamp_t(s16, rf_pwr_cw, 15, 63); ++ pwr_cw = (rf_pwr_cw << 3) | bb_pwr_cw; ++ ++ tssi_ofst_cw = (u32)((s16)tssi_16dbm_cw + (ref << 1) - (16 << 3)); ++ rtw89_debug(rtwdev, RTW89_DBG_TXPWR, ++ "[TXPWR] tssi_ofst_cw=%d rf_cw=0x%x bb_cw=0x%x\n", ++ tssi_ofst_cw, rf_pwr_cw, bb_pwr_cw); ++ ++ return FIELD_PREP(B_DPD_TSSI_CW, tssi_ofst_cw) | ++ FIELD_PREP(B_DPD_PWR_CW, pwr_cw) | ++ FIELD_PREP(B_DPD_REF, ref); ++} ++ ++static void rtw8852b_set_txpwr_ref(struct rtw89_dev *rtwdev, ++ enum rtw89_phy_idx phy_idx) ++{ ++ static const u32 addr[RF_PATH_NUM_8852B] = {0x5800, 0x7800}; ++ const u32 mask = B_DPD_TSSI_CW | B_DPD_PWR_CW | B_DPD_REF; ++ const u8 ofst_ofdm = 0x4; ++ const u8 ofst_cck = 0x8; ++ const s16 ref_ofdm = 0; ++ const s16 ref_cck = 0; ++ u32 val; ++ u8 i; ++ ++ rtw89_debug(rtwdev, RTW89_DBG_TXPWR, "[TXPWR] set txpwr reference\n"); ++ ++ rtw89_mac_txpwr_write32_mask(rtwdev, phy_idx, R_AX_PWR_RATE_CTRL, ++ B_AX_PWR_REF, 0x0); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_TXPWR, "[TXPWR] set bb ofdm txpwr ref\n"); ++ val = rtw8852b_bb_cal_txpwr_ref(rtwdev, phy_idx, ref_ofdm); ++ ++ for (i = 0; i < RF_PATH_NUM_8852B; i++) ++ rtw89_phy_write32_idx(rtwdev, addr[i] + ofst_ofdm, mask, val, ++ phy_idx); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_TXPWR, "[TXPWR] set bb cck txpwr ref\n"); ++ val = rtw8852b_bb_cal_txpwr_ref(rtwdev, phy_idx, ref_cck); ++ ++ for (i = 0; i < RF_PATH_NUM_8852B; i++) ++ rtw89_phy_write32_idx(rtwdev, addr[i] + ofst_cck, mask, val, ++ phy_idx); ++} ++ ++static void rtw8852b_bb_set_tx_shape_dfir(struct rtw89_dev *rtwdev, ++ u8 tx_shape_idx, ++ enum rtw89_phy_idx phy_idx) ++{ ++#define __DFIR_CFG_ADDR(i) (R_TXFIR0 + ((i) << 2)) ++#define __DFIR_CFG_MASK 0xffffffff ++#define __DFIR_CFG_NR 8 ++#define __DECL_DFIR_PARAM(_name, _val...) \ ++ static const u32 param_ ## _name[] = {_val}; \ ++ static_assert(ARRAY_SIZE(param_ ## _name) == __DFIR_CFG_NR) ++ ++ __DECL_DFIR_PARAM(flat, ++ 0x023D23FF, 0x0029B354, 0x000FC1C8, 0x00FDB053, ++ 0x00F86F9A, 0x06FAEF92, 0x00FE5FCC, 0x00FFDFF5); ++ __DECL_DFIR_PARAM(sharp, ++ 0x023D83FF, 0x002C636A, 0x0013F204, 0x00008090, ++ 0x00F87FB0, 0x06F99F83, 0x00FDBFBA, 0x00003FF5); ++ __DECL_DFIR_PARAM(sharp_14, ++ 0x023B13FF, 0x001C42DE, 0x00FDB0AD, 0x00F60F6E, ++ 0x00FD8F92, 0x0602D011, 0x0001C02C, 0x00FFF00A); ++ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); ++ u8 ch = chan->channel; ++ const u32 *param; ++ u32 addr; ++ int i; ++ ++ if (ch > 14) { ++ rtw89_warn(rtwdev, ++ "set tx shape dfir by unknown ch: %d on 2G\n", ch); ++ return; ++ } ++ ++ if (ch == 14) ++ param = param_sharp_14; ++ else ++ param = tx_shape_idx == 0 ? param_flat : param_sharp; ++ ++ for (i = 0; i < __DFIR_CFG_NR; i++) { ++ addr = __DFIR_CFG_ADDR(i); ++ rtw89_debug(rtwdev, RTW89_DBG_TXPWR, ++ "set tx shape dfir: 0x%x: 0x%x\n", addr, param[i]); ++ rtw89_phy_write32_idx(rtwdev, addr, __DFIR_CFG_MASK, param[i], ++ phy_idx); ++ } ++ ++#undef __DECL_DFIR_PARAM ++#undef __DFIR_CFG_NR ++#undef __DFIR_CFG_MASK ++#undef __DECL_CFG_ADDR ++} ++ ++static void rtw8852b_set_tx_shape(struct rtw89_dev *rtwdev, ++ const struct rtw89_chan *chan, ++ enum rtw89_phy_idx phy_idx) ++{ ++ u8 band = chan->band_type; ++ u8 regd = rtw89_regd_get(rtwdev, band); ++ u8 tx_shape_cck = rtw89_8852b_tx_shape[band][RTW89_RS_CCK][regd]; ++ u8 tx_shape_ofdm = rtw89_8852b_tx_shape[band][RTW89_RS_OFDM][regd]; ++ ++ if (band == RTW89_BAND_2G) ++ rtw8852b_bb_set_tx_shape_dfir(rtwdev, tx_shape_cck, phy_idx); ++ ++ rtw89_phy_write32_mask(rtwdev, R_DCFO_OPT, B_TXSHAPE_TRIANGULAR_CFG, ++ tx_shape_ofdm); ++} ++ ++static void rtw8852b_set_txpwr(struct rtw89_dev *rtwdev, ++ const struct rtw89_chan *chan, ++ enum rtw89_phy_idx phy_idx) ++{ ++ rtw89_phy_set_txpwr_byrate(rtwdev, chan, phy_idx); ++ rtw89_phy_set_txpwr_offset(rtwdev, chan, phy_idx); ++ rtw8852b_set_tx_shape(rtwdev, chan, phy_idx); ++ rtw89_phy_set_txpwr_limit(rtwdev, chan, phy_idx); ++ rtw89_phy_set_txpwr_limit_ru(rtwdev, chan, phy_idx); ++} ++ ++static void rtw8852b_set_txpwr_ctrl(struct rtw89_dev *rtwdev, ++ enum rtw89_phy_idx phy_idx) ++{ ++ rtw8852b_set_txpwr_ref(rtwdev, phy_idx); ++} ++ ++static ++void rtw8852b_set_txpwr_ul_tb_offset(struct rtw89_dev *rtwdev, ++ s8 pw_ofst, enum rtw89_mac_idx mac_idx) ++{ ++ u32 reg; ++ ++ if (pw_ofst < -16 || pw_ofst > 15) { ++ rtw89_warn(rtwdev, "[ULTB] Err pwr_offset=%d\n", pw_ofst); ++ return; ++ } ++ ++ reg = rtw89_mac_reg_by_idx(R_AX_PWR_UL_TB_CTRL, mac_idx); ++ rtw89_write32_set(rtwdev, reg, B_AX_PWR_UL_TB_CTRL_EN); ++ ++ reg = rtw89_mac_reg_by_idx(R_AX_PWR_UL_TB_1T, mac_idx); ++ rtw89_write32_mask(rtwdev, reg, B_AX_PWR_UL_TB_1T_MASK, pw_ofst); ++ ++ pw_ofst = max_t(s8, pw_ofst - 3, -16); ++ reg = rtw89_mac_reg_by_idx(R_AX_PWR_UL_TB_2T, mac_idx); ++ rtw89_write32_mask(rtwdev, reg, B_AX_PWR_UL_TB_1T_MASK, pw_ofst); ++} ++ ++static int ++rtw8852b_init_txpwr_unit(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx) ++{ ++ int ret; ++ ++ ret = rtw89_mac_txpwr_write32(rtwdev, phy_idx, R_AX_PWR_UL_CTRL2, 0x07763333); ++ if (ret) ++ return ret; ++ ++ ret = rtw89_mac_txpwr_write32(rtwdev, phy_idx, R_AX_PWR_COEXT_CTRL, 0x01ebf000); ++ if (ret) ++ return ret; ++ ++ ret = rtw89_mac_txpwr_write32(rtwdev, phy_idx, R_AX_PWR_UL_CTRL0, 0x0002f8ff); ++ if (ret) ++ return ret; ++ ++ rtw8852b_set_txpwr_ul_tb_offset(rtwdev, 0, phy_idx == RTW89_PHY_1 ? ++ RTW89_MAC_1 : RTW89_MAC_0); ++ ++ return 0; ++} ++ ++void rtw8852b_bb_set_plcp_tx(struct rtw89_dev *rtwdev) ++{ ++ const struct rtw89_reg3_def *def = rtw8852b_pmac_ht20_mcs7_tbl; ++ u8 i; ++ ++ for (i = 0; i < ARRAY_SIZE(rtw8852b_pmac_ht20_mcs7_tbl); i++, def++) ++ rtw89_phy_write32_mask(rtwdev, def->addr, def->mask, def->data); ++} ++ ++static void rtw8852b_stop_pmac_tx(struct rtw89_dev *rtwdev, ++ struct rtw8852b_bb_pmac_info *tx_info, ++ enum rtw89_phy_idx idx) ++{ ++ rtw89_debug(rtwdev, RTW89_DBG_TSSI, "PMAC Stop Tx"); ++ if (tx_info->mode == CONT_TX) ++ rtw89_phy_write32_idx(rtwdev, R_PMAC_TX_PRD, B_PMAC_CTX_EN, 0, idx); ++ else if (tx_info->mode == PKTS_TX) ++ rtw89_phy_write32_idx(rtwdev, R_PMAC_TX_PRD, B_PMAC_PTX_EN, 0, idx); ++} ++ ++static void rtw8852b_start_pmac_tx(struct rtw89_dev *rtwdev, ++ struct rtw8852b_bb_pmac_info *tx_info, ++ enum rtw89_phy_idx idx) ++{ ++ enum rtw8852b_pmac_mode mode = tx_info->mode; ++ u32 pkt_cnt = tx_info->tx_cnt; ++ u16 period = tx_info->period; ++ ++ if (mode == CONT_TX && !tx_info->is_cck) { ++ rtw89_phy_write32_idx(rtwdev, R_PMAC_TX_PRD, B_PMAC_CTX_EN, 1, idx); ++ rtw89_debug(rtwdev, RTW89_DBG_TSSI, "PMAC CTx Start"); ++ } else if (mode == PKTS_TX) { ++ rtw89_phy_write32_idx(rtwdev, R_PMAC_TX_PRD, B_PMAC_PTX_EN, 1, idx); ++ rtw89_phy_write32_idx(rtwdev, R_PMAC_TX_PRD, ++ B_PMAC_TX_PRD_MSK, period, idx); ++ rtw89_phy_write32_idx(rtwdev, R_PMAC_TX_CNT, B_PMAC_TX_CNT_MSK, ++ pkt_cnt, idx); ++ rtw89_debug(rtwdev, RTW89_DBG_TSSI, "PMAC PTx Start"); ++ } ++ ++ rtw89_phy_write32_idx(rtwdev, R_PMAC_TX_CTRL, B_PMAC_TXEN_DIS, 1, idx); ++ rtw89_phy_write32_idx(rtwdev, R_PMAC_TX_CTRL, B_PMAC_TXEN_DIS, 0, idx); ++} ++ ++void rtw8852b_bb_set_pmac_tx(struct rtw89_dev *rtwdev, ++ struct rtw8852b_bb_pmac_info *tx_info, ++ enum rtw89_phy_idx idx) ++{ ++ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); ++ ++ if (!tx_info->en_pmac_tx) { ++ rtw8852b_stop_pmac_tx(rtwdev, tx_info, idx); ++ rtw89_phy_write32_idx(rtwdev, R_PD_CTRL, B_PD_HIT_DIS, 0, idx); ++ if (chan->band_type == RTW89_BAND_2G) ++ rtw89_phy_write32_clr(rtwdev, R_RXCCA, B_RXCCA_DIS); ++ return; ++ } ++ ++ rtw89_debug(rtwdev, RTW89_DBG_TSSI, "PMAC Tx Enable"); ++ ++ rtw89_phy_write32_idx(rtwdev, R_PMAC_GNT, B_PMAC_GNT_TXEN, 1, idx); ++ rtw89_phy_write32_idx(rtwdev, R_PMAC_GNT, B_PMAC_GNT_RXEN, 1, idx); ++ rtw89_phy_write32_idx(rtwdev, R_PMAC_RX_CFG1, B_PMAC_OPT1_MSK, 0x3f, idx); ++ rtw89_phy_write32_idx(rtwdev, R_RSTB_ASYNC, B_RSTB_ASYNC_ALL, 0, idx); ++ rtw89_phy_write32_idx(rtwdev, R_PD_CTRL, B_PD_HIT_DIS, 1, idx); ++ rtw89_phy_write32_set(rtwdev, R_RXCCA, B_RXCCA_DIS); ++ rtw89_phy_write32_idx(rtwdev, R_RSTB_ASYNC, B_RSTB_ASYNC_ALL, 1, idx); ++ ++ rtw8852b_start_pmac_tx(rtwdev, tx_info, idx); ++} ++ ++void rtw8852b_bb_set_pmac_pkt_tx(struct rtw89_dev *rtwdev, u8 enable, ++ u16 tx_cnt, u16 period, u16 tx_time, ++ enum rtw89_phy_idx idx) ++{ ++ struct rtw8852b_bb_pmac_info tx_info = {0}; ++ ++ tx_info.en_pmac_tx = enable; ++ tx_info.is_cck = 0; ++ tx_info.mode = PKTS_TX; ++ tx_info.tx_cnt = tx_cnt; ++ tx_info.period = period; ++ tx_info.tx_time = tx_time; ++ ++ rtw8852b_bb_set_pmac_tx(rtwdev, &tx_info, idx); ++} ++ ++void rtw8852b_bb_set_power(struct rtw89_dev *rtwdev, s16 pwr_dbm, ++ enum rtw89_phy_idx idx) ++{ ++ rtw89_debug(rtwdev, RTW89_DBG_TSSI, "PMAC CFG Tx PWR = %d", pwr_dbm); ++ ++ rtw89_phy_write32_idx(rtwdev, R_MAC_SEL, B_MAC_SEL_PWR_EN, 1, idx); ++ rtw89_phy_write32_idx(rtwdev, R_TXPWR, B_TXPWR_MSK, pwr_dbm, idx); ++} ++ ++void rtw8852b_bb_cfg_tx_path(struct rtw89_dev *rtwdev, u8 tx_path) ++{ ++ rtw89_phy_write32_idx(rtwdev, R_MAC_SEL, B_MAC_SEL_MOD, 7, RTW89_PHY_0); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_TSSI, "PMAC CFG Tx Path = %d", tx_path); ++ ++ if (tx_path == RF_PATH_A) { ++ rtw89_phy_write32_mask(rtwdev, R_TXPATH_SEL, B_TXPATH_SEL_MSK, 1); ++ rtw89_phy_write32_mask(rtwdev, R_TXNSS_MAP, B_TXNSS_MAP_MSK, 0); ++ } else if (tx_path == RF_PATH_B) { ++ rtw89_phy_write32_mask(rtwdev, R_TXPATH_SEL, B_TXPATH_SEL_MSK, 2); ++ rtw89_phy_write32_mask(rtwdev, R_TXNSS_MAP, B_TXNSS_MAP_MSK, 0); ++ } else if (tx_path == RF_PATH_AB) { ++ rtw89_phy_write32_mask(rtwdev, R_TXPATH_SEL, B_TXPATH_SEL_MSK, 3); ++ rtw89_phy_write32_mask(rtwdev, R_TXNSS_MAP, B_TXNSS_MAP_MSK, 4); ++ } else { ++ rtw89_debug(rtwdev, RTW89_DBG_TSSI, "Error Tx Path"); ++ } ++} ++ ++void rtw8852b_bb_tx_mode_switch(struct rtw89_dev *rtwdev, ++ enum rtw89_phy_idx idx, u8 mode) ++{ ++ if (mode != 0) ++ return; ++ ++ rtw89_debug(rtwdev, RTW89_DBG_TSSI, "Tx mode switch"); ++ ++ rtw89_phy_write32_idx(rtwdev, R_PMAC_GNT, B_PMAC_GNT_TXEN, 0, idx); ++ rtw89_phy_write32_idx(rtwdev, R_PMAC_GNT, B_PMAC_GNT_RXEN, 0, idx); ++ rtw89_phy_write32_idx(rtwdev, R_PMAC_RX_CFG1, B_PMAC_OPT1_MSK, 0, idx); ++ rtw89_phy_write32_idx(rtwdev, R_PMAC_RXMOD, B_PMAC_RXMOD_MSK, 0, idx); ++ rtw89_phy_write32_idx(rtwdev, R_MAC_SEL, B_MAC_SEL_DPD_EN, 0, idx); ++ rtw89_phy_write32_idx(rtwdev, R_MAC_SEL, B_MAC_SEL_MOD, 0, idx); ++ rtw89_phy_write32_idx(rtwdev, R_MAC_SEL, B_MAC_SEL_PWR_EN, 0, idx); ++} ++ ++void rtw8852b_bb_backup_tssi(struct rtw89_dev *rtwdev, enum rtw89_phy_idx idx, ++ struct rtw8852b_bb_tssi_bak *bak) ++{ ++ s32 tmp; ++ ++ bak->tx_path = rtw89_phy_read32_idx(rtwdev, R_TXPATH_SEL, B_TXPATH_SEL_MSK, idx); ++ bak->rx_path = rtw89_phy_read32_idx(rtwdev, R_CHBW_MOD_V1, B_ANT_RX_SEG0, idx); ++ bak->p0_rfmode = rtw89_phy_read32_idx(rtwdev, R_P0_RFMODE, MASKDWORD, idx); ++ bak->p0_rfmode_ftm = rtw89_phy_read32_idx(rtwdev, R_P0_RFMODE_FTM_RX, MASKDWORD, idx); ++ bak->p1_rfmode = rtw89_phy_read32_idx(rtwdev, R_P1_RFMODE, MASKDWORD, idx); ++ bak->p1_rfmode_ftm = rtw89_phy_read32_idx(rtwdev, R_P1_RFMODE_FTM_RX, MASKDWORD, idx); ++ tmp = rtw89_phy_read32_idx(rtwdev, R_TXPWR, B_TXPWR_MSK, idx); ++ bak->tx_pwr = sign_extend32(tmp, 8); ++} ++ ++void rtw8852b_bb_restore_tssi(struct rtw89_dev *rtwdev, enum rtw89_phy_idx idx, ++ const struct rtw8852b_bb_tssi_bak *bak) ++{ ++ rtw89_phy_write32_idx(rtwdev, R_TXPATH_SEL, B_TXPATH_SEL_MSK, bak->tx_path, idx); ++ if (bak->tx_path == RF_AB) ++ rtw89_phy_write32_mask(rtwdev, R_TXNSS_MAP, B_TXNSS_MAP_MSK, 0x4); ++ else ++ rtw89_phy_write32_mask(rtwdev, R_TXNSS_MAP, B_TXNSS_MAP_MSK, 0x0); ++ rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD_V1, B_ANT_RX_SEG0, bak->rx_path, idx); ++ rtw89_phy_write32_idx(rtwdev, R_MAC_SEL, B_MAC_SEL_PWR_EN, 1, idx); ++ rtw89_phy_write32_idx(rtwdev, R_P0_RFMODE, MASKDWORD, bak->p0_rfmode, idx); ++ rtw89_phy_write32_idx(rtwdev, R_P0_RFMODE_FTM_RX, MASKDWORD, bak->p0_rfmode_ftm, idx); ++ rtw89_phy_write32_idx(rtwdev, R_P1_RFMODE, MASKDWORD, bak->p1_rfmode, idx); ++ rtw89_phy_write32_idx(rtwdev, R_P1_RFMODE_FTM_RX, MASKDWORD, bak->p1_rfmode_ftm, idx); ++ rtw89_phy_write32_idx(rtwdev, R_TXPWR, B_TXPWR_MSK, bak->tx_pwr, idx); ++} ++ ++static void rtw8852b_bb_ctrl_btc_preagc(struct rtw89_dev *rtwdev, bool bt_en) ++{ ++ rtw89_phy_write_reg3_tbl(rtwdev, bt_en ? &rtw8852b_btc_preagc_en_defs_tbl : ++ &rtw8852b_btc_preagc_dis_defs_tbl); ++} ++ ++static void rtw8852b_ctrl_btg(struct rtw89_dev *rtwdev, bool btg) ++{ ++ if (btg) { ++ rtw89_phy_write32_mask(rtwdev, R_PATH0_BT_SHARE_V1, ++ B_PATH0_BT_SHARE_V1, 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_PATH0_BTG_PATH_V1, ++ B_PATH0_BTG_PATH_V1, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_PATH1_G_LNA6_OP1DB_V1, ++ B_PATH1_G_LNA6_OP1DB_V1, 0x20); ++ rtw89_phy_write32_mask(rtwdev, R_PATH1_G_TIA0_LNA6_OP1DB_V1, ++ B_PATH1_G_TIA0_LNA6_OP1DB_V1, 0x30); ++ rtw89_phy_write32_mask(rtwdev, R_PATH1_BT_SHARE_V1, ++ B_PATH1_BT_SHARE_V1, 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_PATH1_BTG_PATH_V1, ++ B_PATH1_BTG_PATH_V1, 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_PMAC_GNT, B_PMAC_GNT_P1, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_CHBW_MOD_V1, B_BT_SHARE, 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_FC0_BW_V1, B_ANT_RX_BT_SEG0, 0x2); ++ rtw89_phy_write32_mask(rtwdev, R_BT_DYN_DC_EST_EN_V1, ++ B_BT_DYN_DC_EST_EN_MSK, 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_GNT_BT_WGT_EN, B_GNT_BT_WGT_EN, 0x1); ++ } else { ++ rtw89_phy_write32_mask(rtwdev, R_PATH0_BT_SHARE_V1, ++ B_PATH0_BT_SHARE_V1, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_PATH0_BTG_PATH_V1, ++ B_PATH0_BTG_PATH_V1, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_PATH1_G_LNA6_OP1DB_V1, ++ B_PATH1_G_LNA6_OP1DB_V1, 0x1a); ++ rtw89_phy_write32_mask(rtwdev, R_PATH1_G_TIA0_LNA6_OP1DB_V1, ++ B_PATH1_G_TIA0_LNA6_OP1DB_V1, 0x2a); ++ rtw89_phy_write32_mask(rtwdev, R_PATH1_BT_SHARE_V1, ++ B_PATH1_BT_SHARE_V1, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_PATH1_BTG_PATH_V1, ++ B_PATH1_BTG_PATH_V1, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_PMAC_GNT, B_PMAC_GNT_P1, 0xc); ++ rtw89_phy_write32_mask(rtwdev, R_CHBW_MOD_V1, B_BT_SHARE, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_FC0_BW_V1, B_ANT_RX_BT_SEG0, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_BT_DYN_DC_EST_EN_V1, ++ B_BT_DYN_DC_EST_EN_MSK, 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_GNT_BT_WGT_EN, B_GNT_BT_WGT_EN, 0x0); ++ } ++} ++ ++void rtw8852b_bb_ctrl_rx_path(struct rtw89_dev *rtwdev, ++ enum rtw89_rf_path_bit rx_path) ++{ ++ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); ++ u32 rst_mask0; ++ u32 rst_mask1; ++ ++ if (rx_path == RF_A) { ++ rtw89_phy_write32_mask(rtwdev, R_CHBW_MOD_V1, B_ANT_RX_SEG0, 1); ++ rtw89_phy_write32_mask(rtwdev, R_FC0_BW_V1, B_ANT_RX_1RCCA_SEG0, 1); ++ rtw89_phy_write32_mask(rtwdev, R_FC0_BW_V1, B_ANT_RX_1RCCA_SEG1, 1); ++ rtw89_phy_write32_mask(rtwdev, R_RXHT_MCS_LIMIT, B_RXHT_MCS_LIMIT, 0); ++ rtw89_phy_write32_mask(rtwdev, R_RXVHT_MCS_LIMIT, B_RXVHT_MCS_LIMIT, 0); ++ rtw89_phy_write32_mask(rtwdev, R_RXHE, B_RXHE_USER_MAX, 4); ++ rtw89_phy_write32_mask(rtwdev, R_RXHE, B_RXHE_MAX_NSS, 0); ++ rtw89_phy_write32_mask(rtwdev, R_RXHE, B_RXHETB_MAX_NSS, 0); ++ } else if (rx_path == RF_B) { ++ rtw89_phy_write32_mask(rtwdev, R_CHBW_MOD_V1, B_ANT_RX_SEG0, 2); ++ rtw89_phy_write32_mask(rtwdev, R_FC0_BW_V1, B_ANT_RX_1RCCA_SEG0, 2); ++ rtw89_phy_write32_mask(rtwdev, R_FC0_BW_V1, B_ANT_RX_1RCCA_SEG1, 2); ++ rtw89_phy_write32_mask(rtwdev, R_RXHT_MCS_LIMIT, B_RXHT_MCS_LIMIT, 0); ++ rtw89_phy_write32_mask(rtwdev, R_RXVHT_MCS_LIMIT, B_RXVHT_MCS_LIMIT, 0); ++ rtw89_phy_write32_mask(rtwdev, R_RXHE, B_RXHE_USER_MAX, 4); ++ rtw89_phy_write32_mask(rtwdev, R_RXHE, B_RXHE_MAX_NSS, 0); ++ rtw89_phy_write32_mask(rtwdev, R_RXHE, B_RXHETB_MAX_NSS, 0); ++ } else if (rx_path == RF_AB) { ++ rtw89_phy_write32_mask(rtwdev, R_CHBW_MOD_V1, B_ANT_RX_SEG0, 3); ++ rtw89_phy_write32_mask(rtwdev, R_FC0_BW_V1, B_ANT_RX_1RCCA_SEG0, 3); ++ rtw89_phy_write32_mask(rtwdev, R_FC0_BW_V1, B_ANT_RX_1RCCA_SEG1, 3); ++ rtw89_phy_write32_mask(rtwdev, R_RXHT_MCS_LIMIT, B_RXHT_MCS_LIMIT, 1); ++ rtw89_phy_write32_mask(rtwdev, R_RXVHT_MCS_LIMIT, B_RXVHT_MCS_LIMIT, 1); ++ rtw89_phy_write32_mask(rtwdev, R_RXHE, B_RXHE_USER_MAX, 4); ++ rtw89_phy_write32_mask(rtwdev, R_RXHE, B_RXHE_MAX_NSS, 1); ++ rtw89_phy_write32_mask(rtwdev, R_RXHE, B_RXHETB_MAX_NSS, 1); ++ } ++ ++ rtw8852b_set_gain_offset(rtwdev, chan->subband_type, RTW89_PHY_0); ++ ++ if (chan->band_type == RTW89_BAND_2G && ++ (rx_path == RF_B || rx_path == RF_AB)) ++ rtw8852b_ctrl_btg(rtwdev, true); ++ else ++ rtw8852b_ctrl_btg(rtwdev, false); ++ ++ rst_mask0 = B_P0_TXPW_RSTB_MANON | B_P0_TXPW_RSTB_TSSI; ++ rst_mask1 = B_P1_TXPW_RSTB_MANON | B_P1_TXPW_RSTB_TSSI; ++ if (rx_path == RF_A) { ++ rtw89_phy_write32_mask(rtwdev, R_P0_TXPW_RSTB, rst_mask0, 1); ++ rtw89_phy_write32_mask(rtwdev, R_P0_TXPW_RSTB, rst_mask0, 3); ++ } else { ++ rtw89_phy_write32_mask(rtwdev, R_P1_TXPW_RSTB, rst_mask1, 1); ++ rtw89_phy_write32_mask(rtwdev, R_P1_TXPW_RSTB, rst_mask1, 3); ++ } ++} ++ ++static void rtw8852b_bb_ctrl_rf_mode_rx_path(struct rtw89_dev *rtwdev, ++ enum rtw89_rf_path_bit rx_path) ++{ ++ if (rx_path == RF_A) { ++ rtw89_phy_write32_mask(rtwdev, R_P0_RFMODE, ++ B_P0_RFMODE_ORI_TXRX_FTM_TX, 0x1233312); ++ rtw89_phy_write32_mask(rtwdev, R_P0_RFMODE_FTM_RX, ++ B_P0_RFMODE_FTM_RX, 0x333); ++ rtw89_phy_write32_mask(rtwdev, R_P1_RFMODE, ++ B_P1_RFMODE_ORI_TXRX_FTM_TX, 0x1111111); ++ rtw89_phy_write32_mask(rtwdev, R_P1_RFMODE_FTM_RX, ++ B_P1_RFMODE_FTM_RX, 0x111); ++ } else if (rx_path == RF_B) { ++ rtw89_phy_write32_mask(rtwdev, R_P0_RFMODE, ++ B_P0_RFMODE_ORI_TXRX_FTM_TX, 0x1111111); ++ rtw89_phy_write32_mask(rtwdev, R_P0_RFMODE_FTM_RX, ++ B_P0_RFMODE_FTM_RX, 0x111); ++ rtw89_phy_write32_mask(rtwdev, R_P1_RFMODE, ++ B_P1_RFMODE_ORI_TXRX_FTM_TX, 0x1233312); ++ rtw89_phy_write32_mask(rtwdev, R_P1_RFMODE_FTM_RX, ++ B_P1_RFMODE_FTM_RX, 0x333); ++ } else if (rx_path == RF_AB) { ++ rtw89_phy_write32_mask(rtwdev, R_P0_RFMODE, ++ B_P0_RFMODE_ORI_TXRX_FTM_TX, 0x1233312); ++ rtw89_phy_write32_mask(rtwdev, R_P0_RFMODE_FTM_RX, ++ B_P0_RFMODE_FTM_RX, 0x333); ++ rtw89_phy_write32_mask(rtwdev, R_P1_RFMODE, ++ B_P1_RFMODE_ORI_TXRX_FTM_TX, 0x1233312); ++ rtw89_phy_write32_mask(rtwdev, R_P1_RFMODE_FTM_RX, ++ B_P1_RFMODE_FTM_RX, 0x333); ++ } ++} ++ ++static void rtw8852b_bb_cfg_txrx_path(struct rtw89_dev *rtwdev) ++{ ++ struct rtw89_hal *hal = &rtwdev->hal; ++ enum rtw89_rf_path_bit rx_path = hal->antenna_rx ? hal->antenna_rx : RF_AB; ++ ++ rtw8852b_bb_ctrl_rx_path(rtwdev, rx_path); ++ rtw8852b_bb_ctrl_rf_mode_rx_path(rtwdev, rx_path); ++ ++ if (rtwdev->hal.rx_nss == 1) { ++ rtw89_phy_write32_mask(rtwdev, R_RXHT_MCS_LIMIT, B_RXHT_MCS_LIMIT, 0); ++ rtw89_phy_write32_mask(rtwdev, R_RXVHT_MCS_LIMIT, B_RXVHT_MCS_LIMIT, 0); ++ rtw89_phy_write32_mask(rtwdev, R_RXHE, B_RXHE_MAX_NSS, 0); ++ rtw89_phy_write32_mask(rtwdev, R_RXHE, B_RXHETB_MAX_NSS, 0); ++ } else { ++ rtw89_phy_write32_mask(rtwdev, R_RXHT_MCS_LIMIT, B_RXHT_MCS_LIMIT, 1); ++ rtw89_phy_write32_mask(rtwdev, R_RXVHT_MCS_LIMIT, B_RXVHT_MCS_LIMIT, 1); ++ rtw89_phy_write32_mask(rtwdev, R_RXHE, B_RXHE_MAX_NSS, 1); ++ rtw89_phy_write32_mask(rtwdev, R_RXHE, B_RXHETB_MAX_NSS, 1); ++ } ++ ++ rtw89_phy_write32_idx(rtwdev, R_MAC_SEL, B_MAC_SEL_MOD, 0x0, RTW89_PHY_0); ++} ++ ++static u8 rtw8852b_get_thermal(struct rtw89_dev *rtwdev, enum rtw89_rf_path rf_path) ++{ ++ if (rtwdev->is_tssi_mode[rf_path]) { ++ u32 addr = 0x1c10 + (rf_path << 13); ++ ++ return rtw89_phy_read32_mask(rtwdev, addr, 0x3F000000); ++ } ++ ++ rtw89_write_rf(rtwdev, rf_path, RR_TM, RR_TM_TRI, 0x1); ++ rtw89_write_rf(rtwdev, rf_path, RR_TM, RR_TM_TRI, 0x0); ++ rtw89_write_rf(rtwdev, rf_path, RR_TM, RR_TM_TRI, 0x1); ++ ++ fsleep(200); ++ ++ return rtw89_read_rf(rtwdev, rf_path, RR_TM, RR_TM_VAL); ++} ++ ++static void rtw8852b_btc_set_rfe(struct rtw89_dev *rtwdev) ++{ ++ struct rtw89_btc *btc = &rtwdev->btc; ++ struct rtw89_btc_module *module = &btc->mdinfo; ++ ++ module->rfe_type = rtwdev->efuse.rfe_type; ++ module->cv = rtwdev->hal.cv; ++ module->bt_solo = 0; ++ module->switch_type = BTC_SWITCH_INTERNAL; ++ ++ if (module->rfe_type > 0) ++ module->ant.num = module->rfe_type % 2 ? 2 : 3; ++ else ++ module->ant.num = 2; ++ ++ module->ant.diversity = 0; ++ module->ant.isolation = 10; ++ ++ if (module->ant.num == 3) { ++ module->ant.type = BTC_ANT_DEDICATED; ++ module->bt_pos = BTC_BT_ALONE; ++ } else { ++ module->ant.type = BTC_ANT_SHARED; ++ module->bt_pos = BTC_BT_BTG; ++ } ++} ++ ++static ++void rtw8852b_set_trx_mask(struct rtw89_dev *rtwdev, u8 path, u8 group, u32 val) ++{ ++ rtw89_write_rf(rtwdev, path, RR_LUTWE, RFREG_MASK, 0x20000); ++ rtw89_write_rf(rtwdev, path, RR_LUTWA, RFREG_MASK, group); ++ rtw89_write_rf(rtwdev, path, RR_LUTWD0, RFREG_MASK, val); ++ rtw89_write_rf(rtwdev, path, RR_LUTWE, RFREG_MASK, 0x0); ++} ++ ++static void rtw8852b_btc_init_cfg(struct rtw89_dev *rtwdev) ++{ ++ struct rtw89_btc *btc = &rtwdev->btc; ++ struct rtw89_btc_module *module = &btc->mdinfo; ++ const struct rtw89_chip_info *chip = rtwdev->chip; ++ const struct rtw89_mac_ax_coex coex_params = { ++ .pta_mode = RTW89_MAC_AX_COEX_RTK_MODE, ++ .direction = RTW89_MAC_AX_COEX_INNER, ++ }; ++ ++ /* PTA init */ ++ rtw89_mac_coex_init(rtwdev, &coex_params); ++ ++ /* set WL Tx response = Hi-Pri */ ++ chip->ops->btc_set_wl_pri(rtwdev, BTC_PRI_MASK_TX_RESP, true); ++ chip->ops->btc_set_wl_pri(rtwdev, BTC_PRI_MASK_BEACON, true); ++ ++ /* set rf gnt debug off */ ++ rtw89_write_rf(rtwdev, RF_PATH_A, RR_WLSEL, RFREG_MASK, 0x0); ++ rtw89_write_rf(rtwdev, RF_PATH_B, RR_WLSEL, RFREG_MASK, 0x0); ++ ++ /* set WL Tx thru in TRX mask table if GNT_WL = 0 && BT_S1 = ss group */ ++ if (module->ant.type == BTC_ANT_SHARED) { ++ rtw8852b_set_trx_mask(rtwdev, RF_PATH_A, BTC_BT_SS_GROUP, 0x5ff); ++ rtw8852b_set_trx_mask(rtwdev, RF_PATH_B, BTC_BT_SS_GROUP, 0x5ff); ++ /* set path-A(S0) Tx/Rx no-mask if GNT_WL=0 && BT_S1=tx group */ ++ rtw8852b_set_trx_mask(rtwdev, RF_PATH_A, BTC_BT_TX_GROUP, 0x5ff); ++ rtw8852b_set_trx_mask(rtwdev, RF_PATH_B, BTC_BT_TX_GROUP, 0x55f); ++ } else { /* set WL Tx stb if GNT_WL = 0 && BT_S1 = ss group for 3-ant */ ++ rtw8852b_set_trx_mask(rtwdev, RF_PATH_A, BTC_BT_SS_GROUP, 0x5df); ++ rtw8852b_set_trx_mask(rtwdev, RF_PATH_B, BTC_BT_SS_GROUP, 0x5df); ++ rtw8852b_set_trx_mask(rtwdev, RF_PATH_A, BTC_BT_TX_GROUP, 0x5ff); ++ rtw8852b_set_trx_mask(rtwdev, RF_PATH_B, BTC_BT_TX_GROUP, 0x5ff); ++ } ++ ++ /* set PTA break table */ ++ rtw89_write32(rtwdev, R_BTC_BREAK_TABLE, BTC_BREAK_PARAM); ++ ++ /* enable BT counter 0xda40[16,2] = 2b'11 */ ++ rtw89_write32_set(rtwdev, R_AX_CSR_MODE, B_AX_BT_CNT_RST | B_AX_STATIS_BT_EN); ++ btc->cx.wl.status.map.init_ok = true; ++} ++ ++static ++void rtw8852b_btc_set_wl_pri(struct rtw89_dev *rtwdev, u8 map, bool state) ++{ ++ u32 bitmap; ++ u32 reg; ++ ++ switch (map) { ++ case BTC_PRI_MASK_TX_RESP: ++ reg = R_BTC_BT_COEX_MSK_TABLE; ++ bitmap = B_BTC_PRI_MASK_TX_RESP_V1; ++ break; ++ case BTC_PRI_MASK_BEACON: ++ reg = R_AX_WL_PRI_MSK; ++ bitmap = B_AX_PTA_WL_PRI_MASK_BCNQ; ++ break; ++ case BTC_PRI_MASK_RX_CCK: ++ reg = R_BTC_BT_COEX_MSK_TABLE; ++ bitmap = B_BTC_PRI_MASK_RXCCK_V1; ++ break; ++ default: ++ return; ++ } ++ ++ if (state) ++ rtw89_write32_set(rtwdev, reg, bitmap); ++ else ++ rtw89_write32_clr(rtwdev, reg, bitmap); ++} ++ ++union rtw8852b_btc_wl_txpwr_ctrl { ++ u32 txpwr_val; ++ struct { ++ union { ++ u16 ctrl_all_time; ++ struct { ++ s16 data:9; ++ u16 rsvd:6; ++ u16 flag:1; ++ } all_time; ++ }; ++ union { ++ u16 ctrl_gnt_bt; ++ struct { ++ s16 data:9; ++ u16 rsvd:7; ++ } gnt_bt; ++ }; ++ }; ++} __packed; ++ ++static void ++rtw8852b_btc_set_wl_txpwr_ctrl(struct rtw89_dev *rtwdev, u32 txpwr_val) ++{ ++ union rtw8852b_btc_wl_txpwr_ctrl arg = { .txpwr_val = txpwr_val }; ++ s32 val; ++ ++#define __write_ctrl(_reg, _msk, _val, _en, _cond) \ ++do { \ ++ u32 _wrt = FIELD_PREP(_msk, _val); \ ++ BUILD_BUG_ON(!!(_msk & _en)); \ ++ if (_cond) \ ++ _wrt |= _en; \ ++ else \ ++ _wrt &= ~_en; \ ++ rtw89_mac_txpwr_write32_mask(rtwdev, RTW89_PHY_0, _reg, \ ++ _msk | _en, _wrt); \ ++} while (0) ++ ++ switch (arg.ctrl_all_time) { ++ case 0xffff: ++ val = 0; ++ break; ++ default: ++ val = arg.all_time.data; ++ break; ++ } ++ ++ __write_ctrl(R_AX_PWR_RATE_CTRL, B_AX_FORCE_PWR_BY_RATE_VALUE_MASK, ++ val, B_AX_FORCE_PWR_BY_RATE_EN, ++ arg.ctrl_all_time != 0xffff); ++ ++ switch (arg.ctrl_gnt_bt) { ++ case 0xffff: ++ val = 0; ++ break; ++ default: ++ val = arg.gnt_bt.data; ++ break; ++ } ++ ++ __write_ctrl(R_AX_PWR_COEXT_CTRL, B_AX_TXAGC_BT_MASK, val, ++ B_AX_TXAGC_BT_EN, arg.ctrl_gnt_bt != 0xffff); ++ ++#undef __write_ctrl ++} ++ ++static ++s8 rtw8852b_btc_get_bt_rssi(struct rtw89_dev *rtwdev, s8 val) ++{ ++ return clamp_t(s8, val, -100, 0) + 100; ++} ++ ++static ++void rtw8852b_btc_update_bt_cnt(struct rtw89_dev *rtwdev) ++{ ++ /* Feature move to firmware */ ++} ++ ++static void rtw8852b_btc_wl_s1_standby(struct rtw89_dev *rtwdev, bool state) ++{ ++ rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWE, RFREG_MASK, 0x80000); ++ rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWA, RFREG_MASK, 0x1); ++ rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWD1, RFREG_MASK, 0x31); ++ ++ /* set WL standby = Rx for GNT_BT_Tx = 1->0 settle issue */ ++ if (state) ++ rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWD0, RFREG_MASK, 0x579); ++ else ++ rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWD0, RFREG_MASK, 0x20); ++ ++ rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWE, RFREG_MASK, 0x0); ++} ++ ++static void rtw8852b_btc_set_wl_rx_gain(struct rtw89_dev *rtwdev, u32 level) ++{ ++} ++ ++static void rtw8852b_fill_freq_with_ppdu(struct rtw89_dev *rtwdev, ++ struct rtw89_rx_phy_ppdu *phy_ppdu, ++ struct ieee80211_rx_status *status) ++{ ++ u16 chan = phy_ppdu->chan_idx; ++ u8 band; ++ ++ if (chan == 0) ++ return; ++ ++ band = chan <= 14 ? NL80211_BAND_2GHZ : NL80211_BAND_5GHZ; ++ status->freq = ieee80211_channel_to_frequency(chan, band); ++ status->band = band; ++} ++ ++static void rtw8852b_query_ppdu(struct rtw89_dev *rtwdev, ++ struct rtw89_rx_phy_ppdu *phy_ppdu, ++ struct ieee80211_rx_status *status) ++{ ++ u8 path; ++ u8 *rx_power = phy_ppdu->rssi; ++ ++ status->signal = RTW89_RSSI_RAW_TO_DBM(max(rx_power[RF_PATH_A], rx_power[RF_PATH_B])); ++ for (path = 0; path < rtwdev->chip->rf_path_num; path++) { ++ status->chains |= BIT(path); ++ status->chain_signal[path] = RTW89_RSSI_RAW_TO_DBM(rx_power[path]); ++ } ++ if (phy_ppdu->valid) ++ rtw8852b_fill_freq_with_ppdu(rtwdev, phy_ppdu, status); ++} ++ + static int rtw8852b_mac_enable_bb_rf(struct rtw89_dev *rtwdev) + { + int ret; +@@ -75,13 +2381,150 @@ static int rtw8852b_mac_disable_bb_rf(st + static const struct rtw89_chip_ops rtw8852b_chip_ops = { + .enable_bb_rf = rtw8852b_mac_enable_bb_rf, + .disable_bb_rf = rtw8852b_mac_disable_bb_rf, ++ .bb_reset = rtw8852b_bb_reset, ++ .bb_sethw = rtw8852b_bb_sethw, ++ .read_rf = rtw89_phy_read_rf_v1, ++ .write_rf = rtw89_phy_write_rf_v1, ++ .set_channel = rtw8852b_set_channel, ++ .set_channel_help = rtw8852b_set_channel_help, ++ .read_efuse = rtw8852b_read_efuse, ++ .read_phycap = rtw8852b_read_phycap, ++ .fem_setup = NULL, ++ .rfk_init = rtw8852b_rfk_init, ++ .rfk_channel = rtw8852b_rfk_channel, ++ .rfk_band_changed = rtw8852b_rfk_band_changed, ++ .rfk_scan = rtw8852b_rfk_scan, ++ .rfk_track = rtw8852b_rfk_track, ++ .power_trim = rtw8852b_power_trim, ++ .set_txpwr = rtw8852b_set_txpwr, ++ .set_txpwr_ctrl = rtw8852b_set_txpwr_ctrl, ++ .init_txpwr_unit = rtw8852b_init_txpwr_unit, ++ .get_thermal = rtw8852b_get_thermal, ++ .ctrl_btg = rtw8852b_ctrl_btg, ++ .query_ppdu = rtw8852b_query_ppdu, ++ .bb_ctrl_btc_preagc = rtw8852b_bb_ctrl_btc_preagc, ++ .cfg_txrx_path = rtw8852b_bb_cfg_txrx_path, ++ .set_txpwr_ul_tb_offset = rtw8852b_set_txpwr_ul_tb_offset, ++ .pwr_on_func = rtw8852b_pwr_on_func, ++ .pwr_off_func = rtw8852b_pwr_off_func, ++ .fill_txdesc = rtw89_core_fill_txdesc, ++ .fill_txdesc_fwcmd = rtw89_core_fill_txdesc, ++ .cfg_ctrl_path = rtw89_mac_cfg_ctrl_path, ++ .mac_cfg_gnt = rtw89_mac_cfg_gnt, ++ .stop_sch_tx = rtw89_mac_stop_sch_tx, ++ .resume_sch_tx = rtw89_mac_resume_sch_tx, ++ .h2c_dctl_sec_cam = NULL, ++ ++ .btc_set_rfe = rtw8852b_btc_set_rfe, ++ .btc_init_cfg = rtw8852b_btc_init_cfg, ++ .btc_set_wl_pri = rtw8852b_btc_set_wl_pri, ++ .btc_set_wl_txpwr_ctrl = rtw8852b_btc_set_wl_txpwr_ctrl, ++ .btc_get_bt_rssi = rtw8852b_btc_get_bt_rssi, ++ .btc_update_bt_cnt = rtw8852b_btc_update_bt_cnt, ++ .btc_wl_s1_standby = rtw8852b_btc_wl_s1_standby, ++ .btc_set_wl_rx_gain = rtw8852b_btc_set_wl_rx_gain, ++ .btc_set_policy = rtw89_btc_set_policy, + }; + + const struct rtw89_chip_info rtw8852b_chip_info = { + .chip_id = RTL8852B, ++ .ops = &rtw8852b_chip_ops, ++ .fw_name = "rtw89/rtw8852b_fw.bin", + .fifo_size = 196608, + .dle_scc_rsvd_size = 98304, ++ .max_amsdu_limit = 3500, ++ .dis_2g_40m_ul_ofdma = true, ++ .rsvd_ple_ofst = 0x2f800, ++ .hfc_param_ini = rtw8852b_hfc_param_ini_pcie, + .dle_mem = rtw8852b_dle_mem_pcie, ++ .rf_base_addr = {0xe000, 0xf000}, ++ .pwr_on_seq = NULL, ++ .pwr_off_seq = NULL, ++ .bb_table = &rtw89_8852b_phy_bb_table, ++ .bb_gain_table = &rtw89_8852b_phy_bb_gain_table, ++ .rf_table = {&rtw89_8852b_phy_radioa_table, ++ &rtw89_8852b_phy_radiob_table,}, ++ .nctl_table = &rtw89_8852b_phy_nctl_table, ++ .byr_table = &rtw89_8852b_byr_table, ++ .txpwr_lmt_2g = &rtw89_8852b_txpwr_lmt_2g, ++ .txpwr_lmt_5g = &rtw89_8852b_txpwr_lmt_5g, ++ .txpwr_lmt_ru_2g = &rtw89_8852b_txpwr_lmt_ru_2g, ++ .txpwr_lmt_ru_5g = &rtw89_8852b_txpwr_lmt_ru_5g, ++ .txpwr_factor_rf = 2, ++ .txpwr_factor_mac = 1, ++ .dig_table = NULL, ++ .dig_regs = &rtw8852b_dig_regs, ++ .tssi_dbw_table = NULL, ++ .support_chanctx_num = 0, ++ .support_bands = BIT(NL80211_BAND_2GHZ) | ++ BIT(NL80211_BAND_5GHZ), ++ .support_bw160 = false, ++ .support_ul_tb_ctrl = true, ++ .hw_sec_hdr = false, ++ .rf_path_num = 2, ++ .tx_nss = 2, ++ .rx_nss = 2, ++ .acam_num = 128, ++ .bcam_num = 10, ++ .scam_num = 128, ++ .bacam_num = 2, ++ .bacam_dynamic_num = 4, ++ .bacam_v1 = false, ++ .sec_ctrl_efuse_size = 4, ++ .physical_efuse_size = 1216, ++ .logical_efuse_size = 2048, ++ .limit_efuse_size = 1280, ++ .dav_phy_efuse_size = 96, ++ .dav_log_efuse_size = 16, ++ .phycap_addr = 0x580, ++ .phycap_size = 128, ++ .para_ver = 0, ++ .wlcx_desired = 0x05050000, ++ .btcx_desired = 0x5, ++ .scbd = 0x1, ++ .mailbox = 0x1, ++ .btc_fwinfo_buf = 1024, ++ ++ .fcxbtcrpt_ver = 1, ++ .fcxtdma_ver = 1, ++ .fcxslots_ver = 1, ++ .fcxcysta_ver = 2, ++ .fcxstep_ver = 2, ++ .fcxnullsta_ver = 1, ++ .fcxmreg_ver = 1, ++ .fcxgpiodbg_ver = 1, ++ .fcxbtver_ver = 1, ++ .fcxbtscan_ver = 1, ++ .fcxbtafh_ver = 1, ++ .fcxbtdevinfo_ver = 1, ++ .afh_guard_ch = 6, ++ .wl_rssi_thres = rtw89_btc_8852b_wl_rssi_thres, ++ .bt_rssi_thres = rtw89_btc_8852b_bt_rssi_thres, ++ .rssi_tol = 2, ++ .mon_reg_num = ARRAY_SIZE(rtw89_btc_8852b_mon_reg), ++ .mon_reg = rtw89_btc_8852b_mon_reg, ++ .rf_para_ulink_num = ARRAY_SIZE(rtw89_btc_8852b_rf_ul), ++ .rf_para_ulink = rtw89_btc_8852b_rf_ul, ++ .rf_para_dlink_num = ARRAY_SIZE(rtw89_btc_8852b_rf_dl), ++ .rf_para_dlink = rtw89_btc_8852b_rf_dl, ++ .ps_mode_supported = BIT(RTW89_PS_MODE_RFOFF) | ++ BIT(RTW89_PS_MODE_CLK_GATED) | ++ BIT(RTW89_PS_MODE_PWR_GATED), ++ .low_power_hci_modes = 0, ++ .h2c_cctl_func_id = H2C_FUNC_MAC_CCTLINFO_UD, ++ .hci_func_en_addr = R_AX_HCI_FUNC_EN, ++ .h2c_desc_size = sizeof(struct rtw89_txwd_body), ++ .txwd_body_size = sizeof(struct rtw89_txwd_body), ++ .h2c_ctrl_reg = R_AX_H2CREG_CTRL, ++ .h2c_regs = rtw8852b_h2c_regs, ++ .c2h_ctrl_reg = R_AX_C2HREG_CTRL, ++ .c2h_regs = rtw8852b_c2h_regs, ++ .page_regs = &rtw8852b_page_regs, ++ .cfo_src_fd = true, ++ .dcfo_comp = &rtw8852b_dcfo_comp, ++ .dcfo_comp_sft = 3, ++ .imr_info = &rtw8852b_imr_info, ++ .rrsr_cfgs = &rtw8852b_rrsr_cfgs, + .dma_ch_mask = BIT(RTW89_DMA_ACH4) | BIT(RTW89_DMA_ACH5) | + BIT(RTW89_DMA_ACH6) | BIT(RTW89_DMA_ACH7) | + BIT(RTW89_DMA_B1MG) | BIT(RTW89_DMA_B1HI), +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw89/rtw8852be.c linux-6.2/drivers/net/wireless/realtek/rtw89/rtw8852be.c +--- linux-6.1/drivers/net/wireless/realtek/rtw89/rtw8852be.c 2022-12-12 00:15:18.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw89/rtw8852be.c 2022-12-24 00:49:25.785376835 +0200 +@@ -7,18 +7,82 @@ + + #include "pci.h" + #include "reg.h" ++#include "rtw8852b.h" + + static const struct rtw89_pci_info rtw8852b_pci_info = { ++ .txbd_trunc_mode = MAC_AX_BD_TRUNC, ++ .rxbd_trunc_mode = MAC_AX_BD_TRUNC, ++ .rxbd_mode = MAC_AX_RXBD_PKT, ++ .tag_mode = MAC_AX_TAG_MULTI, ++ .tx_burst = MAC_AX_TX_BURST_2048B, ++ .rx_burst = MAC_AX_RX_BURST_128B, ++ .wd_dma_idle_intvl = MAC_AX_WD_DMA_INTVL_256NS, ++ .wd_dma_act_intvl = MAC_AX_WD_DMA_INTVL_256NS, ++ .multi_tag_num = MAC_AX_TAG_NUM_8, ++ .lbc_en = MAC_AX_PCIE_ENABLE, ++ .lbc_tmr = MAC_AX_LBC_TMR_2MS, ++ .autok_en = MAC_AX_PCIE_DISABLE, ++ .io_rcy_en = MAC_AX_PCIE_DISABLE, ++ .io_rcy_tmr = MAC_AX_IO_RCY_ANA_TMR_6MS, ++ ++ .init_cfg_reg = R_AX_PCIE_INIT_CFG1, ++ .txhci_en_bit = B_AX_TXHCI_EN, ++ .rxhci_en_bit = B_AX_RXHCI_EN, ++ .rxbd_mode_bit = B_AX_RXBD_MODE, ++ .exp_ctrl_reg = R_AX_PCIE_EXP_CTRL, ++ .max_tag_num_mask = B_AX_MAX_TAG_NUM, ++ .rxbd_rwptr_clr_reg = R_AX_RXBD_RWPTR_CLR, ++ .txbd_rwptr_clr2_reg = 0, + .dma_stop1 = {R_AX_PCIE_DMA_STOP1, B_AX_TX_STOP1_MASK_V1}, + .dma_stop2 = {0}, + .dma_busy1 = {R_AX_PCIE_DMA_BUSY1, DMA_BUSY1_CHECK_V1}, + .dma_busy2_reg = 0, + .dma_busy3_reg = R_AX_PCIE_DMA_BUSY1, + ++ .rpwm_addr = R_AX_PCIE_HRPWM, ++ .cpwm_addr = R_AX_CPWM, + .tx_dma_ch_mask = BIT(RTW89_TXCH_ACH4) | BIT(RTW89_TXCH_ACH5) | + BIT(RTW89_TXCH_ACH6) | BIT(RTW89_TXCH_ACH7) | + BIT(RTW89_TXCH_CH10) | BIT(RTW89_TXCH_CH11), ++ .bd_idx_addr_low_power = NULL, ++ .dma_addr_set = &rtw89_pci_ch_dma_addr_set, ++ ++ .ltr_set = rtw89_pci_ltr_set, ++ .fill_txaddr_info = rtw89_pci_fill_txaddr_info, ++ .config_intr_mask = rtw89_pci_config_intr_mask, ++ .enable_intr = rtw89_pci_enable_intr, ++ .disable_intr = rtw89_pci_disable_intr, ++ .recognize_intrs = rtw89_pci_recognize_intrs, ++}; ++ ++static const struct rtw89_driver_info rtw89_8852be_info = { ++ .chip = &rtw8852b_chip_info, ++ .bus = { ++ .pci = &rtw8852b_pci_info, ++ }, ++}; ++ ++static const struct pci_device_id rtw89_8852be_id_table[] = { ++ { ++ PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0xb852), ++ .driver_data = (kernel_ulong_t)&rtw89_8852be_info, ++ }, ++ { ++ PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0xb85b), ++ .driver_data = (kernel_ulong_t)&rtw89_8852be_info, ++ }, ++ {}, ++}; ++MODULE_DEVICE_TABLE(pci, rtw89_8852be_id_table); ++ ++static struct pci_driver rtw89_8852be_driver = { ++ .name = "rtw89_8852be", ++ .id_table = rtw89_8852be_id_table, ++ .probe = rtw89_pci_probe, ++ .remove = rtw89_pci_remove, ++ .driver.pm = &rtw89_pm_ops, + }; ++module_pci_driver(rtw89_8852be_driver); + + MODULE_AUTHOR("Realtek Corporation"); + MODULE_DESCRIPTION("Realtek 802.11ax wireless 8852BE driver"); +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw89/rtw8852b.h linux-6.2/drivers/net/wireless/realtek/rtw89/rtw8852b.h +--- linux-6.1/drivers/net/wireless/realtek/rtw89/rtw8852b.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw89/rtw8852b.h 2022-12-24 00:49:25.782376835 +0200 +@@ -0,0 +1,137 @@ ++/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ ++/* Copyright(c) 2019-2022 Realtek Corporation ++ */ ++ ++#ifndef __RTW89_8852B_H__ ++#define __RTW89_8852B_H__ ++ ++#include "core.h" ++ ++#define RF_PATH_NUM_8852B 2 ++#define BB_PATH_NUM_8852B 2 ++ ++enum rtw8852b_pmac_mode { ++ NONE_TEST, ++ PKTS_TX, ++ PKTS_RX, ++ CONT_TX ++}; ++ ++struct rtw8852b_u_efuse { ++ u8 rsvd[0x88]; ++ u8 mac_addr[ETH_ALEN]; ++}; ++ ++struct rtw8852b_e_efuse { ++ u8 mac_addr[ETH_ALEN]; ++}; ++ ++struct rtw8852b_tssi_offset { ++ u8 cck_tssi[TSSI_CCK_CH_GROUP_NUM]; ++ u8 bw40_tssi[TSSI_MCS_2G_CH_GROUP_NUM]; ++ u8 rsvd[7]; ++ u8 bw40_1s_tssi_5g[TSSI_MCS_5G_CH_GROUP_NUM]; ++} __packed; ++ ++struct rtw8852b_efuse { ++ u8 rsvd[0x210]; ++ struct rtw8852b_tssi_offset path_a_tssi; ++ u8 rsvd1[10]; ++ struct rtw8852b_tssi_offset path_b_tssi; ++ u8 rsvd2[94]; ++ u8 channel_plan; ++ u8 xtal_k; ++ u8 rsvd3; ++ u8 iqk_lck; ++ u8 rsvd4[5]; ++ u8 reg_setting:2; ++ u8 tx_diversity:1; ++ u8 rx_diversity:2; ++ u8 ac_mode:1; ++ u8 module_type:2; ++ u8 rsvd5; ++ u8 shared_ant:1; ++ u8 coex_type:3; ++ u8 ant_iso:1; ++ u8 radio_on_off:1; ++ u8 rsvd6:2; ++ u8 eeprom_version; ++ u8 customer_id; ++ u8 tx_bb_swing_2g; ++ u8 tx_bb_swing_5g; ++ u8 tx_cali_pwr_trk_mode; ++ u8 trx_path_selection; ++ u8 rfe_type; ++ u8 country_code[2]; ++ u8 rsvd7[3]; ++ u8 path_a_therm; ++ u8 path_b_therm; ++ u8 rsvd8[2]; ++ u8 rx_gain_2g_ofdm; ++ u8 rsvd9; ++ u8 rx_gain_2g_cck; ++ u8 rsvd10; ++ u8 rx_gain_5g_low; ++ u8 rsvd11; ++ u8 rx_gain_5g_mid; ++ u8 rsvd12; ++ u8 rx_gain_5g_high; ++ u8 rsvd13[35]; ++ u8 path_a_cck_pwr_idx[6]; ++ u8 path_a_bw40_1tx_pwr_idx[5]; ++ u8 path_a_ofdm_1tx_pwr_idx_diff:4; ++ u8 path_a_bw20_1tx_pwr_idx_diff:4; ++ u8 path_a_bw20_2tx_pwr_idx_diff:4; ++ u8 path_a_bw40_2tx_pwr_idx_diff:4; ++ u8 path_a_cck_2tx_pwr_idx_diff:4; ++ u8 path_a_ofdm_2tx_pwr_idx_diff:4; ++ u8 rsvd14[0xf2]; ++ union { ++ struct rtw8852b_u_efuse u; ++ struct rtw8852b_e_efuse e; ++ }; ++} __packed; ++ ++struct rtw8852b_bb_pmac_info { ++ u8 en_pmac_tx:1; ++ u8 is_cck:1; ++ u8 mode:3; ++ u8 rsvd:3; ++ u16 tx_cnt; ++ u16 period; ++ u16 tx_time; ++ u8 duty_cycle; ++}; ++ ++struct rtw8852b_bb_tssi_bak { ++ u8 tx_path; ++ u8 rx_path; ++ u32 p0_rfmode; ++ u32 p0_rfmode_ftm; ++ u32 p1_rfmode; ++ u32 p1_rfmode_ftm; ++ s16 tx_pwr; /* S9 */ ++}; ++ ++extern const struct rtw89_chip_info rtw8852b_chip_info; ++ ++void rtw8852b_bb_set_plcp_tx(struct rtw89_dev *rtwdev); ++void rtw8852b_bb_set_pmac_tx(struct rtw89_dev *rtwdev, ++ struct rtw8852b_bb_pmac_info *tx_info, ++ enum rtw89_phy_idx idx); ++void rtw8852b_bb_set_pmac_pkt_tx(struct rtw89_dev *rtwdev, u8 enable, ++ u16 tx_cnt, u16 period, u16 tx_time, ++ enum rtw89_phy_idx idx); ++void rtw8852b_bb_set_power(struct rtw89_dev *rtwdev, s16 pwr_dbm, ++ enum rtw89_phy_idx idx); ++void rtw8852b_bb_cfg_tx_path(struct rtw89_dev *rtwdev, u8 tx_path); ++void rtw8852b_bb_ctrl_rx_path(struct rtw89_dev *rtwdev, ++ enum rtw89_rf_path_bit rx_path); ++void rtw8852b_bb_tx_mode_switch(struct rtw89_dev *rtwdev, ++ enum rtw89_phy_idx idx, u8 mode); ++void rtw8852b_bb_backup_tssi(struct rtw89_dev *rtwdev, enum rtw89_phy_idx idx, ++ struct rtw8852b_bb_tssi_bak *bak); ++void rtw8852b_bb_restore_tssi(struct rtw89_dev *rtwdev, enum rtw89_phy_idx idx, ++ const struct rtw8852b_bb_tssi_bak *bak); ++ ++#endif +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.c linux-6.2/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.c +--- linux-6.1/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.c 2022-12-24 00:49:25.783376835 +0200 +@@ -0,0 +1,4174 @@ ++// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause ++/* Copyright(c) 2019-2022 Realtek Corporation ++ */ ++ ++#include "coex.h" ++#include "debug.h" ++#include "mac.h" ++#include "phy.h" ++#include "reg.h" ++#include "rtw8852b.h" ++#include "rtw8852b_rfk.h" ++#include "rtw8852b_rfk_table.h" ++#include "rtw8852b_table.h" ++ ++#define RTW8852B_RXDCK_VER 0x1 ++#define RTW8852B_IQK_VER 0x2a ++#define RTW8852B_IQK_SS 2 ++#define RTW8852B_RXK_GROUP_NR 4 ++#define RTW8852B_TSSI_PATH_NR 2 ++#define RTW8852B_RF_REL_VERSION 34 ++#define RTW8852B_DPK_VER 0x0d ++#define RTW8852B_DPK_RF_PATH 2 ++#define RTW8852B_DPK_KIP_REG_NUM 2 ++ ++#define _TSSI_DE_MASK GENMASK(21, 12) ++#define ADDC_T_AVG 100 ++#define DPK_TXAGC_LOWER 0x2e ++#define DPK_TXAGC_UPPER 0x3f ++#define DPK_TXAGC_INVAL 0xff ++#define RFREG_MASKRXBB 0x003e0 ++#define RFREG_MASKMODE 0xf0000 ++ ++enum rtw8852b_dpk_id { ++ LBK_RXIQK = 0x06, ++ SYNC = 0x10, ++ MDPK_IDL = 0x11, ++ MDPK_MPA = 0x12, ++ GAIN_LOSS = 0x13, ++ GAIN_CAL = 0x14, ++ DPK_RXAGC = 0x15, ++ KIP_PRESET = 0x16, ++ KIP_RESTORE = 0x17, ++ DPK_TXAGC = 0x19, ++ D_KIP_PRESET = 0x28, ++ D_TXAGC = 0x29, ++ D_RXAGC = 0x2a, ++ D_SYNC = 0x2b, ++ D_GAIN_LOSS = 0x2c, ++ D_MDPK_IDL = 0x2d, ++ D_GAIN_NORM = 0x2f, ++ D_KIP_THERMAL = 0x30, ++ D_KIP_RESTORE = 0x31 ++}; ++ ++enum dpk_agc_step { ++ DPK_AGC_STEP_SYNC_DGAIN, ++ DPK_AGC_STEP_GAIN_ADJ, ++ DPK_AGC_STEP_GAIN_LOSS_IDX, ++ DPK_AGC_STEP_GL_GT_CRITERION, ++ DPK_AGC_STEP_GL_LT_CRITERION, ++ DPK_AGC_STEP_SET_TX_GAIN, ++}; ++ ++enum rtw8852b_iqk_type { ++ ID_TXAGC = 0x0, ++ ID_FLOK_COARSE = 0x1, ++ ID_FLOK_FINE = 0x2, ++ ID_TXK = 0x3, ++ ID_RXAGC = 0x4, ++ ID_RXK = 0x5, ++ ID_NBTXK = 0x6, ++ ID_NBRXK = 0x7, ++ ID_FLOK_VBUFFER = 0x8, ++ ID_A_FLOK_COARSE = 0x9, ++ ID_G_FLOK_COARSE = 0xa, ++ ID_A_FLOK_FINE = 0xb, ++ ID_G_FLOK_FINE = 0xc, ++ ID_IQK_RESTORE = 0x10, ++}; ++ ++static const u32 _tssi_trigger[RTW8852B_TSSI_PATH_NR] = {0x5820, 0x7820}; ++static const u32 _tssi_cw_rpt_addr[RTW8852B_TSSI_PATH_NR] = {0x1c18, 0x3c18}; ++static const u32 _tssi_cw_default_addr[RTW8852B_TSSI_PATH_NR][4] = { ++ {0x5634, 0x5630, 0x5630, 0x5630}, ++ {0x7634, 0x7630, 0x7630, 0x7630} }; ++static const u32 _tssi_cw_default_mask[4] = { ++ 0x000003ff, 0x3ff00000, 0x000ffc00, 0x000003ff}; ++static const u32 _tssi_de_cck_long[RF_PATH_NUM_8852B] = {0x5858, 0x7858}; ++static const u32 _tssi_de_cck_short[RF_PATH_NUM_8852B] = {0x5860, 0x7860}; ++static const u32 _tssi_de_mcs_20m[RF_PATH_NUM_8852B] = {0x5838, 0x7838}; ++static const u32 _tssi_de_mcs_40m[RF_PATH_NUM_8852B] = {0x5840, 0x7840}; ++static const u32 _tssi_de_mcs_80m[RF_PATH_NUM_8852B] = {0x5848, 0x7848}; ++static const u32 _tssi_de_mcs_80m_80m[RF_PATH_NUM_8852B] = {0x5850, 0x7850}; ++static const u32 _tssi_de_mcs_5m[RF_PATH_NUM_8852B] = {0x5828, 0x7828}; ++static const u32 _tssi_de_mcs_10m[RF_PATH_NUM_8852B] = {0x5830, 0x7830}; ++static const u32 _a_idxrxgain[RTW8852B_RXK_GROUP_NR] = {0x190, 0x198, 0x350, 0x352}; ++static const u32 _a_idxattc2[RTW8852B_RXK_GROUP_NR] = {0x0f, 0x0f, 0x3f, 0x7f}; ++static const u32 _a_idxattc1[RTW8852B_RXK_GROUP_NR] = {0x3, 0x1, 0x0, 0x0}; ++static const u32 _g_idxrxgain[RTW8852B_RXK_GROUP_NR] = {0x212, 0x21c, 0x350, 0x360}; ++static const u32 _g_idxattc2[RTW8852B_RXK_GROUP_NR] = {0x00, 0x00, 0x28, 0x5f}; ++static const u32 _g_idxattc1[RTW8852B_RXK_GROUP_NR] = {0x3, 0x3, 0x2, 0x1}; ++static const u32 _a_power_range[RTW8852B_RXK_GROUP_NR] = {0x0, 0x0, 0x0, 0x0}; ++static const u32 _a_track_range[RTW8852B_RXK_GROUP_NR] = {0x3, 0x3, 0x6, 0x6}; ++static const u32 _a_gain_bb[RTW8852B_RXK_GROUP_NR] = {0x08, 0x0e, 0x06, 0x0e}; ++static const u32 _a_itqt[RTW8852B_RXK_GROUP_NR] = {0x12, 0x12, 0x12, 0x1b}; ++static const u32 _g_power_range[RTW8852B_RXK_GROUP_NR] = {0x0, 0x0, 0x0, 0x0}; ++static const u32 _g_track_range[RTW8852B_RXK_GROUP_NR] = {0x4, 0x4, 0x6, 0x6}; ++static const u32 _g_gain_bb[RTW8852B_RXK_GROUP_NR] = {0x08, 0x0e, 0x06, 0x0e}; ++static const u32 _g_itqt[RTW8852B_RXK_GROUP_NR] = {0x09, 0x12, 0x1b, 0x24}; ++ ++static const u32 rtw8852b_backup_bb_regs[] = {0x2344, 0x5800, 0x7800}; ++static const u32 rtw8852b_backup_rf_regs[] = { ++ 0xde, 0xdf, 0x8b, 0x90, 0x97, 0x85, 0x1e, 0x0, 0x2, 0x5, 0x10005 ++}; ++ ++#define BACKUP_BB_REGS_NR ARRAY_SIZE(rtw8852b_backup_bb_regs) ++#define BACKUP_RF_REGS_NR ARRAY_SIZE(rtw8852b_backup_rf_regs) ++ ++static const struct rtw89_reg3_def rtw8852b_set_nondbcc_path01[] = { ++ {0x20fc, 0xffff0000, 0x0303}, ++ {0x5864, 0x18000000, 0x3}, ++ {0x7864, 0x18000000, 0x3}, ++ {0x12b8, 0x40000000, 0x1}, ++ {0x32b8, 0x40000000, 0x1}, ++ {0x030c, 0xff000000, 0x13}, ++ {0x032c, 0xffff0000, 0x0041}, ++ {0x12b8, 0x10000000, 0x1}, ++ {0x58c8, 0x01000000, 0x1}, ++ {0x78c8, 0x01000000, 0x1}, ++ {0x5864, 0xc0000000, 0x3}, ++ {0x7864, 0xc0000000, 0x3}, ++ {0x2008, 0x01ffffff, 0x1ffffff}, ++ {0x0c1c, 0x00000004, 0x1}, ++ {0x0700, 0x08000000, 0x1}, ++ {0x0c70, 0x000003ff, 0x3ff}, ++ {0x0c60, 0x00000003, 0x3}, ++ {0x0c6c, 0x00000001, 0x1}, ++ {0x58ac, 0x08000000, 0x1}, ++ {0x78ac, 0x08000000, 0x1}, ++ {0x0c3c, 0x00000200, 0x1}, ++ {0x2344, 0x80000000, 0x1}, ++ {0x4490, 0x80000000, 0x1}, ++ {0x12a0, 0x00007000, 0x7}, ++ {0x12a0, 0x00008000, 0x1}, ++ {0x12a0, 0x00070000, 0x3}, ++ {0x12a0, 0x00080000, 0x1}, ++ {0x32a0, 0x00070000, 0x3}, ++ {0x32a0, 0x00080000, 0x1}, ++ {0x0700, 0x01000000, 0x1}, ++ {0x0700, 0x06000000, 0x2}, ++ {0x20fc, 0xffff0000, 0x3333}, ++}; ++ ++static const struct rtw89_reg3_def rtw8852b_restore_nondbcc_path01[] = { ++ {0x20fc, 0xffff0000, 0x0303}, ++ {0x12b8, 0x40000000, 0x0}, ++ {0x32b8, 0x40000000, 0x0}, ++ {0x5864, 0xc0000000, 0x0}, ++ {0x7864, 0xc0000000, 0x0}, ++ {0x2008, 0x01ffffff, 0x0000000}, ++ {0x0c1c, 0x00000004, 0x0}, ++ {0x0700, 0x08000000, 0x0}, ++ {0x0c70, 0x0000001f, 0x03}, ++ {0x0c70, 0x000003e0, 0x03}, ++ {0x12a0, 0x000ff000, 0x00}, ++ {0x32a0, 0x000ff000, 0x00}, ++ {0x0700, 0x07000000, 0x0}, ++ {0x20fc, 0xffff0000, 0x0000}, ++ {0x58c8, 0x01000000, 0x0}, ++ {0x78c8, 0x01000000, 0x0}, ++ {0x0c3c, 0x00000200, 0x0}, ++ {0x2344, 0x80000000, 0x0}, ++}; ++ ++static void _rfk_backup_bb_reg(struct rtw89_dev *rtwdev, u32 backup_bb_reg_val[]) ++{ ++ u32 i; ++ ++ for (i = 0; i < BACKUP_BB_REGS_NR; i++) { ++ backup_bb_reg_val[i] = ++ rtw89_phy_read32_mask(rtwdev, rtw8852b_backup_bb_regs[i], ++ MASKDWORD); ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[RFK]backup bb reg : %x, value =%x\n", ++ rtw8852b_backup_bb_regs[i], backup_bb_reg_val[i]); ++ } ++} ++ ++static void _rfk_backup_rf_reg(struct rtw89_dev *rtwdev, u32 backup_rf_reg_val[], ++ u8 rf_path) ++{ ++ u32 i; ++ ++ for (i = 0; i < BACKUP_RF_REGS_NR; i++) { ++ backup_rf_reg_val[i] = ++ rtw89_read_rf(rtwdev, rf_path, ++ rtw8852b_backup_rf_regs[i], RFREG_MASK); ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[RFK]backup rf S%d reg : %x, value =%x\n", rf_path, ++ rtw8852b_backup_rf_regs[i], backup_rf_reg_val[i]); ++ } ++} ++ ++static void _rfk_restore_bb_reg(struct rtw89_dev *rtwdev, ++ const u32 backup_bb_reg_val[]) ++{ ++ u32 i; ++ ++ for (i = 0; i < BACKUP_BB_REGS_NR; i++) { ++ rtw89_phy_write32_mask(rtwdev, rtw8852b_backup_bb_regs[i], ++ MASKDWORD, backup_bb_reg_val[i]); ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[RFK]restore bb reg : %x, value =%x\n", ++ rtw8852b_backup_bb_regs[i], backup_bb_reg_val[i]); ++ } ++} ++ ++static void _rfk_restore_rf_reg(struct rtw89_dev *rtwdev, ++ const u32 backup_rf_reg_val[], u8 rf_path) ++{ ++ u32 i; ++ ++ for (i = 0; i < BACKUP_RF_REGS_NR; i++) { ++ rtw89_write_rf(rtwdev, rf_path, rtw8852b_backup_rf_regs[i], ++ RFREG_MASK, backup_rf_reg_val[i]); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[RFK]restore rf S%d reg: %x, value =%x\n", rf_path, ++ rtw8852b_backup_rf_regs[i], backup_rf_reg_val[i]); ++ } ++} ++ ++static void _rfk_rf_direct_cntrl(struct rtw89_dev *rtwdev, ++ enum rtw89_rf_path path, bool is_bybb) ++{ ++ if (is_bybb) ++ rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x1); ++ else ++ rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x0); ++} ++ ++static void _rfk_drf_direct_cntrl(struct rtw89_dev *rtwdev, ++ enum rtw89_rf_path path, bool is_bybb) ++{ ++ if (is_bybb) ++ rtw89_write_rf(rtwdev, path, RR_BBDC, RR_BBDC_SEL, 0x1); ++ else ++ rtw89_write_rf(rtwdev, path, RR_BBDC, RR_BBDC_SEL, 0x0); ++} ++ ++static bool _iqk_check_cal(struct rtw89_dev *rtwdev, u8 path) ++{ ++ bool fail = true; ++ u32 val; ++ int ret; ++ ++ ret = read_poll_timeout_atomic(rtw89_phy_read32_mask, val, val == 0x55, ++ 1, 8200, false, rtwdev, 0xbff8, MASKBYTE0); ++ if (ret) ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]NCTL1 IQK timeout!!!\n"); ++ ++ udelay(200); ++ ++ if (!ret) ++ fail = rtw89_phy_read32_mask(rtwdev, R_NCTL_RPT, B_NCTL_RPT_FLG); ++ rtw89_phy_write32_mask(rtwdev, R_NCTL_N1, MASKBYTE0, 0x0); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, ret=%d\n", path, ret); ++ val = rtw89_phy_read32_mask(rtwdev, R_NCTL_RPT, MASKDWORD); ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, 0x8008 = 0x%x\n", path, val); ++ ++ return fail; ++} ++ ++static u8 _kpath(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx) ++{ ++ u8 val; ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RFK]dbcc_en: %x,PHY%d\n", ++ rtwdev->dbcc_en, phy_idx); ++ ++ if (!rtwdev->dbcc_en) { ++ val = RF_AB; ++ } else { ++ if (phy_idx == RTW89_PHY_0) ++ val = RF_A; ++ else ++ val = RF_B; ++ } ++ return val; ++} ++ ++static void _set_rx_dck(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, ++ enum rtw89_rf_path path) ++{ ++ rtw89_write_rf(rtwdev, path, RR_DCK1, RR_DCK1_CLR, 0x0); ++ rtw89_write_rf(rtwdev, path, RR_DCK, RR_DCK_LV, 0x0); ++ rtw89_write_rf(rtwdev, path, RR_DCK, RR_DCK_LV, 0x1); ++ mdelay(1); ++} ++ ++static void _rx_dck(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy) ++{ ++ u8 path, dck_tune; ++ u32 rf_reg5; ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[RX_DCK] ****** RXDCK Start (Ver: 0x%x, CV : 0x%x) ******\n", ++ RTW8852B_RXDCK_VER, rtwdev->hal.cv); ++ ++ for (path = 0; path < RF_PATH_NUM_8852B; path++) { ++ rf_reg5 = rtw89_read_rf(rtwdev, path, RR_RSV1, RFREG_MASK); ++ dck_tune = rtw89_read_rf(rtwdev, path, RR_DCK, RR_DCK_FINE); ++ ++ if (rtwdev->is_tssi_mode[path]) ++ rtw89_phy_write32_mask(rtwdev, ++ R_P0_TSSI_TRK + (path << 13), ++ B_P0_TSSI_TRK_EN, 0x1); ++ ++ rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x0); ++ rtw89_write_rf(rtwdev, path, RR_DCK, RR_DCK_FINE, 0x0); ++ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, RR_MOD_V_RX); ++ _set_rx_dck(rtwdev, phy, path); ++ rtw89_write_rf(rtwdev, path, RR_DCK, RR_DCK_FINE, dck_tune); ++ rtw89_write_rf(rtwdev, path, RR_RSV1, RFREG_MASK, rf_reg5); ++ ++ if (rtwdev->is_tssi_mode[path]) ++ rtw89_phy_write32_mask(rtwdev, ++ R_P0_TSSI_TRK + (path << 13), ++ B_P0_TSSI_TRK_EN, 0x0); ++ } ++} ++ ++static void _rck(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) ++{ ++ u32 rf_reg5; ++ u32 rck_val; ++ u32 val; ++ int ret; ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RCK] ====== S%d RCK ======\n", path); ++ ++ rf_reg5 = rtw89_read_rf(rtwdev, path, RR_RSV1, RFREG_MASK); ++ ++ rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x0); ++ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, RR_MOD_V_RX); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RCK] RF0x00 = 0x%05x\n", ++ rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK)); ++ ++ /* RCK trigger */ ++ rtw89_write_rf(rtwdev, path, RR_RCKC, RFREG_MASK, 0x00240); ++ ++ ret = read_poll_timeout_atomic(rtw89_read_rf, val, val, 2, 30, ++ false, rtwdev, path, RR_RCKS, BIT(3)); ++ ++ rck_val = rtw89_read_rf(rtwdev, path, RR_RCKC, RR_RCKC_CA); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RCK] rck_val = 0x%x, ret = %d\n", ++ rck_val, ret); ++ ++ rtw89_write_rf(rtwdev, path, RR_RCKC, RFREG_MASK, rck_val); ++ rtw89_write_rf(rtwdev, path, RR_RSV1, RFREG_MASK, rf_reg5); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RCK] RF 0x1b = 0x%x\n", ++ rtw89_read_rf(rtwdev, path, RR_RCKC, RFREG_MASK)); ++} ++ ++static void _afe_init(struct rtw89_dev *rtwdev) ++{ ++ rtw89_write32(rtwdev, R_AX_PHYREG_SET, 0xf); ++ ++ rtw89_rfk_parser(rtwdev, &rtw8852b_afe_init_defs_tbl); ++} ++ ++static void _drck(struct rtw89_dev *rtwdev) ++{ ++ u32 rck_d; ++ u32 val; ++ int ret; ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]Ddie RCK start!!!\n"); ++ rtw89_phy_write32_mask(rtwdev, R_DRCK_V1, B_DRCK_V1_KICK, 0x1); ++ ++ ret = read_poll_timeout_atomic(rtw89_phy_read32_mask, val, val, 1, 10000, ++ false, rtwdev, R_DRCK_RS, B_DRCK_RS_DONE); ++ if (ret) ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]DRCK timeout\n"); ++ ++ rtw89_phy_write32_mask(rtwdev, R_DRCK_V1, B_DRCK_V1_KICK, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_DRCK_FH, B_DRCK_LAT, 0x1); ++ udelay(1); ++ rtw89_phy_write32_mask(rtwdev, R_DRCK_FH, B_DRCK_LAT, 0x0); ++ rck_d = rtw89_phy_read32_mask(rtwdev, R_DRCK_RS, B_DRCK_RS_LPS); ++ rtw89_phy_write32_mask(rtwdev, R_DRCK_V1, B_DRCK_V1_SEL, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_DRCK_V1, B_DRCK_V1_CV, rck_d); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]0xc0cc = 0x%x\n", ++ rtw89_phy_read32_mask(rtwdev, R_DRCK_V1, MASKDWORD)); ++} ++ ++static void _addck_backup(struct rtw89_dev *rtwdev) ++{ ++ struct rtw89_dack_info *dack = &rtwdev->dack; ++ ++ rtw89_phy_write32_mask(rtwdev, R_ADDCK0, B_ADDCK0, 0x0); ++ dack->addck_d[0][0] = rtw89_phy_read32_mask(rtwdev, R_ADDCKR0, B_ADDCKR0_A0); ++ dack->addck_d[0][1] = rtw89_phy_read32_mask(rtwdev, R_ADDCKR0, B_ADDCKR0_A1); ++ ++ rtw89_phy_write32_mask(rtwdev, R_ADDCK1, B_ADDCK1, 0x0); ++ dack->addck_d[1][0] = rtw89_phy_read32_mask(rtwdev, R_ADDCKR1, B_ADDCKR1_A0); ++ dack->addck_d[1][1] = rtw89_phy_read32_mask(rtwdev, R_ADDCKR1, B_ADDCKR1_A1); ++} ++ ++static void _addck_reload(struct rtw89_dev *rtwdev) ++{ ++ struct rtw89_dack_info *dack = &rtwdev->dack; ++ ++ /* S0 */ ++ rtw89_phy_write32_mask(rtwdev, R_ADDCK0D, B_ADDCK0D_VAL, dack->addck_d[0][0]); ++ rtw89_phy_write32_mask(rtwdev, R_ADDCK0, B_ADDCK0_VAL, dack->addck_d[0][1] >> 6); ++ rtw89_phy_write32_mask(rtwdev, R_ADDCK0D, B_ADDCK0D_VAL2, dack->addck_d[0][1] & 0x3f); ++ rtw89_phy_write32_mask(rtwdev, R_ADDCK0, B_ADDCK0_MAN, 0x3); ++ ++ /* S1 */ ++ rtw89_phy_write32_mask(rtwdev, R_ADDCK1D, B_ADDCK1D_VAL, dack->addck_d[1][0]); ++ rtw89_phy_write32_mask(rtwdev, R_ADDCK1, B_ADDCK0_VAL, dack->addck_d[1][1] >> 6); ++ rtw89_phy_write32_mask(rtwdev, R_ADDCK1D, B_ADDCK1D_VAL2, dack->addck_d[1][1] & 0x3f); ++ rtw89_phy_write32_mask(rtwdev, R_ADDCK1, B_ADDCK1_MAN, 0x3); ++} ++ ++static void _dack_backup_s0(struct rtw89_dev *rtwdev) ++{ ++ struct rtw89_dack_info *dack = &rtwdev->dack; ++ u8 i; ++ ++ rtw89_phy_write32_mask(rtwdev, R_P0_NRBW, B_P0_NRBW_DBG, 0x1); ++ ++ for (i = 0; i < RTW89_DACK_MSBK_NR; i++) { ++ rtw89_phy_write32_mask(rtwdev, R_DCOF0, B_DCOF0_V, i); ++ dack->msbk_d[0][0][i] = ++ rtw89_phy_read32_mask(rtwdev, R_DACK_S0P2, B_DACK_S0M0); ++ rtw89_phy_write32_mask(rtwdev, R_DCOF8, B_DCOF8_V, i); ++ dack->msbk_d[0][1][i] = ++ rtw89_phy_read32_mask(rtwdev, R_DACK_S0P3, B_DACK_S0M1); ++ } ++ ++ dack->biask_d[0][0] = ++ rtw89_phy_read32_mask(rtwdev, R_DACK_BIAS00, B_DACK_BIAS00); ++ dack->biask_d[0][1] = ++ rtw89_phy_read32_mask(rtwdev, R_DACK_BIAS01, B_DACK_BIAS01); ++ ++ dack->dadck_d[0][0] = ++ rtw89_phy_read32_mask(rtwdev, R_DACK_DADCK00, B_DACK_DADCK00); ++ dack->dadck_d[0][1] = ++ rtw89_phy_read32_mask(rtwdev, R_DACK_DADCK01, B_DACK_DADCK01); ++} ++ ++static void _dack_backup_s1(struct rtw89_dev *rtwdev) ++{ ++ struct rtw89_dack_info *dack = &rtwdev->dack; ++ u8 i; ++ ++ rtw89_phy_write32_mask(rtwdev, R_P1_DBGMOD, B_P1_DBGMOD_ON, 0x1); ++ ++ for (i = 0; i < RTW89_DACK_MSBK_NR; i++) { ++ rtw89_phy_write32_mask(rtwdev, R_DACK10, B_DACK10, i); ++ dack->msbk_d[1][0][i] = ++ rtw89_phy_read32_mask(rtwdev, R_DACK10S, B_DACK10S); ++ rtw89_phy_write32_mask(rtwdev, R_DACK11, B_DACK11, i); ++ dack->msbk_d[1][1][i] = ++ rtw89_phy_read32_mask(rtwdev, R_DACK11S, B_DACK11S); ++ } ++ ++ dack->biask_d[1][0] = ++ rtw89_phy_read32_mask(rtwdev, R_DACK_BIAS10, B_DACK_BIAS10); ++ dack->biask_d[1][1] = ++ rtw89_phy_read32_mask(rtwdev, R_DACK_BIAS11, B_DACK_BIAS11); ++ ++ dack->dadck_d[1][0] = ++ rtw89_phy_read32_mask(rtwdev, R_DACK_DADCK10, B_DACK_DADCK10); ++ dack->dadck_d[1][1] = ++ rtw89_phy_read32_mask(rtwdev, R_DACK_DADCK11, B_DACK_DADCK11); ++} ++ ++static void _check_addc(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) ++{ ++ s32 dc_re = 0, dc_im = 0; ++ u32 tmp; ++ u32 i; ++ ++ rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, ++ &rtw8852b_check_addc_defs_a_tbl, ++ &rtw8852b_check_addc_defs_b_tbl); ++ ++ for (i = 0; i < ADDC_T_AVG; i++) { ++ tmp = rtw89_phy_read32_mask(rtwdev, R_DBG32_D, MASKDWORD); ++ dc_re += sign_extend32(FIELD_GET(0xfff000, tmp), 11); ++ dc_im += sign_extend32(FIELD_GET(0xfff, tmp), 11); ++ } ++ ++ dc_re /= ADDC_T_AVG; ++ dc_im /= ADDC_T_AVG; ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[DACK]S%d,dc_re = 0x%x,dc_im =0x%x\n", path, dc_re, dc_im); ++} ++ ++static void _addck(struct rtw89_dev *rtwdev) ++{ ++ struct rtw89_dack_info *dack = &rtwdev->dack; ++ u32 val; ++ int ret; ++ ++ /* S0 */ ++ rtw89_phy_write32_mask(rtwdev, R_ADDCK0, B_ADDCK0_MAN, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_PATH1_SAMPL_DLY_T_V1, 0x30, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_P0_NRBW, B_P0_NRBW_DBG, 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_ANAPAR, B_ANAPAR_ADCCLK, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_ANAPAR, B_ANAPAR_FLTRST, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_ANAPAR, B_ANAPAR_FLTRST, 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15_H, 0xf); ++ rtw89_phy_write32_mask(rtwdev, R_ANAPAR, B_ANAPAR_EN, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_PATH0_SAMPL_DLY_T_V1, BIT(1), 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15_H, 0x3); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]before S0 ADDCK\n"); ++ _check_addc(rtwdev, RF_PATH_A); ++ ++ rtw89_phy_write32_mask(rtwdev, R_ADDCK0, B_ADDCK0_TRG, 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_ADDCK0, B_ADDCK0_TRG, 0x0); ++ udelay(1); ++ rtw89_phy_write32_mask(rtwdev, R_ADDCK0, B_ADDCK0, 0x1); ++ ++ ret = read_poll_timeout_atomic(rtw89_phy_read32_mask, val, val, 1, 10000, ++ false, rtwdev, R_ADDCKR0, BIT(0)); ++ if (ret) { ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S0 ADDCK timeout\n"); ++ dack->addck_timeout[0] = true; ++ } ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]ADDCK ret = %d\n", ret); ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]after S0 ADDCK\n"); ++ _check_addc(rtwdev, RF_PATH_A); ++ ++ rtw89_phy_write32_mask(rtwdev, R_PATH0_SAMPL_DLY_T_V1, BIT(1), 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_ANAPAR, B_ANAPAR_EN, 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15_H, 0xc); ++ rtw89_phy_write32_mask(rtwdev, R_ANAPAR, B_ANAPAR_ADCCLK, 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_P0_NRBW, B_P0_NRBW_DBG, 0x0); ++ ++ /* S1 */ ++ rtw89_phy_write32_mask(rtwdev, R_P1_DBGMOD, B_P1_DBGMOD_ON, 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_ANAPAR, B_ANAPAR_ADCCLK, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_ANAPAR, B_ANAPAR_FLTRST, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_ANAPAR, B_ANAPAR_FLTRST, 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15_H, 0xf); ++ rtw89_phy_write32_mask(rtwdev, R_ANAPAR, B_ANAPAR_EN, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_PATH1_SAMPL_DLY_T_V1, BIT(1), 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15_H, 0x3); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]before S1 ADDCK\n"); ++ _check_addc(rtwdev, RF_PATH_B); ++ ++ rtw89_phy_write32_mask(rtwdev, R_ADDCK1, B_ADDCK1_TRG, 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_ADDCK1, B_ADDCK1_TRG, 0x0); ++ udelay(1); ++ rtw89_phy_write32_mask(rtwdev, R_ADDCK1, B_ADDCK1, 0x1); ++ ++ ret = read_poll_timeout_atomic(rtw89_phy_read32_mask, val, val, 1, 10000, ++ false, rtwdev, R_ADDCKR1, BIT(0)); ++ if (ret) { ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S1 ADDCK timeout\n"); ++ dack->addck_timeout[1] = true; ++ } ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]ADDCK ret = %d\n", ret); ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]after S1 ADDCK\n"); ++ _check_addc(rtwdev, RF_PATH_B); ++ ++ rtw89_phy_write32_mask(rtwdev, R_PATH1_SAMPL_DLY_T_V1, BIT(1), 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_ANAPAR, B_ANAPAR_EN, 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15_H, 0xc); ++ rtw89_phy_write32_mask(rtwdev, R_ANAPAR, B_ANAPAR_ADCCLK, 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_P1_DBGMOD, B_P1_DBGMOD_ON, 0x0); ++} ++ ++static void _check_dadc(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) ++{ ++ rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, ++ &rtw8852b_check_dadc_en_defs_a_tbl, ++ &rtw8852b_check_dadc_en_defs_b_tbl); ++ ++ _check_addc(rtwdev, path); ++ ++ rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, ++ &rtw8852b_check_dadc_dis_defs_a_tbl, ++ &rtw8852b_check_dadc_dis_defs_b_tbl); ++} ++ ++static bool _dack_s0_check_done(struct rtw89_dev *rtwdev, bool part1) ++{ ++ if (part1) { ++ if (rtw89_phy_read32_mask(rtwdev, R_DACK_S0P0, B_DACK_S0P0_OK) == 0 || ++ rtw89_phy_read32_mask(rtwdev, R_DACK_S0P1, B_DACK_S0P1_OK) == 0) ++ return false; ++ } else { ++ if (rtw89_phy_read32_mask(rtwdev, R_DACK_S0P2, B_DACK_S0P2_OK) == 0 || ++ rtw89_phy_read32_mask(rtwdev, R_DACK_S0P3, B_DACK_S0P3_OK) == 0) ++ return false; ++ } ++ ++ return true; ++} ++ ++static void _dack_s0(struct rtw89_dev *rtwdev) ++{ ++ struct rtw89_dack_info *dack = &rtwdev->dack; ++ bool done; ++ int ret; ++ ++ rtw89_rfk_parser(rtwdev, &rtw8852b_dack_s0_1_defs_tbl); ++ ++ ret = read_poll_timeout_atomic(_dack_s0_check_done, done, done, 1, 10000, ++ false, rtwdev, true); ++ if (ret) { ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S0 MSBK timeout\n"); ++ dack->msbk_timeout[0] = true; ++ } ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]DACK ret = %d\n", ret); ++ ++ rtw89_rfk_parser(rtwdev, &rtw8852b_dack_s0_2_defs_tbl); ++ ++ ret = read_poll_timeout_atomic(_dack_s0_check_done, done, done, 1, 10000, ++ false, rtwdev, false); ++ if (ret) { ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S0 DADCK timeout\n"); ++ dack->dadck_timeout[0] = true; ++ } ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]DACK ret = %d\n", ret); ++ ++ rtw89_rfk_parser(rtwdev, &rtw8852b_dack_s0_3_defs_tbl); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]after S0 DADCK\n"); ++ ++ _dack_backup_s0(rtwdev); ++ rtw89_phy_write32_mask(rtwdev, R_P0_NRBW, B_P0_NRBW_DBG, 0x0); ++} ++ ++static bool _dack_s1_check_done(struct rtw89_dev *rtwdev, bool part1) ++{ ++ if (part1) { ++ if (rtw89_phy_read32_mask(rtwdev, R_DACK_S1P0, B_DACK_S1P0_OK) == 0 && ++ rtw89_phy_read32_mask(rtwdev, R_DACK_S1P1, B_DACK_S1P1_OK) == 0) ++ return false; ++ } else { ++ if (rtw89_phy_read32_mask(rtwdev, R_DACK10S, B_DACK_S1P2_OK) == 0 && ++ rtw89_phy_read32_mask(rtwdev, R_DACK11S, B_DACK_S1P3_OK) == 0) ++ return false; ++ } ++ ++ return true; ++} ++ ++static void _dack_s1(struct rtw89_dev *rtwdev) ++{ ++ struct rtw89_dack_info *dack = &rtwdev->dack; ++ bool done; ++ int ret; ++ ++ rtw89_rfk_parser(rtwdev, &rtw8852b_dack_s1_1_defs_tbl); ++ ++ ret = read_poll_timeout_atomic(_dack_s1_check_done, done, done, 1, 10000, ++ false, rtwdev, true); ++ if (ret) { ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S1 MSBK timeout\n"); ++ dack->msbk_timeout[1] = true; ++ } ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]DACK ret = %d\n", ret); ++ ++ rtw89_rfk_parser(rtwdev, &rtw8852b_dack_s1_2_defs_tbl); ++ ++ ret = read_poll_timeout_atomic(_dack_s1_check_done, done, done, 1, 10000, ++ false, rtwdev, false); ++ if (ret) { ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S1 DADCK timeout\n"); ++ dack->dadck_timeout[1] = true; ++ } ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]DACK ret = %d\n", ret); ++ ++ rtw89_rfk_parser(rtwdev, &rtw8852b_dack_s1_3_defs_tbl); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]after S1 DADCK\n"); ++ ++ _check_dadc(rtwdev, RF_PATH_B); ++ _dack_backup_s1(rtwdev); ++ rtw89_phy_write32_mask(rtwdev, R_P1_DBGMOD, B_P1_DBGMOD_ON, 0x0); ++} ++ ++static void _dack(struct rtw89_dev *rtwdev) ++{ ++ _dack_s0(rtwdev); ++ _dack_s1(rtwdev); ++} ++ ++static void _dack_dump(struct rtw89_dev *rtwdev) ++{ ++ struct rtw89_dack_info *dack = &rtwdev->dack; ++ u8 i; ++ u8 t; ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[DACK]S0 ADC_DCK ic = 0x%x, qc = 0x%x\n", ++ dack->addck_d[0][0], dack->addck_d[0][1]); ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[DACK]S1 ADC_DCK ic = 0x%x, qc = 0x%x\n", ++ dack->addck_d[1][0], dack->addck_d[1][1]); ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[DACK]S0 DAC_DCK ic = 0x%x, qc = 0x%x\n", ++ dack->dadck_d[0][0], dack->dadck_d[0][1]); ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[DACK]S1 DAC_DCK ic = 0x%x, qc = 0x%x\n", ++ dack->dadck_d[1][0], dack->dadck_d[1][1]); ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[DACK]S0 biask ic = 0x%x, qc = 0x%x\n", ++ dack->biask_d[0][0], dack->biask_d[0][1]); ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[DACK]S1 biask ic = 0x%x, qc = 0x%x\n", ++ dack->biask_d[1][0], dack->biask_d[1][1]); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S0 MSBK ic:\n"); ++ for (i = 0; i < 0x10; i++) { ++ t = dack->msbk_d[0][0][i]; ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]0x%x\n", t); ++ } ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S0 MSBK qc:\n"); ++ for (i = 0; i < RTW89_DACK_MSBK_NR; i++) { ++ t = dack->msbk_d[0][1][i]; ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]0x%x\n", t); ++ } ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S1 MSBK ic:\n"); ++ for (i = 0; i < RTW89_DACK_MSBK_NR; i++) { ++ t = dack->msbk_d[1][0][i]; ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]0x%x\n", t); ++ } ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S1 MSBK qc:\n"); ++ for (i = 0; i < RTW89_DACK_MSBK_NR; i++) { ++ t = dack->msbk_d[1][1][i]; ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]0x%x\n", t); ++ } ++} ++ ++static void _dac_cal(struct rtw89_dev *rtwdev, bool force) ++{ ++ struct rtw89_dack_info *dack = &rtwdev->dack; ++ u32 rf0_0, rf1_0; ++ ++ dack->dack_done = false; ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]DACK 0x1\n"); ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]DACK start!!!\n"); ++ ++ rf0_0 = rtw89_read_rf(rtwdev, RF_PATH_A, RR_MOD, RFREG_MASK); ++ rf1_0 = rtw89_read_rf(rtwdev, RF_PATH_B, RR_MOD, RFREG_MASK); ++ _afe_init(rtwdev); ++ _drck(rtwdev); ++ ++ rtw89_write_rf(rtwdev, RF_PATH_A, RR_RSV1, RR_RSV1_RST, 0x0); ++ rtw89_write_rf(rtwdev, RF_PATH_B, RR_RSV1, RR_RSV1_RST, 0x0); ++ rtw89_write_rf(rtwdev, RF_PATH_A, RR_MOD, RFREG_MASK, 0x337e1); ++ rtw89_write_rf(rtwdev, RF_PATH_B, RR_MOD, RFREG_MASK, 0x337e1); ++ _addck(rtwdev); ++ _addck_backup(rtwdev); ++ _addck_reload(rtwdev); ++ ++ rtw89_write_rf(rtwdev, RF_PATH_A, RR_MODOPT, RFREG_MASK, 0x0); ++ rtw89_write_rf(rtwdev, RF_PATH_B, RR_MODOPT, RFREG_MASK, 0x0); ++ _dack(rtwdev); ++ _dack_dump(rtwdev); ++ dack->dack_done = true; ++ ++ rtw89_write_rf(rtwdev, RF_PATH_A, RR_MOD, RFREG_MASK, rf0_0); ++ rtw89_write_rf(rtwdev, RF_PATH_B, RR_MOD, RFREG_MASK, rf1_0); ++ rtw89_write_rf(rtwdev, RF_PATH_A, RR_RSV1, RR_RSV1_RST, 0x1); ++ rtw89_write_rf(rtwdev, RF_PATH_B, RR_RSV1, RR_RSV1_RST, 0x1); ++ dack->dack_cnt++; ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]DACK finish!!!\n"); ++} ++ ++static void _iqk_rxk_setting(struct rtw89_dev *rtwdev, u8 path) ++{ ++ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; ++ u32 tmp; ++ ++ switch (iqk_info->iqk_band[path]) { ++ case RTW89_BAND_2G: ++ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, 0xc); ++ rtw89_write_rf(rtwdev, path, RR_RXK, RR_RXK_SEL2G, 0x1); ++ tmp = rtw89_read_rf(rtwdev, path, RR_CFGCH, RFREG_MASK); ++ rtw89_write_rf(rtwdev, path, RR_RSV4, RFREG_MASK, tmp); ++ break; ++ case RTW89_BAND_5G: ++ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, 0xc); ++ rtw89_write_rf(rtwdev, path, RR_RXK, RR_RXK_SEL5G, 0x1); ++ tmp = rtw89_read_rf(rtwdev, path, RR_CFGCH, RFREG_MASK); ++ rtw89_write_rf(rtwdev, path, RR_RSV4, RFREG_MASK, tmp); ++ break; ++ default: ++ break; ++ } ++} ++ ++static bool _iqk_one_shot(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, ++ u8 path, u8 ktype) ++{ ++ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; ++ u32 iqk_cmd; ++ bool fail; ++ ++ switch (ktype) { ++ case ID_FLOK_COARSE: ++ rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, B_P0_RFCTM_EN, 0x1); ++ iqk_cmd = 0x108 | (1 << (4 + path)); ++ break; ++ case ID_FLOK_FINE: ++ rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, B_P0_RFCTM_EN, 0x1); ++ iqk_cmd = 0x208 | (1 << (4 + path)); ++ break; ++ case ID_FLOK_VBUFFER: ++ rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, B_P0_RFCTM_EN, 0x1); ++ iqk_cmd = 0x308 | (1 << (4 + path)); ++ break; ++ case ID_TXK: ++ rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, B_P0_RFCTM_EN, 0x0); ++ iqk_cmd = 0x008 | (1 << (path + 4)) | ++ (((0x8 + iqk_info->iqk_bw[path]) & 0xf) << 8); ++ break; ++ case ID_RXAGC: ++ iqk_cmd = 0x508 | (1 << (4 + path)) | (path << 1); ++ break; ++ case ID_RXK: ++ rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, B_P0_RFCTM_EN, 0x1); ++ iqk_cmd = 0x008 | (1 << (path + 4)) | ++ (((0xb + iqk_info->iqk_bw[path]) & 0xf) << 8); ++ break; ++ case ID_NBTXK: ++ rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, B_P0_RFCTM_EN, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, B_IQK_DIF4_TXT, 0x011); ++ iqk_cmd = 0x308 | (1 << (4 + path)); ++ break; ++ case ID_NBRXK: ++ rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, B_P0_RFCTM_EN, 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, B_IQK_DIF4_RXT, 0x011); ++ iqk_cmd = 0x608 | (1 << (4 + path)); ++ break; ++ default: ++ return false; ++ } ++ ++ rtw89_phy_write32_mask(rtwdev, R_NCTL_CFG, MASKDWORD, iqk_cmd + 1); ++ udelay(1); ++ fail = _iqk_check_cal(rtwdev, path); ++ rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, B_P0_RFCTM_EN, 0x0); ++ ++ return fail; ++} ++ ++static bool _rxk_group_sel(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, ++ u8 path) ++{ ++ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; ++ bool kfail = false; ++ bool fail; ++ u8 gp; ++ ++ for (gp = 0; gp < RTW8852B_RXK_GROUP_NR; gp++) { ++ switch (iqk_info->iqk_band[path]) { ++ case RTW89_BAND_2G: ++ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_RGM, ++ _g_idxrxgain[gp]); ++ rtw89_write_rf(rtwdev, path, RR_RXBB, RR_RXBB_C2G, ++ _g_idxattc2[gp]); ++ rtw89_write_rf(rtwdev, path, RR_RXBB, RR_RXBB_C1G, ++ _g_idxattc1[gp]); ++ break; ++ case RTW89_BAND_5G: ++ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_RGM, ++ _a_idxrxgain[gp]); ++ rtw89_write_rf(rtwdev, path, RR_RXA2, RR_RXA2_HATT, ++ _a_idxattc2[gp]); ++ rtw89_write_rf(rtwdev, path, RR_RXA2, RR_RXA2_CC2, ++ _a_idxattc1[gp]); ++ break; ++ default: ++ break; ++ } ++ ++ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), ++ B_CFIR_LUT_SEL, 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), ++ B_CFIR_LUT_SET, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), ++ B_CFIR_LUT_GP_V1, gp); ++ fail = _iqk_one_shot(rtwdev, phy_idx, path, ID_RXK); ++ rtw89_phy_write32_mask(rtwdev, R_IQKINF, ++ BIT(16 + gp + path * 4), fail); ++ kfail |= fail; ++ } ++ rtw89_write_rf(rtwdev, path, RR_RXK, RR_RXK_SEL5G, 0x0); ++ ++ if (kfail) { ++ iqk_info->nb_rxcfir[path] = 0x40000002; ++ rtw89_phy_write32_mask(rtwdev, R_IQK_RES + (path << 8), ++ B_IQK_RES_RXCFIR, 0x0); ++ iqk_info->is_wb_rxiqk[path] = false; ++ } else { ++ iqk_info->nb_rxcfir[path] = 0x40000000; ++ rtw89_phy_write32_mask(rtwdev, R_IQK_RES + (path << 8), ++ B_IQK_RES_RXCFIR, 0x5); ++ iqk_info->is_wb_rxiqk[path] = true; ++ } ++ ++ return kfail; ++} ++ ++static bool _iqk_nbrxk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, ++ u8 path) ++{ ++ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; ++ const u8 gp = 0x3; ++ bool kfail = false; ++ bool fail; ++ ++ switch (iqk_info->iqk_band[path]) { ++ case RTW89_BAND_2G: ++ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_RGM, ++ _g_idxrxgain[gp]); ++ rtw89_write_rf(rtwdev, path, RR_RXBB, RR_RXBB_C2G, ++ _g_idxattc2[gp]); ++ rtw89_write_rf(rtwdev, path, RR_RXBB, RR_RXBB_C1G, ++ _g_idxattc1[gp]); ++ break; ++ case RTW89_BAND_5G: ++ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_RGM, ++ _a_idxrxgain[gp]); ++ rtw89_write_rf(rtwdev, path, RR_RXA2, RR_RXA2_HATT, ++ _a_idxattc2[gp]); ++ rtw89_write_rf(rtwdev, path, RR_RXA2, RR_RXA2_CC2, ++ _a_idxattc1[gp]); ++ break; ++ default: ++ break; ++ } ++ ++ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_SEL, 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_SET, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_GP_V1, gp); ++ rtw89_write_rf(rtwdev, path, RR_RXKPLL, RFREG_MASK, 0x80013); ++ udelay(1); ++ ++ fail = _iqk_one_shot(rtwdev, phy_idx, path, ID_NBRXK); ++ rtw89_phy_write32_mask(rtwdev, R_IQKINF, BIT(16 + gp + path * 4), fail); ++ kfail |= fail; ++ rtw89_write_rf(rtwdev, path, RR_RXK, RR_RXK_SEL5G, 0x0); ++ ++ if (!kfail) ++ iqk_info->nb_rxcfir[path] = ++ rtw89_phy_read32_mask(rtwdev, R_RXIQC + (path << 8), MASKDWORD) | 0x2; ++ else ++ iqk_info->nb_rxcfir[path] = 0x40000002; ++ ++ return kfail; ++} ++ ++static void _iqk_rxclk_setting(struct rtw89_dev *rtwdev, u8 path) ++{ ++ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; ++ ++ if (iqk_info->iqk_bw[path] == RTW89_CHANNEL_WIDTH_80) { ++ rtw89_phy_write32_mask(rtwdev, R_P0_NRBW, B_P0_NRBW_DBG, 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_P1_DBGMOD, B_P1_DBGMOD_ON, 0x1); ++ udelay(1); ++ rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15, 0x0f); ++ udelay(1); ++ rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15, 0x03); ++ rtw89_phy_write32_mask(rtwdev, R_ANAPAR, B_ANAPAR_15, 0xa001); ++ udelay(1); ++ rtw89_phy_write32_mask(rtwdev, R_ANAPAR, B_ANAPAR_15, 0xa041); ++ rtw89_phy_write32_mask(rtwdev, R_P0_RXCK, B_P0_RXCK_VAL, 0x2); ++ rtw89_phy_write32_mask(rtwdev, R_P0_RXCK, B_P0_RXCK_ON, 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_P1_RXCK, B_P1_RXCK_VAL, 0x2); ++ rtw89_phy_write32_mask(rtwdev, R_P1_RXCK, B_P1_RXCK_ON, 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_UPD_CLK_ADC, B_UPD_CLK_ADC_ON, 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_UPD_CLK_ADC, B_UPD_CLK_ADC_VAL, 0x1); ++ } else { ++ rtw89_phy_write32_mask(rtwdev, R_P0_NRBW, B_P0_NRBW_DBG, 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_P1_DBGMOD, B_P1_DBGMOD_ON, 0x1); ++ udelay(1); ++ rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15, 0x0f); ++ udelay(1); ++ rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15, 0x03); ++ rtw89_phy_write32_mask(rtwdev, R_ANAPAR, B_ANAPAR_15, 0xa001); ++ udelay(1); ++ rtw89_phy_write32_mask(rtwdev, R_ANAPAR, B_ANAPAR_15, 0xa041); ++ rtw89_phy_write32_mask(rtwdev, R_P0_RXCK, B_P0_RXCK_VAL, 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_P0_RXCK, B_P0_RXCK_ON, 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_P1_RXCK, B_P1_RXCK_VAL, 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_P1_RXCK, B_P1_RXCK_ON, 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_UPD_CLK_ADC, B_UPD_CLK_ADC_ON, 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_UPD_CLK_ADC, B_UPD_CLK_ADC_VAL, 0x0); ++ } ++} ++ ++static bool _txk_group_sel(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, u8 path) ++{ ++ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; ++ bool kfail = false; ++ bool fail; ++ u8 gp; ++ ++ for (gp = 0x0; gp < RTW8852B_RXK_GROUP_NR; gp++) { ++ switch (iqk_info->iqk_band[path]) { ++ case RTW89_BAND_2G: ++ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, ++ _g_power_range[gp]); ++ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, ++ _g_track_range[gp]); ++ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, ++ _g_gain_bb[gp]); ++ rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), ++ MASKDWORD, _g_itqt[gp]); ++ break; ++ case RTW89_BAND_5G: ++ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, ++ _a_power_range[gp]); ++ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, ++ _a_track_range[gp]); ++ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, ++ _a_gain_bb[gp]); ++ rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), ++ MASKDWORD, _a_itqt[gp]); ++ break; ++ default: ++ break; ++ } ++ ++ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), ++ B_CFIR_LUT_SEL, 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), ++ B_CFIR_LUT_SET, 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), ++ B_CFIR_LUT_G2, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), ++ B_CFIR_LUT_GP, gp); ++ rtw89_phy_write32_mask(rtwdev, R_NCTL_N1, B_NCTL_N1_CIP, 0x00); ++ fail = _iqk_one_shot(rtwdev, phy_idx, path, ID_TXK); ++ rtw89_phy_write32_mask(rtwdev, R_IQKINF, ++ BIT(8 + gp + path * 4), fail); ++ kfail |= fail; ++ } ++ ++ if (kfail) { ++ iqk_info->nb_txcfir[path] = 0x40000002; ++ rtw89_phy_write32_mask(rtwdev, R_IQK_RES + (path << 8), ++ B_IQK_RES_TXCFIR, 0x0); ++ iqk_info->is_wb_txiqk[path] = false; ++ } else { ++ iqk_info->nb_txcfir[path] = 0x40000000; ++ rtw89_phy_write32_mask(rtwdev, R_IQK_RES + (path << 8), ++ B_IQK_RES_TXCFIR, 0x5); ++ iqk_info->is_wb_txiqk[path] = true; ++ } ++ ++ return kfail; ++} ++ ++static bool _iqk_nbtxk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, u8 path) ++{ ++ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; ++ bool kfail; ++ u8 gp = 0x3; ++ ++ switch (iqk_info->iqk_band[path]) { ++ case RTW89_BAND_2G: ++ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, ++ _g_power_range[gp]); ++ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, ++ _g_track_range[gp]); ++ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, ++ _g_gain_bb[gp]); ++ rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), ++ MASKDWORD, _g_itqt[gp]); ++ break; ++ case RTW89_BAND_5G: ++ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, ++ _a_power_range[gp]); ++ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, ++ _a_track_range[gp]); ++ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, ++ _a_gain_bb[gp]); ++ rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), ++ MASKDWORD, _a_itqt[gp]); ++ break; ++ default: ++ break; ++ } ++ ++ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_SEL, 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_SET, 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_G2, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_GP, gp); ++ rtw89_phy_write32_mask(rtwdev, R_NCTL_N1, B_NCTL_N1_CIP, 0x00); ++ kfail = _iqk_one_shot(rtwdev, phy_idx, path, ID_NBTXK); ++ ++ if (!kfail) ++ iqk_info->nb_txcfir[path] = ++ rtw89_phy_read32_mask(rtwdev, R_TXIQC + (path << 8), ++ MASKDWORD) | 0x2; ++ else ++ iqk_info->nb_txcfir[path] = 0x40000002; ++ ++ return kfail; ++} ++ ++static void _lok_res_table(struct rtw89_dev *rtwdev, u8 path, u8 ibias) ++{ ++ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]===>%s\n", __func__); ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, ibias = %x\n", path, ibias); ++ ++ rtw89_write_rf(rtwdev, path, RR_LUTWE, RFREG_MASK, 0x2); ++ if (iqk_info->iqk_band[path] == RTW89_BAND_2G) ++ rtw89_write_rf(rtwdev, path, RR_LUTWA, RFREG_MASK, 0x0); ++ else ++ rtw89_write_rf(rtwdev, path, RR_LUTWA, RFREG_MASK, 0x1); ++ rtw89_write_rf(rtwdev, path, RR_LUTWD0, RFREG_MASK, ibias); ++ rtw89_write_rf(rtwdev, path, RR_LUTWE, RFREG_MASK, 0x0); ++ rtw89_write_rf(rtwdev, path, RR_TXVBUF, RR_TXVBUF_DACEN, 0x1); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, 0x7c = %x\n", path, ++ rtw89_read_rf(rtwdev, path, RR_TXVBUF, RFREG_MASK)); ++} ++ ++static bool _lok_finetune_check(struct rtw89_dev *rtwdev, u8 path) ++{ ++ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; ++ bool is_fail1, is_fail2; ++ u32 vbuff_i; ++ u32 vbuff_q; ++ u32 core_i; ++ u32 core_q; ++ u32 tmp; ++ u8 ch; ++ ++ tmp = rtw89_read_rf(rtwdev, path, RR_TXMO, RFREG_MASK); ++ core_i = FIELD_GET(RR_TXMO_COI, tmp); ++ core_q = FIELD_GET(RR_TXMO_COQ, tmp); ++ ch = (iqk_info->iqk_times / 2) % RTW89_IQK_CHS_NR; ++ ++ if (core_i < 0x2 || core_i > 0x1d || core_q < 0x2 || core_q > 0x1d) ++ is_fail1 = true; ++ else ++ is_fail1 = false; ++ ++ iqk_info->lok_idac[ch][path] = tmp; ++ ++ tmp = rtw89_read_rf(rtwdev, path, RR_LOKVB, RFREG_MASK); ++ vbuff_i = FIELD_GET(RR_LOKVB_COI, tmp); ++ vbuff_q = FIELD_GET(RR_LOKVB_COQ, tmp); ++ ++ if (vbuff_i < 0x2 || vbuff_i > 0x3d || vbuff_q < 0x2 || vbuff_q > 0x3d) ++ is_fail2 = true; ++ else ++ is_fail2 = false; ++ ++ iqk_info->lok_vbuf[ch][path] = tmp; ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[IQK]S%x, lok_idac[%x][%x] = 0x%x\n", path, ch, path, ++ iqk_info->lok_idac[ch][path]); ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[IQK]S%x, lok_vbuf[%x][%x] = 0x%x\n", path, ch, path, ++ iqk_info->lok_vbuf[ch][path]); ++ ++ return is_fail1 | is_fail2; ++} ++ ++static bool _iqk_lok(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, u8 path) ++{ ++ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; ++ bool tmp; ++ ++ rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, B_IQK_DIF4_TXT, 0x021); ++ ++ switch (iqk_info->iqk_band[path]) { ++ case RTW89_BAND_2G: ++ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, 0x0); ++ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, 0x6); ++ break; ++ case RTW89_BAND_5G: ++ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, 0x0); ++ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, 0x4); ++ break; ++ default: ++ break; ++ } ++ ++ switch (iqk_info->iqk_band[path]) { ++ case RTW89_BAND_2G: ++ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x0); ++ break; ++ case RTW89_BAND_5G: ++ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x0); ++ break; ++ default: ++ break; ++ } ++ ++ rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), MASKDWORD, 0x9); ++ tmp = _iqk_one_shot(rtwdev, phy_idx, path, ID_FLOK_COARSE); ++ iqk_info->lok_cor_fail[0][path] = tmp; ++ ++ switch (iqk_info->iqk_band[path]) { ++ case RTW89_BAND_2G: ++ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x12); ++ break; ++ case RTW89_BAND_5G: ++ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x12); ++ break; ++ default: ++ break; ++ } ++ ++ rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), MASKDWORD, 0x24); ++ tmp = _iqk_one_shot(rtwdev, phy_idx, path, ID_FLOK_VBUFFER); ++ ++ switch (iqk_info->iqk_band[path]) { ++ case RTW89_BAND_2G: ++ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x0); ++ break; ++ case RTW89_BAND_5G: ++ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x0); ++ break; ++ default: ++ break; ++ } ++ ++ rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), MASKDWORD, 0x9); ++ rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, B_IQK_DIF4_TXT, 0x021); ++ tmp = _iqk_one_shot(rtwdev, phy_idx, path, ID_FLOK_FINE); ++ iqk_info->lok_fin_fail[0][path] = tmp; ++ ++ switch (iqk_info->iqk_band[path]) { ++ case RTW89_BAND_2G: ++ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x12); ++ break; ++ case RTW89_BAND_5G: ++ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x12); ++ break; ++ default: ++ break; ++ } ++ ++ rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), MASKDWORD, 0x24); ++ _iqk_one_shot(rtwdev, phy_idx, path, ID_FLOK_VBUFFER); ++ ++ return _lok_finetune_check(rtwdev, path); ++} ++ ++static void _iqk_txk_setting(struct rtw89_dev *rtwdev, u8 path) ++{ ++ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; ++ ++ switch (iqk_info->iqk_band[path]) { ++ case RTW89_BAND_2G: ++ rtw89_write_rf(rtwdev, path, RR_XALNA2, RR_XALNA2_SW2, 0x00); ++ rtw89_write_rf(rtwdev, path, RR_TXG1, RR_TXG1_ATT2, 0x0); ++ rtw89_write_rf(rtwdev, path, RR_TXG1, RR_TXG1_ATT1, 0x0); ++ rtw89_write_rf(rtwdev, path, RR_TXG2, RR_TXG2_ATT0, 0x1); ++ rtw89_write_rf(rtwdev, path, RR_TXGA, RR_TXGA_LOK_EXT, 0x0); ++ rtw89_write_rf(rtwdev, path, RR_LUTWE, RR_LUTWE_LOK, 0x1); ++ rtw89_write_rf(rtwdev, path, RR_LUTWA, RR_LUTWA_M1, 0x00); ++ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_IQK, 0x403e); ++ udelay(1); ++ break; ++ case RTW89_BAND_5G: ++ rtw89_write_rf(rtwdev, path, RR_XGLNA2, RR_XGLNA2_SW, 0x00); ++ rtw89_write_rf(rtwdev, path, RR_BIASA, RR_BIASA_A, 0x1); ++ rtw89_write_rf(rtwdev, path, RR_TXGA, RR_TXGA_LOK_EXT, 0x0); ++ rtw89_write_rf(rtwdev, path, RR_LUTWE, RR_LUTWE_LOK, 0x1); ++ rtw89_write_rf(rtwdev, path, RR_LUTWA, RR_LUTWA_M1, 0x80); ++ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_IQK, 0x403e); ++ udelay(1); ++ break; ++ default: ++ break; ++ } ++} ++ ++static void _iqk_txclk_setting(struct rtw89_dev *rtwdev, u8 path) ++{ ++ rtw89_phy_write32_mask(rtwdev, R_P0_NRBW, B_P0_NRBW_DBG, 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_P1_DBGMOD, B_P1_DBGMOD_ON, 0x1); ++ udelay(1); ++ rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15, 0x1f); ++ udelay(1); ++ rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15, 0x13); ++ rtw89_phy_write32_mask(rtwdev, R_ANAPAR, B_ANAPAR_15, 0x0001); ++ udelay(1); ++ rtw89_phy_write32_mask(rtwdev, R_ANAPAR, B_ANAPAR_15, 0x0041); ++} ++ ++static void _iqk_info_iqk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, u8 path) ++{ ++ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; ++ u32 tmp; ++ bool flag; ++ ++ iqk_info->thermal[path] = ++ ewma_thermal_read(&rtwdev->phystat.avg_thermal[path]); ++ iqk_info->thermal_rek_en = false; ++ ++ flag = iqk_info->lok_cor_fail[0][path]; ++ rtw89_phy_write32_mask(rtwdev, R_IQKINF, B_IQKINF_FCOR << (path * 4), flag); ++ flag = iqk_info->lok_fin_fail[0][path]; ++ rtw89_phy_write32_mask(rtwdev, R_IQKINF, B_IQKINF_FFIN << (path * 4), flag); ++ flag = iqk_info->iqk_tx_fail[0][path]; ++ rtw89_phy_write32_mask(rtwdev, R_IQKINF, B_IQKINF_FTX << (path * 4), flag); ++ flag = iqk_info->iqk_rx_fail[0][path]; ++ rtw89_phy_write32_mask(rtwdev, R_IQKINF, B_IQKINF_F_RX << (path * 4), flag); ++ ++ tmp = rtw89_phy_read32_mask(rtwdev, R_IQK_RES + (path << 8), MASKDWORD); ++ iqk_info->bp_iqkenable[path] = tmp; ++ tmp = rtw89_phy_read32_mask(rtwdev, R_TXIQC + (path << 8), MASKDWORD); ++ iqk_info->bp_txkresult[path] = tmp; ++ tmp = rtw89_phy_read32_mask(rtwdev, R_RXIQC + (path << 8), MASKDWORD); ++ iqk_info->bp_rxkresult[path] = tmp; ++ ++ rtw89_phy_write32_mask(rtwdev, R_IQKINF2, B_IQKINF2_KCNT, iqk_info->iqk_times); ++ ++ tmp = rtw89_phy_read32_mask(rtwdev, R_IQKINF, B_IQKINF_FAIL << (path * 4)); ++ if (tmp) ++ iqk_info->iqk_fail_cnt++; ++ rtw89_phy_write32_mask(rtwdev, R_IQKINF2, B_IQKINF2_FCNT << (path * 4), ++ iqk_info->iqk_fail_cnt); ++} ++ ++static void _iqk_by_path(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, u8 path) ++{ ++ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; ++ bool lok_is_fail = false; ++ const int try = 3; ++ u8 ibias = 0x1; ++ u8 i; ++ ++ _iqk_txclk_setting(rtwdev, path); ++ ++ /* LOK */ ++ for (i = 0; i < try; i++) { ++ _lok_res_table(rtwdev, path, ibias++); ++ _iqk_txk_setting(rtwdev, path); ++ lok_is_fail = _iqk_lok(rtwdev, phy_idx, path); ++ if (!lok_is_fail) ++ break; ++ } ++ ++ if (lok_is_fail) ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] LOK (%d) fail\n", path); ++ ++ /* TXK */ ++ if (iqk_info->is_nbiqk) ++ iqk_info->iqk_tx_fail[0][path] = _iqk_nbtxk(rtwdev, phy_idx, path); ++ else ++ iqk_info->iqk_tx_fail[0][path] = _txk_group_sel(rtwdev, phy_idx, path); ++ ++ /* RX */ ++ _iqk_rxclk_setting(rtwdev, path); ++ _iqk_rxk_setting(rtwdev, path); ++ if (iqk_info->is_nbiqk) ++ iqk_info->iqk_rx_fail[0][path] = _iqk_nbrxk(rtwdev, phy_idx, path); ++ else ++ iqk_info->iqk_rx_fail[0][path] = _rxk_group_sel(rtwdev, phy_idx, path); ++ ++ _iqk_info_iqk(rtwdev, phy_idx, path); ++} ++ ++static void _iqk_get_ch_info(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, u8 path) ++{ ++ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); ++ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; ++ u32 reg_rf18; ++ u32 reg_35c; ++ u8 idx; ++ u8 get_empty_table = false; ++ ++ for (idx = 0; idx < RTW89_IQK_CHS_NR; idx++) { ++ if (iqk_info->iqk_mcc_ch[idx][path] == 0) { ++ get_empty_table = true; ++ break; ++ } ++ } ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] (1)idx = %x\n", idx); ++ ++ if (!get_empty_table) { ++ idx = iqk_info->iqk_table_idx[path] + 1; ++ if (idx > 1) ++ idx = 0; ++ } ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] (2)idx = %x\n", idx); ++ ++ reg_rf18 = rtw89_read_rf(rtwdev, path, RR_CFGCH, RFREG_MASK); ++ reg_35c = rtw89_phy_read32_mask(rtwdev, R_CIRST, B_CIRST_SYN); ++ ++ iqk_info->iqk_band[path] = chan->band_type; ++ iqk_info->iqk_bw[path] = chan->band_width; ++ iqk_info->iqk_ch[path] = chan->channel; ++ iqk_info->iqk_mcc_ch[idx][path] = chan->channel; ++ iqk_info->iqk_table_idx[path] = idx; ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, 0x18= 0x%x, idx = %x\n", ++ path, reg_rf18, idx); ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, 0x18= 0x%x\n", ++ path, reg_rf18); ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]times = 0x%x, ch =%x\n", ++ iqk_info->iqk_times, idx); ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]iqk_mcc_ch[%x][%x] = 0x%x\n", ++ idx, path, iqk_info->iqk_mcc_ch[idx][path]); ++ ++ if (reg_35c == 0x01) ++ iqk_info->syn1to2 = 0x1; ++ else ++ iqk_info->syn1to2 = 0x0; ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[IQK]S%x, iqk_info->syn1to2= 0x%x\n", path, ++ iqk_info->syn1to2); ++ ++ rtw89_phy_write32_mask(rtwdev, R_IQKINF, B_IQKINF_VER, RTW8852B_IQK_VER); ++ /* 2GHz/5GHz/6GHz = 0/1/2 */ ++ rtw89_phy_write32_mask(rtwdev, R_IQKCH, B_IQKCH_BAND << (path * 16), ++ iqk_info->iqk_band[path]); ++ /* 20/40/80 = 0/1/2 */ ++ rtw89_phy_write32_mask(rtwdev, R_IQKCH, B_IQKCH_BW << (path * 16), ++ iqk_info->iqk_bw[path]); ++ rtw89_phy_write32_mask(rtwdev, R_IQKCH, B_IQKCH_CH << (path * 16), ++ iqk_info->iqk_ch[path]); ++} ++ ++static void _iqk_start_iqk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, u8 path) ++{ ++ _iqk_by_path(rtwdev, phy_idx, path); ++} ++ ++static void _iqk_restore(struct rtw89_dev *rtwdev, u8 path) ++{ ++ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; ++ bool fail; ++ ++ rtw89_phy_write32_mask(rtwdev, R_TXIQC + (path << 8), MASKDWORD, ++ iqk_info->nb_txcfir[path]); ++ rtw89_phy_write32_mask(rtwdev, R_RXIQC + (path << 8), MASKDWORD, ++ iqk_info->nb_rxcfir[path]); ++ rtw89_phy_write32_mask(rtwdev, R_NCTL_CFG, MASKDWORD, ++ 0x00000e19 + (path << 4)); ++ fail = _iqk_check_cal(rtwdev, path); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "%s result =%x\n", __func__, fail); ++ ++ rtw89_phy_write32_mask(rtwdev, R_NCTL_N1, B_NCTL_N1_CIP, 0x00); ++ rtw89_phy_write32_mask(rtwdev, R_NCTL_RPT, MASKDWORD, 0x00000000); ++ rtw89_phy_write32_mask(rtwdev, R_KIP_SYSCFG, MASKDWORD, 0x80000000); ++ rtw89_phy_write32_mask(rtwdev, R_CFIR_SYS, B_IQK_RES_K, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_IQRSN, B_IQRSN_K1, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_IQRSN, B_IQRSN_K2, 0x0); ++ rtw89_write_rf(rtwdev, path, RR_LUTWE, RR_LUTWE_LOK, 0x0); ++ rtw89_write_rf(rtwdev, path, RR_LUTWE, RR_LUTWE_LOK, 0x0); ++ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, 0x3); ++ rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x1); ++ rtw89_write_rf(rtwdev, path, RR_BBDC, RR_BBDC_SEL, 0x1); ++} ++ ++static void _iqk_afebb_restore(struct rtw89_dev *rtwdev, ++ enum rtw89_phy_idx phy_idx, u8 path) ++{ ++ const struct rtw89_reg3_def *def; ++ int size; ++ u8 kpath; ++ int i; ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "===> %s\n", __func__); ++ ++ kpath = _kpath(rtwdev, phy_idx); ++ ++ switch (kpath) { ++ case RF_A: ++ case RF_B: ++ return; ++ default: ++ size = ARRAY_SIZE(rtw8852b_restore_nondbcc_path01); ++ def = rtw8852b_restore_nondbcc_path01; ++ break; ++ } ++ ++ for (i = 0; i < size; i++, def++) ++ rtw89_phy_write32_mask(rtwdev, def->addr, def->mask, def->data); ++} ++ ++static void _iqk_preset(struct rtw89_dev *rtwdev, u8 path) ++{ ++ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; ++ u8 idx; ++ ++ idx = iqk_info->iqk_table_idx[path]; ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] (3)idx = %x\n", idx); ++ ++ rtw89_phy_write32_mask(rtwdev, R_COEF_SEL + (path << 8), B_COEF_SEL_IQC, idx); ++ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_G3, idx); ++ ++ rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x0); ++ rtw89_write_rf(rtwdev, path, RR_BBDC, RR_BBDC_SEL, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_NCTL_RPT, MASKDWORD, 0x00000080); ++ rtw89_phy_write32_mask(rtwdev, R_KIP_SYSCFG, MASKDWORD, 0x81ff010a); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK](1)S%x, 0x8%x54 = 0x%x\n", path, 1 << path, ++ rtw89_phy_read32_mask(rtwdev, R_CFIR_LUT + (path << 8), MASKDWORD)); ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK](1)S%x, 0x8%x04 = 0x%x\n", path, 1 << path, ++ rtw89_phy_read32_mask(rtwdev, R_COEF_SEL + (path << 8), MASKDWORD)); ++} ++ ++static void _iqk_macbb_setting(struct rtw89_dev *rtwdev, ++ enum rtw89_phy_idx phy_idx, u8 path) ++{ ++ const struct rtw89_reg3_def *def; ++ int size; ++ u8 kpath; ++ int i; ++ ++ kpath = _kpath(rtwdev, phy_idx); ++ ++ switch (kpath) { ++ case RF_A: ++ case RF_B: ++ return; ++ default: ++ size = ARRAY_SIZE(rtw8852b_set_nondbcc_path01); ++ def = rtw8852b_set_nondbcc_path01; ++ break; ++ } ++ ++ for (i = 0; i < size; i++, def++) ++ rtw89_phy_write32_mask(rtwdev, def->addr, def->mask, def->data); ++} ++ ++static void _iqk_init(struct rtw89_dev *rtwdev) ++{ ++ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; ++ u8 idx, path; ++ ++ rtw89_phy_write32_mask(rtwdev, R_IQKINF, MASKDWORD, 0x0); ++ if (iqk_info->is_iqk_init) ++ return; ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]===>%s\n", __func__); ++ iqk_info->is_iqk_init = true; ++ iqk_info->is_nbiqk = false; ++ iqk_info->iqk_fft_en = false; ++ iqk_info->iqk_sram_en = false; ++ iqk_info->iqk_cfir_en = false; ++ iqk_info->iqk_xym_en = false; ++ iqk_info->thermal_rek_en = false; ++ iqk_info->iqk_times = 0x0; ++ ++ for (idx = 0; idx < RTW89_IQK_CHS_NR; idx++) { ++ iqk_info->iqk_channel[idx] = 0x0; ++ for (path = 0; path < RTW8852B_IQK_SS; path++) { ++ iqk_info->lok_cor_fail[idx][path] = false; ++ iqk_info->lok_fin_fail[idx][path] = false; ++ iqk_info->iqk_tx_fail[idx][path] = false; ++ iqk_info->iqk_rx_fail[idx][path] = false; ++ iqk_info->iqk_mcc_ch[idx][path] = 0x0; ++ iqk_info->iqk_table_idx[path] = 0x0; ++ } ++ } ++} ++ ++static void _wait_rx_mode(struct rtw89_dev *rtwdev, u8 kpath) ++{ ++ u32 rf_mode; ++ u8 path; ++ int ret; ++ ++ for (path = 0; path < RF_PATH_MAX; path++) { ++ if (!(kpath & BIT(path))) ++ continue; ++ ++ ret = read_poll_timeout_atomic(rtw89_read_rf, rf_mode, ++ rf_mode != 2, 2, 5000, false, ++ rtwdev, path, RR_MOD, RR_MOD_MASK); ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[RFK] Wait S%d to Rx mode!! (ret = %d)\n", path, ret); ++ } ++} ++ ++static void _tmac_tx_pause(struct rtw89_dev *rtwdev, enum rtw89_phy_idx band_idx, ++ bool is_pause) ++{ ++ if (!is_pause) ++ return; ++ ++ _wait_rx_mode(rtwdev, _kpath(rtwdev, band_idx)); ++} ++ ++static void _doiqk(struct rtw89_dev *rtwdev, bool force, ++ enum rtw89_phy_idx phy_idx, u8 path) ++{ ++ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; ++ u32 backup_bb_val[BACKUP_BB_REGS_NR]; ++ u32 backup_rf_val[RTW8852B_IQK_SS][BACKUP_RF_REGS_NR]; ++ u8 phy_map = rtw89_btc_phymap(rtwdev, phy_idx, RF_AB); ++ ++ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_IQK, BTC_WRFK_ONESHOT_START); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[IQK]==========IQK strat!!!!!==========\n"); ++ iqk_info->iqk_times++; ++ iqk_info->kcount = 0; ++ iqk_info->version = RTW8852B_IQK_VER; ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]Test Ver 0x%x\n", iqk_info->version); ++ _iqk_get_ch_info(rtwdev, phy_idx, path); ++ ++ _rfk_backup_bb_reg(rtwdev, &backup_bb_val[0]); ++ _rfk_backup_rf_reg(rtwdev, &backup_rf_val[path][0], path); ++ _iqk_macbb_setting(rtwdev, phy_idx, path); ++ _iqk_preset(rtwdev, path); ++ _iqk_start_iqk(rtwdev, phy_idx, path); ++ _iqk_restore(rtwdev, path); ++ _iqk_afebb_restore(rtwdev, phy_idx, path); ++ _rfk_restore_bb_reg(rtwdev, &backup_bb_val[0]); ++ _rfk_restore_rf_reg(rtwdev, &backup_rf_val[path][0], path); ++ ++ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_IQK, BTC_WRFK_ONESHOT_STOP); ++} ++ ++static void _iqk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, bool force) ++{ ++ u8 kpath = _kpath(rtwdev, phy_idx); ++ ++ switch (kpath) { ++ case RF_A: ++ _doiqk(rtwdev, force, phy_idx, RF_PATH_A); ++ break; ++ case RF_B: ++ _doiqk(rtwdev, force, phy_idx, RF_PATH_B); ++ break; ++ case RF_AB: ++ _doiqk(rtwdev, force, phy_idx, RF_PATH_A); ++ _doiqk(rtwdev, force, phy_idx, RF_PATH_B); ++ break; ++ default: ++ break; ++ } ++} ++ ++static void _dpk_bkup_kip(struct rtw89_dev *rtwdev, const u32 reg[], ++ u32 reg_bkup[][RTW8852B_DPK_KIP_REG_NUM], u8 path) ++{ ++ u8 i; ++ ++ for (i = 0; i < RTW8852B_DPK_KIP_REG_NUM; i++) { ++ reg_bkup[path][i] = ++ rtw89_phy_read32_mask(rtwdev, reg[i] + (path << 8), MASKDWORD); ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] Backup 0x%x = %x\n", ++ reg[i] + (path << 8), reg_bkup[path][i]); ++ } ++} ++ ++static void _dpk_reload_kip(struct rtw89_dev *rtwdev, const u32 reg[], ++ const u32 reg_bkup[][RTW8852B_DPK_KIP_REG_NUM], u8 path) ++{ ++ u8 i; ++ ++ for (i = 0; i < RTW8852B_DPK_KIP_REG_NUM; i++) { ++ rtw89_phy_write32_mask(rtwdev, reg[i] + (path << 8), MASKDWORD, ++ reg_bkup[path][i]); ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] Reload 0x%x = %x\n", ++ reg[i] + (path << 8), reg_bkup[path][i]); ++ } ++} ++ ++static u8 _dpk_order_convert(struct rtw89_dev *rtwdev) ++{ ++ u8 order; ++ u8 val; ++ ++ order = rtw89_phy_read32_mask(rtwdev, R_LDL_NORM, B_LDL_NORM_OP); ++ val = 0x3 >> order; ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] convert MDPD order to 0x%x\n", val); ++ ++ return val; ++} ++ ++static void _dpk_onoff(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, bool off) ++{ ++ struct rtw89_dpk_info *dpk = &rtwdev->dpk; ++ u8 val, kidx = dpk->cur_idx[path]; ++ ++ val = dpk->is_dpk_enable && !off && dpk->bp[path][kidx].path_ok; ++ ++ rtw89_phy_write32_mask(rtwdev, R_DPD_CH0A + (path << 8) + (kidx << 2), ++ MASKBYTE3, _dpk_order_convert(rtwdev) << 1 | val); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d[%d] DPK %s !!!\n", path, ++ kidx, dpk->is_dpk_enable && !off ? "enable" : "disable"); ++} ++ ++static void _dpk_one_shot(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, ++ enum rtw89_rf_path path, enum rtw8852b_dpk_id id) ++{ ++ u16 dpk_cmd; ++ u32 val; ++ int ret; ++ ++ dpk_cmd = (id << 8) | (0x19 + (path << 4)); ++ rtw89_phy_write32_mask(rtwdev, R_NCTL_CFG, MASKDWORD, dpk_cmd); ++ ++ ret = read_poll_timeout_atomic(rtw89_phy_read32_mask, val, val == 0x55, ++ 1, 20000, false, ++ rtwdev, 0xbff8, MASKBYTE0); ++ if (ret) ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] one-shot over 20ms!!!!\n"); ++ ++ udelay(1); ++ ++ rtw89_phy_write32_mask(rtwdev, R_KIP_RPT1, MASKDWORD, 0x00030000); ++ ++ ret = read_poll_timeout_atomic(rtw89_phy_read32_mask, val, val == 0x8000, ++ 1, 2000, false, ++ rtwdev, 0x80fc, MASKLWORD); ++ if (ret) ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] one-shot over 20ms!!!!\n"); ++ ++ rtw89_phy_write32_mask(rtwdev, R_NCTL_N1, MASKBYTE0, 0x0); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[DPK] one-shot for %s = 0x%x\n", ++ id == 0x06 ? "LBK_RXIQK" : ++ id == 0x10 ? "SYNC" : ++ id == 0x11 ? "MDPK_IDL" : ++ id == 0x12 ? "MDPK_MPA" : ++ id == 0x13 ? "GAIN_LOSS" : ++ id == 0x14 ? "PWR_CAL" : ++ id == 0x15 ? "DPK_RXAGC" : ++ id == 0x16 ? "KIP_PRESET" : ++ id == 0x17 ? "KIP_RESTORE" : "DPK_TXAGC", ++ dpk_cmd); ++} ++ ++static void _dpk_rx_dck(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, ++ enum rtw89_rf_path path) ++{ ++ rtw89_write_rf(rtwdev, path, RR_RXBB2, RR_EN_TIA_IDA, 0x3); ++ _set_rx_dck(rtwdev, phy, path); ++} ++ ++static void _dpk_information(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, ++ enum rtw89_rf_path path) ++{ ++ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); ++ struct rtw89_dpk_info *dpk = &rtwdev->dpk; ++ ++ u8 kidx = dpk->cur_idx[path]; ++ ++ dpk->bp[path][kidx].band = chan->band_type; ++ dpk->bp[path][kidx].ch = chan->channel; ++ dpk->bp[path][kidx].bw = chan->band_width; ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[DPK] S%d[%d] (PHY%d): TSSI %s/ DBCC %s/ %s/ CH%d/ %s\n", ++ path, dpk->cur_idx[path], phy, ++ rtwdev->is_tssi_mode[path] ? "on" : "off", ++ rtwdev->dbcc_en ? "on" : "off", ++ dpk->bp[path][kidx].band == 0 ? "2G" : ++ dpk->bp[path][kidx].band == 1 ? "5G" : "6G", ++ dpk->bp[path][kidx].ch, ++ dpk->bp[path][kidx].bw == 0 ? "20M" : ++ dpk->bp[path][kidx].bw == 1 ? "40M" : "80M"); ++} ++ ++static void _dpk_bb_afe_setting(struct rtw89_dev *rtwdev, ++ enum rtw89_phy_idx phy, ++ enum rtw89_rf_path path, u8 kpath) ++{ ++ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); ++ ++ rtw89_rfk_parser(rtwdev, &rtw8852b_dpk_afe_defs_tbl); ++ ++ if (chan->band_width == RTW89_CHANNEL_WIDTH_80) { ++ rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW1, B_P0_CFCH_EX, 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_PATH1_BW_SEL_V1, B_PATH1_BW_SEL_EX, 0x1); ++ } ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[DPK] Set BB/AFE for PHY%d (kpath=%d)\n", phy, kpath); ++} ++ ++static void _dpk_bb_afe_restore(struct rtw89_dev *rtwdev, ++ enum rtw89_phy_idx phy, ++ enum rtw89_rf_path path, u8 kpath) ++{ ++ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); ++ ++ rtw89_rfk_parser(rtwdev, &rtw8852b_dpk_afe_restore_defs_tbl); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[DPK] Restore BB/AFE for PHY%d (kpath=%d)\n", phy, kpath); ++ ++ if (chan->band_width == RTW89_CHANNEL_WIDTH_80) { ++ rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW1, B_P0_CFCH_EX, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_PATH1_BW_SEL_V1, B_PATH1_BW_SEL_EX, 0x0); ++ } ++} ++ ++static void _dpk_tssi_pause(struct rtw89_dev *rtwdev, ++ enum rtw89_rf_path path, bool is_pause) ++{ ++ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK + (path << 13), ++ B_P0_TSSI_TRK_EN, is_pause); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d TSSI %s\n", path, ++ is_pause ? "pause" : "resume"); ++} ++ ++static void _dpk_kip_restore(struct rtw89_dev *rtwdev, ++ enum rtw89_rf_path path) ++{ ++ rtw89_rfk_parser(rtwdev, &rtw8852b_dpk_kip_defs_tbl); ++ ++ if (rtwdev->hal.cv > CHIP_CAV) ++ rtw89_phy_write32_mask(rtwdev, R_DPD_COM + (path << 8), B_DPD_COM_OF, 0x1); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d restore KIP\n", path); ++} ++ ++static void _dpk_lbk_rxiqk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, ++ enum rtw89_rf_path path) ++{ ++ u8 cur_rxbb; ++ u32 tmp; ++ ++ cur_rxbb = rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASKRXBB); ++ ++ rtw89_phy_write32_mask(rtwdev, R_MDPK_RX_DCK, B_MDPK_RX_DCK_EN, 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_IQK_RES + (path << 8), B_IQK_RES_RXCFIR, 0x0); ++ ++ tmp = rtw89_read_rf(rtwdev, path, RR_CFGCH, RFREG_MASK); ++ rtw89_write_rf(rtwdev, path, RR_RSV4, RFREG_MASK, tmp); ++ rtw89_write_rf(rtwdev, path, RR_MOD, RFREG_MASKMODE, 0xd); ++ rtw89_write_rf(rtwdev, path, RR_RXK, RR_RXK_PLLEN, 0x1); ++ ++ if (cur_rxbb >= 0x11) ++ rtw89_write_rf(rtwdev, path, RR_TXIQK, RR_TXIQK_ATT1, 0x13); ++ else if (cur_rxbb <= 0xa) ++ rtw89_write_rf(rtwdev, path, RR_TXIQK, RR_TXIQK_ATT1, 0x00); ++ else ++ rtw89_write_rf(rtwdev, path, RR_TXIQK, RR_TXIQK_ATT1, 0x05); ++ ++ rtw89_write_rf(rtwdev, path, RR_XGLNA2, RR_XGLNA2_SW, 0x0); ++ rtw89_write_rf(rtwdev, path, RR_RXKPLL, RR_RXKPLL_POW, 0x0); ++ rtw89_write_rf(rtwdev, path, RR_RXKPLL, RFREG_MASK, 0x80014); ++ udelay(70); ++ ++ rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, B_P0_RFCTM_EN, 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, B_IQK_DIF4_RXT, 0x025); ++ ++ _dpk_one_shot(rtwdev, phy, path, LBK_RXIQK); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d LBK RXIQC = 0x%x\n", path, ++ rtw89_phy_read32_mask(rtwdev, R_RXIQC, MASKDWORD)); ++ ++ rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, B_P0_RFCTM_EN, 0x0); ++ rtw89_write_rf(rtwdev, path, RR_RXK, RR_RXK_PLLEN, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_MDPK_RX_DCK, B_MDPK_RX_DCK_EN, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_KPATH_CFG, B_KPATH_CFG_ED, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_LOAD_COEF + (path << 8), B_LOAD_COEF_DI, 0x1); ++ rtw89_write_rf(rtwdev, path, RR_MOD, RFREG_MASKMODE, 0x5); ++} ++ ++static void _dpk_get_thermal(struct rtw89_dev *rtwdev, u8 kidx, enum rtw89_rf_path path) ++{ ++ struct rtw89_dpk_info *dpk = &rtwdev->dpk; ++ ++ rtw89_write_rf(rtwdev, path, RR_TM, RR_TM_TRI, 0x1); ++ rtw89_write_rf(rtwdev, path, RR_TM, RR_TM_TRI, 0x0); ++ rtw89_write_rf(rtwdev, path, RR_TM, RR_TM_TRI, 0x1); ++ ++ udelay(200); ++ ++ dpk->bp[path][kidx].ther_dpk = rtw89_read_rf(rtwdev, path, RR_TM, RR_TM_VAL); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] thermal@DPK = 0x%x\n", ++ dpk->bp[path][kidx].ther_dpk); ++} ++ ++static void _dpk_rf_setting(struct rtw89_dev *rtwdev, u8 gain, ++ enum rtw89_rf_path path, u8 kidx) ++{ ++ struct rtw89_dpk_info *dpk = &rtwdev->dpk; ++ ++ if (dpk->bp[path][kidx].band == RTW89_BAND_2G) { ++ rtw89_write_rf(rtwdev, path, RR_MOD, RFREG_MASK, 0x50220); ++ rtw89_write_rf(rtwdev, path, RR_RXBB, RR_RXBB_FATT, 0xf2); ++ rtw89_write_rf(rtwdev, path, RR_LUTDBG, RR_LUTDBG_TIA, 0x1); ++ rtw89_write_rf(rtwdev, path, RR_TIA, RR_TIA_N6, 0x1); ++ } else { ++ rtw89_write_rf(rtwdev, path, RR_MOD, RFREG_MASK, 0x50220); ++ rtw89_write_rf(rtwdev, path, RR_RXA2, RR_RAA2_SWATT, 0x5); ++ rtw89_write_rf(rtwdev, path, RR_LUTDBG, RR_LUTDBG_TIA, 0x1); ++ rtw89_write_rf(rtwdev, path, RR_TIA, RR_TIA_N6, 0x1); ++ rtw89_write_rf(rtwdev, path, RR_RXA_LNA, RFREG_MASK, 0x920FC); ++ rtw89_write_rf(rtwdev, path, RR_XALNA2, RFREG_MASK, 0x002C0); ++ rtw89_write_rf(rtwdev, path, RR_IQGEN, RFREG_MASK, 0x38800); ++ } ++ ++ rtw89_write_rf(rtwdev, path, RR_RCKD, RR_RCKD_BW, 0x1); ++ rtw89_write_rf(rtwdev, path, RR_BTC, RR_BTC_TXBB, dpk->bp[path][kidx].bw + 1); ++ rtw89_write_rf(rtwdev, path, RR_BTC, RR_BTC_RXBB, 0x0); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[DPK] ARF 0x0/0x11/0x1a = 0x%x/ 0x%x/ 0x%x\n", ++ rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK), ++ rtw89_read_rf(rtwdev, path, RR_TXIG, RFREG_MASK), ++ rtw89_read_rf(rtwdev, path, RR_BTC, RFREG_MASK)); ++} ++ ++static void _dpk_bypass_rxcfir(struct rtw89_dev *rtwdev, ++ enum rtw89_rf_path path, bool is_bypass) ++{ ++ if (is_bypass) { ++ rtw89_phy_write32_mask(rtwdev, R_RXIQC + (path << 8), ++ B_RXIQC_BYPASS2, 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_RXIQC + (path << 8), ++ B_RXIQC_BYPASS, 0x1); ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[DPK] Bypass RXIQC (0x8%d3c = 0x%x)\n", 1 + path, ++ rtw89_phy_read32_mask(rtwdev, R_RXIQC + (path << 8), ++ MASKDWORD)); ++ } else { ++ rtw89_phy_write32_clr(rtwdev, R_RXIQC + (path << 8), B_RXIQC_BYPASS2); ++ rtw89_phy_write32_clr(rtwdev, R_RXIQC + (path << 8), B_RXIQC_BYPASS); ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[DPK] restore 0x8%d3c = 0x%x\n", 1 + path, ++ rtw89_phy_read32_mask(rtwdev, R_RXIQC + (path << 8), ++ MASKDWORD)); ++ } ++} ++ ++static ++void _dpk_tpg_sel(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, u8 kidx) ++{ ++ struct rtw89_dpk_info *dpk = &rtwdev->dpk; ++ ++ if (dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_80) ++ rtw89_phy_write32_clr(rtwdev, R_TPG_MOD, B_TPG_MOD_F); ++ else if (dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_40) ++ rtw89_phy_write32_mask(rtwdev, R_TPG_MOD, B_TPG_MOD_F, 0x2); ++ else ++ rtw89_phy_write32_mask(rtwdev, R_TPG_MOD, B_TPG_MOD_F, 0x1); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] TPG_Select for %s\n", ++ dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_80 ? "80M" : ++ dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_40 ? "40M" : "20M"); ++} ++ ++static void _dpk_table_select(struct rtw89_dev *rtwdev, ++ enum rtw89_rf_path path, u8 kidx, u8 gain) ++{ ++ u8 val; ++ ++ val = 0x80 + kidx * 0x20 + gain * 0x10; ++ rtw89_phy_write32_mask(rtwdev, R_DPD_CH0 + (path << 8), MASKBYTE3, val); ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[DPK] table select for Kidx[%d], Gain[%d] (0x%x)\n", kidx, ++ gain, val); ++} ++ ++static bool _dpk_sync_check(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, u8 kidx) ++{ ++#define DPK_SYNC_TH_DC_I 200 ++#define DPK_SYNC_TH_DC_Q 200 ++#define DPK_SYNC_TH_CORR 170 ++ struct rtw89_dpk_info *dpk = &rtwdev->dpk; ++ u16 dc_i, dc_q; ++ u8 corr_val, corr_idx; ++ ++ rtw89_phy_write32_clr(rtwdev, R_KIP_RPT1, B_KIP_RPT1_SEL); ++ ++ corr_idx = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, B_PRT_COM_CORI); ++ corr_val = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, B_PRT_COM_CORV); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[DPK] S%d Corr_idx / Corr_val = %d / %d\n", ++ path, corr_idx, corr_val); ++ ++ dpk->corr_idx[path][kidx] = corr_idx; ++ dpk->corr_val[path][kidx] = corr_val; ++ ++ rtw89_phy_write32_mask(rtwdev, R_KIP_RPT1, B_KIP_RPT1_SEL, 0x9); ++ ++ dc_i = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, B_PRT_COM_DCI); ++ dc_q = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, B_PRT_COM_DCQ); ++ ++ dc_i = abs(sign_extend32(dc_i, 11)); ++ dc_q = abs(sign_extend32(dc_q, 11)); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d DC I/Q, = %d / %d\n", ++ path, dc_i, dc_q); ++ ++ dpk->dc_i[path][kidx] = dc_i; ++ dpk->dc_q[path][kidx] = dc_q; ++ ++ if (dc_i > DPK_SYNC_TH_DC_I || dc_q > DPK_SYNC_TH_DC_Q || ++ corr_val < DPK_SYNC_TH_CORR) ++ return true; ++ else ++ return false; ++} ++ ++static bool _dpk_sync(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, ++ enum rtw89_rf_path path, u8 kidx) ++{ ++ _dpk_one_shot(rtwdev, phy, path, SYNC); ++ ++ return _dpk_sync_check(rtwdev, path, kidx); ++} ++ ++static u16 _dpk_dgain_read(struct rtw89_dev *rtwdev) ++{ ++ u16 dgain; ++ ++ rtw89_phy_write32_mask(rtwdev, R_KIP_RPT1, B_KIP_RPT1_SEL, 0x0); ++ ++ dgain = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, B_PRT_COM_DCI); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] DGain = 0x%x\n", dgain); ++ ++ return dgain; ++} ++ ++static s8 _dpk_dgain_mapping(struct rtw89_dev *rtwdev, u16 dgain) ++{ ++ static const u16 bnd[15] = { ++ 0xbf1, 0xaa5, 0x97d, 0x875, 0x789, 0x6b7, 0x5fc, 0x556, ++ 0x4c1, 0x43d, 0x3c7, 0x35e, 0x2ac, 0x262, 0x220 ++ }; ++ s8 offset; ++ ++ if (dgain >= bnd[0]) ++ offset = 0x6; ++ else if (bnd[0] > dgain && dgain >= bnd[1]) ++ offset = 0x6; ++ else if (bnd[1] > dgain && dgain >= bnd[2]) ++ offset = 0x5; ++ else if (bnd[2] > dgain && dgain >= bnd[3]) ++ offset = 0x4; ++ else if (bnd[3] > dgain && dgain >= bnd[4]) ++ offset = 0x3; ++ else if (bnd[4] > dgain && dgain >= bnd[5]) ++ offset = 0x2; ++ else if (bnd[5] > dgain && dgain >= bnd[6]) ++ offset = 0x1; ++ else if (bnd[6] > dgain && dgain >= bnd[7]) ++ offset = 0x0; ++ else if (bnd[7] > dgain && dgain >= bnd[8]) ++ offset = 0xff; ++ else if (bnd[8] > dgain && dgain >= bnd[9]) ++ offset = 0xfe; ++ else if (bnd[9] > dgain && dgain >= bnd[10]) ++ offset = 0xfd; ++ else if (bnd[10] > dgain && dgain >= bnd[11]) ++ offset = 0xfc; ++ else if (bnd[11] > dgain && dgain >= bnd[12]) ++ offset = 0xfb; ++ else if (bnd[12] > dgain && dgain >= bnd[13]) ++ offset = 0xfa; ++ else if (bnd[13] > dgain && dgain >= bnd[14]) ++ offset = 0xf9; ++ else if (bnd[14] > dgain) ++ offset = 0xf8; ++ else ++ offset = 0x0; ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] DGain offset = %d\n", offset); ++ ++ return offset; ++} ++ ++static u8 _dpk_gainloss_read(struct rtw89_dev *rtwdev) ++{ ++ rtw89_phy_write32_mask(rtwdev, R_KIP_RPT1, B_KIP_RPT1_SEL, 0x6); ++ rtw89_phy_write32_mask(rtwdev, R_DPK_CFG2, B_DPK_CFG2_ST, 0x1); ++ ++ return rtw89_phy_read32_mask(rtwdev, R_RPT_COM, B_PRT_COM_GL); ++} ++ ++static void _dpk_gainloss(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, ++ enum rtw89_rf_path path, u8 kidx) ++{ ++ _dpk_table_select(rtwdev, path, kidx, 1); ++ _dpk_one_shot(rtwdev, phy, path, GAIN_LOSS); ++} ++ ++static void _dpk_kip_preset(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, ++ enum rtw89_rf_path path, u8 kidx) ++{ ++ _dpk_tpg_sel(rtwdev, path, kidx); ++ _dpk_one_shot(rtwdev, phy, path, KIP_PRESET); ++} ++ ++static void _dpk_kip_pwr_clk_on(struct rtw89_dev *rtwdev, ++ enum rtw89_rf_path path) ++{ ++ rtw89_phy_write32_mask(rtwdev, R_NCTL_RPT, MASKDWORD, 0x00000080); ++ rtw89_phy_write32_mask(rtwdev, R_KIP_SYSCFG, MASKDWORD, 0x807f030a); ++ rtw89_phy_write32_mask(rtwdev, R_CFIR_SYS + (path << 8), MASKDWORD, 0xce000a08); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] KIP Power/CLK on\n"); ++} ++ ++static void _dpk_kip_set_txagc(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, ++ enum rtw89_rf_path path, u8 txagc) ++{ ++ rtw89_write_rf(rtwdev, path, RR_TXAGC, RFREG_MASK, txagc); ++ rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, B_P0_RFCTM_EN, 0x1); ++ _dpk_one_shot(rtwdev, phy, path, DPK_TXAGC); ++ rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, B_P0_RFCTM_EN, 0x0); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] set TXAGC = 0x%x\n", txagc); ++} ++ ++static void _dpk_kip_set_rxagc(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, ++ enum rtw89_rf_path path) ++{ ++ u32 tmp; ++ ++ tmp = rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK); ++ rtw89_phy_write32_mask(rtwdev, R_KIP_MOD, B_KIP_MOD, tmp); ++ rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, B_P0_RFCTM_EN, 0x1); ++ _dpk_one_shot(rtwdev, phy, path, DPK_RXAGC); ++ rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, B_P0_RFCTM_EN, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_KIP_RPT1, B_KIP_RPT1_SEL_V1, 0x8); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[DPK] set RXBB = 0x%x (RF0x0[9:5] = 0x%x)\n", ++ rtw89_phy_read32_mask(rtwdev, R_RPT_COM, B_PRT_COM_RXBB_V1), ++ rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASKRXBB)); ++} ++ ++static u8 _dpk_set_offset(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, ++ enum rtw89_rf_path path, s8 gain_offset) ++{ ++ u8 txagc; ++ ++ txagc = rtw89_read_rf(rtwdev, path, RR_TXAGC, RFREG_MASK); ++ ++ if (txagc - gain_offset < DPK_TXAGC_LOWER) ++ txagc = DPK_TXAGC_LOWER; ++ else if (txagc - gain_offset > DPK_TXAGC_UPPER) ++ txagc = DPK_TXAGC_UPPER; ++ else ++ txagc = txagc - gain_offset; ++ ++ _dpk_kip_set_txagc(rtwdev, phy, path, txagc); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] tmp_txagc (GL=%d) = 0x%x\n", ++ gain_offset, txagc); ++ return txagc; ++} ++ ++static bool _dpk_pas_read(struct rtw89_dev *rtwdev, bool is_check) ++{ ++ u32 val1_i = 0, val1_q = 0, val2_i = 0, val2_q = 0; ++ u8 i; ++ ++ rtw89_phy_write32_mask(rtwdev, R_KIP_RPT1, MASKBYTE2, 0x06); ++ rtw89_phy_write32_mask(rtwdev, R_DPK_CFG2, B_DPK_CFG2_ST, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_DPK_CFG3, MASKBYTE2, 0x08); ++ ++ if (is_check) { ++ rtw89_phy_write32_mask(rtwdev, R_DPK_CFG3, MASKBYTE3, 0x00); ++ val1_i = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, MASKHWORD); ++ val1_i = abs(sign_extend32(val1_i, 11)); ++ val1_q = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, MASKLWORD); ++ val1_q = abs(sign_extend32(val1_q, 11)); ++ ++ rtw89_phy_write32_mask(rtwdev, R_DPK_CFG3, MASKBYTE3, 0x1f); ++ val2_i = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, MASKHWORD); ++ val2_i = abs(sign_extend32(val2_i, 11)); ++ val2_q = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, MASKLWORD); ++ val2_q = abs(sign_extend32(val2_q, 11)); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] PAS_delta = 0x%x\n", ++ phy_div(val1_i * val1_i + val1_q * val1_q, ++ val2_i * val2_i + val2_q * val2_q)); ++ } else { ++ for (i = 0; i < 32; i++) { ++ rtw89_phy_write32_mask(rtwdev, R_DPK_CFG3, MASKBYTE3, i); ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[DPK] PAS_Read[%02d]= 0x%08x\n", i, ++ rtw89_phy_read32_mask(rtwdev, R_RPT_COM, MASKDWORD)); ++ } ++ } ++ ++ if (val1_i * val1_i + val1_q * val1_q >= ++ (val2_i * val2_i + val2_q * val2_q) * 8 / 5) ++ return true; ++ ++ return false; ++} ++ ++static u8 _dpk_agc(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, ++ enum rtw89_rf_path path, u8 kidx, u8 init_txagc, ++ bool loss_only) ++{ ++ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); ++ u8 step = DPK_AGC_STEP_SYNC_DGAIN; ++ u8 tmp_txagc, tmp_rxbb = 0, tmp_gl_idx = 0; ++ u8 goout = 0, agc_cnt = 0, limited_rxbb = 0; ++ u16 dgain = 0; ++ s8 offset; ++ int limit = 200; ++ ++ tmp_txagc = init_txagc; ++ ++ do { ++ switch (step) { ++ case DPK_AGC_STEP_SYNC_DGAIN: ++ if (_dpk_sync(rtwdev, phy, path, kidx)) { ++ tmp_txagc = 0xff; ++ goout = 1; ++ break; ++ } ++ ++ dgain = _dpk_dgain_read(rtwdev); ++ ++ if (loss_only == 1 || limited_rxbb == 1) ++ step = DPK_AGC_STEP_GAIN_LOSS_IDX; ++ else ++ step = DPK_AGC_STEP_GAIN_ADJ; ++ break; ++ ++ case DPK_AGC_STEP_GAIN_ADJ: ++ tmp_rxbb = rtw89_read_rf(rtwdev, path, RR_MOD, ++ RFREG_MASKRXBB); ++ offset = _dpk_dgain_mapping(rtwdev, dgain); ++ ++ if (tmp_rxbb + offset > 0x1f) { ++ tmp_rxbb = 0x1f; ++ limited_rxbb = 1; ++ } else if (tmp_rxbb + offset < 0) { ++ tmp_rxbb = 0; ++ limited_rxbb = 1; ++ } else { ++ tmp_rxbb = tmp_rxbb + offset; ++ } ++ ++ rtw89_write_rf(rtwdev, path, RR_MOD, RFREG_MASKRXBB, ++ tmp_rxbb); ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[DPK] Adjust RXBB (%d) = 0x%x\n", offset, tmp_rxbb); ++ if (offset || agc_cnt == 0) { ++ if (chan->band_width < RTW89_CHANNEL_WIDTH_80) ++ _dpk_bypass_rxcfir(rtwdev, path, true); ++ else ++ _dpk_lbk_rxiqk(rtwdev, phy, path); ++ } ++ if (dgain > 1922 || dgain < 342) ++ step = DPK_AGC_STEP_SYNC_DGAIN; ++ else ++ step = DPK_AGC_STEP_GAIN_LOSS_IDX; ++ ++ agc_cnt++; ++ break; ++ ++ case DPK_AGC_STEP_GAIN_LOSS_IDX: ++ _dpk_gainloss(rtwdev, phy, path, kidx); ++ tmp_gl_idx = _dpk_gainloss_read(rtwdev); ++ ++ if ((tmp_gl_idx == 0 && _dpk_pas_read(rtwdev, true)) || ++ tmp_gl_idx >= 7) ++ step = DPK_AGC_STEP_GL_GT_CRITERION; ++ else if (tmp_gl_idx == 0) ++ step = DPK_AGC_STEP_GL_LT_CRITERION; ++ else ++ step = DPK_AGC_STEP_SET_TX_GAIN; ++ break; ++ ++ case DPK_AGC_STEP_GL_GT_CRITERION: ++ if (tmp_txagc == 0x2e) { ++ goout = 1; ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[DPK] Txagc@lower bound!!\n"); ++ } else { ++ tmp_txagc = _dpk_set_offset(rtwdev, phy, path, 0x3); ++ } ++ step = DPK_AGC_STEP_GAIN_LOSS_IDX; ++ agc_cnt++; ++ break; ++ ++ case DPK_AGC_STEP_GL_LT_CRITERION: ++ if (tmp_txagc == 0x3f) { ++ goout = 1; ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[DPK] Txagc@upper bound!!\n"); ++ } else { ++ tmp_txagc = _dpk_set_offset(rtwdev, phy, path, 0xfe); ++ } ++ step = DPK_AGC_STEP_GAIN_LOSS_IDX; ++ agc_cnt++; ++ break; ++ case DPK_AGC_STEP_SET_TX_GAIN: ++ tmp_txagc = _dpk_set_offset(rtwdev, phy, path, tmp_gl_idx); ++ goout = 1; ++ agc_cnt++; ++ break; ++ ++ default: ++ goout = 1; ++ break; ++ } ++ } while (!goout && agc_cnt < 6 && limit-- > 0); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[DPK] Txagc / RXBB for DPK = 0x%x / 0x%x\n", tmp_txagc, ++ tmp_rxbb); ++ ++ return tmp_txagc; ++} ++ ++static void _dpk_set_mdpd_para(struct rtw89_dev *rtwdev, u8 order) ++{ ++ switch (order) { ++ case 0: ++ rtw89_phy_write32_mask(rtwdev, R_LDL_NORM, B_LDL_NORM_OP, order); ++ rtw89_phy_write32_mask(rtwdev, R_LDL_NORM, B_LDL_NORM_PN, 0x3); ++ rtw89_phy_write32_mask(rtwdev, R_MDPK_SYNC, B_MDPK_SYNC_MAN, 0x1); ++ break; ++ case 1: ++ rtw89_phy_write32_mask(rtwdev, R_LDL_NORM, B_LDL_NORM_OP, order); ++ rtw89_phy_write32_clr(rtwdev, R_LDL_NORM, B_LDL_NORM_PN); ++ rtw89_phy_write32_clr(rtwdev, R_MDPK_SYNC, B_MDPK_SYNC_MAN); ++ break; ++ case 2: ++ rtw89_phy_write32_mask(rtwdev, R_LDL_NORM, B_LDL_NORM_OP, order); ++ rtw89_phy_write32_clr(rtwdev, R_LDL_NORM, B_LDL_NORM_PN); ++ rtw89_phy_write32_clr(rtwdev, R_MDPK_SYNC, B_MDPK_SYNC_MAN); ++ break; ++ default: ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[DPK] Wrong MDPD order!!(0x%x)\n", order); ++ break; ++ } ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[DPK] Set MDPD order to 0x%x for IDL\n", order); ++} ++ ++static void _dpk_idl_mpa(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, ++ enum rtw89_rf_path path, u8 kidx, u8 gain) ++{ ++ struct rtw89_dpk_info *dpk = &rtwdev->dpk; ++ ++ if (dpk->bp[path][kidx].bw < RTW89_CHANNEL_WIDTH_80 && ++ dpk->bp[path][kidx].band == RTW89_BAND_5G) ++ _dpk_set_mdpd_para(rtwdev, 0x2); ++ else ++ _dpk_set_mdpd_para(rtwdev, 0x0); ++ ++ _dpk_one_shot(rtwdev, phy, path, MDPK_IDL); ++} ++ ++static void _dpk_fill_result(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, ++ enum rtw89_rf_path path, u8 kidx, u8 gain, u8 txagc) ++{ ++ struct rtw89_dpk_info *dpk = &rtwdev->dpk; ++ const u16 pwsf = 0x78; ++ u8 gs = dpk->dpk_gs[phy]; ++ ++ rtw89_phy_write32_mask(rtwdev, R_COEF_SEL + (path << 8), ++ B_COEF_SEL_MDPD, kidx); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[DPK] Fill txagc/ pwsf/ gs = 0x%x/ 0x%x/ 0x%x\n", txagc, ++ pwsf, gs); ++ ++ dpk->bp[path][kidx].txagc_dpk = txagc; ++ rtw89_phy_write32_mask(rtwdev, R_TXAGC_RFK + (path << 8), ++ 0x3F << ((gain << 3) + (kidx << 4)), txagc); ++ ++ dpk->bp[path][kidx].pwsf = pwsf; ++ rtw89_phy_write32_mask(rtwdev, R_DPD_BND + (path << 8) + (kidx << 2), ++ 0x1FF << (gain << 4), pwsf); ++ ++ rtw89_phy_write32_mask(rtwdev, R_LOAD_COEF + (path << 8), B_LOAD_COEF_MDPD, 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_LOAD_COEF + (path << 8), B_LOAD_COEF_MDPD, 0x0); ++ ++ dpk->bp[path][kidx].gs = gs; ++ if (dpk->dpk_gs[phy] == 0x7f) ++ rtw89_phy_write32_mask(rtwdev, R_DPD_CH0A + (path << 8) + (kidx << 2), ++ MASKDWORD, 0x007f7f7f); ++ else ++ rtw89_phy_write32_mask(rtwdev, R_DPD_CH0A + (path << 8) + (kidx << 2), ++ MASKDWORD, 0x005b5b5b); ++ ++ rtw89_phy_write32_mask(rtwdev, R_DPD_CH0A + (path << 8) + (kidx << 2), ++ B_DPD_ORDER_V1, _dpk_order_convert(rtwdev)); ++ rtw89_phy_write32_mask(rtwdev, R_DPD_V1 + (path << 8), MASKDWORD, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_MDPK_SYNC, B_MDPK_SYNC_SEL, 0x0); ++} ++ ++static bool _dpk_reload_check(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, ++ enum rtw89_rf_path path) ++{ ++ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); ++ struct rtw89_dpk_info *dpk = &rtwdev->dpk; ++ bool is_reload = false; ++ u8 idx, cur_band, cur_ch; ++ ++ cur_band = chan->band_type; ++ cur_ch = chan->channel; ++ ++ for (idx = 0; idx < RTW89_DPK_BKUP_NUM; idx++) { ++ if (cur_band != dpk->bp[path][idx].band || ++ cur_ch != dpk->bp[path][idx].ch) ++ continue; ++ ++ rtw89_phy_write32_mask(rtwdev, R_COEF_SEL + (path << 8), ++ B_COEF_SEL_MDPD, idx); ++ dpk->cur_idx[path] = idx; ++ is_reload = true; ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[DPK] reload S%d[%d] success\n", path, idx); ++ } ++ ++ return is_reload; ++} ++ ++static bool _dpk_main(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, ++ enum rtw89_rf_path path, u8 gain) ++{ ++ struct rtw89_dpk_info *dpk = &rtwdev->dpk; ++ u8 txagc = 0x38, kidx = dpk->cur_idx[path]; ++ bool is_fail = false; ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[DPK] ========= S%d[%d] DPK Start =========\n", path, kidx); ++ ++ _rfk_rf_direct_cntrl(rtwdev, path, false); ++ _rfk_drf_direct_cntrl(rtwdev, path, false); ++ ++ _dpk_kip_pwr_clk_on(rtwdev, path); ++ _dpk_kip_set_txagc(rtwdev, phy, path, txagc); ++ _dpk_rf_setting(rtwdev, gain, path, kidx); ++ _dpk_rx_dck(rtwdev, phy, path); ++ ++ _dpk_kip_preset(rtwdev, phy, path, kidx); ++ _dpk_kip_set_rxagc(rtwdev, phy, path); ++ _dpk_table_select(rtwdev, path, kidx, gain); ++ ++ txagc = _dpk_agc(rtwdev, phy, path, kidx, txagc, false); ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] Adjust txagc = 0x%x\n", txagc); ++ ++ if (txagc == 0xff) { ++ is_fail = true; ++ } else { ++ _dpk_get_thermal(rtwdev, kidx, path); ++ ++ _dpk_idl_mpa(rtwdev, phy, path, kidx, gain); ++ ++ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, RR_MOD_V_RX); ++ ++ _dpk_fill_result(rtwdev, phy, path, kidx, gain, txagc); ++ } ++ ++ if (!is_fail) ++ dpk->bp[path][kidx].path_ok = true; ++ else ++ dpk->bp[path][kidx].path_ok = false; ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d[%d] DPK %s\n", path, kidx, ++ is_fail ? "Check" : "Success"); ++ ++ return is_fail; ++} ++ ++static void _dpk_cal_select(struct rtw89_dev *rtwdev, bool force, ++ enum rtw89_phy_idx phy, u8 kpath) ++{ ++ struct rtw89_dpk_info *dpk = &rtwdev->dpk; ++ static const u32 kip_reg[] = {0x813c, 0x8124, 0x8120}; ++ u32 kip_bkup[RTW8852B_DPK_RF_PATH][RTW8852B_DPK_KIP_REG_NUM] = {}; ++ u32 backup_rf_val[RTW8852B_DPK_RF_PATH][BACKUP_RF_REGS_NR]; ++ u32 backup_bb_val[BACKUP_BB_REGS_NR]; ++ bool is_fail = true, reloaded[RTW8852B_DPK_RF_PATH] = {}; ++ u8 path; ++ ++ if (dpk->is_dpk_reload_en) { ++ for (path = 0; path < RTW8852B_DPK_RF_PATH; path++) { ++ reloaded[path] = _dpk_reload_check(rtwdev, phy, path); ++ if (!reloaded[path] && dpk->bp[path][0].ch) ++ dpk->cur_idx[path] = !dpk->cur_idx[path]; ++ else ++ _dpk_onoff(rtwdev, path, false); ++ } ++ } else { ++ for (path = 0; path < RTW8852B_DPK_RF_PATH; path++) ++ dpk->cur_idx[path] = 0; ++ } ++ ++ _rfk_backup_bb_reg(rtwdev, &backup_bb_val[0]); ++ ++ for (path = 0; path < RTW8852B_DPK_RF_PATH; path++) { ++ _dpk_bkup_kip(rtwdev, kip_reg, kip_bkup, path); ++ _rfk_backup_rf_reg(rtwdev, &backup_rf_val[path][0], path); ++ _dpk_information(rtwdev, phy, path); ++ if (rtwdev->is_tssi_mode[path]) ++ _dpk_tssi_pause(rtwdev, path, true); ++ } ++ ++ _dpk_bb_afe_setting(rtwdev, phy, path, kpath); ++ ++ for (path = 0; path < RTW8852B_DPK_RF_PATH; path++) { ++ is_fail = _dpk_main(rtwdev, phy, path, 1); ++ _dpk_onoff(rtwdev, path, is_fail); ++ } ++ ++ _dpk_bb_afe_restore(rtwdev, phy, path, kpath); ++ _rfk_restore_bb_reg(rtwdev, &backup_bb_val[0]); ++ ++ for (path = 0; path < RTW8852B_DPK_RF_PATH; path++) { ++ _dpk_kip_restore(rtwdev, path); ++ _dpk_reload_kip(rtwdev, kip_reg, kip_bkup, path); ++ _rfk_restore_rf_reg(rtwdev, &backup_rf_val[path][0], path); ++ if (rtwdev->is_tssi_mode[path]) ++ _dpk_tssi_pause(rtwdev, path, false); ++ } ++} ++ ++static bool _dpk_bypass_check(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy) ++{ ++ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); ++ struct rtw89_fem_info *fem = &rtwdev->fem; ++ ++ if (fem->epa_2g && chan->band_type == RTW89_BAND_2G) { ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[DPK] Skip DPK due to 2G_ext_PA exist!!\n"); ++ return true; ++ } else if (fem->epa_5g && chan->band_type == RTW89_BAND_5G) { ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[DPK] Skip DPK due to 5G_ext_PA exist!!\n"); ++ return true; ++ } else if (fem->epa_6g && chan->band_type == RTW89_BAND_6G) { ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[DPK] Skip DPK due to 6G_ext_PA exist!!\n"); ++ return true; ++ } ++ ++ return false; ++} ++ ++static void _dpk_force_bypass(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy) ++{ ++ u8 path, kpath; ++ ++ kpath = _kpath(rtwdev, phy); ++ ++ for (path = 0; path < RTW8852B_DPK_RF_PATH; path++) { ++ if (kpath & BIT(path)) ++ _dpk_onoff(rtwdev, path, true); ++ } ++} ++ ++static void _dpk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, bool force) ++{ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[DPK] ****** DPK Start (Ver: 0x%x, Cv: %d, RF_para: %d) ******\n", ++ RTW8852B_DPK_VER, rtwdev->hal.cv, ++ RTW8852B_RF_REL_VERSION); ++ ++ if (_dpk_bypass_check(rtwdev, phy)) ++ _dpk_force_bypass(rtwdev, phy); ++ else ++ _dpk_cal_select(rtwdev, force, phy, RF_AB); ++} ++ ++static void _dpk_track(struct rtw89_dev *rtwdev) ++{ ++ struct rtw89_dpk_info *dpk = &rtwdev->dpk; ++ s8 txagc_bb, txagc_bb_tp, ini_diff = 0, txagc_ofst; ++ s8 delta_ther[2] = {}; ++ u8 trk_idx, txagc_rf; ++ u8 path, kidx; ++ u16 pwsf[2]; ++ u8 cur_ther; ++ u32 tmp; ++ ++ for (path = 0; path < RF_PATH_NUM_8852B; path++) { ++ kidx = dpk->cur_idx[path]; ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK_TRACK, ++ "[DPK_TRK] ================[S%d[%d] (CH %d)]================\n", ++ path, kidx, dpk->bp[path][kidx].ch); ++ ++ cur_ther = ewma_thermal_read(&rtwdev->phystat.avg_thermal[path]); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK_TRACK, ++ "[DPK_TRK] thermal now = %d\n", cur_ther); ++ ++ if (dpk->bp[path][kidx].ch && cur_ther) ++ delta_ther[path] = dpk->bp[path][kidx].ther_dpk - cur_ther; ++ ++ if (dpk->bp[path][kidx].band == RTW89_BAND_2G) ++ delta_ther[path] = delta_ther[path] * 3 / 2; ++ else ++ delta_ther[path] = delta_ther[path] * 5 / 2; ++ ++ txagc_rf = rtw89_phy_read32_mask(rtwdev, R_TXAGC_BB + (path << 13), ++ 0x0000003f); ++ ++ if (rtwdev->is_tssi_mode[path]) { ++ trk_idx = rtw89_read_rf(rtwdev, path, RR_TXA, RR_TXA_TRK); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK_TRACK, ++ "[DPK_TRK] txagc_RF / track_idx = 0x%x / %d\n", ++ txagc_rf, trk_idx); ++ ++ txagc_bb = ++ rtw89_phy_read32_mask(rtwdev, R_TXAGC_BB + (path << 13), ++ MASKBYTE2); ++ txagc_bb_tp = ++ rtw89_phy_read32_mask(rtwdev, R_TXAGC_TP + (path << 13), ++ B_TXAGC_TP); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK_TRACK, ++ "[DPK_TRK] txagc_bb_tp / txagc_bb = 0x%x / 0x%x\n", ++ txagc_bb_tp, txagc_bb); ++ ++ txagc_ofst = ++ rtw89_phy_read32_mask(rtwdev, R_TXAGC_BB + (path << 13), ++ MASKBYTE3); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK_TRACK, ++ "[DPK_TRK] txagc_offset / delta_ther = %d / %d\n", ++ txagc_ofst, delta_ther[path]); ++ tmp = rtw89_phy_read32_mask(rtwdev, R_DPD_COM + (path << 8), ++ B_DPD_COM_OF); ++ if (tmp == 0x1) { ++ txagc_ofst = 0; ++ rtw89_debug(rtwdev, RTW89_DBG_RFK_TRACK, ++ "[DPK_TRK] HW txagc offset mode\n"); ++ } ++ ++ if (txagc_rf && cur_ther) ++ ini_diff = txagc_ofst + (delta_ther[path]); ++ ++ tmp = rtw89_phy_read32_mask(rtwdev, ++ R_P0_TXDPD + (path << 13), ++ B_P0_TXDPD); ++ if (tmp == 0x0) { ++ pwsf[0] = dpk->bp[path][kidx].pwsf + ++ txagc_bb_tp - txagc_bb + ini_diff; ++ pwsf[1] = dpk->bp[path][kidx].pwsf + ++ txagc_bb_tp - txagc_bb + ini_diff; ++ } else { ++ pwsf[0] = dpk->bp[path][kidx].pwsf + ini_diff; ++ pwsf[1] = dpk->bp[path][kidx].pwsf + ini_diff; ++ } ++ ++ } else { ++ pwsf[0] = (dpk->bp[path][kidx].pwsf + delta_ther[path]) & 0x1ff; ++ pwsf[1] = (dpk->bp[path][kidx].pwsf + delta_ther[path]) & 0x1ff; ++ } ++ ++ tmp = rtw89_phy_read32_mask(rtwdev, R_DPK_TRK, B_DPK_TRK_DIS); ++ if (!tmp && txagc_rf) { ++ rtw89_debug(rtwdev, RTW89_DBG_RFK_TRACK, ++ "[DPK_TRK] New pwsf[0] / pwsf[1] = 0x%x / 0x%x\n", ++ pwsf[0], pwsf[1]); ++ ++ rtw89_phy_write32_mask(rtwdev, ++ R_DPD_BND + (path << 8) + (kidx << 2), ++ B_DPD_BND_0, pwsf[0]); ++ rtw89_phy_write32_mask(rtwdev, ++ R_DPD_BND + (path << 8) + (kidx << 2), ++ B_DPD_BND_1, pwsf[1]); ++ } ++ } ++} ++ ++static void _set_dpd_backoff(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy) ++{ ++ struct rtw89_dpk_info *dpk = &rtwdev->dpk; ++ u8 tx_scale, ofdm_bkof, path, kpath; ++ ++ kpath = _kpath(rtwdev, phy); ++ ++ ofdm_bkof = rtw89_phy_read32_mask(rtwdev, R_DPD_BF + (phy << 13), B_DPD_BF_OFDM); ++ tx_scale = rtw89_phy_read32_mask(rtwdev, R_DPD_BF + (phy << 13), B_DPD_BF_SCA); ++ ++ if (ofdm_bkof + tx_scale >= 44) { ++ /* move dpd backoff to bb, and set dpd backoff to 0 */ ++ dpk->dpk_gs[phy] = 0x7f; ++ for (path = 0; path < RF_PATH_NUM_8852B; path++) { ++ if (!(kpath & BIT(path))) ++ continue; ++ ++ rtw89_phy_write32_mask(rtwdev, R_DPD_CH0A + (path << 8), ++ B_DPD_CFG, 0x7f7f7f); ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[RFK] Set S%d DPD backoff to 0dB\n", path); ++ } ++ } else { ++ dpk->dpk_gs[phy] = 0x5b; ++ } ++} ++ ++static void _tssi_rf_setting(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, ++ enum rtw89_rf_path path) ++{ ++ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); ++ enum rtw89_band band = chan->band_type; ++ ++ if (band == RTW89_BAND_2G) ++ rtw89_write_rf(rtwdev, path, RR_TXPOW, RR_TXPOW_TXG, 0x1); ++ else ++ rtw89_write_rf(rtwdev, path, RR_TXPOW, RR_TXPOW_TXA, 0x1); ++} ++ ++static void _tssi_set_sys(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, ++ enum rtw89_rf_path path) ++{ ++ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); ++ enum rtw89_band band = chan->band_type; ++ ++ rtw89_rfk_parser(rtwdev, &rtw8852b_tssi_sys_defs_tbl); ++ ++ if (path == RF_PATH_A) ++ rtw89_rfk_parser_by_cond(rtwdev, band == RTW89_BAND_2G, ++ &rtw8852b_tssi_sys_a_defs_2g_tbl, ++ &rtw8852b_tssi_sys_a_defs_5g_tbl); ++ else ++ rtw89_rfk_parser_by_cond(rtwdev, band == RTW89_BAND_2G, ++ &rtw8852b_tssi_sys_b_defs_2g_tbl, ++ &rtw8852b_tssi_sys_b_defs_5g_tbl); ++} ++ ++static void _tssi_ini_txpwr_ctrl_bb(struct rtw89_dev *rtwdev, ++ enum rtw89_phy_idx phy, ++ enum rtw89_rf_path path) ++{ ++ rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, ++ &rtw8852b_tssi_init_txpwr_defs_a_tbl, ++ &rtw8852b_tssi_init_txpwr_defs_b_tbl); ++} ++ ++static void _tssi_ini_txpwr_ctrl_bb_he_tb(struct rtw89_dev *rtwdev, ++ enum rtw89_phy_idx phy, ++ enum rtw89_rf_path path) ++{ ++ rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, ++ &rtw8852b_tssi_init_txpwr_he_tb_defs_a_tbl, ++ &rtw8852b_tssi_init_txpwr_he_tb_defs_b_tbl); ++} ++ ++static void _tssi_set_dck(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, ++ enum rtw89_rf_path path) ++{ ++ rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, ++ &rtw8852b_tssi_dck_defs_a_tbl, ++ &rtw8852b_tssi_dck_defs_b_tbl); ++} ++ ++static void _tssi_set_tmeter_tbl(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, ++ enum rtw89_rf_path path) ++{ ++#define RTW8852B_TSSI_GET_VAL(ptr, idx) \ ++({ \ ++ s8 *__ptr = (ptr); \ ++ u8 __idx = (idx), __i, __v; \ ++ u32 __val = 0; \ ++ for (__i = 0; __i < 4; __i++) { \ ++ __v = (__ptr[__idx + __i]); \ ++ __val |= (__v << (8 * __i)); \ ++ } \ ++ __val; \ ++}) ++ struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; ++ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); ++ u8 ch = chan->channel; ++ u8 subband = chan->subband_type; ++ const s8 *thm_up_a = NULL; ++ const s8 *thm_down_a = NULL; ++ const s8 *thm_up_b = NULL; ++ const s8 *thm_down_b = NULL; ++ u8 thermal = 0xff; ++ s8 thm_ofst[64] = {0}; ++ u32 tmp = 0; ++ u8 i, j; ++ ++ switch (subband) { ++ default: ++ case RTW89_CH_2G: ++ thm_up_a = rtw89_8852b_trk_cfg.delta_swingidx_2ga_p; ++ thm_down_a = rtw89_8852b_trk_cfg.delta_swingidx_2ga_n; ++ thm_up_b = rtw89_8852b_trk_cfg.delta_swingidx_2gb_p; ++ thm_down_b = rtw89_8852b_trk_cfg.delta_swingidx_2gb_n; ++ break; ++ case RTW89_CH_5G_BAND_1: ++ thm_up_a = rtw89_8852b_trk_cfg.delta_swingidx_5ga_p[0]; ++ thm_down_a = rtw89_8852b_trk_cfg.delta_swingidx_5ga_n[0]; ++ thm_up_b = rtw89_8852b_trk_cfg.delta_swingidx_5gb_p[0]; ++ thm_down_b = rtw89_8852b_trk_cfg.delta_swingidx_5gb_n[0]; ++ break; ++ case RTW89_CH_5G_BAND_3: ++ thm_up_a = rtw89_8852b_trk_cfg.delta_swingidx_5ga_p[1]; ++ thm_down_a = rtw89_8852b_trk_cfg.delta_swingidx_5ga_n[1]; ++ thm_up_b = rtw89_8852b_trk_cfg.delta_swingidx_5gb_p[1]; ++ thm_down_b = rtw89_8852b_trk_cfg.delta_swingidx_5gb_n[1]; ++ break; ++ case RTW89_CH_5G_BAND_4: ++ thm_up_a = rtw89_8852b_trk_cfg.delta_swingidx_5ga_p[2]; ++ thm_down_a = rtw89_8852b_trk_cfg.delta_swingidx_5ga_n[2]; ++ thm_up_b = rtw89_8852b_trk_cfg.delta_swingidx_5gb_p[2]; ++ thm_down_b = rtw89_8852b_trk_cfg.delta_swingidx_5gb_n[2]; ++ break; ++ } ++ ++ if (path == RF_PATH_A) { ++ thermal = tssi_info->thermal[RF_PATH_A]; ++ ++ rtw89_debug(rtwdev, RTW89_DBG_TSSI, ++ "[TSSI] ch=%d thermal_pathA=0x%x\n", ch, thermal); ++ ++ rtw89_phy_write32_mask(rtwdev, R_P0_TMETER, B_P0_TMETER_DIS, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_P0_TMETER, B_P0_TMETER_TRK, 0x1); ++ ++ if (thermal == 0xff) { ++ rtw89_phy_write32_mask(rtwdev, R_P0_TMETER, B_P0_TMETER, 32); ++ rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, B_P0_RFCTM_VAL, 32); ++ ++ for (i = 0; i < 64; i += 4) { ++ rtw89_phy_write32(rtwdev, R_P0_TSSI_BASE + i, 0x0); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_TSSI, ++ "[TSSI] write 0x%x val=0x%08x\n", ++ R_P0_TSSI_BASE + i, 0x0); ++ } ++ ++ } else { ++ rtw89_phy_write32_mask(rtwdev, R_P0_TMETER, B_P0_TMETER, thermal); ++ rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, B_P0_RFCTM_VAL, ++ thermal); ++ ++ i = 0; ++ for (j = 0; j < 32; j++) ++ thm_ofst[j] = i < DELTA_SWINGIDX_SIZE ? ++ -thm_down_a[i++] : ++ -thm_down_a[DELTA_SWINGIDX_SIZE - 1]; ++ ++ i = 1; ++ for (j = 63; j >= 32; j--) ++ thm_ofst[j] = i < DELTA_SWINGIDX_SIZE ? ++ thm_up_a[i++] : ++ thm_up_a[DELTA_SWINGIDX_SIZE - 1]; ++ ++ for (i = 0; i < 64; i += 4) { ++ tmp = RTW8852B_TSSI_GET_VAL(thm_ofst, i); ++ rtw89_phy_write32(rtwdev, R_P0_TSSI_BASE + i, tmp); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_TSSI, ++ "[TSSI] write 0x%x val=0x%08x\n", ++ 0x5c00 + i, tmp); ++ } ++ } ++ rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, R_P0_RFCTM_RDY, 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, R_P0_RFCTM_RDY, 0x0); ++ ++ } else { ++ thermal = tssi_info->thermal[RF_PATH_B]; ++ ++ rtw89_debug(rtwdev, RTW89_DBG_TSSI, ++ "[TSSI] ch=%d thermal_pathB=0x%x\n", ch, thermal); ++ ++ rtw89_phy_write32_mask(rtwdev, R_P1_TMETER, B_P1_TMETER_DIS, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_P1_TMETER, B_P1_TMETER_TRK, 0x1); ++ ++ if (thermal == 0xff) { ++ rtw89_phy_write32_mask(rtwdev, R_P1_TMETER, B_P1_TMETER, 32); ++ rtw89_phy_write32_mask(rtwdev, R_P1_RFCTM, B_P1_RFCTM_VAL, 32); ++ ++ for (i = 0; i < 64; i += 4) { ++ rtw89_phy_write32(rtwdev, R_TSSI_THOF + i, 0x0); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_TSSI, ++ "[TSSI] write 0x%x val=0x%08x\n", ++ 0x7c00 + i, 0x0); ++ } ++ ++ } else { ++ rtw89_phy_write32_mask(rtwdev, R_P1_TMETER, B_P1_TMETER, thermal); ++ rtw89_phy_write32_mask(rtwdev, R_P1_RFCTM, B_P1_RFCTM_VAL, ++ thermal); ++ ++ i = 0; ++ for (j = 0; j < 32; j++) ++ thm_ofst[j] = i < DELTA_SWINGIDX_SIZE ? ++ -thm_down_b[i++] : ++ -thm_down_b[DELTA_SWINGIDX_SIZE - 1]; ++ ++ i = 1; ++ for (j = 63; j >= 32; j--) ++ thm_ofst[j] = i < DELTA_SWINGIDX_SIZE ? ++ thm_up_b[i++] : ++ thm_up_b[DELTA_SWINGIDX_SIZE - 1]; ++ ++ for (i = 0; i < 64; i += 4) { ++ tmp = RTW8852B_TSSI_GET_VAL(thm_ofst, i); ++ rtw89_phy_write32(rtwdev, R_TSSI_THOF + i, tmp); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_TSSI, ++ "[TSSI] write 0x%x val=0x%08x\n", ++ 0x7c00 + i, tmp); ++ } ++ } ++ rtw89_phy_write32_mask(rtwdev, R_P1_RFCTM, R_P1_RFCTM_RDY, 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_P1_RFCTM, R_P1_RFCTM_RDY, 0x0); ++ } ++#undef RTW8852B_TSSI_GET_VAL ++} ++ ++static void _tssi_set_dac_gain_tbl(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, ++ enum rtw89_rf_path path) ++{ ++ rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, ++ &rtw8852b_tssi_dac_gain_defs_a_tbl, ++ &rtw8852b_tssi_dac_gain_defs_b_tbl); ++} ++ ++static void _tssi_slope_cal_org(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, ++ enum rtw89_rf_path path) ++{ ++ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); ++ enum rtw89_band band = chan->band_type; ++ ++ if (path == RF_PATH_A) ++ rtw89_rfk_parser_by_cond(rtwdev, band == RTW89_BAND_2G, ++ &rtw8852b_tssi_slope_a_defs_2g_tbl, ++ &rtw8852b_tssi_slope_a_defs_5g_tbl); ++ else ++ rtw89_rfk_parser_by_cond(rtwdev, band == RTW89_BAND_2G, ++ &rtw8852b_tssi_slope_b_defs_2g_tbl, ++ &rtw8852b_tssi_slope_b_defs_5g_tbl); ++} ++ ++static void _tssi_alignment_default(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, ++ enum rtw89_rf_path path, bool all) ++{ ++ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); ++ enum rtw89_band band = chan->band_type; ++ const struct rtw89_rfk_tbl *tbl = NULL; ++ u8 ch = chan->channel; ++ ++ if (path == RF_PATH_A) { ++ if (band == RTW89_BAND_2G) { ++ if (all) ++ tbl = &rtw8852b_tssi_align_a_2g_all_defs_tbl; ++ else ++ tbl = &rtw8852b_tssi_align_a_2g_part_defs_tbl; ++ } else if (ch >= 36 && ch <= 64) { ++ if (all) ++ tbl = &rtw8852b_tssi_align_a_5g1_all_defs_tbl; ++ else ++ tbl = &rtw8852b_tssi_align_a_5g1_part_defs_tbl; ++ } else if (ch >= 100 && ch <= 144) { ++ if (all) ++ tbl = &rtw8852b_tssi_align_a_5g2_all_defs_tbl; ++ else ++ tbl = &rtw8852b_tssi_align_a_5g2_part_defs_tbl; ++ } else if (ch >= 149 && ch <= 177) { ++ if (all) ++ tbl = &rtw8852b_tssi_align_a_5g3_all_defs_tbl; ++ else ++ tbl = &rtw8852b_tssi_align_a_5g3_part_defs_tbl; ++ } ++ } else { ++ if (ch >= 1 && ch <= 14) { ++ if (all) ++ tbl = &rtw8852b_tssi_align_b_2g_all_defs_tbl; ++ else ++ tbl = &rtw8852b_tssi_align_b_2g_part_defs_tbl; ++ } else if (ch >= 36 && ch <= 64) { ++ if (all) ++ tbl = &rtw8852b_tssi_align_b_5g1_all_defs_tbl; ++ else ++ tbl = &rtw8852b_tssi_align_b_5g1_part_defs_tbl; ++ } else if (ch >= 100 && ch <= 144) { ++ if (all) ++ tbl = &rtw8852b_tssi_align_b_5g2_all_defs_tbl; ++ else ++ tbl = &rtw8852b_tssi_align_b_5g2_part_defs_tbl; ++ } else if (ch >= 149 && ch <= 177) { ++ if (all) ++ tbl = &rtw8852b_tssi_align_b_5g3_all_defs_tbl; ++ else ++ tbl = &rtw8852b_tssi_align_b_5g3_part_defs_tbl; ++ } ++ } ++ ++ if (tbl) ++ rtw89_rfk_parser(rtwdev, tbl); ++} ++ ++static void _tssi_set_tssi_slope(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, ++ enum rtw89_rf_path path) ++{ ++ rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, ++ &rtw8852b_tssi_slope_defs_a_tbl, ++ &rtw8852b_tssi_slope_defs_b_tbl); ++} ++ ++static void _tssi_set_tssi_track(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, ++ enum rtw89_rf_path path) ++{ ++ if (path == RF_PATH_A) ++ rtw89_phy_write32_mask(rtwdev, R_P0_TSSIC, B_P0_TSSIC_BYPASS, 0x0); ++ else ++ rtw89_phy_write32_mask(rtwdev, R_P1_TSSIC, B_P1_TSSIC_BYPASS, 0x0); ++} ++ ++static void _tssi_set_txagc_offset_mv_avg(struct rtw89_dev *rtwdev, ++ enum rtw89_phy_idx phy, ++ enum rtw89_rf_path path) ++{ ++ rtw89_debug(rtwdev, RTW89_DBG_TSSI, "======>%s path=%d\n", __func__, ++ path); ++ ++ if (path == RF_PATH_A) ++ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_MV_AVG, B_P0_TSSI_MV_MIX, 0x010); ++ else ++ rtw89_phy_write32_mask(rtwdev, R_P1_TSSI_MV_AVG, B_P1_RFCTM_DEL, 0x010); ++} ++ ++static void _tssi_enable(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy) ++{ ++ u8 i; ++ ++ for (i = 0; i < RF_PATH_NUM_8852B; i++) { ++ _tssi_set_tssi_track(rtwdev, phy, i); ++ _tssi_set_txagc_offset_mv_avg(rtwdev, phy, i); ++ ++ if (i == RF_PATH_A) { ++ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_MV_AVG, ++ B_P0_TSSI_MV_CLR, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_AVG, ++ B_P0_TSSI_EN, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_AVG, ++ B_P0_TSSI_EN, 0x1); ++ rtw89_write_rf(rtwdev, i, RR_TXGA_V1, ++ RR_TXGA_V1_TRK_EN, 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, ++ B_P0_TSSI_RFC, 0x3); ++ ++ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, ++ B_P0_TSSI_OFT, 0xc0); ++ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, ++ B_P0_TSSI_OFT_EN, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, ++ B_P0_TSSI_OFT_EN, 0x1); ++ ++ rtwdev->is_tssi_mode[RF_PATH_A] = true; ++ } else { ++ rtw89_phy_write32_mask(rtwdev, R_P1_TSSI_MV_AVG, ++ B_P1_TSSI_MV_CLR, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_P1_TSSI_AVG, ++ B_P1_TSSI_EN, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_P1_TSSI_AVG, ++ B_P1_TSSI_EN, 0x1); ++ rtw89_write_rf(rtwdev, i, RR_TXGA_V1, ++ RR_TXGA_V1_TRK_EN, 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_P1_TSSI_TRK, ++ B_P1_TSSI_RFC, 0x3); ++ ++ rtw89_phy_write32_mask(rtwdev, R_P1_TSSI_TRK, ++ B_P1_TSSI_OFT, 0xc0); ++ rtw89_phy_write32_mask(rtwdev, R_P1_TSSI_TRK, ++ B_P1_TSSI_OFT_EN, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_P1_TSSI_TRK, ++ B_P1_TSSI_OFT_EN, 0x1); ++ ++ rtwdev->is_tssi_mode[RF_PATH_B] = true; ++ } ++ } ++} ++ ++static void _tssi_disable(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy) ++{ ++ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_AVG, B_P0_TSSI_EN, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_RFC, 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_MV_AVG, B_P0_TSSI_MV_CLR, 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_P1_TSSI_AVG, B_P1_TSSI_EN, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_P1_TSSI_TRK, B_P1_TSSI_RFC, 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_P1_TSSI_MV_AVG, B_P1_TSSI_MV_CLR, 0x1); ++ ++ rtwdev->is_tssi_mode[RF_PATH_A] = false; ++ rtwdev->is_tssi_mode[RF_PATH_B] = false; ++} ++ ++static u32 _tssi_get_cck_group(struct rtw89_dev *rtwdev, u8 ch) ++{ ++ switch (ch) { ++ case 1 ... 2: ++ return 0; ++ case 3 ... 5: ++ return 1; ++ case 6 ... 8: ++ return 2; ++ case 9 ... 11: ++ return 3; ++ case 12 ... 13: ++ return 4; ++ case 14: ++ return 5; ++ } ++ ++ return 0; ++} ++ ++#define TSSI_EXTRA_GROUP_BIT (BIT(31)) ++#define TSSI_EXTRA_GROUP(idx) (TSSI_EXTRA_GROUP_BIT | (idx)) ++#define IS_TSSI_EXTRA_GROUP(group) ((group) & TSSI_EXTRA_GROUP_BIT) ++#define TSSI_EXTRA_GET_GROUP_IDX1(group) ((group) & ~TSSI_EXTRA_GROUP_BIT) ++#define TSSI_EXTRA_GET_GROUP_IDX2(group) (TSSI_EXTRA_GET_GROUP_IDX1(group) + 1) ++ ++static u32 _tssi_get_ofdm_group(struct rtw89_dev *rtwdev, u8 ch) ++{ ++ switch (ch) { ++ case 1 ... 2: ++ return 0; ++ case 3 ... 5: ++ return 1; ++ case 6 ... 8: ++ return 2; ++ case 9 ... 11: ++ return 3; ++ case 12 ... 14: ++ return 4; ++ case 36 ... 40: ++ return 5; ++ case 41 ... 43: ++ return TSSI_EXTRA_GROUP(5); ++ case 44 ... 48: ++ return 6; ++ case 49 ... 51: ++ return TSSI_EXTRA_GROUP(6); ++ case 52 ... 56: ++ return 7; ++ case 57 ... 59: ++ return TSSI_EXTRA_GROUP(7); ++ case 60 ... 64: ++ return 8; ++ case 100 ... 104: ++ return 9; ++ case 105 ... 107: ++ return TSSI_EXTRA_GROUP(9); ++ case 108 ... 112: ++ return 10; ++ case 113 ... 115: ++ return TSSI_EXTRA_GROUP(10); ++ case 116 ... 120: ++ return 11; ++ case 121 ... 123: ++ return TSSI_EXTRA_GROUP(11); ++ case 124 ... 128: ++ return 12; ++ case 129 ... 131: ++ return TSSI_EXTRA_GROUP(12); ++ case 132 ... 136: ++ return 13; ++ case 137 ... 139: ++ return TSSI_EXTRA_GROUP(13); ++ case 140 ... 144: ++ return 14; ++ case 149 ... 153: ++ return 15; ++ case 154 ... 156: ++ return TSSI_EXTRA_GROUP(15); ++ case 157 ... 161: ++ return 16; ++ case 162 ... 164: ++ return TSSI_EXTRA_GROUP(16); ++ case 165 ... 169: ++ return 17; ++ case 170 ... 172: ++ return TSSI_EXTRA_GROUP(17); ++ case 173 ... 177: ++ return 18; ++ } ++ ++ return 0; ++} ++ ++static u32 _tssi_get_trim_group(struct rtw89_dev *rtwdev, u8 ch) ++{ ++ switch (ch) { ++ case 1 ... 8: ++ return 0; ++ case 9 ... 14: ++ return 1; ++ case 36 ... 48: ++ return 2; ++ case 52 ... 64: ++ return 3; ++ case 100 ... 112: ++ return 4; ++ case 116 ... 128: ++ return 5; ++ case 132 ... 144: ++ return 6; ++ case 149 ... 177: ++ return 7; ++ } ++ ++ return 0; ++} ++ ++static s8 _tssi_get_ofdm_de(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, ++ enum rtw89_rf_path path) ++{ ++ struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; ++ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); ++ u8 ch = chan->channel; ++ u32 gidx, gidx_1st, gidx_2nd; ++ s8 de_1st; ++ s8 de_2nd; ++ s8 val; ++ ++ gidx = _tssi_get_ofdm_group(rtwdev, ch); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_TSSI, ++ "[TSSI][TRIM]: path=%d mcs group_idx=0x%x\n", path, gidx); ++ ++ if (IS_TSSI_EXTRA_GROUP(gidx)) { ++ gidx_1st = TSSI_EXTRA_GET_GROUP_IDX1(gidx); ++ gidx_2nd = TSSI_EXTRA_GET_GROUP_IDX2(gidx); ++ de_1st = tssi_info->tssi_mcs[path][gidx_1st]; ++ de_2nd = tssi_info->tssi_mcs[path][gidx_2nd]; ++ val = (de_1st + de_2nd) / 2; ++ ++ rtw89_debug(rtwdev, RTW89_DBG_TSSI, ++ "[TSSI][TRIM]: path=%d mcs de=%d 1st=%d 2nd=%d\n", ++ path, val, de_1st, de_2nd); ++ } else { ++ val = tssi_info->tssi_mcs[path][gidx]; ++ ++ rtw89_debug(rtwdev, RTW89_DBG_TSSI, ++ "[TSSI][TRIM]: path=%d mcs de=%d\n", path, val); ++ } ++ ++ return val; ++} ++ ++static s8 _tssi_get_ofdm_trim_de(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, ++ enum rtw89_rf_path path) ++{ ++ struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; ++ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); ++ u8 ch = chan->channel; ++ u32 tgidx, tgidx_1st, tgidx_2nd; ++ s8 tde_1st; ++ s8 tde_2nd; ++ s8 val; ++ ++ tgidx = _tssi_get_trim_group(rtwdev, ch); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_TSSI, ++ "[TSSI][TRIM]: path=%d mcs trim_group_idx=0x%x\n", ++ path, tgidx); ++ ++ if (IS_TSSI_EXTRA_GROUP(tgidx)) { ++ tgidx_1st = TSSI_EXTRA_GET_GROUP_IDX1(tgidx); ++ tgidx_2nd = TSSI_EXTRA_GET_GROUP_IDX2(tgidx); ++ tde_1st = tssi_info->tssi_trim[path][tgidx_1st]; ++ tde_2nd = tssi_info->tssi_trim[path][tgidx_2nd]; ++ val = (tde_1st + tde_2nd) / 2; ++ ++ rtw89_debug(rtwdev, RTW89_DBG_TSSI, ++ "[TSSI][TRIM]: path=%d mcs trim_de=%d 1st=%d 2nd=%d\n", ++ path, val, tde_1st, tde_2nd); ++ } else { ++ val = tssi_info->tssi_trim[path][tgidx]; ++ ++ rtw89_debug(rtwdev, RTW89_DBG_TSSI, ++ "[TSSI][TRIM]: path=%d mcs trim_de=%d\n", ++ path, val); ++ } ++ ++ return val; ++} ++ ++static void _tssi_set_efuse_to_de(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy) ++{ ++ struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; ++ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); ++ u8 ch = chan->channel; ++ u8 gidx; ++ s8 ofdm_de; ++ s8 trim_de; ++ s32 val; ++ u32 i; ++ ++ rtw89_debug(rtwdev, RTW89_DBG_TSSI, "[TSSI][TRIM]: phy=%d ch=%d\n", ++ phy, ch); ++ ++ for (i = RF_PATH_A; i < RF_PATH_NUM_8852B; i++) { ++ gidx = _tssi_get_cck_group(rtwdev, ch); ++ trim_de = _tssi_get_ofdm_trim_de(rtwdev, phy, i); ++ val = tssi_info->tssi_cck[i][gidx] + trim_de; ++ ++ rtw89_debug(rtwdev, RTW89_DBG_TSSI, ++ "[TSSI][TRIM]: path=%d cck[%d]=0x%x trim=0x%x\n", ++ i, gidx, tssi_info->tssi_cck[i][gidx], trim_de); ++ ++ rtw89_phy_write32_mask(rtwdev, _tssi_de_cck_long[i], _TSSI_DE_MASK, val); ++ rtw89_phy_write32_mask(rtwdev, _tssi_de_cck_short[i], _TSSI_DE_MASK, val); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_TSSI, ++ "[TSSI] Set TSSI CCK DE 0x%x[21:12]=0x%x\n", ++ _tssi_de_cck_long[i], ++ rtw89_phy_read32_mask(rtwdev, _tssi_de_cck_long[i], ++ _TSSI_DE_MASK)); ++ ++ ofdm_de = _tssi_get_ofdm_de(rtwdev, phy, i); ++ trim_de = _tssi_get_ofdm_trim_de(rtwdev, phy, i); ++ val = ofdm_de + trim_de; ++ ++ rtw89_debug(rtwdev, RTW89_DBG_TSSI, ++ "[TSSI][TRIM]: path=%d mcs=0x%x trim=0x%x\n", ++ i, ofdm_de, trim_de); ++ ++ rtw89_phy_write32_mask(rtwdev, _tssi_de_mcs_20m[i], _TSSI_DE_MASK, val); ++ rtw89_phy_write32_mask(rtwdev, _tssi_de_mcs_40m[i], _TSSI_DE_MASK, val); ++ rtw89_phy_write32_mask(rtwdev, _tssi_de_mcs_80m[i], _TSSI_DE_MASK, val); ++ rtw89_phy_write32_mask(rtwdev, _tssi_de_mcs_80m_80m[i], _TSSI_DE_MASK, val); ++ rtw89_phy_write32_mask(rtwdev, _tssi_de_mcs_5m[i], _TSSI_DE_MASK, val); ++ rtw89_phy_write32_mask(rtwdev, _tssi_de_mcs_10m[i], _TSSI_DE_MASK, val); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_TSSI, ++ "[TSSI] Set TSSI MCS DE 0x%x[21:12]=0x%x\n", ++ _tssi_de_mcs_20m[i], ++ rtw89_phy_read32_mask(rtwdev, _tssi_de_mcs_20m[i], ++ _TSSI_DE_MASK)); ++ } ++} ++ ++static void _tssi_alimentk_dump_result(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) ++{ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[TSSI PA K]\n0x%x = 0x%08x\n0x%x = 0x%08x\n0x%x = 0x%08x\n0x%x = 0x%08x\n" ++ "0x%x = 0x%08x\n0x%x = 0x%08x\n0x%x = 0x%08x\n0x%x = 0x%08x\n", ++ R_TSSI_PA_K1 + (path << 13), ++ rtw89_phy_read32_mask(rtwdev, R_TSSI_PA_K1 + (path << 13), MASKDWORD), ++ R_TSSI_PA_K2 + (path << 13), ++ rtw89_phy_read32_mask(rtwdev, R_TSSI_PA_K2 + (path << 13), MASKDWORD), ++ R_P0_TSSI_ALIM1 + (path << 13), ++ rtw89_phy_read32_mask(rtwdev, R_P0_TSSI_ALIM1 + (path << 13), MASKDWORD), ++ R_P0_TSSI_ALIM3 + (path << 13), ++ rtw89_phy_read32_mask(rtwdev, R_P0_TSSI_ALIM3 + (path << 13), MASKDWORD), ++ R_TSSI_PA_K5 + (path << 13), ++ rtw89_phy_read32_mask(rtwdev, R_TSSI_PA_K5 + (path << 13), MASKDWORD), ++ R_P0_TSSI_ALIM2 + (path << 13), ++ rtw89_phy_read32_mask(rtwdev, R_P0_TSSI_ALIM2 + (path << 13), MASKDWORD), ++ R_P0_TSSI_ALIM4 + (path << 13), ++ rtw89_phy_read32_mask(rtwdev, R_P0_TSSI_ALIM4 + (path << 13), MASKDWORD), ++ R_TSSI_PA_K8 + (path << 13), ++ rtw89_phy_read32_mask(rtwdev, R_TSSI_PA_K8 + (path << 13), MASKDWORD)); ++} ++ ++static void _tssi_alimentk_done(struct rtw89_dev *rtwdev, ++ enum rtw89_phy_idx phy, enum rtw89_rf_path path) ++{ ++ struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; ++ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); ++ u8 channel = chan->channel; ++ u8 band; ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "======>%s phy=%d path=%d\n", __func__, phy, path); ++ ++ if (channel >= 1 && channel <= 14) ++ band = TSSI_ALIMK_2G; ++ else if (channel >= 36 && channel <= 64) ++ band = TSSI_ALIMK_5GL; ++ else if (channel >= 100 && channel <= 144) ++ band = TSSI_ALIMK_5GM; ++ else if (channel >= 149 && channel <= 177) ++ band = TSSI_ALIMK_5GH; ++ else ++ band = TSSI_ALIMK_2G; ++ ++ if (tssi_info->alignment_done[path][band]) { ++ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_ALIM1 + (path << 13), MASKDWORD, ++ tssi_info->alignment_value[path][band][0]); ++ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_ALIM3 + (path << 13), MASKDWORD, ++ tssi_info->alignment_value[path][band][1]); ++ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_ALIM2 + (path << 13), MASKDWORD, ++ tssi_info->alignment_value[path][band][2]); ++ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_ALIM4 + (path << 13), MASKDWORD, ++ tssi_info->alignment_value[path][band][3]); ++ } ++ ++ _tssi_alimentk_dump_result(rtwdev, path); ++} ++ ++static void _tssi_hw_tx(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, ++ enum rtw89_rf_path path, u16 cnt, u16 period, s16 pwr_dbm, ++ u8 enable) ++{ ++ enum rtw89_rf_path_bit rx_path; ++ ++ if (path == RF_PATH_A) ++ rx_path = RF_A; ++ else if (path == RF_PATH_B) ++ rx_path = RF_B; ++ else if (path == RF_PATH_AB) ++ rx_path = RF_AB; ++ else ++ rx_path = RF_ABCD; /* don't change path, but still set others */ ++ ++ if (enable) { ++ rtw8852b_bb_set_plcp_tx(rtwdev); ++ rtw8852b_bb_cfg_tx_path(rtwdev, path); ++ rtw8852b_bb_ctrl_rx_path(rtwdev, rx_path); ++ rtw8852b_bb_set_power(rtwdev, pwr_dbm, phy); ++ } ++ ++ rtw8852b_bb_set_pmac_pkt_tx(rtwdev, enable, cnt, period, 20, phy); ++} ++ ++static void _tssi_backup_bb_registers(struct rtw89_dev *rtwdev, ++ enum rtw89_phy_idx phy, const u32 reg[], ++ u32 reg_backup[], u32 reg_num) ++{ ++ u32 i; ++ ++ for (i = 0; i < reg_num; i++) { ++ reg_backup[i] = rtw89_phy_read32_mask(rtwdev, reg[i], MASKDWORD); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[TSSI] Backup BB 0x%x = 0x%x\n", reg[i], ++ reg_backup[i]); ++ } ++} ++ ++static void _tssi_reload_bb_registers(struct rtw89_dev *rtwdev, ++ enum rtw89_phy_idx phy, const u32 reg[], ++ u32 reg_backup[], u32 reg_num) ++ ++{ ++ u32 i; ++ ++ for (i = 0; i < reg_num; i++) { ++ rtw89_phy_write32_mask(rtwdev, reg[i], MASKDWORD, reg_backup[i]); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[TSSI] Reload BB 0x%x = 0x%x\n", reg[i], ++ reg_backup[i]); ++ } ++} ++ ++static u8 _tssi_ch_to_idx(struct rtw89_dev *rtwdev, u8 channel) ++{ ++ u8 channel_index; ++ ++ if (channel >= 1 && channel <= 14) ++ channel_index = channel - 1; ++ else if (channel >= 36 && channel <= 64) ++ channel_index = (channel - 36) / 2 + 14; ++ else if (channel >= 100 && channel <= 144) ++ channel_index = ((channel - 100) / 2) + 15 + 14; ++ else if (channel >= 149 && channel <= 177) ++ channel_index = ((channel - 149) / 2) + 38 + 14; ++ else ++ channel_index = 0; ++ ++ return channel_index; ++} ++ ++static bool _tssi_get_cw_report(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, ++ enum rtw89_rf_path path, const s16 *power, ++ u32 *tssi_cw_rpt) ++{ ++ u32 tx_counter, tx_counter_tmp; ++ const int retry = 100; ++ u32 tmp; ++ int j, k; ++ ++ for (j = 0; j < RTW8852B_TSSI_PATH_NR; j++) { ++ rtw89_phy_write32_mask(rtwdev, _tssi_trigger[path], B_P0_TSSI_EN, 0x0); ++ rtw89_phy_write32_mask(rtwdev, _tssi_trigger[path], B_P0_TSSI_EN, 0x1); ++ ++ tx_counter = rtw89_phy_read32_mask(rtwdev, R_TX_COUNTER, MASKLWORD); ++ ++ tmp = rtw89_phy_read32_mask(rtwdev, _tssi_trigger[path], MASKDWORD); ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[TSSI PA K] 0x%x = 0x%08x path=%d\n", ++ _tssi_trigger[path], tmp, path); ++ ++ if (j == 0) ++ _tssi_hw_tx(rtwdev, phy, path, 100, 5000, power[j], true); ++ else ++ _tssi_hw_tx(rtwdev, phy, RF_PATH_ABCD, 100, 5000, power[j], true); ++ ++ tx_counter_tmp = rtw89_phy_read32_mask(rtwdev, R_TX_COUNTER, MASKLWORD); ++ tx_counter_tmp -= tx_counter; ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[TSSI PA K] First HWTXcounter=%d path=%d\n", ++ tx_counter_tmp, path); ++ ++ for (k = 0; k < retry; k++) { ++ tmp = rtw89_phy_read32_mask(rtwdev, _tssi_cw_rpt_addr[path], ++ B_TSSI_CWRPT_RDY); ++ if (tmp) ++ break; ++ ++ udelay(30); ++ ++ tx_counter_tmp = ++ rtw89_phy_read32_mask(rtwdev, R_TX_COUNTER, MASKLWORD); ++ tx_counter_tmp -= tx_counter; ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[TSSI PA K] Flow k = %d HWTXcounter=%d path=%d\n", ++ k, tx_counter_tmp, path); ++ } ++ ++ if (k >= retry) { ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[TSSI PA K] TSSI finish bit k > %d mp:100ms normal:30us path=%d\n", ++ k, path); ++ ++ _tssi_hw_tx(rtwdev, phy, path, 100, 5000, power[j], false); ++ return false; ++ } ++ ++ tssi_cw_rpt[j] = ++ rtw89_phy_read32_mask(rtwdev, _tssi_cw_rpt_addr[path], B_TSSI_CWRPT); ++ ++ _tssi_hw_tx(rtwdev, phy, path, 100, 5000, power[j], false); ++ ++ tx_counter_tmp = rtw89_phy_read32_mask(rtwdev, R_TX_COUNTER, MASKLWORD); ++ tx_counter_tmp -= tx_counter; ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[TSSI PA K] Final HWTXcounter=%d path=%d\n", ++ tx_counter_tmp, path); ++ } ++ ++ return true; ++} ++ ++static void _tssi_alimentk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, ++ enum rtw89_rf_path path) ++{ ++ static const u32 bb_reg[8] = {0x5820, 0x7820, 0x4978, 0x58e4, ++ 0x78e4, 0x49c0, 0x0d18, 0x0d80}; ++ static const s16 power_2g[4] = {48, 20, 4, 4}; ++ static const s16 power_5g[4] = {48, 20, 4, 4}; ++ struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; ++ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); ++ s32 tssi_alim_offset_1, tssi_alim_offset_2, tssi_alim_offset_3; ++ u32 tssi_cw_rpt[RTW8852B_TSSI_PATH_NR] = {0}; ++ u8 channel = chan->channel; ++ u8 ch_idx = _tssi_ch_to_idx(rtwdev, channel); ++ struct rtw8852b_bb_tssi_bak tssi_bak; ++ s32 aliment_diff, tssi_cw_default; ++ u32 start_time, finish_time; ++ u32 bb_reg_backup[8] = {0}; ++ const s16 *power; ++ u8 band; ++ bool ok; ++ u32 tmp; ++ u8 j; ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "======> %s channel=%d path=%d\n", __func__, channel, ++ path); ++ ++ if (tssi_info->check_backup_aligmk[path][ch_idx]) { ++ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_ALIM1 + (path << 13), MASKDWORD, ++ tssi_info->alignment_backup_by_ch[path][ch_idx][0]); ++ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_ALIM3 + (path << 13), MASKDWORD, ++ tssi_info->alignment_backup_by_ch[path][ch_idx][1]); ++ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_ALIM2 + (path << 13), MASKDWORD, ++ tssi_info->alignment_backup_by_ch[path][ch_idx][2]); ++ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_ALIM4 + (path << 13), MASKDWORD, ++ tssi_info->alignment_backup_by_ch[path][ch_idx][3]); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "======> %s Reload TSSI Alignment !!!\n", __func__); ++ _tssi_alimentk_dump_result(rtwdev, path); ++ return; ++ } ++ ++ start_time = ktime_get_ns(); ++ ++ if (chan->band_type == RTW89_BAND_2G) ++ power = power_2g; ++ else ++ power = power_5g; ++ ++ if (channel >= 1 && channel <= 14) ++ band = TSSI_ALIMK_2G; ++ else if (channel >= 36 && channel <= 64) ++ band = TSSI_ALIMK_5GL; ++ else if (channel >= 100 && channel <= 144) ++ band = TSSI_ALIMK_5GM; ++ else if (channel >= 149 && channel <= 177) ++ band = TSSI_ALIMK_5GH; ++ else ++ band = TSSI_ALIMK_2G; ++ ++ rtw8852b_bb_backup_tssi(rtwdev, phy, &tssi_bak); ++ _tssi_backup_bb_registers(rtwdev, phy, bb_reg, bb_reg_backup, ARRAY_SIZE(bb_reg_backup)); ++ ++ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_AVG, B_P0_TSSI_AVG, 0x8); ++ rtw89_phy_write32_mask(rtwdev, R_P1_TSSI_AVG, B_P1_TSSI_AVG, 0x8); ++ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_MV_AVG, B_P0_TSSI_MV_AVG, 0x2); ++ rtw89_phy_write32_mask(rtwdev, R_P1_TSSI_MV_AVG, B_P1_TSSI_MV_AVG, 0x2); ++ ++ ok = _tssi_get_cw_report(rtwdev, phy, path, power, tssi_cw_rpt); ++ if (!ok) ++ goto out; ++ ++ for (j = 0; j < RTW8852B_TSSI_PATH_NR; j++) { ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[TSSI PA K] power[%d]=%d tssi_cw_rpt[%d]=%d\n", j, ++ power[j], j, tssi_cw_rpt[j]); ++ } ++ ++ tmp = rtw89_phy_read32_mask(rtwdev, _tssi_cw_default_addr[path][1], ++ _tssi_cw_default_mask[1]); ++ tssi_cw_default = sign_extend32(tmp, 8); ++ tssi_alim_offset_1 = tssi_cw_rpt[0] - ((power[0] - power[1]) * 2) - ++ tssi_cw_rpt[1] + tssi_cw_default; ++ aliment_diff = tssi_alim_offset_1 - tssi_cw_default; ++ ++ tmp = rtw89_phy_read32_mask(rtwdev, _tssi_cw_default_addr[path][2], ++ _tssi_cw_default_mask[2]); ++ tssi_cw_default = sign_extend32(tmp, 8); ++ tssi_alim_offset_2 = tssi_cw_default + aliment_diff; ++ ++ tmp = rtw89_phy_read32_mask(rtwdev, _tssi_cw_default_addr[path][3], ++ _tssi_cw_default_mask[3]); ++ tssi_cw_default = sign_extend32(tmp, 8); ++ tssi_alim_offset_3 = tssi_cw_default + aliment_diff; ++ ++ if (path == RF_PATH_A) { ++ tmp = FIELD_PREP(B_P1_TSSI_ALIM11, tssi_alim_offset_1) | ++ FIELD_PREP(B_P1_TSSI_ALIM12, tssi_alim_offset_2) | ++ FIELD_PREP(B_P1_TSSI_ALIM13, tssi_alim_offset_3); ++ ++ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_ALIM1, B_P0_TSSI_ALIM1, tmp); ++ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_ALIM2, B_P0_TSSI_ALIM2, tmp); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[TSSI PA K] tssi_alim_offset = 0x%x 0x%x 0x%x 0x%x\n", ++ rtw89_phy_read32_mask(rtwdev, R_P0_TSSI_ALIM3, B_P0_TSSI_ALIM31), ++ rtw89_phy_read32_mask(rtwdev, R_P0_TSSI_ALIM1, B_P0_TSSI_ALIM11), ++ rtw89_phy_read32_mask(rtwdev, R_P0_TSSI_ALIM1, B_P0_TSSI_ALIM12), ++ rtw89_phy_read32_mask(rtwdev, R_P0_TSSI_ALIM1, B_P0_TSSI_ALIM13)); ++ } else { ++ tmp = FIELD_PREP(B_P1_TSSI_ALIM11, tssi_alim_offset_1) | ++ FIELD_PREP(B_P1_TSSI_ALIM12, tssi_alim_offset_2) | ++ FIELD_PREP(B_P1_TSSI_ALIM13, tssi_alim_offset_3); ++ ++ rtw89_phy_write32_mask(rtwdev, R_P1_TSSI_ALIM1, B_P1_TSSI_ALIM1, tmp); ++ rtw89_phy_write32_mask(rtwdev, R_P1_TSSI_ALIM2, B_P1_TSSI_ALIM2, tmp); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[TSSI PA K] tssi_alim_offset = 0x%x 0x%x 0x%x 0x%x\n", ++ rtw89_phy_read32_mask(rtwdev, R_P1_TSSI_ALIM3, B_P1_TSSI_ALIM31), ++ rtw89_phy_read32_mask(rtwdev, R_P1_TSSI_ALIM1, B_P1_TSSI_ALIM11), ++ rtw89_phy_read32_mask(rtwdev, R_P1_TSSI_ALIM1, B_P1_TSSI_ALIM12), ++ rtw89_phy_read32_mask(rtwdev, R_P1_TSSI_ALIM1, B_P1_TSSI_ALIM13)); ++ } ++ ++ tssi_info->alignment_done[path][band] = true; ++ tssi_info->alignment_value[path][band][0] = ++ rtw89_phy_read32_mask(rtwdev, R_P0_TSSI_ALIM1 + (path << 13), MASKDWORD); ++ tssi_info->alignment_value[path][band][1] = ++ rtw89_phy_read32_mask(rtwdev, R_P0_TSSI_ALIM3 + (path << 13), MASKDWORD); ++ tssi_info->alignment_value[path][band][2] = ++ rtw89_phy_read32_mask(rtwdev, R_P0_TSSI_ALIM2 + (path << 13), MASKDWORD); ++ tssi_info->alignment_value[path][band][3] = ++ rtw89_phy_read32_mask(rtwdev, R_P0_TSSI_ALIM4 + (path << 13), MASKDWORD); ++ ++ tssi_info->check_backup_aligmk[path][ch_idx] = true; ++ tssi_info->alignment_backup_by_ch[path][ch_idx][0] = ++ rtw89_phy_read32_mask(rtwdev, R_P0_TSSI_ALIM1 + (path << 13), MASKDWORD); ++ tssi_info->alignment_backup_by_ch[path][ch_idx][1] = ++ rtw89_phy_read32_mask(rtwdev, R_P0_TSSI_ALIM3 + (path << 13), MASKDWORD); ++ tssi_info->alignment_backup_by_ch[path][ch_idx][2] = ++ rtw89_phy_read32_mask(rtwdev, R_P0_TSSI_ALIM2 + (path << 13), MASKDWORD); ++ tssi_info->alignment_backup_by_ch[path][ch_idx][3] = ++ rtw89_phy_read32_mask(rtwdev, R_P0_TSSI_ALIM4 + (path << 13), MASKDWORD); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[TSSI PA K] tssi_info->alignment_value[path=%d][band=%d][0], 0x%x = 0x%08x\n", ++ path, band, R_P0_TSSI_ALIM1 + (path << 13), ++ tssi_info->alignment_value[path][band][0]); ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[TSSI PA K] tssi_info->alignment_value[path=%d][band=%d][1], 0x%x = 0x%08x\n", ++ path, band, R_P0_TSSI_ALIM3 + (path << 13), ++ tssi_info->alignment_value[path][band][1]); ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[TSSI PA K] tssi_info->alignment_value[path=%d][band=%d][2], 0x%x = 0x%08x\n", ++ path, band, R_P0_TSSI_ALIM2 + (path << 13), ++ tssi_info->alignment_value[path][band][2]); ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[TSSI PA K] tssi_info->alignment_value[path=%d][band=%d][3], 0x%x = 0x%08x\n", ++ path, band, R_P0_TSSI_ALIM4 + (path << 13), ++ tssi_info->alignment_value[path][band][3]); ++ ++out: ++ _tssi_reload_bb_registers(rtwdev, phy, bb_reg, bb_reg_backup, ARRAY_SIZE(bb_reg_backup)); ++ rtw8852b_bb_restore_tssi(rtwdev, phy, &tssi_bak); ++ rtw8852b_bb_tx_mode_switch(rtwdev, phy, 0); ++ ++ finish_time = ktime_get_ns(); ++ tssi_info->tssi_alimk_time += finish_time - start_time; ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[TSSI PA K] %s processing time = %d ms\n", __func__, ++ tssi_info->tssi_alimk_time); ++} ++ ++void rtw8852b_dpk_init(struct rtw89_dev *rtwdev) ++{ ++ _set_dpd_backoff(rtwdev, RTW89_PHY_0); ++} ++ ++void rtw8852b_rck(struct rtw89_dev *rtwdev) ++{ ++ u8 path; ++ ++ for (path = 0; path < RF_PATH_NUM_8852B; path++) ++ _rck(rtwdev, path); ++} ++ ++void rtw8852b_dack(struct rtw89_dev *rtwdev) ++{ ++ u8 phy_map = rtw89_btc_phymap(rtwdev, RTW89_PHY_0, 0); ++ ++ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_DACK, BTC_WRFK_START); ++ _dac_cal(rtwdev, false); ++ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_DACK, BTC_WRFK_STOP); ++} ++ ++void rtw8852b_iqk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx) ++{ ++ u8 phy_map = rtw89_btc_phymap(rtwdev, phy_idx, 0); ++ u32 tx_en; ++ ++ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_IQK, BTC_WRFK_START); ++ rtw89_chip_stop_sch_tx(rtwdev, phy_idx, &tx_en, RTW89_SCH_TX_SEL_ALL); ++ _wait_rx_mode(rtwdev, _kpath(rtwdev, phy_idx)); ++ ++ _iqk_init(rtwdev); ++ _iqk(rtwdev, phy_idx, false); ++ ++ rtw89_chip_resume_sch_tx(rtwdev, phy_idx, tx_en); ++ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_IQK, BTC_WRFK_STOP); ++} ++ ++void rtw8852b_rx_dck(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx) ++{ ++ u8 phy_map = rtw89_btc_phymap(rtwdev, phy_idx, 0); ++ u32 tx_en; ++ ++ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_RXDCK, BTC_WRFK_START); ++ rtw89_chip_stop_sch_tx(rtwdev, phy_idx, &tx_en, RTW89_SCH_TX_SEL_ALL); ++ _wait_rx_mode(rtwdev, _kpath(rtwdev, phy_idx)); ++ ++ _rx_dck(rtwdev, phy_idx); ++ ++ rtw89_chip_resume_sch_tx(rtwdev, phy_idx, tx_en); ++ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_RXDCK, BTC_WRFK_STOP); ++} ++ ++void rtw8852b_dpk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx) ++{ ++ u8 phy_map = rtw89_btc_phymap(rtwdev, phy_idx, 0); ++ u32 tx_en; ++ ++ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_DPK, BTC_WRFK_START); ++ rtw89_chip_stop_sch_tx(rtwdev, phy_idx, &tx_en, RTW89_SCH_TX_SEL_ALL); ++ _wait_rx_mode(rtwdev, _kpath(rtwdev, phy_idx)); ++ ++ rtwdev->dpk.is_dpk_enable = true; ++ rtwdev->dpk.is_dpk_reload_en = false; ++ _dpk(rtwdev, phy_idx, false); ++ ++ rtw89_chip_resume_sch_tx(rtwdev, phy_idx, tx_en); ++ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_DPK, BTC_WRFK_STOP); ++} ++ ++void rtw8852b_dpk_track(struct rtw89_dev *rtwdev) ++{ ++ _dpk_track(rtwdev); ++} ++ ++void rtw8852b_tssi(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, bool hwtx_en) ++{ ++ u8 phy_map = rtw89_btc_phymap(rtwdev, phy, RF_AB); ++ u32 tx_en; ++ u8 i; ++ ++ rtw89_debug(rtwdev, RTW89_DBG_TSSI, "[TSSI] %s: phy=%d\n", __func__, phy); ++ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_IQK, BTC_WRFK_ONESHOT_START); ++ ++ _tssi_disable(rtwdev, phy); ++ ++ for (i = RF_PATH_A; i < RF_PATH_NUM_8852B; i++) { ++ _tssi_rf_setting(rtwdev, phy, i); ++ _tssi_set_sys(rtwdev, phy, i); ++ _tssi_ini_txpwr_ctrl_bb(rtwdev, phy, i); ++ _tssi_ini_txpwr_ctrl_bb_he_tb(rtwdev, phy, i); ++ _tssi_set_dck(rtwdev, phy, i); ++ _tssi_set_tmeter_tbl(rtwdev, phy, i); ++ _tssi_set_dac_gain_tbl(rtwdev, phy, i); ++ _tssi_slope_cal_org(rtwdev, phy, i); ++ _tssi_alignment_default(rtwdev, phy, i, true); ++ _tssi_set_tssi_slope(rtwdev, phy, i); ++ ++ rtw89_chip_stop_sch_tx(rtwdev, phy, &tx_en, RTW89_SCH_TX_SEL_ALL); ++ _tmac_tx_pause(rtwdev, phy, true); ++ if (hwtx_en) ++ _tssi_alimentk(rtwdev, phy, i); ++ _tmac_tx_pause(rtwdev, phy, false); ++ rtw89_chip_resume_sch_tx(rtwdev, phy, tx_en); ++ } ++ ++ _tssi_enable(rtwdev, phy); ++ _tssi_set_efuse_to_de(rtwdev, phy); ++ ++ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_IQK, BTC_WRFK_ONESHOT_STOP); ++} ++ ++void rtw8852b_tssi_scan(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy) ++{ ++ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); ++ struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; ++ u8 channel = chan->channel; ++ u8 band; ++ u32 i; ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "======>%s phy=%d channel=%d\n", __func__, phy, channel); ++ ++ if (channel >= 1 && channel <= 14) ++ band = TSSI_ALIMK_2G; ++ else if (channel >= 36 && channel <= 64) ++ band = TSSI_ALIMK_5GL; ++ else if (channel >= 100 && channel <= 144) ++ band = TSSI_ALIMK_5GM; ++ else if (channel >= 149 && channel <= 177) ++ band = TSSI_ALIMK_5GH; ++ else ++ band = TSSI_ALIMK_2G; ++ ++ _tssi_disable(rtwdev, phy); ++ ++ for (i = RF_PATH_A; i < RTW8852B_TSSI_PATH_NR; i++) { ++ _tssi_rf_setting(rtwdev, phy, i); ++ _tssi_set_sys(rtwdev, phy, i); ++ _tssi_set_tmeter_tbl(rtwdev, phy, i); ++ ++ if (tssi_info->alignment_done[i][band]) ++ _tssi_alimentk_done(rtwdev, phy, i); ++ else ++ _tssi_alignment_default(rtwdev, phy, i, true); ++ } ++ ++ _tssi_enable(rtwdev, phy); ++ _tssi_set_efuse_to_de(rtwdev, phy); ++} ++ ++static void rtw8852b_tssi_default_txagc(struct rtw89_dev *rtwdev, ++ enum rtw89_phy_idx phy, bool enable) ++{ ++ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); ++ u8 channel = chan->channel; ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "======> %s ch=%d\n", ++ __func__, channel); ++ ++ if (enable) { ++ if (!rtwdev->is_tssi_mode[RF_PATH_A] && !rtwdev->is_tssi_mode[RF_PATH_B]) ++ rtw8852b_tssi(rtwdev, phy, true); ++ return; ++ } ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "======>%s 1 SCAN_END Set 0x5818[7:0]=0x%x 0x7818[7:0]=0x%x\n", ++ __func__, ++ rtw89_phy_read32_mask(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_OFT), ++ rtw89_phy_read32_mask(rtwdev, R_P1_TSSI_TRK, B_P1_TSSI_OFT)); ++ ++ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_OFT, 0xc0); ++ rtw89_phy_write32_mask(rtwdev, R_P1_TSSI_TRK, B_P1_TSSI_OFT, 0xc0); ++ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_OFT_EN, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_OFT_EN, 0x1); ++ rtw89_phy_write32_mask(rtwdev, R_P1_TSSI_TRK, B_P1_TSSI_OFT_EN, 0x0); ++ rtw89_phy_write32_mask(rtwdev, R_P1_TSSI_TRK, B_P1_TSSI_OFT_EN, 0x1); ++ ++ _tssi_alimentk_done(rtwdev, phy, RF_PATH_A); ++ _tssi_alimentk_done(rtwdev, phy, RF_PATH_B); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "======>%s 2 SCAN_END Set 0x5818[7:0]=0x%x 0x7818[7:0]=0x%x\n", ++ __func__, ++ rtw89_phy_read32_mask(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_OFT), ++ rtw89_phy_read32_mask(rtwdev, R_P1_TSSI_TRK, B_P1_TSSI_OFT)); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "======> %s SCAN_END\n", __func__); ++} ++ ++void rtw8852b_wifi_scan_notify(struct rtw89_dev *rtwdev, bool scan_start, ++ enum rtw89_phy_idx phy_idx) ++{ ++ if (scan_start) ++ rtw8852b_tssi_default_txagc(rtwdev, phy_idx, true); ++ else ++ rtw8852b_tssi_default_txagc(rtwdev, phy_idx, false); ++} ++ ++static void _bw_setting(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, ++ enum rtw89_bandwidth bw, bool dav) ++{ ++ u32 rf_reg18; ++ u32 reg18_addr = dav ? RR_CFGCH : RR_CFGCH_V1; ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RFK]===> %s\n", __func__); ++ ++ rf_reg18 = rtw89_read_rf(rtwdev, path, reg18_addr, RFREG_MASK); ++ if (rf_reg18 == INV_RF_DATA) { ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[RFK]Invalid RF_0x18 for Path-%d\n", path); ++ return; ++ } ++ rf_reg18 &= ~RR_CFGCH_BW; ++ ++ switch (bw) { ++ case RTW89_CHANNEL_WIDTH_5: ++ case RTW89_CHANNEL_WIDTH_10: ++ case RTW89_CHANNEL_WIDTH_20: ++ rf_reg18 |= FIELD_PREP(RR_CFGCH_BW, CFGCH_BW_20M); ++ break; ++ case RTW89_CHANNEL_WIDTH_40: ++ rf_reg18 |= FIELD_PREP(RR_CFGCH_BW, CFGCH_BW_40M); ++ break; ++ case RTW89_CHANNEL_WIDTH_80: ++ rf_reg18 |= FIELD_PREP(RR_CFGCH_BW, CFGCH_BW_80M); ++ break; ++ default: ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RFK]Fail to set CH\n"); ++ } ++ ++ rf_reg18 &= ~(RR_CFGCH_POW_LCK | RR_CFGCH_TRX_AH | RR_CFGCH_BCN | ++ RR_CFGCH_BW2) & RFREG_MASK; ++ rf_reg18 |= RR_CFGCH_BW2; ++ rtw89_write_rf(rtwdev, path, reg18_addr, RFREG_MASK, rf_reg18); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RFK] set %x at path%d, %x =0x%x\n", ++ bw, path, reg18_addr, ++ rtw89_read_rf(rtwdev, path, reg18_addr, RFREG_MASK)); ++} ++ ++static void _ctrl_bw(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, ++ enum rtw89_bandwidth bw) ++{ ++ _bw_setting(rtwdev, RF_PATH_A, bw, true); ++ _bw_setting(rtwdev, RF_PATH_B, bw, true); ++ _bw_setting(rtwdev, RF_PATH_A, bw, false); ++ _bw_setting(rtwdev, RF_PATH_B, bw, false); ++} ++ ++static bool _set_s0_arfc18(struct rtw89_dev *rtwdev, u32 val) ++{ ++ u32 bak; ++ u32 tmp; ++ int ret; ++ ++ bak = rtw89_read_rf(rtwdev, RF_PATH_A, RR_LDO, RFREG_MASK); ++ rtw89_write_rf(rtwdev, RF_PATH_A, RR_LDO, RR_LDO_SEL, 0x1); ++ rtw89_write_rf(rtwdev, RF_PATH_A, RR_CFGCH, RFREG_MASK, val); ++ ++ ret = read_poll_timeout_atomic(rtw89_read_rf, tmp, tmp == 0, 1, 1000, ++ false, rtwdev, RF_PATH_A, RR_LPF, RR_LPF_BUSY); ++ if (ret) ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[LCK]LCK timeout\n"); ++ ++ rtw89_write_rf(rtwdev, RF_PATH_A, RR_LDO, RFREG_MASK, bak); ++ ++ return !!ret; ++} ++ ++static void _lck_check(struct rtw89_dev *rtwdev) ++{ ++ u32 tmp; ++ ++ if (rtw89_read_rf(rtwdev, RF_PATH_A, RR_SYNFB, RR_SYNFB_LK) == 0) { ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[LCK]SYN MMD reset\n"); ++ ++ rtw89_write_rf(rtwdev, RF_PATH_A, RR_MMD, RR_MMD_RST_EN, 0x1); ++ rtw89_write_rf(rtwdev, RF_PATH_A, RR_MMD, RR_MMD_RST_SYN, 0x0); ++ rtw89_write_rf(rtwdev, RF_PATH_A, RR_MMD, RR_MMD_RST_SYN, 0x1); ++ rtw89_write_rf(rtwdev, RF_PATH_A, RR_MMD, RR_MMD_RST_EN, 0x0); ++ } ++ ++ udelay(10); ++ ++ if (rtw89_read_rf(rtwdev, RF_PATH_A, RR_SYNFB, RR_SYNFB_LK) == 0) { ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[LCK]re-set RF 0x18\n"); ++ ++ rtw89_write_rf(rtwdev, RF_PATH_A, RR_LCK_TRG, RR_LCK_TRGSEL, 0x1); ++ tmp = rtw89_read_rf(rtwdev, RF_PATH_A, RR_CFGCH, RFREG_MASK); ++ _set_s0_arfc18(rtwdev, tmp); ++ rtw89_write_rf(rtwdev, RF_PATH_A, RR_LCK_TRG, RR_LCK_TRGSEL, 0x0); ++ } ++ ++ if (rtw89_read_rf(rtwdev, RF_PATH_A, RR_SYNFB, RR_SYNFB_LK) == 0) { ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[LCK]SYN off/on\n"); ++ ++ tmp = rtw89_read_rf(rtwdev, RF_PATH_A, RR_POW, RFREG_MASK); ++ rtw89_write_rf(rtwdev, RF_PATH_A, RR_POW, RFREG_MASK, tmp); ++ tmp = rtw89_read_rf(rtwdev, RF_PATH_A, RR_SX, RFREG_MASK); ++ rtw89_write_rf(rtwdev, RF_PATH_A, RR_SX, RFREG_MASK, tmp); ++ ++ rtw89_write_rf(rtwdev, RF_PATH_A, RR_SYNLUT, RR_SYNLUT_MOD, 0x1); ++ rtw89_write_rf(rtwdev, RF_PATH_A, RR_POW, RR_POW_SYN, 0x0); ++ rtw89_write_rf(rtwdev, RF_PATH_A, RR_POW, RR_POW_SYN, 0x3); ++ rtw89_write_rf(rtwdev, RF_PATH_A, RR_SYNLUT, RR_SYNLUT_MOD, 0x0); ++ ++ rtw89_write_rf(rtwdev, RF_PATH_A, RR_LCK_TRG, RR_LCK_TRGSEL, 0x1); ++ tmp = rtw89_read_rf(rtwdev, RF_PATH_A, RR_CFGCH, RFREG_MASK); ++ _set_s0_arfc18(rtwdev, tmp); ++ rtw89_write_rf(rtwdev, RF_PATH_A, RR_LCK_TRG, RR_LCK_TRGSEL, 0x0); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[LCK]0xb2=%x, 0xc5=%x\n", ++ rtw89_read_rf(rtwdev, RF_PATH_A, RR_VCO, RFREG_MASK), ++ rtw89_read_rf(rtwdev, RF_PATH_A, RR_SYNFB, RFREG_MASK)); ++ } ++} ++ ++static void _set_ch(struct rtw89_dev *rtwdev, u32 val) ++{ ++ bool timeout; ++ ++ timeout = _set_s0_arfc18(rtwdev, val); ++ if (!timeout) ++ _lck_check(rtwdev); ++} ++ ++static void _ch_setting(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, ++ u8 central_ch, bool dav) ++{ ++ u32 reg18_addr = dav ? RR_CFGCH : RR_CFGCH_V1; ++ bool is_2g_ch = central_ch <= 14; ++ u32 rf_reg18; ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RFK]===> %s\n", __func__); ++ ++ rf_reg18 = rtw89_read_rf(rtwdev, path, reg18_addr, RFREG_MASK); ++ rf_reg18 &= ~(RR_CFGCH_BAND1 | RR_CFGCH_POW_LCK | RR_CFGCH_TRX_AH | ++ RR_CFGCH_BCN | RR_CFGCH_BAND0 | RR_CFGCH_CH); ++ rf_reg18 |= FIELD_PREP(RR_CFGCH_CH, central_ch); ++ ++ if (!is_2g_ch) ++ rf_reg18 |= FIELD_PREP(RR_CFGCH_BAND1, CFGCH_BAND1_5G) | ++ FIELD_PREP(RR_CFGCH_BAND0, CFGCH_BAND0_5G); ++ ++ rf_reg18 &= ~(RR_CFGCH_POW_LCK | RR_CFGCH_TRX_AH | RR_CFGCH_BCN | ++ RR_CFGCH_BW2) & RFREG_MASK; ++ rf_reg18 |= RR_CFGCH_BW2; ++ ++ if (path == RF_PATH_A && dav) ++ _set_ch(rtwdev, rf_reg18); ++ else ++ rtw89_write_rf(rtwdev, path, reg18_addr, RFREG_MASK, rf_reg18); ++ ++ rtw89_write_rf(rtwdev, path, RR_LCKST, RR_LCKST_BIN, 0); ++ rtw89_write_rf(rtwdev, path, RR_LCKST, RR_LCKST_BIN, 1); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, ++ "[RFK]CH: %d for Path-%d, reg0x%x = 0x%x\n", ++ central_ch, path, reg18_addr, ++ rtw89_read_rf(rtwdev, path, reg18_addr, RFREG_MASK)); ++} ++ ++static void _ctrl_ch(struct rtw89_dev *rtwdev, u8 central_ch) ++{ ++ _ch_setting(rtwdev, RF_PATH_A, central_ch, true); ++ _ch_setting(rtwdev, RF_PATH_B, central_ch, true); ++ _ch_setting(rtwdev, RF_PATH_A, central_ch, false); ++ _ch_setting(rtwdev, RF_PATH_B, central_ch, false); ++} ++ ++static void _set_rxbb_bw(struct rtw89_dev *rtwdev, enum rtw89_bandwidth bw, ++ enum rtw89_rf_path path) ++{ ++ rtw89_write_rf(rtwdev, path, RR_LUTWE2, RR_LUTWE2_RTXBW, 0x1); ++ rtw89_write_rf(rtwdev, path, RR_LUTWA, RR_LUTWA_M2, 0x12); ++ ++ if (bw == RTW89_CHANNEL_WIDTH_20) ++ rtw89_write_rf(rtwdev, path, RR_LUTWD0, RR_LUTWD0_LB, 0x1b); ++ else if (bw == RTW89_CHANNEL_WIDTH_40) ++ rtw89_write_rf(rtwdev, path, RR_LUTWD0, RR_LUTWD0_LB, 0x13); ++ else if (bw == RTW89_CHANNEL_WIDTH_80) ++ rtw89_write_rf(rtwdev, path, RR_LUTWD0, RR_LUTWD0_LB, 0xb); ++ else ++ rtw89_write_rf(rtwdev, path, RR_LUTWD0, RR_LUTWD0_LB, 0x3); ++ ++ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RFK] set S%d RXBB BW 0x3F = 0x%x\n", path, ++ rtw89_read_rf(rtwdev, path, RR_LUTWD0, RR_LUTWD0_LB)); ++ ++ rtw89_write_rf(rtwdev, path, RR_LUTWE2, RR_LUTWE2_RTXBW, 0x0); ++} ++ ++static void _rxbb_bw(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, ++ enum rtw89_bandwidth bw) ++{ ++ u8 kpath, path; ++ ++ kpath = _kpath(rtwdev, phy); ++ ++ for (path = 0; path < RF_PATH_NUM_8852B; path++) { ++ if (!(kpath & BIT(path))) ++ continue; ++ ++ _set_rxbb_bw(rtwdev, bw, path); ++ } ++} ++ ++static void rtw8852b_ctrl_bw_ch(struct rtw89_dev *rtwdev, ++ enum rtw89_phy_idx phy, u8 central_ch, ++ enum rtw89_band band, enum rtw89_bandwidth bw) ++{ ++ _ctrl_ch(rtwdev, central_ch); ++ _ctrl_bw(rtwdev, phy, bw); ++ _rxbb_bw(rtwdev, phy, bw); ++} ++ ++void rtw8852b_set_channel_rf(struct rtw89_dev *rtwdev, ++ const struct rtw89_chan *chan, ++ enum rtw89_phy_idx phy_idx) ++{ ++ rtw8852b_ctrl_bw_ch(rtwdev, phy_idx, chan->channel, chan->band_type, ++ chan->band_width); ++} +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.h linux-6.2/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.h +--- linux-6.1/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.h 2022-12-24 00:49:25.783376835 +0200 +@@ -0,0 +1,25 @@ ++/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ ++/* Copyright(c) 2019-2022 Realtek Corporation ++ */ ++ ++#ifndef __RTW89_8852B_RFK_H__ ++#define __RTW89_8852B_RFK_H__ ++ ++#include "core.h" ++ ++void rtw8852b_rck(struct rtw89_dev *rtwdev); ++void rtw8852b_dack(struct rtw89_dev *rtwdev); ++void rtw8852b_iqk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx); ++void rtw8852b_rx_dck(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx); ++void rtw8852b_dpk_init(struct rtw89_dev *rtwdev); ++void rtw8852b_dpk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy); ++void rtw8852b_dpk_track(struct rtw89_dev *rtwdev); ++void rtw8852b_tssi(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, bool hwtx_en); ++void rtw8852b_tssi_scan(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy); ++void rtw8852b_wifi_scan_notify(struct rtw89_dev *rtwdev, bool scan_start, ++ enum rtw89_phy_idx phy_idx); ++void rtw8852b_set_channel_rf(struct rtw89_dev *rtwdev, ++ const struct rtw89_chan *chan, ++ enum rtw89_phy_idx phy_idx); ++ ++#endif +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk_table.c linux-6.2/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk_table.c +--- linux-6.1/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk_table.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk_table.c 2022-12-24 00:49:25.783376835 +0200 +@@ -0,0 +1,794 @@ ++// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause ++/* Copyright(c) 2019-2020 Realtek Corporation ++ */ ++ ++#include "rtw8852b_rfk_table.h" ++ ++static const struct rtw89_reg5_def rtw8852b_afe_init_defs[] = { ++ RTW89_DECL_RFK_WM(0xC0D4, 0xffffffff, 0x4486888c), ++ RTW89_DECL_RFK_WM(0xC0D8, 0xffffffff, 0xc6ba10e0), ++ RTW89_DECL_RFK_WM(0xc0dc, 0xffffffff, 0x30c52868), ++ RTW89_DECL_RFK_WM(0xc0e0, 0xffffffff, 0x05008128), ++ RTW89_DECL_RFK_WM(0xc0e4, 0xffffffff, 0x0000272b), ++ RTW89_DECL_RFK_WM(0xC1D4, 0xffffffff, 0x4486888c), ++ RTW89_DECL_RFK_WM(0xC1D8, 0xffffffff, 0xc6ba10e0), ++ RTW89_DECL_RFK_WM(0xc1dc, 0xffffffff, 0x30c52868), ++ RTW89_DECL_RFK_WM(0xc1e0, 0xffffffff, 0x05008128), ++ RTW89_DECL_RFK_WM(0xc1e4, 0xffffffff, 0x0000272b), ++}; ++ ++RTW89_DECLARE_RFK_TBL(rtw8852b_afe_init_defs); ++ ++static const struct rtw89_reg5_def rtw8852b_check_addc_defs_a[] = { ++ RTW89_DECL_RFK_WM(0x20f4, BIT(24), 0x0), ++ RTW89_DECL_RFK_WM(0x20f8, 0x80000000, 0x1), ++ RTW89_DECL_RFK_WM(0x20f0, 0xff0000, 0x1), ++ RTW89_DECL_RFK_WM(0x20f0, 0xf00, 0x2), ++ RTW89_DECL_RFK_WM(0x20f0, 0xf, 0x0), ++ RTW89_DECL_RFK_WM(0x20f0, 0xc0, 0x2), ++}; ++ ++RTW89_DECLARE_RFK_TBL(rtw8852b_check_addc_defs_a); ++ ++static const struct rtw89_reg5_def rtw8852b_check_addc_defs_b[] = { ++ RTW89_DECL_RFK_WM(0x20f4, BIT(24), 0x0), ++ RTW89_DECL_RFK_WM(0x20f8, 0x80000000, 0x1), ++ RTW89_DECL_RFK_WM(0x20f0, 0xff0000, 0x1), ++ RTW89_DECL_RFK_WM(0x20f0, 0xf00, 0x2), ++ RTW89_DECL_RFK_WM(0x20f0, 0xf, 0x0), ++ RTW89_DECL_RFK_WM(0x20f0, 0xc0, 0x3), ++}; ++ ++RTW89_DECLARE_RFK_TBL(rtw8852b_check_addc_defs_b); ++ ++static const struct rtw89_reg5_def rtw8852b_check_dadc_en_defs_a[] = { ++ RTW89_DECL_RFK_WM(0x032C, BIT(30), 0x0), ++ RTW89_DECL_RFK_WM(0x030C, 0x0f000000, 0xf), ++ RTW89_DECL_RFK_WM(0x030C, 0x0f000000, 0x3), ++ RTW89_DECL_RFK_WM(0x032C, BIT(16), 0x0), ++ RTW89_DECL_RFK_WM(0x12dc, BIT(0), 0x1), ++ RTW89_DECL_RFK_WM(0x12e8, BIT(2), 0x1), ++ RTW89_DECL_RFK_WRF(RF_PATH_A, 0x8f, BIT(13), 0x1), ++}; ++ ++RTW89_DECLARE_RFK_TBL(rtw8852b_check_dadc_en_defs_a); ++ ++static const struct rtw89_reg5_def rtw8852b_check_dadc_en_defs_b[] = { ++ RTW89_DECL_RFK_WM(0x032C, BIT(30), 0x0), ++ RTW89_DECL_RFK_WM(0x030C, 0x0f000000, 0xf), ++ RTW89_DECL_RFK_WM(0x030C, 0x0f000000, 0x3), ++ RTW89_DECL_RFK_WM(0x032C, BIT(16), 0x0), ++ RTW89_DECL_RFK_WM(0x32dc, BIT(0), 0x1), ++ RTW89_DECL_RFK_WM(0x32e8, BIT(2), 0x1), ++ RTW89_DECL_RFK_WRF(RF_PATH_B, 0x8f, BIT(13), 0x1), ++}; ++ ++RTW89_DECLARE_RFK_TBL(rtw8852b_check_dadc_en_defs_b); ++ ++static const struct rtw89_reg5_def rtw8852b_check_dadc_dis_defs_a[] = { ++ RTW89_DECL_RFK_WM(0x12dc, BIT(0), 0x0), ++ RTW89_DECL_RFK_WM(0x12e8, BIT(2), 0x0), ++ RTW89_DECL_RFK_WRF(RF_PATH_A, 0x8f, BIT(13), 0x0), ++ RTW89_DECL_RFK_WM(0x032C, BIT(16), 0x1), ++}; ++ ++RTW89_DECLARE_RFK_TBL(rtw8852b_check_dadc_dis_defs_a); ++ ++static const struct rtw89_reg5_def rtw8852b_check_dadc_dis_defs_b[] = { ++ RTW89_DECL_RFK_WM(0x32dc, BIT(0), 0x0), ++ RTW89_DECL_RFK_WM(0x32e8, BIT(2), 0x0), ++ RTW89_DECL_RFK_WRF(RF_PATH_B, 0x8f, BIT(13), 0x0), ++ RTW89_DECL_RFK_WM(0x032C, BIT(16), 0x1), ++}; ++ ++RTW89_DECLARE_RFK_TBL(rtw8852b_check_dadc_dis_defs_b); ++ ++static const struct rtw89_reg5_def rtw8852b_dack_s0_1_defs[] = { ++ RTW89_DECL_RFK_WM(0x12A0, BIT(15), 0x1), ++ RTW89_DECL_RFK_WM(0x12A0, 0x00007000, 0x3), ++ RTW89_DECL_RFK_WM(0x12B8, BIT(30), 0x1), ++ RTW89_DECL_RFK_WM(0x030C, BIT(28), 0x1), ++ RTW89_DECL_RFK_WM(0x032C, 0x80000000, 0x0), ++ RTW89_DECL_RFK_WM(0xC0D8, BIT(16), 0x1), ++ RTW89_DECL_RFK_WM(0xc0dc, 0x0c000000, 0x3), ++ RTW89_DECL_RFK_WM(0xC004, BIT(30), 0x0), ++ RTW89_DECL_RFK_WM(0xc024, BIT(30), 0x0), ++ RTW89_DECL_RFK_WM(0xC004, 0x3ff00000, 0x30), ++ RTW89_DECL_RFK_WM(0xC004, 0xc0000000, 0x0), ++ RTW89_DECL_RFK_WM(0xC004, BIT(17), 0x1), ++ RTW89_DECL_RFK_WM(0xc024, BIT(17), 0x1), ++ RTW89_DECL_RFK_WM(0xc00c, BIT(2), 0x0), ++ RTW89_DECL_RFK_WM(0xc02c, BIT(2), 0x0), ++ RTW89_DECL_RFK_WM(0xC004, BIT(0), 0x1), ++ RTW89_DECL_RFK_WM(0xc024, BIT(0), 0x1), ++ RTW89_DECL_RFK_DELAY(1), ++}; ++ ++RTW89_DECLARE_RFK_TBL(rtw8852b_dack_s0_1_defs); ++ ++static const struct rtw89_reg5_def rtw8852b_dack_s0_2_defs[] = { ++ RTW89_DECL_RFK_WM(0xc0dc, 0x0c000000, 0x0), ++ RTW89_DECL_RFK_WM(0xc00c, BIT(2), 0x1), ++ RTW89_DECL_RFK_WM(0xc02c, BIT(2), 0x1), ++}; ++ ++RTW89_DECLARE_RFK_TBL(rtw8852b_dack_s0_2_defs); ++ ++static const struct rtw89_reg5_def rtw8852b_dack_s0_3_defs[] = { ++ RTW89_DECL_RFK_WM(0xC004, BIT(0), 0x0), ++ RTW89_DECL_RFK_WM(0xc024, BIT(0), 0x0), ++ RTW89_DECL_RFK_WM(0xC0D8, BIT(16), 0x0), ++ RTW89_DECL_RFK_WM(0x12A0, BIT(15), 0x0), ++ RTW89_DECL_RFK_WM(0x12A0, 0x00007000, 0x7), ++}; ++ ++RTW89_DECLARE_RFK_TBL(rtw8852b_dack_s0_3_defs); ++ ++static const struct rtw89_reg5_def rtw8852b_dack_s1_1_defs[] = { ++ RTW89_DECL_RFK_WM(0x32a0, BIT(15), 0x1), ++ RTW89_DECL_RFK_WM(0x32a0, 0x7000, 0x3), ++ RTW89_DECL_RFK_WM(0x32B8, BIT(30), 0x1), ++ RTW89_DECL_RFK_WM(0x030C, BIT(28), 0x1), ++ RTW89_DECL_RFK_WM(0x032C, 0x80000000, 0x0), ++ RTW89_DECL_RFK_WM(0xC1D8, BIT(16), 0x1), ++ RTW89_DECL_RFK_WM(0xc1dc, 0x0c000000, 0x3), ++ RTW89_DECL_RFK_WM(0xc104, BIT(30), 0x0), ++ RTW89_DECL_RFK_WM(0xc124, BIT(30), 0x0), ++ RTW89_DECL_RFK_WM(0xc104, 0x3ff00000, 0x30), ++ RTW89_DECL_RFK_WM(0xc104, 0xc0000000, 0x0), ++ RTW89_DECL_RFK_WM(0xc104, BIT(17), 0x1), ++ RTW89_DECL_RFK_WM(0xc124, BIT(17), 0x1), ++ RTW89_DECL_RFK_WM(0xc10c, BIT(2), 0x0), ++ RTW89_DECL_RFK_WM(0xc12c, BIT(2), 0x0), ++ RTW89_DECL_RFK_WM(0xc104, BIT(0), 0x1), ++ RTW89_DECL_RFK_WM(0xc124, BIT(0), 0x1), ++ RTW89_DECL_RFK_DELAY(1), ++}; ++ ++RTW89_DECLARE_RFK_TBL(rtw8852b_dack_s1_1_defs); ++ ++static const struct rtw89_reg5_def rtw8852b_dack_s1_2_defs[] = { ++ RTW89_DECL_RFK_WM(0xc1dc, 0x0c000000, 0x0), ++ RTW89_DECL_RFK_WM(0xc10c, BIT(2), 0x1), ++ RTW89_DECL_RFK_WM(0xc12c, BIT(2), 0x1), ++ RTW89_DECL_RFK_DELAY(1), ++}; ++ ++RTW89_DECLARE_RFK_TBL(rtw8852b_dack_s1_2_defs); ++ ++static const struct rtw89_reg5_def rtw8852b_dack_s1_3_defs[] = { ++ RTW89_DECL_RFK_WM(0xc104, BIT(0), 0x0), ++ RTW89_DECL_RFK_WM(0xc124, BIT(0), 0x0), ++ RTW89_DECL_RFK_WM(0xC1D8, BIT(16), 0x0), ++ RTW89_DECL_RFK_WM(0x32a0, BIT(15), 0x0), ++ RTW89_DECL_RFK_WM(0x32a0, 0x7000, 0x7), ++}; ++ ++RTW89_DECLARE_RFK_TBL(rtw8852b_dack_s1_3_defs); ++ ++static const struct rtw89_reg5_def rtw8852b_dpk_afe_defs[] = { ++ RTW89_DECL_RFK_WM(0x20fc, 0xffff0000, 0x0303), ++ RTW89_DECL_RFK_WM(0x12b8, BIT(30), 0x1), ++ RTW89_DECL_RFK_WM(0x32b8, BIT(30), 0x1), ++ RTW89_DECL_RFK_WM(0x030c, 0xff000000, 0x13), ++ RTW89_DECL_RFK_WM(0x032c, 0xffff0000, 0x0041), ++ RTW89_DECL_RFK_WM(0x12b8, BIT(28), 0x1), ++ RTW89_DECL_RFK_WM(0x58c8, BIT(24), 0x1), ++ RTW89_DECL_RFK_WM(0x78c8, BIT(24), 0x1), ++ RTW89_DECL_RFK_WM(0x5864, 0xc0000000, 0x3), ++ RTW89_DECL_RFK_WM(0x7864, 0xc0000000, 0x3), ++ RTW89_DECL_RFK_WM(0x2008, 0x01FFFFFF, 0x1ffffff), ++ RTW89_DECL_RFK_WM(0x0c1c, BIT(2), 0x1), ++ RTW89_DECL_RFK_WM(0x0700, BIT(27), 0x1), ++ RTW89_DECL_RFK_WM(0x0c70, 0x000003FF, 0x3ff), ++ RTW89_DECL_RFK_WM(0x0c60, 0x00000003, 0x3), ++ RTW89_DECL_RFK_WM(0x0c6c, BIT(0), 0x1), ++ RTW89_DECL_RFK_WM(0x58ac, BIT(27), 0x1), ++ RTW89_DECL_RFK_WM(0x78ac, BIT(27), 0x1), ++ RTW89_DECL_RFK_WM(0x0c3c, BIT(9), 0x1), ++ RTW89_DECL_RFK_WM(0x2344, BIT(31), 0x1), ++ RTW89_DECL_RFK_WM(0x4490, BIT(31), 0x1), ++ RTW89_DECL_RFK_WM(0x12a0, 0x000ff000, 0xbf), ++ RTW89_DECL_RFK_WM(0x32a0, 0x000f0000, 0xb), ++ RTW89_DECL_RFK_WM(0x0700, 0x07000000, 0x5), ++ RTW89_DECL_RFK_WM(0x20fc, 0xffff0000, 0x3333), ++ RTW89_DECL_RFK_WM(0x580c, BIT(15), 0x1), ++ RTW89_DECL_RFK_WM(0x5800, 0x0000ffff, 0x0000), ++ RTW89_DECL_RFK_WM(0x780c, BIT(15), 0x1), ++ RTW89_DECL_RFK_WM(0x7800, 0x0000ffff, 0x0000), ++}; ++ ++RTW89_DECLARE_RFK_TBL(rtw8852b_dpk_afe_defs); ++ ++static const struct rtw89_reg5_def rtw8852b_dpk_afe_restore_defs[] = { ++ RTW89_DECL_RFK_WM(0x20fc, 0xffff0000, 0x0303), ++ RTW89_DECL_RFK_WM(0x12b8, BIT(30), 0x0), ++ RTW89_DECL_RFK_WM(0x32b8, BIT(30), 0x0), ++ RTW89_DECL_RFK_WM(0x5864, 0xc0000000, 0x0), ++ RTW89_DECL_RFK_WM(0x7864, 0xc0000000, 0x0), ++ RTW89_DECL_RFK_WM(0x2008, 0x01FFFFFF, 0x0), ++ RTW89_DECL_RFK_WM(0x0c1c, BIT(2), 0x0), ++ RTW89_DECL_RFK_WM(0x0700, BIT(27), 0x0), ++ RTW89_DECL_RFK_WM(0x0c70, 0x000003FF, 0x63), ++ RTW89_DECL_RFK_WM(0x12a0, 0x000FF000, 0x00), ++ RTW89_DECL_RFK_WM(0x32a0, 0x000FF000, 0x00), ++ RTW89_DECL_RFK_WM(0x0700, 0x07000000, 0x0), ++ RTW89_DECL_RFK_WM(0x5864, BIT(29), 0x0), ++ RTW89_DECL_RFK_WM(0x7864, BIT(29), 0x0), ++ RTW89_DECL_RFK_WM(0x20fc, 0xffff0000, 0x0000), ++ RTW89_DECL_RFK_WM(0x58c8, BIT(24), 0x0), ++ RTW89_DECL_RFK_WM(0x78c8, BIT(24), 0x0), ++ RTW89_DECL_RFK_WM(0x0c3c, BIT(9), 0x0), ++ RTW89_DECL_RFK_WM(0x580c, BIT(15), 0x0), ++ RTW89_DECL_RFK_WM(0x58e4, 0x18000000, 0x1), ++ RTW89_DECL_RFK_WM(0x58e4, 0x18000000, 0x2), ++ RTW89_DECL_RFK_WM(0x780c, BIT(15), 0x0), ++ RTW89_DECL_RFK_WM(0x78e4, 0x18000000, 0x1), ++ RTW89_DECL_RFK_WM(0x78e4, 0x18000000, 0x2), ++}; ++ ++RTW89_DECLARE_RFK_TBL(rtw8852b_dpk_afe_restore_defs); ++ ++static const struct rtw89_reg5_def rtw8852b_dpk_kip_defs[] = { ++ RTW89_DECL_RFK_WM(0x8008, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x8088, 0xffffffff, 0x80000000), ++}; ++ ++RTW89_DECLARE_RFK_TBL(rtw8852b_dpk_kip_defs); ++ ++static const struct rtw89_reg5_def rtw8852b_tssi_sys_defs[] = { ++ RTW89_DECL_RFK_WM(0x12a8, 0x0000000f, 0x5), ++ RTW89_DECL_RFK_WM(0x32a8, 0x0000000f, 0x5), ++ RTW89_DECL_RFK_WM(0x12bc, 0x000ffff0, 0x5555), ++ RTW89_DECL_RFK_WM(0x32bc, 0x000ffff0, 0x5555), ++ RTW89_DECL_RFK_WM(0x0300, 0xff000000, 0x16), ++ RTW89_DECL_RFK_WM(0x0304, 0x000000ff, 0x19), ++ RTW89_DECL_RFK_WM(0x0314, 0xffff0000, 0x2041), ++ RTW89_DECL_RFK_WM(0x0318, 0xffffffff, 0x2041), ++ RTW89_DECL_RFK_WM(0x0318, 0xffffffff, 0x20012041), ++ RTW89_DECL_RFK_WM(0x0020, 0x00006000, 0x3), ++ RTW89_DECL_RFK_WM(0x0024, 0x00006000, 0x3), ++ RTW89_DECL_RFK_WM(0x0704, 0xffff0000, 0x601e), ++ RTW89_DECL_RFK_WM(0x2704, 0xffff0000, 0x601e), ++ RTW89_DECL_RFK_WM(0x0700, 0xf0000000, 0x4), ++ RTW89_DECL_RFK_WM(0x2700, 0xf0000000, 0x4), ++ RTW89_DECL_RFK_WM(0x0650, 0x3c000000, 0x0), ++ RTW89_DECL_RFK_WM(0x2650, 0x3c000000, 0x0), ++}; ++ ++RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_sys_defs); ++ ++static const struct rtw89_reg5_def rtw8852b_tssi_sys_a_defs_2g[] = { ++ RTW89_DECL_RFK_WM(0x120c, 0x000000ff, 0x33), ++ RTW89_DECL_RFK_WM(0x12c0, 0x0ff00000, 0x33), ++ RTW89_DECL_RFK_WM(0x58f8, 0x40000000, 0x1), ++ RTW89_DECL_RFK_WM(0x0304, 0x0000ff00, 0x1e), ++}; ++ ++RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_sys_a_defs_2g); ++ ++static const struct rtw89_reg5_def rtw8852b_tssi_sys_a_defs_5g[] = { ++ RTW89_DECL_RFK_WM(0x120c, 0x000000ff, 0x44), ++ RTW89_DECL_RFK_WM(0x12c0, 0x0ff00000, 0x44), ++ RTW89_DECL_RFK_WM(0x58f8, 0x40000000, 0x0), ++ RTW89_DECL_RFK_WM(0x0304, 0x0000ff00, 0x1d), ++}; ++ ++RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_sys_a_defs_5g); ++ ++static const struct rtw89_reg5_def rtw8852b_tssi_sys_b_defs_2g[] = { ++ RTW89_DECL_RFK_WM(0x32c0, 0x0ff00000, 0x33), ++ RTW89_DECL_RFK_WM(0x320c, 0x000000ff, 0x33), ++ RTW89_DECL_RFK_WM(0x78f8, 0x40000000, 0x1), ++ RTW89_DECL_RFK_WM(0x0304, 0x0000ff00, 0x1e), ++}; ++ ++RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_sys_b_defs_2g); ++ ++static const struct rtw89_reg5_def rtw8852b_tssi_sys_b_defs_5g[] = { ++ RTW89_DECL_RFK_WM(0x32c0, 0x0ff00000, 0x44), ++ RTW89_DECL_RFK_WM(0x320c, 0x000000ff, 0x44), ++ RTW89_DECL_RFK_WM(0x78f8, 0x40000000, 0x0), ++ RTW89_DECL_RFK_WM(0x0304, 0x0000ff00, 0x1d), ++}; ++ ++RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_sys_b_defs_5g); ++ ++static const struct rtw89_reg5_def rtw8852b_tssi_init_txpwr_defs_a[] = { ++ RTW89_DECL_RFK_WM(0x566c, 0x00001000, 0x0), ++ RTW89_DECL_RFK_WM(0x5800, 0xffffffff, 0x003f807f), ++ RTW89_DECL_RFK_WM(0x580c, 0x0000007f, 0x40), ++ RTW89_DECL_RFK_WM(0x580c, 0x0fffff00, 0x00040), ++ RTW89_DECL_RFK_WM(0x5810, 0xffffffff, 0x59010000), ++ RTW89_DECL_RFK_WM(0x5814, 0x01ffffff, 0x002d000), ++ RTW89_DECL_RFK_WM(0x5814, 0xf8000000, 0x00), ++ RTW89_DECL_RFK_WM(0x5818, 0xffffffff, 0x002c1800), ++ RTW89_DECL_RFK_WM(0x581c, 0x3fffffff, 0x1dc80280), ++ RTW89_DECL_RFK_WM(0x5820, 0xffffffff, 0x00002080), ++ RTW89_DECL_RFK_WM(0x580c, 0x10000000, 0x1), ++ RTW89_DECL_RFK_WM(0x580c, 0x40000000, 0x1), ++ RTW89_DECL_RFK_WM(0x5834, 0x3fffffff, 0x000115f2), ++ RTW89_DECL_RFK_WM(0x5838, 0x7fffffff, 0x0000121), ++ RTW89_DECL_RFK_WM(0x5854, 0x3fffffff, 0x000115f2), ++ RTW89_DECL_RFK_WM(0x5858, 0x7fffffff, 0x0000121), ++ RTW89_DECL_RFK_WM(0x5860, 0x80000000, 0x0), ++ RTW89_DECL_RFK_WM(0x5864, 0x07ffffff, 0x00801ff), ++ RTW89_DECL_RFK_WM(0x5898, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x589c, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x58a4, 0x000000ff, 0x16), ++ RTW89_DECL_RFK_WM(0x58b0, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x58b4, 0x7fffffff, 0x0a002000), ++ RTW89_DECL_RFK_WM(0x58b8, 0x7fffffff, 0x00007628), ++ RTW89_DECL_RFK_WM(0x58bc, 0x07ffffff, 0x7a7807f), ++ RTW89_DECL_RFK_WM(0x58c0, 0xfffe0000, 0x003f), ++ RTW89_DECL_RFK_WM(0x58c4, 0xffffffff, 0x0003ffff), ++ RTW89_DECL_RFK_WM(0x58c8, 0x00ffffff, 0x000000), ++ RTW89_DECL_RFK_WM(0x58c8, 0xf0000000, 0x0), ++ RTW89_DECL_RFK_WM(0x58cc, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x58d0, 0x07ffffff, 0x2008101), ++ RTW89_DECL_RFK_WM(0x58d4, 0x000000ff, 0x00), ++ RTW89_DECL_RFK_WM(0x58d4, 0x0003fe00, 0x0ff), ++ RTW89_DECL_RFK_WM(0x58d4, 0x07fc0000, 0x100), ++ RTW89_DECL_RFK_WM(0x58d8, 0xffffffff, 0x8008016c), ++ RTW89_DECL_RFK_WM(0x58dc, 0x0001ffff, 0x0807f), ++ RTW89_DECL_RFK_WM(0x58dc, 0xfff00000, 0x800), ++ RTW89_DECL_RFK_WM(0x58f0, 0x0003ffff, 0x001ff), ++ RTW89_DECL_RFK_WM(0x58f4, 0x000fffff, 0x000), ++}; ++ ++RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_init_txpwr_defs_a); ++ ++static const struct rtw89_reg5_def rtw8852b_tssi_init_txpwr_defs_b[] = { ++ RTW89_DECL_RFK_WM(0x566c, 0x00001000, 0x0), ++ RTW89_DECL_RFK_WM(0x7800, 0xffffffff, 0x003f807f), ++ RTW89_DECL_RFK_WM(0x780c, 0x0000007f, 0x40), ++ RTW89_DECL_RFK_WM(0x780c, 0x0fffff00, 0x00040), ++ RTW89_DECL_RFK_WM(0x7810, 0xffffffff, 0x59010000), ++ RTW89_DECL_RFK_WM(0x7814, 0x01ffffff, 0x002d000), ++ RTW89_DECL_RFK_WM(0x7814, 0xf8000000, 0x00), ++ RTW89_DECL_RFK_WM(0x7818, 0xffffffff, 0x002c1800), ++ RTW89_DECL_RFK_WM(0x781c, 0x3fffffff, 0x1dc80280), ++ RTW89_DECL_RFK_WM(0x7820, 0xffffffff, 0x00002080), ++ RTW89_DECL_RFK_WM(0x780c, 0x10000000, 0x1), ++ RTW89_DECL_RFK_WM(0x780c, 0x40000000, 0x1), ++ RTW89_DECL_RFK_WM(0x7834, 0x3fffffff, 0x000115f2), ++ RTW89_DECL_RFK_WM(0x7838, 0x7fffffff, 0x0000121), ++ RTW89_DECL_RFK_WM(0x7854, 0x3fffffff, 0x000115f2), ++ RTW89_DECL_RFK_WM(0x7858, 0x7fffffff, 0x0000121), ++ RTW89_DECL_RFK_WM(0x7860, 0x80000000, 0x0), ++ RTW89_DECL_RFK_WM(0x7864, 0x07ffffff, 0x00801ff), ++ RTW89_DECL_RFK_WM(0x7898, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x789c, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x78a4, 0x000000ff, 0x16), ++ RTW89_DECL_RFK_WM(0x78b0, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x78b4, 0x7fffffff, 0x0a002000), ++ RTW89_DECL_RFK_WM(0x78b8, 0x7fffffff, 0x00007628), ++ RTW89_DECL_RFK_WM(0x78bc, 0x07ffffff, 0x7a7807f), ++ RTW89_DECL_RFK_WM(0x78c0, 0xfffe0000, 0x003f), ++ RTW89_DECL_RFK_WM(0x78c4, 0xffffffff, 0x0003ffff), ++ RTW89_DECL_RFK_WM(0x78c8, 0x00ffffff, 0x000000), ++ RTW89_DECL_RFK_WM(0x78c8, 0xf0000000, 0x0), ++ RTW89_DECL_RFK_WM(0x78cc, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x78d0, 0x07ffffff, 0x2008101), ++ RTW89_DECL_RFK_WM(0x78d4, 0x000000ff, 0x00), ++ RTW89_DECL_RFK_WM(0x78d4, 0x0003fe00, 0x0ff), ++ RTW89_DECL_RFK_WM(0x78d4, 0x07fc0000, 0x100), ++ RTW89_DECL_RFK_WM(0x78d8, 0xffffffff, 0x8008016c), ++ RTW89_DECL_RFK_WM(0x78dc, 0x0001ffff, 0x0807f), ++ RTW89_DECL_RFK_WM(0x78dc, 0xfff00000, 0x800), ++ RTW89_DECL_RFK_WM(0x78f0, 0x0003ffff, 0x001ff), ++ RTW89_DECL_RFK_WM(0x78f4, 0x000fffff, 0x000), ++}; ++ ++RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_init_txpwr_defs_b); ++ ++static const struct rtw89_reg5_def rtw8852b_tssi_init_txpwr_he_tb_defs_a[] = { ++ RTW89_DECL_RFK_WM(0x58a0, 0xffffffff, 0x000000fe), ++ RTW89_DECL_RFK_WM(0x58e4, 0x0000007f, 0x1f), ++}; ++ ++RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_init_txpwr_he_tb_defs_a); ++ ++static const struct rtw89_reg5_def rtw8852b_tssi_init_txpwr_he_tb_defs_b[] = { ++ RTW89_DECL_RFK_WM(0x78a0, 0xffffffff, 0x000000fe), ++ RTW89_DECL_RFK_WM(0x78e4, 0x0000007f, 0x1f), ++}; ++ ++RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_init_txpwr_he_tb_defs_b); ++ ++static const struct rtw89_reg5_def rtw8852b_tssi_dck_defs_a[] = { ++ RTW89_DECL_RFK_WM(0x580c, 0x0fff0000, 0x000), ++ RTW89_DECL_RFK_WM(0x5814, 0x003ff000, 0x0ef), ++ RTW89_DECL_RFK_WM(0x5814, 0x18000000, 0x0), ++}; ++ ++RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_dck_defs_a); ++ ++static const struct rtw89_reg5_def rtw8852b_tssi_dck_defs_b[] = { ++ RTW89_DECL_RFK_WM(0x780c, 0x0fff0000, 0x000), ++ RTW89_DECL_RFK_WM(0x7814, 0x003ff000, 0x0ef), ++ RTW89_DECL_RFK_WM(0x7814, 0x18000000, 0x0), ++}; ++ ++RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_dck_defs_b); ++ ++static const struct rtw89_reg5_def rtw8852b_tssi_dac_gain_defs_a[] = { ++ RTW89_DECL_RFK_WM(0x58b0, 0x00000400, 0x1), ++ RTW89_DECL_RFK_WM(0x58b0, 0x00000fff, 0x000), ++ RTW89_DECL_RFK_WM(0x58b0, 0x00000800, 0x1), ++ RTW89_DECL_RFK_WM(0x5a00, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5a04, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5a08, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5a0c, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5a10, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5a14, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5a18, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5a1c, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5a20, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5a24, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5a28, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5a2c, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5a30, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5a34, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5a38, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5a3c, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5a40, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5a44, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5a48, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5a4c, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5a50, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5a54, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5a58, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5a5c, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5a60, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5a64, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5a68, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5a6c, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5a70, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5a74, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5a78, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5a7c, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5a80, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5a84, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5a88, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5a8c, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5a90, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5a94, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5a98, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5a9c, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5aa0, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5aa4, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5aa8, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5aac, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5ab0, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5ab4, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5ab8, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5abc, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5ac0, 0xffffffff, 0x00000000), ++}; ++ ++RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_dac_gain_defs_a); ++ ++static const struct rtw89_reg5_def rtw8852b_tssi_dac_gain_defs_b[] = { ++ RTW89_DECL_RFK_WM(0x78b0, 0x00000fff, 0x000), ++ RTW89_DECL_RFK_WM(0x78b0, 0x00000800, 0x1), ++ RTW89_DECL_RFK_WM(0x7a00, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7a04, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7a08, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7a0c, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7a10, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7a14, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7a18, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7a1c, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7a20, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7a24, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7a28, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7a2c, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7a30, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7a34, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7a38, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7a3c, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7a40, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7a44, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7a48, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7a4c, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7a50, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7a54, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7a58, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7a5c, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7a60, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7a64, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7a68, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7a6c, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7a70, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7a74, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7a78, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7a7c, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7a80, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7a84, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7a88, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7a8c, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7a90, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7a94, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7a98, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7a9c, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7aa0, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7aa4, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7aa8, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7aac, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7ab0, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7ab4, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7ab8, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7abc, 0xffffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7ac0, 0xffffffff, 0x00000000), ++}; ++ ++RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_dac_gain_defs_b); ++ ++static const struct rtw89_reg5_def rtw8852b_tssi_slope_a_defs_2g[] = { ++ RTW89_DECL_RFK_WM(0x5608, 0x07ffffff, 0x0801008), ++ RTW89_DECL_RFK_WM(0x560c, 0x07ffffff, 0x0201020), ++ RTW89_DECL_RFK_WM(0x5610, 0x07ffffff, 0x0201008), ++ RTW89_DECL_RFK_WM(0x5614, 0x07ffffff, 0x0804008), ++ RTW89_DECL_RFK_WM(0x5618, 0x07ffffff, 0x0201008), ++ RTW89_DECL_RFK_WM(0x561c, 0x000001ff, 0x008), ++ RTW89_DECL_RFK_WM(0x561c, 0xffff0000, 0x0808), ++ RTW89_DECL_RFK_WM(0x5620, 0xffffffff, 0x08081e28), ++ RTW89_DECL_RFK_WM(0x5624, 0xffffffff, 0x08080808), ++ RTW89_DECL_RFK_WM(0x5628, 0xffffffff, 0x08081e28), ++ RTW89_DECL_RFK_WM(0x562c, 0x0000ffff, 0x0808), ++ RTW89_DECL_RFK_WM(0x581c, 0x00100000, 0x1), ++}; ++ ++RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_slope_a_defs_2g); ++ ++static const struct rtw89_reg5_def rtw8852b_tssi_slope_a_defs_5g[] = { ++ RTW89_DECL_RFK_WM(0x5608, 0x07ffffff, 0x0201008), ++ RTW89_DECL_RFK_WM(0x560c, 0x07ffffff, 0x0201020), ++ RTW89_DECL_RFK_WM(0x5610, 0x07ffffff, 0x0201008), ++ RTW89_DECL_RFK_WM(0x5614, 0x07ffffff, 0x0201008), ++ RTW89_DECL_RFK_WM(0x5618, 0x07ffffff, 0x0201008), ++ RTW89_DECL_RFK_WM(0x561c, 0x000001ff, 0x008), ++ RTW89_DECL_RFK_WM(0x561c, 0xffff0000, 0x0808), ++ RTW89_DECL_RFK_WM(0x5620, 0xffffffff, 0x08081e08), ++ RTW89_DECL_RFK_WM(0x5624, 0xffffffff, 0x08080808), ++ RTW89_DECL_RFK_WM(0x5628, 0xffffffff, 0x08080808), ++ RTW89_DECL_RFK_WM(0x562c, 0x0000ffff, 0x0808), ++ RTW89_DECL_RFK_WM(0x581c, 0x00100000, 0x1), ++}; ++ ++RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_slope_a_defs_5g); ++ ++static const struct rtw89_reg5_def rtw8852b_tssi_slope_b_defs_2g[] = { ++ RTW89_DECL_RFK_WM(0x7608, 0x07ffffff, 0x0801008), ++ RTW89_DECL_RFK_WM(0x760c, 0x07ffffff, 0x0201020), ++ RTW89_DECL_RFK_WM(0x7610, 0x07ffffff, 0x0201008), ++ RTW89_DECL_RFK_WM(0x7614, 0x07ffffff, 0x0804008), ++ RTW89_DECL_RFK_WM(0x7618, 0x07ffffff, 0x0201008), ++ RTW89_DECL_RFK_WM(0x761c, 0x000001ff, 0x008), ++ RTW89_DECL_RFK_WM(0x761c, 0xffff0000, 0x0808), ++ RTW89_DECL_RFK_WM(0x7620, 0xffffffff, 0x08081e28), ++ RTW89_DECL_RFK_WM(0x7624, 0xffffffff, 0x08080808), ++ RTW89_DECL_RFK_WM(0x7628, 0xffffffff, 0x08081e28), ++ RTW89_DECL_RFK_WM(0x762c, 0x0000ffff, 0x0808), ++ RTW89_DECL_RFK_WM(0x781c, 0x00100000, 0x1), ++}; ++ ++RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_slope_b_defs_2g); ++ ++static const struct rtw89_reg5_def rtw8852b_tssi_slope_b_defs_5g[] = { ++ RTW89_DECL_RFK_WM(0x7608, 0x07ffffff, 0x0201008), ++ RTW89_DECL_RFK_WM(0x760c, 0x07ffffff, 0x0201020), ++ RTW89_DECL_RFK_WM(0x7610, 0x07ffffff, 0x0201008), ++ RTW89_DECL_RFK_WM(0x7614, 0x07ffffff, 0x0201008), ++ RTW89_DECL_RFK_WM(0x7618, 0x07ffffff, 0x0201008), ++ RTW89_DECL_RFK_WM(0x761c, 0x000001ff, 0x008), ++ RTW89_DECL_RFK_WM(0x761c, 0xffff0000, 0x0808), ++ RTW89_DECL_RFK_WM(0x7620, 0xffffffff, 0x08081e08), ++ RTW89_DECL_RFK_WM(0x7624, 0xffffffff, 0x08080808), ++ RTW89_DECL_RFK_WM(0x7628, 0xffffffff, 0x08080808), ++ RTW89_DECL_RFK_WM(0x762c, 0x0000ffff, 0x0808), ++ RTW89_DECL_RFK_WM(0x781c, 0x00100000, 0x1), ++}; ++ ++RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_slope_b_defs_5g); ++ ++static const struct rtw89_reg5_def rtw8852b_tssi_align_a_2g_all_defs[] = { ++ RTW89_DECL_RFK_WM(0x5604, 0x80000000, 0x1), ++ RTW89_DECL_RFK_WM(0x5600, 0x3fffffff, 0x3f2d2721), ++ RTW89_DECL_RFK_WM(0x5604, 0x003fffff, 0x010101), ++ RTW89_DECL_RFK_WM(0x5630, 0x3fffffff, 0x01ef27af), ++ RTW89_DECL_RFK_WM(0x5634, 0x3fffffff, 0x00000075), ++ RTW89_DECL_RFK_WM(0x5638, 0x000fffff, 0x00000), ++ RTW89_DECL_RFK_WM(0x563c, 0x3fffffff, 0x017f13ae), ++ RTW89_DECL_RFK_WM(0x5640, 0x3fffffff, 0x0000006e), ++ RTW89_DECL_RFK_WM(0x5644, 0x000fffff, 0x00000), ++}; ++ ++RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_a_2g_all_defs); ++ ++static const struct rtw89_reg5_def rtw8852b_tssi_align_a_2g_part_defs[] = { ++ RTW89_DECL_RFK_WM(0x5630, 0x3fffffff, 0x01ef27af), ++ RTW89_DECL_RFK_WM(0x5634, 0x3fffffff, 0x00000075), ++ RTW89_DECL_RFK_WM(0x563c, 0x3fffffff, 0x017f13ae), ++ RTW89_DECL_RFK_WM(0x5640, 0x3fffffff, 0x0000006e), ++}; ++ ++RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_a_2g_part_defs); ++ ++static const struct rtw89_reg5_def rtw8852b_tssi_align_a_5g1_all_defs[] = { ++ RTW89_DECL_RFK_WM(0x5604, 0x80000000, 0x1), ++ RTW89_DECL_RFK_WM(0x5600, 0x3fffffff, 0x3f2d2721), ++ RTW89_DECL_RFK_WM(0x5604, 0x003fffff, 0x010101), ++ RTW89_DECL_RFK_WM(0x5630, 0x3fffffff, 0x016037e7), ++ RTW89_DECL_RFK_WM(0x5634, 0x3fffffff, 0x0000006f), ++ RTW89_DECL_RFK_WM(0x5638, 0x000fffff, 0x00000), ++ RTW89_DECL_RFK_WM(0x563c, 0x3fffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5640, 0x3fffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5644, 0x000fffff, 0x00000), ++}; ++ ++RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_a_5g1_all_defs); ++ ++static const struct rtw89_reg5_def rtw8852b_tssi_align_a_5g1_part_defs[] = { ++ RTW89_DECL_RFK_WM(0x5630, 0x3fffffff, 0x016037e7), ++ RTW89_DECL_RFK_WM(0x5634, 0x3fffffff, 0x0000006f), ++ RTW89_DECL_RFK_WM(0x563c, 0x3fffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5640, 0x3fffffff, 0x00000000), ++}; ++ ++RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_a_5g1_part_defs); ++ ++static const struct rtw89_reg5_def rtw8852b_tssi_align_a_5g2_all_defs[] = { ++ RTW89_DECL_RFK_WM(0x5604, 0x80000000, 0x1), ++ RTW89_DECL_RFK_WM(0x5600, 0x3fffffff, 0x3f2d2721), ++ RTW89_DECL_RFK_WM(0x5604, 0x003fffff, 0x010101), ++ RTW89_DECL_RFK_WM(0x5630, 0x3fffffff, 0x01f053f1), ++ RTW89_DECL_RFK_WM(0x5634, 0x3fffffff, 0x00000070), ++ RTW89_DECL_RFK_WM(0x5638, 0x000fffff, 0x00000), ++ RTW89_DECL_RFK_WM(0x563c, 0x3fffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5640, 0x3fffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5644, 0x000fffff, 0x00000), ++}; ++ ++RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_a_5g2_all_defs); ++ ++static const struct rtw89_reg5_def rtw8852b_tssi_align_a_5g2_part_defs[] = { ++ RTW89_DECL_RFK_WM(0x5630, 0x3fffffff, 0x01f053f1), ++ RTW89_DECL_RFK_WM(0x5634, 0x3fffffff, 0x00000070), ++ RTW89_DECL_RFK_WM(0x563c, 0x3fffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5640, 0x3fffffff, 0x00000000), ++}; ++ ++RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_a_5g2_part_defs); ++ ++static const struct rtw89_reg5_def rtw8852b_tssi_align_a_5g3_all_defs[] = { ++ RTW89_DECL_RFK_WM(0x5604, 0x80000000, 0x1), ++ RTW89_DECL_RFK_WM(0x5600, 0x3fffffff, 0x3f2d2721), ++ RTW89_DECL_RFK_WM(0x5604, 0x003fffff, 0x010101), ++ RTW89_DECL_RFK_WM(0x5630, 0x3fffffff, 0x01c047ee), ++ RTW89_DECL_RFK_WM(0x5634, 0x3fffffff, 0x00000070), ++ RTW89_DECL_RFK_WM(0x5638, 0x000fffff, 0x00000), ++ RTW89_DECL_RFK_WM(0x563c, 0x3fffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5640, 0x3fffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5644, 0x000fffff, 0x00000), ++}; ++ ++RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_a_5g3_all_defs); ++ ++static const struct rtw89_reg5_def rtw8852b_tssi_align_a_5g3_part_defs[] = { ++ RTW89_DECL_RFK_WM(0x5630, 0x3fffffff, 0x01c047ee), ++ RTW89_DECL_RFK_WM(0x5634, 0x3fffffff, 0x00000070), ++ RTW89_DECL_RFK_WM(0x563c, 0x3fffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x5640, 0x3fffffff, 0x00000000), ++}; ++ ++RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_a_5g3_part_defs); ++ ++static const struct rtw89_reg5_def rtw8852b_tssi_align_b_2g_all_defs[] = { ++ RTW89_DECL_RFK_WM(0x7604, 0x80000000, 0x1), ++ RTW89_DECL_RFK_WM(0x7600, 0x3fffffff, 0x3f2d2721), ++ RTW89_DECL_RFK_WM(0x7604, 0x003fffff, 0x010101), ++ RTW89_DECL_RFK_WM(0x7630, 0x3fffffff, 0x01ff2bb5), ++ RTW89_DECL_RFK_WM(0x7634, 0x3fffffff, 0x00000078), ++ RTW89_DECL_RFK_WM(0x7638, 0x000fffff, 0x00000), ++ RTW89_DECL_RFK_WM(0x763c, 0x3fffffff, 0x018f2bb0), ++ RTW89_DECL_RFK_WM(0x7640, 0x3fffffff, 0x00000072), ++ RTW89_DECL_RFK_WM(0x7644, 0x000fffff, 0x00000), ++}; ++ ++RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_b_2g_all_defs); ++ ++static const struct rtw89_reg5_def rtw8852b_tssi_align_b_2g_part_defs[] = { ++ RTW89_DECL_RFK_WM(0x7630, 0x3fffffff, 0x01ff2bb5), ++ RTW89_DECL_RFK_WM(0x7634, 0x3fffffff, 0x00000078), ++ RTW89_DECL_RFK_WM(0x763c, 0x3fffffff, 0x018f2bb0), ++ RTW89_DECL_RFK_WM(0x7640, 0x3fffffff, 0x00000072), ++}; ++ ++RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_b_2g_part_defs); ++ ++static const struct rtw89_reg5_def rtw8852b_tssi_align_b_5g1_all_defs[] = { ++ RTW89_DECL_RFK_WM(0x7604, 0x80000000, 0x1), ++ RTW89_DECL_RFK_WM(0x7600, 0x3fffffff, 0x3f2d2721), ++ RTW89_DECL_RFK_WM(0x7604, 0x003fffff, 0x010101), ++ RTW89_DECL_RFK_WM(0x7630, 0x3fffffff, 0x009003da), ++ RTW89_DECL_RFK_WM(0x7634, 0x3fffffff, 0x00000069), ++ RTW89_DECL_RFK_WM(0x7638, 0x000fffff, 0x00000), ++ RTW89_DECL_RFK_WM(0x763c, 0x3fffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7640, 0x3fffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7644, 0x000fffff, 0x00000), ++}; ++ ++RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_b_5g1_all_defs); ++ ++static const struct rtw89_reg5_def rtw8852b_tssi_align_b_5g1_part_defs[] = { ++ RTW89_DECL_RFK_WM(0x7630, 0x3fffffff, 0x009003da), ++ RTW89_DECL_RFK_WM(0x7634, 0x3fffffff, 0x00000069), ++ RTW89_DECL_RFK_WM(0x763c, 0x3fffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7640, 0x3fffffff, 0x00000000), ++}; ++ ++RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_b_5g1_part_defs); ++ ++static const struct rtw89_reg5_def rtw8852b_tssi_align_b_5g2_all_defs[] = { ++ RTW89_DECL_RFK_WM(0x7604, 0x80000000, 0x1), ++ RTW89_DECL_RFK_WM(0x7600, 0x3fffffff, 0x3f2d2721), ++ RTW89_DECL_RFK_WM(0x7604, 0x003fffff, 0x010101), ++ RTW89_DECL_RFK_WM(0x7630, 0x3fffffff, 0x013027e6), ++ RTW89_DECL_RFK_WM(0x7634, 0x3fffffff, 0x00000069), ++ RTW89_DECL_RFK_WM(0x7638, 0x000fffff, 0x00000), ++ RTW89_DECL_RFK_WM(0x763c, 0x3fffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7640, 0x3fffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7644, 0x000fffff, 0x00000), ++}; ++ ++RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_b_5g2_all_defs); ++ ++static const struct rtw89_reg5_def rtw8852b_tssi_align_b_5g2_part_defs[] = { ++ RTW89_DECL_RFK_WM(0x7630, 0x3fffffff, 0x013027e6), ++ RTW89_DECL_RFK_WM(0x7634, 0x3fffffff, 0x00000069), ++ RTW89_DECL_RFK_WM(0x763c, 0x3fffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7640, 0x3fffffff, 0x00000000), ++}; ++ ++RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_b_5g2_part_defs); ++ ++static const struct rtw89_reg5_def rtw8852b_tssi_align_b_5g3_all_defs[] = { ++ RTW89_DECL_RFK_WM(0x7604, 0x80000000, 0x1), ++ RTW89_DECL_RFK_WM(0x7600, 0x3fffffff, 0x3f2d2721), ++ RTW89_DECL_RFK_WM(0x7604, 0x003fffff, 0x010101), ++ RTW89_DECL_RFK_WM(0x7630, 0x3fffffff, 0x009003da), ++ RTW89_DECL_RFK_WM(0x7634, 0x3fffffff, 0x00000069), ++ RTW89_DECL_RFK_WM(0x7638, 0x000fffff, 0x00000), ++ RTW89_DECL_RFK_WM(0x763c, 0x3fffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7640, 0x3fffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7644, 0x000fffff, 0x00000), ++}; ++ ++RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_b_5g3_all_defs); ++ ++static const struct rtw89_reg5_def rtw8852b_tssi_align_b_5g3_part_defs[] = { ++ RTW89_DECL_RFK_WM(0x7630, 0x3fffffff, 0x009003da), ++ RTW89_DECL_RFK_WM(0x7634, 0x3fffffff, 0x00000069), ++ RTW89_DECL_RFK_WM(0x763c, 0x3fffffff, 0x00000000), ++ RTW89_DECL_RFK_WM(0x7640, 0x3fffffff, 0x00000000), ++}; ++ ++RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_b_5g3_part_defs); ++ ++static const struct rtw89_reg5_def rtw8852b_tssi_slope_defs_a[] = { ++ RTW89_DECL_RFK_WM(0x5814, 0x00000800, 0x1), ++ RTW89_DECL_RFK_WM(0x581c, 0x20000000, 0x1), ++ RTW89_DECL_RFK_WM(0x5814, 0x20000000, 0x1), ++}; ++ ++RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_slope_defs_a); ++ ++static const struct rtw89_reg5_def rtw8852b_tssi_slope_defs_b[] = { ++ RTW89_DECL_RFK_WM(0x7814, 0x00000800, 0x1), ++ RTW89_DECL_RFK_WM(0x781c, 0x20000000, 0x1), ++ RTW89_DECL_RFK_WM(0x7814, 0x20000000, 0x1), ++}; ++ ++RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_slope_defs_b); +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk_table.h linux-6.2/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk_table.h +--- linux-6.1/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk_table.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk_table.h 2022-12-24 00:49:25.783376835 +0200 +@@ -0,0 +1,62 @@ ++/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ ++/* Copyright(c) 2019-2020 Realtek Corporation ++ */ ++ ++#ifndef __RTW89_8852B_RFK_TABLE_H__ ++#define __RTW89_8852B_RFK_TABLE_H__ ++ ++#include "phy.h" ++ ++extern const struct rtw89_rfk_tbl rtw8852b_afe_init_defs_tbl; ++extern const struct rtw89_rfk_tbl rtw8852b_check_addc_defs_a_tbl; ++extern const struct rtw89_rfk_tbl rtw8852b_check_addc_defs_b_tbl; ++extern const struct rtw89_rfk_tbl rtw8852b_check_dadc_en_defs_a_tbl; ++extern const struct rtw89_rfk_tbl rtw8852b_check_dadc_en_defs_b_tbl; ++extern const struct rtw89_rfk_tbl rtw8852b_check_dadc_dis_defs_a_tbl; ++extern const struct rtw89_rfk_tbl rtw8852b_check_dadc_dis_defs_b_tbl; ++extern const struct rtw89_rfk_tbl rtw8852b_dack_s0_1_defs_tbl; ++extern const struct rtw89_rfk_tbl rtw8852b_dack_s0_2_defs_tbl; ++extern const struct rtw89_rfk_tbl rtw8852b_dack_s0_3_defs_tbl; ++extern const struct rtw89_rfk_tbl rtw8852b_dack_s1_1_defs_tbl; ++extern const struct rtw89_rfk_tbl rtw8852b_dack_s1_2_defs_tbl; ++extern const struct rtw89_rfk_tbl rtw8852b_dack_s1_3_defs_tbl; ++extern const struct rtw89_rfk_tbl rtw8852b_dpk_afe_defs_tbl; ++extern const struct rtw89_rfk_tbl rtw8852b_dpk_afe_restore_defs_tbl; ++extern const struct rtw89_rfk_tbl rtw8852b_dpk_kip_defs_tbl; ++extern const struct rtw89_rfk_tbl rtw8852b_tssi_sys_defs_tbl; ++extern const struct rtw89_rfk_tbl rtw8852b_tssi_sys_a_defs_2g_tbl; ++extern const struct rtw89_rfk_tbl rtw8852b_tssi_sys_a_defs_5g_tbl; ++extern const struct rtw89_rfk_tbl rtw8852b_tssi_sys_b_defs_2g_tbl; ++extern const struct rtw89_rfk_tbl rtw8852b_tssi_sys_b_defs_5g_tbl; ++extern const struct rtw89_rfk_tbl rtw8852b_tssi_init_txpwr_defs_a_tbl; ++extern const struct rtw89_rfk_tbl rtw8852b_tssi_init_txpwr_defs_b_tbl; ++extern const struct rtw89_rfk_tbl rtw8852b_tssi_init_txpwr_he_tb_defs_a_tbl; ++extern const struct rtw89_rfk_tbl rtw8852b_tssi_init_txpwr_he_tb_defs_b_tbl; ++extern const struct rtw89_rfk_tbl rtw8852b_tssi_dck_defs_a_tbl; ++extern const struct rtw89_rfk_tbl rtw8852b_tssi_dck_defs_b_tbl; ++extern const struct rtw89_rfk_tbl rtw8852b_tssi_dac_gain_defs_a_tbl; ++extern const struct rtw89_rfk_tbl rtw8852b_tssi_dac_gain_defs_b_tbl; ++extern const struct rtw89_rfk_tbl rtw8852b_tssi_slope_a_defs_2g_tbl; ++extern const struct rtw89_rfk_tbl rtw8852b_tssi_slope_a_defs_5g_tbl; ++extern const struct rtw89_rfk_tbl rtw8852b_tssi_slope_b_defs_2g_tbl; ++extern const struct rtw89_rfk_tbl rtw8852b_tssi_slope_b_defs_5g_tbl; ++extern const struct rtw89_rfk_tbl rtw8852b_tssi_align_a_2g_all_defs_tbl; ++extern const struct rtw89_rfk_tbl rtw8852b_tssi_align_a_2g_part_defs_tbl; ++extern const struct rtw89_rfk_tbl rtw8852b_tssi_align_a_5g1_all_defs_tbl; ++extern const struct rtw89_rfk_tbl rtw8852b_tssi_align_a_5g1_part_defs_tbl; ++extern const struct rtw89_rfk_tbl rtw8852b_tssi_align_a_5g2_all_defs_tbl; ++extern const struct rtw89_rfk_tbl rtw8852b_tssi_align_a_5g2_part_defs_tbl; ++extern const struct rtw89_rfk_tbl rtw8852b_tssi_align_a_5g3_all_defs_tbl; ++extern const struct rtw89_rfk_tbl rtw8852b_tssi_align_a_5g3_part_defs_tbl; ++extern const struct rtw89_rfk_tbl rtw8852b_tssi_align_b_2g_all_defs_tbl; ++extern const struct rtw89_rfk_tbl rtw8852b_tssi_align_b_2g_part_defs_tbl; ++extern const struct rtw89_rfk_tbl rtw8852b_tssi_align_b_5g1_all_defs_tbl; ++extern const struct rtw89_rfk_tbl rtw8852b_tssi_align_b_5g1_part_defs_tbl; ++extern const struct rtw89_rfk_tbl rtw8852b_tssi_align_b_5g2_all_defs_tbl; ++extern const struct rtw89_rfk_tbl rtw8852b_tssi_align_b_5g2_part_defs_tbl; ++extern const struct rtw89_rfk_tbl rtw8852b_tssi_align_b_5g3_all_defs_tbl; ++extern const struct rtw89_rfk_tbl rtw8852b_tssi_align_b_5g3_part_defs_tbl; ++extern const struct rtw89_rfk_tbl rtw8852b_tssi_slope_defs_a_tbl; ++extern const struct rtw89_rfk_tbl rtw8852b_tssi_slope_defs_b_tbl; ++ ++#endif +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw89/rtw8852b_table.c linux-6.2/drivers/net/wireless/realtek/rtw89/rtw8852b_table.c +--- linux-6.1/drivers/net/wireless/realtek/rtw89/rtw8852b_table.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw89/rtw8852b_table.c 2022-12-24 00:49:25.785376835 +0200 +@@ -0,0 +1,22877 @@ ++// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause ++/* Copyright(c) 2019-2020 Realtek Corporation ++ */ ++ ++#include "phy.h" ++#include "reg.h" ++#include "rtw8852b_table.h" ++ ++static const struct rtw89_reg2_def rtw89_8852b_phy_bb_regs[] = { ++ {0x704, 0x601E0100}, ++ {0x4000, 0x00000000}, ++ {0x4004, 0xCA014000}, ++ {0x4008, 0xC751D4F0}, ++ {0x400C, 0x44511475}, ++ {0x4010, 0x00000000}, ++ {0x4014, 0x00000000}, ++ {0x4018, 0x4F4C084B}, ++ {0x401C, 0x084A4E52}, ++ {0x4020, 0x4D504E4B}, ++ {0x4024, 0x4F4C0849}, ++ {0x4028, 0x08484C50}, ++ {0x402C, 0x4C50504C}, ++ {0x4030, 0x5454084A}, ++ {0x4034, 0x084B5654}, ++ {0x4038, 0x6A6C605A}, ++ {0x403C, 0x4C4C084C}, ++ {0x4040, 0x084B4E4D}, ++ {0x4044, 0x4E4C4B4B}, ++ {0x4048, 0x4B4B084A}, ++ {0x404C, 0x084A4E4C}, ++ {0x4050, 0x514F4C4A}, ++ {0x4054, 0x524E084A}, ++ {0x4058, 0x084A5154}, ++ {0x405C, 0x53555554}, ++ {0x4060, 0x45450845}, ++ {0x4064, 0x08454144}, ++ {0x4068, 0x40434445}, ++ {0x406C, 0x44450845}, ++ {0x4070, 0x08444043}, ++ {0x4074, 0x42434444}, ++ {0x4078, 0x46450844}, ++ {0x407C, 0x08444843}, ++ {0x4080, 0x4B4E4A47}, ++ {0x4084, 0x4F4C084B}, ++ {0x4088, 0x084A4E52}, ++ {0x408C, 0x4D504E4B}, ++ {0x4090, 0x4F4C0849}, ++ {0x4094, 0x08484C50}, ++ {0x4098, 0x4C50504C}, ++ {0x409C, 0x5454084A}, ++ {0x40A0, 0x084B5654}, ++ {0x40A4, 0x6A6C605A}, ++ {0x40A8, 0x4C4C084C}, ++ {0x40AC, 0x084B4E4D}, ++ {0x40B0, 0x4E4C4B4B}, ++ {0x40B4, 0x4B4B084A}, ++ {0x40B8, 0x084A4E4C}, ++ {0x40BC, 0x514F4C4A}, ++ {0x40C0, 0x524E084A}, ++ {0x40C4, 0x084A5154}, ++ {0x40C8, 0x53555554}, ++ {0x40CC, 0x45450845}, ++ {0x40D0, 0x08454144}, ++ {0x40D4, 0x40434445}, ++ {0x40D8, 0x44450845}, ++ {0x40DC, 0x08444043}, ++ {0x40E0, 0x42434444}, ++ {0x40E4, 0x46450844}, ++ {0x40E8, 0x08444843}, ++ {0x40EC, 0x4B4E4A47}, ++ {0x40F0, 0x00000000}, ++ {0x40F4, 0x00000006}, ++ {0x40F8, 0x00000000}, ++ {0x40FC, 0x8C30C30C}, ++ {0x4100, 0x4C30C30C}, ++ {0x4104, 0x0C30C30C}, ++ {0x4108, 0x0C30C30C}, ++ {0x410C, 0x0C30C30C}, ++ {0x4110, 0x0C30C30C}, ++ {0x4114, 0x28A28A28}, ++ {0x4118, 0x28A28A28}, ++ {0x411C, 0x28A28A28}, ++ {0x4120, 0x28A28A28}, ++ {0x4124, 0x28A28A28}, ++ {0x4128, 0x28A28A28}, ++ {0x412C, 0x06666666}, ++ {0x4130, 0x33333333}, ++ {0x4134, 0x33333333}, ++ {0x4138, 0x33333333}, ++ {0x413C, 0x00000031}, ++ {0x4140, 0x5100600A}, ++ {0x4144, 0x18363113}, ++ {0x4148, 0x1D976DDC}, ++ {0x414C, 0x1C072DD7}, ++ {0x4150, 0x1127CDF4}, ++ {0x4154, 0x1E37BDF1}, ++ {0x4158, 0x1FB7F1D6}, ++ {0x415C, 0x1EA7DDF9}, ++ {0x4160, 0x1FE445DD}, ++ {0x4164, 0x1F97F1FE}, ++ {0x4168, 0x1FF781ED}, ++ {0x416C, 0x1FA7F5FE}, ++ {0x4170, 0x1E07B913}, ++ {0x4174, 0x1FD7FDFF}, ++ {0x4178, 0x1E17B9FA}, ++ {0x417C, 0x19A66914}, ++ {0x4180, 0x10F65598}, ++ {0x4184, 0x14A5A111}, ++ {0x4188, 0x1D3765DB}, ++ {0x418C, 0x17C685CA}, ++ {0x4190, 0x1107C5F3}, ++ {0x4194, 0x1B5785EB}, ++ {0x4198, 0x1F97ED8F}, ++ {0x419C, 0x1BC7A5F3}, ++ {0x41A0, 0x1FE43595}, ++ {0x41A4, 0x1EB7D9FC}, ++ {0x41A8, 0x1FE65DBE}, ++ {0x41AC, 0x1EC7D9FC}, ++ {0x41B0, 0x1976FCFF}, ++ {0x41B4, 0x1F77F5FF}, ++ {0x41B8, 0x1976FDEC}, ++ {0x41BC, 0x198664EF}, ++ {0x41C0, 0x11062D93}, ++ {0x41C4, 0x10C4E910}, ++ {0x41C8, 0x1CA759DB}, ++ {0x41CC, 0x1335A9B5}, ++ {0x41D0, 0x1097B9F3}, ++ {0x41D4, 0x17B72DE1}, ++ {0x41D8, 0x1F67ED42}, ++ {0x41DC, 0x18074DE9}, ++ {0x41E0, 0x1FD40547}, ++ {0x41E4, 0x1D57ADF9}, ++ {0x41E8, 0x1FE52182}, ++ {0x41EC, 0x1D67B1F9}, ++ {0x41F0, 0x14860CE1}, ++ {0x41F4, 0x1EC7E9FE}, ++ {0x41F8, 0x14860DD6}, ++ {0x41FC, 0x195664C7}, ++ {0x4200, 0x0005E58A}, ++ {0x4204, 0x00000000}, ++ {0x4208, 0x00000000}, ++ {0x420C, 0x7A000000}, ++ {0x4210, 0x0F9F3D7A}, ++ {0x4214, 0x0040817C}, ++ {0x4218, 0x00E10204}, ++ {0x421C, 0x227D94CD}, ++ {0x4220, 0x08028A28}, ++ {0x4224, 0x00000210}, ++ {0x4228, 0x04688000}, ++ {0x4A48, 0x00000002}, ++ {0x422C, 0x0060B002}, ++ {0x4230, 0x9A8249A8}, ++ {0x4234, 0x26A1469E}, ++ {0x4238, 0x2099A824}, ++ {0x423C, 0x2359461C}, ++ {0x4240, 0x1631A675}, ++ {0x4244, 0x2C6B1D63}, ++ {0x4248, 0x0000000E}, ++ {0x424C, 0x00000001}, ++ {0x4250, 0x00000001}, ++ {0x4254, 0x00000000}, ++ {0x4258, 0x00000000}, ++ {0x425C, 0x00000000}, ++ {0x4260, 0x0020000C}, ++ {0x4264, 0x00000000}, ++ {0x4268, 0x00000000}, ++ {0x426C, 0x0418317C}, ++ {0x4270, 0x2B33135C}, ++ {0x4274, 0x00000002}, ++ {0x4278, 0x00000000}, ++ {0x427C, 0x00000000}, ++ {0x4280, 0x00000000}, ++ {0x4284, 0x00000000}, ++ {0x4288, 0x00000000}, ++ {0x428C, 0x00000000}, ++ {0x4290, 0x00000000}, ++ {0x4294, 0x00000000}, ++ {0x4298, 0x00000000}, ++ {0x429C, 0x84026000}, ++ {0x42A0, 0x0051AC20}, ++ {0x4A24, 0x0010C040}, ++ {0x42A4, 0x02024008}, ++ {0x42A8, 0x00000000}, ++ {0x42AC, 0x00000000}, ++ {0x42B0, 0x22CE803C}, ++ {0x42B4, 0x32000000}, ++ {0x42B8, 0x996FD67D}, ++ {0x42BC, 0xBD67D67D}, ++ {0x42C0, 0x7D67D65B}, ++ {0x42C4, 0x28029F59}, ++ {0x42C8, 0x00280280}, ++ {0x42CC, 0x00000000}, ++ {0x42D0, 0x00000000}, ++ {0x42D4, 0x00000003}, ++ {0x42D8, 0x00000001}, ++ {0x42DC, 0x61861800}, ++ {0x42E0, 0x830C30C3}, ++ {0x42E4, 0xC30C30C3}, ++ {0x42E8, 0x830C30C3}, ++ {0x42EC, 0x451450C3}, ++ {0x42F0, 0x05145145}, ++ {0x42F4, 0x05145145}, ++ {0x42F8, 0x05145145}, ++ {0x42FC, 0x0F0C3145}, ++ {0x4300, 0x030C30CF}, ++ {0x4304, 0x030C30C3}, ++ {0x4308, 0x030CF3C3}, ++ {0x430C, 0x030C30C3}, ++ {0x4310, 0x0F3CF3C3}, ++ {0x4314, 0x0F3CF3CF}, ++ {0x4318, 0x0F3CF3CF}, ++ {0x431C, 0x0F3CF3CF}, ++ {0x4320, 0x0F3CF3CF}, ++ {0x4324, 0x030C10C3}, ++ {0x4328, 0x051430C3}, ++ {0x432C, 0x051490CB}, ++ {0x4330, 0x030CD151}, ++ {0x4334, 0x050C50C7}, ++ {0x4338, 0x051492CB}, ++ {0x433C, 0x05145145}, ++ {0x4340, 0x05145145}, ++ {0x4344, 0x05145145}, ++ {0x4348, 0x05145145}, ++ {0x434C, 0x090CD3CF}, ++ {0x4350, 0x071491C5}, ++ {0x4354, 0x073CF143}, ++ {0x4358, 0x071431C3}, ++ {0x435C, 0x0F3CF1C5}, ++ {0x4360, 0x0F3CF3CF}, ++ {0x4364, 0x0F3CF3CF}, ++ {0x4368, 0x0F3CF3CF}, ++ {0x436C, 0x0F3CF3CF}, ++ {0x4370, 0x090C91CF}, ++ {0x4374, 0x11243143}, ++ {0x4378, 0x9777A777}, ++ {0x437C, 0xBB7BAC95}, ++ {0x4380, 0xB667B889}, ++ {0x4384, 0x7B9B8899}, ++ {0x4388, 0x7A5567C8}, ++ {0x438C, 0x2278CCCC}, ++ {0x4390, 0x7C222222}, ++ {0x4394, 0x0000069B}, ++ {0x4398, 0x001CCCCC}, ++ {0x4AAC, 0xCCCCC88C}, ++ {0x4AB0, 0x0000AACC}, ++ {0x439C, 0x00000000}, ++ {0x43A0, 0x00000008}, ++ {0x43A4, 0x00000000}, ++ {0x43A8, 0x00000000}, ++ {0x43AC, 0x00000000}, ++ {0x43B0, 0x10000000}, ++ {0x43B4, 0x00401001}, ++ {0x43B8, 0x00061003}, ++ {0x43BC, 0x000024D8}, ++ {0x43C0, 0x00000000}, ++ {0x43C4, 0x10000020}, ++ {0x43C8, 0x20000200}, ++ {0x43CC, 0x00000000}, ++ {0x43D0, 0x04000000}, ++ {0x43D4, 0x44000100}, ++ {0x43D8, 0x60804060}, ++ {0x43DC, 0x44204210}, ++ {0x43E0, 0x82108082}, ++ {0x43E4, 0x82108402}, ++ {0x43E8, 0xC8082108}, ++ {0x43EC, 0xC8202084}, ++ {0x43F0, 0x44208208}, ++ {0x43F4, 0x84108204}, ++ {0x43F8, 0xD0108104}, ++ {0x43FC, 0xF8210108}, ++ {0x4400, 0x6431E930}, ++ {0x4404, 0x02309468}, ++ {0x4408, 0x10C61C22}, ++ {0x440C, 0x02109469}, ++ {0x4410, 0x10C61C22}, ++ {0x4414, 0x00041049}, ++ {0x4A4C, 0x00060581}, ++ {0x4418, 0x00000000}, ++ {0x441C, 0x00000000}, ++ {0x4420, 0x6C000000}, ++ {0x4424, 0xB0200020}, ++ {0x4428, 0x00001FF0}, ++ {0x442C, 0x00000000}, ++ {0x4430, 0x00000000}, ++ {0x4434, 0x00000000}, ++ {0x4438, 0x00000000}, ++ {0x443C, 0x190642D0}, ++ {0x4440, 0xA80668A0}, ++ {0x4444, 0x60900820}, ++ {0x4448, 0x9F28518C}, ++ {0x444C, 0x32488A62}, ++ {0x4450, 0x9C6E36DC}, ++ {0x4454, 0x0000F52B}, ++ {0x4458, 0x00000000}, ++ {0x445C, 0x4801442E}, ++ {0x4460, 0x0051A0B8}, ++ {0x4464, 0x00000000}, ++ {0x4468, 0x00000000}, ++ {0x446C, 0x00000000}, ++ {0x4470, 0x00000000}, ++ {0x4474, 0x00000000}, ++ {0x4478, 0x00000000}, ++ {0x447C, 0x00000000}, ++ {0x4480, 0x2A0A6040}, ++ {0x4484, 0x0A0A6829}, ++ {0x4488, 0x00000004}, ++ {0x448C, 0x00000000}, ++ {0x4490, 0x80000000}, ++ {0x4494, 0x10000000}, ++ {0x4498, 0xE0000000}, ++ {0x4AB4, 0x00000000}, ++ {0x449C, 0x0000001E}, ++ {0x44A0, 0x02B2C3A6}, ++ {0x44A4, 0x00000400}, ++ {0x44A8, 0x00000001}, ++ {0x44AC, 0x000190C0}, ++ {0x44B0, 0x00000000}, ++ {0x44B4, 0x00000000}, ++ {0x44B8, 0x00000000}, ++ {0x44BC, 0x00000000}, ++ {0x44C0, 0x00000000}, ++ {0x44C4, 0x00000000}, ++ {0x44C8, 0x00000000}, ++ {0x44CC, 0x00000000}, ++ {0x44D0, 0x00000000}, ++ {0x44D4, 0x00000000}, ++ {0x44D8, 0x00000000}, ++ {0x44DC, 0x00000000}, ++ {0x44E0, 0x00000000}, ++ {0x44E4, 0x00000000}, ++ {0x44E8, 0x00000000}, ++ {0x44EC, 0x00000000}, ++ {0x44F0, 0x00000000}, ++ {0x44F4, 0x00000000}, ++ {0x44F8, 0x00000000}, ++ {0x44FC, 0x00000000}, ++ {0x4500, 0x00000000}, ++ {0x4504, 0x00000000}, ++ {0x4508, 0x00000000}, ++ {0x450C, 0x00000000}, ++ {0x4510, 0x00000000}, ++ {0x4514, 0x00000000}, ++ {0x4518, 0x00000000}, ++ {0x451C, 0x00000000}, ++ {0x4520, 0x00000000}, ++ {0x4524, 0x00000000}, ++ {0x4528, 0x00000000}, ++ {0x452C, 0x00000000}, ++ {0x4530, 0x4E830171}, ++ {0x4534, 0x00000870}, ++ {0x4538, 0x000000FF}, ++ {0x453C, 0x00000000}, ++ {0x4540, 0x00000000}, ++ {0x4544, 0x00000000}, ++ {0x4548, 0x00000000}, ++ {0x454C, 0x00000000}, ++ {0x4550, 0x00000000}, ++ {0x4554, 0x00000000}, ++ {0x4558, 0x00000000}, ++ {0x455C, 0x00000000}, ++ {0x4560, 0x40000000}, ++ {0x4564, 0x40000000}, ++ {0x4568, 0x00000000}, ++ {0x456C, 0x20000000}, ++ {0x4570, 0x04F040BB}, ++ {0x4574, 0x000E53FF}, ++ {0x4578, 0x000205CB}, ++ {0x457C, 0x00200000}, ++ {0x4580, 0x00000040}, ++ {0x4584, 0x00000000}, ++ {0x4588, 0x00000017}, ++ {0x458C, 0x30000000}, ++ {0x4590, 0x00000000}, ++ {0x4594, 0x00000000}, ++ {0x4598, 0x00000001}, ++ {0x459C, 0x0003FE00}, ++ {0x45A0, 0x00000086}, ++ {0x45A4, 0x00000000}, ++ {0x45A8, 0xC00001C0}, ++ {0x45AC, 0x78038000}, ++ {0x45B0, 0x8000004A}, ++ {0x45B4, 0x04094800}, ++ {0x45B8, 0x00280002}, ++ {0x45BC, 0x06748790}, ++ {0x45C0, 0x80000000}, ++ {0x45C4, 0x00000000}, ++ {0x45C8, 0x00000000}, ++ {0x45CC, 0x00558670}, ++ {0x45D0, 0x002883F0}, ++ {0x45D4, 0x00090120}, ++ {0x45D8, 0x00000000}, ++ {0x45E0, 0xA3A6D3C4}, ++ {0x45E4, 0xAB27B126}, ++ {0x45E8, 0x00006778}, ++ {0x45F4, 0x000001B5}, ++ {0x45EC, 0x11110F0A}, ++ {0x45F0, 0x00000003}, ++ {0x4A0C, 0x0000000A}, ++ {0x45F8, 0x0058BC3F}, ++ {0x45FC, 0x00000003}, ++ {0x462C, 0x00000020}, ++ {0x4600, 0x000003D9}, ++ {0x45F0, 0x00000004}, ++ {0x4604, 0x002B1CB0}, ++ {0x4A50, 0xC0000000}, ++ {0x4A54, 0x00001000}, ++ {0x4A58, 0x00000000}, ++ {0x4A18, 0x00000024}, ++ {0x4608, 0x00000001}, ++ {0x460C, 0x00000000}, ++ {0x4A10, 0x00000001}, ++ {0x4610, 0x00000001}, ++ {0x4614, 0x16E5298F}, ++ {0x4618, 0x18C6294A}, ++ {0x461C, 0x0E06318A}, ++ {0x4620, 0x0E539CE5}, ++ {0x4624, 0x00019287}, ++ {0x4A14, 0x000000BF}, ++ {0x4628, 0x00000001}, ++ {0x4630, 0x000001AA}, ++ {0x4A18, 0x00001900}, ++ {0x4A1C, 0x000002A6}, ++ {0x4634, 0x000000A3}, ++ {0x4A20, 0x00000086}, ++ {0x4638, 0x01986456}, ++ {0x49F8, 0x00000000}, ++ {0x463C, 0x00000000}, ++ {0x4640, 0x00000000}, ++ {0x4644, 0x00C8CC00}, ++ {0x4648, 0xC400B6B6}, ++ {0x464C, 0xDC400FC0}, ++ {0x4A8C, 0x00000110}, ++ {0x4650, 0x08882550}, ++ {0x4654, 0x08CC2660}, ++ {0x4658, 0x09102660}, ++ {0x465C, 0x00000154}, ++ {0x45DC, 0xC39E38E8}, ++ {0x4660, 0x452607E6}, ++ {0x4664, 0x6750DC65}, ++ {0x4668, 0xF3F0F1ED}, ++ {0x466C, 0x30141506}, ++ {0x4670, 0x2C2B2B2B}, ++ {0x4674, 0x2C2C2C2C}, ++ {0x4678, 0xDDB738E8}, ++ {0x467C, 0x543618FB}, ++ {0x4680, 0x4F31DC6F}, ++ {0x4684, 0xFBEBDA00}, ++ {0x4688, 0x1A10FF04}, ++ {0x468C, 0x282A3000}, ++ {0x4690, 0x2A29292A}, ++ {0x4694, 0x04FA2A2A}, ++ {0x4698, 0xEE0F04D1}, ++ {0x469C, 0x99E91436}, ++ {0x46A0, 0x0701E79E}, ++ {0x46A4, 0x08D77CFF}, ++ {0x46A8, 0x2212FF14}, ++ {0x46AC, 0x60322437}, ++ {0x46B0, 0x63666666}, ++ {0x46B4, 0x35374425}, ++ {0x46B8, 0x35883042}, ++ {0x46BC, 0x5177C252}, ++ {0x4720, 0x7FFFFD63}, ++ {0x4724, 0xB58D11FF}, ++ {0x4728, 0x07FFFFFF}, ++ {0x472C, 0x0E7893B6}, ++ {0x4730, 0xE0391201}, ++ {0x4734, 0x00000020}, ++ {0x4738, 0x8325C500}, ++ {0x473C, 0x00000B7F}, ++ {0x46C0, 0x00000000}, ++ {0x46C4, 0x00000000}, ++ {0x46C8, 0x00000219}, ++ {0x46CC, 0x00000000}, ++ {0x46D0, 0x00000000}, ++ {0x46D4, 0x00000001}, ++ {0x46D8, 0x00000001}, ++ {0x46DC, 0x00000000}, ++ {0x46E0, 0x00000000}, ++ {0x46E4, 0x00000151}, ++ {0x46E8, 0x00000498}, ++ {0x46EC, 0x00000498}, ++ {0x46F0, 0x00000000}, ++ {0x46F4, 0x00000000}, ++ {0x46F8, 0x00001146}, ++ {0x46FC, 0x00000000}, ++ {0x4700, 0x00000000}, ++ {0x4704, 0x00C8CC00}, ++ {0x4708, 0xC400B6B6}, ++ {0x470C, 0xDC400FC0}, ++ {0x4A90, 0x00000110}, ++ {0x4710, 0x08882550}, ++ {0x4714, 0x08CC2660}, ++ {0x4718, 0x09102660}, ++ {0x471C, 0x00000154}, ++ {0x4740, 0xC69F38E8}, ++ {0x4744, 0x462709E9}, ++ {0x4748, 0x6750DC67}, ++ {0x474C, 0xF3F0F1ED}, ++ {0x4750, 0x30141506}, ++ {0x4754, 0x2C2B2B2B}, ++ {0x4758, 0x2C2C2C2C}, ++ {0x475C, 0xE0B738E8}, ++ {0x4760, 0x52381BFE}, ++ {0x4764, 0x5031DC6C}, ++ {0x4768, 0xFBEBDA00}, ++ {0x476C, 0x1A10FF04}, ++ {0x4770, 0x282A3000}, ++ {0x4774, 0x2A29292A}, ++ {0x4778, 0x04FA2A2A}, ++ {0x477C, 0xEE0F04D1}, ++ {0x49F0, 0x99E91436}, ++ {0x49F4, 0x0701E79E}, ++ {0x49FC, 0x08D77CFF}, ++ {0x4A5C, 0x2212FF14}, ++ {0x4A60, 0x60322437}, ++ {0x4A64, 0x63666666}, ++ {0x4A68, 0x35374425}, ++ {0x4A6C, 0x35883042}, ++ {0x4A70, 0x5177C252}, ++ {0x4A74, 0x7FFFFD63}, ++ {0x4A78, 0xB58D11FF}, ++ {0x4A7C, 0x07FFFFFF}, ++ {0x4A80, 0x0E7893B6}, ++ {0x4A9C, 0xE0391201}, ++ {0x4AA0, 0x00000020}, ++ {0x4AA4, 0x8325C500}, ++ {0x4AA8, 0x00000B7F}, ++ {0x4780, 0x00000000}, ++ {0x4784, 0x00000000}, ++ {0x4788, 0x00000219}, ++ {0x478C, 0x00000000}, ++ {0x4790, 0x00000000}, ++ {0x4794, 0x00000001}, ++ {0x4798, 0x00000001}, ++ {0x479C, 0x00000000}, ++ {0x47A0, 0x00000000}, ++ {0x47A4, 0x00000151}, ++ {0x47A8, 0x00000498}, ++ {0x47AC, 0x00000498}, ++ {0x47B0, 0x00000000}, ++ {0x47B4, 0x00000000}, ++ {0x47B8, 0x00001146}, ++ {0x47BC, 0x00000002}, ++ {0x47C0, 0x00000002}, ++ {0x47C4, 0x00000000}, ++ {0x47C8, 0xA32103FE}, ++ {0x47CC, 0xB20A5328}, ++ {0x47D0, 0xC686314F}, ++ {0x47D4, 0x000005D7}, ++ {0x47D8, 0x009B902A}, ++ {0x47DC, 0x009B902A}, ++ {0x47E0, 0x98682C18}, ++ {0x47E4, 0x6308C4C1}, ++ {0x47E8, 0x6248C631}, ++ {0x47EC, 0x922A8253}, ++ {0x47F0, 0x00000005}, ++ {0x47F4, 0x00001759}, ++ {0x47F8, 0x4BB02000}, ++ {0x47FC, 0x831408BE}, ++ {0x4A84, 0x000000E9}, ++ {0x4800, 0x9ABBCACB}, ++ {0x4804, 0x56767578}, ++ {0x4808, 0xBCCBBB13}, ++ {0x480C, 0x7889989B}, ++ {0x4810, 0xBBB0F455}, ++ {0x4814, 0x777BBBBB}, ++ {0x4818, 0x15277777}, ++ {0x481C, 0x27039CE9}, ++ {0x4820, 0x42424432}, ++ {0x4824, 0x36058342}, ++ {0x4828, 0x00000006}, ++ {0x482C, 0x00000005}, ++ {0x4830, 0x00000005}, ++ {0x4834, 0xC7013016}, ++ {0x4838, 0x84413016}, ++ {0x483C, 0x84413016}, ++ {0x4840, 0x8C413016}, ++ {0x4844, 0x8C40B028}, ++ {0x4848, 0x3140B028}, ++ {0x484C, 0x2940B028}, ++ {0x4850, 0x8440B028}, ++ {0x4854, 0x2318C610}, ++ {0x4858, 0x45344753}, ++ {0x485C, 0x236A6A88}, ++ {0x4860, 0xAC8DF814}, ++ {0x4864, 0x08877ACB}, ++ {0x4868, 0x000107AA}, ++ {0x4A94, 0x00000000}, ++ {0x486C, 0xBCEB4A14}, ++ {0x4870, 0x000A3A4A}, ++ {0x4874, 0xBCEB4A14}, ++ {0x4878, 0x000A3A4A}, ++ {0x487C, 0xBCBDBD85}, ++ {0x4880, 0x0CABB99A}, ++ {0x4884, 0x38384242}, ++ {0x4888, 0x0086102E}, ++ {0x488C, 0xCA24C82A}, ++ {0x4890, 0x00008A62}, ++ {0x4894, 0x00000008}, ++ {0x4898, 0x009B902A}, ++ {0x489C, 0x009B902A}, ++ {0x48A0, 0x98682C18}, ++ {0x48A4, 0x6308C4C1}, ++ {0x48A8, 0x6248C631}, ++ {0x48AC, 0x922A8253}, ++ {0x48B0, 0x00000005}, ++ {0x48B4, 0x00001759}, ++ {0x48B8, 0x4BA02000}, ++ {0x48BC, 0x831408BE}, ++ {0x4A88, 0x000000E9}, ++ {0x48C0, 0x9898A8BB}, ++ {0x48C4, 0x54535368}, ++ {0x48C8, 0x99999B13}, ++ {0x48CC, 0x55555899}, ++ {0x48D0, 0xBBB07453}, ++ {0x48D4, 0x777BBBBB}, ++ {0x48D8, 0x15277777}, ++ {0x48DC, 0x27039CE9}, ++ {0x48E0, 0x31413432}, ++ {0x48E4, 0x36058342}, ++ {0x48E8, 0x00000006}, ++ {0x48EC, 0x00000005}, ++ {0x48F0, 0x00000005}, ++ {0x48F4, 0xC7013016}, ++ {0x48F8, 0x84413016}, ++ {0x48FC, 0x84413016}, ++ {0x4900, 0x8C413016}, ++ {0x4904, 0x8C40B028}, ++ {0x4908, 0x3140B028}, ++ {0x490C, 0x2940B028}, ++ {0x4910, 0x8440B028}, ++ {0x4914, 0x2318C610}, ++ {0x4918, 0x45334753}, ++ {0x491C, 0x236A6A88}, ++ {0x4920, 0xAC8DF814}, ++ {0x4924, 0x08877ACB}, ++ {0x4928, 0x000007AA}, ++ {0x4A98, 0x00000000}, ++ {0x492C, 0xBCEB4A14}, ++ {0x4930, 0x000A3A4A}, ++ {0x4934, 0xBCEB4A14}, ++ {0x4938, 0x000A3A4A}, ++ {0x493C, 0x9A8A8A85}, ++ {0x4940, 0x0CA3B99A}, ++ {0x4944, 0x38384242}, ++ {0x4948, 0x8086102E}, ++ {0x494C, 0xCA24C82A}, ++ {0x4950, 0x00008A62}, ++ {0x4954, 0x00000008}, ++ {0x4958, 0x80040000}, ++ {0x495C, 0x80040000}, ++ {0x4960, 0xFE800000}, ++ {0x4964, 0x834C0000}, ++ {0x4968, 0x00000000}, ++ {0x496C, 0x00000000}, ++ {0x4970, 0x00000000}, ++ {0x4974, 0x00000000}, ++ {0x4978, 0x00000000}, ++ {0x497C, 0x00000000}, ++ {0x4980, 0x40000000}, ++ {0x4984, 0x00000000}, ++ {0x4988, 0x00000000}, ++ {0x498C, 0x00000000}, ++ {0x4990, 0x00000000}, ++ {0x4994, 0x04065800}, ++ {0x4998, 0x02004080}, ++ {0x499C, 0x0E1E3E05}, ++ {0x49A0, 0x0A163068}, ++ {0x49A4, 0x00206040}, ++ {0x49A8, 0x02020202}, ++ {0x49AC, 0x00002020}, ++ {0x49B0, 0xF8F8F418}, ++ {0x49B4, 0xF8E8F8F8}, ++ {0x49B8, 0xF80808E8}, ++ {0x4A00, 0xF8F8FA00}, ++ {0x4A04, 0xFAFAFAF8}, ++ {0x4A08, 0xFAFAFAFA}, ++ {0x4A28, 0xFAFAFAFA}, ++ {0x4A2C, 0xFAFAFAFA}, ++ {0x4A30, 0xFAFAFAFA}, ++ {0x4A34, 0xFAFAFAFA}, ++ {0x4A38, 0xFAFAFAFA}, ++ {0x4A3C, 0xFAFAFAFA}, ++ {0x4A40, 0xFAFAFAFA}, ++ {0x4A44, 0x0000FAFA}, ++ {0x49BC, 0x00000000}, ++ {0x49C0, 0x800CD62D}, ++ {0x49C4, 0x00000103}, ++ {0x49C8, 0x00000000}, ++ {0x49CC, 0x00000000}, ++ {0x49D0, 0x00000000}, ++ {0x49D4, 0x00000000}, ++ {0x49D8, 0x00000000}, ++ {0x49DC, 0x00000000}, ++ {0x49E0, 0x00000000}, ++ {0x49E4, 0x00000000}, ++ {0x49E8, 0x00000000}, ++ {0x49EC, 0x00000000}, ++ {0x994, 0x00000010}, ++ {0x904, 0x00000005}, ++ {0xC3C, 0x2840E1BF}, ++ {0xC40, 0x00000000}, ++ {0xC44, 0x00000007}, ++ {0xC48, 0x410E4000}, ++ {0xC54, 0x1EE14368}, ++ {0xC58, 0x41000000}, ++ {0x730, 0x00000002}, ++ {0xC60, 0x017FFFF2}, ++ {0xC64, 0x0010A130}, ++ {0xC68, 0x10000050}, ++ {0xC6C, 0x10001021}, ++ {0x708, 0x00000000}, ++ {0x884, 0x0043F01D}, ++ {0x704, 0x601E0100}, ++ {0x710, 0xEF810000}, ++ {0x704, 0x601E0100}, ++ {0xD40, 0xF64FA0F7}, ++ {0xD44, 0x0400063F}, ++ {0xD48, 0x0003FF7F}, ++ {0xD4C, 0x00000000}, ++ {0xD50, 0xF64FA0F7}, ++ {0xD54, 0x04100437}, ++ {0xD58, 0x0000FF7F}, ++ {0xD5C, 0x00000000}, ++ {0xD60, 0x00000000}, ++ {0xD64, 0x00000000}, ++ {0xD70, 0x00000015}, ++ {0xD90, 0x000003FF}, ++ {0xD94, 0x00000000}, ++ {0xD98, 0x0000003F}, ++ {0xD9C, 0x00000000}, ++ {0xDA0, 0x000003FE}, ++ {0xDA4, 0x00000000}, ++ {0xDA8, 0x0000003F}, ++ {0xDAC, 0x00000000}, ++ {0xD00, 0x77777777}, ++ {0xD04, 0xBBBBBBBB}, ++ {0xD08, 0xBBBBBBBB}, ++ {0xD0C, 0x00000070}, ++ {0xD10, 0x20110900}, ++ {0xD10, 0x20110FFF}, ++ {0xD78, 0x00000001}, ++ {0xD7C, 0x001D050E}, ++ {0xD84, 0x00004207}, ++ {0xD18, 0x50209900}, ++ {0xD80, 0x00804100}, ++ {0x718, 0x1333233F}, ++ {0x604, 0x041E1E1E}, ++ {0x714, 0x00010000}, ++ {0x586C, 0x000000F0}, ++ {0x586C, 0x000000E0}, ++ {0x586C, 0x000000D0}, ++ {0x586C, 0x000000C0}, ++ {0x586C, 0x000000B0}, ++ {0x586C, 0x000000A0}, ++ {0x586C, 0x00000090}, ++ {0x586C, 0x00000080}, ++ {0x586C, 0x00000070}, ++ {0x586C, 0x00000060}, ++ {0x586C, 0x00000050}, ++ {0x586C, 0x00000040}, ++ {0x586C, 0x00000030}, ++ {0x586C, 0x00000020}, ++ {0x586C, 0x00000010}, ++ {0x586C, 0x00000000}, ++ {0x786C, 0x000000F0}, ++ {0x786C, 0x000000E0}, ++ {0x786C, 0x000000D0}, ++ {0x786C, 0x000000C0}, ++ {0x786C, 0x000000B0}, ++ {0x786C, 0x000000A0}, ++ {0x786C, 0x00000090}, ++ {0x786C, 0x00000080}, ++ {0x786C, 0x00000070}, ++ {0x786C, 0x00000060}, ++ {0x786C, 0x00000050}, ++ {0x786C, 0x00000040}, ++ {0x786C, 0x00000030}, ++ {0x786C, 0x00000020}, ++ {0x786C, 0x00000010}, ++ {0x786C, 0x00000000}, ++ {0xC0D4, 0x4486888C}, ++ {0xC0D8, 0xC6BA10E1}, ++ {0xC0DC, 0x30C52868}, ++ {0xC0E0, 0x05008128}, ++ {0xC0E4, 0x0000A72B}, ++ {0xC1D4, 0x4486888C}, ++ {0xC1D8, 0xC6BA10E1}, ++ {0xC1DC, 0x30C52868}, ++ {0xC1E0, 0x05008128}, ++ {0xC1E4, 0x0000A72B}, ++ {0xC0EC, 0x00000000}, ++ {0xC0E4, 0x0000272B}, ++ {0xC1EC, 0x00000000}, ++ {0xC1E4, 0x0000272B}, ++ {0x334, 0xFFFFFFFF}, ++ {0x33C, 0x55000000}, ++ {0x340, 0x00005555}, ++ {0x724, 0x00111200}, ++ {0x5868, 0xA9550000}, ++ {0x5870, 0x33221100}, ++ {0x5874, 0x77665544}, ++ {0x5878, 0xBBAA9988}, ++ {0x587C, 0xFFEEDDCC}, ++ {0x5880, 0x76543210}, ++ {0x5884, 0xFEDCBA98}, ++ {0x5888, 0x00000000}, ++ {0x588C, 0x00000000}, ++ {0x5894, 0x00000008}, ++ {0x7868, 0xA9550000}, ++ {0x7870, 0x33221100}, ++ {0x7874, 0x77665544}, ++ {0x7878, 0xBBAA9988}, ++ {0x787C, 0xFFEEDDCC}, ++ {0x7880, 0x76543210}, ++ {0x7884, 0xFEDCBA98}, ++ {0x7888, 0x00000000}, ++ {0x788C, 0x00000000}, ++ {0x7894, 0x00000008}, ++ {0x650, 0x00200888}, ++ {0x710, 0xF3810000}, ++ {0x020, 0x0000F381}, ++ {0x024, 0x0000F381}, ++ {0x000, 0xC580801E}, ++ {0xC70, 0x00000400}, ++ {0x980, 0x10002250}, ++ {0x988, 0x3C3C4107}, ++ {0x994, 0x00000010}, ++ {0x2994, 0x00000010}, ++ {0x000, 0x0580801F}, ++ {0x240C, 0x00000000}, ++ {0x640, 0x140A141E}, ++ {0x640, 0x1414141E}, ++ {0x640, 0x1414141E}, ++ {0x644, 0x3414283C}, ++ {0x644, 0x3425283C}, ++ {0x644, 0x3426283C}, ++ {0x2640, 0x140A141E}, ++ {0x2640, 0x1414141E}, ++ {0x2640, 0x1414141E}, ++ {0x2644, 0x3414283C}, ++ {0x2644, 0x3425283C}, ++ {0x2644, 0x3425183C}, ++ {0x2300, 0x02748790}, ++ {0x2304, 0x00558670}, ++ {0x2308, 0x002883F0}, ++ {0x230C, 0x00090120}, ++ {0x2310, 0x00000000}, ++ {0x2314, 0x06000000}, ++ {0x2318, 0x00000000}, ++ {0x231C, 0x00000000}, ++ {0x2320, 0x03020100}, ++ {0x2324, 0x07060504}, ++ {0x2328, 0x0B0A0908}, ++ {0x232C, 0x0F0E0D0C}, ++ {0x2330, 0x13121110}, ++ {0x2334, 0x17161514}, ++ {0x2338, 0x0C700022}, ++ {0x233C, 0x0A0529D0}, ++ {0x2340, 0x000529D0}, ++ {0x2344, 0x0006318A}, ++ {0x2348, 0xB7E6318A}, ++ {0x234C, 0x80039C00}, ++ {0x2350, 0x80039C00}, ++ {0x2354, 0x0005298F}, ++ {0x2358, 0x0015296E}, ++ {0x235C, 0x0C07FC31}, ++ {0x2360, 0x0219AAAE}, ++ {0x2364, 0xE4F624C3}, ++ {0x2368, 0x53626F15}, ++ {0x236C, 0x48000000}, ++ {0x2370, 0x48000000}, ++ {0x2374, 0x07540000}, ++ {0x2378, 0x202401B9}, ++ {0x237C, 0x00F7000E}, ++ {0x2380, 0x0F0A1111}, ++ {0x2384, 0x30D9000F}, ++ {0x2388, 0x0200EA02}, ++ {0x238C, 0x003CB061}, ++ {0x2390, 0x69C00000}, ++ {0x2394, 0x00000000}, ++ {0x2398, 0x000000F0}, ++ {0x239C, 0x0001FFFF}, ++ {0x23A0, 0x00C80064}, ++ {0x23A4, 0x0190012C}, ++ {0x23A8, 0x001917BE}, ++ {0x23AC, 0x0B30880C}, ++ {0x23B0, 0x9281CE00}, ++ {0x23B4, 0x7F027C00}, ++ {0x704, 0x601E0102}, ++ {0x704, 0x601E0102}, ++ {0x5864, 0x080801FF}, ++ {0x7864, 0x080801FF}, ++ {0xC60, 0x017FFFF3}, ++ {0x58AC, 0x08000000}, ++ {0x78AC, 0x08000000}, ++ {0x8088, 0x007F0000}, ++ {0x81A4, 0x003F3A00}, ++ {0x81B4, 0x0100007F}, ++ {0x81C0, 0x0060010B}, ++ {0x81A0, 0x00000010}, ++ {0x8138, 0x00000002}, ++ {0x82A4, 0x003F3A00}, ++ {0x82B4, 0x0100007F}, ++ {0x82C0, 0x0060010B}, ++ {0x82A0, 0x00000010}, ++ {0x81A0, 0x00000010}, ++ {0x8238, 0x00000002}, ++ {0x8088, 0x00000000}, ++ {0x8020, 0x00000000}, ++ {0x8120, 0x00000000}, ++ {0x8220, 0x00000000}, ++ {0x8124, 0x00000F0F}, ++ {0x8224, 0x00000F0F}, ++ {0x5864, 0x180801FF}, ++ {0x7864, 0x180801FF}, ++ {0xC60, 0x017FFFF3}, ++ {0xC70, 0x00000600}, ++ {0xC70, 0x00000660}, ++ {0x58AC, 0x08000000}, ++ {0x78AC, 0x08000000}, ++ {0x8120, 0x10000000}, ++ {0x8120, 0x10030000}, ++ {0x8124, 0x00000F0F}, ++ {0x8124, 0x00000F0F}, ++ {0x8224, 0x00000F0F}, ++ {0x8224, 0x00000F0F}, ++ {0x8220, 0x10000000}, ++ {0x8220, 0x10030000}, ++ {0x704, 0x601E0100}, ++ {0x5864, 0x100801FF}, ++ {0x7864, 0x100801FF}, ++ {0x5864, 0x180801FF}, ++ {0x7864, 0x180801FF}, ++ {0x58D4, 0x7401FE00}, ++ {0x78D4, 0x7401FE00}, ++ {0x58F0, 0x400401FF}, ++ {0x78F0, 0x400401FF}, ++ {0x58F0, 0x400401FF}, ++ {0x78F0, 0x400401FF}, ++ {0x704, 0x601E0102}, ++ {0xC7C, 0x0020BFE0}, ++ {0x58C0, 0x00FE0000}, ++ {0x58FC, 0x00000000}, ++ {0x566C, 0x00000005}, ++ {0x566C, 0x00001005}, ++ {0x78C0, 0x00FE0000}, ++ {0x78FC, 0x00000000}, ++ {0x700, 0x00000030}, ++ {0x704, 0x601E0102}, ++ {0x704, 0x601E0100}, ++ {0x704, 0x601E0502}, ++ {0x20FC, 0x00000000}, ++ {0x20F8, 0x00000000}, ++ {0x20F0, 0x00000000}, ++ {0x9C0, 0x00000001}, ++ {0x9C0, 0x00000000}, ++ {0x9C0, 0x00000001}, ++ {0x9C0, 0x00000000}, ++ {0x4AE8, 0x00000744}, ++ {0x4AF0, 0x00000744}, ++ {0x1010, 0x00000010}, ++ {0x3010, 0x00000010}, ++ {0x4AD4, 0x00000040}, ++ {0x4AE0, 0x00000040}, ++ {0x4AE4, 0x0079E99E}, ++ {0x4AEC, 0x0079E99E}, ++ {0x300, 0xF30CE31C}, ++ {0x304, 0x13EF1F19}, ++ {0x308, 0x0C0CF3F3}, ++ {0x30C, 0x0C0C0C0C}, ++ {0x310, 0x80496000}, ++ {0x314, 0x0041E000}, ++ {0x318, 0x20022042}, ++ {0x31C, 0x20448009}, ++ {0x320, 0x00010031}, ++ {0x324, 0xE000E000}, ++ {0x328, 0xE000E000}, ++ {0x32C, 0xE000E000}, ++ {0x12BC, 0x10104041}, ++ {0x12C0, 0x14411111}, ++ {0x32BC, 0x10104041}, ++ {0x32C0, 0x14411111}, ++ {0x010, 0x0005FFFF}, ++ {0x028, 0x0000F381}, ++ {0x02C, 0x0000F381}, ++ {0x620, 0x00141230}, ++ {0x704, 0x601C05FF}, ++ {0x720, 0x20000000}, ++ {0x738, 0x004100CC}, ++ {0x12A0, 0x24903056}, ++ {0x12AC, 0x12333121}, ++ {0x12B8, 0x30020000}, ++ {0x12E4, 0x30D52A68}, ++ {0x2000, 0x50BBBF04}, ++ {0x32A0, 0x24903056}, ++ {0x32AC, 0x12333121}, ++ {0x32B8, 0x30020000}, ++ {0x32E4, 0x30D52A68}, ++ {0x5800, 0x03FF807F}, ++ {0x5804, 0x04237040}, ++ {0x5808, 0x04237040}, ++ {0x7800, 0x03FF807F}, ++ {0x7804, 0x04237040}, ++ {0x7808, 0x04237040}, ++ {0x73C, 0x00000002}, ++ {0x74C, 0x00000001}, ++ {0x748, 0x00000002}, ++ {0x5818, 0x082C1800}, ++ {0x7818, 0x082C1800}, ++ {0x624, 0x0101030A}, ++ {0xC14, 0x85010000}, ++ {0xDD4, 0x00000001}, ++ {0x241C, 0x00000001}, ++ {0x1200, 0x00010142}, ++ {0x3200, 0x00010142}, ++ {0xC0F8, 0x00000001}, ++ {0xC1F8, 0x00000001}, ++ {0x35C, 0x000004C4}, ++ {0x0F0, 0x00000002}, ++ {0x0F4, 0x00000028}, ++ {0x0F8, 0x20220408}, ++}; ++ ++static const struct rtw89_reg2_def rtw89_8852b_phy_bb_reg_gain[] = { ++ {0x000, 0x18FBDDB7}, ++ {0x001, 0x006F5436}, ++ {0x002, 0x00004F31}, ++ {0x100, 0x1BFEE0B7}, ++ {0x101, 0x006C5238}, ++ {0x102, 0x00005031}, ++ {0x10000, 0x07E6C39E}, ++ {0x10001, 0x00654526}, ++ {0x10002, 0x00006750}, ++ {0x10100, 0x09E9C69F}, ++ {0x10101, 0x00674627}, ++ {0x10102, 0x00006750}, ++ {0x20000, 0x06E8C49F}, ++ {0x20001, 0x00654526}, ++ {0x20002, 0x00006750}, ++ {0x20100, 0x07E9C6A0}, ++ {0x20101, 0x00674728}, ++ {0x20102, 0x00006850}, ++ {0x30000, 0x04E5C39D}, ++ {0x30001, 0x00634325}, ++ {0x30002, 0x00006750}, ++ {0x30100, 0x06E9C69F}, ++ {0x30101, 0x00654527}, ++ {0x30102, 0x00006750}, ++ {0x1000000, 0x000000F4}, ++ {0x1000010, 0x000000F8}, ++ {0x1000011, 0x0000F8F8}, ++ {0x1000100, 0x000000F8}, ++ {0x1000110, 0x00000000}, ++ {0x1000111, 0x00000000}, ++ {0x1010000, 0x000000F4}, ++ {0x1010010, 0x000000F8}, ++ {0x1010011, 0x0000F8F8}, ++ {0x1010020, 0x000000F8}, ++ {0x1010021, 0x0808E8E8}, ++ {0x1010029, 0x0000F8F8}, ++ {0x1010100, 0x000000F4}, ++ {0x1010110, 0x000000F8}, ++ {0x1010111, 0x0000F8F8}, ++ {0x1010120, 0x000000F8}, ++ {0x1010121, 0x0808E8E8}, ++ {0x1010129, 0x0000F8F8}, ++ {0x1020000, 0x000000F4}, ++ {0x1020010, 0x000000F8}, ++ {0x1020011, 0x0000F8F8}, ++ {0x1020020, 0x000000F8}, ++ {0x1020021, 0x0808E8E8}, ++ {0x1020029, 0x0000F8F8}, ++ {0x1020100, 0x000000F4}, ++ {0x1020110, 0x000000F8}, ++ {0x1020111, 0x0000F8F8}, ++ {0x1020120, 0x000000F8}, ++ {0x1020121, 0x0808E8E8}, ++ {0x1020129, 0x0000F8F8}, ++ {0x1030000, 0x000000F4}, ++ {0x1030010, 0x000000F8}, ++ {0x1030011, 0x0000F8F8}, ++ {0x1030020, 0x000000F8}, ++ {0x1030021, 0x0808E8E8}, ++ {0x1030029, 0x0000F8F8}, ++ {0x1030100, 0x000000F4}, ++ {0x1030110, 0x000000F8}, ++ {0x1030111, 0x0000F8F8}, ++ {0x1030120, 0x000000F8}, ++ {0x1030121, 0x0808E8E8}, ++ {0x1030129, 0x0000F8F8}, ++}; ++ ++static const struct rtw89_reg2_def rtw89_8852b_phy_radioa_regs[] = { ++ {0xF0010000, 0x00000000}, ++ {0xF0020000, 0x00000001}, ++ {0xF0010001, 0x00000002}, ++ {0xF0020001, 0x00000003}, ++ {0xF0030001, 0x00000004}, ++ {0xF0040001, 0x00000005}, ++ {0xF0050001, 0x00000006}, ++ {0xF0060001, 0x00000007}, ++ {0xF0070001, 0x00000008}, ++ {0xF0080001, 0x00000009}, ++ {0xF0290001, 0x0000000A}, ++ {0xF02B0001, 0x0000000B}, ++ {0x005, 0x00000000}, ++ {0x000, 0x00030000}, ++ {0x10000, 0x00030000}, ++ {0x018, 0x00011124}, ++ {0x10018, 0x00011124}, ++ {0x000, 0x00033C00}, ++ {0x10000, 0x00033C00}, ++ {0x01A, 0x00040004}, ++ {0x011, 0x00014073}, ++ {0x067, 0x00000070}, ++ {0x059, 0x000A0000}, ++ {0x066, 0x00000100}, ++ {0x057, 0x0000D589}, ++ {0x05A, 0x0007FFFF}, ++ {0x0A4, 0x0006FF12}, ++ {0x043, 0x00005000}, ++ {0x0E1, 0x00000001}, ++ {0x0DD, 0x000001A0}, ++ {0x0CA, 0x00002000}, ++ {0x0D3, 0x00000003}, ++ {0x0B3, 0x0004EFE0}, ++ {0x0B4, 0x0007C07E}, ++ {0x0B5, 0x0003A701}, ++ {0x0B6, 0x000581E0}, ++ {0x0B7, 0x00001A0A}, ++ {0x0BB, 0x000C7000}, ++ {0x0ED, 0x00000400}, ++ {0x033, 0x00000000}, ++ {0x03F, 0x00000543}, ++ {0x033, 0x00000001}, ++ {0x03F, 0x00000542}, ++ {0x033, 0x00000002}, ++ {0x03F, 0x00000541}, ++ {0x033, 0x00000003}, ++ {0x03F, 0x00000521}, ++ {0x033, 0x00000004}, ++ {0x03F, 0x00000343}, ++ {0x033, 0x00000005}, ++ {0x03F, 0x00000342}, ++ {0x033, 0x00000006}, ++ {0x03F, 0x00000341}, ++ {0x033, 0x00000007}, ++ {0x03F, 0x00000321}, ++ {0x033, 0x00000008}, ++ {0x03F, 0x000005C3}, ++ {0x033, 0x00000009}, ++ {0x03F, 0x000005C2}, ++ {0x033, 0x0000000A}, ++ {0x03F, 0x000005C1}, ++ {0x033, 0x0000000B}, ++ {0x03F, 0x000005A1}, ++ {0x033, 0x0000000C}, ++ {0x03F, 0x000002C3}, ++ {0x033, 0x0000000D}, ++ {0x03F, 0x000002C2}, ++ {0x033, 0x0000000E}, ++ {0x03F, 0x000002C1}, ++ {0x033, 0x0000000F}, ++ {0x03F, 0x000002A1}, ++ {0x0ED, 0x00000000}, ++ {0x0ED, 0x00002000}, ++ {0x033, 0x00000002}, ++ {0x03D, 0x0004A883}, ++ {0x03E, 0x00000000}, ++ {0x03F, 0x00000001}, ++ {0x033, 0x00000006}, ++ {0x03D, 0x0004A883}, ++ {0x03E, 0x00000000}, ++ {0x03F, 0x00000001}, ++ {0x0ED, 0x00000000}, ++ {0x018, 0x00001001}, ++ {0x10018, 0x00001001}, ++ {0x002, 0x0000000D}, ++ {0x10002, 0x0000000D}, ++ {0x0EE, 0x00000004}, ++ {0x033, 0x0000000B}, ++ {0x03F, 0x0000000B}, ++ {0x033, 0x0000000C}, ++ {0x03F, 0x00000012}, ++ {0x033, 0x0000000D}, ++ {0x03F, 0x00000019}, ++ {0x0EE, 0x00000000}, ++ {0x08F, 0x000D0F7A}, ++ {0x0EF, 0x00080000}, ++ {0x033, 0x00000008}, ++ {0x03E, 0x000000C4}, ++ {0x03F, 0x000034C0}, ++ {0x033, 0x0000000A}, ++ {0x03E, 0x000000C4}, ++ {0x03F, 0x000035D0}, ++ {0x033, 0x0000000B}, ++ {0x03E, 0x000000C4}, ++ {0x03F, 0x000035C8}, ++ {0x033, 0x0000008A}, ++ {0x03E, 0x000000C4}, ++ {0x03F, 0x000035F7}, ++ {0x0EF, 0x00000000}, ++ {0x08D, 0x000CC800}, ++ {0x0EF, 0x00004000}, ++ {0x033, 0x00000006}, ++ {0x03F, 0x00000700}, ++ {0x033, 0x00000005}, ++ {0x03F, 0x00090600}, ++ {0x033, 0x00000004}, ++ {0x03F, 0x000A3500}, ++ {0x033, 0x00000003}, ++ {0x03F, 0x000A3400}, ++ {0x033, 0x00000002}, ++ {0x03F, 0x00008B00}, ++ {0x033, 0x00000001}, ++ {0x03F, 0x00001B00}, ++ {0x033, 0x00000000}, ++ {0x03F, 0x00003A00}, ++ {0x033, 0x0000000F}, ++ {0x03F, 0x00000700}, ++ {0x033, 0x0000000E}, ++ {0x03F, 0x00000700}, ++ {0x033, 0x0000000D}, ++ {0x03F, 0x00090600}, ++ {0x033, 0x0000000C}, ++ {0x03F, 0x000A3500}, ++ {0x033, 0x0000000B}, ++ {0x03F, 0x000A3400}, ++ {0x033, 0x0000000A}, ++ {0x03F, 0x00008B00}, ++ {0x033, 0x00000009}, ++ {0x03F, 0x00001B00}, ++ {0x033, 0x00000008}, ++ {0x03F, 0x00003A00}, ++ {0x0EF, 0x00000000}, ++ {0x0EE, 0x00000010}, ++ {0x033, 0x00000006}, ++ {0x03F, 0x00000003}, ++ {0x033, 0x00000007}, ++ {0x03F, 0x00000003}, ++ {0x033, 0x00000008}, ++ {0x03F, 0x00000001}, ++ {0x0EE, 0x00000000}, ++ {0x0EF, 0x00001000}, ++ {0x033, 0x00000000}, ++ {0x03F, 0x00000015}, ++ {0x033, 0x00000001}, ++ {0x03F, 0x00000017}, ++ {0x0EF, 0x00000000}, ++ {0x0EF, 0x00008000}, ++ {0x033, 0x00000000}, ++ {0x03E, 0x00004FC0}, ++ {0x03F, 0x00000087}, ++ {0x033, 0x00000001}, ++ {0x03E, 0x000046C0}, ++ {0x03F, 0x00000087}, ++ {0x033, 0x00000002}, ++ {0x03E, 0x00004240}, ++ {0x03F, 0x00000087}, ++ {0x033, 0x00000003}, ++ {0x03E, 0x00008010}, ++ {0x03F, 0x00000147}, ++ {0x033, 0x00000004}, ++ {0x03E, 0x0000A048}, ++ {0x03F, 0x0000004F}, ++ {0x033, 0x00000005}, ++ {0x03E, 0x0000A030}, ++ {0x03F, 0x0000005F}, ++ {0x033, 0x00000006}, ++ {0x03E, 0x0000A000}, ++ {0x03F, 0x0000009F}, ++ {0x033, 0x00000008}, ++ {0x03E, 0x00004FC0}, ++ {0x03F, 0x00000087}, ++ {0x033, 0x00000009}, ++ {0x03E, 0x000046C0}, ++ {0x03F, 0x00000087}, ++ {0x033, 0x0000000A}, ++ {0x03E, 0x00004240}, ++ {0x03F, 0x00000087}, ++ {0x033, 0x0000000B}, ++ {0x03E, 0x00008010}, ++ {0x03F, 0x00000147}, ++ {0x033, 0x0000000C}, ++ {0x03E, 0x0000A048}, ++ {0x03F, 0x0000004F}, ++ {0x033, 0x0000000D}, ++ {0x03E, 0x0000A030}, ++ {0x03F, 0x0000005F}, ++ {0x033, 0x0000000E}, ++ {0x03E, 0x0000A000}, ++ {0x03F, 0x0000009F}, ++ {0x033, 0x00000010}, ++ {0x03E, 0x00004FC0}, ++ {0x03F, 0x00000087}, ++ {0x033, 0x00000011}, ++ {0x03E, 0x000046C0}, ++ {0x03F, 0x00000087}, ++ {0x033, 0x00000012}, ++ {0x03E, 0x00004240}, ++ {0x03F, 0x00000087}, ++ {0x033, 0x00000013}, ++ {0x03E, 0x00008010}, ++ {0x03F, 0x00000147}, ++ {0x033, 0x00000014}, ++ {0x03E, 0x0000A048}, ++ {0x03F, 0x0000004F}, ++ {0x033, 0x00000015}, ++ {0x03E, 0x0000A030}, ++ {0x03F, 0x0000005F}, ++ {0x033, 0x00000016}, ++ {0x03E, 0x0000A000}, ++ {0x03F, 0x0000009F}, ++ {0x033, 0x00000020}, ++ {0x03E, 0x00004FC0}, ++ {0x03F, 0x00000087}, ++ {0x033, 0x00000021}, ++ {0x03E, 0x000046C0}, ++ {0x03F, 0x00000087}, ++ {0x033, 0x00000022}, ++ {0x03E, 0x00004240}, ++ {0x03F, 0x00000087}, ++ {0x033, 0x00000023}, ++ {0x03E, 0x00008010}, ++ {0x03F, 0x00000147}, ++ {0x033, 0x00000024}, ++ {0x03E, 0x0000A048}, ++ {0x03F, 0x0000004F}, ++ {0x033, 0x00000025}, ++ {0x03E, 0x0000A030}, ++ {0x03F, 0x0000005F}, ++ {0x033, 0x00000026}, ++ {0x03E, 0x0000A000}, ++ {0x03F, 0x0000009F}, ++ {0x033, 0x00000028}, ++ {0x03E, 0x00004FC0}, ++ {0x03F, 0x00000087}, ++ {0x033, 0x00000029}, ++ {0x03E, 0x000046C0}, ++ {0x03F, 0x00000087}, ++ {0x033, 0x0000002A}, ++ {0x03E, 0x00004240}, ++ {0x03F, 0x00000087}, ++ {0x033, 0x0000002B}, ++ {0x03E, 0x00008010}, ++ {0x03F, 0x00000147}, ++ {0x033, 0x0000002C}, ++ {0x03E, 0x0000A048}, ++ {0x03F, 0x0000004F}, ++ {0x033, 0x0000002D}, ++ {0x03E, 0x0000A030}, ++ {0x03F, 0x0000005F}, ++ {0x033, 0x0000002E}, ++ {0x03E, 0x0000A000}, ++ {0x03F, 0x0000009F}, ++ {0x033, 0x00000030}, ++ {0x03E, 0x00004FC0}, ++ {0x03F, 0x00000087}, ++ {0x033, 0x00000031}, ++ {0x03E, 0x000046C0}, ++ {0x03F, 0x00000087}, ++ {0x033, 0x00000032}, ++ {0x03E, 0x00004240}, ++ {0x03F, 0x00000087}, ++ {0x033, 0x00000033}, ++ {0x03E, 0x00008010}, ++ {0x03F, 0x00000147}, ++ {0x033, 0x00000034}, ++ {0x03E, 0x0000A048}, ++ {0x03F, 0x0000004F}, ++ {0x033, 0x00000035}, ++ {0x03E, 0x0000A030}, ++ {0x03F, 0x0000005F}, ++ {0x033, 0x00000036}, ++ {0x03E, 0x0000A000}, ++ {0x03F, 0x0000009F}, ++ {0x0EF, 0x00000000}, ++ {0x0EF, 0x00000100}, ++ {0x033, 0x00000000}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000001}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000002}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000003}, ++ {0x03F, 0x00004376}, ++ {0x033, 0x00000004}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000005}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004317}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004317}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004317}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004317}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004317}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004317}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004317}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004317}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004317}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004317}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000006}, ++ {0x03F, 0x00004376}, ++ {0x033, 0x00000007}, ++ {0x03F, 0x00004376}, ++ {0x033, 0x00000008}, ++ {0x03F, 0x00004376}, ++ {0x033, 0x00000009}, ++ {0x03F, 0x00004376}, ++ {0x033, 0x0000000A}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000000B}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000000D}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000000E}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000000F}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000010}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000011}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000012}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000013}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000014}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000015}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000016}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000017}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000020}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000021}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000022}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000023}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004396}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004396}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004386}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004386}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004386}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004386}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004386}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004386}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004386}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004386}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004386}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004386}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00004396}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000024}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004396}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004396}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004386}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004386}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004386}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004386}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004386}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004386}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004386}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004386}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004386}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004386}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00004396}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000025}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004396}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004396}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004386}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004386}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004386}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004386}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004386}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004386}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004386}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004386}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004386}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004386}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00004396}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000026}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004396}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004396}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004386}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004386}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004386}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004386}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004386}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004386}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004386}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004386}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004386}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004386}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00004396}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000027}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004396}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004396}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004386}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004386}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004386}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004386}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004386}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004386}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004386}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004386}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004386}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004386}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00004396}, ++ {0xB0000000, 0x00000000}, ++ {0x0EF, 0x00000000}, ++ {0x067, 0x00008072}, ++ {0x0EF, 0x00000010}, ++ {0x033, 0x00000001}, ++ {0x03F, 0x00000ED5}, ++ {0x033, 0x00000002}, ++ {0x03F, 0x00000FC7}, ++ {0x033, 0x00000003}, ++ {0x03F, 0x00000783}, ++ {0x033, 0x00000004}, ++ {0x03F, 0x00000973}, ++ {0x033, 0x00000005}, ++ {0x03F, 0x00000762}, ++ {0x033, 0x00000006}, ++ {0x03F, 0x00000762}, ++ {0x0EF, 0x00000000}, ++ {0x0EF, 0x00000080}, ++ {0x033, 0x00000000}, ++ {0x03E, 0x0000000B}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000001}, ++ {0x03E, 0x0000000B}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000002}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000003}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000004}, ++ {0x03E, 0x0000000B}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000005}, ++ {0x03E, 0x0000000B}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000006}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000007}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000008}, ++ {0x03E, 0x0000000B}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000009}, ++ {0x03E, 0x0000000B}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000000A}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000000B}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000000C}, ++ {0x03E, 0x0000000B}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000000D}, ++ {0x03E, 0x0000000B}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000000E}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000000F}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000010}, ++ {0x03E, 0x0000000B}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000011}, ++ {0x03E, 0x0000000B}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000012}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000013}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023958}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000014}, ++ {0x03E, 0x0000000B}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000015}, ++ {0x03E, 0x0000000B}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000016}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000017}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000018}, ++ {0x03E, 0x0000000B}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000019}, ++ {0x03E, 0x0000000B}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000001A}, ++ {0x03E, 0x0000000B}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000001B}, ++ {0x03E, 0x0000000B}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000001C}, ++ {0x03E, 0x0000000B}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000001D}, ++ {0x03E, 0x0000000B}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000001E}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000001F}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000020}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000021}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000022}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000023}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000024}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000025}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000026}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000027}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000028}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000029}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000002A}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000002B}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000002C}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000002D}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000002E}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000002F}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000030}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000031}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000032}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000033}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000034}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000035}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000036}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000037}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000038}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000039}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026858}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000003A}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022A58}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000003B}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00023A58}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x0002C758}, ++ {0xB0000000, 0x00000000}, ++ {0x0EF, 0x00000000}, ++ {0x0EE, 0x00000800}, ++ {0x033, 0x00000000}, ++ {0x03F, 0x00000001}, ++ {0x033, 0x00000001}, ++ {0x03F, 0x00000003}, ++ {0x033, 0x00000002}, ++ {0x03F, 0x00000005}, ++ {0x033, 0x00000003}, ++ {0x03F, 0x00000007}, ++ {0x033, 0x00000004}, ++ {0x03F, 0x00000001}, ++ {0x033, 0x00000005}, ++ {0x03F, 0x00000003}, ++ {0x033, 0x00000006}, ++ {0x03F, 0x00000006}, ++ {0x033, 0x00000007}, ++ {0x03F, 0x00000007}, ++ {0x0EE, 0x00000000}, ++ {0x0EE, 0x00001000}, ++ {0x033, 0x00000000}, ++ {0x03F, 0x00003000}, ++ {0x033, 0x00000001}, ++ {0x03F, 0x00003001}, ++ {0x033, 0x00000002}, ++ {0x03F, 0x00003003}, ++ {0x033, 0x00000003}, ++ {0x03F, 0x00003007}, ++ {0x033, 0x00000004}, ++ {0x03F, 0x0000300F}, ++ {0x033, 0x00000005}, ++ {0x03F, 0x0000310F}, ++ {0x033, 0x00000006}, ++ {0x03F, 0x0000330F}, ++ {0x033, 0x00000007}, ++ {0x03F, 0x0000330F}, ++ {0x033, 0x00000008}, ++ {0x03F, 0x00003000}, ++ {0x033, 0x00000009}, ++ {0x03F, 0x00003001}, ++ {0x033, 0x0000000A}, ++ {0x03F, 0x00003003}, ++ {0x033, 0x0000000B}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003007}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003007}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003007}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003007}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003007}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003007}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003007}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003007}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003007}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003007}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003007}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003007}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00003103}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003107}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003107}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003107}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003107}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003107}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003107}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003107}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003107}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003107}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003107}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003107}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003107}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00003307}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000000D}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003307}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003307}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003307}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003307}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003307}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003307}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003307}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003307}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003307}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003307}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003307}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003307}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00002307}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000000E}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00001307}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00001307}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00001307}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00001307}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00001307}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00001307}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00001307}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00001307}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00001307}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00001307}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00001307}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00001307}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00000307}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000000F}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000307}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000307}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000307}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000307}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000307}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000307}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000307}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000307}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000307}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000307}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000307}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000307}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00000307}, ++ {0xB0000000, 0x00000000}, ++ {0x0EE, 0x00000000}, ++ {0x0EE, 0x00000200}, ++ {0x033, 0x00000000}, ++ {0x03F, 0x00000001}, ++ {0x033, 0x00000001}, ++ {0x03F, 0x00000003}, ++ {0x033, 0x00000002}, ++ {0x03F, 0x00000005}, ++ {0x033, 0x00000003}, ++ {0x03F, 0x00000007}, ++ {0x0EE, 0x00000000}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x0EC, 0x00000100}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x0EC, 0x00000100}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x0EC, 0x00000000}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x0EC, 0x00000000}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x0EC, 0x00000000}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x0EC, 0x00000000}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x0EC, 0x00000000}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x0EC, 0x00000000}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x0EC, 0x00000000}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x0EC, 0x00000000}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x0EC, 0x00000000}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x0EC, 0x00000000}, ++ {0xA0000000, 0x00000000}, ++ {0x0EC, 0x00000100}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000004}, ++ {0x03D, 0x00000078}, ++ {0x03E, 0x00080000}, ++ {0x03F, 0x00000000}, ++ {0x033, 0x00000005}, ++ {0x03D, 0x0000007B}, ++ {0x03E, 0x00020000}, ++ {0x03F, 0x00000000}, ++ {0x0EC, 0x00000000}, ++ {0x0DE, 0x00000000}, ++ {0x0EF, 0x00000000}, ++ {0x033, 0x00000000}, ++ {0x008, 0x00060280}, ++ {0x009, 0x00030400}, ++ {0x0EF, 0x00000000}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x0EF, 0x00000400}, ++ {0x033, 0x00000000}, ++ {0x03F, 0x000001FF}, ++ {0x033, 0x00000001}, ++ {0x03F, 0x000001FF}, ++ {0x033, 0x00000002}, ++ {0x03F, 0x000001F7}, ++ {0x033, 0x00000003}, ++ {0x03F, 0x000000FF}, ++ {0x033, 0x00000004}, ++ {0x03F, 0x000000FF}, ++ {0x033, 0x00000005}, ++ {0x03F, 0x000000FF}, ++ {0x033, 0x00000006}, ++ {0x03F, 0x000000FF}, ++ {0x033, 0x00000007}, ++ {0x03F, 0x000000FF}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x0EF, 0x00000400}, ++ {0x033, 0x00000000}, ++ {0x03F, 0x000001FF}, ++ {0x033, 0x00000001}, ++ {0x03F, 0x000001FF}, ++ {0x033, 0x00000002}, ++ {0x03F, 0x000001F7}, ++ {0x033, 0x00000003}, ++ {0x03F, 0x000000FF}, ++ {0x033, 0x00000004}, ++ {0x03F, 0x000000FF}, ++ {0x033, 0x00000005}, ++ {0x03F, 0x000000FF}, ++ {0x033, 0x00000006}, ++ {0x03F, 0x000000FF}, ++ {0x033, 0x00000007}, ++ {0x03F, 0x000000FF}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x0EF, 0x00000400}, ++ {0x033, 0x00000000}, ++ {0x03F, 0x000001FF}, ++ {0x033, 0x00000001}, ++ {0x03F, 0x000001FF}, ++ {0x033, 0x00000002}, ++ {0x03F, 0x0000013F}, ++ {0x033, 0x00000003}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000004}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000005}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000006}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000007}, ++ {0x03F, 0x000000FB}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x0EF, 0x00000400}, ++ {0x033, 0x00000000}, ++ {0x03F, 0x000001FF}, ++ {0x033, 0x00000001}, ++ {0x03F, 0x000001FF}, ++ {0x033, 0x00000002}, ++ {0x03F, 0x0000013F}, ++ {0x033, 0x00000003}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000004}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000005}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000006}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000007}, ++ {0x03F, 0x000000FB}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x0EF, 0x00000400}, ++ {0x033, 0x00000000}, ++ {0x03F, 0x000001FF}, ++ {0x033, 0x00000001}, ++ {0x03F, 0x000001FF}, ++ {0x033, 0x00000002}, ++ {0x03F, 0x0000013F}, ++ {0x033, 0x00000003}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000004}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000005}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000006}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000007}, ++ {0x03F, 0x000000FB}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x0EF, 0x00000400}, ++ {0x033, 0x00000000}, ++ {0x03F, 0x000001FF}, ++ {0x033, 0x00000001}, ++ {0x03F, 0x000001FF}, ++ {0x033, 0x00000002}, ++ {0x03F, 0x0000013F}, ++ {0x033, 0x00000003}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000004}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000005}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000006}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000007}, ++ {0x03F, 0x000000FB}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x0EF, 0x00000400}, ++ {0x033, 0x00000000}, ++ {0x03F, 0x000001FF}, ++ {0x033, 0x00000001}, ++ {0x03F, 0x000001FF}, ++ {0x033, 0x00000002}, ++ {0x03F, 0x0000013F}, ++ {0x033, 0x00000003}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000004}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000005}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000006}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000007}, ++ {0x03F, 0x000000FB}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x0EF, 0x00000400}, ++ {0x033, 0x00000000}, ++ {0x03F, 0x000001FF}, ++ {0x033, 0x00000001}, ++ {0x03F, 0x000001FF}, ++ {0x033, 0x00000002}, ++ {0x03F, 0x0000013F}, ++ {0x033, 0x00000003}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000004}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000005}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000006}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000007}, ++ {0x03F, 0x000000FB}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x0EF, 0x00000400}, ++ {0x033, 0x00000000}, ++ {0x03F, 0x000001FF}, ++ {0x033, 0x00000001}, ++ {0x03F, 0x000001FF}, ++ {0x033, 0x00000002}, ++ {0x03F, 0x0000013F}, ++ {0x033, 0x00000003}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000004}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000005}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000006}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000007}, ++ {0x03F, 0x000000FB}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x0EF, 0x00000400}, ++ {0x033, 0x00000000}, ++ {0x03F, 0x000001FF}, ++ {0x033, 0x00000001}, ++ {0x03F, 0x000001FF}, ++ {0x033, 0x00000002}, ++ {0x03F, 0x0000013F}, ++ {0x033, 0x00000003}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000004}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000005}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000006}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000007}, ++ {0x03F, 0x000000FB}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x0EF, 0x00000400}, ++ {0x033, 0x00000000}, ++ {0x03F, 0x000001FF}, ++ {0x033, 0x00000001}, ++ {0x03F, 0x000001FF}, ++ {0x033, 0x00000002}, ++ {0x03F, 0x0000013F}, ++ {0x033, 0x00000003}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000004}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000005}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000006}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000007}, ++ {0x03F, 0x000000FB}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x0EF, 0x00000400}, ++ {0x033, 0x00000000}, ++ {0x03F, 0x000001FF}, ++ {0x033, 0x00000001}, ++ {0x03F, 0x000001FF}, ++ {0x033, 0x00000002}, ++ {0x03F, 0x0000013F}, ++ {0x033, 0x00000003}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000004}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000005}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000006}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000007}, ++ {0x03F, 0x000000FB}, ++ {0xA0000000, 0x00000000}, ++ {0x0EF, 0x00000400}, ++ {0x033, 0x00000000}, ++ {0x03F, 0x000001FF}, ++ {0x033, 0x00000001}, ++ {0x03F, 0x000001FF}, ++ {0x033, 0x00000002}, ++ {0x03F, 0x000001F7}, ++ {0x033, 0x00000003}, ++ {0x03F, 0x000000FF}, ++ {0x033, 0x00000004}, ++ {0x03F, 0x000000FF}, ++ {0x033, 0x00000005}, ++ {0x03F, 0x000000FF}, ++ {0x033, 0x00000006}, ++ {0x03F, 0x000000FF}, ++ {0x033, 0x00000007}, ++ {0x03F, 0x000000FF}, ++ {0xB0000000, 0x00000000}, ++ {0x0EF, 0x00000200}, ++ {0x033, 0x00000000}, ++ {0x03F, 0x0000017F}, ++ {0x033, 0x00000001}, ++ {0x03F, 0x0000017F}, ++ {0x033, 0x00000002}, ++ {0x03F, 0x0000017F}, ++ {0x033, 0x00000003}, ++ {0x03F, 0x0000007F}, ++ {0x033, 0x00000004}, ++ {0x03F, 0x0000007F}, ++ {0x033, 0x00000005}, ++ {0x03F, 0x0000007F}, ++ {0x033, 0x00000006}, ++ {0x03F, 0x0000007F}, ++ {0x033, 0x00000007}, ++ {0x03F, 0x0000007F}, ++ {0x0EF, 0x00000000}, ++ {0x06E, 0x00077A18}, ++ {0x06F, 0x00077A18}, ++ {0x06D, 0x00000C31}, ++ {0x0EF, 0x00020000}, ++ {0x033, 0x00000000}, ++ {0x03F, 0x000005FF}, ++ {0x0EF, 0x00000000}, ++ {0x005, 0x00000001}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x094, 0x000000FC}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x094, 0x000000FC}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x094, 0x000000FC}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x094, 0x000000FC}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x094, 0x000000FC}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x094, 0x000000FC}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x094, 0x000000FC}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x094, 0x000000FC}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x094, 0x000000FC}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x094, 0x000000FC}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x094, 0x000000FC}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x094, 0x000000FC}, ++ {0xA0000000, 0x00000000}, ++ {0x094, 0x000001FC}, ++ {0xB0000000, 0x00000000}, ++ {0x100EE, 0x00002000}, ++ {0x10033, 0x00000080}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000F6}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x00000081}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000F3}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x00000082}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000F0}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x00000083}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000ED}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x00000084}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000EA}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x00000085}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000E7}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x00000086}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000A6}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x00000087}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000A3}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x00000088}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000063}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x00000089}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000060}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x0000008A}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000026}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x0000008B}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000023}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x0000008C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000020}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x0000008D}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x0000001D}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x0000008E}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x0000001A}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x0000008F}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000017}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x00000090}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000014}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000A0}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000F6}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000A1}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000F3}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000A2}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000F0}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000A3}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000ED}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000A4}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000EA}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000A5}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000E7}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000A6}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000A6}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000A7}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000A3}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000A8}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000063}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000A9}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000060}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000AA}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000026}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000AB}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000023}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000AC}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000020}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000AD}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x0000001D}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000AE}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x0000001A}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000AF}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000017}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000B0}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000014}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000C0}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000F6}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000C1}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000F3}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000C2}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000F0}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000C3}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000ED}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000C4}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000EA}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000C5}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000E7}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000C6}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000A6}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000C7}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000A3}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000C8}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000063}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000C9}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000060}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000CA}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000026}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000CB}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000023}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000CC}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000020}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000CD}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x0000001D}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000CE}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x0000001A}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000CF}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000017}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000D0}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000014}, ++ {0xB0000000, 0x00000000}, ++ {0x100EE, 0x00000000}, ++ {0x100EE, 0x00004000}, ++ {0x10033, 0x00000080}, ++ {0x1003F, 0x000001A9}, ++ {0x10033, 0x00000081}, ++ {0x1003F, 0x000001A3}, ++ {0x10033, 0x00000082}, ++ {0x1003F, 0x0000019D}, ++ {0x10033, 0x00000083}, ++ {0x1003F, 0x00000197}, ++ {0x10033, 0x00000084}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000191}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x00000085}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x0000018B}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x00000086}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x0000014D}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x00000087}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x0000010B}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x00000088}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x00000089}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x0000008A}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000D3}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x0000008B}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x0000008C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000093}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x0000008D}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x0000008E}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000053}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x0000008F}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x00000090}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x00000091}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000A0}, ++ {0x1003F, 0x000001A9}, ++ {0x10033, 0x000000A1}, ++ {0x1003F, 0x000001A3}, ++ {0x10033, 0x000000A2}, ++ {0x1003F, 0x0000019D}, ++ {0x10033, 0x000000A3}, ++ {0x1003F, 0x00000197}, ++ {0x10033, 0x000000A4}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000191}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000A5}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x0000018B}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000A6}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x0000014D}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000A7}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x0000010B}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000A8}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000A9}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000AA}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000D3}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000AB}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000AC}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000093}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000AD}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000AE}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000053}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000AF}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000B0}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000B1}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000C0}, ++ {0x1003F, 0x000001A9}, ++ {0x10033, 0x000000C1}, ++ {0x1003F, 0x000001A3}, ++ {0x10033, 0x000000C2}, ++ {0x1003F, 0x0000019D}, ++ {0x10033, 0x000000C3}, ++ {0x1003F, 0x00000197}, ++ {0x10033, 0x000000C4}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000191}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000C5}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x0000018B}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000C6}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x0000014D}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000C7}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x0000010B}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000C8}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000C9}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000CA}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000D3}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000CB}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000CC}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000093}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000CD}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000CE}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000053}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000CF}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000D0}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000D1}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0xB0000000, 0x00000000}, ++ {0x100EE, 0x00000000}, ++ {0x100EE, 0x00002000}, ++ {0x10033, 0x00000000}, ++ {0x1003F, 0x000000F6}, ++ {0x10033, 0x00000001}, ++ {0x1003F, 0x000000F3}, ++ {0x10033, 0x00000002}, ++ {0x1003F, 0x000000F0}, ++ {0x10033, 0x00000003}, ++ {0x1003F, 0x000000ED}, ++ {0x10033, 0x00000004}, ++ {0x1003F, 0x000000EA}, ++ {0x10033, 0x00000005}, ++ {0x1003F, 0x000000E7}, ++ {0x10033, 0x00000006}, ++ {0x1003F, 0x000000A6}, ++ {0x10033, 0x00000007}, ++ {0x1003F, 0x000000A3}, ++ {0x10033, 0x00000008}, ++ {0x1003F, 0x00000063}, ++ {0x10033, 0x00000009}, ++ {0x1003F, 0x00000060}, ++ {0x10033, 0x0000000A}, ++ {0x1003F, 0x00000023}, ++ {0x10033, 0x0000000B}, ++ {0x1003F, 0x00000020}, ++ {0x10033, 0x0000000C}, ++ {0x1003F, 0x0000001D}, ++ {0x10033, 0x0000000D}, ++ {0x1003F, 0x0000001A}, ++ {0x10033, 0x0000000E}, ++ {0x1003F, 0x00000017}, ++ {0x10033, 0x0000000F}, ++ {0x1003F, 0x00000014}, ++ {0x10033, 0x00000010}, ++ {0x1003F, 0x00000011}, ++ {0x100EE, 0x00000000}, ++ {0x100EE, 0x00004000}, ++ {0x10033, 0x00000000}, ++ {0x1003F, 0x000001AF}, ++ {0x10033, 0x00000001}, ++ {0x1003F, 0x000001A9}, ++ {0x10033, 0x00000002}, ++ {0x1003F, 0x000001A3}, ++ {0x10033, 0x00000003}, ++ {0x1003F, 0x0000019D}, ++ {0x10033, 0x00000004}, ++ {0x1003F, 0x00000197}, ++ {0x10033, 0x00000005}, ++ {0x1003F, 0x0000015F}, ++ {0x10033, 0x00000006}, ++ {0x1003F, 0x00000159}, ++ {0x10033, 0x00000007}, ++ {0x1003F, 0x0000011F}, ++ {0x10033, 0x00000008}, ++ {0x1003F, 0x00000119}, ++ {0x10033, 0x00000009}, ++ {0x1003F, 0x000000DF}, ++ {0x10033, 0x0000000A}, ++ {0x1003F, 0x000000D9}, ++ {0x10033, 0x0000000B}, ++ {0x1003F, 0x0000009F}, ++ {0x10033, 0x0000000C}, ++ {0x1003F, 0x00000099}, ++ {0x10033, 0x0000000D}, ++ {0x1003F, 0x0000005F}, ++ {0x10033, 0x0000000E}, ++ {0x1003F, 0x00000059}, ++ {0x10033, 0x0000000F}, ++ {0x1003F, 0x0000001F}, ++ {0x10033, 0x00000010}, ++ {0x1003F, 0x00000019}, ++ {0x10033, 0x00000011}, ++ {0x1003F, 0x00000013}, ++ {0x100EE, 0x00000000}, ++ {0x10005, 0x00000001}, ++ {0x09F, 0x00000032}, ++}; ++ ++static const struct rtw89_reg2_def rtw89_8852b_phy_radiob_regs[] = { ++ {0xF0010000, 0x00000000}, ++ {0xF0020000, 0x00000001}, ++ {0xF0010001, 0x00000002}, ++ {0xF0020001, 0x00000003}, ++ {0xF0030001, 0x00000004}, ++ {0xF0040001, 0x00000005}, ++ {0xF0050001, 0x00000006}, ++ {0xF0060001, 0x00000007}, ++ {0xF0070001, 0x00000008}, ++ {0xF0080001, 0x00000009}, ++ {0xF0290001, 0x0000000A}, ++ {0xF02B0001, 0x0000000B}, ++ {0x005, 0x00000000}, ++ {0x000, 0x00030000}, ++ {0x10000, 0x00030000}, ++ {0x018, 0x00011124}, ++ {0x10018, 0x00011124}, ++ {0x000, 0x00033C00}, ++ {0x10000, 0x00033C00}, ++ {0x01A, 0x00040004}, ++ {0x011, 0x00014073}, ++ {0x067, 0x00000070}, ++ {0x059, 0x000A0000}, ++ {0x066, 0x00000100}, ++ {0x05A, 0x0007F000}, ++ {0x0A4, 0x0006FF12}, ++ {0x043, 0x00005000}, ++ {0x0E1, 0x00000001}, ++ {0x0DD, 0x000001A0}, ++ {0x0CA, 0x00002000}, ++ {0x0D3, 0x00000003}, ++ {0x0B3, 0x0004EFE0}, ++ {0x0B4, 0x0007C03E}, ++ {0x0B5, 0x0003A201}, ++ {0x0BB, 0x000C7000}, ++ {0x0ED, 0x00002000}, ++ {0x033, 0x00000002}, ++ {0x03D, 0x0004A883}, ++ {0x03E, 0x00000000}, ++ {0x03F, 0x00000001}, ++ {0x033, 0x00000006}, ++ {0x03D, 0x0004A883}, ++ {0x03E, 0x00000000}, ++ {0x03F, 0x00000001}, ++ {0x0ED, 0x00000000}, ++ {0x018, 0x00001001}, ++ {0x10018, 0x00001001}, ++ {0x002, 0x0000000D}, ++ {0x10002, 0x0000000D}, ++ {0x0EE, 0x00000004}, ++ {0x033, 0x0000000B}, ++ {0x03F, 0x0000000B}, ++ {0x033, 0x0000000C}, ++ {0x03F, 0x00000012}, ++ {0x033, 0x0000000D}, ++ {0x03F, 0x00000019}, ++ {0x0EE, 0x00000000}, ++ {0x08F, 0x000D0F7A}, ++ {0x0EF, 0x00080000}, ++ {0x033, 0x00000008}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03E, 0x00000031}, ++ {0x03F, 0x00000D30}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03E, 0x00000031}, ++ {0x03F, 0x00000D30}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03E, 0x00000031}, ++ {0x03F, 0x00000D30}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03E, 0x00000031}, ++ {0x03F, 0x00000D30}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03E, 0x00000031}, ++ {0x03F, 0x00000D30}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03E, 0x00000031}, ++ {0x03F, 0x00000D30}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03E, 0x00000031}, ++ {0x03F, 0x00000D30}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03E, 0x00000031}, ++ {0x03F, 0x00000D30}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03E, 0x00000031}, ++ {0x03F, 0x00000D30}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03E, 0x00000031}, ++ {0x03F, 0x00000D30}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03E, 0x00000031}, ++ {0x03F, 0x00000D30}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03E, 0x00000031}, ++ {0x03F, 0x00000D30}, ++ {0xA0000000, 0x00000000}, ++ {0x03E, 0x000000C4}, ++ {0x03F, 0x000034C0}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000000A}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03E, 0x00000031}, ++ {0x03F, 0x00000D74}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03E, 0x00000031}, ++ {0x03F, 0x00000D74}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03E, 0x00000031}, ++ {0x03F, 0x00000D74}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03E, 0x00000031}, ++ {0x03F, 0x00000D74}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03E, 0x00000031}, ++ {0x03F, 0x00000D74}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03E, 0x00000031}, ++ {0x03F, 0x00000D74}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03E, 0x00000031}, ++ {0x03F, 0x00000D74}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03E, 0x00000031}, ++ {0x03F, 0x00000D74}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03E, 0x00000031}, ++ {0x03F, 0x00000D74}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03E, 0x00000031}, ++ {0x03F, 0x00000D74}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03E, 0x00000031}, ++ {0x03F, 0x00000D74}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03E, 0x00000031}, ++ {0x03F, 0x00000D74}, ++ {0xA0000000, 0x00000000}, ++ {0x03E, 0x000000C4}, ++ {0x03F, 0x000035D0}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000000B}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03E, 0x00000031}, ++ {0x03F, 0x00000D72}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03E, 0x00000031}, ++ {0x03F, 0x00000D72}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03E, 0x00000031}, ++ {0x03F, 0x00000D72}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03E, 0x00000031}, ++ {0x03F, 0x00000D72}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03E, 0x00000031}, ++ {0x03F, 0x00000D72}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03E, 0x00000031}, ++ {0x03F, 0x00000D72}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03E, 0x00000031}, ++ {0x03F, 0x00000D72}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03E, 0x00000031}, ++ {0x03F, 0x00000D72}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03E, 0x00000031}, ++ {0x03F, 0x00000D72}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03E, 0x00000031}, ++ {0x03F, 0x00000D72}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03E, 0x00000031}, ++ {0x03F, 0x00000D72}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03E, 0x00000031}, ++ {0x03F, 0x00000D72}, ++ {0xA0000000, 0x00000000}, ++ {0x03E, 0x000000C4}, ++ {0x03F, 0x000035C8}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000008A}, ++ {0x03E, 0x00000031}, ++ {0x03F, 0x00000D7D}, ++ {0x0EF, 0x00000000}, ++ {0x08D, 0x000CC800}, ++ {0x0EF, 0x00004000}, ++ {0x033, 0x00000007}, ++ {0x03F, 0x00000700}, ++ {0x033, 0x00000006}, ++ {0x03F, 0x00000700}, ++ {0x033, 0x00000005}, ++ {0x03F, 0x00090600}, ++ {0x033, 0x00000004}, ++ {0x03F, 0x000A3500}, ++ {0x033, 0x00000003}, ++ {0x03F, 0x000A3400}, ++ {0x033, 0x00000002}, ++ {0x03F, 0x00008B00}, ++ {0x033, 0x00000001}, ++ {0x03F, 0x00001B00}, ++ {0x033, 0x00000000}, ++ {0x03F, 0x00003A00}, ++ {0x033, 0x0000000F}, ++ {0x03F, 0x00000700}, ++ {0x033, 0x0000000E}, ++ {0x03F, 0x00000700}, ++ {0x033, 0x0000000D}, ++ {0x03F, 0x00090600}, ++ {0x033, 0x0000000C}, ++ {0x03F, 0x000A3500}, ++ {0x033, 0x0000000B}, ++ {0x03F, 0x000A3400}, ++ {0x033, 0x0000000A}, ++ {0x03F, 0x00008B00}, ++ {0x033, 0x00000009}, ++ {0x03F, 0x00001B00}, ++ {0x033, 0x00000008}, ++ {0x03F, 0x00003A00}, ++ {0x033, 0x00000017}, ++ {0x03F, 0x00000705}, ++ {0x033, 0x00000016}, ++ {0x03F, 0x00000705}, ++ {0x033, 0x00000015}, ++ {0x03F, 0x00090605}, ++ {0x033, 0x00000014}, ++ {0x03F, 0x000A3505}, ++ {0x033, 0x00000013}, ++ {0x03F, 0x000A3405}, ++ {0x033, 0x00000012}, ++ {0x03F, 0x00008B05}, ++ {0x033, 0x00000011}, ++ {0x03F, 0x00001B05}, ++ {0x033, 0x00000010}, ++ {0x03F, 0x00003A05}, ++ {0x0EF, 0x00000000}, ++ {0x0EE, 0x00000010}, ++ {0x033, 0x00000006}, ++ {0x03F, 0x00000003}, ++ {0x033, 0x00000007}, ++ {0x03F, 0x00000003}, ++ {0x033, 0x00000008}, ++ {0x03F, 0x00000001}, ++ {0x0EE, 0x00000000}, ++ {0x0EF, 0x00001000}, ++ {0x033, 0x00000000}, ++ {0x03F, 0x00000015}, ++ {0x033, 0x00000001}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000005}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000005}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000017}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000017}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000017}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000017}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000017}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000017}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000017}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000017}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000017}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000017}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00000005}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000002}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000017}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000017}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000015}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000015}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000015}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000015}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000015}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000015}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000015}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000015}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000015}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000015}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00000017}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000003}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000007}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000007}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000005}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000005}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000005}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000005}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000005}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000005}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000005}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000005}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000005}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000005}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00000007}, ++ {0xB0000000, 0x00000000}, ++ {0x0EF, 0x00000000}, ++ {0x0EF, 0x00008000}, ++ {0x033, 0x00000000}, ++ {0x03E, 0x00004FC0}, ++ {0x03F, 0x00000087}, ++ {0x033, 0x00000001}, ++ {0x03E, 0x000046C0}, ++ {0x03F, 0x00000087}, ++ {0x033, 0x00000002}, ++ {0x03E, 0x00004240}, ++ {0x03F, 0x00000087}, ++ {0x033, 0x00000003}, ++ {0x03E, 0x00008010}, ++ {0x03F, 0x00000147}, ++ {0x033, 0x00000004}, ++ {0x03E, 0x0000A048}, ++ {0x03F, 0x0000004F}, ++ {0x033, 0x00000005}, ++ {0x03E, 0x0000A030}, ++ {0x03F, 0x0000005F}, ++ {0x033, 0x00000006}, ++ {0x03E, 0x0000A000}, ++ {0x03F, 0x0000009F}, ++ {0x033, 0x00000008}, ++ {0x03E, 0x00004FC0}, ++ {0x03F, 0x00000087}, ++ {0x033, 0x00000009}, ++ {0x03E, 0x000046C0}, ++ {0x03F, 0x00000087}, ++ {0x033, 0x0000000A}, ++ {0x03E, 0x00004240}, ++ {0x03F, 0x00000087}, ++ {0x033, 0x0000000B}, ++ {0x03E, 0x00008010}, ++ {0x03F, 0x00000147}, ++ {0x033, 0x0000000C}, ++ {0x03E, 0x0000A048}, ++ {0x03F, 0x0000004F}, ++ {0x033, 0x0000000D}, ++ {0x03E, 0x0000A030}, ++ {0x03F, 0x0000005F}, ++ {0x033, 0x0000000E}, ++ {0x03E, 0x0000A000}, ++ {0x03F, 0x0000009F}, ++ {0x033, 0x00000010}, ++ {0x03E, 0x00004FC0}, ++ {0x03F, 0x00000087}, ++ {0x033, 0x00000011}, ++ {0x03E, 0x000046C0}, ++ {0x03F, 0x00000087}, ++ {0x033, 0x00000012}, ++ {0x03E, 0x00004240}, ++ {0x03F, 0x00000087}, ++ {0x033, 0x00000013}, ++ {0x03E, 0x00008010}, ++ {0x03F, 0x00000147}, ++ {0x033, 0x00000014}, ++ {0x03E, 0x0000A048}, ++ {0x03F, 0x0000004F}, ++ {0x033, 0x00000015}, ++ {0x03E, 0x0000A030}, ++ {0x03F, 0x0000005F}, ++ {0x033, 0x00000016}, ++ {0x03E, 0x0000A000}, ++ {0x03F, 0x0000009F}, ++ {0x033, 0x00000020}, ++ {0x03E, 0x00004FC0}, ++ {0x03F, 0x00000087}, ++ {0x033, 0x00000021}, ++ {0x03E, 0x000046C0}, ++ {0x03F, 0x00000087}, ++ {0x033, 0x00000022}, ++ {0x03E, 0x00004240}, ++ {0x03F, 0x00000087}, ++ {0x033, 0x00000023}, ++ {0x03E, 0x00008010}, ++ {0x03F, 0x00000147}, ++ {0x033, 0x00000024}, ++ {0x03E, 0x0000A048}, ++ {0x03F, 0x0000004F}, ++ {0x033, 0x00000025}, ++ {0x03E, 0x0000A030}, ++ {0x03F, 0x0000005F}, ++ {0x033, 0x00000026}, ++ {0x03E, 0x0000A000}, ++ {0x03F, 0x0000009F}, ++ {0x033, 0x00000028}, ++ {0x03E, 0x00004FC0}, ++ {0x03F, 0x00000087}, ++ {0x033, 0x00000029}, ++ {0x03E, 0x000046C0}, ++ {0x03F, 0x00000087}, ++ {0x033, 0x0000002A}, ++ {0x03E, 0x00004240}, ++ {0x03F, 0x00000087}, ++ {0x033, 0x0000002B}, ++ {0x03E, 0x00008010}, ++ {0x03F, 0x00000147}, ++ {0x033, 0x0000002C}, ++ {0x03E, 0x0000A048}, ++ {0x03F, 0x0000004F}, ++ {0x033, 0x0000002D}, ++ {0x03E, 0x0000A030}, ++ {0x03F, 0x0000005F}, ++ {0x033, 0x0000002E}, ++ {0x03E, 0x0000A000}, ++ {0x03F, 0x0000009F}, ++ {0x033, 0x00000030}, ++ {0x03E, 0x00004FC0}, ++ {0x03F, 0x00000087}, ++ {0x033, 0x00000031}, ++ {0x03E, 0x000046C0}, ++ {0x03F, 0x00000087}, ++ {0x033, 0x00000032}, ++ {0x03E, 0x00004240}, ++ {0x03F, 0x00000087}, ++ {0x033, 0x00000033}, ++ {0x03E, 0x00008010}, ++ {0x03F, 0x00000147}, ++ {0x033, 0x00000034}, ++ {0x03E, 0x0000A048}, ++ {0x03F, 0x0000004F}, ++ {0x033, 0x00000035}, ++ {0x03E, 0x0000A030}, ++ {0x03F, 0x0000005F}, ++ {0x033, 0x00000036}, ++ {0x03E, 0x0000A000}, ++ {0x03F, 0x0000009F}, ++ {0x0EF, 0x00000000}, ++ {0x0EF, 0x00000100}, ++ {0x033, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x033, 0x00000001}, ++ {0x03F, 0x00004346}, ++ {0x033, 0x00000002}, ++ {0x03F, 0x00004346}, ++ {0x033, 0x00000003}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000004}, ++ {0x03F, 0x00004346}, ++ {0x033, 0x00000005}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004317}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004317}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004317}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004317}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004317}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004317}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004317}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004317}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004317}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004317}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000006}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000007}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000008}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000009}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004376}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000000A}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000000B}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000000D}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x000043A6}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000000E}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004366}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004366}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00004366}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000000F}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004366}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004366}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00004366}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000010}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004366}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004366}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00004366}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000011}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004366}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004366}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00004366}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000012}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004366}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004366}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00004366}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000013}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004366}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004366}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00004366}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000014}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004366}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004366}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00004366}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000015}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004366}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004366}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00004366}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000016}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004366}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004366}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00004366}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000017}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004366}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004366}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00004366}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000020}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004366}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004366}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00004366}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000021}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004366}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004366}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004347}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00004366}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000022}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004366}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004366}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00004346}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00004366}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000023}, ++ {0x03F, 0x00004386}, ++ {0x033, 0x00000024}, ++ {0x03F, 0x00004386}, ++ {0x033, 0x00000025}, ++ {0x03F, 0x00004386}, ++ {0x033, 0x00000026}, ++ {0x03F, 0x00004386}, ++ {0x033, 0x00000027}, ++ {0x03F, 0x00004386}, ++ {0x0EF, 0x00000000}, ++ {0x067, 0x00008072}, ++ {0x0EF, 0x00000010}, ++ {0x033, 0x00000001}, ++ {0x03F, 0x00000ED5}, ++ {0x033, 0x00000002}, ++ {0x03F, 0x00000FC5}, ++ {0x033, 0x00000003}, ++ {0x03F, 0x00000A93}, ++ {0x033, 0x00000004}, ++ {0x03F, 0x00000973}, ++ {0x033, 0x00000005}, ++ {0x03F, 0x00000761}, ++ {0x033, 0x00000006}, ++ {0x03F, 0x00000761}, ++ {0x0EF, 0x00000000}, ++ {0x0EF, 0x00000080}, ++ {0x033, 0x00000000}, ++ {0x03E, 0x0000000B}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026558}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026558}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026558}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000001}, ++ {0x03E, 0x0000000B}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026558}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026558}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026558}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000002}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000003}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000004}, ++ {0x03E, 0x0000000B}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026558}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026558}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026558}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000005}, ++ {0x03E, 0x0000000B}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026558}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026558}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026558}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000006}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000007}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000008}, ++ {0x03E, 0x0000000B}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026558}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026558}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026558}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000009}, ++ {0x03E, 0x0000000B}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026558}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026558}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026558}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000000A}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000000B}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000000C}, ++ {0x03E, 0x0000000B}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026558}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026558}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026558}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000000D}, ++ {0x03E, 0x0000000B}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026558}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026558}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026558}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000000E}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000000F}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000010}, ++ {0x03E, 0x0000000B}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026558}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026558}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026558}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000011}, ++ {0x03E, 0x0000000B}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026558}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026558}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022758}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026558}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000012}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000013}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020758}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000014}, ++ {0x03E, 0x0000000B}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026558}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026558}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026558}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000015}, ++ {0x03E, 0x0000000B}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026558}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026558}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026558}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000016}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000017}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000018}, ++ {0x03E, 0x0000000B}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026458}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026458}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026458}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000019}, ++ {0x03E, 0x0000000B}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026458}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026458}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026458}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000001A}, ++ {0x03E, 0x0000000B}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000001B}, ++ {0x03E, 0x0000000B}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000001C}, ++ {0x03E, 0x0000000B}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026458}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026458}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026458}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000001D}, ++ {0x03E, 0x0000000B}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026458}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026458}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026458}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000001E}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000001F}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000020}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026458}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026458}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026458}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000021}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026458}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026458}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026458}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000022}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000023}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000024}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026458}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026458}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026458}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000025}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026458}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026458}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026458}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000026}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000027}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000028}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026458}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026458}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026458}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000029}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026458}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026458}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026458}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000002A}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000002B}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000002C}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026458}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026458}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026458}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000002D}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026458}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026458}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026458}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000002E}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000002F}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000030}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026458}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026458}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026458}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000031}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026458}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026458}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026458}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000032}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000033}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000034}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026458}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026458}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026458}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000035}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026458}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026458}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026458}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000036}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000037}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000038}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026458}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026458}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026458}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000039}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026458}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00026458}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022658}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00026458}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000003A}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00022858}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000003B}, ++ {0x03E, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00020858}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00027558}, ++ {0xB0000000, 0x00000000}, ++ {0x0EF, 0x00000000}, ++ {0x0EE, 0x00000800}, ++ {0x033, 0x00000000}, ++ {0x03F, 0x00000001}, ++ {0x033, 0x00000001}, ++ {0x03F, 0x00000003}, ++ {0x033, 0x00000002}, ++ {0x03F, 0x00000005}, ++ {0x033, 0x00000003}, ++ {0x03F, 0x00000007}, ++ {0x033, 0x00000004}, ++ {0x03F, 0x00000001}, ++ {0x033, 0x00000005}, ++ {0x03F, 0x00000003}, ++ {0x033, 0x00000006}, ++ {0x03F, 0x00000006}, ++ {0x033, 0x00000007}, ++ {0x03F, 0x00000007}, ++ {0x0EE, 0x00000000}, ++ {0x0EE, 0x00001000}, ++ {0x033, 0x00000000}, ++ {0x03F, 0x00003000}, ++ {0x033, 0x00000001}, ++ {0x03F, 0x00003001}, ++ {0x033, 0x00000002}, ++ {0x03F, 0x00003003}, ++ {0x033, 0x00000003}, ++ {0x03F, 0x00003007}, ++ {0x033, 0x00000004}, ++ {0x03F, 0x0000300F}, ++ {0x033, 0x00000005}, ++ {0x03F, 0x0000310F}, ++ {0x033, 0x00000006}, ++ {0x03F, 0x0000330F}, ++ {0x033, 0x00000007}, ++ {0x03F, 0x0000330F}, ++ {0x033, 0x00000008}, ++ {0x03F, 0x00003000}, ++ {0x033, 0x00000009}, ++ {0x03F, 0x00003001}, ++ {0x033, 0x0000000A}, ++ {0x03F, 0x00003003}, ++ {0x033, 0x0000000B}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003007}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003007}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003007}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003007}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003007}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003007}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003007}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003007}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003007}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003007}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003007}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003007}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00003103}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000000C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003107}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003107}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003107}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003107}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003107}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003107}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003107}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003107}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003107}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003107}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003107}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003107}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00003307}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000000D}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003307}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003307}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003307}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003307}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003307}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003307}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003307}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003307}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003307}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003307}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003307}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00003307}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00002307}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000000E}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00001307}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00001307}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00001307}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00001307}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00001307}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00001307}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00001307}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00001307}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00001307}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00001307}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00001307}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00001307}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00000307}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x0000000F}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000307}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000307}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000307}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000307}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000307}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000307}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000307}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000307}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000307}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000307}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000307}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x03F, 0x00000307}, ++ {0xA0000000, 0x00000000}, ++ {0x03F, 0x00000307}, ++ {0xB0000000, 0x00000000}, ++ {0x0EE, 0x00000000}, ++ {0x0EE, 0x00000200}, ++ {0x033, 0x00000000}, ++ {0x03F, 0x00000001}, ++ {0x033, 0x00000001}, ++ {0x03F, 0x00000003}, ++ {0x033, 0x00000002}, ++ {0x03F, 0x00000005}, ++ {0x033, 0x00000003}, ++ {0x03F, 0x00000007}, ++ {0x0EE, 0x00000000}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x0EC, 0x00000100}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x0EC, 0x00000100}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x0EC, 0x00000000}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x0EC, 0x00000000}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x0EC, 0x00000000}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x0EC, 0x00000000}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x0EC, 0x00000000}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x0EC, 0x00000000}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x0EC, 0x00000000}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x0EC, 0x00000000}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x0EC, 0x00000000}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x0EC, 0x00000000}, ++ {0xA0000000, 0x00000000}, ++ {0x0EC, 0x00000100}, ++ {0xB0000000, 0x00000000}, ++ {0x033, 0x00000004}, ++ {0x03D, 0x00000078}, ++ {0x03E, 0x00080000}, ++ {0x03F, 0x00000000}, ++ {0x033, 0x00000005}, ++ {0x03D, 0x0000007B}, ++ {0x03E, 0x00020000}, ++ {0x03F, 0x00000000}, ++ {0x0EC, 0x00000000}, ++ {0x0DE, 0x00000000}, ++ {0x0EF, 0x00000000}, ++ {0x033, 0x00000000}, ++ {0x008, 0x00060280}, ++ {0x009, 0x00030400}, ++ {0x0EF, 0x00000000}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x0EF, 0x00000400}, ++ {0x033, 0x00000000}, ++ {0x03F, 0x000001FF}, ++ {0x033, 0x00000001}, ++ {0x03F, 0x000001FF}, ++ {0x033, 0x00000002}, ++ {0x03F, 0x000001F7}, ++ {0x033, 0x00000003}, ++ {0x03F, 0x000000FF}, ++ {0x033, 0x00000004}, ++ {0x03F, 0x000000FF}, ++ {0x033, 0x00000005}, ++ {0x03F, 0x000000FF}, ++ {0x033, 0x00000006}, ++ {0x03F, 0x000000FF}, ++ {0x033, 0x00000007}, ++ {0x03F, 0x000000FF}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x0EF, 0x00000400}, ++ {0x033, 0x00000000}, ++ {0x03F, 0x000001FF}, ++ {0x033, 0x00000001}, ++ {0x03F, 0x000001FF}, ++ {0x033, 0x00000002}, ++ {0x03F, 0x000001F7}, ++ {0x033, 0x00000003}, ++ {0x03F, 0x000000FF}, ++ {0x033, 0x00000004}, ++ {0x03F, 0x000000FF}, ++ {0x033, 0x00000005}, ++ {0x03F, 0x000000FF}, ++ {0x033, 0x00000006}, ++ {0x03F, 0x000000FF}, ++ {0x033, 0x00000007}, ++ {0x03F, 0x000000FF}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x0EF, 0x00000400}, ++ {0x033, 0x00000000}, ++ {0x03F, 0x000001FF}, ++ {0x033, 0x00000001}, ++ {0x03F, 0x000001FF}, ++ {0x033, 0x00000002}, ++ {0x03F, 0x0000013F}, ++ {0x033, 0x00000003}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000004}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000005}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000006}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000007}, ++ {0x03F, 0x000000FB}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x0EF, 0x00000400}, ++ {0x033, 0x00000000}, ++ {0x03F, 0x000001FF}, ++ {0x033, 0x00000001}, ++ {0x03F, 0x000001FF}, ++ {0x033, 0x00000002}, ++ {0x03F, 0x0000013F}, ++ {0x033, 0x00000003}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000004}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000005}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000006}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000007}, ++ {0x03F, 0x000000FB}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x0EF, 0x00000400}, ++ {0x033, 0x00000000}, ++ {0x03F, 0x000001FF}, ++ {0x033, 0x00000001}, ++ {0x03F, 0x000001FF}, ++ {0x033, 0x00000002}, ++ {0x03F, 0x0000013F}, ++ {0x033, 0x00000003}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000004}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000005}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000006}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000007}, ++ {0x03F, 0x000000FB}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x0EF, 0x00000400}, ++ {0x033, 0x00000000}, ++ {0x03F, 0x000001FF}, ++ {0x033, 0x00000001}, ++ {0x03F, 0x000001FF}, ++ {0x033, 0x00000002}, ++ {0x03F, 0x0000013F}, ++ {0x033, 0x00000003}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000004}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000005}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000006}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000007}, ++ {0x03F, 0x000000FB}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x0EF, 0x00000400}, ++ {0x033, 0x00000000}, ++ {0x03F, 0x000001FF}, ++ {0x033, 0x00000001}, ++ {0x03F, 0x000001FF}, ++ {0x033, 0x00000002}, ++ {0x03F, 0x0000013F}, ++ {0x033, 0x00000003}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000004}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000005}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000006}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000007}, ++ {0x03F, 0x000000FB}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x0EF, 0x00000400}, ++ {0x033, 0x00000000}, ++ {0x03F, 0x000001FF}, ++ {0x033, 0x00000001}, ++ {0x03F, 0x000001FF}, ++ {0x033, 0x00000002}, ++ {0x03F, 0x0000013F}, ++ {0x033, 0x00000003}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000004}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000005}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000006}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000007}, ++ {0x03F, 0x000000FB}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x0EF, 0x00000400}, ++ {0x033, 0x00000000}, ++ {0x03F, 0x000001FF}, ++ {0x033, 0x00000001}, ++ {0x03F, 0x000001FF}, ++ {0x033, 0x00000002}, ++ {0x03F, 0x0000013F}, ++ {0x033, 0x00000003}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000004}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000005}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000006}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000007}, ++ {0x03F, 0x000000FB}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x0EF, 0x00000400}, ++ {0x033, 0x00000000}, ++ {0x03F, 0x000001FF}, ++ {0x033, 0x00000001}, ++ {0x03F, 0x000001FF}, ++ {0x033, 0x00000002}, ++ {0x03F, 0x0000013F}, ++ {0x033, 0x00000003}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000004}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000005}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000006}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000007}, ++ {0x03F, 0x000000FB}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x0EF, 0x00000400}, ++ {0x033, 0x00000000}, ++ {0x03F, 0x000001FF}, ++ {0x033, 0x00000001}, ++ {0x03F, 0x000001FF}, ++ {0x033, 0x00000002}, ++ {0x03F, 0x0000013F}, ++ {0x033, 0x00000003}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000004}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000005}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000006}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000007}, ++ {0x03F, 0x000000FB}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x0EF, 0x00000400}, ++ {0x033, 0x00000000}, ++ {0x03F, 0x000001FF}, ++ {0x033, 0x00000001}, ++ {0x03F, 0x000001FF}, ++ {0x033, 0x00000002}, ++ {0x03F, 0x0000013F}, ++ {0x033, 0x00000003}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000004}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000005}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000006}, ++ {0x03F, 0x000000FB}, ++ {0x033, 0x00000007}, ++ {0x03F, 0x000000FB}, ++ {0xA0000000, 0x00000000}, ++ {0x0EF, 0x00000400}, ++ {0x033, 0x00000000}, ++ {0x03F, 0x000001FF}, ++ {0x033, 0x00000001}, ++ {0x03F, 0x000001FF}, ++ {0x033, 0x00000002}, ++ {0x03F, 0x000001F7}, ++ {0x033, 0x00000003}, ++ {0x03F, 0x000000FF}, ++ {0x033, 0x00000004}, ++ {0x03F, 0x000000FF}, ++ {0x033, 0x00000005}, ++ {0x03F, 0x000000FF}, ++ {0x033, 0x00000006}, ++ {0x03F, 0x000000FF}, ++ {0x033, 0x00000007}, ++ {0x03F, 0x000000FF}, ++ {0xB0000000, 0x00000000}, ++ {0x0EF, 0x00000200}, ++ {0x033, 0x00000000}, ++ {0x03F, 0x0000017F}, ++ {0x033, 0x00000001}, ++ {0x03F, 0x0000017F}, ++ {0x033, 0x00000002}, ++ {0x03F, 0x0000017F}, ++ {0x033, 0x00000003}, ++ {0x03F, 0x0000007F}, ++ {0x033, 0x00000004}, ++ {0x03F, 0x0000007F}, ++ {0x033, 0x00000005}, ++ {0x03F, 0x0000007F}, ++ {0x033, 0x00000006}, ++ {0x03F, 0x0000007F}, ++ {0x033, 0x00000007}, ++ {0x03F, 0x0000007F}, ++ {0x0EF, 0x00000000}, ++ {0x06E, 0x00077A18}, ++ {0x06F, 0x00077A18}, ++ {0x06D, 0x00000C31}, ++ {0x0EF, 0x00020000}, ++ {0x033, 0x00000000}, ++ {0x03F, 0x000005FF}, ++ {0x0EF, 0x00000000}, ++ {0x005, 0x00000001}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x094, 0x000000FC}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x094, 0x000000FC}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x094, 0x000000FC}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x094, 0x000000FC}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x094, 0x000000FC}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x094, 0x000000FC}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x094, 0x000000FC}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x094, 0x000000FC}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x094, 0x000000FC}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x094, 0x000000FC}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x094, 0x000000FC}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x094, 0x000000FC}, ++ {0xA0000000, 0x00000000}, ++ {0x094, 0x000001FC}, ++ {0xB0000000, 0x00000000}, ++ {0x100EE, 0x00002000}, ++ {0x10033, 0x00000080}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000F6}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x00000081}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000F3}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x00000082}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000F0}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x00000083}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000ED}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x00000084}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000EA}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x00000085}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000E7}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x00000086}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000A6}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x00000087}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000A3}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x00000088}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000063}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x00000089}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000060}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x0000008A}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000026}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x0000008B}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000023}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x0000008C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000020}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x0000008D}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x0000001D}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x0000008E}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x0000001A}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x0000008F}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000017}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x00000090}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000014}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000A0}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000F6}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000A1}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000F3}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000A2}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000F0}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000A3}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000ED}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000A4}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000EA}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000A5}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000E7}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000A6}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000A6}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000A7}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000A3}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000A8}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000063}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000A9}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000060}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000AA}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000026}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000AB}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000023}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000AC}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000020}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000AD}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x0000001D}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000AE}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x0000001A}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000AF}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000017}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000B0}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000014}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000C0}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000FB}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000F6}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000C1}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F8}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000F3}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000C2}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F5}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000F0}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000C3}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000F2}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000ED}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000C4}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EF}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000EA}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000C5}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000EC}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000E7}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000C6}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000AB}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000A6}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000C7}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000A8}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000A3}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000C8}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000068}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000063}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000C9}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000065}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000060}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000CA}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000002B}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000026}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000CB}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000028}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000023}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000CC}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000025}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000020}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000CD}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000022}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x0000001D}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000CE}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x0000001A}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000CF}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001C}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000017}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000D0}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000014}, ++ {0xB0000000, 0x00000000}, ++ {0x100EE, 0x00000000}, ++ {0x100EE, 0x00004000}, ++ {0x10033, 0x00000080}, ++ {0x1003F, 0x000001A9}, ++ {0x10033, 0x00000081}, ++ {0x1003F, 0x000001A3}, ++ {0x10033, 0x00000082}, ++ {0x1003F, 0x0000019D}, ++ {0x10033, 0x00000083}, ++ {0x1003F, 0x00000197}, ++ {0x10033, 0x00000084}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000191}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x00000085}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x0000018B}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x00000086}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x0000014D}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x00000087}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x0000010B}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x00000088}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x00000089}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x0000008A}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000D3}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x0000008B}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x0000008C}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000093}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x0000008D}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x0000008E}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000053}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x0000008F}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x00000090}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x00000091}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000A0}, ++ {0x1003F, 0x000001A9}, ++ {0x10033, 0x000000A1}, ++ {0x1003F, 0x000001A3}, ++ {0x10033, 0x000000A2}, ++ {0x1003F, 0x0000019D}, ++ {0x10033, 0x000000A3}, ++ {0x1003F, 0x00000197}, ++ {0x10033, 0x000000A4}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000191}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000A5}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x0000018B}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000A6}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x0000014D}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000A7}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x0000010B}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000A8}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000A9}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000AA}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000D3}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000AB}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000AC}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000093}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000AD}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000AE}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000053}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000AF}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000B0}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000B1}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000C0}, ++ {0x1003F, 0x000001A9}, ++ {0x10033, 0x000000C1}, ++ {0x1003F, 0x000001A3}, ++ {0x10033, 0x000000C2}, ++ {0x1003F, 0x0000019D}, ++ {0x10033, 0x000000C3}, ++ {0x1003F, 0x00000197}, ++ {0x10033, 0x000000C4}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000158}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000191}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000C5}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000011F}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x0000018B}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000C6}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000119}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x0000014D}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000C7}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x0000010B}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000C8}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000DF}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000C9}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000009F}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000D9}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000CA}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x000000D3}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000CB}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000005F}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000099}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000CC}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000093}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000CD}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000001F}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000059}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000CE}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000053}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000CF}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000019}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000D0}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x00000013}, ++ {0xB0000000, 0x00000000}, ++ {0x10033, 0x000000D1}, ++ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x1003F, 0x00000007}, ++ {0xA0000000, 0x00000000}, ++ {0x1003F, 0x0000000D}, ++ {0xB0000000, 0x00000000}, ++ {0x100EE, 0x00000000}, ++ {0x100EE, 0x00002000}, ++ {0x10033, 0x00000000}, ++ {0x1003F, 0x000000F6}, ++ {0x10033, 0x00000001}, ++ {0x1003F, 0x000000F3}, ++ {0x10033, 0x00000002}, ++ {0x1003F, 0x000000F0}, ++ {0x10033, 0x00000003}, ++ {0x1003F, 0x000000ED}, ++ {0x10033, 0x00000004}, ++ {0x1003F, 0x000000EA}, ++ {0x10033, 0x00000005}, ++ {0x1003F, 0x000000E7}, ++ {0x10033, 0x00000006}, ++ {0x1003F, 0x000000A6}, ++ {0x10033, 0x00000007}, ++ {0x1003F, 0x000000A3}, ++ {0x10033, 0x00000008}, ++ {0x1003F, 0x00000063}, ++ {0x10033, 0x00000009}, ++ {0x1003F, 0x00000060}, ++ {0x10033, 0x0000000A}, ++ {0x1003F, 0x00000023}, ++ {0x10033, 0x0000000B}, ++ {0x1003F, 0x00000020}, ++ {0x10033, 0x0000000C}, ++ {0x1003F, 0x0000001D}, ++ {0x10033, 0x0000000D}, ++ {0x1003F, 0x0000001A}, ++ {0x10033, 0x0000000E}, ++ {0x1003F, 0x00000017}, ++ {0x10033, 0x0000000F}, ++ {0x1003F, 0x00000014}, ++ {0x10033, 0x00000010}, ++ {0x1003F, 0x00000011}, ++ {0x100EE, 0x00000000}, ++ {0x100EE, 0x00004000}, ++ {0x10033, 0x00000000}, ++ {0x1003F, 0x000001AF}, ++ {0x10033, 0x00000001}, ++ {0x1003F, 0x000001A9}, ++ {0x10033, 0x00000002}, ++ {0x1003F, 0x000001A3}, ++ {0x10033, 0x00000003}, ++ {0x1003F, 0x0000019D}, ++ {0x10033, 0x00000004}, ++ {0x1003F, 0x00000197}, ++ {0x10033, 0x00000005}, ++ {0x1003F, 0x0000015F}, ++ {0x10033, 0x00000006}, ++ {0x1003F, 0x00000159}, ++ {0x10033, 0x00000007}, ++ {0x1003F, 0x0000011F}, ++ {0x10033, 0x00000008}, ++ {0x1003F, 0x00000119}, ++ {0x10033, 0x00000009}, ++ {0x1003F, 0x000000DF}, ++ {0x10033, 0x0000000A}, ++ {0x1003F, 0x000000D9}, ++ {0x10033, 0x0000000B}, ++ {0x1003F, 0x0000009F}, ++ {0x10033, 0x0000000C}, ++ {0x1003F, 0x00000099}, ++ {0x10033, 0x0000000D}, ++ {0x1003F, 0x0000005F}, ++ {0x10033, 0x0000000E}, ++ {0x1003F, 0x00000059}, ++ {0x10033, 0x0000000F}, ++ {0x1003F, 0x0000001F}, ++ {0x10033, 0x00000010}, ++ {0x1003F, 0x00000019}, ++ {0x10033, 0x00000011}, ++ {0x1003F, 0x00000013}, ++ {0x100EE, 0x00000000}, ++ {0x10005, 0x00000001}, ++ {0x09F, 0x00000032}, ++}; ++ ++static const struct rtw89_reg2_def rtw89_8852b_phy_nctl_regs[] = { ++ {0x8000, 0x00000008}, ++ {0x8008, 0x00000000}, ++ {0x8004, 0xf0862966}, ++ {0x800c, 0x78000000}, ++ {0x8010, 0x88015000}, ++ {0x8014, 0x80010100}, ++ {0x8018, 0x10010100}, ++ {0x801c, 0xa210bc00}, ++ {0x8020, 0x000403e0}, ++ {0x8024, 0x00072160}, ++ {0x8028, 0x00180e00}, ++ {0x8030, 0x400000c0}, ++ {0x8034, 0x11000830}, ++ {0x8038, 0x00000009}, ++ {0x803c, 0x00000008}, ++ {0x8040, 0x00000046}, ++ {0x8044, 0x0010001f}, ++ {0x8048, 0xf0000003}, ++ {0x804c, 0x62ac6162}, ++ {0x8050, 0xf2acf162}, ++ {0x8054, 0x62ac6162}, ++ {0x8058, 0xf2acf162}, ++ {0x805c, 0x150c0b02}, ++ {0x8060, 0x150c0b02}, ++ {0x8064, 0x2aa00047}, ++ {0x8074, 0x80000000}, ++ {0x807c, 0x000000ee}, ++ {0x8088, 0x80000000}, ++ {0x8098, 0x0000ff00}, ++ {0x809c, 0x0000001f}, ++ {0x80a0, 0x00010300}, ++ {0x80b8, 0x00001000}, ++ {0x80b0, 0x00000000}, ++ {0x80d0, 0x00000000}, ++ {0x80ec, 0x00000002}, ++ {0x810c, 0x33112200}, ++ {0x8110, 0x33112200}, ++ {0x8114, 0x00000000}, ++ {0x8120, 0x10010000}, ++ {0x8124, 0x00000000}, ++ {0x812c, 0x0000c000}, ++ {0x8138, 0x40000000}, ++ {0x813c, 0x40000000}, ++ {0x8140, 0x00000000}, ++ {0x8144, 0x0b040b03}, ++ {0x8148, 0x0a050b04}, ++ {0x814c, 0x0a050b04}, ++ {0x8150, 0xe4e40000}, ++ {0x8158, 0xffffffff}, ++ {0x815c, 0xffffffff}, ++ {0x8160, 0xffffffff}, ++ {0x8164, 0xffffffff}, ++ {0x8168, 0xffffffff}, ++ {0x816c, 0x1fffffff}, ++ {0x81a0, 0x00000000}, ++ {0x81ac, 0x003f2e2e}, ++ {0x81b0, 0x003f2e2e}, ++ {0x81bc, 0x005b5b5b}, ++ {0x81c0, 0x005b5b5b}, ++ {0x81b4, 0x00600060}, ++ {0x81b8, 0x00600060}, ++ {0x81cc, 0x00000000}, ++ {0x81dc, 0x00000002}, ++ {0x81e0, 0x00000000}, ++ {0x81e4, 0x00000001}, ++ {0x820c, 0x33112200}, ++ {0x8210, 0x33112200}, ++ {0x8214, 0x00000000}, ++ {0x8220, 0x10010000}, ++ {0x8224, 0x00000000}, ++ {0x822c, 0x0000d000}, ++ {0x8238, 0x40000000}, ++ {0x823c, 0x40000000}, ++ {0x8240, 0x00000000}, ++ {0x8244, 0x0b040b03}, ++ {0x8248, 0x0a050b04}, ++ {0x824c, 0x0a050b04}, ++ {0x8250, 0xe4e40000}, ++ {0x8258, 0xffffffff}, ++ {0x825c, 0xffffffff}, ++ {0x8260, 0xffffffff}, ++ {0x8264, 0xffffffff}, ++ {0x8268, 0xffffffff}, ++ {0x826c, 0x1fffffff}, ++ {0x82a0, 0x00000000}, ++ {0x82ac, 0x003f2e2e}, ++ {0x82b0, 0x003f2e2e}, ++ {0x82bc, 0x005b5b5b}, ++ {0x82c0, 0x005b5b5b}, ++ {0x82b4, 0x00600060}, ++ {0x82b8, 0x00600060}, ++ {0x82cc, 0x00000000}, ++ {0x82dc, 0x00000002}, ++ {0x82e0, 0x00100000}, ++ {0x82e4, 0x00000001}, ++ {0x81d8, 0x00000001}, ++ {0x82d8, 0x00000001}, ++ {0x8d00, 0x00000000}, ++ {0x8d04, 0x00000000}, ++ {0x8d08, 0x00000000}, ++ {0x8d0c, 0x00000000}, ++ {0x8d10, 0x00000000}, ++ {0x8d14, 0x00000000}, ++ {0x8d18, 0x00000000}, ++ {0x8d1c, 0x00000000}, ++ {0x8d20, 0x00000000}, ++ {0x8d24, 0x00000000}, ++ {0x8d28, 0x00000000}, ++ {0x8d2c, 0x00000000}, ++ {0x8d30, 0x00000000}, ++ {0x8d34, 0x00000000}, ++ {0x8d38, 0x00000000}, ++ {0x8d3c, 0x00000000}, ++ {0x8d40, 0x00000000}, ++ {0x8d44, 0x00000000}, ++ {0x8d48, 0x00000000}, ++ {0x8d4c, 0x00000000}, ++ {0x8d50, 0x00000000}, ++ {0x8d54, 0x00000000}, ++ {0x8d58, 0x00000000}, ++ {0x8d5c, 0x00000000}, ++ {0x8d60, 0x00000000}, ++ {0x8d64, 0x00000000}, ++ {0x8d68, 0x00000000}, ++ {0x8d6c, 0x00000000}, ++ {0x8d70, 0x00000000}, ++ {0x8d74, 0x00000000}, ++ {0x8d78, 0x00000000}, ++ {0x8d7c, 0x00000000}, ++ {0x8d80, 0x00000000}, ++ {0x8d84, 0x00000000}, ++ {0x8d88, 0x00000000}, ++ {0x8d8c, 0x00000000}, ++ {0x8d90, 0x00000000}, ++ {0x8d94, 0x00000000}, ++ {0x8d98, 0x00000000}, ++ {0x8d9c, 0x00000000}, ++ {0x8da0, 0x00000000}, ++ {0x8da4, 0x00000000}, ++ {0x8da8, 0x00000000}, ++ {0x8dac, 0x00000000}, ++ {0x8db0, 0x00000000}, ++ {0x8db4, 0x00000000}, ++ {0x8db8, 0x00000000}, ++ {0x8dbc, 0x00000000}, ++ {0x8dc0, 0x00000000}, ++ {0x8dc4, 0x00000000}, ++ {0x8dc8, 0x00000000}, ++ {0x8dcc, 0x00000000}, ++ {0x8dd0, 0x00000000}, ++ {0x8dd4, 0x00000000}, ++ {0x8dd8, 0x00000000}, ++ {0x8ddc, 0x00000000}, ++ {0x8de0, 0x00000000}, ++ {0x8de4, 0x00000000}, ++ {0x8de8, 0x00000000}, ++ {0x8dec, 0x00000000}, ++ {0x8df0, 0x00000000}, ++ {0x8df4, 0x00000000}, ++ {0x8df8, 0x00000000}, ++ {0x8dfc, 0x00000000}, ++ {0x8e00, 0x00000000}, ++ {0x8e04, 0x00000000}, ++ {0x8e08, 0x00000000}, ++ {0x8e0c, 0x00000000}, ++ {0x8e10, 0x00000000}, ++ {0x8e14, 0x00000000}, ++ {0x8e18, 0x00000000}, ++ {0x8e1c, 0x00000000}, ++ {0x8e20, 0x00000000}, ++ {0x8e24, 0x00000000}, ++ {0x8e28, 0x00000000}, ++ {0x8e2c, 0x00000000}, ++ {0x8e30, 0x00000000}, ++ {0x8e34, 0x00000000}, ++ {0x8e38, 0x00000000}, ++ {0x8e3c, 0x00000000}, ++ {0x8e40, 0x00000000}, ++ {0x8e44, 0x00000000}, ++ {0x8e48, 0x00000000}, ++ {0x8e4c, 0x00000000}, ++ {0x8e50, 0x00000000}, ++ {0x8e54, 0x00000000}, ++ {0x8e58, 0x00000000}, ++ {0x8e5c, 0x00000000}, ++ {0x8e60, 0x00000000}, ++ {0x8e64, 0x00000000}, ++ {0x8e68, 0x00000000}, ++ {0x8e6c, 0x00000000}, ++ {0x8e70, 0x00000000}, ++ {0x8e74, 0x00000000}, ++ {0x8e78, 0x00000000}, ++ {0x8e7c, 0x00000000}, ++ {0x8e80, 0x00000000}, ++ {0x8e84, 0x00000000}, ++ {0x8e88, 0x00000000}, ++ {0x8e8c, 0x00000000}, ++ {0x8e90, 0x00000000}, ++ {0x8e94, 0x00000000}, ++ {0x8e98, 0x00000000}, ++ {0x8e9c, 0x00000000}, ++ {0x8ea0, 0x00000000}, ++ {0x8ea4, 0x00000000}, ++ {0x8ea8, 0x00000000}, ++ {0x8eac, 0x00000000}, ++ {0x8eb0, 0x00000000}, ++ {0x8eb4, 0x00000000}, ++ {0x8eb8, 0x00000000}, ++ {0x8ebc, 0x00000000}, ++ {0x8ec0, 0x00000000}, ++ {0x8ec4, 0x00000000}, ++ {0x8ec8, 0x00000000}, ++ {0x8ecc, 0x00000000}, ++ {0x8ed0, 0x00000000}, ++ {0x8ed4, 0x00000000}, ++ {0x8ed8, 0x00000000}, ++ {0x8edc, 0x00000000}, ++ {0x8ee0, 0x00000000}, ++ {0x8ee4, 0x00000000}, ++ {0x8ee8, 0x00000000}, ++ {0x8eec, 0x00000000}, ++ {0x8ef0, 0x00000000}, ++ {0x8ef4, 0x00000000}, ++ {0x8ef8, 0x00000000}, ++ {0x8efc, 0x00000000}, ++ {0x8f00, 0x00000000}, ++ {0x8f04, 0x00000000}, ++ {0x8f08, 0x00000000}, ++ {0x8f0c, 0x00000000}, ++ {0x8f10, 0x00000000}, ++ {0x8f14, 0x00000000}, ++ {0x8f18, 0x00000000}, ++ {0x8f1c, 0x00000000}, ++ {0x8f20, 0x00000000}, ++ {0x8f24, 0x00000000}, ++ {0x8f28, 0x00000000}, ++ {0x8f2c, 0x00000000}, ++ {0x8f30, 0x00000000}, ++ {0x8f34, 0x00000000}, ++ {0x8f38, 0x00000000}, ++ {0x8f3c, 0x00000000}, ++ {0x8f40, 0x00000000}, ++ {0x8f44, 0x00000000}, ++ {0x8f48, 0x00000000}, ++ {0x8f4c, 0x00000000}, ++ {0x8f50, 0x00000000}, ++ {0x8f54, 0x00000000}, ++ {0x8f58, 0x00000000}, ++ {0x8f5c, 0x00000000}, ++ {0x8f60, 0x00000000}, ++ {0x8f64, 0x00000000}, ++ {0x8f68, 0x00000000}, ++ {0x8f6c, 0x00000000}, ++ {0x8f70, 0x00000000}, ++ {0x8f74, 0x00000000}, ++ {0x8f78, 0x00000000}, ++ {0x8f7c, 0x00000000}, ++ {0x8f80, 0x00000000}, ++ {0x8f84, 0x00000000}, ++ {0x8f88, 0x00000000}, ++ {0x8f8c, 0x00000000}, ++ {0x8f90, 0x00000000}, ++ {0x8f94, 0x00000000}, ++ {0x8f98, 0x00000000}, ++ {0x8f9c, 0x00000000}, ++ {0x8fa0, 0x00000000}, ++ {0x8fa4, 0x00000000}, ++ {0x8fa8, 0x00000000}, ++ {0x8fac, 0x00000000}, ++ {0x8fb0, 0x00000000}, ++ {0x8fb4, 0x00000000}, ++ {0x8fb8, 0x00000000}, ++ {0x8fbc, 0x00000000}, ++ {0x8fc0, 0x00000000}, ++ {0x8fc4, 0x00000000}, ++ {0x8fc8, 0x00000000}, ++ {0x8fcc, 0x00000000}, ++ {0x8fd0, 0x00000000}, ++ {0x8fd4, 0x00000000}, ++ {0x8fd8, 0x00000000}, ++ {0x8fdc, 0x00000000}, ++ {0x8fe0, 0x00000000}, ++ {0x8fe4, 0x00000000}, ++ {0x8fe8, 0x00000000}, ++ {0x8fec, 0x00000000}, ++ {0x8ff0, 0x00000000}, ++ {0x8ff4, 0x00000000}, ++ {0x8ff8, 0x00000000}, ++ {0x8ffc, 0x00000000}, ++ {0x9000, 0x00000000}, ++ {0x9004, 0x00000000}, ++ {0x9008, 0x00000000}, ++ {0x900c, 0x00000000}, ++ {0x9010, 0x00000000}, ++ {0x9014, 0x00000000}, ++ {0x9018, 0x00000000}, ++ {0x901c, 0x00000000}, ++ {0x9020, 0x00000000}, ++ {0x9024, 0x00000000}, ++ {0x9028, 0x00000000}, ++ {0x902c, 0x00000000}, ++ {0x9030, 0x00000000}, ++ {0x9034, 0x00000000}, ++ {0x9038, 0x00000000}, ++ {0x903c, 0x00000000}, ++ {0x9040, 0x00000000}, ++ {0x9044, 0x00000000}, ++ {0x9048, 0x00000000}, ++ {0x904c, 0x00000000}, ++ {0x9050, 0x00000000}, ++ {0x9054, 0x00000000}, ++ {0x9058, 0x00000000}, ++ {0x905c, 0x00000000}, ++ {0x9060, 0x00000000}, ++ {0x9064, 0x00000000}, ++ {0x9068, 0x00000000}, ++ {0x906c, 0x00000000}, ++ {0x9070, 0x00000000}, ++ {0x9074, 0x00000000}, ++ {0x9078, 0x00000000}, ++ {0x907c, 0x00000000}, ++ {0x9080, 0x00000000}, ++ {0x9084, 0x00000000}, ++ {0x9088, 0x00000000}, ++ {0x908c, 0x00000000}, ++ {0x9090, 0x00000000}, ++ {0x9094, 0x00000000}, ++ {0x9098, 0x00000000}, ++ {0x909c, 0x00000000}, ++ {0x90a0, 0x00000000}, ++ {0x90a4, 0x00000000}, ++ {0x90a8, 0x00000000}, ++ {0x90ac, 0x00000000}, ++ {0x90b0, 0x00000000}, ++ {0x90b4, 0x00000000}, ++ {0x90b8, 0x00000000}, ++ {0x90bc, 0x00000000}, ++ {0x9100, 0x00000000}, ++ {0x9104, 0x00000000}, ++ {0x9108, 0x00000000}, ++ {0x910c, 0x00000000}, ++ {0x9110, 0x00000000}, ++ {0x9114, 0x00000000}, ++ {0x9118, 0x00000000}, ++ {0x911c, 0x00000000}, ++ {0x9120, 0x00000000}, ++ {0x9124, 0x00000000}, ++ {0x9128, 0x00000000}, ++ {0x912c, 0x00000000}, ++ {0x9130, 0x00000000}, ++ {0x9134, 0x00000000}, ++ {0x9138, 0x00000000}, ++ {0x913c, 0x00000000}, ++ {0x9140, 0x00000000}, ++ {0x9144, 0x00000000}, ++ {0x9148, 0x00000000}, ++ {0x914c, 0x00000000}, ++ {0x9150, 0x00000000}, ++ {0x9154, 0x00000000}, ++ {0x9158, 0x00000000}, ++ {0x915c, 0x00000000}, ++ {0x9160, 0x00000000}, ++ {0x9164, 0x00000000}, ++ {0x9168, 0x00000000}, ++ {0x916c, 0x00000000}, ++ {0x9170, 0x00000000}, ++ {0x9174, 0x00000000}, ++ {0x9178, 0x00000000}, ++ {0x917c, 0x00000000}, ++ {0x9180, 0x00000000}, ++ {0x9184, 0x00000000}, ++ {0x9188, 0x00000000}, ++ {0x918c, 0x00000000}, ++ {0x9190, 0x00000000}, ++ {0x9194, 0x00000000}, ++ {0x9198, 0x00000000}, ++ {0x919c, 0x00000000}, ++ {0x91a0, 0x00000000}, ++ {0x91a4, 0x00000000}, ++ {0x91a8, 0x00000000}, ++ {0x91ac, 0x00000000}, ++ {0x91b0, 0x00000000}, ++ {0x91b4, 0x00000000}, ++ {0x91b8, 0x00000000}, ++ {0x91bc, 0x00000000}, ++ {0x91c0, 0x00000000}, ++ {0x91c4, 0x00000000}, ++ {0x91c8, 0x00000000}, ++ {0x91cc, 0x00000000}, ++ {0x91d0, 0x00000000}, ++ {0x91d4, 0x00000000}, ++ {0x91d8, 0x00000000}, ++ {0x91dc, 0x00000000}, ++ {0x91e0, 0x00000000}, ++ {0x91e4, 0x00000000}, ++ {0x91e8, 0x00000000}, ++ {0x91ec, 0x00000000}, ++ {0x91f0, 0x00000000}, ++ {0x91f4, 0x00000000}, ++ {0x91f8, 0x00000000}, ++ {0x91fc, 0x00000000}, ++ {0x9200, 0x00000000}, ++ {0x9204, 0x00000000}, ++ {0x9208, 0x00000000}, ++ {0x920c, 0x00000000}, ++ {0x9210, 0x00000000}, ++ {0x9214, 0x00000000}, ++ {0x9218, 0x00000000}, ++ {0x921c, 0x00000000}, ++ {0x9220, 0x00000000}, ++ {0x9224, 0x00000000}, ++ {0x9228, 0x00000000}, ++ {0x922c, 0x00000000}, ++ {0x9230, 0x00000000}, ++ {0x9234, 0x00000000}, ++ {0x9238, 0x00000000}, ++ {0x923c, 0x00000000}, ++ {0x9240, 0x00000000}, ++ {0x9244, 0x00000000}, ++ {0x9248, 0x00000000}, ++ {0x924c, 0x00000000}, ++ {0x9250, 0x00000000}, ++ {0x9254, 0x00000000}, ++ {0x9258, 0x00000000}, ++ {0x925c, 0x00000000}, ++ {0x9260, 0x00000000}, ++ {0x9264, 0x00000000}, ++ {0x9268, 0x00000000}, ++ {0x926c, 0x00000000}, ++ {0x9270, 0x00000000}, ++ {0x9274, 0x00000000}, ++ {0x9278, 0x00000000}, ++ {0x927c, 0x00000000}, ++ {0x9280, 0x00000000}, ++ {0x9284, 0x00000000}, ++ {0x9288, 0x00000000}, ++ {0x928c, 0x00000000}, ++ {0x9290, 0x00000000}, ++ {0x9294, 0x00000000}, ++ {0x9298, 0x00000000}, ++ {0x929c, 0x00000000}, ++ {0x92a0, 0x00000000}, ++ {0x92a4, 0x00000000}, ++ {0x92a8, 0x00000000}, ++ {0x92ac, 0x00000000}, ++ {0x92b0, 0x00000000}, ++ {0x92b4, 0x00000000}, ++ {0x92b8, 0x00000000}, ++ {0x92bc, 0x00000000}, ++ {0x92c0, 0x00000000}, ++ {0x92c4, 0x00000000}, ++ {0x92c8, 0x00000000}, ++ {0x92cc, 0x00000000}, ++ {0x92d0, 0x00000000}, ++ {0x92d4, 0x00000000}, ++ {0x92d8, 0x00000000}, ++ {0x92dc, 0x00000000}, ++ {0x92e0, 0x00000000}, ++ {0x92e4, 0x00000000}, ++ {0x92e8, 0x00000000}, ++ {0x92ec, 0x00000000}, ++ {0x92f0, 0x00000000}, ++ {0x92f4, 0x00000000}, ++ {0x92f8, 0x00000000}, ++ {0x92fc, 0x00000000}, ++ {0x9300, 0x00000000}, ++ {0x9304, 0x00000000}, ++ {0x9308, 0x00000000}, ++ {0x930c, 0x00000000}, ++ {0x9310, 0x00000000}, ++ {0x9314, 0x00000000}, ++ {0x9318, 0x00000000}, ++ {0x931c, 0x00000000}, ++ {0x9320, 0x00000000}, ++ {0x9324, 0x00000000}, ++ {0x9328, 0x00000000}, ++ {0x932c, 0x00000000}, ++ {0x9330, 0x00000000}, ++ {0x9334, 0x00000000}, ++ {0x9338, 0x00000000}, ++ {0x933c, 0x00000000}, ++ {0x9340, 0x00000000}, ++ {0x9344, 0x00000000}, ++ {0x9348, 0x00000000}, ++ {0x934c, 0x00000000}, ++ {0x9350, 0x00000000}, ++ {0x9354, 0x00000000}, ++ {0x9358, 0x00000000}, ++ {0x935c, 0x00000000}, ++ {0x9360, 0x00000000}, ++ {0x9364, 0x00000000}, ++ {0x9368, 0x00000000}, ++ {0x936c, 0x00000000}, ++ {0x9370, 0x00000000}, ++ {0x9374, 0x00000000}, ++ {0x9378, 0x00000000}, ++ {0x937c, 0x00000000}, ++ {0x9380, 0x00000000}, ++ {0x9384, 0x00000000}, ++ {0x9388, 0x00000000}, ++ {0x938c, 0x00000000}, ++ {0x9390, 0x00000000}, ++ {0x9394, 0x00000000}, ++ {0x9398, 0x00000000}, ++ {0x939c, 0x00000000}, ++ {0x93a0, 0x00000000}, ++ {0x93a4, 0x00000000}, ++ {0x93a8, 0x00000000}, ++ {0x93ac, 0x00000000}, ++ {0x93b0, 0x00000000}, ++ {0x93b4, 0x00000000}, ++ {0x93b8, 0x00000000}, ++ {0x93bc, 0x00000000}, ++ {0x93c0, 0x00000000}, ++ {0x93c4, 0x00000000}, ++ {0x93c8, 0x00000000}, ++ {0x93cc, 0x00000000}, ++ {0x93d0, 0x00000000}, ++ {0x93d4, 0x00000000}, ++ {0x93d8, 0x00000000}, ++ {0x93dc, 0x00000000}, ++ {0x93e0, 0x00000000}, ++ {0x93e4, 0x00000000}, ++ {0x93e8, 0x00000000}, ++ {0x93ec, 0x00000000}, ++ {0x93f0, 0x00000000}, ++ {0x93f4, 0x00000000}, ++ {0x93f8, 0x00000000}, ++ {0x93fc, 0x00000000}, ++ {0x9400, 0x00000000}, ++ {0x9404, 0x00000000}, ++ {0x9408, 0x00000000}, ++ {0x940c, 0x00000000}, ++ {0x9410, 0x00000000}, ++ {0x9414, 0x00000000}, ++ {0x9418, 0x00000000}, ++ {0x941c, 0x00000000}, ++ {0x9420, 0x00000000}, ++ {0x9424, 0x00000000}, ++ {0x9428, 0x00000000}, ++ {0x942c, 0x00000000}, ++ {0x9430, 0x00000000}, ++ {0x9434, 0x00000000}, ++ {0x9438, 0x00000000}, ++ {0x943c, 0x00000000}, ++ {0x9440, 0x00000000}, ++ {0x9444, 0x00000000}, ++ {0x9448, 0x00000000}, ++ {0x944c, 0x00000000}, ++ {0x9450, 0x00000000}, ++ {0x9454, 0x00000000}, ++ {0x9458, 0x00000000}, ++ {0x945c, 0x00000000}, ++ {0x9460, 0x00000000}, ++ {0x9464, 0x00000000}, ++ {0x9468, 0x00000000}, ++ {0x946c, 0x00000000}, ++ {0x9470, 0x00000000}, ++ {0x9474, 0x00000000}, ++ {0x9478, 0x00000000}, ++ {0x947c, 0x00000000}, ++ {0x9480, 0x00000000}, ++ {0x9484, 0x00000000}, ++ {0x9488, 0x00000000}, ++ {0x948c, 0x00000000}, ++ {0x9490, 0x00000000}, ++ {0x9494, 0x00000000}, ++ {0x9498, 0x00000000}, ++ {0x949c, 0x00000000}, ++ {0x94a0, 0x00000000}, ++ {0x94a4, 0x00000000}, ++ {0x94a8, 0x00000000}, ++ {0x94ac, 0x00000000}, ++ {0x94b0, 0x00000000}, ++ {0x94b4, 0x00000000}, ++ {0x94b8, 0x00000000}, ++ {0x94bc, 0x00000000}, ++ {0xa220, 0x00000000}, ++ {0xa224, 0x00000000}, ++ {0xa228, 0x00000000}, ++ {0xa22c, 0x00000000}, ++ {0xa230, 0x00000000}, ++ {0xa234, 0x00000000}, ++ {0xa238, 0x00000000}, ++ {0xa23c, 0x00000000}, ++ {0xa240, 0x00000000}, ++ {0xa244, 0x00000000}, ++ {0xa248, 0x00000000}, ++ {0xa24c, 0x00000000}, ++ {0xa250, 0x00000000}, ++ {0xa254, 0x00000000}, ++ {0xa258, 0x00000000}, ++ {0xa25c, 0x00000000}, ++ {0xa260, 0x00000000}, ++ {0xa264, 0x00000000}, ++ {0xa268, 0x00000000}, ++ {0xa26c, 0x00000000}, ++ {0xa270, 0x00000000}, ++ {0xa274, 0x00000000}, ++ {0xa278, 0x00000000}, ++ {0xa27c, 0x00000000}, ++ {0xa280, 0x00000000}, ++ {0xa284, 0x00000000}, ++ {0xa288, 0x00000000}, ++ {0xa28c, 0x00000000}, ++ {0xa290, 0x00000000}, ++ {0xa294, 0x00000000}, ++ {0xa298, 0x00000000}, ++ {0xa29c, 0x00000000}, ++ {0xa2a0, 0x00000000}, ++ {0xa2a4, 0x00000000}, ++ {0xa2a8, 0x00000000}, ++ {0xa2ac, 0x00000000}, ++ {0xa2b0, 0x00000000}, ++ {0xa2b4, 0x00000000}, ++ {0xa2b8, 0x00000000}, ++ {0xa2bc, 0x00000000}, ++ {0xa2c0, 0x00000000}, ++ {0xa2c4, 0x00000000}, ++ {0xa2c8, 0x00000000}, ++ {0xa2cc, 0x00000000}, ++ {0xa2d0, 0x00000000}, ++ {0xa2d4, 0x00000000}, ++ {0xa2d8, 0x00000000}, ++ {0xa2dc, 0x00000000}, ++ {0xa2e0, 0x00000000}, ++ {0xa2e4, 0x00000000}, ++ {0xa2e8, 0x00000000}, ++ {0xa2ec, 0x00000000}, ++ {0xa2f0, 0x00000000}, ++ {0xa2f4, 0x00000000}, ++ {0xa2f8, 0x00000000}, ++ {0xa2fc, 0x00000000}, ++ {0xa300, 0x00000000}, ++ {0xa304, 0x00000000}, ++ {0xa308, 0x00000000}, ++ {0xa30c, 0x00000000}, ++ {0xa310, 0x00000000}, ++ {0xa314, 0x00000000}, ++ {0xa318, 0x00000000}, ++ {0xa31c, 0x00000000}, ++ {0xa320, 0x00000000}, ++ {0xa324, 0x00000000}, ++ {0xa328, 0x00000000}, ++ {0xa32c, 0x00000000}, ++ {0xa330, 0x00000000}, ++ {0xa334, 0x00000000}, ++ {0xa338, 0x00000000}, ++ {0xa33c, 0x00000000}, ++ {0xa340, 0x00000000}, ++ {0xa344, 0x00000000}, ++ {0xa348, 0x00000000}, ++ {0xa34c, 0x00000000}, ++ {0xa350, 0x00000000}, ++ {0xa354, 0x00000000}, ++ {0xa358, 0x00000000}, ++ {0xa35c, 0x00000000}, ++ {0xa360, 0x00000000}, ++ {0xa364, 0x00000000}, ++ {0xa368, 0x00000000}, ++ {0xa36c, 0x00000000}, ++ {0xa370, 0x00000000}, ++ {0xa374, 0x00000000}, ++ {0xa378, 0x00000000}, ++ {0xa37c, 0x00000000}, ++ {0xa380, 0x00000000}, ++ {0xa384, 0x00000000}, ++ {0xa388, 0x00000000}, ++ {0xa38c, 0x00000000}, ++ {0xa390, 0x00000000}, ++ {0xa394, 0x00000000}, ++ {0xa398, 0x00000000}, ++ {0xa39c, 0x00000000}, ++ {0xa3a0, 0x00000000}, ++ {0xa3a4, 0x00000000}, ++ {0xa3a8, 0x00000000}, ++ {0xa3ac, 0x00000000}, ++ {0xa3b0, 0x00000000}, ++ {0xa3b4, 0x00000000}, ++ {0xa3b8, 0x00000000}, ++ {0xa3bc, 0x00000000}, ++ {0xa620, 0x00000000}, ++ {0xa624, 0x00000000}, ++ {0xa628, 0x00000000}, ++ {0xa62c, 0x00000000}, ++ {0xa630, 0x00000000}, ++ {0xa634, 0x00000000}, ++ {0xa638, 0x00000000}, ++ {0xa63c, 0x00000000}, ++ {0xa640, 0x00000000}, ++ {0xa644, 0x00000000}, ++ {0xa648, 0x00000000}, ++ {0xa64c, 0x00000000}, ++ {0xa650, 0x00000000}, ++ {0xa654, 0x00000000}, ++ {0xa658, 0x00000000}, ++ {0xa65c, 0x00000000}, ++ {0xa660, 0x00000000}, ++ {0xa664, 0x00000000}, ++ {0xa668, 0x00000000}, ++ {0xa66c, 0x00000000}, ++ {0xa670, 0x00000000}, ++ {0xa674, 0x00000000}, ++ {0xa678, 0x00000000}, ++ {0xa67c, 0x00000000}, ++ {0xa680, 0x00000000}, ++ {0xa684, 0x00000000}, ++ {0xa688, 0x00000000}, ++ {0xa68c, 0x00000000}, ++ {0xa690, 0x00000000}, ++ {0xa694, 0x00000000}, ++ {0xa698, 0x00000000}, ++ {0xa69c, 0x00000000}, ++ {0xa6a0, 0x00000000}, ++ {0xa6a4, 0x00000000}, ++ {0xa6a8, 0x00000000}, ++ {0xa6ac, 0x00000000}, ++ {0xa6b0, 0x00000000}, ++ {0xa6b4, 0x00000000}, ++ {0xa6b8, 0x00000000}, ++ {0xa6bc, 0x00000000}, ++ {0xa6c0, 0x00000000}, ++ {0xa6c4, 0x00000000}, ++ {0xa6c8, 0x00000000}, ++ {0xa6cc, 0x00000000}, ++ {0xa6d0, 0x00000000}, ++ {0xa6d4, 0x00000000}, ++ {0xa6d8, 0x00000000}, ++ {0xa6dc, 0x00000000}, ++ {0xa6e0, 0x00000000}, ++ {0xa6e4, 0x00000000}, ++ {0xa6e8, 0x00000000}, ++ {0xa6ec, 0x00000000}, ++ {0xa6f0, 0x00000000}, ++ {0xa6f4, 0x00000000}, ++ {0xa6f8, 0x00000000}, ++ {0xa6fc, 0x00000000}, ++ {0xa700, 0x00000000}, ++ {0xa704, 0x00000000}, ++ {0xa708, 0x00000000}, ++ {0xa70c, 0x00000000}, ++ {0xa710, 0x00000000}, ++ {0xa714, 0x00000000}, ++ {0xa718, 0x00000000}, ++ {0xa71c, 0x00000000}, ++ {0xa720, 0x00000000}, ++ {0xa724, 0x00000000}, ++ {0xa728, 0x00000000}, ++ {0xa72c, 0x00000000}, ++ {0xa730, 0x00000000}, ++ {0xa734, 0x00000000}, ++ {0xa738, 0x00000000}, ++ {0xa73c, 0x00000000}, ++ {0xa740, 0x00000000}, ++ {0xa744, 0x00000000}, ++ {0xa748, 0x00000000}, ++ {0xa74c, 0x00000000}, ++ {0xa750, 0x00000000}, ++ {0xa754, 0x00000000}, ++ {0xa758, 0x00000000}, ++ {0xa75c, 0x00000000}, ++ {0xa760, 0x00000000}, ++ {0xa764, 0x00000000}, ++ {0xa768, 0x00000000}, ++ {0xa76c, 0x00000000}, ++ {0xa770, 0x00000000}, ++ {0xa774, 0x00000000}, ++ {0xa778, 0x00000000}, ++ {0xa77c, 0x00000000}, ++ {0xa780, 0x00000000}, ++ {0xa784, 0x00000000}, ++ {0xa788, 0x00000000}, ++ {0xa78c, 0x00000000}, ++ {0xa790, 0x00000000}, ++ {0xa794, 0x00000000}, ++ {0xa798, 0x00000000}, ++ {0xa79c, 0x00000000}, ++ {0xa7a0, 0x00000000}, ++ {0xa7a4, 0x00000000}, ++ {0xa7a8, 0x00000000}, ++ {0xa7ac, 0x00000000}, ++ {0xa7b0, 0x00000000}, ++ {0xa7b4, 0x00000000}, ++ {0xa7b8, 0x00000000}, ++ {0xa7bc, 0x00000000}, ++ {0x81d8, 0x00000000}, ++ {0x82d8, 0x00000000}, ++ {0x9f04, 0x2b251f19}, ++ {0x9f08, 0x433d3731}, ++ {0x9f0c, 0x5b554f49}, ++ {0x9f10, 0x736d6761}, ++ {0x9f14, 0x7f7f7f79}, ++ {0x9f18, 0x120f7f7f}, ++ {0x9f1c, 0x1e1b1815}, ++ {0x9f20, 0x2a272421}, ++ {0x9f24, 0x3633302d}, ++ {0x9f28, 0x3f3f3c39}, ++ {0x9f2c, 0x3f3f3f3f}, ++ {0x8008, 0x00000080}, ++ {0x8088, 0x807f030a}, ++ {0x80c8, 0x708f0bf1}, ++ {0x80c8, 0x708e0aa5}, ++ {0x80c8, 0x708d097d}, ++ {0x80c8, 0x708c0875}, ++ {0x80c8, 0x708b0789}, ++ {0x80c8, 0x708a06b7}, ++ {0x80c8, 0x708905fc}, ++ {0x80c8, 0x70880556}, ++ {0x80c8, 0x708704c1}, ++ {0x80c8, 0x7086043d}, ++ {0x80c8, 0x708503c7}, ++ {0x80c8, 0x7084035e}, ++ {0x80c8, 0x708302ac}, ++ {0x80c8, 0x70820262}, ++ {0x80c8, 0x70810220}, ++ {0x80c8, 0x70800000}, ++ {0x80c8, 0x7090011f}, ++ {0x80c8, 0x7010011f}, ++ {0x8088, 0x80000000}, ++ {0x8008, 0x00000000}, ++ {0x8088, 0x00000110}, ++ {0x8000, 0x00000008}, ++ {0x8080, 0x00000005}, ++ {0x8500, 0x80000008}, ++ {0x8504, 0x43000004}, ++ {0x8508, 0x4b044a00}, ++ {0x850c, 0x40098604}, ++ {0x8510, 0x0004e020}, ++ {0x8514, 0x87044b05}, ++ {0x8518, 0xe020400b}, ++ {0x851c, 0x4b000004}, ++ {0x8520, 0x21e07410}, ++ {0x8524, 0x74300000}, ++ {0x8528, 0x43800004}, ++ {0x852c, 0x4c000007}, ++ {0x8530, 0x43000004}, ++ {0x8534, 0x42fe5700}, ++ {0x8538, 0x42004000}, ++ {0x853c, 0x30005055}, ++ {0x8540, 0xa50fb41a}, ++ {0x8544, 0xf11ce3c7}, ++ {0x8548, 0xf31cf21c}, ++ {0x854c, 0xf61cf41c}, ++ {0x8550, 0xf91cf81c}, ++ {0x8554, 0xfb1cfa1c}, ++ {0x8558, 0xfd1cfc1c}, ++ {0x855c, 0xff1cfe1c}, ++ {0x8560, 0xf11cf01c}, ++ {0x8564, 0xf31cf21c}, ++ {0x8568, 0xf51cf41c}, ++ {0x856c, 0xf71cf61c}, ++ {0x8570, 0xf91cf81c}, ++ {0x8574, 0xe3c7a504}, ++ {0x8578, 0xf11af01a}, ++ {0x857c, 0x30580001}, ++ {0x8580, 0x30b030c9}, ++ {0x8584, 0x30ff30fc}, ++ {0x8588, 0x310f3102}, ++ {0x858c, 0x3148311c}, ++ {0x8590, 0x31603158}, ++ {0x8594, 0x30c7320e}, ++ {0x8598, 0x32293225}, ++ {0x859c, 0x32433242}, ++ {0x85a0, 0x3286327a}, ++ {0x85a4, 0x329d328a}, ++ {0x85a8, 0x32aa32a8}, ++ {0x85ac, 0x320331c5}, ++ {0x85b0, 0x7410e2c1}, ++ {0x85b4, 0x020020a8}, ++ {0x85b8, 0x2098140f}, ++ {0x85bc, 0x140f0200}, ++ {0x85c0, 0x02002088}, ++ {0x85c4, 0x7430140f}, ++ {0x85c8, 0x5b10e31c}, ++ {0x85cc, 0x20a87410}, ++ {0x85d0, 0x140f0201}, ++ {0x85d4, 0x00002080}, ++ {0x85d8, 0x5507140f}, ++ {0x85dc, 0x5c065661}, ++ {0x85e0, 0x7410e308}, ++ {0x85e4, 0x02002088}, ++ {0x85e8, 0x5517140f}, ++ {0x85ec, 0x7410e308}, ++ {0x85f0, 0x020020a8}, ++ {0x85f4, 0x5517140f}, ++ {0x85f8, 0x5c025641}, ++ {0x85fc, 0x7410e308}, ++ {0x8600, 0x00002080}, ++ {0x8604, 0x1407140f}, ++ {0x8608, 0xe3085507}, ++ {0x860c, 0x7508e2b4}, ++ {0x8610, 0xe312468e}, ++ {0x8614, 0x5b10e0f4}, ++ {0x8618, 0x20a87410}, ++ {0x861c, 0x140f0201}, ++ {0x8620, 0x00002090}, ++ {0x8624, 0x5507140f}, ++ {0x8628, 0x5c065661}, ++ {0x862c, 0x7410e308}, ++ {0x8630, 0x02002098}, ++ {0x8634, 0x5517140f}, ++ {0x8638, 0x7410e308}, ++ {0x863c, 0x020020a8}, ++ {0x8640, 0x5517140f}, ++ {0x8644, 0x5c025641}, ++ {0x8648, 0x7410e308}, ++ {0x864c, 0x00002090}, ++ {0x8650, 0x5507140f}, ++ {0x8654, 0x7509e308}, ++ {0x8658, 0xe3124696}, ++ {0x865c, 0x0001e0f4}, ++ {0x8660, 0x74105b10}, ++ {0x8664, 0x000020a0}, ++ {0x8668, 0x5507140f}, ++ {0x866c, 0xe3085601}, ++ {0x8670, 0x20a87410}, ++ {0x8674, 0x140f0200}, ++ {0x8678, 0xe3085517}, ++ {0x867c, 0x750ae2b4}, ++ {0x8680, 0xe3124686}, ++ {0x8684, 0x5500e0f4}, ++ {0x8688, 0x5501e304}, ++ {0x868c, 0xe2c10001}, ++ {0x8690, 0x5b10e31c}, ++ {0x8694, 0x20807410}, ++ {0x8698, 0x140f0000}, ++ {0x869c, 0x02002098}, ++ {0x86a0, 0xf204140f}, ++ {0x86a4, 0x020020a8}, ++ {0x86a8, 0x5507140f}, ++ {0x86ac, 0xe3085601}, ++ {0x86b0, 0x20887410}, ++ {0x86b4, 0x140f0200}, ++ {0x86b8, 0xe3085517}, ++ {0x86bc, 0x7508e2b4}, ++ {0x86c0, 0xe312468e}, ++ {0x86c4, 0x7410e0f4}, ++ {0x86c8, 0x00002090}, ++ {0x86cc, 0x5507140f}, ++ {0x86d0, 0x7410e308}, ++ {0x86d4, 0x02002098}, ++ {0x86d8, 0x5517140f}, ++ {0x86dc, 0x7509e308}, ++ {0x86e0, 0xe3124696}, ++ {0x86e4, 0x0001e0f4}, ++ {0x86e8, 0x74207900}, ++ {0x86ec, 0x57005710}, ++ {0x86f0, 0x9700140f}, ++ {0x86f4, 0x00017430}, ++ {0x86f8, 0xe31ce2c1}, ++ {0x86fc, 0xe2ca0001}, ++ {0x8700, 0x0001e34b}, ++ {0x8704, 0x312ae2c1}, ++ {0x8708, 0xe3ba0023}, ++ {0x870c, 0x54ed0002}, ++ {0x8710, 0x00230baa}, ++ {0x8714, 0x0002e3ba}, ++ {0x8718, 0xe2b9e367}, ++ {0x871c, 0xe2c10001}, ++ {0x8720, 0x00223125}, ++ {0x8724, 0x0002e3ba}, ++ {0x8728, 0x0baa54ec}, ++ {0x872c, 0xe3ba0022}, ++ {0x8730, 0xe3670002}, ++ {0x8734, 0x0001e2b9}, ++ {0x8738, 0x0baae2c1}, ++ {0x873c, 0x6d0f6c67}, ++ {0x8740, 0xe3bae31c}, ++ {0x8744, 0xe31c6c8b}, ++ {0x8748, 0x0bace3ba}, ++ {0x874c, 0x6d0f6cb3}, ++ {0x8750, 0xe3bae31c}, ++ {0x8754, 0x6cdb0bad}, ++ {0x8758, 0xe31c6d0f}, ++ {0x875c, 0x6cf7e3ba}, ++ {0x8760, 0xe31c6d0f}, ++ {0x8764, 0x6c09e3ba}, ++ {0x8768, 0xe31c6d00}, ++ {0x876c, 0x6c25e3ba}, ++ {0x8770, 0xe3bae31c}, ++ {0x8774, 0x6c4df8ca}, ++ {0x8778, 0xe3bae31c}, ++ {0x877c, 0x6c75f9d3}, ++ {0x8780, 0xe3bae31c}, ++ {0x8784, 0xe31c6c99}, ++ {0x8788, 0xe367e3ba}, ++ {0x878c, 0x0001e2b9}, ++ {0x8790, 0x4380e2ca}, ++ {0x8794, 0x43006344}, ++ {0x8798, 0x00223188}, ++ {0x879c, 0x0002e3bf}, ++ {0x87a0, 0x0baa54ec}, ++ {0x87a4, 0xe3bf0022}, ++ {0x87a8, 0xe3670002}, ++ {0x87ac, 0x0001e2c5}, ++ {0x87b0, 0x4380e2ca}, ++ {0x87b4, 0x43006344}, ++ {0x87b8, 0xe367317b}, ++ {0x87bc, 0x0001e2c5}, ++ {0x87c0, 0x4380e2ca}, ++ {0x87c4, 0x4300634d}, ++ {0x87c8, 0x74100ba6}, ++ {0x87cc, 0x000921e8}, ++ {0x87d0, 0x6f0f6e67}, ++ {0x87d4, 0xe3bfe34b}, ++ {0x87d8, 0x000a21e8}, ++ {0x87dc, 0xe34b6e77}, ++ {0x87e0, 0x21e8e3bf}, ++ {0x87e4, 0x6e8b000b}, ++ {0x87e8, 0xe3bfe34b}, ++ {0x87ec, 0x000c21e8}, ++ {0x87f0, 0xe34b6e9f}, ++ {0x87f4, 0x0baae3bf}, ++ {0x87f8, 0x21e87410}, ++ {0x87fc, 0x6eb3000d}, ++ {0x8800, 0xe34b6f0f}, ++ {0x8804, 0x21e8e3bf}, ++ {0x8808, 0x6ec7000e}, ++ {0x880c, 0xe3bfe34b}, ++ {0x8810, 0x74100bac}, ++ {0x8814, 0x000f21e8}, ++ {0x8818, 0x6f0f6edb}, ++ {0x881c, 0xe3bfe34b}, ++ {0x8820, 0x001021e8}, ++ {0x8824, 0xe34b6eef}, ++ {0x8828, 0xe3bfe3bf}, ++ {0x882c, 0x001321e8}, ++ {0x8830, 0x6f006e11}, ++ {0x8834, 0xe3bfe34b}, ++ {0x8838, 0x21e8e3bf}, ++ {0x883c, 0x6e250014}, ++ {0x8840, 0xe3bfe34b}, ++ {0x8844, 0x21e8fbab}, ++ {0x8848, 0x6e390015}, ++ {0x884c, 0xe3bfe34b}, ++ {0x8850, 0x001621e8}, ++ {0x8854, 0xe34b6e4d}, ++ {0x8858, 0xfcb0e3bf}, ++ {0x885c, 0x001721e8}, ++ {0x8860, 0xe34b6e61}, ++ {0x8864, 0x21e8e3bf}, ++ {0x8868, 0x6e750018}, ++ {0x886c, 0xe3bfe34b}, ++ {0x8870, 0x001921e8}, ++ {0x8874, 0xe34b6e89}, ++ {0x8878, 0x21e8e3bf}, ++ {0x887c, 0x6e99001a}, ++ {0x8880, 0xe3bfe34b}, ++ {0x8884, 0xe2c5e367}, ++ {0x8888, 0x00040001}, ++ {0x888c, 0x42fc0004}, ++ {0x8890, 0x60010007}, ++ {0x8894, 0x42000004}, ++ {0x8898, 0x62200007}, ++ {0x889c, 0x00046200}, ++ {0x88a0, 0x5b005501}, ++ {0x88a4, 0x5b40e304}, ++ {0x88a8, 0x00076605}, ++ {0x88ac, 0x63006200}, ++ {0x88b0, 0x0004e388}, ++ {0x88b4, 0x0a010900}, ++ {0x88b8, 0x0d000b40}, ++ {0x88bc, 0x00320e01}, ++ {0x88c0, 0x95090004}, ++ {0x88c4, 0x790442fb}, ++ {0x88c8, 0x43804200}, ++ {0x88cc, 0x4d010007}, ++ {0x88d0, 0x43000004}, ++ {0x88d4, 0x05620007}, ++ {0x88d8, 0x961d05a3}, ++ {0x88dc, 0x0004e388}, ++ {0x88e0, 0x0007e304}, ++ {0x88e4, 0x07a306a2}, ++ {0x88e8, 0x0004e388}, ++ {0x88ec, 0xe378e304}, ++ {0x88f0, 0xe3800002}, ++ {0x88f4, 0x00074380}, ++ {0x88f8, 0x00044d00}, ++ {0x88fc, 0x42fe4300}, ++ {0x8900, 0x42007900}, ++ {0x8904, 0x00040001}, ++ {0x8908, 0x000742fc}, ++ {0x890c, 0x00046003}, ++ {0x8910, 0x31cc4200}, ++ {0x8914, 0x06a20007}, ++ {0x8918, 0x31f807a3}, ++ {0x891c, 0x77000005}, ++ {0x8920, 0x52000007}, ++ {0x8924, 0x42fe0004}, ++ {0x8928, 0x60000007}, ++ {0x892c, 0x42000004}, ++ {0x8930, 0x60004380}, ++ {0x8934, 0x62016100}, ++ {0x8938, 0x00056310}, ++ {0x893c, 0x55004100}, ++ {0x8940, 0x5c020007}, ++ {0x8944, 0x43000004}, ++ {0x8948, 0xe2d70001}, ++ {0x894c, 0x73000005}, ++ {0x8950, 0xe2d70001}, ++ {0x8954, 0x5d000006}, ++ {0x8958, 0x42f70004}, ++ {0x895c, 0x6c000005}, ++ {0x8960, 0x42000004}, ++ {0x8964, 0x0004e2de}, ++ {0x8968, 0x00074380}, ++ {0x896c, 0x4a004e00}, ++ {0x8970, 0x00064c00}, ++ {0x8974, 0x60007f00}, ++ {0x8978, 0x00046f00}, ++ {0x897c, 0x00054300}, ++ {0x8980, 0x00017300}, ++ {0x8984, 0xe2d70001}, ++ {0x8988, 0x5d010006}, ++ {0x898c, 0x61006002}, ++ {0x8990, 0x00055601}, ++ {0x8994, 0xe2e27710}, ++ {0x8998, 0x73000005}, ++ {0x899c, 0x43800004}, ++ {0x89a0, 0x5e010007}, ++ {0x89a4, 0x4d205e00}, ++ {0x89a8, 0x4a084e20}, ++ {0x89ac, 0x4c3f4960}, ++ {0x89b0, 0x00064301}, ++ {0x89b4, 0x63807f01}, ++ {0x89b8, 0x00046010}, ++ {0x89bc, 0x00064300}, ++ {0x89c0, 0x00077402}, ++ {0x89c4, 0x40004001}, ++ {0x89c8, 0x0006ab00}, ++ {0x89cc, 0x00077404}, ++ {0x89d0, 0x40004001}, ++ {0x89d4, 0x0004ab00}, ++ {0x89d8, 0x00074380}, ++ {0x89dc, 0x4e004d00}, ++ {0x89e0, 0x4c004a00}, ++ {0x89e4, 0x00064300}, ++ {0x89e8, 0x63007f00}, ++ {0x89ec, 0x00046000}, ++ {0x89f0, 0x00014300}, ++ {0x89f4, 0x73800005}, ++ {0x89f8, 0x42fe0004}, ++ {0x89fc, 0x6c010005}, ++ {0x8a00, 0x000514c8}, ++ {0x8a04, 0x00046c00}, ++ {0x8a08, 0x00014200}, ++ {0x8a0c, 0x0005e2ce}, ++ {0x8a10, 0x00017300}, ++ {0x8a14, 0x00040006}, ++ {0x8a18, 0x42fa4380}, ++ {0x8a1c, 0x42007c05}, ++ {0x8a20, 0x7c5b0006}, ++ {0x8a24, 0x7e5b7d5b}, ++ {0x8a28, 0x00077f00}, ++ {0x8a2c, 0x415b405b}, ++ {0x8a30, 0x4300425b}, ++ {0x8a34, 0x43000004}, ++ {0x8a38, 0x00040001}, ++ {0x8a3c, 0x60004380}, ++ {0x8a40, 0x62016100}, ++ {0x8a44, 0x42fa6310}, ++ {0x8a48, 0x42007c00}, ++ {0x8a4c, 0x00014300}, ++ {0x8a50, 0x0001e2e5}, ++ {0x8a54, 0x55000007}, ++ {0x8a58, 0x74200004}, ++ {0x8a5c, 0x79017711}, ++ {0x8a60, 0x57005710}, ++ {0x8a64, 0x00019700}, ++ {0x8a68, 0x4e004f02}, ++ {0x8a6c, 0x52015302}, ++ {0x8a70, 0x43800001}, ++ {0x8a74, 0x78006505}, ++ {0x8a78, 0x7a007900}, ++ {0x8a7c, 0x43007b00}, ++ {0x8a80, 0x43800001}, ++ {0x8a84, 0x43006500}, ++ {0x8a88, 0x43800001}, ++ {0x8a8c, 0x7c006405}, ++ {0x8a90, 0x00014300}, ++ {0x8a94, 0x64004380}, ++ {0x8a98, 0x00014300}, ++ {0x8a9c, 0x74200004}, ++ {0x8aa0, 0x0005e392}, ++ {0x8aa4, 0x73807388}, ++ {0x8aa8, 0xe3a08f00}, ++ {0x8aac, 0xe3920001}, ++ {0x8ab0, 0x73810005}, ++ {0x8ab4, 0x93007380}, ++ {0x8ab8, 0x0001e3a0}, ++ {0x8abc, 0xe2e5e3a7}, ++ {0x8ac0, 0x0001e3ae}, ++ {0x8ac4, 0xe3aee3a7}, ++ {0x8ac8, 0x00040001}, ++ {0x8acc, 0x24207410}, ++ {0x8ad0, 0x14c80000}, ++ {0x8ad4, 0x00002428}, ++ {0x8ad8, 0x1a4215f4}, ++ {0x8adc, 0x74300008}, ++ {0x8ae0, 0x43800001}, ++ {0x8ae4, 0x7a907b48}, ++ {0x8ae8, 0x78027900}, ++ {0x8aec, 0x55034300}, ++ {0x8af0, 0x43803308}, ++ {0x8af4, 0x7a807b38}, ++ {0x8af8, 0x55134300}, ++ {0x8afc, 0x43803308}, ++ {0x8b00, 0x7a007b40}, ++ {0x8b04, 0x55234300}, ++ {0x8b08, 0x74007401}, ++ {0x8b0c, 0x00018e00}, ++ {0x8b10, 0x52300007}, ++ {0x8b14, 0x74310004}, ++ {0x8b18, 0x8e007430}, ++ {0x8b1c, 0x52200007}, ++ {0x8b20, 0x00010004}, ++ {0x8b24, 0x57005702}, ++ {0x8b28, 0x00018e00}, ++ {0x8b2c, 0x561042ef}, ++ {0x8b30, 0x42005600}, ++ {0x8b34, 0x00018c00}, ++ {0x8b38, 0x4e004f78}, ++ {0x8b3c, 0x52015388}, ++ {0x8b40, 0xe32b5b20}, ++ {0x8b44, 0x54005480}, ++ {0x8b48, 0x54005481}, ++ {0x8b4c, 0x54005482}, ++ {0x8b50, 0xbf1de336}, ++ {0x8b54, 0xe2f13010}, ++ {0x8b58, 0xe2ffe2f9}, ++ {0x8b5c, 0xe3b3e312}, ++ {0x8b60, 0xe3085523}, ++ {0x8b64, 0xe3125525}, ++ {0x8b68, 0x0001e3b3}, ++ {0x8b6c, 0x54c054bf}, ++ {0x8b70, 0x54c154a3}, ++ {0x8b74, 0x4c1854a4}, ++ {0x8b78, 0x54c2bf07}, ++ {0x8b7c, 0xbf0454a4}, ++ {0x8b80, 0x54a354c1}, ++ {0x8b84, 0xe3c4bf01}, ++ {0x8b88, 0x000154df}, ++ {0x8b8c, 0x54e554bf}, ++ {0x8b90, 0x54df050a}, ++ {0x8b94, 0x16570001}, ++ {0x8b98, 0x74307b80}, ++ {0x8b9c, 0x7f404380}, ++ {0x8ba0, 0x7d007e00}, ++ {0x8ba4, 0x43007c02}, ++ {0x8ba8, 0x55015b40}, ++ {0x8bac, 0xe3165c01}, ++ {0x8bb0, 0x54005480}, ++ {0x8bb4, 0x54005481}, ++ {0x8bb8, 0x54005482}, ++ {0x8bbc, 0x74107b00}, ++ {0x8bc0, 0xbfe5e336}, ++ {0x8bc4, 0x56103010}, ++ {0x8bc8, 0x8c005600}, ++ {0x8bcc, 0x57040001}, ++ {0x8bd0, 0x8e005700}, ++ {0x8bd4, 0x57005708}, ++ {0x8bd8, 0x57818e00}, ++ {0x8bdc, 0x8e005780}, ++ {0x8be0, 0x00074380}, ++ {0x8be4, 0x5c005c01}, ++ {0x8be8, 0x00041403}, ++ {0x8bec, 0x00014300}, ++ {0x8bf0, 0x0007427f}, ++ {0x8bf4, 0x62006280}, ++ {0x8bf8, 0x00049200}, ++ {0x8bfc, 0x00014200}, ++ {0x8c00, 0x0007427f}, ++ {0x8c04, 0x63146394}, ++ {0x8c08, 0x00049200}, ++ {0x8c0c, 0x00014200}, ++ {0x8c10, 0x42fe0004}, ++ {0x8c14, 0x42007901}, ++ {0x8c18, 0x14037420}, ++ {0x8c1c, 0x57005710}, ++ {0x8c20, 0x0001140f}, ++ {0x8c24, 0x56010006}, ++ {0x8c28, 0x54005502}, ++ {0x8c2c, 0x7f000005}, ++ {0x8c30, 0x77107e12}, ++ {0x8c34, 0x75007600}, ++ {0x8c38, 0x00047400}, ++ {0x8c3c, 0x00014270}, ++ {0x8c40, 0x42000004}, ++ {0x8c44, 0x77000005}, ++ {0x8c48, 0x56000006}, ++ {0x8c4c, 0x00060001}, ++ {0x8c50, 0x5f005f80}, ++ {0x8c54, 0x00059900}, ++ {0x8c58, 0x00017300}, ++ {0x8c5c, 0x63800006}, ++ {0x8c60, 0x98006300}, ++ {0x8c64, 0x549f0001}, ++ {0x8c68, 0x5c015400}, ++ {0x8c6c, 0x540054df}, ++ {0x8c70, 0x00015c02}, ++ {0x8c74, 0x07145c01}, ++ {0x8c78, 0x5c025400}, ++ {0x8c7c, 0x5c020001}, ++ {0x8c80, 0x54000714}, ++ {0x8c84, 0x00015c01}, ++ {0x8c88, 0x4c184c98}, ++ {0x8c8c, 0x00040001}, ++ {0x8c90, 0x74305c02}, ++ {0x8c94, 0x0c010901}, ++ {0x8c98, 0x00050ba6}, ++ {0x8c9c, 0x00077780}, ++ {0x8ca0, 0x00045220}, ++ {0x8ca4, 0x60084380}, ++ {0x8ca8, 0x6200610a}, ++ {0x8cac, 0x000763ce}, ++ {0x8cb0, 0x00045c00}, ++ {0x8cb4, 0x00014300}, ++ {0x8080, 0x00000004}, ++ {0x8080, 0x00000000}, ++ {0x8088, 0x00000000}, ++}; ++ ++static const struct rtw89_txpwr_byrate_cfg rtw89_8852b_txpwr_byrate[] = { ++ { 0, 0, 0, 0, 4, 0x50505050, }, ++ { 0, 0, 1, 0, 4, 0x50505050, }, ++ { 0, 0, 1, 4, 4, 0x484c5050, }, ++ { 0, 0, 2, 0, 4, 0x50505050, }, ++ { 0, 0, 2, 4, 4, 0x44484c50, }, ++ { 0, 0, 2, 8, 4, 0x34383c40, }, ++ { 0, 0, 3, 0, 4, 0x50505050, }, ++ { 0, 1, 2, 0, 4, 0x50505050, }, ++ { 0, 1, 2, 4, 4, 0x44484c50, }, ++ { 0, 1, 2, 8, 4, 0x34383c40, }, ++ { 0, 1, 3, 0, 4, 0x50505050, }, ++ { 0, 0, 4, 1, 4, 0x00000000, }, ++ { 0, 0, 4, 0, 1, 0x00000000, }, ++ { 1, 0, 1, 0, 4, 0x50505050, }, ++ { 1, 0, 1, 4, 4, 0x484c5050, }, ++ { 1, 0, 2, 0, 4, 0x50505050, }, ++ { 1, 0, 2, 4, 4, 0x44484c50, }, ++ { 1, 0, 2, 8, 4, 0x34383c40, }, ++ { 1, 0, 3, 0, 4, 0x50505050, }, ++ { 1, 1, 2, 0, 4, 0x50505050, }, ++ { 1, 1, 2, 4, 4, 0x44484c50, }, ++ { 1, 1, 2, 8, 4, 0x34383c40, }, ++ { 1, 1, 3, 0, 4, 0x50505050, }, ++ { 1, 0, 4, 0, 4, 0x00000000, }, ++}; ++ ++static const s8 _txpwr_track_delta_swingidx_5gb_n[][DELTA_SWINGIDX_SIZE] = { ++ {0, 1, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 3, 4, 4, 4, ++ 4, 5, 5, 5, 5, 6, 6, 6, 6, 7, 7, 7, 7, 8}, ++ {0, 1, 1, 1, 1, 2, 2, 2, 3, 3, 3, 3, 4, 4, 4, 5, ++ 5, 5, 5, 6, 6, 6, 6, 7, 7, 7, 8, 8, 8, 8}, ++ {0, 1, 1, 2, 2, 2, 3, 3, 4, 4, 4, 5, 5, 6, 6, 6, 7, ++ 7, 8, 8, 8, 9, 9, 10, 10, 10, 11, 11, 12, 12}, ++}; ++ ++static const s8 _txpwr_track_delta_swingidx_5gb_p[][DELTA_SWINGIDX_SIZE] = { ++ {0, 1, 1, 1, 1, 2, 2, 2, 3, 3, 3, 3, 4, 4, 4, 5, ++ 5, 5, 5, 6, 6, 6, 6, 7, 7, 7, 8, 8, 8, 8}, ++ {0, 1, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 3, 4, 4, 4, ++ 4, 5, 5, 5, 5, 6, 6, 6, 6, 7, 7, 7, 7, 8}, ++ {0, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 3, 4, 4, 4, 5, ++ 5, 5, 5, 6, 6, 6, 7, 7, 7, 7, 8, 8, 8, 9}, ++}; ++ ++static const s8 _txpwr_track_delta_swingidx_5ga_n[][DELTA_SWINGIDX_SIZE] = { ++ {0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2, 2, ++ 2, 2, 3, 3, 3, 3, 3, 3, 3, 3, 3, 4, 4, 4}, ++ {0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, ++ 2, 2, 2, 2, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3}, ++ {0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, ++ 2, 2, 2, 2, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3}, ++}; ++ ++static const s8 _txpwr_track_delta_swingidx_5ga_p[][DELTA_SWINGIDX_SIZE] = { ++ {0, 1, 1, 1, 1, 2, 2, 2, 2, 2, 3, 3, 3, 3, 4, 4, ++ 4, 4, 5, 5, 5, 5, 6, 6, 6, 6, 7, 7, 7, 7}, ++ {0, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 4, 4, 5, ++ 5, 5, 5, 6, 6, 6, 7, 7, 7, 7, 8, 8, 8, 9}, ++ {0, 1, 1, 1, 2, 2, 2, 3, 3, 3, 3, 4, 4, 4, 5, 5, ++ 5, 6, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9}, ++}; ++ ++static const s8 _txpwr_track_delta_swingidx_2gb_n[] = { ++ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -1, -1, -1, ++ -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -2, -2}; ++ ++static const s8 _txpwr_track_delta_swingidx_2gb_p[] = { ++ 0, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2, 2, 3, 3, 3, 3, ++ 3, 4, 4, 4, 4, 4, 5, 5, 5, 5, 5, 5, 6, 6}; ++ ++static const s8 _txpwr_track_delta_swingidx_2ga_n[] = { ++ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ++ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; ++ ++static const s8 _txpwr_track_delta_swingidx_2ga_p[] = { ++ 0, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2, 2, 3, 3, ++ 3, 3, 3, 3, 3, 4, 4, 4, 4, 4, 4, 5, 5, 5}; ++ ++static const s8 _txpwr_track_delta_swingidx_2g_cck_b_n[] = { ++ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -1, -1, ++ -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1}; ++ ++static const s8 _txpwr_track_delta_swingidx_2g_cck_b_p[] = { ++ 0, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2, 3, 3, 3, 3, 3, ++ 4, 4, 4, 4, 4, 4, 5, 5, 5, 5, 5, 6, 6, 6}; ++ ++static const s8 _txpwr_track_delta_swingidx_2g_cck_a_n[] = { ++ 0, 0, 0, 0, 0, 0, 0, 0, -1, -1, -1, -1, -1, -1, -1, -2, -2, ++ -2, -2, -2, -2, -2, -2, -3, -3, -3, -3, -3, -3, -3}; ++ ++static const s8 _txpwr_track_delta_swingidx_2g_cck_a_p[] = { ++ 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, ++ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}; ++ ++const u8 rtw89_8852b_tx_shape[RTW89_BAND_MAX][RTW89_RS_TX_SHAPE_NUM] ++ [RTW89_REGD_NUM] = { ++ [0][0][RTW89_ACMA] = 0, ++ [0][0][RTW89_CHILE] = 0, ++ [0][0][RTW89_CN] = 0, ++ [0][0][RTW89_ETSI] = 0, ++ [0][0][RTW89_FCC] = 1, ++ [0][0][RTW89_IC] = 1, ++ [0][0][RTW89_KCC] = 0, ++ [0][0][RTW89_MEXICO] = 1, ++ [0][0][RTW89_MKK] = 0, ++ [0][0][RTW89_QATAR] = 0, ++ [0][0][RTW89_UK] = 0, ++ [0][0][RTW89_UKRAINE] = 0, ++ [0][1][RTW89_ACMA] = 0, ++ [0][1][RTW89_CHILE] = 0, ++ [0][1][RTW89_CN] = 0, ++ [0][1][RTW89_ETSI] = 0, ++ [0][1][RTW89_FCC] = 3, ++ [0][1][RTW89_IC] = 3, ++ [0][1][RTW89_KCC] = 0, ++ [0][1][RTW89_MEXICO] = 3, ++ [0][1][RTW89_MKK] = 0, ++ [0][1][RTW89_QATAR] = 0, ++ [0][1][RTW89_UK] = 0, ++ [0][1][RTW89_UKRAINE] = 0, ++ [1][1][RTW89_ACMA] = 0, ++ [1][1][RTW89_CHILE] = 0, ++ [1][1][RTW89_CN] = 0, ++ [1][1][RTW89_ETSI] = 0, ++ [1][1][RTW89_FCC] = 3, ++ [1][1][RTW89_IC] = 3, ++ [1][1][RTW89_KCC] = 0, ++ [1][1][RTW89_MEXICO] = 3, ++ [1][1][RTW89_MKK] = 0, ++ [1][1][RTW89_QATAR] = 0, ++ [1][1][RTW89_UK] = 0, ++ [1][1][RTW89_UKRAINE] = 0, ++}; ++ ++const s8 rtw89_8852b_txpwr_lmt_2g[RTW89_2G_BW_NUM][RTW89_NTX_NUM] ++ [RTW89_RS_LMT_NUM][RTW89_BF_NUM] ++ [RTW89_REGD_NUM][RTW89_2G_CH_NUM] = { ++ [0][0][0][0][RTW89_WW][0] = 58, ++ [0][0][0][0][RTW89_WW][1] = 58, ++ [0][0][0][0][RTW89_WW][2] = 58, ++ [0][0][0][0][RTW89_WW][3] = 58, ++ [0][0][0][0][RTW89_WW][4] = 58, ++ [0][0][0][0][RTW89_WW][5] = 58, ++ [0][0][0][0][RTW89_WW][6] = 58, ++ [0][0][0][0][RTW89_WW][7] = 58, ++ [0][0][0][0][RTW89_WW][8] = 58, ++ [0][0][0][0][RTW89_WW][9] = 58, ++ [0][0][0][0][RTW89_WW][10] = 58, ++ [0][0][0][0][RTW89_WW][11] = 58, ++ [0][0][0][0][RTW89_WW][12] = 56, ++ [0][0][0][0][RTW89_WW][13] = 76, ++ [0][1][0][0][RTW89_WW][0] = 46, ++ [0][1][0][0][RTW89_WW][1] = 46, ++ [0][1][0][0][RTW89_WW][2] = 46, ++ [0][1][0][0][RTW89_WW][3] = 46, ++ [0][1][0][0][RTW89_WW][4] = 46, ++ [0][1][0][0][RTW89_WW][5] = 46, ++ [0][1][0][0][RTW89_WW][6] = 46, ++ [0][1][0][0][RTW89_WW][7] = 46, ++ [0][1][0][0][RTW89_WW][8] = 46, ++ [0][1][0][0][RTW89_WW][9] = 46, ++ [0][1][0][0][RTW89_WW][10] = 46, ++ [0][1][0][0][RTW89_WW][11] = 46, ++ [0][1][0][0][RTW89_WW][12] = 42, ++ [0][1][0][0][RTW89_WW][13] = 64, ++ [1][0][0][0][RTW89_WW][0] = 0, ++ [1][0][0][0][RTW89_WW][1] = 0, ++ [1][0][0][0][RTW89_WW][2] = 50, ++ [1][0][0][0][RTW89_WW][3] = 50, ++ [1][0][0][0][RTW89_WW][4] = 50, ++ [1][0][0][0][RTW89_WW][5] = 58, ++ [1][0][0][0][RTW89_WW][6] = 50, ++ [1][0][0][0][RTW89_WW][7] = 50, ++ [1][0][0][0][RTW89_WW][8] = 50, ++ [1][0][0][0][RTW89_WW][9] = 42, ++ [1][0][0][0][RTW89_WW][10] = 30, ++ [1][0][0][0][RTW89_WW][11] = 0, ++ [1][0][0][0][RTW89_WW][12] = 0, ++ [1][0][0][0][RTW89_WW][13] = 0, ++ [1][1][0][0][RTW89_WW][0] = 0, ++ [1][1][0][0][RTW89_WW][1] = 0, ++ [1][1][0][0][RTW89_WW][2] = 46, ++ [1][1][0][0][RTW89_WW][3] = 46, ++ [1][1][0][0][RTW89_WW][4] = 46, ++ [1][1][0][0][RTW89_WW][5] = 46, ++ [1][1][0][0][RTW89_WW][6] = 34, ++ [1][1][0][0][RTW89_WW][7] = 34, ++ [1][1][0][0][RTW89_WW][8] = 34, ++ [1][1][0][0][RTW89_WW][9] = 30, ++ [1][1][0][0][RTW89_WW][10] = 30, ++ [1][1][0][0][RTW89_WW][11] = 0, ++ [1][1][0][0][RTW89_WW][12] = 0, ++ [1][1][0][0][RTW89_WW][13] = 0, ++ [0][0][1][0][RTW89_WW][0] = 58, ++ [0][0][1][0][RTW89_WW][1] = 58, ++ [0][0][1][0][RTW89_WW][2] = 58, ++ [0][0][1][0][RTW89_WW][3] = 58, ++ [0][0][1][0][RTW89_WW][4] = 58, ++ [0][0][1][0][RTW89_WW][5] = 58, ++ [0][0][1][0][RTW89_WW][6] = 58, ++ [0][0][1][0][RTW89_WW][7] = 58, ++ [0][0][1][0][RTW89_WW][8] = 58, ++ [0][0][1][0][RTW89_WW][9] = 58, ++ [0][0][1][0][RTW89_WW][10] = 58, ++ [0][0][1][0][RTW89_WW][11] = 54, ++ [0][0][1][0][RTW89_WW][12] = 50, ++ [0][0][1][0][RTW89_WW][13] = 0, ++ [0][1][1][0][RTW89_WW][0] = 46, ++ [0][1][1][0][RTW89_WW][1] = 46, ++ [0][1][1][0][RTW89_WW][2] = 46, ++ [0][1][1][0][RTW89_WW][3] = 46, ++ [0][1][1][0][RTW89_WW][4] = 46, ++ [0][1][1][0][RTW89_WW][5] = 46, ++ [0][1][1][0][RTW89_WW][6] = 46, ++ [0][1][1][0][RTW89_WW][7] = 46, ++ [0][1][1][0][RTW89_WW][8] = 46, ++ [0][1][1][0][RTW89_WW][9] = 46, ++ [0][1][1][0][RTW89_WW][10] = 46, ++ [0][1][1][0][RTW89_WW][11] = 46, ++ [0][1][1][0][RTW89_WW][12] = 42, ++ [0][1][1][0][RTW89_WW][13] = 0, ++ [0][0][2][0][RTW89_WW][0] = 58, ++ [0][0][2][0][RTW89_WW][1] = 58, ++ [0][0][2][0][RTW89_WW][2] = 58, ++ [0][0][2][0][RTW89_WW][3] = 58, ++ [0][0][2][0][RTW89_WW][4] = 58, ++ [0][0][2][0][RTW89_WW][5] = 58, ++ [0][0][2][0][RTW89_WW][6] = 58, ++ [0][0][2][0][RTW89_WW][7] = 58, ++ [0][0][2][0][RTW89_WW][8] = 58, ++ [0][0][2][0][RTW89_WW][9] = 58, ++ [0][0][2][0][RTW89_WW][10] = 58, ++ [0][0][2][0][RTW89_WW][11] = 54, ++ [0][0][2][0][RTW89_WW][12] = 50, ++ [0][0][2][0][RTW89_WW][13] = 0, ++ [0][1][2][0][RTW89_WW][0] = 46, ++ [0][1][2][0][RTW89_WW][1] = 46, ++ [0][1][2][0][RTW89_WW][2] = 46, ++ [0][1][2][0][RTW89_WW][3] = 46, ++ [0][1][2][0][RTW89_WW][4] = 46, ++ [0][1][2][0][RTW89_WW][5] = 46, ++ [0][1][2][0][RTW89_WW][6] = 46, ++ [0][1][2][0][RTW89_WW][7] = 46, ++ [0][1][2][0][RTW89_WW][8] = 46, ++ [0][1][2][0][RTW89_WW][9] = 46, ++ [0][1][2][0][RTW89_WW][10] = 46, ++ [0][1][2][0][RTW89_WW][11] = 46, ++ [0][1][2][0][RTW89_WW][12] = 42, ++ [0][1][2][0][RTW89_WW][13] = 0, ++ [0][1][2][1][RTW89_WW][0] = 34, ++ [0][1][2][1][RTW89_WW][1] = 34, ++ [0][1][2][1][RTW89_WW][2] = 34, ++ [0][1][2][1][RTW89_WW][3] = 34, ++ [0][1][2][1][RTW89_WW][4] = 34, ++ [0][1][2][1][RTW89_WW][5] = 34, ++ [0][1][2][1][RTW89_WW][6] = 34, ++ [0][1][2][1][RTW89_WW][7] = 34, ++ [0][1][2][1][RTW89_WW][8] = 34, ++ [0][1][2][1][RTW89_WW][9] = 34, ++ [0][1][2][1][RTW89_WW][10] = 34, ++ [0][1][2][1][RTW89_WW][11] = 34, ++ [0][1][2][1][RTW89_WW][12] = 34, ++ [0][1][2][1][RTW89_WW][13] = 0, ++ [1][0][2][0][RTW89_WW][0] = 0, ++ [1][0][2][0][RTW89_WW][1] = 0, ++ [1][0][2][0][RTW89_WW][2] = 58, ++ [1][0][2][0][RTW89_WW][3] = 58, ++ [1][0][2][0][RTW89_WW][4] = 58, ++ [1][0][2][0][RTW89_WW][5] = 58, ++ [1][0][2][0][RTW89_WW][6] = 58, ++ [1][0][2][0][RTW89_WW][7] = 58, ++ [1][0][2][0][RTW89_WW][8] = 58, ++ [1][0][2][0][RTW89_WW][9] = 58, ++ [1][0][2][0][RTW89_WW][10] = 58, ++ [1][0][2][0][RTW89_WW][11] = 0, ++ [1][0][2][0][RTW89_WW][12] = 0, ++ [1][0][2][0][RTW89_WW][13] = 0, ++ [1][1][2][0][RTW89_WW][0] = 0, ++ [1][1][2][0][RTW89_WW][1] = 0, ++ [1][1][2][0][RTW89_WW][2] = 46, ++ [1][1][2][0][RTW89_WW][3] = 46, ++ [1][1][2][0][RTW89_WW][4] = 46, ++ [1][1][2][0][RTW89_WW][5] = 46, ++ [1][1][2][0][RTW89_WW][6] = 46, ++ [1][1][2][0][RTW89_WW][7] = 46, ++ [1][1][2][0][RTW89_WW][8] = 46, ++ [1][1][2][0][RTW89_WW][9] = 42, ++ [1][1][2][0][RTW89_WW][10] = 38, ++ [1][1][2][0][RTW89_WW][11] = 0, ++ [1][1][2][0][RTW89_WW][12] = 0, ++ [1][1][2][0][RTW89_WW][13] = 0, ++ [1][1][2][1][RTW89_WW][0] = 0, ++ [1][1][2][1][RTW89_WW][1] = 0, ++ [1][1][2][1][RTW89_WW][2] = 34, ++ [1][1][2][1][RTW89_WW][3] = 34, ++ [1][1][2][1][RTW89_WW][4] = 34, ++ [1][1][2][1][RTW89_WW][5] = 34, ++ [1][1][2][1][RTW89_WW][6] = 34, ++ [1][1][2][1][RTW89_WW][7] = 34, ++ [1][1][2][1][RTW89_WW][8] = 34, ++ [1][1][2][1][RTW89_WW][9] = 34, ++ [1][1][2][1][RTW89_WW][10] = 34, ++ [1][1][2][1][RTW89_WW][11] = 0, ++ [1][1][2][1][RTW89_WW][12] = 0, ++ [1][1][2][1][RTW89_WW][13] = 0, ++ [0][0][0][0][RTW89_FCC][0] = 78, ++ [0][0][0][0][RTW89_ETSI][0] = 58, ++ [0][0][0][0][RTW89_MKK][0] = 68, ++ [0][0][0][0][RTW89_IC][0] = 78, ++ [0][0][0][0][RTW89_KCC][0] = 68, ++ [0][0][0][0][RTW89_ACMA][0] = 58, ++ [0][0][0][0][RTW89_CHILE][0] = 64, ++ [0][0][0][0][RTW89_UKRAINE][0] = 58, ++ [0][0][0][0][RTW89_MEXICO][0] = 78, ++ [0][0][0][0][RTW89_CN][0] = 58, ++ [0][0][0][0][RTW89_QATAR][0] = 58, ++ [0][0][0][0][RTW89_UK][0] = 58, ++ [0][0][0][0][RTW89_FCC][1] = 78, ++ [0][0][0][0][RTW89_ETSI][1] = 58, ++ [0][0][0][0][RTW89_MKK][1] = 68, ++ [0][0][0][0][RTW89_IC][1] = 78, ++ [0][0][0][0][RTW89_KCC][1] = 68, ++ [0][0][0][0][RTW89_ACMA][1] = 58, ++ [0][0][0][0][RTW89_CHILE][1] = 64, ++ [0][0][0][0][RTW89_UKRAINE][1] = 58, ++ [0][0][0][0][RTW89_MEXICO][1] = 78, ++ [0][0][0][0][RTW89_CN][1] = 58, ++ [0][0][0][0][RTW89_QATAR][1] = 58, ++ [0][0][0][0][RTW89_UK][1] = 58, ++ [0][0][0][0][RTW89_FCC][2] = 78, ++ [0][0][0][0][RTW89_ETSI][2] = 58, ++ [0][0][0][0][RTW89_MKK][2] = 68, ++ [0][0][0][0][RTW89_IC][2] = 78, ++ [0][0][0][0][RTW89_KCC][2] = 68, ++ [0][0][0][0][RTW89_ACMA][2] = 58, ++ [0][0][0][0][RTW89_CHILE][2] = 64, ++ [0][0][0][0][RTW89_UKRAINE][2] = 58, ++ [0][0][0][0][RTW89_MEXICO][2] = 78, ++ [0][0][0][0][RTW89_CN][2] = 58, ++ [0][0][0][0][RTW89_QATAR][2] = 58, ++ [0][0][0][0][RTW89_UK][2] = 58, ++ [0][0][0][0][RTW89_FCC][3] = 78, ++ [0][0][0][0][RTW89_ETSI][3] = 58, ++ [0][0][0][0][RTW89_MKK][3] = 68, ++ [0][0][0][0][RTW89_IC][3] = 78, ++ [0][0][0][0][RTW89_KCC][3] = 68, ++ [0][0][0][0][RTW89_ACMA][3] = 58, ++ [0][0][0][0][RTW89_CHILE][3] = 64, ++ [0][0][0][0][RTW89_UKRAINE][3] = 58, ++ [0][0][0][0][RTW89_MEXICO][3] = 78, ++ [0][0][0][0][RTW89_CN][3] = 58, ++ [0][0][0][0][RTW89_QATAR][3] = 58, ++ [0][0][0][0][RTW89_UK][3] = 58, ++ [0][0][0][0][RTW89_FCC][4] = 78, ++ [0][0][0][0][RTW89_ETSI][4] = 58, ++ [0][0][0][0][RTW89_MKK][4] = 68, ++ [0][0][0][0][RTW89_IC][4] = 78, ++ [0][0][0][0][RTW89_KCC][4] = 70, ++ [0][0][0][0][RTW89_ACMA][4] = 58, ++ [0][0][0][0][RTW89_CHILE][4] = 64, ++ [0][0][0][0][RTW89_UKRAINE][4] = 58, ++ [0][0][0][0][RTW89_MEXICO][4] = 78, ++ [0][0][0][0][RTW89_CN][4] = 58, ++ [0][0][0][0][RTW89_QATAR][4] = 58, ++ [0][0][0][0][RTW89_UK][4] = 58, ++ [0][0][0][0][RTW89_FCC][5] = 78, ++ [0][0][0][0][RTW89_ETSI][5] = 58, ++ [0][0][0][0][RTW89_MKK][5] = 68, ++ [0][0][0][0][RTW89_IC][5] = 78, ++ [0][0][0][0][RTW89_KCC][5] = 70, ++ [0][0][0][0][RTW89_ACMA][5] = 58, ++ [0][0][0][0][RTW89_CHILE][5] = 64, ++ [0][0][0][0][RTW89_UKRAINE][5] = 58, ++ [0][0][0][0][RTW89_MEXICO][5] = 78, ++ [0][0][0][0][RTW89_CN][5] = 58, ++ [0][0][0][0][RTW89_QATAR][5] = 58, ++ [0][0][0][0][RTW89_UK][5] = 58, ++ [0][0][0][0][RTW89_FCC][6] = 78, ++ [0][0][0][0][RTW89_ETSI][6] = 58, ++ [0][0][0][0][RTW89_MKK][6] = 68, ++ [0][0][0][0][RTW89_IC][6] = 78, ++ [0][0][0][0][RTW89_KCC][6] = 70, ++ [0][0][0][0][RTW89_ACMA][6] = 58, ++ [0][0][0][0][RTW89_CHILE][6] = 64, ++ [0][0][0][0][RTW89_UKRAINE][6] = 58, ++ [0][0][0][0][RTW89_MEXICO][6] = 78, ++ [0][0][0][0][RTW89_CN][6] = 58, ++ [0][0][0][0][RTW89_QATAR][6] = 58, ++ [0][0][0][0][RTW89_UK][6] = 58, ++ [0][0][0][0][RTW89_FCC][7] = 78, ++ [0][0][0][0][RTW89_ETSI][7] = 58, ++ [0][0][0][0][RTW89_MKK][7] = 68, ++ [0][0][0][0][RTW89_IC][7] = 78, ++ [0][0][0][0][RTW89_KCC][7] = 70, ++ [0][0][0][0][RTW89_ACMA][7] = 58, ++ [0][0][0][0][RTW89_CHILE][7] = 64, ++ [0][0][0][0][RTW89_UKRAINE][7] = 58, ++ [0][0][0][0][RTW89_MEXICO][7] = 78, ++ [0][0][0][0][RTW89_CN][7] = 58, ++ [0][0][0][0][RTW89_QATAR][7] = 58, ++ [0][0][0][0][RTW89_UK][7] = 58, ++ [0][0][0][0][RTW89_FCC][8] = 78, ++ [0][0][0][0][RTW89_ETSI][8] = 58, ++ [0][0][0][0][RTW89_MKK][8] = 68, ++ [0][0][0][0][RTW89_IC][8] = 78, ++ [0][0][0][0][RTW89_KCC][8] = 70, ++ [0][0][0][0][RTW89_ACMA][8] = 58, ++ [0][0][0][0][RTW89_CHILE][8] = 64, ++ [0][0][0][0][RTW89_UKRAINE][8] = 58, ++ [0][0][0][0][RTW89_MEXICO][8] = 78, ++ [0][0][0][0][RTW89_CN][8] = 58, ++ [0][0][0][0][RTW89_QATAR][8] = 58, ++ [0][0][0][0][RTW89_UK][8] = 58, ++ [0][0][0][0][RTW89_FCC][9] = 78, ++ [0][0][0][0][RTW89_ETSI][9] = 58, ++ [0][0][0][0][RTW89_MKK][9] = 68, ++ [0][0][0][0][RTW89_IC][9] = 78, ++ [0][0][0][0][RTW89_KCC][9] = 70, ++ [0][0][0][0][RTW89_ACMA][9] = 58, ++ [0][0][0][0][RTW89_CHILE][9] = 64, ++ [0][0][0][0][RTW89_UKRAINE][9] = 58, ++ [0][0][0][0][RTW89_MEXICO][9] = 78, ++ [0][0][0][0][RTW89_CN][9] = 58, ++ [0][0][0][0][RTW89_QATAR][9] = 58, ++ [0][0][0][0][RTW89_UK][9] = 58, ++ [0][0][0][0][RTW89_FCC][10] = 78, ++ [0][0][0][0][RTW89_ETSI][10] = 58, ++ [0][0][0][0][RTW89_MKK][10] = 68, ++ [0][0][0][0][RTW89_IC][10] = 78, ++ [0][0][0][0][RTW89_KCC][10] = 70, ++ [0][0][0][0][RTW89_ACMA][10] = 58, ++ [0][0][0][0][RTW89_CHILE][10] = 66, ++ [0][0][0][0][RTW89_UKRAINE][10] = 58, ++ [0][0][0][0][RTW89_MEXICO][10] = 78, ++ [0][0][0][0][RTW89_CN][10] = 58, ++ [0][0][0][0][RTW89_QATAR][10] = 58, ++ [0][0][0][0][RTW89_UK][10] = 58, ++ [0][0][0][0][RTW89_FCC][11] = 70, ++ [0][0][0][0][RTW89_ETSI][11] = 58, ++ [0][0][0][0][RTW89_MKK][11] = 68, ++ [0][0][0][0][RTW89_IC][11] = 70, ++ [0][0][0][0][RTW89_KCC][11] = 70, ++ [0][0][0][0][RTW89_ACMA][11] = 58, ++ [0][0][0][0][RTW89_CHILE][11] = 64, ++ [0][0][0][0][RTW89_UKRAINE][11] = 58, ++ [0][0][0][0][RTW89_MEXICO][11] = 70, ++ [0][0][0][0][RTW89_CN][11] = 58, ++ [0][0][0][0][RTW89_QATAR][11] = 58, ++ [0][0][0][0][RTW89_UK][11] = 58, ++ [0][0][0][0][RTW89_FCC][12] = 56, ++ [0][0][0][0][RTW89_ETSI][12] = 58, ++ [0][0][0][0][RTW89_MKK][12] = 68, ++ [0][0][0][0][RTW89_IC][12] = 56, ++ [0][0][0][0][RTW89_KCC][12] = 70, ++ [0][0][0][0][RTW89_ACMA][12] = 58, ++ [0][0][0][0][RTW89_CHILE][12] = 56, ++ [0][0][0][0][RTW89_UKRAINE][12] = 58, ++ [0][0][0][0][RTW89_MEXICO][12] = 56, ++ [0][0][0][0][RTW89_CN][12] = 58, ++ [0][0][0][0][RTW89_QATAR][12] = 58, ++ [0][0][0][0][RTW89_UK][12] = 58, ++ [0][0][0][0][RTW89_FCC][13] = 127, ++ [0][0][0][0][RTW89_ETSI][13] = 127, ++ [0][0][0][0][RTW89_MKK][13] = 76, ++ [0][0][0][0][RTW89_IC][13] = 127, ++ [0][0][0][0][RTW89_KCC][13] = 127, ++ [0][0][0][0][RTW89_ACMA][13] = 127, ++ [0][0][0][0][RTW89_CHILE][13] = 127, ++ [0][0][0][0][RTW89_UKRAINE][13] = 127, ++ [0][0][0][0][RTW89_MEXICO][13] = 127, ++ [0][0][0][0][RTW89_CN][13] = 127, ++ [0][0][0][0][RTW89_QATAR][13] = 127, ++ [0][0][0][0][RTW89_UK][13] = 127, ++ [0][1][0][0][RTW89_FCC][0] = 74, ++ [0][1][0][0][RTW89_ETSI][0] = 46, ++ [0][1][0][0][RTW89_MKK][0] = 56, ++ [0][1][0][0][RTW89_IC][0] = 74, ++ [0][1][0][0][RTW89_KCC][0] = 58, ++ [0][1][0][0][RTW89_ACMA][0] = 46, ++ [0][1][0][0][RTW89_CHILE][0] = 50, ++ [0][1][0][0][RTW89_UKRAINE][0] = 46, ++ [0][1][0][0][RTW89_MEXICO][0] = 74, ++ [0][1][0][0][RTW89_CN][0] = 46, ++ [0][1][0][0][RTW89_QATAR][0] = 46, ++ [0][1][0][0][RTW89_UK][0] = 46, ++ [0][1][0][0][RTW89_FCC][1] = 74, ++ [0][1][0][0][RTW89_ETSI][1] = 46, ++ [0][1][0][0][RTW89_MKK][1] = 56, ++ [0][1][0][0][RTW89_IC][1] = 74, ++ [0][1][0][0][RTW89_KCC][1] = 58, ++ [0][1][0][0][RTW89_ACMA][1] = 46, ++ [0][1][0][0][RTW89_CHILE][1] = 50, ++ [0][1][0][0][RTW89_UKRAINE][1] = 46, ++ [0][1][0][0][RTW89_MEXICO][1] = 74, ++ [0][1][0][0][RTW89_CN][1] = 46, ++ [0][1][0][0][RTW89_QATAR][1] = 46, ++ [0][1][0][0][RTW89_UK][1] = 46, ++ [0][1][0][0][RTW89_FCC][2] = 74, ++ [0][1][0][0][RTW89_ETSI][2] = 46, ++ [0][1][0][0][RTW89_MKK][2] = 56, ++ [0][1][0][0][RTW89_IC][2] = 74, ++ [0][1][0][0][RTW89_KCC][2] = 58, ++ [0][1][0][0][RTW89_ACMA][2] = 46, ++ [0][1][0][0][RTW89_CHILE][2] = 50, ++ [0][1][0][0][RTW89_UKRAINE][2] = 46, ++ [0][1][0][0][RTW89_MEXICO][2] = 74, ++ [0][1][0][0][RTW89_CN][2] = 46, ++ [0][1][0][0][RTW89_QATAR][2] = 46, ++ [0][1][0][0][RTW89_UK][2] = 46, ++ [0][1][0][0][RTW89_FCC][3] = 74, ++ [0][1][0][0][RTW89_ETSI][3] = 46, ++ [0][1][0][0][RTW89_MKK][3] = 56, ++ [0][1][0][0][RTW89_IC][3] = 74, ++ [0][1][0][0][RTW89_KCC][3] = 58, ++ [0][1][0][0][RTW89_ACMA][3] = 46, ++ [0][1][0][0][RTW89_CHILE][3] = 50, ++ [0][1][0][0][RTW89_UKRAINE][3] = 46, ++ [0][1][0][0][RTW89_MEXICO][3] = 74, ++ [0][1][0][0][RTW89_CN][3] = 46, ++ [0][1][0][0][RTW89_QATAR][3] = 46, ++ [0][1][0][0][RTW89_UK][3] = 46, ++ [0][1][0][0][RTW89_FCC][4] = 74, ++ [0][1][0][0][RTW89_ETSI][4] = 46, ++ [0][1][0][0][RTW89_MKK][4] = 56, ++ [0][1][0][0][RTW89_IC][4] = 74, ++ [0][1][0][0][RTW89_KCC][4] = 56, ++ [0][1][0][0][RTW89_ACMA][4] = 46, ++ [0][1][0][0][RTW89_CHILE][4] = 50, ++ [0][1][0][0][RTW89_UKRAINE][4] = 46, ++ [0][1][0][0][RTW89_MEXICO][4] = 74, ++ [0][1][0][0][RTW89_CN][4] = 46, ++ [0][1][0][0][RTW89_QATAR][4] = 46, ++ [0][1][0][0][RTW89_UK][4] = 46, ++ [0][1][0][0][RTW89_FCC][5] = 74, ++ [0][1][0][0][RTW89_ETSI][5] = 46, ++ [0][1][0][0][RTW89_MKK][5] = 56, ++ [0][1][0][0][RTW89_IC][5] = 74, ++ [0][1][0][0][RTW89_KCC][5] = 56, ++ [0][1][0][0][RTW89_ACMA][5] = 46, ++ [0][1][0][0][RTW89_CHILE][5] = 50, ++ [0][1][0][0][RTW89_UKRAINE][5] = 46, ++ [0][1][0][0][RTW89_MEXICO][5] = 74, ++ [0][1][0][0][RTW89_CN][5] = 46, ++ [0][1][0][0][RTW89_QATAR][5] = 46, ++ [0][1][0][0][RTW89_UK][5] = 46, ++ [0][1][0][0][RTW89_FCC][6] = 74, ++ [0][1][0][0][RTW89_ETSI][6] = 46, ++ [0][1][0][0][RTW89_MKK][6] = 56, ++ [0][1][0][0][RTW89_IC][6] = 74, ++ [0][1][0][0][RTW89_KCC][6] = 56, ++ [0][1][0][0][RTW89_ACMA][6] = 46, ++ [0][1][0][0][RTW89_CHILE][6] = 52, ++ [0][1][0][0][RTW89_UKRAINE][6] = 46, ++ [0][1][0][0][RTW89_MEXICO][6] = 74, ++ [0][1][0][0][RTW89_CN][6] = 46, ++ [0][1][0][0][RTW89_QATAR][6] = 46, ++ [0][1][0][0][RTW89_UK][6] = 46, ++ [0][1][0][0][RTW89_FCC][7] = 74, ++ [0][1][0][0][RTW89_ETSI][7] = 46, ++ [0][1][0][0][RTW89_MKK][7] = 56, ++ [0][1][0][0][RTW89_IC][7] = 74, ++ [0][1][0][0][RTW89_KCC][7] = 56, ++ [0][1][0][0][RTW89_ACMA][7] = 46, ++ [0][1][0][0][RTW89_CHILE][7] = 50, ++ [0][1][0][0][RTW89_UKRAINE][7] = 46, ++ [0][1][0][0][RTW89_MEXICO][7] = 74, ++ [0][1][0][0][RTW89_CN][7] = 46, ++ [0][1][0][0][RTW89_QATAR][7] = 46, ++ [0][1][0][0][RTW89_UK][7] = 46, ++ [0][1][0][0][RTW89_FCC][8] = 74, ++ [0][1][0][0][RTW89_ETSI][8] = 46, ++ [0][1][0][0][RTW89_MKK][8] = 56, ++ [0][1][0][0][RTW89_IC][8] = 74, ++ [0][1][0][0][RTW89_KCC][8] = 56, ++ [0][1][0][0][RTW89_ACMA][8] = 46, ++ [0][1][0][0][RTW89_CHILE][8] = 50, ++ [0][1][0][0][RTW89_UKRAINE][8] = 46, ++ [0][1][0][0][RTW89_MEXICO][8] = 74, ++ [0][1][0][0][RTW89_CN][8] = 46, ++ [0][1][0][0][RTW89_QATAR][8] = 46, ++ [0][1][0][0][RTW89_UK][8] = 46, ++ [0][1][0][0][RTW89_FCC][9] = 74, ++ [0][1][0][0][RTW89_ETSI][9] = 46, ++ [0][1][0][0][RTW89_MKK][9] = 56, ++ [0][1][0][0][RTW89_IC][9] = 74, ++ [0][1][0][0][RTW89_KCC][9] = 54, ++ [0][1][0][0][RTW89_ACMA][9] = 46, ++ [0][1][0][0][RTW89_CHILE][9] = 50, ++ [0][1][0][0][RTW89_UKRAINE][9] = 46, ++ [0][1][0][0][RTW89_MEXICO][9] = 74, ++ [0][1][0][0][RTW89_CN][9] = 46, ++ [0][1][0][0][RTW89_QATAR][9] = 46, ++ [0][1][0][0][RTW89_UK][9] = 46, ++ [0][1][0][0][RTW89_FCC][10] = 74, ++ [0][1][0][0][RTW89_ETSI][10] = 46, ++ [0][1][0][0][RTW89_MKK][10] = 56, ++ [0][1][0][0][RTW89_IC][10] = 74, ++ [0][1][0][0][RTW89_KCC][10] = 54, ++ [0][1][0][0][RTW89_ACMA][10] = 46, ++ [0][1][0][0][RTW89_CHILE][10] = 52, ++ [0][1][0][0][RTW89_UKRAINE][10] = 46, ++ [0][1][0][0][RTW89_MEXICO][10] = 74, ++ [0][1][0][0][RTW89_CN][10] = 46, ++ [0][1][0][0][RTW89_QATAR][10] = 46, ++ [0][1][0][0][RTW89_UK][10] = 46, ++ [0][1][0][0][RTW89_FCC][11] = 54, ++ [0][1][0][0][RTW89_ETSI][11] = 46, ++ [0][1][0][0][RTW89_MKK][11] = 56, ++ [0][1][0][0][RTW89_IC][11] = 54, ++ [0][1][0][0][RTW89_KCC][11] = 54, ++ [0][1][0][0][RTW89_ACMA][11] = 46, ++ [0][1][0][0][RTW89_CHILE][11] = 50, ++ [0][1][0][0][RTW89_UKRAINE][11] = 46, ++ [0][1][0][0][RTW89_MEXICO][11] = 54, ++ [0][1][0][0][RTW89_CN][11] = 46, ++ [0][1][0][0][RTW89_QATAR][11] = 46, ++ [0][1][0][0][RTW89_UK][11] = 46, ++ [0][1][0][0][RTW89_FCC][12] = 42, ++ [0][1][0][0][RTW89_ETSI][12] = 46, ++ [0][1][0][0][RTW89_MKK][12] = 56, ++ [0][1][0][0][RTW89_IC][12] = 42, ++ [0][1][0][0][RTW89_KCC][12] = 54, ++ [0][1][0][0][RTW89_ACMA][12] = 46, ++ [0][1][0][0][RTW89_CHILE][12] = 42, ++ [0][1][0][0][RTW89_UKRAINE][12] = 46, ++ [0][1][0][0][RTW89_MEXICO][12] = 42, ++ [0][1][0][0][RTW89_CN][12] = 46, ++ [0][1][0][0][RTW89_QATAR][12] = 46, ++ [0][1][0][0][RTW89_UK][12] = 46, ++ [0][1][0][0][RTW89_FCC][13] = 127, ++ [0][1][0][0][RTW89_ETSI][13] = 127, ++ [0][1][0][0][RTW89_MKK][13] = 64, ++ [0][1][0][0][RTW89_IC][13] = 127, ++ [0][1][0][0][RTW89_KCC][13] = 127, ++ [0][1][0][0][RTW89_ACMA][13] = 127, ++ [0][1][0][0][RTW89_CHILE][13] = 127, ++ [0][1][0][0][RTW89_UKRAINE][13] = 127, ++ [0][1][0][0][RTW89_MEXICO][13] = 127, ++ [0][1][0][0][RTW89_CN][13] = 127, ++ [0][1][0][0][RTW89_QATAR][13] = 127, ++ [0][1][0][0][RTW89_UK][13] = 127, ++ [1][0][0][0][RTW89_FCC][0] = 127, ++ [1][0][0][0][RTW89_ETSI][0] = 127, ++ [1][0][0][0][RTW89_MKK][0] = 127, ++ [1][0][0][0][RTW89_IC][0] = 127, ++ [1][0][0][0][RTW89_KCC][0] = 127, ++ [1][0][0][0][RTW89_ACMA][0] = 127, ++ [1][0][0][0][RTW89_CHILE][0] = 127, ++ [1][0][0][0][RTW89_UKRAINE][0] = 127, ++ [1][0][0][0][RTW89_MEXICO][0] = 127, ++ [1][0][0][0][RTW89_CN][0] = 127, ++ [1][0][0][0][RTW89_QATAR][0] = 127, ++ [1][0][0][0][RTW89_UK][0] = 127, ++ [1][0][0][0][RTW89_FCC][1] = 127, ++ [1][0][0][0][RTW89_ETSI][1] = 127, ++ [1][0][0][0][RTW89_MKK][1] = 127, ++ [1][0][0][0][RTW89_IC][1] = 127, ++ [1][0][0][0][RTW89_KCC][1] = 127, ++ [1][0][0][0][RTW89_ACMA][1] = 127, ++ [1][0][0][0][RTW89_CHILE][1] = 127, ++ [1][0][0][0][RTW89_UKRAINE][1] = 127, ++ [1][0][0][0][RTW89_MEXICO][1] = 127, ++ [1][0][0][0][RTW89_CN][1] = 127, ++ [1][0][0][0][RTW89_QATAR][1] = 127, ++ [1][0][0][0][RTW89_UK][1] = 127, ++ [1][0][0][0][RTW89_FCC][2] = 50, ++ [1][0][0][0][RTW89_ETSI][2] = 58, ++ [1][0][0][0][RTW89_MKK][2] = 76, ++ [1][0][0][0][RTW89_IC][2] = 50, ++ [1][0][0][0][RTW89_KCC][2] = 70, ++ [1][0][0][0][RTW89_ACMA][2] = 58, ++ [1][0][0][0][RTW89_CHILE][2] = 62, ++ [1][0][0][0][RTW89_UKRAINE][2] = 58, ++ [1][0][0][0][RTW89_MEXICO][2] = 50, ++ [1][0][0][0][RTW89_CN][2] = 58, ++ [1][0][0][0][RTW89_QATAR][2] = 58, ++ [1][0][0][0][RTW89_UK][2] = 58, ++ [1][0][0][0][RTW89_FCC][3] = 50, ++ [1][0][0][0][RTW89_ETSI][3] = 58, ++ [1][0][0][0][RTW89_MKK][3] = 76, ++ [1][0][0][0][RTW89_IC][3] = 50, ++ [1][0][0][0][RTW89_KCC][3] = 70, ++ [1][0][0][0][RTW89_ACMA][3] = 58, ++ [1][0][0][0][RTW89_CHILE][3] = 62, ++ [1][0][0][0][RTW89_UKRAINE][3] = 58, ++ [1][0][0][0][RTW89_MEXICO][3] = 50, ++ [1][0][0][0][RTW89_CN][3] = 58, ++ [1][0][0][0][RTW89_QATAR][3] = 58, ++ [1][0][0][0][RTW89_UK][3] = 58, ++ [1][0][0][0][RTW89_FCC][4] = 50, ++ [1][0][0][0][RTW89_ETSI][4] = 58, ++ [1][0][0][0][RTW89_MKK][4] = 76, ++ [1][0][0][0][RTW89_IC][4] = 50, ++ [1][0][0][0][RTW89_KCC][4] = 70, ++ [1][0][0][0][RTW89_ACMA][4] = 58, ++ [1][0][0][0][RTW89_CHILE][4] = 62, ++ [1][0][0][0][RTW89_UKRAINE][4] = 58, ++ [1][0][0][0][RTW89_MEXICO][4] = 50, ++ [1][0][0][0][RTW89_CN][4] = 58, ++ [1][0][0][0][RTW89_QATAR][4] = 58, ++ [1][0][0][0][RTW89_UK][4] = 58, ++ [1][0][0][0][RTW89_FCC][5] = 66, ++ [1][0][0][0][RTW89_ETSI][5] = 58, ++ [1][0][0][0][RTW89_MKK][5] = 76, ++ [1][0][0][0][RTW89_IC][5] = 66, ++ [1][0][0][0][RTW89_KCC][5] = 70, ++ [1][0][0][0][RTW89_ACMA][5] = 58, ++ [1][0][0][0][RTW89_CHILE][5] = 62, ++ [1][0][0][0][RTW89_UKRAINE][5] = 58, ++ [1][0][0][0][RTW89_MEXICO][5] = 66, ++ [1][0][0][0][RTW89_CN][5] = 58, ++ [1][0][0][0][RTW89_QATAR][5] = 58, ++ [1][0][0][0][RTW89_UK][5] = 58, ++ [1][0][0][0][RTW89_FCC][6] = 50, ++ [1][0][0][0][RTW89_ETSI][6] = 58, ++ [1][0][0][0][RTW89_MKK][6] = 76, ++ [1][0][0][0][RTW89_IC][6] = 50, ++ [1][0][0][0][RTW89_KCC][6] = 70, ++ [1][0][0][0][RTW89_ACMA][6] = 58, ++ [1][0][0][0][RTW89_CHILE][6] = 62, ++ [1][0][0][0][RTW89_UKRAINE][6] = 58, ++ [1][0][0][0][RTW89_MEXICO][6] = 50, ++ [1][0][0][0][RTW89_CN][6] = 58, ++ [1][0][0][0][RTW89_QATAR][6] = 58, ++ [1][0][0][0][RTW89_UK][6] = 58, ++ [1][0][0][0][RTW89_FCC][7] = 50, ++ [1][0][0][0][RTW89_ETSI][7] = 58, ++ [1][0][0][0][RTW89_MKK][7] = 76, ++ [1][0][0][0][RTW89_IC][7] = 50, ++ [1][0][0][0][RTW89_KCC][7] = 70, ++ [1][0][0][0][RTW89_ACMA][7] = 58, ++ [1][0][0][0][RTW89_CHILE][7] = 62, ++ [1][0][0][0][RTW89_UKRAINE][7] = 58, ++ [1][0][0][0][RTW89_MEXICO][7] = 50, ++ [1][0][0][0][RTW89_CN][7] = 58, ++ [1][0][0][0][RTW89_QATAR][7] = 58, ++ [1][0][0][0][RTW89_UK][7] = 58, ++ [1][0][0][0][RTW89_FCC][8] = 50, ++ [1][0][0][0][RTW89_ETSI][8] = 58, ++ [1][0][0][0][RTW89_MKK][8] = 76, ++ [1][0][0][0][RTW89_IC][8] = 50, ++ [1][0][0][0][RTW89_KCC][8] = 70, ++ [1][0][0][0][RTW89_ACMA][8] = 58, ++ [1][0][0][0][RTW89_CHILE][8] = 62, ++ [1][0][0][0][RTW89_UKRAINE][8] = 58, ++ [1][0][0][0][RTW89_MEXICO][8] = 50, ++ [1][0][0][0][RTW89_CN][8] = 58, ++ [1][0][0][0][RTW89_QATAR][8] = 58, ++ [1][0][0][0][RTW89_UK][8] = 58, ++ [1][0][0][0][RTW89_FCC][9] = 42, ++ [1][0][0][0][RTW89_ETSI][9] = 58, ++ [1][0][0][0][RTW89_MKK][9] = 76, ++ [1][0][0][0][RTW89_IC][9] = 42, ++ [1][0][0][0][RTW89_KCC][9] = 70, ++ [1][0][0][0][RTW89_ACMA][9] = 58, ++ [1][0][0][0][RTW89_CHILE][9] = 42, ++ [1][0][0][0][RTW89_UKRAINE][9] = 58, ++ [1][0][0][0][RTW89_MEXICO][9] = 42, ++ [1][0][0][0][RTW89_CN][9] = 58, ++ [1][0][0][0][RTW89_QATAR][9] = 58, ++ [1][0][0][0][RTW89_UK][9] = 58, ++ [1][0][0][0][RTW89_FCC][10] = 30, ++ [1][0][0][0][RTW89_ETSI][10] = 58, ++ [1][0][0][0][RTW89_MKK][10] = 72, ++ [1][0][0][0][RTW89_IC][10] = 30, ++ [1][0][0][0][RTW89_KCC][10] = 70, ++ [1][0][0][0][RTW89_ACMA][10] = 58, ++ [1][0][0][0][RTW89_CHILE][10] = 30, ++ [1][0][0][0][RTW89_UKRAINE][10] = 58, ++ [1][0][0][0][RTW89_MEXICO][10] = 30, ++ [1][0][0][0][RTW89_CN][10] = 58, ++ [1][0][0][0][RTW89_QATAR][10] = 58, ++ [1][0][0][0][RTW89_UK][10] = 58, ++ [1][0][0][0][RTW89_FCC][11] = 127, ++ [1][0][0][0][RTW89_ETSI][11] = 127, ++ [1][0][0][0][RTW89_MKK][11] = 127, ++ [1][0][0][0][RTW89_IC][11] = 127, ++ [1][0][0][0][RTW89_KCC][11] = 127, ++ [1][0][0][0][RTW89_ACMA][11] = 127, ++ [1][0][0][0][RTW89_CHILE][11] = 127, ++ [1][0][0][0][RTW89_UKRAINE][11] = 127, ++ [1][0][0][0][RTW89_MEXICO][11] = 127, ++ [1][0][0][0][RTW89_CN][11] = 127, ++ [1][0][0][0][RTW89_QATAR][11] = 127, ++ [1][0][0][0][RTW89_UK][11] = 127, ++ [1][0][0][0][RTW89_FCC][12] = 127, ++ [1][0][0][0][RTW89_ETSI][12] = 127, ++ [1][0][0][0][RTW89_MKK][12] = 127, ++ [1][0][0][0][RTW89_IC][12] = 127, ++ [1][0][0][0][RTW89_KCC][12] = 127, ++ [1][0][0][0][RTW89_ACMA][12] = 127, ++ [1][0][0][0][RTW89_CHILE][12] = 127, ++ [1][0][0][0][RTW89_UKRAINE][12] = 127, ++ [1][0][0][0][RTW89_MEXICO][12] = 127, ++ [1][0][0][0][RTW89_CN][12] = 127, ++ [1][0][0][0][RTW89_QATAR][12] = 127, ++ [1][0][0][0][RTW89_UK][12] = 127, ++ [1][0][0][0][RTW89_FCC][13] = 127, ++ [1][0][0][0][RTW89_ETSI][13] = 127, ++ [1][0][0][0][RTW89_MKK][13] = 127, ++ [1][0][0][0][RTW89_IC][13] = 127, ++ [1][0][0][0][RTW89_KCC][13] = 127, ++ [1][0][0][0][RTW89_ACMA][13] = 127, ++ [1][0][0][0][RTW89_CHILE][13] = 127, ++ [1][0][0][0][RTW89_UKRAINE][13] = 127, ++ [1][0][0][0][RTW89_MEXICO][13] = 127, ++ [1][0][0][0][RTW89_CN][13] = 127, ++ [1][0][0][0][RTW89_QATAR][13] = 127, ++ [1][0][0][0][RTW89_UK][13] = 127, ++ [1][1][0][0][RTW89_FCC][0] = 127, ++ [1][1][0][0][RTW89_ETSI][0] = 127, ++ [1][1][0][0][RTW89_MKK][0] = 127, ++ [1][1][0][0][RTW89_IC][0] = 127, ++ [1][1][0][0][RTW89_KCC][0] = 127, ++ [1][1][0][0][RTW89_ACMA][0] = 127, ++ [1][1][0][0][RTW89_CHILE][0] = 127, ++ [1][1][0][0][RTW89_UKRAINE][0] = 127, ++ [1][1][0][0][RTW89_MEXICO][0] = 127, ++ [1][1][0][0][RTW89_CN][0] = 127, ++ [1][1][0][0][RTW89_QATAR][0] = 127, ++ [1][1][0][0][RTW89_UK][0] = 127, ++ [1][1][0][0][RTW89_FCC][1] = 127, ++ [1][1][0][0][RTW89_ETSI][1] = 127, ++ [1][1][0][0][RTW89_MKK][1] = 127, ++ [1][1][0][0][RTW89_IC][1] = 127, ++ [1][1][0][0][RTW89_KCC][1] = 127, ++ [1][1][0][0][RTW89_ACMA][1] = 127, ++ [1][1][0][0][RTW89_CHILE][1] = 127, ++ [1][1][0][0][RTW89_UKRAINE][1] = 127, ++ [1][1][0][0][RTW89_MEXICO][1] = 127, ++ [1][1][0][0][RTW89_CN][1] = 127, ++ [1][1][0][0][RTW89_QATAR][1] = 127, ++ [1][1][0][0][RTW89_UK][1] = 127, ++ [1][1][0][0][RTW89_FCC][2] = 46, ++ [1][1][0][0][RTW89_ETSI][2] = 46, ++ [1][1][0][0][RTW89_MKK][2] = 64, ++ [1][1][0][0][RTW89_IC][2] = 46, ++ [1][1][0][0][RTW89_KCC][2] = 58, ++ [1][1][0][0][RTW89_ACMA][2] = 46, ++ [1][1][0][0][RTW89_CHILE][2] = 50, ++ [1][1][0][0][RTW89_UKRAINE][2] = 46, ++ [1][1][0][0][RTW89_MEXICO][2] = 46, ++ [1][1][0][0][RTW89_CN][2] = 46, ++ [1][1][0][0][RTW89_QATAR][2] = 46, ++ [1][1][0][0][RTW89_UK][2] = 46, ++ [1][1][0][0][RTW89_FCC][3] = 46, ++ [1][1][0][0][RTW89_ETSI][3] = 46, ++ [1][1][0][0][RTW89_MKK][3] = 64, ++ [1][1][0][0][RTW89_IC][3] = 46, ++ [1][1][0][0][RTW89_KCC][3] = 58, ++ [1][1][0][0][RTW89_ACMA][3] = 46, ++ [1][1][0][0][RTW89_CHILE][3] = 50, ++ [1][1][0][0][RTW89_UKRAINE][3] = 46, ++ [1][1][0][0][RTW89_MEXICO][3] = 46, ++ [1][1][0][0][RTW89_CN][3] = 46, ++ [1][1][0][0][RTW89_QATAR][3] = 46, ++ [1][1][0][0][RTW89_UK][3] = 46, ++ [1][1][0][0][RTW89_FCC][4] = 46, ++ [1][1][0][0][RTW89_ETSI][4] = 46, ++ [1][1][0][0][RTW89_MKK][4] = 64, ++ [1][1][0][0][RTW89_IC][4] = 46, ++ [1][1][0][0][RTW89_KCC][4] = 58, ++ [1][1][0][0][RTW89_ACMA][4] = 46, ++ [1][1][0][0][RTW89_CHILE][4] = 50, ++ [1][1][0][0][RTW89_UKRAINE][4] = 46, ++ [1][1][0][0][RTW89_MEXICO][4] = 46, ++ [1][1][0][0][RTW89_CN][4] = 46, ++ [1][1][0][0][RTW89_QATAR][4] = 46, ++ [1][1][0][0][RTW89_UK][4] = 46, ++ [1][1][0][0][RTW89_FCC][5] = 62, ++ [1][1][0][0][RTW89_ETSI][5] = 46, ++ [1][1][0][0][RTW89_MKK][5] = 64, ++ [1][1][0][0][RTW89_IC][5] = 62, ++ [1][1][0][0][RTW89_KCC][5] = 58, ++ [1][1][0][0][RTW89_ACMA][5] = 46, ++ [1][1][0][0][RTW89_CHILE][5] = 50, ++ [1][1][0][0][RTW89_UKRAINE][5] = 46, ++ [1][1][0][0][RTW89_MEXICO][5] = 62, ++ [1][1][0][0][RTW89_CN][5] = 46, ++ [1][1][0][0][RTW89_QATAR][5] = 46, ++ [1][1][0][0][RTW89_UK][5] = 46, ++ [1][1][0][0][RTW89_FCC][6] = 34, ++ [1][1][0][0][RTW89_ETSI][6] = 46, ++ [1][1][0][0][RTW89_MKK][6] = 64, ++ [1][1][0][0][RTW89_IC][6] = 34, ++ [1][1][0][0][RTW89_KCC][6] = 58, ++ [1][1][0][0][RTW89_ACMA][6] = 46, ++ [1][1][0][0][RTW89_CHILE][6] = 50, ++ [1][1][0][0][RTW89_UKRAINE][6] = 46, ++ [1][1][0][0][RTW89_MEXICO][6] = 34, ++ [1][1][0][0][RTW89_CN][6] = 46, ++ [1][1][0][0][RTW89_QATAR][6] = 46, ++ [1][1][0][0][RTW89_UK][6] = 46, ++ [1][1][0][0][RTW89_FCC][7] = 34, ++ [1][1][0][0][RTW89_ETSI][7] = 46, ++ [1][1][0][0][RTW89_MKK][7] = 64, ++ [1][1][0][0][RTW89_IC][7] = 34, ++ [1][1][0][0][RTW89_KCC][7] = 58, ++ [1][1][0][0][RTW89_ACMA][7] = 46, ++ [1][1][0][0][RTW89_CHILE][7] = 50, ++ [1][1][0][0][RTW89_UKRAINE][7] = 46, ++ [1][1][0][0][RTW89_MEXICO][7] = 34, ++ [1][1][0][0][RTW89_CN][7] = 46, ++ [1][1][0][0][RTW89_QATAR][7] = 46, ++ [1][1][0][0][RTW89_UK][7] = 46, ++ [1][1][0][0][RTW89_FCC][8] = 34, ++ [1][1][0][0][RTW89_ETSI][8] = 46, ++ [1][1][0][0][RTW89_MKK][8] = 64, ++ [1][1][0][0][RTW89_IC][8] = 34, ++ [1][1][0][0][RTW89_KCC][8] = 58, ++ [1][1][0][0][RTW89_ACMA][8] = 46, ++ [1][1][0][0][RTW89_CHILE][8] = 50, ++ [1][1][0][0][RTW89_UKRAINE][8] = 46, ++ [1][1][0][0][RTW89_MEXICO][8] = 34, ++ [1][1][0][0][RTW89_CN][8] = 46, ++ [1][1][0][0][RTW89_QATAR][8] = 46, ++ [1][1][0][0][RTW89_UK][8] = 46, ++ [1][1][0][0][RTW89_FCC][9] = 30, ++ [1][1][0][0][RTW89_ETSI][9] = 46, ++ [1][1][0][0][RTW89_MKK][9] = 64, ++ [1][1][0][0][RTW89_IC][9] = 30, ++ [1][1][0][0][RTW89_KCC][9] = 58, ++ [1][1][0][0][RTW89_ACMA][9] = 46, ++ [1][1][0][0][RTW89_CHILE][9] = 30, ++ [1][1][0][0][RTW89_UKRAINE][9] = 46, ++ [1][1][0][0][RTW89_MEXICO][9] = 30, ++ [1][1][0][0][RTW89_CN][9] = 46, ++ [1][1][0][0][RTW89_QATAR][9] = 46, ++ [1][1][0][0][RTW89_UK][9] = 46, ++ [1][1][0][0][RTW89_FCC][10] = 30, ++ [1][1][0][0][RTW89_ETSI][10] = 46, ++ [1][1][0][0][RTW89_MKK][10] = 64, ++ [1][1][0][0][RTW89_IC][10] = 30, ++ [1][1][0][0][RTW89_KCC][10] = 58, ++ [1][1][0][0][RTW89_ACMA][10] = 46, ++ [1][1][0][0][RTW89_CHILE][10] = 30, ++ [1][1][0][0][RTW89_UKRAINE][10] = 46, ++ [1][1][0][0][RTW89_MEXICO][10] = 30, ++ [1][1][0][0][RTW89_CN][10] = 46, ++ [1][1][0][0][RTW89_QATAR][10] = 46, ++ [1][1][0][0][RTW89_UK][10] = 46, ++ [1][1][0][0][RTW89_FCC][11] = 127, ++ [1][1][0][0][RTW89_ETSI][11] = 127, ++ [1][1][0][0][RTW89_MKK][11] = 127, ++ [1][1][0][0][RTW89_IC][11] = 127, ++ [1][1][0][0][RTW89_KCC][11] = 127, ++ [1][1][0][0][RTW89_ACMA][11] = 127, ++ [1][1][0][0][RTW89_CHILE][11] = 127, ++ [1][1][0][0][RTW89_UKRAINE][11] = 127, ++ [1][1][0][0][RTW89_MEXICO][11] = 127, ++ [1][1][0][0][RTW89_CN][11] = 127, ++ [1][1][0][0][RTW89_QATAR][11] = 127, ++ [1][1][0][0][RTW89_UK][11] = 127, ++ [1][1][0][0][RTW89_FCC][12] = 127, ++ [1][1][0][0][RTW89_ETSI][12] = 127, ++ [1][1][0][0][RTW89_MKK][12] = 127, ++ [1][1][0][0][RTW89_IC][12] = 127, ++ [1][1][0][0][RTW89_KCC][12] = 127, ++ [1][1][0][0][RTW89_ACMA][12] = 127, ++ [1][1][0][0][RTW89_CHILE][12] = 127, ++ [1][1][0][0][RTW89_UKRAINE][12] = 127, ++ [1][1][0][0][RTW89_MEXICO][12] = 127, ++ [1][1][0][0][RTW89_CN][12] = 127, ++ [1][1][0][0][RTW89_QATAR][12] = 127, ++ [1][1][0][0][RTW89_UK][12] = 127, ++ [1][1][0][0][RTW89_FCC][13] = 127, ++ [1][1][0][0][RTW89_ETSI][13] = 127, ++ [1][1][0][0][RTW89_MKK][13] = 127, ++ [1][1][0][0][RTW89_IC][13] = 127, ++ [1][1][0][0][RTW89_KCC][13] = 127, ++ [1][1][0][0][RTW89_ACMA][13] = 127, ++ [1][1][0][0][RTW89_CHILE][13] = 127, ++ [1][1][0][0][RTW89_UKRAINE][13] = 127, ++ [1][1][0][0][RTW89_MEXICO][13] = 127, ++ [1][1][0][0][RTW89_CN][13] = 127, ++ [1][1][0][0][RTW89_QATAR][13] = 127, ++ [1][1][0][0][RTW89_UK][13] = 127, ++ [0][0][1][0][RTW89_FCC][0] = 76, ++ [0][0][1][0][RTW89_ETSI][0] = 58, ++ [0][0][1][0][RTW89_MKK][0] = 74, ++ [0][0][1][0][RTW89_IC][0] = 76, ++ [0][0][1][0][RTW89_KCC][0] = 76, ++ [0][0][1][0][RTW89_ACMA][0] = 58, ++ [0][0][1][0][RTW89_CHILE][0] = 66, ++ [0][0][1][0][RTW89_UKRAINE][0] = 58, ++ [0][0][1][0][RTW89_MEXICO][0] = 76, ++ [0][0][1][0][RTW89_CN][0] = 58, ++ [0][0][1][0][RTW89_QATAR][0] = 58, ++ [0][0][1][0][RTW89_UK][0] = 58, ++ [0][0][1][0][RTW89_FCC][1] = 76, ++ [0][0][1][0][RTW89_ETSI][1] = 58, ++ [0][0][1][0][RTW89_MKK][1] = 76, ++ [0][0][1][0][RTW89_IC][1] = 76, ++ [0][0][1][0][RTW89_KCC][1] = 76, ++ [0][0][1][0][RTW89_ACMA][1] = 58, ++ [0][0][1][0][RTW89_CHILE][1] = 66, ++ [0][0][1][0][RTW89_UKRAINE][1] = 58, ++ [0][0][1][0][RTW89_MEXICO][1] = 76, ++ [0][0][1][0][RTW89_CN][1] = 58, ++ [0][0][1][0][RTW89_QATAR][1] = 58, ++ [0][0][1][0][RTW89_UK][1] = 58, ++ [0][0][1][0][RTW89_FCC][2] = 78, ++ [0][0][1][0][RTW89_ETSI][2] = 58, ++ [0][0][1][0][RTW89_MKK][2] = 76, ++ [0][0][1][0][RTW89_IC][2] = 78, ++ [0][0][1][0][RTW89_KCC][2] = 76, ++ [0][0][1][0][RTW89_ACMA][2] = 58, ++ [0][0][1][0][RTW89_CHILE][2] = 66, ++ [0][0][1][0][RTW89_UKRAINE][2] = 58, ++ [0][0][1][0][RTW89_MEXICO][2] = 78, ++ [0][0][1][0][RTW89_CN][2] = 58, ++ [0][0][1][0][RTW89_QATAR][2] = 58, ++ [0][0][1][0][RTW89_UK][2] = 58, ++ [0][0][1][0][RTW89_FCC][3] = 78, ++ [0][0][1][0][RTW89_ETSI][3] = 58, ++ [0][0][1][0][RTW89_MKK][3] = 76, ++ [0][0][1][0][RTW89_IC][3] = 78, ++ [0][0][1][0][RTW89_KCC][3] = 76, ++ [0][0][1][0][RTW89_ACMA][3] = 58, ++ [0][0][1][0][RTW89_CHILE][3] = 66, ++ [0][0][1][0][RTW89_UKRAINE][3] = 58, ++ [0][0][1][0][RTW89_MEXICO][3] = 78, ++ [0][0][1][0][RTW89_CN][3] = 58, ++ [0][0][1][0][RTW89_QATAR][3] = 58, ++ [0][0][1][0][RTW89_UK][3] = 58, ++ [0][0][1][0][RTW89_FCC][4] = 78, ++ [0][0][1][0][RTW89_ETSI][4] = 58, ++ [0][0][1][0][RTW89_MKK][4] = 76, ++ [0][0][1][0][RTW89_IC][4] = 78, ++ [0][0][1][0][RTW89_KCC][4] = 76, ++ [0][0][1][0][RTW89_ACMA][4] = 58, ++ [0][0][1][0][RTW89_CHILE][4] = 66, ++ [0][0][1][0][RTW89_UKRAINE][4] = 58, ++ [0][0][1][0][RTW89_MEXICO][4] = 78, ++ [0][0][1][0][RTW89_CN][4] = 58, ++ [0][0][1][0][RTW89_QATAR][4] = 58, ++ [0][0][1][0][RTW89_UK][4] = 58, ++ [0][0][1][0][RTW89_FCC][5] = 78, ++ [0][0][1][0][RTW89_ETSI][5] = 58, ++ [0][0][1][0][RTW89_MKK][5] = 76, ++ [0][0][1][0][RTW89_IC][5] = 78, ++ [0][0][1][0][RTW89_KCC][5] = 76, ++ [0][0][1][0][RTW89_ACMA][5] = 58, ++ [0][0][1][0][RTW89_CHILE][5] = 66, ++ [0][0][1][0][RTW89_UKRAINE][5] = 58, ++ [0][0][1][0][RTW89_MEXICO][5] = 78, ++ [0][0][1][0][RTW89_CN][5] = 58, ++ [0][0][1][0][RTW89_QATAR][5] = 58, ++ [0][0][1][0][RTW89_UK][5] = 58, ++ [0][0][1][0][RTW89_FCC][6] = 78, ++ [0][0][1][0][RTW89_ETSI][6] = 58, ++ [0][0][1][0][RTW89_MKK][6] = 76, ++ [0][0][1][0][RTW89_IC][6] = 78, ++ [0][0][1][0][RTW89_KCC][6] = 76, ++ [0][0][1][0][RTW89_ACMA][6] = 58, ++ [0][0][1][0][RTW89_CHILE][6] = 66, ++ [0][0][1][0][RTW89_UKRAINE][6] = 58, ++ [0][0][1][0][RTW89_MEXICO][6] = 78, ++ [0][0][1][0][RTW89_CN][6] = 58, ++ [0][0][1][0][RTW89_QATAR][6] = 58, ++ [0][0][1][0][RTW89_UK][6] = 58, ++ [0][0][1][0][RTW89_FCC][7] = 78, ++ [0][0][1][0][RTW89_ETSI][7] = 58, ++ [0][0][1][0][RTW89_MKK][7] = 76, ++ [0][0][1][0][RTW89_IC][7] = 78, ++ [0][0][1][0][RTW89_KCC][7] = 76, ++ [0][0][1][0][RTW89_ACMA][7] = 58, ++ [0][0][1][0][RTW89_CHILE][7] = 66, ++ [0][0][1][0][RTW89_UKRAINE][7] = 58, ++ [0][0][1][0][RTW89_MEXICO][7] = 78, ++ [0][0][1][0][RTW89_CN][7] = 58, ++ [0][0][1][0][RTW89_QATAR][7] = 58, ++ [0][0][1][0][RTW89_UK][7] = 58, ++ [0][0][1][0][RTW89_FCC][8] = 78, ++ [0][0][1][0][RTW89_ETSI][8] = 58, ++ [0][0][1][0][RTW89_MKK][8] = 76, ++ [0][0][1][0][RTW89_IC][8] = 78, ++ [0][0][1][0][RTW89_KCC][8] = 76, ++ [0][0][1][0][RTW89_ACMA][8] = 58, ++ [0][0][1][0][RTW89_CHILE][8] = 66, ++ [0][0][1][0][RTW89_UKRAINE][8] = 58, ++ [0][0][1][0][RTW89_MEXICO][8] = 78, ++ [0][0][1][0][RTW89_CN][8] = 58, ++ [0][0][1][0][RTW89_QATAR][8] = 58, ++ [0][0][1][0][RTW89_UK][8] = 58, ++ [0][0][1][0][RTW89_FCC][9] = 74, ++ [0][0][1][0][RTW89_ETSI][9] = 58, ++ [0][0][1][0][RTW89_MKK][9] = 76, ++ [0][0][1][0][RTW89_IC][9] = 74, ++ [0][0][1][0][RTW89_KCC][9] = 76, ++ [0][0][1][0][RTW89_ACMA][9] = 58, ++ [0][0][1][0][RTW89_CHILE][9] = 66, ++ [0][0][1][0][RTW89_UKRAINE][9] = 58, ++ [0][0][1][0][RTW89_MEXICO][9] = 74, ++ [0][0][1][0][RTW89_CN][9] = 58, ++ [0][0][1][0][RTW89_QATAR][9] = 58, ++ [0][0][1][0][RTW89_UK][9] = 58, ++ [0][0][1][0][RTW89_FCC][10] = 74, ++ [0][0][1][0][RTW89_ETSI][10] = 58, ++ [0][0][1][0][RTW89_MKK][10] = 76, ++ [0][0][1][0][RTW89_IC][10] = 74, ++ [0][0][1][0][RTW89_KCC][10] = 76, ++ [0][0][1][0][RTW89_ACMA][10] = 58, ++ [0][0][1][0][RTW89_CHILE][10] = 66, ++ [0][0][1][0][RTW89_UKRAINE][10] = 58, ++ [0][0][1][0][RTW89_MEXICO][10] = 74, ++ [0][0][1][0][RTW89_CN][10] = 58, ++ [0][0][1][0][RTW89_QATAR][10] = 58, ++ [0][0][1][0][RTW89_UK][10] = 58, ++ [0][0][1][0][RTW89_FCC][11] = 54, ++ [0][0][1][0][RTW89_ETSI][11] = 58, ++ [0][0][1][0][RTW89_MKK][11] = 76, ++ [0][0][1][0][RTW89_IC][11] = 54, ++ [0][0][1][0][RTW89_KCC][11] = 76, ++ [0][0][1][0][RTW89_ACMA][11] = 58, ++ [0][0][1][0][RTW89_CHILE][11] = 54, ++ [0][0][1][0][RTW89_UKRAINE][11] = 58, ++ [0][0][1][0][RTW89_MEXICO][11] = 54, ++ [0][0][1][0][RTW89_CN][11] = 58, ++ [0][0][1][0][RTW89_QATAR][11] = 58, ++ [0][0][1][0][RTW89_UK][11] = 58, ++ [0][0][1][0][RTW89_FCC][12] = 50, ++ [0][0][1][0][RTW89_ETSI][12] = 58, ++ [0][0][1][0][RTW89_MKK][12] = 76, ++ [0][0][1][0][RTW89_IC][12] = 50, ++ [0][0][1][0][RTW89_KCC][12] = 76, ++ [0][0][1][0][RTW89_ACMA][12] = 58, ++ [0][0][1][0][RTW89_CHILE][12] = 50, ++ [0][0][1][0][RTW89_UKRAINE][12] = 58, ++ [0][0][1][0][RTW89_MEXICO][12] = 50, ++ [0][0][1][0][RTW89_CN][12] = 58, ++ [0][0][1][0][RTW89_QATAR][12] = 58, ++ [0][0][1][0][RTW89_UK][12] = 58, ++ [0][0][1][0][RTW89_FCC][13] = 127, ++ [0][0][1][0][RTW89_ETSI][13] = 127, ++ [0][0][1][0][RTW89_MKK][13] = 127, ++ [0][0][1][0][RTW89_IC][13] = 127, ++ [0][0][1][0][RTW89_KCC][13] = 127, ++ [0][0][1][0][RTW89_ACMA][13] = 127, ++ [0][0][1][0][RTW89_CHILE][13] = 127, ++ [0][0][1][0][RTW89_UKRAINE][13] = 127, ++ [0][0][1][0][RTW89_MEXICO][13] = 127, ++ [0][0][1][0][RTW89_CN][13] = 127, ++ [0][0][1][0][RTW89_QATAR][13] = 127, ++ [0][0][1][0][RTW89_UK][13] = 127, ++ [0][1][1][0][RTW89_FCC][0] = 62, ++ [0][1][1][0][RTW89_ETSI][0] = 46, ++ [0][1][1][0][RTW89_MKK][0] = 64, ++ [0][1][1][0][RTW89_IC][0] = 62, ++ [0][1][1][0][RTW89_KCC][0] = 66, ++ [0][1][1][0][RTW89_ACMA][0] = 46, ++ [0][1][1][0][RTW89_CHILE][0] = 50, ++ [0][1][1][0][RTW89_UKRAINE][0] = 46, ++ [0][1][1][0][RTW89_MEXICO][0] = 62, ++ [0][1][1][0][RTW89_CN][0] = 46, ++ [0][1][1][0][RTW89_QATAR][0] = 46, ++ [0][1][1][0][RTW89_UK][0] = 46, ++ [0][1][1][0][RTW89_FCC][1] = 62, ++ [0][1][1][0][RTW89_ETSI][1] = 46, ++ [0][1][1][0][RTW89_MKK][1] = 64, ++ [0][1][1][0][RTW89_IC][1] = 62, ++ [0][1][1][0][RTW89_KCC][1] = 66, ++ [0][1][1][0][RTW89_ACMA][1] = 46, ++ [0][1][1][0][RTW89_CHILE][1] = 50, ++ [0][1][1][0][RTW89_UKRAINE][1] = 46, ++ [0][1][1][0][RTW89_MEXICO][1] = 62, ++ [0][1][1][0][RTW89_CN][1] = 46, ++ [0][1][1][0][RTW89_QATAR][1] = 46, ++ [0][1][1][0][RTW89_UK][1] = 46, ++ [0][1][1][0][RTW89_FCC][2] = 66, ++ [0][1][1][0][RTW89_ETSI][2] = 46, ++ [0][1][1][0][RTW89_MKK][2] = 64, ++ [0][1][1][0][RTW89_IC][2] = 66, ++ [0][1][1][0][RTW89_KCC][2] = 66, ++ [0][1][1][0][RTW89_ACMA][2] = 46, ++ [0][1][1][0][RTW89_CHILE][2] = 50, ++ [0][1][1][0][RTW89_UKRAINE][2] = 46, ++ [0][1][1][0][RTW89_MEXICO][2] = 66, ++ [0][1][1][0][RTW89_CN][2] = 46, ++ [0][1][1][0][RTW89_QATAR][2] = 46, ++ [0][1][1][0][RTW89_UK][2] = 46, ++ [0][1][1][0][RTW89_FCC][3] = 70, ++ [0][1][1][0][RTW89_ETSI][3] = 46, ++ [0][1][1][0][RTW89_MKK][3] = 64, ++ [0][1][1][0][RTW89_IC][3] = 70, ++ [0][1][1][0][RTW89_KCC][3] = 66, ++ [0][1][1][0][RTW89_ACMA][3] = 46, ++ [0][1][1][0][RTW89_CHILE][3] = 50, ++ [0][1][1][0][RTW89_UKRAINE][3] = 46, ++ [0][1][1][0][RTW89_MEXICO][3] = 70, ++ [0][1][1][0][RTW89_CN][3] = 46, ++ [0][1][1][0][RTW89_QATAR][3] = 46, ++ [0][1][1][0][RTW89_UK][3] = 46, ++ [0][1][1][0][RTW89_FCC][4] = 78, ++ [0][1][1][0][RTW89_ETSI][4] = 46, ++ [0][1][1][0][RTW89_MKK][4] = 64, ++ [0][1][1][0][RTW89_IC][4] = 78, ++ [0][1][1][0][RTW89_KCC][4] = 64, ++ [0][1][1][0][RTW89_ACMA][4] = 46, ++ [0][1][1][0][RTW89_CHILE][4] = 50, ++ [0][1][1][0][RTW89_UKRAINE][4] = 46, ++ [0][1][1][0][RTW89_MEXICO][4] = 78, ++ [0][1][1][0][RTW89_CN][4] = 46, ++ [0][1][1][0][RTW89_QATAR][4] = 46, ++ [0][1][1][0][RTW89_UK][4] = 46, ++ [0][1][1][0][RTW89_FCC][5] = 78, ++ [0][1][1][0][RTW89_ETSI][5] = 46, ++ [0][1][1][0][RTW89_MKK][5] = 64, ++ [0][1][1][0][RTW89_IC][5] = 78, ++ [0][1][1][0][RTW89_KCC][5] = 64, ++ [0][1][1][0][RTW89_ACMA][5] = 46, ++ [0][1][1][0][RTW89_CHILE][5] = 50, ++ [0][1][1][0][RTW89_UKRAINE][5] = 46, ++ [0][1][1][0][RTW89_MEXICO][5] = 78, ++ [0][1][1][0][RTW89_CN][5] = 46, ++ [0][1][1][0][RTW89_QATAR][5] = 46, ++ [0][1][1][0][RTW89_UK][5] = 46, ++ [0][1][1][0][RTW89_FCC][6] = 78, ++ [0][1][1][0][RTW89_ETSI][6] = 46, ++ [0][1][1][0][RTW89_MKK][6] = 64, ++ [0][1][1][0][RTW89_IC][6] = 78, ++ [0][1][1][0][RTW89_KCC][6] = 64, ++ [0][1][1][0][RTW89_ACMA][6] = 46, ++ [0][1][1][0][RTW89_CHILE][6] = 50, ++ [0][1][1][0][RTW89_UKRAINE][6] = 46, ++ [0][1][1][0][RTW89_MEXICO][6] = 78, ++ [0][1][1][0][RTW89_CN][6] = 46, ++ [0][1][1][0][RTW89_QATAR][6] = 46, ++ [0][1][1][0][RTW89_UK][6] = 46, ++ [0][1][1][0][RTW89_FCC][7] = 70, ++ [0][1][1][0][RTW89_ETSI][7] = 46, ++ [0][1][1][0][RTW89_MKK][7] = 64, ++ [0][1][1][0][RTW89_IC][7] = 70, ++ [0][1][1][0][RTW89_KCC][7] = 64, ++ [0][1][1][0][RTW89_ACMA][7] = 46, ++ [0][1][1][0][RTW89_CHILE][7] = 50, ++ [0][1][1][0][RTW89_UKRAINE][7] = 46, ++ [0][1][1][0][RTW89_MEXICO][7] = 70, ++ [0][1][1][0][RTW89_CN][7] = 46, ++ [0][1][1][0][RTW89_QATAR][7] = 46, ++ [0][1][1][0][RTW89_UK][7] = 46, ++ [0][1][1][0][RTW89_FCC][8] = 66, ++ [0][1][1][0][RTW89_ETSI][8] = 46, ++ [0][1][1][0][RTW89_MKK][8] = 64, ++ [0][1][1][0][RTW89_IC][8] = 66, ++ [0][1][1][0][RTW89_KCC][8] = 64, ++ [0][1][1][0][RTW89_ACMA][8] = 46, ++ [0][1][1][0][RTW89_CHILE][8] = 50, ++ [0][1][1][0][RTW89_UKRAINE][8] = 46, ++ [0][1][1][0][RTW89_MEXICO][8] = 66, ++ [0][1][1][0][RTW89_CN][8] = 46, ++ [0][1][1][0][RTW89_QATAR][8] = 46, ++ [0][1][1][0][RTW89_UK][8] = 46, ++ [0][1][1][0][RTW89_FCC][9] = 62, ++ [0][1][1][0][RTW89_ETSI][9] = 46, ++ [0][1][1][0][RTW89_MKK][9] = 64, ++ [0][1][1][0][RTW89_IC][9] = 62, ++ [0][1][1][0][RTW89_KCC][9] = 64, ++ [0][1][1][0][RTW89_ACMA][9] = 46, ++ [0][1][1][0][RTW89_CHILE][9] = 50, ++ [0][1][1][0][RTW89_UKRAINE][9] = 46, ++ [0][1][1][0][RTW89_MEXICO][9] = 62, ++ [0][1][1][0][RTW89_CN][9] = 46, ++ [0][1][1][0][RTW89_QATAR][9] = 46, ++ [0][1][1][0][RTW89_UK][9] = 46, ++ [0][1][1][0][RTW89_FCC][10] = 62, ++ [0][1][1][0][RTW89_ETSI][10] = 46, ++ [0][1][1][0][RTW89_MKK][10] = 64, ++ [0][1][1][0][RTW89_IC][10] = 62, ++ [0][1][1][0][RTW89_KCC][10] = 64, ++ [0][1][1][0][RTW89_ACMA][10] = 46, ++ [0][1][1][0][RTW89_CHILE][10] = 52, ++ [0][1][1][0][RTW89_UKRAINE][10] = 46, ++ [0][1][1][0][RTW89_MEXICO][10] = 62, ++ [0][1][1][0][RTW89_CN][10] = 46, ++ [0][1][1][0][RTW89_QATAR][10] = 46, ++ [0][1][1][0][RTW89_UK][10] = 46, ++ [0][1][1][0][RTW89_FCC][11] = 46, ++ [0][1][1][0][RTW89_ETSI][11] = 46, ++ [0][1][1][0][RTW89_MKK][11] = 64, ++ [0][1][1][0][RTW89_IC][11] = 46, ++ [0][1][1][0][RTW89_KCC][11] = 64, ++ [0][1][1][0][RTW89_ACMA][11] = 46, ++ [0][1][1][0][RTW89_CHILE][11] = 46, ++ [0][1][1][0][RTW89_UKRAINE][11] = 46, ++ [0][1][1][0][RTW89_MEXICO][11] = 46, ++ [0][1][1][0][RTW89_CN][11] = 46, ++ [0][1][1][0][RTW89_QATAR][11] = 46, ++ [0][1][1][0][RTW89_UK][11] = 46, ++ [0][1][1][0][RTW89_FCC][12] = 42, ++ [0][1][1][0][RTW89_ETSI][12] = 46, ++ [0][1][1][0][RTW89_MKK][12] = 64, ++ [0][1][1][0][RTW89_IC][12] = 42, ++ [0][1][1][0][RTW89_KCC][12] = 64, ++ [0][1][1][0][RTW89_ACMA][12] = 46, ++ [0][1][1][0][RTW89_CHILE][12] = 42, ++ [0][1][1][0][RTW89_UKRAINE][12] = 46, ++ [0][1][1][0][RTW89_MEXICO][12] = 42, ++ [0][1][1][0][RTW89_CN][12] = 46, ++ [0][1][1][0][RTW89_QATAR][12] = 46, ++ [0][1][1][0][RTW89_UK][12] = 46, ++ [0][1][1][0][RTW89_FCC][13] = 127, ++ [0][1][1][0][RTW89_ETSI][13] = 127, ++ [0][1][1][0][RTW89_MKK][13] = 127, ++ [0][1][1][0][RTW89_IC][13] = 127, ++ [0][1][1][0][RTW89_KCC][13] = 127, ++ [0][1][1][0][RTW89_ACMA][13] = 127, ++ [0][1][1][0][RTW89_CHILE][13] = 127, ++ [0][1][1][0][RTW89_UKRAINE][13] = 127, ++ [0][1][1][0][RTW89_MEXICO][13] = 127, ++ [0][1][1][0][RTW89_CN][13] = 127, ++ [0][1][1][0][RTW89_QATAR][13] = 127, ++ [0][1][1][0][RTW89_UK][13] = 127, ++ [0][0][2][0][RTW89_FCC][0] = 76, ++ [0][0][2][0][RTW89_ETSI][0] = 58, ++ [0][0][2][0][RTW89_MKK][0] = 76, ++ [0][0][2][0][RTW89_IC][0] = 76, ++ [0][0][2][0][RTW89_KCC][0] = 76, ++ [0][0][2][0][RTW89_ACMA][0] = 58, ++ [0][0][2][0][RTW89_CHILE][0] = 66, ++ [0][0][2][0][RTW89_UKRAINE][0] = 58, ++ [0][0][2][0][RTW89_MEXICO][0] = 76, ++ [0][0][2][0][RTW89_CN][0] = 58, ++ [0][0][2][0][RTW89_QATAR][0] = 58, ++ [0][0][2][0][RTW89_UK][0] = 58, ++ [0][0][2][0][RTW89_FCC][1] = 76, ++ [0][0][2][0][RTW89_ETSI][1] = 58, ++ [0][0][2][0][RTW89_MKK][1] = 76, ++ [0][0][2][0][RTW89_IC][1] = 76, ++ [0][0][2][0][RTW89_KCC][1] = 76, ++ [0][0][2][0][RTW89_ACMA][1] = 58, ++ [0][0][2][0][RTW89_CHILE][1] = 66, ++ [0][0][2][0][RTW89_UKRAINE][1] = 58, ++ [0][0][2][0][RTW89_MEXICO][1] = 76, ++ [0][0][2][0][RTW89_CN][1] = 58, ++ [0][0][2][0][RTW89_QATAR][1] = 58, ++ [0][0][2][0][RTW89_UK][1] = 58, ++ [0][0][2][0][RTW89_FCC][2] = 78, ++ [0][0][2][0][RTW89_ETSI][2] = 58, ++ [0][0][2][0][RTW89_MKK][2] = 76, ++ [0][0][2][0][RTW89_IC][2] = 78, ++ [0][0][2][0][RTW89_KCC][2] = 76, ++ [0][0][2][0][RTW89_ACMA][2] = 58, ++ [0][0][2][0][RTW89_CHILE][2] = 66, ++ [0][0][2][0][RTW89_UKRAINE][2] = 58, ++ [0][0][2][0][RTW89_MEXICO][2] = 78, ++ [0][0][2][0][RTW89_CN][2] = 58, ++ [0][0][2][0][RTW89_QATAR][2] = 58, ++ [0][0][2][0][RTW89_UK][2] = 58, ++ [0][0][2][0][RTW89_FCC][3] = 78, ++ [0][0][2][0][RTW89_ETSI][3] = 58, ++ [0][0][2][0][RTW89_MKK][3] = 76, ++ [0][0][2][0][RTW89_IC][3] = 78, ++ [0][0][2][0][RTW89_KCC][3] = 76, ++ [0][0][2][0][RTW89_ACMA][3] = 58, ++ [0][0][2][0][RTW89_CHILE][3] = 66, ++ [0][0][2][0][RTW89_UKRAINE][3] = 58, ++ [0][0][2][0][RTW89_MEXICO][3] = 78, ++ [0][0][2][0][RTW89_CN][3] = 58, ++ [0][0][2][0][RTW89_QATAR][3] = 58, ++ [0][0][2][0][RTW89_UK][3] = 58, ++ [0][0][2][0][RTW89_FCC][4] = 78, ++ [0][0][2][0][RTW89_ETSI][4] = 58, ++ [0][0][2][0][RTW89_MKK][4] = 76, ++ [0][0][2][0][RTW89_IC][4] = 78, ++ [0][0][2][0][RTW89_KCC][4] = 76, ++ [0][0][2][0][RTW89_ACMA][4] = 58, ++ [0][0][2][0][RTW89_CHILE][4] = 66, ++ [0][0][2][0][RTW89_UKRAINE][4] = 58, ++ [0][0][2][0][RTW89_MEXICO][4] = 78, ++ [0][0][2][0][RTW89_CN][4] = 58, ++ [0][0][2][0][RTW89_QATAR][4] = 58, ++ [0][0][2][0][RTW89_UK][4] = 58, ++ [0][0][2][0][RTW89_FCC][5] = 78, ++ [0][0][2][0][RTW89_ETSI][5] = 58, ++ [0][0][2][0][RTW89_MKK][5] = 76, ++ [0][0][2][0][RTW89_IC][5] = 78, ++ [0][0][2][0][RTW89_KCC][5] = 76, ++ [0][0][2][0][RTW89_ACMA][5] = 58, ++ [0][0][2][0][RTW89_CHILE][5] = 66, ++ [0][0][2][0][RTW89_UKRAINE][5] = 58, ++ [0][0][2][0][RTW89_MEXICO][5] = 78, ++ [0][0][2][0][RTW89_CN][5] = 58, ++ [0][0][2][0][RTW89_QATAR][5] = 58, ++ [0][0][2][0][RTW89_UK][5] = 58, ++ [0][0][2][0][RTW89_FCC][6] = 78, ++ [0][0][2][0][RTW89_ETSI][6] = 58, ++ [0][0][2][0][RTW89_MKK][6] = 76, ++ [0][0][2][0][RTW89_IC][6] = 78, ++ [0][0][2][0][RTW89_KCC][6] = 76, ++ [0][0][2][0][RTW89_ACMA][6] = 58, ++ [0][0][2][0][RTW89_CHILE][6] = 66, ++ [0][0][2][0][RTW89_UKRAINE][6] = 58, ++ [0][0][2][0][RTW89_MEXICO][6] = 78, ++ [0][0][2][0][RTW89_CN][6] = 58, ++ [0][0][2][0][RTW89_QATAR][6] = 58, ++ [0][0][2][0][RTW89_UK][6] = 58, ++ [0][0][2][0][RTW89_FCC][7] = 78, ++ [0][0][2][0][RTW89_ETSI][7] = 58, ++ [0][0][2][0][RTW89_MKK][7] = 76, ++ [0][0][2][0][RTW89_IC][7] = 78, ++ [0][0][2][0][RTW89_KCC][7] = 76, ++ [0][0][2][0][RTW89_ACMA][7] = 58, ++ [0][0][2][0][RTW89_CHILE][7] = 66, ++ [0][0][2][0][RTW89_UKRAINE][7] = 58, ++ [0][0][2][0][RTW89_MEXICO][7] = 78, ++ [0][0][2][0][RTW89_CN][7] = 58, ++ [0][0][2][0][RTW89_QATAR][7] = 58, ++ [0][0][2][0][RTW89_UK][7] = 58, ++ [0][0][2][0][RTW89_FCC][8] = 76, ++ [0][0][2][0][RTW89_ETSI][8] = 58, ++ [0][0][2][0][RTW89_MKK][8] = 76, ++ [0][0][2][0][RTW89_IC][8] = 76, ++ [0][0][2][0][RTW89_KCC][8] = 76, ++ [0][0][2][0][RTW89_ACMA][8] = 58, ++ [0][0][2][0][RTW89_CHILE][8] = 66, ++ [0][0][2][0][RTW89_UKRAINE][8] = 58, ++ [0][0][2][0][RTW89_MEXICO][8] = 76, ++ [0][0][2][0][RTW89_CN][8] = 58, ++ [0][0][2][0][RTW89_QATAR][8] = 58, ++ [0][0][2][0][RTW89_UK][8] = 58, ++ [0][0][2][0][RTW89_FCC][9] = 72, ++ [0][0][2][0][RTW89_ETSI][9] = 58, ++ [0][0][2][0][RTW89_MKK][9] = 76, ++ [0][0][2][0][RTW89_IC][9] = 72, ++ [0][0][2][0][RTW89_KCC][9] = 76, ++ [0][0][2][0][RTW89_ACMA][9] = 58, ++ [0][0][2][0][RTW89_CHILE][9] = 66, ++ [0][0][2][0][RTW89_UKRAINE][9] = 58, ++ [0][0][2][0][RTW89_MEXICO][9] = 72, ++ [0][0][2][0][RTW89_CN][9] = 58, ++ [0][0][2][0][RTW89_QATAR][9] = 58, ++ [0][0][2][0][RTW89_UK][9] = 58, ++ [0][0][2][0][RTW89_FCC][10] = 72, ++ [0][0][2][0][RTW89_ETSI][10] = 58, ++ [0][0][2][0][RTW89_MKK][10] = 76, ++ [0][0][2][0][RTW89_IC][10] = 72, ++ [0][0][2][0][RTW89_KCC][10] = 76, ++ [0][0][2][0][RTW89_ACMA][10] = 58, ++ [0][0][2][0][RTW89_CHILE][10] = 66, ++ [0][0][2][0][RTW89_UKRAINE][10] = 58, ++ [0][0][2][0][RTW89_MEXICO][10] = 72, ++ [0][0][2][0][RTW89_CN][10] = 58, ++ [0][0][2][0][RTW89_QATAR][10] = 58, ++ [0][0][2][0][RTW89_UK][10] = 58, ++ [0][0][2][0][RTW89_FCC][11] = 54, ++ [0][0][2][0][RTW89_ETSI][11] = 58, ++ [0][0][2][0][RTW89_MKK][11] = 76, ++ [0][0][2][0][RTW89_IC][11] = 54, ++ [0][0][2][0][RTW89_KCC][11] = 76, ++ [0][0][2][0][RTW89_ACMA][11] = 58, ++ [0][0][2][0][RTW89_CHILE][11] = 54, ++ [0][0][2][0][RTW89_UKRAINE][11] = 58, ++ [0][0][2][0][RTW89_MEXICO][11] = 54, ++ [0][0][2][0][RTW89_CN][11] = 58, ++ [0][0][2][0][RTW89_QATAR][11] = 58, ++ [0][0][2][0][RTW89_UK][11] = 58, ++ [0][0][2][0][RTW89_FCC][12] = 50, ++ [0][0][2][0][RTW89_ETSI][12] = 58, ++ [0][0][2][0][RTW89_MKK][12] = 76, ++ [0][0][2][0][RTW89_IC][12] = 50, ++ [0][0][2][0][RTW89_KCC][12] = 76, ++ [0][0][2][0][RTW89_ACMA][12] = 58, ++ [0][0][2][0][RTW89_CHILE][12] = 50, ++ [0][0][2][0][RTW89_UKRAINE][12] = 58, ++ [0][0][2][0][RTW89_MEXICO][12] = 50, ++ [0][0][2][0][RTW89_CN][12] = 58, ++ [0][0][2][0][RTW89_QATAR][12] = 58, ++ [0][0][2][0][RTW89_UK][12] = 58, ++ [0][0][2][0][RTW89_FCC][13] = 127, ++ [0][0][2][0][RTW89_ETSI][13] = 127, ++ [0][0][2][0][RTW89_MKK][13] = 127, ++ [0][0][2][0][RTW89_IC][13] = 127, ++ [0][0][2][0][RTW89_KCC][13] = 127, ++ [0][0][2][0][RTW89_ACMA][13] = 127, ++ [0][0][2][0][RTW89_CHILE][13] = 127, ++ [0][0][2][0][RTW89_UKRAINE][13] = 127, ++ [0][0][2][0][RTW89_MEXICO][13] = 127, ++ [0][0][2][0][RTW89_CN][13] = 127, ++ [0][0][2][0][RTW89_QATAR][13] = 127, ++ [0][0][2][0][RTW89_UK][13] = 127, ++ [0][1][2][0][RTW89_FCC][0] = 58, ++ [0][1][2][0][RTW89_ETSI][0] = 46, ++ [0][1][2][0][RTW89_MKK][0] = 66, ++ [0][1][2][0][RTW89_IC][0] = 58, ++ [0][1][2][0][RTW89_KCC][0] = 62, ++ [0][1][2][0][RTW89_ACMA][0] = 46, ++ [0][1][2][0][RTW89_CHILE][0] = 50, ++ [0][1][2][0][RTW89_UKRAINE][0] = 46, ++ [0][1][2][0][RTW89_MEXICO][0] = 58, ++ [0][1][2][0][RTW89_CN][0] = 46, ++ [0][1][2][0][RTW89_QATAR][0] = 46, ++ [0][1][2][0][RTW89_UK][0] = 46, ++ [0][1][2][0][RTW89_FCC][1] = 58, ++ [0][1][2][0][RTW89_ETSI][1] = 46, ++ [0][1][2][0][RTW89_MKK][1] = 66, ++ [0][1][2][0][RTW89_IC][1] = 58, ++ [0][1][2][0][RTW89_KCC][1] = 62, ++ [0][1][2][0][RTW89_ACMA][1] = 46, ++ [0][1][2][0][RTW89_CHILE][1] = 50, ++ [0][1][2][0][RTW89_UKRAINE][1] = 46, ++ [0][1][2][0][RTW89_MEXICO][1] = 58, ++ [0][1][2][0][RTW89_CN][1] = 46, ++ [0][1][2][0][RTW89_QATAR][1] = 46, ++ [0][1][2][0][RTW89_UK][1] = 46, ++ [0][1][2][0][RTW89_FCC][2] = 62, ++ [0][1][2][0][RTW89_ETSI][2] = 46, ++ [0][1][2][0][RTW89_MKK][2] = 66, ++ [0][1][2][0][RTW89_IC][2] = 62, ++ [0][1][2][0][RTW89_KCC][2] = 62, ++ [0][1][2][0][RTW89_ACMA][2] = 46, ++ [0][1][2][0][RTW89_CHILE][2] = 50, ++ [0][1][2][0][RTW89_UKRAINE][2] = 46, ++ [0][1][2][0][RTW89_MEXICO][2] = 62, ++ [0][1][2][0][RTW89_CN][2] = 46, ++ [0][1][2][0][RTW89_QATAR][2] = 46, ++ [0][1][2][0][RTW89_UK][2] = 46, ++ [0][1][2][0][RTW89_FCC][3] = 66, ++ [0][1][2][0][RTW89_ETSI][3] = 46, ++ [0][1][2][0][RTW89_MKK][3] = 66, ++ [0][1][2][0][RTW89_IC][3] = 66, ++ [0][1][2][0][RTW89_KCC][3] = 62, ++ [0][1][2][0][RTW89_ACMA][3] = 46, ++ [0][1][2][0][RTW89_CHILE][3] = 50, ++ [0][1][2][0][RTW89_UKRAINE][3] = 46, ++ [0][1][2][0][RTW89_MEXICO][3] = 66, ++ [0][1][2][0][RTW89_CN][3] = 46, ++ [0][1][2][0][RTW89_QATAR][3] = 46, ++ [0][1][2][0][RTW89_UK][3] = 46, ++ [0][1][2][0][RTW89_FCC][4] = 72, ++ [0][1][2][0][RTW89_ETSI][4] = 46, ++ [0][1][2][0][RTW89_MKK][4] = 66, ++ [0][1][2][0][RTW89_IC][4] = 72, ++ [0][1][2][0][RTW89_KCC][4] = 62, ++ [0][1][2][0][RTW89_ACMA][4] = 46, ++ [0][1][2][0][RTW89_CHILE][4] = 50, ++ [0][1][2][0][RTW89_UKRAINE][4] = 46, ++ [0][1][2][0][RTW89_MEXICO][4] = 72, ++ [0][1][2][0][RTW89_CN][4] = 46, ++ [0][1][2][0][RTW89_QATAR][4] = 46, ++ [0][1][2][0][RTW89_UK][4] = 46, ++ [0][1][2][0][RTW89_FCC][5] = 78, ++ [0][1][2][0][RTW89_ETSI][5] = 46, ++ [0][1][2][0][RTW89_MKK][5] = 66, ++ [0][1][2][0][RTW89_IC][5] = 78, ++ [0][1][2][0][RTW89_KCC][5] = 62, ++ [0][1][2][0][RTW89_ACMA][5] = 46, ++ [0][1][2][0][RTW89_CHILE][5] = 50, ++ [0][1][2][0][RTW89_UKRAINE][5] = 46, ++ [0][1][2][0][RTW89_MEXICO][5] = 78, ++ [0][1][2][0][RTW89_CN][5] = 46, ++ [0][1][2][0][RTW89_QATAR][5] = 46, ++ [0][1][2][0][RTW89_UK][5] = 46, ++ [0][1][2][0][RTW89_FCC][6] = 74, ++ [0][1][2][0][RTW89_ETSI][6] = 46, ++ [0][1][2][0][RTW89_MKK][6] = 66, ++ [0][1][2][0][RTW89_IC][6] = 74, ++ [0][1][2][0][RTW89_KCC][6] = 62, ++ [0][1][2][0][RTW89_ACMA][6] = 46, ++ [0][1][2][0][RTW89_CHILE][6] = 50, ++ [0][1][2][0][RTW89_UKRAINE][6] = 46, ++ [0][1][2][0][RTW89_MEXICO][6] = 74, ++ [0][1][2][0][RTW89_CN][6] = 46, ++ [0][1][2][0][RTW89_QATAR][6] = 46, ++ [0][1][2][0][RTW89_UK][6] = 46, ++ [0][1][2][0][RTW89_FCC][7] = 66, ++ [0][1][2][0][RTW89_ETSI][7] = 46, ++ [0][1][2][0][RTW89_MKK][7] = 66, ++ [0][1][2][0][RTW89_IC][7] = 66, ++ [0][1][2][0][RTW89_KCC][7] = 62, ++ [0][1][2][0][RTW89_ACMA][7] = 46, ++ [0][1][2][0][RTW89_CHILE][7] = 50, ++ [0][1][2][0][RTW89_UKRAINE][7] = 46, ++ [0][1][2][0][RTW89_MEXICO][7] = 66, ++ [0][1][2][0][RTW89_CN][7] = 46, ++ [0][1][2][0][RTW89_QATAR][7] = 46, ++ [0][1][2][0][RTW89_UK][7] = 46, ++ [0][1][2][0][RTW89_FCC][8] = 62, ++ [0][1][2][0][RTW89_ETSI][8] = 46, ++ [0][1][2][0][RTW89_MKK][8] = 66, ++ [0][1][2][0][RTW89_IC][8] = 62, ++ [0][1][2][0][RTW89_KCC][8] = 62, ++ [0][1][2][0][RTW89_ACMA][8] = 46, ++ [0][1][2][0][RTW89_CHILE][8] = 50, ++ [0][1][2][0][RTW89_UKRAINE][8] = 46, ++ [0][1][2][0][RTW89_MEXICO][8] = 62, ++ [0][1][2][0][RTW89_CN][8] = 46, ++ [0][1][2][0][RTW89_QATAR][8] = 46, ++ [0][1][2][0][RTW89_UK][8] = 46, ++ [0][1][2][0][RTW89_FCC][9] = 58, ++ [0][1][2][0][RTW89_ETSI][9] = 46, ++ [0][1][2][0][RTW89_MKK][9] = 66, ++ [0][1][2][0][RTW89_IC][9] = 58, ++ [0][1][2][0][RTW89_KCC][9] = 60, ++ [0][1][2][0][RTW89_ACMA][9] = 46, ++ [0][1][2][0][RTW89_CHILE][9] = 50, ++ [0][1][2][0][RTW89_UKRAINE][9] = 46, ++ [0][1][2][0][RTW89_MEXICO][9] = 58, ++ [0][1][2][0][RTW89_CN][9] = 46, ++ [0][1][2][0][RTW89_QATAR][9] = 46, ++ [0][1][2][0][RTW89_UK][9] = 46, ++ [0][1][2][0][RTW89_FCC][10] = 58, ++ [0][1][2][0][RTW89_ETSI][10] = 46, ++ [0][1][2][0][RTW89_MKK][10] = 66, ++ [0][1][2][0][RTW89_IC][10] = 58, ++ [0][1][2][0][RTW89_KCC][10] = 60, ++ [0][1][2][0][RTW89_ACMA][10] = 46, ++ [0][1][2][0][RTW89_CHILE][10] = 50, ++ [0][1][2][0][RTW89_UKRAINE][10] = 46, ++ [0][1][2][0][RTW89_MEXICO][10] = 58, ++ [0][1][2][0][RTW89_CN][10] = 46, ++ [0][1][2][0][RTW89_QATAR][10] = 46, ++ [0][1][2][0][RTW89_UK][10] = 46, ++ [0][1][2][0][RTW89_FCC][11] = 46, ++ [0][1][2][0][RTW89_ETSI][11] = 46, ++ [0][1][2][0][RTW89_MKK][11] = 66, ++ [0][1][2][0][RTW89_IC][11] = 46, ++ [0][1][2][0][RTW89_KCC][11] = 60, ++ [0][1][2][0][RTW89_ACMA][11] = 46, ++ [0][1][2][0][RTW89_CHILE][11] = 46, ++ [0][1][2][0][RTW89_UKRAINE][11] = 46, ++ [0][1][2][0][RTW89_MEXICO][11] = 46, ++ [0][1][2][0][RTW89_CN][11] = 46, ++ [0][1][2][0][RTW89_QATAR][11] = 46, ++ [0][1][2][0][RTW89_UK][11] = 46, ++ [0][1][2][0][RTW89_FCC][12] = 42, ++ [0][1][2][0][RTW89_ETSI][12] = 46, ++ [0][1][2][0][RTW89_MKK][12] = 66, ++ [0][1][2][0][RTW89_IC][12] = 42, ++ [0][1][2][0][RTW89_KCC][12] = 60, ++ [0][1][2][0][RTW89_ACMA][12] = 46, ++ [0][1][2][0][RTW89_CHILE][12] = 42, ++ [0][1][2][0][RTW89_UKRAINE][12] = 46, ++ [0][1][2][0][RTW89_MEXICO][12] = 42, ++ [0][1][2][0][RTW89_CN][12] = 46, ++ [0][1][2][0][RTW89_QATAR][12] = 46, ++ [0][1][2][0][RTW89_UK][12] = 46, ++ [0][1][2][0][RTW89_FCC][13] = 127, ++ [0][1][2][0][RTW89_ETSI][13] = 127, ++ [0][1][2][0][RTW89_MKK][13] = 127, ++ [0][1][2][0][RTW89_IC][13] = 127, ++ [0][1][2][0][RTW89_KCC][13] = 127, ++ [0][1][2][0][RTW89_ACMA][13] = 127, ++ [0][1][2][0][RTW89_CHILE][13] = 127, ++ [0][1][2][0][RTW89_UKRAINE][13] = 127, ++ [0][1][2][0][RTW89_MEXICO][13] = 127, ++ [0][1][2][0][RTW89_CN][13] = 127, ++ [0][1][2][0][RTW89_QATAR][13] = 127, ++ [0][1][2][0][RTW89_UK][13] = 127, ++ [0][1][2][1][RTW89_FCC][0] = 58, ++ [0][1][2][1][RTW89_ETSI][0] = 34, ++ [0][1][2][1][RTW89_MKK][0] = 66, ++ [0][1][2][1][RTW89_IC][0] = 58, ++ [0][1][2][1][RTW89_KCC][0] = 62, ++ [0][1][2][1][RTW89_ACMA][0] = 34, ++ [0][1][2][1][RTW89_CHILE][0] = 42, ++ [0][1][2][1][RTW89_UKRAINE][0] = 34, ++ [0][1][2][1][RTW89_MEXICO][0] = 58, ++ [0][1][2][1][RTW89_CN][0] = 34, ++ [0][1][2][1][RTW89_QATAR][0] = 34, ++ [0][1][2][1][RTW89_UK][0] = 34, ++ [0][1][2][1][RTW89_FCC][1] = 58, ++ [0][1][2][1][RTW89_ETSI][1] = 34, ++ [0][1][2][1][RTW89_MKK][1] = 66, ++ [0][1][2][1][RTW89_IC][1] = 58, ++ [0][1][2][1][RTW89_KCC][1] = 62, ++ [0][1][2][1][RTW89_ACMA][1] = 34, ++ [0][1][2][1][RTW89_CHILE][1] = 40, ++ [0][1][2][1][RTW89_UKRAINE][1] = 34, ++ [0][1][2][1][RTW89_MEXICO][1] = 58, ++ [0][1][2][1][RTW89_CN][1] = 34, ++ [0][1][2][1][RTW89_QATAR][1] = 34, ++ [0][1][2][1][RTW89_UK][1] = 34, ++ [0][1][2][1][RTW89_FCC][2] = 62, ++ [0][1][2][1][RTW89_ETSI][2] = 34, ++ [0][1][2][1][RTW89_MKK][2] = 66, ++ [0][1][2][1][RTW89_IC][2] = 62, ++ [0][1][2][1][RTW89_KCC][2] = 62, ++ [0][1][2][1][RTW89_ACMA][2] = 34, ++ [0][1][2][1][RTW89_CHILE][2] = 40, ++ [0][1][2][1][RTW89_UKRAINE][2] = 34, ++ [0][1][2][1][RTW89_MEXICO][2] = 62, ++ [0][1][2][1][RTW89_CN][2] = 34, ++ [0][1][2][1][RTW89_QATAR][2] = 34, ++ [0][1][2][1][RTW89_UK][2] = 34, ++ [0][1][2][1][RTW89_FCC][3] = 66, ++ [0][1][2][1][RTW89_ETSI][3] = 34, ++ [0][1][2][1][RTW89_MKK][3] = 66, ++ [0][1][2][1][RTW89_IC][3] = 66, ++ [0][1][2][1][RTW89_KCC][3] = 62, ++ [0][1][2][1][RTW89_ACMA][3] = 34, ++ [0][1][2][1][RTW89_CHILE][3] = 40, ++ [0][1][2][1][RTW89_UKRAINE][3] = 34, ++ [0][1][2][1][RTW89_MEXICO][3] = 66, ++ [0][1][2][1][RTW89_CN][3] = 34, ++ [0][1][2][1][RTW89_QATAR][3] = 34, ++ [0][1][2][1][RTW89_UK][3] = 34, ++ [0][1][2][1][RTW89_FCC][4] = 72, ++ [0][1][2][1][RTW89_ETSI][4] = 34, ++ [0][1][2][1][RTW89_MKK][4] = 66, ++ [0][1][2][1][RTW89_IC][4] = 72, ++ [0][1][2][1][RTW89_KCC][4] = 62, ++ [0][1][2][1][RTW89_ACMA][4] = 34, ++ [0][1][2][1][RTW89_CHILE][4] = 40, ++ [0][1][2][1][RTW89_UKRAINE][4] = 34, ++ [0][1][2][1][RTW89_MEXICO][4] = 72, ++ [0][1][2][1][RTW89_CN][4] = 34, ++ [0][1][2][1][RTW89_QATAR][4] = 34, ++ [0][1][2][1][RTW89_UK][4] = 34, ++ [0][1][2][1][RTW89_FCC][5] = 78, ++ [0][1][2][1][RTW89_ETSI][5] = 34, ++ [0][1][2][1][RTW89_MKK][5] = 66, ++ [0][1][2][1][RTW89_IC][5] = 78, ++ [0][1][2][1][RTW89_KCC][5] = 62, ++ [0][1][2][1][RTW89_ACMA][5] = 34, ++ [0][1][2][1][RTW89_CHILE][5] = 42, ++ [0][1][2][1][RTW89_UKRAINE][5] = 34, ++ [0][1][2][1][RTW89_MEXICO][5] = 78, ++ [0][1][2][1][RTW89_CN][5] = 34, ++ [0][1][2][1][RTW89_QATAR][5] = 34, ++ [0][1][2][1][RTW89_UK][5] = 34, ++ [0][1][2][1][RTW89_FCC][6] = 74, ++ [0][1][2][1][RTW89_ETSI][6] = 34, ++ [0][1][2][1][RTW89_MKK][6] = 66, ++ [0][1][2][1][RTW89_IC][6] = 74, ++ [0][1][2][1][RTW89_KCC][6] = 62, ++ [0][1][2][1][RTW89_ACMA][6] = 34, ++ [0][1][2][1][RTW89_CHILE][6] = 40, ++ [0][1][2][1][RTW89_UKRAINE][6] = 34, ++ [0][1][2][1][RTW89_MEXICO][6] = 74, ++ [0][1][2][1][RTW89_CN][6] = 34, ++ [0][1][2][1][RTW89_QATAR][6] = 34, ++ [0][1][2][1][RTW89_UK][6] = 34, ++ [0][1][2][1][RTW89_FCC][7] = 66, ++ [0][1][2][1][RTW89_ETSI][7] = 34, ++ [0][1][2][1][RTW89_MKK][7] = 66, ++ [0][1][2][1][RTW89_IC][7] = 66, ++ [0][1][2][1][RTW89_KCC][7] = 62, ++ [0][1][2][1][RTW89_ACMA][7] = 34, ++ [0][1][2][1][RTW89_CHILE][7] = 40, ++ [0][1][2][1][RTW89_UKRAINE][7] = 34, ++ [0][1][2][1][RTW89_MEXICO][7] = 66, ++ [0][1][2][1][RTW89_CN][7] = 34, ++ [0][1][2][1][RTW89_QATAR][7] = 34, ++ [0][1][2][1][RTW89_UK][7] = 34, ++ [0][1][2][1][RTW89_FCC][8] = 62, ++ [0][1][2][1][RTW89_ETSI][8] = 34, ++ [0][1][2][1][RTW89_MKK][8] = 66, ++ [0][1][2][1][RTW89_IC][8] = 62, ++ [0][1][2][1][RTW89_KCC][8] = 62, ++ [0][1][2][1][RTW89_ACMA][8] = 34, ++ [0][1][2][1][RTW89_CHILE][8] = 40, ++ [0][1][2][1][RTW89_UKRAINE][8] = 34, ++ [0][1][2][1][RTW89_MEXICO][8] = 62, ++ [0][1][2][1][RTW89_CN][8] = 34, ++ [0][1][2][1][RTW89_QATAR][8] = 34, ++ [0][1][2][1][RTW89_UK][8] = 34, ++ [0][1][2][1][RTW89_FCC][9] = 58, ++ [0][1][2][1][RTW89_ETSI][9] = 34, ++ [0][1][2][1][RTW89_MKK][9] = 66, ++ [0][1][2][1][RTW89_IC][9] = 58, ++ [0][1][2][1][RTW89_KCC][9] = 60, ++ [0][1][2][1][RTW89_ACMA][9] = 34, ++ [0][1][2][1][RTW89_CHILE][9] = 40, ++ [0][1][2][1][RTW89_UKRAINE][9] = 34, ++ [0][1][2][1][RTW89_MEXICO][9] = 58, ++ [0][1][2][1][RTW89_CN][9] = 34, ++ [0][1][2][1][RTW89_QATAR][9] = 34, ++ [0][1][2][1][RTW89_UK][9] = 34, ++ [0][1][2][1][RTW89_FCC][10] = 58, ++ [0][1][2][1][RTW89_ETSI][10] = 34, ++ [0][1][2][1][RTW89_MKK][10] = 66, ++ [0][1][2][1][RTW89_IC][10] = 58, ++ [0][1][2][1][RTW89_KCC][10] = 60, ++ [0][1][2][1][RTW89_ACMA][10] = 34, ++ [0][1][2][1][RTW89_CHILE][10] = 40, ++ [0][1][2][1][RTW89_UKRAINE][10] = 34, ++ [0][1][2][1][RTW89_MEXICO][10] = 58, ++ [0][1][2][1][RTW89_CN][10] = 34, ++ [0][1][2][1][RTW89_QATAR][10] = 34, ++ [0][1][2][1][RTW89_UK][10] = 34, ++ [0][1][2][1][RTW89_FCC][11] = 46, ++ [0][1][2][1][RTW89_ETSI][11] = 34, ++ [0][1][2][1][RTW89_MKK][11] = 66, ++ [0][1][2][1][RTW89_IC][11] = 46, ++ [0][1][2][1][RTW89_KCC][11] = 60, ++ [0][1][2][1][RTW89_ACMA][11] = 34, ++ [0][1][2][1][RTW89_CHILE][11] = 40, ++ [0][1][2][1][RTW89_UKRAINE][11] = 34, ++ [0][1][2][1][RTW89_MEXICO][11] = 46, ++ [0][1][2][1][RTW89_CN][11] = 34, ++ [0][1][2][1][RTW89_QATAR][11] = 34, ++ [0][1][2][1][RTW89_UK][11] = 34, ++ [0][1][2][1][RTW89_FCC][12] = 42, ++ [0][1][2][1][RTW89_ETSI][12] = 34, ++ [0][1][2][1][RTW89_MKK][12] = 66, ++ [0][1][2][1][RTW89_IC][12] = 42, ++ [0][1][2][1][RTW89_KCC][12] = 60, ++ [0][1][2][1][RTW89_ACMA][12] = 34, ++ [0][1][2][1][RTW89_CHILE][12] = 40, ++ [0][1][2][1][RTW89_UKRAINE][12] = 34, ++ [0][1][2][1][RTW89_MEXICO][12] = 42, ++ [0][1][2][1][RTW89_CN][12] = 34, ++ [0][1][2][1][RTW89_QATAR][12] = 34, ++ [0][1][2][1][RTW89_UK][12] = 34, ++ [0][1][2][1][RTW89_FCC][13] = 127, ++ [0][1][2][1][RTW89_ETSI][13] = 127, ++ [0][1][2][1][RTW89_MKK][13] = 127, ++ [0][1][2][1][RTW89_IC][13] = 127, ++ [0][1][2][1][RTW89_KCC][13] = 127, ++ [0][1][2][1][RTW89_ACMA][13] = 127, ++ [0][1][2][1][RTW89_CHILE][13] = 127, ++ [0][1][2][1][RTW89_UKRAINE][13] = 127, ++ [0][1][2][1][RTW89_MEXICO][13] = 127, ++ [0][1][2][1][RTW89_CN][13] = 127, ++ [0][1][2][1][RTW89_QATAR][13] = 127, ++ [0][1][2][1][RTW89_UK][13] = 127, ++ [1][0][2][0][RTW89_FCC][0] = 127, ++ [1][0][2][0][RTW89_ETSI][0] = 127, ++ [1][0][2][0][RTW89_MKK][0] = 127, ++ [1][0][2][0][RTW89_IC][0] = 127, ++ [1][0][2][0][RTW89_KCC][0] = 127, ++ [1][0][2][0][RTW89_ACMA][0] = 127, ++ [1][0][2][0][RTW89_CHILE][0] = 127, ++ [1][0][2][0][RTW89_UKRAINE][0] = 127, ++ [1][0][2][0][RTW89_MEXICO][0] = 127, ++ [1][0][2][0][RTW89_CN][0] = 127, ++ [1][0][2][0][RTW89_QATAR][0] = 127, ++ [1][0][2][0][RTW89_UK][0] = 127, ++ [1][0][2][0][RTW89_FCC][1] = 127, ++ [1][0][2][0][RTW89_ETSI][1] = 127, ++ [1][0][2][0][RTW89_MKK][1] = 127, ++ [1][0][2][0][RTW89_IC][1] = 127, ++ [1][0][2][0][RTW89_KCC][1] = 127, ++ [1][0][2][0][RTW89_ACMA][1] = 127, ++ [1][0][2][0][RTW89_CHILE][1] = 127, ++ [1][0][2][0][RTW89_UKRAINE][1] = 127, ++ [1][0][2][0][RTW89_MEXICO][1] = 127, ++ [1][0][2][0][RTW89_CN][1] = 127, ++ [1][0][2][0][RTW89_QATAR][1] = 127, ++ [1][0][2][0][RTW89_UK][1] = 127, ++ [1][0][2][0][RTW89_FCC][2] = 70, ++ [1][0][2][0][RTW89_ETSI][2] = 58, ++ [1][0][2][0][RTW89_MKK][2] = 74, ++ [1][0][2][0][RTW89_IC][2] = 70, ++ [1][0][2][0][RTW89_KCC][2] = 74, ++ [1][0][2][0][RTW89_ACMA][2] = 58, ++ [1][0][2][0][RTW89_CHILE][2] = 66, ++ [1][0][2][0][RTW89_UKRAINE][2] = 58, ++ [1][0][2][0][RTW89_MEXICO][2] = 70, ++ [1][0][2][0][RTW89_CN][2] = 58, ++ [1][0][2][0][RTW89_QATAR][2] = 58, ++ [1][0][2][0][RTW89_UK][2] = 58, ++ [1][0][2][0][RTW89_FCC][3] = 70, ++ [1][0][2][0][RTW89_ETSI][3] = 58, ++ [1][0][2][0][RTW89_MKK][3] = 74, ++ [1][0][2][0][RTW89_IC][3] = 70, ++ [1][0][2][0][RTW89_KCC][3] = 74, ++ [1][0][2][0][RTW89_ACMA][3] = 58, ++ [1][0][2][0][RTW89_CHILE][3] = 66, ++ [1][0][2][0][RTW89_UKRAINE][3] = 58, ++ [1][0][2][0][RTW89_MEXICO][3] = 70, ++ [1][0][2][0][RTW89_CN][3] = 58, ++ [1][0][2][0][RTW89_QATAR][3] = 58, ++ [1][0][2][0][RTW89_UK][3] = 58, ++ [1][0][2][0][RTW89_FCC][4] = 72, ++ [1][0][2][0][RTW89_ETSI][4] = 58, ++ [1][0][2][0][RTW89_MKK][4] = 74, ++ [1][0][2][0][RTW89_IC][4] = 72, ++ [1][0][2][0][RTW89_KCC][4] = 74, ++ [1][0][2][0][RTW89_ACMA][4] = 58, ++ [1][0][2][0][RTW89_CHILE][4] = 66, ++ [1][0][2][0][RTW89_UKRAINE][4] = 58, ++ [1][0][2][0][RTW89_MEXICO][4] = 72, ++ [1][0][2][0][RTW89_CN][4] = 58, ++ [1][0][2][0][RTW89_QATAR][4] = 58, ++ [1][0][2][0][RTW89_UK][4] = 58, ++ [1][0][2][0][RTW89_FCC][5] = 72, ++ [1][0][2][0][RTW89_ETSI][5] = 58, ++ [1][0][2][0][RTW89_MKK][5] = 74, ++ [1][0][2][0][RTW89_IC][5] = 72, ++ [1][0][2][0][RTW89_KCC][5] = 74, ++ [1][0][2][0][RTW89_ACMA][5] = 58, ++ [1][0][2][0][RTW89_CHILE][5] = 66, ++ [1][0][2][0][RTW89_UKRAINE][5] = 58, ++ [1][0][2][0][RTW89_MEXICO][5] = 72, ++ [1][0][2][0][RTW89_CN][5] = 58, ++ [1][0][2][0][RTW89_QATAR][5] = 58, ++ [1][0][2][0][RTW89_UK][5] = 58, ++ [1][0][2][0][RTW89_FCC][6] = 72, ++ [1][0][2][0][RTW89_ETSI][6] = 58, ++ [1][0][2][0][RTW89_MKK][6] = 74, ++ [1][0][2][0][RTW89_IC][6] = 72, ++ [1][0][2][0][RTW89_KCC][6] = 74, ++ [1][0][2][0][RTW89_ACMA][6] = 58, ++ [1][0][2][0][RTW89_CHILE][6] = 66, ++ [1][0][2][0][RTW89_UKRAINE][6] = 58, ++ [1][0][2][0][RTW89_MEXICO][6] = 72, ++ [1][0][2][0][RTW89_CN][6] = 58, ++ [1][0][2][0][RTW89_QATAR][6] = 58, ++ [1][0][2][0][RTW89_UK][6] = 58, ++ [1][0][2][0][RTW89_FCC][7] = 68, ++ [1][0][2][0][RTW89_ETSI][7] = 58, ++ [1][0][2][0][RTW89_MKK][7] = 74, ++ [1][0][2][0][RTW89_IC][7] = 68, ++ [1][0][2][0][RTW89_KCC][7] = 74, ++ [1][0][2][0][RTW89_ACMA][7] = 58, ++ [1][0][2][0][RTW89_CHILE][7] = 66, ++ [1][0][2][0][RTW89_UKRAINE][7] = 58, ++ [1][0][2][0][RTW89_MEXICO][7] = 68, ++ [1][0][2][0][RTW89_CN][7] = 58, ++ [1][0][2][0][RTW89_QATAR][7] = 58, ++ [1][0][2][0][RTW89_UK][7] = 58, ++ [1][0][2][0][RTW89_FCC][8] = 68, ++ [1][0][2][0][RTW89_ETSI][8] = 58, ++ [1][0][2][0][RTW89_MKK][8] = 74, ++ [1][0][2][0][RTW89_IC][8] = 68, ++ [1][0][2][0][RTW89_KCC][8] = 74, ++ [1][0][2][0][RTW89_ACMA][8] = 58, ++ [1][0][2][0][RTW89_CHILE][8] = 66, ++ [1][0][2][0][RTW89_UKRAINE][8] = 58, ++ [1][0][2][0][RTW89_MEXICO][8] = 68, ++ [1][0][2][0][RTW89_CN][8] = 58, ++ [1][0][2][0][RTW89_QATAR][8] = 58, ++ [1][0][2][0][RTW89_UK][8] = 58, ++ [1][0][2][0][RTW89_FCC][9] = 68, ++ [1][0][2][0][RTW89_ETSI][9] = 58, ++ [1][0][2][0][RTW89_MKK][9] = 74, ++ [1][0][2][0][RTW89_IC][9] = 68, ++ [1][0][2][0][RTW89_KCC][9] = 74, ++ [1][0][2][0][RTW89_ACMA][9] = 58, ++ [1][0][2][0][RTW89_CHILE][9] = 66, ++ [1][0][2][0][RTW89_UKRAINE][9] = 58, ++ [1][0][2][0][RTW89_MEXICO][9] = 68, ++ [1][0][2][0][RTW89_CN][9] = 58, ++ [1][0][2][0][RTW89_QATAR][9] = 58, ++ [1][0][2][0][RTW89_UK][9] = 58, ++ [1][0][2][0][RTW89_FCC][10] = 66, ++ [1][0][2][0][RTW89_ETSI][10] = 58, ++ [1][0][2][0][RTW89_MKK][10] = 74, ++ [1][0][2][0][RTW89_IC][10] = 66, ++ [1][0][2][0][RTW89_KCC][10] = 74, ++ [1][0][2][0][RTW89_ACMA][10] = 58, ++ [1][0][2][0][RTW89_CHILE][10] = 66, ++ [1][0][2][0][RTW89_UKRAINE][10] = 58, ++ [1][0][2][0][RTW89_MEXICO][10] = 66, ++ [1][0][2][0][RTW89_CN][10] = 58, ++ [1][0][2][0][RTW89_QATAR][10] = 58, ++ [1][0][2][0][RTW89_UK][10] = 58, ++ [1][0][2][0][RTW89_FCC][11] = 127, ++ [1][0][2][0][RTW89_ETSI][11] = 127, ++ [1][0][2][0][RTW89_MKK][11] = 127, ++ [1][0][2][0][RTW89_IC][11] = 127, ++ [1][0][2][0][RTW89_KCC][11] = 127, ++ [1][0][2][0][RTW89_ACMA][11] = 127, ++ [1][0][2][0][RTW89_CHILE][11] = 127, ++ [1][0][2][0][RTW89_UKRAINE][11] = 127, ++ [1][0][2][0][RTW89_MEXICO][11] = 127, ++ [1][0][2][0][RTW89_CN][11] = 127, ++ [1][0][2][0][RTW89_QATAR][11] = 127, ++ [1][0][2][0][RTW89_UK][11] = 127, ++ [1][0][2][0][RTW89_FCC][12] = 127, ++ [1][0][2][0][RTW89_ETSI][12] = 127, ++ [1][0][2][0][RTW89_MKK][12] = 127, ++ [1][0][2][0][RTW89_IC][12] = 127, ++ [1][0][2][0][RTW89_KCC][12] = 127, ++ [1][0][2][0][RTW89_ACMA][12] = 127, ++ [1][0][2][0][RTW89_CHILE][12] = 127, ++ [1][0][2][0][RTW89_UKRAINE][12] = 127, ++ [1][0][2][0][RTW89_MEXICO][12] = 127, ++ [1][0][2][0][RTW89_CN][12] = 127, ++ [1][0][2][0][RTW89_QATAR][12] = 127, ++ [1][0][2][0][RTW89_UK][12] = 127, ++ [1][0][2][0][RTW89_FCC][13] = 127, ++ [1][0][2][0][RTW89_ETSI][13] = 127, ++ [1][0][2][0][RTW89_MKK][13] = 127, ++ [1][0][2][0][RTW89_IC][13] = 127, ++ [1][0][2][0][RTW89_KCC][13] = 127, ++ [1][0][2][0][RTW89_ACMA][13] = 127, ++ [1][0][2][0][RTW89_CHILE][13] = 127, ++ [1][0][2][0][RTW89_UKRAINE][13] = 127, ++ [1][0][2][0][RTW89_MEXICO][13] = 127, ++ [1][0][2][0][RTW89_CN][13] = 127, ++ [1][0][2][0][RTW89_QATAR][13] = 127, ++ [1][0][2][0][RTW89_UK][13] = 127, ++ [1][1][2][0][RTW89_FCC][0] = 127, ++ [1][1][2][0][RTW89_ETSI][0] = 127, ++ [1][1][2][0][RTW89_MKK][0] = 127, ++ [1][1][2][0][RTW89_IC][0] = 127, ++ [1][1][2][0][RTW89_KCC][0] = 127, ++ [1][1][2][0][RTW89_ACMA][0] = 127, ++ [1][1][2][0][RTW89_CHILE][0] = 127, ++ [1][1][2][0][RTW89_UKRAINE][0] = 127, ++ [1][1][2][0][RTW89_MEXICO][0] = 127, ++ [1][1][2][0][RTW89_CN][0] = 127, ++ [1][1][2][0][RTW89_QATAR][0] = 127, ++ [1][1][2][0][RTW89_UK][0] = 127, ++ [1][1][2][0][RTW89_FCC][1] = 127, ++ [1][1][2][0][RTW89_ETSI][1] = 127, ++ [1][1][2][0][RTW89_MKK][1] = 127, ++ [1][1][2][0][RTW89_IC][1] = 127, ++ [1][1][2][0][RTW89_KCC][1] = 127, ++ [1][1][2][0][RTW89_ACMA][1] = 127, ++ [1][1][2][0][RTW89_CHILE][1] = 127, ++ [1][1][2][0][RTW89_UKRAINE][1] = 127, ++ [1][1][2][0][RTW89_MEXICO][1] = 127, ++ [1][1][2][0][RTW89_CN][1] = 127, ++ [1][1][2][0][RTW89_QATAR][1] = 127, ++ [1][1][2][0][RTW89_UK][1] = 127, ++ [1][1][2][0][RTW89_FCC][2] = 54, ++ [1][1][2][0][RTW89_ETSI][2] = 46, ++ [1][1][2][0][RTW89_MKK][2] = 66, ++ [1][1][2][0][RTW89_IC][2] = 54, ++ [1][1][2][0][RTW89_KCC][2] = 62, ++ [1][1][2][0][RTW89_ACMA][2] = 46, ++ [1][1][2][0][RTW89_CHILE][2] = 52, ++ [1][1][2][0][RTW89_UKRAINE][2] = 46, ++ [1][1][2][0][RTW89_MEXICO][2] = 54, ++ [1][1][2][0][RTW89_CN][2] = 46, ++ [1][1][2][0][RTW89_QATAR][2] = 46, ++ [1][1][2][0][RTW89_UK][2] = 46, ++ [1][1][2][0][RTW89_FCC][3] = 54, ++ [1][1][2][0][RTW89_ETSI][3] = 46, ++ [1][1][2][0][RTW89_MKK][3] = 66, ++ [1][1][2][0][RTW89_IC][3] = 54, ++ [1][1][2][0][RTW89_KCC][3] = 62, ++ [1][1][2][0][RTW89_ACMA][3] = 46, ++ [1][1][2][0][RTW89_CHILE][3] = 52, ++ [1][1][2][0][RTW89_UKRAINE][3] = 46, ++ [1][1][2][0][RTW89_MEXICO][3] = 54, ++ [1][1][2][0][RTW89_CN][3] = 46, ++ [1][1][2][0][RTW89_QATAR][3] = 46, ++ [1][1][2][0][RTW89_UK][3] = 46, ++ [1][1][2][0][RTW89_FCC][4] = 58, ++ [1][1][2][0][RTW89_ETSI][4] = 46, ++ [1][1][2][0][RTW89_MKK][4] = 66, ++ [1][1][2][0][RTW89_IC][4] = 58, ++ [1][1][2][0][RTW89_KCC][4] = 62, ++ [1][1][2][0][RTW89_ACMA][4] = 46, ++ [1][1][2][0][RTW89_CHILE][4] = 52, ++ [1][1][2][0][RTW89_UKRAINE][4] = 46, ++ [1][1][2][0][RTW89_MEXICO][4] = 58, ++ [1][1][2][0][RTW89_CN][4] = 46, ++ [1][1][2][0][RTW89_QATAR][4] = 46, ++ [1][1][2][0][RTW89_UK][4] = 46, ++ [1][1][2][0][RTW89_FCC][5] = 66, ++ [1][1][2][0][RTW89_ETSI][5] = 46, ++ [1][1][2][0][RTW89_MKK][5] = 66, ++ [1][1][2][0][RTW89_IC][5] = 66, ++ [1][1][2][0][RTW89_KCC][5] = 62, ++ [1][1][2][0][RTW89_ACMA][5] = 46, ++ [1][1][2][0][RTW89_CHILE][5] = 54, ++ [1][1][2][0][RTW89_UKRAINE][5] = 46, ++ [1][1][2][0][RTW89_MEXICO][5] = 66, ++ [1][1][2][0][RTW89_CN][5] = 46, ++ [1][1][2][0][RTW89_QATAR][5] = 46, ++ [1][1][2][0][RTW89_UK][5] = 46, ++ [1][1][2][0][RTW89_FCC][6] = 58, ++ [1][1][2][0][RTW89_ETSI][6] = 46, ++ [1][1][2][0][RTW89_MKK][6] = 66, ++ [1][1][2][0][RTW89_IC][6] = 58, ++ [1][1][2][0][RTW89_KCC][6] = 62, ++ [1][1][2][0][RTW89_ACMA][6] = 46, ++ [1][1][2][0][RTW89_CHILE][6] = 52, ++ [1][1][2][0][RTW89_UKRAINE][6] = 46, ++ [1][1][2][0][RTW89_MEXICO][6] = 58, ++ [1][1][2][0][RTW89_CN][6] = 46, ++ [1][1][2][0][RTW89_QATAR][6] = 46, ++ [1][1][2][0][RTW89_UK][6] = 46, ++ [1][1][2][0][RTW89_FCC][7] = 54, ++ [1][1][2][0][RTW89_ETSI][7] = 46, ++ [1][1][2][0][RTW89_MKK][7] = 66, ++ [1][1][2][0][RTW89_IC][7] = 54, ++ [1][1][2][0][RTW89_KCC][7] = 62, ++ [1][1][2][0][RTW89_ACMA][7] = 46, ++ [1][1][2][0][RTW89_CHILE][7] = 52, ++ [1][1][2][0][RTW89_UKRAINE][7] = 46, ++ [1][1][2][0][RTW89_MEXICO][7] = 54, ++ [1][1][2][0][RTW89_CN][7] = 46, ++ [1][1][2][0][RTW89_QATAR][7] = 46, ++ [1][1][2][0][RTW89_UK][7] = 46, ++ [1][1][2][0][RTW89_FCC][8] = 54, ++ [1][1][2][0][RTW89_ETSI][8] = 46, ++ [1][1][2][0][RTW89_MKK][8] = 66, ++ [1][1][2][0][RTW89_IC][8] = 54, ++ [1][1][2][0][RTW89_KCC][8] = 62, ++ [1][1][2][0][RTW89_ACMA][8] = 46, ++ [1][1][2][0][RTW89_CHILE][8] = 52, ++ [1][1][2][0][RTW89_UKRAINE][8] = 46, ++ [1][1][2][0][RTW89_MEXICO][8] = 54, ++ [1][1][2][0][RTW89_CN][8] = 46, ++ [1][1][2][0][RTW89_QATAR][8] = 46, ++ [1][1][2][0][RTW89_UK][8] = 46, ++ [1][1][2][0][RTW89_FCC][9] = 42, ++ [1][1][2][0][RTW89_ETSI][9] = 46, ++ [1][1][2][0][RTW89_MKK][9] = 66, ++ [1][1][2][0][RTW89_IC][9] = 42, ++ [1][1][2][0][RTW89_KCC][9] = 62, ++ [1][1][2][0][RTW89_ACMA][9] = 46, ++ [1][1][2][0][RTW89_CHILE][9] = 42, ++ [1][1][2][0][RTW89_UKRAINE][9] = 46, ++ [1][1][2][0][RTW89_MEXICO][9] = 42, ++ [1][1][2][0][RTW89_CN][9] = 46, ++ [1][1][2][0][RTW89_QATAR][9] = 46, ++ [1][1][2][0][RTW89_UK][9] = 46, ++ [1][1][2][0][RTW89_FCC][10] = 38, ++ [1][1][2][0][RTW89_ETSI][10] = 46, ++ [1][1][2][0][RTW89_MKK][10] = 66, ++ [1][1][2][0][RTW89_IC][10] = 38, ++ [1][1][2][0][RTW89_KCC][10] = 62, ++ [1][1][2][0][RTW89_ACMA][10] = 46, ++ [1][1][2][0][RTW89_CHILE][10] = 38, ++ [1][1][2][0][RTW89_UKRAINE][10] = 46, ++ [1][1][2][0][RTW89_MEXICO][10] = 38, ++ [1][1][2][0][RTW89_CN][10] = 46, ++ [1][1][2][0][RTW89_QATAR][10] = 46, ++ [1][1][2][0][RTW89_UK][10] = 46, ++ [1][1][2][0][RTW89_FCC][11] = 127, ++ [1][1][2][0][RTW89_ETSI][11] = 127, ++ [1][1][2][0][RTW89_MKK][11] = 127, ++ [1][1][2][0][RTW89_IC][11] = 127, ++ [1][1][2][0][RTW89_KCC][11] = 127, ++ [1][1][2][0][RTW89_ACMA][11] = 127, ++ [1][1][2][0][RTW89_CHILE][11] = 127, ++ [1][1][2][0][RTW89_UKRAINE][11] = 127, ++ [1][1][2][0][RTW89_MEXICO][11] = 127, ++ [1][1][2][0][RTW89_CN][11] = 127, ++ [1][1][2][0][RTW89_QATAR][11] = 127, ++ [1][1][2][0][RTW89_UK][11] = 127, ++ [1][1][2][0][RTW89_FCC][12] = 127, ++ [1][1][2][0][RTW89_ETSI][12] = 127, ++ [1][1][2][0][RTW89_MKK][12] = 127, ++ [1][1][2][0][RTW89_IC][12] = 127, ++ [1][1][2][0][RTW89_KCC][12] = 127, ++ [1][1][2][0][RTW89_ACMA][12] = 127, ++ [1][1][2][0][RTW89_CHILE][12] = 127, ++ [1][1][2][0][RTW89_UKRAINE][12] = 127, ++ [1][1][2][0][RTW89_MEXICO][12] = 127, ++ [1][1][2][0][RTW89_CN][12] = 127, ++ [1][1][2][0][RTW89_QATAR][12] = 127, ++ [1][1][2][0][RTW89_UK][12] = 127, ++ [1][1][2][0][RTW89_FCC][13] = 127, ++ [1][1][2][0][RTW89_ETSI][13] = 127, ++ [1][1][2][0][RTW89_MKK][13] = 127, ++ [1][1][2][0][RTW89_IC][13] = 127, ++ [1][1][2][0][RTW89_KCC][13] = 127, ++ [1][1][2][0][RTW89_ACMA][13] = 127, ++ [1][1][2][0][RTW89_CHILE][13] = 127, ++ [1][1][2][0][RTW89_UKRAINE][13] = 127, ++ [1][1][2][0][RTW89_MEXICO][13] = 127, ++ [1][1][2][0][RTW89_CN][13] = 127, ++ [1][1][2][0][RTW89_QATAR][13] = 127, ++ [1][1][2][0][RTW89_UK][13] = 127, ++ [1][1][2][1][RTW89_FCC][0] = 127, ++ [1][1][2][1][RTW89_ETSI][0] = 127, ++ [1][1][2][1][RTW89_MKK][0] = 127, ++ [1][1][2][1][RTW89_IC][0] = 127, ++ [1][1][2][1][RTW89_KCC][0] = 127, ++ [1][1][2][1][RTW89_ACMA][0] = 127, ++ [1][1][2][1][RTW89_CHILE][0] = 127, ++ [1][1][2][1][RTW89_UKRAINE][0] = 127, ++ [1][1][2][1][RTW89_MEXICO][0] = 127, ++ [1][1][2][1][RTW89_CN][0] = 127, ++ [1][1][2][1][RTW89_QATAR][0] = 127, ++ [1][1][2][1][RTW89_UK][0] = 127, ++ [1][1][2][1][RTW89_FCC][1] = 127, ++ [1][1][2][1][RTW89_ETSI][1] = 127, ++ [1][1][2][1][RTW89_MKK][1] = 127, ++ [1][1][2][1][RTW89_IC][1] = 127, ++ [1][1][2][1][RTW89_KCC][1] = 127, ++ [1][1][2][1][RTW89_ACMA][1] = 127, ++ [1][1][2][1][RTW89_CHILE][1] = 127, ++ [1][1][2][1][RTW89_UKRAINE][1] = 127, ++ [1][1][2][1][RTW89_MEXICO][1] = 127, ++ [1][1][2][1][RTW89_CN][1] = 127, ++ [1][1][2][1][RTW89_QATAR][1] = 127, ++ [1][1][2][1][RTW89_UK][1] = 127, ++ [1][1][2][1][RTW89_FCC][2] = 54, ++ [1][1][2][1][RTW89_ETSI][2] = 34, ++ [1][1][2][1][RTW89_MKK][2] = 66, ++ [1][1][2][1][RTW89_IC][2] = 54, ++ [1][1][2][1][RTW89_KCC][2] = 62, ++ [1][1][2][1][RTW89_ACMA][2] = 34, ++ [1][1][2][1][RTW89_CHILE][2] = 42, ++ [1][1][2][1][RTW89_UKRAINE][2] = 34, ++ [1][1][2][1][RTW89_MEXICO][2] = 54, ++ [1][1][2][1][RTW89_CN][2] = 34, ++ [1][1][2][1][RTW89_QATAR][2] = 34, ++ [1][1][2][1][RTW89_UK][2] = 34, ++ [1][1][2][1][RTW89_FCC][3] = 54, ++ [1][1][2][1][RTW89_ETSI][3] = 34, ++ [1][1][2][1][RTW89_MKK][3] = 66, ++ [1][1][2][1][RTW89_IC][3] = 54, ++ [1][1][2][1][RTW89_KCC][3] = 62, ++ [1][1][2][1][RTW89_ACMA][3] = 34, ++ [1][1][2][1][RTW89_CHILE][3] = 42, ++ [1][1][2][1][RTW89_UKRAINE][3] = 34, ++ [1][1][2][1][RTW89_MEXICO][3] = 54, ++ [1][1][2][1][RTW89_CN][3] = 34, ++ [1][1][2][1][RTW89_QATAR][3] = 34, ++ [1][1][2][1][RTW89_UK][3] = 34, ++ [1][1][2][1][RTW89_FCC][4] = 58, ++ [1][1][2][1][RTW89_ETSI][4] = 34, ++ [1][1][2][1][RTW89_MKK][4] = 66, ++ [1][1][2][1][RTW89_IC][4] = 58, ++ [1][1][2][1][RTW89_KCC][4] = 62, ++ [1][1][2][1][RTW89_ACMA][4] = 34, ++ [1][1][2][1][RTW89_CHILE][4] = 42, ++ [1][1][2][1][RTW89_UKRAINE][4] = 34, ++ [1][1][2][1][RTW89_MEXICO][4] = 58, ++ [1][1][2][1][RTW89_CN][4] = 34, ++ [1][1][2][1][RTW89_QATAR][4] = 34, ++ [1][1][2][1][RTW89_UK][4] = 34, ++ [1][1][2][1][RTW89_FCC][5] = 66, ++ [1][1][2][1][RTW89_ETSI][5] = 34, ++ [1][1][2][1][RTW89_MKK][5] = 66, ++ [1][1][2][1][RTW89_IC][5] = 66, ++ [1][1][2][1][RTW89_KCC][5] = 62, ++ [1][1][2][1][RTW89_ACMA][5] = 34, ++ [1][1][2][1][RTW89_CHILE][5] = 42, ++ [1][1][2][1][RTW89_UKRAINE][5] = 34, ++ [1][1][2][1][RTW89_MEXICO][5] = 66, ++ [1][1][2][1][RTW89_CN][5] = 34, ++ [1][1][2][1][RTW89_QATAR][5] = 34, ++ [1][1][2][1][RTW89_UK][5] = 34, ++ [1][1][2][1][RTW89_FCC][6] = 58, ++ [1][1][2][1][RTW89_ETSI][6] = 34, ++ [1][1][2][1][RTW89_MKK][6] = 66, ++ [1][1][2][1][RTW89_IC][6] = 58, ++ [1][1][2][1][RTW89_KCC][6] = 62, ++ [1][1][2][1][RTW89_ACMA][6] = 34, ++ [1][1][2][1][RTW89_CHILE][6] = 42, ++ [1][1][2][1][RTW89_UKRAINE][6] = 34, ++ [1][1][2][1][RTW89_MEXICO][6] = 58, ++ [1][1][2][1][RTW89_CN][6] = 34, ++ [1][1][2][1][RTW89_QATAR][6] = 34, ++ [1][1][2][1][RTW89_UK][6] = 34, ++ [1][1][2][1][RTW89_FCC][7] = 54, ++ [1][1][2][1][RTW89_ETSI][7] = 34, ++ [1][1][2][1][RTW89_MKK][7] = 66, ++ [1][1][2][1][RTW89_IC][7] = 54, ++ [1][1][2][1][RTW89_KCC][7] = 62, ++ [1][1][2][1][RTW89_ACMA][7] = 34, ++ [1][1][2][1][RTW89_CHILE][7] = 42, ++ [1][1][2][1][RTW89_UKRAINE][7] = 34, ++ [1][1][2][1][RTW89_MEXICO][7] = 54, ++ [1][1][2][1][RTW89_CN][7] = 34, ++ [1][1][2][1][RTW89_QATAR][7] = 34, ++ [1][1][2][1][RTW89_UK][7] = 34, ++ [1][1][2][1][RTW89_FCC][8] = 54, ++ [1][1][2][1][RTW89_ETSI][8] = 34, ++ [1][1][2][1][RTW89_MKK][8] = 66, ++ [1][1][2][1][RTW89_IC][8] = 54, ++ [1][1][2][1][RTW89_KCC][8] = 62, ++ [1][1][2][1][RTW89_ACMA][8] = 34, ++ [1][1][2][1][RTW89_CHILE][8] = 42, ++ [1][1][2][1][RTW89_UKRAINE][8] = 34, ++ [1][1][2][1][RTW89_MEXICO][8] = 54, ++ [1][1][2][1][RTW89_CN][8] = 34, ++ [1][1][2][1][RTW89_QATAR][8] = 34, ++ [1][1][2][1][RTW89_UK][8] = 34, ++ [1][1][2][1][RTW89_FCC][9] = 42, ++ [1][1][2][1][RTW89_ETSI][9] = 34, ++ [1][1][2][1][RTW89_MKK][9] = 66, ++ [1][1][2][1][RTW89_IC][9] = 42, ++ [1][1][2][1][RTW89_KCC][9] = 62, ++ [1][1][2][1][RTW89_ACMA][9] = 34, ++ [1][1][2][1][RTW89_CHILE][9] = 42, ++ [1][1][2][1][RTW89_UKRAINE][9] = 34, ++ [1][1][2][1][RTW89_MEXICO][9] = 42, ++ [1][1][2][1][RTW89_CN][9] = 34, ++ [1][1][2][1][RTW89_QATAR][9] = 34, ++ [1][1][2][1][RTW89_UK][9] = 34, ++ [1][1][2][1][RTW89_FCC][10] = 38, ++ [1][1][2][1][RTW89_ETSI][10] = 34, ++ [1][1][2][1][RTW89_MKK][10] = 66, ++ [1][1][2][1][RTW89_IC][10] = 38, ++ [1][1][2][1][RTW89_KCC][10] = 62, ++ [1][1][2][1][RTW89_ACMA][10] = 34, ++ [1][1][2][1][RTW89_CHILE][10] = 38, ++ [1][1][2][1][RTW89_UKRAINE][10] = 34, ++ [1][1][2][1][RTW89_MEXICO][10] = 38, ++ [1][1][2][1][RTW89_CN][10] = 34, ++ [1][1][2][1][RTW89_QATAR][10] = 34, ++ [1][1][2][1][RTW89_UK][10] = 34, ++ [1][1][2][1][RTW89_FCC][11] = 127, ++ [1][1][2][1][RTW89_ETSI][11] = 127, ++ [1][1][2][1][RTW89_MKK][11] = 127, ++ [1][1][2][1][RTW89_IC][11] = 127, ++ [1][1][2][1][RTW89_KCC][11] = 127, ++ [1][1][2][1][RTW89_ACMA][11] = 127, ++ [1][1][2][1][RTW89_CHILE][11] = 127, ++ [1][1][2][1][RTW89_UKRAINE][11] = 127, ++ [1][1][2][1][RTW89_MEXICO][11] = 127, ++ [1][1][2][1][RTW89_CN][11] = 127, ++ [1][1][2][1][RTW89_QATAR][11] = 127, ++ [1][1][2][1][RTW89_UK][11] = 127, ++ [1][1][2][1][RTW89_FCC][12] = 127, ++ [1][1][2][1][RTW89_ETSI][12] = 127, ++ [1][1][2][1][RTW89_MKK][12] = 127, ++ [1][1][2][1][RTW89_IC][12] = 127, ++ [1][1][2][1][RTW89_KCC][12] = 127, ++ [1][1][2][1][RTW89_ACMA][12] = 127, ++ [1][1][2][1][RTW89_CHILE][12] = 127, ++ [1][1][2][1][RTW89_UKRAINE][12] = 127, ++ [1][1][2][1][RTW89_MEXICO][12] = 127, ++ [1][1][2][1][RTW89_CN][12] = 127, ++ [1][1][2][1][RTW89_QATAR][12] = 127, ++ [1][1][2][1][RTW89_UK][12] = 127, ++ [1][1][2][1][RTW89_FCC][13] = 127, ++ [1][1][2][1][RTW89_ETSI][13] = 127, ++ [1][1][2][1][RTW89_MKK][13] = 127, ++ [1][1][2][1][RTW89_IC][13] = 127, ++ [1][1][2][1][RTW89_KCC][13] = 127, ++ [1][1][2][1][RTW89_ACMA][13] = 127, ++ [1][1][2][1][RTW89_CHILE][13] = 127, ++ [1][1][2][1][RTW89_UKRAINE][13] = 127, ++ [1][1][2][1][RTW89_MEXICO][13] = 127, ++ [1][1][2][1][RTW89_CN][13] = 127, ++ [1][1][2][1][RTW89_QATAR][13] = 127, ++ [1][1][2][1][RTW89_UK][13] = 127, ++}; ++ ++const s8 rtw89_8852b_txpwr_lmt_5g[RTW89_5G_BW_NUM][RTW89_NTX_NUM] ++ [RTW89_RS_LMT_NUM][RTW89_BF_NUM] ++ [RTW89_REGD_NUM][RTW89_5G_CH_NUM] = { ++ [0][0][1][0][RTW89_WW][0] = 42, ++ [0][0][1][0][RTW89_WW][2] = 42, ++ [0][0][1][0][RTW89_WW][4] = 42, ++ [0][0][1][0][RTW89_WW][6] = 42, ++ [0][0][1][0][RTW89_WW][8] = 52, ++ [0][0][1][0][RTW89_WW][10] = 52, ++ [0][0][1][0][RTW89_WW][12] = 52, ++ [0][0][1][0][RTW89_WW][14] = 52, ++ [0][0][1][0][RTW89_WW][15] = 52, ++ [0][0][1][0][RTW89_WW][17] = 52, ++ [0][0][1][0][RTW89_WW][19] = 52, ++ [0][0][1][0][RTW89_WW][21] = 52, ++ [0][0][1][0][RTW89_WW][23] = 52, ++ [0][0][1][0][RTW89_WW][25] = 52, ++ [0][0][1][0][RTW89_WW][27] = 52, ++ [0][0][1][0][RTW89_WW][29] = 52, ++ [0][0][1][0][RTW89_WW][31] = 52, ++ [0][0][1][0][RTW89_WW][33] = 52, ++ [0][0][1][0][RTW89_WW][35] = 52, ++ [0][0][1][0][RTW89_WW][37] = 68, ++ [0][0][1][0][RTW89_WW][38] = 28, ++ [0][0][1][0][RTW89_WW][40] = 28, ++ [0][0][1][0][RTW89_WW][42] = 28, ++ [0][0][1][0][RTW89_WW][44] = 28, ++ [0][0][1][0][RTW89_WW][46] = 28, ++ [0][0][1][0][RTW89_WW][48] = 78, ++ [0][0][1][0][RTW89_WW][50] = 78, ++ [0][0][1][0][RTW89_WW][52] = 78, ++ [0][1][1][0][RTW89_WW][0] = 30, ++ [0][1][1][0][RTW89_WW][2] = 32, ++ [0][1][1][0][RTW89_WW][4] = 30, ++ [0][1][1][0][RTW89_WW][6] = 30, ++ [0][1][1][0][RTW89_WW][8] = 40, ++ [0][1][1][0][RTW89_WW][10] = 40, ++ [0][1][1][0][RTW89_WW][12] = 40, ++ [0][1][1][0][RTW89_WW][14] = 40, ++ [0][1][1][0][RTW89_WW][15] = 40, ++ [0][1][1][0][RTW89_WW][17] = 40, ++ [0][1][1][0][RTW89_WW][19] = 40, ++ [0][1][1][0][RTW89_WW][21] = 40, ++ [0][1][1][0][RTW89_WW][23] = 40, ++ [0][1][1][0][RTW89_WW][25] = 40, ++ [0][1][1][0][RTW89_WW][27] = 40, ++ [0][1][1][0][RTW89_WW][29] = 40, ++ [0][1][1][0][RTW89_WW][31] = 40, ++ [0][1][1][0][RTW89_WW][33] = 40, ++ [0][1][1][0][RTW89_WW][35] = 40, ++ [0][1][1][0][RTW89_WW][37] = 50, ++ [0][1][1][0][RTW89_WW][38] = 16, ++ [0][1][1][0][RTW89_WW][40] = 16, ++ [0][1][1][0][RTW89_WW][42] = 16, ++ [0][1][1][0][RTW89_WW][44] = 16, ++ [0][1][1][0][RTW89_WW][46] = 16, ++ [0][1][1][0][RTW89_WW][48] = 56, ++ [0][1][1][0][RTW89_WW][50] = 56, ++ [0][1][1][0][RTW89_WW][52] = 56, ++ [0][0][2][0][RTW89_WW][0] = 42, ++ [0][0][2][0][RTW89_WW][2] = 42, ++ [0][0][2][0][RTW89_WW][4] = 42, ++ [0][0][2][0][RTW89_WW][6] = 42, ++ [0][0][2][0][RTW89_WW][8] = 52, ++ [0][0][2][0][RTW89_WW][10] = 52, ++ [0][0][2][0][RTW89_WW][12] = 52, ++ [0][0][2][0][RTW89_WW][14] = 52, ++ [0][0][2][0][RTW89_WW][15] = 52, ++ [0][0][2][0][RTW89_WW][17] = 52, ++ [0][0][2][0][RTW89_WW][19] = 52, ++ [0][0][2][0][RTW89_WW][21] = 52, ++ [0][0][2][0][RTW89_WW][23] = 52, ++ [0][0][2][0][RTW89_WW][25] = 52, ++ [0][0][2][0][RTW89_WW][27] = 52, ++ [0][0][2][0][RTW89_WW][29] = 52, ++ [0][0][2][0][RTW89_WW][31] = 52, ++ [0][0][2][0][RTW89_WW][33] = 52, ++ [0][0][2][0][RTW89_WW][35] = 52, ++ [0][0][2][0][RTW89_WW][37] = 64, ++ [0][0][2][0][RTW89_WW][38] = 28, ++ [0][0][2][0][RTW89_WW][40] = 28, ++ [0][0][2][0][RTW89_WW][42] = 28, ++ [0][0][2][0][RTW89_WW][44] = 28, ++ [0][0][2][0][RTW89_WW][46] = 28, ++ [0][0][2][0][RTW89_WW][48] = 78, ++ [0][0][2][0][RTW89_WW][50] = 78, ++ [0][0][2][0][RTW89_WW][52] = 78, ++ [0][1][2][0][RTW89_WW][0] = 30, ++ [0][1][2][0][RTW89_WW][2] = 30, ++ [0][1][2][0][RTW89_WW][4] = 30, ++ [0][1][2][0][RTW89_WW][6] = 30, ++ [0][1][2][0][RTW89_WW][8] = 40, ++ [0][1][2][0][RTW89_WW][10] = 40, ++ [0][1][2][0][RTW89_WW][12] = 40, ++ [0][1][2][0][RTW89_WW][14] = 40, ++ [0][1][2][0][RTW89_WW][15] = 40, ++ [0][1][2][0][RTW89_WW][17] = 40, ++ [0][1][2][0][RTW89_WW][19] = 40, ++ [0][1][2][0][RTW89_WW][21] = 40, ++ [0][1][2][0][RTW89_WW][23] = 40, ++ [0][1][2][0][RTW89_WW][25] = 40, ++ [0][1][2][0][RTW89_WW][27] = 40, ++ [0][1][2][0][RTW89_WW][29] = 40, ++ [0][1][2][0][RTW89_WW][31] = 40, ++ [0][1][2][0][RTW89_WW][33] = 40, ++ [0][1][2][0][RTW89_WW][35] = 40, ++ [0][1][2][0][RTW89_WW][37] = 50, ++ [0][1][2][0][RTW89_WW][38] = 16, ++ [0][1][2][0][RTW89_WW][40] = 16, ++ [0][1][2][0][RTW89_WW][42] = 16, ++ [0][1][2][0][RTW89_WW][44] = 16, ++ [0][1][2][0][RTW89_WW][46] = 16, ++ [0][1][2][0][RTW89_WW][48] = 58, ++ [0][1][2][0][RTW89_WW][50] = 58, ++ [0][1][2][0][RTW89_WW][52] = 58, ++ [0][1][2][1][RTW89_WW][0] = 14, ++ [0][1][2][1][RTW89_WW][2] = 14, ++ [0][1][2][1][RTW89_WW][4] = 14, ++ [0][1][2][1][RTW89_WW][6] = 14, ++ [0][1][2][1][RTW89_WW][8] = 28, ++ [0][1][2][1][RTW89_WW][10] = 28, ++ [0][1][2][1][RTW89_WW][12] = 28, ++ [0][1][2][1][RTW89_WW][14] = 28, ++ [0][1][2][1][RTW89_WW][15] = 28, ++ [0][1][2][1][RTW89_WW][17] = 28, ++ [0][1][2][1][RTW89_WW][19] = 28, ++ [0][1][2][1][RTW89_WW][21] = 28, ++ [0][1][2][1][RTW89_WW][23] = 28, ++ [0][1][2][1][RTW89_WW][25] = 28, ++ [0][1][2][1][RTW89_WW][27] = 28, ++ [0][1][2][1][RTW89_WW][29] = 28, ++ [0][1][2][1][RTW89_WW][31] = 28, ++ [0][1][2][1][RTW89_WW][33] = 28, ++ [0][1][2][1][RTW89_WW][35] = 28, ++ [0][1][2][1][RTW89_WW][37] = 36, ++ [0][1][2][1][RTW89_WW][38] = 4, ++ [0][1][2][1][RTW89_WW][40] = 4, ++ [0][1][2][1][RTW89_WW][42] = 4, ++ [0][1][2][1][RTW89_WW][44] = 4, ++ [0][1][2][1][RTW89_WW][46] = 4, ++ [0][1][2][1][RTW89_WW][48] = 58, ++ [0][1][2][1][RTW89_WW][50] = 58, ++ [0][1][2][1][RTW89_WW][52] = 58, ++ [1][0][2][0][RTW89_WW][1] = 42, ++ [1][0][2][0][RTW89_WW][5] = 42, ++ [1][0][2][0][RTW89_WW][9] = 52, ++ [1][0][2][0][RTW89_WW][13] = 52, ++ [1][0][2][0][RTW89_WW][16] = 52, ++ [1][0][2][0][RTW89_WW][20] = 52, ++ [1][0][2][0][RTW89_WW][24] = 52, ++ [1][0][2][0][RTW89_WW][28] = 52, ++ [1][0][2][0][RTW89_WW][32] = 52, ++ [1][0][2][0][RTW89_WW][36] = 64, ++ [1][0][2][0][RTW89_WW][39] = 28, ++ [1][0][2][0][RTW89_WW][43] = 28, ++ [1][0][2][0][RTW89_WW][47] = 78, ++ [1][0][2][0][RTW89_WW][51] = 70, ++ [1][1][2][0][RTW89_WW][1] = 30, ++ [1][1][2][0][RTW89_WW][5] = 30, ++ [1][1][2][0][RTW89_WW][9] = 40, ++ [1][1][2][0][RTW89_WW][13] = 40, ++ [1][1][2][0][RTW89_WW][16] = 40, ++ [1][1][2][0][RTW89_WW][20] = 40, ++ [1][1][2][0][RTW89_WW][24] = 40, ++ [1][1][2][0][RTW89_WW][28] = 40, ++ [1][1][2][0][RTW89_WW][32] = 40, ++ [1][1][2][0][RTW89_WW][36] = 50, ++ [1][1][2][0][RTW89_WW][39] = 16, ++ [1][1][2][0][RTW89_WW][43] = 16, ++ [1][1][2][0][RTW89_WW][47] = 68, ++ [1][1][2][0][RTW89_WW][51] = 66, ++ [1][1][2][1][RTW89_WW][1] = 16, ++ [1][1][2][1][RTW89_WW][5] = 16, ++ [1][1][2][1][RTW89_WW][9] = 28, ++ [1][1][2][1][RTW89_WW][13] = 28, ++ [1][1][2][1][RTW89_WW][16] = 28, ++ [1][1][2][1][RTW89_WW][20] = 28, ++ [1][1][2][1][RTW89_WW][24] = 28, ++ [1][1][2][1][RTW89_WW][28] = 28, ++ [1][1][2][1][RTW89_WW][32] = 28, ++ [1][1][2][1][RTW89_WW][36] = 36, ++ [1][1][2][1][RTW89_WW][39] = 4, ++ [1][1][2][1][RTW89_WW][43] = 4, ++ [1][1][2][1][RTW89_WW][47] = 68, ++ [1][1][2][1][RTW89_WW][51] = 66, ++ [2][0][2][0][RTW89_WW][3] = 42, ++ [2][0][2][0][RTW89_WW][11] = 52, ++ [2][0][2][0][RTW89_WW][18] = 52, ++ [2][0][2][0][RTW89_WW][26] = 52, ++ [2][0][2][0][RTW89_WW][34] = 64, ++ [2][0][2][0][RTW89_WW][41] = 28, ++ [2][0][2][0][RTW89_WW][49] = 64, ++ [2][1][2][0][RTW89_WW][3] = 28, ++ [2][1][2][0][RTW89_WW][11] = 40, ++ [2][1][2][0][RTW89_WW][18] = 40, ++ [2][1][2][0][RTW89_WW][26] = 40, ++ [2][1][2][0][RTW89_WW][34] = 50, ++ [2][1][2][0][RTW89_WW][41] = 16, ++ [2][1][2][0][RTW89_WW][49] = 58, ++ [2][1][2][1][RTW89_WW][3] = 16, ++ [2][1][2][1][RTW89_WW][11] = 28, ++ [2][1][2][1][RTW89_WW][18] = 28, ++ [2][1][2][1][RTW89_WW][26] = 28, ++ [2][1][2][1][RTW89_WW][34] = 34, ++ [2][1][2][1][RTW89_WW][41] = 4, ++ [2][1][2][1][RTW89_WW][49] = 58, ++ [0][0][1][0][RTW89_FCC][0] = 78, ++ [0][0][1][0][RTW89_ETSI][0] = 58, ++ [0][0][1][0][RTW89_MKK][0] = 60, ++ [0][0][1][0][RTW89_IC][0] = 60, ++ [0][0][1][0][RTW89_KCC][0] = 76, ++ [0][0][1][0][RTW89_ACMA][0] = 58, ++ [0][0][1][0][RTW89_CHILE][0] = 42, ++ [0][0][1][0][RTW89_UKRAINE][0] = 52, ++ [0][0][1][0][RTW89_MEXICO][0] = 62, ++ [0][0][1][0][RTW89_CN][0] = 58, ++ [0][0][1][0][RTW89_QATAR][0] = 58, ++ [0][0][1][0][RTW89_UK][0] = 58, ++ [0][0][1][0][RTW89_FCC][2] = 78, ++ [0][0][1][0][RTW89_ETSI][2] = 58, ++ [0][0][1][0][RTW89_MKK][2] = 60, ++ [0][0][1][0][RTW89_IC][2] = 60, ++ [0][0][1][0][RTW89_KCC][2] = 76, ++ [0][0][1][0][RTW89_ACMA][2] = 58, ++ [0][0][1][0][RTW89_CHILE][2] = 42, ++ [0][0][1][0][RTW89_UKRAINE][2] = 52, ++ [0][0][1][0][RTW89_MEXICO][2] = 62, ++ [0][0][1][0][RTW89_CN][2] = 58, ++ [0][0][1][0][RTW89_QATAR][2] = 58, ++ [0][0][1][0][RTW89_UK][2] = 58, ++ [0][0][1][0][RTW89_FCC][4] = 78, ++ [0][0][1][0][RTW89_ETSI][4] = 58, ++ [0][0][1][0][RTW89_MKK][4] = 60, ++ [0][0][1][0][RTW89_IC][4] = 60, ++ [0][0][1][0][RTW89_KCC][4] = 76, ++ [0][0][1][0][RTW89_ACMA][4] = 58, ++ [0][0][1][0][RTW89_CHILE][4] = 42, ++ [0][0][1][0][RTW89_UKRAINE][4] = 52, ++ [0][0][1][0][RTW89_MEXICO][4] = 62, ++ [0][0][1][0][RTW89_CN][4] = 58, ++ [0][0][1][0][RTW89_QATAR][4] = 58, ++ [0][0][1][0][RTW89_UK][4] = 58, ++ [0][0][1][0][RTW89_FCC][6] = 78, ++ [0][0][1][0][RTW89_ETSI][6] = 58, ++ [0][0][1][0][RTW89_MKK][6] = 60, ++ [0][0][1][0][RTW89_IC][6] = 60, ++ [0][0][1][0][RTW89_KCC][6] = 50, ++ [0][0][1][0][RTW89_ACMA][6] = 58, ++ [0][0][1][0][RTW89_CHILE][6] = 42, ++ [0][0][1][0][RTW89_UKRAINE][6] = 52, ++ [0][0][1][0][RTW89_MEXICO][6] = 62, ++ [0][0][1][0][RTW89_CN][6] = 58, ++ [0][0][1][0][RTW89_QATAR][6] = 58, ++ [0][0][1][0][RTW89_UK][6] = 58, ++ [0][0][1][0][RTW89_FCC][8] = 78, ++ [0][0][1][0][RTW89_ETSI][8] = 58, ++ [0][0][1][0][RTW89_MKK][8] = 62, ++ [0][0][1][0][RTW89_IC][8] = 64, ++ [0][0][1][0][RTW89_KCC][8] = 70, ++ [0][0][1][0][RTW89_ACMA][8] = 58, ++ [0][0][1][0][RTW89_CHILE][8] = 66, ++ [0][0][1][0][RTW89_UKRAINE][8] = 52, ++ [0][0][1][0][RTW89_MEXICO][8] = 78, ++ [0][0][1][0][RTW89_CN][8] = 58, ++ [0][0][1][0][RTW89_QATAR][8] = 58, ++ [0][0][1][0][RTW89_UK][8] = 58, ++ [0][0][1][0][RTW89_FCC][10] = 78, ++ [0][0][1][0][RTW89_ETSI][10] = 58, ++ [0][0][1][0][RTW89_MKK][10] = 62, ++ [0][0][1][0][RTW89_IC][10] = 64, ++ [0][0][1][0][RTW89_KCC][10] = 70, ++ [0][0][1][0][RTW89_ACMA][10] = 58, ++ [0][0][1][0][RTW89_CHILE][10] = 66, ++ [0][0][1][0][RTW89_UKRAINE][10] = 52, ++ [0][0][1][0][RTW89_MEXICO][10] = 78, ++ [0][0][1][0][RTW89_CN][10] = 58, ++ [0][0][1][0][RTW89_QATAR][10] = 58, ++ [0][0][1][0][RTW89_UK][10] = 58, ++ [0][0][1][0][RTW89_FCC][12] = 78, ++ [0][0][1][0][RTW89_ETSI][12] = 58, ++ [0][0][1][0][RTW89_MKK][12] = 62, ++ [0][0][1][0][RTW89_IC][12] = 64, ++ [0][0][1][0][RTW89_KCC][12] = 74, ++ [0][0][1][0][RTW89_ACMA][12] = 58, ++ [0][0][1][0][RTW89_CHILE][12] = 66, ++ [0][0][1][0][RTW89_UKRAINE][12] = 52, ++ [0][0][1][0][RTW89_MEXICO][12] = 78, ++ [0][0][1][0][RTW89_CN][12] = 58, ++ [0][0][1][0][RTW89_QATAR][12] = 58, ++ [0][0][1][0][RTW89_UK][12] = 58, ++ [0][0][1][0][RTW89_FCC][14] = 78, ++ [0][0][1][0][RTW89_ETSI][14] = 58, ++ [0][0][1][0][RTW89_MKK][14] = 60, ++ [0][0][1][0][RTW89_IC][14] = 64, ++ [0][0][1][0][RTW89_KCC][14] = 74, ++ [0][0][1][0][RTW89_ACMA][14] = 58, ++ [0][0][1][0][RTW89_CHILE][14] = 66, ++ [0][0][1][0][RTW89_UKRAINE][14] = 52, ++ [0][0][1][0][RTW89_MEXICO][14] = 78, ++ [0][0][1][0][RTW89_CN][14] = 58, ++ [0][0][1][0][RTW89_QATAR][14] = 58, ++ [0][0][1][0][RTW89_UK][14] = 58, ++ [0][0][1][0][RTW89_FCC][15] = 76, ++ [0][0][1][0][RTW89_ETSI][15] = 58, ++ [0][0][1][0][RTW89_MKK][15] = 76, ++ [0][0][1][0][RTW89_IC][15] = 76, ++ [0][0][1][0][RTW89_KCC][15] = 74, ++ [0][0][1][0][RTW89_ACMA][15] = 58, ++ [0][0][1][0][RTW89_CHILE][15] = 66, ++ [0][0][1][0][RTW89_UKRAINE][15] = 52, ++ [0][0][1][0][RTW89_MEXICO][15] = 76, ++ [0][0][1][0][RTW89_CN][15] = 127, ++ [0][0][1][0][RTW89_QATAR][15] = 58, ++ [0][0][1][0][RTW89_UK][15] = 58, ++ [0][0][1][0][RTW89_FCC][17] = 78, ++ [0][0][1][0][RTW89_ETSI][17] = 58, ++ [0][0][1][0][RTW89_MKK][17] = 76, ++ [0][0][1][0][RTW89_IC][17] = 78, ++ [0][0][1][0][RTW89_KCC][17] = 74, ++ [0][0][1][0][RTW89_ACMA][17] = 58, ++ [0][0][1][0][RTW89_CHILE][17] = 66, ++ [0][0][1][0][RTW89_UKRAINE][17] = 52, ++ [0][0][1][0][RTW89_MEXICO][17] = 78, ++ [0][0][1][0][RTW89_CN][17] = 127, ++ [0][0][1][0][RTW89_QATAR][17] = 58, ++ [0][0][1][0][RTW89_UK][17] = 58, ++ [0][0][1][0][RTW89_FCC][19] = 78, ++ [0][0][1][0][RTW89_ETSI][19] = 58, ++ [0][0][1][0][RTW89_MKK][19] = 76, ++ [0][0][1][0][RTW89_IC][19] = 78, ++ [0][0][1][0][RTW89_KCC][19] = 74, ++ [0][0][1][0][RTW89_ACMA][19] = 58, ++ [0][0][1][0][RTW89_CHILE][19] = 66, ++ [0][0][1][0][RTW89_UKRAINE][19] = 52, ++ [0][0][1][0][RTW89_MEXICO][19] = 78, ++ [0][0][1][0][RTW89_CN][19] = 127, ++ [0][0][1][0][RTW89_QATAR][19] = 58, ++ [0][0][1][0][RTW89_UK][19] = 58, ++ [0][0][1][0][RTW89_FCC][21] = 78, ++ [0][0][1][0][RTW89_ETSI][21] = 58, ++ [0][0][1][0][RTW89_MKK][21] = 76, ++ [0][0][1][0][RTW89_IC][21] = 78, ++ [0][0][1][0][RTW89_KCC][21] = 74, ++ [0][0][1][0][RTW89_ACMA][21] = 58, ++ [0][0][1][0][RTW89_CHILE][21] = 68, ++ [0][0][1][0][RTW89_UKRAINE][21] = 52, ++ [0][0][1][0][RTW89_MEXICO][21] = 78, ++ [0][0][1][0][RTW89_CN][21] = 127, ++ [0][0][1][0][RTW89_QATAR][21] = 58, ++ [0][0][1][0][RTW89_UK][21] = 58, ++ [0][0][1][0][RTW89_FCC][23] = 78, ++ [0][0][1][0][RTW89_ETSI][23] = 58, ++ [0][0][1][0][RTW89_MKK][23] = 76, ++ [0][0][1][0][RTW89_IC][23] = 78, ++ [0][0][1][0][RTW89_KCC][23] = 74, ++ [0][0][1][0][RTW89_ACMA][23] = 58, ++ [0][0][1][0][RTW89_CHILE][23] = 68, ++ [0][0][1][0][RTW89_UKRAINE][23] = 52, ++ [0][0][1][0][RTW89_MEXICO][23] = 78, ++ [0][0][1][0][RTW89_CN][23] = 127, ++ [0][0][1][0][RTW89_QATAR][23] = 58, ++ [0][0][1][0][RTW89_UK][23] = 58, ++ [0][0][1][0][RTW89_FCC][25] = 78, ++ [0][0][1][0][RTW89_ETSI][25] = 58, ++ [0][0][1][0][RTW89_MKK][25] = 76, ++ [0][0][1][0][RTW89_IC][25] = 127, ++ [0][0][1][0][RTW89_KCC][25] = 74, ++ [0][0][1][0][RTW89_ACMA][25] = 127, ++ [0][0][1][0][RTW89_CHILE][25] = 68, ++ [0][0][1][0][RTW89_UKRAINE][25] = 52, ++ [0][0][1][0][RTW89_MEXICO][25] = 78, ++ [0][0][1][0][RTW89_CN][25] = 127, ++ [0][0][1][0][RTW89_QATAR][25] = 58, ++ [0][0][1][0][RTW89_UK][25] = 58, ++ [0][0][1][0][RTW89_FCC][27] = 78, ++ [0][0][1][0][RTW89_ETSI][27] = 58, ++ [0][0][1][0][RTW89_MKK][27] = 76, ++ [0][0][1][0][RTW89_IC][27] = 127, ++ [0][0][1][0][RTW89_KCC][27] = 74, ++ [0][0][1][0][RTW89_ACMA][27] = 127, ++ [0][0][1][0][RTW89_CHILE][27] = 66, ++ [0][0][1][0][RTW89_UKRAINE][27] = 52, ++ [0][0][1][0][RTW89_MEXICO][27] = 78, ++ [0][0][1][0][RTW89_CN][27] = 127, ++ [0][0][1][0][RTW89_QATAR][27] = 58, ++ [0][0][1][0][RTW89_UK][27] = 58, ++ [0][0][1][0][RTW89_FCC][29] = 78, ++ [0][0][1][0][RTW89_ETSI][29] = 58, ++ [0][0][1][0][RTW89_MKK][29] = 76, ++ [0][0][1][0][RTW89_IC][29] = 127, ++ [0][0][1][0][RTW89_KCC][29] = 74, ++ [0][0][1][0][RTW89_ACMA][29] = 127, ++ [0][0][1][0][RTW89_CHILE][29] = 66, ++ [0][0][1][0][RTW89_UKRAINE][29] = 52, ++ [0][0][1][0][RTW89_MEXICO][29] = 78, ++ [0][0][1][0][RTW89_CN][29] = 127, ++ [0][0][1][0][RTW89_QATAR][29] = 58, ++ [0][0][1][0][RTW89_UK][29] = 58, ++ [0][0][1][0][RTW89_FCC][31] = 78, ++ [0][0][1][0][RTW89_ETSI][31] = 58, ++ [0][0][1][0][RTW89_MKK][31] = 76, ++ [0][0][1][0][RTW89_IC][31] = 78, ++ [0][0][1][0][RTW89_KCC][31] = 72, ++ [0][0][1][0][RTW89_ACMA][31] = 58, ++ [0][0][1][0][RTW89_CHILE][31] = 66, ++ [0][0][1][0][RTW89_UKRAINE][31] = 52, ++ [0][0][1][0][RTW89_MEXICO][31] = 78, ++ [0][0][1][0][RTW89_CN][31] = 127, ++ [0][0][1][0][RTW89_QATAR][31] = 58, ++ [0][0][1][0][RTW89_UK][31] = 58, ++ [0][0][1][0][RTW89_FCC][33] = 78, ++ [0][0][1][0][RTW89_ETSI][33] = 58, ++ [0][0][1][0][RTW89_MKK][33] = 76, ++ [0][0][1][0][RTW89_IC][33] = 78, ++ [0][0][1][0][RTW89_KCC][33] = 72, ++ [0][0][1][0][RTW89_ACMA][33] = 58, ++ [0][0][1][0][RTW89_CHILE][33] = 66, ++ [0][0][1][0][RTW89_UKRAINE][33] = 52, ++ [0][0][1][0][RTW89_MEXICO][33] = 78, ++ [0][0][1][0][RTW89_CN][33] = 127, ++ [0][0][1][0][RTW89_QATAR][33] = 58, ++ [0][0][1][0][RTW89_UK][33] = 58, ++ [0][0][1][0][RTW89_FCC][35] = 70, ++ [0][0][1][0][RTW89_ETSI][35] = 58, ++ [0][0][1][0][RTW89_MKK][35] = 76, ++ [0][0][1][0][RTW89_IC][35] = 70, ++ [0][0][1][0][RTW89_KCC][35] = 72, ++ [0][0][1][0][RTW89_ACMA][35] = 58, ++ [0][0][1][0][RTW89_CHILE][35] = 66, ++ [0][0][1][0][RTW89_UKRAINE][35] = 52, ++ [0][0][1][0][RTW89_MEXICO][35] = 70, ++ [0][0][1][0][RTW89_CN][35] = 127, ++ [0][0][1][0][RTW89_QATAR][35] = 58, ++ [0][0][1][0][RTW89_UK][35] = 58, ++ [0][0][1][0][RTW89_FCC][37] = 78, ++ [0][0][1][0][RTW89_ETSI][37] = 127, ++ [0][0][1][0][RTW89_MKK][37] = 76, ++ [0][0][1][0][RTW89_IC][37] = 78, ++ [0][0][1][0][RTW89_KCC][37] = 72, ++ [0][0][1][0][RTW89_ACMA][37] = 76, ++ [0][0][1][0][RTW89_CHILE][37] = 68, ++ [0][0][1][0][RTW89_UKRAINE][37] = 127, ++ [0][0][1][0][RTW89_MEXICO][37] = 78, ++ [0][0][1][0][RTW89_CN][37] = 127, ++ [0][0][1][0][RTW89_QATAR][37] = 127, ++ [0][0][1][0][RTW89_UK][37] = 76, ++ [0][0][1][0][RTW89_FCC][38] = 78, ++ [0][0][1][0][RTW89_ETSI][38] = 28, ++ [0][0][1][0][RTW89_MKK][38] = 127, ++ [0][0][1][0][RTW89_IC][38] = 78, ++ [0][0][1][0][RTW89_KCC][38] = 74, ++ [0][0][1][0][RTW89_ACMA][38] = 76, ++ [0][0][1][0][RTW89_CHILE][38] = 68, ++ [0][0][1][0][RTW89_UKRAINE][38] = 28, ++ [0][0][1][0][RTW89_MEXICO][38] = 78, ++ [0][0][1][0][RTW89_CN][38] = 76, ++ [0][0][1][0][RTW89_QATAR][38] = 28, ++ [0][0][1][0][RTW89_UK][38] = 58, ++ [0][0][1][0][RTW89_FCC][40] = 78, ++ [0][0][1][0][RTW89_ETSI][40] = 28, ++ [0][0][1][0][RTW89_MKK][40] = 127, ++ [0][0][1][0][RTW89_IC][40] = 78, ++ [0][0][1][0][RTW89_KCC][40] = 74, ++ [0][0][1][0][RTW89_ACMA][40] = 76, ++ [0][0][1][0][RTW89_CHILE][40] = 68, ++ [0][0][1][0][RTW89_UKRAINE][40] = 28, ++ [0][0][1][0][RTW89_MEXICO][40] = 78, ++ [0][0][1][0][RTW89_CN][40] = 76, ++ [0][0][1][0][RTW89_QATAR][40] = 28, ++ [0][0][1][0][RTW89_UK][40] = 58, ++ [0][0][1][0][RTW89_FCC][42] = 78, ++ [0][0][1][0][RTW89_ETSI][42] = 28, ++ [0][0][1][0][RTW89_MKK][42] = 127, ++ [0][0][1][0][RTW89_IC][42] = 78, ++ [0][0][1][0][RTW89_KCC][42] = 74, ++ [0][0][1][0][RTW89_ACMA][42] = 76, ++ [0][0][1][0][RTW89_CHILE][42] = 66, ++ [0][0][1][0][RTW89_UKRAINE][42] = 28, ++ [0][0][1][0][RTW89_MEXICO][42] = 78, ++ [0][0][1][0][RTW89_CN][42] = 76, ++ [0][0][1][0][RTW89_QATAR][42] = 28, ++ [0][0][1][0][RTW89_UK][42] = 58, ++ [0][0][1][0][RTW89_FCC][44] = 78, ++ [0][0][1][0][RTW89_ETSI][44] = 28, ++ [0][0][1][0][RTW89_MKK][44] = 127, ++ [0][0][1][0][RTW89_IC][44] = 78, ++ [0][0][1][0][RTW89_KCC][44] = 74, ++ [0][0][1][0][RTW89_ACMA][44] = 76, ++ [0][0][1][0][RTW89_CHILE][44] = 68, ++ [0][0][1][0][RTW89_UKRAINE][44] = 28, ++ [0][0][1][0][RTW89_MEXICO][44] = 78, ++ [0][0][1][0][RTW89_CN][44] = 76, ++ [0][0][1][0][RTW89_QATAR][44] = 28, ++ [0][0][1][0][RTW89_UK][44] = 58, ++ [0][0][1][0][RTW89_FCC][46] = 78, ++ [0][0][1][0][RTW89_ETSI][46] = 28, ++ [0][0][1][0][RTW89_MKK][46] = 127, ++ [0][0][1][0][RTW89_IC][46] = 78, ++ [0][0][1][0][RTW89_KCC][46] = 74, ++ [0][0][1][0][RTW89_ACMA][46] = 76, ++ [0][0][1][0][RTW89_CHILE][46] = 68, ++ [0][0][1][0][RTW89_UKRAINE][46] = 28, ++ [0][0][1][0][RTW89_MEXICO][46] = 78, ++ [0][0][1][0][RTW89_CN][46] = 76, ++ [0][0][1][0][RTW89_QATAR][46] = 28, ++ [0][0][1][0][RTW89_UK][46] = 58, ++ [0][0][1][0][RTW89_FCC][48] = 78, ++ [0][0][1][0][RTW89_ETSI][48] = 127, ++ [0][0][1][0][RTW89_MKK][48] = 127, ++ [0][0][1][0][RTW89_IC][48] = 127, ++ [0][0][1][0][RTW89_KCC][48] = 127, ++ [0][0][1][0][RTW89_ACMA][48] = 127, ++ [0][0][1][0][RTW89_CHILE][48] = 127, ++ [0][0][1][0][RTW89_UKRAINE][48] = 127, ++ [0][0][1][0][RTW89_MEXICO][48] = 127, ++ [0][0][1][0][RTW89_CN][48] = 127, ++ [0][0][1][0][RTW89_QATAR][48] = 127, ++ [0][0][1][0][RTW89_UK][48] = 127, ++ [0][0][1][0][RTW89_FCC][50] = 78, ++ [0][0][1][0][RTW89_ETSI][50] = 127, ++ [0][0][1][0][RTW89_MKK][50] = 127, ++ [0][0][1][0][RTW89_IC][50] = 127, ++ [0][0][1][0][RTW89_KCC][50] = 127, ++ [0][0][1][0][RTW89_ACMA][50] = 127, ++ [0][0][1][0][RTW89_CHILE][50] = 127, ++ [0][0][1][0][RTW89_UKRAINE][50] = 127, ++ [0][0][1][0][RTW89_MEXICO][50] = 127, ++ [0][0][1][0][RTW89_CN][50] = 127, ++ [0][0][1][0][RTW89_QATAR][50] = 127, ++ [0][0][1][0][RTW89_UK][50] = 127, ++ [0][0][1][0][RTW89_FCC][52] = 78, ++ [0][0][1][0][RTW89_ETSI][52] = 127, ++ [0][0][1][0][RTW89_MKK][52] = 127, ++ [0][0][1][0][RTW89_IC][52] = 127, ++ [0][0][1][0][RTW89_KCC][52] = 127, ++ [0][0][1][0][RTW89_ACMA][52] = 127, ++ [0][0][1][0][RTW89_CHILE][52] = 127, ++ [0][0][1][0][RTW89_UKRAINE][52] = 127, ++ [0][0][1][0][RTW89_MEXICO][52] = 127, ++ [0][0][1][0][RTW89_CN][52] = 127, ++ [0][0][1][0][RTW89_QATAR][52] = 127, ++ [0][0][1][0][RTW89_UK][52] = 127, ++ [0][1][1][0][RTW89_FCC][0] = 68, ++ [0][1][1][0][RTW89_ETSI][0] = 46, ++ [0][1][1][0][RTW89_MKK][0] = 48, ++ [0][1][1][0][RTW89_IC][0] = 40, ++ [0][1][1][0][RTW89_KCC][0] = 64, ++ [0][1][1][0][RTW89_ACMA][0] = 46, ++ [0][1][1][0][RTW89_CHILE][0] = 30, ++ [0][1][1][0][RTW89_UKRAINE][0] = 40, ++ [0][1][1][0][RTW89_MEXICO][0] = 50, ++ [0][1][1][0][RTW89_CN][0] = 46, ++ [0][1][1][0][RTW89_QATAR][0] = 46, ++ [0][1][1][0][RTW89_UK][0] = 46, ++ [0][1][1][0][RTW89_FCC][2] = 68, ++ [0][1][1][0][RTW89_ETSI][2] = 46, ++ [0][1][1][0][RTW89_MKK][2] = 48, ++ [0][1][1][0][RTW89_IC][2] = 40, ++ [0][1][1][0][RTW89_KCC][2] = 64, ++ [0][1][1][0][RTW89_ACMA][2] = 46, ++ [0][1][1][0][RTW89_CHILE][2] = 32, ++ [0][1][1][0][RTW89_UKRAINE][2] = 40, ++ [0][1][1][0][RTW89_MEXICO][2] = 50, ++ [0][1][1][0][RTW89_CN][2] = 46, ++ [0][1][1][0][RTW89_QATAR][2] = 46, ++ [0][1][1][0][RTW89_UK][2] = 46, ++ [0][1][1][0][RTW89_FCC][4] = 68, ++ [0][1][1][0][RTW89_ETSI][4] = 46, ++ [0][1][1][0][RTW89_MKK][4] = 48, ++ [0][1][1][0][RTW89_IC][4] = 40, ++ [0][1][1][0][RTW89_KCC][4] = 64, ++ [0][1][1][0][RTW89_ACMA][4] = 46, ++ [0][1][1][0][RTW89_CHILE][4] = 30, ++ [0][1][1][0][RTW89_UKRAINE][4] = 40, ++ [0][1][1][0][RTW89_MEXICO][4] = 50, ++ [0][1][1][0][RTW89_CN][4] = 46, ++ [0][1][1][0][RTW89_QATAR][4] = 46, ++ [0][1][1][0][RTW89_UK][4] = 46, ++ [0][1][1][0][RTW89_FCC][6] = 68, ++ [0][1][1][0][RTW89_ETSI][6] = 46, ++ [0][1][1][0][RTW89_MKK][6] = 48, ++ [0][1][1][0][RTW89_IC][6] = 40, ++ [0][1][1][0][RTW89_KCC][6] = 38, ++ [0][1][1][0][RTW89_ACMA][6] = 46, ++ [0][1][1][0][RTW89_CHILE][6] = 30, ++ [0][1][1][0][RTW89_UKRAINE][6] = 40, ++ [0][1][1][0][RTW89_MEXICO][6] = 50, ++ [0][1][1][0][RTW89_CN][6] = 46, ++ [0][1][1][0][RTW89_QATAR][6] = 46, ++ [0][1][1][0][RTW89_UK][6] = 46, ++ [0][1][1][0][RTW89_FCC][8] = 68, ++ [0][1][1][0][RTW89_ETSI][8] = 46, ++ [0][1][1][0][RTW89_MKK][8] = 48, ++ [0][1][1][0][RTW89_IC][8] = 52, ++ [0][1][1][0][RTW89_KCC][8] = 64, ++ [0][1][1][0][RTW89_ACMA][8] = 46, ++ [0][1][1][0][RTW89_CHILE][8] = 52, ++ [0][1][1][0][RTW89_UKRAINE][8] = 40, ++ [0][1][1][0][RTW89_MEXICO][8] = 68, ++ [0][1][1][0][RTW89_CN][8] = 46, ++ [0][1][1][0][RTW89_QATAR][8] = 46, ++ [0][1][1][0][RTW89_UK][8] = 46, ++ [0][1][1][0][RTW89_FCC][10] = 68, ++ [0][1][1][0][RTW89_ETSI][10] = 46, ++ [0][1][1][0][RTW89_MKK][10] = 48, ++ [0][1][1][0][RTW89_IC][10] = 52, ++ [0][1][1][0][RTW89_KCC][10] = 64, ++ [0][1][1][0][RTW89_ACMA][10] = 46, ++ [0][1][1][0][RTW89_CHILE][10] = 52, ++ [0][1][1][0][RTW89_UKRAINE][10] = 40, ++ [0][1][1][0][RTW89_MEXICO][10] = 68, ++ [0][1][1][0][RTW89_CN][10] = 46, ++ [0][1][1][0][RTW89_QATAR][10] = 46, ++ [0][1][1][0][RTW89_UK][10] = 46, ++ [0][1][1][0][RTW89_FCC][12] = 68, ++ [0][1][1][0][RTW89_ETSI][12] = 46, ++ [0][1][1][0][RTW89_MKK][12] = 48, ++ [0][1][1][0][RTW89_IC][12] = 52, ++ [0][1][1][0][RTW89_KCC][12] = 64, ++ [0][1][1][0][RTW89_ACMA][12] = 46, ++ [0][1][1][0][RTW89_CHILE][12] = 52, ++ [0][1][1][0][RTW89_UKRAINE][12] = 40, ++ [0][1][1][0][RTW89_MEXICO][12] = 68, ++ [0][1][1][0][RTW89_CN][12] = 46, ++ [0][1][1][0][RTW89_QATAR][12] = 46, ++ [0][1][1][0][RTW89_UK][12] = 46, ++ [0][1][1][0][RTW89_FCC][14] = 68, ++ [0][1][1][0][RTW89_ETSI][14] = 46, ++ [0][1][1][0][RTW89_MKK][14] = 48, ++ [0][1][1][0][RTW89_IC][14] = 52, ++ [0][1][1][0][RTW89_KCC][14] = 64, ++ [0][1][1][0][RTW89_ACMA][14] = 46, ++ [0][1][1][0][RTW89_CHILE][14] = 52, ++ [0][1][1][0][RTW89_UKRAINE][14] = 40, ++ [0][1][1][0][RTW89_MEXICO][14] = 68, ++ [0][1][1][0][RTW89_CN][14] = 46, ++ [0][1][1][0][RTW89_QATAR][14] = 46, ++ [0][1][1][0][RTW89_UK][14] = 46, ++ [0][1][1][0][RTW89_FCC][15] = 66, ++ [0][1][1][0][RTW89_ETSI][15] = 46, ++ [0][1][1][0][RTW89_MKK][15] = 68, ++ [0][1][1][0][RTW89_IC][15] = 66, ++ [0][1][1][0][RTW89_KCC][15] = 62, ++ [0][1][1][0][RTW89_ACMA][15] = 46, ++ [0][1][1][0][RTW89_CHILE][15] = 48, ++ [0][1][1][0][RTW89_UKRAINE][15] = 40, ++ [0][1][1][0][RTW89_MEXICO][15] = 66, ++ [0][1][1][0][RTW89_CN][15] = 127, ++ [0][1][1][0][RTW89_QATAR][15] = 46, ++ [0][1][1][0][RTW89_UK][15] = 46, ++ [0][1][1][0][RTW89_FCC][17] = 68, ++ [0][1][1][0][RTW89_ETSI][17] = 46, ++ [0][1][1][0][RTW89_MKK][17] = 70, ++ [0][1][1][0][RTW89_IC][17] = 68, ++ [0][1][1][0][RTW89_KCC][17] = 62, ++ [0][1][1][0][RTW89_ACMA][17] = 46, ++ [0][1][1][0][RTW89_CHILE][17] = 48, ++ [0][1][1][0][RTW89_UKRAINE][17] = 40, ++ [0][1][1][0][RTW89_MEXICO][17] = 68, ++ [0][1][1][0][RTW89_CN][17] = 127, ++ [0][1][1][0][RTW89_QATAR][17] = 46, ++ [0][1][1][0][RTW89_UK][17] = 46, ++ [0][1][1][0][RTW89_FCC][19] = 68, ++ [0][1][1][0][RTW89_ETSI][19] = 46, ++ [0][1][1][0][RTW89_MKK][19] = 70, ++ [0][1][1][0][RTW89_IC][19] = 68, ++ [0][1][1][0][RTW89_KCC][19] = 62, ++ [0][1][1][0][RTW89_ACMA][19] = 46, ++ [0][1][1][0][RTW89_CHILE][19] = 48, ++ [0][1][1][0][RTW89_UKRAINE][19] = 40, ++ [0][1][1][0][RTW89_MEXICO][19] = 68, ++ [0][1][1][0][RTW89_CN][19] = 127, ++ [0][1][1][0][RTW89_QATAR][19] = 46, ++ [0][1][1][0][RTW89_UK][19] = 46, ++ [0][1][1][0][RTW89_FCC][21] = 68, ++ [0][1][1][0][RTW89_ETSI][21] = 46, ++ [0][1][1][0][RTW89_MKK][21] = 70, ++ [0][1][1][0][RTW89_IC][21] = 68, ++ [0][1][1][0][RTW89_KCC][21] = 62, ++ [0][1][1][0][RTW89_ACMA][21] = 46, ++ [0][1][1][0][RTW89_CHILE][21] = 48, ++ [0][1][1][0][RTW89_UKRAINE][21] = 40, ++ [0][1][1][0][RTW89_MEXICO][21] = 68, ++ [0][1][1][0][RTW89_CN][21] = 127, ++ [0][1][1][0][RTW89_QATAR][21] = 46, ++ [0][1][1][0][RTW89_UK][21] = 46, ++ [0][1][1][0][RTW89_FCC][23] = 68, ++ [0][1][1][0][RTW89_ETSI][23] = 46, ++ [0][1][1][0][RTW89_MKK][23] = 70, ++ [0][1][1][0][RTW89_IC][23] = 68, ++ [0][1][1][0][RTW89_KCC][23] = 62, ++ [0][1][1][0][RTW89_ACMA][23] = 46, ++ [0][1][1][0][RTW89_CHILE][23] = 48, ++ [0][1][1][0][RTW89_UKRAINE][23] = 40, ++ [0][1][1][0][RTW89_MEXICO][23] = 68, ++ [0][1][1][0][RTW89_CN][23] = 127, ++ [0][1][1][0][RTW89_QATAR][23] = 46, ++ [0][1][1][0][RTW89_UK][23] = 46, ++ [0][1][1][0][RTW89_FCC][25] = 68, ++ [0][1][1][0][RTW89_ETSI][25] = 46, ++ [0][1][1][0][RTW89_MKK][25] = 68, ++ [0][1][1][0][RTW89_IC][25] = 127, ++ [0][1][1][0][RTW89_KCC][25] = 62, ++ [0][1][1][0][RTW89_ACMA][25] = 127, ++ [0][1][1][0][RTW89_CHILE][25] = 48, ++ [0][1][1][0][RTW89_UKRAINE][25] = 40, ++ [0][1][1][0][RTW89_MEXICO][25] = 68, ++ [0][1][1][0][RTW89_CN][25] = 127, ++ [0][1][1][0][RTW89_QATAR][25] = 46, ++ [0][1][1][0][RTW89_UK][25] = 46, ++ [0][1][1][0][RTW89_FCC][27] = 68, ++ [0][1][1][0][RTW89_ETSI][27] = 46, ++ [0][1][1][0][RTW89_MKK][27] = 70, ++ [0][1][1][0][RTW89_IC][27] = 127, ++ [0][1][1][0][RTW89_KCC][27] = 62, ++ [0][1][1][0][RTW89_ACMA][27] = 127, ++ [0][1][1][0][RTW89_CHILE][27] = 50, ++ [0][1][1][0][RTW89_UKRAINE][27] = 40, ++ [0][1][1][0][RTW89_MEXICO][27] = 68, ++ [0][1][1][0][RTW89_CN][27] = 127, ++ [0][1][1][0][RTW89_QATAR][27] = 46, ++ [0][1][1][0][RTW89_UK][27] = 46, ++ [0][1][1][0][RTW89_FCC][29] = 68, ++ [0][1][1][0][RTW89_ETSI][29] = 46, ++ [0][1][1][0][RTW89_MKK][29] = 70, ++ [0][1][1][0][RTW89_IC][29] = 127, ++ [0][1][1][0][RTW89_KCC][29] = 62, ++ [0][1][1][0][RTW89_ACMA][29] = 127, ++ [0][1][1][0][RTW89_CHILE][29] = 50, ++ [0][1][1][0][RTW89_UKRAINE][29] = 40, ++ [0][1][1][0][RTW89_MEXICO][29] = 68, ++ [0][1][1][0][RTW89_CN][29] = 127, ++ [0][1][1][0][RTW89_QATAR][29] = 46, ++ [0][1][1][0][RTW89_UK][29] = 46, ++ [0][1][1][0][RTW89_FCC][31] = 68, ++ [0][1][1][0][RTW89_ETSI][31] = 46, ++ [0][1][1][0][RTW89_MKK][31] = 70, ++ [0][1][1][0][RTW89_IC][31] = 68, ++ [0][1][1][0][RTW89_KCC][31] = 62, ++ [0][1][1][0][RTW89_ACMA][31] = 46, ++ [0][1][1][0][RTW89_CHILE][31] = 50, ++ [0][1][1][0][RTW89_UKRAINE][31] = 40, ++ [0][1][1][0][RTW89_MEXICO][31] = 68, ++ [0][1][1][0][RTW89_CN][31] = 127, ++ [0][1][1][0][RTW89_QATAR][31] = 46, ++ [0][1][1][0][RTW89_UK][31] = 46, ++ [0][1][1][0][RTW89_FCC][33] = 68, ++ [0][1][1][0][RTW89_ETSI][33] = 46, ++ [0][1][1][0][RTW89_MKK][33] = 70, ++ [0][1][1][0][RTW89_IC][33] = 68, ++ [0][1][1][0][RTW89_KCC][33] = 62, ++ [0][1][1][0][RTW89_ACMA][33] = 46, ++ [0][1][1][0][RTW89_CHILE][33] = 50, ++ [0][1][1][0][RTW89_UKRAINE][33] = 40, ++ [0][1][1][0][RTW89_MEXICO][33] = 68, ++ [0][1][1][0][RTW89_CN][33] = 127, ++ [0][1][1][0][RTW89_QATAR][33] = 46, ++ [0][1][1][0][RTW89_UK][33] = 46, ++ [0][1][1][0][RTW89_FCC][35] = 66, ++ [0][1][1][0][RTW89_ETSI][35] = 46, ++ [0][1][1][0][RTW89_MKK][35] = 70, ++ [0][1][1][0][RTW89_IC][35] = 66, ++ [0][1][1][0][RTW89_KCC][35] = 62, ++ [0][1][1][0][RTW89_ACMA][35] = 46, ++ [0][1][1][0][RTW89_CHILE][35] = 50, ++ [0][1][1][0][RTW89_UKRAINE][35] = 40, ++ [0][1][1][0][RTW89_MEXICO][35] = 66, ++ [0][1][1][0][RTW89_CN][35] = 127, ++ [0][1][1][0][RTW89_QATAR][35] = 46, ++ [0][1][1][0][RTW89_UK][35] = 46, ++ [0][1][1][0][RTW89_FCC][37] = 68, ++ [0][1][1][0][RTW89_ETSI][37] = 127, ++ [0][1][1][0][RTW89_MKK][37] = 70, ++ [0][1][1][0][RTW89_IC][37] = 68, ++ [0][1][1][0][RTW89_KCC][37] = 62, ++ [0][1][1][0][RTW89_ACMA][37] = 70, ++ [0][1][1][0][RTW89_CHILE][37] = 50, ++ [0][1][1][0][RTW89_UKRAINE][37] = 127, ++ [0][1][1][0][RTW89_MEXICO][37] = 68, ++ [0][1][1][0][RTW89_CN][37] = 127, ++ [0][1][1][0][RTW89_QATAR][37] = 127, ++ [0][1][1][0][RTW89_UK][37] = 76, ++ [0][1][1][0][RTW89_FCC][38] = 78, ++ [0][1][1][0][RTW89_ETSI][38] = 16, ++ [0][1][1][0][RTW89_MKK][38] = 127, ++ [0][1][1][0][RTW89_IC][38] = 78, ++ [0][1][1][0][RTW89_KCC][38] = 60, ++ [0][1][1][0][RTW89_ACMA][38] = 72, ++ [0][1][1][0][RTW89_CHILE][38] = 48, ++ [0][1][1][0][RTW89_UKRAINE][38] = 16, ++ [0][1][1][0][RTW89_MEXICO][38] = 78, ++ [0][1][1][0][RTW89_CN][38] = 76, ++ [0][1][1][0][RTW89_QATAR][38] = 16, ++ [0][1][1][0][RTW89_UK][38] = 46, ++ [0][1][1][0][RTW89_FCC][40] = 78, ++ [0][1][1][0][RTW89_ETSI][40] = 16, ++ [0][1][1][0][RTW89_MKK][40] = 127, ++ [0][1][1][0][RTW89_IC][40] = 78, ++ [0][1][1][0][RTW89_KCC][40] = 60, ++ [0][1][1][0][RTW89_ACMA][40] = 72, ++ [0][1][1][0][RTW89_CHILE][40] = 48, ++ [0][1][1][0][RTW89_UKRAINE][40] = 16, ++ [0][1][1][0][RTW89_MEXICO][40] = 78, ++ [0][1][1][0][RTW89_CN][40] = 76, ++ [0][1][1][0][RTW89_QATAR][40] = 16, ++ [0][1][1][0][RTW89_UK][40] = 46, ++ [0][1][1][0][RTW89_FCC][42] = 78, ++ [0][1][1][0][RTW89_ETSI][42] = 16, ++ [0][1][1][0][RTW89_MKK][42] = 127, ++ [0][1][1][0][RTW89_IC][42] = 78, ++ [0][1][1][0][RTW89_KCC][42] = 60, ++ [0][1][1][0][RTW89_ACMA][42] = 76, ++ [0][1][1][0][RTW89_CHILE][42] = 48, ++ [0][1][1][0][RTW89_UKRAINE][42] = 16, ++ [0][1][1][0][RTW89_MEXICO][42] = 78, ++ [0][1][1][0][RTW89_CN][42] = 76, ++ [0][1][1][0][RTW89_QATAR][42] = 16, ++ [0][1][1][0][RTW89_UK][42] = 46, ++ [0][1][1][0][RTW89_FCC][44] = 78, ++ [0][1][1][0][RTW89_ETSI][44] = 16, ++ [0][1][1][0][RTW89_MKK][44] = 127, ++ [0][1][1][0][RTW89_IC][44] = 78, ++ [0][1][1][0][RTW89_KCC][44] = 60, ++ [0][1][1][0][RTW89_ACMA][44] = 76, ++ [0][1][1][0][RTW89_CHILE][44] = 48, ++ [0][1][1][0][RTW89_UKRAINE][44] = 16, ++ [0][1][1][0][RTW89_MEXICO][44] = 78, ++ [0][1][1][0][RTW89_CN][44] = 76, ++ [0][1][1][0][RTW89_QATAR][44] = 16, ++ [0][1][1][0][RTW89_UK][44] = 46, ++ [0][1][1][0][RTW89_FCC][46] = 78, ++ [0][1][1][0][RTW89_ETSI][46] = 16, ++ [0][1][1][0][RTW89_MKK][46] = 127, ++ [0][1][1][0][RTW89_IC][46] = 78, ++ [0][1][1][0][RTW89_KCC][46] = 60, ++ [0][1][1][0][RTW89_ACMA][46] = 76, ++ [0][1][1][0][RTW89_CHILE][46] = 48, ++ [0][1][1][0][RTW89_UKRAINE][46] = 16, ++ [0][1][1][0][RTW89_MEXICO][46] = 78, ++ [0][1][1][0][RTW89_CN][46] = 76, ++ [0][1][1][0][RTW89_QATAR][46] = 16, ++ [0][1][1][0][RTW89_UK][46] = 46, ++ [0][1][1][0][RTW89_FCC][48] = 56, ++ [0][1][1][0][RTW89_ETSI][48] = 127, ++ [0][1][1][0][RTW89_MKK][48] = 127, ++ [0][1][1][0][RTW89_IC][48] = 127, ++ [0][1][1][0][RTW89_KCC][48] = 127, ++ [0][1][1][0][RTW89_ACMA][48] = 127, ++ [0][1][1][0][RTW89_CHILE][48] = 127, ++ [0][1][1][0][RTW89_UKRAINE][48] = 127, ++ [0][1][1][0][RTW89_MEXICO][48] = 127, ++ [0][1][1][0][RTW89_CN][48] = 127, ++ [0][1][1][0][RTW89_QATAR][48] = 127, ++ [0][1][1][0][RTW89_UK][48] = 127, ++ [0][1][1][0][RTW89_FCC][50] = 56, ++ [0][1][1][0][RTW89_ETSI][50] = 127, ++ [0][1][1][0][RTW89_MKK][50] = 127, ++ [0][1][1][0][RTW89_IC][50] = 127, ++ [0][1][1][0][RTW89_KCC][50] = 127, ++ [0][1][1][0][RTW89_ACMA][50] = 127, ++ [0][1][1][0][RTW89_CHILE][50] = 127, ++ [0][1][1][0][RTW89_UKRAINE][50] = 127, ++ [0][1][1][0][RTW89_MEXICO][50] = 127, ++ [0][1][1][0][RTW89_CN][50] = 127, ++ [0][1][1][0][RTW89_QATAR][50] = 127, ++ [0][1][1][0][RTW89_UK][50] = 127, ++ [0][1][1][0][RTW89_FCC][52] = 56, ++ [0][1][1][0][RTW89_ETSI][52] = 127, ++ [0][1][1][0][RTW89_MKK][52] = 127, ++ [0][1][1][0][RTW89_IC][52] = 127, ++ [0][1][1][0][RTW89_KCC][52] = 127, ++ [0][1][1][0][RTW89_ACMA][52] = 127, ++ [0][1][1][0][RTW89_CHILE][52] = 127, ++ [0][1][1][0][RTW89_UKRAINE][52] = 127, ++ [0][1][1][0][RTW89_MEXICO][52] = 127, ++ [0][1][1][0][RTW89_CN][52] = 127, ++ [0][1][1][0][RTW89_QATAR][52] = 127, ++ [0][1][1][0][RTW89_UK][52] = 127, ++ [0][0][2][0][RTW89_FCC][0] = 78, ++ [0][0][2][0][RTW89_ETSI][0] = 60, ++ [0][0][2][0][RTW89_MKK][0] = 62, ++ [0][0][2][0][RTW89_IC][0] = 64, ++ [0][0][2][0][RTW89_KCC][0] = 74, ++ [0][0][2][0][RTW89_ACMA][0] = 60, ++ [0][0][2][0][RTW89_CHILE][0] = 42, ++ [0][0][2][0][RTW89_UKRAINE][0] = 52, ++ [0][0][2][0][RTW89_MEXICO][0] = 62, ++ [0][0][2][0][RTW89_CN][0] = 60, ++ [0][0][2][0][RTW89_QATAR][0] = 60, ++ [0][0][2][0][RTW89_UK][0] = 60, ++ [0][0][2][0][RTW89_FCC][2] = 78, ++ [0][0][2][0][RTW89_ETSI][2] = 60, ++ [0][0][2][0][RTW89_MKK][2] = 62, ++ [0][0][2][0][RTW89_IC][2] = 64, ++ [0][0][2][0][RTW89_KCC][2] = 74, ++ [0][0][2][0][RTW89_ACMA][2] = 60, ++ [0][0][2][0][RTW89_CHILE][2] = 42, ++ [0][0][2][0][RTW89_UKRAINE][2] = 52, ++ [0][0][2][0][RTW89_MEXICO][2] = 62, ++ [0][0][2][0][RTW89_CN][2] = 60, ++ [0][0][2][0][RTW89_QATAR][2] = 60, ++ [0][0][2][0][RTW89_UK][2] = 60, ++ [0][0][2][0][RTW89_FCC][4] = 78, ++ [0][0][2][0][RTW89_ETSI][4] = 60, ++ [0][0][2][0][RTW89_MKK][4] = 62, ++ [0][0][2][0][RTW89_IC][4] = 64, ++ [0][0][2][0][RTW89_KCC][4] = 74, ++ [0][0][2][0][RTW89_ACMA][4] = 60, ++ [0][0][2][0][RTW89_CHILE][4] = 42, ++ [0][0][2][0][RTW89_UKRAINE][4] = 52, ++ [0][0][2][0][RTW89_MEXICO][4] = 62, ++ [0][0][2][0][RTW89_CN][4] = 60, ++ [0][0][2][0][RTW89_QATAR][4] = 60, ++ [0][0][2][0][RTW89_UK][4] = 60, ++ [0][0][2][0][RTW89_FCC][6] = 78, ++ [0][0][2][0][RTW89_ETSI][6] = 60, ++ [0][0][2][0][RTW89_MKK][6] = 62, ++ [0][0][2][0][RTW89_IC][6] = 64, ++ [0][0][2][0][RTW89_KCC][6] = 50, ++ [0][0][2][0][RTW89_ACMA][6] = 60, ++ [0][0][2][0][RTW89_CHILE][6] = 42, ++ [0][0][2][0][RTW89_UKRAINE][6] = 52, ++ [0][0][2][0][RTW89_MEXICO][6] = 62, ++ [0][0][2][0][RTW89_CN][6] = 60, ++ [0][0][2][0][RTW89_QATAR][6] = 60, ++ [0][0][2][0][RTW89_UK][6] = 60, ++ [0][0][2][0][RTW89_FCC][8] = 78, ++ [0][0][2][0][RTW89_ETSI][8] = 60, ++ [0][0][2][0][RTW89_MKK][8] = 62, ++ [0][0][2][0][RTW89_IC][8] = 64, ++ [0][0][2][0][RTW89_KCC][8] = 74, ++ [0][0][2][0][RTW89_ACMA][8] = 60, ++ [0][0][2][0][RTW89_CHILE][8] = 66, ++ [0][0][2][0][RTW89_UKRAINE][8] = 52, ++ [0][0][2][0][RTW89_MEXICO][8] = 78, ++ [0][0][2][0][RTW89_CN][8] = 60, ++ [0][0][2][0][RTW89_QATAR][8] = 60, ++ [0][0][2][0][RTW89_UK][8] = 60, ++ [0][0][2][0][RTW89_FCC][10] = 78, ++ [0][0][2][0][RTW89_ETSI][10] = 60, ++ [0][0][2][0][RTW89_MKK][10] = 62, ++ [0][0][2][0][RTW89_IC][10] = 64, ++ [0][0][2][0][RTW89_KCC][10] = 74, ++ [0][0][2][0][RTW89_ACMA][10] = 60, ++ [0][0][2][0][RTW89_CHILE][10] = 66, ++ [0][0][2][0][RTW89_UKRAINE][10] = 52, ++ [0][0][2][0][RTW89_MEXICO][10] = 78, ++ [0][0][2][0][RTW89_CN][10] = 60, ++ [0][0][2][0][RTW89_QATAR][10] = 60, ++ [0][0][2][0][RTW89_UK][10] = 60, ++ [0][0][2][0][RTW89_FCC][12] = 78, ++ [0][0][2][0][RTW89_ETSI][12] = 60, ++ [0][0][2][0][RTW89_MKK][12] = 62, ++ [0][0][2][0][RTW89_IC][12] = 64, ++ [0][0][2][0][RTW89_KCC][12] = 74, ++ [0][0][2][0][RTW89_ACMA][12] = 60, ++ [0][0][2][0][RTW89_CHILE][12] = 66, ++ [0][0][2][0][RTW89_UKRAINE][12] = 52, ++ [0][0][2][0][RTW89_MEXICO][12] = 78, ++ [0][0][2][0][RTW89_CN][12] = 60, ++ [0][0][2][0][RTW89_QATAR][12] = 60, ++ [0][0][2][0][RTW89_UK][12] = 60, ++ [0][0][2][0][RTW89_FCC][14] = 78, ++ [0][0][2][0][RTW89_ETSI][14] = 60, ++ [0][0][2][0][RTW89_MKK][14] = 62, ++ [0][0][2][0][RTW89_IC][14] = 64, ++ [0][0][2][0][RTW89_KCC][14] = 74, ++ [0][0][2][0][RTW89_ACMA][14] = 60, ++ [0][0][2][0][RTW89_CHILE][14] = 66, ++ [0][0][2][0][RTW89_UKRAINE][14] = 52, ++ [0][0][2][0][RTW89_MEXICO][14] = 78, ++ [0][0][2][0][RTW89_CN][14] = 60, ++ [0][0][2][0][RTW89_QATAR][14] = 60, ++ [0][0][2][0][RTW89_UK][14] = 60, ++ [0][0][2][0][RTW89_FCC][15] = 74, ++ [0][0][2][0][RTW89_ETSI][15] = 60, ++ [0][0][2][0][RTW89_MKK][15] = 76, ++ [0][0][2][0][RTW89_IC][15] = 74, ++ [0][0][2][0][RTW89_KCC][15] = 74, ++ [0][0][2][0][RTW89_ACMA][15] = 60, ++ [0][0][2][0][RTW89_CHILE][15] = 64, ++ [0][0][2][0][RTW89_UKRAINE][15] = 52, ++ [0][0][2][0][RTW89_MEXICO][15] = 74, ++ [0][0][2][0][RTW89_CN][15] = 127, ++ [0][0][2][0][RTW89_QATAR][15] = 60, ++ [0][0][2][0][RTW89_UK][15] = 60, ++ [0][0][2][0][RTW89_FCC][17] = 78, ++ [0][0][2][0][RTW89_ETSI][17] = 60, ++ [0][0][2][0][RTW89_MKK][17] = 76, ++ [0][0][2][0][RTW89_IC][17] = 78, ++ [0][0][2][0][RTW89_KCC][17] = 74, ++ [0][0][2][0][RTW89_ACMA][17] = 60, ++ [0][0][2][0][RTW89_CHILE][17] = 64, ++ [0][0][2][0][RTW89_UKRAINE][17] = 52, ++ [0][0][2][0][RTW89_MEXICO][17] = 78, ++ [0][0][2][0][RTW89_CN][17] = 127, ++ [0][0][2][0][RTW89_QATAR][17] = 60, ++ [0][0][2][0][RTW89_UK][17] = 60, ++ [0][0][2][0][RTW89_FCC][19] = 78, ++ [0][0][2][0][RTW89_ETSI][19] = 60, ++ [0][0][2][0][RTW89_MKK][19] = 76, ++ [0][0][2][0][RTW89_IC][19] = 78, ++ [0][0][2][0][RTW89_KCC][19] = 74, ++ [0][0][2][0][RTW89_ACMA][19] = 60, ++ [0][0][2][0][RTW89_CHILE][19] = 64, ++ [0][0][2][0][RTW89_UKRAINE][19] = 52, ++ [0][0][2][0][RTW89_MEXICO][19] = 78, ++ [0][0][2][0][RTW89_CN][19] = 127, ++ [0][0][2][0][RTW89_QATAR][19] = 60, ++ [0][0][2][0][RTW89_UK][19] = 60, ++ [0][0][2][0][RTW89_FCC][21] = 78, ++ [0][0][2][0][RTW89_ETSI][21] = 60, ++ [0][0][2][0][RTW89_MKK][21] = 76, ++ [0][0][2][0][RTW89_IC][21] = 78, ++ [0][0][2][0][RTW89_KCC][21] = 74, ++ [0][0][2][0][RTW89_ACMA][21] = 60, ++ [0][0][2][0][RTW89_CHILE][21] = 66, ++ [0][0][2][0][RTW89_UKRAINE][21] = 52, ++ [0][0][2][0][RTW89_MEXICO][21] = 78, ++ [0][0][2][0][RTW89_CN][21] = 127, ++ [0][0][2][0][RTW89_QATAR][21] = 60, ++ [0][0][2][0][RTW89_UK][21] = 60, ++ [0][0][2][0][RTW89_FCC][23] = 78, ++ [0][0][2][0][RTW89_ETSI][23] = 60, ++ [0][0][2][0][RTW89_MKK][23] = 76, ++ [0][0][2][0][RTW89_IC][23] = 78, ++ [0][0][2][0][RTW89_KCC][23] = 74, ++ [0][0][2][0][RTW89_ACMA][23] = 60, ++ [0][0][2][0][RTW89_CHILE][23] = 66, ++ [0][0][2][0][RTW89_UKRAINE][23] = 52, ++ [0][0][2][0][RTW89_MEXICO][23] = 78, ++ [0][0][2][0][RTW89_CN][23] = 127, ++ [0][0][2][0][RTW89_QATAR][23] = 60, ++ [0][0][2][0][RTW89_UK][23] = 60, ++ [0][0][2][0][RTW89_FCC][25] = 78, ++ [0][0][2][0][RTW89_ETSI][25] = 60, ++ [0][0][2][0][RTW89_MKK][25] = 76, ++ [0][0][2][0][RTW89_IC][25] = 127, ++ [0][0][2][0][RTW89_KCC][25] = 74, ++ [0][0][2][0][RTW89_ACMA][25] = 127, ++ [0][0][2][0][RTW89_CHILE][25] = 66, ++ [0][0][2][0][RTW89_UKRAINE][25] = 52, ++ [0][0][2][0][RTW89_MEXICO][25] = 78, ++ [0][0][2][0][RTW89_CN][25] = 127, ++ [0][0][2][0][RTW89_QATAR][25] = 60, ++ [0][0][2][0][RTW89_UK][25] = 60, ++ [0][0][2][0][RTW89_FCC][27] = 78, ++ [0][0][2][0][RTW89_ETSI][27] = 60, ++ [0][0][2][0][RTW89_MKK][27] = 76, ++ [0][0][2][0][RTW89_IC][27] = 127, ++ [0][0][2][0][RTW89_KCC][27] = 74, ++ [0][0][2][0][RTW89_ACMA][27] = 127, ++ [0][0][2][0][RTW89_CHILE][27] = 64, ++ [0][0][2][0][RTW89_UKRAINE][27] = 52, ++ [0][0][2][0][RTW89_MEXICO][27] = 78, ++ [0][0][2][0][RTW89_CN][27] = 127, ++ [0][0][2][0][RTW89_QATAR][27] = 60, ++ [0][0][2][0][RTW89_UK][27] = 60, ++ [0][0][2][0][RTW89_FCC][29] = 78, ++ [0][0][2][0][RTW89_ETSI][29] = 60, ++ [0][0][2][0][RTW89_MKK][29] = 76, ++ [0][0][2][0][RTW89_IC][29] = 127, ++ [0][0][2][0][RTW89_KCC][29] = 74, ++ [0][0][2][0][RTW89_ACMA][29] = 127, ++ [0][0][2][0][RTW89_CHILE][29] = 64, ++ [0][0][2][0][RTW89_UKRAINE][29] = 52, ++ [0][0][2][0][RTW89_MEXICO][29] = 78, ++ [0][0][2][0][RTW89_CN][29] = 127, ++ [0][0][2][0][RTW89_QATAR][29] = 60, ++ [0][0][2][0][RTW89_UK][29] = 60, ++ [0][0][2][0][RTW89_FCC][31] = 78, ++ [0][0][2][0][RTW89_ETSI][31] = 60, ++ [0][0][2][0][RTW89_MKK][31] = 76, ++ [0][0][2][0][RTW89_IC][31] = 78, ++ [0][0][2][0][RTW89_KCC][31] = 74, ++ [0][0][2][0][RTW89_ACMA][31] = 60, ++ [0][0][2][0][RTW89_CHILE][31] = 64, ++ [0][0][2][0][RTW89_UKRAINE][31] = 52, ++ [0][0][2][0][RTW89_MEXICO][31] = 78, ++ [0][0][2][0][RTW89_CN][31] = 127, ++ [0][0][2][0][RTW89_QATAR][31] = 60, ++ [0][0][2][0][RTW89_UK][31] = 60, ++ [0][0][2][0][RTW89_FCC][33] = 78, ++ [0][0][2][0][RTW89_ETSI][33] = 60, ++ [0][0][2][0][RTW89_MKK][33] = 76, ++ [0][0][2][0][RTW89_IC][33] = 78, ++ [0][0][2][0][RTW89_KCC][33] = 74, ++ [0][0][2][0][RTW89_ACMA][33] = 60, ++ [0][0][2][0][RTW89_CHILE][33] = 64, ++ [0][0][2][0][RTW89_UKRAINE][33] = 52, ++ [0][0][2][0][RTW89_MEXICO][33] = 78, ++ [0][0][2][0][RTW89_CN][33] = 127, ++ [0][0][2][0][RTW89_QATAR][33] = 60, ++ [0][0][2][0][RTW89_UK][33] = 60, ++ [0][0][2][0][RTW89_FCC][35] = 70, ++ [0][0][2][0][RTW89_ETSI][35] = 60, ++ [0][0][2][0][RTW89_MKK][35] = 76, ++ [0][0][2][0][RTW89_IC][35] = 70, ++ [0][0][2][0][RTW89_KCC][35] = 74, ++ [0][0][2][0][RTW89_ACMA][35] = 60, ++ [0][0][2][0][RTW89_CHILE][35] = 64, ++ [0][0][2][0][RTW89_UKRAINE][35] = 52, ++ [0][0][2][0][RTW89_MEXICO][35] = 70, ++ [0][0][2][0][RTW89_CN][35] = 127, ++ [0][0][2][0][RTW89_QATAR][35] = 60, ++ [0][0][2][0][RTW89_UK][35] = 60, ++ [0][0][2][0][RTW89_FCC][37] = 78, ++ [0][0][2][0][RTW89_ETSI][37] = 127, ++ [0][0][2][0][RTW89_MKK][37] = 76, ++ [0][0][2][0][RTW89_IC][37] = 78, ++ [0][0][2][0][RTW89_KCC][37] = 74, ++ [0][0][2][0][RTW89_ACMA][37] = 76, ++ [0][0][2][0][RTW89_CHILE][37] = 64, ++ [0][0][2][0][RTW89_UKRAINE][37] = 127, ++ [0][0][2][0][RTW89_MEXICO][37] = 78, ++ [0][0][2][0][RTW89_CN][37] = 127, ++ [0][0][2][0][RTW89_QATAR][37] = 127, ++ [0][0][2][0][RTW89_UK][37] = 74, ++ [0][0][2][0][RTW89_FCC][38] = 78, ++ [0][0][2][0][RTW89_ETSI][38] = 28, ++ [0][0][2][0][RTW89_MKK][38] = 127, ++ [0][0][2][0][RTW89_IC][38] = 78, ++ [0][0][2][0][RTW89_KCC][38] = 72, ++ [0][0][2][0][RTW89_ACMA][38] = 76, ++ [0][0][2][0][RTW89_CHILE][38] = 64, ++ [0][0][2][0][RTW89_UKRAINE][38] = 28, ++ [0][0][2][0][RTW89_MEXICO][38] = 78, ++ [0][0][2][0][RTW89_CN][38] = 76, ++ [0][0][2][0][RTW89_QATAR][38] = 28, ++ [0][0][2][0][RTW89_UK][38] = 60, ++ [0][0][2][0][RTW89_FCC][40] = 78, ++ [0][0][2][0][RTW89_ETSI][40] = 28, ++ [0][0][2][0][RTW89_MKK][40] = 127, ++ [0][0][2][0][RTW89_IC][40] = 78, ++ [0][0][2][0][RTW89_KCC][40] = 72, ++ [0][0][2][0][RTW89_ACMA][40] = 76, ++ [0][0][2][0][RTW89_CHILE][40] = 64, ++ [0][0][2][0][RTW89_UKRAINE][40] = 28, ++ [0][0][2][0][RTW89_MEXICO][40] = 78, ++ [0][0][2][0][RTW89_CN][40] = 76, ++ [0][0][2][0][RTW89_QATAR][40] = 28, ++ [0][0][2][0][RTW89_UK][40] = 60, ++ [0][0][2][0][RTW89_FCC][42] = 78, ++ [0][0][2][0][RTW89_ETSI][42] = 28, ++ [0][0][2][0][RTW89_MKK][42] = 127, ++ [0][0][2][0][RTW89_IC][42] = 78, ++ [0][0][2][0][RTW89_KCC][42] = 72, ++ [0][0][2][0][RTW89_ACMA][42] = 76, ++ [0][0][2][0][RTW89_CHILE][42] = 64, ++ [0][0][2][0][RTW89_UKRAINE][42] = 28, ++ [0][0][2][0][RTW89_MEXICO][42] = 78, ++ [0][0][2][0][RTW89_CN][42] = 76, ++ [0][0][2][0][RTW89_QATAR][42] = 28, ++ [0][0][2][0][RTW89_UK][42] = 60, ++ [0][0][2][0][RTW89_FCC][44] = 78, ++ [0][0][2][0][RTW89_ETSI][44] = 28, ++ [0][0][2][0][RTW89_MKK][44] = 127, ++ [0][0][2][0][RTW89_IC][44] = 78, ++ [0][0][2][0][RTW89_KCC][44] = 72, ++ [0][0][2][0][RTW89_ACMA][44] = 76, ++ [0][0][2][0][RTW89_CHILE][44] = 66, ++ [0][0][2][0][RTW89_UKRAINE][44] = 28, ++ [0][0][2][0][RTW89_MEXICO][44] = 78, ++ [0][0][2][0][RTW89_CN][44] = 76, ++ [0][0][2][0][RTW89_QATAR][44] = 28, ++ [0][0][2][0][RTW89_UK][44] = 60, ++ [0][0][2][0][RTW89_FCC][46] = 78, ++ [0][0][2][0][RTW89_ETSI][46] = 28, ++ [0][0][2][0][RTW89_MKK][46] = 127, ++ [0][0][2][0][RTW89_IC][46] = 78, ++ [0][0][2][0][RTW89_KCC][46] = 72, ++ [0][0][2][0][RTW89_ACMA][46] = 76, ++ [0][0][2][0][RTW89_CHILE][46] = 66, ++ [0][0][2][0][RTW89_UKRAINE][46] = 28, ++ [0][0][2][0][RTW89_MEXICO][46] = 78, ++ [0][0][2][0][RTW89_CN][46] = 76, ++ [0][0][2][0][RTW89_QATAR][46] = 28, ++ [0][0][2][0][RTW89_UK][46] = 60, ++ [0][0][2][0][RTW89_FCC][48] = 78, ++ [0][0][2][0][RTW89_ETSI][48] = 127, ++ [0][0][2][0][RTW89_MKK][48] = 127, ++ [0][0][2][0][RTW89_IC][48] = 127, ++ [0][0][2][0][RTW89_KCC][48] = 127, ++ [0][0][2][0][RTW89_ACMA][48] = 127, ++ [0][0][2][0][RTW89_CHILE][48] = 127, ++ [0][0][2][0][RTW89_UKRAINE][48] = 127, ++ [0][0][2][0][RTW89_MEXICO][48] = 127, ++ [0][0][2][0][RTW89_CN][48] = 127, ++ [0][0][2][0][RTW89_QATAR][48] = 127, ++ [0][0][2][0][RTW89_UK][48] = 127, ++ [0][0][2][0][RTW89_FCC][50] = 78, ++ [0][0][2][0][RTW89_ETSI][50] = 127, ++ [0][0][2][0][RTW89_MKK][50] = 127, ++ [0][0][2][0][RTW89_IC][50] = 127, ++ [0][0][2][0][RTW89_KCC][50] = 127, ++ [0][0][2][0][RTW89_ACMA][50] = 127, ++ [0][0][2][0][RTW89_CHILE][50] = 127, ++ [0][0][2][0][RTW89_UKRAINE][50] = 127, ++ [0][0][2][0][RTW89_MEXICO][50] = 127, ++ [0][0][2][0][RTW89_CN][50] = 127, ++ [0][0][2][0][RTW89_QATAR][50] = 127, ++ [0][0][2][0][RTW89_UK][50] = 127, ++ [0][0][2][0][RTW89_FCC][52] = 78, ++ [0][0][2][0][RTW89_ETSI][52] = 127, ++ [0][0][2][0][RTW89_MKK][52] = 127, ++ [0][0][2][0][RTW89_IC][52] = 127, ++ [0][0][2][0][RTW89_KCC][52] = 127, ++ [0][0][2][0][RTW89_ACMA][52] = 127, ++ [0][0][2][0][RTW89_CHILE][52] = 127, ++ [0][0][2][0][RTW89_UKRAINE][52] = 127, ++ [0][0][2][0][RTW89_MEXICO][52] = 127, ++ [0][0][2][0][RTW89_CN][52] = 127, ++ [0][0][2][0][RTW89_QATAR][52] = 127, ++ [0][0][2][0][RTW89_UK][52] = 127, ++ [0][1][2][0][RTW89_FCC][0] = 70, ++ [0][1][2][0][RTW89_ETSI][0] = 48, ++ [0][1][2][0][RTW89_MKK][0] = 50, ++ [0][1][2][0][RTW89_IC][0] = 42, ++ [0][1][2][0][RTW89_KCC][0] = 62, ++ [0][1][2][0][RTW89_ACMA][0] = 48, ++ [0][1][2][0][RTW89_CHILE][0] = 30, ++ [0][1][2][0][RTW89_UKRAINE][0] = 40, ++ [0][1][2][0][RTW89_MEXICO][0] = 50, ++ [0][1][2][0][RTW89_CN][0] = 48, ++ [0][1][2][0][RTW89_QATAR][0] = 48, ++ [0][1][2][0][RTW89_UK][0] = 48, ++ [0][1][2][0][RTW89_FCC][2] = 70, ++ [0][1][2][0][RTW89_ETSI][2] = 48, ++ [0][1][2][0][RTW89_MKK][2] = 50, ++ [0][1][2][0][RTW89_IC][2] = 42, ++ [0][1][2][0][RTW89_KCC][2] = 62, ++ [0][1][2][0][RTW89_ACMA][2] = 48, ++ [0][1][2][0][RTW89_CHILE][2] = 30, ++ [0][1][2][0][RTW89_UKRAINE][2] = 40, ++ [0][1][2][0][RTW89_MEXICO][2] = 50, ++ [0][1][2][0][RTW89_CN][2] = 48, ++ [0][1][2][0][RTW89_QATAR][2] = 48, ++ [0][1][2][0][RTW89_UK][2] = 48, ++ [0][1][2][0][RTW89_FCC][4] = 70, ++ [0][1][2][0][RTW89_ETSI][4] = 48, ++ [0][1][2][0][RTW89_MKK][4] = 50, ++ [0][1][2][0][RTW89_IC][4] = 42, ++ [0][1][2][0][RTW89_KCC][4] = 62, ++ [0][1][2][0][RTW89_ACMA][4] = 48, ++ [0][1][2][0][RTW89_CHILE][4] = 30, ++ [0][1][2][0][RTW89_UKRAINE][4] = 40, ++ [0][1][2][0][RTW89_MEXICO][4] = 50, ++ [0][1][2][0][RTW89_CN][4] = 48, ++ [0][1][2][0][RTW89_QATAR][4] = 48, ++ [0][1][2][0][RTW89_UK][4] = 48, ++ [0][1][2][0][RTW89_FCC][6] = 70, ++ [0][1][2][0][RTW89_ETSI][6] = 48, ++ [0][1][2][0][RTW89_MKK][6] = 50, ++ [0][1][2][0][RTW89_IC][6] = 42, ++ [0][1][2][0][RTW89_KCC][6] = 34, ++ [0][1][2][0][RTW89_ACMA][6] = 48, ++ [0][1][2][0][RTW89_CHILE][6] = 30, ++ [0][1][2][0][RTW89_UKRAINE][6] = 40, ++ [0][1][2][0][RTW89_MEXICO][6] = 50, ++ [0][1][2][0][RTW89_CN][6] = 48, ++ [0][1][2][0][RTW89_QATAR][6] = 48, ++ [0][1][2][0][RTW89_UK][6] = 48, ++ [0][1][2][0][RTW89_FCC][8] = 70, ++ [0][1][2][0][RTW89_ETSI][8] = 48, ++ [0][1][2][0][RTW89_MKK][8] = 50, ++ [0][1][2][0][RTW89_IC][8] = 52, ++ [0][1][2][0][RTW89_KCC][8] = 62, ++ [0][1][2][0][RTW89_ACMA][8] = 48, ++ [0][1][2][0][RTW89_CHILE][8] = 50, ++ [0][1][2][0][RTW89_UKRAINE][8] = 40, ++ [0][1][2][0][RTW89_MEXICO][8] = 70, ++ [0][1][2][0][RTW89_CN][8] = 48, ++ [0][1][2][0][RTW89_QATAR][8] = 48, ++ [0][1][2][0][RTW89_UK][8] = 48, ++ [0][1][2][0][RTW89_FCC][10] = 70, ++ [0][1][2][0][RTW89_ETSI][10] = 48, ++ [0][1][2][0][RTW89_MKK][10] = 50, ++ [0][1][2][0][RTW89_IC][10] = 52, ++ [0][1][2][0][RTW89_KCC][10] = 62, ++ [0][1][2][0][RTW89_ACMA][10] = 48, ++ [0][1][2][0][RTW89_CHILE][10] = 50, ++ [0][1][2][0][RTW89_UKRAINE][10] = 40, ++ [0][1][2][0][RTW89_MEXICO][10] = 70, ++ [0][1][2][0][RTW89_CN][10] = 48, ++ [0][1][2][0][RTW89_QATAR][10] = 48, ++ [0][1][2][0][RTW89_UK][10] = 48, ++ [0][1][2][0][RTW89_FCC][12] = 70, ++ [0][1][2][0][RTW89_ETSI][12] = 48, ++ [0][1][2][0][RTW89_MKK][12] = 50, ++ [0][1][2][0][RTW89_IC][12] = 52, ++ [0][1][2][0][RTW89_KCC][12] = 62, ++ [0][1][2][0][RTW89_ACMA][12] = 48, ++ [0][1][2][0][RTW89_CHILE][12] = 50, ++ [0][1][2][0][RTW89_UKRAINE][12] = 40, ++ [0][1][2][0][RTW89_MEXICO][12] = 70, ++ [0][1][2][0][RTW89_CN][12] = 48, ++ [0][1][2][0][RTW89_QATAR][12] = 48, ++ [0][1][2][0][RTW89_UK][12] = 48, ++ [0][1][2][0][RTW89_FCC][14] = 70, ++ [0][1][2][0][RTW89_ETSI][14] = 48, ++ [0][1][2][0][RTW89_MKK][14] = 50, ++ [0][1][2][0][RTW89_IC][14] = 52, ++ [0][1][2][0][RTW89_KCC][14] = 62, ++ [0][1][2][0][RTW89_ACMA][14] = 48, ++ [0][1][2][0][RTW89_CHILE][14] = 50, ++ [0][1][2][0][RTW89_UKRAINE][14] = 40, ++ [0][1][2][0][RTW89_MEXICO][14] = 70, ++ [0][1][2][0][RTW89_CN][14] = 48, ++ [0][1][2][0][RTW89_QATAR][14] = 48, ++ [0][1][2][0][RTW89_UK][14] = 48, ++ [0][1][2][0][RTW89_FCC][15] = 68, ++ [0][1][2][0][RTW89_ETSI][15] = 48, ++ [0][1][2][0][RTW89_MKK][15] = 70, ++ [0][1][2][0][RTW89_IC][15] = 68, ++ [0][1][2][0][RTW89_KCC][15] = 62, ++ [0][1][2][0][RTW89_ACMA][15] = 48, ++ [0][1][2][0][RTW89_CHILE][15] = 48, ++ [0][1][2][0][RTW89_UKRAINE][15] = 40, ++ [0][1][2][0][RTW89_MEXICO][15] = 68, ++ [0][1][2][0][RTW89_CN][15] = 127, ++ [0][1][2][0][RTW89_QATAR][15] = 48, ++ [0][1][2][0][RTW89_UK][15] = 48, ++ [0][1][2][0][RTW89_FCC][17] = 70, ++ [0][1][2][0][RTW89_ETSI][17] = 48, ++ [0][1][2][0][RTW89_MKK][17] = 70, ++ [0][1][2][0][RTW89_IC][17] = 70, ++ [0][1][2][0][RTW89_KCC][17] = 62, ++ [0][1][2][0][RTW89_ACMA][17] = 48, ++ [0][1][2][0][RTW89_CHILE][17] = 48, ++ [0][1][2][0][RTW89_UKRAINE][17] = 40, ++ [0][1][2][0][RTW89_MEXICO][17] = 70, ++ [0][1][2][0][RTW89_CN][17] = 127, ++ [0][1][2][0][RTW89_QATAR][17] = 48, ++ [0][1][2][0][RTW89_UK][17] = 48, ++ [0][1][2][0][RTW89_FCC][19] = 70, ++ [0][1][2][0][RTW89_ETSI][19] = 48, ++ [0][1][2][0][RTW89_MKK][19] = 70, ++ [0][1][2][0][RTW89_IC][19] = 70, ++ [0][1][2][0][RTW89_KCC][19] = 62, ++ [0][1][2][0][RTW89_ACMA][19] = 48, ++ [0][1][2][0][RTW89_CHILE][19] = 48, ++ [0][1][2][0][RTW89_UKRAINE][19] = 40, ++ [0][1][2][0][RTW89_MEXICO][19] = 70, ++ [0][1][2][0][RTW89_CN][19] = 127, ++ [0][1][2][0][RTW89_QATAR][19] = 48, ++ [0][1][2][0][RTW89_UK][19] = 48, ++ [0][1][2][0][RTW89_FCC][21] = 70, ++ [0][1][2][0][RTW89_ETSI][21] = 48, ++ [0][1][2][0][RTW89_MKK][21] = 70, ++ [0][1][2][0][RTW89_IC][21] = 70, ++ [0][1][2][0][RTW89_KCC][21] = 62, ++ [0][1][2][0][RTW89_ACMA][21] = 48, ++ [0][1][2][0][RTW89_CHILE][21] = 48, ++ [0][1][2][0][RTW89_UKRAINE][21] = 40, ++ [0][1][2][0][RTW89_MEXICO][21] = 70, ++ [0][1][2][0][RTW89_CN][21] = 127, ++ [0][1][2][0][RTW89_QATAR][21] = 48, ++ [0][1][2][0][RTW89_UK][21] = 48, ++ [0][1][2][0][RTW89_FCC][23] = 70, ++ [0][1][2][0][RTW89_ETSI][23] = 48, ++ [0][1][2][0][RTW89_MKK][23] = 70, ++ [0][1][2][0][RTW89_IC][23] = 70, ++ [0][1][2][0][RTW89_KCC][23] = 62, ++ [0][1][2][0][RTW89_ACMA][23] = 48, ++ [0][1][2][0][RTW89_CHILE][23] = 48, ++ [0][1][2][0][RTW89_UKRAINE][23] = 40, ++ [0][1][2][0][RTW89_MEXICO][23] = 70, ++ [0][1][2][0][RTW89_CN][23] = 127, ++ [0][1][2][0][RTW89_QATAR][23] = 48, ++ [0][1][2][0][RTW89_UK][23] = 48, ++ [0][1][2][0][RTW89_FCC][25] = 70, ++ [0][1][2][0][RTW89_ETSI][25] = 48, ++ [0][1][2][0][RTW89_MKK][25] = 70, ++ [0][1][2][0][RTW89_IC][25] = 127, ++ [0][1][2][0][RTW89_KCC][25] = 62, ++ [0][1][2][0][RTW89_ACMA][25] = 127, ++ [0][1][2][0][RTW89_CHILE][25] = 48, ++ [0][1][2][0][RTW89_UKRAINE][25] = 40, ++ [0][1][2][0][RTW89_MEXICO][25] = 70, ++ [0][1][2][0][RTW89_CN][25] = 127, ++ [0][1][2][0][RTW89_QATAR][25] = 48, ++ [0][1][2][0][RTW89_UK][25] = 48, ++ [0][1][2][0][RTW89_FCC][27] = 70, ++ [0][1][2][0][RTW89_ETSI][27] = 48, ++ [0][1][2][0][RTW89_MKK][27] = 70, ++ [0][1][2][0][RTW89_IC][27] = 127, ++ [0][1][2][0][RTW89_KCC][27] = 62, ++ [0][1][2][0][RTW89_ACMA][27] = 127, ++ [0][1][2][0][RTW89_CHILE][27] = 50, ++ [0][1][2][0][RTW89_UKRAINE][27] = 40, ++ [0][1][2][0][RTW89_MEXICO][27] = 70, ++ [0][1][2][0][RTW89_CN][27] = 127, ++ [0][1][2][0][RTW89_QATAR][27] = 48, ++ [0][1][2][0][RTW89_UK][27] = 48, ++ [0][1][2][0][RTW89_FCC][29] = 70, ++ [0][1][2][0][RTW89_ETSI][29] = 48, ++ [0][1][2][0][RTW89_MKK][29] = 70, ++ [0][1][2][0][RTW89_IC][29] = 127, ++ [0][1][2][0][RTW89_KCC][29] = 62, ++ [0][1][2][0][RTW89_ACMA][29] = 127, ++ [0][1][2][0][RTW89_CHILE][29] = 50, ++ [0][1][2][0][RTW89_UKRAINE][29] = 40, ++ [0][1][2][0][RTW89_MEXICO][29] = 70, ++ [0][1][2][0][RTW89_CN][29] = 127, ++ [0][1][2][0][RTW89_QATAR][29] = 48, ++ [0][1][2][0][RTW89_UK][29] = 48, ++ [0][1][2][0][RTW89_FCC][31] = 70, ++ [0][1][2][0][RTW89_ETSI][31] = 48, ++ [0][1][2][0][RTW89_MKK][31] = 70, ++ [0][1][2][0][RTW89_IC][31] = 70, ++ [0][1][2][0][RTW89_KCC][31] = 62, ++ [0][1][2][0][RTW89_ACMA][31] = 48, ++ [0][1][2][0][RTW89_CHILE][31] = 50, ++ [0][1][2][0][RTW89_UKRAINE][31] = 40, ++ [0][1][2][0][RTW89_MEXICO][31] = 70, ++ [0][1][2][0][RTW89_CN][31] = 127, ++ [0][1][2][0][RTW89_QATAR][31] = 48, ++ [0][1][2][0][RTW89_UK][31] = 48, ++ [0][1][2][0][RTW89_FCC][33] = 70, ++ [0][1][2][0][RTW89_ETSI][33] = 48, ++ [0][1][2][0][RTW89_MKK][33] = 70, ++ [0][1][2][0][RTW89_IC][33] = 70, ++ [0][1][2][0][RTW89_KCC][33] = 62, ++ [0][1][2][0][RTW89_ACMA][33] = 48, ++ [0][1][2][0][RTW89_CHILE][33] = 50, ++ [0][1][2][0][RTW89_UKRAINE][33] = 40, ++ [0][1][2][0][RTW89_MEXICO][33] = 70, ++ [0][1][2][0][RTW89_CN][33] = 127, ++ [0][1][2][0][RTW89_QATAR][33] = 48, ++ [0][1][2][0][RTW89_UK][33] = 48, ++ [0][1][2][0][RTW89_FCC][35] = 66, ++ [0][1][2][0][RTW89_ETSI][35] = 48, ++ [0][1][2][0][RTW89_MKK][35] = 70, ++ [0][1][2][0][RTW89_IC][35] = 66, ++ [0][1][2][0][RTW89_KCC][35] = 62, ++ [0][1][2][0][RTW89_ACMA][35] = 48, ++ [0][1][2][0][RTW89_CHILE][35] = 50, ++ [0][1][2][0][RTW89_UKRAINE][35] = 40, ++ [0][1][2][0][RTW89_MEXICO][35] = 66, ++ [0][1][2][0][RTW89_CN][35] = 127, ++ [0][1][2][0][RTW89_QATAR][35] = 48, ++ [0][1][2][0][RTW89_UK][35] = 48, ++ [0][1][2][0][RTW89_FCC][37] = 70, ++ [0][1][2][0][RTW89_ETSI][37] = 127, ++ [0][1][2][0][RTW89_MKK][37] = 70, ++ [0][1][2][0][RTW89_IC][37] = 70, ++ [0][1][2][0][RTW89_KCC][37] = 62, ++ [0][1][2][0][RTW89_ACMA][37] = 70, ++ [0][1][2][0][RTW89_CHILE][37] = 50, ++ [0][1][2][0][RTW89_UKRAINE][37] = 127, ++ [0][1][2][0][RTW89_MEXICO][37] = 70, ++ [0][1][2][0][RTW89_CN][37] = 127, ++ [0][1][2][0][RTW89_QATAR][37] = 127, ++ [0][1][2][0][RTW89_UK][37] = 76, ++ [0][1][2][0][RTW89_FCC][38] = 78, ++ [0][1][2][0][RTW89_ETSI][38] = 16, ++ [0][1][2][0][RTW89_MKK][38] = 127, ++ [0][1][2][0][RTW89_IC][38] = 78, ++ [0][1][2][0][RTW89_KCC][38] = 62, ++ [0][1][2][0][RTW89_ACMA][38] = 74, ++ [0][1][2][0][RTW89_CHILE][38] = 50, ++ [0][1][2][0][RTW89_UKRAINE][38] = 16, ++ [0][1][2][0][RTW89_MEXICO][38] = 78, ++ [0][1][2][0][RTW89_CN][38] = 76, ++ [0][1][2][0][RTW89_QATAR][38] = 16, ++ [0][1][2][0][RTW89_UK][38] = 48, ++ [0][1][2][0][RTW89_FCC][40] = 78, ++ [0][1][2][0][RTW89_ETSI][40] = 16, ++ [0][1][2][0][RTW89_MKK][40] = 127, ++ [0][1][2][0][RTW89_IC][40] = 78, ++ [0][1][2][0][RTW89_KCC][40] = 62, ++ [0][1][2][0][RTW89_ACMA][40] = 74, ++ [0][1][2][0][RTW89_CHILE][40] = 50, ++ [0][1][2][0][RTW89_UKRAINE][40] = 16, ++ [0][1][2][0][RTW89_MEXICO][40] = 78, ++ [0][1][2][0][RTW89_CN][40] = 76, ++ [0][1][2][0][RTW89_QATAR][40] = 16, ++ [0][1][2][0][RTW89_UK][40] = 48, ++ [0][1][2][0][RTW89_FCC][42] = 78, ++ [0][1][2][0][RTW89_ETSI][42] = 16, ++ [0][1][2][0][RTW89_MKK][42] = 127, ++ [0][1][2][0][RTW89_IC][42] = 78, ++ [0][1][2][0][RTW89_KCC][42] = 62, ++ [0][1][2][0][RTW89_ACMA][42] = 76, ++ [0][1][2][0][RTW89_CHILE][42] = 52, ++ [0][1][2][0][RTW89_UKRAINE][42] = 16, ++ [0][1][2][0][RTW89_MEXICO][42] = 78, ++ [0][1][2][0][RTW89_CN][42] = 76, ++ [0][1][2][0][RTW89_QATAR][42] = 16, ++ [0][1][2][0][RTW89_UK][42] = 48, ++ [0][1][2][0][RTW89_FCC][44] = 78, ++ [0][1][2][0][RTW89_ETSI][44] = 16, ++ [0][1][2][0][RTW89_MKK][44] = 127, ++ [0][1][2][0][RTW89_IC][44] = 78, ++ [0][1][2][0][RTW89_KCC][44] = 62, ++ [0][1][2][0][RTW89_ACMA][44] = 76, ++ [0][1][2][0][RTW89_CHILE][44] = 52, ++ [0][1][2][0][RTW89_UKRAINE][44] = 16, ++ [0][1][2][0][RTW89_MEXICO][44] = 78, ++ [0][1][2][0][RTW89_CN][44] = 76, ++ [0][1][2][0][RTW89_QATAR][44] = 16, ++ [0][1][2][0][RTW89_UK][44] = 48, ++ [0][1][2][0][RTW89_FCC][46] = 78, ++ [0][1][2][0][RTW89_ETSI][46] = 16, ++ [0][1][2][0][RTW89_MKK][46] = 127, ++ [0][1][2][0][RTW89_IC][46] = 78, ++ [0][1][2][0][RTW89_KCC][46] = 62, ++ [0][1][2][0][RTW89_ACMA][46] = 76, ++ [0][1][2][0][RTW89_CHILE][46] = 52, ++ [0][1][2][0][RTW89_UKRAINE][46] = 16, ++ [0][1][2][0][RTW89_MEXICO][46] = 78, ++ [0][1][2][0][RTW89_CN][46] = 76, ++ [0][1][2][0][RTW89_QATAR][46] = 16, ++ [0][1][2][0][RTW89_UK][46] = 48, ++ [0][1][2][0][RTW89_FCC][48] = 58, ++ [0][1][2][0][RTW89_ETSI][48] = 127, ++ [0][1][2][0][RTW89_MKK][48] = 127, ++ [0][1][2][0][RTW89_IC][48] = 127, ++ [0][1][2][0][RTW89_KCC][48] = 127, ++ [0][1][2][0][RTW89_ACMA][48] = 127, ++ [0][1][2][0][RTW89_CHILE][48] = 127, ++ [0][1][2][0][RTW89_UKRAINE][48] = 127, ++ [0][1][2][0][RTW89_MEXICO][48] = 127, ++ [0][1][2][0][RTW89_CN][48] = 127, ++ [0][1][2][0][RTW89_QATAR][48] = 127, ++ [0][1][2][0][RTW89_UK][48] = 127, ++ [0][1][2][0][RTW89_FCC][50] = 58, ++ [0][1][2][0][RTW89_ETSI][50] = 127, ++ [0][1][2][0][RTW89_MKK][50] = 127, ++ [0][1][2][0][RTW89_IC][50] = 127, ++ [0][1][2][0][RTW89_KCC][50] = 127, ++ [0][1][2][0][RTW89_ACMA][50] = 127, ++ [0][1][2][0][RTW89_CHILE][50] = 127, ++ [0][1][2][0][RTW89_UKRAINE][50] = 127, ++ [0][1][2][0][RTW89_MEXICO][50] = 127, ++ [0][1][2][0][RTW89_CN][50] = 127, ++ [0][1][2][0][RTW89_QATAR][50] = 127, ++ [0][1][2][0][RTW89_UK][50] = 127, ++ [0][1][2][0][RTW89_FCC][52] = 58, ++ [0][1][2][0][RTW89_ETSI][52] = 127, ++ [0][1][2][0][RTW89_MKK][52] = 127, ++ [0][1][2][0][RTW89_IC][52] = 127, ++ [0][1][2][0][RTW89_KCC][52] = 127, ++ [0][1][2][0][RTW89_ACMA][52] = 127, ++ [0][1][2][0][RTW89_CHILE][52] = 127, ++ [0][1][2][0][RTW89_UKRAINE][52] = 127, ++ [0][1][2][0][RTW89_MEXICO][52] = 127, ++ [0][1][2][0][RTW89_CN][52] = 127, ++ [0][1][2][0][RTW89_QATAR][52] = 127, ++ [0][1][2][0][RTW89_UK][52] = 127, ++ [0][1][2][1][RTW89_FCC][0] = 68, ++ [0][1][2][1][RTW89_ETSI][0] = 36, ++ [0][1][2][1][RTW89_MKK][0] = 50, ++ [0][1][2][1][RTW89_IC][0] = 40, ++ [0][1][2][1][RTW89_KCC][0] = 62, ++ [0][1][2][1][RTW89_ACMA][0] = 36, ++ [0][1][2][1][RTW89_CHILE][0] = 14, ++ [0][1][2][1][RTW89_UKRAINE][0] = 28, ++ [0][1][2][1][RTW89_MEXICO][0] = 50, ++ [0][1][2][1][RTW89_CN][0] = 36, ++ [0][1][2][1][RTW89_QATAR][0] = 36, ++ [0][1][2][1][RTW89_UK][0] = 36, ++ [0][1][2][1][RTW89_FCC][2] = 68, ++ [0][1][2][1][RTW89_ETSI][2] = 36, ++ [0][1][2][1][RTW89_MKK][2] = 50, ++ [0][1][2][1][RTW89_IC][2] = 40, ++ [0][1][2][1][RTW89_KCC][2] = 62, ++ [0][1][2][1][RTW89_ACMA][2] = 36, ++ [0][1][2][1][RTW89_CHILE][2] = 14, ++ [0][1][2][1][RTW89_UKRAINE][2] = 28, ++ [0][1][2][1][RTW89_MEXICO][2] = 50, ++ [0][1][2][1][RTW89_CN][2] = 36, ++ [0][1][2][1][RTW89_QATAR][2] = 36, ++ [0][1][2][1][RTW89_UK][2] = 36, ++ [0][1][2][1][RTW89_FCC][4] = 68, ++ [0][1][2][1][RTW89_ETSI][4] = 36, ++ [0][1][2][1][RTW89_MKK][4] = 50, ++ [0][1][2][1][RTW89_IC][4] = 40, ++ [0][1][2][1][RTW89_KCC][4] = 62, ++ [0][1][2][1][RTW89_ACMA][4] = 36, ++ [0][1][2][1][RTW89_CHILE][4] = 14, ++ [0][1][2][1][RTW89_UKRAINE][4] = 28, ++ [0][1][2][1][RTW89_MEXICO][4] = 50, ++ [0][1][2][1][RTW89_CN][4] = 36, ++ [0][1][2][1][RTW89_QATAR][4] = 36, ++ [0][1][2][1][RTW89_UK][4] = 36, ++ [0][1][2][1][RTW89_FCC][6] = 68, ++ [0][1][2][1][RTW89_ETSI][6] = 36, ++ [0][1][2][1][RTW89_MKK][6] = 50, ++ [0][1][2][1][RTW89_IC][6] = 40, ++ [0][1][2][1][RTW89_KCC][6] = 34, ++ [0][1][2][1][RTW89_ACMA][6] = 36, ++ [0][1][2][1][RTW89_CHILE][6] = 14, ++ [0][1][2][1][RTW89_UKRAINE][6] = 28, ++ [0][1][2][1][RTW89_MEXICO][6] = 50, ++ [0][1][2][1][RTW89_CN][6] = 36, ++ [0][1][2][1][RTW89_QATAR][6] = 36, ++ [0][1][2][1][RTW89_UK][6] = 36, ++ [0][1][2][1][RTW89_FCC][8] = 68, ++ [0][1][2][1][RTW89_ETSI][8] = 36, ++ [0][1][2][1][RTW89_MKK][8] = 50, ++ [0][1][2][1][RTW89_IC][8] = 40, ++ [0][1][2][1][RTW89_KCC][8] = 62, ++ [0][1][2][1][RTW89_ACMA][8] = 36, ++ [0][1][2][1][RTW89_CHILE][8] = 36, ++ [0][1][2][1][RTW89_UKRAINE][8] = 28, ++ [0][1][2][1][RTW89_MEXICO][8] = 68, ++ [0][1][2][1][RTW89_CN][8] = 36, ++ [0][1][2][1][RTW89_QATAR][8] = 36, ++ [0][1][2][1][RTW89_UK][8] = 36, ++ [0][1][2][1][RTW89_FCC][10] = 68, ++ [0][1][2][1][RTW89_ETSI][10] = 36, ++ [0][1][2][1][RTW89_MKK][10] = 50, ++ [0][1][2][1][RTW89_IC][10] = 40, ++ [0][1][2][1][RTW89_KCC][10] = 62, ++ [0][1][2][1][RTW89_ACMA][10] = 36, ++ [0][1][2][1][RTW89_CHILE][10] = 36, ++ [0][1][2][1][RTW89_UKRAINE][10] = 28, ++ [0][1][2][1][RTW89_MEXICO][10] = 68, ++ [0][1][2][1][RTW89_CN][10] = 36, ++ [0][1][2][1][RTW89_QATAR][10] = 36, ++ [0][1][2][1][RTW89_UK][10] = 36, ++ [0][1][2][1][RTW89_FCC][12] = 68, ++ [0][1][2][1][RTW89_ETSI][12] = 36, ++ [0][1][2][1][RTW89_MKK][12] = 50, ++ [0][1][2][1][RTW89_IC][12] = 40, ++ [0][1][2][1][RTW89_KCC][12] = 62, ++ [0][1][2][1][RTW89_ACMA][12] = 36, ++ [0][1][2][1][RTW89_CHILE][12] = 36, ++ [0][1][2][1][RTW89_UKRAINE][12] = 28, ++ [0][1][2][1][RTW89_MEXICO][12] = 68, ++ [0][1][2][1][RTW89_CN][12] = 36, ++ [0][1][2][1][RTW89_QATAR][12] = 36, ++ [0][1][2][1][RTW89_UK][12] = 36, ++ [0][1][2][1][RTW89_FCC][14] = 68, ++ [0][1][2][1][RTW89_ETSI][14] = 36, ++ [0][1][2][1][RTW89_MKK][14] = 50, ++ [0][1][2][1][RTW89_IC][14] = 40, ++ [0][1][2][1][RTW89_KCC][14] = 62, ++ [0][1][2][1][RTW89_ACMA][14] = 36, ++ [0][1][2][1][RTW89_CHILE][14] = 36, ++ [0][1][2][1][RTW89_UKRAINE][14] = 28, ++ [0][1][2][1][RTW89_MEXICO][14] = 68, ++ [0][1][2][1][RTW89_CN][14] = 36, ++ [0][1][2][1][RTW89_QATAR][14] = 36, ++ [0][1][2][1][RTW89_UK][14] = 36, ++ [0][1][2][1][RTW89_FCC][15] = 68, ++ [0][1][2][1][RTW89_ETSI][15] = 36, ++ [0][1][2][1][RTW89_MKK][15] = 70, ++ [0][1][2][1][RTW89_IC][15] = 68, ++ [0][1][2][1][RTW89_KCC][15] = 62, ++ [0][1][2][1][RTW89_ACMA][15] = 36, ++ [0][1][2][1][RTW89_CHILE][15] = 36, ++ [0][1][2][1][RTW89_UKRAINE][15] = 28, ++ [0][1][2][1][RTW89_MEXICO][15] = 68, ++ [0][1][2][1][RTW89_CN][15] = 127, ++ [0][1][2][1][RTW89_QATAR][15] = 36, ++ [0][1][2][1][RTW89_UK][15] = 36, ++ [0][1][2][1][RTW89_FCC][17] = 68, ++ [0][1][2][1][RTW89_ETSI][17] = 36, ++ [0][1][2][1][RTW89_MKK][17] = 70, ++ [0][1][2][1][RTW89_IC][17] = 68, ++ [0][1][2][1][RTW89_KCC][17] = 62, ++ [0][1][2][1][RTW89_ACMA][17] = 36, ++ [0][1][2][1][RTW89_CHILE][17] = 36, ++ [0][1][2][1][RTW89_UKRAINE][17] = 28, ++ [0][1][2][1][RTW89_MEXICO][17] = 68, ++ [0][1][2][1][RTW89_CN][17] = 127, ++ [0][1][2][1][RTW89_QATAR][17] = 36, ++ [0][1][2][1][RTW89_UK][17] = 36, ++ [0][1][2][1][RTW89_FCC][19] = 68, ++ [0][1][2][1][RTW89_ETSI][19] = 36, ++ [0][1][2][1][RTW89_MKK][19] = 70, ++ [0][1][2][1][RTW89_IC][19] = 68, ++ [0][1][2][1][RTW89_KCC][19] = 62, ++ [0][1][2][1][RTW89_ACMA][19] = 36, ++ [0][1][2][1][RTW89_CHILE][19] = 36, ++ [0][1][2][1][RTW89_UKRAINE][19] = 28, ++ [0][1][2][1][RTW89_MEXICO][19] = 68, ++ [0][1][2][1][RTW89_CN][19] = 127, ++ [0][1][2][1][RTW89_QATAR][19] = 36, ++ [0][1][2][1][RTW89_UK][19] = 36, ++ [0][1][2][1][RTW89_FCC][21] = 68, ++ [0][1][2][1][RTW89_ETSI][21] = 36, ++ [0][1][2][1][RTW89_MKK][21] = 70, ++ [0][1][2][1][RTW89_IC][21] = 68, ++ [0][1][2][1][RTW89_KCC][21] = 62, ++ [0][1][2][1][RTW89_ACMA][21] = 36, ++ [0][1][2][1][RTW89_CHILE][21] = 36, ++ [0][1][2][1][RTW89_UKRAINE][21] = 28, ++ [0][1][2][1][RTW89_MEXICO][21] = 68, ++ [0][1][2][1][RTW89_CN][21] = 127, ++ [0][1][2][1][RTW89_QATAR][21] = 36, ++ [0][1][2][1][RTW89_UK][21] = 36, ++ [0][1][2][1][RTW89_FCC][23] = 68, ++ [0][1][2][1][RTW89_ETSI][23] = 36, ++ [0][1][2][1][RTW89_MKK][23] = 70, ++ [0][1][2][1][RTW89_IC][23] = 68, ++ [0][1][2][1][RTW89_KCC][23] = 62, ++ [0][1][2][1][RTW89_ACMA][23] = 36, ++ [0][1][2][1][RTW89_CHILE][23] = 36, ++ [0][1][2][1][RTW89_UKRAINE][23] = 28, ++ [0][1][2][1][RTW89_MEXICO][23] = 68, ++ [0][1][2][1][RTW89_CN][23] = 127, ++ [0][1][2][1][RTW89_QATAR][23] = 36, ++ [0][1][2][1][RTW89_UK][23] = 36, ++ [0][1][2][1][RTW89_FCC][25] = 66, ++ [0][1][2][1][RTW89_ETSI][25] = 36, ++ [0][1][2][1][RTW89_MKK][25] = 70, ++ [0][1][2][1][RTW89_IC][25] = 127, ++ [0][1][2][1][RTW89_KCC][25] = 62, ++ [0][1][2][1][RTW89_ACMA][25] = 127, ++ [0][1][2][1][RTW89_CHILE][25] = 36, ++ [0][1][2][1][RTW89_UKRAINE][25] = 28, ++ [0][1][2][1][RTW89_MEXICO][25] = 66, ++ [0][1][2][1][RTW89_CN][25] = 127, ++ [0][1][2][1][RTW89_QATAR][25] = 36, ++ [0][1][2][1][RTW89_UK][25] = 36, ++ [0][1][2][1][RTW89_FCC][27] = 66, ++ [0][1][2][1][RTW89_ETSI][27] = 36, ++ [0][1][2][1][RTW89_MKK][27] = 70, ++ [0][1][2][1][RTW89_IC][27] = 127, ++ [0][1][2][1][RTW89_KCC][27] = 62, ++ [0][1][2][1][RTW89_ACMA][27] = 127, ++ [0][1][2][1][RTW89_CHILE][27] = 36, ++ [0][1][2][1][RTW89_UKRAINE][27] = 28, ++ [0][1][2][1][RTW89_MEXICO][27] = 66, ++ [0][1][2][1][RTW89_CN][27] = 127, ++ [0][1][2][1][RTW89_QATAR][27] = 36, ++ [0][1][2][1][RTW89_UK][27] = 36, ++ [0][1][2][1][RTW89_FCC][29] = 66, ++ [0][1][2][1][RTW89_ETSI][29] = 36, ++ [0][1][2][1][RTW89_MKK][29] = 70, ++ [0][1][2][1][RTW89_IC][29] = 127, ++ [0][1][2][1][RTW89_KCC][29] = 62, ++ [0][1][2][1][RTW89_ACMA][29] = 127, ++ [0][1][2][1][RTW89_CHILE][29] = 36, ++ [0][1][2][1][RTW89_UKRAINE][29] = 28, ++ [0][1][2][1][RTW89_MEXICO][29] = 66, ++ [0][1][2][1][RTW89_CN][29] = 127, ++ [0][1][2][1][RTW89_QATAR][29] = 36, ++ [0][1][2][1][RTW89_UK][29] = 36, ++ [0][1][2][1][RTW89_FCC][31] = 66, ++ [0][1][2][1][RTW89_ETSI][31] = 36, ++ [0][1][2][1][RTW89_MKK][31] = 70, ++ [0][1][2][1][RTW89_IC][31] = 66, ++ [0][1][2][1][RTW89_KCC][31] = 62, ++ [0][1][2][1][RTW89_ACMA][31] = 36, ++ [0][1][2][1][RTW89_CHILE][31] = 36, ++ [0][1][2][1][RTW89_UKRAINE][31] = 28, ++ [0][1][2][1][RTW89_MEXICO][31] = 66, ++ [0][1][2][1][RTW89_CN][31] = 127, ++ [0][1][2][1][RTW89_QATAR][31] = 36, ++ [0][1][2][1][RTW89_UK][31] = 36, ++ [0][1][2][1][RTW89_FCC][33] = 66, ++ [0][1][2][1][RTW89_ETSI][33] = 36, ++ [0][1][2][1][RTW89_MKK][33] = 70, ++ [0][1][2][1][RTW89_IC][33] = 66, ++ [0][1][2][1][RTW89_KCC][33] = 62, ++ [0][1][2][1][RTW89_ACMA][33] = 36, ++ [0][1][2][1][RTW89_CHILE][33] = 36, ++ [0][1][2][1][RTW89_UKRAINE][33] = 28, ++ [0][1][2][1][RTW89_MEXICO][33] = 66, ++ [0][1][2][1][RTW89_CN][33] = 127, ++ [0][1][2][1][RTW89_QATAR][33] = 36, ++ [0][1][2][1][RTW89_UK][33] = 36, ++ [0][1][2][1][RTW89_FCC][35] = 66, ++ [0][1][2][1][RTW89_ETSI][35] = 36, ++ [0][1][2][1][RTW89_MKK][35] = 70, ++ [0][1][2][1][RTW89_IC][35] = 66, ++ [0][1][2][1][RTW89_KCC][35] = 62, ++ [0][1][2][1][RTW89_ACMA][35] = 36, ++ [0][1][2][1][RTW89_CHILE][35] = 36, ++ [0][1][2][1][RTW89_UKRAINE][35] = 28, ++ [0][1][2][1][RTW89_MEXICO][35] = 66, ++ [0][1][2][1][RTW89_CN][35] = 127, ++ [0][1][2][1][RTW89_QATAR][35] = 36, ++ [0][1][2][1][RTW89_UK][35] = 36, ++ [0][1][2][1][RTW89_FCC][37] = 68, ++ [0][1][2][1][RTW89_ETSI][37] = 127, ++ [0][1][2][1][RTW89_MKK][37] = 70, ++ [0][1][2][1][RTW89_IC][37] = 68, ++ [0][1][2][1][RTW89_KCC][37] = 62, ++ [0][1][2][1][RTW89_ACMA][37] = 70, ++ [0][1][2][1][RTW89_CHILE][37] = 36, ++ [0][1][2][1][RTW89_UKRAINE][37] = 127, ++ [0][1][2][1][RTW89_MEXICO][37] = 68, ++ [0][1][2][1][RTW89_CN][37] = 127, ++ [0][1][2][1][RTW89_QATAR][37] = 127, ++ [0][1][2][1][RTW89_UK][37] = 62, ++ [0][1][2][1][RTW89_FCC][38] = 78, ++ [0][1][2][1][RTW89_ETSI][38] = 4, ++ [0][1][2][1][RTW89_MKK][38] = 127, ++ [0][1][2][1][RTW89_IC][38] = 78, ++ [0][1][2][1][RTW89_KCC][38] = 62, ++ [0][1][2][1][RTW89_ACMA][38] = 74, ++ [0][1][2][1][RTW89_CHILE][38] = 36, ++ [0][1][2][1][RTW89_UKRAINE][38] = 4, ++ [0][1][2][1][RTW89_MEXICO][38] = 78, ++ [0][1][2][1][RTW89_CN][38] = 72, ++ [0][1][2][1][RTW89_QATAR][38] = 4, ++ [0][1][2][1][RTW89_UK][38] = 36, ++ [0][1][2][1][RTW89_FCC][40] = 78, ++ [0][1][2][1][RTW89_ETSI][40] = 4, ++ [0][1][2][1][RTW89_MKK][40] = 127, ++ [0][1][2][1][RTW89_IC][40] = 78, ++ [0][1][2][1][RTW89_KCC][40] = 62, ++ [0][1][2][1][RTW89_ACMA][40] = 74, ++ [0][1][2][1][RTW89_CHILE][40] = 36, ++ [0][1][2][1][RTW89_UKRAINE][40] = 4, ++ [0][1][2][1][RTW89_MEXICO][40] = 78, ++ [0][1][2][1][RTW89_CN][40] = 72, ++ [0][1][2][1][RTW89_QATAR][40] = 4, ++ [0][1][2][1][RTW89_UK][40] = 36, ++ [0][1][2][1][RTW89_FCC][42] = 78, ++ [0][1][2][1][RTW89_ETSI][42] = 4, ++ [0][1][2][1][RTW89_MKK][42] = 127, ++ [0][1][2][1][RTW89_IC][42] = 78, ++ [0][1][2][1][RTW89_KCC][42] = 62, ++ [0][1][2][1][RTW89_ACMA][42] = 76, ++ [0][1][2][1][RTW89_CHILE][42] = 36, ++ [0][1][2][1][RTW89_UKRAINE][42] = 4, ++ [0][1][2][1][RTW89_MEXICO][42] = 78, ++ [0][1][2][1][RTW89_CN][42] = 72, ++ [0][1][2][1][RTW89_QATAR][42] = 4, ++ [0][1][2][1][RTW89_UK][42] = 36, ++ [0][1][2][1][RTW89_FCC][44] = 78, ++ [0][1][2][1][RTW89_ETSI][44] = 4, ++ [0][1][2][1][RTW89_MKK][44] = 127, ++ [0][1][2][1][RTW89_IC][44] = 78, ++ [0][1][2][1][RTW89_KCC][44] = 62, ++ [0][1][2][1][RTW89_ACMA][44] = 76, ++ [0][1][2][1][RTW89_CHILE][44] = 36, ++ [0][1][2][1][RTW89_UKRAINE][44] = 4, ++ [0][1][2][1][RTW89_MEXICO][44] = 78, ++ [0][1][2][1][RTW89_CN][44] = 76, ++ [0][1][2][1][RTW89_QATAR][44] = 4, ++ [0][1][2][1][RTW89_UK][44] = 36, ++ [0][1][2][1][RTW89_FCC][46] = 78, ++ [0][1][2][1][RTW89_ETSI][46] = 4, ++ [0][1][2][1][RTW89_MKK][46] = 127, ++ [0][1][2][1][RTW89_IC][46] = 78, ++ [0][1][2][1][RTW89_KCC][46] = 62, ++ [0][1][2][1][RTW89_ACMA][46] = 76, ++ [0][1][2][1][RTW89_CHILE][46] = 36, ++ [0][1][2][1][RTW89_UKRAINE][46] = 4, ++ [0][1][2][1][RTW89_MEXICO][46] = 78, ++ [0][1][2][1][RTW89_CN][46] = 76, ++ [0][1][2][1][RTW89_QATAR][46] = 4, ++ [0][1][2][1][RTW89_UK][46] = 36, ++ [0][1][2][1][RTW89_FCC][48] = 58, ++ [0][1][2][1][RTW89_ETSI][48] = 127, ++ [0][1][2][1][RTW89_MKK][48] = 127, ++ [0][1][2][1][RTW89_IC][48] = 127, ++ [0][1][2][1][RTW89_KCC][48] = 127, ++ [0][1][2][1][RTW89_ACMA][48] = 127, ++ [0][1][2][1][RTW89_CHILE][48] = 127, ++ [0][1][2][1][RTW89_UKRAINE][48] = 127, ++ [0][1][2][1][RTW89_MEXICO][48] = 127, ++ [0][1][2][1][RTW89_CN][48] = 127, ++ [0][1][2][1][RTW89_QATAR][48] = 127, ++ [0][1][2][1][RTW89_UK][48] = 127, ++ [0][1][2][1][RTW89_FCC][50] = 58, ++ [0][1][2][1][RTW89_ETSI][50] = 127, ++ [0][1][2][1][RTW89_MKK][50] = 127, ++ [0][1][2][1][RTW89_IC][50] = 127, ++ [0][1][2][1][RTW89_KCC][50] = 127, ++ [0][1][2][1][RTW89_ACMA][50] = 127, ++ [0][1][2][1][RTW89_CHILE][50] = 127, ++ [0][1][2][1][RTW89_UKRAINE][50] = 127, ++ [0][1][2][1][RTW89_MEXICO][50] = 127, ++ [0][1][2][1][RTW89_CN][50] = 127, ++ [0][1][2][1][RTW89_QATAR][50] = 127, ++ [0][1][2][1][RTW89_UK][50] = 127, ++ [0][1][2][1][RTW89_FCC][52] = 58, ++ [0][1][2][1][RTW89_ETSI][52] = 127, ++ [0][1][2][1][RTW89_MKK][52] = 127, ++ [0][1][2][1][RTW89_IC][52] = 127, ++ [0][1][2][1][RTW89_KCC][52] = 127, ++ [0][1][2][1][RTW89_ACMA][52] = 127, ++ [0][1][2][1][RTW89_CHILE][52] = 127, ++ [0][1][2][1][RTW89_UKRAINE][52] = 127, ++ [0][1][2][1][RTW89_MEXICO][52] = 127, ++ [0][1][2][1][RTW89_CN][52] = 127, ++ [0][1][2][1][RTW89_QATAR][52] = 127, ++ [0][1][2][1][RTW89_UK][52] = 127, ++ [1][0][2][0][RTW89_FCC][1] = 66, ++ [1][0][2][0][RTW89_ETSI][1] = 64, ++ [1][0][2][0][RTW89_MKK][1] = 62, ++ [1][0][2][0][RTW89_IC][1] = 64, ++ [1][0][2][0][RTW89_KCC][1] = 70, ++ [1][0][2][0][RTW89_ACMA][1] = 64, ++ [1][0][2][0][RTW89_CHILE][1] = 42, ++ [1][0][2][0][RTW89_UKRAINE][1] = 52, ++ [1][0][2][0][RTW89_MEXICO][1] = 62, ++ [1][0][2][0][RTW89_CN][1] = 62, ++ [1][0][2][0][RTW89_QATAR][1] = 64, ++ [1][0][2][0][RTW89_UK][1] = 64, ++ [1][0][2][0][RTW89_FCC][5] = 78, ++ [1][0][2][0][RTW89_ETSI][5] = 64, ++ [1][0][2][0][RTW89_MKK][5] = 62, ++ [1][0][2][0][RTW89_IC][5] = 64, ++ [1][0][2][0][RTW89_KCC][5] = 66, ++ [1][0][2][0][RTW89_ACMA][5] = 64, ++ [1][0][2][0][RTW89_CHILE][5] = 42, ++ [1][0][2][0][RTW89_UKRAINE][5] = 52, ++ [1][0][2][0][RTW89_MEXICO][5] = 62, ++ [1][0][2][0][RTW89_CN][5] = 62, ++ [1][0][2][0][RTW89_QATAR][5] = 64, ++ [1][0][2][0][RTW89_UK][5] = 64, ++ [1][0][2][0][RTW89_FCC][9] = 78, ++ [1][0][2][0][RTW89_ETSI][9] = 64, ++ [1][0][2][0][RTW89_MKK][9] = 62, ++ [1][0][2][0][RTW89_IC][9] = 64, ++ [1][0][2][0][RTW89_KCC][9] = 74, ++ [1][0][2][0][RTW89_ACMA][9] = 64, ++ [1][0][2][0][RTW89_CHILE][9] = 66, ++ [1][0][2][0][RTW89_UKRAINE][9] = 52, ++ [1][0][2][0][RTW89_MEXICO][9] = 78, ++ [1][0][2][0][RTW89_CN][9] = 62, ++ [1][0][2][0][RTW89_QATAR][9] = 64, ++ [1][0][2][0][RTW89_UK][9] = 64, ++ [1][0][2][0][RTW89_FCC][13] = 66, ++ [1][0][2][0][RTW89_ETSI][13] = 64, ++ [1][0][2][0][RTW89_MKK][13] = 62, ++ [1][0][2][0][RTW89_IC][13] = 64, ++ [1][0][2][0][RTW89_KCC][13] = 68, ++ [1][0][2][0][RTW89_ACMA][13] = 64, ++ [1][0][2][0][RTW89_CHILE][13] = 66, ++ [1][0][2][0][RTW89_UKRAINE][13] = 52, ++ [1][0][2][0][RTW89_MEXICO][13] = 66, ++ [1][0][2][0][RTW89_CN][13] = 62, ++ [1][0][2][0][RTW89_QATAR][13] = 64, ++ [1][0][2][0][RTW89_UK][13] = 64, ++ [1][0][2][0][RTW89_FCC][16] = 64, ++ [1][0][2][0][RTW89_ETSI][16] = 64, ++ [1][0][2][0][RTW89_MKK][16] = 74, ++ [1][0][2][0][RTW89_IC][16] = 64, ++ [1][0][2][0][RTW89_KCC][16] = 70, ++ [1][0][2][0][RTW89_ACMA][16] = 64, ++ [1][0][2][0][RTW89_CHILE][16] = 64, ++ [1][0][2][0][RTW89_UKRAINE][16] = 52, ++ [1][0][2][0][RTW89_MEXICO][16] = 64, ++ [1][0][2][0][RTW89_CN][16] = 127, ++ [1][0][2][0][RTW89_QATAR][16] = 64, ++ [1][0][2][0][RTW89_UK][16] = 64, ++ [1][0][2][0][RTW89_FCC][20] = 78, ++ [1][0][2][0][RTW89_ETSI][20] = 64, ++ [1][0][2][0][RTW89_MKK][20] = 74, ++ [1][0][2][0][RTW89_IC][20] = 78, ++ [1][0][2][0][RTW89_KCC][20] = 70, ++ [1][0][2][0][RTW89_ACMA][20] = 64, ++ [1][0][2][0][RTW89_CHILE][20] = 62, ++ [1][0][2][0][RTW89_UKRAINE][20] = 52, ++ [1][0][2][0][RTW89_MEXICO][20] = 78, ++ [1][0][2][0][RTW89_CN][20] = 127, ++ [1][0][2][0][RTW89_QATAR][20] = 64, ++ [1][0][2][0][RTW89_UK][20] = 64, ++ [1][0][2][0][RTW89_FCC][24] = 78, ++ [1][0][2][0][RTW89_ETSI][24] = 64, ++ [1][0][2][0][RTW89_MKK][24] = 74, ++ [1][0][2][0][RTW89_IC][24] = 127, ++ [1][0][2][0][RTW89_KCC][24] = 70, ++ [1][0][2][0][RTW89_ACMA][24] = 127, ++ [1][0][2][0][RTW89_CHILE][24] = 62, ++ [1][0][2][0][RTW89_UKRAINE][24] = 52, ++ [1][0][2][0][RTW89_MEXICO][24] = 78, ++ [1][0][2][0][RTW89_CN][24] = 127, ++ [1][0][2][0][RTW89_QATAR][24] = 64, ++ [1][0][2][0][RTW89_UK][24] = 64, ++ [1][0][2][0][RTW89_FCC][28] = 78, ++ [1][0][2][0][RTW89_ETSI][28] = 64, ++ [1][0][2][0][RTW89_MKK][28] = 74, ++ [1][0][2][0][RTW89_IC][28] = 127, ++ [1][0][2][0][RTW89_KCC][28] = 74, ++ [1][0][2][0][RTW89_ACMA][28] = 127, ++ [1][0][2][0][RTW89_CHILE][28] = 64, ++ [1][0][2][0][RTW89_UKRAINE][28] = 52, ++ [1][0][2][0][RTW89_MEXICO][28] = 78, ++ [1][0][2][0][RTW89_CN][28] = 127, ++ [1][0][2][0][RTW89_QATAR][28] = 64, ++ [1][0][2][0][RTW89_UK][28] = 64, ++ [1][0][2][0][RTW89_FCC][32] = 76, ++ [1][0][2][0][RTW89_ETSI][32] = 64, ++ [1][0][2][0][RTW89_MKK][32] = 74, ++ [1][0][2][0][RTW89_IC][32] = 76, ++ [1][0][2][0][RTW89_KCC][32] = 74, ++ [1][0][2][0][RTW89_ACMA][32] = 64, ++ [1][0][2][0][RTW89_CHILE][32] = 64, ++ [1][0][2][0][RTW89_UKRAINE][32] = 52, ++ [1][0][2][0][RTW89_MEXICO][32] = 76, ++ [1][0][2][0][RTW89_CN][32] = 127, ++ [1][0][2][0][RTW89_QATAR][32] = 64, ++ [1][0][2][0][RTW89_UK][32] = 64, ++ [1][0][2][0][RTW89_FCC][36] = 78, ++ [1][0][2][0][RTW89_ETSI][36] = 127, ++ [1][0][2][0][RTW89_MKK][36] = 74, ++ [1][0][2][0][RTW89_IC][36] = 78, ++ [1][0][2][0][RTW89_KCC][36] = 74, ++ [1][0][2][0][RTW89_ACMA][36] = 74, ++ [1][0][2][0][RTW89_CHILE][36] = 64, ++ [1][0][2][0][RTW89_UKRAINE][36] = 127, ++ [1][0][2][0][RTW89_MEXICO][36] = 78, ++ [1][0][2][0][RTW89_CN][36] = 127, ++ [1][0][2][0][RTW89_QATAR][36] = 127, ++ [1][0][2][0][RTW89_UK][36] = 74, ++ [1][0][2][0][RTW89_FCC][39] = 78, ++ [1][0][2][0][RTW89_ETSI][39] = 28, ++ [1][0][2][0][RTW89_MKK][39] = 127, ++ [1][0][2][0][RTW89_IC][39] = 78, ++ [1][0][2][0][RTW89_KCC][39] = 74, ++ [1][0][2][0][RTW89_ACMA][39] = 74, ++ [1][0][2][0][RTW89_CHILE][39] = 64, ++ [1][0][2][0][RTW89_UKRAINE][39] = 28, ++ [1][0][2][0][RTW89_MEXICO][39] = 78, ++ [1][0][2][0][RTW89_CN][39] = 70, ++ [1][0][2][0][RTW89_QATAR][39] = 28, ++ [1][0][2][0][RTW89_UK][39] = 64, ++ [1][0][2][0][RTW89_FCC][43] = 78, ++ [1][0][2][0][RTW89_ETSI][43] = 28, ++ [1][0][2][0][RTW89_MKK][43] = 127, ++ [1][0][2][0][RTW89_IC][43] = 78, ++ [1][0][2][0][RTW89_KCC][43] = 74, ++ [1][0][2][0][RTW89_ACMA][43] = 74, ++ [1][0][2][0][RTW89_CHILE][43] = 64, ++ [1][0][2][0][RTW89_UKRAINE][43] = 28, ++ [1][0][2][0][RTW89_MEXICO][43] = 78, ++ [1][0][2][0][RTW89_CN][43] = 74, ++ [1][0][2][0][RTW89_QATAR][43] = 28, ++ [1][0][2][0][RTW89_UK][43] = 62, ++ [1][0][2][0][RTW89_FCC][47] = 78, ++ [1][0][2][0][RTW89_ETSI][47] = 127, ++ [1][0][2][0][RTW89_MKK][47] = 127, ++ [1][0][2][0][RTW89_IC][47] = 127, ++ [1][0][2][0][RTW89_KCC][47] = 127, ++ [1][0][2][0][RTW89_ACMA][47] = 127, ++ [1][0][2][0][RTW89_CHILE][47] = 127, ++ [1][0][2][0][RTW89_UKRAINE][47] = 127, ++ [1][0][2][0][RTW89_MEXICO][47] = 127, ++ [1][0][2][0][RTW89_CN][47] = 127, ++ [1][0][2][0][RTW89_QATAR][47] = 127, ++ [1][0][2][0][RTW89_UK][47] = 127, ++ [1][0][2][0][RTW89_FCC][51] = 70, ++ [1][0][2][0][RTW89_ETSI][51] = 127, ++ [1][0][2][0][RTW89_MKK][51] = 127, ++ [1][0][2][0][RTW89_IC][51] = 127, ++ [1][0][2][0][RTW89_KCC][51] = 127, ++ [1][0][2][0][RTW89_ACMA][51] = 127, ++ [1][0][2][0][RTW89_CHILE][51] = 127, ++ [1][0][2][0][RTW89_UKRAINE][51] = 127, ++ [1][0][2][0][RTW89_MEXICO][51] = 127, ++ [1][0][2][0][RTW89_CN][51] = 127, ++ [1][0][2][0][RTW89_QATAR][51] = 127, ++ [1][0][2][0][RTW89_UK][51] = 127, ++ [1][1][2][0][RTW89_FCC][1] = 62, ++ [1][1][2][0][RTW89_ETSI][1] = 52, ++ [1][1][2][0][RTW89_MKK][1] = 50, ++ [1][1][2][0][RTW89_IC][1] = 52, ++ [1][1][2][0][RTW89_KCC][1] = 58, ++ [1][1][2][0][RTW89_ACMA][1] = 52, ++ [1][1][2][0][RTW89_CHILE][1] = 30, ++ [1][1][2][0][RTW89_UKRAINE][1] = 40, ++ [1][1][2][0][RTW89_MEXICO][1] = 50, ++ [1][1][2][0][RTW89_CN][1] = 50, ++ [1][1][2][0][RTW89_QATAR][1] = 52, ++ [1][1][2][0][RTW89_UK][1] = 52, ++ [1][1][2][0][RTW89_FCC][5] = 76, ++ [1][1][2][0][RTW89_ETSI][5] = 52, ++ [1][1][2][0][RTW89_MKK][5] = 50, ++ [1][1][2][0][RTW89_IC][5] = 52, ++ [1][1][2][0][RTW89_KCC][5] = 48, ++ [1][1][2][0][RTW89_ACMA][5] = 52, ++ [1][1][2][0][RTW89_CHILE][5] = 30, ++ [1][1][2][0][RTW89_UKRAINE][5] = 40, ++ [1][1][2][0][RTW89_MEXICO][5] = 50, ++ [1][1][2][0][RTW89_CN][5] = 50, ++ [1][1][2][0][RTW89_QATAR][5] = 52, ++ [1][1][2][0][RTW89_UK][5] = 52, ++ [1][1][2][0][RTW89_FCC][9] = 76, ++ [1][1][2][0][RTW89_ETSI][9] = 52, ++ [1][1][2][0][RTW89_MKK][9] = 50, ++ [1][1][2][0][RTW89_IC][9] = 52, ++ [1][1][2][0][RTW89_KCC][9] = 60, ++ [1][1][2][0][RTW89_ACMA][9] = 52, ++ [1][1][2][0][RTW89_CHILE][9] = 50, ++ [1][1][2][0][RTW89_UKRAINE][9] = 40, ++ [1][1][2][0][RTW89_MEXICO][9] = 76, ++ [1][1][2][0][RTW89_CN][9] = 50, ++ [1][1][2][0][RTW89_QATAR][9] = 52, ++ [1][1][2][0][RTW89_UK][9] = 52, ++ [1][1][2][0][RTW89_FCC][13] = 62, ++ [1][1][2][0][RTW89_ETSI][13] = 52, ++ [1][1][2][0][RTW89_MKK][13] = 50, ++ [1][1][2][0][RTW89_IC][13] = 52, ++ [1][1][2][0][RTW89_KCC][13] = 58, ++ [1][1][2][0][RTW89_ACMA][13] = 52, ++ [1][1][2][0][RTW89_CHILE][13] = 48, ++ [1][1][2][0][RTW89_UKRAINE][13] = 40, ++ [1][1][2][0][RTW89_MEXICO][13] = 62, ++ [1][1][2][0][RTW89_CN][13] = 50, ++ [1][1][2][0][RTW89_QATAR][13] = 52, ++ [1][1][2][0][RTW89_UK][13] = 52, ++ [1][1][2][0][RTW89_FCC][16] = 56, ++ [1][1][2][0][RTW89_ETSI][16] = 52, ++ [1][1][2][0][RTW89_MKK][16] = 70, ++ [1][1][2][0][RTW89_IC][16] = 56, ++ [1][1][2][0][RTW89_KCC][16] = 58, ++ [1][1][2][0][RTW89_ACMA][16] = 52, ++ [1][1][2][0][RTW89_CHILE][16] = 48, ++ [1][1][2][0][RTW89_UKRAINE][16] = 40, ++ [1][1][2][0][RTW89_MEXICO][16] = 56, ++ [1][1][2][0][RTW89_CN][16] = 127, ++ [1][1][2][0][RTW89_QATAR][16] = 52, ++ [1][1][2][0][RTW89_UK][16] = 52, ++ [1][1][2][0][RTW89_FCC][20] = 76, ++ [1][1][2][0][RTW89_ETSI][20] = 52, ++ [1][1][2][0][RTW89_MKK][20] = 70, ++ [1][1][2][0][RTW89_IC][20] = 76, ++ [1][1][2][0][RTW89_KCC][20] = 58, ++ [1][1][2][0][RTW89_ACMA][20] = 52, ++ [1][1][2][0][RTW89_CHILE][20] = 50, ++ [1][1][2][0][RTW89_UKRAINE][20] = 40, ++ [1][1][2][0][RTW89_MEXICO][20] = 76, ++ [1][1][2][0][RTW89_CN][20] = 127, ++ [1][1][2][0][RTW89_QATAR][20] = 52, ++ [1][1][2][0][RTW89_UK][20] = 52, ++ [1][1][2][0][RTW89_FCC][24] = 76, ++ [1][1][2][0][RTW89_ETSI][24] = 52, ++ [1][1][2][0][RTW89_MKK][24] = 70, ++ [1][1][2][0][RTW89_IC][24] = 127, ++ [1][1][2][0][RTW89_KCC][24] = 58, ++ [1][1][2][0][RTW89_ACMA][24] = 127, ++ [1][1][2][0][RTW89_CHILE][24] = 50, ++ [1][1][2][0][RTW89_UKRAINE][24] = 40, ++ [1][1][2][0][RTW89_MEXICO][24] = 76, ++ [1][1][2][0][RTW89_CN][24] = 127, ++ [1][1][2][0][RTW89_QATAR][24] = 52, ++ [1][1][2][0][RTW89_UK][24] = 52, ++ [1][1][2][0][RTW89_FCC][28] = 76, ++ [1][1][2][0][RTW89_ETSI][28] = 52, ++ [1][1][2][0][RTW89_MKK][28] = 70, ++ [1][1][2][0][RTW89_IC][28] = 127, ++ [1][1][2][0][RTW89_KCC][28] = 60, ++ [1][1][2][0][RTW89_ACMA][28] = 127, ++ [1][1][2][0][RTW89_CHILE][28] = 48, ++ [1][1][2][0][RTW89_UKRAINE][28] = 40, ++ [1][1][2][0][RTW89_MEXICO][28] = 76, ++ [1][1][2][0][RTW89_CN][28] = 127, ++ [1][1][2][0][RTW89_QATAR][28] = 52, ++ [1][1][2][0][RTW89_UK][28] = 52, ++ [1][1][2][0][RTW89_FCC][32] = 68, ++ [1][1][2][0][RTW89_ETSI][32] = 52, ++ [1][1][2][0][RTW89_MKK][32] = 70, ++ [1][1][2][0][RTW89_IC][32] = 68, ++ [1][1][2][0][RTW89_KCC][32] = 60, ++ [1][1][2][0][RTW89_ACMA][32] = 52, ++ [1][1][2][0][RTW89_CHILE][32] = 48, ++ [1][1][2][0][RTW89_UKRAINE][32] = 40, ++ [1][1][2][0][RTW89_MEXICO][32] = 68, ++ [1][1][2][0][RTW89_CN][32] = 127, ++ [1][1][2][0][RTW89_QATAR][32] = 52, ++ [1][1][2][0][RTW89_UK][32] = 52, ++ [1][1][2][0][RTW89_FCC][36] = 76, ++ [1][1][2][0][RTW89_ETSI][36] = 127, ++ [1][1][2][0][RTW89_MKK][36] = 70, ++ [1][1][2][0][RTW89_IC][36] = 76, ++ [1][1][2][0][RTW89_KCC][36] = 60, ++ [1][1][2][0][RTW89_ACMA][36] = 74, ++ [1][1][2][0][RTW89_CHILE][36] = 50, ++ [1][1][2][0][RTW89_UKRAINE][36] = 127, ++ [1][1][2][0][RTW89_MEXICO][36] = 76, ++ [1][1][2][0][RTW89_CN][36] = 127, ++ [1][1][2][0][RTW89_QATAR][36] = 127, ++ [1][1][2][0][RTW89_UK][36] = 74, ++ [1][1][2][0][RTW89_FCC][39] = 78, ++ [1][1][2][0][RTW89_ETSI][39] = 16, ++ [1][1][2][0][RTW89_MKK][39] = 127, ++ [1][1][2][0][RTW89_IC][39] = 78, ++ [1][1][2][0][RTW89_KCC][39] = 58, ++ [1][1][2][0][RTW89_ACMA][39] = 72, ++ [1][1][2][0][RTW89_CHILE][39] = 52, ++ [1][1][2][0][RTW89_UKRAINE][39] = 16, ++ [1][1][2][0][RTW89_MEXICO][39] = 78, ++ [1][1][2][0][RTW89_CN][39] = 70, ++ [1][1][2][0][RTW89_QATAR][39] = 16, ++ [1][1][2][0][RTW89_UK][39] = 52, ++ [1][1][2][0][RTW89_FCC][43] = 78, ++ [1][1][2][0][RTW89_ETSI][43] = 16, ++ [1][1][2][0][RTW89_MKK][43] = 127, ++ [1][1][2][0][RTW89_IC][43] = 78, ++ [1][1][2][0][RTW89_KCC][43] = 58, ++ [1][1][2][0][RTW89_ACMA][43] = 74, ++ [1][1][2][0][RTW89_CHILE][43] = 52, ++ [1][1][2][0][RTW89_UKRAINE][43] = 16, ++ [1][1][2][0][RTW89_MEXICO][43] = 78, ++ [1][1][2][0][RTW89_CN][43] = 74, ++ [1][1][2][0][RTW89_QATAR][43] = 16, ++ [1][1][2][0][RTW89_UK][43] = 52, ++ [1][1][2][0][RTW89_FCC][47] = 68, ++ [1][1][2][0][RTW89_ETSI][47] = 127, ++ [1][1][2][0][RTW89_MKK][47] = 127, ++ [1][1][2][0][RTW89_IC][47] = 127, ++ [1][1][2][0][RTW89_KCC][47] = 127, ++ [1][1][2][0][RTW89_ACMA][47] = 127, ++ [1][1][2][0][RTW89_CHILE][47] = 127, ++ [1][1][2][0][RTW89_UKRAINE][47] = 127, ++ [1][1][2][0][RTW89_MEXICO][47] = 127, ++ [1][1][2][0][RTW89_CN][47] = 127, ++ [1][1][2][0][RTW89_QATAR][47] = 127, ++ [1][1][2][0][RTW89_UK][47] = 127, ++ [1][1][2][0][RTW89_FCC][51] = 66, ++ [1][1][2][0][RTW89_ETSI][51] = 127, ++ [1][1][2][0][RTW89_MKK][51] = 127, ++ [1][1][2][0][RTW89_IC][51] = 127, ++ [1][1][2][0][RTW89_KCC][51] = 127, ++ [1][1][2][0][RTW89_ACMA][51] = 127, ++ [1][1][2][0][RTW89_CHILE][51] = 127, ++ [1][1][2][0][RTW89_UKRAINE][51] = 127, ++ [1][1][2][0][RTW89_MEXICO][51] = 127, ++ [1][1][2][0][RTW89_CN][51] = 127, ++ [1][1][2][0][RTW89_QATAR][51] = 127, ++ [1][1][2][0][RTW89_UK][51] = 127, ++ [1][1][2][1][RTW89_FCC][1] = 62, ++ [1][1][2][1][RTW89_ETSI][1] = 40, ++ [1][1][2][1][RTW89_MKK][1] = 50, ++ [1][1][2][1][RTW89_IC][1] = 40, ++ [1][1][2][1][RTW89_KCC][1] = 58, ++ [1][1][2][1][RTW89_ACMA][1] = 40, ++ [1][1][2][1][RTW89_CHILE][1] = 16, ++ [1][1][2][1][RTW89_UKRAINE][1] = 28, ++ [1][1][2][1][RTW89_MEXICO][1] = 50, ++ [1][1][2][1][RTW89_CN][1] = 38, ++ [1][1][2][1][RTW89_QATAR][1] = 40, ++ [1][1][2][1][RTW89_UK][1] = 40, ++ [1][1][2][1][RTW89_FCC][5] = 68, ++ [1][1][2][1][RTW89_ETSI][5] = 40, ++ [1][1][2][1][RTW89_MKK][5] = 50, ++ [1][1][2][1][RTW89_IC][5] = 40, ++ [1][1][2][1][RTW89_KCC][5] = 48, ++ [1][1][2][1][RTW89_ACMA][5] = 40, ++ [1][1][2][1][RTW89_CHILE][5] = 16, ++ [1][1][2][1][RTW89_UKRAINE][5] = 28, ++ [1][1][2][1][RTW89_MEXICO][5] = 50, ++ [1][1][2][1][RTW89_CN][5] = 38, ++ [1][1][2][1][RTW89_QATAR][5] = 40, ++ [1][1][2][1][RTW89_UK][5] = 40, ++ [1][1][2][1][RTW89_FCC][9] = 68, ++ [1][1][2][1][RTW89_ETSI][9] = 40, ++ [1][1][2][1][RTW89_MKK][9] = 50, ++ [1][1][2][1][RTW89_IC][9] = 40, ++ [1][1][2][1][RTW89_KCC][9] = 60, ++ [1][1][2][1][RTW89_ACMA][9] = 40, ++ [1][1][2][1][RTW89_CHILE][9] = 36, ++ [1][1][2][1][RTW89_UKRAINE][9] = 28, ++ [1][1][2][1][RTW89_MEXICO][9] = 68, ++ [1][1][2][1][RTW89_CN][9] = 38, ++ [1][1][2][1][RTW89_QATAR][9] = 40, ++ [1][1][2][1][RTW89_UK][9] = 40, ++ [1][1][2][1][RTW89_FCC][13] = 62, ++ [1][1][2][1][RTW89_ETSI][13] = 40, ++ [1][1][2][1][RTW89_MKK][13] = 50, ++ [1][1][2][1][RTW89_IC][13] = 40, ++ [1][1][2][1][RTW89_KCC][13] = 58, ++ [1][1][2][1][RTW89_ACMA][13] = 40, ++ [1][1][2][1][RTW89_CHILE][13] = 36, ++ [1][1][2][1][RTW89_UKRAINE][13] = 28, ++ [1][1][2][1][RTW89_MEXICO][13] = 62, ++ [1][1][2][1][RTW89_CN][13] = 38, ++ [1][1][2][1][RTW89_QATAR][13] = 40, ++ [1][1][2][1][RTW89_UK][13] = 40, ++ [1][1][2][1][RTW89_FCC][16] = 56, ++ [1][1][2][1][RTW89_ETSI][16] = 40, ++ [1][1][2][1][RTW89_MKK][16] = 70, ++ [1][1][2][1][RTW89_IC][16] = 56, ++ [1][1][2][1][RTW89_KCC][16] = 58, ++ [1][1][2][1][RTW89_ACMA][16] = 40, ++ [1][1][2][1][RTW89_CHILE][16] = 36, ++ [1][1][2][1][RTW89_UKRAINE][16] = 28, ++ [1][1][2][1][RTW89_MEXICO][16] = 56, ++ [1][1][2][1][RTW89_CN][16] = 127, ++ [1][1][2][1][RTW89_QATAR][16] = 40, ++ [1][1][2][1][RTW89_UK][16] = 40, ++ [1][1][2][1][RTW89_FCC][20] = 68, ++ [1][1][2][1][RTW89_ETSI][20] = 40, ++ [1][1][2][1][RTW89_MKK][20] = 70, ++ [1][1][2][1][RTW89_IC][20] = 68, ++ [1][1][2][1][RTW89_KCC][20] = 58, ++ [1][1][2][1][RTW89_ACMA][20] = 40, ++ [1][1][2][1][RTW89_CHILE][20] = 36, ++ [1][1][2][1][RTW89_UKRAINE][20] = 28, ++ [1][1][2][1][RTW89_MEXICO][20] = 68, ++ [1][1][2][1][RTW89_CN][20] = 127, ++ [1][1][2][1][RTW89_QATAR][20] = 40, ++ [1][1][2][1][RTW89_UK][20] = 40, ++ [1][1][2][1][RTW89_FCC][24] = 68, ++ [1][1][2][1][RTW89_ETSI][24] = 40, ++ [1][1][2][1][RTW89_MKK][24] = 70, ++ [1][1][2][1][RTW89_IC][24] = 127, ++ [1][1][2][1][RTW89_KCC][24] = 58, ++ [1][1][2][1][RTW89_ACMA][24] = 127, ++ [1][1][2][1][RTW89_CHILE][24] = 36, ++ [1][1][2][1][RTW89_UKRAINE][24] = 28, ++ [1][1][2][1][RTW89_MEXICO][24] = 68, ++ [1][1][2][1][RTW89_CN][24] = 127, ++ [1][1][2][1][RTW89_QATAR][24] = 40, ++ [1][1][2][1][RTW89_UK][24] = 40, ++ [1][1][2][1][RTW89_FCC][28] = 68, ++ [1][1][2][1][RTW89_ETSI][28] = 40, ++ [1][1][2][1][RTW89_MKK][28] = 70, ++ [1][1][2][1][RTW89_IC][28] = 127, ++ [1][1][2][1][RTW89_KCC][28] = 60, ++ [1][1][2][1][RTW89_ACMA][28] = 127, ++ [1][1][2][1][RTW89_CHILE][28] = 36, ++ [1][1][2][1][RTW89_UKRAINE][28] = 28, ++ [1][1][2][1][RTW89_MEXICO][28] = 68, ++ [1][1][2][1][RTW89_CN][28] = 127, ++ [1][1][2][1][RTW89_QATAR][28] = 40, ++ [1][1][2][1][RTW89_UK][28] = 40, ++ [1][1][2][1][RTW89_FCC][32] = 68, ++ [1][1][2][1][RTW89_ETSI][32] = 40, ++ [1][1][2][1][RTW89_MKK][32] = 70, ++ [1][1][2][1][RTW89_IC][32] = 68, ++ [1][1][2][1][RTW89_KCC][32] = 60, ++ [1][1][2][1][RTW89_ACMA][32] = 40, ++ [1][1][2][1][RTW89_CHILE][32] = 36, ++ [1][1][2][1][RTW89_UKRAINE][32] = 28, ++ [1][1][2][1][RTW89_MEXICO][32] = 68, ++ [1][1][2][1][RTW89_CN][32] = 127, ++ [1][1][2][1][RTW89_QATAR][32] = 40, ++ [1][1][2][1][RTW89_UK][32] = 40, ++ [1][1][2][1][RTW89_FCC][36] = 68, ++ [1][1][2][1][RTW89_ETSI][36] = 127, ++ [1][1][2][1][RTW89_MKK][36] = 70, ++ [1][1][2][1][RTW89_IC][36] = 68, ++ [1][1][2][1][RTW89_KCC][36] = 60, ++ [1][1][2][1][RTW89_ACMA][36] = 70, ++ [1][1][2][1][RTW89_CHILE][36] = 36, ++ [1][1][2][1][RTW89_UKRAINE][36] = 127, ++ [1][1][2][1][RTW89_MEXICO][36] = 68, ++ [1][1][2][1][RTW89_CN][36] = 127, ++ [1][1][2][1][RTW89_QATAR][36] = 127, ++ [1][1][2][1][RTW89_UK][36] = 62, ++ [1][1][2][1][RTW89_FCC][39] = 78, ++ [1][1][2][1][RTW89_ETSI][39] = 4, ++ [1][1][2][1][RTW89_MKK][39] = 127, ++ [1][1][2][1][RTW89_IC][39] = 78, ++ [1][1][2][1][RTW89_KCC][39] = 58, ++ [1][1][2][1][RTW89_ACMA][39] = 72, ++ [1][1][2][1][RTW89_CHILE][39] = 36, ++ [1][1][2][1][RTW89_UKRAINE][39] = 4, ++ [1][1][2][1][RTW89_MEXICO][39] = 78, ++ [1][1][2][1][RTW89_CN][39] = 70, ++ [1][1][2][1][RTW89_QATAR][39] = 4, ++ [1][1][2][1][RTW89_UK][39] = 40, ++ [1][1][2][1][RTW89_FCC][43] = 78, ++ [1][1][2][1][RTW89_ETSI][43] = 4, ++ [1][1][2][1][RTW89_MKK][43] = 127, ++ [1][1][2][1][RTW89_IC][43] = 78, ++ [1][1][2][1][RTW89_KCC][43] = 58, ++ [1][1][2][1][RTW89_ACMA][43] = 74, ++ [1][1][2][1][RTW89_CHILE][43] = 36, ++ [1][1][2][1][RTW89_UKRAINE][43] = 4, ++ [1][1][2][1][RTW89_MEXICO][43] = 78, ++ [1][1][2][1][RTW89_CN][43] = 74, ++ [1][1][2][1][RTW89_QATAR][43] = 4, ++ [1][1][2][1][RTW89_UK][43] = 40, ++ [1][1][2][1][RTW89_FCC][47] = 68, ++ [1][1][2][1][RTW89_ETSI][47] = 127, ++ [1][1][2][1][RTW89_MKK][47] = 127, ++ [1][1][2][1][RTW89_IC][47] = 127, ++ [1][1][2][1][RTW89_KCC][47] = 127, ++ [1][1][2][1][RTW89_ACMA][47] = 127, ++ [1][1][2][1][RTW89_CHILE][47] = 127, ++ [1][1][2][1][RTW89_UKRAINE][47] = 127, ++ [1][1][2][1][RTW89_MEXICO][47] = 127, ++ [1][1][2][1][RTW89_CN][47] = 127, ++ [1][1][2][1][RTW89_QATAR][47] = 127, ++ [1][1][2][1][RTW89_UK][47] = 127, ++ [1][1][2][1][RTW89_FCC][51] = 66, ++ [1][1][2][1][RTW89_ETSI][51] = 127, ++ [1][1][2][1][RTW89_MKK][51] = 127, ++ [1][1][2][1][RTW89_IC][51] = 127, ++ [1][1][2][1][RTW89_KCC][51] = 127, ++ [1][1][2][1][RTW89_ACMA][51] = 127, ++ [1][1][2][1][RTW89_CHILE][51] = 127, ++ [1][1][2][1][RTW89_UKRAINE][51] = 127, ++ [1][1][2][1][RTW89_MEXICO][51] = 127, ++ [1][1][2][1][RTW89_CN][51] = 127, ++ [1][1][2][1][RTW89_QATAR][51] = 127, ++ [1][1][2][1][RTW89_UK][51] = 127, ++ [2][0][2][0][RTW89_FCC][3] = 64, ++ [2][0][2][0][RTW89_ETSI][3] = 64, ++ [2][0][2][0][RTW89_MKK][3] = 64, ++ [2][0][2][0][RTW89_IC][3] = 62, ++ [2][0][2][0][RTW89_KCC][3] = 68, ++ [2][0][2][0][RTW89_ACMA][3] = 64, ++ [2][0][2][0][RTW89_CHILE][3] = 42, ++ [2][0][2][0][RTW89_UKRAINE][3] = 52, ++ [2][0][2][0][RTW89_MEXICO][3] = 62, ++ [2][0][2][0][RTW89_CN][3] = 62, ++ [2][0][2][0][RTW89_QATAR][3] = 64, ++ [2][0][2][0][RTW89_UK][3] = 64, ++ [2][0][2][0][RTW89_FCC][11] = 66, ++ [2][0][2][0][RTW89_ETSI][11] = 64, ++ [2][0][2][0][RTW89_MKK][11] = 64, ++ [2][0][2][0][RTW89_IC][11] = 64, ++ [2][0][2][0][RTW89_KCC][11] = 70, ++ [2][0][2][0][RTW89_ACMA][11] = 64, ++ [2][0][2][0][RTW89_CHILE][11] = 66, ++ [2][0][2][0][RTW89_UKRAINE][11] = 52, ++ [2][0][2][0][RTW89_MEXICO][11] = 66, ++ [2][0][2][0][RTW89_CN][11] = 62, ++ [2][0][2][0][RTW89_QATAR][11] = 64, ++ [2][0][2][0][RTW89_UK][11] = 64, ++ [2][0][2][0][RTW89_FCC][18] = 62, ++ [2][0][2][0][RTW89_ETSI][18] = 64, ++ [2][0][2][0][RTW89_MKK][18] = 70, ++ [2][0][2][0][RTW89_IC][18] = 62, ++ [2][0][2][0][RTW89_KCC][18] = 64, ++ [2][0][2][0][RTW89_ACMA][18] = 64, ++ [2][0][2][0][RTW89_CHILE][18] = 64, ++ [2][0][2][0][RTW89_UKRAINE][18] = 52, ++ [2][0][2][0][RTW89_MEXICO][18] = 62, ++ [2][0][2][0][RTW89_CN][18] = 127, ++ [2][0][2][0][RTW89_QATAR][18] = 64, ++ [2][0][2][0][RTW89_UK][18] = 64, ++ [2][0][2][0][RTW89_FCC][26] = 74, ++ [2][0][2][0][RTW89_ETSI][26] = 64, ++ [2][0][2][0][RTW89_MKK][26] = 70, ++ [2][0][2][0][RTW89_IC][26] = 127, ++ [2][0][2][0][RTW89_KCC][26] = 70, ++ [2][0][2][0][RTW89_ACMA][26] = 127, ++ [2][0][2][0][RTW89_CHILE][26] = 64, ++ [2][0][2][0][RTW89_UKRAINE][26] = 52, ++ [2][0][2][0][RTW89_MEXICO][26] = 74, ++ [2][0][2][0][RTW89_CN][26] = 127, ++ [2][0][2][0][RTW89_QATAR][26] = 64, ++ [2][0][2][0][RTW89_UK][26] = 64, ++ [2][0][2][0][RTW89_FCC][34] = 74, ++ [2][0][2][0][RTW89_ETSI][34] = 127, ++ [2][0][2][0][RTW89_MKK][34] = 70, ++ [2][0][2][0][RTW89_IC][34] = 74, ++ [2][0][2][0][RTW89_KCC][34] = 70, ++ [2][0][2][0][RTW89_ACMA][34] = 70, ++ [2][0][2][0][RTW89_CHILE][34] = 64, ++ [2][0][2][0][RTW89_UKRAINE][34] = 127, ++ [2][0][2][0][RTW89_MEXICO][34] = 74, ++ [2][0][2][0][RTW89_CN][34] = 127, ++ [2][0][2][0][RTW89_QATAR][34] = 127, ++ [2][0][2][0][RTW89_UK][34] = 70, ++ [2][0][2][0][RTW89_FCC][41] = 74, ++ [2][0][2][0][RTW89_ETSI][41] = 28, ++ [2][0][2][0][RTW89_MKK][41] = 127, ++ [2][0][2][0][RTW89_IC][41] = 74, ++ [2][0][2][0][RTW89_KCC][41] = 66, ++ [2][0][2][0][RTW89_ACMA][41] = 70, ++ [2][0][2][0][RTW89_CHILE][41] = 64, ++ [2][0][2][0][RTW89_UKRAINE][41] = 28, ++ [2][0][2][0][RTW89_MEXICO][41] = 74, ++ [2][0][2][0][RTW89_CN][41] = 70, ++ [2][0][2][0][RTW89_QATAR][41] = 28, ++ [2][0][2][0][RTW89_UK][41] = 64, ++ [2][0][2][0][RTW89_FCC][49] = 64, ++ [2][0][2][0][RTW89_ETSI][49] = 127, ++ [2][0][2][0][RTW89_MKK][49] = 127, ++ [2][0][2][0][RTW89_IC][49] = 127, ++ [2][0][2][0][RTW89_KCC][49] = 127, ++ [2][0][2][0][RTW89_ACMA][49] = 127, ++ [2][0][2][0][RTW89_CHILE][49] = 127, ++ [2][0][2][0][RTW89_UKRAINE][49] = 127, ++ [2][0][2][0][RTW89_MEXICO][49] = 127, ++ [2][0][2][0][RTW89_CN][49] = 127, ++ [2][0][2][0][RTW89_QATAR][49] = 127, ++ [2][0][2][0][RTW89_UK][49] = 127, ++ [2][1][2][0][RTW89_FCC][3] = 56, ++ [2][1][2][0][RTW89_ETSI][3] = 52, ++ [2][1][2][0][RTW89_MKK][3] = 52, ++ [2][1][2][0][RTW89_IC][3] = 52, ++ [2][1][2][0][RTW89_KCC][3] = 54, ++ [2][1][2][0][RTW89_ACMA][3] = 52, ++ [2][1][2][0][RTW89_CHILE][3] = 28, ++ [2][1][2][0][RTW89_UKRAINE][3] = 40, ++ [2][1][2][0][RTW89_MEXICO][3] = 50, ++ [2][1][2][0][RTW89_CN][3] = 50, ++ [2][1][2][0][RTW89_QATAR][3] = 52, ++ [2][1][2][0][RTW89_UK][3] = 52, ++ [2][1][2][0][RTW89_FCC][11] = 62, ++ [2][1][2][0][RTW89_ETSI][11] = 52, ++ [2][1][2][0][RTW89_MKK][11] = 52, ++ [2][1][2][0][RTW89_IC][11] = 52, ++ [2][1][2][0][RTW89_KCC][11] = 56, ++ [2][1][2][0][RTW89_ACMA][11] = 52, ++ [2][1][2][0][RTW89_CHILE][11] = 52, ++ [2][1][2][0][RTW89_UKRAINE][11] = 40, ++ [2][1][2][0][RTW89_MEXICO][11] = 62, ++ [2][1][2][0][RTW89_CN][11] = 50, ++ [2][1][2][0][RTW89_QATAR][11] = 52, ++ [2][1][2][0][RTW89_UK][11] = 52, ++ [2][1][2][0][RTW89_FCC][18] = 56, ++ [2][1][2][0][RTW89_ETSI][18] = 52, ++ [2][1][2][0][RTW89_MKK][18] = 70, ++ [2][1][2][0][RTW89_IC][18] = 56, ++ [2][1][2][0][RTW89_KCC][18] = 58, ++ [2][1][2][0][RTW89_ACMA][18] = 52, ++ [2][1][2][0][RTW89_CHILE][18] = 48, ++ [2][1][2][0][RTW89_UKRAINE][18] = 40, ++ [2][1][2][0][RTW89_MEXICO][18] = 56, ++ [2][1][2][0][RTW89_CN][18] = 127, ++ [2][1][2][0][RTW89_QATAR][18] = 52, ++ [2][1][2][0][RTW89_UK][18] = 52, ++ [2][1][2][0][RTW89_FCC][26] = 70, ++ [2][1][2][0][RTW89_ETSI][26] = 52, ++ [2][1][2][0][RTW89_MKK][26] = 70, ++ [2][1][2][0][RTW89_IC][26] = 127, ++ [2][1][2][0][RTW89_KCC][26] = 56, ++ [2][1][2][0][RTW89_ACMA][26] = 127, ++ [2][1][2][0][RTW89_CHILE][26] = 50, ++ [2][1][2][0][RTW89_UKRAINE][26] = 40, ++ [2][1][2][0][RTW89_MEXICO][26] = 70, ++ [2][1][2][0][RTW89_CN][26] = 127, ++ [2][1][2][0][RTW89_QATAR][26] = 52, ++ [2][1][2][0][RTW89_UK][26] = 52, ++ [2][1][2][0][RTW89_FCC][34] = 74, ++ [2][1][2][0][RTW89_ETSI][34] = 127, ++ [2][1][2][0][RTW89_MKK][34] = 70, ++ [2][1][2][0][RTW89_IC][34] = 74, ++ [2][1][2][0][RTW89_KCC][34] = 56, ++ [2][1][2][0][RTW89_ACMA][34] = 70, ++ [2][1][2][0][RTW89_CHILE][34] = 50, ++ [2][1][2][0][RTW89_UKRAINE][34] = 127, ++ [2][1][2][0][RTW89_MEXICO][34] = 74, ++ [2][1][2][0][RTW89_CN][34] = 127, ++ [2][1][2][0][RTW89_QATAR][34] = 127, ++ [2][1][2][0][RTW89_UK][34] = 68, ++ [2][1][2][0][RTW89_FCC][41] = 74, ++ [2][1][2][0][RTW89_ETSI][41] = 16, ++ [2][1][2][0][RTW89_MKK][41] = 127, ++ [2][1][2][0][RTW89_IC][41] = 74, ++ [2][1][2][0][RTW89_KCC][41] = 56, ++ [2][1][2][0][RTW89_ACMA][41] = 70, ++ [2][1][2][0][RTW89_CHILE][41] = 50, ++ [2][1][2][0][RTW89_UKRAINE][41] = 16, ++ [2][1][2][0][RTW89_MEXICO][41] = 74, ++ [2][1][2][0][RTW89_CN][41] = 70, ++ [2][1][2][0][RTW89_QATAR][41] = 16, ++ [2][1][2][0][RTW89_UK][41] = 52, ++ [2][1][2][0][RTW89_FCC][49] = 58, ++ [2][1][2][0][RTW89_ETSI][49] = 127, ++ [2][1][2][0][RTW89_MKK][49] = 127, ++ [2][1][2][0][RTW89_IC][49] = 127, ++ [2][1][2][0][RTW89_KCC][49] = 127, ++ [2][1][2][0][RTW89_ACMA][49] = 127, ++ [2][1][2][0][RTW89_CHILE][49] = 127, ++ [2][1][2][0][RTW89_UKRAINE][49] = 127, ++ [2][1][2][0][RTW89_MEXICO][49] = 127, ++ [2][1][2][0][RTW89_CN][49] = 127, ++ [2][1][2][0][RTW89_QATAR][49] = 127, ++ [2][1][2][0][RTW89_UK][49] = 127, ++ [2][1][2][1][RTW89_FCC][3] = 56, ++ [2][1][2][1][RTW89_ETSI][3] = 40, ++ [2][1][2][1][RTW89_MKK][3] = 52, ++ [2][1][2][1][RTW89_IC][3] = 40, ++ [2][1][2][1][RTW89_KCC][3] = 54, ++ [2][1][2][1][RTW89_ACMA][3] = 40, ++ [2][1][2][1][RTW89_CHILE][3] = 16, ++ [2][1][2][1][RTW89_UKRAINE][3] = 28, ++ [2][1][2][1][RTW89_MEXICO][3] = 50, ++ [2][1][2][1][RTW89_CN][3] = 38, ++ [2][1][2][1][RTW89_QATAR][3] = 40, ++ [2][1][2][1][RTW89_UK][3] = 40, ++ [2][1][2][1][RTW89_FCC][11] = 62, ++ [2][1][2][1][RTW89_ETSI][11] = 40, ++ [2][1][2][1][RTW89_MKK][11] = 52, ++ [2][1][2][1][RTW89_IC][11] = 40, ++ [2][1][2][1][RTW89_KCC][11] = 56, ++ [2][1][2][1][RTW89_ACMA][11] = 40, ++ [2][1][2][1][RTW89_CHILE][11] = 34, ++ [2][1][2][1][RTW89_UKRAINE][11] = 28, ++ [2][1][2][1][RTW89_MEXICO][11] = 62, ++ [2][1][2][1][RTW89_CN][11] = 38, ++ [2][1][2][1][RTW89_QATAR][11] = 40, ++ [2][1][2][1][RTW89_UK][11] = 40, ++ [2][1][2][1][RTW89_FCC][18] = 56, ++ [2][1][2][1][RTW89_ETSI][18] = 40, ++ [2][1][2][1][RTW89_MKK][18] = 70, ++ [2][1][2][1][RTW89_IC][18] = 56, ++ [2][1][2][1][RTW89_KCC][18] = 58, ++ [2][1][2][1][RTW89_ACMA][18] = 40, ++ [2][1][2][1][RTW89_CHILE][18] = 34, ++ [2][1][2][1][RTW89_UKRAINE][18] = 28, ++ [2][1][2][1][RTW89_MEXICO][18] = 56, ++ [2][1][2][1][RTW89_CN][18] = 127, ++ [2][1][2][1][RTW89_QATAR][18] = 40, ++ [2][1][2][1][RTW89_UK][18] = 40, ++ [2][1][2][1][RTW89_FCC][26] = 68, ++ [2][1][2][1][RTW89_ETSI][26] = 40, ++ [2][1][2][1][RTW89_MKK][26] = 70, ++ [2][1][2][1][RTW89_IC][26] = 127, ++ [2][1][2][1][RTW89_KCC][26] = 56, ++ [2][1][2][1][RTW89_ACMA][26] = 127, ++ [2][1][2][1][RTW89_CHILE][26] = 34, ++ [2][1][2][1][RTW89_UKRAINE][26] = 28, ++ [2][1][2][1][RTW89_MEXICO][26] = 68, ++ [2][1][2][1][RTW89_CN][26] = 127, ++ [2][1][2][1][RTW89_QATAR][26] = 40, ++ [2][1][2][1][RTW89_UK][26] = 40, ++ [2][1][2][1][RTW89_FCC][34] = 68, ++ [2][1][2][1][RTW89_ETSI][34] = 127, ++ [2][1][2][1][RTW89_MKK][34] = 70, ++ [2][1][2][1][RTW89_IC][34] = 68, ++ [2][1][2][1][RTW89_KCC][34] = 56, ++ [2][1][2][1][RTW89_ACMA][34] = 70, ++ [2][1][2][1][RTW89_CHILE][34] = 34, ++ [2][1][2][1][RTW89_UKRAINE][34] = 127, ++ [2][1][2][1][RTW89_MEXICO][34] = 68, ++ [2][1][2][1][RTW89_CN][34] = 127, ++ [2][1][2][1][RTW89_QATAR][34] = 127, ++ [2][1][2][1][RTW89_UK][34] = 56, ++ [2][1][2][1][RTW89_FCC][41] = 74, ++ [2][1][2][1][RTW89_ETSI][41] = 4, ++ [2][1][2][1][RTW89_MKK][41] = 127, ++ [2][1][2][1][RTW89_IC][41] = 74, ++ [2][1][2][1][RTW89_KCC][41] = 56, ++ [2][1][2][1][RTW89_ACMA][41] = 70, ++ [2][1][2][1][RTW89_CHILE][41] = 36, ++ [2][1][2][1][RTW89_UKRAINE][41] = 4, ++ [2][1][2][1][RTW89_MEXICO][41] = 74, ++ [2][1][2][1][RTW89_CN][41] = 70, ++ [2][1][2][1][RTW89_QATAR][41] = 4, ++ [2][1][2][1][RTW89_UK][41] = 38, ++ [2][1][2][1][RTW89_FCC][49] = 58, ++ [2][1][2][1][RTW89_ETSI][49] = 127, ++ [2][1][2][1][RTW89_MKK][49] = 127, ++ [2][1][2][1][RTW89_IC][49] = 127, ++ [2][1][2][1][RTW89_KCC][49] = 127, ++ [2][1][2][1][RTW89_ACMA][49] = 127, ++ [2][1][2][1][RTW89_CHILE][49] = 127, ++ [2][1][2][1][RTW89_UKRAINE][49] = 127, ++ [2][1][2][1][RTW89_MEXICO][49] = 127, ++ [2][1][2][1][RTW89_CN][49] = 127, ++ [2][1][2][1][RTW89_QATAR][49] = 127, ++ [2][1][2][1][RTW89_UK][49] = 127, ++}; ++ ++const s8 rtw89_8852b_txpwr_lmt_ru_2g[RTW89_RU_NUM][RTW89_NTX_NUM] ++ [RTW89_REGD_NUM][RTW89_2G_CH_NUM] = { ++ [0][0][RTW89_WW][0] = 32, ++ [0][0][RTW89_WW][1] = 32, ++ [0][0][RTW89_WW][2] = 32, ++ [0][0][RTW89_WW][3] = 32, ++ [0][0][RTW89_WW][4] = 32, ++ [0][0][RTW89_WW][5] = 32, ++ [0][0][RTW89_WW][6] = 32, ++ [0][0][RTW89_WW][7] = 32, ++ [0][0][RTW89_WW][8] = 32, ++ [0][0][RTW89_WW][9] = 32, ++ [0][0][RTW89_WW][10] = 32, ++ [0][0][RTW89_WW][11] = 32, ++ [0][0][RTW89_WW][12] = 32, ++ [0][0][RTW89_WW][13] = 0, ++ [0][1][RTW89_WW][0] = 20, ++ [0][1][RTW89_WW][1] = 22, ++ [0][1][RTW89_WW][2] = 22, ++ [0][1][RTW89_WW][3] = 22, ++ [0][1][RTW89_WW][4] = 22, ++ [0][1][RTW89_WW][5] = 22, ++ [0][1][RTW89_WW][6] = 22, ++ [0][1][RTW89_WW][7] = 22, ++ [0][1][RTW89_WW][8] = 22, ++ [0][1][RTW89_WW][9] = 22, ++ [0][1][RTW89_WW][10] = 22, ++ [0][1][RTW89_WW][11] = 22, ++ [0][1][RTW89_WW][12] = 20, ++ [0][1][RTW89_WW][13] = 0, ++ [1][0][RTW89_WW][0] = 42, ++ [1][0][RTW89_WW][1] = 44, ++ [1][0][RTW89_WW][2] = 44, ++ [1][0][RTW89_WW][3] = 44, ++ [1][0][RTW89_WW][4] = 44, ++ [1][0][RTW89_WW][5] = 44, ++ [1][0][RTW89_WW][6] = 44, ++ [1][0][RTW89_WW][7] = 44, ++ [1][0][RTW89_WW][8] = 44, ++ [1][0][RTW89_WW][9] = 44, ++ [1][0][RTW89_WW][10] = 44, ++ [1][0][RTW89_WW][11] = 44, ++ [1][0][RTW89_WW][12] = 38, ++ [1][0][RTW89_WW][13] = 0, ++ [1][1][RTW89_WW][0] = 32, ++ [1][1][RTW89_WW][1] = 32, ++ [1][1][RTW89_WW][2] = 32, ++ [1][1][RTW89_WW][3] = 32, ++ [1][1][RTW89_WW][4] = 32, ++ [1][1][RTW89_WW][5] = 32, ++ [1][1][RTW89_WW][6] = 32, ++ [1][1][RTW89_WW][7] = 32, ++ [1][1][RTW89_WW][8] = 32, ++ [1][1][RTW89_WW][9] = 32, ++ [1][1][RTW89_WW][10] = 32, ++ [1][1][RTW89_WW][11] = 32, ++ [1][1][RTW89_WW][12] = 32, ++ [1][1][RTW89_WW][13] = 0, ++ [2][0][RTW89_WW][0] = 56, ++ [2][0][RTW89_WW][1] = 56, ++ [2][0][RTW89_WW][2] = 56, ++ [2][0][RTW89_WW][3] = 56, ++ [2][0][RTW89_WW][4] = 56, ++ [2][0][RTW89_WW][5] = 56, ++ [2][0][RTW89_WW][6] = 56, ++ [2][0][RTW89_WW][7] = 56, ++ [2][0][RTW89_WW][8] = 56, ++ [2][0][RTW89_WW][9] = 56, ++ [2][0][RTW89_WW][10] = 56, ++ [2][0][RTW89_WW][11] = 50, ++ [2][0][RTW89_WW][12] = 46, ++ [2][0][RTW89_WW][13] = 0, ++ [2][1][RTW89_WW][0] = 44, ++ [2][1][RTW89_WW][1] = 44, ++ [2][1][RTW89_WW][2] = 44, ++ [2][1][RTW89_WW][3] = 44, ++ [2][1][RTW89_WW][4] = 44, ++ [2][1][RTW89_WW][5] = 44, ++ [2][1][RTW89_WW][6] = 44, ++ [2][1][RTW89_WW][7] = 44, ++ [2][1][RTW89_WW][8] = 44, ++ [2][1][RTW89_WW][9] = 44, ++ [2][1][RTW89_WW][10] = 44, ++ [2][1][RTW89_WW][11] = 38, ++ [2][1][RTW89_WW][12] = 34, ++ [2][1][RTW89_WW][13] = 0, ++ [0][0][RTW89_FCC][0] = 68, ++ [0][0][RTW89_ETSI][0] = 32, ++ [0][0][RTW89_MKK][0] = 42, ++ [0][0][RTW89_IC][0] = 68, ++ [0][0][RTW89_KCC][0] = 44, ++ [0][0][RTW89_ACMA][0] = 32, ++ [0][0][RTW89_CHILE][0] = 66, ++ [0][0][RTW89_UKRAINE][0] = 32, ++ [0][0][RTW89_MEXICO][0] = 68, ++ [0][0][RTW89_CN][0] = 32, ++ [0][0][RTW89_QATAR][0] = 32, ++ [0][0][RTW89_UK][0] = 32, ++ [0][0][RTW89_FCC][1] = 68, ++ [0][0][RTW89_ETSI][1] = 32, ++ [0][0][RTW89_MKK][1] = 42, ++ [0][0][RTW89_IC][1] = 68, ++ [0][0][RTW89_KCC][1] = 44, ++ [0][0][RTW89_ACMA][1] = 32, ++ [0][0][RTW89_CHILE][1] = 64, ++ [0][0][RTW89_UKRAINE][1] = 32, ++ [0][0][RTW89_MEXICO][1] = 68, ++ [0][0][RTW89_CN][1] = 32, ++ [0][0][RTW89_QATAR][1] = 32, ++ [0][0][RTW89_UK][1] = 32, ++ [0][0][RTW89_FCC][2] = 72, ++ [0][0][RTW89_ETSI][2] = 32, ++ [0][0][RTW89_MKK][2] = 42, ++ [0][0][RTW89_IC][2] = 72, ++ [0][0][RTW89_KCC][2] = 44, ++ [0][0][RTW89_ACMA][2] = 32, ++ [0][0][RTW89_CHILE][2] = 64, ++ [0][0][RTW89_UKRAINE][2] = 32, ++ [0][0][RTW89_MEXICO][2] = 72, ++ [0][0][RTW89_CN][2] = 32, ++ [0][0][RTW89_QATAR][2] = 32, ++ [0][0][RTW89_UK][2] = 32, ++ [0][0][RTW89_FCC][3] = 76, ++ [0][0][RTW89_ETSI][3] = 32, ++ [0][0][RTW89_MKK][3] = 42, ++ [0][0][RTW89_IC][3] = 76, ++ [0][0][RTW89_KCC][3] = 44, ++ [0][0][RTW89_ACMA][3] = 32, ++ [0][0][RTW89_CHILE][3] = 64, ++ [0][0][RTW89_UKRAINE][3] = 32, ++ [0][0][RTW89_MEXICO][3] = 76, ++ [0][0][RTW89_CN][3] = 32, ++ [0][0][RTW89_QATAR][3] = 32, ++ [0][0][RTW89_UK][3] = 32, ++ [0][0][RTW89_FCC][4] = 76, ++ [0][0][RTW89_ETSI][4] = 32, ++ [0][0][RTW89_MKK][4] = 42, ++ [0][0][RTW89_IC][4] = 76, ++ [0][0][RTW89_KCC][4] = 44, ++ [0][0][RTW89_ACMA][4] = 32, ++ [0][0][RTW89_CHILE][4] = 64, ++ [0][0][RTW89_UKRAINE][4] = 32, ++ [0][0][RTW89_MEXICO][4] = 76, ++ [0][0][RTW89_CN][4] = 32, ++ [0][0][RTW89_QATAR][4] = 32, ++ [0][0][RTW89_UK][4] = 32, ++ [0][0][RTW89_FCC][5] = 84, ++ [0][0][RTW89_ETSI][5] = 32, ++ [0][0][RTW89_MKK][5] = 42, ++ [0][0][RTW89_IC][5] = 84, ++ [0][0][RTW89_KCC][5] = 44, ++ [0][0][RTW89_ACMA][5] = 32, ++ [0][0][RTW89_CHILE][5] = 64, ++ [0][0][RTW89_UKRAINE][5] = 32, ++ [0][0][RTW89_MEXICO][5] = 84, ++ [0][0][RTW89_CN][5] = 32, ++ [0][0][RTW89_QATAR][5] = 32, ++ [0][0][RTW89_UK][5] = 32, ++ [0][0][RTW89_FCC][6] = 74, ++ [0][0][RTW89_ETSI][6] = 32, ++ [0][0][RTW89_MKK][6] = 42, ++ [0][0][RTW89_IC][6] = 74, ++ [0][0][RTW89_KCC][6] = 44, ++ [0][0][RTW89_ACMA][6] = 32, ++ [0][0][RTW89_CHILE][6] = 64, ++ [0][0][RTW89_UKRAINE][6] = 32, ++ [0][0][RTW89_MEXICO][6] = 74, ++ [0][0][RTW89_CN][6] = 32, ++ [0][0][RTW89_QATAR][6] = 32, ++ [0][0][RTW89_UK][6] = 32, ++ [0][0][RTW89_FCC][7] = 74, ++ [0][0][RTW89_ETSI][7] = 32, ++ [0][0][RTW89_MKK][7] = 42, ++ [0][0][RTW89_IC][7] = 74, ++ [0][0][RTW89_KCC][7] = 44, ++ [0][0][RTW89_ACMA][7] = 32, ++ [0][0][RTW89_CHILE][7] = 64, ++ [0][0][RTW89_UKRAINE][7] = 32, ++ [0][0][RTW89_MEXICO][7] = 74, ++ [0][0][RTW89_CN][7] = 32, ++ [0][0][RTW89_QATAR][7] = 32, ++ [0][0][RTW89_UK][7] = 32, ++ [0][0][RTW89_FCC][8] = 70, ++ [0][0][RTW89_ETSI][8] = 32, ++ [0][0][RTW89_MKK][8] = 42, ++ [0][0][RTW89_IC][8] = 70, ++ [0][0][RTW89_KCC][8] = 44, ++ [0][0][RTW89_ACMA][8] = 32, ++ [0][0][RTW89_CHILE][8] = 64, ++ [0][0][RTW89_UKRAINE][8] = 32, ++ [0][0][RTW89_MEXICO][8] = 70, ++ [0][0][RTW89_CN][8] = 32, ++ [0][0][RTW89_QATAR][8] = 32, ++ [0][0][RTW89_UK][8] = 32, ++ [0][0][RTW89_FCC][9] = 66, ++ [0][0][RTW89_ETSI][9] = 32, ++ [0][0][RTW89_MKK][9] = 42, ++ [0][0][RTW89_IC][9] = 66, ++ [0][0][RTW89_KCC][9] = 42, ++ [0][0][RTW89_ACMA][9] = 32, ++ [0][0][RTW89_CHILE][9] = 64, ++ [0][0][RTW89_UKRAINE][9] = 32, ++ [0][0][RTW89_MEXICO][9] = 66, ++ [0][0][RTW89_CN][9] = 32, ++ [0][0][RTW89_QATAR][9] = 32, ++ [0][0][RTW89_UK][9] = 32, ++ [0][0][RTW89_FCC][10] = 66, ++ [0][0][RTW89_ETSI][10] = 32, ++ [0][0][RTW89_MKK][10] = 42, ++ [0][0][RTW89_IC][10] = 66, ++ [0][0][RTW89_KCC][10] = 42, ++ [0][0][RTW89_ACMA][10] = 32, ++ [0][0][RTW89_CHILE][10] = 66, ++ [0][0][RTW89_UKRAINE][10] = 32, ++ [0][0][RTW89_MEXICO][10] = 66, ++ [0][0][RTW89_CN][10] = 32, ++ [0][0][RTW89_QATAR][10] = 32, ++ [0][0][RTW89_UK][10] = 32, ++ [0][0][RTW89_FCC][11] = 50, ++ [0][0][RTW89_ETSI][11] = 32, ++ [0][0][RTW89_MKK][11] = 42, ++ [0][0][RTW89_IC][11] = 50, ++ [0][0][RTW89_KCC][11] = 42, ++ [0][0][RTW89_ACMA][11] = 32, ++ [0][0][RTW89_CHILE][11] = 64, ++ [0][0][RTW89_UKRAINE][11] = 32, ++ [0][0][RTW89_MEXICO][11] = 50, ++ [0][0][RTW89_CN][11] = 32, ++ [0][0][RTW89_QATAR][11] = 32, ++ [0][0][RTW89_UK][11] = 32, ++ [0][0][RTW89_FCC][12] = 32, ++ [0][0][RTW89_ETSI][12] = 32, ++ [0][0][RTW89_MKK][12] = 42, ++ [0][0][RTW89_IC][12] = 32, ++ [0][0][RTW89_KCC][12] = 42, ++ [0][0][RTW89_ACMA][12] = 32, ++ [0][0][RTW89_CHILE][12] = 64, ++ [0][0][RTW89_UKRAINE][12] = 32, ++ [0][0][RTW89_MEXICO][12] = 32, ++ [0][0][RTW89_CN][12] = 32, ++ [0][0][RTW89_QATAR][12] = 32, ++ [0][0][RTW89_UK][12] = 32, ++ [0][0][RTW89_FCC][13] = 127, ++ [0][0][RTW89_ETSI][13] = 127, ++ [0][0][RTW89_MKK][13] = 127, ++ [0][0][RTW89_IC][13] = 127, ++ [0][0][RTW89_KCC][13] = 127, ++ [0][0][RTW89_ACMA][13] = 127, ++ [0][0][RTW89_CHILE][13] = 127, ++ [0][0][RTW89_UKRAINE][13] = 127, ++ [0][0][RTW89_MEXICO][13] = 127, ++ [0][0][RTW89_CN][13] = 127, ++ [0][0][RTW89_QATAR][13] = 127, ++ [0][0][RTW89_UK][13] = 127, ++ [0][1][RTW89_FCC][0] = 54, ++ [0][1][RTW89_ETSI][0] = 20, ++ [0][1][RTW89_MKK][0] = 32, ++ [0][1][RTW89_IC][0] = 54, ++ [0][1][RTW89_KCC][0] = 32, ++ [0][1][RTW89_ACMA][0] = 20, ++ [0][1][RTW89_CHILE][0] = 50, ++ [0][1][RTW89_UKRAINE][0] = 20, ++ [0][1][RTW89_MEXICO][0] = 54, ++ [0][1][RTW89_CN][0] = 20, ++ [0][1][RTW89_QATAR][0] = 20, ++ [0][1][RTW89_UK][0] = 20, ++ [0][1][RTW89_FCC][1] = 54, ++ [0][1][RTW89_ETSI][1] = 22, ++ [0][1][RTW89_MKK][1] = 32, ++ [0][1][RTW89_IC][1] = 54, ++ [0][1][RTW89_KCC][1] = 32, ++ [0][1][RTW89_ACMA][1] = 22, ++ [0][1][RTW89_CHILE][1] = 50, ++ [0][1][RTW89_UKRAINE][1] = 22, ++ [0][1][RTW89_MEXICO][1] = 54, ++ [0][1][RTW89_CN][1] = 22, ++ [0][1][RTW89_QATAR][1] = 22, ++ [0][1][RTW89_UK][1] = 22, ++ [0][1][RTW89_FCC][2] = 58, ++ [0][1][RTW89_ETSI][2] = 22, ++ [0][1][RTW89_MKK][2] = 32, ++ [0][1][RTW89_IC][2] = 58, ++ [0][1][RTW89_KCC][2] = 32, ++ [0][1][RTW89_ACMA][2] = 22, ++ [0][1][RTW89_CHILE][2] = 50, ++ [0][1][RTW89_UKRAINE][2] = 22, ++ [0][1][RTW89_MEXICO][2] = 58, ++ [0][1][RTW89_CN][2] = 22, ++ [0][1][RTW89_QATAR][2] = 22, ++ [0][1][RTW89_UK][2] = 22, ++ [0][1][RTW89_FCC][3] = 62, ++ [0][1][RTW89_ETSI][3] = 22, ++ [0][1][RTW89_MKK][3] = 32, ++ [0][1][RTW89_IC][3] = 62, ++ [0][1][RTW89_KCC][3] = 32, ++ [0][1][RTW89_ACMA][3] = 22, ++ [0][1][RTW89_CHILE][3] = 50, ++ [0][1][RTW89_UKRAINE][3] = 22, ++ [0][1][RTW89_MEXICO][3] = 62, ++ [0][1][RTW89_CN][3] = 22, ++ [0][1][RTW89_QATAR][3] = 22, ++ [0][1][RTW89_UK][3] = 22, ++ [0][1][RTW89_FCC][4] = 66, ++ [0][1][RTW89_ETSI][4] = 22, ++ [0][1][RTW89_MKK][4] = 32, ++ [0][1][RTW89_IC][4] = 66, ++ [0][1][RTW89_KCC][4] = 30, ++ [0][1][RTW89_ACMA][4] = 22, ++ [0][1][RTW89_CHILE][4] = 50, ++ [0][1][RTW89_UKRAINE][4] = 22, ++ [0][1][RTW89_MEXICO][4] = 66, ++ [0][1][RTW89_CN][4] = 22, ++ [0][1][RTW89_QATAR][4] = 22, ++ [0][1][RTW89_UK][4] = 22, ++ [0][1][RTW89_FCC][5] = 74, ++ [0][1][RTW89_ETSI][5] = 22, ++ [0][1][RTW89_MKK][5] = 32, ++ [0][1][RTW89_IC][5] = 74, ++ [0][1][RTW89_KCC][5] = 30, ++ [0][1][RTW89_ACMA][5] = 22, ++ [0][1][RTW89_CHILE][5] = 52, ++ [0][1][RTW89_UKRAINE][5] = 22, ++ [0][1][RTW89_MEXICO][5] = 74, ++ [0][1][RTW89_CN][5] = 22, ++ [0][1][RTW89_QATAR][5] = 22, ++ [0][1][RTW89_UK][5] = 22, ++ [0][1][RTW89_FCC][6] = 66, ++ [0][1][RTW89_ETSI][6] = 22, ++ [0][1][RTW89_MKK][6] = 30, ++ [0][1][RTW89_IC][6] = 66, ++ [0][1][RTW89_KCC][6] = 30, ++ [0][1][RTW89_ACMA][6] = 22, ++ [0][1][RTW89_CHILE][6] = 50, ++ [0][1][RTW89_UKRAINE][6] = 22, ++ [0][1][RTW89_MEXICO][6] = 66, ++ [0][1][RTW89_CN][6] = 22, ++ [0][1][RTW89_QATAR][6] = 22, ++ [0][1][RTW89_UK][6] = 22, ++ [0][1][RTW89_FCC][7] = 62, ++ [0][1][RTW89_ETSI][7] = 22, ++ [0][1][RTW89_MKK][7] = 32, ++ [0][1][RTW89_IC][7] = 62, ++ [0][1][RTW89_KCC][7] = 30, ++ [0][1][RTW89_ACMA][7] = 22, ++ [0][1][RTW89_CHILE][7] = 50, ++ [0][1][RTW89_UKRAINE][7] = 22, ++ [0][1][RTW89_MEXICO][7] = 62, ++ [0][1][RTW89_CN][7] = 22, ++ [0][1][RTW89_QATAR][7] = 22, ++ [0][1][RTW89_UK][7] = 22, ++ [0][1][RTW89_FCC][8] = 58, ++ [0][1][RTW89_ETSI][8] = 22, ++ [0][1][RTW89_MKK][8] = 32, ++ [0][1][RTW89_IC][8] = 58, ++ [0][1][RTW89_KCC][8] = 30, ++ [0][1][RTW89_ACMA][8] = 22, ++ [0][1][RTW89_CHILE][8] = 50, ++ [0][1][RTW89_UKRAINE][8] = 22, ++ [0][1][RTW89_MEXICO][8] = 58, ++ [0][1][RTW89_CN][8] = 22, ++ [0][1][RTW89_QATAR][8] = 22, ++ [0][1][RTW89_UK][8] = 22, ++ [0][1][RTW89_FCC][9] = 54, ++ [0][1][RTW89_ETSI][9] = 22, ++ [0][1][RTW89_MKK][9] = 32, ++ [0][1][RTW89_IC][9] = 54, ++ [0][1][RTW89_KCC][9] = 30, ++ [0][1][RTW89_ACMA][9] = 22, ++ [0][1][RTW89_CHILE][9] = 50, ++ [0][1][RTW89_UKRAINE][9] = 22, ++ [0][1][RTW89_MEXICO][9] = 54, ++ [0][1][RTW89_CN][9] = 22, ++ [0][1][RTW89_QATAR][9] = 22, ++ [0][1][RTW89_UK][9] = 22, ++ [0][1][RTW89_FCC][10] = 54, ++ [0][1][RTW89_ETSI][10] = 22, ++ [0][1][RTW89_MKK][10] = 32, ++ [0][1][RTW89_IC][10] = 54, ++ [0][1][RTW89_KCC][10] = 30, ++ [0][1][RTW89_ACMA][10] = 22, ++ [0][1][RTW89_CHILE][10] = 50, ++ [0][1][RTW89_UKRAINE][10] = 22, ++ [0][1][RTW89_MEXICO][10] = 54, ++ [0][1][RTW89_CN][10] = 22, ++ [0][1][RTW89_QATAR][10] = 22, ++ [0][1][RTW89_UK][10] = 22, ++ [0][1][RTW89_FCC][11] = 38, ++ [0][1][RTW89_ETSI][11] = 22, ++ [0][1][RTW89_MKK][11] = 32, ++ [0][1][RTW89_IC][11] = 38, ++ [0][1][RTW89_KCC][11] = 30, ++ [0][1][RTW89_ACMA][11] = 22, ++ [0][1][RTW89_CHILE][11] = 50, ++ [0][1][RTW89_UKRAINE][11] = 22, ++ [0][1][RTW89_MEXICO][11] = 38, ++ [0][1][RTW89_CN][11] = 22, ++ [0][1][RTW89_QATAR][11] = 22, ++ [0][1][RTW89_UK][11] = 22, ++ [0][1][RTW89_FCC][12] = 30, ++ [0][1][RTW89_ETSI][12] = 20, ++ [0][1][RTW89_MKK][12] = 30, ++ [0][1][RTW89_IC][12] = 30, ++ [0][1][RTW89_KCC][12] = 30, ++ [0][1][RTW89_ACMA][12] = 20, ++ [0][1][RTW89_CHILE][12] = 50, ++ [0][1][RTW89_UKRAINE][12] = 20, ++ [0][1][RTW89_MEXICO][12] = 30, ++ [0][1][RTW89_CN][12] = 20, ++ [0][1][RTW89_QATAR][12] = 20, ++ [0][1][RTW89_UK][12] = 20, ++ [0][1][RTW89_FCC][13] = 127, ++ [0][1][RTW89_ETSI][13] = 127, ++ [0][1][RTW89_MKK][13] = 127, ++ [0][1][RTW89_IC][13] = 127, ++ [0][1][RTW89_KCC][13] = 127, ++ [0][1][RTW89_ACMA][13] = 127, ++ [0][1][RTW89_CHILE][13] = 127, ++ [0][1][RTW89_UKRAINE][13] = 127, ++ [0][1][RTW89_MEXICO][13] = 127, ++ [0][1][RTW89_CN][13] = 127, ++ [0][1][RTW89_QATAR][13] = 127, ++ [0][1][RTW89_UK][13] = 127, ++ [1][0][RTW89_FCC][0] = 72, ++ [1][0][RTW89_ETSI][0] = 42, ++ [1][0][RTW89_MKK][0] = 52, ++ [1][0][RTW89_IC][0] = 72, ++ [1][0][RTW89_KCC][0] = 52, ++ [1][0][RTW89_ACMA][0] = 42, ++ [1][0][RTW89_CHILE][0] = 68, ++ [1][0][RTW89_UKRAINE][0] = 42, ++ [1][0][RTW89_MEXICO][0] = 72, ++ [1][0][RTW89_CN][0] = 42, ++ [1][0][RTW89_QATAR][0] = 42, ++ [1][0][RTW89_UK][0] = 42, ++ [1][0][RTW89_FCC][1] = 72, ++ [1][0][RTW89_ETSI][1] = 44, ++ [1][0][RTW89_MKK][1] = 52, ++ [1][0][RTW89_IC][1] = 72, ++ [1][0][RTW89_KCC][1] = 52, ++ [1][0][RTW89_ACMA][1] = 44, ++ [1][0][RTW89_CHILE][1] = 68, ++ [1][0][RTW89_UKRAINE][1] = 44, ++ [1][0][RTW89_MEXICO][1] = 72, ++ [1][0][RTW89_CN][1] = 44, ++ [1][0][RTW89_QATAR][1] = 44, ++ [1][0][RTW89_UK][1] = 44, ++ [1][0][RTW89_FCC][2] = 76, ++ [1][0][RTW89_ETSI][2] = 44, ++ [1][0][RTW89_MKK][2] = 52, ++ [1][0][RTW89_IC][2] = 76, ++ [1][0][RTW89_KCC][2] = 52, ++ [1][0][RTW89_ACMA][2] = 44, ++ [1][0][RTW89_CHILE][2] = 68, ++ [1][0][RTW89_UKRAINE][2] = 44, ++ [1][0][RTW89_MEXICO][2] = 76, ++ [1][0][RTW89_CN][2] = 44, ++ [1][0][RTW89_QATAR][2] = 44, ++ [1][0][RTW89_UK][2] = 44, ++ [1][0][RTW89_FCC][3] = 78, ++ [1][0][RTW89_ETSI][3] = 44, ++ [1][0][RTW89_MKK][3] = 52, ++ [1][0][RTW89_IC][3] = 78, ++ [1][0][RTW89_KCC][3] = 52, ++ [1][0][RTW89_ACMA][3] = 44, ++ [1][0][RTW89_CHILE][3] = 68, ++ [1][0][RTW89_UKRAINE][3] = 44, ++ [1][0][RTW89_MEXICO][3] = 78, ++ [1][0][RTW89_CN][3] = 44, ++ [1][0][RTW89_QATAR][3] = 44, ++ [1][0][RTW89_UK][3] = 44, ++ [1][0][RTW89_FCC][4] = 78, ++ [1][0][RTW89_ETSI][4] = 44, ++ [1][0][RTW89_MKK][4] = 52, ++ [1][0][RTW89_IC][4] = 78, ++ [1][0][RTW89_KCC][4] = 52, ++ [1][0][RTW89_ACMA][4] = 44, ++ [1][0][RTW89_CHILE][4] = 68, ++ [1][0][RTW89_UKRAINE][4] = 44, ++ [1][0][RTW89_MEXICO][4] = 78, ++ [1][0][RTW89_CN][4] = 44, ++ [1][0][RTW89_QATAR][4] = 44, ++ [1][0][RTW89_UK][4] = 44, ++ [1][0][RTW89_FCC][5] = 84, ++ [1][0][RTW89_ETSI][5] = 44, ++ [1][0][RTW89_MKK][5] = 52, ++ [1][0][RTW89_IC][5] = 84, ++ [1][0][RTW89_KCC][5] = 52, ++ [1][0][RTW89_ACMA][5] = 44, ++ [1][0][RTW89_CHILE][5] = 68, ++ [1][0][RTW89_UKRAINE][5] = 44, ++ [1][0][RTW89_MEXICO][5] = 84, ++ [1][0][RTW89_CN][5] = 44, ++ [1][0][RTW89_QATAR][5] = 44, ++ [1][0][RTW89_UK][5] = 44, ++ [1][0][RTW89_FCC][6] = 72, ++ [1][0][RTW89_ETSI][6] = 44, ++ [1][0][RTW89_MKK][6] = 52, ++ [1][0][RTW89_IC][6] = 72, ++ [1][0][RTW89_KCC][6] = 52, ++ [1][0][RTW89_ACMA][6] = 44, ++ [1][0][RTW89_CHILE][6] = 68, ++ [1][0][RTW89_UKRAINE][6] = 44, ++ [1][0][RTW89_MEXICO][6] = 72, ++ [1][0][RTW89_CN][6] = 44, ++ [1][0][RTW89_QATAR][6] = 44, ++ [1][0][RTW89_UK][6] = 44, ++ [1][0][RTW89_FCC][7] = 72, ++ [1][0][RTW89_ETSI][7] = 44, ++ [1][0][RTW89_MKK][7] = 52, ++ [1][0][RTW89_IC][7] = 72, ++ [1][0][RTW89_KCC][7] = 52, ++ [1][0][RTW89_ACMA][7] = 44, ++ [1][0][RTW89_CHILE][7] = 68, ++ [1][0][RTW89_UKRAINE][7] = 44, ++ [1][0][RTW89_MEXICO][7] = 72, ++ [1][0][RTW89_CN][7] = 44, ++ [1][0][RTW89_QATAR][7] = 44, ++ [1][0][RTW89_UK][7] = 44, ++ [1][0][RTW89_FCC][8] = 72, ++ [1][0][RTW89_ETSI][8] = 44, ++ [1][0][RTW89_MKK][8] = 52, ++ [1][0][RTW89_IC][8] = 72, ++ [1][0][RTW89_KCC][8] = 52, ++ [1][0][RTW89_ACMA][8] = 44, ++ [1][0][RTW89_CHILE][8] = 68, ++ [1][0][RTW89_UKRAINE][8] = 44, ++ [1][0][RTW89_MEXICO][8] = 72, ++ [1][0][RTW89_CN][8] = 44, ++ [1][0][RTW89_QATAR][8] = 44, ++ [1][0][RTW89_UK][8] = 44, ++ [1][0][RTW89_FCC][9] = 68, ++ [1][0][RTW89_ETSI][9] = 44, ++ [1][0][RTW89_MKK][9] = 52, ++ [1][0][RTW89_IC][9] = 68, ++ [1][0][RTW89_KCC][9] = 52, ++ [1][0][RTW89_ACMA][9] = 44, ++ [1][0][RTW89_CHILE][9] = 68, ++ [1][0][RTW89_UKRAINE][9] = 44, ++ [1][0][RTW89_MEXICO][9] = 68, ++ [1][0][RTW89_CN][9] = 44, ++ [1][0][RTW89_QATAR][9] = 44, ++ [1][0][RTW89_UK][9] = 44, ++ [1][0][RTW89_FCC][10] = 68, ++ [1][0][RTW89_ETSI][10] = 44, ++ [1][0][RTW89_MKK][10] = 52, ++ [1][0][RTW89_IC][10] = 68, ++ [1][0][RTW89_KCC][10] = 52, ++ [1][0][RTW89_ACMA][10] = 44, ++ [1][0][RTW89_CHILE][10] = 70, ++ [1][0][RTW89_UKRAINE][10] = 44, ++ [1][0][RTW89_MEXICO][10] = 68, ++ [1][0][RTW89_CN][10] = 44, ++ [1][0][RTW89_QATAR][10] = 44, ++ [1][0][RTW89_UK][10] = 44, ++ [1][0][RTW89_FCC][11] = 50, ++ [1][0][RTW89_ETSI][11] = 44, ++ [1][0][RTW89_MKK][11] = 52, ++ [1][0][RTW89_IC][11] = 50, ++ [1][0][RTW89_KCC][11] = 52, ++ [1][0][RTW89_ACMA][11] = 44, ++ [1][0][RTW89_CHILE][11] = 68, ++ [1][0][RTW89_UKRAINE][11] = 44, ++ [1][0][RTW89_MEXICO][11] = 50, ++ [1][0][RTW89_CN][11] = 44, ++ [1][0][RTW89_QATAR][11] = 44, ++ [1][0][RTW89_UK][11] = 44, ++ [1][0][RTW89_FCC][12] = 38, ++ [1][0][RTW89_ETSI][12] = 42, ++ [1][0][RTW89_MKK][12] = 52, ++ [1][0][RTW89_IC][12] = 38, ++ [1][0][RTW89_KCC][12] = 52, ++ [1][0][RTW89_ACMA][12] = 42, ++ [1][0][RTW89_CHILE][12] = 68, ++ [1][0][RTW89_UKRAINE][12] = 42, ++ [1][0][RTW89_MEXICO][12] = 38, ++ [1][0][RTW89_CN][12] = 42, ++ [1][0][RTW89_QATAR][12] = 42, ++ [1][0][RTW89_UK][12] = 42, ++ [1][0][RTW89_FCC][13] = 127, ++ [1][0][RTW89_ETSI][13] = 127, ++ [1][0][RTW89_MKK][13] = 127, ++ [1][0][RTW89_IC][13] = 127, ++ [1][0][RTW89_KCC][13] = 127, ++ [1][0][RTW89_ACMA][13] = 127, ++ [1][0][RTW89_CHILE][13] = 127, ++ [1][0][RTW89_UKRAINE][13] = 127, ++ [1][0][RTW89_MEXICO][13] = 127, ++ [1][0][RTW89_CN][13] = 127, ++ [1][0][RTW89_QATAR][13] = 127, ++ [1][0][RTW89_UK][13] = 127, ++ [1][1][RTW89_FCC][0] = 54, ++ [1][1][RTW89_ETSI][0] = 32, ++ [1][1][RTW89_MKK][0] = 40, ++ [1][1][RTW89_IC][0] = 54, ++ [1][1][RTW89_KCC][0] = 40, ++ [1][1][RTW89_ACMA][0] = 32, ++ [1][1][RTW89_CHILE][0] = 54, ++ [1][1][RTW89_UKRAINE][0] = 32, ++ [1][1][RTW89_MEXICO][0] = 54, ++ [1][1][RTW89_CN][0] = 32, ++ [1][1][RTW89_QATAR][0] = 32, ++ [1][1][RTW89_UK][0] = 32, ++ [1][1][RTW89_FCC][1] = 54, ++ [1][1][RTW89_ETSI][1] = 32, ++ [1][1][RTW89_MKK][1] = 40, ++ [1][1][RTW89_IC][1] = 54, ++ [1][1][RTW89_KCC][1] = 40, ++ [1][1][RTW89_ACMA][1] = 32, ++ [1][1][RTW89_CHILE][1] = 54, ++ [1][1][RTW89_UKRAINE][1] = 32, ++ [1][1][RTW89_MEXICO][1] = 54, ++ [1][1][RTW89_CN][1] = 32, ++ [1][1][RTW89_QATAR][1] = 32, ++ [1][1][RTW89_UK][1] = 32, ++ [1][1][RTW89_FCC][2] = 58, ++ [1][1][RTW89_ETSI][2] = 32, ++ [1][1][RTW89_MKK][2] = 40, ++ [1][1][RTW89_IC][2] = 58, ++ [1][1][RTW89_KCC][2] = 40, ++ [1][1][RTW89_ACMA][2] = 32, ++ [1][1][RTW89_CHILE][2] = 54, ++ [1][1][RTW89_UKRAINE][2] = 32, ++ [1][1][RTW89_MEXICO][2] = 58, ++ [1][1][RTW89_CN][2] = 32, ++ [1][1][RTW89_QATAR][2] = 32, ++ [1][1][RTW89_UK][2] = 32, ++ [1][1][RTW89_FCC][3] = 62, ++ [1][1][RTW89_ETSI][3] = 32, ++ [1][1][RTW89_MKK][3] = 40, ++ [1][1][RTW89_IC][3] = 62, ++ [1][1][RTW89_KCC][3] = 40, ++ [1][1][RTW89_ACMA][3] = 32, ++ [1][1][RTW89_CHILE][3] = 54, ++ [1][1][RTW89_UKRAINE][3] = 32, ++ [1][1][RTW89_MEXICO][3] = 62, ++ [1][1][RTW89_CN][3] = 32, ++ [1][1][RTW89_QATAR][3] = 32, ++ [1][1][RTW89_UK][3] = 32, ++ [1][1][RTW89_FCC][4] = 66, ++ [1][1][RTW89_ETSI][4] = 32, ++ [1][1][RTW89_MKK][4] = 40, ++ [1][1][RTW89_IC][4] = 66, ++ [1][1][RTW89_KCC][4] = 40, ++ [1][1][RTW89_ACMA][4] = 32, ++ [1][1][RTW89_CHILE][4] = 54, ++ [1][1][RTW89_UKRAINE][4] = 32, ++ [1][1][RTW89_MEXICO][4] = 66, ++ [1][1][RTW89_CN][4] = 32, ++ [1][1][RTW89_QATAR][4] = 32, ++ [1][1][RTW89_UK][4] = 32, ++ [1][1][RTW89_FCC][5] = 74, ++ [1][1][RTW89_ETSI][5] = 32, ++ [1][1][RTW89_MKK][5] = 40, ++ [1][1][RTW89_IC][5] = 74, ++ [1][1][RTW89_KCC][5] = 40, ++ [1][1][RTW89_ACMA][5] = 32, ++ [1][1][RTW89_CHILE][5] = 54, ++ [1][1][RTW89_UKRAINE][5] = 32, ++ [1][1][RTW89_MEXICO][5] = 74, ++ [1][1][RTW89_CN][5] = 32, ++ [1][1][RTW89_QATAR][5] = 32, ++ [1][1][RTW89_UK][5] = 32, ++ [1][1][RTW89_FCC][6] = 66, ++ [1][1][RTW89_ETSI][6] = 32, ++ [1][1][RTW89_MKK][6] = 40, ++ [1][1][RTW89_IC][6] = 66, ++ [1][1][RTW89_KCC][6] = 40, ++ [1][1][RTW89_ACMA][6] = 32, ++ [1][1][RTW89_CHILE][6] = 54, ++ [1][1][RTW89_UKRAINE][6] = 32, ++ [1][1][RTW89_MEXICO][6] = 66, ++ [1][1][RTW89_CN][6] = 32, ++ [1][1][RTW89_QATAR][6] = 32, ++ [1][1][RTW89_UK][6] = 32, ++ [1][1][RTW89_FCC][7] = 62, ++ [1][1][RTW89_ETSI][7] = 32, ++ [1][1][RTW89_MKK][7] = 40, ++ [1][1][RTW89_IC][7] = 62, ++ [1][1][RTW89_KCC][7] = 40, ++ [1][1][RTW89_ACMA][7] = 32, ++ [1][1][RTW89_CHILE][7] = 54, ++ [1][1][RTW89_UKRAINE][7] = 32, ++ [1][1][RTW89_MEXICO][7] = 62, ++ [1][1][RTW89_CN][7] = 32, ++ [1][1][RTW89_QATAR][7] = 32, ++ [1][1][RTW89_UK][7] = 32, ++ [1][1][RTW89_FCC][8] = 58, ++ [1][1][RTW89_ETSI][8] = 32, ++ [1][1][RTW89_MKK][8] = 40, ++ [1][1][RTW89_IC][8] = 58, ++ [1][1][RTW89_KCC][8] = 40, ++ [1][1][RTW89_ACMA][8] = 32, ++ [1][1][RTW89_CHILE][8] = 54, ++ [1][1][RTW89_UKRAINE][8] = 32, ++ [1][1][RTW89_MEXICO][8] = 58, ++ [1][1][RTW89_CN][8] = 32, ++ [1][1][RTW89_QATAR][8] = 32, ++ [1][1][RTW89_UK][8] = 32, ++ [1][1][RTW89_FCC][9] = 54, ++ [1][1][RTW89_ETSI][9] = 32, ++ [1][1][RTW89_MKK][9] = 40, ++ [1][1][RTW89_IC][9] = 54, ++ [1][1][RTW89_KCC][9] = 40, ++ [1][1][RTW89_ACMA][9] = 32, ++ [1][1][RTW89_CHILE][9] = 54, ++ [1][1][RTW89_UKRAINE][9] = 32, ++ [1][1][RTW89_MEXICO][9] = 54, ++ [1][1][RTW89_CN][9] = 32, ++ [1][1][RTW89_QATAR][9] = 32, ++ [1][1][RTW89_UK][9] = 32, ++ [1][1][RTW89_FCC][10] = 54, ++ [1][1][RTW89_ETSI][10] = 32, ++ [1][1][RTW89_MKK][10] = 40, ++ [1][1][RTW89_IC][10] = 54, ++ [1][1][RTW89_KCC][10] = 40, ++ [1][1][RTW89_ACMA][10] = 32, ++ [1][1][RTW89_CHILE][10] = 54, ++ [1][1][RTW89_UKRAINE][10] = 32, ++ [1][1][RTW89_MEXICO][10] = 54, ++ [1][1][RTW89_CN][10] = 32, ++ [1][1][RTW89_QATAR][10] = 32, ++ [1][1][RTW89_UK][10] = 32, ++ [1][1][RTW89_FCC][11] = 38, ++ [1][1][RTW89_ETSI][11] = 32, ++ [1][1][RTW89_MKK][11] = 40, ++ [1][1][RTW89_IC][11] = 38, ++ [1][1][RTW89_KCC][11] = 40, ++ [1][1][RTW89_ACMA][11] = 32, ++ [1][1][RTW89_CHILE][11] = 54, ++ [1][1][RTW89_UKRAINE][11] = 32, ++ [1][1][RTW89_MEXICO][11] = 38, ++ [1][1][RTW89_CN][11] = 32, ++ [1][1][RTW89_QATAR][11] = 32, ++ [1][1][RTW89_UK][11] = 32, ++ [1][1][RTW89_FCC][12] = 32, ++ [1][1][RTW89_ETSI][12] = 32, ++ [1][1][RTW89_MKK][12] = 40, ++ [1][1][RTW89_IC][12] = 32, ++ [1][1][RTW89_KCC][12] = 40, ++ [1][1][RTW89_ACMA][12] = 32, ++ [1][1][RTW89_CHILE][12] = 54, ++ [1][1][RTW89_UKRAINE][12] = 32, ++ [1][1][RTW89_MEXICO][12] = 32, ++ [1][1][RTW89_CN][12] = 32, ++ [1][1][RTW89_QATAR][12] = 32, ++ [1][1][RTW89_UK][12] = 32, ++ [1][1][RTW89_FCC][13] = 127, ++ [1][1][RTW89_ETSI][13] = 127, ++ [1][1][RTW89_MKK][13] = 127, ++ [1][1][RTW89_IC][13] = 127, ++ [1][1][RTW89_KCC][13] = 127, ++ [1][1][RTW89_ACMA][13] = 127, ++ [1][1][RTW89_CHILE][13] = 127, ++ [1][1][RTW89_UKRAINE][13] = 127, ++ [1][1][RTW89_MEXICO][13] = 127, ++ [1][1][RTW89_CN][13] = 127, ++ [1][1][RTW89_QATAR][13] = 127, ++ [1][1][RTW89_UK][13] = 127, ++ [2][0][RTW89_FCC][0] = 72, ++ [2][0][RTW89_ETSI][0] = 56, ++ [2][0][RTW89_MKK][0] = 64, ++ [2][0][RTW89_IC][0] = 72, ++ [2][0][RTW89_KCC][0] = 66, ++ [2][0][RTW89_ACMA][0] = 56, ++ [2][0][RTW89_CHILE][0] = 68, ++ [2][0][RTW89_UKRAINE][0] = 56, ++ [2][0][RTW89_MEXICO][0] = 72, ++ [2][0][RTW89_CN][0] = 56, ++ [2][0][RTW89_QATAR][0] = 56, ++ [2][0][RTW89_UK][0] = 56, ++ [2][0][RTW89_FCC][1] = 72, ++ [2][0][RTW89_ETSI][1] = 56, ++ [2][0][RTW89_MKK][1] = 64, ++ [2][0][RTW89_IC][1] = 72, ++ [2][0][RTW89_KCC][1] = 66, ++ [2][0][RTW89_ACMA][1] = 56, ++ [2][0][RTW89_CHILE][1] = 68, ++ [2][0][RTW89_UKRAINE][1] = 56, ++ [2][0][RTW89_MEXICO][1] = 72, ++ [2][0][RTW89_CN][1] = 56, ++ [2][0][RTW89_QATAR][1] = 56, ++ [2][0][RTW89_UK][1] = 56, ++ [2][0][RTW89_FCC][2] = 74, ++ [2][0][RTW89_ETSI][2] = 56, ++ [2][0][RTW89_MKK][2] = 64, ++ [2][0][RTW89_IC][2] = 74, ++ [2][0][RTW89_KCC][2] = 66, ++ [2][0][RTW89_ACMA][2] = 56, ++ [2][0][RTW89_CHILE][2] = 68, ++ [2][0][RTW89_UKRAINE][2] = 56, ++ [2][0][RTW89_MEXICO][2] = 74, ++ [2][0][RTW89_CN][2] = 56, ++ [2][0][RTW89_QATAR][2] = 56, ++ [2][0][RTW89_UK][2] = 56, ++ [2][0][RTW89_FCC][3] = 74, ++ [2][0][RTW89_ETSI][3] = 56, ++ [2][0][RTW89_MKK][3] = 64, ++ [2][0][RTW89_IC][3] = 74, ++ [2][0][RTW89_KCC][3] = 66, ++ [2][0][RTW89_ACMA][3] = 56, ++ [2][0][RTW89_CHILE][3] = 68, ++ [2][0][RTW89_UKRAINE][3] = 56, ++ [2][0][RTW89_MEXICO][3] = 74, ++ [2][0][RTW89_CN][3] = 56, ++ [2][0][RTW89_QATAR][3] = 56, ++ [2][0][RTW89_UK][3] = 56, ++ [2][0][RTW89_FCC][4] = 74, ++ [2][0][RTW89_ETSI][4] = 56, ++ [2][0][RTW89_MKK][4] = 64, ++ [2][0][RTW89_IC][4] = 74, ++ [2][0][RTW89_KCC][4] = 66, ++ [2][0][RTW89_ACMA][4] = 56, ++ [2][0][RTW89_CHILE][4] = 68, ++ [2][0][RTW89_UKRAINE][4] = 56, ++ [2][0][RTW89_MEXICO][4] = 74, ++ [2][0][RTW89_CN][4] = 56, ++ [2][0][RTW89_QATAR][4] = 56, ++ [2][0][RTW89_UK][4] = 56, ++ [2][0][RTW89_FCC][5] = 84, ++ [2][0][RTW89_ETSI][5] = 56, ++ [2][0][RTW89_MKK][5] = 64, ++ [2][0][RTW89_IC][5] = 84, ++ [2][0][RTW89_KCC][5] = 66, ++ [2][0][RTW89_ACMA][5] = 56, ++ [2][0][RTW89_CHILE][5] = 70, ++ [2][0][RTW89_UKRAINE][5] = 56, ++ [2][0][RTW89_MEXICO][5] = 84, ++ [2][0][RTW89_CN][5] = 56, ++ [2][0][RTW89_QATAR][5] = 56, ++ [2][0][RTW89_UK][5] = 56, ++ [2][0][RTW89_FCC][6] = 70, ++ [2][0][RTW89_ETSI][6] = 56, ++ [2][0][RTW89_MKK][6] = 64, ++ [2][0][RTW89_IC][6] = 70, ++ [2][0][RTW89_KCC][6] = 66, ++ [2][0][RTW89_ACMA][6] = 56, ++ [2][0][RTW89_CHILE][6] = 68, ++ [2][0][RTW89_UKRAINE][6] = 56, ++ [2][0][RTW89_MEXICO][6] = 70, ++ [2][0][RTW89_CN][6] = 56, ++ [2][0][RTW89_QATAR][6] = 56, ++ [2][0][RTW89_UK][6] = 56, ++ [2][0][RTW89_FCC][7] = 70, ++ [2][0][RTW89_ETSI][7] = 56, ++ [2][0][RTW89_MKK][7] = 64, ++ [2][0][RTW89_IC][7] = 70, ++ [2][0][RTW89_KCC][7] = 66, ++ [2][0][RTW89_ACMA][7] = 56, ++ [2][0][RTW89_CHILE][7] = 68, ++ [2][0][RTW89_UKRAINE][7] = 56, ++ [2][0][RTW89_MEXICO][7] = 70, ++ [2][0][RTW89_CN][7] = 56, ++ [2][0][RTW89_QATAR][7] = 56, ++ [2][0][RTW89_UK][7] = 56, ++ [2][0][RTW89_FCC][8] = 70, ++ [2][0][RTW89_ETSI][8] = 56, ++ [2][0][RTW89_MKK][8] = 64, ++ [2][0][RTW89_IC][8] = 70, ++ [2][0][RTW89_KCC][8] = 66, ++ [2][0][RTW89_ACMA][8] = 56, ++ [2][0][RTW89_CHILE][8] = 68, ++ [2][0][RTW89_UKRAINE][8] = 56, ++ [2][0][RTW89_MEXICO][8] = 70, ++ [2][0][RTW89_CN][8] = 56, ++ [2][0][RTW89_QATAR][8] = 56, ++ [2][0][RTW89_UK][8] = 56, ++ [2][0][RTW89_FCC][9] = 68, ++ [2][0][RTW89_ETSI][9] = 56, ++ [2][0][RTW89_MKK][9] = 64, ++ [2][0][RTW89_IC][9] = 68, ++ [2][0][RTW89_KCC][9] = 66, ++ [2][0][RTW89_ACMA][9] = 56, ++ [2][0][RTW89_CHILE][9] = 68, ++ [2][0][RTW89_UKRAINE][9] = 56, ++ [2][0][RTW89_MEXICO][9] = 68, ++ [2][0][RTW89_CN][9] = 56, ++ [2][0][RTW89_QATAR][9] = 56, ++ [2][0][RTW89_UK][9] = 56, ++ [2][0][RTW89_FCC][10] = 68, ++ [2][0][RTW89_ETSI][10] = 56, ++ [2][0][RTW89_MKK][10] = 64, ++ [2][0][RTW89_IC][10] = 68, ++ [2][0][RTW89_KCC][10] = 66, ++ [2][0][RTW89_ACMA][10] = 56, ++ [2][0][RTW89_CHILE][10] = 68, ++ [2][0][RTW89_UKRAINE][10] = 56, ++ [2][0][RTW89_MEXICO][10] = 68, ++ [2][0][RTW89_CN][10] = 56, ++ [2][0][RTW89_QATAR][10] = 56, ++ [2][0][RTW89_UK][10] = 56, ++ [2][0][RTW89_FCC][11] = 50, ++ [2][0][RTW89_ETSI][11] = 56, ++ [2][0][RTW89_MKK][11] = 64, ++ [2][0][RTW89_IC][11] = 50, ++ [2][0][RTW89_KCC][11] = 66, ++ [2][0][RTW89_ACMA][11] = 56, ++ [2][0][RTW89_CHILE][11] = 68, ++ [2][0][RTW89_UKRAINE][11] = 56, ++ [2][0][RTW89_MEXICO][11] = 50, ++ [2][0][RTW89_CN][11] = 56, ++ [2][0][RTW89_QATAR][11] = 56, ++ [2][0][RTW89_UK][11] = 56, ++ [2][0][RTW89_FCC][12] = 46, ++ [2][0][RTW89_ETSI][12] = 56, ++ [2][0][RTW89_MKK][12] = 64, ++ [2][0][RTW89_IC][12] = 46, ++ [2][0][RTW89_KCC][12] = 66, ++ [2][0][RTW89_ACMA][12] = 56, ++ [2][0][RTW89_CHILE][12] = 68, ++ [2][0][RTW89_UKRAINE][12] = 56, ++ [2][0][RTW89_MEXICO][12] = 46, ++ [2][0][RTW89_CN][12] = 56, ++ [2][0][RTW89_QATAR][12] = 56, ++ [2][0][RTW89_UK][12] = 56, ++ [2][0][RTW89_FCC][13] = 127, ++ [2][0][RTW89_ETSI][13] = 127, ++ [2][0][RTW89_MKK][13] = 127, ++ [2][0][RTW89_IC][13] = 127, ++ [2][0][RTW89_KCC][13] = 127, ++ [2][0][RTW89_ACMA][13] = 127, ++ [2][0][RTW89_CHILE][13] = 127, ++ [2][0][RTW89_UKRAINE][13] = 127, ++ [2][0][RTW89_MEXICO][13] = 127, ++ [2][0][RTW89_CN][13] = 127, ++ [2][0][RTW89_QATAR][13] = 127, ++ [2][0][RTW89_UK][13] = 127, ++ [2][1][RTW89_FCC][0] = 54, ++ [2][1][RTW89_ETSI][0] = 44, ++ [2][1][RTW89_MKK][0] = 52, ++ [2][1][RTW89_IC][0] = 54, ++ [2][1][RTW89_KCC][0] = 54, ++ [2][1][RTW89_ACMA][0] = 44, ++ [2][1][RTW89_CHILE][0] = 58, ++ [2][1][RTW89_UKRAINE][0] = 44, ++ [2][1][RTW89_MEXICO][0] = 54, ++ [2][1][RTW89_CN][0] = 44, ++ [2][1][RTW89_QATAR][0] = 44, ++ [2][1][RTW89_UK][0] = 44, ++ [2][1][RTW89_FCC][1] = 54, ++ [2][1][RTW89_ETSI][1] = 44, ++ [2][1][RTW89_MKK][1] = 52, ++ [2][1][RTW89_IC][1] = 54, ++ [2][1][RTW89_KCC][1] = 54, ++ [2][1][RTW89_ACMA][1] = 44, ++ [2][1][RTW89_CHILE][1] = 56, ++ [2][1][RTW89_UKRAINE][1] = 44, ++ [2][1][RTW89_MEXICO][1] = 54, ++ [2][1][RTW89_CN][1] = 44, ++ [2][1][RTW89_QATAR][1] = 44, ++ [2][1][RTW89_UK][1] = 44, ++ [2][1][RTW89_FCC][2] = 58, ++ [2][1][RTW89_ETSI][2] = 44, ++ [2][1][RTW89_MKK][2] = 52, ++ [2][1][RTW89_IC][2] = 58, ++ [2][1][RTW89_KCC][2] = 54, ++ [2][1][RTW89_ACMA][2] = 44, ++ [2][1][RTW89_CHILE][2] = 56, ++ [2][1][RTW89_UKRAINE][2] = 44, ++ [2][1][RTW89_MEXICO][2] = 58, ++ [2][1][RTW89_CN][2] = 44, ++ [2][1][RTW89_QATAR][2] = 44, ++ [2][1][RTW89_UK][2] = 44, ++ [2][1][RTW89_FCC][3] = 62, ++ [2][1][RTW89_ETSI][3] = 44, ++ [2][1][RTW89_MKK][3] = 52, ++ [2][1][RTW89_IC][3] = 62, ++ [2][1][RTW89_KCC][3] = 54, ++ [2][1][RTW89_ACMA][3] = 44, ++ [2][1][RTW89_CHILE][3] = 56, ++ [2][1][RTW89_UKRAINE][3] = 44, ++ [2][1][RTW89_MEXICO][3] = 62, ++ [2][1][RTW89_CN][3] = 44, ++ [2][1][RTW89_QATAR][3] = 44, ++ [2][1][RTW89_UK][3] = 44, ++ [2][1][RTW89_FCC][4] = 64, ++ [2][1][RTW89_ETSI][4] = 44, ++ [2][1][RTW89_MKK][4] = 52, ++ [2][1][RTW89_IC][4] = 64, ++ [2][1][RTW89_KCC][4] = 52, ++ [2][1][RTW89_ACMA][4] = 44, ++ [2][1][RTW89_CHILE][4] = 56, ++ [2][1][RTW89_UKRAINE][4] = 44, ++ [2][1][RTW89_MEXICO][4] = 64, ++ [2][1][RTW89_CN][4] = 44, ++ [2][1][RTW89_QATAR][4] = 44, ++ [2][1][RTW89_UK][4] = 44, ++ [2][1][RTW89_FCC][5] = 80, ++ [2][1][RTW89_ETSI][5] = 44, ++ [2][1][RTW89_MKK][5] = 52, ++ [2][1][RTW89_IC][5] = 80, ++ [2][1][RTW89_KCC][5] = 52, ++ [2][1][RTW89_ACMA][5] = 44, ++ [2][1][RTW89_CHILE][5] = 56, ++ [2][1][RTW89_UKRAINE][5] = 44, ++ [2][1][RTW89_MEXICO][5] = 80, ++ [2][1][RTW89_CN][5] = 44, ++ [2][1][RTW89_QATAR][5] = 44, ++ [2][1][RTW89_UK][5] = 44, ++ [2][1][RTW89_FCC][6] = 62, ++ [2][1][RTW89_ETSI][6] = 44, ++ [2][1][RTW89_MKK][6] = 52, ++ [2][1][RTW89_IC][6] = 62, ++ [2][1][RTW89_KCC][6] = 52, ++ [2][1][RTW89_ACMA][6] = 44, ++ [2][1][RTW89_CHILE][6] = 56, ++ [2][1][RTW89_UKRAINE][6] = 44, ++ [2][1][RTW89_MEXICO][6] = 62, ++ [2][1][RTW89_CN][6] = 44, ++ [2][1][RTW89_QATAR][6] = 44, ++ [2][1][RTW89_UK][6] = 44, ++ [2][1][RTW89_FCC][7] = 62, ++ [2][1][RTW89_ETSI][7] = 44, ++ [2][1][RTW89_MKK][7] = 52, ++ [2][1][RTW89_IC][7] = 62, ++ [2][1][RTW89_KCC][7] = 52, ++ [2][1][RTW89_ACMA][7] = 44, ++ [2][1][RTW89_CHILE][7] = 56, ++ [2][1][RTW89_UKRAINE][7] = 44, ++ [2][1][RTW89_MEXICO][7] = 62, ++ [2][1][RTW89_CN][7] = 44, ++ [2][1][RTW89_QATAR][7] = 44, ++ [2][1][RTW89_UK][7] = 44, ++ [2][1][RTW89_FCC][8] = 58, ++ [2][1][RTW89_ETSI][8] = 44, ++ [2][1][RTW89_MKK][8] = 52, ++ [2][1][RTW89_IC][8] = 58, ++ [2][1][RTW89_KCC][8] = 52, ++ [2][1][RTW89_ACMA][8] = 44, ++ [2][1][RTW89_CHILE][8] = 56, ++ [2][1][RTW89_UKRAINE][8] = 44, ++ [2][1][RTW89_MEXICO][8] = 58, ++ [2][1][RTW89_CN][8] = 44, ++ [2][1][RTW89_QATAR][8] = 44, ++ [2][1][RTW89_UK][8] = 44, ++ [2][1][RTW89_FCC][9] = 54, ++ [2][1][RTW89_ETSI][9] = 44, ++ [2][1][RTW89_MKK][9] = 52, ++ [2][1][RTW89_IC][9] = 54, ++ [2][1][RTW89_KCC][9] = 54, ++ [2][1][RTW89_ACMA][9] = 44, ++ [2][1][RTW89_CHILE][9] = 56, ++ [2][1][RTW89_UKRAINE][9] = 44, ++ [2][1][RTW89_MEXICO][9] = 54, ++ [2][1][RTW89_CN][9] = 44, ++ [2][1][RTW89_QATAR][9] = 44, ++ [2][1][RTW89_UK][9] = 44, ++ [2][1][RTW89_FCC][10] = 54, ++ [2][1][RTW89_ETSI][10] = 44, ++ [2][1][RTW89_MKK][10] = 52, ++ [2][1][RTW89_IC][10] = 54, ++ [2][1][RTW89_KCC][10] = 54, ++ [2][1][RTW89_ACMA][10] = 44, ++ [2][1][RTW89_CHILE][10] = 56, ++ [2][1][RTW89_UKRAINE][10] = 44, ++ [2][1][RTW89_MEXICO][10] = 54, ++ [2][1][RTW89_CN][10] = 44, ++ [2][1][RTW89_QATAR][10] = 44, ++ [2][1][RTW89_UK][10] = 44, ++ [2][1][RTW89_FCC][11] = 38, ++ [2][1][RTW89_ETSI][11] = 44, ++ [2][1][RTW89_MKK][11] = 52, ++ [2][1][RTW89_IC][11] = 38, ++ [2][1][RTW89_KCC][11] = 54, ++ [2][1][RTW89_ACMA][11] = 44, ++ [2][1][RTW89_CHILE][11] = 56, ++ [2][1][RTW89_UKRAINE][11] = 44, ++ [2][1][RTW89_MEXICO][11] = 38, ++ [2][1][RTW89_CN][11] = 44, ++ [2][1][RTW89_QATAR][11] = 44, ++ [2][1][RTW89_UK][11] = 44, ++ [2][1][RTW89_FCC][12] = 34, ++ [2][1][RTW89_ETSI][12] = 42, ++ [2][1][RTW89_MKK][12] = 52, ++ [2][1][RTW89_IC][12] = 34, ++ [2][1][RTW89_KCC][12] = 54, ++ [2][1][RTW89_ACMA][12] = 42, ++ [2][1][RTW89_CHILE][12] = 56, ++ [2][1][RTW89_UKRAINE][12] = 42, ++ [2][1][RTW89_MEXICO][12] = 34, ++ [2][1][RTW89_CN][12] = 42, ++ [2][1][RTW89_QATAR][12] = 42, ++ [2][1][RTW89_UK][12] = 42, ++ [2][1][RTW89_FCC][13] = 127, ++ [2][1][RTW89_ETSI][13] = 127, ++ [2][1][RTW89_MKK][13] = 127, ++ [2][1][RTW89_IC][13] = 127, ++ [2][1][RTW89_KCC][13] = 127, ++ [2][1][RTW89_ACMA][13] = 127, ++ [2][1][RTW89_CHILE][13] = 127, ++ [2][1][RTW89_UKRAINE][13] = 127, ++ [2][1][RTW89_MEXICO][13] = 127, ++ [2][1][RTW89_CN][13] = 127, ++ [2][1][RTW89_QATAR][13] = 127, ++ [2][1][RTW89_UK][13] = 127, ++}; ++ ++const s8 rtw89_8852b_txpwr_lmt_ru_5g[RTW89_RU_NUM][RTW89_NTX_NUM] ++ [RTW89_REGD_NUM][RTW89_5G_CH_NUM] = { ++ [0][0][RTW89_WW][0] = 24, ++ [0][0][RTW89_WW][2] = 24, ++ [0][0][RTW89_WW][4] = 24, ++ [0][0][RTW89_WW][6] = 12, ++ [0][0][RTW89_WW][8] = 24, ++ [0][0][RTW89_WW][10] = 24, ++ [0][0][RTW89_WW][12] = 24, ++ [0][0][RTW89_WW][14] = 24, ++ [0][0][RTW89_WW][15] = 24, ++ [0][0][RTW89_WW][17] = 24, ++ [0][0][RTW89_WW][19] = 24, ++ [0][0][RTW89_WW][21] = 24, ++ [0][0][RTW89_WW][23] = 24, ++ [0][0][RTW89_WW][25] = 24, ++ [0][0][RTW89_WW][27] = 24, ++ [0][0][RTW89_WW][29] = 24, ++ [0][0][RTW89_WW][31] = 24, ++ [0][0][RTW89_WW][33] = 24, ++ [0][0][RTW89_WW][35] = 24, ++ [0][0][RTW89_WW][37] = 44, ++ [0][0][RTW89_WW][38] = 26, ++ [0][0][RTW89_WW][40] = 26, ++ [0][0][RTW89_WW][42] = 26, ++ [0][0][RTW89_WW][44] = 26, ++ [0][0][RTW89_WW][46] = 26, ++ [0][0][RTW89_WW][48] = 32, ++ [0][0][RTW89_WW][50] = 32, ++ [0][0][RTW89_WW][52] = 32, ++ [0][1][RTW89_WW][0] = 0, ++ [0][1][RTW89_WW][2] = 4, ++ [0][1][RTW89_WW][4] = 0, ++ [0][1][RTW89_WW][6] = 0, ++ [0][1][RTW89_WW][8] = 12, ++ [0][1][RTW89_WW][10] = 12, ++ [0][1][RTW89_WW][12] = 12, ++ [0][1][RTW89_WW][14] = 12, ++ [0][1][RTW89_WW][15] = 12, ++ [0][1][RTW89_WW][17] = 12, ++ [0][1][RTW89_WW][19] = 12, ++ [0][1][RTW89_WW][21] = 12, ++ [0][1][RTW89_WW][23] = 12, ++ [0][1][RTW89_WW][25] = 12, ++ [0][1][RTW89_WW][27] = 12, ++ [0][1][RTW89_WW][29] = 12, ++ [0][1][RTW89_WW][31] = 12, ++ [0][1][RTW89_WW][33] = 12, ++ [0][1][RTW89_WW][35] = 12, ++ [0][1][RTW89_WW][37] = 30, ++ [0][1][RTW89_WW][38] = 14, ++ [0][1][RTW89_WW][40] = 14, ++ [0][1][RTW89_WW][42] = 14, ++ [0][1][RTW89_WW][44] = 14, ++ [0][1][RTW89_WW][46] = 14, ++ [0][1][RTW89_WW][48] = 20, ++ [0][1][RTW89_WW][50] = 20, ++ [0][1][RTW89_WW][52] = 20, ++ [1][0][RTW89_WW][0] = 34, ++ [1][0][RTW89_WW][2] = 34, ++ [1][0][RTW89_WW][4] = 34, ++ [1][0][RTW89_WW][6] = 26, ++ [1][0][RTW89_WW][8] = 34, ++ [1][0][RTW89_WW][10] = 34, ++ [1][0][RTW89_WW][12] = 34, ++ [1][0][RTW89_WW][14] = 34, ++ [1][0][RTW89_WW][15] = 34, ++ [1][0][RTW89_WW][17] = 34, ++ [1][0][RTW89_WW][19] = 34, ++ [1][0][RTW89_WW][21] = 34, ++ [1][0][RTW89_WW][23] = 34, ++ [1][0][RTW89_WW][25] = 34, ++ [1][0][RTW89_WW][27] = 34, ++ [1][0][RTW89_WW][29] = 34, ++ [1][0][RTW89_WW][31] = 34, ++ [1][0][RTW89_WW][33] = 34, ++ [1][0][RTW89_WW][35] = 34, ++ [1][0][RTW89_WW][37] = 52, ++ [1][0][RTW89_WW][38] = 28, ++ [1][0][RTW89_WW][40] = 28, ++ [1][0][RTW89_WW][42] = 28, ++ [1][0][RTW89_WW][44] = 28, ++ [1][0][RTW89_WW][46] = 28, ++ [1][0][RTW89_WW][48] = 44, ++ [1][0][RTW89_WW][50] = 44, ++ [1][0][RTW89_WW][52] = 44, ++ [1][1][RTW89_WW][0] = 10, ++ [1][1][RTW89_WW][2] = 14, ++ [1][1][RTW89_WW][4] = 10, ++ [1][1][RTW89_WW][6] = 10, ++ [1][1][RTW89_WW][8] = 20, ++ [1][1][RTW89_WW][10] = 20, ++ [1][1][RTW89_WW][12] = 22, ++ [1][1][RTW89_WW][14] = 22, ++ [1][1][RTW89_WW][15] = 22, ++ [1][1][RTW89_WW][17] = 22, ++ [1][1][RTW89_WW][19] = 22, ++ [1][1][RTW89_WW][21] = 22, ++ [1][1][RTW89_WW][23] = 22, ++ [1][1][RTW89_WW][25] = 22, ++ [1][1][RTW89_WW][27] = 22, ++ [1][1][RTW89_WW][29] = 22, ++ [1][1][RTW89_WW][31] = 22, ++ [1][1][RTW89_WW][33] = 22, ++ [1][1][RTW89_WW][35] = 22, ++ [1][1][RTW89_WW][37] = 38, ++ [1][1][RTW89_WW][38] = 16, ++ [1][1][RTW89_WW][40] = 16, ++ [1][1][RTW89_WW][42] = 16, ++ [1][1][RTW89_WW][44] = 16, ++ [1][1][RTW89_WW][46] = 16, ++ [1][1][RTW89_WW][48] = 32, ++ [1][1][RTW89_WW][50] = 32, ++ [1][1][RTW89_WW][52] = 32, ++ [2][0][RTW89_WW][0] = 44, ++ [2][0][RTW89_WW][2] = 44, ++ [2][0][RTW89_WW][4] = 44, ++ [2][0][RTW89_WW][6] = 38, ++ [2][0][RTW89_WW][8] = 48, ++ [2][0][RTW89_WW][10] = 48, ++ [2][0][RTW89_WW][12] = 46, ++ [2][0][RTW89_WW][14] = 46, ++ [2][0][RTW89_WW][15] = 48, ++ [2][0][RTW89_WW][17] = 48, ++ [2][0][RTW89_WW][19] = 48, ++ [2][0][RTW89_WW][21] = 48, ++ [2][0][RTW89_WW][23] = 48, ++ [2][0][RTW89_WW][25] = 48, ++ [2][0][RTW89_WW][27] = 48, ++ [2][0][RTW89_WW][29] = 48, ++ [2][0][RTW89_WW][31] = 48, ++ [2][0][RTW89_WW][33] = 48, ++ [2][0][RTW89_WW][35] = 48, ++ [2][0][RTW89_WW][37] = 64, ++ [2][0][RTW89_WW][38] = 28, ++ [2][0][RTW89_WW][40] = 28, ++ [2][0][RTW89_WW][42] = 28, ++ [2][0][RTW89_WW][44] = 28, ++ [2][0][RTW89_WW][46] = 28, ++ [2][0][RTW89_WW][48] = 56, ++ [2][0][RTW89_WW][50] = 56, ++ [2][0][RTW89_WW][52] = 56, ++ [2][1][RTW89_WW][0] = 20, ++ [2][1][RTW89_WW][2] = 18, ++ [2][1][RTW89_WW][4] = 22, ++ [2][1][RTW89_WW][6] = 22, ++ [2][1][RTW89_WW][8] = 34, ++ [2][1][RTW89_WW][10] = 34, ++ [2][1][RTW89_WW][12] = 36, ++ [2][1][RTW89_WW][14] = 36, ++ [2][1][RTW89_WW][15] = 36, ++ [2][1][RTW89_WW][17] = 36, ++ [2][1][RTW89_WW][19] = 36, ++ [2][1][RTW89_WW][21] = 36, ++ [2][1][RTW89_WW][23] = 36, ++ [2][1][RTW89_WW][25] = 36, ++ [2][1][RTW89_WW][27] = 36, ++ [2][1][RTW89_WW][29] = 36, ++ [2][1][RTW89_WW][31] = 36, ++ [2][1][RTW89_WW][33] = 36, ++ [2][1][RTW89_WW][35] = 36, ++ [2][1][RTW89_WW][37] = 48, ++ [2][1][RTW89_WW][38] = 16, ++ [2][1][RTW89_WW][40] = 16, ++ [2][1][RTW89_WW][42] = 16, ++ [2][1][RTW89_WW][44] = 16, ++ [2][1][RTW89_WW][46] = 16, ++ [2][1][RTW89_WW][48] = 44, ++ [2][1][RTW89_WW][50] = 44, ++ [2][1][RTW89_WW][52] = 44, ++ [0][0][RTW89_FCC][0] = 52, ++ [0][0][RTW89_ETSI][0] = 24, ++ [0][0][RTW89_MKK][0] = 26, ++ [0][0][RTW89_IC][0] = 24, ++ [0][0][RTW89_KCC][0] = 44, ++ [0][0][RTW89_ACMA][0] = 24, ++ [0][0][RTW89_CHILE][0] = 40, ++ [0][0][RTW89_UKRAINE][0] = 24, ++ [0][0][RTW89_MEXICO][0] = 52, ++ [0][0][RTW89_CN][0] = 24, ++ [0][0][RTW89_QATAR][0] = 24, ++ [0][0][RTW89_UK][0] = 24, ++ [0][0][RTW89_FCC][2] = 52, ++ [0][0][RTW89_ETSI][2] = 24, ++ [0][0][RTW89_MKK][2] = 26, ++ [0][0][RTW89_IC][2] = 24, ++ [0][0][RTW89_KCC][2] = 44, ++ [0][0][RTW89_ACMA][2] = 24, ++ [0][0][RTW89_CHILE][2] = 38, ++ [0][0][RTW89_UKRAINE][2] = 24, ++ [0][0][RTW89_MEXICO][2] = 52, ++ [0][0][RTW89_CN][2] = 24, ++ [0][0][RTW89_QATAR][2] = 24, ++ [0][0][RTW89_UK][2] = 24, ++ [0][0][RTW89_FCC][4] = 52, ++ [0][0][RTW89_ETSI][4] = 24, ++ [0][0][RTW89_MKK][4] = 26, ++ [0][0][RTW89_IC][4] = 24, ++ [0][0][RTW89_KCC][4] = 44, ++ [0][0][RTW89_ACMA][4] = 24, ++ [0][0][RTW89_CHILE][4] = 38, ++ [0][0][RTW89_UKRAINE][4] = 24, ++ [0][0][RTW89_MEXICO][4] = 52, ++ [0][0][RTW89_CN][4] = 24, ++ [0][0][RTW89_QATAR][4] = 24, ++ [0][0][RTW89_UK][4] = 24, ++ [0][0][RTW89_FCC][6] = 52, ++ [0][0][RTW89_ETSI][6] = 24, ++ [0][0][RTW89_MKK][6] = 26, ++ [0][0][RTW89_IC][6] = 24, ++ [0][0][RTW89_KCC][6] = 12, ++ [0][0][RTW89_ACMA][6] = 24, ++ [0][0][RTW89_CHILE][6] = 40, ++ [0][0][RTW89_UKRAINE][6] = 24, ++ [0][0][RTW89_MEXICO][6] = 52, ++ [0][0][RTW89_CN][6] = 24, ++ [0][0][RTW89_QATAR][6] = 24, ++ [0][0][RTW89_UK][6] = 24, ++ [0][0][RTW89_FCC][8] = 52, ++ [0][0][RTW89_ETSI][8] = 24, ++ [0][0][RTW89_MKK][8] = 26, ++ [0][0][RTW89_IC][8] = 52, ++ [0][0][RTW89_KCC][8] = 46, ++ [0][0][RTW89_ACMA][8] = 24, ++ [0][0][RTW89_CHILE][8] = 64, ++ [0][0][RTW89_UKRAINE][8] = 24, ++ [0][0][RTW89_MEXICO][8] = 52, ++ [0][0][RTW89_CN][8] = 24, ++ [0][0][RTW89_QATAR][8] = 24, ++ [0][0][RTW89_UK][8] = 24, ++ [0][0][RTW89_FCC][10] = 52, ++ [0][0][RTW89_ETSI][10] = 24, ++ [0][0][RTW89_MKK][10] = 26, ++ [0][0][RTW89_IC][10] = 52, ++ [0][0][RTW89_KCC][10] = 46, ++ [0][0][RTW89_ACMA][10] = 24, ++ [0][0][RTW89_CHILE][10] = 64, ++ [0][0][RTW89_UKRAINE][10] = 24, ++ [0][0][RTW89_MEXICO][10] = 52, ++ [0][0][RTW89_CN][10] = 24, ++ [0][0][RTW89_QATAR][10] = 24, ++ [0][0][RTW89_UK][10] = 24, ++ [0][0][RTW89_FCC][12] = 52, ++ [0][0][RTW89_ETSI][12] = 24, ++ [0][0][RTW89_MKK][12] = 24, ++ [0][0][RTW89_IC][12] = 52, ++ [0][0][RTW89_KCC][12] = 42, ++ [0][0][RTW89_ACMA][12] = 24, ++ [0][0][RTW89_CHILE][12] = 64, ++ [0][0][RTW89_UKRAINE][12] = 24, ++ [0][0][RTW89_MEXICO][12] = 52, ++ [0][0][RTW89_CN][12] = 24, ++ [0][0][RTW89_QATAR][12] = 24, ++ [0][0][RTW89_UK][12] = 24, ++ [0][0][RTW89_FCC][14] = 52, ++ [0][0][RTW89_ETSI][14] = 24, ++ [0][0][RTW89_MKK][14] = 24, ++ [0][0][RTW89_IC][14] = 52, ++ [0][0][RTW89_KCC][14] = 42, ++ [0][0][RTW89_ACMA][14] = 24, ++ [0][0][RTW89_CHILE][14] = 64, ++ [0][0][RTW89_UKRAINE][14] = 24, ++ [0][0][RTW89_MEXICO][14] = 52, ++ [0][0][RTW89_CN][14] = 24, ++ [0][0][RTW89_QATAR][14] = 24, ++ [0][0][RTW89_UK][14] = 24, ++ [0][0][RTW89_FCC][15] = 52, ++ [0][0][RTW89_ETSI][15] = 24, ++ [0][0][RTW89_MKK][15] = 46, ++ [0][0][RTW89_IC][15] = 52, ++ [0][0][RTW89_KCC][15] = 44, ++ [0][0][RTW89_ACMA][15] = 24, ++ [0][0][RTW89_CHILE][15] = 60, ++ [0][0][RTW89_UKRAINE][15] = 24, ++ [0][0][RTW89_MEXICO][15] = 52, ++ [0][0][RTW89_CN][15] = 127, ++ [0][0][RTW89_QATAR][15] = 24, ++ [0][0][RTW89_UK][15] = 24, ++ [0][0][RTW89_FCC][17] = 52, ++ [0][0][RTW89_ETSI][17] = 24, ++ [0][0][RTW89_MKK][17] = 48, ++ [0][0][RTW89_IC][17] = 52, ++ [0][0][RTW89_KCC][17] = 44, ++ [0][0][RTW89_ACMA][17] = 24, ++ [0][0][RTW89_CHILE][17] = 60, ++ [0][0][RTW89_UKRAINE][17] = 24, ++ [0][0][RTW89_MEXICO][17] = 52, ++ [0][0][RTW89_CN][17] = 127, ++ [0][0][RTW89_QATAR][17] = 24, ++ [0][0][RTW89_UK][17] = 24, ++ [0][0][RTW89_FCC][19] = 52, ++ [0][0][RTW89_ETSI][19] = 24, ++ [0][0][RTW89_MKK][19] = 48, ++ [0][0][RTW89_IC][19] = 52, ++ [0][0][RTW89_KCC][19] = 44, ++ [0][0][RTW89_ACMA][19] = 24, ++ [0][0][RTW89_CHILE][19] = 60, ++ [0][0][RTW89_UKRAINE][19] = 24, ++ [0][0][RTW89_MEXICO][19] = 52, ++ [0][0][RTW89_CN][19] = 127, ++ [0][0][RTW89_QATAR][19] = 24, ++ [0][0][RTW89_UK][19] = 24, ++ [0][0][RTW89_FCC][21] = 52, ++ [0][0][RTW89_ETSI][21] = 24, ++ [0][0][RTW89_MKK][21] = 48, ++ [0][0][RTW89_IC][21] = 52, ++ [0][0][RTW89_KCC][21] = 44, ++ [0][0][RTW89_ACMA][21] = 24, ++ [0][0][RTW89_CHILE][21] = 62, ++ [0][0][RTW89_UKRAINE][21] = 24, ++ [0][0][RTW89_MEXICO][21] = 52, ++ [0][0][RTW89_CN][21] = 127, ++ [0][0][RTW89_QATAR][21] = 24, ++ [0][0][RTW89_UK][21] = 24, ++ [0][0][RTW89_FCC][23] = 52, ++ [0][0][RTW89_ETSI][23] = 24, ++ [0][0][RTW89_MKK][23] = 48, ++ [0][0][RTW89_IC][23] = 52, ++ [0][0][RTW89_KCC][23] = 44, ++ [0][0][RTW89_ACMA][23] = 24, ++ [0][0][RTW89_CHILE][23] = 62, ++ [0][0][RTW89_UKRAINE][23] = 24, ++ [0][0][RTW89_MEXICO][23] = 52, ++ [0][0][RTW89_CN][23] = 127, ++ [0][0][RTW89_QATAR][23] = 24, ++ [0][0][RTW89_UK][23] = 24, ++ [0][0][RTW89_FCC][25] = 52, ++ [0][0][RTW89_ETSI][25] = 24, ++ [0][0][RTW89_MKK][25] = 48, ++ [0][0][RTW89_IC][25] = 127, ++ [0][0][RTW89_KCC][25] = 44, ++ [0][0][RTW89_ACMA][25] = 127, ++ [0][0][RTW89_CHILE][25] = 62, ++ [0][0][RTW89_UKRAINE][25] = 24, ++ [0][0][RTW89_MEXICO][25] = 52, ++ [0][0][RTW89_CN][25] = 127, ++ [0][0][RTW89_QATAR][25] = 24, ++ [0][0][RTW89_UK][25] = 24, ++ [0][0][RTW89_FCC][27] = 52, ++ [0][0][RTW89_ETSI][27] = 24, ++ [0][0][RTW89_MKK][27] = 48, ++ [0][0][RTW89_IC][27] = 127, ++ [0][0][RTW89_KCC][27] = 44, ++ [0][0][RTW89_ACMA][27] = 127, ++ [0][0][RTW89_CHILE][27] = 62, ++ [0][0][RTW89_UKRAINE][27] = 24, ++ [0][0][RTW89_MEXICO][27] = 52, ++ [0][0][RTW89_CN][27] = 127, ++ [0][0][RTW89_QATAR][27] = 24, ++ [0][0][RTW89_UK][27] = 24, ++ [0][0][RTW89_FCC][29] = 52, ++ [0][0][RTW89_ETSI][29] = 24, ++ [0][0][RTW89_MKK][29] = 48, ++ [0][0][RTW89_IC][29] = 127, ++ [0][0][RTW89_KCC][29] = 44, ++ [0][0][RTW89_ACMA][29] = 127, ++ [0][0][RTW89_CHILE][29] = 60, ++ [0][0][RTW89_UKRAINE][29] = 24, ++ [0][0][RTW89_MEXICO][29] = 52, ++ [0][0][RTW89_CN][29] = 127, ++ [0][0][RTW89_QATAR][29] = 24, ++ [0][0][RTW89_UK][29] = 24, ++ [0][0][RTW89_FCC][31] = 52, ++ [0][0][RTW89_ETSI][31] = 24, ++ [0][0][RTW89_MKK][31] = 48, ++ [0][0][RTW89_IC][31] = 52, ++ [0][0][RTW89_KCC][31] = 44, ++ [0][0][RTW89_ACMA][31] = 24, ++ [0][0][RTW89_CHILE][31] = 60, ++ [0][0][RTW89_UKRAINE][31] = 24, ++ [0][0][RTW89_MEXICO][31] = 52, ++ [0][0][RTW89_CN][31] = 127, ++ [0][0][RTW89_QATAR][31] = 24, ++ [0][0][RTW89_UK][31] = 24, ++ [0][0][RTW89_FCC][33] = 52, ++ [0][0][RTW89_ETSI][33] = 24, ++ [0][0][RTW89_MKK][33] = 48, ++ [0][0][RTW89_IC][33] = 52, ++ [0][0][RTW89_KCC][33] = 44, ++ [0][0][RTW89_ACMA][33] = 24, ++ [0][0][RTW89_CHILE][33] = 60, ++ [0][0][RTW89_UKRAINE][33] = 24, ++ [0][0][RTW89_MEXICO][33] = 52, ++ [0][0][RTW89_CN][33] = 127, ++ [0][0][RTW89_QATAR][33] = 24, ++ [0][0][RTW89_UK][33] = 24, ++ [0][0][RTW89_FCC][35] = 52, ++ [0][0][RTW89_ETSI][35] = 24, ++ [0][0][RTW89_MKK][35] = 48, ++ [0][0][RTW89_IC][35] = 52, ++ [0][0][RTW89_KCC][35] = 44, ++ [0][0][RTW89_ACMA][35] = 24, ++ [0][0][RTW89_CHILE][35] = 60, ++ [0][0][RTW89_UKRAINE][35] = 24, ++ [0][0][RTW89_MEXICO][35] = 52, ++ [0][0][RTW89_CN][35] = 127, ++ [0][0][RTW89_QATAR][35] = 24, ++ [0][0][RTW89_UK][35] = 24, ++ [0][0][RTW89_FCC][37] = 52, ++ [0][0][RTW89_ETSI][37] = 127, ++ [0][0][RTW89_MKK][37] = 44, ++ [0][0][RTW89_IC][37] = 52, ++ [0][0][RTW89_KCC][37] = 44, ++ [0][0][RTW89_ACMA][37] = 52, ++ [0][0][RTW89_CHILE][37] = 62, ++ [0][0][RTW89_UKRAINE][37] = 127, ++ [0][0][RTW89_MEXICO][37] = 52, ++ [0][0][RTW89_CN][37] = 127, ++ [0][0][RTW89_QATAR][37] = 127, ++ [0][0][RTW89_UK][37] = 56, ++ [0][0][RTW89_FCC][38] = 84, ++ [0][0][RTW89_ETSI][38] = 28, ++ [0][0][RTW89_MKK][38] = 127, ++ [0][0][RTW89_IC][38] = 84, ++ [0][0][RTW89_KCC][38] = 44, ++ [0][0][RTW89_ACMA][38] = 84, ++ [0][0][RTW89_CHILE][38] = 60, ++ [0][0][RTW89_UKRAINE][38] = 28, ++ [0][0][RTW89_MEXICO][38] = 84, ++ [0][0][RTW89_CN][38] = 62, ++ [0][0][RTW89_QATAR][38] = 28, ++ [0][0][RTW89_UK][38] = 26, ++ [0][0][RTW89_FCC][40] = 84, ++ [0][0][RTW89_ETSI][40] = 28, ++ [0][0][RTW89_MKK][40] = 127, ++ [0][0][RTW89_IC][40] = 84, ++ [0][0][RTW89_KCC][40] = 44, ++ [0][0][RTW89_ACMA][40] = 84, ++ [0][0][RTW89_CHILE][40] = 60, ++ [0][0][RTW89_UKRAINE][40] = 28, ++ [0][0][RTW89_MEXICO][40] = 84, ++ [0][0][RTW89_CN][40] = 62, ++ [0][0][RTW89_QATAR][40] = 28, ++ [0][0][RTW89_UK][40] = 26, ++ [0][0][RTW89_FCC][42] = 84, ++ [0][0][RTW89_ETSI][42] = 28, ++ [0][0][RTW89_MKK][42] = 127, ++ [0][0][RTW89_IC][42] = 84, ++ [0][0][RTW89_KCC][42] = 44, ++ [0][0][RTW89_ACMA][42] = 84, ++ [0][0][RTW89_CHILE][42] = 64, ++ [0][0][RTW89_UKRAINE][42] = 28, ++ [0][0][RTW89_MEXICO][42] = 84, ++ [0][0][RTW89_CN][42] = 62, ++ [0][0][RTW89_QATAR][42] = 28, ++ [0][0][RTW89_UK][42] = 26, ++ [0][0][RTW89_FCC][44] = 84, ++ [0][0][RTW89_ETSI][44] = 28, ++ [0][0][RTW89_MKK][44] = 127, ++ [0][0][RTW89_IC][44] = 84, ++ [0][0][RTW89_KCC][44] = 44, ++ [0][0][RTW89_ACMA][44] = 84, ++ [0][0][RTW89_CHILE][44] = 60, ++ [0][0][RTW89_UKRAINE][44] = 28, ++ [0][0][RTW89_MEXICO][44] = 84, ++ [0][0][RTW89_CN][44] = 62, ++ [0][0][RTW89_QATAR][44] = 28, ++ [0][0][RTW89_UK][44] = 26, ++ [0][0][RTW89_FCC][46] = 84, ++ [0][0][RTW89_ETSI][46] = 28, ++ [0][0][RTW89_MKK][46] = 127, ++ [0][0][RTW89_IC][46] = 84, ++ [0][0][RTW89_KCC][46] = 44, ++ [0][0][RTW89_ACMA][46] = 84, ++ [0][0][RTW89_CHILE][46] = 60, ++ [0][0][RTW89_UKRAINE][46] = 28, ++ [0][0][RTW89_MEXICO][46] = 84, ++ [0][0][RTW89_CN][46] = 62, ++ [0][0][RTW89_QATAR][46] = 28, ++ [0][0][RTW89_UK][46] = 26, ++ [0][0][RTW89_FCC][48] = 32, ++ [0][0][RTW89_ETSI][48] = 127, ++ [0][0][RTW89_MKK][48] = 127, ++ [0][0][RTW89_IC][48] = 127, ++ [0][0][RTW89_KCC][48] = 127, ++ [0][0][RTW89_ACMA][48] = 127, ++ [0][0][RTW89_CHILE][48] = 127, ++ [0][0][RTW89_UKRAINE][48] = 127, ++ [0][0][RTW89_MEXICO][48] = 127, ++ [0][0][RTW89_CN][48] = 127, ++ [0][0][RTW89_QATAR][48] = 127, ++ [0][0][RTW89_UK][48] = 127, ++ [0][0][RTW89_FCC][50] = 32, ++ [0][0][RTW89_ETSI][50] = 127, ++ [0][0][RTW89_MKK][50] = 127, ++ [0][0][RTW89_IC][50] = 127, ++ [0][0][RTW89_KCC][50] = 127, ++ [0][0][RTW89_ACMA][50] = 127, ++ [0][0][RTW89_CHILE][50] = 127, ++ [0][0][RTW89_UKRAINE][50] = 127, ++ [0][0][RTW89_MEXICO][50] = 127, ++ [0][0][RTW89_CN][50] = 127, ++ [0][0][RTW89_QATAR][50] = 127, ++ [0][0][RTW89_UK][50] = 127, ++ [0][0][RTW89_FCC][52] = 32, ++ [0][0][RTW89_ETSI][52] = 127, ++ [0][0][RTW89_MKK][52] = 127, ++ [0][0][RTW89_IC][52] = 127, ++ [0][0][RTW89_KCC][52] = 127, ++ [0][0][RTW89_ACMA][52] = 127, ++ [0][0][RTW89_CHILE][52] = 127, ++ [0][0][RTW89_UKRAINE][52] = 127, ++ [0][0][RTW89_MEXICO][52] = 127, ++ [0][0][RTW89_CN][52] = 127, ++ [0][0][RTW89_QATAR][52] = 127, ++ [0][0][RTW89_UK][52] = 127, ++ [0][1][RTW89_FCC][0] = 34, ++ [0][1][RTW89_ETSI][0] = 12, ++ [0][1][RTW89_MKK][0] = 12, ++ [0][1][RTW89_IC][0] = 0, ++ [0][1][RTW89_KCC][0] = 28, ++ [0][1][RTW89_ACMA][0] = 12, ++ [0][1][RTW89_CHILE][0] = 14, ++ [0][1][RTW89_UKRAINE][0] = 12, ++ [0][1][RTW89_MEXICO][0] = 34, ++ [0][1][RTW89_CN][0] = 12, ++ [0][1][RTW89_QATAR][0] = 12, ++ [0][1][RTW89_UK][0] = 12, ++ [0][1][RTW89_FCC][2] = 38, ++ [0][1][RTW89_ETSI][2] = 12, ++ [0][1][RTW89_MKK][2] = 12, ++ [0][1][RTW89_IC][2] = 4, ++ [0][1][RTW89_KCC][2] = 28, ++ [0][1][RTW89_ACMA][2] = 12, ++ [0][1][RTW89_CHILE][2] = 12, ++ [0][1][RTW89_UKRAINE][2] = 12, ++ [0][1][RTW89_MEXICO][2] = 38, ++ [0][1][RTW89_CN][2] = 12, ++ [0][1][RTW89_QATAR][2] = 12, ++ [0][1][RTW89_UK][2] = 12, ++ [0][1][RTW89_FCC][4] = 34, ++ [0][1][RTW89_ETSI][4] = 12, ++ [0][1][RTW89_MKK][4] = 14, ++ [0][1][RTW89_IC][4] = 0, ++ [0][1][RTW89_KCC][4] = 28, ++ [0][1][RTW89_ACMA][4] = 12, ++ [0][1][RTW89_CHILE][4] = 12, ++ [0][1][RTW89_UKRAINE][4] = 12, ++ [0][1][RTW89_MEXICO][4] = 34, ++ [0][1][RTW89_CN][4] = 12, ++ [0][1][RTW89_QATAR][4] = 12, ++ [0][1][RTW89_UK][4] = 12, ++ [0][1][RTW89_FCC][6] = 34, ++ [0][1][RTW89_ETSI][6] = 12, ++ [0][1][RTW89_MKK][6] = 14, ++ [0][1][RTW89_IC][6] = 0, ++ [0][1][RTW89_KCC][6] = 2, ++ [0][1][RTW89_ACMA][6] = 12, ++ [0][1][RTW89_CHILE][6] = 12, ++ [0][1][RTW89_UKRAINE][6] = 12, ++ [0][1][RTW89_MEXICO][6] = 34, ++ [0][1][RTW89_CN][6] = 12, ++ [0][1][RTW89_QATAR][6] = 12, ++ [0][1][RTW89_UK][6] = 12, ++ [0][1][RTW89_FCC][8] = 34, ++ [0][1][RTW89_ETSI][8] = 12, ++ [0][1][RTW89_MKK][8] = 14, ++ [0][1][RTW89_IC][8] = 34, ++ [0][1][RTW89_KCC][8] = 30, ++ [0][1][RTW89_ACMA][8] = 12, ++ [0][1][RTW89_CHILE][8] = 50, ++ [0][1][RTW89_UKRAINE][8] = 12, ++ [0][1][RTW89_MEXICO][8] = 34, ++ [0][1][RTW89_CN][8] = 12, ++ [0][1][RTW89_QATAR][8] = 12, ++ [0][1][RTW89_UK][8] = 12, ++ [0][1][RTW89_FCC][10] = 34, ++ [0][1][RTW89_ETSI][10] = 12, ++ [0][1][RTW89_MKK][10] = 14, ++ [0][1][RTW89_IC][10] = 34, ++ [0][1][RTW89_KCC][10] = 30, ++ [0][1][RTW89_ACMA][10] = 12, ++ [0][1][RTW89_CHILE][10] = 50, ++ [0][1][RTW89_UKRAINE][10] = 12, ++ [0][1][RTW89_MEXICO][10] = 34, ++ [0][1][RTW89_CN][10] = 12, ++ [0][1][RTW89_QATAR][10] = 12, ++ [0][1][RTW89_UK][10] = 12, ++ [0][1][RTW89_FCC][12] = 38, ++ [0][1][RTW89_ETSI][12] = 12, ++ [0][1][RTW89_MKK][12] = 12, ++ [0][1][RTW89_IC][12] = 38, ++ [0][1][RTW89_KCC][12] = 30, ++ [0][1][RTW89_ACMA][12] = 12, ++ [0][1][RTW89_CHILE][12] = 50, ++ [0][1][RTW89_UKRAINE][12] = 12, ++ [0][1][RTW89_MEXICO][12] = 38, ++ [0][1][RTW89_CN][12] = 12, ++ [0][1][RTW89_QATAR][12] = 12, ++ [0][1][RTW89_UK][12] = 12, ++ [0][1][RTW89_FCC][14] = 34, ++ [0][1][RTW89_ETSI][14] = 12, ++ [0][1][RTW89_MKK][14] = 12, ++ [0][1][RTW89_IC][14] = 34, ++ [0][1][RTW89_KCC][14] = 30, ++ [0][1][RTW89_ACMA][14] = 12, ++ [0][1][RTW89_CHILE][14] = 48, ++ [0][1][RTW89_UKRAINE][14] = 12, ++ [0][1][RTW89_MEXICO][14] = 34, ++ [0][1][RTW89_CN][14] = 12, ++ [0][1][RTW89_QATAR][14] = 12, ++ [0][1][RTW89_UK][14] = 12, ++ [0][1][RTW89_FCC][15] = 34, ++ [0][1][RTW89_ETSI][15] = 12, ++ [0][1][RTW89_MKK][15] = 32, ++ [0][1][RTW89_IC][15] = 34, ++ [0][1][RTW89_KCC][15] = 30, ++ [0][1][RTW89_ACMA][15] = 12, ++ [0][1][RTW89_CHILE][15] = 52, ++ [0][1][RTW89_UKRAINE][15] = 12, ++ [0][1][RTW89_MEXICO][15] = 34, ++ [0][1][RTW89_CN][15] = 127, ++ [0][1][RTW89_QATAR][15] = 12, ++ [0][1][RTW89_UK][15] = 12, ++ [0][1][RTW89_FCC][17] = 34, ++ [0][1][RTW89_ETSI][17] = 12, ++ [0][1][RTW89_MKK][17] = 34, ++ [0][1][RTW89_IC][17] = 34, ++ [0][1][RTW89_KCC][17] = 30, ++ [0][1][RTW89_ACMA][17] = 12, ++ [0][1][RTW89_CHILE][17] = 52, ++ [0][1][RTW89_UKRAINE][17] = 12, ++ [0][1][RTW89_MEXICO][17] = 34, ++ [0][1][RTW89_CN][17] = 127, ++ [0][1][RTW89_QATAR][17] = 12, ++ [0][1][RTW89_UK][17] = 12, ++ [0][1][RTW89_FCC][19] = 38, ++ [0][1][RTW89_ETSI][19] = 12, ++ [0][1][RTW89_MKK][19] = 34, ++ [0][1][RTW89_IC][19] = 38, ++ [0][1][RTW89_KCC][19] = 30, ++ [0][1][RTW89_ACMA][19] = 12, ++ [0][1][RTW89_CHILE][19] = 52, ++ [0][1][RTW89_UKRAINE][19] = 12, ++ [0][1][RTW89_MEXICO][19] = 38, ++ [0][1][RTW89_CN][19] = 127, ++ [0][1][RTW89_QATAR][19] = 12, ++ [0][1][RTW89_UK][19] = 12, ++ [0][1][RTW89_FCC][21] = 38, ++ [0][1][RTW89_ETSI][21] = 12, ++ [0][1][RTW89_MKK][21] = 34, ++ [0][1][RTW89_IC][21] = 38, ++ [0][1][RTW89_KCC][21] = 30, ++ [0][1][RTW89_ACMA][21] = 12, ++ [0][1][RTW89_CHILE][21] = 52, ++ [0][1][RTW89_UKRAINE][21] = 12, ++ [0][1][RTW89_MEXICO][21] = 38, ++ [0][1][RTW89_CN][21] = 127, ++ [0][1][RTW89_QATAR][21] = 12, ++ [0][1][RTW89_UK][21] = 12, ++ [0][1][RTW89_FCC][23] = 38, ++ [0][1][RTW89_ETSI][23] = 12, ++ [0][1][RTW89_MKK][23] = 34, ++ [0][1][RTW89_IC][23] = 38, ++ [0][1][RTW89_KCC][23] = 30, ++ [0][1][RTW89_ACMA][23] = 12, ++ [0][1][RTW89_CHILE][23] = 52, ++ [0][1][RTW89_UKRAINE][23] = 12, ++ [0][1][RTW89_MEXICO][23] = 38, ++ [0][1][RTW89_CN][23] = 127, ++ [0][1][RTW89_QATAR][23] = 12, ++ [0][1][RTW89_UK][23] = 12, ++ [0][1][RTW89_FCC][25] = 38, ++ [0][1][RTW89_ETSI][25] = 12, ++ [0][1][RTW89_MKK][25] = 34, ++ [0][1][RTW89_IC][25] = 127, ++ [0][1][RTW89_KCC][25] = 30, ++ [0][1][RTW89_ACMA][25] = 127, ++ [0][1][RTW89_CHILE][25] = 52, ++ [0][1][RTW89_UKRAINE][25] = 12, ++ [0][1][RTW89_MEXICO][25] = 38, ++ [0][1][RTW89_CN][25] = 127, ++ [0][1][RTW89_QATAR][25] = 12, ++ [0][1][RTW89_UK][25] = 12, ++ [0][1][RTW89_FCC][27] = 38, ++ [0][1][RTW89_ETSI][27] = 12, ++ [0][1][RTW89_MKK][27] = 34, ++ [0][1][RTW89_IC][27] = 127, ++ [0][1][RTW89_KCC][27] = 30, ++ [0][1][RTW89_ACMA][27] = 127, ++ [0][1][RTW89_CHILE][27] = 52, ++ [0][1][RTW89_UKRAINE][27] = 12, ++ [0][1][RTW89_MEXICO][27] = 38, ++ [0][1][RTW89_CN][27] = 127, ++ [0][1][RTW89_QATAR][27] = 12, ++ [0][1][RTW89_UK][27] = 12, ++ [0][1][RTW89_FCC][29] = 38, ++ [0][1][RTW89_ETSI][29] = 12, ++ [0][1][RTW89_MKK][29] = 34, ++ [0][1][RTW89_IC][29] = 127, ++ [0][1][RTW89_KCC][29] = 30, ++ [0][1][RTW89_ACMA][29] = 127, ++ [0][1][RTW89_CHILE][29] = 52, ++ [0][1][RTW89_UKRAINE][29] = 12, ++ [0][1][RTW89_MEXICO][29] = 38, ++ [0][1][RTW89_CN][29] = 127, ++ [0][1][RTW89_QATAR][29] = 12, ++ [0][1][RTW89_UK][29] = 12, ++ [0][1][RTW89_FCC][31] = 38, ++ [0][1][RTW89_ETSI][31] = 12, ++ [0][1][RTW89_MKK][31] = 34, ++ [0][1][RTW89_IC][31] = 34, ++ [0][1][RTW89_KCC][31] = 30, ++ [0][1][RTW89_ACMA][31] = 12, ++ [0][1][RTW89_CHILE][31] = 52, ++ [0][1][RTW89_UKRAINE][31] = 12, ++ [0][1][RTW89_MEXICO][31] = 38, ++ [0][1][RTW89_CN][31] = 127, ++ [0][1][RTW89_QATAR][31] = 12, ++ [0][1][RTW89_UK][31] = 12, ++ [0][1][RTW89_FCC][33] = 34, ++ [0][1][RTW89_ETSI][33] = 12, ++ [0][1][RTW89_MKK][33] = 34, ++ [0][1][RTW89_IC][33] = 34, ++ [0][1][RTW89_KCC][33] = 30, ++ [0][1][RTW89_ACMA][33] = 12, ++ [0][1][RTW89_CHILE][33] = 52, ++ [0][1][RTW89_UKRAINE][33] = 12, ++ [0][1][RTW89_MEXICO][33] = 34, ++ [0][1][RTW89_CN][33] = 127, ++ [0][1][RTW89_QATAR][33] = 12, ++ [0][1][RTW89_UK][33] = 12, ++ [0][1][RTW89_FCC][35] = 34, ++ [0][1][RTW89_ETSI][35] = 12, ++ [0][1][RTW89_MKK][35] = 34, ++ [0][1][RTW89_IC][35] = 34, ++ [0][1][RTW89_KCC][35] = 30, ++ [0][1][RTW89_ACMA][35] = 12, ++ [0][1][RTW89_CHILE][35] = 52, ++ [0][1][RTW89_UKRAINE][35] = 12, ++ [0][1][RTW89_MEXICO][35] = 34, ++ [0][1][RTW89_CN][35] = 127, ++ [0][1][RTW89_QATAR][35] = 12, ++ [0][1][RTW89_UK][35] = 12, ++ [0][1][RTW89_FCC][37] = 38, ++ [0][1][RTW89_ETSI][37] = 127, ++ [0][1][RTW89_MKK][37] = 34, ++ [0][1][RTW89_IC][37] = 38, ++ [0][1][RTW89_KCC][37] = 30, ++ [0][1][RTW89_ACMA][37] = 38, ++ [0][1][RTW89_CHILE][37] = 52, ++ [0][1][RTW89_UKRAINE][37] = 127, ++ [0][1][RTW89_MEXICO][37] = 38, ++ [0][1][RTW89_CN][37] = 127, ++ [0][1][RTW89_QATAR][37] = 127, ++ [0][1][RTW89_UK][37] = 44, ++ [0][1][RTW89_FCC][38] = 82, ++ [0][1][RTW89_ETSI][38] = 16, ++ [0][1][RTW89_MKK][38] = 127, ++ [0][1][RTW89_IC][38] = 82, ++ [0][1][RTW89_KCC][38] = 30, ++ [0][1][RTW89_ACMA][38] = 84, ++ [0][1][RTW89_CHILE][38] = 52, ++ [0][1][RTW89_UKRAINE][38] = 16, ++ [0][1][RTW89_MEXICO][38] = 82, ++ [0][1][RTW89_CN][38] = 50, ++ [0][1][RTW89_QATAR][38] = 16, ++ [0][1][RTW89_UK][38] = 14, ++ [0][1][RTW89_FCC][40] = 82, ++ [0][1][RTW89_ETSI][40] = 16, ++ [0][1][RTW89_MKK][40] = 127, ++ [0][1][RTW89_IC][40] = 82, ++ [0][1][RTW89_KCC][40] = 30, ++ [0][1][RTW89_ACMA][40] = 84, ++ [0][1][RTW89_CHILE][40] = 52, ++ [0][1][RTW89_UKRAINE][40] = 16, ++ [0][1][RTW89_MEXICO][40] = 82, ++ [0][1][RTW89_CN][40] = 50, ++ [0][1][RTW89_QATAR][40] = 16, ++ [0][1][RTW89_UK][40] = 14, ++ [0][1][RTW89_FCC][42] = 82, ++ [0][1][RTW89_ETSI][42] = 16, ++ [0][1][RTW89_MKK][42] = 127, ++ [0][1][RTW89_IC][42] = 82, ++ [0][1][RTW89_KCC][42] = 30, ++ [0][1][RTW89_ACMA][42] = 84, ++ [0][1][RTW89_CHILE][42] = 54, ++ [0][1][RTW89_UKRAINE][42] = 16, ++ [0][1][RTW89_MEXICO][42] = 82, ++ [0][1][RTW89_CN][42] = 50, ++ [0][1][RTW89_QATAR][42] = 16, ++ [0][1][RTW89_UK][42] = 14, ++ [0][1][RTW89_FCC][44] = 82, ++ [0][1][RTW89_ETSI][44] = 16, ++ [0][1][RTW89_MKK][44] = 127, ++ [0][1][RTW89_IC][44] = 82, ++ [0][1][RTW89_KCC][44] = 30, ++ [0][1][RTW89_ACMA][44] = 84, ++ [0][1][RTW89_CHILE][44] = 54, ++ [0][1][RTW89_UKRAINE][44] = 16, ++ [0][1][RTW89_MEXICO][44] = 82, ++ [0][1][RTW89_CN][44] = 50, ++ [0][1][RTW89_QATAR][44] = 16, ++ [0][1][RTW89_UK][44] = 14, ++ [0][1][RTW89_FCC][46] = 82, ++ [0][1][RTW89_ETSI][46] = 16, ++ [0][1][RTW89_MKK][46] = 127, ++ [0][1][RTW89_IC][46] = 82, ++ [0][1][RTW89_KCC][46] = 30, ++ [0][1][RTW89_ACMA][46] = 84, ++ [0][1][RTW89_CHILE][46] = 54, ++ [0][1][RTW89_UKRAINE][46] = 16, ++ [0][1][RTW89_MEXICO][46] = 82, ++ [0][1][RTW89_CN][46] = 50, ++ [0][1][RTW89_QATAR][46] = 16, ++ [0][1][RTW89_UK][46] = 14, ++ [0][1][RTW89_FCC][48] = 20, ++ [0][1][RTW89_ETSI][48] = 127, ++ [0][1][RTW89_MKK][48] = 127, ++ [0][1][RTW89_IC][48] = 127, ++ [0][1][RTW89_KCC][48] = 127, ++ [0][1][RTW89_ACMA][48] = 127, ++ [0][1][RTW89_CHILE][48] = 127, ++ [0][1][RTW89_UKRAINE][48] = 127, ++ [0][1][RTW89_MEXICO][48] = 127, ++ [0][1][RTW89_CN][48] = 127, ++ [0][1][RTW89_QATAR][48] = 127, ++ [0][1][RTW89_UK][48] = 127, ++ [0][1][RTW89_FCC][50] = 20, ++ [0][1][RTW89_ETSI][50] = 127, ++ [0][1][RTW89_MKK][50] = 127, ++ [0][1][RTW89_IC][50] = 127, ++ [0][1][RTW89_KCC][50] = 127, ++ [0][1][RTW89_ACMA][50] = 127, ++ [0][1][RTW89_CHILE][50] = 127, ++ [0][1][RTW89_UKRAINE][50] = 127, ++ [0][1][RTW89_MEXICO][50] = 127, ++ [0][1][RTW89_CN][50] = 127, ++ [0][1][RTW89_QATAR][50] = 127, ++ [0][1][RTW89_UK][50] = 127, ++ [0][1][RTW89_FCC][52] = 20, ++ [0][1][RTW89_ETSI][52] = 127, ++ [0][1][RTW89_MKK][52] = 127, ++ [0][1][RTW89_IC][52] = 127, ++ [0][1][RTW89_KCC][52] = 127, ++ [0][1][RTW89_ACMA][52] = 127, ++ [0][1][RTW89_CHILE][52] = 127, ++ [0][1][RTW89_UKRAINE][52] = 127, ++ [0][1][RTW89_MEXICO][52] = 127, ++ [0][1][RTW89_CN][52] = 127, ++ [0][1][RTW89_QATAR][52] = 127, ++ [0][1][RTW89_UK][52] = 127, ++ [1][0][RTW89_FCC][0] = 62, ++ [1][0][RTW89_ETSI][0] = 34, ++ [1][0][RTW89_MKK][0] = 36, ++ [1][0][RTW89_IC][0] = 36, ++ [1][0][RTW89_KCC][0] = 52, ++ [1][0][RTW89_ACMA][0] = 34, ++ [1][0][RTW89_CHILE][0] = 40, ++ [1][0][RTW89_UKRAINE][0] = 34, ++ [1][0][RTW89_MEXICO][0] = 62, ++ [1][0][RTW89_CN][0] = 34, ++ [1][0][RTW89_QATAR][0] = 34, ++ [1][0][RTW89_UK][0] = 34, ++ [1][0][RTW89_FCC][2] = 62, ++ [1][0][RTW89_ETSI][2] = 34, ++ [1][0][RTW89_MKK][2] = 36, ++ [1][0][RTW89_IC][2] = 36, ++ [1][0][RTW89_KCC][2] = 52, ++ [1][0][RTW89_ACMA][2] = 34, ++ [1][0][RTW89_CHILE][2] = 42, ++ [1][0][RTW89_UKRAINE][2] = 34, ++ [1][0][RTW89_MEXICO][2] = 62, ++ [1][0][RTW89_CN][2] = 34, ++ [1][0][RTW89_QATAR][2] = 34, ++ [1][0][RTW89_UK][2] = 34, ++ [1][0][RTW89_FCC][4] = 62, ++ [1][0][RTW89_ETSI][4] = 34, ++ [1][0][RTW89_MKK][4] = 34, ++ [1][0][RTW89_IC][4] = 36, ++ [1][0][RTW89_KCC][4] = 52, ++ [1][0][RTW89_ACMA][4] = 34, ++ [1][0][RTW89_CHILE][4] = 42, ++ [1][0][RTW89_UKRAINE][4] = 34, ++ [1][0][RTW89_MEXICO][4] = 62, ++ [1][0][RTW89_CN][4] = 34, ++ [1][0][RTW89_QATAR][4] = 34, ++ [1][0][RTW89_UK][4] = 34, ++ [1][0][RTW89_FCC][6] = 62, ++ [1][0][RTW89_ETSI][6] = 34, ++ [1][0][RTW89_MKK][6] = 34, ++ [1][0][RTW89_IC][6] = 36, ++ [1][0][RTW89_KCC][6] = 26, ++ [1][0][RTW89_ACMA][6] = 34, ++ [1][0][RTW89_CHILE][6] = 42, ++ [1][0][RTW89_UKRAINE][6] = 34, ++ [1][0][RTW89_MEXICO][6] = 62, ++ [1][0][RTW89_CN][6] = 34, ++ [1][0][RTW89_QATAR][6] = 34, ++ [1][0][RTW89_UK][6] = 34, ++ [1][0][RTW89_FCC][8] = 62, ++ [1][0][RTW89_ETSI][8] = 34, ++ [1][0][RTW89_MKK][8] = 36, ++ [1][0][RTW89_IC][8] = 62, ++ [1][0][RTW89_KCC][8] = 54, ++ [1][0][RTW89_ACMA][8] = 34, ++ [1][0][RTW89_CHILE][8] = 64, ++ [1][0][RTW89_UKRAINE][8] = 34, ++ [1][0][RTW89_MEXICO][8] = 62, ++ [1][0][RTW89_CN][8] = 34, ++ [1][0][RTW89_QATAR][8] = 34, ++ [1][0][RTW89_UK][8] = 34, ++ [1][0][RTW89_FCC][10] = 62, ++ [1][0][RTW89_ETSI][10] = 34, ++ [1][0][RTW89_MKK][10] = 36, ++ [1][0][RTW89_IC][10] = 62, ++ [1][0][RTW89_KCC][10] = 54, ++ [1][0][RTW89_ACMA][10] = 34, ++ [1][0][RTW89_CHILE][10] = 64, ++ [1][0][RTW89_UKRAINE][10] = 34, ++ [1][0][RTW89_MEXICO][10] = 62, ++ [1][0][RTW89_CN][10] = 34, ++ [1][0][RTW89_QATAR][10] = 34, ++ [1][0][RTW89_UK][10] = 34, ++ [1][0][RTW89_FCC][12] = 64, ++ [1][0][RTW89_ETSI][12] = 34, ++ [1][0][RTW89_MKK][12] = 36, ++ [1][0][RTW89_IC][12] = 64, ++ [1][0][RTW89_KCC][12] = 54, ++ [1][0][RTW89_ACMA][12] = 34, ++ [1][0][RTW89_CHILE][12] = 64, ++ [1][0][RTW89_UKRAINE][12] = 34, ++ [1][0][RTW89_MEXICO][12] = 64, ++ [1][0][RTW89_CN][12] = 34, ++ [1][0][RTW89_QATAR][12] = 34, ++ [1][0][RTW89_UK][12] = 34, ++ [1][0][RTW89_FCC][14] = 62, ++ [1][0][RTW89_ETSI][14] = 34, ++ [1][0][RTW89_MKK][14] = 36, ++ [1][0][RTW89_IC][14] = 62, ++ [1][0][RTW89_KCC][14] = 54, ++ [1][0][RTW89_ACMA][14] = 34, ++ [1][0][RTW89_CHILE][14] = 64, ++ [1][0][RTW89_UKRAINE][14] = 34, ++ [1][0][RTW89_MEXICO][14] = 62, ++ [1][0][RTW89_CN][14] = 34, ++ [1][0][RTW89_QATAR][14] = 34, ++ [1][0][RTW89_UK][14] = 34, ++ [1][0][RTW89_FCC][15] = 62, ++ [1][0][RTW89_ETSI][15] = 34, ++ [1][0][RTW89_MKK][15] = 54, ++ [1][0][RTW89_IC][15] = 62, ++ [1][0][RTW89_KCC][15] = 54, ++ [1][0][RTW89_ACMA][15] = 34, ++ [1][0][RTW89_CHILE][15] = 62, ++ [1][0][RTW89_UKRAINE][15] = 34, ++ [1][0][RTW89_MEXICO][15] = 62, ++ [1][0][RTW89_CN][15] = 127, ++ [1][0][RTW89_QATAR][15] = 34, ++ [1][0][RTW89_UK][15] = 34, ++ [1][0][RTW89_FCC][17] = 62, ++ [1][0][RTW89_ETSI][17] = 34, ++ [1][0][RTW89_MKK][17] = 58, ++ [1][0][RTW89_IC][17] = 62, ++ [1][0][RTW89_KCC][17] = 54, ++ [1][0][RTW89_ACMA][17] = 34, ++ [1][0][RTW89_CHILE][17] = 62, ++ [1][0][RTW89_UKRAINE][17] = 34, ++ [1][0][RTW89_MEXICO][17] = 62, ++ [1][0][RTW89_CN][17] = 127, ++ [1][0][RTW89_QATAR][17] = 34, ++ [1][0][RTW89_UK][17] = 34, ++ [1][0][RTW89_FCC][19] = 62, ++ [1][0][RTW89_ETSI][19] = 34, ++ [1][0][RTW89_MKK][19] = 58, ++ [1][0][RTW89_IC][19] = 62, ++ [1][0][RTW89_KCC][19] = 54, ++ [1][0][RTW89_ACMA][19] = 34, ++ [1][0][RTW89_CHILE][19] = 62, ++ [1][0][RTW89_UKRAINE][19] = 34, ++ [1][0][RTW89_MEXICO][19] = 62, ++ [1][0][RTW89_CN][19] = 127, ++ [1][0][RTW89_QATAR][19] = 34, ++ [1][0][RTW89_UK][19] = 34, ++ [1][0][RTW89_FCC][21] = 62, ++ [1][0][RTW89_ETSI][21] = 34, ++ [1][0][RTW89_MKK][21] = 58, ++ [1][0][RTW89_IC][21] = 62, ++ [1][0][RTW89_KCC][21] = 54, ++ [1][0][RTW89_ACMA][21] = 34, ++ [1][0][RTW89_CHILE][21] = 64, ++ [1][0][RTW89_UKRAINE][21] = 34, ++ [1][0][RTW89_MEXICO][21] = 62, ++ [1][0][RTW89_CN][21] = 127, ++ [1][0][RTW89_QATAR][21] = 34, ++ [1][0][RTW89_UK][21] = 34, ++ [1][0][RTW89_FCC][23] = 62, ++ [1][0][RTW89_ETSI][23] = 34, ++ [1][0][RTW89_MKK][23] = 58, ++ [1][0][RTW89_IC][23] = 62, ++ [1][0][RTW89_KCC][23] = 54, ++ [1][0][RTW89_ACMA][23] = 34, ++ [1][0][RTW89_CHILE][23] = 64, ++ [1][0][RTW89_UKRAINE][23] = 34, ++ [1][0][RTW89_MEXICO][23] = 62, ++ [1][0][RTW89_CN][23] = 127, ++ [1][0][RTW89_QATAR][23] = 34, ++ [1][0][RTW89_UK][23] = 34, ++ [1][0][RTW89_FCC][25] = 62, ++ [1][0][RTW89_ETSI][25] = 34, ++ [1][0][RTW89_MKK][25] = 58, ++ [1][0][RTW89_IC][25] = 127, ++ [1][0][RTW89_KCC][25] = 54, ++ [1][0][RTW89_ACMA][25] = 127, ++ [1][0][RTW89_CHILE][25] = 64, ++ [1][0][RTW89_UKRAINE][25] = 34, ++ [1][0][RTW89_MEXICO][25] = 62, ++ [1][0][RTW89_CN][25] = 127, ++ [1][0][RTW89_QATAR][25] = 34, ++ [1][0][RTW89_UK][25] = 34, ++ [1][0][RTW89_FCC][27] = 62, ++ [1][0][RTW89_ETSI][27] = 34, ++ [1][0][RTW89_MKK][27] = 58, ++ [1][0][RTW89_IC][27] = 127, ++ [1][0][RTW89_KCC][27] = 54, ++ [1][0][RTW89_ACMA][27] = 127, ++ [1][0][RTW89_CHILE][27] = 64, ++ [1][0][RTW89_UKRAINE][27] = 34, ++ [1][0][RTW89_MEXICO][27] = 62, ++ [1][0][RTW89_CN][27] = 127, ++ [1][0][RTW89_QATAR][27] = 34, ++ [1][0][RTW89_UK][27] = 34, ++ [1][0][RTW89_FCC][29] = 62, ++ [1][0][RTW89_ETSI][29] = 34, ++ [1][0][RTW89_MKK][29] = 58, ++ [1][0][RTW89_IC][29] = 127, ++ [1][0][RTW89_KCC][29] = 54, ++ [1][0][RTW89_ACMA][29] = 127, ++ [1][0][RTW89_CHILE][29] = 66, ++ [1][0][RTW89_UKRAINE][29] = 34, ++ [1][0][RTW89_MEXICO][29] = 62, ++ [1][0][RTW89_CN][29] = 127, ++ [1][0][RTW89_QATAR][29] = 34, ++ [1][0][RTW89_UK][29] = 34, ++ [1][0][RTW89_FCC][31] = 62, ++ [1][0][RTW89_ETSI][31] = 34, ++ [1][0][RTW89_MKK][31] = 58, ++ [1][0][RTW89_IC][31] = 62, ++ [1][0][RTW89_KCC][31] = 54, ++ [1][0][RTW89_ACMA][31] = 34, ++ [1][0][RTW89_CHILE][31] = 66, ++ [1][0][RTW89_UKRAINE][31] = 34, ++ [1][0][RTW89_MEXICO][31] = 62, ++ [1][0][RTW89_CN][31] = 127, ++ [1][0][RTW89_QATAR][31] = 34, ++ [1][0][RTW89_UK][31] = 34, ++ [1][0][RTW89_FCC][33] = 62, ++ [1][0][RTW89_ETSI][33] = 34, ++ [1][0][RTW89_MKK][33] = 58, ++ [1][0][RTW89_IC][33] = 62, ++ [1][0][RTW89_KCC][33] = 54, ++ [1][0][RTW89_ACMA][33] = 34, ++ [1][0][RTW89_CHILE][33] = 66, ++ [1][0][RTW89_UKRAINE][33] = 34, ++ [1][0][RTW89_MEXICO][33] = 62, ++ [1][0][RTW89_CN][33] = 127, ++ [1][0][RTW89_QATAR][33] = 34, ++ [1][0][RTW89_UK][33] = 34, ++ [1][0][RTW89_FCC][35] = 62, ++ [1][0][RTW89_ETSI][35] = 34, ++ [1][0][RTW89_MKK][35] = 58, ++ [1][0][RTW89_IC][35] = 62, ++ [1][0][RTW89_KCC][35] = 54, ++ [1][0][RTW89_ACMA][35] = 34, ++ [1][0][RTW89_CHILE][35] = 66, ++ [1][0][RTW89_UKRAINE][35] = 34, ++ [1][0][RTW89_MEXICO][35] = 62, ++ [1][0][RTW89_CN][35] = 127, ++ [1][0][RTW89_QATAR][35] = 34, ++ [1][0][RTW89_UK][35] = 34, ++ [1][0][RTW89_FCC][37] = 64, ++ [1][0][RTW89_ETSI][37] = 127, ++ [1][0][RTW89_MKK][37] = 52, ++ [1][0][RTW89_IC][37] = 64, ++ [1][0][RTW89_KCC][37] = 54, ++ [1][0][RTW89_ACMA][37] = 64, ++ [1][0][RTW89_CHILE][37] = 64, ++ [1][0][RTW89_UKRAINE][37] = 127, ++ [1][0][RTW89_MEXICO][37] = 64, ++ [1][0][RTW89_CN][37] = 127, ++ [1][0][RTW89_QATAR][37] = 127, ++ [1][0][RTW89_UK][37] = 66, ++ [1][0][RTW89_FCC][38] = 84, ++ [1][0][RTW89_ETSI][38] = 28, ++ [1][0][RTW89_MKK][38] = 127, ++ [1][0][RTW89_IC][38] = 84, ++ [1][0][RTW89_KCC][38] = 56, ++ [1][0][RTW89_ACMA][38] = 84, ++ [1][0][RTW89_CHILE][38] = 64, ++ [1][0][RTW89_UKRAINE][38] = 28, ++ [1][0][RTW89_MEXICO][38] = 84, ++ [1][0][RTW89_CN][38] = 74, ++ [1][0][RTW89_QATAR][38] = 28, ++ [1][0][RTW89_UK][38] = 38, ++ [1][0][RTW89_FCC][40] = 84, ++ [1][0][RTW89_ETSI][40] = 28, ++ [1][0][RTW89_MKK][40] = 127, ++ [1][0][RTW89_IC][40] = 84, ++ [1][0][RTW89_KCC][40] = 56, ++ [1][0][RTW89_ACMA][40] = 84, ++ [1][0][RTW89_CHILE][40] = 64, ++ [1][0][RTW89_UKRAINE][40] = 28, ++ [1][0][RTW89_MEXICO][40] = 84, ++ [1][0][RTW89_CN][40] = 74, ++ [1][0][RTW89_QATAR][40] = 28, ++ [1][0][RTW89_UK][40] = 38, ++ [1][0][RTW89_FCC][42] = 84, ++ [1][0][RTW89_ETSI][42] = 28, ++ [1][0][RTW89_MKK][42] = 127, ++ [1][0][RTW89_IC][42] = 84, ++ [1][0][RTW89_KCC][42] = 56, ++ [1][0][RTW89_ACMA][42] = 84, ++ [1][0][RTW89_CHILE][42] = 64, ++ [1][0][RTW89_UKRAINE][42] = 28, ++ [1][0][RTW89_MEXICO][42] = 84, ++ [1][0][RTW89_CN][42] = 74, ++ [1][0][RTW89_QATAR][42] = 28, ++ [1][0][RTW89_UK][42] = 38, ++ [1][0][RTW89_FCC][44] = 84, ++ [1][0][RTW89_ETSI][44] = 28, ++ [1][0][RTW89_MKK][44] = 127, ++ [1][0][RTW89_IC][44] = 84, ++ [1][0][RTW89_KCC][44] = 56, ++ [1][0][RTW89_ACMA][44] = 84, ++ [1][0][RTW89_CHILE][44] = 64, ++ [1][0][RTW89_UKRAINE][44] = 28, ++ [1][0][RTW89_MEXICO][44] = 84, ++ [1][0][RTW89_CN][44] = 74, ++ [1][0][RTW89_QATAR][44] = 28, ++ [1][0][RTW89_UK][44] = 38, ++ [1][0][RTW89_FCC][46] = 84, ++ [1][0][RTW89_ETSI][46] = 28, ++ [1][0][RTW89_MKK][46] = 127, ++ [1][0][RTW89_IC][46] = 84, ++ [1][0][RTW89_KCC][46] = 56, ++ [1][0][RTW89_ACMA][46] = 84, ++ [1][0][RTW89_CHILE][46] = 64, ++ [1][0][RTW89_UKRAINE][46] = 28, ++ [1][0][RTW89_MEXICO][46] = 84, ++ [1][0][RTW89_CN][46] = 74, ++ [1][0][RTW89_QATAR][46] = 28, ++ [1][0][RTW89_UK][46] = 38, ++ [1][0][RTW89_FCC][48] = 44, ++ [1][0][RTW89_ETSI][48] = 127, ++ [1][0][RTW89_MKK][48] = 127, ++ [1][0][RTW89_IC][48] = 127, ++ [1][0][RTW89_KCC][48] = 127, ++ [1][0][RTW89_ACMA][48] = 127, ++ [1][0][RTW89_CHILE][48] = 127, ++ [1][0][RTW89_UKRAINE][48] = 127, ++ [1][0][RTW89_MEXICO][48] = 127, ++ [1][0][RTW89_CN][48] = 127, ++ [1][0][RTW89_QATAR][48] = 127, ++ [1][0][RTW89_UK][48] = 127, ++ [1][0][RTW89_FCC][50] = 44, ++ [1][0][RTW89_ETSI][50] = 127, ++ [1][0][RTW89_MKK][50] = 127, ++ [1][0][RTW89_IC][50] = 127, ++ [1][0][RTW89_KCC][50] = 127, ++ [1][0][RTW89_ACMA][50] = 127, ++ [1][0][RTW89_CHILE][50] = 127, ++ [1][0][RTW89_UKRAINE][50] = 127, ++ [1][0][RTW89_MEXICO][50] = 127, ++ [1][0][RTW89_CN][50] = 127, ++ [1][0][RTW89_QATAR][50] = 127, ++ [1][0][RTW89_UK][50] = 127, ++ [1][0][RTW89_FCC][52] = 44, ++ [1][0][RTW89_ETSI][52] = 127, ++ [1][0][RTW89_MKK][52] = 127, ++ [1][0][RTW89_IC][52] = 127, ++ [1][0][RTW89_KCC][52] = 127, ++ [1][0][RTW89_ACMA][52] = 127, ++ [1][0][RTW89_CHILE][52] = 127, ++ [1][0][RTW89_UKRAINE][52] = 127, ++ [1][0][RTW89_MEXICO][52] = 127, ++ [1][0][RTW89_CN][52] = 127, ++ [1][0][RTW89_QATAR][52] = 127, ++ [1][0][RTW89_UK][52] = 127, ++ [1][1][RTW89_FCC][0] = 42, ++ [1][1][RTW89_ETSI][0] = 22, ++ [1][1][RTW89_MKK][0] = 22, ++ [1][1][RTW89_IC][0] = 10, ++ [1][1][RTW89_KCC][0] = 36, ++ [1][1][RTW89_ACMA][0] = 22, ++ [1][1][RTW89_CHILE][0] = 22, ++ [1][1][RTW89_UKRAINE][0] = 22, ++ [1][1][RTW89_MEXICO][0] = 42, ++ [1][1][RTW89_CN][0] = 22, ++ [1][1][RTW89_QATAR][0] = 22, ++ [1][1][RTW89_UK][0] = 22, ++ [1][1][RTW89_FCC][2] = 44, ++ [1][1][RTW89_ETSI][2] = 22, ++ [1][1][RTW89_MKK][2] = 22, ++ [1][1][RTW89_IC][2] = 14, ++ [1][1][RTW89_KCC][2] = 36, ++ [1][1][RTW89_ACMA][2] = 22, ++ [1][1][RTW89_CHILE][2] = 22, ++ [1][1][RTW89_UKRAINE][2] = 22, ++ [1][1][RTW89_MEXICO][2] = 44, ++ [1][1][RTW89_CN][2] = 22, ++ [1][1][RTW89_QATAR][2] = 22, ++ [1][1][RTW89_UK][2] = 22, ++ [1][1][RTW89_FCC][4] = 42, ++ [1][1][RTW89_ETSI][4] = 22, ++ [1][1][RTW89_MKK][4] = 20, ++ [1][1][RTW89_IC][4] = 10, ++ [1][1][RTW89_KCC][4] = 36, ++ [1][1][RTW89_ACMA][4] = 22, ++ [1][1][RTW89_CHILE][4] = 20, ++ [1][1][RTW89_UKRAINE][4] = 22, ++ [1][1][RTW89_MEXICO][4] = 42, ++ [1][1][RTW89_CN][4] = 22, ++ [1][1][RTW89_QATAR][4] = 22, ++ [1][1][RTW89_UK][4] = 22, ++ [1][1][RTW89_FCC][6] = 42, ++ [1][1][RTW89_ETSI][6] = 22, ++ [1][1][RTW89_MKK][6] = 20, ++ [1][1][RTW89_IC][6] = 10, ++ [1][1][RTW89_KCC][6] = 10, ++ [1][1][RTW89_ACMA][6] = 22, ++ [1][1][RTW89_CHILE][6] = 20, ++ [1][1][RTW89_UKRAINE][6] = 22, ++ [1][1][RTW89_MEXICO][6] = 42, ++ [1][1][RTW89_CN][6] = 22, ++ [1][1][RTW89_QATAR][6] = 22, ++ [1][1][RTW89_UK][6] = 22, ++ [1][1][RTW89_FCC][8] = 44, ++ [1][1][RTW89_ETSI][8] = 22, ++ [1][1][RTW89_MKK][8] = 20, ++ [1][1][RTW89_IC][8] = 44, ++ [1][1][RTW89_KCC][8] = 36, ++ [1][1][RTW89_ACMA][8] = 22, ++ [1][1][RTW89_CHILE][8] = 54, ++ [1][1][RTW89_UKRAINE][8] = 22, ++ [1][1][RTW89_MEXICO][8] = 44, ++ [1][1][RTW89_CN][8] = 22, ++ [1][1][RTW89_QATAR][8] = 22, ++ [1][1][RTW89_UK][8] = 22, ++ [1][1][RTW89_FCC][10] = 44, ++ [1][1][RTW89_ETSI][10] = 22, ++ [1][1][RTW89_MKK][10] = 20, ++ [1][1][RTW89_IC][10] = 44, ++ [1][1][RTW89_KCC][10] = 36, ++ [1][1][RTW89_ACMA][10] = 22, ++ [1][1][RTW89_CHILE][10] = 54, ++ [1][1][RTW89_UKRAINE][10] = 22, ++ [1][1][RTW89_MEXICO][10] = 44, ++ [1][1][RTW89_CN][10] = 22, ++ [1][1][RTW89_QATAR][10] = 22, ++ [1][1][RTW89_UK][10] = 22, ++ [1][1][RTW89_FCC][12] = 46, ++ [1][1][RTW89_ETSI][12] = 22, ++ [1][1][RTW89_MKK][12] = 22, ++ [1][1][RTW89_IC][12] = 46, ++ [1][1][RTW89_KCC][12] = 40, ++ [1][1][RTW89_ACMA][12] = 22, ++ [1][1][RTW89_CHILE][12] = 52, ++ [1][1][RTW89_UKRAINE][12] = 22, ++ [1][1][RTW89_MEXICO][12] = 46, ++ [1][1][RTW89_CN][12] = 22, ++ [1][1][RTW89_QATAR][12] = 22, ++ [1][1][RTW89_UK][12] = 22, ++ [1][1][RTW89_FCC][14] = 42, ++ [1][1][RTW89_ETSI][14] = 22, ++ [1][1][RTW89_MKK][14] = 22, ++ [1][1][RTW89_IC][14] = 40, ++ [1][1][RTW89_KCC][14] = 40, ++ [1][1][RTW89_ACMA][14] = 22, ++ [1][1][RTW89_CHILE][14] = 54, ++ [1][1][RTW89_UKRAINE][14] = 22, ++ [1][1][RTW89_MEXICO][14] = 42, ++ [1][1][RTW89_CN][14] = 22, ++ [1][1][RTW89_QATAR][14] = 22, ++ [1][1][RTW89_UK][14] = 22, ++ [1][1][RTW89_FCC][15] = 42, ++ [1][1][RTW89_ETSI][15] = 22, ++ [1][1][RTW89_MKK][15] = 42, ++ [1][1][RTW89_IC][15] = 42, ++ [1][1][RTW89_KCC][15] = 38, ++ [1][1][RTW89_ACMA][15] = 22, ++ [1][1][RTW89_CHILE][15] = 54, ++ [1][1][RTW89_UKRAINE][15] = 22, ++ [1][1][RTW89_MEXICO][15] = 42, ++ [1][1][RTW89_CN][15] = 127, ++ [1][1][RTW89_QATAR][15] = 22, ++ [1][1][RTW89_UK][15] = 22, ++ [1][1][RTW89_FCC][17] = 42, ++ [1][1][RTW89_ETSI][17] = 22, ++ [1][1][RTW89_MKK][17] = 44, ++ [1][1][RTW89_IC][17] = 42, ++ [1][1][RTW89_KCC][17] = 38, ++ [1][1][RTW89_ACMA][17] = 22, ++ [1][1][RTW89_CHILE][17] = 54, ++ [1][1][RTW89_UKRAINE][17] = 22, ++ [1][1][RTW89_MEXICO][17] = 42, ++ [1][1][RTW89_CN][17] = 127, ++ [1][1][RTW89_QATAR][17] = 22, ++ [1][1][RTW89_UK][17] = 22, ++ [1][1][RTW89_FCC][19] = 42, ++ [1][1][RTW89_ETSI][19] = 22, ++ [1][1][RTW89_MKK][19] = 44, ++ [1][1][RTW89_IC][19] = 42, ++ [1][1][RTW89_KCC][19] = 38, ++ [1][1][RTW89_ACMA][19] = 22, ++ [1][1][RTW89_CHILE][19] = 54, ++ [1][1][RTW89_UKRAINE][19] = 22, ++ [1][1][RTW89_MEXICO][19] = 42, ++ [1][1][RTW89_CN][19] = 127, ++ [1][1][RTW89_QATAR][19] = 22, ++ [1][1][RTW89_UK][19] = 22, ++ [1][1][RTW89_FCC][21] = 42, ++ [1][1][RTW89_ETSI][21] = 22, ++ [1][1][RTW89_MKK][21] = 44, ++ [1][1][RTW89_IC][21] = 42, ++ [1][1][RTW89_KCC][21] = 38, ++ [1][1][RTW89_ACMA][21] = 22, ++ [1][1][RTW89_CHILE][21] = 54, ++ [1][1][RTW89_UKRAINE][21] = 22, ++ [1][1][RTW89_MEXICO][21] = 42, ++ [1][1][RTW89_CN][21] = 127, ++ [1][1][RTW89_QATAR][21] = 22, ++ [1][1][RTW89_UK][21] = 22, ++ [1][1][RTW89_FCC][23] = 42, ++ [1][1][RTW89_ETSI][23] = 22, ++ [1][1][RTW89_MKK][23] = 44, ++ [1][1][RTW89_IC][23] = 42, ++ [1][1][RTW89_KCC][23] = 38, ++ [1][1][RTW89_ACMA][23] = 22, ++ [1][1][RTW89_CHILE][23] = 54, ++ [1][1][RTW89_UKRAINE][23] = 22, ++ [1][1][RTW89_MEXICO][23] = 42, ++ [1][1][RTW89_CN][23] = 127, ++ [1][1][RTW89_QATAR][23] = 22, ++ [1][1][RTW89_UK][23] = 22, ++ [1][1][RTW89_FCC][25] = 42, ++ [1][1][RTW89_ETSI][25] = 22, ++ [1][1][RTW89_MKK][25] = 44, ++ [1][1][RTW89_IC][25] = 127, ++ [1][1][RTW89_KCC][25] = 38, ++ [1][1][RTW89_ACMA][25] = 127, ++ [1][1][RTW89_CHILE][25] = 54, ++ [1][1][RTW89_UKRAINE][25] = 22, ++ [1][1][RTW89_MEXICO][25] = 42, ++ [1][1][RTW89_CN][25] = 127, ++ [1][1][RTW89_QATAR][25] = 22, ++ [1][1][RTW89_UK][25] = 22, ++ [1][1][RTW89_FCC][27] = 42, ++ [1][1][RTW89_ETSI][27] = 22, ++ [1][1][RTW89_MKK][27] = 44, ++ [1][1][RTW89_IC][27] = 127, ++ [1][1][RTW89_KCC][27] = 38, ++ [1][1][RTW89_ACMA][27] = 127, ++ [1][1][RTW89_CHILE][27] = 54, ++ [1][1][RTW89_UKRAINE][27] = 22, ++ [1][1][RTW89_MEXICO][27] = 42, ++ [1][1][RTW89_CN][27] = 127, ++ [1][1][RTW89_QATAR][27] = 22, ++ [1][1][RTW89_UK][27] = 22, ++ [1][1][RTW89_FCC][29] = 42, ++ [1][1][RTW89_ETSI][29] = 22, ++ [1][1][RTW89_MKK][29] = 44, ++ [1][1][RTW89_IC][29] = 127, ++ [1][1][RTW89_KCC][29] = 38, ++ [1][1][RTW89_ACMA][29] = 127, ++ [1][1][RTW89_CHILE][29] = 54, ++ [1][1][RTW89_UKRAINE][29] = 22, ++ [1][1][RTW89_MEXICO][29] = 42, ++ [1][1][RTW89_CN][29] = 127, ++ [1][1][RTW89_QATAR][29] = 22, ++ [1][1][RTW89_UK][29] = 22, ++ [1][1][RTW89_FCC][31] = 42, ++ [1][1][RTW89_ETSI][31] = 22, ++ [1][1][RTW89_MKK][31] = 44, ++ [1][1][RTW89_IC][31] = 38, ++ [1][1][RTW89_KCC][31] = 38, ++ [1][1][RTW89_ACMA][31] = 22, ++ [1][1][RTW89_CHILE][31] = 54, ++ [1][1][RTW89_UKRAINE][31] = 22, ++ [1][1][RTW89_MEXICO][31] = 42, ++ [1][1][RTW89_CN][31] = 127, ++ [1][1][RTW89_QATAR][31] = 22, ++ [1][1][RTW89_UK][31] = 22, ++ [1][1][RTW89_FCC][33] = 40, ++ [1][1][RTW89_ETSI][33] = 22, ++ [1][1][RTW89_MKK][33] = 44, ++ [1][1][RTW89_IC][33] = 38, ++ [1][1][RTW89_KCC][33] = 38, ++ [1][1][RTW89_ACMA][33] = 22, ++ [1][1][RTW89_CHILE][33] = 54, ++ [1][1][RTW89_UKRAINE][33] = 22, ++ [1][1][RTW89_MEXICO][33] = 40, ++ [1][1][RTW89_CN][33] = 127, ++ [1][1][RTW89_QATAR][33] = 22, ++ [1][1][RTW89_UK][33] = 22, ++ [1][1][RTW89_FCC][35] = 40, ++ [1][1][RTW89_ETSI][35] = 22, ++ [1][1][RTW89_MKK][35] = 44, ++ [1][1][RTW89_IC][35] = 38, ++ [1][1][RTW89_KCC][35] = 38, ++ [1][1][RTW89_ACMA][35] = 22, ++ [1][1][RTW89_CHILE][35] = 54, ++ [1][1][RTW89_UKRAINE][35] = 22, ++ [1][1][RTW89_MEXICO][35] = 40, ++ [1][1][RTW89_CN][35] = 127, ++ [1][1][RTW89_QATAR][35] = 22, ++ [1][1][RTW89_UK][35] = 22, ++ [1][1][RTW89_FCC][37] = 48, ++ [1][1][RTW89_ETSI][37] = 127, ++ [1][1][RTW89_MKK][37] = 42, ++ [1][1][RTW89_IC][37] = 48, ++ [1][1][RTW89_KCC][37] = 38, ++ [1][1][RTW89_ACMA][37] = 48, ++ [1][1][RTW89_CHILE][37] = 54, ++ [1][1][RTW89_UKRAINE][37] = 127, ++ [1][1][RTW89_MEXICO][37] = 48, ++ [1][1][RTW89_CN][37] = 127, ++ [1][1][RTW89_QATAR][37] = 127, ++ [1][1][RTW89_UK][37] = 54, ++ [1][1][RTW89_FCC][38] = 84, ++ [1][1][RTW89_ETSI][38] = 16, ++ [1][1][RTW89_MKK][38] = 127, ++ [1][1][RTW89_IC][38] = 84, ++ [1][1][RTW89_KCC][38] = 38, ++ [1][1][RTW89_ACMA][38] = 82, ++ [1][1][RTW89_CHILE][38] = 54, ++ [1][1][RTW89_UKRAINE][38] = 16, ++ [1][1][RTW89_MEXICO][38] = 84, ++ [1][1][RTW89_CN][38] = 62, ++ [1][1][RTW89_QATAR][38] = 16, ++ [1][1][RTW89_UK][38] = 26, ++ [1][1][RTW89_FCC][40] = 84, ++ [1][1][RTW89_ETSI][40] = 16, ++ [1][1][RTW89_MKK][40] = 127, ++ [1][1][RTW89_IC][40] = 84, ++ [1][1][RTW89_KCC][40] = 38, ++ [1][1][RTW89_ACMA][40] = 82, ++ [1][1][RTW89_CHILE][40] = 54, ++ [1][1][RTW89_UKRAINE][40] = 16, ++ [1][1][RTW89_MEXICO][40] = 84, ++ [1][1][RTW89_CN][40] = 62, ++ [1][1][RTW89_QATAR][40] = 16, ++ [1][1][RTW89_UK][40] = 26, ++ [1][1][RTW89_FCC][42] = 84, ++ [1][1][RTW89_ETSI][42] = 16, ++ [1][1][RTW89_MKK][42] = 127, ++ [1][1][RTW89_IC][42] = 84, ++ [1][1][RTW89_KCC][42] = 38, ++ [1][1][RTW89_ACMA][42] = 84, ++ [1][1][RTW89_CHILE][42] = 54, ++ [1][1][RTW89_UKRAINE][42] = 16, ++ [1][1][RTW89_MEXICO][42] = 84, ++ [1][1][RTW89_CN][42] = 62, ++ [1][1][RTW89_QATAR][42] = 16, ++ [1][1][RTW89_UK][42] = 26, ++ [1][1][RTW89_FCC][44] = 84, ++ [1][1][RTW89_ETSI][44] = 16, ++ [1][1][RTW89_MKK][44] = 127, ++ [1][1][RTW89_IC][44] = 84, ++ [1][1][RTW89_KCC][44] = 38, ++ [1][1][RTW89_ACMA][44] = 84, ++ [1][1][RTW89_CHILE][44] = 56, ++ [1][1][RTW89_UKRAINE][44] = 16, ++ [1][1][RTW89_MEXICO][44] = 84, ++ [1][1][RTW89_CN][44] = 62, ++ [1][1][RTW89_QATAR][44] = 16, ++ [1][1][RTW89_UK][44] = 26, ++ [1][1][RTW89_FCC][46] = 84, ++ [1][1][RTW89_ETSI][46] = 16, ++ [1][1][RTW89_MKK][46] = 127, ++ [1][1][RTW89_IC][46] = 84, ++ [1][1][RTW89_KCC][46] = 38, ++ [1][1][RTW89_ACMA][46] = 84, ++ [1][1][RTW89_CHILE][46] = 56, ++ [1][1][RTW89_UKRAINE][46] = 16, ++ [1][1][RTW89_MEXICO][46] = 84, ++ [1][1][RTW89_CN][46] = 62, ++ [1][1][RTW89_QATAR][46] = 16, ++ [1][1][RTW89_UK][46] = 26, ++ [1][1][RTW89_FCC][48] = 32, ++ [1][1][RTW89_ETSI][48] = 127, ++ [1][1][RTW89_MKK][48] = 127, ++ [1][1][RTW89_IC][48] = 127, ++ [1][1][RTW89_KCC][48] = 127, ++ [1][1][RTW89_ACMA][48] = 127, ++ [1][1][RTW89_CHILE][48] = 127, ++ [1][1][RTW89_UKRAINE][48] = 127, ++ [1][1][RTW89_MEXICO][48] = 127, ++ [1][1][RTW89_CN][48] = 127, ++ [1][1][RTW89_QATAR][48] = 127, ++ [1][1][RTW89_UK][48] = 127, ++ [1][1][RTW89_FCC][50] = 32, ++ [1][1][RTW89_ETSI][50] = 127, ++ [1][1][RTW89_MKK][50] = 127, ++ [1][1][RTW89_IC][50] = 127, ++ [1][1][RTW89_KCC][50] = 127, ++ [1][1][RTW89_ACMA][50] = 127, ++ [1][1][RTW89_CHILE][50] = 127, ++ [1][1][RTW89_UKRAINE][50] = 127, ++ [1][1][RTW89_MEXICO][50] = 127, ++ [1][1][RTW89_CN][50] = 127, ++ [1][1][RTW89_QATAR][50] = 127, ++ [1][1][RTW89_UK][50] = 127, ++ [1][1][RTW89_FCC][52] = 32, ++ [1][1][RTW89_ETSI][52] = 127, ++ [1][1][RTW89_MKK][52] = 127, ++ [1][1][RTW89_IC][52] = 127, ++ [1][1][RTW89_KCC][52] = 127, ++ [1][1][RTW89_ACMA][52] = 127, ++ [1][1][RTW89_CHILE][52] = 127, ++ [1][1][RTW89_UKRAINE][52] = 127, ++ [1][1][RTW89_MEXICO][52] = 127, ++ [1][1][RTW89_CN][52] = 127, ++ [1][1][RTW89_QATAR][52] = 127, ++ [1][1][RTW89_UK][52] = 127, ++ [2][0][RTW89_FCC][0] = 70, ++ [2][0][RTW89_ETSI][0] = 48, ++ [2][0][RTW89_MKK][0] = 48, ++ [2][0][RTW89_IC][0] = 46, ++ [2][0][RTW89_KCC][0] = 66, ++ [2][0][RTW89_ACMA][0] = 48, ++ [2][0][RTW89_CHILE][0] = 44, ++ [2][0][RTW89_UKRAINE][0] = 48, ++ [2][0][RTW89_MEXICO][0] = 64, ++ [2][0][RTW89_CN][0] = 48, ++ [2][0][RTW89_QATAR][0] = 48, ++ [2][0][RTW89_UK][0] = 48, ++ [2][0][RTW89_FCC][2] = 70, ++ [2][0][RTW89_ETSI][2] = 48, ++ [2][0][RTW89_MKK][2] = 48, ++ [2][0][RTW89_IC][2] = 46, ++ [2][0][RTW89_KCC][2] = 66, ++ [2][0][RTW89_ACMA][2] = 48, ++ [2][0][RTW89_CHILE][2] = 44, ++ [2][0][RTW89_UKRAINE][2] = 48, ++ [2][0][RTW89_MEXICO][2] = 64, ++ [2][0][RTW89_CN][2] = 48, ++ [2][0][RTW89_QATAR][2] = 48, ++ [2][0][RTW89_UK][2] = 48, ++ [2][0][RTW89_FCC][4] = 70, ++ [2][0][RTW89_ETSI][4] = 48, ++ [2][0][RTW89_MKK][4] = 48, ++ [2][0][RTW89_IC][4] = 46, ++ [2][0][RTW89_KCC][4] = 66, ++ [2][0][RTW89_ACMA][4] = 48, ++ [2][0][RTW89_CHILE][4] = 44, ++ [2][0][RTW89_UKRAINE][4] = 48, ++ [2][0][RTW89_MEXICO][4] = 64, ++ [2][0][RTW89_CN][4] = 48, ++ [2][0][RTW89_QATAR][4] = 48, ++ [2][0][RTW89_UK][4] = 48, ++ [2][0][RTW89_FCC][6] = 70, ++ [2][0][RTW89_ETSI][6] = 48, ++ [2][0][RTW89_MKK][6] = 48, ++ [2][0][RTW89_IC][6] = 46, ++ [2][0][RTW89_KCC][6] = 38, ++ [2][0][RTW89_ACMA][6] = 48, ++ [2][0][RTW89_CHILE][6] = 44, ++ [2][0][RTW89_UKRAINE][6] = 48, ++ [2][0][RTW89_MEXICO][6] = 64, ++ [2][0][RTW89_CN][6] = 48, ++ [2][0][RTW89_QATAR][6] = 48, ++ [2][0][RTW89_UK][6] = 48, ++ [2][0][RTW89_FCC][8] = 70, ++ [2][0][RTW89_ETSI][8] = 48, ++ [2][0][RTW89_MKK][8] = 48, ++ [2][0][RTW89_IC][8] = 66, ++ [2][0][RTW89_KCC][8] = 64, ++ [2][0][RTW89_ACMA][8] = 48, ++ [2][0][RTW89_CHILE][8] = 66, ++ [2][0][RTW89_UKRAINE][8] = 48, ++ [2][0][RTW89_MEXICO][8] = 70, ++ [2][0][RTW89_CN][8] = 48, ++ [2][0][RTW89_QATAR][8] = 48, ++ [2][0][RTW89_UK][8] = 48, ++ [2][0][RTW89_FCC][10] = 70, ++ [2][0][RTW89_ETSI][10] = 48, ++ [2][0][RTW89_MKK][10] = 48, ++ [2][0][RTW89_IC][10] = 66, ++ [2][0][RTW89_KCC][10] = 64, ++ [2][0][RTW89_ACMA][10] = 48, ++ [2][0][RTW89_CHILE][10] = 66, ++ [2][0][RTW89_UKRAINE][10] = 48, ++ [2][0][RTW89_MEXICO][10] = 70, ++ [2][0][RTW89_CN][10] = 48, ++ [2][0][RTW89_QATAR][10] = 48, ++ [2][0][RTW89_UK][10] = 48, ++ [2][0][RTW89_FCC][12] = 70, ++ [2][0][RTW89_ETSI][12] = 48, ++ [2][0][RTW89_MKK][12] = 46, ++ [2][0][RTW89_IC][12] = 66, ++ [2][0][RTW89_KCC][12] = 64, ++ [2][0][RTW89_ACMA][12] = 48, ++ [2][0][RTW89_CHILE][12] = 66, ++ [2][0][RTW89_UKRAINE][12] = 48, ++ [2][0][RTW89_MEXICO][12] = 70, ++ [2][0][RTW89_CN][12] = 48, ++ [2][0][RTW89_QATAR][12] = 48, ++ [2][0][RTW89_UK][12] = 48, ++ [2][0][RTW89_FCC][14] = 70, ++ [2][0][RTW89_ETSI][14] = 48, ++ [2][0][RTW89_MKK][14] = 46, ++ [2][0][RTW89_IC][14] = 66, ++ [2][0][RTW89_KCC][14] = 64, ++ [2][0][RTW89_ACMA][14] = 48, ++ [2][0][RTW89_CHILE][14] = 66, ++ [2][0][RTW89_UKRAINE][14] = 48, ++ [2][0][RTW89_MEXICO][14] = 70, ++ [2][0][RTW89_CN][14] = 48, ++ [2][0][RTW89_QATAR][14] = 48, ++ [2][0][RTW89_UK][14] = 48, ++ [2][0][RTW89_FCC][15] = 70, ++ [2][0][RTW89_ETSI][15] = 48, ++ [2][0][RTW89_MKK][15] = 68, ++ [2][0][RTW89_IC][15] = 70, ++ [2][0][RTW89_KCC][15] = 64, ++ [2][0][RTW89_ACMA][15] = 48, ++ [2][0][RTW89_CHILE][15] = 62, ++ [2][0][RTW89_UKRAINE][15] = 48, ++ [2][0][RTW89_MEXICO][15] = 70, ++ [2][0][RTW89_CN][15] = 127, ++ [2][0][RTW89_QATAR][15] = 48, ++ [2][0][RTW89_UK][15] = 48, ++ [2][0][RTW89_FCC][17] = 70, ++ [2][0][RTW89_ETSI][17] = 48, ++ [2][0][RTW89_MKK][17] = 70, ++ [2][0][RTW89_IC][17] = 70, ++ [2][0][RTW89_KCC][17] = 64, ++ [2][0][RTW89_ACMA][17] = 48, ++ [2][0][RTW89_CHILE][17] = 62, ++ [2][0][RTW89_UKRAINE][17] = 48, ++ [2][0][RTW89_MEXICO][17] = 70, ++ [2][0][RTW89_CN][17] = 127, ++ [2][0][RTW89_QATAR][17] = 48, ++ [2][0][RTW89_UK][17] = 48, ++ [2][0][RTW89_FCC][19] = 70, ++ [2][0][RTW89_ETSI][19] = 48, ++ [2][0][RTW89_MKK][19] = 70, ++ [2][0][RTW89_IC][19] = 70, ++ [2][0][RTW89_KCC][19] = 64, ++ [2][0][RTW89_ACMA][19] = 48, ++ [2][0][RTW89_CHILE][19] = 62, ++ [2][0][RTW89_UKRAINE][19] = 48, ++ [2][0][RTW89_MEXICO][19] = 70, ++ [2][0][RTW89_CN][19] = 127, ++ [2][0][RTW89_QATAR][19] = 48, ++ [2][0][RTW89_UK][19] = 48, ++ [2][0][RTW89_FCC][21] = 70, ++ [2][0][RTW89_ETSI][21] = 48, ++ [2][0][RTW89_MKK][21] = 70, ++ [2][0][RTW89_IC][21] = 70, ++ [2][0][RTW89_KCC][21] = 64, ++ [2][0][RTW89_ACMA][21] = 48, ++ [2][0][RTW89_CHILE][21] = 64, ++ [2][0][RTW89_UKRAINE][21] = 48, ++ [2][0][RTW89_MEXICO][21] = 70, ++ [2][0][RTW89_CN][21] = 127, ++ [2][0][RTW89_QATAR][21] = 48, ++ [2][0][RTW89_UK][21] = 48, ++ [2][0][RTW89_FCC][23] = 70, ++ [2][0][RTW89_ETSI][23] = 48, ++ [2][0][RTW89_MKK][23] = 70, ++ [2][0][RTW89_IC][23] = 70, ++ [2][0][RTW89_KCC][23] = 64, ++ [2][0][RTW89_ACMA][23] = 48, ++ [2][0][RTW89_CHILE][23] = 64, ++ [2][0][RTW89_UKRAINE][23] = 48, ++ [2][0][RTW89_MEXICO][23] = 70, ++ [2][0][RTW89_CN][23] = 127, ++ [2][0][RTW89_QATAR][23] = 48, ++ [2][0][RTW89_UK][23] = 48, ++ [2][0][RTW89_FCC][25] = 70, ++ [2][0][RTW89_ETSI][25] = 48, ++ [2][0][RTW89_MKK][25] = 70, ++ [2][0][RTW89_IC][25] = 127, ++ [2][0][RTW89_KCC][25] = 64, ++ [2][0][RTW89_ACMA][25] = 127, ++ [2][0][RTW89_CHILE][25] = 64, ++ [2][0][RTW89_UKRAINE][25] = 48, ++ [2][0][RTW89_MEXICO][25] = 70, ++ [2][0][RTW89_CN][25] = 127, ++ [2][0][RTW89_QATAR][25] = 48, ++ [2][0][RTW89_UK][25] = 48, ++ [2][0][RTW89_FCC][27] = 70, ++ [2][0][RTW89_ETSI][27] = 48, ++ [2][0][RTW89_MKK][27] = 70, ++ [2][0][RTW89_IC][27] = 127, ++ [2][0][RTW89_KCC][27] = 64, ++ [2][0][RTW89_ACMA][27] = 127, ++ [2][0][RTW89_CHILE][27] = 64, ++ [2][0][RTW89_UKRAINE][27] = 48, ++ [2][0][RTW89_MEXICO][27] = 70, ++ [2][0][RTW89_CN][27] = 127, ++ [2][0][RTW89_QATAR][27] = 48, ++ [2][0][RTW89_UK][27] = 48, ++ [2][0][RTW89_FCC][29] = 70, ++ [2][0][RTW89_ETSI][29] = 48, ++ [2][0][RTW89_MKK][29] = 70, ++ [2][0][RTW89_IC][29] = 127, ++ [2][0][RTW89_KCC][29] = 64, ++ [2][0][RTW89_ACMA][29] = 127, ++ [2][0][RTW89_CHILE][29] = 66, ++ [2][0][RTW89_UKRAINE][29] = 48, ++ [2][0][RTW89_MEXICO][29] = 70, ++ [2][0][RTW89_CN][29] = 127, ++ [2][0][RTW89_QATAR][29] = 48, ++ [2][0][RTW89_UK][29] = 48, ++ [2][0][RTW89_FCC][31] = 70, ++ [2][0][RTW89_ETSI][31] = 48, ++ [2][0][RTW89_MKK][31] = 70, ++ [2][0][RTW89_IC][31] = 72, ++ [2][0][RTW89_KCC][31] = 64, ++ [2][0][RTW89_ACMA][31] = 48, ++ [2][0][RTW89_CHILE][31] = 66, ++ [2][0][RTW89_UKRAINE][31] = 48, ++ [2][0][RTW89_MEXICO][31] = 70, ++ [2][0][RTW89_CN][31] = 127, ++ [2][0][RTW89_QATAR][31] = 48, ++ [2][0][RTW89_UK][31] = 48, ++ [2][0][RTW89_FCC][33] = 72, ++ [2][0][RTW89_ETSI][33] = 48, ++ [2][0][RTW89_MKK][33] = 70, ++ [2][0][RTW89_IC][33] = 72, ++ [2][0][RTW89_KCC][33] = 64, ++ [2][0][RTW89_ACMA][33] = 48, ++ [2][0][RTW89_CHILE][33] = 66, ++ [2][0][RTW89_UKRAINE][33] = 48, ++ [2][0][RTW89_MEXICO][33] = 72, ++ [2][0][RTW89_CN][33] = 127, ++ [2][0][RTW89_QATAR][33] = 48, ++ [2][0][RTW89_UK][33] = 48, ++ [2][0][RTW89_FCC][35] = 72, ++ [2][0][RTW89_ETSI][35] = 48, ++ [2][0][RTW89_MKK][35] = 70, ++ [2][0][RTW89_IC][35] = 72, ++ [2][0][RTW89_KCC][35] = 64, ++ [2][0][RTW89_ACMA][35] = 48, ++ [2][0][RTW89_CHILE][35] = 66, ++ [2][0][RTW89_UKRAINE][35] = 48, ++ [2][0][RTW89_MEXICO][35] = 72, ++ [2][0][RTW89_CN][35] = 127, ++ [2][0][RTW89_QATAR][35] = 48, ++ [2][0][RTW89_UK][35] = 48, ++ [2][0][RTW89_FCC][37] = 70, ++ [2][0][RTW89_ETSI][37] = 127, ++ [2][0][RTW89_MKK][37] = 66, ++ [2][0][RTW89_IC][37] = 70, ++ [2][0][RTW89_KCC][37] = 64, ++ [2][0][RTW89_ACMA][37] = 76, ++ [2][0][RTW89_CHILE][37] = 66, ++ [2][0][RTW89_UKRAINE][37] = 127, ++ [2][0][RTW89_MEXICO][37] = 70, ++ [2][0][RTW89_CN][37] = 127, ++ [2][0][RTW89_QATAR][37] = 127, ++ [2][0][RTW89_UK][37] = 76, ++ [2][0][RTW89_FCC][38] = 84, ++ [2][0][RTW89_ETSI][38] = 28, ++ [2][0][RTW89_MKK][38] = 127, ++ [2][0][RTW89_IC][38] = 84, ++ [2][0][RTW89_KCC][38] = 66, ++ [2][0][RTW89_ACMA][38] = 84, ++ [2][0][RTW89_CHILE][38] = 64, ++ [2][0][RTW89_UKRAINE][38] = 28, ++ [2][0][RTW89_MEXICO][38] = 84, ++ [2][0][RTW89_CN][38] = 76, ++ [2][0][RTW89_QATAR][38] = 28, ++ [2][0][RTW89_UK][38] = 50, ++ [2][0][RTW89_FCC][40] = 84, ++ [2][0][RTW89_ETSI][40] = 28, ++ [2][0][RTW89_MKK][40] = 127, ++ [2][0][RTW89_IC][40] = 84, ++ [2][0][RTW89_KCC][40] = 66, ++ [2][0][RTW89_ACMA][40] = 84, ++ [2][0][RTW89_CHILE][40] = 64, ++ [2][0][RTW89_UKRAINE][40] = 28, ++ [2][0][RTW89_MEXICO][40] = 84, ++ [2][0][RTW89_CN][40] = 76, ++ [2][0][RTW89_QATAR][40] = 28, ++ [2][0][RTW89_UK][40] = 50, ++ [2][0][RTW89_FCC][42] = 84, ++ [2][0][RTW89_ETSI][42] = 28, ++ [2][0][RTW89_MKK][42] = 127, ++ [2][0][RTW89_IC][42] = 84, ++ [2][0][RTW89_KCC][42] = 66, ++ [2][0][RTW89_ACMA][42] = 84, ++ [2][0][RTW89_CHILE][42] = 66, ++ [2][0][RTW89_UKRAINE][42] = 28, ++ [2][0][RTW89_MEXICO][42] = 84, ++ [2][0][RTW89_CN][42] = 76, ++ [2][0][RTW89_QATAR][42] = 28, ++ [2][0][RTW89_UK][42] = 50, ++ [2][0][RTW89_FCC][44] = 84, ++ [2][0][RTW89_ETSI][44] = 28, ++ [2][0][RTW89_MKK][44] = 127, ++ [2][0][RTW89_IC][44] = 84, ++ [2][0][RTW89_KCC][44] = 66, ++ [2][0][RTW89_ACMA][44] = 84, ++ [2][0][RTW89_CHILE][44] = 64, ++ [2][0][RTW89_UKRAINE][44] = 28, ++ [2][0][RTW89_MEXICO][44] = 84, ++ [2][0][RTW89_CN][44] = 76, ++ [2][0][RTW89_QATAR][44] = 28, ++ [2][0][RTW89_UK][44] = 50, ++ [2][0][RTW89_FCC][46] = 84, ++ [2][0][RTW89_ETSI][46] = 28, ++ [2][0][RTW89_MKK][46] = 127, ++ [2][0][RTW89_IC][46] = 84, ++ [2][0][RTW89_KCC][46] = 66, ++ [2][0][RTW89_ACMA][46] = 84, ++ [2][0][RTW89_CHILE][46] = 64, ++ [2][0][RTW89_UKRAINE][46] = 28, ++ [2][0][RTW89_MEXICO][46] = 84, ++ [2][0][RTW89_CN][46] = 76, ++ [2][0][RTW89_QATAR][46] = 28, ++ [2][0][RTW89_UK][46] = 50, ++ [2][0][RTW89_FCC][48] = 56, ++ [2][0][RTW89_ETSI][48] = 127, ++ [2][0][RTW89_MKK][48] = 127, ++ [2][0][RTW89_IC][48] = 127, ++ [2][0][RTW89_KCC][48] = 127, ++ [2][0][RTW89_ACMA][48] = 127, ++ [2][0][RTW89_CHILE][48] = 127, ++ [2][0][RTW89_UKRAINE][48] = 127, ++ [2][0][RTW89_MEXICO][48] = 127, ++ [2][0][RTW89_CN][48] = 127, ++ [2][0][RTW89_QATAR][48] = 127, ++ [2][0][RTW89_UK][48] = 127, ++ [2][0][RTW89_FCC][50] = 56, ++ [2][0][RTW89_ETSI][50] = 127, ++ [2][0][RTW89_MKK][50] = 127, ++ [2][0][RTW89_IC][50] = 127, ++ [2][0][RTW89_KCC][50] = 127, ++ [2][0][RTW89_ACMA][50] = 127, ++ [2][0][RTW89_CHILE][50] = 127, ++ [2][0][RTW89_UKRAINE][50] = 127, ++ [2][0][RTW89_MEXICO][50] = 127, ++ [2][0][RTW89_CN][50] = 127, ++ [2][0][RTW89_QATAR][50] = 127, ++ [2][0][RTW89_UK][50] = 127, ++ [2][0][RTW89_FCC][52] = 56, ++ [2][0][RTW89_ETSI][52] = 127, ++ [2][0][RTW89_MKK][52] = 127, ++ [2][0][RTW89_IC][52] = 127, ++ [2][0][RTW89_KCC][52] = 127, ++ [2][0][RTW89_ACMA][52] = 127, ++ [2][0][RTW89_CHILE][52] = 127, ++ [2][0][RTW89_UKRAINE][52] = 127, ++ [2][0][RTW89_MEXICO][52] = 127, ++ [2][0][RTW89_CN][52] = 127, ++ [2][0][RTW89_QATAR][52] = 127, ++ [2][0][RTW89_UK][52] = 127, ++ [2][1][RTW89_FCC][0] = 50, ++ [2][1][RTW89_ETSI][0] = 36, ++ [2][1][RTW89_MKK][0] = 36, ++ [2][1][RTW89_IC][0] = 20, ++ [2][1][RTW89_KCC][0] = 46, ++ [2][1][RTW89_ACMA][0] = 36, ++ [2][1][RTW89_CHILE][0] = 32, ++ [2][1][RTW89_UKRAINE][0] = 36, ++ [2][1][RTW89_MEXICO][0] = 52, ++ [2][1][RTW89_CN][0] = 36, ++ [2][1][RTW89_QATAR][0] = 36, ++ [2][1][RTW89_UK][0] = 36, ++ [2][1][RTW89_FCC][2] = 50, ++ [2][1][RTW89_ETSI][2] = 36, ++ [2][1][RTW89_MKK][2] = 36, ++ [2][1][RTW89_IC][2] = 18, ++ [2][1][RTW89_KCC][2] = 46, ++ [2][1][RTW89_ACMA][2] = 36, ++ [2][1][RTW89_CHILE][2] = 32, ++ [2][1][RTW89_UKRAINE][2] = 36, ++ [2][1][RTW89_MEXICO][2] = 52, ++ [2][1][RTW89_CN][2] = 36, ++ [2][1][RTW89_QATAR][2] = 36, ++ [2][1][RTW89_UK][2] = 36, ++ [2][1][RTW89_FCC][4] = 50, ++ [2][1][RTW89_ETSI][4] = 36, ++ [2][1][RTW89_MKK][4] = 36, ++ [2][1][RTW89_IC][4] = 22, ++ [2][1][RTW89_KCC][4] = 46, ++ [2][1][RTW89_ACMA][4] = 36, ++ [2][1][RTW89_CHILE][4] = 30, ++ [2][1][RTW89_UKRAINE][4] = 36, ++ [2][1][RTW89_MEXICO][4] = 52, ++ [2][1][RTW89_CN][4] = 36, ++ [2][1][RTW89_QATAR][4] = 36, ++ [2][1][RTW89_UK][4] = 36, ++ [2][1][RTW89_FCC][6] = 50, ++ [2][1][RTW89_ETSI][6] = 36, ++ [2][1][RTW89_MKK][6] = 36, ++ [2][1][RTW89_IC][6] = 22, ++ [2][1][RTW89_KCC][6] = 22, ++ [2][1][RTW89_ACMA][6] = 36, ++ [2][1][RTW89_CHILE][6] = 30, ++ [2][1][RTW89_UKRAINE][6] = 36, ++ [2][1][RTW89_MEXICO][6] = 52, ++ [2][1][RTW89_CN][6] = 36, ++ [2][1][RTW89_QATAR][6] = 36, ++ [2][1][RTW89_UK][6] = 36, ++ [2][1][RTW89_FCC][8] = 50, ++ [2][1][RTW89_ETSI][8] = 36, ++ [2][1][RTW89_MKK][8] = 34, ++ [2][1][RTW89_IC][8] = 50, ++ [2][1][RTW89_KCC][8] = 48, ++ [2][1][RTW89_ACMA][8] = 36, ++ [2][1][RTW89_CHILE][8] = 54, ++ [2][1][RTW89_UKRAINE][8] = 36, ++ [2][1][RTW89_MEXICO][8] = 50, ++ [2][1][RTW89_CN][8] = 36, ++ [2][1][RTW89_QATAR][8] = 36, ++ [2][1][RTW89_UK][8] = 36, ++ [2][1][RTW89_FCC][10] = 50, ++ [2][1][RTW89_ETSI][10] = 36, ++ [2][1][RTW89_MKK][10] = 34, ++ [2][1][RTW89_IC][10] = 50, ++ [2][1][RTW89_KCC][10] = 48, ++ [2][1][RTW89_ACMA][10] = 36, ++ [2][1][RTW89_CHILE][10] = 54, ++ [2][1][RTW89_UKRAINE][10] = 36, ++ [2][1][RTW89_MEXICO][10] = 50, ++ [2][1][RTW89_CN][10] = 36, ++ [2][1][RTW89_QATAR][10] = 36, ++ [2][1][RTW89_UK][10] = 36, ++ [2][1][RTW89_FCC][12] = 52, ++ [2][1][RTW89_ETSI][12] = 36, ++ [2][1][RTW89_MKK][12] = 36, ++ [2][1][RTW89_IC][12] = 52, ++ [2][1][RTW89_KCC][12] = 48, ++ [2][1][RTW89_ACMA][12] = 36, ++ [2][1][RTW89_CHILE][12] = 54, ++ [2][1][RTW89_UKRAINE][12] = 36, ++ [2][1][RTW89_MEXICO][12] = 52, ++ [2][1][RTW89_CN][12] = 36, ++ [2][1][RTW89_QATAR][12] = 36, ++ [2][1][RTW89_UK][12] = 36, ++ [2][1][RTW89_FCC][14] = 52, ++ [2][1][RTW89_ETSI][14] = 36, ++ [2][1][RTW89_MKK][14] = 36, ++ [2][1][RTW89_IC][14] = 52, ++ [2][1][RTW89_KCC][14] = 48, ++ [2][1][RTW89_ACMA][14] = 36, ++ [2][1][RTW89_CHILE][14] = 54, ++ [2][1][RTW89_UKRAINE][14] = 36, ++ [2][1][RTW89_MEXICO][14] = 52, ++ [2][1][RTW89_CN][14] = 36, ++ [2][1][RTW89_QATAR][14] = 36, ++ [2][1][RTW89_UK][14] = 36, ++ [2][1][RTW89_FCC][15] = 50, ++ [2][1][RTW89_ETSI][15] = 36, ++ [2][1][RTW89_MKK][15] = 54, ++ [2][1][RTW89_IC][15] = 50, ++ [2][1][RTW89_KCC][15] = 48, ++ [2][1][RTW89_ACMA][15] = 36, ++ [2][1][RTW89_CHILE][15] = 56, ++ [2][1][RTW89_UKRAINE][15] = 36, ++ [2][1][RTW89_MEXICO][15] = 50, ++ [2][1][RTW89_CN][15] = 127, ++ [2][1][RTW89_QATAR][15] = 36, ++ [2][1][RTW89_UK][15] = 36, ++ [2][1][RTW89_FCC][17] = 50, ++ [2][1][RTW89_ETSI][17] = 36, ++ [2][1][RTW89_MKK][17] = 56, ++ [2][1][RTW89_IC][17] = 50, ++ [2][1][RTW89_KCC][17] = 48, ++ [2][1][RTW89_ACMA][17] = 36, ++ [2][1][RTW89_CHILE][17] = 56, ++ [2][1][RTW89_UKRAINE][17] = 36, ++ [2][1][RTW89_MEXICO][17] = 50, ++ [2][1][RTW89_CN][17] = 127, ++ [2][1][RTW89_QATAR][17] = 36, ++ [2][1][RTW89_UK][17] = 36, ++ [2][1][RTW89_FCC][19] = 50, ++ [2][1][RTW89_ETSI][19] = 36, ++ [2][1][RTW89_MKK][19] = 56, ++ [2][1][RTW89_IC][19] = 50, ++ [2][1][RTW89_KCC][19] = 48, ++ [2][1][RTW89_ACMA][19] = 36, ++ [2][1][RTW89_CHILE][19] = 56, ++ [2][1][RTW89_UKRAINE][19] = 36, ++ [2][1][RTW89_MEXICO][19] = 50, ++ [2][1][RTW89_CN][19] = 127, ++ [2][1][RTW89_QATAR][19] = 36, ++ [2][1][RTW89_UK][19] = 36, ++ [2][1][RTW89_FCC][21] = 50, ++ [2][1][RTW89_ETSI][21] = 36, ++ [2][1][RTW89_MKK][21] = 56, ++ [2][1][RTW89_IC][21] = 50, ++ [2][1][RTW89_KCC][21] = 48, ++ [2][1][RTW89_ACMA][21] = 36, ++ [2][1][RTW89_CHILE][21] = 58, ++ [2][1][RTW89_UKRAINE][21] = 36, ++ [2][1][RTW89_MEXICO][21] = 50, ++ [2][1][RTW89_CN][21] = 127, ++ [2][1][RTW89_QATAR][21] = 36, ++ [2][1][RTW89_UK][21] = 36, ++ [2][1][RTW89_FCC][23] = 50, ++ [2][1][RTW89_ETSI][23] = 36, ++ [2][1][RTW89_MKK][23] = 56, ++ [2][1][RTW89_IC][23] = 50, ++ [2][1][RTW89_KCC][23] = 48, ++ [2][1][RTW89_ACMA][23] = 36, ++ [2][1][RTW89_CHILE][23] = 58, ++ [2][1][RTW89_UKRAINE][23] = 36, ++ [2][1][RTW89_MEXICO][23] = 50, ++ [2][1][RTW89_CN][23] = 127, ++ [2][1][RTW89_QATAR][23] = 36, ++ [2][1][RTW89_UK][23] = 36, ++ [2][1][RTW89_FCC][25] = 50, ++ [2][1][RTW89_ETSI][25] = 36, ++ [2][1][RTW89_MKK][25] = 56, ++ [2][1][RTW89_IC][25] = 127, ++ [2][1][RTW89_KCC][25] = 48, ++ [2][1][RTW89_ACMA][25] = 127, ++ [2][1][RTW89_CHILE][25] = 58, ++ [2][1][RTW89_UKRAINE][25] = 36, ++ [2][1][RTW89_MEXICO][25] = 50, ++ [2][1][RTW89_CN][25] = 127, ++ [2][1][RTW89_QATAR][25] = 36, ++ [2][1][RTW89_UK][25] = 36, ++ [2][1][RTW89_FCC][27] = 50, ++ [2][1][RTW89_ETSI][27] = 36, ++ [2][1][RTW89_MKK][27] = 56, ++ [2][1][RTW89_IC][27] = 127, ++ [2][1][RTW89_KCC][27] = 48, ++ [2][1][RTW89_ACMA][27] = 127, ++ [2][1][RTW89_CHILE][27] = 58, ++ [2][1][RTW89_UKRAINE][27] = 36, ++ [2][1][RTW89_MEXICO][27] = 50, ++ [2][1][RTW89_CN][27] = 127, ++ [2][1][RTW89_QATAR][27] = 36, ++ [2][1][RTW89_UK][27] = 36, ++ [2][1][RTW89_FCC][29] = 50, ++ [2][1][RTW89_ETSI][29] = 36, ++ [2][1][RTW89_MKK][29] = 56, ++ [2][1][RTW89_IC][29] = 127, ++ [2][1][RTW89_KCC][29] = 48, ++ [2][1][RTW89_ACMA][29] = 127, ++ [2][1][RTW89_CHILE][29] = 56, ++ [2][1][RTW89_UKRAINE][29] = 36, ++ [2][1][RTW89_MEXICO][29] = 50, ++ [2][1][RTW89_CN][29] = 127, ++ [2][1][RTW89_QATAR][29] = 36, ++ [2][1][RTW89_UK][29] = 36, ++ [2][1][RTW89_FCC][31] = 50, ++ [2][1][RTW89_ETSI][31] = 36, ++ [2][1][RTW89_MKK][31] = 56, ++ [2][1][RTW89_IC][31] = 50, ++ [2][1][RTW89_KCC][31] = 48, ++ [2][1][RTW89_ACMA][31] = 36, ++ [2][1][RTW89_CHILE][31] = 56, ++ [2][1][RTW89_UKRAINE][31] = 36, ++ [2][1][RTW89_MEXICO][31] = 50, ++ [2][1][RTW89_CN][31] = 127, ++ [2][1][RTW89_QATAR][31] = 36, ++ [2][1][RTW89_UK][31] = 36, ++ [2][1][RTW89_FCC][33] = 50, ++ [2][1][RTW89_ETSI][33] = 36, ++ [2][1][RTW89_MKK][33] = 56, ++ [2][1][RTW89_IC][33] = 50, ++ [2][1][RTW89_KCC][33] = 48, ++ [2][1][RTW89_ACMA][33] = 36, ++ [2][1][RTW89_CHILE][33] = 56, ++ [2][1][RTW89_UKRAINE][33] = 36, ++ [2][1][RTW89_MEXICO][33] = 50, ++ [2][1][RTW89_CN][33] = 127, ++ [2][1][RTW89_QATAR][33] = 36, ++ [2][1][RTW89_UK][33] = 36, ++ [2][1][RTW89_FCC][35] = 50, ++ [2][1][RTW89_ETSI][35] = 36, ++ [2][1][RTW89_MKK][35] = 56, ++ [2][1][RTW89_IC][35] = 50, ++ [2][1][RTW89_KCC][35] = 48, ++ [2][1][RTW89_ACMA][35] = 36, ++ [2][1][RTW89_CHILE][35] = 56, ++ [2][1][RTW89_UKRAINE][35] = 36, ++ [2][1][RTW89_MEXICO][35] = 50, ++ [2][1][RTW89_CN][35] = 127, ++ [2][1][RTW89_QATAR][35] = 36, ++ [2][1][RTW89_UK][35] = 36, ++ [2][1][RTW89_FCC][37] = 50, ++ [2][1][RTW89_ETSI][37] = 127, ++ [2][1][RTW89_MKK][37] = 54, ++ [2][1][RTW89_IC][37] = 50, ++ [2][1][RTW89_KCC][37] = 48, ++ [2][1][RTW89_ACMA][37] = 60, ++ [2][1][RTW89_CHILE][37] = 56, ++ [2][1][RTW89_UKRAINE][37] = 127, ++ [2][1][RTW89_MEXICO][37] = 50, ++ [2][1][RTW89_CN][37] = 127, ++ [2][1][RTW89_QATAR][37] = 127, ++ [2][1][RTW89_UK][37] = 66, ++ [2][1][RTW89_FCC][38] = 84, ++ [2][1][RTW89_ETSI][38] = 16, ++ [2][1][RTW89_MKK][38] = 127, ++ [2][1][RTW89_IC][38] = 84, ++ [2][1][RTW89_KCC][38] = 48, ++ [2][1][RTW89_ACMA][38] = 84, ++ [2][1][RTW89_CHILE][38] = 58, ++ [2][1][RTW89_UKRAINE][38] = 16, ++ [2][1][RTW89_MEXICO][38] = 84, ++ [2][1][RTW89_CN][38] = 64, ++ [2][1][RTW89_QATAR][38] = 16, ++ [2][1][RTW89_UK][38] = 38, ++ [2][1][RTW89_FCC][40] = 84, ++ [2][1][RTW89_ETSI][40] = 16, ++ [2][1][RTW89_MKK][40] = 127, ++ [2][1][RTW89_IC][40] = 84, ++ [2][1][RTW89_KCC][40] = 48, ++ [2][1][RTW89_ACMA][40] = 84, ++ [2][1][RTW89_CHILE][40] = 58, ++ [2][1][RTW89_UKRAINE][40] = 16, ++ [2][1][RTW89_MEXICO][40] = 84, ++ [2][1][RTW89_CN][40] = 64, ++ [2][1][RTW89_QATAR][40] = 16, ++ [2][1][RTW89_UK][40] = 38, ++ [2][1][RTW89_FCC][42] = 84, ++ [2][1][RTW89_ETSI][42] = 16, ++ [2][1][RTW89_MKK][42] = 127, ++ [2][1][RTW89_IC][42] = 84, ++ [2][1][RTW89_KCC][42] = 48, ++ [2][1][RTW89_ACMA][42] = 84, ++ [2][1][RTW89_CHILE][42] = 58, ++ [2][1][RTW89_UKRAINE][42] = 16, ++ [2][1][RTW89_MEXICO][42] = 84, ++ [2][1][RTW89_CN][42] = 64, ++ [2][1][RTW89_QATAR][42] = 16, ++ [2][1][RTW89_UK][42] = 38, ++ [2][1][RTW89_FCC][44] = 84, ++ [2][1][RTW89_ETSI][44] = 16, ++ [2][1][RTW89_MKK][44] = 127, ++ [2][1][RTW89_IC][44] = 84, ++ [2][1][RTW89_KCC][44] = 48, ++ [2][1][RTW89_ACMA][44] = 84, ++ [2][1][RTW89_CHILE][44] = 58, ++ [2][1][RTW89_UKRAINE][44] = 16, ++ [2][1][RTW89_MEXICO][44] = 84, ++ [2][1][RTW89_CN][44] = 64, ++ [2][1][RTW89_QATAR][44] = 16, ++ [2][1][RTW89_UK][44] = 38, ++ [2][1][RTW89_FCC][46] = 84, ++ [2][1][RTW89_ETSI][46] = 16, ++ [2][1][RTW89_MKK][46] = 127, ++ [2][1][RTW89_IC][46] = 84, ++ [2][1][RTW89_KCC][46] = 48, ++ [2][1][RTW89_ACMA][46] = 84, ++ [2][1][RTW89_CHILE][46] = 58, ++ [2][1][RTW89_UKRAINE][46] = 16, ++ [2][1][RTW89_MEXICO][46] = 84, ++ [2][1][RTW89_CN][46] = 64, ++ [2][1][RTW89_QATAR][46] = 16, ++ [2][1][RTW89_UK][46] = 38, ++ [2][1][RTW89_FCC][48] = 44, ++ [2][1][RTW89_ETSI][48] = 127, ++ [2][1][RTW89_MKK][48] = 127, ++ [2][1][RTW89_IC][48] = 127, ++ [2][1][RTW89_KCC][48] = 127, ++ [2][1][RTW89_ACMA][48] = 127, ++ [2][1][RTW89_CHILE][48] = 127, ++ [2][1][RTW89_UKRAINE][48] = 127, ++ [2][1][RTW89_MEXICO][48] = 127, ++ [2][1][RTW89_CN][48] = 127, ++ [2][1][RTW89_QATAR][48] = 127, ++ [2][1][RTW89_UK][48] = 127, ++ [2][1][RTW89_FCC][50] = 44, ++ [2][1][RTW89_ETSI][50] = 127, ++ [2][1][RTW89_MKK][50] = 127, ++ [2][1][RTW89_IC][50] = 127, ++ [2][1][RTW89_KCC][50] = 127, ++ [2][1][RTW89_ACMA][50] = 127, ++ [2][1][RTW89_CHILE][50] = 127, ++ [2][1][RTW89_UKRAINE][50] = 127, ++ [2][1][RTW89_MEXICO][50] = 127, ++ [2][1][RTW89_CN][50] = 127, ++ [2][1][RTW89_QATAR][50] = 127, ++ [2][1][RTW89_UK][50] = 127, ++ [2][1][RTW89_FCC][52] = 44, ++ [2][1][RTW89_ETSI][52] = 127, ++ [2][1][RTW89_MKK][52] = 127, ++ [2][1][RTW89_IC][52] = 127, ++ [2][1][RTW89_KCC][52] = 127, ++ [2][1][RTW89_ACMA][52] = 127, ++ [2][1][RTW89_CHILE][52] = 127, ++ [2][1][RTW89_UKRAINE][52] = 127, ++ [2][1][RTW89_MEXICO][52] = 127, ++ [2][1][RTW89_CN][52] = 127, ++ [2][1][RTW89_QATAR][52] = 127, ++ [2][1][RTW89_UK][52] = 127, ++}; ++ ++const struct rtw89_phy_table rtw89_8852b_phy_bb_table = { ++ .regs = rtw89_8852b_phy_bb_regs, ++ .n_regs = ARRAY_SIZE(rtw89_8852b_phy_bb_regs), ++ .rf_path = 0, /* don't care */ ++}; ++ ++const struct rtw89_phy_table rtw89_8852b_phy_bb_gain_table = { ++ .regs = rtw89_8852b_phy_bb_reg_gain, ++ .n_regs = ARRAY_SIZE(rtw89_8852b_phy_bb_reg_gain), ++ .rf_path = 0, /* don't care */ ++}; ++ ++const struct rtw89_phy_table rtw89_8852b_phy_radioa_table = { ++ .regs = rtw89_8852b_phy_radioa_regs, ++ .n_regs = ARRAY_SIZE(rtw89_8852b_phy_radioa_regs), ++ .rf_path = RF_PATH_A, ++ .config = rtw89_phy_config_rf_reg_v1, ++}; ++ ++const struct rtw89_phy_table rtw89_8852b_phy_radiob_table = { ++ .regs = rtw89_8852b_phy_radiob_regs, ++ .n_regs = ARRAY_SIZE(rtw89_8852b_phy_radiob_regs), ++ .rf_path = RF_PATH_B, ++ .config = rtw89_phy_config_rf_reg_v1, ++}; ++ ++const struct rtw89_phy_table rtw89_8852b_phy_nctl_table = { ++ .regs = rtw89_8852b_phy_nctl_regs, ++ .n_regs = ARRAY_SIZE(rtw89_8852b_phy_nctl_regs), ++ .rf_path = 0, /* don't care */ ++}; ++ ++const struct rtw89_txpwr_table rtw89_8852b_byr_table = { ++ .data = rtw89_8852b_txpwr_byrate, ++ .size = ARRAY_SIZE(rtw89_8852b_txpwr_byrate), ++ .load = rtw89_phy_load_txpwr_byrate, ++}; ++ ++const struct rtw89_txpwr_track_cfg rtw89_8852b_trk_cfg = { ++ .delta_swingidx_5gb_n = _txpwr_track_delta_swingidx_5gb_n, ++ .delta_swingidx_5gb_p = _txpwr_track_delta_swingidx_5gb_p, ++ .delta_swingidx_5ga_n = _txpwr_track_delta_swingidx_5ga_n, ++ .delta_swingidx_5ga_p = _txpwr_track_delta_swingidx_5ga_p, ++ .delta_swingidx_2gb_n = _txpwr_track_delta_swingidx_2gb_n, ++ .delta_swingidx_2gb_p = _txpwr_track_delta_swingidx_2gb_p, ++ .delta_swingidx_2ga_n = _txpwr_track_delta_swingidx_2ga_n, ++ .delta_swingidx_2ga_p = _txpwr_track_delta_swingidx_2ga_p, ++ .delta_swingidx_2g_cck_b_n = _txpwr_track_delta_swingidx_2g_cck_b_n, ++ .delta_swingidx_2g_cck_b_p = _txpwr_track_delta_swingidx_2g_cck_b_p, ++ .delta_swingidx_2g_cck_a_n = _txpwr_track_delta_swingidx_2g_cck_a_n, ++ .delta_swingidx_2g_cck_a_p = _txpwr_track_delta_swingidx_2g_cck_a_p, ++}; +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw89/rtw8852b_table.h linux-6.2/drivers/net/wireless/realtek/rtw89/rtw8852b_table.h +--- linux-6.1/drivers/net/wireless/realtek/rtw89/rtw8852b_table.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw89/rtw8852b_table.h 2022-12-24 00:49:25.785376835 +0200 +@@ -0,0 +1,30 @@ ++/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ ++/* Copyright(c) 2019-2020 Realtek Corporation ++ */ ++ ++#ifndef __RTW89_8852B_TABLE_H__ ++#define __RTW89_8852B_TABLE_H__ ++ ++#include "core.h" ++ ++extern const struct rtw89_phy_table rtw89_8852b_phy_bb_table; ++extern const struct rtw89_phy_table rtw89_8852b_phy_bb_gain_table; ++extern const struct rtw89_phy_table rtw89_8852b_phy_radioa_table; ++extern const struct rtw89_phy_table rtw89_8852b_phy_radiob_table; ++extern const struct rtw89_phy_table rtw89_8852b_phy_nctl_table; ++extern const struct rtw89_txpwr_table rtw89_8852b_byr_table; ++extern const struct rtw89_txpwr_track_cfg rtw89_8852b_trk_cfg; ++extern const u8 rtw89_8852b_tx_shape[RTW89_BAND_MAX][RTW89_RS_TX_SHAPE_NUM] ++ [RTW89_REGD_NUM]; ++extern const s8 rtw89_8852b_txpwr_lmt_2g[RTW89_2G_BW_NUM][RTW89_NTX_NUM] ++ [RTW89_RS_LMT_NUM][RTW89_BF_NUM] ++ [RTW89_REGD_NUM][RTW89_2G_CH_NUM]; ++extern const s8 rtw89_8852b_txpwr_lmt_5g[RTW89_5G_BW_NUM][RTW89_NTX_NUM] ++ [RTW89_RS_LMT_NUM][RTW89_BF_NUM] ++ [RTW89_REGD_NUM][RTW89_5G_CH_NUM]; ++extern const s8 rtw89_8852b_txpwr_lmt_ru_2g[RTW89_RU_NUM][RTW89_NTX_NUM] ++ [RTW89_REGD_NUM][RTW89_2G_CH_NUM]; ++extern const s8 rtw89_8852b_txpwr_lmt_ru_5g[RTW89_RU_NUM][RTW89_NTX_NUM] ++ [RTW89_REGD_NUM][RTW89_5G_CH_NUM]; ++ ++#endif +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw89/rtw8852c.c linux-6.2/drivers/net/wireless/realtek/rtw89/rtw8852c.c +--- linux-6.1/drivers/net/wireless/realtek/rtw89/rtw8852c.c 2022-12-12 00:15:18.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw89/rtw8852c.c 2022-12-24 00:49:25.785376835 +0200 +@@ -273,6 +273,9 @@ static int rtw8852c_pwr_on_func(struct r + B_AX_CMAC_DMA_EN | B_AX_PTCLTOP_EN | B_AX_SCHEDULER_EN | + B_AX_TMAC_EN | B_AX_RMAC_EN); + ++ rtw89_write32_mask(rtwdev, R_AX_LED1_FUNC_SEL, B_AX_PINMUX_EESK_FUNC_SEL_V1_MASK, ++ PINMUX_EESK_FUNC_SEL_BT_LOG); ++ + return 0; + } + +@@ -785,40 +788,12 @@ static const struct rtw8852c_bb_gain_op1 + .mask_tia0_lna6 = 0xff000000, + }; + +-static enum rtw89_phy_bb_gain_band +-rtw8852c_mapping_gain_band(enum rtw89_subband subband) +-{ +- switch (subband) { +- default: +- case RTW89_CH_2G: +- return RTW89_BB_GAIN_BAND_2G; +- case RTW89_CH_5G_BAND_1: +- return RTW89_BB_GAIN_BAND_5G_L; +- case RTW89_CH_5G_BAND_3: +- return RTW89_BB_GAIN_BAND_5G_M; +- case RTW89_CH_5G_BAND_4: +- return RTW89_BB_GAIN_BAND_5G_H; +- case RTW89_CH_6G_BAND_IDX0: +- case RTW89_CH_6G_BAND_IDX1: +- return RTW89_BB_GAIN_BAND_6G_L; +- case RTW89_CH_6G_BAND_IDX2: +- case RTW89_CH_6G_BAND_IDX3: +- return RTW89_BB_GAIN_BAND_6G_M; +- case RTW89_CH_6G_BAND_IDX4: +- case RTW89_CH_6G_BAND_IDX5: +- return RTW89_BB_GAIN_BAND_6G_H; +- case RTW89_CH_6G_BAND_IDX6: +- case RTW89_CH_6G_BAND_IDX7: +- return RTW89_BB_GAIN_BAND_6G_UH; +- } +-} +- + static void rtw8852c_set_gain_error(struct rtw89_dev *rtwdev, + enum rtw89_subband subband, + enum rtw89_rf_path path) + { + const struct rtw89_phy_bb_gain_info *gain = &rtwdev->bb_gain; +- u8 gain_band = rtw8852c_mapping_gain_band(subband); ++ u8 gain_band = rtw89_subband_to_bb_gain_band(subband); + s32 val; + u32 reg; + u32 mask; +@@ -976,21 +951,7 @@ static void rtw8852c_set_gain_offset(str + rtw89_phy_write32_mask(rtwdev, R_RPL_OFST, B_RPL_OFST_MASK, tmp & 0x7f); + } + +- switch (chan->subband_type) { +- default: +- case RTW89_CH_2G: +- gain_band = RTW89_GAIN_OFFSET_2G_OFDM; +- break; +- case RTW89_CH_5G_BAND_1: +- gain_band = RTW89_GAIN_OFFSET_5G_LOW; +- break; +- case RTW89_CH_5G_BAND_3: +- gain_band = RTW89_GAIN_OFFSET_5G_MID; +- break; +- case RTW89_CH_5G_BAND_4: +- gain_band = RTW89_GAIN_OFFSET_5G_HIGH; +- break; +- } ++ gain_band = rtw89_subband_to_gain_offset_band_of_ofdm(chan->subband_type); + + offset_q0 = -efuse_gain->offset[path][gain_band]; + offset_base_q4 = efuse_gain->offset_base[phy_idx]; +@@ -1722,12 +1683,12 @@ static void rtw8852c_set_channel_bb(stru + const struct rtw89_chan *chan, + enum rtw89_phy_idx phy_idx) + { ++ static const u32 ru_alloc_msk[2] = {B_P80_AT_HIGH_FREQ_RU_ALLOC_PHY0, ++ B_P80_AT_HIGH_FREQ_RU_ALLOC_PHY1}; + struct rtw89_hal *hal = &rtwdev->hal; + bool cck_en = chan->band_type == RTW89_BAND_2G; + u8 pri_ch_idx = chan->pri_ch_idx; + u32 mask, reg; +- u32 ru_alloc_msk[2] = {B_P80_AT_HIGH_FREQ_RU_ALLOC_PHY0, +- B_P80_AT_HIGH_FREQ_RU_ALLOC_PHY1}; + u8 ntx_path; + + if (chan->band_type == RTW89_BAND_2G) +@@ -1871,11 +1832,11 @@ static void rtw8852c_set_channel_help(st + + static void rtw8852c_rfk_init(struct rtw89_dev *rtwdev) + { +- struct rtw89_mcc_info *mcc_info = &rtwdev->mcc; ++ struct rtw89_rfk_mcc_info *rfk_mcc = &rtwdev->rfk_mcc; + + rtwdev->is_tssi_mode[RF_PATH_A] = false; + rtwdev->is_tssi_mode[RF_PATH_B] = false; +- memset(mcc_info, 0, sizeof(*mcc_info)); ++ memset(rfk_mcc, 0, sizeof(*rfk_mcc)); + rtw8852c_lck_init(rtwdev); + + rtw8852c_rck(rtwdev); +@@ -2006,75 +1967,6 @@ static void rtw8852c_set_txpwr_ref(struc + phy_idx); + } + +-static void rtw8852c_set_txpwr_byrate(struct rtw89_dev *rtwdev, +- const struct rtw89_chan *chan, +- enum rtw89_phy_idx phy_idx) +-{ +- u8 band = chan->band_type; +- u8 ch = chan->channel; +- static const u8 rs[] = { +- RTW89_RS_CCK, +- RTW89_RS_OFDM, +- RTW89_RS_MCS, +- RTW89_RS_HEDCM, +- }; +- s8 tmp; +- u8 i, j; +- u32 val, shf, addr = R_AX_PWR_BY_RATE; +- struct rtw89_rate_desc cur; +- +- rtw89_debug(rtwdev, RTW89_DBG_TXPWR, +- "[TXPWR] set txpwr byrate with ch=%d\n", ch); +- +- for (cur.nss = 0; cur.nss <= RTW89_NSS_2; cur.nss++) { +- for (i = 0; i < ARRAY_SIZE(rs); i++) { +- if (cur.nss >= rtw89_rs_nss_max[rs[i]]) +- continue; +- +- val = 0; +- cur.rs = rs[i]; +- +- for (j = 0; j < rtw89_rs_idx_max[rs[i]]; j++) { +- cur.idx = j; +- shf = (j % 4) * 8; +- tmp = rtw89_phy_read_txpwr_byrate(rtwdev, band, +- &cur); +- val |= (tmp << shf); +- +- if ((j + 1) % 4) +- continue; +- +- rtw89_mac_txpwr_write32(rtwdev, phy_idx, addr, val); +- val = 0; +- addr += 4; +- } +- } +- } +-} +- +-static void rtw8852c_set_txpwr_offset(struct rtw89_dev *rtwdev, +- const struct rtw89_chan *chan, +- enum rtw89_phy_idx phy_idx) +-{ +- u8 band = chan->band_type; +- struct rtw89_rate_desc desc = { +- .nss = RTW89_NSS_1, +- .rs = RTW89_RS_OFFSET, +- }; +- u32 val = 0; +- s8 v; +- +- rtw89_debug(rtwdev, RTW89_DBG_TXPWR, "[TXPWR] set txpwr offset\n"); +- +- for (desc.idx = 0; desc.idx < RTW89_RATE_OFFSET_MAX; desc.idx++) { +- v = rtw89_phy_read_txpwr_byrate(rtwdev, band, &desc); +- val |= ((v & 0xf) << (4 * desc.idx)); +- } +- +- rtw89_mac_txpwr_write32_mask(rtwdev, phy_idx, R_AX_PWR_RATE_OFST_CTRL, +- GENMASK(19, 0), val); +-} +- + static void rtw8852c_bb_set_tx_shape_dfir(struct rtw89_dev *rtwdev, + u8 tx_shape_idx, + enum rtw89_phy_idx phy_idx) +@@ -2147,83 +2039,15 @@ static void rtw8852c_set_tx_shape(struct + tx_shape_ofdm); + } + +-static void rtw8852c_set_txpwr_limit(struct rtw89_dev *rtwdev, +- const struct rtw89_chan *chan, +- enum rtw89_phy_idx phy_idx) +-{ +-#define __MAC_TXPWR_LMT_PAGE_SIZE 40 +- u8 ch = chan->channel; +- u8 bw = chan->band_width; +- struct rtw89_txpwr_limit lmt[NTX_NUM_8852C]; +- u32 addr, val; +- const s8 *ptr; +- u8 i, j; +- +- rtw89_debug(rtwdev, RTW89_DBG_TXPWR, +- "[TXPWR] set txpwr limit with ch=%d bw=%d\n", ch, bw); +- +- for (i = 0; i < NTX_NUM_8852C; i++) { +- rtw89_phy_fill_txpwr_limit(rtwdev, chan, &lmt[i], i); +- +- for (j = 0; j < __MAC_TXPWR_LMT_PAGE_SIZE; j += 4) { +- addr = R_AX_PWR_LMT + j + __MAC_TXPWR_LMT_PAGE_SIZE * i; +- ptr = (s8 *)&lmt[i] + j; +- +- val = FIELD_PREP(GENMASK(7, 0), ptr[0]) | +- FIELD_PREP(GENMASK(15, 8), ptr[1]) | +- FIELD_PREP(GENMASK(23, 16), ptr[2]) | +- FIELD_PREP(GENMASK(31, 24), ptr[3]); +- +- rtw89_mac_txpwr_write32(rtwdev, phy_idx, addr, val); +- } +- } +-#undef __MAC_TXPWR_LMT_PAGE_SIZE +-} +- +-static void rtw8852c_set_txpwr_limit_ru(struct rtw89_dev *rtwdev, +- const struct rtw89_chan *chan, +- enum rtw89_phy_idx phy_idx) +-{ +-#define __MAC_TXPWR_LMT_RU_PAGE_SIZE 24 +- u8 ch = chan->channel; +- u8 bw = chan->band_width; +- struct rtw89_txpwr_limit_ru lmt_ru[NTX_NUM_8852C]; +- u32 addr, val; +- const s8 *ptr; +- u8 i, j; +- +- rtw89_debug(rtwdev, RTW89_DBG_TXPWR, +- "[TXPWR] set txpwr limit ru with ch=%d bw=%d\n", ch, bw); +- +- for (i = 0; i < NTX_NUM_8852C; i++) { +- rtw89_phy_fill_txpwr_limit_ru(rtwdev, chan, &lmt_ru[i], i); +- +- for (j = 0; j < __MAC_TXPWR_LMT_RU_PAGE_SIZE; j += 4) { +- addr = R_AX_PWR_RU_LMT + j + +- __MAC_TXPWR_LMT_RU_PAGE_SIZE * i; +- ptr = (s8 *)&lmt_ru[i] + j; +- +- val = FIELD_PREP(GENMASK(7, 0), ptr[0]) | +- FIELD_PREP(GENMASK(15, 8), ptr[1]) | +- FIELD_PREP(GENMASK(23, 16), ptr[2]) | +- FIELD_PREP(GENMASK(31, 24), ptr[3]); +- +- rtw89_mac_txpwr_write32(rtwdev, phy_idx, addr, val); +- } +- } +- +-#undef __MAC_TXPWR_LMT_RU_PAGE_SIZE +-} +- + static void rtw8852c_set_txpwr(struct rtw89_dev *rtwdev, + const struct rtw89_chan *chan, + enum rtw89_phy_idx phy_idx) + { +- rtw8852c_set_txpwr_byrate(rtwdev, chan, phy_idx); +- rtw8852c_set_txpwr_offset(rtwdev, chan, phy_idx); ++ rtw89_phy_set_txpwr_byrate(rtwdev, chan, phy_idx); ++ rtw89_phy_set_txpwr_offset(rtwdev, chan, phy_idx); + rtw8852c_set_tx_shape(rtwdev, chan, phy_idx); +- rtw8852c_set_txpwr_limit(rtwdev, chan, phy_idx); +- rtw8852c_set_txpwr_limit_ru(rtwdev, chan, phy_idx); ++ rtw89_phy_set_txpwr_limit(rtwdev, chan, phy_idx); ++ rtw89_phy_set_txpwr_limit_ru(rtwdev, chan, phy_idx); + } + + static void rtw8852c_set_txpwr_ctrl(struct rtw89_dev *rtwdev, +@@ -2819,19 +2643,6 @@ static const struct rtw89_btc_fbtc_mreg + }; + + static +-void rtw8852c_btc_bt_aci_imp(struct rtw89_dev *rtwdev) +-{ +- struct rtw89_btc *btc = &rtwdev->btc; +- struct rtw89_btc_dm *dm = &btc->dm; +- struct rtw89_btc_bt_info *bt = &btc->cx.bt; +- struct rtw89_btc_bt_link_info *b = &bt->link_info; +- +- /* fix LNA2 = level-5 for BT ACI issue at BTG */ +- if (btc->dm.wl_btg_rx && b->profile_cnt.now != 0) +- dm->trx_para_level = 1; +-} +- +-static + void rtw8852c_btc_update_bt_cnt(struct rtw89_dev *rtwdev) + { + /* Feature move to firmware */ +@@ -2985,6 +2796,15 @@ static int rtw8852c_mac_disable_bb_rf(st + return 0; + } + ++#ifdef CONFIG_PM ++static const struct wiphy_wowlan_support rtw_wowlan_stub_8852c = { ++ .flags = WIPHY_WOWLAN_MAGIC_PKT | WIPHY_WOWLAN_DISCONNECT, ++ .n_patterns = RTW89_MAX_PATTERN_NUM, ++ .pattern_max_len = RTW89_MAX_PATTERN_SIZE, ++ .pattern_min_len = 1, ++}; ++#endif ++ + static const struct rtw89_chip_ops rtw8852c_chip_ops = { + .enable_bb_rf = rtw8852c_mac_enable_bb_rf, + .disable_bb_rf = rtw8852c_mac_disable_bb_rf, +@@ -3027,7 +2847,6 @@ static const struct rtw89_chip_ops rtw88 + .btc_set_wl_pri = rtw8852c_btc_set_wl_pri, + .btc_set_wl_txpwr_ctrl = rtw8852c_btc_set_wl_txpwr_ctrl, + .btc_get_bt_rssi = rtw8852c_btc_get_bt_rssi, +- .btc_bt_aci_imp = rtw8852c_btc_bt_aci_imp, + .btc_update_bt_cnt = rtw8852c_btc_update_bt_cnt, + .btc_wl_s1_standby = rtw8852c_btc_wl_s1_standby, + .btc_set_wl_rx_gain = rtw8852c_btc_set_wl_rx_gain, +@@ -3045,6 +2864,8 @@ const struct rtw89_chip_info rtw8852c_ch + .rsvd_ple_ofst = 0x6f800, + .hfc_param_ini = rtw8852c_hfc_param_ini_pcie, + .dle_mem = rtw8852c_dle_mem_pcie, ++ .wde_qempty_acq_num = 16, ++ .wde_qempty_mgq_sel = 16, + .rf_base_addr = {0xe000, 0xf000}, + .pwr_on_seq = NULL, + .pwr_off_seq = NULL, +@@ -3070,6 +2891,7 @@ const struct rtw89_chip_info rtw8852c_ch + BIT(NL80211_BAND_5GHZ) | + BIT(NL80211_BAND_6GHZ), + .support_bw160 = true, ++ .support_ul_tb_ctrl = false, + .hw_sec_hdr = true, + .rf_path_num = 2, + .tx_nss = 2, +@@ -3132,11 +2954,15 @@ const struct rtw89_chip_info rtw8852c_ch + .c2h_ctrl_reg = R_AX_C2HREG_CTRL_V1, + .c2h_regs = rtw8852c_c2h_regs, + .page_regs = &rtw8852c_page_regs, ++ .cfo_src_fd = false, + .dcfo_comp = &rtw8852c_dcfo_comp, + .dcfo_comp_sft = 5, + .imr_info = &rtw8852c_imr_info, + .rrsr_cfgs = &rtw8852c_rrsr_cfgs, + .dma_ch_mask = 0, ++#ifdef CONFIG_PM ++ .wowlan_stub = &rtw_wowlan_stub_8852c, ++#endif + }; + EXPORT_SYMBOL(rtw8852c_chip_info); + +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw89/rtw8852c.h linux-6.2/drivers/net/wireless/realtek/rtw89/rtw8852c.h +--- linux-6.1/drivers/net/wireless/realtek/rtw89/rtw8852c.h 2022-12-12 00:15:18.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw89/rtw8852c.h 2022-12-24 00:49:25.786376835 +0200 +@@ -9,7 +9,6 @@ + + #define RF_PATH_NUM_8852C 2 + #define BB_PATH_NUM_8852C 2 +-#define NTX_NUM_8852C 2 + + struct rtw8852c_u_efuse { + u8 rsvd[0x38]; +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c linux-6.2/drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c +--- linux-6.1/drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c 2022-12-12 00:15:18.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c 2022-12-24 00:49:25.786376835 +0200 +@@ -22,8 +22,7 @@ static const u32 _tssi_de_mcs_5m[RF_PATH + static const u32 _tssi_de_mcs_10m[RF_PATH_NUM_8852C] = {0x5830, 0x7830}; + + static const u32 rtw8852c_backup_bb_regs[] = { +- 0x813c, 0x8124, 0x8120, 0xc0d4, 0xc0d8, 0xc0e8, 0x823c, 0x8224, 0x8220, +- 0xc1d4, 0xc1d8, 0xc1e8 ++ 0x8120, 0xc0d4, 0xc0d8, 0xc0e8, 0x8220, 0xc1d4, 0xc1d8, 0xc1e8 + }; + + static const u32 rtw8852c_backup_rf_regs[] = { +@@ -1031,9 +1030,9 @@ static bool _iqk_nbtxk(struct rtw89_dev + + static bool _lok_finetune_check(struct rtw89_dev *rtwdev, u8 path) + { +- struct rtw89_mcc_info *mcc_info = &rtwdev->mcc; ++ struct rtw89_rfk_mcc_info *rfk_mcc = &rtwdev->rfk_mcc; + struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; +- u8 idx = mcc_info->table_idx; ++ u8 idx = rfk_mcc->table_idx; + bool is_fail1, is_fail2; + u32 val; + u32 core_i; +@@ -1376,10 +1375,10 @@ static void _iqk_afebb_restore(struct rt + + static void _iqk_preset(struct rtw89_dev *rtwdev, u8 path) + { +- struct rtw89_mcc_info *mcc_info = &rtwdev->mcc; ++ struct rtw89_rfk_mcc_info *rfk_mcc = &rtwdev->rfk_mcc; + u8 idx = 0; + +- idx = mcc_info->table_idx; ++ idx = rfk_mcc->table_idx; + rtw89_phy_write32_mask(rtwdev, R_COEF_SEL + (path << 8), B_COEF_SEL_IQC, idx); + rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_G3, idx); + rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x0); +@@ -1667,7 +1666,7 @@ static u8 _dpk_one_shot(struct rtw89_dev + + ret = read_poll_timeout_atomic(rtw89_phy_read32_mask, val, val == 0x55, + 10, 20000, false, rtwdev, 0xbff8, MASKBYTE0); +- mdelay(10); ++ udelay(10); + rtw89_phy_write32_clr(rtwdev, R_NCTL_N1, MASKBYTE0); + + rtw89_debug(rtwdev, RTW89_DBG_RFK, +@@ -3825,20 +3824,20 @@ void rtw8852c_set_channel_rf(struct rtw8 + void rtw8852c_mcc_get_ch_info(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx) + { + const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); +- struct rtw89_mcc_info *mcc_info = &rtwdev->mcc; +- u8 idx = mcc_info->table_idx; ++ struct rtw89_rfk_mcc_info *rfk_mcc = &rtwdev->rfk_mcc; ++ u8 idx = rfk_mcc->table_idx; + int i; + + for (i = 0; i < RTW89_IQK_CHS_NR; i++) { +- if (mcc_info->ch[idx] == 0) ++ if (rfk_mcc->ch[idx] == 0) + break; + if (++idx >= RTW89_IQK_CHS_NR) + idx = 0; + } + +- mcc_info->table_idx = idx; +- mcc_info->ch[idx] = chan->channel; +- mcc_info->band[idx] = chan->band_type; ++ rfk_mcc->table_idx = idx; ++ rfk_mcc->ch[idx] = chan->channel; ++ rfk_mcc->band[idx] = chan->band_type; + } + + void rtw8852c_rck(struct rtw89_dev *rtwdev) +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw89/rtw8852c_table.c linux-6.2/drivers/net/wireless/realtek/rtw89/rtw8852c_table.c +--- linux-6.1/drivers/net/wireless/realtek/rtw89/rtw8852c_table.c 2022-12-12 00:15:18.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw89/rtw8852c_table.c 2022-12-24 00:49:25.786376835 +0200 +@@ -10,6 +10,8 @@ static const struct rtw89_reg2_def rtw89 + {0xF0FF0000, 0x00000000}, + {0xF03300FF, 0x00000001}, + {0xF03400FF, 0x00000002}, ++ {0xF03500FF, 0x00000003}, ++ {0xF03600FF, 0x00000004}, + {0x70C, 0x00000020}, + {0x704, 0x601E0100}, + {0x4000, 0x00000000}, +@@ -200,7 +202,7 @@ static const struct rtw89_reg2_def rtw89 + {0x4264, 0x00000000}, + {0x4268, 0x00000000}, + {0x426C, 0x0418317C}, +- {0x46C0, 0x00000001}, ++ {0x46C0, 0x00000000}, + {0x4270, 0x00D6135C}, + {0x46C4, 0x00000033}, + {0x4274, 0x00000000}, +@@ -342,7 +344,7 @@ static const struct rtw89_reg2_def rtw89 + {0x442C, 0x00000000}, + {0x4430, 0x00000000}, + {0x4434, 0x00000000}, +- {0x4438, 0x590642D0}, ++ {0x4438, 0x59096398}, + {0x443C, 0x398668A0}, + {0x4440, 0x6C100808}, + {0x4444, 0x4A145344}, +@@ -566,9 +568,9 @@ static const struct rtw89_reg2_def rtw89 + {0x4BA8, 0x002B6456}, + {0x45E0, 0x00000000}, + {0x45E4, 0x00000000}, +- {0x45E8, 0x00E2E1E1}, ++ {0x45E8, 0x00C8E1E1}, + {0x45EC, 0xCBCBB6B6}, +- {0x45F0, 0x59100FCA}, ++ {0x45F0, 0x5F900FCA}, + {0x4BAC, 0x12CAB6DE}, + {0x4BB0, 0x00001110}, + {0x45F4, 0x08882550}, +@@ -584,9 +586,17 @@ static const struct rtw89_reg2_def rtw89 + {0x4660, 0x41250EF4}, + {0x4664, 0x6750E458}, + {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, +- {0x45DC, 0xE1CB38E8}, +- {0x4660, 0x4A2E1800}, +- {0x4664, 0x6750E462}, ++ {0x45DC, 0xD1B942F4}, ++ {0x4660, 0x41250EF4}, ++ {0x4664, 0x6750E458}, ++ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x45DC, 0xD1B942F4}, ++ {0x4660, 0x41250EF4}, ++ {0x4664, 0x6750E458}, ++ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x45DC, 0xD1B942F4}, ++ {0x4660, 0x41250EF4}, ++ {0x4664, 0x6750E458}, + {0xA0000000, 0x00000000}, + {0x45DC, 0xE1CB38E8}, + {0x4660, 0x4A2E1800}, +@@ -603,7 +613,19 @@ static const struct rtw89_reg2_def rtw89 + {0x4688, 0x1A10FF04}, + {0x468C, 0x282A3000}, + {0x4690, 0x2A29292A}, ++ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x4694, 0x04FA2A2A}, ++ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x4694, 0x04FA2A2A}, ++ {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x4694, 0x06FA2A2A}, ++ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x4694, 0x04FA2A2A}, ++ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, + {0x4694, 0x04FA2A2A}, ++ {0xA0000000, 0x00000000}, ++ {0x4694, 0x04FA2A2A}, ++ {0xB0000000, 0x00000000}, + {0x4698, 0xEE0F04D1}, + {0x469C, 0x89291436}, + {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, +@@ -612,6 +634,10 @@ static const struct rtw89_reg2_def rtw89 + {0x46A0, 0x0701E79E}, + {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, + {0x46A0, 0x0701E79E}, ++ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x46A0, 0x0701E79E}, ++ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x46A0, 0x0701E79E}, + {0xA0000000, 0x00000000}, + {0x46A0, 0x0701E79E}, + {0xB0000000, 0x00000000}, +@@ -620,11 +646,17 @@ static const struct rtw89_reg2_def rtw89 + {0x46A8, 0x2212FF14}, + {0x46AC, 0x60423537}, + {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x46A8, 0x649EFF14}, ++ {0x46AC, 0xA1B37C4E}, ++ {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, + {0x46A8, 0x4D1E7F14}, + {0x46AC, 0x60B37C4E}, +- {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, +- {0x46A8, 0x2212FF14}, +- {0x46AC, 0x60423537}, ++ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x46A8, 0x649EFF14}, ++ {0x46AC, 0xA1B37C4E}, ++ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x46A8, 0x649EFF14}, ++ {0x46AC, 0xA1B37C4E}, + {0xA0000000, 0x00000000}, + {0x46A8, 0x2212FF14}, + {0x46AC, 0x60423537}, +@@ -637,11 +669,19 @@ static const struct rtw89_reg2_def rtw89 + {0x4720, 0x3FFFFD63}, + {0x4724, 0xB58D11FF}, + {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, +- {0x46BC, 0x5107C252}, +- {0x4720, 0x27795843}, ++ {0x46BC, 0x510FC252}, ++ {0x4720, 0x27795303}, + {0x4724, 0xB58D11F5}, + {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, +- {0x46BC, 0x5107C252}, ++ {0x46BC, 0x510FC252}, ++ {0x4720, 0x27795843}, ++ {0x4724, 0xB58D11F5}, ++ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x46BC, 0x510FC252}, ++ {0x4720, 0x27795303}, ++ {0x4724, 0xB58D11F5}, ++ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x46BC, 0x510FC252}, + {0x4720, 0x27795303}, + {0x4724, 0xB58D11F5}, + {0xA0000000, 0x00000000}, +@@ -656,11 +696,17 @@ static const struct rtw89_reg2_def rtw89 + {0x4734, 0x00000020}, + {0x4738, 0x8325C500}, + {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, +- {0x4734, 0x003D4C20}, ++ {0x4734, 0x003D5420}, + {0x4738, 0x8F25C500}, + {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x4734, 0x003D4C20}, ++ {0x4738, 0x8F25C500}, ++ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x4734, 0x003D5420}, ++ {0x4738, 0x8F25C500}, ++ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, + {0x4734, 0x003D5420}, +- {0x4738, 0x8725C500}, ++ {0x4738, 0x8F25C500}, + {0xA0000000, 0x00000000}, + {0x4734, 0x00000020}, + {0x4738, 0x8325C500}, +@@ -678,8 +724,14 @@ static const struct rtw89_reg2_def rtw89 + {0x4BB4, 0x05EBC8AF}, + {0x4BB8, 0x99543D24}, + {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, +- {0x4BB4, 0xFBD5B89F}, +- {0x4BB8, 0x99563918}, ++ {0x4BB4, 0x05EBC8AF}, ++ {0x4BB8, 0x99543D24}, ++ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x4BB4, 0x05EBC8AF}, ++ {0x4BB8, 0x99543D24}, ++ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x4BB4, 0x05EBC8AF}, ++ {0x4BB8, 0x99543D24}, + {0xA0000000, 0x00000000}, + {0x4BB4, 0xFBD5B89F}, + {0x4BB8, 0x99563918}, +@@ -729,10 +781,10 @@ static const struct rtw89_reg2_def rtw89 + {0x4C58, 0x00001146}, + {0x4C5C, 0x00000000}, + {0x4C60, 0x00000000}, +- {0x4C64, 0xE2E1E1DE}, ++ {0x4C64, 0xC8E1E1DE}, + {0x4C68, 0xB6B600B6}, + {0x4C6C, 0xCACBCBCA}, +- {0x4C70, 0x8091010F}, ++ {0x4C70, 0x80F9010F}, + {0x4C74, 0x00000B11}, + {0x46C8, 0x08882550}, + {0x46CC, 0x08CC2660}, +@@ -747,9 +799,17 @@ static const struct rtw89_reg2_def rtw89 + {0x4744, 0x412504E8}, + {0x4748, 0x6850E459}, + {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, +- {0x4740, 0xE4CD38E8}, +- {0x4744, 0x4C321B04}, +- {0x4748, 0x6750E466}, ++ {0x4740, 0xC5AD42F4}, ++ {0x4744, 0x412504E8}, ++ {0x4748, 0x6850E459}, ++ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x4740, 0xC5AD42F4}, ++ {0x4744, 0x412504E8}, ++ {0x4748, 0x6850E459}, ++ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x4740, 0xC5AD42F4}, ++ {0x4744, 0x412504E8}, ++ {0x4748, 0x6850E459}, + {0xA0000000, 0x00000000}, + {0x4740, 0xE4CD38E8}, + {0x4744, 0x4C321B04}, +@@ -766,7 +826,19 @@ static const struct rtw89_reg2_def rtw89 + {0x476C, 0x1A10FF04}, + {0x4770, 0x282A3000}, + {0x4774, 0x2A29292A}, ++ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, + {0x4778, 0x04FA2A2A}, ++ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x4778, 0x04FA2A2A}, ++ {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x4778, 0x06FA2A2A}, ++ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x4778, 0x04FA2A2A}, ++ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x4778, 0x04FA2A2A}, ++ {0xA0000000, 0x00000000}, ++ {0x4778, 0x04FA2A2A}, ++ {0xB0000000, 0x00000000}, + {0x477C, 0xEE0F04D1}, + {0x49F0, 0x89291436}, + {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, +@@ -775,6 +847,10 @@ static const struct rtw89_reg2_def rtw89 + {0x49F4, 0x0701E79E}, + {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, + {0x49F4, 0x0701E79E}, ++ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x49F4, 0x0701E79E}, ++ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x49F4, 0x0701E79E}, + {0xA0000000, 0x00000000}, + {0x49F4, 0x0701E79E}, + {0xB0000000, 0x00000000}, +@@ -783,11 +859,17 @@ static const struct rtw89_reg2_def rtw89 + {0x4A5C, 0x2212FF14}, + {0x4A60, 0x60423537}, + {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x4A5C, 0x649EFF14}, ++ {0x4A60, 0xA1B37C4E}, ++ {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, + {0x4A5C, 0x4D1E7F14}, + {0x4A60, 0x60B37C4E}, +- {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, +- {0x4A5C, 0x2212FF14}, +- {0x4A60, 0x60423537}, ++ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x4A5C, 0x649EFF14}, ++ {0x4A60, 0xA1B37C4E}, ++ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x4A5C, 0x649EFF14}, ++ {0x4A60, 0xA1B37C4E}, + {0xA0000000, 0x00000000}, + {0x4A5C, 0x2212FF14}, + {0x4A60, 0x60423537}, +@@ -800,11 +882,19 @@ static const struct rtw89_reg2_def rtw89 + {0x4A74, 0x3FFFFD63}, + {0x4A78, 0xB58D11FF}, + {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, +- {0x4A70, 0x5107C252}, +- {0x4A74, 0x27795843}, ++ {0x4A70, 0x510FC252}, ++ {0x4A74, 0x27795303}, + {0x4A78, 0xB58D11F5}, + {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, +- {0x4A70, 0x5107C252}, ++ {0x4A70, 0x510FC252}, ++ {0x4A74, 0x27795843}, ++ {0x4A78, 0xB58D11F5}, ++ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x4A70, 0x510FC252}, ++ {0x4A74, 0x27795303}, ++ {0x4A78, 0xB58D11F5}, ++ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x4A70, 0x510FC252}, + {0x4A74, 0x27795303}, + {0x4A78, 0xB58D11F5}, + {0xA0000000, 0x00000000}, +@@ -819,11 +909,17 @@ static const struct rtw89_reg2_def rtw89 + {0x4AA0, 0x00000020}, + {0x4AA4, 0x8325C500}, + {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, +- {0x4AA0, 0x003D4C20}, ++ {0x4AA0, 0x003D5420}, + {0x4AA4, 0x8F25C500}, + {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x4AA0, 0x003D4C20}, ++ {0x4AA4, 0x8F25C500}, ++ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x4AA0, 0x003D5420}, ++ {0x4AA4, 0x8F25C500}, ++ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, + {0x4AA0, 0x003D5420}, +- {0x4AA4, 0x8725C500}, ++ {0x4AA4, 0x8F25C500}, + {0xA0000000, 0x00000000}, + {0x4AA0, 0x00000020}, + {0x4AA4, 0x8325C500}, +@@ -841,8 +937,14 @@ static const struct rtw89_reg2_def rtw89 + {0x4C78, 0x07ECC9B0}, + {0x4C7C, 0x995B4126}, + {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, +- {0x4C78, 0xFBD5B89F}, +- {0x4C7C, 0x99563918}, ++ {0x4C78, 0x07ECC9B0}, ++ {0x4C7C, 0x995B4126}, ++ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x4C78, 0x07ECC9B0}, ++ {0x4C7C, 0x995B4126}, ++ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x4C78, 0x07ECC9B0}, ++ {0x4C7C, 0x995B4126}, + {0xA0000000, 0x00000000}, + {0x4C78, 0xFBD5B89F}, + {0x4C7C, 0x99563918}, +@@ -907,17 +1009,46 @@ static const struct rtw89_reg2_def rtw89 + {0x47B4, 0x00000005}, + {0x4D2C, 0x0008C0C1}, + {0x47B8, 0x00001759}, +- {0x47BC, 0x4B702400}, +- {0x47C0, 0x831508BA}, ++ {0x47BC, 0x4B002402}, ++ {0x47C0, 0x831508BC}, + {0x4A14, 0x000000E9}, +- {0x4D30, 0x00000001}, ++ {0x4D30, 0x00000000}, + {0x4E94, 0x000000FC}, ++ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x47C4, 0x9ABBCACB}, ++ {0x47C8, 0x56767578}, ++ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x47C4, 0x9ABBCACB}, ++ {0x47C8, 0x56767578}, ++ {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x47C4, 0x9ABBCACB}, ++ {0x47C8, 0x56767578}, ++ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x47C4, 0x9ABBCACB}, ++ {0x47C8, 0x56767578}, ++ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x47C4, 0x9ABBCACB}, ++ {0x47C8, 0x56767578}, ++ {0xA0000000, 0x00000000}, + {0x47C4, 0x9ABBCACB}, + {0x47C8, 0x56767578}, ++ {0xB0000000, 0x00000000}, + {0x47CC, 0xBBCCBBB3}, + {0x47D0, 0x57889989}, + {0x47D4, 0x00000F45}, ++ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x4D34, 0x7BB167AB}, ++ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x4D34, 0x7BB1579A}, ++ {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x4D34, 0x7BB167AB}, ++ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x4D34, 0x7BB1579A}, ++ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x4D34, 0x7BB1579A}, ++ {0xA0000000, 0x00000000}, + {0x4D34, 0x7BB167AB}, ++ {0xB0000000, 0x00000000}, + {0x4D38, 0xBBBBBB05}, + {0x4D3C, 0x777777BB}, + {0x4D40, 0x00015277}, +@@ -942,7 +1073,19 @@ static const struct rtw89_reg2_def rtw89 + {0x4D48, 0x8C413016}, + {0x4D4C, 0xA140B028}, + {0x4D50, 0x00150A31}, ++ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, + {0x481C, 0x576DF814}, ++ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x481C, 0x576DF814}, ++ {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x481C, 0x576BF814}, ++ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x481C, 0x576DF814}, ++ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x481C, 0x576DF814}, ++ {0xA0000000, 0x00000000}, ++ {0x481C, 0x576DF814}, ++ {0xB0000000, 0x00000000}, + {0x4820, 0xA08877AC}, + {0x4824, 0x0000007A}, + {0x4D54, 0x00001184}, +@@ -967,7 +1110,19 @@ static const struct rtw89_reg2_def rtw89 + {0x4D78, 0x994C1502}, + {0x4D7C, 0x00017912}, + {0x4EDC, 0x00000001}, ++ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x484C, 0x0000CA62}, ++ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x484C, 0x00008A62}, ++ {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x484C, 0x0000CA62}, ++ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, + {0x484C, 0x00008A62}, ++ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x484C, 0x00008A62}, ++ {0xA0000000, 0x00000000}, ++ {0x484C, 0x0000CA62}, ++ {0xB0000000, 0x00000000}, + {0x4D80, 0x00000002}, + {0x4850, 0x00000008}, + {0x4854, 0x009B902A}, +@@ -1014,7 +1169,19 @@ static const struct rtw89_reg2_def rtw89 + {0x4DA0, 0x8C413016}, + {0x4DA4, 0xA140B028}, + {0x4DA8, 0x00150A31}, ++ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x48D4, 0x576DF814}, ++ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x48D4, 0x576BF814}, ++ {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x48D4, 0x576BF814}, ++ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x48D4, 0x576BF814}, ++ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x48D4, 0x576BF814}, ++ {0xA0000000, 0x00000000}, + {0x48D4, 0x576DF814}, ++ {0xB0000000, 0x00000000}, + {0x48D8, 0xA08877AC}, + {0x48DC, 0x0000007A}, + {0x4DAC, 0x00001184}, +@@ -1039,7 +1206,19 @@ static const struct rtw89_reg2_def rtw89 + {0x4DD0, 0x994C1502}, + {0x4DD4, 0x00017912}, + {0x4EE4, 0x00000001}, +- {0x4904, 0x00008A62}, ++ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x4904, 0x0000CA62}, ++ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x4904, 0x0000CA62}, ++ {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x4904, 0x0000CA62}, ++ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x4904, 0x0000CA62}, ++ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x4904, 0x0000CA62}, ++ {0xA0000000, 0x00000000}, ++ {0x4904, 0x0000CA62}, ++ {0xB0000000, 0x00000000}, + {0x4DD8, 0x00000002}, + {0x4908, 0x00000008}, + {0x490C, 0x80040000}, +@@ -1096,8 +1275,8 @@ static const struct rtw89_reg2_def rtw89 + {0x4988, 0x00000000}, + {0x498C, 0x00000000}, + {0x4E34, 0x00FC0000}, +- {0x4E38, 0x0000F800}, +- {0x4E3C, 0x00000001}, ++ {0x4E38, 0x00000000}, ++ {0x4E3C, 0x00000003}, + {0x4990, 0x00000000}, + {0x4994, 0x00000000}, + {0x4998, 0x00000000}, +@@ -1134,7 +1313,7 @@ static const struct rtw89_reg2_def rtw89 + {0x710, 0xEF810000}, + {0xC54, 0x1AE1436A}, + {0xC58, 0x41000000}, +- {0xC68, 0x10000050}, ++ {0xC68, 0x90000050}, + {0xC6C, 0x20061020}, + {0x704, 0x601E0100}, + {0xC74, 0x00000000}, +@@ -1225,12 +1404,12 @@ static const struct rtw89_reg2_def rtw89 + {0x328, 0xE000E000}, + {0x32C, 0x0041E000}, + {0x35C, 0x000004C4}, +- {0xC0D4, 0xA7C41460}, ++ {0xC0D4, 0xA7441460}, + {0xC0D8, 0xC6BA7F67}, + {0xC0DC, 0x30C52868}, + {0xC0E0, 0x75008128}, + {0xC0E4, 0x0000272B}, +- {0xC1D4, 0xA7C41460}, ++ {0xC1D4, 0xA7441460}, + {0xC1D8, 0xC6BA7F67}, + {0xC1DC, 0x30C52868}, + {0xC1E0, 0x75008128}, +@@ -1290,7 +1469,7 @@ static const struct rtw89_reg2_def rtw89 + {0xC8C, 0x02F2FC08}, + {0xC70, 0x071BFC00}, + {0x980, 0x10002251}, +- {0x988, 0x3C3C4107}, ++ {0x988, 0x3C3C8107}, + {0x904, 0x00000005}, + {0x994, 0x00000010}, + {0x000, 0x0580801F}, +@@ -1359,7 +1538,19 @@ static const struct rtw89_reg2_def rtw89 + {0x2310, 0xBC80536C}, + {0x2314, 0x0363A0F3}, + {0x2318, 0x000000BB}, ++ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x724, 0x00111200}, ++ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x724, 0x20111100}, ++ {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x724, 0x20111100}, ++ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x724, 0x01100100}, ++ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x724, 0x01100100}, ++ {0xA0000000, 0x00000000}, + {0x724, 0x00111200}, ++ {0xB0000000, 0x00000000}, + {0x704, 0x601E0D00}, + {0xC78, 0xBFFFFFFF}, + {0x704, 0x601E0D02}, +@@ -1393,7 +1584,7 @@ static const struct rtw89_reg2_def rtw89 + {0xC60, 0x017FFFF3}, + {0xC70, 0x071BFE00}, + {0xC70, 0x071BFE60}, +- {0xC6C, 0x20061021}, ++ {0xC6C, 0x26061021}, + {0x58AC, 0x08000000}, + {0x78AC, 0x08000000}, + {0x8120, 0x10000000}, +@@ -1452,7 +1643,7 @@ static const struct rtw89_reg2_def rtw89 + {0x12A0, 0x24903056}, + {0x12AC, 0x12333121}, + {0x12B8, 0x30020000}, +- {0x2000, 0x18BBBF84}, ++ {0x2000, 0x20BBBF04}, + {0x2C14, 0x85000005}, + {0x3200, 0x00010142}, + {0x32A0, 0x24903056}, +@@ -1469,7 +1660,21 @@ static const struct rtw89_reg2_def rtw89 + {0x76C8, 0x0E800400}, + {0x984, 0x000000E0}, + {0x2008, 0x000FFFFF}, ++ {0x1210, 0x8049E304}, ++ {0x3210, 0x8049E304}, ++ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, + {0x58B0, 0x00000800}, ++ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x58B0, 0x00000000}, ++ {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x58B0, 0x00000000}, ++ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x58B0, 0x00000000}, ++ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x58B0, 0x00000000}, ++ {0xA0000000, 0x00000000}, ++ {0x58B0, 0x00000800}, ++ {0xB0000000, 0x00000000}, + {0x5A00, 0x00000000}, + {0x5A04, 0x00000000}, + {0x5A08, 0x00000000}, +@@ -1479,7 +1684,19 @@ static const struct rtw89_reg2_def rtw89 + {0x5A18, 0x00000000}, + {0x5A1C, 0x00000000}, + {0x5A20, 0x00000000}, ++ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, + {0x5A24, 0x00050000}, ++ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x5A24, 0x00000000}, ++ {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x5A24, 0x00000000}, ++ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x5A24, 0x00000000}, ++ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x5A24, 0x00000000}, ++ {0xA0000000, 0x00000000}, ++ {0x5A24, 0x00050000}, ++ {0xB0000000, 0x00000000}, + {0x5A28, 0x00000000}, + {0x5A2C, 0x00000000}, + {0x5A30, 0x00000000}, +@@ -1487,14 +1704,38 @@ static const struct rtw89_reg2_def rtw89 + {0x5A38, 0x00000000}, + {0x5A3C, 0x00000000}, + {0x5A40, 0x00000000}, ++ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x5A44, 0x00000005}, ++ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x5A44, 0x00000000}, ++ {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x5A44, 0x00000000}, ++ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x5A44, 0x00000000}, ++ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x5A44, 0x00000000}, ++ {0xA0000000, 0x00000000}, + {0x5A44, 0x00000005}, ++ {0xB0000000, 0x00000000}, + {0x5A48, 0x00000000}, + {0x5A4C, 0x00000000}, + {0x5A50, 0x00000000}, + {0x5A54, 0x00000000}, + {0x5A58, 0x00000000}, + {0x5A5C, 0x00000000}, ++ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, + {0x5A60, 0x00050000}, ++ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x5A60, 0x00000000}, ++ {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x5A60, 0x00000000}, ++ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x5A60, 0x00000000}, ++ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x5A60, 0x00000000}, ++ {0xA0000000, 0x00000000}, ++ {0x5A60, 0x00050000}, ++ {0xB0000000, 0x00000000}, + {0x5A64, 0x00000000}, + {0x5A68, 0x00000000}, + {0x5A6C, 0x00000000}, +@@ -1514,12 +1755,49 @@ static const struct rtw89_reg2_def rtw89 + {0x5AA4, 0x00000000}, + {0x5AA8, 0x00000000}, + {0x5AAC, 0x00000000}, ++ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, + {0x5AB0, 0x00050005}, + {0x5AB4, 0x00050005}, + {0x5AB8, 0x00050005}, + {0x5ABC, 0x00050005}, + {0x5AC0, 0x00000005}, + {0x78B0, 0x00000800}, ++ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x5AB0, 0x00000000}, ++ {0x5AB4, 0x00000000}, ++ {0x5AB8, 0x00000000}, ++ {0x5ABC, 0x00000000}, ++ {0x5AC0, 0x00000000}, ++ {0x78B0, 0x00000000}, ++ {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x5AB0, 0x00000000}, ++ {0x5AB4, 0x00000000}, ++ {0x5AB8, 0x00000000}, ++ {0x5ABC, 0x00000000}, ++ {0x5AC0, 0x00000000}, ++ {0x78B0, 0x00000000}, ++ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x5AB0, 0x00000000}, ++ {0x5AB4, 0x00000000}, ++ {0x5AB8, 0x00000000}, ++ {0x5ABC, 0x00000000}, ++ {0x5AC0, 0x00000000}, ++ {0x78B0, 0x00000000}, ++ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x5AB0, 0x00000000}, ++ {0x5AB4, 0x00000000}, ++ {0x5AB8, 0x00000000}, ++ {0x5ABC, 0x00000000}, ++ {0x5AC0, 0x00000000}, ++ {0x78B0, 0x00000000}, ++ {0xA0000000, 0x00000000}, ++ {0x5AB0, 0x00050005}, ++ {0x5AB4, 0x00050005}, ++ {0x5AB8, 0x00050005}, ++ {0x5ABC, 0x00050005}, ++ {0x5AC0, 0x00000005}, ++ {0x78B0, 0x00000800}, ++ {0xB0000000, 0x00000000}, + {0x7A00, 0x00000000}, + {0x7A04, 0x00000000}, + {0x7A08, 0x00000000}, +@@ -1529,7 +1807,19 @@ static const struct rtw89_reg2_def rtw89 + {0x7A18, 0x00000000}, + {0x7A1C, 0x00000000}, + {0x7A20, 0x00000000}, ++ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, + {0x7A24, 0x00050000}, ++ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x7A24, 0x00000000}, ++ {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x7A24, 0x00000000}, ++ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x7A24, 0x00000000}, ++ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x7A24, 0x00000000}, ++ {0xA0000000, 0x00000000}, ++ {0x7A24, 0x00050000}, ++ {0xB0000000, 0x00000000}, + {0x7A28, 0x00000000}, + {0x7A2C, 0x00000000}, + {0x7A30, 0x00000000}, +@@ -1537,14 +1827,38 @@ static const struct rtw89_reg2_def rtw89 + {0x7A38, 0x00000000}, + {0x7A3C, 0x00000000}, + {0x7A40, 0x00000000}, ++ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, + {0x7A44, 0x00000005}, ++ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x7A44, 0x00000000}, ++ {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x7A44, 0x00000000}, ++ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x7A44, 0x00000000}, ++ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x7A44, 0x00000000}, ++ {0xA0000000, 0x00000000}, ++ {0x7A44, 0x00000005}, ++ {0xB0000000, 0x00000000}, + {0x7A48, 0x00000000}, + {0x7A4C, 0x00000000}, + {0x7A50, 0x00000000}, + {0x7A54, 0x00000000}, + {0x7A58, 0x00000000}, + {0x7A5C, 0x00000000}, ++ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x7A60, 0x00050000}, ++ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x7A60, 0x00000000}, ++ {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x7A60, 0x00000000}, ++ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x7A60, 0x00000000}, ++ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x7A60, 0x00000000}, ++ {0xA0000000, 0x00000000}, + {0x7A60, 0x00050000}, ++ {0xB0000000, 0x00000000}, + {0x7A64, 0x00000000}, + {0x7A68, 0x00000000}, + {0x7A6C, 0x00000000}, +@@ -1564,143 +1878,223 @@ static const struct rtw89_reg2_def rtw89 + {0x7AA4, 0x00000000}, + {0x7AA8, 0x00000000}, + {0x7AAC, 0x00000000}, ++ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, + {0x7AB0, 0x00050005}, + {0x7AB4, 0x00050005}, + {0x7AB8, 0x00050005}, + {0x7ABC, 0x00050005}, + {0x7AC0, 0x00000005}, ++ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x7AB0, 0x00000000}, ++ {0x7AB4, 0x00000000}, ++ {0x7AB8, 0x00000000}, ++ {0x7ABC, 0x00000000}, ++ {0x7AC0, 0x00000000}, ++ {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x7AB0, 0x00000000}, ++ {0x7AB4, 0x00000000}, ++ {0x7AB8, 0x00000000}, ++ {0x7ABC, 0x00000000}, ++ {0x7AC0, 0x00000000}, ++ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x7AB0, 0x00000000}, ++ {0x7AB4, 0x00000000}, ++ {0x7AB8, 0x00000000}, ++ {0x7ABC, 0x00000000}, ++ {0x7AC0, 0x00000000}, ++ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x7AB0, 0x00000000}, ++ {0x7AB4, 0x00000000}, ++ {0x7AB8, 0x00000000}, ++ {0x7ABC, 0x00000000}, ++ {0x7AC0, 0x00000000}, ++ {0xA0000000, 0x00000000}, ++ {0x7AB0, 0x00050005}, ++ {0x7AB4, 0x00050005}, ++ {0x7AB8, 0x00050005}, ++ {0x7ABC, 0x00050005}, ++ {0x7AC0, 0x00000005}, ++ {0xB0000000, 0x00000000}, + {0x0F0, 0x00010000}, +- {0x0F4, 0x00000018}, +- {0x0F8, 0x20220120}, ++ {0x0F4, 0x00000028}, ++ {0x0F8, 0x20220610}, + }; + + static const struct rtw89_reg2_def rtw89_8852c_phy_bb_reg_gain[] = { + {0xF0FF0000, 0x00000000}, + {0xF03300FF, 0x00000001}, +- {0x000, 0x01E3C39F}, +- {0x001, 0x00694727}, +- {0x002, 0x00005536}, +- {0x100, 0x02E3C39F}, +- {0x101, 0x0069472A}, ++ {0x000, 0x0EEECAA6}, ++ {0x001, 0x006C4B2C}, ++ {0x002, 0x00005636}, ++ {0x100, 0x0DEFCAA9}, ++ {0x101, 0x00694B2C}, + {0x102, 0x00005536}, + {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, + {0x10000, 0x1A02E1C9}, + {0x10001, 0x00644A30}, + {0x10002, 0x00006750}, + {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, +- {0x10000, 0x0EF4D1B9}, +- {0x10001, 0x00584125}, +- {0x10002, 0x00006750}, ++ {0x10000, 0x0BF1CEB6}, ++ {0x10001, 0x00434328}, ++ {0x10002, 0x00005050}, + {0xA0000000, 0x00000000}, +- {0x10000, 0x1A02E1C9}, +- {0x10001, 0x00644A30}, +- {0x10002, 0x00006750}, ++ {0x10000, 0x1D08E8D0}, ++ {0x10001, 0x00644C32}, ++ {0x10002, 0x00006650}, + {0xB0000000, 0x00000000}, + {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, + {0x10100, 0x1901E1C8}, + {0x10101, 0x0061482D}, + {0x10102, 0x00006750}, + {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, +- {0x10100, 0x04E8C5AD}, +- {0x10101, 0x00594125}, +- {0x10102, 0x00006850}, ++ {0x10100, 0x0BF0CEB8}, ++ {0x10101, 0x00424227}, ++ {0x10102, 0x00005050}, + {0xA0000000, 0x00000000}, +- {0x10100, 0x1901E1C8}, +- {0x10101, 0x0061482D}, +- {0x10102, 0x00006750}, ++ {0x10100, 0x1F0AECD5}, ++ {0x10101, 0x00634B31}, ++ {0x10102, 0x00006550}, + {0xB0000000, 0x00000000}, + {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, + {0x20000, 0x1601E2CA}, + {0x20001, 0x005D452A}, + {0x20002, 0x00006750}, + {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, +- {0x20000, 0x0EF4D3BB}, +- {0x20001, 0x00563F25}, +- {0x20002, 0x00006850}, ++ {0x20000, 0x0EF5D3BB}, ++ {0x20001, 0x00454529}, ++ {0x20002, 0x00005050}, + {0xA0000000, 0x00000000}, +- {0x20000, 0x1601E2CA}, +- {0x20001, 0x005D452A}, +- {0x20002, 0x00006750}, ++ {0x20000, 0x1904E6CE}, ++ {0x20001, 0x0060482D}, ++ {0x20002, 0x00006650}, + {0xB0000000, 0x00000000}, + {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, + {0x20100, 0x1901E1C8}, + {0x20101, 0x0061482D}, + {0x20102, 0x00006750}, + {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, +- {0x20100, 0x0BF1CFB7}, +- {0x20101, 0x00574025}, +- {0x20102, 0x00006750}, ++ {0x20100, 0x12F8D7C1}, ++ {0x20101, 0x004A4A2E}, ++ {0x20102, 0x00005050}, + {0xA0000000, 0x00000000}, +- {0x20100, 0x1901E1C8}, ++ {0x20100, 0x1F0AECD5}, + {0x20101, 0x0061482D}, +- {0x20102, 0x00006750}, ++ {0x20102, 0x00006550}, + {0xB0000000, 0x00000000}, + {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, + {0x30000, 0x1700E1CA}, + {0x30001, 0x005E472B}, + {0x30002, 0x00006750}, + {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, +- {0x30000, 0x05EFCEB7}, +- {0x30001, 0x004B351A}, +- {0x30002, 0x00006850}, ++ {0x30000, 0x0DF6D5BE}, ++ {0x30001, 0x00414126}, ++ {0x30002, 0x00005050}, + {0xA0000000, 0x00000000}, +- {0x30000, 0x1700E1CA}, +- {0x30001, 0x005E472B}, +- {0x30002, 0x00006750}, ++ {0x30000, 0x14FEE0CA}, ++ {0x30001, 0x005C4328}, ++ {0x30002, 0x00006650}, + {0xB0000000, 0x00000000}, + {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, + {0x30100, 0x14FEE0C9}, + {0x30101, 0x00594428}, + {0x30102, 0x00006650}, + {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, +- {0x30100, 0x0CF2D1B9}, +- {0x30101, 0x00563F24}, +- {0x30102, 0x00006750}, ++ {0x30100, 0x0EF5D5C0}, ++ {0x30101, 0x0045452A}, ++ {0x30102, 0x00005050}, + {0xA0000000, 0x00000000}, +- {0x30100, 0x14FEE0C9}, +- {0x30101, 0x00594428}, ++ {0x30100, 0x1F0AECD8}, ++ {0x30101, 0x00654C31}, + {0x30102, 0x00006650}, + {0xB0000000, 0x00000000}, +- {0x40000, 0x13FCDDC8}, +- {0x40001, 0x005D4328}, +- {0x40002, 0x00006850}, +- {0x40100, 0x14FEE3CF}, +- {0x40101, 0x00583E24}, +- {0x40102, 0x00006850}, +- {0x50000, 0x0DF4D6C6}, +- {0x50001, 0x00604227}, +- {0x50002, 0x00006850}, +- {0x50100, 0x1903E7D5}, +- {0x50101, 0x0061462B}, +- {0x50102, 0x00006850}, +- {0x60000, 0x0FF5D7C6}, +- {0x60001, 0x005D4429}, +- {0x60002, 0x00006850}, +- {0x60100, 0x12FADECF}, +- {0x60101, 0x005B4126}, +- {0x60102, 0x00006850}, +- {0x70000, 0x09F1D2C3}, +- {0x70001, 0x00554026}, +- {0x70002, 0x00006750}, +- {0x70100, 0x0CF5DACC}, +- {0x70101, 0x00563E25}, +- {0x70102, 0x00006750}, ++ {0x40000, 0x15FEE0CB}, ++ {0x40001, 0x0060462B}, ++ {0x40002, 0x00006450}, ++ {0x40100, 0x1902E5D2}, ++ {0x40101, 0x0063482E}, ++ {0x40102, 0x00006450}, ++ {0x50000, 0x1C04E6D3}, ++ {0x50001, 0x006B5034}, ++ {0x50002, 0x00006450}, ++ {0x50100, 0x2009EDDB}, ++ {0x50101, 0x006B5035}, ++ {0x50102, 0x00006450}, ++ {0x60000, 0x16FEE1CF}, ++ {0x60001, 0x00634A2E}, ++ {0x60002, 0x00006550}, ++ {0x60100, 0x14FDE2D2}, ++ {0x60101, 0x005E4429}, ++ {0x60102, 0x00006450}, ++ {0x70000, 0x0BF3D6C6}, ++ {0x70001, 0x00573F24}, ++ {0x70002, 0x00006550}, ++ {0x70100, 0x08F0D6C7}, ++ {0x70101, 0x0052391E}, ++ {0x70102, 0x00006450}, + {0x2000000, 0x02E4C4A0}, + {0x2000001, 0x006A4828}, + {0x2000100, 0x02E4C5A1}, + {0x2000101, 0x00664629}, ++ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, + {0x2010000, 0x05EBC8AF}, + {0x2010001, 0x00543D24}, ++ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x2010000, 0x08EDCAB2}, ++ {0x2010001, 0x00434327}, ++ {0xA0000000, 0x00000000}, ++ {0x2010000, 0x05EBC8AF}, ++ {0x2010001, 0x00543D24}, ++ {0xB0000000, 0x00000000}, ++ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, + {0x2010100, 0x07ECC9B0}, + {0x2010101, 0x005B4126}, ++ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x2010100, 0x08ECCBB2}, ++ {0x2010101, 0x003C3C20}, ++ {0xA0000000, 0x00000000}, ++ {0x2010100, 0x07ECC9B0}, ++ {0x2010101, 0x005B4126}, ++ {0xB0000000, 0x00000000}, ++ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, + {0x2020000, 0x05EDCCB2}, + {0x2020001, 0x004D361C}, ++ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x2020000, 0x0CF4D2BA}, ++ {0x2020001, 0x00404025}, ++ {0xA0000000, 0x00000000}, ++ {0x2020000, 0x05EDCCB2}, ++ {0x2020001, 0x004D361C}, ++ {0xB0000000, 0x00000000}, ++ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, + {0x2020100, 0x06ECCBB2}, + {0x2020101, 0x00553D22}, ++ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x2020100, 0x09EECDB8}, ++ {0x2020101, 0x00444428}, ++ {0xA0000000, 0x00000000}, ++ {0x2020100, 0x06ECCBB2}, ++ {0x2020101, 0x00553D22}, ++ {0xB0000000, 0x00000000}, ++ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, + {0x2030000, 0x02ECCCB3}, + {0x2030001, 0x00483118}, ++ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x2030000, 0x0DF8D6BF}, ++ {0x2030001, 0x003F3F24}, ++ {0xA0000000, 0x00000000}, ++ {0x2030000, 0x02ECCCB3}, ++ {0x2030001, 0x00483118}, ++ {0xB0000000, 0x00000000}, ++ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, + {0x2030100, 0x04ECCCB2}, + {0x2030101, 0x004F381C}, ++ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x2030100, 0x08EFCDBA}, ++ {0x2030101, 0x00414126}, ++ {0xA0000000, 0x00000000}, ++ {0x2030100, 0x04ECCCB2}, ++ {0x2030101, 0x004F381C}, ++ {0xB0000000, 0x00000000}, + {0x3000000, 0x00000000}, + {0x3000001, 0x00000000}, + {0x3000002, 0x00000000}, +@@ -1709,30 +2103,102 @@ static const struct rtw89_reg2_def rtw89 + {0x3000101, 0x00000000}, + {0x3000102, 0x00000000}, + {0x3000103, 0x00000000}, ++ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x3010000, 0x0E0CFB0A}, ++ {0x3010001, 0x00100F06}, ++ {0x3010002, 0x34333333}, ++ {0x3010003, 0x3434343C}, ++ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x3010000, 0x0E0CFB0A}, ++ {0x3010001, 0x00100F06}, ++ {0x3010002, 0x34333327}, ++ {0x3010003, 0x3434343C}, ++ {0xA0000000, 0x00000000}, + {0x3010000, 0x0E0CFB0A}, + {0x3010001, 0x00100F06}, + {0x3010002, 0x34333333}, + {0x3010003, 0x3434343C}, ++ {0xB0000000, 0x00000000}, ++ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, + {0x3010100, 0x0E0CFB0A}, + {0x3010101, 0x00100F06}, + {0x3010102, 0x34333333}, + {0x3010103, 0x3434343C}, ++ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x3010100, 0x0E0CFB0A}, ++ {0x3010101, 0x00100F06}, ++ {0x3010102, 0x34333327}, ++ {0x3010103, 0x3434343C}, ++ {0xA0000000, 0x00000000}, ++ {0x3010100, 0x0E0CFB0A}, ++ {0x3010101, 0x00100F06}, ++ {0x3010102, 0x34333333}, ++ {0x3010103, 0x3434343C}, ++ {0xB0000000, 0x00000000}, ++ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, + {0x3020000, 0x0E0CFB0A}, + {0x3020001, 0x00100F06}, + {0x3020002, 0x34333333}, + {0x3020003, 0x3434343C}, ++ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x3020000, 0x0E0CFB0A}, ++ {0x3020001, 0x00100F06}, ++ {0x3020002, 0x34333327}, ++ {0x3020003, 0x3434343C}, ++ {0xA0000000, 0x00000000}, ++ {0x3020000, 0x0E0CFB0A}, ++ {0x3020001, 0x00100F06}, ++ {0x3020002, 0x34333333}, ++ {0x3020003, 0x3434343C}, ++ {0xB0000000, 0x00000000}, ++ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, + {0x3020100, 0x0E0CFB0A}, + {0x3020101, 0x00100F06}, + {0x3020102, 0x34333333}, + {0x3020103, 0x3434343C}, ++ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x3020100, 0x0E0CFB0A}, ++ {0x3020101, 0x00100F06}, ++ {0x3020102, 0x34333327}, ++ {0x3020103, 0x3434343C}, ++ {0xA0000000, 0x00000000}, ++ {0x3020100, 0x0E0CFB0A}, ++ {0x3020101, 0x00100F06}, ++ {0x3020102, 0x34333333}, ++ {0x3020103, 0x3434343C}, ++ {0xB0000000, 0x00000000}, ++ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, + {0x3030000, 0x0E0CFB0A}, + {0x3030001, 0x00100F06}, + {0x3030002, 0x34333333}, + {0x3030003, 0x3434343C}, ++ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x3030000, 0x0E0CFB0A}, ++ {0x3030001, 0x00100F06}, ++ {0x3030002, 0x34333327}, ++ {0x3030003, 0x3434343C}, ++ {0xA0000000, 0x00000000}, ++ {0x3030000, 0x0E0CFB0A}, ++ {0x3030001, 0x00100F06}, ++ {0x3030002, 0x34333333}, ++ {0x3030003, 0x3434343C}, ++ {0xB0000000, 0x00000000}, ++ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, + {0x3030100, 0x0E0CFB0A}, + {0x3030101, 0x00100F06}, + {0x3030102, 0x34333333}, + {0x3030103, 0x3434343C}, ++ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x3030100, 0x0E0CFB0A}, ++ {0x3030101, 0x00100F06}, ++ {0x3030102, 0x34333327}, ++ {0x3030103, 0x3434343C}, ++ {0xA0000000, 0x00000000}, ++ {0x3030100, 0x0E0CFB0A}, ++ {0x3030101, 0x00100F06}, ++ {0x3030102, 0x34333333}, ++ {0x3030103, 0x3434343C}, ++ {0xB0000000, 0x00000000}, + {0x3040000, 0x0E0CFB0A}, + {0x3040001, 0x00100F06}, + {0x3040002, 0x343B3333}, +@@ -1765,6 +2231,310 @@ static const struct rtw89_reg2_def rtw89 + {0x3070101, 0x00100F06}, + {0x3070102, 0x3C3B3333}, + {0x3070103, 0x34343C3C}, ++ {0x4000000, 0x00000000}, ++ {0x4000001, 0x76543210}, ++ {0x4000002, 0x77777777}, ++ {0x4000003, 0x35374425}, ++ {0x4000004, 0x00000043}, ++ {0x4000005, 0x000038E8}, ++ {0x4000100, 0x00000000}, ++ {0x4000101, 0x76543210}, ++ {0x4000102, 0x77777777}, ++ {0x4000103, 0x35374425}, ++ {0x4000104, 0x00000043}, ++ {0x4000105, 0x000038E8}, ++ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x4010000, 0x00000000}, ++ {0x4010001, 0x76543210}, ++ {0x4010002, 0x77777777}, ++ {0x4010003, 0x35374425}, ++ {0x4010004, 0x00000042}, ++ {0x4010005, 0x000038E8}, ++ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x4010000, 0x0000FC50}, ++ {0x4010001, 0x51403210}, ++ {0x4010002, 0x76543276}, ++ {0x4010003, 0x3A4DAA3C}, ++ {0x4010004, 0x00000093}, ++ {0x4010005, 0x000040E4}, ++ {0xA0000000, 0x00000000}, ++ {0x4010000, 0x00000000}, ++ {0x4010001, 0x76543210}, ++ {0x4010002, 0x77777777}, ++ {0x4010003, 0x35374425}, ++ {0x4010004, 0x00000042}, ++ {0x4010005, 0x000038E8}, ++ {0xB0000000, 0x00000000}, ++ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x4010100, 0x00000000}, ++ {0x4010101, 0x76543210}, ++ {0x4010102, 0x77777777}, ++ {0x4010103, 0x35374425}, ++ {0x4010104, 0x00000042}, ++ {0x4010105, 0x000038E8}, ++ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x4010100, 0x0000FC50}, ++ {0x4010101, 0x51403210}, ++ {0x4010102, 0x76543276}, ++ {0x4010103, 0x3A4DAA3C}, ++ {0x4010104, 0x00000093}, ++ {0x4010105, 0x000040E4}, ++ {0xA0000000, 0x00000000}, ++ {0x4010100, 0x00000000}, ++ {0x4010101, 0x76543210}, ++ {0x4010102, 0x77777777}, ++ {0x4010103, 0x35374425}, ++ {0x4010104, 0x00000042}, ++ {0x4010105, 0x000038E8}, ++ {0xB0000000, 0x00000000}, ++ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x4020000, 0x00000000}, ++ {0x4020001, 0x76543210}, ++ {0x4020002, 0x77777777}, ++ {0x4020003, 0x35374425}, ++ {0x4020004, 0x00000042}, ++ {0x4020005, 0x000038E8}, ++ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x4020000, 0x0000FC50}, ++ {0x4020001, 0x51403210}, ++ {0x4020002, 0x76543276}, ++ {0x4020003, 0x4B4DAA3C}, ++ {0x4020004, 0x000000A3}, ++ {0x4020005, 0x000040E4}, ++ {0xA0000000, 0x00000000}, ++ {0x4020000, 0x00000000}, ++ {0x4020001, 0x76543210}, ++ {0x4020002, 0x77777777}, ++ {0x4020003, 0x35374425}, ++ {0x4020004, 0x00000042}, ++ {0x4020005, 0x000038E8}, ++ {0xB0000000, 0x00000000}, ++ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x4020100, 0x00000000}, ++ {0x4020101, 0x76543210}, ++ {0x4020102, 0x77777777}, ++ {0x4020103, 0x35374425}, ++ {0x4020104, 0x00000042}, ++ {0x4020105, 0x000038E8}, ++ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x4020100, 0x0000FC50}, ++ {0x4020101, 0x51403210}, ++ {0x4020102, 0x76543276}, ++ {0x4020103, 0x3A4DAA3C}, ++ {0x4020104, 0x00000093}, ++ {0x4020105, 0x000040E4}, ++ {0xA0000000, 0x00000000}, ++ {0x4020100, 0x00000000}, ++ {0x4020101, 0x76543210}, ++ {0x4020102, 0x77777777}, ++ {0x4020103, 0x35374425}, ++ {0x4020104, 0x00000042}, ++ {0x4020105, 0x000038E8}, ++ {0xB0000000, 0x00000000}, ++ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x4030000, 0x00000000}, ++ {0x4030001, 0x76543210}, ++ {0x4030002, 0x77777777}, ++ {0x4030003, 0x35374425}, ++ {0x4030004, 0x00000042}, ++ {0x4030005, 0x000038E8}, ++ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x4030000, 0x0000FC50}, ++ {0x4030001, 0x51403210}, ++ {0x4030002, 0x76543276}, ++ {0x4030003, 0x3A4DAA3C}, ++ {0x4030004, 0x00000093}, ++ {0x4030005, 0x000040E4}, ++ {0xA0000000, 0x00000000}, ++ {0x4030000, 0x00000000}, ++ {0x4030001, 0x76543210}, ++ {0x4030002, 0x77777777}, ++ {0x4030003, 0x35374425}, ++ {0x4030004, 0x00000042}, ++ {0x4030005, 0x000038E8}, ++ {0xB0000000, 0x00000000}, ++ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x4030100, 0x00000000}, ++ {0x4030101, 0x76543210}, ++ {0x4030102, 0x77777777}, ++ {0x4030103, 0x35374425}, ++ {0x4030104, 0x00000042}, ++ {0x4030105, 0x000038E8}, ++ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, ++ {0x4030100, 0x0000FC50}, ++ {0x4030101, 0x51403210}, ++ {0x4030102, 0x76543276}, ++ {0x4030103, 0x3A4DAA3C}, ++ {0x4030104, 0x00000093}, ++ {0x4030105, 0x000040E4}, ++ {0xA0000000, 0x00000000}, ++ {0x4030100, 0x00000000}, ++ {0x4030101, 0x76543210}, ++ {0x4030102, 0x77777777}, ++ {0x4030103, 0x35374425}, ++ {0x4030104, 0x00000042}, ++ {0x4030105, 0x000038E8}, ++ {0xB0000000, 0x00000000}, ++ {0x1000000, 0x00000008}, ++ {0x1000010, 0x00000008}, ++ {0x1000011, 0x00000000}, ++ {0x1000100, 0x00000004}, ++ {0x1000110, 0x00000004}, ++ {0x1000111, 0x00000000}, ++ {0x1010000, 0x00000004}, ++ {0x1010010, 0x00000004}, ++ {0x1010011, 0x00000000}, ++ {0x1010020, 0x00000004}, ++ {0x1010021, 0x00000000}, ++ {0x1010029, 0x00000000}, ++ {0x1010030, 0x00000000}, ++ {0x1010031, 0x00000000}, ++ {0x1010035, 0x00000000}, ++ {0x1010039, 0x00000000}, ++ {0x101003D, 0x00000000}, ++ {0x1010100, 0x00000010}, ++ {0x1010110, 0x00000010}, ++ {0x1010111, 0x00000000}, ++ {0x1010120, 0x00000010}, ++ {0x1010121, 0x00000000}, ++ {0x1010129, 0x00000000}, ++ {0x1010030, 0x00000000}, ++ {0x1010031, 0x00000000}, ++ {0x1010035, 0x00000000}, ++ {0x1010039, 0x00000000}, ++ {0x101003D, 0x00000000}, ++ {0x1020000, 0x000000FA}, ++ {0x1020010, 0x000000FA}, ++ {0x1020011, 0x00000000}, ++ {0x1020020, 0x000000FA}, ++ {0x1020021, 0x00000000}, ++ {0x1020029, 0x00000000}, ++ {0x1020030, 0x00000000}, ++ {0x1020031, 0x00000000}, ++ {0x1020035, 0x00000000}, ++ {0x1020039, 0x00000000}, ++ {0x102003D, 0x00000000}, ++ {0x1020100, 0x0000000D}, ++ {0x1020110, 0x0000000D}, ++ {0x1020111, 0x00000000}, ++ {0x1020120, 0x0000000D}, ++ {0x1020121, 0x00000000}, ++ {0x1020129, 0x00000000}, ++ {0x1020030, 0x00000000}, ++ {0x1020031, 0x00000000}, ++ {0x1020035, 0x00000000}, ++ {0x1020039, 0x00000000}, ++ {0x102003D, 0x00000000}, ++ {0x1030000, 0x000000E4}, ++ {0x1030010, 0x000000E4}, ++ {0x1030011, 0x00000000}, ++ {0x1030020, 0x0000E8E8}, ++ {0x1030021, 0x00000000}, ++ {0x1030029, 0x00000000}, ++ {0x1030030, 0x00000000}, ++ {0x1030031, 0x00000000}, ++ {0x1030035, 0x00000000}, ++ {0x1030039, 0x00000000}, ++ {0x103003D, 0x00000000}, ++ {0x1030100, 0x00000018}, ++ {0x1030110, 0x00000018}, ++ {0x1030111, 0x00000000}, ++ {0x1030120, 0x00000018}, ++ {0x1030121, 0x00000000}, ++ {0x1030129, 0x00000000}, ++ {0x1030030, 0x00000000}, ++ {0x1030031, 0x00000000}, ++ {0x1030035, 0x00000000}, ++ {0x1030039, 0x00000000}, ++ {0x103003D, 0x00000000}, ++ {0x1040000, 0x000000EE}, ++ {0x1040010, 0x000000EE}, ++ {0x1040011, 0x00000000}, ++ {0x1040020, 0x000000EE}, ++ {0x1040021, 0x00000000}, ++ {0x1040029, 0x00000000}, ++ {0x1040030, 0x000000EE}, ++ {0x1040031, 0x00000000}, ++ {0x1040035, 0x00000000}, ++ {0x1040039, 0x00000000}, ++ {0x104003D, 0x00000000}, ++ {0x1040100, 0x00000000}, ++ {0x1040110, 0x00000005}, ++ {0x1040111, 0x00000000}, ++ {0x1040120, 0x00000008}, ++ {0x1040121, 0x00000000}, ++ {0x1040129, 0x00000000}, ++ {0x1040030, 0x00000008}, ++ {0x1040031, 0x00000000}, ++ {0x1040035, 0x00000000}, ++ {0x1040039, 0x00000000}, ++ {0x104003D, 0x00000000}, ++ {0x1050000, 0x00000008}, ++ {0x1050010, 0x0000000B}, ++ {0x1050011, 0x00000000}, ++ {0x1050020, 0x00000015}, ++ {0x1050021, 0x00000000}, ++ {0x1050029, 0x00000000}, ++ {0x1050030, 0x00000010}, ++ {0x1050031, 0x00000000}, ++ {0x1050035, 0x00000000}, ++ {0x1050039, 0x00000000}, ++ {0x105003D, 0x00000000}, ++ {0x1050100, 0x00000016}, ++ {0x1050110, 0x00000016}, ++ {0x1050111, 0x0000F8F8}, ++ {0x1050120, 0x0000001A}, ++ {0x1050121, 0x00000000}, ++ {0x1050129, 0x00000000}, ++ {0x1050030, 0x0000001A}, ++ {0x1050031, 0x00000000}, ++ {0x1050035, 0x00000000}, ++ {0x1050039, 0x00000000}, ++ {0x105003D, 0x00000000}, ++ {0x1060000, 0x000000F8}, ++ {0x1060010, 0x000000F8}, ++ {0x1060011, 0x00000000}, ++ {0x1060020, 0x00000000}, ++ {0x1060021, 0x00000000}, ++ {0x1060029, 0x00000000}, ++ {0x1060030, 0x00000000}, ++ {0x1060031, 0x00000000}, ++ {0x1060035, 0x00000000}, ++ {0x1060039, 0x00000000}, ++ {0x106003D, 0x00000000}, ++ {0x1060100, 0x000000F6}, ++ {0x1060110, 0x000000F6}, ++ {0x1060111, 0x00000000}, ++ {0x1060120, 0x000000F6}, ++ {0x1060121, 0x00000000}, ++ {0x1060129, 0x00000000}, ++ {0x1060030, 0x00000000}, ++ {0x1060031, 0x00000000}, ++ {0x1060035, 0x00000000}, ++ {0x1060039, 0x00000000}, ++ {0x106003D, 0x00000000}, ++ {0x1070000, 0x000000E8}, ++ {0x1070010, 0x000000E8}, ++ {0x1070011, 0x00000000}, ++ {0x1070020, 0x000000E8}, ++ {0x1070021, 0x00000000}, ++ {0x1070029, 0x00000000}, ++ {0x1070030, 0x000000F0}, ++ {0x1070031, 0x00000000}, ++ {0x1070035, 0x00000000}, ++ {0x1070039, 0x00000000}, ++ {0x107003D, 0x00000000}, ++ {0x1070100, 0x000000E4}, ++ {0x1070110, 0x000000E4}, ++ {0x1070111, 0x00000000}, ++ {0x1070120, 0x000000E4}, ++ {0x1070121, 0x00000000}, ++ {0x1070129, 0x00000000}, ++ {0x1070030, 0x000000F0}, ++ {0x1070031, 0x00000000}, ++ {0x1070035, 0x00000000}, ++ {0x1070039, 0x00000000}, ++ {0x107003D, 0x00000000}, + }; + + static const struct rtw89_reg2_def rtw89_8852c_phy_radioa_regs[] = { +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw89/txrx.h linux-6.2/drivers/net/wireless/realtek/rtw89/txrx.h +--- linux-6.1/drivers/net/wireless/realtek/rtw89/txrx.h 2022-12-12 00:15:18.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw89/txrx.h 2022-12-24 00:49:25.786376835 +0200 +@@ -298,7 +298,9 @@ + le32_get_bits(*((const __le32 *)ie), GENMASK(11, 5)) + #define RTW89_GET_PHY_STS_IE01_CH_IDX(ie) \ + le32_get_bits(*((const __le32 *)ie), GENMASK(23, 16)) +-#define RTW89_GET_PHY_STS_IE01_CFO(ie) \ ++#define RTW89_GET_PHY_STS_IE01_FD_CFO(ie) \ ++ le32_get_bits(*((const __le32 *)(ie) + 1), GENMASK(19, 8)) ++#define RTW89_GET_PHY_STS_IE01_PREMB_CFO(ie) \ + le32_get_bits(*((const __le32 *)(ie) + 1), GENMASK(31, 20)) + + enum rtw89_tx_channel { +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw89/util.h linux-6.2/drivers/net/wireless/realtek/rtw89/util.h +--- linux-6.1/drivers/net/wireless/realtek/rtw89/util.h 2022-12-12 00:15:18.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw89/util.h 2022-12-24 00:49:25.786376835 +0200 +@@ -44,4 +44,15 @@ static inline s32 s32_div_u32_round_clos + return s32_div_u32_round_down(dividend + divisor / 2, divisor, NULL); + } + ++static inline void ether_addr_copy_mask(u8 *dst, const u8 *src, u8 mask) ++{ ++ int i; ++ ++ eth_zero_addr(dst); ++ for (i = 0; i < ETH_ALEN; i++) { ++ if (mask & BIT(i)) ++ dst[i] = src[i]; ++ } ++} ++ + #endif +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw89/wow.c linux-6.2/drivers/net/wireless/realtek/rtw89/wow.c +--- linux-6.1/drivers/net/wireless/realtek/rtw89/wow.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw89/wow.c 2022-12-24 00:49:25.786376835 +0200 +@@ -0,0 +1,859 @@ ++// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause ++/* Copyright(c) 2019-2022 Realtek Corporation ++ */ ++#include "cam.h" ++#include "core.h" ++#include "debug.h" ++#include "fw.h" ++#include "mac.h" ++#include "phy.h" ++#include "ps.h" ++#include "reg.h" ++#include "util.h" ++#include "wow.h" ++ ++static void rtw89_wow_leave_deep_ps(struct rtw89_dev *rtwdev) ++{ ++ __rtw89_leave_ps_mode(rtwdev); ++} ++ ++static void rtw89_wow_enter_deep_ps(struct rtw89_dev *rtwdev) ++{ ++ struct ieee80211_vif *wow_vif = rtwdev->wow.wow_vif; ++ struct rtw89_vif *rtwvif = (struct rtw89_vif *)wow_vif->drv_priv; ++ ++ __rtw89_enter_ps_mode(rtwdev, rtwvif); ++} ++ ++static void rtw89_wow_enter_lps(struct rtw89_dev *rtwdev) ++{ ++ struct ieee80211_vif *wow_vif = rtwdev->wow.wow_vif; ++ struct rtw89_vif *rtwvif = (struct rtw89_vif *)wow_vif->drv_priv; ++ ++ rtw89_enter_lps(rtwdev, rtwvif); ++} ++ ++static void rtw89_wow_leave_lps(struct rtw89_dev *rtwdev) ++{ ++ rtw89_leave_lps(rtwdev); ++} ++ ++static int rtw89_wow_config_mac(struct rtw89_dev *rtwdev, bool enable_wow) ++{ ++ int ret; ++ ++ if (enable_wow) { ++ ret = rtw89_mac_resize_ple_rx_quota(rtwdev, true); ++ if (ret) { ++ rtw89_err(rtwdev, "[ERR]patch rx qta %d\n", ret); ++ return ret; ++ } ++ rtw89_write32_set(rtwdev, R_AX_RX_FUNCTION_STOP, B_AX_HDR_RX_STOP); ++ rtw89_write32_clr(rtwdev, R_AX_RX_FLTR_OPT, B_AX_SNIFFER_MODE); ++ rtw89_mac_cfg_ppdu_status(rtwdev, RTW89_MAC_0, false); ++ rtw89_write32(rtwdev, R_AX_ACTION_FWD0, 0); ++ rtw89_write32(rtwdev, R_AX_ACTION_FWD1, 0); ++ rtw89_write32(rtwdev, R_AX_TF_FWD, 0); ++ rtw89_write32(rtwdev, R_AX_HW_RPT_FWD, 0); ++ } else { ++ ret = rtw89_mac_resize_ple_rx_quota(rtwdev, false); ++ if (ret) { ++ rtw89_err(rtwdev, "[ERR]patch rx qta %d\n", ret); ++ return ret; ++ } ++ rtw89_write32_clr(rtwdev, R_AX_RX_FUNCTION_STOP, B_AX_HDR_RX_STOP); ++ rtw89_mac_cfg_ppdu_status(rtwdev, RTW89_MAC_0, true); ++ rtw89_write32(rtwdev, R_AX_ACTION_FWD0, TRXCFG_MPDU_PROC_ACT_FRWD); ++ rtw89_write32(rtwdev, R_AX_TF_FWD, TRXCFG_MPDU_PROC_TF_FRWD); ++ } ++ ++ return 0; ++} ++ ++static void rtw89_wow_set_rx_filter(struct rtw89_dev *rtwdev, bool enable) ++{ ++ enum rtw89_mac_fwd_target fwd_target = enable ? ++ RTW89_FWD_DONT_CARE : ++ RTW89_FWD_TO_HOST; ++ ++ rtw89_mac_typ_fltr_opt(rtwdev, RTW89_MGNT, fwd_target, RTW89_MAC_0); ++ rtw89_mac_typ_fltr_opt(rtwdev, RTW89_CTRL, fwd_target, RTW89_MAC_0); ++ rtw89_mac_typ_fltr_opt(rtwdev, RTW89_DATA, fwd_target, RTW89_MAC_0); ++} ++ ++static void rtw89_wow_show_wakeup_reason(struct rtw89_dev *rtwdev) ++{ ++ enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id; ++ struct cfg80211_wowlan_nd_info nd_info; ++ struct cfg80211_wowlan_wakeup wakeup = { ++ .pattern_idx = -1, ++ }; ++ u32 wow_reason_reg; ++ u8 reason; ++ ++ if (chip_id == RTL8852A || chip_id == RTL8852B) ++ wow_reason_reg = R_AX_C2HREG_DATA3 + 3; ++ else ++ wow_reason_reg = R_AX_C2HREG_DATA3_V1 + 3; ++ ++ reason = rtw89_read8(rtwdev, wow_reason_reg); ++ ++ switch (reason) { ++ case RTW89_WOW_RSN_RX_DEAUTH: ++ wakeup.disconnect = true; ++ rtw89_debug(rtwdev, RTW89_DBG_WOW, "WOW: Rx deauth\n"); ++ break; ++ case RTW89_WOW_RSN_DISCONNECT: ++ wakeup.disconnect = true; ++ rtw89_debug(rtwdev, RTW89_DBG_WOW, "WOW: AP is off\n"); ++ break; ++ case RTW89_WOW_RSN_RX_MAGIC_PKT: ++ wakeup.magic_pkt = true; ++ rtw89_debug(rtwdev, RTW89_DBG_WOW, "WOW: Rx magic packet\n"); ++ break; ++ case RTW89_WOW_RSN_RX_GTK_REKEY: ++ wakeup.gtk_rekey_failure = true; ++ rtw89_debug(rtwdev, RTW89_DBG_WOW, "WOW: Rx gtk rekey\n"); ++ break; ++ case RTW89_WOW_RSN_RX_PATTERN_MATCH: ++ /* Current firmware and driver don't report pattern index ++ * Use pattern_idx to 0 defaultly. ++ */ ++ wakeup.pattern_idx = 0; ++ rtw89_debug(rtwdev, RTW89_DBG_WOW, "WOW: Rx pattern match packet\n"); ++ break; ++ case RTW89_WOW_RSN_RX_NLO: ++ /* Current firmware and driver don't report ssid index. ++ * Use 0 for n_matches based on its comment. ++ */ ++ nd_info.n_matches = 0; ++ wakeup.net_detect = &nd_info; ++ rtw89_debug(rtwdev, RTW89_DBG_WOW, "Rx NLO\n"); ++ break; ++ default: ++ rtw89_warn(rtwdev, "Unknown wakeup reason %x\n", reason); ++ ieee80211_report_wowlan_wakeup(rtwdev->wow.wow_vif, NULL, ++ GFP_KERNEL); ++ return; ++ } ++ ++ ieee80211_report_wowlan_wakeup(rtwdev->wow.wow_vif, &wakeup, ++ GFP_KERNEL); ++} ++ ++static void rtw89_wow_vif_iter(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif) ++{ ++ struct rtw89_wow_param *rtw_wow = &rtwdev->wow; ++ struct ieee80211_vif *vif = rtwvif_to_vif(rtwvif); ++ ++ /* Current wowlan function support setting of only one STATION vif. ++ * So when one suitable vif is found, stop the iteration. ++ */ ++ if (rtw_wow->wow_vif || vif->type != NL80211_IFTYPE_STATION) ++ return; ++ ++ switch (rtwvif->net_type) { ++ case RTW89_NET_TYPE_INFRA: ++ rtw_wow->wow_vif = vif; ++ break; ++ case RTW89_NET_TYPE_NO_LINK: ++ default: ++ break; ++ } ++} ++ ++static u16 __rtw89_cal_crc16(u8 data, u16 crc) ++{ ++ u8 shift_in, data_bit; ++ u8 crc_bit4, crc_bit11, crc_bit15; ++ u16 crc_result; ++ int index; ++ ++ for (index = 0; index < 8; index++) { ++ crc_bit15 = crc & BIT(15) ? 1 : 0; ++ data_bit = data & BIT(index) ? 1 : 0; ++ shift_in = crc_bit15 ^ data_bit; ++ ++ crc_result = crc << 1; ++ ++ if (shift_in == 0) ++ crc_result &= ~BIT(0); ++ else ++ crc_result |= BIT(0); ++ ++ crc_bit11 = (crc & BIT(11) ? 1 : 0) ^ shift_in; ++ ++ if (crc_bit11 == 0) ++ crc_result &= ~BIT(12); ++ else ++ crc_result |= BIT(12); ++ ++ crc_bit4 = (crc & BIT(4) ? 1 : 0) ^ shift_in; ++ ++ if (crc_bit4 == 0) ++ crc_result &= ~BIT(5); ++ else ++ crc_result |= BIT(5); ++ ++ crc = crc_result; ++ } ++ return crc; ++} ++ ++static u16 rtw89_calc_crc(u8 *pdata, int length) ++{ ++ u16 crc = 0xffff; ++ int i; ++ ++ for (i = 0; i < length; i++) ++ crc = __rtw89_cal_crc16(pdata[i], crc); ++ ++ /* get 1' complement */ ++ return ~crc; ++} ++ ++static int rtw89_wow_pattern_get_type(struct rtw89_vif *rtwvif, ++ struct rtw89_wow_cam_info *rtw_pattern, ++ const u8 *pattern, u8 da_mask) ++{ ++ u8 da[ETH_ALEN]; ++ ++ ether_addr_copy_mask(da, pattern, da_mask); ++ ++ /* Each pattern is divided into different kinds by DA address ++ * a. DA is broadcast address: set bc = 0; ++ * b. DA is multicast address: set mc = 0 ++ * c. DA is unicast address same as dev's mac address: set uc = 0 ++ * d. DA is unmasked. Also called wildcard type: set uc = bc = mc = 0 ++ * e. Others is invalid type. ++ */ ++ ++ if (is_broadcast_ether_addr(da)) ++ rtw_pattern->bc = true; ++ else if (is_multicast_ether_addr(da)) ++ rtw_pattern->mc = true; ++ else if (ether_addr_equal(da, rtwvif->mac_addr) && ++ da_mask == GENMASK(5, 0)) ++ rtw_pattern->uc = true; ++ else if (!da_mask) /*da_mask == 0 mean wildcard*/ ++ return 0; ++ else ++ return -EPERM; ++ ++ return 0; ++} ++ ++static int rtw89_wow_pattern_generate(struct rtw89_dev *rtwdev, ++ struct rtw89_vif *rtwvif, ++ const struct cfg80211_pkt_pattern *pkt_pattern, ++ struct rtw89_wow_cam_info *rtw_pattern) ++{ ++ u8 mask_hw[RTW89_MAX_PATTERN_MASK_SIZE * 4] = {0}; ++ u8 content[RTW89_MAX_PATTERN_SIZE] = {0}; ++ const u8 *mask; ++ const u8 *pattern; ++ u8 mask_len; ++ u16 count; ++ u32 len; ++ int i, ret; ++ ++ pattern = pkt_pattern->pattern; ++ len = pkt_pattern->pattern_len; ++ mask = pkt_pattern->mask; ++ mask_len = DIV_ROUND_UP(len, 8); ++ memset(rtw_pattern, 0, sizeof(*rtw_pattern)); ++ ++ ret = rtw89_wow_pattern_get_type(rtwvif, rtw_pattern, pattern, ++ mask[0] & GENMASK(5, 0)); ++ if (ret) ++ return ret; ++ ++ /* translate mask from os to mask for hw ++ * pattern from OS uses 'ethenet frame', like this: ++ * | 6 | 6 | 2 | 20 | Variable | 4 | ++ * |--------+--------+------+-----------+------------+-----| ++ * | 802.3 Mac Header | IP Header | TCP Packet | FCS | ++ * | DA | SA | Type | ++ * ++ * BUT, packet catched by our HW is in '802.11 frame', begin from LLC ++ * | 24 or 30 | 6 | 2 | 20 | Variable | 4 | ++ * |-------------------+--------+------+-----------+------------+-----| ++ * | 802.11 MAC Header | LLC | IP Header | TCP Packet | FCS | ++ * | Others | Tpye | ++ * ++ * Therefore, we need translate mask_from_OS to mask_to_hw. ++ * We should left-shift mask by 6 bits, then set the new bit[0~5] = 0, ++ * because new mask[0~5] means 'SA', but our HW packet begins from LLC, ++ * bit[0~5] corresponds to first 6 Bytes in LLC, they just don't match. ++ */ ++ ++ /* Shift 6 bits */ ++ for (i = 0; i < mask_len - 1; i++) { ++ mask_hw[i] = u8_get_bits(mask[i], GENMASK(7, 6)) | ++ u8_get_bits(mask[i + 1], GENMASK(5, 0)) << 2; ++ } ++ mask_hw[i] = u8_get_bits(mask[i], GENMASK(7, 6)); ++ ++ /* Set bit 0-5 to zero */ ++ mask_hw[0] &= ~GENMASK(5, 0); ++ ++ memcpy(rtw_pattern->mask, mask_hw, sizeof(rtw_pattern->mask)); ++ ++ /* To get the wake up pattern from the mask. ++ * We do not count first 12 bits which means ++ * DA[6] and SA[6] in the pattern to match HW design. ++ */ ++ count = 0; ++ for (i = 12; i < len; i++) { ++ if ((mask[i / 8] >> (i % 8)) & 0x01) { ++ content[count] = pattern[i]; ++ count++; ++ } ++ } ++ ++ rtw_pattern->crc = rtw89_calc_crc(content, count); ++ ++ return 0; ++} ++ ++static int rtw89_wow_parse_patterns(struct rtw89_dev *rtwdev, ++ struct rtw89_vif *rtwvif, ++ struct cfg80211_wowlan *wowlan) ++{ ++ struct rtw89_wow_param *rtw_wow = &rtwdev->wow; ++ struct rtw89_wow_cam_info *rtw_pattern = rtw_wow->patterns; ++ int i; ++ int ret; ++ ++ if (!wowlan->n_patterns || !wowlan->patterns) ++ return 0; ++ ++ for (i = 0; i < wowlan->n_patterns; i++) { ++ rtw_pattern = &rtw_wow->patterns[i]; ++ ret = rtw89_wow_pattern_generate(rtwdev, rtwvif, ++ &wowlan->patterns[i], ++ rtw_pattern); ++ if (ret) { ++ rtw89_err(rtwdev, "failed to generate pattern(%d)\n", i); ++ rtw_wow->pattern_cnt = 0; ++ return ret; ++ } ++ ++ rtw_pattern->r_w = true; ++ rtw_pattern->idx = i; ++ rtw_pattern->negative_pattern_match = false; ++ rtw_pattern->skip_mac_hdr = true; ++ rtw_pattern->valid = true; ++ } ++ rtw_wow->pattern_cnt = wowlan->n_patterns; ++ ++ return 0; ++} ++ ++static void rtw89_wow_pattern_clear_cam(struct rtw89_dev *rtwdev) ++{ ++ struct rtw89_wow_param *rtw_wow = &rtwdev->wow; ++ struct rtw89_wow_cam_info *rtw_pattern = rtw_wow->patterns; ++ int i = 0; ++ ++ for (i = 0; i < rtw_wow->pattern_cnt; i++) { ++ rtw_pattern = &rtw_wow->patterns[i]; ++ rtw_pattern->valid = false; ++ rtw89_fw_wow_cam_update(rtwdev, rtw_pattern); ++ } ++} ++ ++static void rtw89_wow_pattern_write(struct rtw89_dev *rtwdev) ++{ ++ struct rtw89_wow_param *rtw_wow = &rtwdev->wow; ++ struct rtw89_wow_cam_info *rtw_pattern = rtw_wow->patterns; ++ int i; ++ ++ for (i = 0; i < rtw_wow->pattern_cnt; i++) ++ rtw89_fw_wow_cam_update(rtwdev, rtw_pattern + i); ++} ++ ++static void rtw89_wow_pattern_clear(struct rtw89_dev *rtwdev) ++{ ++ struct rtw89_wow_param *rtw_wow = &rtwdev->wow; ++ ++ rtw89_wow_pattern_clear_cam(rtwdev); ++ ++ rtw_wow->pattern_cnt = 0; ++ memset(rtw_wow->patterns, 0, sizeof(rtw_wow->patterns)); ++} ++ ++static void rtw89_wow_clear_wakeups(struct rtw89_dev *rtwdev) ++{ ++ struct rtw89_wow_param *rtw_wow = &rtwdev->wow; ++ ++ rtw_wow->wow_vif = NULL; ++ rtw89_core_release_all_bits_map(rtw_wow->flags, RTW89_WOW_FLAG_NUM); ++ rtw_wow->pattern_cnt = 0; ++} ++ ++static int rtw89_wow_set_wakeups(struct rtw89_dev *rtwdev, ++ struct cfg80211_wowlan *wowlan) ++{ ++ struct rtw89_wow_param *rtw_wow = &rtwdev->wow; ++ struct rtw89_vif *rtwvif; ++ ++ if (wowlan->disconnect) ++ set_bit(RTW89_WOW_FLAG_EN_DISCONNECT, rtw_wow->flags); ++ if (wowlan->magic_pkt) ++ set_bit(RTW89_WOW_FLAG_EN_MAGIC_PKT, rtw_wow->flags); ++ ++ rtw89_for_each_rtwvif(rtwdev, rtwvif) ++ rtw89_wow_vif_iter(rtwdev, rtwvif); ++ ++ if (!rtw_wow->wow_vif) ++ return -EPERM; ++ ++ rtwvif = (struct rtw89_vif *)rtw_wow->wow_vif->drv_priv; ++ return rtw89_wow_parse_patterns(rtwdev, rtwvif, wowlan); ++} ++ ++static int rtw89_wow_cfg_wake(struct rtw89_dev *rtwdev, bool wow) ++{ ++ struct rtw89_wow_param *rtw_wow = &rtwdev->wow; ++ struct ieee80211_vif *wow_vif = rtw_wow->wow_vif; ++ struct rtw89_vif *rtwvif = (struct rtw89_vif *)wow_vif->drv_priv; ++ struct ieee80211_sta *wow_sta; ++ struct rtw89_sta *rtwsta = NULL; ++ bool is_conn = true; ++ int ret; ++ ++ wow_sta = ieee80211_find_sta(wow_vif, rtwvif->bssid); ++ if (wow_sta) ++ rtwsta = (struct rtw89_sta *)wow_sta->drv_priv; ++ else ++ is_conn = false; ++ ++ if (wow) { ++ if (rtw_wow->pattern_cnt) ++ rtwvif->wowlan_pattern = true; ++ if (test_bit(RTW89_WOW_FLAG_EN_MAGIC_PKT, rtw_wow->flags)) ++ rtwvif->wowlan_magic = true; ++ } else { ++ rtwvif->wowlan_pattern = false; ++ rtwvif->wowlan_magic = false; ++ } ++ ++ ret = rtw89_fw_h2c_wow_wakeup_ctrl(rtwdev, rtwvif, wow); ++ if (ret) { ++ rtw89_err(rtwdev, "failed to fw wow wakeup ctrl\n"); ++ return ret; ++ } ++ ++ if (wow) { ++ ret = rtw89_chip_h2c_dctl_sec_cam(rtwdev, rtwvif, rtwsta); ++ if (ret) { ++ rtw89_err(rtwdev, "failed to update dctl cam sec entry: %d\n", ++ ret); ++ return ret; ++ } ++ } ++ ++ ret = rtw89_fw_h2c_join_info(rtwdev, rtwvif, rtwsta, !is_conn); ++ if (ret) { ++ rtw89_warn(rtwdev, "failed to send h2c join info\n"); ++ return ret; ++ } ++ ++ ret = rtw89_fw_h2c_cam(rtwdev, rtwvif, rtwsta, NULL); ++ if (ret) { ++ rtw89_warn(rtwdev, "failed to send h2c cam\n"); ++ return ret; ++ } ++ ++ ret = rtw89_fw_h2c_wow_global(rtwdev, rtwvif, wow); ++ if (ret) { ++ rtw89_err(rtwdev, "failed to fw wow global\n"); ++ return ret; ++ } ++ ++ return 0; ++} ++ ++static int rtw89_wow_check_fw_status(struct rtw89_dev *rtwdev, bool wow_enable) ++{ ++ u8 polling; ++ int ret; ++ ++ ret = read_poll_timeout_atomic(rtw89_read8_mask, polling, ++ wow_enable == !!polling, ++ 50, 50000, false, rtwdev, ++ R_AX_WOW_CTRL, B_AX_WOW_WOWEN); ++ if (ret) ++ rtw89_err(rtwdev, "failed to check wow status %s\n", ++ wow_enable ? "enabled" : "disabled"); ++ return ret; ++} ++ ++static void rtw89_wow_release_pkt_list(struct rtw89_dev *rtwdev) ++{ ++ struct rtw89_wow_param *rtw_wow = &rtwdev->wow; ++ struct list_head *pkt_list = &rtw_wow->pkt_list; ++ struct rtw89_pktofld_info *info, *tmp; ++ ++ list_for_each_entry_safe(info, tmp, pkt_list, list) { ++ rtw89_fw_h2c_del_pkt_offload(rtwdev, info->id); ++ rtw89_core_release_bit_map(rtwdev->pkt_offload, ++ info->id); ++ list_del(&info->list); ++ kfree(info); ++ } ++} ++ ++static int rtw89_wow_swap_fw(struct rtw89_dev *rtwdev, bool wow) ++{ ++ enum rtw89_fw_type fw_type = wow ? RTW89_FW_WOWLAN : RTW89_FW_NORMAL; ++ struct rtw89_wow_param *rtw_wow = &rtwdev->wow; ++ struct ieee80211_vif *wow_vif = rtw_wow->wow_vif; ++ struct rtw89_vif *rtwvif = (struct rtw89_vif *)wow_vif->drv_priv; ++ struct ieee80211_sta *wow_sta; ++ struct rtw89_sta *rtwsta = NULL; ++ bool is_conn = true; ++ int ret; ++ ++ rtw89_hci_disable_intr(rtwdev); ++ ++ wow_sta = ieee80211_find_sta(wow_vif, rtwvif->bssid); ++ if (wow_sta) ++ rtwsta = (struct rtw89_sta *)wow_sta->drv_priv; ++ else ++ is_conn = false; ++ ++ ret = rtw89_fw_download(rtwdev, fw_type); ++ if (ret) { ++ rtw89_warn(rtwdev, "download fw failed\n"); ++ return ret; ++ } ++ ++ rtw89_phy_init_rf_reg(rtwdev, true); ++ ++ ret = rtw89_fw_h2c_role_maintain(rtwdev, rtwvif, rtwsta, ++ RTW89_ROLE_FW_RESTORE); ++ if (ret) { ++ rtw89_warn(rtwdev, "failed to send h2c role maintain\n"); ++ return ret; ++ } ++ ++ ret = rtw89_fw_h2c_assoc_cmac_tbl(rtwdev, wow_vif, wow_sta); ++ if (ret) { ++ rtw89_warn(rtwdev, "failed to send h2c assoc cmac tbl\n"); ++ return ret; ++ } ++ ++ if (!is_conn) ++ rtw89_cam_reset_keys(rtwdev); ++ ++ ret = rtw89_fw_h2c_join_info(rtwdev, rtwvif, rtwsta, !is_conn); ++ if (ret) { ++ rtw89_warn(rtwdev, "failed to send h2c join info\n"); ++ return ret; ++ } ++ ++ ret = rtw89_fw_h2c_cam(rtwdev, rtwvif, rtwsta, NULL); ++ if (ret) { ++ rtw89_warn(rtwdev, "failed to send h2c cam\n"); ++ return ret; ++ } ++ ++ if (is_conn) { ++ rtw89_phy_ra_assoc(rtwdev, wow_sta); ++ rtw89_phy_set_bss_color(rtwdev, wow_vif); ++ rtw89_chip_cfg_txpwr_ul_tb_offset(rtwdev, wow_vif); ++ } ++ ++ rtw89_mac_hw_mgnt_sec(rtwdev, wow); ++ rtw89_hci_enable_intr(rtwdev); ++ ++ return 0; ++} ++ ++static int rtw89_wow_enable_trx_pre(struct rtw89_dev *rtwdev) ++{ ++ int ret; ++ ++ rtw89_hci_ctrl_txdma_ch(rtwdev, false); ++ rtw89_hci_ctrl_txdma_fw_ch(rtwdev, true); ++ ++ rtw89_mac_ptk_drop_by_band_and_wait(rtwdev, RTW89_MAC_0); ++ ++ ret = rtw89_hci_poll_txdma_ch(rtwdev); ++ if (ret) { ++ rtw89_err(rtwdev, "txdma ch busy\n"); ++ return ret; ++ } ++ rtw89_wow_set_rx_filter(rtwdev, true); ++ ++ ret = rtw89_mac_cfg_ppdu_status(rtwdev, RTW89_MAC_0, false); ++ if (ret) { ++ rtw89_err(rtwdev, "cfg ppdu status\n"); ++ return ret; ++ } ++ ++ return 0; ++} ++ ++static int rtw89_wow_enable_trx_post(struct rtw89_dev *rtwdev) ++{ ++ int ret; ++ ++ rtw89_hci_disable_intr(rtwdev); ++ rtw89_hci_ctrl_trxhci(rtwdev, false); ++ ++ ret = rtw89_hci_poll_txdma_ch(rtwdev); ++ if (ret) { ++ rtw89_err(rtwdev, "failed to poll txdma ch idle pcie\n"); ++ return ret; ++ } ++ ++ ret = rtw89_wow_config_mac(rtwdev, true); ++ if (ret) { ++ rtw89_err(rtwdev, "failed to config mac\n"); ++ return ret; ++ } ++ ++ rtw89_wow_set_rx_filter(rtwdev, false); ++ rtw89_hci_reset(rtwdev); ++ ++ return 0; ++} ++ ++static int rtw89_wow_disable_trx_pre(struct rtw89_dev *rtwdev) ++{ ++ int ret; ++ ++ rtw89_hci_clr_idx_all(rtwdev); ++ ++ ret = rtw89_hci_rst_bdram(rtwdev); ++ if (ret) { ++ rtw89_warn(rtwdev, "reset bdram busy\n"); ++ return ret; ++ } ++ ++ rtw89_hci_ctrl_trxhci(rtwdev, true); ++ rtw89_hci_ctrl_txdma_ch(rtwdev, true); ++ ++ ret = rtw89_wow_config_mac(rtwdev, false); ++ if (ret) { ++ rtw89_err(rtwdev, "failed to config mac\n"); ++ return ret; ++ } ++ rtw89_hci_enable_intr(rtwdev); ++ ++ return 0; ++} ++ ++static int rtw89_wow_disable_trx_post(struct rtw89_dev *rtwdev) ++{ ++ int ret; ++ ++ ret = rtw89_mac_cfg_ppdu_status(rtwdev, RTW89_MAC_0, true); ++ if (ret) ++ rtw89_err(rtwdev, "cfg ppdu status\n"); ++ ++ return ret; ++} ++ ++static int rtw89_wow_fw_start(struct rtw89_dev *rtwdev) ++{ ++ struct rtw89_wow_param *rtw_wow = &rtwdev->wow; ++ struct rtw89_vif *rtwvif = (struct rtw89_vif *)rtw_wow->wow_vif->drv_priv; ++ int ret; ++ ++ rtw89_wow_pattern_write(rtwdev); ++ ++ ret = rtw89_fw_h2c_keep_alive(rtwdev, rtwvif, true); ++ if (ret) { ++ rtw89_err(rtwdev, "wow: failed to enable keep alive\n"); ++ return ret; ++ } ++ ++ ret = rtw89_fw_h2c_disconnect_detect(rtwdev, rtwvif, true); ++ if (ret) { ++ rtw89_err(rtwdev, "wow: failed to enable disconnect detect\n"); ++ goto out; ++ } ++ ++ ret = rtw89_wow_cfg_wake(rtwdev, true); ++ if (ret) { ++ rtw89_err(rtwdev, "wow: failed to config wake\n"); ++ goto out; ++ } ++ ++ ret = rtw89_wow_check_fw_status(rtwdev, true); ++ if (ret) { ++ rtw89_err(rtwdev, "wow: failed to check enable fw ready\n"); ++ goto out; ++ } ++ ++out: ++ return ret; ++} ++ ++static int rtw89_wow_fw_stop(struct rtw89_dev *rtwdev) ++{ ++ struct rtw89_wow_param *rtw_wow = &rtwdev->wow; ++ struct rtw89_vif *rtwvif = (struct rtw89_vif *)rtw_wow->wow_vif->drv_priv; ++ int ret; ++ ++ rtw89_wow_pattern_clear(rtwdev); ++ ++ ret = rtw89_fw_h2c_keep_alive(rtwdev, rtwvif, false); ++ if (ret) { ++ rtw89_err(rtwdev, "wow: failed to disable keep alive\n"); ++ goto out; ++ } ++ ++ rtw89_wow_release_pkt_list(rtwdev); ++ ++ ret = rtw89_fw_h2c_disconnect_detect(rtwdev, rtwvif, false); ++ if (ret) { ++ rtw89_err(rtwdev, "wow: failed to disable disconnect detect\n"); ++ goto out; ++ } ++ ++ ret = rtw89_wow_cfg_wake(rtwdev, false); ++ if (ret) { ++ rtw89_err(rtwdev, "wow: failed to disable config wake\n"); ++ goto out; ++ } ++ ++ ret = rtw89_wow_check_fw_status(rtwdev, false); ++ if (ret) { ++ rtw89_err(rtwdev, "wow: failed to check disable fw ready\n"); ++ goto out; ++ } ++ ++out: ++ return ret; ++} ++ ++static int rtw89_wow_enable(struct rtw89_dev *rtwdev) ++{ ++ int ret; ++ ++ set_bit(RTW89_FLAG_WOWLAN, rtwdev->flags); ++ ++ ret = rtw89_wow_enable_trx_pre(rtwdev); ++ if (ret) { ++ rtw89_err(rtwdev, "wow: failed to enable trx_pre\n"); ++ goto out; ++ } ++ ++ ret = rtw89_wow_swap_fw(rtwdev, true); ++ if (ret) { ++ rtw89_err(rtwdev, "wow: failed to swap to wow fw\n"); ++ goto out; ++ } ++ ++ ret = rtw89_wow_fw_start(rtwdev); ++ if (ret) { ++ rtw89_err(rtwdev, "wow: failed to let wow fw start\n"); ++ goto out; ++ } ++ ++ rtw89_wow_enter_lps(rtwdev); ++ ++ ret = rtw89_wow_enable_trx_post(rtwdev); ++ if (ret) { ++ rtw89_err(rtwdev, "wow: failed to enable trx_post\n"); ++ goto out; ++ } ++ ++ return 0; ++ ++out: ++ clear_bit(RTW89_FLAG_WOWLAN, rtwdev->flags); ++ return ret; ++} ++ ++static int rtw89_wow_disable(struct rtw89_dev *rtwdev) ++{ ++ int ret; ++ ++ ret = rtw89_wow_disable_trx_pre(rtwdev); ++ if (ret) { ++ rtw89_err(rtwdev, "wow: failed to disable trx_pre\n"); ++ goto out; ++ } ++ ++ rtw89_wow_leave_lps(rtwdev); ++ ++ ret = rtw89_wow_fw_stop(rtwdev); ++ if (ret) { ++ rtw89_err(rtwdev, "wow: failed to swap to normal fw\n"); ++ goto out; ++ } ++ ++ ret = rtw89_wow_swap_fw(rtwdev, false); ++ if (ret) { ++ rtw89_err(rtwdev, "wow: failed to disable trx_post\n"); ++ goto out; ++ } ++ ++ ret = rtw89_wow_disable_trx_post(rtwdev); ++ if (ret) { ++ rtw89_err(rtwdev, "wow: failed to disable trx_pre\n"); ++ goto out; ++ } ++ ++out: ++ clear_bit(RTW89_FLAG_WOWLAN, rtwdev->flags); ++ return ret; ++} ++ ++int rtw89_wow_resume(struct rtw89_dev *rtwdev) ++{ ++ int ret; ++ ++ if (!test_bit(RTW89_FLAG_WOWLAN, rtwdev->flags)) { ++ rtw89_err(rtwdev, "wow is not enabled\n"); ++ ret = -EPERM; ++ goto out; ++ } ++ ++ if (!rtw89_mac_get_power_state(rtwdev)) { ++ rtw89_err(rtwdev, "chip is no power when resume\n"); ++ ret = -EPERM; ++ goto out; ++ } ++ ++ rtw89_wow_leave_deep_ps(rtwdev); ++ ++ rtw89_wow_show_wakeup_reason(rtwdev); ++ ++ ret = rtw89_wow_disable(rtwdev); ++ if (ret) ++ rtw89_err(rtwdev, "failed to disable wow\n"); ++ ++out: ++ rtw89_wow_clear_wakeups(rtwdev); ++ return ret; ++} ++ ++int rtw89_wow_suspend(struct rtw89_dev *rtwdev, struct cfg80211_wowlan *wowlan) ++{ ++ int ret; ++ ++ ret = rtw89_wow_set_wakeups(rtwdev, wowlan); ++ if (ret) { ++ rtw89_err(rtwdev, "failed to set wakeup event\n"); ++ return ret; ++ } ++ ++ rtw89_wow_leave_lps(rtwdev); ++ ++ ret = rtw89_wow_enable(rtwdev); ++ if (ret) { ++ rtw89_err(rtwdev, "failed to enable wow\n"); ++ return ret; ++ } ++ ++ rtw89_wow_enter_deep_ps(rtwdev); ++ ++ return 0; ++} +diff -Nurp linux-6.1/drivers/net/wireless/realtek/rtw89/wow.h linux-6.2/drivers/net/wireless/realtek/rtw89/wow.h +--- linux-6.1/drivers/net/wireless/realtek/rtw89/wow.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.2/drivers/net/wireless/realtek/rtw89/wow.h 2022-12-24 00:49:25.786376835 +0200 +@@ -0,0 +1,21 @@ ++/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ ++/* Copyright(c) 2019-2022 Realtek Corporation ++ */ ++ ++#ifndef __RTW89_WOW_H__ ++#define __RTW89_WOW_H__ ++ ++enum rtw89_wake_reason { ++ RTW89_WOW_RSN_RX_PTK_REKEY = 0x1, ++ RTW89_WOW_RSN_RX_GTK_REKEY = 0x2, ++ RTW89_WOW_RSN_RX_DEAUTH = 0x8, ++ RTW89_WOW_RSN_DISCONNECT = 0x10, ++ RTW89_WOW_RSN_RX_MAGIC_PKT = 0x21, ++ RTW89_WOW_RSN_RX_PATTERN_MATCH = 0x23, ++ RTW89_WOW_RSN_RX_NLO = 0x55, ++}; ++ ++int rtw89_wow_suspend(struct rtw89_dev *rtwdev, struct cfg80211_wowlan *wowlan); ++int rtw89_wow_resume(struct rtw89_dev *rtwdev); ++ ++#endif diff --git a/kernel/tools/cpupowertools/files/patches/mageia/net-wireless-rtw89-add-Realtek-802.11ax-driver.patch b/kernel/tools/cpupowertools/files/patches/mageia/net-wireless-rtw89-add-Realtek-802.11ax-driver.patch deleted file mode 100644 index 29008c27..00000000 --- a/kernel/tools/cpupowertools/files/patches/mageia/net-wireless-rtw89-add-Realtek-802.11ax-driver.patch +++ /dev/null @@ -1,91474 +0,0 @@ -From e3ec7017f6a20d12ddd9fe23d345ebb7b8c104dd Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Mon, 11 Oct 2021 14:47:27 +0300 -Subject: [PATCH] rtw89: add Realtek 802.11ax driver - -This driver named rtw89, which is the next generation of rtw88, supports -Realtek 8852AE 802.11ax 2x2 chip whose new features are OFDMA, DBCC, -Spatial reuse, TWT and BSS coloring; now some of them aren't implemented -though. - -The chip architecture is entirely different from the chips supported by -rtw88 like RTL8822CE 802.11ac chip. First of all, register address ranges -are totally redefined, so it's impossible to reuse register definition. To -communicate with firmware, new H2C/C2H format is proposed. In order to have -better utilization, TX DMA flow is changed to two stages DMA. To provide -rich RX status information, additional RX PPDU packets are added. - -Since there are so many differences mentioned above, we decide to propose -a new driver. It has many authors, they are listed in alphabetic order: - -Chin-Yen Lee -Ping-Ke Shih -Po Hao Huang -Tzu-En Huang -Vincent Fann -Yan-Hsuan Chuang -Zong-Zhe Yang - -Tested-by: Aaron Ma -Tested-by: Brian Norris -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20211008035627.19463-1-pkshih@realtek.com ---- - drivers/net/wireless/realtek/Kconfig | 1 + - drivers/net/wireless/realtek/Makefile | 1 + - drivers/net/wireless/realtek/rtw89/Kconfig | 50 + - drivers/net/wireless/realtek/rtw89/Makefile | 25 + - drivers/net/wireless/realtek/rtw89/cam.c | 695 + - drivers/net/wireless/realtek/rtw89/cam.h | 165 + - drivers/net/wireless/realtek/rtw89/coex.c | 5716 ++ - drivers/net/wireless/realtek/rtw89/coex.h | 181 + - drivers/net/wireless/realtek/rtw89/core.c | 2502 + - drivers/net/wireless/realtek/rtw89/core.h | 3384 ++ - drivers/net/wireless/realtek/rtw89/debug.c | 2489 + - drivers/net/wireless/realtek/rtw89/debug.h | 77 + - drivers/net/wireless/realtek/rtw89/efuse.c | 188 + - drivers/net/wireless/realtek/rtw89/efuse.h | 13 + - drivers/net/wireless/realtek/rtw89/fw.c | 1641 + - drivers/net/wireless/realtek/rtw89/fw.h | 1378 + - drivers/net/wireless/realtek/rtw89/mac.c | 3838 ++ - drivers/net/wireless/realtek/rtw89/mac.h | 860 + - drivers/net/wireless/realtek/rtw89/mac80211.c | 676 + - drivers/net/wireless/realtek/rtw89/pci.c | 3060 + - drivers/net/wireless/realtek/rtw89/pci.h | 635 + - drivers/net/wireless/realtek/rtw89/phy.c | 2868 + - drivers/net/wireless/realtek/rtw89/phy.h | 311 + - drivers/net/wireless/realtek/rtw89/ps.c | 150 + - drivers/net/wireless/realtek/rtw89/ps.h | 16 + - drivers/net/wireless/realtek/rtw89/reg.h | 2159 + - drivers/net/wireless/realtek/rtw89/regd.c | 353 + - drivers/net/wireless/realtek/rtw89/rtw8852a.c | 2036 + - drivers/net/wireless/realtek/rtw89/rtw8852a.h | 109 + - .../net/wireless/realtek/rtw89/rtw8852a_rfk.c | 3911 ++ - .../net/wireless/realtek/rtw89/rtw8852a_rfk.h | 24 + - .../realtek/rtw89/rtw8852a_rfk_table.c | 1607 + - .../realtek/rtw89/rtw8852a_rfk_table.h | 133 + - .../wireless/realtek/rtw89/rtw8852a_table.c | 48725 ++++++++++++++++ - .../wireless/realtek/rtw89/rtw8852a_table.h | 28 + - drivers/net/wireless/realtek/rtw89/sar.c | 190 + - drivers/net/wireless/realtek/rtw89/sar.h | 26 + - drivers/net/wireless/realtek/rtw89/ser.c | 491 + - drivers/net/wireless/realtek/rtw89/ser.h | 15 + - drivers/net/wireless/realtek/rtw89/txrx.h | 358 + - drivers/net/wireless/realtek/rtw89/util.h | 17 + - 41 files changed, 91102 insertions(+) - create mode 100644 drivers/net/wireless/realtek/rtw89/Kconfig - create mode 100644 drivers/net/wireless/realtek/rtw89/Makefile - create mode 100644 drivers/net/wireless/realtek/rtw89/cam.c - create mode 100644 drivers/net/wireless/realtek/rtw89/cam.h - create mode 100644 drivers/net/wireless/realtek/rtw89/coex.c - create mode 100644 drivers/net/wireless/realtek/rtw89/coex.h - create mode 100644 drivers/net/wireless/realtek/rtw89/core.c - create mode 100644 drivers/net/wireless/realtek/rtw89/core.h - create mode 100644 drivers/net/wireless/realtek/rtw89/debug.c - create mode 100644 drivers/net/wireless/realtek/rtw89/debug.h - create mode 100644 drivers/net/wireless/realtek/rtw89/efuse.c - create mode 100644 drivers/net/wireless/realtek/rtw89/efuse.h - create mode 100644 drivers/net/wireless/realtek/rtw89/fw.c - create mode 100644 drivers/net/wireless/realtek/rtw89/fw.h - create mode 100644 drivers/net/wireless/realtek/rtw89/mac.c - create mode 100644 drivers/net/wireless/realtek/rtw89/mac.h - create mode 100644 drivers/net/wireless/realtek/rtw89/mac80211.c - create mode 100644 drivers/net/wireless/realtek/rtw89/pci.c - create mode 100644 drivers/net/wireless/realtek/rtw89/pci.h - create mode 100644 drivers/net/wireless/realtek/rtw89/phy.c - create mode 100644 drivers/net/wireless/realtek/rtw89/phy.h - create mode 100644 drivers/net/wireless/realtek/rtw89/ps.c - create mode 100644 drivers/net/wireless/realtek/rtw89/ps.h - create mode 100644 drivers/net/wireless/realtek/rtw89/reg.h - create mode 100644 drivers/net/wireless/realtek/rtw89/regd.c - create mode 100644 drivers/net/wireless/realtek/rtw89/rtw8852a.c - create mode 100644 drivers/net/wireless/realtek/rtw89/rtw8852a.h - create mode 100644 drivers/net/wireless/realtek/rtw89/rtw8852a_rfk.c - create mode 100644 drivers/net/wireless/realtek/rtw89/rtw8852a_rfk.h - create mode 100644 drivers/net/wireless/realtek/rtw89/rtw8852a_rfk_table.c - create mode 100644 drivers/net/wireless/realtek/rtw89/rtw8852a_rfk_table.h - create mode 100644 drivers/net/wireless/realtek/rtw89/rtw8852a_table.c - create mode 100644 drivers/net/wireless/realtek/rtw89/rtw8852a_table.h - create mode 100644 drivers/net/wireless/realtek/rtw89/sar.c - create mode 100644 drivers/net/wireless/realtek/rtw89/sar.h - create mode 100644 drivers/net/wireless/realtek/rtw89/ser.c - create mode 100644 drivers/net/wireless/realtek/rtw89/ser.h - create mode 100644 drivers/net/wireless/realtek/rtw89/txrx.h - create mode 100644 drivers/net/wireless/realtek/rtw89/util.h - -diff --git a/drivers/net/wireless/realtek/Kconfig b/drivers/net/wireless/realtek/Kconfig -index 474843277fa1..4a1f0e64df03 100644 ---- a/drivers/net/wireless/realtek/Kconfig -+++ b/drivers/net/wireless/realtek/Kconfig -@@ -16,5 +16,6 @@ source "drivers/net/wireless/realtek/rtl818x/Kconfig" - source "drivers/net/wireless/realtek/rtlwifi/Kconfig" - source "drivers/net/wireless/realtek/rtl8xxxu/Kconfig" - source "drivers/net/wireless/realtek/rtw88/Kconfig" -+source "drivers/net/wireless/realtek/rtw89/Kconfig" - - endif # WLAN_VENDOR_REALTEK -diff --git a/drivers/net/wireless/realtek/Makefile b/drivers/net/wireless/realtek/Makefile -index 888b5d594e79..ab25419f56c6 100644 ---- a/drivers/net/wireless/realtek/Makefile -+++ b/drivers/net/wireless/realtek/Makefile -@@ -8,4 +8,5 @@ obj-$(CONFIG_RTL8187) += rtl818x/ - obj-$(CONFIG_RTLWIFI) += rtlwifi/ - obj-$(CONFIG_RTL8XXXU) += rtl8xxxu/ - obj-$(CONFIG_RTW88) += rtw88/ -+obj-$(CONFIG_RTW89) += rtw89/ - -diff --git a/drivers/net/wireless/realtek/rtw89/Kconfig b/drivers/net/wireless/realtek/rtw89/Kconfig -new file mode 100644 -index 000000000000..37e5def24d9f ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/Kconfig -@@ -0,0 +1,50 @@ -+# SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause -+menuconfig RTW89 -+ tristate "Realtek 802.11ax wireless chips support" -+ depends on MAC80211 -+ help -+ This module adds support for mac80211-based wireless drivers that -+ enables Realtek IEEE 802.11ax wireless chipsets. -+ -+ If you choose to build a module, it'll be called rtw89. -+ -+if RTW89 -+ -+config RTW89_CORE -+ tristate -+ -+config RTW89_PCI -+ tristate -+ -+config RTW89_8852AE -+ tristate "Realtek 8852AE PCI wireless network adapter" -+ depends on PCI -+ select RTW89_CORE -+ select RTW89_PCI -+ help -+ Select this option will enable support for 8852AE chipset -+ -+ 802.11ax PCIe wireless network adapter -+ -+config RTW89_DEBUG -+ bool -+ -+config RTW89_DEBUGMSG -+ bool "Realtek rtw89 debug message support" -+ depends on RTW89_CORE -+ select RTW89_DEBUG -+ help -+ Enable debug message support -+ -+ If unsure, say Y to simplify debug problems -+ -+config RTW89_DEBUGFS -+ bool "Realtek rtw89 debugfs support" -+ depends on RTW89_CORE -+ select RTW89_DEBUG -+ help -+ Enable debugfs support -+ -+ If unsure, say Y to simplify debug problems -+ -+endif -diff --git a/drivers/net/wireless/realtek/rtw89/Makefile b/drivers/net/wireless/realtek/rtw89/Makefile -new file mode 100644 -index 000000000000..077e8fe23f60 ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/Makefile -@@ -0,0 +1,25 @@ -+# SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause -+ -+obj-$(CONFIG_RTW89_CORE) += rtw89_core.o -+rtw89_core-y += core.o \ -+ mac80211.o \ -+ mac.o \ -+ phy.o \ -+ fw.o \ -+ rtw8852a.o \ -+ rtw8852a_table.o \ -+ rtw8852a_rfk.o \ -+ rtw8852a_rfk_table.o \ -+ cam.o \ -+ efuse.o \ -+ regd.o \ -+ sar.o \ -+ coex.o \ -+ ps.o \ -+ ser.o -+ -+rtw89_core-$(CONFIG_RTW89_DEBUG) += debug.o -+ -+obj-$(CONFIG_RTW89_PCI) += rtw89_pci.o -+rtw89_pci-y := pci.o -+ -diff --git a/drivers/net/wireless/realtek/rtw89/cam.c b/drivers/net/wireless/realtek/rtw89/cam.c -new file mode 100644 -index 000000000000..c1e8c76c6aca ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/cam.c -@@ -0,0 +1,695 @@ -+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause -+/* Copyright(c) 2019-2020 Realtek Corporation -+ */ -+ -+#include "cam.h" -+#include "debug.h" -+#include "fw.h" -+#include "mac.h" -+ -+static struct sk_buff * -+rtw89_cam_get_sec_key_cmd(struct rtw89_dev *rtwdev, -+ struct rtw89_sec_cam_entry *sec_cam, -+ bool ext_key) -+{ -+ struct sk_buff *skb; -+ u32 cmd_len = H2C_SEC_CAM_LEN; -+ u32 key32[4]; -+ u8 *cmd; -+ int i, j; -+ -+ skb = rtw89_fw_h2c_alloc_skb_with_hdr(cmd_len); -+ if (!skb) -+ return NULL; -+ -+ skb_put_zero(skb, cmd_len); -+ -+ for (i = 0; i < 4; i++) { -+ j = i * 4; -+ j += ext_key ? 16 : 0; -+ key32[i] = FIELD_PREP(GENMASK(7, 0), sec_cam->key[j + 0]) | -+ FIELD_PREP(GENMASK(15, 8), sec_cam->key[j + 1]) | -+ FIELD_PREP(GENMASK(23, 16), sec_cam->key[j + 2]) | -+ FIELD_PREP(GENMASK(31, 24), sec_cam->key[j + 3]); -+ } -+ -+ cmd = skb->data; -+ RTW89_SET_FWCMD_SEC_IDX(cmd, sec_cam->sec_cam_idx + (ext_key ? 1 : 0)); -+ RTW89_SET_FWCMD_SEC_OFFSET(cmd, sec_cam->offset); -+ RTW89_SET_FWCMD_SEC_LEN(cmd, sec_cam->len); -+ RTW89_SET_FWCMD_SEC_TYPE(cmd, sec_cam->type); -+ RTW89_SET_FWCMD_SEC_EXT_KEY(cmd, ext_key); -+ RTW89_SET_FWCMD_SEC_SPP_MODE(cmd, sec_cam->spp_mode); -+ RTW89_SET_FWCMD_SEC_KEY0(cmd, key32[0]); -+ RTW89_SET_FWCMD_SEC_KEY1(cmd, key32[1]); -+ RTW89_SET_FWCMD_SEC_KEY2(cmd, key32[2]); -+ RTW89_SET_FWCMD_SEC_KEY3(cmd, key32[3]); -+ -+ return skb; -+} -+ -+static int rtw89_cam_send_sec_key_cmd(struct rtw89_dev *rtwdev, -+ struct rtw89_sec_cam_entry *sec_cam) -+{ -+ struct sk_buff *skb, *ext_skb; -+ int ret; -+ -+ skb = rtw89_cam_get_sec_key_cmd(rtwdev, sec_cam, false); -+ if (!skb) { -+ rtw89_err(rtwdev, "failed to get sec key command\n"); -+ return -ENOMEM; -+ } -+ -+ rtw89_h2c_pkt_set_hdr(rtwdev, skb, -+ FWCMD_TYPE_H2C, -+ H2C_CAT_MAC, -+ H2C_CL_MAC_SEC_CAM, -+ H2C_FUNC_MAC_SEC_UPD, 1, 0, -+ H2C_SEC_CAM_LEN); -+ ret = rtw89_h2c_tx(rtwdev, skb, false); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to send sec key h2c: %d\n", ret); -+ dev_kfree_skb(skb); -+ return ret; -+ } -+ -+ if (!sec_cam->ext_key) -+ return 0; -+ -+ ext_skb = rtw89_cam_get_sec_key_cmd(rtwdev, sec_cam, true); -+ if (!skb) { -+ rtw89_err(rtwdev, "failed to get ext sec key command\n"); -+ return -ENOMEM; -+ } -+ -+ rtw89_h2c_pkt_set_hdr(rtwdev, ext_skb, -+ FWCMD_TYPE_H2C, -+ H2C_CAT_MAC, -+ H2C_CL_MAC_SEC_CAM, -+ H2C_FUNC_MAC_SEC_UPD, -+ 1, 0, H2C_SEC_CAM_LEN); -+ ret = rtw89_h2c_tx(rtwdev, ext_skb, false); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to send ext sec key h2c: %d\n", ret); -+ dev_kfree_skb(ext_skb); -+ return ret; -+ } -+ -+ return 0; -+} -+ -+static int rtw89_cam_get_avail_sec_cam(struct rtw89_dev *rtwdev, -+ u8 *sec_cam_idx, bool ext_key) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ struct rtw89_cam_info *cam_info = &rtwdev->cam_info; -+ u8 sec_cam_num = chip->scam_num; -+ u8 idx = 0; -+ -+ if (!ext_key) { -+ idx = find_first_zero_bit(cam_info->sec_cam_map, sec_cam_num); -+ if (idx >= sec_cam_num) -+ return -EBUSY; -+ -+ set_bit(idx, cam_info->sec_cam_map); -+ *sec_cam_idx = idx; -+ -+ return 0; -+ } -+ -+again: -+ idx = find_next_zero_bit(cam_info->sec_cam_map, sec_cam_num, idx); -+ if (idx >= sec_cam_num - 1) -+ return -EBUSY; -+ /* ext keys need two cam entries for 256-bit key */ -+ if (test_bit(idx + 1, cam_info->sec_cam_map)) { -+ idx++; -+ goto again; -+ } -+ -+ set_bit(idx, cam_info->sec_cam_map); -+ set_bit(idx + 1, cam_info->sec_cam_map); -+ *sec_cam_idx = idx; -+ -+ return 0; -+} -+ -+static int rtw89_cam_get_addr_cam_key_idx(struct rtw89_addr_cam_entry *addr_cam, -+ struct rtw89_sec_cam_entry *sec_cam, -+ struct ieee80211_key_conf *key, -+ u8 *key_idx) -+{ -+ u8 idx; -+ -+ /* RTW89_ADDR_CAM_SEC_NONE : not enabled -+ * RTW89_ADDR_CAM_SEC_ALL_UNI : 0 - 6 unicast -+ * RTW89_ADDR_CAM_SEC_NORMAL : 0 - 1 unicast, 2 - 4 group, 5 - 6 BIP -+ * RTW89_ADDR_CAM_SEC_4GROUP : 0 - 1 unicast, 2 - 5 group, 6 BIP -+ */ -+ switch (addr_cam->sec_ent_mode) { -+ case RTW89_ADDR_CAM_SEC_NONE: -+ return -EINVAL; -+ case RTW89_ADDR_CAM_SEC_ALL_UNI: -+ if (!(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) -+ return -EINVAL; -+ idx = find_first_zero_bit(addr_cam->sec_cam_map, -+ RTW89_SEC_CAM_IN_ADDR_CAM); -+ if (idx >= RTW89_SEC_CAM_IN_ADDR_CAM) -+ return -EBUSY; -+ *key_idx = idx; -+ break; -+ case RTW89_ADDR_CAM_SEC_NORMAL: -+ if (sec_cam->type == RTW89_SEC_KEY_TYPE_BIP_CCMP128) { -+ idx = find_next_zero_bit(addr_cam->sec_cam_map, -+ RTW89_SEC_CAM_IN_ADDR_CAM, 5); -+ if (idx > 6) -+ return -EBUSY; -+ *key_idx = idx; -+ break; -+ } -+ -+ if (key->flags & IEEE80211_KEY_FLAG_PAIRWISE) { -+ idx = find_next_zero_bit(addr_cam->sec_cam_map, -+ RTW89_SEC_CAM_IN_ADDR_CAM, 0); -+ if (idx > 1) -+ return -EBUSY; -+ *key_idx = idx; -+ break; -+ } -+ -+ /* Group keys */ -+ idx = find_next_zero_bit(addr_cam->sec_cam_map, -+ RTW89_SEC_CAM_IN_ADDR_CAM, 2); -+ if (idx > 4) -+ return -EBUSY; -+ *key_idx = idx; -+ break; -+ case RTW89_ADDR_CAM_SEC_4GROUP: -+ if (sec_cam->type == RTW89_SEC_KEY_TYPE_BIP_CCMP128) { -+ if (test_bit(6, addr_cam->sec_cam_map)) -+ return -EINVAL; -+ *key_idx = 6; -+ break; -+ } -+ -+ if (key->flags & IEEE80211_KEY_FLAG_PAIRWISE) { -+ idx = find_next_zero_bit(addr_cam->sec_cam_map, -+ RTW89_SEC_CAM_IN_ADDR_CAM, 0); -+ if (idx > 1) -+ return -EBUSY; -+ *key_idx = idx; -+ break; -+ } -+ -+ /* Group keys */ -+ idx = find_next_zero_bit(addr_cam->sec_cam_map, -+ RTW89_SEC_CAM_IN_ADDR_CAM, 2); -+ if (idx > 5) -+ return -EBUSY; -+ *key_idx = idx; -+ break; -+ } -+ -+ return 0; -+} -+ -+static int rtw89_cam_attach_sec_cam(struct rtw89_dev *rtwdev, -+ struct ieee80211_vif *vif, -+ struct ieee80211_sta *sta, -+ struct ieee80211_key_conf *key, -+ struct rtw89_sec_cam_entry *sec_cam) -+{ -+ struct rtw89_vif *rtwvif; -+ struct rtw89_addr_cam_entry *addr_cam; -+ u8 key_idx = 0; -+ int ret; -+ -+ if (!vif) { -+ rtw89_err(rtwdev, "No iface for adding sec cam\n"); -+ return -EINVAL; -+ } -+ -+ rtwvif = (struct rtw89_vif *)vif->drv_priv; -+ addr_cam = &rtwvif->addr_cam; -+ ret = rtw89_cam_get_addr_cam_key_idx(addr_cam, sec_cam, key, &key_idx); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to get addr cam key idx %d, %d\n", -+ addr_cam->sec_ent_mode, sec_cam->type); -+ return ret; -+ } -+ -+ key->hw_key_idx = key_idx; -+ addr_cam->sec_ent_keyid[key_idx] = key->keyidx; -+ addr_cam->sec_ent[key_idx] = sec_cam->sec_cam_idx; -+ addr_cam->sec_entries[key_idx] = sec_cam; -+ set_bit(key_idx, addr_cam->sec_cam_map); -+ ret = rtw89_fw_h2c_cam(rtwdev, rtwvif); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to update addr cam sec entry: %d\n", -+ ret); -+ clear_bit(key_idx, addr_cam->sec_cam_map); -+ addr_cam->sec_entries[key_idx] = NULL; -+ return ret; -+ } -+ -+ return 0; -+} -+ -+static int rtw89_cam_sec_key_install(struct rtw89_dev *rtwdev, -+ struct ieee80211_vif *vif, -+ struct ieee80211_sta *sta, -+ struct ieee80211_key_conf *key, -+ u8 hw_key_type, bool ext_key) -+{ -+ struct rtw89_sec_cam_entry *sec_cam = NULL; -+ struct rtw89_cam_info *cam_info = &rtwdev->cam_info; -+ u8 sec_cam_idx; -+ int ret; -+ -+ /* maximum key length 256-bit */ -+ if (key->keylen > 32) { -+ rtw89_err(rtwdev, "invalid sec key length %d\n", key->keylen); -+ return -EINVAL; -+ } -+ -+ ret = rtw89_cam_get_avail_sec_cam(rtwdev, &sec_cam_idx, ext_key); -+ if (ret) { -+ rtw89_warn(rtwdev, "no available sec cam: %d ext: %d\n", -+ ret, ext_key); -+ return ret; -+ } -+ -+ sec_cam = kzalloc(sizeof(*sec_cam), GFP_KERNEL); -+ if (!sec_cam) { -+ ret = -ENOMEM; -+ goto err_release_cam; -+ } -+ -+ sec_cam->sec_cam_idx = sec_cam_idx; -+ sec_cam->type = hw_key_type; -+ sec_cam->len = RTW89_SEC_CAM_LEN; -+ sec_cam->ext_key = ext_key; -+ memcpy(sec_cam->key, key->key, key->keylen); -+ ret = rtw89_cam_send_sec_key_cmd(rtwdev, sec_cam); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to send sec key cmd: %d\n", ret); -+ goto err_release_cam; -+ } -+ -+ /* associate with addr cam */ -+ ret = rtw89_cam_attach_sec_cam(rtwdev, vif, sta, key, sec_cam); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to attach sec cam: %d\n", ret); -+ goto err_release_cam; -+ } -+ -+ return 0; -+ -+err_release_cam: -+ kfree(sec_cam); -+ clear_bit(sec_cam_idx, cam_info->sec_cam_map); -+ if (ext_key) -+ clear_bit(sec_cam_idx + 1, cam_info->sec_cam_map); -+ -+ return ret; -+} -+ -+int rtw89_cam_sec_key_add(struct rtw89_dev *rtwdev, -+ struct ieee80211_vif *vif, -+ struct ieee80211_sta *sta, -+ struct ieee80211_key_conf *key) -+{ -+ u8 hw_key_type; -+ bool ext_key = false; -+ int ret; -+ -+ switch (key->cipher) { -+ case WLAN_CIPHER_SUITE_WEP40: -+ hw_key_type = RTW89_SEC_KEY_TYPE_WEP40; -+ break; -+ case WLAN_CIPHER_SUITE_WEP104: -+ hw_key_type = RTW89_SEC_KEY_TYPE_WEP104; -+ break; -+ case WLAN_CIPHER_SUITE_CCMP: -+ hw_key_type = RTW89_SEC_KEY_TYPE_CCMP128; -+ key->flags |= IEEE80211_KEY_FLAG_SW_MGMT_TX; -+ break; -+ case WLAN_CIPHER_SUITE_CCMP_256: -+ hw_key_type = RTW89_SEC_KEY_TYPE_CCMP256; -+ key->flags |= IEEE80211_KEY_FLAG_SW_MGMT_TX; -+ ext_key = true; -+ break; -+ case WLAN_CIPHER_SUITE_GCMP: -+ hw_key_type = RTW89_SEC_KEY_TYPE_GCMP128; -+ key->flags |= IEEE80211_KEY_FLAG_SW_MGMT_TX; -+ break; -+ case WLAN_CIPHER_SUITE_GCMP_256: -+ hw_key_type = RTW89_SEC_KEY_TYPE_GCMP256; -+ key->flags |= IEEE80211_KEY_FLAG_SW_MGMT_TX; -+ ext_key = true; -+ break; -+ default: -+ return -EOPNOTSUPP; -+ } -+ -+ key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV; -+ -+ ret = rtw89_cam_sec_key_install(rtwdev, vif, sta, key, hw_key_type, -+ ext_key); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to install key type %d ext %d: %d\n", -+ hw_key_type, ext_key, ret); -+ return ret; -+ } -+ -+ return 0; -+} -+ -+int rtw89_cam_sec_key_del(struct rtw89_dev *rtwdev, -+ struct ieee80211_vif *vif, -+ struct ieee80211_sta *sta, -+ struct ieee80211_key_conf *key, -+ bool inform_fw) -+{ -+ struct rtw89_cam_info *cam_info = &rtwdev->cam_info; -+ struct rtw89_vif *rtwvif; -+ struct rtw89_addr_cam_entry *addr_cam; -+ struct rtw89_sec_cam_entry *sec_cam; -+ u8 key_idx = key->hw_key_idx; -+ u8 sec_cam_idx; -+ int ret = 0; -+ -+ if (!vif) { -+ rtw89_err(rtwdev, "No iface for deleting sec cam\n"); -+ return -EINVAL; -+ } -+ -+ rtwvif = (struct rtw89_vif *)vif->drv_priv; -+ addr_cam = &rtwvif->addr_cam; -+ sec_cam = addr_cam->sec_entries[key_idx]; -+ if (!sec_cam) -+ return -EINVAL; -+ -+ /* detach sec cam from addr cam */ -+ clear_bit(key_idx, addr_cam->sec_cam_map); -+ addr_cam->sec_entries[key_idx] = NULL; -+ if (inform_fw) { -+ ret = rtw89_fw_h2c_cam(rtwdev, rtwvif); -+ if (ret) -+ rtw89_err(rtwdev, "failed to update cam del key: %d\n", ret); -+ } -+ -+ /* clear valid bit in addr cam will disable sec cam, -+ * so we don't need to send H2C command again -+ */ -+ sec_cam_idx = sec_cam->sec_cam_idx; -+ clear_bit(sec_cam_idx, cam_info->sec_cam_map); -+ if (sec_cam->ext_key) -+ clear_bit(sec_cam_idx + 1, cam_info->sec_cam_map); -+ -+ kfree(sec_cam); -+ -+ return ret; -+} -+ -+static void rtw89_cam_reset_key_iter(struct ieee80211_hw *hw, -+ struct ieee80211_vif *vif, -+ struct ieee80211_sta *sta, -+ struct ieee80211_key_conf *key, -+ void *data) -+{ -+ struct rtw89_dev *rtwdev = (struct rtw89_dev *)data; -+ struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; -+ -+ rtw89_cam_sec_key_del(rtwdev, vif, sta, key, false); -+ rtw89_cam_deinit(rtwdev, rtwvif); -+} -+ -+void rtw89_cam_deinit(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif) -+{ -+ struct rtw89_cam_info *cam_info = &rtwdev->cam_info; -+ struct rtw89_addr_cam_entry *addr_cam = &rtwvif->addr_cam; -+ struct rtw89_bssid_cam_entry *bssid_cam = &rtwvif->bssid_cam; -+ -+ addr_cam->valid = false; -+ bssid_cam->valid = false; -+ clear_bit(addr_cam->addr_cam_idx, cam_info->addr_cam_map); -+ clear_bit(bssid_cam->bssid_cam_idx, cam_info->bssid_cam_map); -+} -+ -+void rtw89_cam_reset_keys(struct rtw89_dev *rtwdev) -+{ -+ rcu_read_lock(); -+ ieee80211_iter_keys_rcu(rtwdev->hw, NULL, rtw89_cam_reset_key_iter, rtwdev); -+ rcu_read_unlock(); -+} -+ -+static int rtw89_cam_get_avail_addr_cam(struct rtw89_dev *rtwdev, -+ u8 *addr_cam_idx) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ struct rtw89_cam_info *cam_info = &rtwdev->cam_info; -+ u8 addr_cam_num = chip->acam_num; -+ u8 idx; -+ -+ idx = find_first_zero_bit(cam_info->addr_cam_map, addr_cam_num); -+ if (idx >= addr_cam_num) -+ return -EBUSY; -+ -+ set_bit(idx, cam_info->addr_cam_map); -+ *addr_cam_idx = idx; -+ -+ return 0; -+} -+ -+static int rtw89_cam_init_addr_cam(struct rtw89_dev *rtwdev, -+ struct rtw89_vif *rtwvif) -+{ -+ struct rtw89_addr_cam_entry *addr_cam = &rtwvif->addr_cam; -+ u8 addr_cam_idx; -+ int i; -+ int ret; -+ -+ ret = rtw89_cam_get_avail_addr_cam(rtwdev, &addr_cam_idx); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to get available addr cam\n"); -+ return ret; -+ } -+ -+ addr_cam->addr_cam_idx = addr_cam_idx; -+ addr_cam->len = ADDR_CAM_ENT_SIZE; -+ addr_cam->offset = 0; -+ addr_cam->valid = true; -+ addr_cam->addr_mask = 0; -+ addr_cam->mask_sel = RTW89_NO_MSK; -+ bitmap_zero(addr_cam->sec_cam_map, RTW89_SEC_CAM_IN_ADDR_CAM); -+ ether_addr_copy(addr_cam->sma, rtwvif->mac_addr); -+ -+ for (i = 0; i < RTW89_SEC_CAM_IN_ADDR_CAM; i++) { -+ addr_cam->sec_ent_keyid[i] = 0; -+ addr_cam->sec_ent[i] = 0; -+ } -+ -+ return 0; -+} -+ -+static int rtw89_cam_get_avail_bssid_cam(struct rtw89_dev *rtwdev, -+ u8 *bssid_cam_idx) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ struct rtw89_cam_info *cam_info = &rtwdev->cam_info; -+ u8 bssid_cam_num = chip->bcam_num; -+ u8 idx; -+ -+ idx = find_first_zero_bit(cam_info->bssid_cam_map, bssid_cam_num); -+ if (idx >= bssid_cam_num) -+ return -EBUSY; -+ -+ set_bit(idx, cam_info->bssid_cam_map); -+ *bssid_cam_idx = idx; -+ -+ return 0; -+} -+ -+static int rtw89_cam_init_bssid_cam(struct rtw89_dev *rtwdev, -+ struct rtw89_vif *rtwvif) -+{ -+ struct rtw89_bssid_cam_entry *bssid_cam = &rtwvif->bssid_cam; -+ u8 bssid_cam_idx; -+ int ret; -+ -+ ret = rtw89_cam_get_avail_bssid_cam(rtwdev, &bssid_cam_idx); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to get available bssid cam\n"); -+ return ret; -+ } -+ -+ bssid_cam->bssid_cam_idx = bssid_cam_idx; -+ bssid_cam->phy_idx = rtwvif->phy_idx; -+ bssid_cam->len = BSSID_CAM_ENT_SIZE; -+ bssid_cam->offset = 0; -+ bssid_cam->valid = true; -+ ether_addr_copy(bssid_cam->bssid, rtwvif->bssid); -+ -+ return 0; -+} -+ -+void rtw89_cam_bssid_changed(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif) -+{ -+ struct ieee80211_vif *vif = rtwvif_to_vif(rtwvif); -+ struct rtw89_addr_cam_entry *addr_cam = &rtwvif->addr_cam; -+ struct rtw89_bssid_cam_entry *bssid_cam = &rtwvif->bssid_cam; -+ -+ if (vif->type == NL80211_IFTYPE_STATION) -+ ether_addr_copy(addr_cam->tma, rtwvif->bssid); -+ ether_addr_copy(bssid_cam->bssid, rtwvif->bssid); -+} -+ -+int rtw89_cam_init(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif) -+{ -+ struct rtw89_addr_cam_entry *addr_cam = &rtwvif->addr_cam; -+ struct rtw89_bssid_cam_entry *bssid_cam = &rtwvif->bssid_cam; -+ int ret; -+ -+ ret = rtw89_cam_init_addr_cam(rtwdev, rtwvif); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to init addr cam\n"); -+ return ret; -+ } -+ -+ ret = rtw89_cam_init_bssid_cam(rtwdev, rtwvif); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to init bssid cam\n"); -+ return ret; -+ } -+ -+ /* associate addr cam with bssid cam */ -+ addr_cam->bssid_cam_idx = bssid_cam->bssid_cam_idx; -+ -+ return 0; -+} -+ -+int rtw89_cam_fill_bssid_cam_info(struct rtw89_dev *rtwdev, -+ struct rtw89_vif *rtwvif, u8 *cmd) -+{ -+ struct ieee80211_vif *vif = rtwvif_to_vif(rtwvif); -+ struct rtw89_bssid_cam_entry *bssid_cam = &rtwvif->bssid_cam; -+ u8 bss_color = vif->bss_conf.he_bss_color.color; -+ -+ FWCMD_SET_ADDR_BSSID_IDX(cmd, bssid_cam->bssid_cam_idx); -+ FWCMD_SET_ADDR_BSSID_OFFSET(cmd, bssid_cam->offset); -+ FWCMD_SET_ADDR_BSSID_LEN(cmd, bssid_cam->len); -+ FWCMD_SET_ADDR_BSSID_VALID(cmd, bssid_cam->valid); -+ FWCMD_SET_ADDR_BSSID_BB_SEL(cmd, bssid_cam->phy_idx); -+ FWCMD_SET_ADDR_BSSID_BSS_COLOR(cmd, bss_color); -+ -+ FWCMD_SET_ADDR_BSSID_BSSID0(cmd, bssid_cam->bssid[0]); -+ FWCMD_SET_ADDR_BSSID_BSSID1(cmd, bssid_cam->bssid[1]); -+ FWCMD_SET_ADDR_BSSID_BSSID2(cmd, bssid_cam->bssid[2]); -+ FWCMD_SET_ADDR_BSSID_BSSID3(cmd, bssid_cam->bssid[3]); -+ FWCMD_SET_ADDR_BSSID_BSSID4(cmd, bssid_cam->bssid[4]); -+ FWCMD_SET_ADDR_BSSID_BSSID5(cmd, bssid_cam->bssid[5]); -+ -+ return 0; -+} -+ -+static u8 rtw89_cam_addr_hash(u8 start, u8 *addr) -+{ -+ u8 hash = 0; -+ u8 i; -+ -+ for (i = start; i < ETH_ALEN; i++) -+ hash ^= addr[i]; -+ -+ return hash; -+} -+ -+void rtw89_cam_fill_addr_cam_info(struct rtw89_dev *rtwdev, -+ struct rtw89_vif *rtwvif, -+ u8 *cmd) -+{ -+ struct ieee80211_vif *vif = rtwvif_to_vif(rtwvif); -+ struct ieee80211_sta *sta; -+ struct rtw89_sta *rtwsta; -+ struct rtw89_addr_cam_entry *addr_cam = &rtwvif->addr_cam; -+ u8 sma_hash, tma_hash, addr_msk_start; -+ u8 sma_start = 0; -+ u8 tma_start = 0; -+ -+ if (addr_cam->addr_mask != 0) { -+ addr_msk_start = __ffs(addr_cam->addr_mask); -+ if (addr_cam->mask_sel == RTW89_SMA) -+ sma_start = addr_msk_start; -+ else if (addr_cam->mask_sel == RTW89_TMA) -+ tma_start = addr_msk_start; -+ } -+ sma_hash = rtw89_cam_addr_hash(sma_start, rtwvif->mac_addr); -+ tma_hash = rtw89_cam_addr_hash(tma_start, addr_cam->tma); -+ -+ FWCMD_SET_ADDR_IDX(cmd, addr_cam->addr_cam_idx); -+ FWCMD_SET_ADDR_OFFSET(cmd, addr_cam->offset); -+ FWCMD_SET_ADDR_LEN(cmd, addr_cam->len); -+ -+ FWCMD_SET_ADDR_VALID(cmd, addr_cam->valid); -+ FWCMD_SET_ADDR_NET_TYPE(cmd, rtwvif->net_type); -+ FWCMD_SET_ADDR_BCN_HIT_COND(cmd, rtwvif->bcn_hit_cond); -+ FWCMD_SET_ADDR_HIT_RULE(cmd, rtwvif->hit_rule); -+ FWCMD_SET_ADDR_BB_SEL(cmd, rtwvif->phy_idx); -+ FWCMD_SET_ADDR_ADDR_MASK(cmd, addr_cam->addr_mask); -+ FWCMD_SET_ADDR_MASK_SEL(cmd, addr_cam->mask_sel); -+ FWCMD_SET_ADDR_SMA_HASH(cmd, sma_hash); -+ FWCMD_SET_ADDR_TMA_HASH(cmd, tma_hash); -+ -+ FWCMD_SET_ADDR_BSSID_CAM_IDX(cmd, addr_cam->bssid_cam_idx); -+ -+ FWCMD_SET_ADDR_SMA0(cmd, rtwvif->mac_addr[0]); -+ FWCMD_SET_ADDR_SMA1(cmd, rtwvif->mac_addr[1]); -+ FWCMD_SET_ADDR_SMA2(cmd, rtwvif->mac_addr[2]); -+ FWCMD_SET_ADDR_SMA3(cmd, rtwvif->mac_addr[3]); -+ FWCMD_SET_ADDR_SMA4(cmd, rtwvif->mac_addr[4]); -+ FWCMD_SET_ADDR_SMA5(cmd, rtwvif->mac_addr[5]); -+ -+ FWCMD_SET_ADDR_TMA0(cmd, addr_cam->tma[0]); -+ FWCMD_SET_ADDR_TMA1(cmd, addr_cam->tma[1]); -+ FWCMD_SET_ADDR_TMA2(cmd, addr_cam->tma[2]); -+ FWCMD_SET_ADDR_TMA3(cmd, addr_cam->tma[3]); -+ FWCMD_SET_ADDR_TMA4(cmd, addr_cam->tma[4]); -+ FWCMD_SET_ADDR_TMA5(cmd, addr_cam->tma[5]); -+ -+ FWCMD_SET_ADDR_PORT_INT(cmd, rtwvif->port); -+ FWCMD_SET_ADDR_TSF_SYNC(cmd, rtwvif->port); -+ FWCMD_SET_ADDR_TF_TRS(cmd, rtwvif->trigger); -+ FWCMD_SET_ADDR_LSIG_TXOP(cmd, rtwvif->lsig_txop); -+ FWCMD_SET_ADDR_TGT_IND(cmd, rtwvif->tgt_ind); -+ FWCMD_SET_ADDR_FRM_TGT_IND(cmd, rtwvif->frm_tgt_ind); -+ -+ if (vif->type == NL80211_IFTYPE_STATION) { -+ sta = rtwvif->mgd.ap; -+ if (sta) { -+ rtwsta = (struct rtw89_sta *)sta->drv_priv; -+ FWCMD_SET_ADDR_MACID(cmd, rtwsta->mac_id); -+ FWCMD_SET_ADDR_AID12(cmd, vif->bss_conf.aid & 0xfff); -+ } -+ } -+ FWCMD_SET_ADDR_WOL_PATTERN(cmd, rtwvif->wowlan_pattern); -+ FWCMD_SET_ADDR_WOL_UC(cmd, rtwvif->wowlan_uc); -+ FWCMD_SET_ADDR_WOL_MAGIC(cmd, rtwvif->wowlan_magic); -+ FWCMD_SET_ADDR_WAPI(cmd, addr_cam->wapi); -+ FWCMD_SET_ADDR_SEC_ENT_MODE(cmd, addr_cam->sec_ent_mode); -+ FWCMD_SET_ADDR_SEC_ENT0_KEYID(cmd, addr_cam->sec_ent_keyid[0]); -+ FWCMD_SET_ADDR_SEC_ENT1_KEYID(cmd, addr_cam->sec_ent_keyid[1]); -+ FWCMD_SET_ADDR_SEC_ENT2_KEYID(cmd, addr_cam->sec_ent_keyid[2]); -+ FWCMD_SET_ADDR_SEC_ENT3_KEYID(cmd, addr_cam->sec_ent_keyid[3]); -+ FWCMD_SET_ADDR_SEC_ENT4_KEYID(cmd, addr_cam->sec_ent_keyid[4]); -+ FWCMD_SET_ADDR_SEC_ENT5_KEYID(cmd, addr_cam->sec_ent_keyid[5]); -+ FWCMD_SET_ADDR_SEC_ENT6_KEYID(cmd, addr_cam->sec_ent_keyid[6]); -+ -+ FWCMD_SET_ADDR_SEC_ENT_VALID(cmd, addr_cam->sec_cam_map[0] & 0xff); -+ FWCMD_SET_ADDR_SEC_ENT0(cmd, addr_cam->sec_ent[0]); -+ FWCMD_SET_ADDR_SEC_ENT1(cmd, addr_cam->sec_ent[1]); -+ FWCMD_SET_ADDR_SEC_ENT2(cmd, addr_cam->sec_ent[2]); -+ FWCMD_SET_ADDR_SEC_ENT3(cmd, addr_cam->sec_ent[3]); -+ FWCMD_SET_ADDR_SEC_ENT4(cmd, addr_cam->sec_ent[4]); -+ FWCMD_SET_ADDR_SEC_ENT5(cmd, addr_cam->sec_ent[5]); -+ FWCMD_SET_ADDR_SEC_ENT6(cmd, addr_cam->sec_ent[6]); -+} -diff --git a/drivers/net/wireless/realtek/rtw89/cam.h b/drivers/net/wireless/realtek/rtw89/cam.h -new file mode 100644 -index 000000000000..90a20a5375c6 ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/cam.h -@@ -0,0 +1,165 @@ -+/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ -+/* Copyright(c) 2019-2020 Realtek Corporation -+ */ -+ -+#ifndef __RTW89_CAM_H__ -+#define __RTW89_CAM_H__ -+ -+#include "core.h" -+ -+#define RTW89_SEC_CAM_LEN 20 -+ -+#define FWCMD_SET_ADDR_IDX(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 1, value, GENMASK(7, 0)) -+#define FWCMD_SET_ADDR_OFFSET(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 1, value, GENMASK(15, 8)) -+#define FWCMD_SET_ADDR_LEN(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 1, value, GENMASK(23, 16)) -+#define FWCMD_SET_ADDR_VALID(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 2, value, BIT(0)) -+#define FWCMD_SET_ADDR_NET_TYPE(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 2, value, GENMASK(2, 1)) -+#define FWCMD_SET_ADDR_BCN_HIT_COND(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 2, value, GENMASK(4, 3)) -+#define FWCMD_SET_ADDR_HIT_RULE(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 2, value, GENMASK(6, 5)) -+#define FWCMD_SET_ADDR_BB_SEL(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 2, value, BIT(7)) -+#define FWCMD_SET_ADDR_ADDR_MASK(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 2, value, GENMASK(13, 8)) -+#define FWCMD_SET_ADDR_MASK_SEL(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 2, value, GENMASK(15, 14)) -+#define FWCMD_SET_ADDR_SMA_HASH(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 2, value, GENMASK(23, 16)) -+#define FWCMD_SET_ADDR_TMA_HASH(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 2, value, GENMASK(31, 24)) -+#define FWCMD_SET_ADDR_BSSID_CAM_IDX(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 3, value, GENMASK(5, 0)) -+#define FWCMD_SET_ADDR_SMA0(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 4, value, GENMASK(7, 0)) -+#define FWCMD_SET_ADDR_SMA1(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 4, value, GENMASK(15, 8)) -+#define FWCMD_SET_ADDR_SMA2(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 4, value, GENMASK(23, 16)) -+#define FWCMD_SET_ADDR_SMA3(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 4, value, GENMASK(31, 24)) -+#define FWCMD_SET_ADDR_SMA4(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 5, value, GENMASK(7, 0)) -+#define FWCMD_SET_ADDR_SMA5(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 5, value, GENMASK(15, 8)) -+#define FWCMD_SET_ADDR_TMA0(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 5, value, GENMASK(23, 16)) -+#define FWCMD_SET_ADDR_TMA1(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 5, value, GENMASK(31, 24)) -+#define FWCMD_SET_ADDR_TMA2(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 6, value, GENMASK(7, 0)) -+#define FWCMD_SET_ADDR_TMA3(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 6, value, GENMASK(15, 8)) -+#define FWCMD_SET_ADDR_TMA4(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 6, value, GENMASK(23, 16)) -+#define FWCMD_SET_ADDR_TMA5(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 6, value, GENMASK(31, 24)) -+#define FWCMD_SET_ADDR_MACID(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 8, value, GENMASK(7, 0)) -+#define FWCMD_SET_ADDR_PORT_INT(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 8, value, GENMASK(10, 8)) -+#define FWCMD_SET_ADDR_TSF_SYNC(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 8, value, GENMASK(13, 11)) -+#define FWCMD_SET_ADDR_TF_TRS(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 8, value, BIT(14)) -+#define FWCMD_SET_ADDR_LSIG_TXOP(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 8, value, BIT(15)) -+#define FWCMD_SET_ADDR_TGT_IND(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 8, value, GENMASK(26, 24)) -+#define FWCMD_SET_ADDR_FRM_TGT_IND(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 8, value, GENMASK(29, 27)) -+#define FWCMD_SET_ADDR_AID12(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 9, value, GENMASK(11, 0)) -+#define FWCMD_SET_ADDR_AID12_0(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 9, value, GENMASK(7, 0)) -+#define FWCMD_SET_ADDR_AID12_1(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 9, value, GENMASK(11, 8)) -+#define FWCMD_SET_ADDR_WOL_PATTERN(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 9, value, BIT(12)) -+#define FWCMD_SET_ADDR_WOL_UC(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 9, value, BIT(13)) -+#define FWCMD_SET_ADDR_WOL_MAGIC(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 9, value, BIT(14)) -+#define FWCMD_SET_ADDR_WAPI(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 9, value, BIT(15)) -+#define FWCMD_SET_ADDR_SEC_ENT_MODE(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 9, value, GENMASK(17, 16)) -+#define FWCMD_SET_ADDR_SEC_ENT0_KEYID(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 9, value, GENMASK(19, 18)) -+#define FWCMD_SET_ADDR_SEC_ENT1_KEYID(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 9, value, GENMASK(21, 20)) -+#define FWCMD_SET_ADDR_SEC_ENT2_KEYID(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 9, value, GENMASK(23, 22)) -+#define FWCMD_SET_ADDR_SEC_ENT3_KEYID(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 9, value, GENMASK(25, 24)) -+#define FWCMD_SET_ADDR_SEC_ENT4_KEYID(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 9, value, GENMASK(27, 26)) -+#define FWCMD_SET_ADDR_SEC_ENT5_KEYID(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 9, value, GENMASK(29, 28)) -+#define FWCMD_SET_ADDR_SEC_ENT6_KEYID(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 9, value, GENMASK(31, 30)) -+#define FWCMD_SET_ADDR_SEC_ENT_VALID(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 10, value, GENMASK(7, 0)) -+#define FWCMD_SET_ADDR_SEC_ENT0(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 10, value, GENMASK(15, 8)) -+#define FWCMD_SET_ADDR_SEC_ENT1(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 10, value, GENMASK(23, 16)) -+#define FWCMD_SET_ADDR_SEC_ENT2(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 10, value, GENMASK(31, 24)) -+#define FWCMD_SET_ADDR_SEC_ENT3(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 11, value, GENMASK(7, 0)) -+#define FWCMD_SET_ADDR_SEC_ENT4(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 11, value, GENMASK(15, 8)) -+#define FWCMD_SET_ADDR_SEC_ENT5(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 11, value, GENMASK(23, 16)) -+#define FWCMD_SET_ADDR_SEC_ENT6(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 11, value, GENMASK(31, 24)) -+#define FWCMD_SET_ADDR_BSSID_IDX(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 12, value, GENMASK(7, 0)) -+#define FWCMD_SET_ADDR_BSSID_OFFSET(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 12, value, GENMASK(15, 8)) -+#define FWCMD_SET_ADDR_BSSID_LEN(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 12, value, GENMASK(23, 16)) -+#define FWCMD_SET_ADDR_BSSID_VALID(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 13, value, BIT(0)) -+#define FWCMD_SET_ADDR_BSSID_BB_SEL(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 13, value, BIT(1)) -+#define FWCMD_SET_ADDR_BSSID_BSS_COLOR(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 13, value, GENMASK(13, 8)) -+#define FWCMD_SET_ADDR_BSSID_BSSID0(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 13, value, GENMASK(23, 16)) -+#define FWCMD_SET_ADDR_BSSID_BSSID1(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 13, value, GENMASK(31, 24)) -+#define FWCMD_SET_ADDR_BSSID_BSSID2(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 14, value, GENMASK(7, 0)) -+#define FWCMD_SET_ADDR_BSSID_BSSID3(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 14, value, GENMASK(15, 8)) -+#define FWCMD_SET_ADDR_BSSID_BSSID4(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 14, value, GENMASK(23, 16)) -+#define FWCMD_SET_ADDR_BSSID_BSSID5(cmd, value) \ -+ le32p_replace_bits((__le32 *)(cmd) + 14, value, GENMASK(31, 24)) -+ -+int rtw89_cam_init(struct rtw89_dev *rtwdev, struct rtw89_vif *vif); -+void rtw89_cam_deinit(struct rtw89_dev *rtwdev, struct rtw89_vif *vif); -+void rtw89_cam_fill_addr_cam_info(struct rtw89_dev *rtwdev, -+ struct rtw89_vif *vif, u8 *cmd); -+int rtw89_cam_fill_bssid_cam_info(struct rtw89_dev *rtwdev, -+ struct rtw89_vif *vif, u8 *cmd); -+int rtw89_cam_sec_key_add(struct rtw89_dev *rtwdev, -+ struct ieee80211_vif *vif, -+ struct ieee80211_sta *sta, -+ struct ieee80211_key_conf *key); -+int rtw89_cam_sec_key_del(struct rtw89_dev *rtwdev, -+ struct ieee80211_vif *vif, -+ struct ieee80211_sta *sta, -+ struct ieee80211_key_conf *key, -+ bool inform_fw); -+void rtw89_cam_bssid_changed(struct rtw89_dev *rtwdev, -+ struct rtw89_vif *rtwvif); -+void rtw89_cam_reset_keys(struct rtw89_dev *rtwdev); -+#endif -diff --git a/drivers/net/wireless/realtek/rtw89/coex.c b/drivers/net/wireless/realtek/rtw89/coex.c -new file mode 100644 -index 000000000000..abe4b6549ab2 ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/coex.c -@@ -0,0 +1,5716 @@ -+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause -+/* Copyright(c) 2019-2020 Realtek Corporation -+ */ -+ -+#include "coex.h" -+#include "debug.h" -+#include "fw.h" -+#include "mac.h" -+#include "ps.h" -+#include "reg.h" -+ -+#define FCXDEF_STEP 50 /* MUST <= FCXMAX_STEP and match with wl fw*/ -+ -+enum btc_fbtc_tdma_template { -+ CXTD_OFF = 0x0, -+ CXTD_OFF_B2, -+ CXTD_OFF_EXT, -+ CXTD_FIX, -+ CXTD_PFIX, -+ CXTD_AUTO, -+ CXTD_PAUTO, -+ CXTD_AUTO2, -+ CXTD_PAUTO2, -+ CXTD_MAX, -+}; -+ -+enum btc_fbtc_tdma_type { -+ CXTDMA_OFF = 0x0, -+ CXTDMA_FIX = 0x1, -+ CXTDMA_AUTO = 0x2, -+ CXTDMA_AUTO2 = 0x3, -+ CXTDMA_MAX -+}; -+ -+enum btc_fbtc_tdma_rx_flow_ctrl { -+ CXFLC_OFF = 0x0, -+ CXFLC_NULLP = 0x1, -+ CXFLC_QOSNULL = 0x2, -+ CXFLC_CTS = 0x3, -+ CXFLC_MAX -+}; -+ -+enum btc_fbtc_tdma_wlan_tx_pause { -+ CXTPS_OFF = 0x0, /* no wl tx pause*/ -+ CXTPS_ON = 0x1, -+ CXTPS_MAX -+}; -+ -+enum btc_mlme_state { -+ MLME_NO_LINK, -+ MLME_LINKING, -+ MLME_LINKED, -+}; -+ -+#define FCXONESLOT_VER 1 -+struct btc_fbtc_1slot { -+ u8 fver; -+ u8 sid; /* slot id */ -+ struct rtw89_btc_fbtc_slot slot; -+} __packed; -+ -+static const struct rtw89_btc_fbtc_tdma t_def[] = { -+ [CXTD_OFF] = { CXTDMA_OFF, CXFLC_OFF, CXTPS_OFF, 0, 0, 0, 0, 0}, -+ [CXTD_OFF_B2] = { CXTDMA_OFF, CXFLC_OFF, CXTPS_OFF, 0, 0, 1, 0, 0}, -+ [CXTD_OFF_EXT] = { CXTDMA_OFF, CXFLC_OFF, CXTPS_OFF, 0, 0, 3, 0, 0}, -+ [CXTD_FIX] = { CXTDMA_FIX, CXFLC_OFF, CXTPS_OFF, 0, 0, 0, 0, 0}, -+ [CXTD_PFIX] = { CXTDMA_FIX, CXFLC_NULLP, CXTPS_ON, 0, 5, 0, 0, 0}, -+ [CXTD_AUTO] = { CXTDMA_AUTO, CXFLC_OFF, CXTPS_OFF, 0, 0, 0, 0, 0}, -+ [CXTD_PAUTO] = { CXTDMA_AUTO, CXFLC_NULLP, CXTPS_ON, 0, 5, 0, 0, 0}, -+ [CXTD_AUTO2] = {CXTDMA_AUTO2, CXFLC_OFF, CXTPS_OFF, 0, 0, 0, 0, 0}, -+ [CXTD_PAUTO2] = {CXTDMA_AUTO2, CXFLC_NULLP, CXTPS_ON, 0, 5, 0, 0, 0} -+}; -+ -+#define __DEF_FBTC_SLOT(__dur, __cxtbl, __cxtype) \ -+ { .dur = cpu_to_le16(__dur), .cxtbl = cpu_to_le32(__cxtbl), \ -+ .cxtype = cpu_to_le16(__cxtype),} -+ -+static const struct rtw89_btc_fbtc_slot s_def[] = { -+ [CXST_OFF] = __DEF_FBTC_SLOT(100, 0x55555555, SLOT_MIX), -+ [CXST_B2W] = __DEF_FBTC_SLOT(5, 0x5a5a5a5a, SLOT_ISO), -+ [CXST_W1] = __DEF_FBTC_SLOT(70, 0x5a5a5a5a, SLOT_ISO), -+ [CXST_W2] = __DEF_FBTC_SLOT(70, 0x5a5a5aaa, SLOT_ISO), -+ [CXST_W2B] = __DEF_FBTC_SLOT(15, 0x5a5a5a5a, SLOT_ISO), -+ [CXST_B1] = __DEF_FBTC_SLOT(100, 0x55555555, SLOT_MIX), -+ [CXST_B2] = __DEF_FBTC_SLOT(7, 0x6a5a5a5a, SLOT_MIX), -+ [CXST_B3] = __DEF_FBTC_SLOT(5, 0x55555555, SLOT_MIX), -+ [CXST_B4] = __DEF_FBTC_SLOT(50, 0x55555555, SLOT_MIX), -+ [CXST_LK] = __DEF_FBTC_SLOT(20, 0x5a5a5a5a, SLOT_ISO), -+ [CXST_BLK] = __DEF_FBTC_SLOT(250, 0x55555555, SLOT_MIX), -+ [CXST_E2G] = __DEF_FBTC_SLOT(20, 0x6a5a5a5a, SLOT_MIX), -+ [CXST_E5G] = __DEF_FBTC_SLOT(20, 0xffffffff, SLOT_MIX), -+ [CXST_EBT] = __DEF_FBTC_SLOT(20, 0x55555555, SLOT_MIX), -+ [CXST_ENULL] = __DEF_FBTC_SLOT(7, 0xaaaaaaaa, SLOT_ISO), -+ [CXST_WLK] = __DEF_FBTC_SLOT(250, 0x6a5a6a5a, SLOT_MIX), -+ [CXST_W1FDD] = __DEF_FBTC_SLOT(35, 0xfafafafa, SLOT_ISO), -+ [CXST_B1FDD] = __DEF_FBTC_SLOT(100, 0xffffffff, SLOT_MIX), -+}; -+ -+static const u32 cxtbl[] = { -+ 0xffffffff, /* 0 */ -+ 0xaaaaaaaa, /* 1 */ -+ 0x55555555, /* 2 */ -+ 0x66555555, /* 3 */ -+ 0x66556655, /* 4 */ -+ 0x5a5a5a5a, /* 5 */ -+ 0x5a5a5aaa, /* 6 */ -+ 0xaa5a5a5a, /* 7 */ -+ 0x6a5a5a5a, /* 8 */ -+ 0x6a5a5aaa, /* 9 */ -+ 0x6a5a6a5a, /* 10 */ -+ 0x6a5a6aaa, /* 11 */ -+ 0x6afa5afa, /* 12 */ -+ 0xaaaa5aaa, /* 13 */ -+ 0xaaffffaa, /* 14 */ -+ 0xaa5555aa, /* 15 */ -+ 0xfafafafa, /* 16 */ -+ 0xffffddff, /* 17 */ -+ 0xdaffdaff, /* 18 */ -+ 0xfafadafa /* 19 */ -+}; -+ -+struct rtw89_btc_btf_tlv { -+ u8 type; -+ u8 len; -+ u8 val[1]; -+} __packed; -+ -+enum btc_btf_set_report_en { -+ RPT_EN_TDMA = BIT(0), -+ RPT_EN_CYCLE = BIT(1), -+ RPT_EN_MREG = BIT(2), -+ RPT_EN_BT_VER_INFO = BIT(3), -+ RPT_EN_BT_SCAN_INFO = BIT(4), -+ RPT_EN_BT_AFH_MAP = BIT(5), -+ RPT_EN_BT_DEVICE_INFO = BIT(6), -+ RPT_EN_WL_ALL = GENMASK(2, 0), -+ RPT_EN_BT_ALL = GENMASK(6, 3), -+ RPT_EN_ALL = GENMASK(6, 0), -+}; -+ -+#define BTF_SET_REPORT_VER 1 -+struct rtw89_btc_btf_set_report { -+ u8 fver; -+ __le32 enable; -+ __le32 para; -+} __packed; -+ -+#define BTF_SET_SLOT_TABLE_VER 1 -+struct rtw89_btc_btf_set_slot_table { -+ u8 fver; -+ u8 tbl_num; -+ u8 buf[]; -+} __packed; -+ -+#define BTF_SET_MON_REG_VER 1 -+struct rtw89_btc_btf_set_mon_reg { -+ u8 fver; -+ u8 reg_num; -+ u8 buf[]; -+} __packed; -+ -+enum btc_btf_set_cx_policy { -+ CXPOLICY_TDMA = 0x0, -+ CXPOLICY_SLOT = 0x1, -+ CXPOLICY_TYPE = 0x2, -+ CXPOLICY_MAX, -+}; -+ -+enum btc_b2w_scoreboard { -+ BTC_BSCB_ACT = BIT(0), -+ BTC_BSCB_ON = BIT(1), -+ BTC_BSCB_WHQL = BIT(2), -+ BTC_BSCB_BT_S1 = BIT(3), -+ BTC_BSCB_A2DP_ACT = BIT(4), -+ BTC_BSCB_RFK_RUN = BIT(5), -+ BTC_BSCB_RFK_REQ = BIT(6), -+ BTC_BSCB_LPS = BIT(7), -+ BTC_BSCB_WLRFK = BIT(11), -+ BTC_BSCB_BT_HILNA = BIT(13), -+ BTC_BSCB_BT_CONNECT = BIT(16), -+ BTC_BSCB_PATCH_CODE = BIT(30), -+ BTC_BSCB_ALL = GENMASK(30, 0), -+}; -+ -+enum btc_phymap { -+ BTC_PHY_0 = BIT(0), -+ BTC_PHY_1 = BIT(1), -+ BTC_PHY_ALL = BIT(0) | BIT(1), -+}; -+ -+enum btc_cx_state_map { -+ BTC_WIDLE = 0, -+ BTC_WBUSY_BNOSCAN, -+ BTC_WBUSY_BSCAN, -+ BTC_WSCAN_BNOSCAN, -+ BTC_WSCAN_BSCAN, -+ BTC_WLINKING -+}; -+ -+enum btc_ant_phase { -+ BTC_ANT_WPOWERON = 0, -+ BTC_ANT_WINIT, -+ BTC_ANT_WONLY, -+ BTC_ANT_WOFF, -+ BTC_ANT_W2G, -+ BTC_ANT_W5G, -+ BTC_ANT_W25G, -+ BTC_ANT_FREERUN, -+ BTC_ANT_WRFK, -+ BTC_ANT_BRFK, -+ BTC_ANT_MAX -+}; -+ -+enum btc_plt { -+ BTC_PLT_NONE = 0, -+ BTC_PLT_LTE_RX = BIT(0), -+ BTC_PLT_GNT_BT_TX = BIT(1), -+ BTC_PLT_GNT_BT_RX = BIT(2), -+ BTC_PLT_GNT_WL = BIT(3), -+ BTC_PLT_BT = BIT(1) | BIT(2), -+ BTC_PLT_ALL = 0xf -+}; -+ -+enum btc_cx_poicy_main_type { -+ BTC_CXP_OFF = 0, -+ BTC_CXP_OFFB, -+ BTC_CXP_OFFE, -+ BTC_CXP_FIX, -+ BTC_CXP_PFIX, -+ BTC_CXP_AUTO, -+ BTC_CXP_PAUTO, -+ BTC_CXP_AUTO2, -+ BTC_CXP_PAUTO2, -+ BTC_CXP_MANUAL, -+ BTC_CXP_USERDEF0, -+ BTC_CXP_MAIN_MAX -+}; -+ -+enum btc_cx_poicy_type { -+ /* TDMA off + pri: BT > WL */ -+ BTC_CXP_OFF_BT = (BTC_CXP_OFF << 8) | 0, -+ -+ /* TDMA off + pri: WL > BT */ -+ BTC_CXP_OFF_WL = (BTC_CXP_OFF << 8) | 1, -+ -+ /* TDMA off + pri: BT = WL */ -+ BTC_CXP_OFF_EQ0 = (BTC_CXP_OFF << 8) | 2, -+ -+ /* TDMA off + pri: BT = WL > BT_Lo */ -+ BTC_CXP_OFF_EQ1 = (BTC_CXP_OFF << 8) | 3, -+ -+ /* TDMA off + pri: WL = BT, BT_Rx > WL_Lo_Tx */ -+ BTC_CXP_OFF_EQ2 = (BTC_CXP_OFF << 8) | 4, -+ -+ /* TDMA off + pri: WL_Rx = BT, BT_HI > WL_Tx > BT_Lo */ -+ BTC_CXP_OFF_EQ3 = (BTC_CXP_OFF << 8) | 5, -+ -+ /* TDMA off + pri: BT_Hi > WL > BT_Lo */ -+ BTC_CXP_OFF_BWB0 = (BTC_CXP_OFF << 8) | 6, -+ -+ /* TDMA off + pri: WL_Hi-Tx > BT_Hi_Rx, BT_Hi > WL > BT_Lo */ -+ BTC_CXP_OFF_BWB1 = (BTC_CXP_OFF << 8) | 7, -+ -+ /* TDMA off+Bcn-Protect + pri: WL_Hi-Tx > BT_Hi_Rx, BT_Hi > WL > BT_Lo*/ -+ BTC_CXP_OFFB_BWB0 = (BTC_CXP_OFFB << 8) | 0, -+ -+ /* TDMA off + Ext-Ctrl + pri: default */ -+ BTC_CXP_OFFE_DEF = (BTC_CXP_OFFE << 8) | 0, -+ -+ /* TDMA off + Ext-Ctrl + pri: E2G-slot block all BT */ -+ BTC_CXP_OFFE_DEF2 = (BTC_CXP_OFFE << 8) | 1, -+ -+ /* TDMA Fix slot-0: W1:B1 = 30:30 */ -+ BTC_CXP_FIX_TD3030 = (BTC_CXP_FIX << 8) | 0, -+ -+ /* TDMA Fix slot-1: W1:B1 = 50:50 */ -+ BTC_CXP_FIX_TD5050 = (BTC_CXP_FIX << 8) | 1, -+ -+ /* TDMA Fix slot-2: W1:B1 = 20:30 */ -+ BTC_CXP_FIX_TD2030 = (BTC_CXP_FIX << 8) | 2, -+ -+ /* TDMA Fix slot-3: W1:B1 = 40:10 */ -+ BTC_CXP_FIX_TD4010 = (BTC_CXP_FIX << 8) | 3, -+ -+ /* TDMA Fix slot-4: W1:B1 = 70:10 */ -+ BTC_CXP_FIX_TD7010 = (BTC_CXP_FIX << 8) | 4, -+ -+ /* TDMA Fix slot-5: W1:B1 = 20:60 */ -+ BTC_CXP_FIX_TD2060 = (BTC_CXP_FIX << 8) | 5, -+ -+ /* TDMA Fix slot-6: W1:B1 = 30:60 */ -+ BTC_CXP_FIX_TD3060 = (BTC_CXP_FIX << 8) | 6, -+ -+ /* TDMA Fix slot-7: W1:B1 = 20:80 */ -+ BTC_CXP_FIX_TD2080 = (BTC_CXP_FIX << 8) | 7, -+ -+ /* TDMA Fix slot-8: W1:B1 = user-define */ -+ BTC_CXP_FIX_TDW1B1 = (BTC_CXP_FIX << 8) | 8, -+ -+ /* TDMA Fix slot-9: W1:B1 = 40:20 */ -+ BTC_CXP_FIX_TD4020 = (BTC_CXP_FIX << 8) | 9, -+ -+ /* PS-TDMA Fix slot-0: W1:B1 = 30:30 */ -+ BTC_CXP_PFIX_TD3030 = (BTC_CXP_PFIX << 8) | 0, -+ -+ /* PS-TDMA Fix slot-1: W1:B1 = 50:50 */ -+ BTC_CXP_PFIX_TD5050 = (BTC_CXP_PFIX << 8) | 1, -+ -+ /* PS-TDMA Fix slot-2: W1:B1 = 20:30 */ -+ BTC_CXP_PFIX_TD2030 = (BTC_CXP_PFIX << 8) | 2, -+ -+ /* PS-TDMA Fix slot-3: W1:B1 = 20:60 */ -+ BTC_CXP_PFIX_TD2060 = (BTC_CXP_PFIX << 8) | 3, -+ -+ /* PS-TDMA Fix slot-4: W1:B1 = 30:70 */ -+ BTC_CXP_PFIX_TD3070 = (BTC_CXP_PFIX << 8) | 4, -+ -+ /* PS-TDMA Fix slot-5: W1:B1 = 20:80 */ -+ BTC_CXP_PFIX_TD2080 = (BTC_CXP_PFIX << 8) | 5, -+ -+ /* PS-TDMA Fix slot-6: W1:B1 = user-define */ -+ BTC_CXP_PFIX_TDW1B1 = (BTC_CXP_PFIX << 8) | 6, -+ -+ /* TDMA Auto slot-0: W1:B1 = 50:200 */ -+ BTC_CXP_AUTO_TD50200 = (BTC_CXP_AUTO << 8) | 0, -+ -+ /* TDMA Auto slot-1: W1:B1 = 60:200 */ -+ BTC_CXP_AUTO_TD60200 = (BTC_CXP_AUTO << 8) | 1, -+ -+ /* TDMA Auto slot-2: W1:B1 = 20:200 */ -+ BTC_CXP_AUTO_TD20200 = (BTC_CXP_AUTO << 8) | 2, -+ -+ /* TDMA Auto slot-3: W1:B1 = user-define */ -+ BTC_CXP_AUTO_TDW1B1 = (BTC_CXP_AUTO << 8) | 3, -+ -+ /* PS-TDMA Auto slot-0: W1:B1 = 50:200 */ -+ BTC_CXP_PAUTO_TD50200 = (BTC_CXP_PAUTO << 8) | 0, -+ -+ /* PS-TDMA Auto slot-1: W1:B1 = 60:200 */ -+ BTC_CXP_PAUTO_TD60200 = (BTC_CXP_PAUTO << 8) | 1, -+ -+ /* PS-TDMA Auto slot-2: W1:B1 = 20:200 */ -+ BTC_CXP_PAUTO_TD20200 = (BTC_CXP_PAUTO << 8) | 2, -+ -+ /* PS-TDMA Auto slot-3: W1:B1 = user-define */ -+ BTC_CXP_PAUTO_TDW1B1 = (BTC_CXP_PAUTO << 8) | 3, -+ -+ /* TDMA Auto slot2-0: W1:B4 = 30:50 */ -+ BTC_CXP_AUTO2_TD3050 = (BTC_CXP_AUTO2 << 8) | 0, -+ -+ /* TDMA Auto slot2-1: W1:B4 = 30:70 */ -+ BTC_CXP_AUTO2_TD3070 = (BTC_CXP_AUTO2 << 8) | 1, -+ -+ /* TDMA Auto slot2-2: W1:B4 = 50:50 */ -+ BTC_CXP_AUTO2_TD5050 = (BTC_CXP_AUTO2 << 8) | 2, -+ -+ /* TDMA Auto slot2-3: W1:B4 = 60:60 */ -+ BTC_CXP_AUTO2_TD6060 = (BTC_CXP_AUTO2 << 8) | 3, -+ -+ /* TDMA Auto slot2-4: W1:B4 = 20:80 */ -+ BTC_CXP_AUTO2_TD2080 = (BTC_CXP_AUTO2 << 8) | 4, -+ -+ /* TDMA Auto slot2-5: W1:B4 = user-define */ -+ BTC_CXP_AUTO2_TDW1B4 = (BTC_CXP_AUTO2 << 8) | 5, -+ -+ /* PS-TDMA Auto slot2-0: W1:B4 = 30:50 */ -+ BTC_CXP_PAUTO2_TD3050 = (BTC_CXP_PAUTO2 << 8) | 0, -+ -+ /* PS-TDMA Auto slot2-1: W1:B4 = 30:70 */ -+ BTC_CXP_PAUTO2_TD3070 = (BTC_CXP_PAUTO2 << 8) | 1, -+ -+ /* PS-TDMA Auto slot2-2: W1:B4 = 50:50 */ -+ BTC_CXP_PAUTO2_TD5050 = (BTC_CXP_PAUTO2 << 8) | 2, -+ -+ /* PS-TDMA Auto slot2-3: W1:B4 = 60:60 */ -+ BTC_CXP_PAUTO2_TD6060 = (BTC_CXP_PAUTO2 << 8) | 3, -+ -+ /* PS-TDMA Auto slot2-4: W1:B4 = 20:80 */ -+ BTC_CXP_PAUTO2_TD2080 = (BTC_CXP_PAUTO2 << 8) | 4, -+ -+ /* PS-TDMA Auto slot2-5: W1:B4 = user-define */ -+ BTC_CXP_PAUTO2_TDW1B4 = (BTC_CXP_PAUTO2 << 8) | 5, -+ -+ BTC_CXP_MAX = 0xffff -+}; -+ -+enum btc_wl_rfk_result { -+ BTC_WRFK_REJECT = 0, -+ BTC_WRFK_ALLOW = 1, -+}; -+ -+enum btc_coex_info_map_en { -+ BTC_COEX_INFO_CX = BIT(0), -+ BTC_COEX_INFO_WL = BIT(1), -+ BTC_COEX_INFO_BT = BIT(2), -+ BTC_COEX_INFO_DM = BIT(3), -+ BTC_COEX_INFO_MREG = BIT(4), -+ BTC_COEX_INFO_SUMMARY = BIT(5), -+ BTC_COEX_INFO_ALL = GENMASK(7, 0), -+}; -+ -+#define BTC_CXP_MASK GENMASK(15, 8) -+ -+enum btc_w2b_scoreboard { -+ BTC_WSCB_ACTIVE = BIT(0), -+ BTC_WSCB_ON = BIT(1), -+ BTC_WSCB_SCAN = BIT(2), -+ BTC_WSCB_UNDERTEST = BIT(3), -+ BTC_WSCB_RXGAIN = BIT(4), -+ BTC_WSCB_WLBUSY = BIT(7), -+ BTC_WSCB_EXTFEM = BIT(8), -+ BTC_WSCB_TDMA = BIT(9), -+ BTC_WSCB_FIX2M = BIT(10), -+ BTC_WSCB_WLRFK = BIT(11), -+ BTC_WSCB_BTRFK_GNT = BIT(12), /* not used, use mailbox to inform BT */ -+ BTC_WSCB_BT_HILNA = BIT(13), -+ BTC_WSCB_BTLOG = BIT(14), -+ BTC_WSCB_ALL = GENMASK(23, 0), -+}; -+ -+enum btc_wl_link_mode { -+ BTC_WLINK_NOLINK = 0x0, -+ BTC_WLINK_2G_STA, -+ BTC_WLINK_2G_AP, -+ BTC_WLINK_2G_GO, -+ BTC_WLINK_2G_GC, -+ BTC_WLINK_2G_SCC, -+ BTC_WLINK_2G_MCC, -+ BTC_WLINK_25G_MCC, -+ BTC_WLINK_25G_DBCC, -+ BTC_WLINK_5G, -+ BTC_WLINK_2G_NAN, -+ BTC_WLINK_OTHER, -+ BTC_WLINK_MAX -+}; -+ -+enum btc_bt_hid_type { -+ BTC_HID_218 = BIT(0), -+ BTC_HID_418 = BIT(1), -+ BTC_HID_BLE = BIT(2), -+ BTC_HID_RCU = BIT(3), -+ BTC_HID_RCU_VOICE = BIT(4), -+ BTC_HID_OTHER_LEGACY = BIT(5) -+}; -+ -+enum btc_reset_module { -+ BTC_RESET_CX = BIT(0), -+ BTC_RESET_DM = BIT(1), -+ BTC_RESET_CTRL = BIT(2), -+ BTC_RESET_CXDM = BIT(0) | BIT(1), -+ BTC_RESET_BTINFO = BIT(3), -+ BTC_RESET_MDINFO = BIT(4), -+ BTC_RESET_ALL = GENMASK(7, 0), -+}; -+ -+enum btc_gnt_state { -+ BTC_GNT_HW = 0, -+ BTC_GNT_SW_LO, -+ BTC_GNT_SW_HI, -+ BTC_GNT_MAX -+}; -+ -+enum btc_wl_max_tx_time { -+ BTC_MAX_TX_TIME_L1 = 500, -+ BTC_MAX_TX_TIME_L2 = 1000, -+ BTC_MAX_TX_TIME_L3 = 2000, -+ BTC_MAX_TX_TIME_DEF = 5280 -+}; -+ -+enum btc_wl_max_tx_retry { -+ BTC_MAX_TX_RETRY_L1 = 7, -+ BTC_MAX_TX_RETRY_L2 = 15, -+ BTC_MAX_TX_RETRY_DEF = 31, -+}; -+ -+enum btc_reason_and_action { -+ BTC_RSN_NONE, -+ BTC_RSN_NTFY_INIT, -+ BTC_RSN_NTFY_SWBAND, -+ BTC_RSN_NTFY_WL_STA, -+ BTC_RSN_NTFY_RADIO_STATE, -+ BTC_RSN_UPDATE_BT_SCBD, -+ BTC_RSN_NTFY_WL_RFK, -+ BTC_RSN_UPDATE_BT_INFO, -+ BTC_RSN_NTFY_SCAN_START, -+ BTC_RSN_NTFY_SCAN_FINISH, -+ BTC_RSN_NTFY_SPECIFIC_PACKET, -+ BTC_RSN_NTFY_POWEROFF, -+ BTC_RSN_NTFY_ROLE_INFO, -+ BTC_RSN_CMD_SET_COEX, -+ BTC_RSN_ACT1_WORK, -+ BTC_RSN_BT_DEVINFO_WORK, -+ BTC_RSN_RFK_CHK_WORK, -+ BTC_RSN_NUM, -+ BTC_ACT_NONE = 100, -+ BTC_ACT_WL_ONLY, -+ BTC_ACT_WL_5G, -+ BTC_ACT_WL_OTHER, -+ BTC_ACT_WL_IDLE, -+ BTC_ACT_WL_NC, -+ BTC_ACT_WL_RFK, -+ BTC_ACT_WL_INIT, -+ BTC_ACT_WL_OFF, -+ BTC_ACT_FREERUN, -+ BTC_ACT_BT_WHQL, -+ BTC_ACT_BT_RFK, -+ BTC_ACT_BT_OFF, -+ BTC_ACT_BT_IDLE, -+ BTC_ACT_BT_HFP, -+ BTC_ACT_BT_HID, -+ BTC_ACT_BT_A2DP, -+ BTC_ACT_BT_A2DPSINK, -+ BTC_ACT_BT_PAN, -+ BTC_ACT_BT_A2DP_HID, -+ BTC_ACT_BT_A2DP_PAN, -+ BTC_ACT_BT_PAN_HID, -+ BTC_ACT_BT_A2DP_PAN_HID, -+ BTC_ACT_WL_25G_MCC, -+ BTC_ACT_WL_2G_MCC, -+ BTC_ACT_WL_2G_SCC, -+ BTC_ACT_WL_2G_AP, -+ BTC_ACT_WL_2G_GO, -+ BTC_ACT_WL_2G_GC, -+ BTC_ACT_WL_2G_NAN, -+ BTC_ACT_LAST, -+ BTC_ACT_NUM = BTC_ACT_LAST - BTC_ACT_NONE, -+ BTC_ACT_EXT_BIT = BIT(14), -+ BTC_POLICY_EXT_BIT = BIT(15), -+}; -+ -+#define BTC_FREERUN_ANTISO_MIN 30 -+#define BTC_TDMA_BTHID_MAX 2 -+#define BTC_BLINK_NOCONNECT 0 -+ -+static void _run_coex(struct rtw89_dev *rtwdev, -+ enum btc_reason_and_action reason); -+static void _write_scbd(struct rtw89_dev *rtwdev, u32 val, bool state); -+static void _update_bt_scbd(struct rtw89_dev *rtwdev, bool only_update); -+ -+static void _send_fw_cmd(struct rtw89_dev *rtwdev, u8 h2c_class, u8 h2c_func, -+ void *param, u16 len) -+{ -+ rtw89_fw_h2c_raw_with_hdr(rtwdev, h2c_class, h2c_func, param, len, -+ false, true); -+} -+ -+static void _reset_btc_var(struct rtw89_dev *rtwdev, u8 type) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_cx *cx = &btc->cx; -+ struct rtw89_btc_wl_info *wl = &btc->cx.wl; -+ struct rtw89_btc_bt_info *bt = &btc->cx.bt; -+ struct rtw89_btc_bt_link_info *bt_linfo = &bt->link_info; -+ struct rtw89_btc_wl_link_info *wl_linfo = wl->link_info; -+ u8 i; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, "[BTC], %s\n", __func__); -+ -+ if (type & BTC_RESET_CX) -+ memset(cx, 0, sizeof(*cx)); -+ else if (type & BTC_RESET_BTINFO) /* only for BT enable */ -+ memset(bt, 0, sizeof(*bt)); -+ -+ if (type & BTC_RESET_CTRL) { -+ memset(&btc->ctrl, 0, sizeof(btc->ctrl)); -+ btc->ctrl.trace_step = FCXDEF_STEP; -+ } -+ -+ /* Init Coex variables that are not zero */ -+ if (type & BTC_RESET_DM) { -+ memset(&btc->dm, 0, sizeof(btc->dm)); -+ memset(bt_linfo->rssi_state, 0, sizeof(bt_linfo->rssi_state)); -+ -+ for (i = 0; i < RTW89_MAX_HW_PORT_NUM; i++) -+ memset(wl_linfo[i].rssi_state, 0, -+ sizeof(wl_linfo[i].rssi_state)); -+ -+ /* set the slot_now table to original */ -+ btc->dm.tdma_now = t_def[CXTD_OFF]; -+ btc->dm.tdma = t_def[CXTD_OFF]; -+ memcpy(&btc->dm.slot_now, s_def, sizeof(btc->dm.slot_now)); -+ memcpy(&btc->dm.slot, s_def, sizeof(btc->dm.slot)); -+ -+ btc->policy_len = 0; -+ btc->bt_req_len = 0; -+ -+ btc->dm.coex_info_map = BTC_COEX_INFO_ALL; -+ btc->dm.wl_tx_limit.tx_time = BTC_MAX_TX_TIME_DEF; -+ btc->dm.wl_tx_limit.tx_retry = BTC_MAX_TX_RETRY_DEF; -+ } -+ -+ if (type & BTC_RESET_MDINFO) -+ memset(&btc->mdinfo, 0, sizeof(btc->mdinfo)); -+} -+ -+#define BTC_FWINFO_BUF 1024 -+ -+#define BTC_RPT_HDR_SIZE 3 -+#define BTC_CHK_WLSLOT_DRIFT_MAX 15 -+#define BTC_CHK_HANG_MAX 3 -+ -+static void _chk_btc_err(struct rtw89_dev *rtwdev, u8 type, u32 cnt) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_cx *cx = &btc->cx; -+ struct rtw89_btc_dm *dm = &btc->dm; -+ struct rtw89_btc_bt_info *bt = &cx->bt; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): type:%d cnt:%d\n", -+ __func__, type, cnt); -+ -+ switch (type) { -+ case BTC_DCNT_RPT_FREEZE: -+ if (dm->cnt_dm[BTC_DCNT_RPT] == cnt && btc->fwinfo.rpt_en_map) -+ dm->cnt_dm[BTC_DCNT_RPT_FREEZE]++; -+ else -+ dm->cnt_dm[BTC_DCNT_RPT_FREEZE] = 0; -+ -+ if (dm->cnt_dm[BTC_DCNT_RPT_FREEZE] >= BTC_CHK_HANG_MAX) -+ dm->error.map.wl_fw_hang = true; -+ else -+ dm->error.map.wl_fw_hang = false; -+ -+ dm->cnt_dm[BTC_DCNT_RPT] = cnt; -+ break; -+ case BTC_DCNT_CYCLE_FREEZE: -+ if (dm->cnt_dm[BTC_DCNT_CYCLE] == cnt && -+ (dm->tdma_now.type != CXTDMA_OFF || -+ dm->tdma_now.ext_ctrl == CXECTL_EXT)) -+ dm->cnt_dm[BTC_DCNT_CYCLE_FREEZE]++; -+ else -+ dm->cnt_dm[BTC_DCNT_CYCLE_FREEZE] = 0; -+ -+ if (dm->cnt_dm[BTC_DCNT_CYCLE_FREEZE] >= BTC_CHK_HANG_MAX) -+ dm->error.map.cycle_hang = true; -+ else -+ dm->error.map.cycle_hang = false; -+ -+ dm->cnt_dm[BTC_DCNT_CYCLE] = cnt; -+ break; -+ case BTC_DCNT_W1_FREEZE: -+ if (dm->cnt_dm[BTC_DCNT_W1] == cnt && -+ dm->tdma_now.type != CXTDMA_OFF) -+ dm->cnt_dm[BTC_DCNT_W1_FREEZE]++; -+ else -+ dm->cnt_dm[BTC_DCNT_W1_FREEZE] = 0; -+ -+ if (dm->cnt_dm[BTC_DCNT_W1_FREEZE] >= BTC_CHK_HANG_MAX) -+ dm->error.map.w1_hang = true; -+ else -+ dm->error.map.w1_hang = false; -+ -+ dm->cnt_dm[BTC_DCNT_W1] = cnt; -+ break; -+ case BTC_DCNT_B1_FREEZE: -+ if (dm->cnt_dm[BTC_DCNT_B1] == cnt && -+ dm->tdma_now.type != CXTDMA_OFF) -+ dm->cnt_dm[BTC_DCNT_B1_FREEZE]++; -+ else -+ dm->cnt_dm[BTC_DCNT_B1_FREEZE] = 0; -+ -+ if (dm->cnt_dm[BTC_DCNT_B1_FREEZE] >= BTC_CHK_HANG_MAX) -+ dm->error.map.b1_hang = true; -+ else -+ dm->error.map.b1_hang = false; -+ -+ dm->cnt_dm[BTC_DCNT_B1] = cnt; -+ break; -+ case BTC_DCNT_TDMA_NONSYNC: -+ if (cnt != 0) /* if tdma not sync between drv/fw */ -+ dm->cnt_dm[BTC_DCNT_TDMA_NONSYNC]++; -+ else -+ dm->cnt_dm[BTC_DCNT_TDMA_NONSYNC] = 0; -+ -+ if (dm->cnt_dm[BTC_DCNT_TDMA_NONSYNC] >= BTC_CHK_HANG_MAX) -+ dm->error.map.tdma_no_sync = true; -+ else -+ dm->error.map.tdma_no_sync = false; -+ break; -+ case BTC_DCNT_SLOT_NONSYNC: -+ if (cnt != 0) /* if slot not sync between drv/fw */ -+ dm->cnt_dm[BTC_DCNT_SLOT_NONSYNC]++; -+ else -+ dm->cnt_dm[BTC_DCNT_SLOT_NONSYNC] = 0; -+ -+ if (dm->cnt_dm[BTC_DCNT_SLOT_NONSYNC] >= BTC_CHK_HANG_MAX) -+ dm->error.map.tdma_no_sync = true; -+ else -+ dm->error.map.tdma_no_sync = false; -+ break; -+ case BTC_DCNT_BTCNT_FREEZE: -+ cnt = cx->cnt_bt[BTC_BCNT_HIPRI_RX] + -+ cx->cnt_bt[BTC_BCNT_HIPRI_TX] + -+ cx->cnt_bt[BTC_BCNT_LOPRI_RX] + -+ cx->cnt_bt[BTC_BCNT_LOPRI_TX]; -+ -+ if (cnt == 0) -+ dm->cnt_dm[BTC_DCNT_BTCNT_FREEZE]++; -+ else -+ dm->cnt_dm[BTC_DCNT_BTCNT_FREEZE] = 0; -+ -+ if ((dm->cnt_dm[BTC_DCNT_BTCNT_FREEZE] >= BTC_CHK_HANG_MAX && -+ bt->enable.now) || (!dm->cnt_dm[BTC_DCNT_BTCNT_FREEZE] && -+ !bt->enable.now)) -+ _update_bt_scbd(rtwdev, false); -+ break; -+ case BTC_DCNT_WL_SLOT_DRIFT: -+ if (cnt >= BTC_CHK_WLSLOT_DRIFT_MAX) -+ dm->cnt_dm[BTC_DCNT_WL_SLOT_DRIFT]++; -+ else -+ dm->cnt_dm[BTC_DCNT_WL_SLOT_DRIFT] = 0; -+ -+ if (dm->cnt_dm[BTC_DCNT_WL_SLOT_DRIFT] >= BTC_CHK_HANG_MAX) -+ dm->error.map.wl_slot_drift = true; -+ else -+ dm->error.map.wl_slot_drift = false; -+ break; -+ } -+} -+ -+static void _update_bt_report(struct rtw89_dev *rtwdev, u8 rpt_type, u8 *pfinfo) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_bt_info *bt = &btc->cx.bt; -+ struct rtw89_btc_bt_link_info *bt_linfo = &bt->link_info; -+ struct rtw89_btc_bt_a2dp_desc *a2dp = &bt_linfo->a2dp_desc; -+ struct rtw89_btc_fbtc_btver *pver = NULL; -+ struct rtw89_btc_fbtc_btscan *pscan = NULL; -+ struct rtw89_btc_fbtc_btafh *pafh = NULL; -+ struct rtw89_btc_fbtc_btdevinfo *pdev = NULL; -+ -+ pver = (struct rtw89_btc_fbtc_btver *)pfinfo; -+ pscan = (struct rtw89_btc_fbtc_btscan *)pfinfo; -+ pafh = (struct rtw89_btc_fbtc_btafh *)pfinfo; -+ pdev = (struct rtw89_btc_fbtc_btdevinfo *)pfinfo; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): rpt_type:%d\n", -+ __func__, rpt_type); -+ -+ switch (rpt_type) { -+ case BTC_RPT_TYPE_BT_VER: -+ bt->ver_info.fw = le32_to_cpu(pver->fw_ver); -+ bt->ver_info.fw_coex = le32_get_bits(pver->coex_ver, GENMASK(7, 0)); -+ bt->feature = le32_to_cpu(pver->feature); -+ break; -+ case BTC_RPT_TYPE_BT_SCAN: -+ memcpy(bt->scan_info, pscan->scan, BTC_SCAN_MAX1); -+ break; -+ case BTC_RPT_TYPE_BT_AFH: -+ memcpy(&bt_linfo->afh_map[0], pafh->afh_l, 4); -+ memcpy(&bt_linfo->afh_map[4], pafh->afh_m, 4); -+ memcpy(&bt_linfo->afh_map[8], pafh->afh_h, 2); -+ break; -+ case BTC_RPT_TYPE_BT_DEVICE: -+ a2dp->device_name = le32_to_cpu(pdev->dev_name); -+ a2dp->vendor_id = le16_to_cpu(pdev->vendor_id); -+ a2dp->flush_time = le32_to_cpu(pdev->flush_time); -+ break; -+ default: -+ break; -+ } -+} -+ -+struct rtw89_btc_fbtc_cysta_cpu { -+ u8 fver; -+ u8 rsvd; -+ u16 cycles; -+ u16 cycles_a2dp[CXT_FLCTRL_MAX]; -+ u16 a2dpept; -+ u16 a2dpeptto; -+ u16 tavg_cycle[CXT_MAX]; -+ u16 tmax_cycle[CXT_MAX]; -+ u16 tmaxdiff_cycle[CXT_MAX]; -+ u16 tavg_a2dp[CXT_FLCTRL_MAX]; -+ u16 tmax_a2dp[CXT_FLCTRL_MAX]; -+ u16 tavg_a2dpept; -+ u16 tmax_a2dpept; -+ u16 tavg_lk; -+ u16 tmax_lk; -+ u32 slot_cnt[CXST_MAX]; -+ u32 bcn_cnt[CXBCN_MAX]; -+ u32 leakrx_cnt; -+ u32 collision_cnt; -+ u32 skip_cnt; -+ u32 exception; -+ u32 except_cnt; -+ u16 tslot_cycle[BTC_CYCLE_SLOT_MAX]; -+}; -+ -+static void rtw89_btc_fbtc_cysta_to_cpu(const struct rtw89_btc_fbtc_cysta *src, -+ struct rtw89_btc_fbtc_cysta_cpu *dst) -+{ -+ static_assert(sizeof(*src) == sizeof(*dst)); -+ -+#define __CPY_U8(_x) ({dst->_x = src->_x; }) -+#define __CPY_LE16(_x) ({dst->_x = le16_to_cpu(src->_x); }) -+#define __CPY_LE16S(_x) ({int _i; for (_i = 0; _i < ARRAY_SIZE(dst->_x); _i++) \ -+ dst->_x[_i] = le16_to_cpu(src->_x[_i]); }) -+#define __CPY_LE32(_x) ({dst->_x = le32_to_cpu(src->_x); }) -+#define __CPY_LE32S(_x) ({int _i; for (_i = 0; _i < ARRAY_SIZE(dst->_x); _i++) \ -+ dst->_x[_i] = le32_to_cpu(src->_x[_i]); }) -+ -+ __CPY_U8(fver); -+ __CPY_U8(rsvd); -+ __CPY_LE16(cycles); -+ __CPY_LE16S(cycles_a2dp); -+ __CPY_LE16(a2dpept); -+ __CPY_LE16(a2dpeptto); -+ __CPY_LE16S(tavg_cycle); -+ __CPY_LE16S(tmax_cycle); -+ __CPY_LE16S(tmaxdiff_cycle); -+ __CPY_LE16S(tavg_a2dp); -+ __CPY_LE16S(tmax_a2dp); -+ __CPY_LE16(tavg_a2dpept); -+ __CPY_LE16(tmax_a2dpept); -+ __CPY_LE16(tavg_lk); -+ __CPY_LE16(tmax_lk); -+ __CPY_LE32S(slot_cnt); -+ __CPY_LE32S(bcn_cnt); -+ __CPY_LE32(leakrx_cnt); -+ __CPY_LE32(collision_cnt); -+ __CPY_LE32(skip_cnt); -+ __CPY_LE32(exception); -+ __CPY_LE32(except_cnt); -+ __CPY_LE16S(tslot_cycle); -+ -+#undef __CPY_U8 -+#undef __CPY_LE16 -+#undef __CPY_LE16S -+#undef __CPY_LE32 -+#undef __CPY_LE32S -+} -+ -+#define BTC_LEAK_AP_TH 10 -+#define BTC_CYSTA_CHK_PERIOD 100 -+ -+struct rtw89_btc_prpt { -+ u8 type; -+ __le16 len; -+ u8 content[]; -+} __packed; -+ -+static u32 _chk_btc_report(struct rtw89_dev *rtwdev, -+ struct rtw89_btc_btf_fwinfo *pfwinfo, -+ u8 *prptbuf, u32 index) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_dm *dm = &btc->dm; -+ struct rtw89_btc_rpt_cmn_info *pcinfo = NULL; -+ struct rtw89_btc_wl_info *wl = &btc->cx.wl; -+ struct rtw89_btc_fbtc_rpt_ctrl *prpt = NULL; -+ struct rtw89_btc_fbtc_cysta *pcysta_le32 = NULL; -+ struct rtw89_btc_fbtc_cysta_cpu pcysta[1]; -+ struct rtw89_btc_prpt *btc_prpt = NULL; -+ struct rtw89_btc_fbtc_slot *rtp_slot = NULL; -+ u8 rpt_type = 0, *rpt_content = NULL, *pfinfo = NULL; -+ u16 wl_slot_set = 0; -+ u32 trace_step = btc->ctrl.trace_step, rpt_len = 0, diff_t; -+ u8 i; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): index:%d\n", -+ __func__, index); -+ -+ if (!prptbuf) { -+ pfwinfo->err[BTFRE_INVALID_INPUT]++; -+ return 0; -+ } -+ -+ btc_prpt = (struct rtw89_btc_prpt *)&prptbuf[index]; -+ rpt_type = btc_prpt->type; -+ rpt_len = le16_to_cpu(btc_prpt->len); -+ rpt_content = btc_prpt->content; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): rpt_type:%d\n", -+ __func__, rpt_type); -+ -+ switch (rpt_type) { -+ case BTC_RPT_TYPE_CTRL: -+ pcinfo = &pfwinfo->rpt_ctrl.cinfo; -+ pfinfo = (u8 *)(&pfwinfo->rpt_ctrl.finfo); -+ pcinfo->req_len = sizeof(pfwinfo->rpt_ctrl.finfo); -+ pcinfo->req_fver = BTCRPT_VER; -+ pcinfo->rx_len = rpt_len; -+ pcinfo->rx_cnt++; -+ break; -+ case BTC_RPT_TYPE_TDMA: -+ pcinfo = &pfwinfo->rpt_fbtc_tdma.cinfo; -+ pfinfo = (u8 *)(&pfwinfo->rpt_fbtc_tdma.finfo); -+ pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_tdma.finfo); -+ pcinfo->req_fver = FCXTDMA_VER; -+ pcinfo->rx_len = rpt_len; -+ pcinfo->rx_cnt++; -+ break; -+ case BTC_RPT_TYPE_SLOT: -+ pcinfo = &pfwinfo->rpt_fbtc_slots.cinfo; -+ pfinfo = (u8 *)(&pfwinfo->rpt_fbtc_slots.finfo); -+ pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_slots.finfo); -+ pcinfo->req_fver = FCXSLOTS_VER; -+ pcinfo->rx_len = rpt_len; -+ pcinfo->rx_cnt++; -+ break; -+ case BTC_RPT_TYPE_CYSTA: -+ pcinfo = &pfwinfo->rpt_fbtc_cysta.cinfo; -+ pfinfo = (u8 *)(&pfwinfo->rpt_fbtc_cysta.finfo); -+ pcysta_le32 = &pfwinfo->rpt_fbtc_cysta.finfo; -+ rtw89_btc_fbtc_cysta_to_cpu(pcysta_le32, pcysta); -+ pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_cysta.finfo); -+ pcinfo->req_fver = FCXCYSTA_VER; -+ pcinfo->rx_len = rpt_len; -+ pcinfo->rx_cnt++; -+ break; -+ case BTC_RPT_TYPE_STEP: -+ pcinfo = &pfwinfo->rpt_fbtc_step.cinfo; -+ pfinfo = (u8 *)(&pfwinfo->rpt_fbtc_step.finfo); -+ pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_step.finfo.step[0]) * -+ trace_step + 8; -+ pcinfo->req_fver = FCXSTEP_VER; -+ pcinfo->rx_len = rpt_len; -+ pcinfo->rx_cnt++; -+ break; -+ case BTC_RPT_TYPE_NULLSTA: -+ pcinfo = &pfwinfo->rpt_fbtc_nullsta.cinfo; -+ pfinfo = (u8 *)(&pfwinfo->rpt_fbtc_nullsta.finfo); -+ pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_nullsta.finfo); -+ pcinfo->req_fver = FCXNULLSTA_VER; -+ pcinfo->rx_len = rpt_len; -+ pcinfo->rx_cnt++; -+ break; -+ case BTC_RPT_TYPE_MREG: -+ pcinfo = &pfwinfo->rpt_fbtc_mregval.cinfo; -+ pfinfo = (u8 *)(&pfwinfo->rpt_fbtc_mregval.finfo); -+ pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_mregval.finfo); -+ pcinfo->req_fver = FCXMREG_VER; -+ pcinfo->rx_len = rpt_len; -+ pcinfo->rx_cnt++; -+ break; -+ case BTC_RPT_TYPE_GPIO_DBG: -+ pcinfo = &pfwinfo->rpt_fbtc_gpio_dbg.cinfo; -+ pfinfo = (u8 *)(&pfwinfo->rpt_fbtc_gpio_dbg.finfo); -+ pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_gpio_dbg.finfo); -+ pcinfo->req_fver = FCXGPIODBG_VER; -+ pcinfo->rx_len = rpt_len; -+ pcinfo->rx_cnt++; -+ break; -+ case BTC_RPT_TYPE_BT_VER: -+ pcinfo = &pfwinfo->rpt_fbtc_btver.cinfo; -+ pfinfo = (u8 *)(&pfwinfo->rpt_fbtc_btver.finfo); -+ pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_btver.finfo); -+ pcinfo->req_fver = FCX_BTVER_VER; -+ pcinfo->rx_len = rpt_len; -+ pcinfo->rx_cnt++; -+ break; -+ case BTC_RPT_TYPE_BT_SCAN: -+ pcinfo = &pfwinfo->rpt_fbtc_btscan.cinfo; -+ pfinfo = (u8 *)(&pfwinfo->rpt_fbtc_btscan.finfo); -+ pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_btscan.finfo); -+ pcinfo->req_fver = FCX_BTSCAN_VER; -+ pcinfo->rx_len = rpt_len; -+ pcinfo->rx_cnt++; -+ break; -+ case BTC_RPT_TYPE_BT_AFH: -+ pcinfo = &pfwinfo->rpt_fbtc_btafh.cinfo; -+ pfinfo = (u8 *)(&pfwinfo->rpt_fbtc_btafh.finfo); -+ pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_btafh.finfo); -+ pcinfo->req_fver = FCX_BTAFH_VER; -+ pcinfo->rx_len = rpt_len; -+ pcinfo->rx_cnt++; -+ break; -+ case BTC_RPT_TYPE_BT_DEVICE: -+ pcinfo = &pfwinfo->rpt_fbtc_btdev.cinfo; -+ pfinfo = (u8 *)(&pfwinfo->rpt_fbtc_btdev.finfo); -+ pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_btdev.finfo); -+ pcinfo->req_fver = FCX_BTDEVINFO_VER; -+ pcinfo->rx_len = rpt_len; -+ pcinfo->rx_cnt++; -+ break; -+ default: -+ pfwinfo->err[BTFRE_UNDEF_TYPE]++; -+ return 0; -+ } -+ -+ if (rpt_len != pcinfo->req_len) { -+ if (rpt_type < BTC_RPT_TYPE_MAX) -+ pfwinfo->len_mismch |= (0x1 << rpt_type); -+ else -+ pfwinfo->len_mismch |= BIT(31); -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): %d rpt_len:%d!=req_len:%d\n", -+ __func__, rpt_type, rpt_len, pcinfo->req_len); -+ -+ pcinfo->valid = 0; -+ return 0; -+ } else if (!pfinfo || !rpt_content || !pcinfo->req_len) { -+ pfwinfo->err[BTFRE_EXCEPTION]++; -+ pcinfo->valid = 0; -+ return 0; -+ } -+ -+ memcpy(pfinfo, rpt_content, pcinfo->req_len); -+ pcinfo->valid = 1; -+ -+ if (rpt_type == BTC_RPT_TYPE_TDMA) { -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): check %d %zu\n", __func__, -+ BTC_DCNT_TDMA_NONSYNC, sizeof(dm->tdma_now)); -+ -+ if (memcmp(&dm->tdma_now, &pfwinfo->rpt_fbtc_tdma.finfo, -+ sizeof(dm->tdma_now)) != 0) { -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): %d tdma_now %x %x %x %x %x %x %x %x\n", -+ __func__, BTC_DCNT_TDMA_NONSYNC, -+ dm->tdma_now.type, dm->tdma_now.rxflctrl, -+ dm->tdma_now.txpause, dm->tdma_now.wtgle_n, -+ dm->tdma_now.leak_n, dm->tdma_now.ext_ctrl, -+ dm->tdma_now.rsvd0, dm->tdma_now.rsvd1); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): %d rpt_fbtc_tdma %x %x %x %x %x %x %x %x\n", -+ __func__, BTC_DCNT_TDMA_NONSYNC, -+ pfwinfo->rpt_fbtc_tdma.finfo.type, -+ pfwinfo->rpt_fbtc_tdma.finfo.rxflctrl, -+ pfwinfo->rpt_fbtc_tdma.finfo.txpause, -+ pfwinfo->rpt_fbtc_tdma.finfo.wtgle_n, -+ pfwinfo->rpt_fbtc_tdma.finfo.leak_n, -+ pfwinfo->rpt_fbtc_tdma.finfo.ext_ctrl, -+ pfwinfo->rpt_fbtc_tdma.finfo.rsvd0, -+ pfwinfo->rpt_fbtc_tdma.finfo.rsvd1); -+ } -+ -+ _chk_btc_err(rtwdev, BTC_DCNT_TDMA_NONSYNC, -+ memcmp(&dm->tdma_now, -+ &pfwinfo->rpt_fbtc_tdma.finfo, -+ sizeof(dm->tdma_now))); -+ } -+ -+ if (rpt_type == BTC_RPT_TYPE_SLOT) { -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): check %d %zu\n", -+ __func__, BTC_DCNT_SLOT_NONSYNC, -+ sizeof(dm->slot_now)); -+ -+ if (memcmp(dm->slot_now, pfwinfo->rpt_fbtc_slots.finfo.slot, -+ sizeof(dm->slot_now)) != 0) { -+ for (i = 0; i < CXST_MAX; i++) { -+ rtp_slot = -+ &pfwinfo->rpt_fbtc_slots.finfo.slot[i]; -+ if (memcmp(&dm->slot_now[i], rtp_slot, -+ sizeof(dm->slot_now[i])) != 0) { -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): %d slot_now[%d] dur=0x%04x tbl=%08x type=0x%04x\n", -+ __func__, -+ BTC_DCNT_SLOT_NONSYNC, i, -+ dm->slot_now[i].dur, -+ dm->slot_now[i].cxtbl, -+ dm->slot_now[i].cxtype); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): %d rpt_fbtc_slots[%d] dur=0x%04x tbl=%08x type=0x%04x\n", -+ __func__, -+ BTC_DCNT_SLOT_NONSYNC, i, -+ rtp_slot->dur, -+ rtp_slot->cxtbl, -+ rtp_slot->cxtype); -+ } -+ } -+ } -+ _chk_btc_err(rtwdev, BTC_DCNT_SLOT_NONSYNC, -+ memcmp(dm->slot_now, -+ pfwinfo->rpt_fbtc_slots.finfo.slot, -+ sizeof(dm->slot_now))); -+ } -+ -+ if (rpt_type == BTC_RPT_TYPE_CYSTA && -+ pcysta->cycles >= BTC_CYSTA_CHK_PERIOD) { -+ /* Check Leak-AP */ -+ if (pcysta->slot_cnt[CXST_LK] != 0 && -+ pcysta->leakrx_cnt != 0 && dm->tdma_now.rxflctrl) { -+ if (pcysta->slot_cnt[CXST_LK] < -+ BTC_LEAK_AP_TH * pcysta->leakrx_cnt) -+ dm->leak_ap = 1; -+ } -+ -+ /* Check diff time between WL slot and W1/E2G slot */ -+ if (dm->tdma_now.type == CXTDMA_OFF && -+ dm->tdma_now.ext_ctrl == CXECTL_EXT) -+ wl_slot_set = le16_to_cpu(dm->slot_now[CXST_E2G].dur); -+ else -+ wl_slot_set = le16_to_cpu(dm->slot_now[CXST_W1].dur); -+ -+ if (pcysta->tavg_cycle[CXT_WL] > wl_slot_set) { -+ diff_t = pcysta->tavg_cycle[CXT_WL] - wl_slot_set; -+ _chk_btc_err(rtwdev, BTC_DCNT_WL_SLOT_DRIFT, diff_t); -+ } -+ } -+ -+ if (rpt_type == BTC_RPT_TYPE_CTRL) { -+ prpt = &pfwinfo->rpt_ctrl.finfo; -+ btc->fwinfo.rpt_en_map = prpt->rpt_enable; -+ wl->ver_info.fw_coex = prpt->wl_fw_coex_ver; -+ wl->ver_info.fw = prpt->wl_fw_ver; -+ dm->wl_fw_cx_offload = !!(prpt->wl_fw_cx_offload); -+ } -+ -+ if (rpt_type >= BTC_RPT_TYPE_BT_VER && -+ rpt_type <= BTC_RPT_TYPE_BT_DEVICE) -+ _update_bt_report(rtwdev, rpt_type, pfinfo); -+ -+ return (rpt_len + BTC_RPT_HDR_SIZE); -+} -+ -+static void _parse_btc_report(struct rtw89_dev *rtwdev, -+ struct rtw89_btc_btf_fwinfo *pfwinfo, -+ u8 *pbuf, u32 buf_len) -+{ -+ struct rtw89_btc_prpt *btc_prpt = NULL; -+ u32 index = 0, rpt_len = 0; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): buf_len:%d\n", -+ __func__, buf_len); -+ -+ while (pbuf) { -+ btc_prpt = (struct rtw89_btc_prpt *)&pbuf[index]; -+ if (index + 2 >= BTC_FWINFO_BUF) -+ break; -+ /* At least 3 bytes: type(1) & len(2) */ -+ rpt_len = le16_to_cpu(btc_prpt->len); -+ if ((index + rpt_len + BTC_RPT_HDR_SIZE) > buf_len) -+ break; -+ -+ rpt_len = _chk_btc_report(rtwdev, pfwinfo, pbuf, index); -+ if (!rpt_len) -+ break; -+ index += rpt_len; -+ } -+} -+ -+#define BTC_TLV_HDR_LEN 2 -+ -+static void _append_tdma(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_dm *dm = &btc->dm; -+ struct rtw89_btc_btf_tlv *tlv = NULL; -+ struct rtw89_btc_fbtc_tdma *v = NULL; -+ u16 len = btc->policy_len; -+ -+ if (!btc->update_policy_force && -+ !memcmp(&dm->tdma, &dm->tdma_now, sizeof(dm->tdma))) { -+ rtw89_debug(rtwdev, -+ RTW89_DBG_BTC, "[BTC], %s(): tdma no change!\n", -+ __func__); -+ return; -+ } -+ -+ tlv = (struct rtw89_btc_btf_tlv *)&btc->policy[len]; -+ v = (struct rtw89_btc_fbtc_tdma *)&tlv->val[0]; -+ tlv->type = CXPOLICY_TDMA; -+ tlv->len = sizeof(*v); -+ -+ memcpy(v, &dm->tdma, sizeof(*v)); -+ btc->policy_len += BTC_TLV_HDR_LEN + sizeof(*v); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): type:%d, rxflctrl=%d, txpause=%d, wtgle_n=%d, leak_n=%d, ext_ctrl=%d\n", -+ __func__, dm->tdma.type, dm->tdma.rxflctrl, -+ dm->tdma.txpause, dm->tdma.wtgle_n, dm->tdma.leak_n, -+ dm->tdma.ext_ctrl); -+} -+ -+static void _append_slot(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_dm *dm = &btc->dm; -+ struct rtw89_btc_btf_tlv *tlv = NULL; -+ struct btc_fbtc_1slot *v = NULL; -+ u16 len = 0; -+ u8 i, cnt = 0; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): A:btc->policy_len = %d\n", -+ __func__, btc->policy_len); -+ -+ for (i = 0; i < CXST_MAX; i++) { -+ if (!btc->update_policy_force && -+ !memcmp(&dm->slot[i], &dm->slot_now[i], -+ sizeof(dm->slot[i]))) -+ continue; -+ -+ len = btc->policy_len; -+ -+ tlv = (struct rtw89_btc_btf_tlv *)&btc->policy[len]; -+ v = (struct btc_fbtc_1slot *)&tlv->val[0]; -+ tlv->type = CXPOLICY_SLOT; -+ tlv->len = sizeof(*v); -+ -+ v->fver = FCXONESLOT_VER; -+ v->sid = i; -+ v->slot = dm->slot[i]; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): slot-%d: dur=%d, table=0x%08x, type=%d\n", -+ __func__, i, dm->slot[i].dur, dm->slot[i].cxtbl, -+ dm->slot[i].cxtype); -+ cnt++; -+ -+ btc->policy_len += BTC_TLV_HDR_LEN + sizeof(*v); -+ } -+ -+ if (cnt > 0) -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): slot update (cnt=%d)!!\n", -+ __func__, cnt); -+} -+ -+static void rtw89_btc_fw_en_rpt(struct rtw89_dev *rtwdev, -+ u32 rpt_map, bool rpt_state) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_btf_fwinfo *fwinfo = &btc->fwinfo; -+ struct rtw89_btc_btf_set_report r = {0}; -+ u32 val = 0; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): rpt_map=%x, rpt_state=%x\n", -+ __func__, rpt_map, rpt_state); -+ -+ if (rpt_state) -+ val = fwinfo->rpt_en_map | rpt_map; -+ else -+ val = fwinfo->rpt_en_map & ~rpt_map; -+ -+ if (val == fwinfo->rpt_en_map) -+ return; -+ -+ fwinfo->rpt_en_map = val; -+ -+ r.fver = BTF_SET_REPORT_VER; -+ r.enable = cpu_to_le32(val); -+ r.para = cpu_to_le32(rpt_state); -+ -+ _send_fw_cmd(rtwdev, BTFC_SET, SET_REPORT_EN, &r, sizeof(r)); -+} -+ -+static void rtw89_btc_fw_set_slots(struct rtw89_dev *rtwdev, u8 num, -+ struct rtw89_btc_fbtc_slot *s) -+{ -+ struct rtw89_btc_btf_set_slot_table *tbl = NULL; -+ u8 *ptr = NULL; -+ u16 n = 0; -+ -+ n = sizeof(*s) * num + sizeof(*tbl); -+ tbl = kmalloc(n, GFP_KERNEL); -+ if (!tbl) -+ return; -+ -+ tbl->fver = BTF_SET_SLOT_TABLE_VER; -+ tbl->tbl_num = num; -+ ptr = &tbl->buf[0]; -+ memcpy(ptr, s, num * sizeof(*s)); -+ -+ _send_fw_cmd(rtwdev, BTFC_SET, SET_SLOT_TABLE, tbl, n); -+ -+ kfree(tbl); -+} -+ -+static void btc_fw_set_monreg(struct rtw89_dev *rtwdev) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ struct rtw89_btc_btf_set_mon_reg *monreg = NULL; -+ u8 n, *ptr = NULL, ulen; -+ u16 sz = 0; -+ -+ n = chip->mon_reg_num; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): mon_reg_num=%d\n", __func__, n); -+ if (n > CXMREG_MAX) { -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): mon reg count %d > %d\n", -+ __func__, n, CXMREG_MAX); -+ return; -+ } -+ -+ ulen = sizeof(struct rtw89_btc_fbtc_mreg); -+ sz = (ulen * n) + sizeof(*monreg); -+ monreg = kmalloc(sz, GFP_KERNEL); -+ if (!monreg) -+ return; -+ -+ monreg->fver = BTF_SET_MON_REG_VER; -+ monreg->reg_num = n; -+ ptr = &monreg->buf[0]; -+ memcpy(ptr, chip->mon_reg, n * ulen); -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): sz=%d ulen=%d n=%d\n", -+ __func__, sz, ulen, n); -+ -+ _send_fw_cmd(rtwdev, BTFC_SET, SET_MREG_TABLE, (u8 *)monreg, sz); -+ kfree(monreg); -+ rtw89_btc_fw_en_rpt(rtwdev, RPT_EN_MREG, 1); -+} -+ -+static void _update_dm_step(struct rtw89_dev *rtwdev, -+ enum btc_reason_and_action reason_or_action) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_dm *dm = &btc->dm; -+ -+ /* use ring-structure to store dm step */ -+ dm->dm_step.step[dm->dm_step.step_pos] = reason_or_action; -+ dm->dm_step.step_pos++; -+ -+ if (dm->dm_step.step_pos >= ARRAY_SIZE(dm->dm_step.step)) { -+ dm->dm_step.step_pos = 0; -+ dm->dm_step.step_ov = true; -+ } -+} -+ -+static void _fw_set_policy(struct rtw89_dev *rtwdev, u16 policy_type, -+ enum btc_reason_and_action action) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_dm *dm = &btc->dm; -+ -+ dm->run_action = action; -+ -+ _update_dm_step(rtwdev, action | BTC_ACT_EXT_BIT); -+ _update_dm_step(rtwdev, policy_type | BTC_POLICY_EXT_BIT); -+ -+ btc->policy_len = 0; -+ btc->policy_type = policy_type; -+ -+ _append_tdma(rtwdev); -+ _append_slot(rtwdev); -+ -+ if (btc->policy_len == 0 || btc->policy_len > RTW89_BTC_POLICY_MAXLEN) -+ return; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): action = %d -> policy type/len: 0x%04x/%d\n", -+ __func__, action, policy_type, btc->policy_len); -+ -+ if (dm->tdma.rxflctrl == CXFLC_NULLP || -+ dm->tdma.rxflctrl == CXFLC_QOSNULL) -+ btc->lps = 1; -+ else -+ btc->lps = 0; -+ -+ if (btc->lps == 1) -+ rtw89_set_coex_ctrl_lps(rtwdev, btc->lps); -+ -+ _send_fw_cmd(rtwdev, BTFC_SET, SET_CX_POLICY, -+ btc->policy, btc->policy_len); -+ -+ memcpy(&dm->tdma_now, &dm->tdma, sizeof(dm->tdma_now)); -+ memcpy(&dm->slot_now, &dm->slot, sizeof(dm->slot_now)); -+ -+ if (btc->update_policy_force) -+ btc->update_policy_force = false; -+ -+ if (btc->lps == 0) -+ rtw89_set_coex_ctrl_lps(rtwdev, btc->lps); -+} -+ -+static void _fw_set_drv_info(struct rtw89_dev *rtwdev, u8 type) -+{ -+ switch (type) { -+ case CXDRVINFO_INIT: -+ rtw89_fw_h2c_cxdrv_init(rtwdev); -+ break; -+ case CXDRVINFO_ROLE: -+ rtw89_fw_h2c_cxdrv_role(rtwdev); -+ break; -+ case CXDRVINFO_CTRL: -+ rtw89_fw_h2c_cxdrv_ctrl(rtwdev); -+ break; -+ case CXDRVINFO_RFK: -+ rtw89_fw_h2c_cxdrv_rfk(rtwdev); -+ break; -+ default: -+ break; -+ } -+} -+ -+static -+void btc_fw_event(struct rtw89_dev *rtwdev, u8 evt_id, void *data, u32 len) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_btf_fwinfo *pfwinfo = &btc->fwinfo; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): evt_id:%d len:%d\n", -+ __func__, evt_id, len); -+ -+ if (!len || !data) -+ return; -+ -+ switch (evt_id) { -+ case BTF_EVNT_RPT: -+ _parse_btc_report(rtwdev, pfwinfo, data, len); -+ break; -+ default: -+ break; -+ } -+} -+ -+static void _set_gnt_wl(struct rtw89_dev *rtwdev, u8 phy_map, u8 state) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_dm *dm = &btc->dm; -+ struct rtw89_mac_ax_gnt *g = dm->gnt.band; -+ u8 i; -+ -+ if (phy_map > BTC_PHY_ALL) -+ return; -+ -+ for (i = 0; i < RTW89_PHY_MAX; i++) { -+ if (!(phy_map & BIT(i))) -+ continue; -+ -+ switch (state) { -+ case BTC_GNT_HW: -+ g[i].gnt_wl_sw_en = 0; -+ g[i].gnt_wl = 0; -+ break; -+ case BTC_GNT_SW_LO: -+ g[i].gnt_wl_sw_en = 1; -+ g[i].gnt_wl = 0; -+ break; -+ case BTC_GNT_SW_HI: -+ g[i].gnt_wl_sw_en = 1; -+ g[i].gnt_wl = 1; -+ break; -+ } -+ } -+ -+ rtw89_mac_cfg_gnt(rtwdev, &dm->gnt); -+} -+ -+#define BTC_TDMA_WLROLE_MAX 2 -+ -+static void _set_bt_ignore_wlan_act(struct rtw89_dev *rtwdev, u8 enable) -+{ -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): set bt %s wlan_act\n", __func__, -+ enable ? "ignore" : "do not ignore"); -+ -+ _send_fw_cmd(rtwdev, BTFC_SET, SET_BT_IGNORE_WLAN_ACT, &enable, 1); -+} -+ -+#define WL_TX_POWER_NO_BTC_CTRL GENMASK(31, 0) -+#define WL_TX_POWER_ALL_TIME GENMASK(15, 0) -+#define WL_TX_POWER_WITH_BT GENMASK(31, 16) -+#define WL_TX_POWER_INT_PART GENMASK(8, 2) -+#define WL_TX_POWER_FRA_PART GENMASK(1, 0) -+#define B_BTC_WL_TX_POWER_SIGN BIT(7) -+#define B_TSSI_WL_TX_POWER_SIGN BIT(8) -+ -+static void _set_wl_tx_power(struct rtw89_dev *rtwdev, u32 level) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_wl_info *wl = &btc->cx.wl; -+ u32 pwr_val; -+ -+ if (wl->rf_para.tx_pwr_freerun == level) -+ return; -+ -+ wl->rf_para.tx_pwr_freerun = level; -+ btc->dm.rf_trx_para.wl_tx_power = level; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): level = %d\n", -+ __func__, level); -+ -+ if (level == RTW89_BTC_WL_DEF_TX_PWR) { -+ pwr_val = WL_TX_POWER_NO_BTC_CTRL; -+ } else { /* only apply "force tx power" */ -+ pwr_val = FIELD_PREP(WL_TX_POWER_INT_PART, level); -+ if (pwr_val > RTW89_BTC_WL_DEF_TX_PWR) -+ pwr_val = RTW89_BTC_WL_DEF_TX_PWR; -+ -+ if (level & B_BTC_WL_TX_POWER_SIGN) -+ pwr_val |= B_TSSI_WL_TX_POWER_SIGN; -+ pwr_val |= WL_TX_POWER_WITH_BT; -+ } -+ -+ chip->ops->btc_set_wl_txpwr_ctrl(rtwdev, pwr_val); -+} -+ -+static void _set_wl_rx_gain(struct rtw89_dev *rtwdev, u32 level) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_wl_info *wl = &btc->cx.wl; -+ -+ if (wl->rf_para.rx_gain_freerun == level) -+ return; -+ -+ wl->rf_para.rx_gain_freerun = level; -+ btc->dm.rf_trx_para.wl_rx_gain = level; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): level = %d\n", -+ __func__, level); -+} -+ -+static void _set_bt_tx_power(struct rtw89_dev *rtwdev, u8 level) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_bt_info *bt = &btc->cx.bt; -+ u8 buf; -+ -+ if (bt->rf_para.tx_pwr_freerun == level) -+ return; -+ -+ bt->rf_para.tx_pwr_freerun = level; -+ btc->dm.rf_trx_para.bt_tx_power = level; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): level = %d\n", -+ __func__, level); -+ -+ buf = (s8)(-level); -+ _send_fw_cmd(rtwdev, BTFC_SET, SET_BT_TX_PWR, &buf, 1); -+} -+ -+#define BTC_BT_RX_NORMAL_LVL 7 -+ -+static void _set_bt_rx_gain(struct rtw89_dev *rtwdev, u8 level) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_bt_info *bt = &btc->cx.bt; -+ -+ if (bt->rf_para.rx_gain_freerun == level || -+ level > BTC_BT_RX_NORMAL_LVL) -+ return; -+ -+ bt->rf_para.rx_gain_freerun = level; -+ btc->dm.rf_trx_para.bt_rx_gain = level; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): level = %d\n", -+ __func__, level); -+ -+ if (level == BTC_BT_RX_NORMAL_LVL) -+ _write_scbd(rtwdev, BTC_WSCB_RXGAIN, false); -+ else -+ _write_scbd(rtwdev, BTC_WSCB_RXGAIN, true); -+ -+ _send_fw_cmd(rtwdev, BTFC_SET, SET_BT_LNA_CONSTRAIN, &level, 1); -+} -+ -+static void _set_rf_trx_para(struct rtw89_dev *rtwdev) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_dm *dm = &btc->dm; -+ struct rtw89_btc_wl_info *wl = &btc->cx.wl; -+ struct rtw89_btc_bt_info *bt = &btc->cx.bt; -+ struct rtw89_btc_rf_trx_para para; -+ u32 wl_stb_chg = 0; -+ u8 level_id = 0; -+ -+ if (!dm->freerun) { -+ dm->trx_para_level = 0; -+ chip->ops->btc_bt_aci_imp(rtwdev); -+ } -+ -+ level_id = (u8)dm->trx_para_level; -+ -+ if (level_id >= chip->rf_para_dlink_num || -+ level_id >= chip->rf_para_ulink_num) { -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): invalid level_id: %d\n", -+ __func__, level_id); -+ return; -+ } -+ -+ if (wl->status.map.traffic_dir & BIT(RTW89_TFC_UL)) -+ para = chip->rf_para_ulink[level_id]; -+ else -+ para = chip->rf_para_dlink[level_id]; -+ -+ if (para.wl_tx_power != RTW89_BTC_WL_DEF_TX_PWR) -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): wl_tx_power=%d\n", -+ __func__, para.wl_tx_power); -+ _set_wl_tx_power(rtwdev, para.wl_tx_power); -+ _set_wl_rx_gain(rtwdev, para.wl_rx_gain); -+ _set_bt_tx_power(rtwdev, para.bt_tx_power); -+ _set_bt_rx_gain(rtwdev, para.bt_rx_gain); -+ -+ if (bt->enable.now == 0 || wl->status.map.rf_off == 1 || -+ wl->status.map.lps == 1) -+ wl_stb_chg = 0; -+ else -+ wl_stb_chg = 1; -+ -+ if (wl_stb_chg != dm->wl_stb_chg) { -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): wl_stb_chg=%d\n", -+ __func__, wl_stb_chg); -+ dm->wl_stb_chg = wl_stb_chg; -+ chip->ops->btc_wl_s1_standby(rtwdev, dm->wl_stb_chg); -+ } -+} -+ -+static void _update_btc_state_map(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_cx *cx = &btc->cx; -+ struct rtw89_btc_wl_info *wl = &cx->wl; -+ struct rtw89_btc_bt_info *bt = &cx->bt; -+ struct rtw89_btc_bt_link_info *bt_linfo = &bt->link_info; -+ -+ if (wl->status.map.connecting || wl->status.map._4way || -+ wl->status.map.roaming) { -+ cx->state_map = BTC_WLINKING; -+ } else if (wl->status.map.scan) { /* wl scan */ -+ if (bt_linfo->status.map.inq_pag) -+ cx->state_map = BTC_WSCAN_BSCAN; -+ else -+ cx->state_map = BTC_WSCAN_BNOSCAN; -+ } else if (wl->status.map.busy) { /* only busy */ -+ if (bt_linfo->status.map.inq_pag) -+ cx->state_map = BTC_WBUSY_BSCAN; -+ else -+ cx->state_map = BTC_WBUSY_BNOSCAN; -+ } else { /* wl idle */ -+ cx->state_map = BTC_WIDLE; -+ } -+} -+ -+static void _set_bt_afh_info(struct rtw89_dev *rtwdev) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_wl_info *wl = &btc->cx.wl; -+ struct rtw89_btc_bt_info *bt = &btc->cx.bt; -+ struct rtw89_btc_bt_link_info *b = &bt->link_info; -+ struct rtw89_btc_wl_role_info *wl_rinfo = &wl->role_info; -+ u8 en = 0, i, ch = 0, bw = 0; -+ -+ if (btc->ctrl.manual || wl->status.map.scan) -+ return; -+ -+ /* TODO if include module->ant.type == BTC_ANT_SHARED */ -+ if (wl->status.map.rf_off || bt->whql_test || -+ wl_rinfo->link_mode == BTC_WLINK_NOLINK || -+ wl_rinfo->link_mode == BTC_WLINK_5G || -+ wl_rinfo->connect_cnt > BTC_TDMA_WLROLE_MAX) { -+ en = false; -+ } else if (wl_rinfo->link_mode == BTC_WLINK_2G_MCC || -+ wl_rinfo->link_mode == BTC_WLINK_2G_SCC) { -+ en = true; -+ /* get p2p channel */ -+ for (i = 0; i < RTW89_MAX_HW_PORT_NUM; i++) { -+ if (wl_rinfo->active_role[i].role == -+ RTW89_WIFI_ROLE_P2P_GO || -+ wl_rinfo->active_role[i].role == -+ RTW89_WIFI_ROLE_P2P_CLIENT) { -+ ch = wl_rinfo->active_role[i].ch; -+ bw = wl_rinfo->active_role[i].bw; -+ break; -+ } -+ } -+ } else { -+ en = true; -+ /* get 2g channel */ -+ for (i = 0; i < RTW89_MAX_HW_PORT_NUM; i++) { -+ if (wl_rinfo->active_role[i].connected && -+ wl_rinfo->active_role[i].band == RTW89_BAND_2G) { -+ ch = wl_rinfo->active_role[i].ch; -+ bw = wl_rinfo->active_role[i].bw; -+ break; -+ } -+ } -+ } -+ -+ switch (bw) { -+ case RTW89_CHANNEL_WIDTH_20: -+ bw = 20 + chip->afh_guard_ch * 2; -+ break; -+ case RTW89_CHANNEL_WIDTH_40: -+ bw = 40 + chip->afh_guard_ch * 2; -+ break; -+ case RTW89_CHANNEL_WIDTH_5: -+ bw = 5 + chip->afh_guard_ch * 2; -+ break; -+ case RTW89_CHANNEL_WIDTH_10: -+ bw = 10 + chip->afh_guard_ch * 2; -+ break; -+ default: -+ bw = 0; -+ en = false; /* turn off AFH info if BW > 40 */ -+ break; -+ } -+ -+ if (wl->afh_info.en == en && -+ wl->afh_info.ch == ch && -+ wl->afh_info.bw == bw && -+ b->profile_cnt.last == b->profile_cnt.now) { -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): return because no change!\n", -+ __func__); -+ return; -+ } -+ -+ wl->afh_info.en = en; -+ wl->afh_info.ch = ch; -+ wl->afh_info.bw = bw; -+ -+ _send_fw_cmd(rtwdev, BTFC_SET, SET_BT_WL_CH_INFO, &wl->afh_info, 3); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): en=%d, ch=%d, bw=%d\n", -+ __func__, en, ch, bw); -+ btc->cx.cnt_wl[BTC_WCNT_CH_UPDATE]++; -+} -+ -+static bool _check_freerun(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_wl_info *wl = &btc->cx.wl; -+ struct rtw89_btc_bt_info *bt = &btc->cx.bt; -+ struct rtw89_btc_wl_role_info *wl_rinfo = &wl->role_info; -+ struct rtw89_btc_bt_link_info *bt_linfo = &bt->link_info; -+ struct rtw89_btc_bt_hid_desc *hid = &bt_linfo->hid_desc; -+ -+ if (btc->mdinfo.ant.type == BTC_ANT_SHARED) { -+ btc->dm.trx_para_level = 0; -+ return false; -+ } -+ -+ /* The below is dedicated antenna case */ -+ if (wl_rinfo->connect_cnt > BTC_TDMA_WLROLE_MAX) { -+ btc->dm.trx_para_level = 5; -+ return true; -+ } -+ -+ if (bt_linfo->profile_cnt.now == 0) { -+ btc->dm.trx_para_level = 5; -+ return true; -+ } -+ -+ if (hid->pair_cnt > BTC_TDMA_BTHID_MAX) { -+ btc->dm.trx_para_level = 5; -+ return true; -+ } -+ -+ /* TODO get isolation by BT psd */ -+ if (btc->mdinfo.ant.isolation >= BTC_FREERUN_ANTISO_MIN) { -+ btc->dm.trx_para_level = 5; -+ return true; -+ } -+ -+ if (!wl->status.map.busy) {/* wl idle -> freerun */ -+ btc->dm.trx_para_level = 5; -+ return true; -+ } else if (wl->rssi_level > 1) {/* WL rssi < 50% (-60dBm) */ -+ btc->dm.trx_para_level = 0; -+ return false; -+ } else if (wl->status.map.traffic_dir & BIT(RTW89_TFC_UL)) { -+ if (wl->rssi_level == 0 && bt_linfo->rssi > 31) { -+ btc->dm.trx_para_level = 6; -+ return true; -+ } else if (wl->rssi_level == 1 && bt_linfo->rssi > 36) { -+ btc->dm.trx_para_level = 7; -+ return true; -+ } -+ btc->dm.trx_para_level = 0; -+ return false; -+ } else if (wl->status.map.traffic_dir & BIT(RTW89_TFC_DL)) { -+ if (bt_linfo->rssi > 28) { -+ btc->dm.trx_para_level = 6; -+ return true; -+ } -+ } -+ -+ btc->dm.trx_para_level = 0; -+ return false; -+} -+ -+#define _tdma_set_flctrl(btc, flc) ({(btc)->dm.tdma.rxflctrl = flc; }) -+#define _tdma_set_tog(btc, wtg) ({(btc)->dm.tdma.wtgle_n = wtg; }) -+#define _tdma_set_lek(btc, lek) ({(btc)->dm.tdma.leak_n = lek; }) -+ -+#define _slot_set(btc, sid, dura, tbl, type) \ -+ do { \ -+ typeof(sid) _sid = (sid); \ -+ typeof(btc) _btc = (btc); \ -+ _btc->dm.slot[_sid].dur = cpu_to_le16(dura);\ -+ _btc->dm.slot[_sid].cxtbl = cpu_to_le32(tbl); \ -+ _btc->dm.slot[_sid].cxtype = cpu_to_le16(type); \ -+ } while (0) -+ -+#define _slot_set_dur(btc, sid, dura) (btc)->dm.slot[sid].dur = cpu_to_le16(dura) -+#define _slot_set_tbl(btc, sid, tbl) (btc)->dm.slot[sid].cxtbl = cpu_to_le32(tbl) -+#define _slot_set_type(btc, sid, type) (btc)->dm.slot[sid].cxtype = cpu_to_le16(type) -+ -+struct btc_btinfo_lb2 { -+ u8 connect: 1; -+ u8 sco_busy: 1; -+ u8 inq_pag: 1; -+ u8 acl_busy: 1; -+ u8 hfp: 1; -+ u8 hid: 1; -+ u8 a2dp: 1; -+ u8 pan: 1; -+}; -+ -+struct btc_btinfo_lb3 { -+ u8 retry: 4; -+ u8 cqddr: 1; -+ u8 inq: 1; -+ u8 mesh_busy: 1; -+ u8 pag: 1; -+}; -+ -+struct btc_btinfo_hb0 { -+ s8 rssi; -+}; -+ -+struct btc_btinfo_hb1 { -+ u8 ble_connect: 1; -+ u8 reinit: 1; -+ u8 relink: 1; -+ u8 igno_wl: 1; -+ u8 voice: 1; -+ u8 ble_scan: 1; -+ u8 role_sw: 1; -+ u8 multi_link: 1; -+}; -+ -+struct btc_btinfo_hb2 { -+ u8 pan_active: 1; -+ u8 afh_update: 1; -+ u8 a2dp_active: 1; -+ u8 slave: 1; -+ u8 hid_slot: 2; -+ u8 hid_cnt: 2; -+}; -+ -+struct btc_btinfo_hb3 { -+ u8 a2dp_bitpool: 6; -+ u8 tx_3m: 1; -+ u8 a2dp_sink: 1; -+}; -+ -+union btc_btinfo { -+ u8 val; -+ struct btc_btinfo_lb2 lb2; -+ struct btc_btinfo_lb3 lb3; -+ struct btc_btinfo_hb0 hb0; -+ struct btc_btinfo_hb1 hb1; -+ struct btc_btinfo_hb2 hb2; -+ struct btc_btinfo_hb3 hb3; -+}; -+ -+static void _set_policy(struct rtw89_dev *rtwdev, u16 policy_type, -+ enum btc_reason_and_action action) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_dm *dm = &btc->dm; -+ struct rtw89_btc_fbtc_tdma *t = &dm->tdma; -+ struct rtw89_btc_fbtc_slot *s = dm->slot; -+ u8 type; -+ u32 tbl_w1, tbl_b1, tbl_b4; -+ -+ if (btc->mdinfo.ant.type == BTC_ANT_SHARED) { -+ if (btc->cx.wl.status.map._4way) -+ tbl_w1 = cxtbl[1]; -+ else -+ tbl_w1 = cxtbl[8]; -+ tbl_b1 = cxtbl[3]; -+ tbl_b4 = cxtbl[3]; -+ } else { -+ tbl_w1 = cxtbl[16]; -+ tbl_b1 = cxtbl[17]; -+ tbl_b4 = cxtbl[17]; -+ } -+ -+ type = (u8)((policy_type & BTC_CXP_MASK) >> 8); -+ btc->bt_req_en = false; -+ -+ switch (type) { -+ case BTC_CXP_USERDEF0: -+ *t = t_def[CXTD_OFF]; -+ s[CXST_OFF] = s_def[CXST_OFF]; -+ _slot_set_tbl(btc, CXST_OFF, cxtbl[2]); -+ btc->update_policy_force = true; -+ break; -+ case BTC_CXP_OFF: /* TDMA off */ -+ _write_scbd(rtwdev, BTC_WSCB_TDMA, false); -+ *t = t_def[CXTD_OFF]; -+ s[CXST_OFF] = s_def[CXST_OFF]; -+ -+ switch (policy_type) { -+ case BTC_CXP_OFF_BT: -+ _slot_set_tbl(btc, CXST_OFF, cxtbl[2]); -+ break; -+ case BTC_CXP_OFF_WL: -+ _slot_set_tbl(btc, CXST_OFF, cxtbl[1]); -+ break; -+ case BTC_CXP_OFF_EQ0: -+ _slot_set_tbl(btc, CXST_OFF, cxtbl[0]); -+ break; -+ case BTC_CXP_OFF_EQ1: -+ _slot_set_tbl(btc, CXST_OFF, cxtbl[16]); -+ break; -+ case BTC_CXP_OFF_EQ2: -+ _slot_set_tbl(btc, CXST_OFF, cxtbl[17]); -+ break; -+ case BTC_CXP_OFF_EQ3: -+ _slot_set_tbl(btc, CXST_OFF, cxtbl[18]); -+ break; -+ case BTC_CXP_OFF_BWB0: -+ _slot_set_tbl(btc, CXST_OFF, cxtbl[5]); -+ break; -+ case BTC_CXP_OFF_BWB1: -+ _slot_set_tbl(btc, CXST_OFF, cxtbl[8]); -+ break; -+ } -+ break; -+ case BTC_CXP_OFFB: /* TDMA off + beacon protect */ -+ _write_scbd(rtwdev, BTC_WSCB_TDMA, false); -+ *t = t_def[CXTD_OFF_B2]; -+ s[CXST_OFF] = s_def[CXST_OFF]; -+ switch (policy_type) { -+ case BTC_CXP_OFFB_BWB0: -+ _slot_set_tbl(btc, CXST_OFF, cxtbl[8]); -+ break; -+ } -+ break; -+ case BTC_CXP_OFFE: /* TDMA off + beacon protect + Ext_control */ -+ btc->bt_req_en = true; -+ _write_scbd(rtwdev, BTC_WSCB_TDMA, true); -+ *t = t_def[CXTD_OFF_EXT]; -+ switch (policy_type) { -+ case BTC_CXP_OFFE_DEF: -+ s[CXST_E2G] = s_def[CXST_E2G]; -+ s[CXST_E5G] = s_def[CXST_E5G]; -+ s[CXST_EBT] = s_def[CXST_EBT]; -+ s[CXST_ENULL] = s_def[CXST_ENULL]; -+ break; -+ case BTC_CXP_OFFE_DEF2: -+ _slot_set(btc, CXST_E2G, 20, cxtbl[1], SLOT_ISO); -+ s[CXST_E5G] = s_def[CXST_E5G]; -+ s[CXST_EBT] = s_def[CXST_EBT]; -+ s[CXST_ENULL] = s_def[CXST_ENULL]; -+ break; -+ } -+ break; -+ case BTC_CXP_FIX: /* TDMA Fix-Slot */ -+ _write_scbd(rtwdev, BTC_WSCB_TDMA, true); -+ *t = t_def[CXTD_FIX]; -+ switch (policy_type) { -+ case BTC_CXP_FIX_TD3030: -+ _slot_set(btc, CXST_W1, 30, tbl_w1, SLOT_ISO); -+ _slot_set(btc, CXST_B1, 30, tbl_b1, SLOT_MIX); -+ break; -+ case BTC_CXP_FIX_TD5050: -+ _slot_set(btc, CXST_W1, 50, tbl_w1, SLOT_ISO); -+ _slot_set(btc, CXST_B1, 50, tbl_b1, SLOT_MIX); -+ break; -+ case BTC_CXP_FIX_TD2030: -+ _slot_set(btc, CXST_W1, 20, tbl_w1, SLOT_ISO); -+ _slot_set(btc, CXST_B1, 30, tbl_b1, SLOT_MIX); -+ break; -+ case BTC_CXP_FIX_TD4010: -+ _slot_set(btc, CXST_W1, 40, tbl_w1, SLOT_ISO); -+ _slot_set(btc, CXST_B1, 10, tbl_b1, SLOT_MIX); -+ break; -+ case BTC_CXP_FIX_TD4020: -+ _slot_set(btc, CXST_W1, 40, cxtbl[1], SLOT_MIX); -+ _slot_set(btc, CXST_B1, 20, tbl_b1, SLOT_MIX); -+ break; -+ case BTC_CXP_FIX_TD7010: -+ _slot_set(btc, CXST_W1, 70, tbl_w1, SLOT_ISO); -+ _slot_set(btc, CXST_B1, 10, tbl_b1, SLOT_MIX); -+ break; -+ case BTC_CXP_FIX_TD2060: -+ _slot_set(btc, CXST_W1, 20, tbl_w1, SLOT_ISO); -+ _slot_set(btc, CXST_B1, 60, tbl_b1, SLOT_MIX); -+ break; -+ case BTC_CXP_FIX_TD3060: -+ _slot_set(btc, CXST_W1, 30, tbl_w1, SLOT_ISO); -+ _slot_set(btc, CXST_B1, 60, tbl_b1, SLOT_MIX); -+ break; -+ case BTC_CXP_FIX_TD2080: -+ _slot_set(btc, CXST_W1, 20, tbl_w1, SLOT_ISO); -+ _slot_set(btc, CXST_B1, 80, tbl_b1, SLOT_MIX); -+ break; -+ case BTC_CXP_FIX_TDW1B1: /* W1:B1 = user-define */ -+ _slot_set(btc, CXST_W1, dm->slot_dur[CXST_W1], -+ tbl_w1, SLOT_ISO); -+ _slot_set(btc, CXST_B1, dm->slot_dur[CXST_B1], -+ tbl_b1, SLOT_MIX); -+ break; -+ } -+ break; -+ case BTC_CXP_PFIX: /* PS-TDMA Fix-Slot */ -+ _write_scbd(rtwdev, BTC_WSCB_TDMA, true); -+ *t = t_def[CXTD_PFIX]; -+ if (btc->cx.wl.role_info.role_map.role.ap) -+ _tdma_set_flctrl(btc, CXFLC_QOSNULL); -+ -+ switch (policy_type) { -+ case BTC_CXP_PFIX_TD3030: -+ _slot_set(btc, CXST_W1, 30, tbl_w1, SLOT_ISO); -+ _slot_set(btc, CXST_B1, 30, tbl_b1, SLOT_MIX); -+ break; -+ case BTC_CXP_PFIX_TD5050: -+ _slot_set(btc, CXST_W1, 50, tbl_w1, SLOT_ISO); -+ _slot_set(btc, CXST_B1, 50, tbl_b1, SLOT_MIX); -+ break; -+ case BTC_CXP_PFIX_TD2030: -+ _slot_set(btc, CXST_W1, 20, tbl_w1, SLOT_ISO); -+ _slot_set(btc, CXST_B1, 30, tbl_b1, SLOT_MIX); -+ break; -+ case BTC_CXP_PFIX_TD2060: -+ _slot_set(btc, CXST_W1, 20, tbl_w1, SLOT_ISO); -+ _slot_set(btc, CXST_B1, 60, tbl_b1, SLOT_MIX); -+ break; -+ case BTC_CXP_PFIX_TD3070: -+ _slot_set(btc, CXST_W1, 30, tbl_w1, SLOT_ISO); -+ _slot_set(btc, CXST_B1, 60, tbl_b1, SLOT_MIX); -+ break; -+ case BTC_CXP_PFIX_TD2080: -+ _slot_set(btc, CXST_W1, 20, tbl_w1, SLOT_ISO); -+ _slot_set(btc, CXST_B1, 80, tbl_b1, SLOT_MIX); -+ break; -+ } -+ break; -+ case BTC_CXP_AUTO: /* TDMA Auto-Slot */ -+ _write_scbd(rtwdev, BTC_WSCB_TDMA, true); -+ *t = t_def[CXTD_AUTO]; -+ switch (policy_type) { -+ case BTC_CXP_AUTO_TD50200: -+ _slot_set(btc, CXST_W1, 50, tbl_w1, SLOT_ISO); -+ _slot_set(btc, CXST_B1, 200, tbl_b1, SLOT_MIX); -+ break; -+ case BTC_CXP_AUTO_TD60200: -+ _slot_set(btc, CXST_W1, 60, tbl_w1, SLOT_ISO); -+ _slot_set(btc, CXST_B1, 200, tbl_b1, SLOT_MIX); -+ break; -+ case BTC_CXP_AUTO_TD20200: -+ _slot_set(btc, CXST_W1, 20, tbl_w1, SLOT_ISO); -+ _slot_set(btc, CXST_B1, 200, tbl_b1, SLOT_MIX); -+ break; -+ case BTC_CXP_AUTO_TDW1B1: /* W1:B1 = user-define */ -+ _slot_set(btc, CXST_W1, dm->slot_dur[CXST_W1], -+ tbl_w1, SLOT_ISO); -+ _slot_set(btc, CXST_B1, dm->slot_dur[CXST_B1], -+ tbl_b1, SLOT_MIX); -+ break; -+ } -+ break; -+ case BTC_CXP_PAUTO: /* PS-TDMA Auto-Slot */ -+ _write_scbd(rtwdev, BTC_WSCB_TDMA, true); -+ *t = t_def[CXTD_PAUTO]; -+ switch (policy_type) { -+ case BTC_CXP_PAUTO_TD50200: -+ _slot_set(btc, CXST_W1, 50, tbl_w1, SLOT_ISO); -+ _slot_set(btc, CXST_B1, 200, tbl_b1, SLOT_MIX); -+ break; -+ case BTC_CXP_PAUTO_TD60200: -+ _slot_set(btc, CXST_W1, 60, tbl_w1, SLOT_ISO); -+ _slot_set(btc, CXST_B1, 200, tbl_b1, SLOT_MIX); -+ break; -+ case BTC_CXP_PAUTO_TD20200: -+ _slot_set(btc, CXST_W1, 20, tbl_w1, SLOT_ISO); -+ _slot_set(btc, CXST_B1, 200, tbl_b1, SLOT_MIX); -+ break; -+ case BTC_CXP_PAUTO_TDW1B1: -+ _slot_set(btc, CXST_W1, dm->slot_dur[CXST_W1], -+ tbl_w1, SLOT_ISO); -+ _slot_set(btc, CXST_B1, dm->slot_dur[CXST_B1], -+ tbl_b1, SLOT_MIX); -+ break; -+ } -+ break; -+ case BTC_CXP_AUTO2: /* TDMA Auto-Slot2 */ -+ _write_scbd(rtwdev, BTC_WSCB_TDMA, true); -+ *t = t_def[CXTD_AUTO2]; -+ switch (policy_type) { -+ case BTC_CXP_AUTO2_TD3050: -+ _slot_set(btc, CXST_W1, 30, tbl_w1, SLOT_ISO); -+ _slot_set(btc, CXST_B1, 200, tbl_b1, SLOT_MIX); -+ _slot_set(btc, CXST_B4, 50, tbl_b4, SLOT_MIX); -+ break; -+ case BTC_CXP_AUTO2_TD3070: -+ _slot_set(btc, CXST_W1, 30, tbl_w1, SLOT_ISO); -+ _slot_set(btc, CXST_B1, 200, tbl_b1, SLOT_MIX); -+ _slot_set(btc, CXST_B4, 70, tbl_b4, SLOT_MIX); -+ break; -+ case BTC_CXP_AUTO2_TD5050: -+ _slot_set(btc, CXST_W1, 50, tbl_w1, SLOT_ISO); -+ _slot_set(btc, CXST_B1, 200, tbl_b1, SLOT_MIX); -+ _slot_set(btc, CXST_B4, 50, tbl_b4, SLOT_MIX); -+ break; -+ case BTC_CXP_AUTO2_TD6060: -+ _slot_set(btc, CXST_W1, 60, tbl_w1, SLOT_ISO); -+ _slot_set(btc, CXST_B1, 200, tbl_b1, SLOT_MIX); -+ _slot_set(btc, CXST_B4, 60, tbl_b4, SLOT_MIX); -+ break; -+ case BTC_CXP_AUTO2_TD2080: -+ _slot_set(btc, CXST_W1, 20, tbl_w1, SLOT_ISO); -+ _slot_set(btc, CXST_B1, 200, tbl_b1, SLOT_MIX); -+ _slot_set(btc, CXST_B4, 80, tbl_b4, SLOT_MIX); -+ break; -+ case BTC_CXP_AUTO2_TDW1B4: /* W1:B1 = user-define */ -+ _slot_set(btc, CXST_W1, dm->slot_dur[CXST_W1], -+ tbl_w1, SLOT_ISO); -+ _slot_set(btc, CXST_B4, dm->slot_dur[CXST_B4], -+ tbl_b4, SLOT_MIX); -+ break; -+ } -+ break; -+ case BTC_CXP_PAUTO2: /* PS-TDMA Auto-Slot2 */ -+ _write_scbd(rtwdev, BTC_WSCB_TDMA, true); -+ *t = t_def[CXTD_PAUTO2]; -+ switch (policy_type) { -+ case BTC_CXP_PAUTO2_TD3050: -+ _slot_set(btc, CXST_W1, 30, tbl_w1, SLOT_ISO); -+ _slot_set(btc, CXST_B1, 200, tbl_b1, SLOT_MIX); -+ _slot_set(btc, CXST_B4, 50, tbl_b4, SLOT_MIX); -+ break; -+ case BTC_CXP_PAUTO2_TD3070: -+ _slot_set(btc, CXST_W1, 30, tbl_w1, SLOT_ISO); -+ _slot_set(btc, CXST_B1, 200, tbl_b1, SLOT_MIX); -+ _slot_set(btc, CXST_B4, 70, tbl_b4, SLOT_MIX); -+ break; -+ case BTC_CXP_PAUTO2_TD5050: -+ _slot_set(btc, CXST_W1, 50, tbl_w1, SLOT_ISO); -+ _slot_set(btc, CXST_B1, 200, tbl_b1, SLOT_MIX); -+ _slot_set(btc, CXST_B4, 50, tbl_b4, SLOT_MIX); -+ break; -+ case BTC_CXP_PAUTO2_TD6060: -+ _slot_set(btc, CXST_W1, 60, tbl_w1, SLOT_ISO); -+ _slot_set(btc, CXST_B1, 200, tbl_b1, SLOT_MIX); -+ _slot_set(btc, CXST_B4, 60, tbl_b4, SLOT_MIX); -+ break; -+ case BTC_CXP_PAUTO2_TD2080: -+ _slot_set(btc, CXST_W1, 20, tbl_w1, SLOT_ISO); -+ _slot_set(btc, CXST_B1, 200, tbl_b1, SLOT_MIX); -+ _slot_set(btc, CXST_B4, 80, tbl_b4, SLOT_MIX); -+ break; -+ case BTC_CXP_PAUTO2_TDW1B4: /* W1:B1 = user-define */ -+ _slot_set(btc, CXST_W1, dm->slot_dur[CXST_W1], -+ tbl_w1, SLOT_ISO); -+ _slot_set(btc, CXST_B4, dm->slot_dur[CXST_B4], -+ tbl_b4, SLOT_MIX); -+ break; -+ } -+ break; -+ } -+ -+ _fw_set_policy(rtwdev, policy_type, action); -+} -+ -+static void _set_gnt_bt(struct rtw89_dev *rtwdev, u8 phy_map, u8 state) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_dm *dm = &btc->dm; -+ struct rtw89_mac_ax_gnt *g = dm->gnt.band; -+ u8 i; -+ -+ if (phy_map > BTC_PHY_ALL) -+ return; -+ -+ for (i = 0; i < RTW89_PHY_MAX; i++) { -+ if (!(phy_map & BIT(i))) -+ continue; -+ -+ switch (state) { -+ case BTC_GNT_HW: -+ g[i].gnt_bt_sw_en = 0; -+ g[i].gnt_bt = 0; -+ break; -+ case BTC_GNT_SW_LO: -+ g[i].gnt_bt_sw_en = 1; -+ g[i].gnt_bt = 0; -+ break; -+ case BTC_GNT_SW_HI: -+ g[i].gnt_bt_sw_en = 1; -+ g[i].gnt_bt = 1; -+ break; -+ } -+ } -+ -+ rtw89_mac_cfg_gnt(rtwdev, &dm->gnt); -+} -+ -+static void _set_bt_plut(struct rtw89_dev *rtwdev, u8 phy_map, -+ u8 tx_val, u8 rx_val) -+{ -+ struct rtw89_mac_ax_plt plt; -+ -+ plt.band = RTW89_MAC_0; -+ plt.tx = tx_val; -+ plt.rx = rx_val; -+ -+ if (phy_map & BTC_PHY_0) -+ rtw89_mac_cfg_plt(rtwdev, &plt); -+ -+ if (!rtwdev->dbcc_en) -+ return; -+ -+ plt.band = RTW89_MAC_1; -+ if (phy_map & BTC_PHY_1) -+ rtw89_mac_cfg_plt(rtwdev, &plt); -+} -+ -+static void _set_ant(struct rtw89_dev *rtwdev, bool force_exec, -+ u8 phy_map, u8 type) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_dm *dm = &btc->dm; -+ struct rtw89_btc_cx *cx = &btc->cx; -+ struct rtw89_btc_wl_info *wl = &btc->cx.wl; -+ struct rtw89_btc_bt_info *bt = &cx->bt; -+ struct rtw89_btc_wl_dbcc_info *wl_dinfo = &wl->dbcc_info; -+ u8 gnt_wl_ctrl, gnt_bt_ctrl, plt_ctrl, i, b2g = 0; -+ u32 ant_path_type; -+ -+ ant_path_type = ((phy_map << 8) + type); -+ -+ if (btc->dm.run_reason == BTC_RSN_NTFY_POWEROFF || -+ btc->dm.run_reason == BTC_RSN_NTFY_RADIO_STATE || -+ btc->dm.run_reason == BTC_RSN_CMD_SET_COEX) -+ force_exec = FC_EXEC; -+ -+ if (!force_exec && ant_path_type == dm->set_ant_path) { -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): return by no change!!\n", -+ __func__); -+ return; -+ } else if (bt->rfk_info.map.run) { -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): return by bt rfk!!\n", __func__); -+ return; -+ } else if (btc->dm.run_reason != BTC_RSN_NTFY_WL_RFK && -+ wl->rfk_info.state != BTC_WRFK_STOP) { -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): return by wl rfk!!\n", __func__); -+ return; -+ } -+ -+ dm->set_ant_path = ant_path_type; -+ -+ rtw89_debug(rtwdev, -+ RTW89_DBG_BTC, -+ "[BTC], %s(): path=0x%x, set_type=0x%x\n", -+ __func__, phy_map, dm->set_ant_path & 0xff); -+ -+ switch (type) { -+ case BTC_ANT_WPOWERON: -+ rtw89_mac_cfg_ctrl_path(rtwdev, false); -+ break; -+ case BTC_ANT_WINIT: -+ if (bt->enable.now) { -+ _set_gnt_wl(rtwdev, phy_map, BTC_GNT_SW_LO); -+ _set_gnt_bt(rtwdev, phy_map, BTC_GNT_SW_HI); -+ } else { -+ _set_gnt_wl(rtwdev, phy_map, BTC_GNT_SW_HI); -+ _set_gnt_bt(rtwdev, phy_map, BTC_GNT_SW_LO); -+ } -+ rtw89_mac_cfg_ctrl_path(rtwdev, true); -+ _set_bt_plut(rtwdev, BTC_PHY_ALL, BTC_PLT_BT, BTC_PLT_BT); -+ break; -+ case BTC_ANT_WONLY: -+ _set_gnt_wl(rtwdev, phy_map, BTC_GNT_SW_HI); -+ _set_gnt_bt(rtwdev, phy_map, BTC_GNT_SW_LO); -+ rtw89_mac_cfg_ctrl_path(rtwdev, true); -+ _set_bt_plut(rtwdev, BTC_PHY_ALL, BTC_PLT_NONE, BTC_PLT_NONE); -+ break; -+ case BTC_ANT_WOFF: -+ rtw89_mac_cfg_ctrl_path(rtwdev, false); -+ _set_bt_plut(rtwdev, BTC_PHY_ALL, BTC_PLT_NONE, BTC_PLT_NONE); -+ break; -+ case BTC_ANT_W2G: -+ rtw89_mac_cfg_ctrl_path(rtwdev, true); -+ if (rtwdev->dbcc_en) { -+ for (i = 0; i < RTW89_PHY_MAX; i++) { -+ b2g = (wl_dinfo->real_band[i] == RTW89_BAND_2G); -+ -+ gnt_wl_ctrl = b2g ? BTC_GNT_HW : BTC_GNT_SW_HI; -+ _set_gnt_wl(rtwdev, BIT(i), gnt_wl_ctrl); -+ -+ gnt_bt_ctrl = b2g ? BTC_GNT_HW : BTC_GNT_SW_HI; -+ /* BT should control by GNT_BT if WL_2G at S0 */ -+ if (i == 1 && -+ wl_dinfo->real_band[0] == RTW89_BAND_2G && -+ wl_dinfo->real_band[1] == RTW89_BAND_5G) -+ gnt_bt_ctrl = BTC_GNT_HW; -+ _set_gnt_bt(rtwdev, BIT(i), gnt_bt_ctrl); -+ -+ plt_ctrl = b2g ? BTC_PLT_BT : BTC_PLT_NONE; -+ _set_bt_plut(rtwdev, BIT(i), -+ plt_ctrl, plt_ctrl); -+ } -+ } else { -+ _set_gnt_wl(rtwdev, phy_map, BTC_GNT_HW); -+ _set_gnt_bt(rtwdev, phy_map, BTC_GNT_HW); -+ _set_bt_plut(rtwdev, BTC_PHY_ALL, -+ BTC_PLT_BT, BTC_PLT_BT); -+ } -+ break; -+ case BTC_ANT_W5G: -+ rtw89_mac_cfg_ctrl_path(rtwdev, true); -+ _set_gnt_wl(rtwdev, phy_map, BTC_GNT_SW_HI); -+ _set_gnt_bt(rtwdev, phy_map, BTC_GNT_HW); -+ _set_bt_plut(rtwdev, BTC_PHY_ALL, BTC_PLT_NONE, BTC_PLT_NONE); -+ break; -+ case BTC_ANT_W25G: -+ rtw89_mac_cfg_ctrl_path(rtwdev, true); -+ _set_gnt_wl(rtwdev, phy_map, BTC_GNT_HW); -+ _set_gnt_bt(rtwdev, phy_map, BTC_GNT_HW); -+ _set_bt_plut(rtwdev, BTC_PHY_ALL, -+ BTC_PLT_GNT_WL, BTC_PLT_GNT_WL); -+ break; -+ case BTC_ANT_FREERUN: -+ rtw89_mac_cfg_ctrl_path(rtwdev, true); -+ _set_gnt_wl(rtwdev, phy_map, BTC_GNT_SW_HI); -+ _set_gnt_bt(rtwdev, phy_map, BTC_GNT_SW_HI); -+ _set_bt_plut(rtwdev, BTC_PHY_ALL, BTC_PLT_NONE, BTC_PLT_NONE); -+ break; -+ case BTC_ANT_WRFK: -+ rtw89_mac_cfg_ctrl_path(rtwdev, true); -+ _set_gnt_wl(rtwdev, phy_map, BTC_GNT_SW_HI); -+ _set_gnt_bt(rtwdev, phy_map, BTC_GNT_SW_LO); -+ _set_bt_plut(rtwdev, phy_map, BTC_PLT_NONE, BTC_PLT_NONE); -+ break; -+ case BTC_ANT_BRFK: -+ rtw89_mac_cfg_ctrl_path(rtwdev, false); -+ _set_gnt_wl(rtwdev, phy_map, BTC_GNT_SW_LO); -+ _set_gnt_bt(rtwdev, phy_map, BTC_GNT_SW_HI); -+ _set_bt_plut(rtwdev, phy_map, BTC_PLT_NONE, BTC_PLT_NONE); -+ break; -+ default: -+ break; -+ } -+} -+ -+static void _action_wl_only(struct rtw89_dev *rtwdev) -+{ -+ _set_ant(rtwdev, FC_EXEC, BTC_PHY_ALL, BTC_ANT_WONLY); -+ _set_policy(rtwdev, BTC_CXP_OFF_BT, BTC_ACT_WL_ONLY); -+} -+ -+static void _action_wl_init(struct rtw89_dev *rtwdev) -+{ -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, "[BTC], %s(): !!\n", __func__); -+ -+ _set_ant(rtwdev, FC_EXEC, BTC_PHY_ALL, BTC_ANT_WINIT); -+ _set_policy(rtwdev, BTC_CXP_OFF_BT, BTC_ACT_WL_INIT); -+} -+ -+static void _action_wl_off(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_wl_info *wl = &btc->cx.wl; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, "[BTC], %s(): !!\n", __func__); -+ -+ if (wl->status.map.rf_off || btc->dm.bt_only) -+ _set_ant(rtwdev, NM_EXEC, BTC_PHY_ALL, BTC_ANT_WOFF); -+ -+ _set_policy(rtwdev, BTC_CXP_OFF_BT, BTC_ACT_WL_OFF); -+} -+ -+static void _action_freerun(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, "[BTC], %s(): !!\n", __func__); -+ -+ _set_ant(rtwdev, FC_EXEC, BTC_PHY_ALL, BTC_ANT_FREERUN); -+ _set_policy(rtwdev, BTC_CXP_OFF_BT, BTC_ACT_FREERUN); -+ -+ btc->dm.freerun = true; -+} -+ -+static void _action_bt_whql(struct rtw89_dev *rtwdev) -+{ -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, "[BTC], %s(): !!\n", __func__); -+ -+ _set_ant(rtwdev, FC_EXEC, BTC_PHY_ALL, BTC_ANT_W2G); -+ _set_policy(rtwdev, BTC_CXP_OFF_BT, BTC_ACT_BT_WHQL); -+} -+ -+static void _action_bt_off(struct rtw89_dev *rtwdev) -+{ -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, "[BTC], %s(): !!\n", __func__); -+ -+ _set_ant(rtwdev, FC_EXEC, BTC_PHY_ALL, BTC_ANT_WONLY); -+ _set_policy(rtwdev, BTC_CXP_OFF_BT, BTC_ACT_BT_OFF); -+} -+ -+static void _action_bt_idle(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_bt_link_info *b = &btc->cx.bt.link_info; -+ -+ _set_ant(rtwdev, NM_EXEC, BTC_PHY_ALL, BTC_ANT_W2G); -+ -+ if (btc->mdinfo.ant.type == BTC_ANT_SHARED) { /* shared-antenna */ -+ switch (btc->cx.state_map) { -+ case BTC_WBUSY_BNOSCAN: /*wl-busy + bt idle*/ -+ if (b->profile_cnt.now > 0) -+ _set_policy(rtwdev, BTC_CXP_FIX_TD4010, -+ BTC_ACT_BT_IDLE); -+ else -+ _set_policy(rtwdev, BTC_CXP_FIX_TD4020, -+ BTC_ACT_BT_IDLE); -+ break; -+ case BTC_WBUSY_BSCAN: /*wl-busy + bt-inq */ -+ _set_policy(rtwdev, BTC_CXP_PFIX_TD5050, -+ BTC_ACT_BT_IDLE); -+ break; -+ case BTC_WSCAN_BNOSCAN: /* wl-scan + bt-idle */ -+ if (b->profile_cnt.now > 0) -+ _set_policy(rtwdev, BTC_CXP_FIX_TD4010, -+ BTC_ACT_BT_IDLE); -+ else -+ _set_policy(rtwdev, BTC_CXP_FIX_TD4020, -+ BTC_ACT_BT_IDLE); -+ break; -+ case BTC_WSCAN_BSCAN: /* wl-scan + bt-inq */ -+ _set_policy(rtwdev, BTC_CXP_FIX_TD5050, -+ BTC_ACT_BT_IDLE); -+ break; -+ case BTC_WLINKING: /* wl-connecting + bt-inq or bt-idle */ -+ _set_policy(rtwdev, BTC_CXP_FIX_TD7010, -+ BTC_ACT_BT_IDLE); -+ break; -+ case BTC_WIDLE: /* wl-idle + bt-idle */ -+ _set_policy(rtwdev, BTC_CXP_OFF_BWB1, BTC_ACT_BT_IDLE); -+ break; -+ } -+ } else { /* dedicated-antenna */ -+ _set_policy(rtwdev, BTC_CXP_OFF_EQ0, BTC_ACT_BT_IDLE); -+ } -+} -+ -+static void _action_bt_hfp(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ -+ _set_ant(rtwdev, NM_EXEC, BTC_PHY_ALL, BTC_ANT_W2G); -+ -+ if (btc->mdinfo.ant.type == BTC_ANT_SHARED) { -+ if (btc->cx.wl.status.map._4way) -+ _set_policy(rtwdev, BTC_CXP_OFF_WL, BTC_ACT_BT_HFP); -+ else -+ _set_policy(rtwdev, BTC_CXP_OFF_BWB0, BTC_ACT_BT_HFP); -+ } else { -+ _set_policy(rtwdev, BTC_CXP_OFF_EQ2, BTC_ACT_BT_HFP); -+ } -+} -+ -+static void _action_bt_hid(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ -+ _set_ant(rtwdev, NM_EXEC, BTC_PHY_ALL, BTC_ANT_W2G); -+ -+ if (btc->mdinfo.ant.type == BTC_ANT_SHARED) /* shared-antenna */ -+ if (btc->cx.wl.status.map._4way) -+ _set_policy(rtwdev, BTC_CXP_OFF_WL, BTC_ACT_BT_HID); -+ else -+ _set_policy(rtwdev, BTC_CXP_OFF_BWB0, BTC_ACT_BT_HID); -+ else /* dedicated-antenna */ -+ _set_policy(rtwdev, BTC_CXP_OFF_EQ3, BTC_ACT_BT_HID); -+} -+ -+static void _action_bt_a2dp(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_bt_link_info *bt_linfo = &btc->cx.bt.link_info; -+ struct rtw89_btc_bt_a2dp_desc a2dp = bt_linfo->a2dp_desc; -+ struct rtw89_btc_dm *dm = &btc->dm; -+ -+ _set_ant(rtwdev, NM_EXEC, BTC_PHY_ALL, BTC_ANT_W2G); -+ -+ switch (btc->cx.state_map) { -+ case BTC_WBUSY_BNOSCAN: /* wl-busy + bt-A2DP */ -+ if (a2dp.vendor_id == 0x4c || dm->leak_ap) { -+ dm->slot_dur[CXST_W1] = 40; -+ dm->slot_dur[CXST_B1] = 200; -+ _set_policy(rtwdev, -+ BTC_CXP_PAUTO_TDW1B1, BTC_ACT_BT_A2DP); -+ } else { -+ _set_policy(rtwdev, -+ BTC_CXP_PAUTO_TD50200, BTC_ACT_BT_A2DP); -+ } -+ break; -+ case BTC_WBUSY_BSCAN: /* wl-busy + bt-inq + bt-A2DP */ -+ _set_policy(rtwdev, BTC_CXP_PAUTO2_TD3050, BTC_ACT_BT_A2DP); -+ break; -+ case BTC_WSCAN_BSCAN: /* wl-scan + bt-inq + bt-A2DP */ -+ _set_policy(rtwdev, BTC_CXP_AUTO2_TD3050, BTC_ACT_BT_A2DP); -+ break; -+ case BTC_WSCAN_BNOSCAN: /* wl-scan + bt-A2DP */ -+ case BTC_WLINKING: /* wl-connecting + bt-A2DP */ -+ if (a2dp.vendor_id == 0x4c || dm->leak_ap) { -+ dm->slot_dur[CXST_W1] = 40; -+ dm->slot_dur[CXST_B1] = 200; -+ _set_policy(rtwdev, BTC_CXP_AUTO_TDW1B1, -+ BTC_ACT_BT_A2DP); -+ } else { -+ _set_policy(rtwdev, BTC_CXP_AUTO_TD50200, -+ BTC_ACT_BT_A2DP); -+ } -+ break; -+ case BTC_WIDLE: /* wl-idle + bt-A2DP */ -+ _set_policy(rtwdev, BTC_CXP_AUTO_TD20200, BTC_ACT_BT_A2DP); -+ break; -+ } -+} -+ -+static void _action_bt_a2dpsink(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ -+ _set_ant(rtwdev, NM_EXEC, BTC_PHY_ALL, BTC_ANT_W2G); -+ -+ switch (btc->cx.state_map) { -+ case BTC_WBUSY_BNOSCAN: /* wl-busy + bt-A2dp_Sink */ -+ _set_policy(rtwdev, BTC_CXP_PFIX_TD2030, BTC_ACT_BT_A2DPSINK); -+ break; -+ case BTC_WBUSY_BSCAN: /* wl-busy + bt-inq + bt-A2dp_Sink */ -+ _set_policy(rtwdev, BTC_CXP_PFIX_TD2060, BTC_ACT_BT_A2DPSINK); -+ break; -+ case BTC_WSCAN_BNOSCAN: /* wl-scan + bt-A2dp_Sink */ -+ _set_policy(rtwdev, BTC_CXP_FIX_TD2030, BTC_ACT_BT_A2DPSINK); -+ break; -+ case BTC_WSCAN_BSCAN: /* wl-scan + bt-inq + bt-A2dp_Sink */ -+ _set_policy(rtwdev, BTC_CXP_FIX_TD2060, BTC_ACT_BT_A2DPSINK); -+ break; -+ case BTC_WLINKING: /* wl-connecting + bt-A2dp_Sink */ -+ _set_policy(rtwdev, BTC_CXP_FIX_TD3030, BTC_ACT_BT_A2DPSINK); -+ break; -+ case BTC_WIDLE: /* wl-idle + bt-A2dp_Sink */ -+ _set_policy(rtwdev, BTC_CXP_FIX_TD2080, BTC_ACT_BT_A2DPSINK); -+ break; -+ } -+} -+ -+static void _action_bt_pan(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ -+ _set_ant(rtwdev, NM_EXEC, BTC_PHY_ALL, BTC_ANT_W2G); -+ -+ switch (btc->cx.state_map) { -+ case BTC_WBUSY_BNOSCAN: /* wl-busy + bt-PAN */ -+ _set_policy(rtwdev, BTC_CXP_PFIX_TD5050, BTC_ACT_BT_PAN); -+ break; -+ case BTC_WBUSY_BSCAN: /* wl-busy + bt-inq + bt-PAN */ -+ _set_policy(rtwdev, BTC_CXP_PFIX_TD3070, BTC_ACT_BT_PAN); -+ break; -+ case BTC_WSCAN_BNOSCAN: /* wl-scan + bt-PAN */ -+ _set_policy(rtwdev, BTC_CXP_FIX_TD3030, BTC_ACT_BT_PAN); -+ break; -+ case BTC_WSCAN_BSCAN: /* wl-scan + bt-inq + bt-PAN */ -+ _set_policy(rtwdev, BTC_CXP_FIX_TD3060, BTC_ACT_BT_PAN); -+ break; -+ case BTC_WLINKING: /* wl-connecting + bt-PAN */ -+ _set_policy(rtwdev, BTC_CXP_FIX_TD4020, BTC_ACT_BT_PAN); -+ break; -+ case BTC_WIDLE: /* wl-idle + bt-pan */ -+ _set_policy(rtwdev, BTC_CXP_PFIX_TD2080, BTC_ACT_BT_PAN); -+ break; -+ } -+} -+ -+static void _action_bt_a2dp_hid(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_bt_link_info *bt_linfo = &btc->cx.bt.link_info; -+ struct rtw89_btc_bt_a2dp_desc a2dp = bt_linfo->a2dp_desc; -+ struct rtw89_btc_dm *dm = &btc->dm; -+ -+ _set_ant(rtwdev, NM_EXEC, BTC_PHY_ALL, BTC_ANT_W2G); -+ -+ switch (btc->cx.state_map) { -+ case BTC_WBUSY_BNOSCAN: /* wl-busy + bt-A2DP+HID */ -+ case BTC_WIDLE: /* wl-idle + bt-A2DP */ -+ if (a2dp.vendor_id == 0x4c || dm->leak_ap) { -+ dm->slot_dur[CXST_W1] = 40; -+ dm->slot_dur[CXST_B1] = 200; -+ _set_policy(rtwdev, -+ BTC_CXP_PAUTO_TDW1B1, BTC_ACT_BT_A2DP_HID); -+ } else { -+ _set_policy(rtwdev, -+ BTC_CXP_PAUTO_TD50200, BTC_ACT_BT_A2DP_HID); -+ } -+ break; -+ case BTC_WBUSY_BSCAN: /* wl-busy + bt-inq + bt-A2DP+HID */ -+ _set_policy(rtwdev, BTC_CXP_PAUTO2_TD3050, BTC_ACT_BT_A2DP_HID); -+ break; -+ -+ case BTC_WSCAN_BSCAN: /* wl-scan + bt-inq + bt-A2DP+HID */ -+ _set_policy(rtwdev, BTC_CXP_AUTO2_TD3050, BTC_ACT_BT_A2DP_HID); -+ break; -+ case BTC_WSCAN_BNOSCAN: /* wl-scan + bt-A2DP+HID */ -+ case BTC_WLINKING: /* wl-connecting + bt-A2DP+HID */ -+ if (a2dp.vendor_id == 0x4c || dm->leak_ap) { -+ dm->slot_dur[CXST_W1] = 40; -+ dm->slot_dur[CXST_B1] = 200; -+ _set_policy(rtwdev, BTC_CXP_AUTO_TDW1B1, -+ BTC_ACT_BT_A2DP_HID); -+ } else { -+ _set_policy(rtwdev, BTC_CXP_AUTO_TD50200, -+ BTC_ACT_BT_A2DP_HID); -+ } -+ break; -+ } -+} -+ -+static void _action_bt_a2dp_pan(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ -+ _set_ant(rtwdev, NM_EXEC, BTC_PHY_ALL, BTC_ANT_W2G); -+ -+ switch (btc->cx.state_map) { -+ case BTC_WBUSY_BNOSCAN: /* wl-busy + bt-A2DP+PAN */ -+ _set_policy(rtwdev, BTC_CXP_PAUTO2_TD3070, BTC_ACT_BT_A2DP_PAN); -+ break; -+ case BTC_WBUSY_BSCAN: /* wl-busy + bt-inq + bt-A2DP+PAN */ -+ _set_policy(rtwdev, BTC_CXP_PAUTO2_TD3070, BTC_ACT_BT_A2DP_PAN); -+ break; -+ case BTC_WSCAN_BNOSCAN: /* wl-scan + bt-A2DP+PAN */ -+ _set_policy(rtwdev, BTC_CXP_AUTO2_TD5050, BTC_ACT_BT_A2DP_PAN); -+ break; -+ case BTC_WSCAN_BSCAN: /* wl-scan + bt-inq + bt-A2DP+PAN */ -+ _set_policy(rtwdev, BTC_CXP_AUTO2_TD3070, BTC_ACT_BT_A2DP_PAN); -+ break; -+ case BTC_WLINKING: /* wl-connecting + bt-A2DP+PAN */ -+ _set_policy(rtwdev, BTC_CXP_AUTO2_TD3050, BTC_ACT_BT_A2DP_PAN); -+ break; -+ case BTC_WIDLE: /* wl-idle + bt-A2DP+PAN */ -+ _set_policy(rtwdev, BTC_CXP_PAUTO2_TD2080, BTC_ACT_BT_A2DP_PAN); -+ break; -+ } -+} -+ -+static void _action_bt_pan_hid(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ -+ _set_ant(rtwdev, NM_EXEC, BTC_PHY_ALL, BTC_ANT_W2G); -+ -+ switch (btc->cx.state_map) { -+ case BTC_WBUSY_BNOSCAN: /* wl-busy + bt-PAN+HID */ -+ _set_policy(rtwdev, BTC_CXP_PFIX_TD3030, BTC_ACT_BT_PAN_HID); -+ break; -+ case BTC_WBUSY_BSCAN: /* wl-busy + bt-inq + bt-PAN+HID */ -+ _set_policy(rtwdev, BTC_CXP_PFIX_TD3070, BTC_ACT_BT_PAN_HID); -+ break; -+ case BTC_WSCAN_BNOSCAN: /* wl-scan + bt-PAN+HID */ -+ _set_policy(rtwdev, BTC_CXP_FIX_TD3030, BTC_ACT_BT_PAN_HID); -+ break; -+ case BTC_WSCAN_BSCAN: /* wl-scan + bt-inq + bt-PAN+HID */ -+ _set_policy(rtwdev, BTC_CXP_FIX_TD3060, BTC_ACT_BT_PAN_HID); -+ break; -+ case BTC_WLINKING: /* wl-connecting + bt-PAN+HID */ -+ _set_policy(rtwdev, BTC_CXP_FIX_TD4010, BTC_ACT_BT_PAN_HID); -+ break; -+ case BTC_WIDLE: /* wl-idle + bt-PAN+HID */ -+ _set_policy(rtwdev, BTC_CXP_PFIX_TD2080, BTC_ACT_BT_PAN_HID); -+ break; -+ } -+} -+ -+static void _action_bt_a2dp_pan_hid(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ -+ _set_ant(rtwdev, NM_EXEC, BTC_PHY_ALL, BTC_ANT_W2G); -+ -+ switch (btc->cx.state_map) { -+ case BTC_WBUSY_BNOSCAN: /* wl-busy + bt-A2DP+PAN+HID */ -+ _set_policy(rtwdev, BTC_CXP_PAUTO2_TD3070, -+ BTC_ACT_BT_A2DP_PAN_HID); -+ break; -+ case BTC_WBUSY_BSCAN: /* wl-busy + bt-inq + bt-A2DP+PAN+HID */ -+ _set_policy(rtwdev, BTC_CXP_PAUTO2_TD3070, -+ BTC_ACT_BT_A2DP_PAN_HID); -+ break; -+ case BTC_WSCAN_BSCAN: /* wl-scan + bt-inq + bt-A2DP+PAN+HID */ -+ _set_policy(rtwdev, BTC_CXP_AUTO2_TD3070, -+ BTC_ACT_BT_A2DP_PAN_HID); -+ break; -+ case BTC_WSCAN_BNOSCAN: /* wl-scan + bt-A2DP+PAN+HID */ -+ case BTC_WLINKING: /* wl-connecting + bt-A2DP+PAN+HID */ -+ _set_policy(rtwdev, BTC_CXP_AUTO2_TD3050, -+ BTC_ACT_BT_A2DP_PAN_HID); -+ break; -+ case BTC_WIDLE: /* wl-idle + bt-A2DP+PAN+HID */ -+ _set_policy(rtwdev, BTC_CXP_PAUTO2_TD2080, -+ BTC_ACT_BT_A2DP_PAN_HID); -+ break; -+ } -+} -+ -+static void _action_wl_5g(struct rtw89_dev *rtwdev) -+{ -+ _set_ant(rtwdev, NM_EXEC, BTC_PHY_ALL, BTC_ANT_W5G); -+ _set_policy(rtwdev, BTC_CXP_OFF_EQ0, BTC_ACT_WL_5G); -+} -+ -+static void _action_wl_other(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ -+ _set_ant(rtwdev, NM_EXEC, BTC_PHY_ALL, BTC_ANT_W2G); -+ -+ if (btc->mdinfo.ant.type == BTC_ANT_SHARED) -+ _set_policy(rtwdev, BTC_CXP_OFFB_BWB0, BTC_ACT_WL_OTHER); -+ else -+ _set_policy(rtwdev, BTC_CXP_OFF_EQ0, BTC_ACT_WL_OTHER); -+} -+ -+static void _action_wl_nc(struct rtw89_dev *rtwdev) -+{ -+ _set_ant(rtwdev, NM_EXEC, BTC_PHY_ALL, BTC_ANT_W2G); -+ _set_policy(rtwdev, BTC_CXP_OFF_BT, BTC_ACT_WL_NC); -+} -+ -+static void _action_wl_rfk(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_wl_rfk_info rfk = btc->cx.wl.rfk_info; -+ -+ if (rfk.state != BTC_WRFK_START) -+ return; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, "[BTC], %s(): band = %d\n", -+ __func__, rfk.band); -+ -+ _set_ant(rtwdev, FC_EXEC, BTC_PHY_ALL, BTC_ANT_WRFK); -+ _set_policy(rtwdev, BTC_CXP_OFF_WL, BTC_ACT_WL_RFK); -+} -+ -+static void _set_btg_ctrl(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_wl_info *wl = &btc->cx.wl; -+ struct rtw89_btc_wl_role_info *wl_rinfo = &wl->role_info; -+ struct rtw89_btc_wl_dbcc_info *wl_dinfo = &wl->dbcc_info; -+ bool is_btg = false; -+ -+ if (btc->ctrl.manual) -+ return; -+ -+ /* notify halbb ignore GNT_BT or not for WL BB Rx-AGC control */ -+ if (wl_rinfo->link_mode == BTC_WLINK_5G) /* always 0 if 5G */ -+ is_btg = false; -+ else if (wl_rinfo->link_mode == BTC_WLINK_25G_DBCC && -+ wl_dinfo->real_band[RTW89_PHY_1] != RTW89_BAND_2G) -+ is_btg = false; -+ else -+ is_btg = true; -+ -+ if (btc->dm.run_reason != BTC_RSN_NTFY_INIT && -+ is_btg == btc->dm.wl_btg_rx) -+ return; -+ -+ btc->dm.wl_btg_rx = is_btg; -+ -+ if (wl_rinfo->link_mode == BTC_WLINK_25G_MCC) -+ return; -+ -+ rtw89_ctrl_btg(rtwdev, is_btg); -+} -+ -+struct rtw89_txtime_data { -+ struct rtw89_dev *rtwdev; -+ int type; -+ u32 tx_time; -+ u8 tx_retry; -+ u16 enable; -+ bool reenable; -+}; -+ -+static void rtw89_tx_time_iter(void *data, struct ieee80211_sta *sta) -+{ -+ struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; -+ struct rtw89_txtime_data *iter_data = -+ (struct rtw89_txtime_data *)data; -+ struct rtw89_dev *rtwdev = iter_data->rtwdev; -+ struct rtw89_vif *rtwvif = rtwsta->rtwvif; -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_cx *cx = &btc->cx; -+ struct rtw89_btc_wl_info *wl = &cx->wl; -+ struct rtw89_btc_wl_link_info *plink = NULL; -+ u8 port = rtwvif->port; -+ u32 tx_time = iter_data->tx_time; -+ u8 tx_retry = iter_data->tx_retry; -+ u16 enable = iter_data->enable; -+ bool reenable = iter_data->reenable; -+ -+ plink = &wl->link_info[port]; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): port = %d\n", __func__, port); -+ -+ if (!plink->connected) { -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): connected = %d\n", -+ __func__, plink->connected); -+ return; -+ } -+ -+ /* backup the original tx time before tx-limit on */ -+ if (reenable) { -+ rtw89_mac_get_tx_time(rtwdev, rtwsta, &plink->tx_time); -+ rtw89_mac_get_tx_retry_limit(rtwdev, rtwsta, &plink->tx_retry); -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): reenable, tx_time=%d tx_retry= %d\n", -+ __func__, plink->tx_time, plink->tx_retry); -+ } -+ -+ /* restore the original tx time if no tx-limit */ -+ if (!enable) { -+ rtw89_mac_set_tx_time(rtwdev, rtwsta, true, plink->tx_time); -+ rtw89_mac_set_tx_retry_limit(rtwdev, rtwsta, true, -+ plink->tx_retry); -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): restore, tx_time=%d tx_retry= %d\n", -+ __func__, plink->tx_time, plink->tx_retry); -+ -+ } else { -+ rtw89_mac_set_tx_time(rtwdev, rtwsta, false, tx_time); -+ rtw89_mac_set_tx_retry_limit(rtwdev, rtwsta, false, tx_retry); -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): set, tx_time=%d tx_retry= %d\n", -+ __func__, tx_time, tx_retry); -+ } -+} -+ -+static void _set_wl_tx_limit(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_cx *cx = &btc->cx; -+ struct rtw89_btc_dm *dm = &btc->dm; -+ struct rtw89_btc_wl_info *wl = &cx->wl; -+ struct rtw89_btc_bt_info *bt = &cx->bt; -+ struct rtw89_btc_bt_link_info *b = &bt->link_info; -+ struct rtw89_btc_bt_hfp_desc *hfp = &b->hfp_desc; -+ struct rtw89_btc_bt_hid_desc *hid = &b->hid_desc; -+ struct rtw89_btc_wl_role_info *wl_rinfo = &wl->role_info; -+ struct rtw89_txtime_data data = {.rtwdev = rtwdev}; -+ u8 mode = wl_rinfo->link_mode; -+ u8 tx_retry = 0; -+ u32 tx_time = 0; -+ u16 enable = 0; -+ bool reenable = false; -+ -+ if (btc->ctrl.manual) -+ return; -+ -+ if (btc->dm.freerun || btc->ctrl.igno_bt || b->profile_cnt.now == 0 || -+ mode == BTC_WLINK_5G || mode == BTC_WLINK_NOLINK) { -+ enable = 0; -+ tx_time = BTC_MAX_TX_TIME_DEF; -+ tx_retry = BTC_MAX_TX_RETRY_DEF; -+ } else if ((hfp->exist && hid->exist) || hid->pair_cnt > 1) { -+ enable = 1; -+ tx_time = BTC_MAX_TX_TIME_L2; -+ tx_retry = BTC_MAX_TX_RETRY_L1; -+ } else if (hfp->exist || hid->exist) { -+ enable = 1; -+ tx_time = BTC_MAX_TX_TIME_L3; -+ tx_retry = BTC_MAX_TX_RETRY_L1; -+ } else { -+ enable = 0; -+ tx_time = BTC_MAX_TX_TIME_DEF; -+ tx_retry = BTC_MAX_TX_RETRY_DEF; -+ } -+ -+ if (dm->wl_tx_limit.enable == enable && -+ dm->wl_tx_limit.tx_time == tx_time && -+ dm->wl_tx_limit.tx_retry == tx_retry) -+ return; -+ -+ if (!dm->wl_tx_limit.enable && enable) -+ reenable = true; -+ -+ dm->wl_tx_limit.enable = enable; -+ dm->wl_tx_limit.tx_time = tx_time; -+ dm->wl_tx_limit.tx_retry = tx_retry; -+ -+ data.enable = enable; -+ data.tx_time = tx_time; -+ data.tx_retry = tx_retry; -+ data.reenable = reenable; -+ -+ ieee80211_iterate_stations_atomic(rtwdev->hw, -+ rtw89_tx_time_iter, -+ &data); -+} -+ -+static void _set_bt_rx_agc(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_wl_info *wl = &btc->cx.wl; -+ struct rtw89_btc_wl_role_info *wl_rinfo = &wl->role_info; -+ struct rtw89_btc_bt_info *bt = &btc->cx.bt; -+ bool bt_hi_lna_rx = false; -+ -+ if (wl_rinfo->link_mode != BTC_WLINK_NOLINK && btc->dm.wl_btg_rx) -+ bt_hi_lna_rx = true; -+ -+ if (bt_hi_lna_rx == bt->hi_lna_rx) -+ return; -+ -+ _write_scbd(rtwdev, BTC_WSCB_BT_HILNA, bt_hi_lna_rx); -+} -+ -+/* TODO add these functions */ -+static void _action_common(struct rtw89_dev *rtwdev) -+{ -+ _set_btg_ctrl(rtwdev); -+ _set_wl_tx_limit(rtwdev); -+ _set_bt_afh_info(rtwdev); -+ _set_bt_rx_agc(rtwdev); -+ _set_rf_trx_para(rtwdev); -+} -+ -+static void _action_by_bt(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_bt_info *bt = &btc->cx.bt; -+ struct rtw89_btc_bt_link_info *bt_linfo = &bt->link_info; -+ struct rtw89_btc_bt_hid_desc hid = bt_linfo->hid_desc; -+ struct rtw89_btc_bt_a2dp_desc a2dp = bt_linfo->a2dp_desc; -+ struct rtw89_btc_bt_pan_desc pan = bt_linfo->pan_desc; -+ u8 profile_map = 0; -+ -+ if (bt_linfo->hfp_desc.exist) -+ profile_map |= BTC_BT_HFP; -+ -+ if (bt_linfo->hid_desc.exist) -+ profile_map |= BTC_BT_HID; -+ -+ if (bt_linfo->a2dp_desc.exist) -+ profile_map |= BTC_BT_A2DP; -+ -+ if (bt_linfo->pan_desc.exist) -+ profile_map |= BTC_BT_PAN; -+ -+ switch (profile_map) { -+ case BTC_BT_NOPROFILE: -+ if (_check_freerun(rtwdev)) -+ _action_freerun(rtwdev); -+ else if (a2dp.active || pan.active) -+ _action_bt_pan(rtwdev); -+ else -+ _action_bt_idle(rtwdev); -+ break; -+ case BTC_BT_HFP: -+ if (_check_freerun(rtwdev)) -+ _action_freerun(rtwdev); -+ else -+ _action_bt_hfp(rtwdev); -+ break; -+ case BTC_BT_HFP | BTC_BT_HID: -+ case BTC_BT_HID: -+ if (_check_freerun(rtwdev)) -+ _action_freerun(rtwdev); -+ else -+ _action_bt_hid(rtwdev); -+ break; -+ case BTC_BT_A2DP: -+ if (_check_freerun(rtwdev)) -+ _action_freerun(rtwdev); -+ else if (a2dp.sink) -+ _action_bt_a2dpsink(rtwdev); -+ else if (bt_linfo->multi_link.now && !hid.pair_cnt) -+ _action_bt_a2dp_pan(rtwdev); -+ else -+ _action_bt_a2dp(rtwdev); -+ break; -+ case BTC_BT_PAN: -+ _action_bt_pan(rtwdev); -+ break; -+ case BTC_BT_A2DP | BTC_BT_HFP: -+ case BTC_BT_A2DP | BTC_BT_HID: -+ case BTC_BT_A2DP | BTC_BT_HFP | BTC_BT_HID: -+ if (_check_freerun(rtwdev)) -+ _action_freerun(rtwdev); -+ else -+ _action_bt_a2dp_hid(rtwdev); -+ break; -+ case BTC_BT_A2DP | BTC_BT_PAN: -+ _action_bt_a2dp_pan(rtwdev); -+ break; -+ case BTC_BT_PAN | BTC_BT_HFP: -+ case BTC_BT_PAN | BTC_BT_HID: -+ case BTC_BT_PAN | BTC_BT_HFP | BTC_BT_HID: -+ _action_bt_pan_hid(rtwdev); -+ break; -+ case BTC_BT_A2DP | BTC_BT_PAN | BTC_BT_HID: -+ case BTC_BT_A2DP | BTC_BT_PAN | BTC_BT_HFP: -+ default: -+ _action_bt_a2dp_pan_hid(rtwdev); -+ break; -+ } -+} -+ -+static void _action_wl_2g_sta(struct rtw89_dev *rtwdev) -+{ -+ _action_by_bt(rtwdev); -+} -+ -+static void _action_wl_scan(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_wl_info *wl = &btc->cx.wl; -+ struct rtw89_btc_wl_dbcc_info *wl_dinfo = &wl->dbcc_info; -+ -+ if (rtwdev->dbcc_en) { -+ if (wl_dinfo->real_band[RTW89_PHY_0] != RTW89_BAND_2G && -+ wl_dinfo->real_band[RTW89_PHY_1] != RTW89_BAND_2G) -+ _action_wl_5g(rtwdev); -+ else -+ _action_by_bt(rtwdev); -+ } else { -+ if (wl->scan_info.band[RTW89_PHY_0] != RTW89_BAND_2G) -+ _action_wl_5g(rtwdev); -+ else -+ _action_by_bt(rtwdev); -+ } -+} -+ -+static void _action_wl_25g_mcc(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ -+ _set_ant(rtwdev, NM_EXEC, BTC_PHY_ALL, BTC_ANT_W25G); -+ -+ if (btc->mdinfo.ant.type == BTC_ANT_SHARED) { -+ if (btc->cx.bt.link_info.profile_cnt.now == 0) -+ _set_policy(rtwdev, BTC_CXP_OFFE_DEF2, -+ BTC_ACT_WL_25G_MCC); -+ else -+ _set_policy(rtwdev, BTC_CXP_OFFE_DEF, -+ BTC_ACT_WL_25G_MCC); -+ } else { /* dedicated-antenna */ -+ _set_policy(rtwdev, BTC_CXP_OFF_EQ0, BTC_ACT_WL_25G_MCC); -+ } -+} -+ -+static void _action_wl_2g_mcc(struct rtw89_dev *rtwdev) -+{ struct rtw89_btc *btc = &rtwdev->btc; -+ -+ _set_ant(rtwdev, NM_EXEC, BTC_PHY_ALL, BTC_ANT_W2G); -+ -+ if (btc->mdinfo.ant.type == BTC_ANT_SHARED) { /* shared-antenna */ -+ if (btc->cx.bt.link_info.profile_cnt.now == 0) -+ _set_policy(rtwdev, BTC_CXP_OFFE_DEF2, -+ BTC_ACT_WL_2G_MCC); -+ else -+ _set_policy(rtwdev, BTC_CXP_OFFE_DEF, -+ BTC_ACT_WL_2G_MCC); -+ } else { /* dedicated-antenna */ -+ _set_policy(rtwdev, BTC_CXP_OFF_EQ0, BTC_ACT_WL_2G_MCC); -+ } -+} -+ -+static void _action_wl_2g_scc(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ -+ _set_ant(rtwdev, NM_EXEC, BTC_PHY_ALL, BTC_ANT_W2G); -+ -+ if (btc->mdinfo.ant.type == BTC_ANT_SHARED) { /* shared-antenna */ -+ if (btc->cx.bt.link_info.profile_cnt.now == 0) -+ _set_policy(rtwdev, -+ BTC_CXP_OFFE_DEF2, BTC_ACT_WL_2G_SCC); -+ else -+ _set_policy(rtwdev, -+ BTC_CXP_OFFE_DEF, BTC_ACT_WL_2G_SCC); -+ } else { /* dedicated-antenna */ -+ _set_policy(rtwdev, BTC_CXP_OFF_EQ0, BTC_ACT_WL_2G_SCC); -+ } -+} -+ -+static void _action_wl_2g_ap(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ -+ _set_ant(rtwdev, NM_EXEC, BTC_PHY_ALL, BTC_ANT_W2G); -+ -+ if (btc->mdinfo.ant.type == BTC_ANT_SHARED) { -+ if (btc->cx.bt.link_info.profile_cnt.now == 0) -+ _set_policy(rtwdev, BTC_CXP_OFFE_DEF2, -+ BTC_ACT_WL_2G_AP); -+ else -+ _set_policy(rtwdev, BTC_CXP_OFFE_DEF, BTC_ACT_WL_2G_AP); -+ } else {/* dedicated-antenna */ -+ _set_policy(rtwdev, BTC_CXP_OFF_EQ0, BTC_ACT_WL_2G_AP); -+ } -+} -+ -+static void _action_wl_2g_go(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ -+ _set_ant(rtwdev, NM_EXEC, BTC_PHY_ALL, BTC_ANT_W2G); -+ -+ if (btc->mdinfo.ant.type == BTC_ANT_SHARED) { /* shared-antenna */ -+ if (btc->cx.bt.link_info.profile_cnt.now == 0) -+ _set_policy(rtwdev, -+ BTC_CXP_OFFE_DEF2, BTC_ACT_WL_2G_GO); -+ else -+ _set_policy(rtwdev, -+ BTC_CXP_OFFE_DEF, BTC_ACT_WL_2G_GO); -+ } else { /* dedicated-antenna */ -+ _set_policy(rtwdev, BTC_CXP_OFF_EQ0, BTC_ACT_WL_2G_GO); -+ } -+} -+ -+static void _action_wl_2g_gc(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ -+ _set_ant(rtwdev, NM_EXEC, BTC_PHY_ALL, BTC_ANT_W2G); -+ -+ if (btc->mdinfo.ant.type == BTC_ANT_SHARED) { /* shared-antenna */ -+ _action_by_bt(rtwdev); -+ } else {/* dedicated-antenna */ -+ _set_policy(rtwdev, BTC_CXP_OFF_EQ0, BTC_ACT_WL_2G_GC); -+ } -+} -+ -+static void _action_wl_2g_nan(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ -+ _set_ant(rtwdev, NM_EXEC, BTC_PHY_ALL, BTC_ANT_W2G); -+ -+ if (btc->mdinfo.ant.type == BTC_ANT_SHARED) { /* shared-antenna */ -+ if (btc->cx.bt.link_info.profile_cnt.now == 0) -+ _set_policy(rtwdev, -+ BTC_CXP_OFFE_DEF2, BTC_ACT_WL_2G_NAN); -+ else -+ _set_policy(rtwdev, -+ BTC_CXP_OFFE_DEF, BTC_ACT_WL_2G_NAN); -+ } else { /* dedicated-antenna */ -+ _set_policy(rtwdev, BTC_CXP_OFF_EQ0, BTC_ACT_WL_2G_NAN); -+ } -+} -+ -+static u32 _read_scbd(struct rtw89_dev *rtwdev) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ struct rtw89_btc *btc = &rtwdev->btc; -+ u32 scbd_val = 0; -+ -+ if (!chip->scbd) -+ return 0; -+ -+ scbd_val = rtw89_mac_get_sb(rtwdev); -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, "[BTC], read scbd: 0x%08x\n", -+ scbd_val); -+ -+ btc->cx.cnt_bt[BTC_BCNT_SCBDREAD]++; -+ return scbd_val; -+} -+ -+static void _write_scbd(struct rtw89_dev *rtwdev, u32 val, bool state) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_wl_info *wl = &btc->cx.wl; -+ u32 scbd_val = 0; -+ -+ if (!chip->scbd) -+ return; -+ -+ scbd_val = state ? wl->scbd | val : wl->scbd & ~val; -+ -+ if (scbd_val == wl->scbd) -+ return; -+ rtw89_mac_cfg_sb(rtwdev, scbd_val); -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, "[BTC], write scbd: 0x%08x\n", -+ scbd_val); -+ wl->scbd = scbd_val; -+ -+ btc->cx.cnt_wl[BTC_WCNT_SCBDUPDATE]++; -+} -+ -+static u8 -+_update_rssi_state(struct rtw89_dev *rtwdev, u8 pre_state, u8 rssi, u8 thresh) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ u8 next_state, tol = chip->rssi_tol; -+ -+ if (pre_state == BTC_RSSI_ST_LOW || -+ pre_state == BTC_RSSI_ST_STAY_LOW) { -+ if (rssi >= (thresh + tol)) -+ next_state = BTC_RSSI_ST_HIGH; -+ else -+ next_state = BTC_RSSI_ST_STAY_LOW; -+ } else { -+ if (rssi < thresh) -+ next_state = BTC_RSSI_ST_LOW; -+ else -+ next_state = BTC_RSSI_ST_STAY_HIGH; -+ } -+ -+ return next_state; -+} -+ -+static -+void _update_dbcc_band(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ -+ btc->cx.wl.dbcc_info.real_band[phy_idx] = -+ btc->cx.wl.scan_info.phy_map & BIT(phy_idx) ? -+ btc->cx.wl.dbcc_info.scan_band[phy_idx] : -+ btc->cx.wl.dbcc_info.op_band[phy_idx]; -+} -+ -+static void _update_wl_info(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_wl_info *wl = &btc->cx.wl; -+ struct rtw89_btc_wl_link_info *wl_linfo = wl->link_info; -+ struct rtw89_btc_wl_role_info *wl_rinfo = &wl->role_info; -+ struct rtw89_btc_wl_dbcc_info *wl_dinfo = &wl->dbcc_info; -+ u8 i, cnt_connect = 0, cnt_connecting = 0, cnt_active = 0; -+ u8 cnt_2g = 0, cnt_5g = 0, phy; -+ u32 wl_2g_ch[2] = {0}, wl_5g_ch[2] = {0}; -+ bool b2g = false, b5g = false, client_joined = false; -+ -+ memset(wl_rinfo, 0, sizeof(*wl_rinfo)); -+ -+ for (i = 0; i < RTW89_MAX_HW_PORT_NUM; i++) { -+ /* check if role active? */ -+ if (!wl_linfo[i].active) -+ continue; -+ -+ cnt_active++; -+ wl_rinfo->active_role[cnt_active - 1].role = wl_linfo[i].role; -+ wl_rinfo->active_role[cnt_active - 1].pid = wl_linfo[i].pid; -+ wl_rinfo->active_role[cnt_active - 1].phy = wl_linfo[i].phy; -+ wl_rinfo->active_role[cnt_active - 1].band = wl_linfo[i].band; -+ wl_rinfo->active_role[cnt_active - 1].noa = (u8)wl_linfo[i].noa; -+ wl_rinfo->active_role[cnt_active - 1].connected = 0; -+ -+ wl->port_id[wl_linfo[i].role] = wl_linfo[i].pid; -+ -+ phy = wl_linfo[i].phy; -+ -+ /* check dbcc role */ -+ if (rtwdev->dbcc_en && phy < RTW89_PHY_MAX) { -+ wl_dinfo->role[phy] = wl_linfo[i].role; -+ wl_dinfo->op_band[phy] = wl_linfo[i].band; -+ _update_dbcc_band(rtwdev, phy); -+ _fw_set_drv_info(rtwdev, CXDRVINFO_DBCC); -+ } -+ -+ if (wl_linfo[i].connected == MLME_NO_LINK) { -+ continue; -+ } else if (wl_linfo[i].connected == MLME_LINKING) { -+ cnt_connecting++; -+ } else { -+ cnt_connect++; -+ if ((wl_linfo[i].role == RTW89_WIFI_ROLE_P2P_GO || -+ wl_linfo[i].role == RTW89_WIFI_ROLE_AP) && -+ wl_linfo[i].client_cnt > 1) -+ client_joined = true; -+ } -+ -+ wl_rinfo->role_map.val |= BIT(wl_linfo[i].role); -+ wl_rinfo->active_role[cnt_active - 1].ch = wl_linfo[i].ch; -+ wl_rinfo->active_role[cnt_active - 1].bw = wl_linfo[i].bw; -+ wl_rinfo->active_role[cnt_active - 1].connected = 1; -+ -+ /* only care 2 roles + BT coex */ -+ if (wl_linfo[i].band != RTW89_BAND_2G) { -+ if (cnt_5g <= ARRAY_SIZE(wl_5g_ch) - 1) -+ wl_5g_ch[cnt_5g] = wl_linfo[i].ch; -+ cnt_5g++; -+ b5g = true; -+ } else { -+ if (cnt_2g <= ARRAY_SIZE(wl_2g_ch) - 1) -+ wl_2g_ch[cnt_2g] = wl_linfo[i].ch; -+ cnt_2g++; -+ b2g = true; -+ } -+ } -+ -+ wl_rinfo->connect_cnt = cnt_connect; -+ -+ /* Be careful to change the following sequence!! */ -+ if (cnt_connect == 0) { -+ wl_rinfo->link_mode = BTC_WLINK_NOLINK; -+ wl_rinfo->role_map.role.none = 1; -+ } else if (!b2g && b5g) { -+ wl_rinfo->link_mode = BTC_WLINK_5G; -+ } else if (wl_rinfo->role_map.role.nan) { -+ wl_rinfo->link_mode = BTC_WLINK_2G_NAN; -+ } else if (cnt_connect > BTC_TDMA_WLROLE_MAX) { -+ wl_rinfo->link_mode = BTC_WLINK_OTHER; -+ } else if (b2g && b5g && cnt_connect == 2) { -+ if (rtwdev->dbcc_en) { -+ switch (wl_dinfo->role[RTW89_PHY_0]) { -+ case RTW89_WIFI_ROLE_STATION: -+ wl_rinfo->link_mode = BTC_WLINK_2G_STA; -+ break; -+ case RTW89_WIFI_ROLE_P2P_GO: -+ wl_rinfo->link_mode = BTC_WLINK_2G_GO; -+ break; -+ case RTW89_WIFI_ROLE_P2P_CLIENT: -+ wl_rinfo->link_mode = BTC_WLINK_2G_GC; -+ break; -+ case RTW89_WIFI_ROLE_AP: -+ wl_rinfo->link_mode = BTC_WLINK_2G_AP; -+ break; -+ default: -+ wl_rinfo->link_mode = BTC_WLINK_OTHER; -+ break; -+ } -+ } else { -+ wl_rinfo->link_mode = BTC_WLINK_25G_MCC; -+ } -+ } else if (!b5g && cnt_connect == 2) { -+ if (wl_rinfo->role_map.role.station && -+ (wl_rinfo->role_map.role.p2p_go || -+ wl_rinfo->role_map.role.p2p_gc || -+ wl_rinfo->role_map.role.ap)) { -+ if (wl_2g_ch[0] == wl_2g_ch[1]) -+ wl_rinfo->link_mode = BTC_WLINK_2G_SCC; -+ else -+ wl_rinfo->link_mode = BTC_WLINK_2G_MCC; -+ } else { -+ wl_rinfo->link_mode = BTC_WLINK_2G_MCC; -+ } -+ } else if (!b5g && cnt_connect == 1) { -+ if (wl_rinfo->role_map.role.station) -+ wl_rinfo->link_mode = BTC_WLINK_2G_STA; -+ else if (wl_rinfo->role_map.role.ap) -+ wl_rinfo->link_mode = BTC_WLINK_2G_AP; -+ else if (wl_rinfo->role_map.role.p2p_go) -+ wl_rinfo->link_mode = BTC_WLINK_2G_GO; -+ else if (wl_rinfo->role_map.role.p2p_gc) -+ wl_rinfo->link_mode = BTC_WLINK_2G_GC; -+ else -+ wl_rinfo->link_mode = BTC_WLINK_OTHER; -+ } -+ -+ /* if no client_joined, don't care P2P-GO/AP role */ -+ if (wl_rinfo->role_map.role.p2p_go || wl_rinfo->role_map.role.ap) { -+ if (!client_joined) { -+ if (wl_rinfo->link_mode == BTC_WLINK_2G_SCC || -+ wl_rinfo->link_mode == BTC_WLINK_2G_MCC) { -+ wl_rinfo->link_mode = BTC_WLINK_2G_STA; -+ wl_rinfo->connect_cnt = 1; -+ } else if (wl_rinfo->link_mode == BTC_WLINK_2G_GO || -+ wl_rinfo->link_mode == BTC_WLINK_2G_AP) { -+ wl_rinfo->link_mode = BTC_WLINK_NOLINK; -+ wl_rinfo->connect_cnt = 0; -+ } -+ } -+ } -+ -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], cnt_connect = %d, link_mode = %d\n", -+ cnt_connect, wl_rinfo->link_mode); -+ -+ _fw_set_drv_info(rtwdev, CXDRVINFO_ROLE); -+} -+ -+#define BTC_CHK_HANG_MAX 3 -+#define BTC_SCB_INV_VALUE GENMASK(31, 0) -+ -+void rtw89_coex_act1_work(struct work_struct *work) -+{ -+ struct rtw89_dev *rtwdev = container_of(work, struct rtw89_dev, -+ coex_act1_work.work); -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_dm *dm = &rtwdev->btc.dm; -+ struct rtw89_btc_cx *cx = &btc->cx; -+ struct rtw89_btc_wl_info *wl = &cx->wl; -+ -+ mutex_lock(&rtwdev->mutex); -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, "[BTC], %s(): enter\n", __func__); -+ dm->cnt_notify[BTC_NCNT_TIMER]++; -+ if (wl->status.map._4way) -+ wl->status.map._4way = false; -+ if (wl->status.map.connecting) -+ wl->status.map.connecting = false; -+ -+ _run_coex(rtwdev, BTC_RSN_ACT1_WORK); -+ mutex_unlock(&rtwdev->mutex); -+} -+ -+void rtw89_coex_bt_devinfo_work(struct work_struct *work) -+{ -+ struct rtw89_dev *rtwdev = container_of(work, struct rtw89_dev, -+ coex_bt_devinfo_work.work); -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_dm *dm = &rtwdev->btc.dm; -+ struct rtw89_btc_bt_a2dp_desc *a2dp = &btc->cx.bt.link_info.a2dp_desc; -+ -+ mutex_lock(&rtwdev->mutex); -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, "[BTC], %s(): enter\n", __func__); -+ dm->cnt_notify[BTC_NCNT_TIMER]++; -+ a2dp->play_latency = 0; -+ _run_coex(rtwdev, BTC_RSN_BT_DEVINFO_WORK); -+ mutex_unlock(&rtwdev->mutex); -+} -+ -+void rtw89_coex_rfk_chk_work(struct work_struct *work) -+{ -+ struct rtw89_dev *rtwdev = container_of(work, struct rtw89_dev, -+ coex_rfk_chk_work.work); -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_dm *dm = &rtwdev->btc.dm; -+ struct rtw89_btc_cx *cx = &btc->cx; -+ struct rtw89_btc_wl_info *wl = &cx->wl; -+ -+ mutex_lock(&rtwdev->mutex); -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, "[BTC], %s(): enter\n", __func__); -+ dm->cnt_notify[BTC_NCNT_TIMER]++; -+ if (wl->rfk_info.state != BTC_WRFK_STOP) { -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): RFK timeout\n", __func__); -+ cx->cnt_wl[BTC_WCNT_RFK_TIMEOUT]++; -+ dm->error.map.wl_rfk_timeout = true; -+ wl->rfk_info.state = BTC_WRFK_STOP; -+ _write_scbd(rtwdev, BTC_WSCB_WLRFK, false); -+ _run_coex(rtwdev, BTC_RSN_RFK_CHK_WORK); -+ } -+ mutex_unlock(&rtwdev->mutex); -+} -+ -+static void _update_bt_scbd(struct rtw89_dev *rtwdev, bool only_update) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_cx *cx = &btc->cx; -+ struct rtw89_btc_bt_info *bt = &btc->cx.bt; -+ u32 val; -+ bool status_change = false; -+ -+ if (!chip->scbd) -+ return; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, "[BTC], %s\n", __func__); -+ -+ val = _read_scbd(rtwdev); -+ if (val == BTC_SCB_INV_VALUE) { -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): return by invalid scbd value\n", -+ __func__); -+ return; -+ } -+ -+ if (!(val & BTC_BSCB_ON) || -+ btc->dm.cnt_dm[BTC_DCNT_BTCNT_FREEZE] >= BTC_CHK_HANG_MAX) -+ bt->enable.now = 0; -+ else -+ bt->enable.now = 1; -+ -+ if (bt->enable.now != bt->enable.last) -+ status_change = true; -+ -+ /* reset bt info if bt re-enable */ -+ if (bt->enable.now && !bt->enable.last) { -+ _reset_btc_var(rtwdev, BTC_RESET_BTINFO); -+ cx->cnt_bt[BTC_BCNT_REENABLE]++; -+ bt->enable.now = 1; -+ } -+ -+ bt->enable.last = bt->enable.now; -+ bt->scbd = val; -+ bt->mbx_avl = !!(val & BTC_BSCB_ACT); -+ -+ if (bt->whql_test != !!(val & BTC_BSCB_WHQL)) -+ status_change = true; -+ -+ bt->whql_test = !!(val & BTC_BSCB_WHQL); -+ bt->btg_type = val & BTC_BSCB_BT_S1 ? BTC_BT_BTG : BTC_BT_ALONE; -+ bt->link_info.a2dp_desc.active = !!(val & BTC_BSCB_A2DP_ACT); -+ -+ /* if rfk run 1->0 */ -+ if (bt->rfk_info.map.run && !(val & BTC_BSCB_RFK_RUN)) -+ status_change = true; -+ -+ bt->rfk_info.map.run = !!(val & BTC_BSCB_RFK_RUN); -+ bt->rfk_info.map.req = !!(val & BTC_BSCB_RFK_REQ); -+ bt->hi_lna_rx = !!(val & BTC_BSCB_BT_HILNA); -+ bt->link_info.status.map.connect = !!(val & BTC_BSCB_BT_CONNECT); -+ bt->run_patch_code = !!(val & BTC_BSCB_PATCH_CODE); -+ -+ if (!only_update && status_change) -+ _run_coex(rtwdev, BTC_RSN_UPDATE_BT_SCBD); -+} -+ -+static bool _chk_wl_rfk_request(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_cx *cx = &btc->cx; -+ struct rtw89_btc_bt_info *bt = &cx->bt; -+ -+ _update_bt_scbd(rtwdev, true); -+ -+ cx->cnt_wl[BTC_WCNT_RFK_REQ]++; -+ -+ if ((bt->rfk_info.map.run || bt->rfk_info.map.req) && -+ !bt->rfk_info.map.timeout) { -+ cx->cnt_wl[BTC_WCNT_RFK_REJECT]++; -+ } else { -+ cx->cnt_wl[BTC_WCNT_RFK_GO]++; -+ return true; -+ } -+ return false; -+} -+ -+static -+void _run_coex(struct rtw89_dev *rtwdev, enum btc_reason_and_action reason) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_dm *dm = &rtwdev->btc.dm; -+ struct rtw89_btc_cx *cx = &btc->cx; -+ struct rtw89_btc_wl_info *wl = &btc->cx.wl; -+ struct rtw89_btc_wl_role_info *wl_rinfo = &wl->role_info; -+ u8 mode = wl_rinfo->link_mode; -+ -+ lockdep_assert_held(&rtwdev->mutex); -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, "[BTC], %s(): reason=%d, mode=%d\n", -+ __func__, reason, mode); -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, "[BTC], %s(): wl_only=%d, bt_only=%d\n", -+ __func__, dm->wl_only, dm->bt_only); -+ -+ dm->run_reason = reason; -+ _update_dm_step(rtwdev, reason); -+ _update_btc_state_map(rtwdev); -+ -+ /* Be careful to change the following function sequence!! */ -+ if (btc->ctrl.manual) { -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): return for Manual CTRL!!\n", -+ __func__); -+ return; -+ } -+ -+ if (btc->ctrl.igno_bt && -+ (reason == BTC_RSN_UPDATE_BT_INFO || -+ reason == BTC_RSN_UPDATE_BT_SCBD)) { -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): return for Stop Coex DM!!\n", -+ __func__); -+ return; -+ } -+ -+ if (!wl->status.map.init_ok) { -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): return for WL init fail!!\n", -+ __func__); -+ return; -+ } -+ -+ if (wl->status.map.rf_off_pre == wl->status.map.rf_off && -+ wl->status.map.lps_pre == wl->status.map.lps && -+ (reason == BTC_RSN_NTFY_POWEROFF || -+ reason == BTC_RSN_NTFY_RADIO_STATE)) { -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): return for WL rf off state no change!!\n", -+ __func__); -+ return; -+ } -+ -+ dm->cnt_dm[BTC_DCNT_RUN]++; -+ -+ if (btc->ctrl.always_freerun) { -+ _action_freerun(rtwdev); -+ btc->ctrl.igno_bt = true; -+ goto exit; -+ } -+ -+ if (dm->wl_only) { -+ _action_wl_only(rtwdev); -+ btc->ctrl.igno_bt = true; -+ goto exit; -+ } -+ -+ if (wl->status.map.rf_off || wl->status.map.lps || dm->bt_only) { -+ _action_wl_off(rtwdev); -+ btc->ctrl.igno_bt = true; -+ goto exit; -+ } -+ -+ btc->ctrl.igno_bt = false; -+ dm->freerun = false; -+ -+ if (reason == BTC_RSN_NTFY_INIT) { -+ _action_wl_init(rtwdev); -+ goto exit; -+ } -+ -+ if (!cx->bt.enable.now && !cx->other.type) { -+ _action_bt_off(rtwdev); -+ goto exit; -+ } -+ -+ if (cx->bt.whql_test) { -+ _action_bt_whql(rtwdev); -+ goto exit; -+ } -+ -+ if (wl->rfk_info.state != BTC_WRFK_STOP) { -+ _action_wl_rfk(rtwdev); -+ goto exit; -+ } -+ -+ if (cx->state_map == BTC_WLINKING) { -+ if (mode == BTC_WLINK_NOLINK || mode == BTC_WLINK_2G_STA || -+ mode == BTC_WLINK_5G) { -+ _action_wl_scan(rtwdev); -+ goto exit; -+ } -+ } -+ -+ if (wl->status.map.scan) { -+ _action_wl_scan(rtwdev); -+ goto exit; -+ } -+ -+ switch (mode) { -+ case BTC_WLINK_NOLINK: -+ _action_wl_nc(rtwdev); -+ break; -+ case BTC_WLINK_2G_STA: -+ _action_wl_2g_sta(rtwdev); -+ break; -+ case BTC_WLINK_2G_AP: -+ _action_wl_2g_ap(rtwdev); -+ break; -+ case BTC_WLINK_2G_GO: -+ _action_wl_2g_go(rtwdev); -+ break; -+ case BTC_WLINK_2G_GC: -+ _action_wl_2g_gc(rtwdev); -+ break; -+ case BTC_WLINK_2G_SCC: -+ _action_wl_2g_scc(rtwdev); -+ break; -+ case BTC_WLINK_2G_MCC: -+ _action_wl_2g_mcc(rtwdev); -+ break; -+ case BTC_WLINK_25G_MCC: -+ _action_wl_25g_mcc(rtwdev); -+ break; -+ case BTC_WLINK_5G: -+ _action_wl_5g(rtwdev); -+ break; -+ case BTC_WLINK_2G_NAN: -+ _action_wl_2g_nan(rtwdev); -+ break; -+ default: -+ _action_wl_other(rtwdev); -+ break; -+ } -+ -+exit: -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, "[BTC], %s(): exit\n", __func__); -+ _action_common(rtwdev); -+} -+ -+void rtw89_btc_ntfy_poweron(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, "[BTC], %s(): !!\n", __func__); -+ btc->dm.cnt_notify[BTC_NCNT_POWER_ON]++; -+} -+ -+void rtw89_btc_ntfy_poweroff(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, "[BTC], %s(): !!\n", __func__); -+ btc->dm.cnt_notify[BTC_NCNT_POWER_OFF]++; -+ -+ btc->cx.wl.status.map.rf_off = 1; -+ -+ _write_scbd(rtwdev, BTC_WSCB_ALL, false); -+ _run_coex(rtwdev, BTC_RSN_NTFY_POWEROFF); -+ -+ rtw89_btc_fw_en_rpt(rtwdev, RPT_EN_ALL, 0); -+ -+ btc->cx.wl.status.map.rf_off_pre = btc->cx.wl.status.map.rf_off; -+} -+ -+static void _set_init_info(struct rtw89_dev *rtwdev) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_dm *dm = &btc->dm; -+ struct rtw89_btc_wl_info *wl = &btc->cx.wl; -+ -+ dm->init_info.wl_only = (u8)dm->wl_only; -+ dm->init_info.bt_only = (u8)dm->bt_only; -+ dm->init_info.wl_init_ok = (u8)wl->status.map.init_ok; -+ dm->init_info.dbcc_en = rtwdev->dbcc_en; -+ dm->init_info.cx_other = btc->cx.other.type; -+ dm->init_info.wl_guard_ch = chip->afh_guard_ch; -+ dm->init_info.module = btc->mdinfo; -+} -+ -+void rtw89_btc_ntfy_init(struct rtw89_dev *rtwdev, u8 mode) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_dm *dm = &rtwdev->btc.dm; -+ struct rtw89_btc_wl_info *wl = &btc->cx.wl; -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ -+ _reset_btc_var(rtwdev, BTC_RESET_ALL); -+ btc->dm.run_reason = BTC_RSN_NONE; -+ btc->dm.run_action = BTC_ACT_NONE; -+ btc->ctrl.igno_bt = true; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): mode=%d\n", __func__, mode); -+ -+ dm->cnt_notify[BTC_NCNT_INIT_COEX]++; -+ dm->wl_only = mode == BTC_MODE_WL ? 1 : 0; -+ dm->bt_only = mode == BTC_MODE_BT ? 1 : 0; -+ wl->status.map.rf_off = mode == BTC_MODE_WLOFF ? 1 : 0; -+ -+ chip->ops->btc_set_rfe(rtwdev); -+ chip->ops->btc_init_cfg(rtwdev); -+ -+ if (!wl->status.map.init_ok) { -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): return for WL init fail!!\n", -+ __func__); -+ dm->error.map.init = true; -+ return; -+ } -+ -+ _write_scbd(rtwdev, -+ BTC_WSCB_ACTIVE | BTC_WSCB_ON | BTC_WSCB_BTLOG, true); -+ _update_bt_scbd(rtwdev, true); -+ if (rtw89_mac_get_ctrl_path(rtwdev)) { -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): PTA owner warning!!\n", -+ __func__); -+ dm->error.map.pta_owner = true; -+ } -+ -+ _set_init_info(rtwdev); -+ _set_wl_tx_power(rtwdev, RTW89_BTC_WL_DEF_TX_PWR); -+ rtw89_btc_fw_set_slots(rtwdev, CXST_MAX, dm->slot); -+ btc_fw_set_monreg(rtwdev); -+ _fw_set_drv_info(rtwdev, CXDRVINFO_INIT); -+ _fw_set_drv_info(rtwdev, CXDRVINFO_CTRL); -+ -+ _run_coex(rtwdev, BTC_RSN_NTFY_INIT); -+} -+ -+void rtw89_btc_ntfy_scan_start(struct rtw89_dev *rtwdev, u8 phy_idx, u8 band) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_wl_info *wl = &btc->cx.wl; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): phy_idx=%d, band=%d\n", -+ __func__, phy_idx, band); -+ btc->dm.cnt_notify[BTC_NCNT_SCAN_START]++; -+ wl->status.map.scan = true; -+ wl->scan_info.band[phy_idx] = band; -+ wl->scan_info.phy_map |= BIT(phy_idx); -+ _fw_set_drv_info(rtwdev, CXDRVINFO_SCAN); -+ -+ if (rtwdev->dbcc_en) { -+ wl->dbcc_info.scan_band[phy_idx] = band; -+ _update_dbcc_band(rtwdev, phy_idx); -+ _fw_set_drv_info(rtwdev, CXDRVINFO_DBCC); -+ } -+ -+ _run_coex(rtwdev, BTC_RSN_NTFY_SCAN_START); -+} -+ -+void rtw89_btc_ntfy_scan_finish(struct rtw89_dev *rtwdev, u8 phy_idx) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_wl_info *wl = &btc->cx.wl; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): phy_idx=%d\n", __func__, phy_idx); -+ btc->dm.cnt_notify[BTC_NCNT_SCAN_FINISH]++; -+ -+ wl->status.map.scan = false; -+ wl->scan_info.phy_map &= ~BIT(phy_idx); -+ _fw_set_drv_info(rtwdev, CXDRVINFO_SCAN); -+ -+ if (rtwdev->dbcc_en) { -+ _update_dbcc_band(rtwdev, phy_idx); -+ _fw_set_drv_info(rtwdev, CXDRVINFO_DBCC); -+ } -+ -+ _run_coex(rtwdev, BTC_RSN_NTFY_SCAN_FINISH); -+} -+ -+void rtw89_btc_ntfy_switch_band(struct rtw89_dev *rtwdev, u8 phy_idx, u8 band) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_wl_info *wl = &btc->cx.wl; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): phy_idx=%d, band=%d\n", -+ __func__, phy_idx, band); -+ btc->dm.cnt_notify[BTC_NCNT_SWITCH_BAND]++; -+ -+ wl->scan_info.band[phy_idx] = band; -+ wl->scan_info.phy_map |= BIT(phy_idx); -+ _fw_set_drv_info(rtwdev, CXDRVINFO_SCAN); -+ -+ if (rtwdev->dbcc_en) { -+ wl->dbcc_info.scan_band[phy_idx] = band; -+ _update_dbcc_band(rtwdev, phy_idx); -+ _fw_set_drv_info(rtwdev, CXDRVINFO_DBCC); -+ } -+ _run_coex(rtwdev, BTC_RSN_NTFY_SWBAND); -+} -+ -+void rtw89_btc_ntfy_specific_packet(struct rtw89_dev *rtwdev, -+ enum btc_pkt_type pkt_type) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_cx *cx = &btc->cx; -+ struct rtw89_btc_wl_info *wl = &cx->wl; -+ struct rtw89_btc_bt_link_info *b = &cx->bt.link_info; -+ struct rtw89_btc_bt_hfp_desc *hfp = &b->hfp_desc; -+ struct rtw89_btc_bt_hid_desc *hid = &b->hid_desc; -+ u32 cnt; -+ u32 delay = RTW89_COEX_ACT1_WORK_PERIOD; -+ bool delay_work = false; -+ -+ switch (pkt_type) { -+ case PACKET_DHCP: -+ cnt = ++cx->cnt_wl[BTC_WCNT_DHCP]; -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): DHCP cnt=%d\n", __func__, cnt); -+ wl->status.map.connecting = true; -+ delay_work = true; -+ break; -+ case PACKET_EAPOL: -+ cnt = ++cx->cnt_wl[BTC_WCNT_EAPOL]; -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): EAPOL cnt=%d\n", __func__, cnt); -+ wl->status.map._4way = true; -+ delay_work = true; -+ if (hfp->exist || hid->exist) -+ delay /= 2; -+ break; -+ case PACKET_EAPOL_END: -+ cnt = ++cx->cnt_wl[BTC_WCNT_EAPOL]; -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): EAPOL_End cnt=%d\n", -+ __func__, cnt); -+ wl->status.map._4way = false; -+ cancel_delayed_work(&rtwdev->coex_act1_work); -+ break; -+ case PACKET_ARP: -+ cnt = ++cx->cnt_wl[BTC_WCNT_ARP]; -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): ARP cnt=%d\n", __func__, cnt); -+ return; -+ case PACKET_ICMP: -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): ICMP pkt\n", __func__); -+ return; -+ default: -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): unknown packet type %d\n", -+ __func__, pkt_type); -+ return; -+ } -+ -+ if (delay_work) { -+ cancel_delayed_work(&rtwdev->coex_act1_work); -+ ieee80211_queue_delayed_work(rtwdev->hw, -+ &rtwdev->coex_act1_work, delay); -+ } -+ -+ btc->dm.cnt_notify[BTC_NCNT_SPECIAL_PACKET]++; -+ _run_coex(rtwdev, BTC_RSN_NTFY_SPECIFIC_PACKET); -+} -+ -+void rtw89_btc_ntfy_eapol_packet_work(struct work_struct *work) -+{ -+ struct rtw89_dev *rtwdev = container_of(work, struct rtw89_dev, -+ btc.eapol_notify_work); -+ -+ mutex_lock(&rtwdev->mutex); -+ rtw89_leave_ps_mode(rtwdev); -+ rtw89_btc_ntfy_specific_packet(rtwdev, PACKET_EAPOL); -+ mutex_unlock(&rtwdev->mutex); -+} -+ -+void rtw89_btc_ntfy_arp_packet_work(struct work_struct *work) -+{ -+ struct rtw89_dev *rtwdev = container_of(work, struct rtw89_dev, -+ btc.arp_notify_work); -+ -+ mutex_lock(&rtwdev->mutex); -+ rtw89_btc_ntfy_specific_packet(rtwdev, PACKET_ARP); -+ mutex_unlock(&rtwdev->mutex); -+} -+ -+void rtw89_btc_ntfy_dhcp_packet_work(struct work_struct *work) -+{ -+ struct rtw89_dev *rtwdev = container_of(work, struct rtw89_dev, -+ btc.dhcp_notify_work); -+ -+ mutex_lock(&rtwdev->mutex); -+ rtw89_leave_ps_mode(rtwdev); -+ rtw89_btc_ntfy_specific_packet(rtwdev, PACKET_DHCP); -+ mutex_unlock(&rtwdev->mutex); -+} -+ -+void rtw89_btc_ntfy_icmp_packet_work(struct work_struct *work) -+{ -+ struct rtw89_dev *rtwdev = container_of(work, struct rtw89_dev, -+ btc.icmp_notify_work); -+ -+ mutex_lock(&rtwdev->mutex); -+ rtw89_leave_ps_mode(rtwdev); -+ rtw89_btc_ntfy_specific_packet(rtwdev, PACKET_ICMP); -+ mutex_unlock(&rtwdev->mutex); -+} -+ -+static void _update_bt_info(struct rtw89_dev *rtwdev, u8 *buf, u32 len) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_cx *cx = &btc->cx; -+ struct rtw89_btc_bt_info *bt = &cx->bt; -+ struct rtw89_btc_bt_link_info *b = &bt->link_info; -+ struct rtw89_btc_bt_hfp_desc *hfp = &b->hfp_desc; -+ struct rtw89_btc_bt_hid_desc *hid = &b->hid_desc; -+ struct rtw89_btc_bt_a2dp_desc *a2dp = &b->a2dp_desc; -+ struct rtw89_btc_bt_pan_desc *pan = &b->pan_desc; -+ union btc_btinfo btinfo; -+ -+ if (buf[BTC_BTINFO_L1] != 6) -+ return; -+ -+ if (!memcmp(bt->raw_info, buf, BTC_BTINFO_MAX)) { -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): return by bt-info duplicate!!\n", -+ __func__); -+ cx->cnt_bt[BTC_BCNT_INFOSAME]++; -+ return; -+ } -+ -+ memcpy(bt->raw_info, buf, BTC_BTINFO_MAX); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): bt_info[2]=0x%02x\n", -+ __func__, bt->raw_info[2]); -+ -+ /* reset to mo-connect before update */ -+ b->status.val = BTC_BLINK_NOCONNECT; -+ b->profile_cnt.last = b->profile_cnt.now; -+ b->relink.last = b->relink.now; -+ a2dp->exist_last = a2dp->exist; -+ b->multi_link.last = b->multi_link.now; -+ bt->inq_pag.last = bt->inq_pag.now; -+ b->profile_cnt.now = 0; -+ hid->type = 0; -+ -+ /* parse raw info low-Byte2 */ -+ btinfo.val = bt->raw_info[BTC_BTINFO_L2]; -+ b->status.map.connect = btinfo.lb2.connect; -+ b->status.map.sco_busy = btinfo.lb2.sco_busy; -+ b->status.map.acl_busy = btinfo.lb2.acl_busy; -+ b->status.map.inq_pag = btinfo.lb2.inq_pag; -+ bt->inq_pag.now = btinfo.lb2.inq_pag; -+ cx->cnt_bt[BTC_BCNT_INQPAG] += !!(bt->inq_pag.now && !bt->inq_pag.last); -+ -+ hfp->exist = btinfo.lb2.hfp; -+ b->profile_cnt.now += (u8)hfp->exist; -+ hid->exist = btinfo.lb2.hid; -+ b->profile_cnt.now += (u8)hid->exist; -+ a2dp->exist = btinfo.lb2.a2dp; -+ b->profile_cnt.now += (u8)a2dp->exist; -+ pan->active = btinfo.lb2.pan; -+ -+ /* parse raw info low-Byte3 */ -+ btinfo.val = bt->raw_info[BTC_BTINFO_L3]; -+ if (btinfo.lb3.retry != 0) -+ cx->cnt_bt[BTC_BCNT_RETRY]++; -+ b->cqddr = btinfo.lb3.cqddr; -+ cx->cnt_bt[BTC_BCNT_INQ] += !!(btinfo.lb3.inq && !bt->inq); -+ bt->inq = btinfo.lb3.inq; -+ cx->cnt_bt[BTC_BCNT_PAGE] += !!(btinfo.lb3.pag && !bt->pag); -+ bt->pag = btinfo.lb3.pag; -+ -+ b->status.map.mesh_busy = btinfo.lb3.mesh_busy; -+ /* parse raw info high-Byte0 */ -+ btinfo.val = bt->raw_info[BTC_BTINFO_H0]; -+ /* raw val is dBm unit, translate from -100~ 0dBm to 0~100%*/ -+ b->rssi = chip->ops->btc_get_bt_rssi(rtwdev, btinfo.hb0.rssi); -+ -+ /* parse raw info high-Byte1 */ -+ btinfo.val = bt->raw_info[BTC_BTINFO_H1]; -+ b->status.map.ble_connect = btinfo.hb1.ble_connect; -+ if (btinfo.hb1.ble_connect) -+ hid->type |= (hid->exist ? BTC_HID_BLE : BTC_HID_RCU); -+ -+ cx->cnt_bt[BTC_BCNT_REINIT] += !!(btinfo.hb1.reinit && !bt->reinit); -+ bt->reinit = btinfo.hb1.reinit; -+ cx->cnt_bt[BTC_BCNT_RELINK] += !!(btinfo.hb1.relink && !b->relink.now); -+ b->relink.now = btinfo.hb1.relink; -+ cx->cnt_bt[BTC_BCNT_IGNOWL] += !!(btinfo.hb1.igno_wl && !bt->igno_wl); -+ bt->igno_wl = btinfo.hb1.igno_wl; -+ -+ if (bt->igno_wl && !cx->wl.status.map.rf_off) -+ _set_bt_ignore_wlan_act(rtwdev, false); -+ -+ hid->type |= (btinfo.hb1.voice ? BTC_HID_RCU_VOICE : 0); -+ bt->ble_scan_en = btinfo.hb1.ble_scan; -+ -+ cx->cnt_bt[BTC_BCNT_ROLESW] += !!(btinfo.hb1.role_sw && !b->role_sw); -+ b->role_sw = btinfo.hb1.role_sw; -+ -+ b->multi_link.now = btinfo.hb1.multi_link; -+ -+ /* parse raw info high-Byte2 */ -+ btinfo.val = bt->raw_info[BTC_BTINFO_H2]; -+ pan->exist = btinfo.hb2.pan_active; -+ b->profile_cnt.now += (u8)pan->exist; -+ -+ cx->cnt_bt[BTC_BCNT_AFH] += !!(btinfo.hb2.afh_update && !b->afh_update); -+ b->afh_update = btinfo.hb2.afh_update; -+ a2dp->active = btinfo.hb2.a2dp_active; -+ b->slave_role = btinfo.hb2.slave; -+ hid->slot_info = btinfo.hb2.hid_slot; -+ hid->pair_cnt = btinfo.hb2.hid_cnt; -+ hid->type |= (hid->slot_info == BTC_HID_218 ? -+ BTC_HID_218 : BTC_HID_418); -+ /* parse raw info high-Byte3 */ -+ btinfo.val = bt->raw_info[BTC_BTINFO_H3]; -+ a2dp->bitpool = btinfo.hb3.a2dp_bitpool; -+ -+ if (b->tx_3m != (u32)btinfo.hb3.tx_3m) -+ cx->cnt_bt[BTC_BCNT_RATECHG]++; -+ b->tx_3m = (u32)btinfo.hb3.tx_3m; -+ -+ a2dp->sink = btinfo.hb3.a2dp_sink; -+ -+ if (b->profile_cnt.now || b->status.map.ble_connect) -+ rtw89_btc_fw_en_rpt(rtwdev, RPT_EN_BT_AFH_MAP, 1); -+ else -+ rtw89_btc_fw_en_rpt(rtwdev, RPT_EN_BT_AFH_MAP, 0); -+ -+ if (!a2dp->exist_last && a2dp->exist) { -+ a2dp->vendor_id = 0; -+ a2dp->flush_time = 0; -+ a2dp->play_latency = 1; -+ ieee80211_queue_delayed_work(rtwdev->hw, -+ &rtwdev->coex_bt_devinfo_work, -+ RTW89_COEX_BT_DEVINFO_WORK_PERIOD); -+ } -+ -+ if (a2dp->exist && (a2dp->flush_time == 0 || a2dp->vendor_id == 0 || -+ a2dp->play_latency == 1)) -+ rtw89_btc_fw_en_rpt(rtwdev, RPT_EN_BT_DEVICE_INFO, 1); -+ else -+ rtw89_btc_fw_en_rpt(rtwdev, RPT_EN_BT_DEVICE_INFO, 0); -+ -+ _run_coex(rtwdev, BTC_RSN_UPDATE_BT_INFO); -+} -+ -+enum btc_wl_mode { -+ BTC_WL_MODE_HT = 0, -+ BTC_WL_MODE_VHT = 1, -+ BTC_WL_MODE_HE = 2, -+ BTC_WL_MODE_NUM, -+}; -+ -+void rtw89_btc_ntfy_role_info(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif, -+ struct rtw89_sta *rtwsta, enum btc_role_state state) -+{ -+ struct rtw89_hal *hal = &rtwdev->hal; -+ struct ieee80211_vif *vif = rtwvif_to_vif(rtwvif); -+ struct ieee80211_sta *sta = rtwsta_to_sta(rtwsta); -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_wl_info *wl = &btc->cx.wl; -+ struct rtw89_btc_wl_link_info r = {0}; -+ struct rtw89_btc_wl_link_info *wlinfo = NULL; -+ u8 mode = 0; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, "[BTC], state=%d\n", state); -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], role is STA=%d\n", -+ vif->type == NL80211_IFTYPE_STATION); -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, "[BTC], port=%d\n", rtwvif->port); -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, "[BTC], band=%d ch=%d bw=%d\n", -+ hal->current_band_type, hal->current_channel, -+ hal->current_band_width); -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, "[BTC], associated=%d\n", -+ state == BTC_ROLE_MSTS_STA_CONN_END); -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], bcn_period=%d dtim_period=%d\n", -+ vif->bss_conf.beacon_int, vif->bss_conf.dtim_period); -+ -+ if (rtwsta) { -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, "[BTC], STA mac_id=%d\n", -+ rtwsta->mac_id); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], STA support HE=%d VHT=%d HT=%d\n", -+ sta->he_cap.has_he, -+ sta->vht_cap.vht_supported, -+ sta->ht_cap.ht_supported); -+ if (sta->he_cap.has_he) -+ mode |= BIT(BTC_WL_MODE_HE); -+ if (sta->vht_cap.vht_supported) -+ mode |= BIT(BTC_WL_MODE_VHT); -+ if (sta->ht_cap.ht_supported) -+ mode |= BIT(BTC_WL_MODE_HT); -+ -+ r.mode = mode; -+ } -+ -+ if (rtwvif->wifi_role >= RTW89_WIFI_ROLE_MLME_MAX) -+ return; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], wifi_role=%d\n", rtwvif->wifi_role); -+ -+ r.role = rtwvif->wifi_role; -+ r.phy = rtwvif->phy_idx; -+ r.pid = rtwvif->port; -+ r.active = true; -+ r.connected = MLME_LINKED; -+ r.bcn_period = vif->bss_conf.beacon_int; -+ r.dtim_period = vif->bss_conf.dtim_period; -+ r.band = hal->current_band_type; -+ r.ch = hal->current_channel; -+ r.bw = hal->current_band_width; -+ ether_addr_copy(r.mac_addr, rtwvif->mac_addr); -+ -+ if (rtwsta && vif->type == NL80211_IFTYPE_STATION) -+ r.mac_id = rtwsta->mac_id; -+ -+ btc->dm.cnt_notify[BTC_NCNT_ROLE_INFO]++; -+ -+ wlinfo = &wl->link_info[r.pid]; -+ -+ memcpy(wlinfo, &r, sizeof(*wlinfo)); -+ _update_wl_info(rtwdev); -+ -+ if (wlinfo->role == RTW89_WIFI_ROLE_STATION && -+ wlinfo->connected == MLME_NO_LINK) -+ btc->dm.leak_ap = 0; -+ -+ if (state == BTC_ROLE_MSTS_STA_CONN_START) -+ wl->status.map.connecting = 1; -+ else -+ wl->status.map.connecting = 0; -+ -+ if (state == BTC_ROLE_MSTS_STA_DIS_CONN) -+ wl->status.map._4way = false; -+ -+ _run_coex(rtwdev, BTC_RSN_NTFY_ROLE_INFO); -+} -+ -+void rtw89_btc_ntfy_radio_state(struct rtw89_dev *rtwdev, enum btc_rfctrl rf_state) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_wl_info *wl = &btc->cx.wl; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, "[BTC], %s(): rf_state = %d\n", -+ __func__, rf_state); -+ btc->dm.cnt_notify[BTC_NCNT_RADIO_STATE]++; -+ -+ switch (rf_state) { -+ case BTC_RFCTRL_WL_OFF: -+ wl->status.map.rf_off = 1; -+ wl->status.map.lps = 0; -+ break; -+ case BTC_RFCTRL_FW_CTRL: -+ wl->status.map.rf_off = 0; -+ wl->status.map.lps = 1; -+ break; -+ case BTC_RFCTRL_WL_ON: -+ default: -+ wl->status.map.rf_off = 0; -+ wl->status.map.lps = 0; -+ break; -+ } -+ -+ if (rf_state == BTC_RFCTRL_WL_ON) { -+ rtw89_btc_fw_en_rpt(rtwdev, -+ RPT_EN_MREG | RPT_EN_BT_VER_INFO, true); -+ _write_scbd(rtwdev, BTC_WSCB_ACTIVE, true); -+ _update_bt_scbd(rtwdev, true); -+ chip->ops->btc_init_cfg(rtwdev); -+ } else { -+ rtw89_btc_fw_en_rpt(rtwdev, RPT_EN_ALL, false); -+ _write_scbd(rtwdev, BTC_WSCB_ACTIVE | BTC_WSCB_WLBUSY, false); -+ } -+ -+ _run_coex(rtwdev, BTC_RSN_NTFY_RADIO_STATE); -+ -+ wl->status.map.rf_off_pre = wl->status.map.rf_off; -+ wl->status.map.lps_pre = wl->status.map.lps; -+} -+ -+static bool _ntfy_wl_rfk(struct rtw89_dev *rtwdev, u8 phy_path, -+ enum btc_wl_rfk_type type, -+ enum btc_wl_rfk_state state) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_cx *cx = &btc->cx; -+ struct rtw89_btc_wl_info *wl = &cx->wl; -+ bool result = BTC_WRFK_REJECT; -+ -+ wl->rfk_info.type = type; -+ wl->rfk_info.path_map = FIELD_GET(BTC_RFK_PATH_MAP, phy_path); -+ wl->rfk_info.phy_map = FIELD_GET(BTC_RFK_PHY_MAP, phy_path); -+ wl->rfk_info.band = FIELD_GET(BTC_RFK_BAND_MAP, phy_path); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s()_start: phy=0x%x, path=0x%x, type=%d, state=%d\n", -+ __func__, wl->rfk_info.phy_map, wl->rfk_info.path_map, -+ type, state); -+ -+ switch (state) { -+ case BTC_WRFK_START: -+ result = _chk_wl_rfk_request(rtwdev); -+ wl->rfk_info.state = result ? BTC_WRFK_START : BTC_WRFK_STOP; -+ -+ _write_scbd(rtwdev, BTC_WSCB_WLRFK, result); -+ -+ btc->dm.cnt_notify[BTC_NCNT_WL_RFK]++; -+ break; -+ case BTC_WRFK_ONESHOT_START: -+ case BTC_WRFK_ONESHOT_STOP: -+ if (wl->rfk_info.state == BTC_WRFK_STOP) { -+ result = BTC_WRFK_REJECT; -+ } else { -+ result = BTC_WRFK_ALLOW; -+ wl->rfk_info.state = state; -+ } -+ break; -+ case BTC_WRFK_STOP: -+ result = BTC_WRFK_ALLOW; -+ wl->rfk_info.state = BTC_WRFK_STOP; -+ -+ _write_scbd(rtwdev, BTC_WSCB_WLRFK, false); -+ cancel_delayed_work(&rtwdev->coex_rfk_chk_work); -+ break; -+ default: -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s() warning state=%d\n", __func__, state); -+ break; -+ } -+ -+ if (result == BTC_WRFK_ALLOW) { -+ if (wl->rfk_info.state == BTC_WRFK_START || -+ wl->rfk_info.state == BTC_WRFK_STOP) -+ _run_coex(rtwdev, BTC_RSN_NTFY_WL_RFK); -+ -+ if (wl->rfk_info.state == BTC_WRFK_START) -+ ieee80211_queue_delayed_work(rtwdev->hw, -+ &rtwdev->coex_rfk_chk_work, -+ RTW89_COEX_RFK_CHK_WORK_PERIOD); -+ } -+ -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s()_finish: rfk_cnt=%d, result=%d\n", -+ __func__, btc->dm.cnt_notify[BTC_NCNT_WL_RFK], result); -+ -+ return result == BTC_WRFK_ALLOW; -+} -+ -+void rtw89_btc_ntfy_wl_rfk(struct rtw89_dev *rtwdev, u8 phy_map, -+ enum btc_wl_rfk_type type, -+ enum btc_wl_rfk_state state) -+{ -+ u8 band; -+ bool allow; -+ int ret; -+ -+ band = FIELD_GET(BTC_RFK_BAND_MAP, phy_map); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[RFK] RFK notify (%s / PHY%u / K_type = %u / path_idx = %lu / process = %s)\n", -+ band == RTW89_BAND_2G ? "2G" : -+ band == RTW89_BAND_5G ? "5G" : "6G", -+ !!(FIELD_GET(BTC_RFK_PHY_MAP, phy_map) & BIT(RTW89_PHY_1)), -+ type, -+ FIELD_GET(BTC_RFK_PATH_MAP, phy_map), -+ state == BTC_WRFK_STOP ? "RFK_STOP" : -+ state == BTC_WRFK_START ? "RFK_START" : -+ state == BTC_WRFK_ONESHOT_START ? "ONE-SHOT_START" : -+ "ONE-SHOT_STOP"); -+ -+ if (state != BTC_WRFK_START || rtwdev->is_bt_iqk_timeout) { -+ _ntfy_wl_rfk(rtwdev, phy_map, type, state); -+ return; -+ } -+ -+ ret = read_poll_timeout(_ntfy_wl_rfk, allow, allow, 40, 100000, false, -+ rtwdev, phy_map, type, state); -+ if (ret) { -+ rtw89_warn(rtwdev, "RFK notify timeout\n"); -+ rtwdev->is_bt_iqk_timeout = true; -+ } -+} -+ -+struct rtw89_btc_wl_sta_iter_data { -+ struct rtw89_dev *rtwdev; -+ u8 busy_all; -+ u8 dir_all; -+ u8 rssi_map_all; -+ bool is_sta_change; -+ bool is_traffic_change; -+}; -+ -+static void rtw89_btc_ntfy_wl_sta_iter(void *data, struct ieee80211_sta *sta) -+{ -+ struct rtw89_btc_wl_sta_iter_data *iter_data = -+ (struct rtw89_btc_wl_sta_iter_data *)data; -+ struct rtw89_dev *rtwdev = iter_data->rtwdev; -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_wl_info *wl = &btc->cx.wl; -+ struct rtw89_btc_wl_link_info *link_info = NULL; -+ struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; -+ struct rtw89_traffic_stats *link_info_t = NULL; -+ struct rtw89_vif *rtwvif = rtwsta->rtwvif; -+ struct rtw89_traffic_stats *stats = &rtwvif->stats; -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ u32 last_tx_rate, last_rx_rate; -+ u16 last_tx_lvl, last_rx_lvl; -+ u8 port = rtwvif->port; -+ u8 rssi; -+ u8 busy = 0; -+ u8 dir = 0; -+ u8 rssi_map = 0; -+ u8 i = 0; -+ bool is_sta_change = false, is_traffic_change = false; -+ -+ rssi = ewma_rssi_read(&rtwsta->avg_rssi) >> RSSI_FACTOR; -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, "[BTC], rssi=%d\n", rssi); -+ -+ link_info = &wl->link_info[port]; -+ link_info->stat.traffic = rtwvif->stats; -+ link_info_t = &link_info->stat.traffic; -+ -+ if (link_info->connected == MLME_NO_LINK) { -+ link_info->rx_rate_drop_cnt = 0; -+ return; -+ } -+ -+ link_info->stat.rssi = rssi; -+ for (i = 0; i < BTC_WL_RSSI_THMAX; i++) { -+ link_info->rssi_state[i] = -+ _update_rssi_state(rtwdev, -+ link_info->rssi_state[i], -+ link_info->stat.rssi, -+ chip->wl_rssi_thres[i]); -+ if (BTC_RSSI_LOW(link_info->rssi_state[i])) -+ rssi_map |= BIT(i); -+ -+ if (btc->mdinfo.ant.type == BTC_ANT_DEDICATED && -+ BTC_RSSI_CHANGE(link_info->rssi_state[i])) -+ is_sta_change = true; -+ } -+ iter_data->rssi_map_all |= rssi_map; -+ -+ last_tx_rate = link_info_t->tx_rate; -+ last_rx_rate = link_info_t->rx_rate; -+ last_tx_lvl = (u16)link_info_t->tx_tfc_lv; -+ last_rx_lvl = (u16)link_info_t->rx_tfc_lv; -+ -+ if (stats->tx_tfc_lv != RTW89_TFC_IDLE || -+ stats->rx_tfc_lv != RTW89_TFC_IDLE) -+ busy = 1; -+ -+ if (stats->tx_tfc_lv > stats->rx_tfc_lv) -+ dir = RTW89_TFC_UL; -+ else -+ dir = RTW89_TFC_DL; -+ -+ link_info = &wl->link_info[port]; -+ if (link_info->busy != busy || link_info->dir != dir) { -+ is_sta_change = true; -+ link_info->busy = busy; -+ link_info->dir = dir; -+ } -+ -+ iter_data->busy_all |= busy; -+ iter_data->dir_all |= BIT(dir); -+ -+ if (rtwsta->rx_hw_rate <= RTW89_HW_RATE_CCK2 && -+ last_rx_rate > RTW89_HW_RATE_CCK2 && -+ link_info_t->rx_tfc_lv > RTW89_TFC_IDLE) -+ link_info->rx_rate_drop_cnt++; -+ -+ if (last_tx_rate != rtwsta->ra_report.hw_rate || -+ last_rx_rate != rtwsta->rx_hw_rate || -+ last_tx_lvl != link_info_t->tx_tfc_lv || -+ last_rx_lvl != link_info_t->rx_tfc_lv) -+ is_traffic_change = true; -+ -+ link_info_t->tx_rate = rtwsta->ra_report.hw_rate; -+ link_info_t->rx_rate = rtwsta->rx_hw_rate; -+ -+ wl->role_info.active_role[port].tx_lvl = (u16)stats->tx_tfc_lv; -+ wl->role_info.active_role[port].rx_lvl = (u16)stats->rx_tfc_lv; -+ wl->role_info.active_role[port].tx_rate = rtwsta->ra_report.hw_rate; -+ wl->role_info.active_role[port].rx_rate = rtwsta->rx_hw_rate; -+ -+ if (is_sta_change) -+ iter_data->is_sta_change = true; -+ -+ if (is_traffic_change) -+ iter_data->is_traffic_change = true; -+} -+ -+#define BTC_NHM_CHK_INTVL 20 -+ -+void rtw89_btc_ntfy_wl_sta(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_wl_info *wl = &btc->cx.wl; -+ struct rtw89_btc_wl_sta_iter_data data = {.rtwdev = rtwdev}; -+ u8 i; -+ -+ ieee80211_iterate_stations_atomic(rtwdev->hw, -+ rtw89_btc_ntfy_wl_sta_iter, -+ &data); -+ -+ wl->rssi_level = 0; -+ btc->dm.cnt_notify[BTC_NCNT_WL_STA]++; -+ for (i = BTC_WL_RSSI_THMAX; i > 0; i--) { -+ /* set RSSI level 4 ~ 0 if rssi bit map match */ -+ if (data.rssi_map_all & BIT(i - 1)) { -+ wl->rssi_level = i; -+ break; -+ } -+ } -+ -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, "[BTC], %s(): busy=%d\n", -+ __func__, !!wl->status.map.busy); -+ -+ _write_scbd(rtwdev, BTC_WSCB_WLBUSY, (!!wl->status.map.busy)); -+ -+ if (data.is_traffic_change) -+ _fw_set_drv_info(rtwdev, CXDRVINFO_ROLE); -+ if (data.is_sta_change) { -+ wl->status.map.busy = data.busy_all; -+ wl->status.map.traffic_dir = data.dir_all; -+ _run_coex(rtwdev, BTC_RSN_NTFY_WL_STA); -+ } else if (btc->dm.cnt_notify[BTC_NCNT_WL_STA] >= -+ btc->dm.cnt_dm[BTC_DCNT_WL_STA_LAST] + BTC_NHM_CHK_INTVL) { -+ btc->dm.cnt_dm[BTC_DCNT_WL_STA_LAST] = -+ btc->dm.cnt_notify[BTC_NCNT_WL_STA]; -+ } else if (btc->dm.cnt_notify[BTC_NCNT_WL_STA] < -+ btc->dm.cnt_dm[BTC_DCNT_WL_STA_LAST]) { -+ btc->dm.cnt_dm[BTC_DCNT_WL_STA_LAST] = -+ btc->dm.cnt_notify[BTC_NCNT_WL_STA]; -+ } -+} -+ -+void rtw89_btc_c2h_handle(struct rtw89_dev *rtwdev, struct sk_buff *skb, -+ u32 len, u8 class, u8 func) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_btf_fwinfo *pfwinfo = &btc->fwinfo; -+ u8 *buf = &skb->data[RTW89_C2H_HEADER_LEN]; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): C2H BT len:%d class:%d fun:%d\n", -+ __func__, len, class, func); -+ -+ if (class != BTFC_FW_EVENT) -+ return; -+ -+ switch (func) { -+ case BTF_EVNT_RPT: -+ case BTF_EVNT_BUF_OVERFLOW: -+ pfwinfo->event[func]++; -+ /* Don't need rtw89_leave_ps_mode() */ -+ btc_fw_event(rtwdev, func, buf, len); -+ break; -+ case BTF_EVNT_BT_INFO: -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], handle C2H BT INFO with data %8ph\n", buf); -+ btc->cx.cnt_bt[BTC_BCNT_INFOUPDATE]++; -+ rtw89_leave_ps_mode(rtwdev); -+ _update_bt_info(rtwdev, buf, len); -+ break; -+ case BTF_EVNT_BT_SCBD: -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], handle C2H BT SCBD with data %8ph\n", buf); -+ btc->cx.cnt_bt[BTC_BCNT_SCBDUPDATE]++; -+ rtw89_leave_ps_mode(rtwdev); -+ _update_bt_scbd(rtwdev, false); -+ break; -+ case BTF_EVNT_BT_PSD: -+ break; -+ case BTF_EVNT_BT_REG: -+ btc->dbg.rb_done = true; -+ btc->dbg.rb_val = le32_to_cpu(*((__le32 *)buf)); -+ -+ break; -+ case BTF_EVNT_C2H_LOOPBACK: -+ btc->dbg.rb_done = true; -+ btc->dbg.rb_val = buf[0]; -+ break; -+ case BTF_EVNT_CX_RUNINFO: -+ btc->dm.cnt_dm[BTC_DCNT_CX_RUNINFO]++; -+ break; -+ } -+} -+ -+#define BTC_CX_FW_OFFLOAD 0 -+ -+static void _show_cx_info(struct rtw89_dev *rtwdev, struct seq_file *m) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ struct rtw89_hal *hal = &rtwdev->hal; -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_dm *dm = &btc->dm; -+ struct rtw89_btc_bt_info *bt = &btc->cx.bt; -+ struct rtw89_btc_wl_info *wl = &btc->cx.wl; -+ u32 ver_main = 0, ver_sub = 0, ver_hotfix = 0, id_branch = 0; -+ -+ if (!(dm->coex_info_map & BTC_COEX_INFO_CX)) -+ return; -+ -+ dm->cnt_notify[BTC_NCNT_SHOW_COEX_INFO]++; -+ -+ seq_printf(m, "========== [BTC COEX INFO (%d)] ==========\n", -+ chip->chip_id); -+ -+ ver_main = FIELD_GET(GENMASK(31, 24), chip->para_ver); -+ ver_sub = FIELD_GET(GENMASK(23, 16), chip->para_ver); -+ ver_hotfix = FIELD_GET(GENMASK(15, 8), chip->para_ver); -+ id_branch = FIELD_GET(GENMASK(7, 0), chip->para_ver); -+ seq_printf(m, " %-15s : Coex:%d.%d.%d(branch:%d), ", -+ "[coex_version]", ver_main, ver_sub, ver_hotfix, id_branch); -+ -+ if (dm->wl_fw_cx_offload != BTC_CX_FW_OFFLOAD) -+ dm->error.map.offload_mismatch = true; -+ else -+ dm->error.map.offload_mismatch = false; -+ -+ ver_main = FIELD_GET(GENMASK(31, 24), wl->ver_info.fw_coex); -+ ver_sub = FIELD_GET(GENMASK(23, 16), wl->ver_info.fw_coex); -+ ver_hotfix = FIELD_GET(GENMASK(15, 8), wl->ver_info.fw_coex); -+ id_branch = FIELD_GET(GENMASK(7, 0), wl->ver_info.fw_coex); -+ seq_printf(m, "WL_FW_coex:%d.%d.%d(branch:%d)", -+ ver_main, ver_sub, ver_hotfix, id_branch); -+ -+ ver_main = FIELD_GET(GENMASK(31, 24), chip->wlcx_desired); -+ ver_sub = FIELD_GET(GENMASK(23, 16), chip->wlcx_desired); -+ ver_hotfix = FIELD_GET(GENMASK(15, 8), chip->wlcx_desired); -+ seq_printf(m, "(%s, desired:%d.%d.%d), ", -+ (wl->ver_info.fw_coex >= chip->wlcx_desired ? -+ "Match" : "Mis-Match"), ver_main, ver_sub, ver_hotfix); -+ -+ seq_printf(m, "BT_FW_coex:%d(%s, desired:%d)\n", -+ bt->ver_info.fw_coex, -+ (bt->ver_info.fw_coex >= chip->btcx_desired ? -+ "Match" : "Mis-Match"), chip->btcx_desired); -+ -+ if (bt->enable.now && bt->ver_info.fw == 0) -+ rtw89_btc_fw_en_rpt(rtwdev, RPT_EN_BT_VER_INFO, true); -+ else -+ rtw89_btc_fw_en_rpt(rtwdev, RPT_EN_BT_VER_INFO, false); -+ -+ ver_main = FIELD_GET(GENMASK(31, 24), wl->ver_info.fw); -+ ver_sub = FIELD_GET(GENMASK(23, 16), wl->ver_info.fw); -+ ver_hotfix = FIELD_GET(GENMASK(15, 8), wl->ver_info.fw); -+ id_branch = FIELD_GET(GENMASK(7, 0), wl->ver_info.fw); -+ seq_printf(m, " %-15s : WL_FW:%d.%d.%d.%d, BT_FW:0x%x(%s)\n", -+ "[sub_module]", -+ ver_main, ver_sub, ver_hotfix, id_branch, -+ bt->ver_info.fw, bt->run_patch_code ? "patch" : "ROM"); -+ -+ seq_printf(m, " %-15s : cv:%x, rfe_type:0x%x, ant_iso:%d, ant_pg:%d, %s", -+ "[hw_info]", btc->mdinfo.cv, btc->mdinfo.rfe_type, -+ btc->mdinfo.ant.isolation, btc->mdinfo.ant.num, -+ (btc->mdinfo.ant.num > 1 ? "" : (btc->mdinfo.ant.single_pos ? -+ "1Ant_Pos:S1, " : "1Ant_Pos:S0, "))); -+ -+ seq_printf(m, "3rd_coex:%d, dbcc:%d, tx_num:%d, rx_num:%d\n", -+ btc->cx.other.type, rtwdev->dbcc_en, hal->tx_nss, -+ hal->rx_nss); -+} -+ -+static void _show_wl_role_info(struct rtw89_dev *rtwdev, struct seq_file *m) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_wl_link_info *plink = NULL; -+ struct rtw89_btc_wl_info *wl = &btc->cx.wl; -+ struct rtw89_btc_wl_dbcc_info *wl_dinfo = &wl->dbcc_info; -+ struct rtw89_traffic_stats *t; -+ u8 i; -+ -+ if (rtwdev->dbcc_en) { -+ seq_printf(m, -+ " %-15s : PHY0_band(op:%d/scan:%d/real:%d), ", -+ "[dbcc_info]", wl_dinfo->op_band[RTW89_PHY_0], -+ wl_dinfo->scan_band[RTW89_PHY_0], -+ wl_dinfo->real_band[RTW89_PHY_0]); -+ seq_printf(m, -+ "PHY1_band(op:%d/scan:%d/real:%d)\n", -+ wl_dinfo->op_band[RTW89_PHY_1], -+ wl_dinfo->scan_band[RTW89_PHY_1], -+ wl_dinfo->real_band[RTW89_PHY_1]); -+ } -+ -+ for (i = 0; i < RTW89_MAX_HW_PORT_NUM; i++) { -+ plink = &btc->cx.wl.link_info[i]; -+ -+ if (!plink->active) -+ continue; -+ -+ seq_printf(m, -+ " [port_%d] : role=%d(phy-%d), connect=%d(client_cnt=%d), mode=%d, center_ch=%d, bw=%d", -+ plink->pid, (u32)plink->role, plink->phy, -+ (u32)plink->connected, plink->client_cnt - 1, -+ (u32)plink->mode, plink->ch, (u32)plink->bw); -+ -+ if (plink->connected == MLME_NO_LINK) -+ continue; -+ -+ seq_printf(m, -+ ", mac_id=%d, max_tx_time=%dus, max_tx_retry=%d\n", -+ plink->mac_id, plink->tx_time, plink->tx_retry); -+ -+ seq_printf(m, -+ " [port_%d] : rssi=-%ddBm(%d), busy=%d, dir=%s, ", -+ plink->pid, 110 - plink->stat.rssi, -+ plink->stat.rssi, plink->busy, -+ plink->dir == RTW89_TFC_UL ? "UL" : "DL"); -+ -+ t = &plink->stat.traffic; -+ -+ seq_printf(m, -+ "tx[rate:%d/busy_level:%d], ", -+ (u32)t->tx_rate, t->tx_tfc_lv); -+ -+ seq_printf(m, "rx[rate:%d/busy_level:%d/drop:%d]\n", -+ (u32)t->rx_rate, -+ t->rx_tfc_lv, plink->rx_rate_drop_cnt); -+ } -+} -+ -+static void _show_wl_info(struct rtw89_dev *rtwdev, struct seq_file *m) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_cx *cx = &btc->cx; -+ struct rtw89_btc_wl_info *wl = &cx->wl; -+ struct rtw89_btc_wl_role_info *wl_rinfo = &wl->role_info; -+ -+ if (!(btc->dm.coex_info_map & BTC_COEX_INFO_WL)) -+ return; -+ -+ seq_puts(m, "========== [WL Status] ==========\n"); -+ -+ seq_printf(m, " %-15s : link_mode:%d, ", -+ "[status]", (u32)wl_rinfo->link_mode); -+ -+ seq_printf(m, -+ "rf_off:%s, power_save:%s, scan:%s(band:%d/phy_map:0x%x), ", -+ wl->status.map.rf_off ? "Y" : "N", -+ wl->status.map.lps ? "Y" : "N", -+ wl->status.map.scan ? "Y" : "N", -+ wl->scan_info.band[RTW89_PHY_0], wl->scan_info.phy_map); -+ -+ seq_printf(m, -+ "connecting:%s, roam:%s, 4way:%s, init_ok:%s\n", -+ wl->status.map.connecting ? "Y" : "N", -+ wl->status.map.roaming ? "Y" : "N", -+ wl->status.map._4way ? "Y" : "N", -+ wl->status.map.init_ok ? "Y" : "N"); -+ -+ _show_wl_role_info(rtwdev, m); -+} -+ -+enum btc_bt_a2dp_type { -+ BTC_A2DP_LEGACY = 0, -+ BTC_A2DP_TWS_SNIFF = 1, -+ BTC_A2DP_TWS_RELAY = 2, -+}; -+ -+static void _show_bt_profile_info(struct rtw89_dev *rtwdev, struct seq_file *m) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_bt_link_info *bt_linfo = &btc->cx.bt.link_info; -+ struct rtw89_btc_bt_hfp_desc hfp = bt_linfo->hfp_desc; -+ struct rtw89_btc_bt_hid_desc hid = bt_linfo->hid_desc; -+ struct rtw89_btc_bt_a2dp_desc a2dp = bt_linfo->a2dp_desc; -+ struct rtw89_btc_bt_pan_desc pan = bt_linfo->pan_desc; -+ -+ if (hfp.exist) { -+ seq_printf(m, " %-15s : type:%s, sut_pwr:%d, golden-rx:%d", -+ "[HFP]", (hfp.type == 0 ? "SCO" : "eSCO"), -+ bt_linfo->sut_pwr_level[0], -+ bt_linfo->golden_rx_shift[0]); -+ } -+ -+ if (hid.exist) { -+ seq_printf(m, -+ "\n\r %-15s : type:%s%s%s%s%s pair-cnt:%d, sut_pwr:%d, golden-rx:%d\n", -+ "[HID]", -+ hid.type & BTC_HID_218 ? "2/18," : "", -+ hid.type & BTC_HID_418 ? "4/18," : "", -+ hid.type & BTC_HID_BLE ? "BLE," : "", -+ hid.type & BTC_HID_RCU ? "RCU," : "", -+ hid.type & BTC_HID_RCU_VOICE ? "RCU-Voice," : "", -+ hid.pair_cnt, bt_linfo->sut_pwr_level[1], -+ bt_linfo->golden_rx_shift[1]); -+ } -+ -+ if (a2dp.exist) { -+ seq_printf(m, -+ " %-15s : type:%s, bit-pool:%d, flush-time:%d, ", -+ "[A2DP]", -+ a2dp.type == BTC_A2DP_LEGACY ? "Legacy" : "TWS", -+ a2dp.bitpool, a2dp.flush_time); -+ -+ seq_printf(m, -+ "vid:0x%x, Dev-name:0x%x, sut_pwr:%d, golden-rx:%d\n", -+ a2dp.vendor_id, a2dp.device_name, -+ bt_linfo->sut_pwr_level[2], -+ bt_linfo->golden_rx_shift[2]); -+ } -+ -+ if (pan.exist) { -+ seq_printf(m, " %-15s : sut_pwr:%d, golden-rx:%d\n", -+ "[PAN]", -+ bt_linfo->sut_pwr_level[3], -+ bt_linfo->golden_rx_shift[3]); -+ } -+} -+ -+static void _show_bt_info(struct rtw89_dev *rtwdev, struct seq_file *m) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_cx *cx = &btc->cx; -+ struct rtw89_btc_bt_info *bt = &cx->bt; -+ struct rtw89_btc_wl_info *wl = &cx->wl; -+ struct rtw89_btc_module *module = &btc->mdinfo; -+ struct rtw89_btc_bt_link_info *bt_linfo = &bt->link_info; -+ u8 *afh = bt_linfo->afh_map; -+ u16 polt_cnt = 0; -+ -+ if (!(btc->dm.coex_info_map & BTC_COEX_INFO_BT)) -+ return; -+ -+ seq_puts(m, "========== [BT Status] ==========\n"); -+ -+ seq_printf(m, " %-15s : enable:%s, btg:%s%s, connect:%s, ", -+ "[status]", bt->enable.now ? "Y" : "N", -+ bt->btg_type ? "Y" : "N", -+ (bt->enable.now && (bt->btg_type != module->bt_pos) ? -+ "(efuse-mismatch!!)" : ""), -+ (bt_linfo->status.map.connect ? "Y" : "N")); -+ -+ seq_printf(m, "igno_wl:%s, mailbox_avl:%s, rfk_state:0x%x\n", -+ bt->igno_wl ? "Y" : "N", -+ bt->mbx_avl ? "Y" : "N", bt->rfk_info.val); -+ -+ seq_printf(m, " %-15s : profile:%s%s%s%s%s ", -+ "[profile]", -+ (bt_linfo->profile_cnt.now == 0) ? "None," : "", -+ bt_linfo->hfp_desc.exist ? "HFP," : "", -+ bt_linfo->hid_desc.exist ? "HID," : "", -+ bt_linfo->a2dp_desc.exist ? -+ (bt_linfo->a2dp_desc.sink ? "A2DP_sink," : "A2DP,") : "", -+ bt_linfo->pan_desc.exist ? "PAN," : ""); -+ -+ seq_printf(m, -+ "multi-link:%s, role:%s, ble-connect:%s, CQDDR:%s, A2DP_active:%s, PAN_active:%s\n", -+ bt_linfo->multi_link.now ? "Y" : "N", -+ bt_linfo->slave_role ? "Slave" : "Master", -+ bt_linfo->status.map.ble_connect ? "Y" : "N", -+ bt_linfo->cqddr ? "Y" : "N", -+ bt_linfo->a2dp_desc.active ? "Y" : "N", -+ bt_linfo->pan_desc.active ? "Y" : "N"); -+ -+ seq_printf(m, -+ " %-15s : rssi:%ddBm, tx_rate:%dM, %s%s%s", -+ "[link]", bt_linfo->rssi - 100, -+ bt_linfo->tx_3m ? 3 : 2, -+ bt_linfo->status.map.inq_pag ? " inq-page!!" : "", -+ bt_linfo->status.map.acl_busy ? " acl_busy!!" : "", -+ bt_linfo->status.map.mesh_busy ? " mesh_busy!!" : ""); -+ -+ seq_printf(m, -+ "%s afh_map[%02x%02x_%02x%02x_%02x%02x_%02x%02x_%02x%02x], ", -+ bt_linfo->relink.now ? " ReLink!!" : "", -+ afh[0], afh[1], afh[2], afh[3], afh[4], -+ afh[5], afh[6], afh[7], afh[8], afh[9]); -+ -+ seq_printf(m, "wl_ch_map[en:%d/ch:%d/bw:%d]\n", -+ wl->afh_info.en, wl->afh_info.ch, wl->afh_info.bw); -+ -+ seq_printf(m, -+ " %-15s : retry:%d, relink:%d, rate_chg:%d, reinit:%d, reenable:%d, ", -+ "[stat_cnt]", cx->cnt_bt[BTC_BCNT_RETRY], -+ cx->cnt_bt[BTC_BCNT_RELINK], cx->cnt_bt[BTC_BCNT_RATECHG], -+ cx->cnt_bt[BTC_BCNT_REINIT], cx->cnt_bt[BTC_BCNT_REENABLE]); -+ -+ seq_printf(m, -+ "role-switch:%d, afh:%d, inq_page:%d(inq:%d/page:%d), igno_wl:%d\n", -+ cx->cnt_bt[BTC_BCNT_ROLESW], cx->cnt_bt[BTC_BCNT_AFH], -+ cx->cnt_bt[BTC_BCNT_INQPAG], cx->cnt_bt[BTC_BCNT_INQ], -+ cx->cnt_bt[BTC_BCNT_PAGE], cx->cnt_bt[BTC_BCNT_IGNOWL]); -+ -+ _show_bt_profile_info(rtwdev, m); -+ -+ seq_printf(m, -+ " %-15s : raw_data[%02x %02x %02x %02x %02x %02x] (type:%s/cnt:%d/same:%d)\n", -+ "[bt_info]", bt->raw_info[2], bt->raw_info[3], -+ bt->raw_info[4], bt->raw_info[5], bt->raw_info[6], -+ bt->raw_info[7], -+ bt->raw_info[0] == BTC_BTINFO_AUTO ? "auto" : "reply", -+ cx->cnt_bt[BTC_BCNT_INFOUPDATE], -+ cx->cnt_bt[BTC_BCNT_INFOSAME]); -+ -+ if (wl->status.map.lps || wl->status.map.rf_off) -+ return; -+ -+ chip->ops->btc_update_bt_cnt(rtwdev); -+ _chk_btc_err(rtwdev, BTC_DCNT_BTCNT_FREEZE, 0); -+ -+ seq_printf(m, -+ " %-15s : Hi-rx = %d, Hi-tx = %d, Lo-rx = %d, Lo-tx = %d (bt_polut_wl_tx = %d)\n", -+ "[trx_req_cnt]", cx->cnt_bt[BTC_BCNT_HIPRI_RX], -+ cx->cnt_bt[BTC_BCNT_HIPRI_TX], cx->cnt_bt[BTC_BCNT_LOPRI_RX], -+ cx->cnt_bt[BTC_BCNT_LOPRI_TX], polt_cnt); -+} -+ -+#define CASE_BTC_RSN_STR(e) case BTC_RSN_ ## e: return #e -+#define CASE_BTC_ACT_STR(e) case BTC_ACT_ ## e | BTC_ACT_EXT_BIT: return #e -+#define CASE_BTC_POLICY_STR(e) \ -+ case BTC_CXP_ ## e | BTC_POLICY_EXT_BIT: return #e -+ -+static const char *steps_to_str(u16 step) -+{ -+ switch (step) { -+ CASE_BTC_RSN_STR(NONE); -+ CASE_BTC_RSN_STR(NTFY_INIT); -+ CASE_BTC_RSN_STR(NTFY_SWBAND); -+ CASE_BTC_RSN_STR(NTFY_WL_STA); -+ CASE_BTC_RSN_STR(NTFY_RADIO_STATE); -+ CASE_BTC_RSN_STR(UPDATE_BT_SCBD); -+ CASE_BTC_RSN_STR(NTFY_WL_RFK); -+ CASE_BTC_RSN_STR(UPDATE_BT_INFO); -+ CASE_BTC_RSN_STR(NTFY_SCAN_START); -+ CASE_BTC_RSN_STR(NTFY_SCAN_FINISH); -+ CASE_BTC_RSN_STR(NTFY_SPECIFIC_PACKET); -+ CASE_BTC_RSN_STR(NTFY_POWEROFF); -+ CASE_BTC_RSN_STR(NTFY_ROLE_INFO); -+ CASE_BTC_RSN_STR(CMD_SET_COEX); -+ CASE_BTC_RSN_STR(ACT1_WORK); -+ CASE_BTC_RSN_STR(BT_DEVINFO_WORK); -+ CASE_BTC_RSN_STR(RFK_CHK_WORK); -+ -+ CASE_BTC_ACT_STR(NONE); -+ CASE_BTC_ACT_STR(WL_ONLY); -+ CASE_BTC_ACT_STR(WL_5G); -+ CASE_BTC_ACT_STR(WL_OTHER); -+ CASE_BTC_ACT_STR(WL_IDLE); -+ CASE_BTC_ACT_STR(WL_NC); -+ CASE_BTC_ACT_STR(WL_RFK); -+ CASE_BTC_ACT_STR(WL_INIT); -+ CASE_BTC_ACT_STR(WL_OFF); -+ CASE_BTC_ACT_STR(FREERUN); -+ CASE_BTC_ACT_STR(BT_WHQL); -+ CASE_BTC_ACT_STR(BT_RFK); -+ CASE_BTC_ACT_STR(BT_OFF); -+ CASE_BTC_ACT_STR(BT_IDLE); -+ CASE_BTC_ACT_STR(BT_HFP); -+ CASE_BTC_ACT_STR(BT_HID); -+ CASE_BTC_ACT_STR(BT_A2DP); -+ CASE_BTC_ACT_STR(BT_A2DPSINK); -+ CASE_BTC_ACT_STR(BT_PAN); -+ CASE_BTC_ACT_STR(BT_A2DP_HID); -+ CASE_BTC_ACT_STR(BT_A2DP_PAN); -+ CASE_BTC_ACT_STR(BT_PAN_HID); -+ CASE_BTC_ACT_STR(BT_A2DP_PAN_HID); -+ CASE_BTC_ACT_STR(WL_25G_MCC); -+ CASE_BTC_ACT_STR(WL_2G_MCC); -+ CASE_BTC_ACT_STR(WL_2G_SCC); -+ CASE_BTC_ACT_STR(WL_2G_AP); -+ CASE_BTC_ACT_STR(WL_2G_GO); -+ CASE_BTC_ACT_STR(WL_2G_GC); -+ CASE_BTC_ACT_STR(WL_2G_NAN); -+ -+ CASE_BTC_POLICY_STR(OFF_BT); -+ CASE_BTC_POLICY_STR(OFF_WL); -+ CASE_BTC_POLICY_STR(OFF_EQ0); -+ CASE_BTC_POLICY_STR(OFF_EQ1); -+ CASE_BTC_POLICY_STR(OFF_EQ2); -+ CASE_BTC_POLICY_STR(OFF_EQ3); -+ CASE_BTC_POLICY_STR(OFF_BWB0); -+ CASE_BTC_POLICY_STR(OFF_BWB1); -+ CASE_BTC_POLICY_STR(OFFB_BWB0); -+ CASE_BTC_POLICY_STR(OFFE_DEF); -+ CASE_BTC_POLICY_STR(OFFE_DEF2); -+ CASE_BTC_POLICY_STR(FIX_TD3030); -+ CASE_BTC_POLICY_STR(FIX_TD5050); -+ CASE_BTC_POLICY_STR(FIX_TD2030); -+ CASE_BTC_POLICY_STR(FIX_TD4010); -+ CASE_BTC_POLICY_STR(FIX_TD7010); -+ CASE_BTC_POLICY_STR(FIX_TD2060); -+ CASE_BTC_POLICY_STR(FIX_TD3060); -+ CASE_BTC_POLICY_STR(FIX_TD2080); -+ CASE_BTC_POLICY_STR(FIX_TDW1B1); -+ CASE_BTC_POLICY_STR(FIX_TD4020); -+ CASE_BTC_POLICY_STR(PFIX_TD3030); -+ CASE_BTC_POLICY_STR(PFIX_TD5050); -+ CASE_BTC_POLICY_STR(PFIX_TD2030); -+ CASE_BTC_POLICY_STR(PFIX_TD2060); -+ CASE_BTC_POLICY_STR(PFIX_TD3070); -+ CASE_BTC_POLICY_STR(PFIX_TD2080); -+ CASE_BTC_POLICY_STR(PFIX_TDW1B1); -+ CASE_BTC_POLICY_STR(AUTO_TD50200); -+ CASE_BTC_POLICY_STR(AUTO_TD60200); -+ CASE_BTC_POLICY_STR(AUTO_TD20200); -+ CASE_BTC_POLICY_STR(AUTO_TDW1B1); -+ CASE_BTC_POLICY_STR(PAUTO_TD50200); -+ CASE_BTC_POLICY_STR(PAUTO_TD60200); -+ CASE_BTC_POLICY_STR(PAUTO_TD20200); -+ CASE_BTC_POLICY_STR(PAUTO_TDW1B1); -+ CASE_BTC_POLICY_STR(AUTO2_TD3050); -+ CASE_BTC_POLICY_STR(AUTO2_TD3070); -+ CASE_BTC_POLICY_STR(AUTO2_TD5050); -+ CASE_BTC_POLICY_STR(AUTO2_TD6060); -+ CASE_BTC_POLICY_STR(AUTO2_TD2080); -+ CASE_BTC_POLICY_STR(AUTO2_TDW1B4); -+ CASE_BTC_POLICY_STR(PAUTO2_TD3050); -+ CASE_BTC_POLICY_STR(PAUTO2_TD3070); -+ CASE_BTC_POLICY_STR(PAUTO2_TD5050); -+ CASE_BTC_POLICY_STR(PAUTO2_TD6060); -+ CASE_BTC_POLICY_STR(PAUTO2_TD2080); -+ CASE_BTC_POLICY_STR(PAUTO2_TDW1B4); -+ default: -+ return "unknown step"; -+ } -+} -+ -+static -+void seq_print_segment(struct seq_file *m, const char *prefix, u16 *data, -+ u8 len, u8 seg_len, u8 start_idx, u8 ring_len) -+{ -+ u8 i; -+ u8 cur_index; -+ -+ for (i = 0; i < len ; i++) { -+ if ((i % seg_len) == 0) -+ seq_printf(m, " %-15s : ", prefix); -+ cur_index = (start_idx + i) % ring_len; -+ if (i % 3 == 0) -+ seq_printf(m, "-> %-20s", -+ steps_to_str(*(data + cur_index))); -+ else if (i % 3 == 1) -+ seq_printf(m, "-> %-15s", -+ steps_to_str(*(data + cur_index))); -+ else -+ seq_printf(m, "-> %-13s", -+ steps_to_str(*(data + cur_index))); -+ if (i == (len - 1) || (i % seg_len) == (seg_len - 1)) -+ seq_puts(m, "\n"); -+ } -+} -+ -+static void _show_dm_step(struct rtw89_dev *rtwdev, struct seq_file *m) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_dm *dm = &btc->dm; -+ u8 start_idx; -+ u8 len; -+ -+ len = dm->dm_step.step_ov ? RTW89_BTC_DM_MAXSTEP : dm->dm_step.step_pos; -+ start_idx = dm->dm_step.step_ov ? dm->dm_step.step_pos : 0; -+ -+ seq_print_segment(m, "[dm_steps]", dm->dm_step.step, len, 6, start_idx, -+ ARRAY_SIZE(dm->dm_step.step)); -+} -+ -+static void _show_dm_info(struct rtw89_dev *rtwdev, struct seq_file *m) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_module *module = &btc->mdinfo; -+ struct rtw89_btc_dm *dm = &btc->dm; -+ struct rtw89_btc_wl_info *wl = &btc->cx.wl; -+ struct rtw89_btc_bt_info *bt = &btc->cx.bt; -+ -+ if (!(dm->coex_info_map & BTC_COEX_INFO_DM)) -+ return; -+ -+ seq_printf(m, "========== [Mechanism Status %s] ==========\n", -+ (btc->ctrl.manual ? "(Manual)" : "(Auto)")); -+ -+ seq_printf(m, -+ " %-15s : type:%s, reason:%s(), action:%s(), ant_path:%ld, run_cnt:%d\n", -+ "[status]", -+ module->ant.type == BTC_ANT_SHARED ? "shared" : "dedicated", -+ steps_to_str(dm->run_reason), -+ steps_to_str(dm->run_action | BTC_ACT_EXT_BIT), -+ FIELD_GET(GENMASK(7, 0), dm->set_ant_path), -+ dm->cnt_dm[BTC_DCNT_RUN]); -+ -+ _show_dm_step(rtwdev, m); -+ -+ seq_printf(m, " %-15s : wl_only:%d, bt_only:%d, igno_bt:%d, free_run:%d, wl_ps_ctrl:%d, wl_mimo_ps:%d, ", -+ "[dm_flag]", dm->wl_only, dm->bt_only, btc->ctrl.igno_bt, -+ dm->freerun, btc->lps, dm->wl_mimo_ps); -+ -+ seq_printf(m, "leak_ap:%d, fw_offload:%s%s\n", dm->leak_ap, -+ (BTC_CX_FW_OFFLOAD ? "Y" : "N"), -+ (dm->wl_fw_cx_offload == BTC_CX_FW_OFFLOAD ? -+ "" : "(Mis-Match!!)")); -+ -+ if (dm->rf_trx_para.wl_tx_power == 0xff) -+ seq_printf(m, -+ " %-15s : wl_rssi_lvl:%d, para_lvl:%d, wl_tx_pwr:orig, ", -+ "[trx_ctrl]", wl->rssi_level, dm->trx_para_level); -+ -+ else -+ seq_printf(m, -+ " %-15s : wl_rssi_lvl:%d, para_lvl:%d, wl_tx_pwr:%d, ", -+ "[trx_ctrl]", wl->rssi_level, dm->trx_para_level, -+ dm->rf_trx_para.wl_tx_power); -+ -+ seq_printf(m, -+ "wl_rx_lvl:%d, bt_tx_pwr_dec:%d, bt_rx_lna:%d(%s-tbl), wl_btg_rx:%d\n", -+ dm->rf_trx_para.wl_rx_gain, dm->rf_trx_para.bt_tx_power, -+ dm->rf_trx_para.bt_rx_gain, -+ (bt->hi_lna_rx ? "Hi" : "Ori"), dm->wl_btg_rx); -+ -+ seq_printf(m, -+ " %-15s : wl_tx_limit[en:%d/max_t:%dus/max_retry:%d], bt_slot_reg:%d-TU\n", -+ "[dm_ctrl]", dm->wl_tx_limit.enable, dm->wl_tx_limit.tx_time, -+ dm->wl_tx_limit.tx_retry, btc->bt_req_len); -+} -+ -+static void _show_error(struct rtw89_dev *rtwdev, struct seq_file *m) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_btf_fwinfo *pfwinfo = &btc->fwinfo; -+ struct rtw89_btc_fbtc_cysta *pcysta = NULL; -+ -+ pcysta = &pfwinfo->rpt_fbtc_cysta.finfo; -+ -+ if (pfwinfo->event[BTF_EVNT_BUF_OVERFLOW] == 0 && -+ pcysta->except_cnt == 0 && -+ !pfwinfo->len_mismch && !pfwinfo->fver_mismch) -+ return; -+ -+ seq_printf(m, " %-15s : ", "[error]"); -+ -+ if (pfwinfo->event[BTF_EVNT_BUF_OVERFLOW]) { -+ seq_printf(m, -+ "overflow-cnt: %d, ", -+ pfwinfo->event[BTF_EVNT_BUF_OVERFLOW]); -+ } -+ -+ if (pfwinfo->len_mismch) { -+ seq_printf(m, -+ "len-mismatch: 0x%x, ", -+ pfwinfo->len_mismch); -+ } -+ -+ if (pfwinfo->fver_mismch) { -+ seq_printf(m, -+ "fver-mismatch: 0x%x, ", -+ pfwinfo->fver_mismch); -+ } -+ -+ /* cycle statistics exceptions */ -+ if (pcysta->exception || pcysta->except_cnt) { -+ seq_printf(m, -+ "exception-type: 0x%x, exception-cnt = %d", -+ pcysta->exception, pcysta->except_cnt); -+ } -+ seq_puts(m, "\n"); -+} -+ -+static void _show_fbtc_tdma(struct rtw89_dev *rtwdev, struct seq_file *m) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_btf_fwinfo *pfwinfo = &btc->fwinfo; -+ struct rtw89_btc_rpt_cmn_info *pcinfo = NULL; -+ struct rtw89_btc_fbtc_tdma *t = NULL; -+ struct rtw89_btc_fbtc_slot *s = NULL; -+ struct rtw89_btc_dm *dm = &btc->dm; -+ u8 i, cnt = 0; -+ -+ pcinfo = &pfwinfo->rpt_fbtc_tdma.cinfo; -+ if (!pcinfo->valid) -+ return; -+ -+ t = &pfwinfo->rpt_fbtc_tdma.finfo; -+ -+ seq_printf(m, -+ " %-15s : ", "[tdma_policy]"); -+ seq_printf(m, -+ "type:%d, rx_flow_ctrl:%d, tx_pause:%d, ", -+ (u32)t->type, -+ t->rxflctrl, t->txpause); -+ -+ seq_printf(m, -+ "wl_toggle_n:%d, leak_n:%d, ext_ctrl:%d, ", -+ t->wtgle_n, t->leak_n, t->ext_ctrl); -+ -+ seq_printf(m, -+ "policy_type:%d", -+ (u32)btc->policy_type); -+ -+ s = pfwinfo->rpt_fbtc_slots.finfo.slot; -+ -+ for (i = 0; i < CXST_MAX; i++) { -+ if (dm->update_slot_map == BIT(CXST_MAX) - 1) -+ break; -+ -+ if (!(dm->update_slot_map & BIT(i))) -+ continue; -+ -+ if (cnt % 6 == 0) -+ seq_printf(m, -+ " %-15s : %d[%d/0x%x/%d]", -+ "[slot_policy]", -+ (u32)i, -+ s[i].dur, s[i].cxtbl, s[i].cxtype); -+ else -+ seq_printf(m, -+ ", %d[%d/0x%x/%d]", -+ (u32)i, -+ s[i].dur, s[i].cxtbl, s[i].cxtype); -+ if (cnt % 6 == 5) -+ seq_puts(m, "\n"); -+ cnt++; -+ } -+ seq_puts(m, "\n"); -+} -+ -+static void _show_fbtc_slots(struct rtw89_dev *rtwdev, struct seq_file *m) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_btf_fwinfo *pfwinfo = &btc->fwinfo; -+ struct rtw89_btc_rpt_cmn_info *pcinfo = NULL; -+ struct rtw89_btc_fbtc_slots *pslots = NULL; -+ struct rtw89_btc_fbtc_slot s; -+ u8 i = 0; -+ -+ pcinfo = &pfwinfo->rpt_fbtc_slots.cinfo; -+ if (!pcinfo->valid) -+ return; -+ -+ pslots = &pfwinfo->rpt_fbtc_slots.finfo; -+ -+ for (i = 0; i < CXST_MAX; i++) { -+ s = pslots->slot[i]; -+ if (i % 6 == 0) -+ seq_printf(m, -+ " %-15s : %02d[%03d/0x%x/%d]", -+ "[slot_list]", -+ (u32)i, -+ s.dur, s.cxtbl, s.cxtype); -+ else -+ seq_printf(m, -+ ", %02d[%03d/0x%x/%d]", -+ (u32)i, -+ s.dur, s.cxtbl, s.cxtype); -+ if (i % 6 == 5) -+ seq_puts(m, "\n"); -+ } -+} -+ -+static void _show_fbtc_cysta(struct rtw89_dev *rtwdev, struct seq_file *m) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_btf_fwinfo *pfwinfo = &btc->fwinfo; -+ struct rtw89_btc_dm *dm = &btc->dm; -+ struct rtw89_btc_bt_a2dp_desc *a2dp = &btc->cx.bt.link_info.a2dp_desc; -+ struct rtw89_btc_rpt_cmn_info *pcinfo = NULL; -+ struct rtw89_btc_fbtc_cysta *pcysta_le32 = NULL; -+ struct rtw89_btc_fbtc_cysta_cpu pcysta[1]; -+ union rtw89_btc_fbtc_rxflct r; -+ u8 i, cnt = 0, slot_pair; -+ u16 cycle, c_begin, c_end, store_index; -+ -+ pcinfo = &pfwinfo->rpt_fbtc_cysta.cinfo; -+ if (!pcinfo->valid) -+ return; -+ -+ pcysta_le32 = &pfwinfo->rpt_fbtc_cysta.finfo; -+ rtw89_btc_fbtc_cysta_to_cpu(pcysta_le32, pcysta); -+ seq_printf(m, -+ " %-15s : cycle:%d, bcn[all:%d/all_ok:%d/bt:%d/bt_ok:%d]", -+ "[cycle_cnt]", pcysta->cycles, pcysta->bcn_cnt[CXBCN_ALL], -+ pcysta->bcn_cnt[CXBCN_ALL_OK], -+ pcysta->bcn_cnt[CXBCN_BT_SLOT], -+ pcysta->bcn_cnt[CXBCN_BT_OK]); -+ -+ _chk_btc_err(rtwdev, BTC_DCNT_CYCLE_FREEZE, (u32)pcysta->cycles); -+ -+ for (i = 0; i < CXST_MAX; i++) { -+ if (!pcysta->slot_cnt[i]) -+ continue; -+ seq_printf(m, -+ ", %d:%d", (u32)i, pcysta->slot_cnt[i]); -+ } -+ -+ if (dm->tdma_now.rxflctrl) { -+ seq_printf(m, -+ ", leak_rx:%d", pcysta->leakrx_cnt); -+ } -+ -+ if (pcysta->collision_cnt) { -+ seq_printf(m, -+ ", collision:%d", pcysta->collision_cnt); -+ } -+ -+ if (pcysta->skip_cnt) { -+ seq_printf(m, -+ ", skip:%d", pcysta->skip_cnt); -+ } -+ seq_puts(m, "\n"); -+ -+ _chk_btc_err(rtwdev, BTC_DCNT_W1_FREEZE, pcysta->slot_cnt[CXST_W1]); -+ _chk_btc_err(rtwdev, BTC_DCNT_B1_FREEZE, pcysta->slot_cnt[CXST_B1]); -+ -+ seq_printf(m, " %-15s : avg_t[wl:%d/bt:%d/lk:%d.%03d]", -+ "[cycle_time]", -+ pcysta->tavg_cycle[CXT_WL], -+ pcysta->tavg_cycle[CXT_BT], -+ pcysta->tavg_lk / 1000, pcysta->tavg_lk % 1000); -+ seq_printf(m, -+ ", max_t[wl:%d/bt:%d/lk:%d.%03d]", -+ pcysta->tmax_cycle[CXT_WL], -+ pcysta->tmax_cycle[CXT_BT], -+ pcysta->tmax_lk / 1000, pcysta->tmax_lk % 1000); -+ seq_printf(m, -+ ", maxdiff_t[wl:%d/bt:%d]\n", -+ pcysta->tmaxdiff_cycle[CXT_WL], -+ pcysta->tmaxdiff_cycle[CXT_BT]); -+ -+ if (pcysta->cycles == 0) -+ return; -+ -+ /* 1 cycle record 1 wl-slot and 1 bt-slot */ -+ slot_pair = BTC_CYCLE_SLOT_MAX / 2; -+ -+ if (pcysta->cycles <= slot_pair) -+ c_begin = 1; -+ else -+ c_begin = pcysta->cycles - slot_pair + 1; -+ -+ c_end = pcysta->cycles; -+ -+ for (cycle = c_begin; cycle <= c_end; cycle++) { -+ cnt++; -+ store_index = ((cycle - 1) % slot_pair) * 2; -+ -+ if (cnt % (BTC_CYCLE_SLOT_MAX / 4) == 1) -+ seq_printf(m, -+ " %-15s : ->b%02d->w%02d", "[cycle_step]", -+ pcysta->tslot_cycle[store_index], -+ pcysta->tslot_cycle[store_index + 1]); -+ else -+ seq_printf(m, -+ "->b%02d->w%02d", -+ pcysta->tslot_cycle[store_index], -+ pcysta->tslot_cycle[store_index + 1]); -+ if (cnt % (BTC_CYCLE_SLOT_MAX / 4) == 0 || cnt == c_end) -+ seq_puts(m, "\n"); -+ } -+ -+ if (a2dp->exist) { -+ seq_printf(m, -+ " %-15s : a2dp_ept:%d, a2dp_late:%d", -+ "[a2dp_t_sta]", -+ pcysta->a2dpept, pcysta->a2dpeptto); -+ -+ seq_printf(m, -+ ", avg_t:%d, max_t:%d", -+ pcysta->tavg_a2dpept, pcysta->tmax_a2dpept); -+ r.val = dm->tdma_now.rxflctrl; -+ -+ if (r.type && r.tgln_n) { -+ seq_printf(m, -+ ", cycle[PSTDMA:%d/TDMA:%d], ", -+ pcysta->cycles_a2dp[CXT_FLCTRL_ON], -+ pcysta->cycles_a2dp[CXT_FLCTRL_OFF]); -+ -+ seq_printf(m, -+ "avg_t[PSTDMA:%d/TDMA:%d], ", -+ pcysta->tavg_a2dp[CXT_FLCTRL_ON], -+ pcysta->tavg_a2dp[CXT_FLCTRL_OFF]); -+ -+ seq_printf(m, -+ "max_t[PSTDMA:%d/TDMA:%d]", -+ pcysta->tmax_a2dp[CXT_FLCTRL_ON], -+ pcysta->tmax_a2dp[CXT_FLCTRL_OFF]); -+ } -+ seq_puts(m, "\n"); -+ } -+} -+ -+static void _show_fbtc_nullsta(struct rtw89_dev *rtwdev, struct seq_file *m) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_btf_fwinfo *pfwinfo = &btc->fwinfo; -+ struct rtw89_btc_rpt_cmn_info *pcinfo = NULL; -+ struct rtw89_btc_fbtc_cynullsta *ns = NULL; -+ u8 i = 0; -+ -+ if (!btc->dm.tdma_now.rxflctrl) -+ return; -+ -+ pcinfo = &pfwinfo->rpt_fbtc_nullsta.cinfo; -+ if (!pcinfo->valid) -+ return; -+ -+ ns = &pfwinfo->rpt_fbtc_nullsta.finfo; -+ -+ seq_printf(m, " %-15s : ", "[null_sta]"); -+ -+ for (i = 0; i < 2; i++) { -+ if (i != 0) -+ seq_printf(m, ", null-%d", i); -+ else -+ seq_printf(m, "null-%d", i); -+ seq_printf(m, "[ok:%d/", le32_to_cpu(ns->result[i][1])); -+ seq_printf(m, "fail:%d/", le32_to_cpu(ns->result[i][0])); -+ seq_printf(m, "on_time:%d/", le32_to_cpu(ns->result[i][2])); -+ seq_printf(m, "retry:%d/", le32_to_cpu(ns->result[i][3])); -+ seq_printf(m, "avg_t:%d.%03d/", -+ le32_to_cpu(ns->avg_t[i]) / 1000, -+ le32_to_cpu(ns->avg_t[i]) % 1000); -+ seq_printf(m, "max_t:%d.%03d]", -+ le32_to_cpu(ns->max_t[i]) / 1000, -+ le32_to_cpu(ns->max_t[i]) % 1000); -+ } -+ seq_puts(m, "\n"); -+} -+ -+static void _show_fbtc_step(struct rtw89_dev *rtwdev, struct seq_file *m) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_btf_fwinfo *pfwinfo = &btc->fwinfo; -+ struct rtw89_btc_rpt_cmn_info *pcinfo = NULL; -+ struct rtw89_btc_fbtc_steps *pstep = NULL; -+ u8 type, val, cnt = 0, state = 0; -+ bool outloop = false; -+ u16 i, diff_t, n_start = 0, n_stop = 0; -+ u16 pos_old, pos_new; -+ -+ pcinfo = &pfwinfo->rpt_fbtc_step.cinfo; -+ if (!pcinfo->valid) -+ return; -+ -+ pstep = &pfwinfo->rpt_fbtc_step.finfo; -+ pos_old = le16_to_cpu(pstep->pos_old); -+ pos_new = le16_to_cpu(pstep->pos_new); -+ -+ if (pcinfo->req_fver != pstep->fver) -+ return; -+ -+ /* store step info by using ring instead of FIFO*/ -+ do { -+ switch (state) { -+ case 0: -+ n_start = pos_old; -+ if (pos_new >= pos_old) -+ n_stop = pos_new; -+ else -+ n_stop = btc->ctrl.trace_step - 1; -+ -+ state = 1; -+ break; -+ case 1: -+ for (i = n_start; i <= n_stop; i++) { -+ type = pstep->step[i].type; -+ val = pstep->step[i].val; -+ diff_t = le16_to_cpu(pstep->step[i].difft); -+ -+ if (type == CXSTEP_NONE || type >= CXSTEP_MAX) -+ continue; -+ -+ if (cnt % 10 == 0) -+ seq_printf(m, " %-15s : ", "[steps]"); -+ -+ seq_printf(m, "-> %s(%02d)(%02d)", -+ (type == CXSTEP_SLOT ? "SLT" : -+ "EVT"), (u32)val, diff_t); -+ if (cnt % 10 == 9) -+ seq_puts(m, "\n"); -+ cnt++; -+ } -+ -+ state = 2; -+ break; -+ case 2: -+ if (pos_new < pos_old && n_start != 0) { -+ n_start = 0; -+ n_stop = pos_new; -+ state = 1; -+ } else { -+ outloop = true; -+ } -+ break; -+ } -+ } while (!outloop); -+} -+ -+static void _show_fw_dm_msg(struct rtw89_dev *rtwdev, struct seq_file *m) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ -+ if (!(btc->dm.coex_info_map & BTC_COEX_INFO_DM)) -+ return; -+ -+ _show_error(rtwdev, m); -+ _show_fbtc_tdma(rtwdev, m); -+ _show_fbtc_slots(rtwdev, m); -+ _show_fbtc_cysta(rtwdev, m); -+ _show_fbtc_nullsta(rtwdev, m); -+ _show_fbtc_step(rtwdev, m); -+} -+ -+static void _show_mreg(struct rtw89_dev *rtwdev, struct seq_file *m) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_btf_fwinfo *pfwinfo = &btc->fwinfo; -+ struct rtw89_btc_rpt_cmn_info *pcinfo = NULL; -+ struct rtw89_btc_fbtc_mreg_val *pmreg = NULL; -+ struct rtw89_btc_fbtc_gpio_dbg *gdbg = NULL; -+ struct rtw89_btc_cx *cx = &btc->cx; -+ struct rtw89_btc_wl_info *wl = &btc->cx.wl; -+ struct rtw89_btc_bt_info *bt = &btc->cx.bt; -+ struct rtw89_mac_ax_gnt gnt[2] = {0}; -+ u8 i = 0, type = 0, cnt = 0; -+ u32 val, offset; -+ -+ if (!(btc->dm.coex_info_map & BTC_COEX_INFO_MREG)) -+ return; -+ -+ seq_puts(m, "========== [HW Status] ==========\n"); -+ -+ seq_printf(m, -+ " %-15s : WL->BT:0x%08x(cnt:%d), BT->WL:0x%08x(total:%d, bt_update:%d)\n", -+ "[scoreboard]", wl->scbd, cx->cnt_wl[BTC_WCNT_SCBDUPDATE], -+ bt->scbd, cx->cnt_bt[BTC_BCNT_SCBDREAD], -+ cx->cnt_bt[BTC_BCNT_SCBDUPDATE]); -+ -+ /* To avoid I/O if WL LPS or power-off */ -+ if (!wl->status.map.lps && !wl->status.map.rf_off) { -+ rtw89_mac_read_lte(rtwdev, R_AX_LTE_SW_CFG_1, &val); -+ if (val & (B_AX_GNT_BT_RFC_S0_SW_VAL | -+ B_AX_GNT_BT_BB_S0_SW_VAL)) -+ gnt[0].gnt_bt = true; -+ if (val & (B_AX_GNT_BT_RFC_S0_SW_CTRL | -+ B_AX_GNT_BT_BB_S0_SW_CTRL)) -+ gnt[0].gnt_bt_sw_en = true; -+ if (val & (B_AX_GNT_WL_RFC_S0_SW_VAL | -+ B_AX_GNT_WL_BB_S0_SW_VAL)) -+ gnt[0].gnt_wl = true; -+ if (val & (B_AX_GNT_WL_RFC_S0_SW_CTRL | -+ B_AX_GNT_WL_BB_S0_SW_CTRL)) -+ gnt[0].gnt_wl_sw_en = true; -+ -+ if (val & (B_AX_GNT_BT_RFC_S1_SW_VAL | -+ B_AX_GNT_BT_BB_S1_SW_VAL)) -+ gnt[1].gnt_bt = true; -+ if (val & (B_AX_GNT_BT_RFC_S1_SW_CTRL | -+ B_AX_GNT_BT_BB_S1_SW_CTRL)) -+ gnt[1].gnt_bt_sw_en = true; -+ if (val & (B_AX_GNT_WL_RFC_S1_SW_VAL | -+ B_AX_GNT_WL_BB_S1_SW_VAL)) -+ gnt[1].gnt_wl = true; -+ if (val & (B_AX_GNT_WL_RFC_S1_SW_CTRL | -+ B_AX_GNT_WL_BB_S1_SW_CTRL)) -+ gnt[1].gnt_wl_sw_en = true; -+ -+ seq_printf(m, -+ " %-15s : pta_owner:%s, phy-0[gnt_wl:%s-%d/gnt_bt:%s-%d], ", -+ "[gnt_status]", -+ (rtw89_mac_get_ctrl_path(rtwdev) ? "WL" : "BT"), -+ (gnt[0].gnt_wl_sw_en ? "SW" : "HW"), gnt[0].gnt_wl, -+ (gnt[0].gnt_bt_sw_en ? "SW" : "HW"), gnt[0].gnt_bt); -+ -+ seq_printf(m, "phy-1[gnt_wl:%s-%d/gnt_bt:%s-%d]\n", -+ (gnt[1].gnt_wl_sw_en ? "SW" : "HW"), gnt[1].gnt_wl, -+ (gnt[1].gnt_bt_sw_en ? "SW" : "HW"), gnt[1].gnt_bt); -+ } -+ -+ pcinfo = &pfwinfo->rpt_fbtc_mregval.cinfo; -+ if (!pcinfo->valid) { -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): stop due rpt_fbtc_mregval.cinfo\n", -+ __func__); -+ return; -+ } -+ -+ pmreg = &pfwinfo->rpt_fbtc_mregval.finfo; -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): rpt_fbtc_mregval reg_num = %d\n", -+ __func__, pmreg->reg_num); -+ -+ for (i = 0; i < pmreg->reg_num; i++) { -+ type = (u8)le16_to_cpu(chip->mon_reg[i].type); -+ offset = le32_to_cpu(chip->mon_reg[i].offset); -+ val = le32_to_cpu(pmreg->mreg_val[i]); -+ -+ if (cnt % 6 == 0) -+ seq_printf(m, " %-15s : %d_0x%04x=0x%08x", -+ "[reg]", (u32)type, offset, val); -+ else -+ seq_printf(m, ", %d_0x%04x=0x%08x", (u32)type, -+ offset, val); -+ if (cnt % 6 == 5) -+ seq_puts(m, "\n"); -+ cnt++; -+ } -+ -+ pcinfo = &pfwinfo->rpt_fbtc_gpio_dbg.cinfo; -+ if (!pcinfo->valid) { -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): stop due rpt_fbtc_gpio_dbg.cinfo\n", -+ __func__); -+ return; -+ } -+ -+ gdbg = &pfwinfo->rpt_fbtc_gpio_dbg.finfo; -+ if (!gdbg->en_map) -+ return; -+ -+ seq_printf(m, " %-15s : enable_map:0x%08x", -+ "[gpio_dbg]", gdbg->en_map); -+ -+ for (i = 0; i < BTC_DBG_MAX1; i++) { -+ if (!(gdbg->en_map & BIT(i))) -+ continue; -+ seq_printf(m, ", %d->GPIO%d", (u32)i, gdbg->gpio_map[i]); -+ } -+ seq_puts(m, "\n"); -+} -+ -+static void _show_summary(struct rtw89_dev *rtwdev, struct seq_file *m) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_btf_fwinfo *pfwinfo = &btc->fwinfo; -+ struct rtw89_btc_rpt_cmn_info *pcinfo = NULL; -+ struct rtw89_btc_fbtc_rpt_ctrl *prptctrl = NULL; -+ struct rtw89_btc_cx *cx = &btc->cx; -+ struct rtw89_btc_dm *dm = &btc->dm; -+ struct rtw89_btc_wl_info *wl = &cx->wl; -+ struct rtw89_btc_bt_info *bt = &cx->bt; -+ u32 cnt_sum = 0, *cnt = btc->dm.cnt_notify; -+ u8 i; -+ -+ if (!(dm->coex_info_map & BTC_COEX_INFO_SUMMARY)) -+ return; -+ -+ seq_puts(m, "========== [Statistics] ==========\n"); -+ -+ pcinfo = &pfwinfo->rpt_ctrl.cinfo; -+ if (pcinfo->valid && !wl->status.map.lps && !wl->status.map.rf_off) { -+ prptctrl = &pfwinfo->rpt_ctrl.finfo; -+ -+ seq_printf(m, -+ " %-15s : h2c_cnt=%d(fail:%d, fw_recv:%d), c2h_cnt=%d(fw_send:%d), ", -+ "[summary]", pfwinfo->cnt_h2c, -+ pfwinfo->cnt_h2c_fail, prptctrl->h2c_cnt, -+ pfwinfo->cnt_c2h, prptctrl->c2h_cnt); -+ -+ seq_printf(m, -+ "rpt_cnt=%d(fw_send:%d), rpt_map=0x%x, dm_error_map:0x%x", -+ pfwinfo->event[BTF_EVNT_RPT], prptctrl->rpt_cnt, -+ prptctrl->rpt_enable, dm->error.val); -+ -+ _chk_btc_err(rtwdev, BTC_DCNT_RPT_FREEZE, -+ pfwinfo->event[BTF_EVNT_RPT]); -+ -+ if (dm->error.map.wl_fw_hang) -+ seq_puts(m, " (WL FW Hang!!)"); -+ seq_puts(m, "\n"); -+ seq_printf(m, -+ " %-15s : send_ok:%d, send_fail:%d, recv:%d", -+ "[mailbox]", prptctrl->mb_send_ok_cnt, -+ prptctrl->mb_send_fail_cnt, prptctrl->mb_recv_cnt); -+ -+ seq_printf(m, -+ "(A2DP_empty:%d, A2DP_flowstop:%d, A2DP_full:%d)\n", -+ prptctrl->mb_a2dp_empty_cnt, -+ prptctrl->mb_a2dp_flct_cnt, -+ prptctrl->mb_a2dp_full_cnt); -+ -+ seq_printf(m, -+ " %-15s : wl_rfk[req:%d/go:%d/reject:%d/timeout:%d]", -+ "[RFK]", cx->cnt_wl[BTC_WCNT_RFK_REQ], -+ cx->cnt_wl[BTC_WCNT_RFK_GO], -+ cx->cnt_wl[BTC_WCNT_RFK_REJECT], -+ cx->cnt_wl[BTC_WCNT_RFK_TIMEOUT]); -+ -+ seq_printf(m, -+ ", bt_rfk[req:%d/go:%d/reject:%d/timeout:%d/fail:%d]\n", -+ prptctrl->bt_rfk_cnt[BTC_BCNT_RFK_REQ], -+ prptctrl->bt_rfk_cnt[BTC_BCNT_RFK_GO], -+ prptctrl->bt_rfk_cnt[BTC_BCNT_RFK_REJECT], -+ prptctrl->bt_rfk_cnt[BTC_BCNT_RFK_TIMEOUT], -+ prptctrl->bt_rfk_cnt[BTC_BCNT_RFK_FAIL]); -+ -+ if (prptctrl->bt_rfk_cnt[BTC_BCNT_RFK_TIMEOUT] > 0) -+ bt->rfk_info.map.timeout = 1; -+ else -+ bt->rfk_info.map.timeout = 0; -+ -+ dm->error.map.wl_rfk_timeout = bt->rfk_info.map.timeout; -+ } else { -+ seq_printf(m, -+ " %-15s : h2c_cnt=%d(fail:%d), c2h_cnt=%d, rpt_cnt=%d, rpt_map=0x%x", -+ "[summary]", pfwinfo->cnt_h2c, -+ pfwinfo->cnt_h2c_fail, pfwinfo->cnt_c2h, -+ pfwinfo->event[BTF_EVNT_RPT], -+ btc->fwinfo.rpt_en_map); -+ seq_puts(m, " (WL FW report invalid!!)\n"); -+ } -+ -+ for (i = 0; i < BTC_NCNT_NUM; i++) -+ cnt_sum += dm->cnt_notify[i]; -+ -+ seq_printf(m, -+ " %-15s : total=%d, show_coex_info=%d, power_on=%d, init_coex=%d, ", -+ "[notify_cnt]", cnt_sum, cnt[BTC_NCNT_SHOW_COEX_INFO], -+ cnt[BTC_NCNT_POWER_ON], cnt[BTC_NCNT_INIT_COEX]); -+ -+ seq_printf(m, -+ "power_off=%d, radio_state=%d, role_info=%d, wl_rfk=%d, wl_sta=%d\n", -+ cnt[BTC_NCNT_POWER_OFF], cnt[BTC_NCNT_RADIO_STATE], -+ cnt[BTC_NCNT_ROLE_INFO], cnt[BTC_NCNT_WL_RFK], -+ cnt[BTC_NCNT_WL_STA]); -+ -+ seq_printf(m, -+ " %-15s : scan_start=%d, scan_finish=%d, switch_band=%d, special_pkt=%d, ", -+ "[notify_cnt]", cnt[BTC_NCNT_SCAN_START], -+ cnt[BTC_NCNT_SCAN_FINISH], cnt[BTC_NCNT_SWITCH_BAND], -+ cnt[BTC_NCNT_SPECIAL_PACKET]); -+ -+ seq_printf(m, -+ "timer=%d, control=%d, customerize=%d\n", -+ cnt[BTC_NCNT_TIMER], cnt[BTC_NCNT_CONTROL], -+ cnt[BTC_NCNT_CUSTOMERIZE]); -+} -+ -+void rtw89_btc_dump_info(struct rtw89_dev *rtwdev, struct seq_file *m) -+{ -+ struct rtw89_fw_suit *fw_suit = &rtwdev->fw.normal; -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_cx *cx = &btc->cx; -+ struct rtw89_btc_bt_info *bt = &cx->bt; -+ -+ seq_puts(m, "=========================================\n"); -+ seq_printf(m, "WL FW / BT FW %d.%d.%d.%d / NA\n", -+ fw_suit->major_ver, fw_suit->minor_ver, -+ fw_suit->sub_ver, fw_suit->sub_idex); -+ seq_printf(m, "manual %d\n", btc->ctrl.manual); -+ -+ seq_puts(m, "=========================================\n"); -+ -+ seq_printf(m, "\n\r %-15s : raw_data[%02x %02x %02x %02x %02x %02x] (type:%s/cnt:%d/same:%d)", -+ "[bt_info]", -+ bt->raw_info[2], bt->raw_info[3], -+ bt->raw_info[4], bt->raw_info[5], -+ bt->raw_info[6], bt->raw_info[7], -+ bt->raw_info[0] == BTC_BTINFO_AUTO ? "auto" : "reply", -+ cx->cnt_bt[BTC_BCNT_INFOUPDATE], -+ cx->cnt_bt[BTC_BCNT_INFOSAME]); -+ -+ seq_puts(m, "\n=========================================\n"); -+ -+ _show_cx_info(rtwdev, m); -+ _show_wl_info(rtwdev, m); -+ _show_bt_info(rtwdev, m); -+ _show_dm_info(rtwdev, m); -+ _show_fw_dm_msg(rtwdev, m); -+ _show_mreg(rtwdev, m); -+ _show_summary(rtwdev, m); -+} -diff --git a/drivers/net/wireless/realtek/rtw89/coex.h b/drivers/net/wireless/realtek/rtw89/coex.h -new file mode 100644 -index 000000000000..4b4565d15c9e ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/coex.h -@@ -0,0 +1,181 @@ -+/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ -+/* Copyright(c) 2019-2020 Realtek Corporation -+ */ -+ -+#ifndef __RTW89_COEX_H__ -+#define __RTW89_COEX_H__ -+ -+#include "core.h" -+ -+enum btc_mode { -+ BTC_MODE_NORMAL, -+ BTC_MODE_WL, -+ BTC_MODE_BT, -+ BTC_MODE_WLOFF, -+ BTC_MODE_MAX -+}; -+ -+enum btc_wl_rfk_type { -+ BTC_WRFKT_IQK = 0, -+ BTC_WRFKT_LCK = 1, -+ BTC_WRFKT_DPK = 2, -+ BTC_WRFKT_TXGAPK = 3, -+ BTC_WRFKT_DACK = 4, -+ BTC_WRFKT_RXDCK = 5, -+ BTC_WRFKT_TSSI = 6, -+}; -+ -+#define NM_EXEC false -+#define FC_EXEC true -+ -+#define RTW89_COEX_ACT1_WORK_PERIOD round_jiffies_relative(HZ * 4) -+#define RTW89_COEX_BT_DEVINFO_WORK_PERIOD round_jiffies_relative(HZ * 16) -+#define RTW89_COEX_RFK_CHK_WORK_PERIOD msecs_to_jiffies(300) -+#define BTC_RFK_PATH_MAP GENMASK(3, 0) -+#define BTC_RFK_PHY_MAP GENMASK(5, 4) -+#define BTC_RFK_BAND_MAP GENMASK(7, 6) -+ -+enum btc_wl_rfk_state { -+ BTC_WRFK_STOP = 0, -+ BTC_WRFK_START = 1, -+ BTC_WRFK_ONESHOT_START = 2, -+ BTC_WRFK_ONESHOT_STOP = 3, -+}; -+ -+enum btc_pri { -+ BTC_PRI_MASK_RX_RESP = 0, -+ BTC_PRI_MASK_TX_RESP, -+ BTC_PRI_MASK_BEACON, -+ BTC_PRI_MASK_RX_CCK, -+ BTC_PRI_MASK_TX_MNGQ, -+ BTC_PRI_MASK_MAX, -+}; -+ -+enum btc_bt_trs { -+ BTC_BT_SS_GROUP = 0x0, -+ BTC_BT_TX_GROUP = 0x2, -+ BTC_BT_RX_GROUP = 0x3, -+ BTC_BT_MAX_GROUP, -+}; -+ -+enum btc_rssi_st { -+ BTC_RSSI_ST_LOW = 0x0, -+ BTC_RSSI_ST_HIGH, -+ BTC_RSSI_ST_STAY_LOW, -+ BTC_RSSI_ST_STAY_HIGH, -+ BTC_RSSI_ST_MAX -+}; -+ -+#define BTC_RSSI_HIGH(_rssi_) \ -+ ({typeof(_rssi_) __rssi = (_rssi_); \ -+ ((__rssi == BTC_RSSI_ST_HIGH || \ -+ __rssi == BTC_RSSI_ST_STAY_HIGH) ? 1 : 0); }) -+ -+#define BTC_RSSI_LOW(_rssi_) \ -+ ({typeof(_rssi_) __rssi = (_rssi_); \ -+ ((__rssi == BTC_RSSI_ST_LOW || \ -+ __rssi == BTC_RSSI_ST_STAY_LOW) ? 1 : 0); }) -+ -+#define BTC_RSSI_CHANGE(_rssi_) \ -+ ({typeof(_rssi_) __rssi = (_rssi_); \ -+ ((__rssi == BTC_RSSI_ST_LOW || \ -+ __rssi == BTC_RSSI_ST_HIGH) ? 1 : 0); }) -+ -+enum btc_ant { -+ BTC_ANT_SHARED = 0, -+ BTC_ANT_DEDICATED, -+ BTC_ANTTYPE_MAX -+}; -+ -+enum btc_bt_btg { -+ BTC_BT_ALONE = 0, -+ BTC_BT_BTG -+}; -+ -+enum btc_switch { -+ BTC_SWITCH_INTERNAL = 0, -+ BTC_SWITCH_EXTERNAL -+}; -+ -+enum btc_pkt_type { -+ PACKET_DHCP, -+ PACKET_ARP, -+ PACKET_EAPOL, -+ PACKET_EAPOL_END, -+ PACKET_ICMP, -+ PACKET_MAX -+}; -+ -+enum btc_bt_mailbox_id { -+ BTC_BTINFO_REPLY = 0x23, -+ BTC_BTINFO_AUTO = 0x27 -+}; -+ -+enum btc_role_state { -+ BTC_ROLE_START, -+ BTC_ROLE_STOP, -+ BTC_ROLE_CHG_TYPE, -+ BTC_ROLE_MSTS_STA_CONN_START, -+ BTC_ROLE_MSTS_STA_CONN_END, -+ BTC_ROLE_MSTS_STA_DIS_CONN, -+ BTC_ROLE_MSTS_AP_START, -+ BTC_ROLE_MSTS_AP_STOP, -+ BTC_ROLE_STATE_UNKNOWN -+}; -+ -+enum btc_rfctrl { -+ BTC_RFCTRL_WL_OFF, -+ BTC_RFCTRL_WL_ON, -+ BTC_RFCTRL_FW_CTRL, -+ BTC_RFCTRL_MAX -+}; -+ -+void rtw89_btc_ntfy_poweron(struct rtw89_dev *rtwdev); -+void rtw89_btc_ntfy_poweroff(struct rtw89_dev *rtwdev); -+void rtw89_btc_ntfy_init(struct rtw89_dev *rtwdev, u8 mode); -+void rtw89_btc_ntfy_scan_start(struct rtw89_dev *rtwdev, u8 phy_idx, u8 band); -+void rtw89_btc_ntfy_scan_finish(struct rtw89_dev *rtwdev, u8 phy_idx); -+void rtw89_btc_ntfy_switch_band(struct rtw89_dev *rtwdev, u8 phy_idx, u8 band); -+void rtw89_btc_ntfy_specific_packet(struct rtw89_dev *rtwdev, -+ enum btc_pkt_type pkt_type); -+void rtw89_btc_ntfy_eapol_packet_work(struct work_struct *work); -+void rtw89_btc_ntfy_arp_packet_work(struct work_struct *work); -+void rtw89_btc_ntfy_dhcp_packet_work(struct work_struct *work); -+void rtw89_btc_ntfy_icmp_packet_work(struct work_struct *work); -+void rtw89_btc_ntfy_role_info(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif, -+ struct rtw89_sta *rtwsta, enum btc_role_state state); -+void rtw89_btc_ntfy_radio_state(struct rtw89_dev *rtwdev, enum btc_rfctrl rf_state); -+void rtw89_btc_ntfy_wl_rfk(struct rtw89_dev *rtwdev, u8 phy_map, -+ enum btc_wl_rfk_type type, -+ enum btc_wl_rfk_state state); -+void rtw89_btc_ntfy_wl_sta(struct rtw89_dev *rtwdev); -+void rtw89_btc_c2h_handle(struct rtw89_dev *rtwdev, struct sk_buff *skb, -+ u32 len, u8 class, u8 func); -+void rtw89_btc_dump_info(struct rtw89_dev *rtwdev, struct seq_file *m); -+void rtw89_coex_act1_work(struct work_struct *work); -+void rtw89_coex_bt_devinfo_work(struct work_struct *work); -+void rtw89_coex_rfk_chk_work(struct work_struct *work); -+void rtw89_coex_power_on(struct rtw89_dev *rtwdev); -+ -+static inline u8 rtw89_btc_phymap(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy_idx, -+ enum rtw89_rf_path_bit paths) -+{ -+ struct rtw89_hal *hal = &rtwdev->hal; -+ u8 phy_map; -+ -+ phy_map = FIELD_PREP(BTC_RFK_PATH_MAP, paths) | -+ FIELD_PREP(BTC_RFK_PHY_MAP, BIT(phy_idx)) | -+ FIELD_PREP(BTC_RFK_BAND_MAP, hal->current_band_type); -+ -+ return phy_map; -+} -+ -+static inline u8 rtw89_btc_path_phymap(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy_idx, -+ enum rtw89_rf_path path) -+{ -+ return rtw89_btc_phymap(rtwdev, phy_idx, BIT(path)); -+} -+ -+#endif -diff --git a/drivers/net/wireless/realtek/rtw89/core.c b/drivers/net/wireless/realtek/rtw89/core.c -new file mode 100644 -index 000000000000..06fb6e5b1b37 ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -0,0 +1,2502 @@ -+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause -+/* Copyright(c) 2019-2020 Realtek Corporation -+ */ -+ -+#include "coex.h" -+#include "core.h" -+#include "efuse.h" -+#include "fw.h" -+#include "mac.h" -+#include "phy.h" -+#include "ps.h" -+#include "reg.h" -+#include "sar.h" -+#include "ser.h" -+#include "txrx.h" -+#include "util.h" -+ -+static bool rtw89_disable_ps_mode; -+module_param_named(disable_ps_mode, rtw89_disable_ps_mode, bool, 0644); -+MODULE_PARM_DESC(disable_ps_mode, "Set Y to disable low power mode"); -+ -+static struct ieee80211_channel rtw89_channels_2ghz[] = { -+ { .center_freq = 2412, .hw_value = 1, }, -+ { .center_freq = 2417, .hw_value = 2, }, -+ { .center_freq = 2422, .hw_value = 3, }, -+ { .center_freq = 2427, .hw_value = 4, }, -+ { .center_freq = 2432, .hw_value = 5, }, -+ { .center_freq = 2437, .hw_value = 6, }, -+ { .center_freq = 2442, .hw_value = 7, }, -+ { .center_freq = 2447, .hw_value = 8, }, -+ { .center_freq = 2452, .hw_value = 9, }, -+ { .center_freq = 2457, .hw_value = 10, }, -+ { .center_freq = 2462, .hw_value = 11, }, -+ { .center_freq = 2467, .hw_value = 12, }, -+ { .center_freq = 2472, .hw_value = 13, }, -+ { .center_freq = 2484, .hw_value = 14, }, -+}; -+ -+static struct ieee80211_channel rtw89_channels_5ghz[] = { -+ {.center_freq = 5180, .hw_value = 36,}, -+ {.center_freq = 5200, .hw_value = 40,}, -+ {.center_freq = 5220, .hw_value = 44,}, -+ {.center_freq = 5240, .hw_value = 48,}, -+ {.center_freq = 5260, .hw_value = 52,}, -+ {.center_freq = 5280, .hw_value = 56,}, -+ {.center_freq = 5300, .hw_value = 60,}, -+ {.center_freq = 5320, .hw_value = 64,}, -+ {.center_freq = 5500, .hw_value = 100,}, -+ {.center_freq = 5520, .hw_value = 104,}, -+ {.center_freq = 5540, .hw_value = 108,}, -+ {.center_freq = 5560, .hw_value = 112,}, -+ {.center_freq = 5580, .hw_value = 116,}, -+ {.center_freq = 5600, .hw_value = 120,}, -+ {.center_freq = 5620, .hw_value = 124,}, -+ {.center_freq = 5640, .hw_value = 128,}, -+ {.center_freq = 5660, .hw_value = 132,}, -+ {.center_freq = 5680, .hw_value = 136,}, -+ {.center_freq = 5700, .hw_value = 140,}, -+ {.center_freq = 5720, .hw_value = 144,}, -+ {.center_freq = 5745, .hw_value = 149,}, -+ {.center_freq = 5765, .hw_value = 153,}, -+ {.center_freq = 5785, .hw_value = 157,}, -+ {.center_freq = 5805, .hw_value = 161,}, -+ {.center_freq = 5825, .hw_value = 165, -+ .flags = IEEE80211_CHAN_NO_HT40MINUS}, -+}; -+ -+static struct ieee80211_rate rtw89_bitrates[] = { -+ { .bitrate = 10, .hw_value = 0x00, }, -+ { .bitrate = 20, .hw_value = 0x01, }, -+ { .bitrate = 55, .hw_value = 0x02, }, -+ { .bitrate = 110, .hw_value = 0x03, }, -+ { .bitrate = 60, .hw_value = 0x04, }, -+ { .bitrate = 90, .hw_value = 0x05, }, -+ { .bitrate = 120, .hw_value = 0x06, }, -+ { .bitrate = 180, .hw_value = 0x07, }, -+ { .bitrate = 240, .hw_value = 0x08, }, -+ { .bitrate = 360, .hw_value = 0x09, }, -+ { .bitrate = 480, .hw_value = 0x0a, }, -+ { .bitrate = 540, .hw_value = 0x0b, }, -+}; -+ -+u16 rtw89_ra_report_to_bitrate(struct rtw89_dev *rtwdev, u8 rpt_rate) -+{ -+ struct ieee80211_rate rate; -+ -+ if (unlikely(rpt_rate >= ARRAY_SIZE(rtw89_bitrates))) { -+ rtw89_info(rtwdev, "invalid rpt rate %d\n", rpt_rate); -+ return 0; -+ } -+ -+ rate = rtw89_bitrates[rpt_rate]; -+ -+ return rate.bitrate; -+} -+ -+static struct ieee80211_supported_band rtw89_sband_2ghz = { -+ .band = NL80211_BAND_2GHZ, -+ .channels = rtw89_channels_2ghz, -+ .n_channels = ARRAY_SIZE(rtw89_channels_2ghz), -+ .bitrates = rtw89_bitrates, -+ .n_bitrates = ARRAY_SIZE(rtw89_bitrates), -+ .ht_cap = {0}, -+ .vht_cap = {0}, -+}; -+ -+static struct ieee80211_supported_band rtw89_sband_5ghz = { -+ .band = NL80211_BAND_5GHZ, -+ .channels = rtw89_channels_5ghz, -+ .n_channels = ARRAY_SIZE(rtw89_channels_5ghz), -+ -+ /* 5G has no CCK rates, 1M/2M/5.5M/11M */ -+ .bitrates = rtw89_bitrates + 4, -+ .n_bitrates = ARRAY_SIZE(rtw89_bitrates) - 4, -+ .ht_cap = {0}, -+ .vht_cap = {0}, -+}; -+ -+static void rtw89_traffic_stats_accu(struct rtw89_dev *rtwdev, -+ struct rtw89_traffic_stats *stats, -+ struct sk_buff *skb, bool tx) -+{ -+ struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; -+ -+ if (!ieee80211_is_data(hdr->frame_control)) -+ return; -+ -+ if (is_broadcast_ether_addr(hdr->addr1) || -+ is_multicast_ether_addr(hdr->addr1)) -+ return; -+ -+ if (tx) { -+ stats->tx_cnt++; -+ stats->tx_unicast += skb->len; -+ } else { -+ stats->rx_cnt++; -+ stats->rx_unicast += skb->len; -+ } -+} -+ -+static void rtw89_get_channel_params(struct cfg80211_chan_def *chandef, -+ struct rtw89_channel_params *chan_param) -+{ -+ struct ieee80211_channel *channel = chandef->chan; -+ enum nl80211_chan_width width = chandef->width; -+ u8 *cch_by_bw = chan_param->cch_by_bw; -+ u32 primary_freq, center_freq; -+ u8 center_chan; -+ u8 bandwidth = RTW89_CHANNEL_WIDTH_20; -+ u8 primary_chan_idx = 0; -+ u8 i; -+ -+ center_chan = channel->hw_value; -+ primary_freq = channel->center_freq; -+ center_freq = chandef->center_freq1; -+ -+ /* assign the center channel used while 20M bw is selected */ -+ cch_by_bw[RTW89_CHANNEL_WIDTH_20] = channel->hw_value; -+ -+ switch (width) { -+ case NL80211_CHAN_WIDTH_20_NOHT: -+ case NL80211_CHAN_WIDTH_20: -+ bandwidth = RTW89_CHANNEL_WIDTH_20; -+ primary_chan_idx = RTW89_SC_DONT_CARE; -+ break; -+ case NL80211_CHAN_WIDTH_40: -+ bandwidth = RTW89_CHANNEL_WIDTH_40; -+ if (primary_freq > center_freq) { -+ primary_chan_idx = RTW89_SC_20_UPPER; -+ center_chan -= 2; -+ } else { -+ primary_chan_idx = RTW89_SC_20_LOWER; -+ center_chan += 2; -+ } -+ break; -+ case NL80211_CHAN_WIDTH_80: -+ bandwidth = RTW89_CHANNEL_WIDTH_80; -+ if (primary_freq > center_freq) { -+ if (primary_freq - center_freq == 10) { -+ primary_chan_idx = RTW89_SC_20_UPPER; -+ center_chan -= 2; -+ } else { -+ primary_chan_idx = RTW89_SC_20_UPMOST; -+ center_chan -= 6; -+ } -+ /* assign the center channel used -+ * while 40M bw is selected -+ */ -+ cch_by_bw[RTW89_CHANNEL_WIDTH_40] = center_chan + 4; -+ } else { -+ if (center_freq - primary_freq == 10) { -+ primary_chan_idx = RTW89_SC_20_LOWER; -+ center_chan += 2; -+ } else { -+ primary_chan_idx = RTW89_SC_20_LOWEST; -+ center_chan += 6; -+ } -+ /* assign the center channel used -+ * while 40M bw is selected -+ */ -+ cch_by_bw[RTW89_CHANNEL_WIDTH_40] = center_chan - 4; -+ } -+ break; -+ default: -+ center_chan = 0; -+ break; -+ } -+ -+ chan_param->center_chan = center_chan; -+ chan_param->primary_chan = channel->hw_value; -+ chan_param->bandwidth = bandwidth; -+ chan_param->pri_ch_idx = primary_chan_idx; -+ -+ /* assign the center channel used while current bw is selected */ -+ cch_by_bw[bandwidth] = center_chan; -+ -+ for (i = bandwidth + 1; i <= RTW89_MAX_CHANNEL_WIDTH; i++) -+ cch_by_bw[i] = 0; -+} -+ -+void rtw89_set_channel(struct rtw89_dev *rtwdev) -+{ -+ struct ieee80211_hw *hw = rtwdev->hw; -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ struct rtw89_hal *hal = &rtwdev->hal; -+ struct rtw89_channel_params ch_param; -+ struct rtw89_channel_help_params bak; -+ u8 center_chan, bandwidth; -+ u8 band_type; -+ bool band_changed; -+ u8 i; -+ -+ rtw89_get_channel_params(&hw->conf.chandef, &ch_param); -+ if (WARN(ch_param.center_chan == 0, "Invalid channel\n")) -+ return; -+ -+ center_chan = ch_param.center_chan; -+ bandwidth = ch_param.bandwidth; -+ band_type = center_chan > 14 ? RTW89_BAND_5G : RTW89_BAND_2G; -+ band_changed = hal->current_band_type != band_type || -+ hal->current_channel == 0; -+ -+ hal->current_band_width = bandwidth; -+ hal->current_channel = center_chan; -+ hal->current_primary_channel = ch_param.primary_chan; -+ hal->current_band_type = band_type; -+ -+ switch (center_chan) { -+ case 1 ... 14: -+ hal->current_subband = RTW89_CH_2G; -+ break; -+ case 36 ... 64: -+ hal->current_subband = RTW89_CH_5G_BAND_1; -+ break; -+ case 100 ... 144: -+ hal->current_subband = RTW89_CH_5G_BAND_3; -+ break; -+ case 149 ... 177: -+ hal->current_subband = RTW89_CH_5G_BAND_4; -+ break; -+ } -+ -+ for (i = RTW89_CHANNEL_WIDTH_20; i <= RTW89_MAX_CHANNEL_WIDTH; i++) -+ hal->cch_by_bw[i] = ch_param.cch_by_bw[i]; -+ -+ rtw89_chip_set_channel_prepare(rtwdev, &bak); -+ -+ chip->ops->set_channel(rtwdev, &ch_param); -+ -+ rtw89_chip_set_txpwr(rtwdev); -+ -+ rtw89_chip_set_channel_done(rtwdev, &bak); -+ -+ if (band_changed) { -+ rtw89_btc_ntfy_switch_band(rtwdev, RTW89_PHY_0, hal->current_band_type); -+ rtw89_chip_rfk_band_changed(rtwdev); -+ } -+} -+ -+static enum rtw89_core_tx_type -+rtw89_core_get_tx_type(struct rtw89_dev *rtwdev, -+ struct sk_buff *skb) -+{ -+ struct ieee80211_hdr *hdr = (void *)skb->data; -+ __le16 fc = hdr->frame_control; -+ -+ if (ieee80211_is_mgmt(fc) || ieee80211_is_nullfunc(fc)) -+ return RTW89_CORE_TX_TYPE_MGMT; -+ -+ return RTW89_CORE_TX_TYPE_DATA; -+} -+ -+static void -+rtw89_core_tx_update_ampdu_info(struct rtw89_dev *rtwdev, -+ struct rtw89_core_tx_request *tx_req, u8 tid) -+{ -+ struct ieee80211_sta *sta = tx_req->sta; -+ struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info; -+ struct rtw89_sta *rtwsta; -+ u8 ampdu_num; -+ -+ if (!sta) { -+ rtw89_warn(rtwdev, "cannot set ampdu info without sta\n"); -+ return; -+ } -+ -+ rtwsta = (struct rtw89_sta *)sta->drv_priv; -+ -+ ampdu_num = (u8)((rtwsta->ampdu_params[tid].agg_num ? -+ rtwsta->ampdu_params[tid].agg_num : -+ 4 << sta->ht_cap.ampdu_factor) - 1); -+ -+ desc_info->agg_en = true; -+ desc_info->ampdu_density = sta->ht_cap.ampdu_density; -+ desc_info->ampdu_num = ampdu_num; -+} -+ -+static void -+rtw89_core_tx_update_sec_key(struct rtw89_dev *rtwdev, -+ struct rtw89_core_tx_request *tx_req) -+{ -+ struct ieee80211_vif *vif = tx_req->vif; -+ struct ieee80211_tx_info *info; -+ struct ieee80211_key_conf *key; -+ struct rtw89_vif *rtwvif; -+ struct rtw89_addr_cam_entry *addr_cam; -+ struct rtw89_sec_cam_entry *sec_cam; -+ struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info; -+ struct sk_buff *skb = tx_req->skb; -+ u8 sec_type = RTW89_SEC_KEY_TYPE_NONE; -+ -+ if (!vif) { -+ rtw89_warn(rtwdev, "cannot set sec key without vif\n"); -+ return; -+ } -+ -+ rtwvif = (struct rtw89_vif *)vif->drv_priv; -+ addr_cam = &rtwvif->addr_cam; -+ -+ info = IEEE80211_SKB_CB(skb); -+ key = info->control.hw_key; -+ sec_cam = addr_cam->sec_entries[key->hw_key_idx]; -+ if (!sec_cam) { -+ rtw89_warn(rtwdev, "sec cam entry is empty\n"); -+ return; -+ } -+ -+ switch (key->cipher) { -+ case WLAN_CIPHER_SUITE_WEP40: -+ sec_type = RTW89_SEC_KEY_TYPE_WEP40; -+ break; -+ case WLAN_CIPHER_SUITE_WEP104: -+ sec_type = RTW89_SEC_KEY_TYPE_WEP104; -+ break; -+ case WLAN_CIPHER_SUITE_TKIP: -+ sec_type = RTW89_SEC_KEY_TYPE_TKIP; -+ break; -+ case WLAN_CIPHER_SUITE_CCMP: -+ sec_type = RTW89_SEC_KEY_TYPE_CCMP128; -+ break; -+ case WLAN_CIPHER_SUITE_CCMP_256: -+ sec_type = RTW89_SEC_KEY_TYPE_CCMP256; -+ break; -+ case WLAN_CIPHER_SUITE_GCMP: -+ sec_type = RTW89_SEC_KEY_TYPE_GCMP128; -+ break; -+ case WLAN_CIPHER_SUITE_GCMP_256: -+ sec_type = RTW89_SEC_KEY_TYPE_GCMP256; -+ break; -+ default: -+ rtw89_warn(rtwdev, "key cipher not supported %d\n", key->cipher); -+ return; -+ } -+ -+ desc_info->sec_en = true; -+ desc_info->sec_type = sec_type; -+ desc_info->sec_cam_idx = sec_cam->sec_cam_idx; -+} -+ -+static u16 rtw89_core_get_mgmt_rate(struct rtw89_dev *rtwdev, -+ struct rtw89_core_tx_request *tx_req) -+{ -+ struct sk_buff *skb = tx_req->skb; -+ struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); -+ struct ieee80211_vif *vif = tx_info->control.vif; -+ struct rtw89_hal *hal = &rtwdev->hal; -+ u16 lowest_rate = hal->current_band_type == RTW89_BAND_2G ? -+ RTW89_HW_RATE_CCK1 : RTW89_HW_RATE_OFDM6; -+ -+ if (!vif || !vif->bss_conf.basic_rates || !tx_req->sta) -+ return lowest_rate; -+ -+ return __ffs(vif->bss_conf.basic_rates) + lowest_rate; -+} -+ -+static void -+rtw89_core_tx_update_mgmt_info(struct rtw89_dev *rtwdev, -+ struct rtw89_core_tx_request *tx_req) -+{ -+ struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info; -+ u8 qsel, ch_dma; -+ -+ qsel = RTW89_TX_QSEL_B0_MGMT; -+ ch_dma = rtw89_core_get_ch_dma(rtwdev, qsel); -+ -+ desc_info->qsel = RTW89_TX_QSEL_B0_MGMT; -+ desc_info->ch_dma = ch_dma; -+ -+ /* fixed data rate for mgmt frames */ -+ desc_info->en_wd_info = true; -+ desc_info->use_rate = true; -+ desc_info->dis_data_fb = true; -+ desc_info->data_rate = rtw89_core_get_mgmt_rate(rtwdev, tx_req); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TXRX, -+ "tx mgmt frame with rate 0x%x on channel %d (bw %d)\n", -+ desc_info->data_rate, rtwdev->hal.current_channel, -+ rtwdev->hal.current_band_width); -+} -+ -+static void -+rtw89_core_tx_update_h2c_info(struct rtw89_dev *rtwdev, -+ struct rtw89_core_tx_request *tx_req) -+{ -+ struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info; -+ -+ desc_info->is_bmc = false; -+ desc_info->wd_page = false; -+ desc_info->ch_dma = RTW89_DMA_H2C; -+} -+ -+static void rtw89_core_get_no_ul_ofdma_htc(struct rtw89_dev *rtwdev, __le32 *htc) -+{ -+ static const u8 rtw89_bandwidth_to_om[] = { -+ [RTW89_CHANNEL_WIDTH_20] = HTC_OM_CHANNEL_WIDTH_20, -+ [RTW89_CHANNEL_WIDTH_40] = HTC_OM_CHANNEL_WIDTH_40, -+ [RTW89_CHANNEL_WIDTH_80] = HTC_OM_CHANNEL_WIDTH_80, -+ [RTW89_CHANNEL_WIDTH_160] = HTC_OM_CHANNEL_WIDTH_160_OR_80_80, -+ [RTW89_CHANNEL_WIDTH_80_80] = HTC_OM_CHANNEL_WIDTH_160_OR_80_80, -+ }; -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ struct rtw89_hal *hal = &rtwdev->hal; -+ u8 om_bandwidth; -+ -+ if (!chip->dis_2g_40m_ul_ofdma || -+ hal->current_band_type != RTW89_BAND_2G || -+ hal->current_band_width != RTW89_CHANNEL_WIDTH_40) -+ return; -+ -+ om_bandwidth = hal->current_band_width < ARRAY_SIZE(rtw89_bandwidth_to_om) ? -+ rtw89_bandwidth_to_om[hal->current_band_width] : 0; -+ *htc = le32_encode_bits(RTW89_HTC_VARIANT_HE, RTW89_HTC_MASK_VARIANT) | -+ le32_encode_bits(RTW89_HTC_VARIANT_HE_CID_OM, RTW89_HTC_MASK_CTL_ID) | -+ le32_encode_bits(hal->rx_nss - 1, RTW89_HTC_MASK_HTC_OM_RX_NSS) | -+ le32_encode_bits(om_bandwidth, RTW89_HTC_MASK_HTC_OM_CH_WIDTH) | -+ le32_encode_bits(1, RTW89_HTC_MASK_HTC_OM_UL_MU_DIS) | -+ le32_encode_bits(hal->tx_nss - 1, RTW89_HTC_MASK_HTC_OM_TX_NSTS) | -+ le32_encode_bits(0, RTW89_HTC_MASK_HTC_OM_ER_SU_DIS) | -+ le32_encode_bits(0, RTW89_HTC_MASK_HTC_OM_DL_MU_MIMO_RR) | -+ le32_encode_bits(0, RTW89_HTC_MASK_HTC_OM_UL_MU_DATA_DIS); -+} -+ -+static bool -+__rtw89_core_tx_check_he_qos_htc(struct rtw89_dev *rtwdev, -+ struct rtw89_core_tx_request *tx_req, -+ enum btc_pkt_type pkt_type) -+{ -+ struct ieee80211_sta *sta = tx_req->sta; -+ struct sk_buff *skb = tx_req->skb; -+ struct ieee80211_hdr *hdr = (void *)skb->data; -+ __le16 fc = hdr->frame_control; -+ -+ /* AP IOT issue with EAPoL, ARP and DHCP */ -+ if (pkt_type < PACKET_MAX) -+ return false; -+ -+ if (!sta || !sta->he_cap.has_he) -+ return false; -+ -+ if (!ieee80211_is_data_qos(fc)) -+ return false; -+ -+ if (skb_headroom(skb) < IEEE80211_HT_CTL_LEN) -+ return false; -+ -+ return true; -+} -+ -+static void -+__rtw89_core_tx_adjust_he_qos_htc(struct rtw89_dev *rtwdev, -+ struct rtw89_core_tx_request *tx_req) -+{ -+ struct ieee80211_sta *sta = tx_req->sta; -+ struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; -+ struct sk_buff *skb = tx_req->skb; -+ struct ieee80211_hdr *hdr = (void *)skb->data; -+ __le16 fc = hdr->frame_control; -+ void *data; -+ __le32 *htc; -+ u8 *qc; -+ int hdr_len; -+ -+ hdr_len = ieee80211_has_a4(fc) ? 32 : 26; -+ data = skb_push(skb, IEEE80211_HT_CTL_LEN); -+ memmove(data, data + IEEE80211_HT_CTL_LEN, hdr_len); -+ -+ hdr = data; -+ htc = data + hdr_len; -+ hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_ORDER); -+ *htc = rtwsta->htc_template ? rtwsta->htc_template : -+ le32_encode_bits(RTW89_HTC_VARIANT_HE, RTW89_HTC_MASK_VARIANT) | -+ le32_encode_bits(RTW89_HTC_VARIANT_HE_CID_CAS, RTW89_HTC_MASK_CTL_ID); -+ -+ qc = data + hdr_len - IEEE80211_QOS_CTL_LEN; -+ qc[0] |= IEEE80211_QOS_CTL_EOSP; -+} -+ -+static void -+rtw89_core_tx_update_he_qos_htc(struct rtw89_dev *rtwdev, -+ struct rtw89_core_tx_request *tx_req, -+ enum btc_pkt_type pkt_type) -+{ -+ struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info; -+ struct ieee80211_vif *vif = tx_req->vif; -+ struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; -+ -+ if (!__rtw89_core_tx_check_he_qos_htc(rtwdev, tx_req, pkt_type)) -+ goto desc_bk; -+ -+ __rtw89_core_tx_adjust_he_qos_htc(rtwdev, tx_req); -+ -+ desc_info->pkt_size += IEEE80211_HT_CTL_LEN; -+ desc_info->a_ctrl_bsr = true; -+ -+desc_bk: -+ if (!rtwvif || rtwvif->last_a_ctrl == desc_info->a_ctrl_bsr) -+ return; -+ -+ rtwvif->last_a_ctrl = desc_info->a_ctrl_bsr; -+ desc_info->bk = true; -+} -+ -+static void -+rtw89_core_tx_update_data_info(struct rtw89_dev *rtwdev, -+ struct rtw89_core_tx_request *tx_req) -+{ -+ struct ieee80211_vif *vif = tx_req->vif; -+ struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; -+ struct rtw89_phy_rate_pattern *rate_pattern = &rtwvif->rate_pattern; -+ struct rtw89_hal *hal = &rtwdev->hal; -+ struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info; -+ struct sk_buff *skb = tx_req->skb; -+ u8 tid, tid_indicate; -+ u8 qsel, ch_dma; -+ -+ tid = skb->priority & IEEE80211_QOS_CTL_TAG1D_MASK; -+ tid_indicate = rtw89_core_get_tid_indicate(rtwdev, tid); -+ qsel = rtw89_core_get_qsel(rtwdev, tid); -+ ch_dma = rtw89_core_get_ch_dma(rtwdev, qsel); -+ -+ desc_info->ch_dma = ch_dma; -+ desc_info->tid_indicate = tid_indicate; -+ desc_info->qsel = qsel; -+ -+ /* enable wd_info for AMPDU */ -+ desc_info->en_wd_info = true; -+ -+ if (IEEE80211_SKB_CB(skb)->flags & IEEE80211_TX_CTL_AMPDU) -+ rtw89_core_tx_update_ampdu_info(rtwdev, tx_req, tid); -+ if (IEEE80211_SKB_CB(skb)->control.hw_key) -+ rtw89_core_tx_update_sec_key(rtwdev, tx_req); -+ -+ if (rate_pattern->enable) -+ desc_info->data_retry_lowest_rate = rate_pattern->rate; -+ else if (hal->current_band_type == RTW89_BAND_2G) -+ desc_info->data_retry_lowest_rate = RTW89_HW_RATE_CCK1; -+ else -+ desc_info->data_retry_lowest_rate = RTW89_HW_RATE_OFDM6; -+} -+ -+static enum btc_pkt_type -+rtw89_core_tx_btc_spec_pkt_notify(struct rtw89_dev *rtwdev, -+ struct rtw89_core_tx_request *tx_req) -+{ -+ struct sk_buff *skb = tx_req->skb; -+ struct udphdr *udphdr; -+ -+ if (IEEE80211_SKB_CB(skb)->control.flags & IEEE80211_TX_CTRL_PORT_CTRL_PROTO) { -+ ieee80211_queue_work(rtwdev->hw, &rtwdev->btc.eapol_notify_work); -+ return PACKET_EAPOL; -+ } -+ -+ if (skb->protocol == htons(ETH_P_ARP)) { -+ ieee80211_queue_work(rtwdev->hw, &rtwdev->btc.arp_notify_work); -+ return PACKET_ARP; -+ } -+ -+ if (skb->protocol == htons(ETH_P_IP) && -+ ip_hdr(skb)->protocol == IPPROTO_UDP) { -+ udphdr = udp_hdr(skb); -+ if (((udphdr->source == htons(67) && udphdr->dest == htons(68)) || -+ (udphdr->source == htons(68) && udphdr->dest == htons(67))) && -+ skb->len > 282) { -+ ieee80211_queue_work(rtwdev->hw, &rtwdev->btc.dhcp_notify_work); -+ return PACKET_DHCP; -+ } -+ } -+ -+ if (skb->protocol == htons(ETH_P_IP) && -+ ip_hdr(skb)->protocol == IPPROTO_ICMP) { -+ ieee80211_queue_work(rtwdev->hw, &rtwdev->btc.icmp_notify_work); -+ return PACKET_ICMP; -+ } -+ -+ return PACKET_MAX; -+} -+ -+static void -+rtw89_core_tx_update_desc_info(struct rtw89_dev *rtwdev, -+ struct rtw89_core_tx_request *tx_req) -+{ -+ struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info; -+ struct sk_buff *skb = tx_req->skb; -+ struct ieee80211_hdr *hdr = (void *)skb->data; -+ enum rtw89_core_tx_type tx_type; -+ enum btc_pkt_type pkt_type; -+ bool is_bmc; -+ u16 seq; -+ -+ seq = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4; -+ if (tx_req->tx_type != RTW89_CORE_TX_TYPE_FWCMD) { -+ tx_type = rtw89_core_get_tx_type(rtwdev, skb); -+ tx_req->tx_type = tx_type; -+ } -+ is_bmc = (is_broadcast_ether_addr(hdr->addr1) || -+ is_multicast_ether_addr(hdr->addr1)); -+ -+ desc_info->seq = seq; -+ desc_info->pkt_size = skb->len; -+ desc_info->is_bmc = is_bmc; -+ desc_info->wd_page = true; -+ -+ switch (tx_req->tx_type) { -+ case RTW89_CORE_TX_TYPE_MGMT: -+ rtw89_core_tx_update_mgmt_info(rtwdev, tx_req); -+ break; -+ case RTW89_CORE_TX_TYPE_DATA: -+ rtw89_core_tx_update_data_info(rtwdev, tx_req); -+ pkt_type = rtw89_core_tx_btc_spec_pkt_notify(rtwdev, tx_req); -+ rtw89_core_tx_update_he_qos_htc(rtwdev, tx_req, pkt_type); -+ break; -+ case RTW89_CORE_TX_TYPE_FWCMD: -+ rtw89_core_tx_update_h2c_info(rtwdev, tx_req); -+ break; -+ } -+} -+ -+void rtw89_core_tx_kick_off(struct rtw89_dev *rtwdev, u8 qsel) -+{ -+ u8 ch_dma; -+ -+ ch_dma = rtw89_core_get_ch_dma(rtwdev, qsel); -+ -+ rtw89_hci_tx_kick_off(rtwdev, ch_dma); -+} -+ -+int rtw89_h2c_tx(struct rtw89_dev *rtwdev, -+ struct sk_buff *skb, bool fwdl) -+{ -+ struct rtw89_core_tx_request tx_req = {0}; -+ u32 cnt; -+ int ret; -+ -+ tx_req.skb = skb; -+ tx_req.tx_type = RTW89_CORE_TX_TYPE_FWCMD; -+ if (fwdl) -+ tx_req.desc_info.fw_dl = true; -+ -+ rtw89_core_tx_update_desc_info(rtwdev, &tx_req); -+ -+ if (!fwdl) -+ rtw89_hex_dump(rtwdev, RTW89_DBG_FW, "H2C: ", skb->data, skb->len); -+ -+ cnt = rtw89_hci_check_and_reclaim_tx_resource(rtwdev, RTW89_TXCH_CH12); -+ if (cnt == 0) { -+ rtw89_err(rtwdev, "no tx fwcmd resource\n"); -+ return -ENOSPC; -+ } -+ -+ ret = rtw89_hci_tx_write(rtwdev, &tx_req); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to transmit skb to HCI\n"); -+ return ret; -+ } -+ rtw89_hci_tx_kick_off(rtwdev, RTW89_TXCH_CH12); -+ -+ return 0; -+} -+ -+int rtw89_core_tx_write(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif, -+ struct ieee80211_sta *sta, struct sk_buff *skb, int *qsel) -+{ -+ struct rtw89_core_tx_request tx_req = {0}; -+ struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; -+ int ret; -+ -+ tx_req.skb = skb; -+ tx_req.sta = sta; -+ tx_req.vif = vif; -+ -+ rtw89_traffic_stats_accu(rtwdev, &rtwdev->stats, skb, true); -+ rtw89_traffic_stats_accu(rtwdev, &rtwvif->stats, skb, true); -+ rtw89_core_tx_update_desc_info(rtwdev, &tx_req); -+ ret = rtw89_hci_tx_write(rtwdev, &tx_req); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to transmit skb to HCI\n"); -+ return ret; -+ } -+ -+ if (qsel) -+ *qsel = tx_req.desc_info.qsel; -+ -+ return 0; -+} -+ -+static __le32 rtw89_build_txwd_body0(struct rtw89_tx_desc_info *desc_info) -+{ -+ u32 dword = FIELD_PREP(RTW89_TXWD_BODY0_WP_OFFSET, desc_info->wp_offset) | -+ FIELD_PREP(RTW89_TXWD_BODY0_WD_INFO_EN, desc_info->en_wd_info) | -+ FIELD_PREP(RTW89_TXWD_BODY0_CHANNEL_DMA, desc_info->ch_dma) | -+ FIELD_PREP(RTW89_TXWD_BODY0_HDR_LLC_LEN, desc_info->hdr_llc_len) | -+ FIELD_PREP(RTW89_TXWD_BODY0_WD_PAGE, desc_info->wd_page) | -+ FIELD_PREP(RTW89_TXWD_BODY0_FW_DL, desc_info->fw_dl); -+ -+ return cpu_to_le32(dword); -+} -+ -+static __le32 rtw89_build_txwd_body2(struct rtw89_tx_desc_info *desc_info) -+{ -+ u32 dword = FIELD_PREP(RTW89_TXWD_BODY2_TID_INDICATE, desc_info->tid_indicate) | -+ FIELD_PREP(RTW89_TXWD_BODY2_QSEL, desc_info->qsel) | -+ FIELD_PREP(RTW89_TXWD_BODY2_TXPKT_SIZE, desc_info->pkt_size); -+ -+ return cpu_to_le32(dword); -+} -+ -+static __le32 rtw89_build_txwd_body3(struct rtw89_tx_desc_info *desc_info) -+{ -+ u32 dword = FIELD_PREP(RTW89_TXWD_BODY3_SW_SEQ, desc_info->seq) | -+ FIELD_PREP(RTW89_TXWD_BODY3_AGG_EN, desc_info->agg_en) | -+ FIELD_PREP(RTW89_TXWD_BODY3_BK, desc_info->bk); -+ -+ return cpu_to_le32(dword); -+} -+ -+static __le32 rtw89_build_txwd_info0(struct rtw89_tx_desc_info *desc_info) -+{ -+ u32 dword = FIELD_PREP(RTW89_TXWD_INFO0_USE_RATE, desc_info->use_rate) | -+ FIELD_PREP(RTW89_TXWD_INFO0_DATA_RATE, desc_info->data_rate) | -+ FIELD_PREP(RTW89_TXWD_INFO0_DISDATAFB, desc_info->dis_data_fb); -+ -+ return cpu_to_le32(dword); -+} -+ -+static __le32 rtw89_build_txwd_info1(struct rtw89_tx_desc_info *desc_info) -+{ -+ u32 dword = FIELD_PREP(RTW89_TXWD_INFO1_MAX_AGGNUM, desc_info->ampdu_num) | -+ FIELD_PREP(RTW89_TXWD_INFO1_A_CTRL_BSR, desc_info->a_ctrl_bsr) | -+ FIELD_PREP(RTW89_TXWD_INFO1_DATA_RTY_LOWEST_RATE, -+ desc_info->data_retry_lowest_rate); -+ -+ return cpu_to_le32(dword); -+} -+ -+static __le32 rtw89_build_txwd_info2(struct rtw89_tx_desc_info *desc_info) -+{ -+ u32 dword = FIELD_PREP(RTW89_TXWD_INFO2_AMPDU_DENSITY, desc_info->ampdu_density) | -+ FIELD_PREP(RTW89_TXWD_INFO2_SEC_TYPE, desc_info->sec_type) | -+ FIELD_PREP(RTW89_TXWD_INFO2_SEC_HW_ENC, desc_info->sec_en) | -+ FIELD_PREP(RTW89_TXWD_INFO2_SEC_CAM_IDX, desc_info->sec_cam_idx); -+ -+ return cpu_to_le32(dword); -+} -+ -+static __le32 rtw89_build_txwd_info4(struct rtw89_tx_desc_info *desc_info) -+{ -+ u32 dword = FIELD_PREP(RTW89_TXWD_INFO4_RTS_EN, 1) | -+ FIELD_PREP(RTW89_TXWD_INFO4_HW_RTS_EN, 1); -+ -+ return cpu_to_le32(dword); -+} -+ -+void rtw89_core_fill_txdesc(struct rtw89_dev *rtwdev, -+ struct rtw89_tx_desc_info *desc_info, -+ void *txdesc) -+{ -+ struct rtw89_txwd_body *txwd_body = (struct rtw89_txwd_body *)txdesc; -+ struct rtw89_txwd_info *txwd_info; -+ -+ txwd_body->dword0 = rtw89_build_txwd_body0(desc_info); -+ txwd_body->dword2 = rtw89_build_txwd_body2(desc_info); -+ txwd_body->dword3 = rtw89_build_txwd_body3(desc_info); -+ -+ if (!desc_info->en_wd_info) -+ return; -+ -+ txwd_info = (struct rtw89_txwd_info *)(txwd_body + 1); -+ txwd_info->dword0 = rtw89_build_txwd_info0(desc_info); -+ txwd_info->dword1 = rtw89_build_txwd_info1(desc_info); -+ txwd_info->dword2 = rtw89_build_txwd_info2(desc_info); -+ txwd_info->dword4 = rtw89_build_txwd_info4(desc_info); -+ -+} -+EXPORT_SYMBOL(rtw89_core_fill_txdesc); -+ -+static int rtw89_core_rx_process_mac_ppdu(struct rtw89_dev *rtwdev, -+ struct sk_buff *skb, -+ struct rtw89_rx_phy_ppdu *phy_ppdu) -+{ -+ bool rx_cnt_valid = false; -+ u8 plcp_size = 0; -+ u8 usr_num = 0; -+ u8 *phy_sts; -+ -+ rx_cnt_valid = RTW89_GET_RXINFO_RX_CNT_VLD(skb->data); -+ plcp_size = RTW89_GET_RXINFO_PLCP_LEN(skb->data) << 3; -+ usr_num = RTW89_GET_RXINFO_USR_NUM(skb->data); -+ if (usr_num > RTW89_PPDU_MAX_USR) { -+ rtw89_warn(rtwdev, "Invalid user number in mac info\n"); -+ return -EINVAL; -+ } -+ -+ phy_sts = skb->data + RTW89_PPDU_MAC_INFO_SIZE; -+ phy_sts += usr_num * RTW89_PPDU_MAC_INFO_USR_SIZE; -+ /* 8-byte alignment */ -+ if (usr_num & BIT(0)) -+ phy_sts += RTW89_PPDU_MAC_INFO_USR_SIZE; -+ if (rx_cnt_valid) -+ phy_sts += RTW89_PPDU_MAC_RX_CNT_SIZE; -+ phy_sts += plcp_size; -+ -+ phy_ppdu->buf = phy_sts; -+ phy_ppdu->len = skb->data + skb->len - phy_sts; -+ -+ return 0; -+} -+ -+static void rtw89_core_rx_process_phy_ppdu_iter(void *data, -+ struct ieee80211_sta *sta) -+{ -+ struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; -+ struct rtw89_rx_phy_ppdu *phy_ppdu = (struct rtw89_rx_phy_ppdu *)data; -+ -+ if (rtwsta->mac_id == phy_ppdu->mac_id && phy_ppdu->to_self) -+ ewma_rssi_add(&rtwsta->avg_rssi, phy_ppdu->rssi_avg); -+} -+ -+#define VAR_LEN 0xff -+#define VAR_LEN_UNIT 8 -+static u16 rtw89_core_get_phy_status_ie_len(struct rtw89_dev *rtwdev, u8 *addr) -+{ -+ static const u8 physts_ie_len_tab[32] = { -+ 16, 32, 24, 24, 8, 8, 8, 8, VAR_LEN, 8, VAR_LEN, 176, VAR_LEN, -+ VAR_LEN, VAR_LEN, VAR_LEN, VAR_LEN, VAR_LEN, 16, 24, VAR_LEN, -+ VAR_LEN, VAR_LEN, 0, 24, 24, 24, 24, 32, 32, 32, 32 -+ }; -+ u16 ie_len; -+ u8 ie; -+ -+ ie = RTW89_GET_PHY_STS_IE_TYPE(addr); -+ if (physts_ie_len_tab[ie] != VAR_LEN) -+ ie_len = physts_ie_len_tab[ie]; -+ else -+ ie_len = RTW89_GET_PHY_STS_IE_LEN(addr) * VAR_LEN_UNIT; -+ -+ return ie_len; -+} -+ -+static void rtw89_core_parse_phy_status_ie01(struct rtw89_dev *rtwdev, u8 *addr, -+ struct rtw89_rx_phy_ppdu *phy_ppdu) -+{ -+ s16 cfo; -+ -+ /* sign conversion for S(12,2) */ -+ cfo = sign_extend32(RTW89_GET_PHY_STS_IE0_CFO(addr), 11); -+ rtw89_phy_cfo_parse(rtwdev, cfo, phy_ppdu); -+} -+ -+static int rtw89_core_process_phy_status_ie(struct rtw89_dev *rtwdev, u8 *addr, -+ struct rtw89_rx_phy_ppdu *phy_ppdu) -+{ -+ u8 ie; -+ -+ ie = RTW89_GET_PHY_STS_IE_TYPE(addr); -+ switch (ie) { -+ case RTW89_PHYSTS_IE01_CMN_OFDM: -+ rtw89_core_parse_phy_status_ie01(rtwdev, addr, phy_ppdu); -+ break; -+ default: -+ break; -+ } -+ -+ return 0; -+} -+ -+static void rtw89_core_update_phy_ppdu(struct rtw89_rx_phy_ppdu *phy_ppdu) -+{ -+ s8 *rssi = phy_ppdu->rssi; -+ u8 *buf = phy_ppdu->buf; -+ -+ phy_ppdu->rssi_avg = RTW89_GET_PHY_STS_RSSI_AVG(buf); -+ rssi[RF_PATH_A] = RTW89_RSSI_RAW_TO_DBM(RTW89_GET_PHY_STS_RSSI_A(buf)); -+ rssi[RF_PATH_B] = RTW89_RSSI_RAW_TO_DBM(RTW89_GET_PHY_STS_RSSI_B(buf)); -+ rssi[RF_PATH_C] = RTW89_RSSI_RAW_TO_DBM(RTW89_GET_PHY_STS_RSSI_C(buf)); -+ rssi[RF_PATH_D] = RTW89_RSSI_RAW_TO_DBM(RTW89_GET_PHY_STS_RSSI_D(buf)); -+} -+ -+static int rtw89_core_rx_process_phy_ppdu(struct rtw89_dev *rtwdev, -+ struct rtw89_rx_phy_ppdu *phy_ppdu) -+{ -+ if (RTW89_GET_PHY_STS_LEN(phy_ppdu->buf) << 3 != phy_ppdu->len) { -+ rtw89_warn(rtwdev, "phy ppdu len mismatch\n"); -+ return -EINVAL; -+ } -+ rtw89_core_update_phy_ppdu(phy_ppdu); -+ ieee80211_iterate_stations_atomic(rtwdev->hw, -+ rtw89_core_rx_process_phy_ppdu_iter, -+ phy_ppdu); -+ -+ return 0; -+} -+ -+static int rtw89_core_rx_parse_phy_sts(struct rtw89_dev *rtwdev, -+ struct rtw89_rx_phy_ppdu *phy_ppdu) -+{ -+ u16 ie_len; -+ u8 *pos, *end; -+ -+ if (!phy_ppdu->to_self) -+ return 0; -+ -+ pos = (u8 *)phy_ppdu->buf + PHY_STS_HDR_LEN; -+ end = (u8 *)phy_ppdu->buf + phy_ppdu->len; -+ while (pos < end) { -+ ie_len = rtw89_core_get_phy_status_ie_len(rtwdev, pos); -+ rtw89_core_process_phy_status_ie(rtwdev, pos, phy_ppdu); -+ pos += ie_len; -+ if (pos > end || ie_len == 0) { -+ rtw89_debug(rtwdev, RTW89_DBG_TXRX, -+ "phy status parse failed\n"); -+ return -EINVAL; -+ } -+ } -+ -+ return 0; -+} -+ -+static void rtw89_core_rx_process_phy_sts(struct rtw89_dev *rtwdev, -+ struct rtw89_rx_phy_ppdu *phy_ppdu) -+{ -+ int ret; -+ -+ ret = rtw89_core_rx_parse_phy_sts(rtwdev, phy_ppdu); -+ if (ret) -+ rtw89_debug(rtwdev, RTW89_DBG_TXRX, "parse phy sts failed\n"); -+ else -+ phy_ppdu->valid = true; -+} -+ -+static u8 rtw89_rxdesc_to_nl_he_gi(struct rtw89_dev *rtwdev, -+ const struct rtw89_rx_desc_info *desc_info, -+ bool rx_status) -+{ -+ switch (desc_info->gi_ltf) { -+ case RTW89_GILTF_SGI_4XHE08: -+ case RTW89_GILTF_2XHE08: -+ case RTW89_GILTF_1XHE08: -+ return NL80211_RATE_INFO_HE_GI_0_8; -+ case RTW89_GILTF_2XHE16: -+ case RTW89_GILTF_1XHE16: -+ return NL80211_RATE_INFO_HE_GI_1_6; -+ case RTW89_GILTF_LGI_4XHE32: -+ return NL80211_RATE_INFO_HE_GI_3_2; -+ default: -+ rtw89_warn(rtwdev, "invalid gi_ltf=%d", desc_info->gi_ltf); -+ return rx_status ? NL80211_RATE_INFO_HE_GI_3_2 : U8_MAX; -+ } -+} -+ -+static bool rtw89_core_rx_ppdu_match(struct rtw89_dev *rtwdev, -+ struct rtw89_rx_desc_info *desc_info, -+ struct ieee80211_rx_status *status) -+{ -+ u8 band = desc_info->bb_sel ? RTW89_PHY_1 : RTW89_PHY_0; -+ u8 data_rate_mode, bw, rate_idx = MASKBYTE0, gi_ltf; -+ u16 data_rate; -+ bool ret; -+ -+ data_rate = desc_info->data_rate; -+ data_rate_mode = GET_DATA_RATE_MODE(data_rate); -+ if (data_rate_mode == DATA_RATE_MODE_NON_HT) { -+ rate_idx = GET_DATA_RATE_NOT_HT_IDX(data_rate); -+ /* No 4 CCK rates for 5G */ -+ if (status->band == NL80211_BAND_5GHZ) -+ rate_idx -= 4; -+ } else if (data_rate_mode == DATA_RATE_MODE_HT) { -+ rate_idx = GET_DATA_RATE_HT_IDX(data_rate); -+ } else if (data_rate_mode == DATA_RATE_MODE_VHT) { -+ rate_idx = GET_DATA_RATE_VHT_HE_IDX(data_rate); -+ } else if (data_rate_mode == DATA_RATE_MODE_HE) { -+ rate_idx = GET_DATA_RATE_VHT_HE_IDX(data_rate); -+ } else { -+ rtw89_warn(rtwdev, "invalid RX rate mode %d\n", data_rate_mode); -+ } -+ -+ if (desc_info->bw == RTW89_CHANNEL_WIDTH_80) -+ bw = RATE_INFO_BW_80; -+ else if (desc_info->bw == RTW89_CHANNEL_WIDTH_40) -+ bw = RATE_INFO_BW_40; -+ else -+ bw = RATE_INFO_BW_20; -+ -+ gi_ltf = rtw89_rxdesc_to_nl_he_gi(rtwdev, desc_info, false); -+ ret = rtwdev->ppdu_sts.curr_rx_ppdu_cnt[band] == desc_info->ppdu_cnt && -+ status->rate_idx == rate_idx && -+ status->he_gi == gi_ltf && -+ status->bw == bw; -+ -+ return ret; -+} -+ -+struct rtw89_vif_rx_stats_iter_data { -+ struct rtw89_dev *rtwdev; -+ struct rtw89_rx_phy_ppdu *phy_ppdu; -+ struct rtw89_rx_desc_info *desc_info; -+ struct sk_buff *skb; -+ const u8 *bssid; -+}; -+ -+static void rtw89_vif_rx_stats_iter(void *data, u8 *mac, -+ struct ieee80211_vif *vif) -+{ -+ struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; -+ struct rtw89_vif_rx_stats_iter_data *iter_data = data; -+ struct rtw89_dev *rtwdev = iter_data->rtwdev; -+ struct rtw89_pkt_stat *pkt_stat = &rtwdev->phystat.cur_pkt_stat; -+ struct rtw89_rx_desc_info *desc_info = iter_data->desc_info; -+ struct sk_buff *skb = iter_data->skb; -+ struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; -+ const u8 *bssid = iter_data->bssid; -+ -+ if (!ether_addr_equal(vif->bss_conf.bssid, bssid)) -+ return; -+ -+ if (ieee80211_is_beacon(hdr->frame_control)) -+ pkt_stat->beacon_nr++; -+ -+ if (!ether_addr_equal(vif->addr, hdr->addr1)) -+ return; -+ -+ if (desc_info->data_rate < RTW89_HW_RATE_NR) -+ pkt_stat->rx_rate_cnt[desc_info->data_rate]++; -+ -+ rtw89_traffic_stats_accu(rtwdev, &rtwvif->stats, skb, false); -+} -+ -+static void rtw89_core_rx_stats(struct rtw89_dev *rtwdev, -+ struct rtw89_rx_phy_ppdu *phy_ppdu, -+ struct rtw89_rx_desc_info *desc_info, -+ struct sk_buff *skb) -+{ -+ struct rtw89_vif_rx_stats_iter_data iter_data; -+ -+ rtw89_traffic_stats_accu(rtwdev, &rtwdev->stats, skb, false); -+ -+ iter_data.rtwdev = rtwdev; -+ iter_data.phy_ppdu = phy_ppdu; -+ iter_data.desc_info = desc_info; -+ iter_data.skb = skb; -+ iter_data.bssid = get_hdr_bssid((struct ieee80211_hdr *)skb->data); -+ rtw89_iterate_vifs_bh(rtwdev, rtw89_vif_rx_stats_iter, &iter_data); -+} -+ -+static void rtw89_core_rx_pending_skb(struct rtw89_dev *rtwdev, -+ struct rtw89_rx_phy_ppdu *phy_ppdu, -+ struct rtw89_rx_desc_info *desc_info, -+ struct sk_buff *skb) -+{ -+ u8 band = desc_info->bb_sel ? RTW89_PHY_1 : RTW89_PHY_0; -+ int curr = rtwdev->ppdu_sts.curr_rx_ppdu_cnt[band]; -+ struct sk_buff *skb_ppdu = NULL, *tmp; -+ struct ieee80211_rx_status *rx_status; -+ -+ if (curr > RTW89_MAX_PPDU_CNT) -+ return; -+ -+ skb_queue_walk_safe(&rtwdev->ppdu_sts.rx_queue[band], skb_ppdu, tmp) { -+ skb_unlink(skb_ppdu, &rtwdev->ppdu_sts.rx_queue[band]); -+ rx_status = IEEE80211_SKB_RXCB(skb_ppdu); -+ if (rtw89_core_rx_ppdu_match(rtwdev, desc_info, rx_status)) -+ rtw89_chip_query_ppdu(rtwdev, phy_ppdu, rx_status); -+ rtw89_core_rx_stats(rtwdev, phy_ppdu, desc_info, skb_ppdu); -+ ieee80211_rx_napi(rtwdev->hw, NULL, skb_ppdu, &rtwdev->napi); -+ rtwdev->napi_budget_countdown--; -+ } -+} -+ -+static void rtw89_core_rx_process_ppdu_sts(struct rtw89_dev *rtwdev, -+ struct rtw89_rx_desc_info *desc_info, -+ struct sk_buff *skb) -+{ -+ struct rtw89_rx_phy_ppdu phy_ppdu = {.buf = skb->data, .valid = false, -+ .len = skb->len, -+ .to_self = desc_info->addr1_match, -+ .mac_id = desc_info->mac_id}; -+ int ret; -+ -+ if (desc_info->mac_info_valid) -+ rtw89_core_rx_process_mac_ppdu(rtwdev, skb, &phy_ppdu); -+ ret = rtw89_core_rx_process_phy_ppdu(rtwdev, &phy_ppdu); -+ if (ret) -+ rtw89_debug(rtwdev, RTW89_DBG_TXRX, "process ppdu failed\n"); -+ -+ rtw89_core_rx_process_phy_sts(rtwdev, &phy_ppdu); -+ rtw89_core_rx_pending_skb(rtwdev, &phy_ppdu, desc_info, skb); -+ dev_kfree_skb_any(skb); -+} -+ -+static void rtw89_core_rx_process_report(struct rtw89_dev *rtwdev, -+ struct rtw89_rx_desc_info *desc_info, -+ struct sk_buff *skb) -+{ -+ switch (desc_info->pkt_type) { -+ case RTW89_CORE_RX_TYPE_C2H: -+ rtw89_fw_c2h_irqsafe(rtwdev, skb); -+ break; -+ case RTW89_CORE_RX_TYPE_PPDU_STAT: -+ rtw89_core_rx_process_ppdu_sts(rtwdev, desc_info, skb); -+ break; -+ default: -+ rtw89_debug(rtwdev, RTW89_DBG_TXRX, "unhandled pkt_type=%d\n", -+ desc_info->pkt_type); -+ dev_kfree_skb_any(skb); -+ break; -+ } -+} -+ -+void rtw89_core_query_rxdesc(struct rtw89_dev *rtwdev, -+ struct rtw89_rx_desc_info *desc_info, -+ u8 *data, u32 data_offset) -+{ -+ struct rtw89_rxdesc_short *rxd_s; -+ struct rtw89_rxdesc_long *rxd_l; -+ u8 shift_len, drv_info_len; -+ -+ rxd_s = (struct rtw89_rxdesc_short *)(data + data_offset); -+ desc_info->pkt_size = RTW89_GET_RXWD_PKT_SIZE(rxd_s); -+ desc_info->drv_info_size = RTW89_GET_RXWD_DRV_INFO_SIZE(rxd_s); -+ desc_info->long_rxdesc = RTW89_GET_RXWD_LONG_RXD(rxd_s); -+ desc_info->pkt_type = RTW89_GET_RXWD_RPKT_TYPE(rxd_s); -+ desc_info->mac_info_valid = RTW89_GET_RXWD_MAC_INFO_VALID(rxd_s); -+ desc_info->bw = RTW89_GET_RXWD_BW(rxd_s); -+ desc_info->data_rate = RTW89_GET_RXWD_DATA_RATE(rxd_s); -+ desc_info->gi_ltf = RTW89_GET_RXWD_GI_LTF(rxd_s); -+ desc_info->user_id = RTW89_GET_RXWD_USER_ID(rxd_s); -+ desc_info->sr_en = RTW89_GET_RXWD_SR_EN(rxd_s); -+ desc_info->ppdu_cnt = RTW89_GET_RXWD_PPDU_CNT(rxd_s); -+ desc_info->ppdu_type = RTW89_GET_RXWD_PPDU_TYPE(rxd_s); -+ desc_info->free_run_cnt = RTW89_GET_RXWD_FREE_RUN_CNT(rxd_s); -+ desc_info->icv_err = RTW89_GET_RXWD_ICV_ERR(rxd_s); -+ desc_info->crc32_err = RTW89_GET_RXWD_CRC32_ERR(rxd_s); -+ desc_info->hw_dec = RTW89_GET_RXWD_HW_DEC(rxd_s); -+ desc_info->sw_dec = RTW89_GET_RXWD_SW_DEC(rxd_s); -+ desc_info->addr1_match = RTW89_GET_RXWD_A1_MATCH(rxd_s); -+ -+ shift_len = desc_info->shift << 1; /* 2-byte unit */ -+ drv_info_len = desc_info->drv_info_size << 3; /* 8-byte unit */ -+ desc_info->offset = data_offset + shift_len + drv_info_len; -+ desc_info->ready = true; -+ -+ if (!desc_info->long_rxdesc) -+ return; -+ -+ rxd_l = (struct rtw89_rxdesc_long *)(data + data_offset); -+ desc_info->frame_type = RTW89_GET_RXWD_TYPE(rxd_l); -+ desc_info->addr_cam_valid = RTW89_GET_RXWD_ADDR_CAM_VLD(rxd_l); -+ desc_info->addr_cam_id = RTW89_GET_RXWD_ADDR_CAM_ID(rxd_l); -+ desc_info->sec_cam_id = RTW89_GET_RXWD_SEC_CAM_ID(rxd_l); -+ desc_info->mac_id = RTW89_GET_RXWD_MAC_ID(rxd_l); -+ desc_info->rx_pl_id = RTW89_GET_RXWD_RX_PL_ID(rxd_l); -+} -+EXPORT_SYMBOL(rtw89_core_query_rxdesc); -+ -+struct rtw89_core_iter_rx_status { -+ struct rtw89_dev *rtwdev; -+ struct ieee80211_rx_status *rx_status; -+ struct rtw89_rx_desc_info *desc_info; -+ u8 mac_id; -+}; -+ -+static -+void rtw89_core_stats_sta_rx_status_iter(void *data, struct ieee80211_sta *sta) -+{ -+ struct rtw89_core_iter_rx_status *iter_data = -+ (struct rtw89_core_iter_rx_status *)data; -+ struct ieee80211_rx_status *rx_status = iter_data->rx_status; -+ struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; -+ struct rtw89_rx_desc_info *desc_info = iter_data->desc_info; -+ u8 mac_id = iter_data->mac_id; -+ -+ if (mac_id != rtwsta->mac_id) -+ return; -+ -+ rtwsta->rx_status = *rx_status; -+ rtwsta->rx_hw_rate = desc_info->data_rate; -+} -+ -+static void rtw89_core_stats_sta_rx_status(struct rtw89_dev *rtwdev, -+ struct rtw89_rx_desc_info *desc_info, -+ struct ieee80211_rx_status *rx_status) -+{ -+ struct rtw89_core_iter_rx_status iter_data; -+ -+ if (!desc_info->addr1_match || !desc_info->long_rxdesc) -+ return; -+ -+ if (desc_info->frame_type != RTW89_RX_TYPE_DATA) -+ return; -+ -+ iter_data.rtwdev = rtwdev; -+ iter_data.rx_status = rx_status; -+ iter_data.desc_info = desc_info; -+ iter_data.mac_id = desc_info->mac_id; -+ ieee80211_iterate_stations_atomic(rtwdev->hw, -+ rtw89_core_stats_sta_rx_status_iter, -+ &iter_data); -+} -+ -+static void rtw89_core_update_rx_status(struct rtw89_dev *rtwdev, -+ struct rtw89_rx_desc_info *desc_info, -+ struct ieee80211_rx_status *rx_status) -+{ -+ struct ieee80211_hw *hw = rtwdev->hw; -+ u16 data_rate; -+ u8 data_rate_mode; -+ -+ /* currently using single PHY */ -+ rx_status->freq = hw->conf.chandef.chan->center_freq; -+ rx_status->band = hw->conf.chandef.chan->band; -+ -+ if (desc_info->icv_err || desc_info->crc32_err) -+ rx_status->flag |= RX_FLAG_FAILED_FCS_CRC; -+ -+ if (desc_info->hw_dec && -+ !(desc_info->sw_dec || desc_info->icv_err)) -+ rx_status->flag |= RX_FLAG_DECRYPTED; -+ -+ if (desc_info->bw == RTW89_CHANNEL_WIDTH_80) -+ rx_status->bw = RATE_INFO_BW_80; -+ else if (desc_info->bw == RTW89_CHANNEL_WIDTH_40) -+ rx_status->bw = RATE_INFO_BW_40; -+ else -+ rx_status->bw = RATE_INFO_BW_20; -+ -+ data_rate = desc_info->data_rate; -+ data_rate_mode = GET_DATA_RATE_MODE(data_rate); -+ if (data_rate_mode == DATA_RATE_MODE_NON_HT) { -+ rx_status->encoding = RX_ENC_LEGACY; -+ rx_status->rate_idx = GET_DATA_RATE_NOT_HT_IDX(data_rate); -+ /* No 4 CCK rates for 5G */ -+ if (rx_status->band == NL80211_BAND_5GHZ) -+ rx_status->rate_idx -= 4; -+ if (rtwdev->scanning) -+ rx_status->rate_idx = min_t(u8, rx_status->rate_idx, -+ ARRAY_SIZE(rtw89_bitrates) - 5); -+ } else if (data_rate_mode == DATA_RATE_MODE_HT) { -+ rx_status->encoding = RX_ENC_HT; -+ rx_status->rate_idx = GET_DATA_RATE_HT_IDX(data_rate); -+ if (desc_info->gi_ltf) -+ rx_status->enc_flags |= RX_ENC_FLAG_SHORT_GI; -+ } else if (data_rate_mode == DATA_RATE_MODE_VHT) { -+ rx_status->encoding = RX_ENC_VHT; -+ rx_status->rate_idx = GET_DATA_RATE_VHT_HE_IDX(data_rate); -+ rx_status->nss = GET_DATA_RATE_NSS(data_rate) + 1; -+ if (desc_info->gi_ltf) -+ rx_status->enc_flags |= RX_ENC_FLAG_SHORT_GI; -+ } else if (data_rate_mode == DATA_RATE_MODE_HE) { -+ rx_status->encoding = RX_ENC_HE; -+ rx_status->rate_idx = GET_DATA_RATE_VHT_HE_IDX(data_rate); -+ rx_status->nss = GET_DATA_RATE_NSS(data_rate) + 1; -+ } else { -+ rtw89_warn(rtwdev, "invalid RX rate mode %d\n", data_rate_mode); -+ } -+ -+ /* he_gi is used to match ppdu, so we always fill it. */ -+ rx_status->he_gi = rtw89_rxdesc_to_nl_he_gi(rtwdev, desc_info, true); -+ rx_status->flag |= RX_FLAG_MACTIME_START; -+ rx_status->mactime = desc_info->free_run_cnt; -+ -+ rtw89_core_stats_sta_rx_status(rtwdev, desc_info, rx_status); -+} -+ -+static enum rtw89_ps_mode rtw89_update_ps_mode(struct rtw89_dev *rtwdev) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ -+ if (rtw89_disable_ps_mode || !chip->ps_mode_supported) -+ return RTW89_PS_MODE_NONE; -+ -+ if (chip->ps_mode_supported & BIT(RTW89_PS_MODE_PWR_GATED)) -+ return RTW89_PS_MODE_PWR_GATED; -+ -+ if (chip->ps_mode_supported & BIT(RTW89_PS_MODE_CLK_GATED)) -+ return RTW89_PS_MODE_CLK_GATED; -+ -+ if (chip->ps_mode_supported & BIT(RTW89_PS_MODE_RFOFF)) -+ return RTW89_PS_MODE_RFOFF; -+ -+ return RTW89_PS_MODE_NONE; -+} -+ -+static void rtw89_core_flush_ppdu_rx_queue(struct rtw89_dev *rtwdev, -+ struct rtw89_rx_desc_info *desc_info) -+{ -+ struct rtw89_ppdu_sts_info *ppdu_sts = &rtwdev->ppdu_sts; -+ u8 band = desc_info->bb_sel ? RTW89_PHY_1 : RTW89_PHY_0; -+ struct sk_buff *skb_ppdu, *tmp; -+ -+ skb_queue_walk_safe(&ppdu_sts->rx_queue[band], skb_ppdu, tmp) { -+ skb_unlink(skb_ppdu, &ppdu_sts->rx_queue[band]); -+ rtw89_core_rx_stats(rtwdev, NULL, desc_info, skb_ppdu); -+ ieee80211_rx_napi(rtwdev->hw, NULL, skb_ppdu, &rtwdev->napi); -+ rtwdev->napi_budget_countdown--; -+ } -+} -+ -+void rtw89_core_rx(struct rtw89_dev *rtwdev, -+ struct rtw89_rx_desc_info *desc_info, -+ struct sk_buff *skb) -+{ -+ struct ieee80211_rx_status *rx_status; -+ struct rtw89_ppdu_sts_info *ppdu_sts = &rtwdev->ppdu_sts; -+ u8 ppdu_cnt = desc_info->ppdu_cnt; -+ u8 band = desc_info->bb_sel ? RTW89_PHY_1 : RTW89_PHY_0; -+ -+ if (desc_info->pkt_type != RTW89_CORE_RX_TYPE_WIFI) { -+ rtw89_core_rx_process_report(rtwdev, desc_info, skb); -+ return; -+ } -+ -+ if (ppdu_sts->curr_rx_ppdu_cnt[band] != ppdu_cnt) { -+ rtw89_core_flush_ppdu_rx_queue(rtwdev, desc_info); -+ ppdu_sts->curr_rx_ppdu_cnt[band] = ppdu_cnt; -+ } -+ -+ rx_status = IEEE80211_SKB_RXCB(skb); -+ memset(rx_status, 0, sizeof(*rx_status)); -+ rtw89_core_update_rx_status(rtwdev, desc_info, rx_status); -+ if (desc_info->long_rxdesc && -+ BIT(desc_info->frame_type) & PPDU_FILTER_BITMAP) { -+ skb_queue_tail(&ppdu_sts->rx_queue[band], skb); -+ } else { -+ rtw89_core_rx_stats(rtwdev, NULL, desc_info, skb); -+ ieee80211_rx_napi(rtwdev->hw, NULL, skb, &rtwdev->napi); -+ rtwdev->napi_budget_countdown--; -+ } -+} -+EXPORT_SYMBOL(rtw89_core_rx); -+ -+void rtw89_core_napi_start(struct rtw89_dev *rtwdev) -+{ -+ if (test_and_set_bit(RTW89_FLAG_NAPI_RUNNING, rtwdev->flags)) -+ return; -+ -+ napi_enable(&rtwdev->napi); -+} -+EXPORT_SYMBOL(rtw89_core_napi_start); -+ -+void rtw89_core_napi_stop(struct rtw89_dev *rtwdev) -+{ -+ if (!test_and_clear_bit(RTW89_FLAG_NAPI_RUNNING, rtwdev->flags)) -+ return; -+ -+ napi_synchronize(&rtwdev->napi); -+ napi_disable(&rtwdev->napi); -+} -+EXPORT_SYMBOL(rtw89_core_napi_stop); -+ -+void rtw89_core_napi_init(struct rtw89_dev *rtwdev) -+{ -+ init_dummy_netdev(&rtwdev->netdev); -+ netif_napi_add(&rtwdev->netdev, &rtwdev->napi, -+ rtwdev->hci.ops->napi_poll, NAPI_POLL_WEIGHT); -+} -+EXPORT_SYMBOL(rtw89_core_napi_init); -+ -+void rtw89_core_napi_deinit(struct rtw89_dev *rtwdev) -+{ -+ rtw89_core_napi_stop(rtwdev); -+ netif_napi_del(&rtwdev->napi); -+} -+EXPORT_SYMBOL(rtw89_core_napi_deinit); -+ -+static void rtw89_core_ba_work(struct work_struct *work) -+{ -+ struct rtw89_dev *rtwdev = -+ container_of(work, struct rtw89_dev, ba_work); -+ struct rtw89_txq *rtwtxq, *tmp; -+ int ret; -+ -+ spin_lock_bh(&rtwdev->ba_lock); -+ list_for_each_entry_safe(rtwtxq, tmp, &rtwdev->ba_list, list) { -+ struct ieee80211_txq *txq = rtw89_txq_to_txq(rtwtxq); -+ struct ieee80211_sta *sta = txq->sta; -+ struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; -+ u8 tid = txq->tid; -+ -+ if (!sta) { -+ rtw89_warn(rtwdev, "cannot start BA without sta\n"); -+ goto skip_ba_work; -+ } -+ -+ if (rtwsta->disassoc) { -+ rtw89_debug(rtwdev, RTW89_DBG_TXRX, -+ "cannot start BA with disassoc sta\n"); -+ goto skip_ba_work; -+ } -+ -+ ret = ieee80211_start_tx_ba_session(sta, tid, 0); -+ if (ret) { -+ rtw89_debug(rtwdev, RTW89_DBG_TXRX, -+ "failed to setup BA session for %pM:%2d: %d\n", -+ sta->addr, tid, ret); -+ if (ret == -EINVAL) -+ set_bit(RTW89_TXQ_F_BLOCK_BA, &rtwtxq->flags); -+ } -+skip_ba_work: -+ list_del_init(&rtwtxq->list); -+ } -+ spin_unlock_bh(&rtwdev->ba_lock); -+} -+ -+static void rtw89_core_free_sta_pending_ba(struct rtw89_dev *rtwdev, -+ struct ieee80211_sta *sta) -+{ -+ struct rtw89_txq *rtwtxq, *tmp; -+ -+ spin_lock_bh(&rtwdev->ba_lock); -+ list_for_each_entry_safe(rtwtxq, tmp, &rtwdev->ba_list, list) { -+ struct ieee80211_txq *txq = rtw89_txq_to_txq(rtwtxq); -+ -+ if (sta == txq->sta) -+ list_del_init(&rtwtxq->list); -+ } -+ spin_unlock_bh(&rtwdev->ba_lock); -+} -+ -+static void rtw89_core_txq_check_agg(struct rtw89_dev *rtwdev, -+ struct rtw89_txq *rtwtxq, -+ struct sk_buff *skb) -+{ -+ struct ieee80211_hw *hw = rtwdev->hw; -+ struct ieee80211_txq *txq = rtw89_txq_to_txq(rtwtxq); -+ struct ieee80211_sta *sta = txq->sta; -+ struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; -+ -+ if (unlikely(skb_get_queue_mapping(skb) == IEEE80211_AC_VO)) -+ return; -+ -+ if (unlikely(skb->protocol == cpu_to_be16(ETH_P_PAE))) -+ return; -+ -+ if (unlikely(!sta)) -+ return; -+ -+ if (unlikely(test_bit(RTW89_TXQ_F_BLOCK_BA, &rtwtxq->flags))) -+ return; -+ -+ if (test_bit(RTW89_TXQ_F_AMPDU, &rtwtxq->flags)) { -+ IEEE80211_SKB_CB(skb)->flags |= IEEE80211_TX_CTL_AMPDU; -+ return; -+ } -+ -+ spin_lock_bh(&rtwdev->ba_lock); -+ if (!rtwsta->disassoc && list_empty(&rtwtxq->list)) { -+ list_add_tail(&rtwtxq->list, &rtwdev->ba_list); -+ ieee80211_queue_work(hw, &rtwdev->ba_work); -+ } -+ spin_unlock_bh(&rtwdev->ba_lock); -+} -+ -+static void rtw89_core_txq_push(struct rtw89_dev *rtwdev, -+ struct rtw89_txq *rtwtxq, -+ unsigned long frame_cnt, -+ unsigned long byte_cnt) -+{ -+ struct ieee80211_txq *txq = rtw89_txq_to_txq(rtwtxq); -+ struct ieee80211_vif *vif = txq->vif; -+ struct ieee80211_sta *sta = txq->sta; -+ struct sk_buff *skb; -+ unsigned long i; -+ int ret; -+ -+ for (i = 0; i < frame_cnt; i++) { -+ skb = ieee80211_tx_dequeue_ni(rtwdev->hw, txq); -+ if (!skb) { -+ rtw89_debug(rtwdev, RTW89_DBG_TXRX, "dequeue a NULL skb\n"); -+ return; -+ } -+ rtw89_core_txq_check_agg(rtwdev, rtwtxq, skb); -+ ret = rtw89_core_tx_write(rtwdev, vif, sta, skb, NULL); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to push txq: %d\n", ret); -+ ieee80211_free_txskb(rtwdev->hw, skb); -+ break; -+ } -+ } -+} -+ -+static u32 rtw89_check_and_reclaim_tx_resource(struct rtw89_dev *rtwdev, u8 tid) -+{ -+ u8 qsel, ch_dma; -+ -+ qsel = rtw89_core_get_qsel(rtwdev, tid); -+ ch_dma = rtw89_core_get_ch_dma(rtwdev, qsel); -+ -+ return rtw89_hci_check_and_reclaim_tx_resource(rtwdev, ch_dma); -+} -+ -+static bool rtw89_core_txq_agg_wait(struct rtw89_dev *rtwdev, -+ struct ieee80211_txq *txq, -+ unsigned long *frame_cnt, -+ bool *sched_txq, bool *reinvoke) -+{ -+ struct rtw89_txq *rtwtxq = (struct rtw89_txq *)txq->drv_priv; -+ struct ieee80211_sta *sta = txq->sta; -+ struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; -+ -+ if (!sta || rtwsta->max_agg_wait <= 0) -+ return false; -+ -+ if (rtwdev->stats.tx_tfc_lv <= RTW89_TFC_MID) -+ return false; -+ -+ if (*frame_cnt > 1) { -+ *frame_cnt -= 1; -+ *sched_txq = true; -+ *reinvoke = true; -+ rtwtxq->wait_cnt = 1; -+ return false; -+ } -+ -+ if (*frame_cnt == 1 && rtwtxq->wait_cnt < rtwsta->max_agg_wait) { -+ *reinvoke = true; -+ rtwtxq->wait_cnt++; -+ return true; -+ } -+ -+ rtwtxq->wait_cnt = 0; -+ return false; -+} -+ -+static void rtw89_core_txq_schedule(struct rtw89_dev *rtwdev, u8 ac, bool *reinvoke) -+{ -+ struct ieee80211_hw *hw = rtwdev->hw; -+ struct ieee80211_txq *txq; -+ struct rtw89_txq *rtwtxq; -+ unsigned long frame_cnt; -+ unsigned long byte_cnt; -+ u32 tx_resource; -+ bool sched_txq; -+ -+ ieee80211_txq_schedule_start(hw, ac); -+ while ((txq = ieee80211_next_txq(hw, ac))) { -+ rtwtxq = (struct rtw89_txq *)txq->drv_priv; -+ tx_resource = rtw89_check_and_reclaim_tx_resource(rtwdev, txq->tid); -+ sched_txq = false; -+ -+ ieee80211_txq_get_depth(txq, &frame_cnt, &byte_cnt); -+ if (rtw89_core_txq_agg_wait(rtwdev, txq, &frame_cnt, &sched_txq, reinvoke)) { -+ ieee80211_return_txq(hw, txq, true); -+ continue; -+ } -+ frame_cnt = min_t(unsigned long, frame_cnt, tx_resource); -+ rtw89_core_txq_push(rtwdev, rtwtxq, frame_cnt, byte_cnt); -+ ieee80211_return_txq(hw, txq, sched_txq); -+ if (frame_cnt != 0) -+ rtw89_core_tx_kick_off(rtwdev, rtw89_core_get_qsel(rtwdev, txq->tid)); -+ } -+ ieee80211_txq_schedule_end(hw, ac); -+} -+ -+static void rtw89_core_txq_work(struct work_struct *w) -+{ -+ struct rtw89_dev *rtwdev = container_of(w, struct rtw89_dev, txq_work); -+ bool reinvoke = false; -+ u8 ac; -+ -+ for (ac = 0; ac < IEEE80211_NUM_ACS; ac++) -+ rtw89_core_txq_schedule(rtwdev, ac, &reinvoke); -+ -+ if (reinvoke) { -+ /* reinvoke to process the last frame */ -+ mod_delayed_work(rtwdev->txq_wq, &rtwdev->txq_reinvoke_work, 1); -+ } -+} -+ -+static void rtw89_core_txq_reinvoke_work(struct work_struct *w) -+{ -+ struct rtw89_dev *rtwdev = container_of(w, struct rtw89_dev, -+ txq_reinvoke_work.work); -+ -+ queue_work(rtwdev->txq_wq, &rtwdev->txq_work); -+} -+ -+static enum rtw89_tfc_lv rtw89_get_traffic_level(struct rtw89_dev *rtwdev, -+ u32 throughput, u64 cnt) -+{ -+ if (cnt < 100) -+ return RTW89_TFC_IDLE; -+ if (throughput > 50) -+ return RTW89_TFC_HIGH; -+ if (throughput > 10) -+ return RTW89_TFC_MID; -+ if (throughput > 2) -+ return RTW89_TFC_LOW; -+ return RTW89_TFC_ULTRA_LOW; -+} -+ -+static bool rtw89_traffic_stats_calc(struct rtw89_dev *rtwdev, -+ struct rtw89_traffic_stats *stats) -+{ -+ enum rtw89_tfc_lv tx_tfc_lv = stats->tx_tfc_lv; -+ enum rtw89_tfc_lv rx_tfc_lv = stats->rx_tfc_lv; -+ -+ stats->tx_throughput_raw = (u32)(stats->tx_unicast >> RTW89_TP_SHIFT); -+ stats->rx_throughput_raw = (u32)(stats->rx_unicast >> RTW89_TP_SHIFT); -+ -+ ewma_tp_add(&stats->tx_ewma_tp, stats->tx_throughput_raw); -+ ewma_tp_add(&stats->rx_ewma_tp, stats->rx_throughput_raw); -+ -+ stats->tx_throughput = ewma_tp_read(&stats->tx_ewma_tp); -+ stats->rx_throughput = ewma_tp_read(&stats->rx_ewma_tp); -+ stats->tx_tfc_lv = rtw89_get_traffic_level(rtwdev, stats->tx_throughput, -+ stats->tx_cnt); -+ stats->rx_tfc_lv = rtw89_get_traffic_level(rtwdev, stats->rx_throughput, -+ stats->rx_cnt); -+ stats->tx_avg_len = stats->tx_cnt ? -+ DIV_ROUND_DOWN_ULL(stats->tx_unicast, stats->tx_cnt) : 0; -+ stats->rx_avg_len = stats->rx_cnt ? -+ DIV_ROUND_DOWN_ULL(stats->rx_unicast, stats->rx_cnt) : 0; -+ -+ stats->tx_unicast = 0; -+ stats->rx_unicast = 0; -+ stats->tx_cnt = 0; -+ stats->rx_cnt = 0; -+ -+ if (tx_tfc_lv != stats->tx_tfc_lv || rx_tfc_lv != stats->rx_tfc_lv) -+ return true; -+ -+ return false; -+} -+ -+static bool rtw89_traffic_stats_track(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_vif *rtwvif; -+ bool tfc_changed; -+ -+ tfc_changed = rtw89_traffic_stats_calc(rtwdev, &rtwdev->stats); -+ rtw89_for_each_rtwvif(rtwdev, rtwvif) -+ rtw89_traffic_stats_calc(rtwdev, &rtwvif->stats); -+ -+ return tfc_changed; -+} -+ -+static void rtw89_vif_enter_lps(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif) -+{ -+ if (rtwvif->wifi_role != RTW89_WIFI_ROLE_STATION) -+ return; -+ -+ if (rtwvif->stats.tx_tfc_lv == RTW89_TFC_IDLE && -+ rtwvif->stats.rx_tfc_lv == RTW89_TFC_IDLE) -+ rtw89_enter_lps(rtwdev, rtwvif->mac_id); -+} -+ -+static void rtw89_enter_lps_track(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_vif *rtwvif; -+ -+ rtw89_for_each_rtwvif(rtwdev, rtwvif) -+ rtw89_vif_enter_lps(rtwdev, rtwvif); -+} -+ -+void rtw89_traffic_stats_init(struct rtw89_dev *rtwdev, -+ struct rtw89_traffic_stats *stats) -+{ -+ stats->tx_unicast = 0; -+ stats->rx_unicast = 0; -+ stats->tx_cnt = 0; -+ stats->rx_cnt = 0; -+ ewma_tp_init(&stats->tx_ewma_tp); -+ ewma_tp_init(&stats->rx_ewma_tp); -+} -+ -+static void rtw89_track_work(struct work_struct *work) -+{ -+ struct rtw89_dev *rtwdev = container_of(work, struct rtw89_dev, -+ track_work.work); -+ bool tfc_changed; -+ -+ mutex_lock(&rtwdev->mutex); -+ -+ if (!test_bit(RTW89_FLAG_RUNNING, rtwdev->flags)) -+ goto out; -+ -+ ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->track_work, -+ RTW89_TRACK_WORK_PERIOD); -+ -+ tfc_changed = rtw89_traffic_stats_track(rtwdev); -+ if (rtwdev->scanning) -+ goto out; -+ -+ rtw89_leave_lps(rtwdev); -+ -+ if (tfc_changed) { -+ rtw89_hci_recalc_int_mit(rtwdev); -+ rtw89_btc_ntfy_wl_sta(rtwdev); -+ } -+ rtw89_mac_bf_monitor_track(rtwdev); -+ rtw89_phy_stat_track(rtwdev); -+ rtw89_phy_env_monitor_track(rtwdev); -+ rtw89_phy_dig(rtwdev); -+ rtw89_chip_rfk_track(rtwdev); -+ rtw89_phy_ra_update(rtwdev); -+ rtw89_phy_cfo_track(rtwdev); -+ -+ if (rtwdev->lps_enabled && !rtwdev->btc.lps) -+ rtw89_enter_lps_track(rtwdev); -+ -+out: -+ mutex_unlock(&rtwdev->mutex); -+} -+ -+u8 rtw89_core_acquire_bit_map(unsigned long *addr, unsigned long size) -+{ -+ unsigned long bit; -+ -+ bit = find_first_zero_bit(addr, size); -+ if (bit < size) -+ set_bit(bit, addr); -+ -+ return bit; -+} -+ -+void rtw89_core_release_bit_map(unsigned long *addr, u8 bit) -+{ -+ clear_bit(bit, addr); -+} -+ -+void rtw89_core_release_all_bits_map(unsigned long *addr, unsigned int nbits) -+{ -+ bitmap_zero(addr, nbits); -+} -+ -+#define RTW89_TYPE_MAPPING(_type) \ -+ case NL80211_IFTYPE_ ## _type: \ -+ rtwvif->wifi_role = RTW89_WIFI_ROLE_ ## _type; \ -+ break -+void rtw89_vif_type_mapping(struct ieee80211_vif *vif, bool assoc) -+{ -+ struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; -+ -+ switch (vif->type) { -+ RTW89_TYPE_MAPPING(ADHOC); -+ RTW89_TYPE_MAPPING(STATION); -+ RTW89_TYPE_MAPPING(AP); -+ RTW89_TYPE_MAPPING(MONITOR); -+ RTW89_TYPE_MAPPING(MESH_POINT); -+ default: -+ WARN_ON(1); -+ break; -+ } -+ -+ switch (vif->type) { -+ case NL80211_IFTYPE_AP: -+ case NL80211_IFTYPE_MESH_POINT: -+ rtwvif->net_type = RTW89_NET_TYPE_AP_MODE; -+ rtwvif->self_role = RTW89_SELF_ROLE_AP; -+ break; -+ case NL80211_IFTYPE_ADHOC: -+ rtwvif->net_type = RTW89_NET_TYPE_AD_HOC; -+ rtwvif->self_role = RTW89_SELF_ROLE_CLIENT; -+ break; -+ case NL80211_IFTYPE_STATION: -+ if (assoc) { -+ rtwvif->net_type = RTW89_NET_TYPE_INFRA; -+ rtwvif->trigger = vif->bss_conf.he_support; -+ } else { -+ rtwvif->net_type = RTW89_NET_TYPE_NO_LINK; -+ rtwvif->trigger = false; -+ } -+ rtwvif->self_role = RTW89_SELF_ROLE_CLIENT; -+ rtwvif->addr_cam.sec_ent_mode = RTW89_ADDR_CAM_SEC_NORMAL; -+ break; -+ default: -+ WARN_ON(1); -+ break; -+ } -+} -+ -+int rtw89_core_sta_add(struct rtw89_dev *rtwdev, -+ struct ieee80211_vif *vif, -+ struct ieee80211_sta *sta) -+{ -+ struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; -+ struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; -+ int i; -+ -+ rtwsta->rtwvif = rtwvif; -+ rtwsta->prev_rssi = 0; -+ -+ for (i = 0; i < ARRAY_SIZE(sta->txq); i++) -+ rtw89_core_txq_init(rtwdev, sta->txq[i]); -+ -+ ewma_rssi_init(&rtwsta->avg_rssi); -+ -+ if (vif->type == NL80211_IFTYPE_STATION) { -+ rtwvif->mgd.ap = sta; -+ rtw89_btc_ntfy_role_info(rtwdev, rtwvif, rtwsta, -+ BTC_ROLE_MSTS_STA_CONN_START); -+ rtw89_chip_rfk_channel(rtwdev); -+ } -+ -+ return 0; -+} -+ -+int rtw89_core_sta_disassoc(struct rtw89_dev *rtwdev, -+ struct ieee80211_vif *vif, -+ struct ieee80211_sta *sta) -+{ -+ struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; -+ -+ rtwdev->total_sta_assoc--; -+ rtwsta->disassoc = true; -+ -+ return 0; -+} -+ -+int rtw89_core_sta_disconnect(struct rtw89_dev *rtwdev, -+ struct ieee80211_vif *vif, -+ struct ieee80211_sta *sta) -+{ -+ struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; -+ int ret; -+ -+ rtw89_mac_bf_monitor_calc(rtwdev, sta, true); -+ rtw89_mac_bf_disassoc(rtwdev, vif, sta); -+ rtw89_core_free_sta_pending_ba(rtwdev, sta); -+ -+ rtw89_vif_type_mapping(vif, false); -+ -+ ret = rtw89_fw_h2c_assoc_cmac_tbl(rtwdev, vif, sta); -+ if (ret) { -+ rtw89_warn(rtwdev, "failed to send h2c cmac table\n"); -+ return ret; -+ } -+ -+ ret = rtw89_fw_h2c_join_info(rtwdev, rtwvif, 1); -+ if (ret) { -+ rtw89_warn(rtwdev, "failed to send h2c join info\n"); -+ return ret; -+ } -+ -+ /* update cam aid mac_id net_type */ -+ rtw89_fw_h2c_cam(rtwdev, rtwvif); -+ if (ret) { -+ rtw89_warn(rtwdev, "failed to send h2c cam\n"); -+ return ret; -+ } -+ -+ return ret; -+} -+ -+int rtw89_core_sta_assoc(struct rtw89_dev *rtwdev, -+ struct ieee80211_vif *vif, -+ struct ieee80211_sta *sta) -+{ -+ struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; -+ struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; -+ int ret; -+ -+ rtw89_vif_type_mapping(vif, true); -+ -+ ret = rtw89_fw_h2c_assoc_cmac_tbl(rtwdev, vif, sta); -+ if (ret) { -+ rtw89_warn(rtwdev, "failed to send h2c cmac table\n"); -+ return ret; -+ } -+ -+ /* for station mode, assign the mac_id from itself */ -+ if (vif->type == NL80211_IFTYPE_STATION) -+ rtwsta->mac_id = rtwvif->mac_id; -+ -+ ret = rtw89_fw_h2c_join_info(rtwdev, rtwvif, 0); -+ if (ret) { -+ rtw89_warn(rtwdev, "failed to send h2c join info\n"); -+ return ret; -+ } -+ -+ /* update cam aid mac_id net_type */ -+ rtw89_fw_h2c_cam(rtwdev, rtwvif); -+ if (ret) { -+ rtw89_warn(rtwdev, "failed to send h2c cam\n"); -+ return ret; -+ } -+ -+ ret = rtw89_fw_h2c_general_pkt(rtwdev, rtwsta->mac_id); -+ if (ret) { -+ rtw89_warn(rtwdev, "failed to send h2c general packet\n"); -+ return ret; -+ } -+ -+ rtwdev->total_sta_assoc++; -+ rtw89_phy_ra_assoc(rtwdev, sta); -+ rtw89_mac_bf_assoc(rtwdev, vif, sta); -+ rtw89_mac_bf_monitor_calc(rtwdev, sta, false); -+ -+ if (vif->type == NL80211_IFTYPE_STATION) { -+ rtw89_btc_ntfy_role_info(rtwdev, rtwvif, rtwsta, -+ BTC_ROLE_MSTS_STA_CONN_END); -+ rtw89_core_get_no_ul_ofdma_htc(rtwdev, &rtwsta->htc_template); -+ } -+ -+ return ret; -+} -+ -+int rtw89_core_sta_remove(struct rtw89_dev *rtwdev, -+ struct ieee80211_vif *vif, -+ struct ieee80211_sta *sta) -+{ -+ struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; -+ struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; -+ -+ if (vif->type == NL80211_IFTYPE_STATION) -+ rtw89_btc_ntfy_role_info(rtwdev, rtwvif, rtwsta, -+ BTC_ROLE_MSTS_STA_DIS_CONN); -+ -+ return 0; -+} -+ -+static void rtw89_init_ht_cap(struct rtw89_dev *rtwdev, -+ struct ieee80211_sta_ht_cap *ht_cap) -+{ -+ static const __le16 highest[RF_PATH_MAX] = { -+ cpu_to_le16(150), cpu_to_le16(300), cpu_to_le16(450), cpu_to_le16(600), -+ }; -+ struct rtw89_hal *hal = &rtwdev->hal; -+ u8 nss = hal->rx_nss; -+ int i; -+ -+ ht_cap->ht_supported = true; -+ ht_cap->cap = 0; -+ ht_cap->cap |= IEEE80211_HT_CAP_SGI_20 | -+ IEEE80211_HT_CAP_MAX_AMSDU | -+ IEEE80211_HT_CAP_TX_STBC | -+ (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT); -+ ht_cap->cap |= IEEE80211_HT_CAP_LDPC_CODING; -+ ht_cap->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40 | -+ IEEE80211_HT_CAP_DSSSCCK40 | -+ IEEE80211_HT_CAP_SGI_40; -+ ht_cap->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K; -+ ht_cap->ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE; -+ ht_cap->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED; -+ for (i = 0; i < nss; i++) -+ ht_cap->mcs.rx_mask[i] = 0xFF; -+ ht_cap->mcs.rx_mask[4] = 0x01; -+ ht_cap->mcs.rx_highest = highest[nss - 1]; -+} -+ -+static void rtw89_init_vht_cap(struct rtw89_dev *rtwdev, -+ struct ieee80211_sta_vht_cap *vht_cap) -+{ -+ static const __le16 highest[RF_PATH_MAX] = { -+ cpu_to_le16(433), cpu_to_le16(867), cpu_to_le16(1300), cpu_to_le16(1733), -+ }; -+ struct rtw89_hal *hal = &rtwdev->hal; -+ u16 tx_mcs_map = 0, rx_mcs_map = 0; -+ u8 sts_cap = 3; -+ int i; -+ -+ for (i = 0; i < 8; i++) { -+ if (i < hal->tx_nss) -+ tx_mcs_map |= IEEE80211_VHT_MCS_SUPPORT_0_9 << (i * 2); -+ else -+ tx_mcs_map |= IEEE80211_VHT_MCS_NOT_SUPPORTED << (i * 2); -+ if (i < hal->rx_nss) -+ rx_mcs_map |= IEEE80211_VHT_MCS_SUPPORT_0_9 << (i * 2); -+ else -+ rx_mcs_map |= IEEE80211_VHT_MCS_NOT_SUPPORTED << (i * 2); -+ } -+ -+ vht_cap->vht_supported = true; -+ vht_cap->cap = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454 | -+ IEEE80211_VHT_CAP_SHORT_GI_80 | -+ IEEE80211_VHT_CAP_RXSTBC_1 | -+ IEEE80211_VHT_CAP_HTC_VHT | -+ IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK | -+ 0; -+ vht_cap->cap |= IEEE80211_VHT_CAP_TXSTBC; -+ vht_cap->cap |= IEEE80211_VHT_CAP_RXLDPC; -+ vht_cap->cap |= IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE | -+ IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE; -+ vht_cap->cap |= sts_cap << IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT; -+ vht_cap->vht_mcs.rx_mcs_map = cpu_to_le16(rx_mcs_map); -+ vht_cap->vht_mcs.tx_mcs_map = cpu_to_le16(tx_mcs_map); -+ vht_cap->vht_mcs.rx_highest = highest[hal->rx_nss - 1]; -+ vht_cap->vht_mcs.tx_highest = highest[hal->tx_nss - 1]; -+} -+ -+#define RTW89_SBAND_IFTYPES_NR 2 -+ -+static void rtw89_init_he_cap(struct rtw89_dev *rtwdev, -+ enum nl80211_band band, -+ struct ieee80211_supported_band *sband) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ struct rtw89_hal *hal = &rtwdev->hal; -+ struct ieee80211_sband_iftype_data *iftype_data; -+ bool no_ng16 = (chip->chip_id == RTL8852A && hal->cv == CHIP_CBV) || -+ (chip->chip_id == RTL8852B && hal->cv == CHIP_CAV); -+ u16 mcs_map = 0; -+ int i; -+ int nss = hal->rx_nss; -+ int idx = 0; -+ -+ iftype_data = kcalloc(RTW89_SBAND_IFTYPES_NR, sizeof(*iftype_data), GFP_KERNEL); -+ if (!iftype_data) -+ return; -+ -+ for (i = 0; i < 8; i++) { -+ if (i < nss) -+ mcs_map |= IEEE80211_HE_MCS_SUPPORT_0_11 << (i * 2); -+ else -+ mcs_map |= IEEE80211_HE_MCS_NOT_SUPPORTED << (i * 2); -+ } -+ -+ for (i = 0; i < NUM_NL80211_IFTYPES; i++) { -+ struct ieee80211_sta_he_cap *he_cap; -+ u8 *mac_cap_info; -+ u8 *phy_cap_info; -+ -+ switch (i) { -+ case NL80211_IFTYPE_STATION: -+ case NL80211_IFTYPE_AP: -+ break; -+ default: -+ continue; -+ } -+ -+ if (idx >= RTW89_SBAND_IFTYPES_NR) { -+ rtw89_warn(rtwdev, "run out of iftype_data\n"); -+ break; -+ } -+ -+ iftype_data[idx].types_mask = BIT(i); -+ he_cap = &iftype_data[idx].he_cap; -+ mac_cap_info = he_cap->he_cap_elem.mac_cap_info; -+ phy_cap_info = he_cap->he_cap_elem.phy_cap_info; -+ -+ he_cap->has_he = true; -+ if (i == NL80211_IFTYPE_AP) -+ mac_cap_info[0] = IEEE80211_HE_MAC_CAP0_HTC_HE; -+ if (i == NL80211_IFTYPE_STATION) -+ mac_cap_info[1] = IEEE80211_HE_MAC_CAP1_TF_MAC_PAD_DUR_16US; -+ mac_cap_info[2] = IEEE80211_HE_MAC_CAP2_ALL_ACK | -+ IEEE80211_HE_MAC_CAP2_BSR; -+ mac_cap_info[3] = IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_2; -+ if (i == NL80211_IFTYPE_AP) -+ mac_cap_info[3] |= IEEE80211_HE_MAC_CAP3_OMI_CONTROL; -+ mac_cap_info[4] = IEEE80211_HE_MAC_CAP4_OPS | -+ IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU; -+ if (i == NL80211_IFTYPE_STATION) -+ mac_cap_info[5] = IEEE80211_HE_MAC_CAP5_HT_VHT_TRIG_FRAME_RX; -+ phy_cap_info[0] = IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G | -+ IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G; -+ phy_cap_info[1] = IEEE80211_HE_PHY_CAP1_DEVICE_CLASS_A | -+ IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD | -+ IEEE80211_HE_PHY_CAP1_HE_LTF_AND_GI_FOR_HE_PPDUS_0_8US; -+ phy_cap_info[2] = IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US | -+ IEEE80211_HE_PHY_CAP2_STBC_TX_UNDER_80MHZ | -+ IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ | -+ IEEE80211_HE_PHY_CAP2_DOPPLER_TX; -+ phy_cap_info[3] = IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_16_QAM; -+ if (i == NL80211_IFTYPE_STATION) -+ phy_cap_info[3] |= IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_16_QAM | -+ IEEE80211_HE_PHY_CAP3_DCM_MAX_TX_NSS_2; -+ if (i == NL80211_IFTYPE_AP) -+ phy_cap_info[3] |= IEEE80211_HE_PHY_CAP3_RX_PARTIAL_BW_SU_IN_20MHZ_MU; -+ phy_cap_info[4] = IEEE80211_HE_PHY_CAP4_SU_BEAMFORMEE | -+ IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_UNDER_80MHZ_4; -+ phy_cap_info[5] = no_ng16 ? 0 : -+ IEEE80211_HE_PHY_CAP5_NG16_SU_FEEDBACK | -+ IEEE80211_HE_PHY_CAP5_NG16_MU_FEEDBACK; -+ phy_cap_info[6] = IEEE80211_HE_PHY_CAP6_CODEBOOK_SIZE_42_SU | -+ IEEE80211_HE_PHY_CAP6_CODEBOOK_SIZE_75_MU | -+ IEEE80211_HE_PHY_CAP6_TRIG_SU_BEAMFORMING_FB | -+ IEEE80211_HE_PHY_CAP6_PARTIAL_BW_EXT_RANGE; -+ phy_cap_info[7] = IEEE80211_HE_PHY_CAP7_POWER_BOOST_FACTOR_SUPP | -+ IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI | -+ IEEE80211_HE_PHY_CAP7_MAX_NC_1; -+ phy_cap_info[8] = IEEE80211_HE_PHY_CAP8_HE_ER_SU_PPDU_4XLTF_AND_08_US_GI | -+ IEEE80211_HE_PHY_CAP8_HE_ER_SU_1XLTF_AND_08_US_GI | -+ IEEE80211_HE_PHY_CAP8_DCM_MAX_RU_996; -+ phy_cap_info[9] = IEEE80211_HE_PHY_CAP9_LONGER_THAN_16_SIGB_OFDM_SYM | -+ IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU | -+ IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_COMP_SIGB | -+ IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_NON_COMP_SIGB | -+ IEEE80211_HE_PHY_CAP9_NOMIMAL_PKT_PADDING_16US; -+ if (i == NL80211_IFTYPE_STATION) -+ phy_cap_info[9] |= IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU; -+ he_cap->he_mcs_nss_supp.rx_mcs_80 = cpu_to_le16(mcs_map); -+ he_cap->he_mcs_nss_supp.tx_mcs_80 = cpu_to_le16(mcs_map); -+ -+ idx++; -+ } -+ -+ sband->iftype_data = iftype_data; -+ sband->n_iftype_data = idx; -+} -+ -+static int rtw89_core_set_supported_band(struct rtw89_dev *rtwdev) -+{ -+ struct ieee80211_hw *hw = rtwdev->hw; -+ struct ieee80211_supported_band *sband_2ghz = NULL, *sband_5ghz = NULL; -+ u32 size = sizeof(struct ieee80211_supported_band); -+ -+ sband_2ghz = kmemdup(&rtw89_sband_2ghz, size, GFP_KERNEL); -+ if (!sband_2ghz) -+ goto err; -+ rtw89_init_ht_cap(rtwdev, &sband_2ghz->ht_cap); -+ rtw89_init_he_cap(rtwdev, NL80211_BAND_2GHZ, sband_2ghz); -+ hw->wiphy->bands[NL80211_BAND_2GHZ] = sband_2ghz; -+ -+ sband_5ghz = kmemdup(&rtw89_sband_5ghz, size, GFP_KERNEL); -+ if (!sband_5ghz) -+ goto err; -+ rtw89_init_ht_cap(rtwdev, &sband_5ghz->ht_cap); -+ rtw89_init_vht_cap(rtwdev, &sband_5ghz->vht_cap); -+ rtw89_init_he_cap(rtwdev, NL80211_BAND_5GHZ, sband_5ghz); -+ hw->wiphy->bands[NL80211_BAND_5GHZ] = sband_5ghz; -+ -+ return 0; -+ -+err: -+ hw->wiphy->bands[NL80211_BAND_2GHZ] = NULL; -+ hw->wiphy->bands[NL80211_BAND_5GHZ] = NULL; -+ if (sband_2ghz) -+ kfree(sband_2ghz->iftype_data); -+ if (sband_5ghz) -+ kfree(sband_5ghz->iftype_data); -+ kfree(sband_2ghz); -+ kfree(sband_5ghz); -+ return -ENOMEM; -+} -+ -+static void rtw89_core_clr_supported_band(struct rtw89_dev *rtwdev) -+{ -+ struct ieee80211_hw *hw = rtwdev->hw; -+ -+ kfree(hw->wiphy->bands[NL80211_BAND_2GHZ]->iftype_data); -+ kfree(hw->wiphy->bands[NL80211_BAND_5GHZ]->iftype_data); -+ kfree(hw->wiphy->bands[NL80211_BAND_2GHZ]); -+ kfree(hw->wiphy->bands[NL80211_BAND_5GHZ]); -+ hw->wiphy->bands[NL80211_BAND_2GHZ] = NULL; -+ hw->wiphy->bands[NL80211_BAND_5GHZ] = NULL; -+} -+ -+static void rtw89_core_ppdu_sts_init(struct rtw89_dev *rtwdev) -+{ -+ int i; -+ -+ for (i = 0; i < RTW89_PHY_MAX; i++) -+ skb_queue_head_init(&rtwdev->ppdu_sts.rx_queue[i]); -+ for (i = 0; i < RTW89_PHY_MAX; i++) -+ rtwdev->ppdu_sts.curr_rx_ppdu_cnt[i] = U8_MAX; -+} -+ -+int rtw89_core_start(struct rtw89_dev *rtwdev) -+{ -+ int ret; -+ -+ rtwdev->mac.qta_mode = RTW89_QTA_SCC; -+ ret = rtw89_mac_init(rtwdev); -+ if (ret) { -+ rtw89_err(rtwdev, "mac init fail, ret:%d\n", ret); -+ return ret; -+ } -+ -+ rtw89_btc_ntfy_poweron(rtwdev); -+ -+ /* efuse process */ -+ -+ /* pre-config BB/RF, BB reset/RFC reset */ -+ rtw89_mac_disable_bb_rf(rtwdev); -+ rtw89_mac_enable_bb_rf(rtwdev); -+ rtw89_phy_init_bb_reg(rtwdev); -+ rtw89_phy_init_rf_reg(rtwdev); -+ -+ rtw89_btc_ntfy_init(rtwdev, BTC_MODE_NORMAL); -+ -+ rtw89_phy_dm_init(rtwdev); -+ -+ rtw89_mac_cfg_ppdu_status(rtwdev, RTW89_MAC_0, true); -+ rtw89_mac_update_rts_threshold(rtwdev, RTW89_MAC_0); -+ -+ ret = rtw89_hci_start(rtwdev); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to start hci\n"); -+ return ret; -+ } -+ -+ ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->track_work, -+ RTW89_TRACK_WORK_PERIOD); -+ -+ set_bit(RTW89_FLAG_RUNNING, rtwdev->flags); -+ -+ rtw89_btc_ntfy_radio_state(rtwdev, BTC_RFCTRL_WL_ON); -+ rtw89_fw_h2c_fw_log(rtwdev, rtwdev->fw.fw_log_enable); -+ -+ return 0; -+} -+ -+void rtw89_core_stop(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ -+ /* Prvent to stop twice; enter_ips and ops_stop */ -+ if (!test_bit(RTW89_FLAG_RUNNING, rtwdev->flags)) -+ return; -+ -+ rtw89_btc_ntfy_radio_state(rtwdev, BTC_RFCTRL_WL_OFF); -+ -+ clear_bit(RTW89_FLAG_RUNNING, rtwdev->flags); -+ -+ mutex_unlock(&rtwdev->mutex); -+ -+ cancel_work_sync(&rtwdev->c2h_work); -+ cancel_work_sync(&btc->eapol_notify_work); -+ cancel_work_sync(&btc->arp_notify_work); -+ cancel_work_sync(&btc->dhcp_notify_work); -+ cancel_work_sync(&btc->icmp_notify_work); -+ cancel_delayed_work_sync(&rtwdev->txq_reinvoke_work); -+ cancel_delayed_work_sync(&rtwdev->track_work); -+ cancel_delayed_work_sync(&rtwdev->coex_act1_work); -+ cancel_delayed_work_sync(&rtwdev->coex_bt_devinfo_work); -+ cancel_delayed_work_sync(&rtwdev->coex_rfk_chk_work); -+ cancel_delayed_work_sync(&rtwdev->cfo_track_work); -+ -+ mutex_lock(&rtwdev->mutex); -+ -+ rtw89_btc_ntfy_poweroff(rtwdev); -+ rtw89_hci_flush_queues(rtwdev, BIT(rtwdev->hw->queues) - 1, true); -+ rtw89_mac_flush_txq(rtwdev, BIT(rtwdev->hw->queues) - 1, true); -+ rtw89_hci_stop(rtwdev); -+ rtw89_hci_deinit(rtwdev); -+ rtw89_mac_pwr_off(rtwdev); -+ rtw89_hci_reset(rtwdev); -+} -+ -+int rtw89_core_init(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ int ret; -+ -+ INIT_LIST_HEAD(&rtwdev->ba_list); -+ INIT_LIST_HEAD(&rtwdev->rtwvifs_list); -+ INIT_LIST_HEAD(&rtwdev->early_h2c_list); -+ INIT_WORK(&rtwdev->ba_work, rtw89_core_ba_work); -+ INIT_WORK(&rtwdev->txq_work, rtw89_core_txq_work); -+ INIT_DELAYED_WORK(&rtwdev->txq_reinvoke_work, rtw89_core_txq_reinvoke_work); -+ INIT_DELAYED_WORK(&rtwdev->track_work, rtw89_track_work); -+ INIT_DELAYED_WORK(&rtwdev->coex_act1_work, rtw89_coex_act1_work); -+ INIT_DELAYED_WORK(&rtwdev->coex_bt_devinfo_work, rtw89_coex_bt_devinfo_work); -+ INIT_DELAYED_WORK(&rtwdev->coex_rfk_chk_work, rtw89_coex_rfk_chk_work); -+ INIT_DELAYED_WORK(&rtwdev->cfo_track_work, rtw89_phy_cfo_track_work); -+ rtwdev->txq_wq = alloc_workqueue("rtw89_tx_wq", WQ_UNBOUND | WQ_HIGHPRI, 0); -+ spin_lock_init(&rtwdev->ba_lock); -+ mutex_init(&rtwdev->mutex); -+ mutex_init(&rtwdev->rf_mutex); -+ rtwdev->total_sta_assoc = 0; -+ -+ INIT_WORK(&rtwdev->c2h_work, rtw89_fw_c2h_work); -+ skb_queue_head_init(&rtwdev->c2h_queue); -+ rtw89_core_ppdu_sts_init(rtwdev); -+ rtw89_traffic_stats_init(rtwdev, &rtwdev->stats); -+ -+ rtwdev->ps_mode = rtw89_update_ps_mode(rtwdev); -+ rtwdev->hal.rx_fltr = DEFAULT_AX_RX_FLTR; -+ -+ INIT_WORK(&btc->eapol_notify_work, rtw89_btc_ntfy_eapol_packet_work); -+ INIT_WORK(&btc->arp_notify_work, rtw89_btc_ntfy_arp_packet_work); -+ INIT_WORK(&btc->dhcp_notify_work, rtw89_btc_ntfy_dhcp_packet_work); -+ INIT_WORK(&btc->icmp_notify_work, rtw89_btc_ntfy_icmp_packet_work); -+ -+ ret = rtw89_load_firmware(rtwdev); -+ if (ret) { -+ rtw89_warn(rtwdev, "no firmware loaded\n"); -+ return ret; -+ } -+ rtw89_ser_init(rtwdev); -+ -+ return 0; -+} -+EXPORT_SYMBOL(rtw89_core_init); -+ -+void rtw89_core_deinit(struct rtw89_dev *rtwdev) -+{ -+ rtw89_ser_deinit(rtwdev); -+ rtw89_unload_firmware(rtwdev); -+ rtw89_fw_free_all_early_h2c(rtwdev); -+ -+ destroy_workqueue(rtwdev->txq_wq); -+ mutex_destroy(&rtwdev->rf_mutex); -+ mutex_destroy(&rtwdev->mutex); -+} -+EXPORT_SYMBOL(rtw89_core_deinit); -+ -+static void rtw89_read_chip_ver(struct rtw89_dev *rtwdev) -+{ -+ u8 cv; -+ -+ cv = rtw89_read32_mask(rtwdev, R_AX_SYS_CFG1, B_AX_CHIP_VER_MASK); -+ if (cv <= CHIP_CBV) { -+ if (rtw89_read32(rtwdev, R_AX_GPIO0_7_FUNC_SEL) == RTW89_R32_DEAD) -+ cv = CHIP_CAV; -+ else -+ cv = CHIP_CBV; -+ } -+ -+ rtwdev->hal.cv = cv; -+} -+ -+static int rtw89_chip_efuse_info_setup(struct rtw89_dev *rtwdev) -+{ -+ int ret; -+ -+ ret = rtw89_mac_partial_init(rtwdev); -+ if (ret) -+ return ret; -+ -+ ret = rtw89_parse_efuse_map(rtwdev); -+ if (ret) -+ return ret; -+ -+ ret = rtw89_parse_phycap_map(rtwdev); -+ if (ret) -+ return ret; -+ -+ ret = rtw89_mac_setup_phycap(rtwdev); -+ if (ret) -+ return ret; -+ -+ rtw89_mac_pwr_off(rtwdev); -+ -+ return 0; -+} -+ -+static int rtw89_chip_board_info_setup(struct rtw89_dev *rtwdev) -+{ -+ rtw89_chip_fem_setup(rtwdev); -+ -+ return 0; -+} -+ -+int rtw89_chip_info_setup(struct rtw89_dev *rtwdev) -+{ -+ int ret; -+ -+ rtw89_read_chip_ver(rtwdev); -+ -+ ret = rtw89_wait_firmware_completion(rtwdev); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to wait firmware completion\n"); -+ return ret; -+ } -+ -+ ret = rtw89_fw_recognize(rtwdev); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to recognize firmware\n"); -+ return ret; -+ } -+ -+ ret = rtw89_chip_efuse_info_setup(rtwdev); -+ if (ret) -+ return ret; -+ -+ ret = rtw89_chip_board_info_setup(rtwdev); -+ if (ret) -+ return ret; -+ -+ return 0; -+} -+EXPORT_SYMBOL(rtw89_chip_info_setup); -+ -+static int rtw89_core_register_hw(struct rtw89_dev *rtwdev) -+{ -+ struct ieee80211_hw *hw = rtwdev->hw; -+ struct rtw89_efuse *efuse = &rtwdev->efuse; -+ int ret; -+ int tx_headroom = IEEE80211_HT_CTL_LEN; -+ -+ hw->vif_data_size = sizeof(struct rtw89_vif); -+ hw->sta_data_size = sizeof(struct rtw89_sta); -+ hw->txq_data_size = sizeof(struct rtw89_txq); -+ -+ SET_IEEE80211_PERM_ADDR(hw, efuse->addr); -+ -+ hw->extra_tx_headroom = tx_headroom; -+ hw->queues = IEEE80211_NUM_ACS; -+ hw->max_rx_aggregation_subframes = RTW89_MAX_RX_AGG_NUM; -+ hw->max_tx_aggregation_subframes = RTW89_MAX_TX_AGG_NUM; -+ -+ ieee80211_hw_set(hw, SIGNAL_DBM); -+ ieee80211_hw_set(hw, HAS_RATE_CONTROL); -+ ieee80211_hw_set(hw, MFP_CAPABLE); -+ ieee80211_hw_set(hw, REPORTS_TX_ACK_STATUS); -+ ieee80211_hw_set(hw, AMPDU_AGGREGATION); -+ ieee80211_hw_set(hw, RX_INCLUDES_FCS); -+ ieee80211_hw_set(hw, TX_AMSDU); -+ ieee80211_hw_set(hw, SUPPORT_FAST_XMIT); -+ ieee80211_hw_set(hw, SUPPORTS_AMSDU_IN_AMPDU); -+ ieee80211_hw_set(hw, SUPPORTS_PS); -+ ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS); -+ -+ hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION); -+ hw->wiphy->available_antennas_tx = BIT(rtwdev->chip->rf_path_num) - 1; -+ hw->wiphy->available_antennas_rx = BIT(rtwdev->chip->rf_path_num) - 1; -+ -+ hw->wiphy->features |= NL80211_FEATURE_SCAN_RANDOM_MAC_ADDR; -+ -+ wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_CAN_REPLACE_PTK0); -+ -+ ret = rtw89_core_set_supported_band(rtwdev); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to set supported band\n"); -+ return ret; -+ } -+ -+ hw->wiphy->reg_notifier = rtw89_regd_notifier; -+ hw->wiphy->sar_capa = &rtw89_sar_capa; -+ -+ ret = ieee80211_register_hw(hw); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to register hw\n"); -+ goto err; -+ } -+ -+ ret = rtw89_regd_init(rtwdev, rtw89_regd_notifier); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to init regd\n"); -+ goto err; -+ } -+ -+ return 0; -+ -+err: -+ return ret; -+} -+ -+static void rtw89_core_unregister_hw(struct rtw89_dev *rtwdev) -+{ -+ struct ieee80211_hw *hw = rtwdev->hw; -+ -+ ieee80211_unregister_hw(hw); -+ rtw89_core_clr_supported_band(rtwdev); -+} -+ -+int rtw89_core_register(struct rtw89_dev *rtwdev) -+{ -+ int ret; -+ -+ ret = rtw89_core_register_hw(rtwdev); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to register core hw\n"); -+ return ret; -+ } -+ -+ rtw89_debugfs_init(rtwdev); -+ -+ return 0; -+} -+EXPORT_SYMBOL(rtw89_core_register); -+ -+void rtw89_core_unregister(struct rtw89_dev *rtwdev) -+{ -+ rtw89_core_unregister_hw(rtwdev); -+} -+EXPORT_SYMBOL(rtw89_core_unregister); -+ -+MODULE_AUTHOR("Realtek Corporation"); -+MODULE_DESCRIPTION("Realtek 802.11ax wireless core module"); -+MODULE_LICENSE("Dual BSD/GPL"); -diff --git a/drivers/net/wireless/realtek/rtw89/core.h b/drivers/net/wireless/realtek/rtw89/core.h -new file mode 100644 -index 000000000000..c2885e4dd882 ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -0,0 +1,3384 @@ -+/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ -+/* Copyright(c) 2019-2020 Realtek Corporation -+ */ -+ -+#ifndef __RTW89_CORE_H__ -+#define __RTW89_CORE_H__ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+struct rtw89_dev; -+ -+extern const struct ieee80211_ops rtw89_ops; -+extern const struct rtw89_chip_info rtw8852a_chip_info; -+ -+#define MASKBYTE0 0xff -+#define MASKBYTE1 0xff00 -+#define MASKBYTE2 0xff0000 -+#define MASKBYTE3 0xff000000 -+#define MASKBYTE4 0xff00000000ULL -+#define MASKHWORD 0xffff0000 -+#define MASKLWORD 0x0000ffff -+#define MASKDWORD 0xffffffff -+#define RFREG_MASK 0xfffff -+#define INV_RF_DATA 0xffffffff -+ -+#define RTW89_TRACK_WORK_PERIOD round_jiffies_relative(HZ * 2) -+#define CFO_TRACK_MAX_USER 64 -+#define MAX_RSSI 110 -+#define RSSI_FACTOR 1 -+#define RTW89_RSSI_RAW_TO_DBM(rssi) ((s8)((rssi) >> RSSI_FACTOR) - MAX_RSSI) -+#define RTW89_MAX_HW_PORT_NUM 5 -+ -+#define RTW89_HTC_MASK_VARIANT GENMASK(1, 0) -+#define RTW89_HTC_VARIANT_HE 3 -+#define RTW89_HTC_MASK_CTL_ID GENMASK(5, 2) -+#define RTW89_HTC_VARIANT_HE_CID_OM 1 -+#define RTW89_HTC_VARIANT_HE_CID_CAS 6 -+#define RTW89_HTC_MASK_CTL_INFO GENMASK(31, 6) -+ -+#define RTW89_HTC_MASK_HTC_OM_RX_NSS GENMASK(8, 6) -+enum htc_om_channel_width { -+ HTC_OM_CHANNEL_WIDTH_20 = 0, -+ HTC_OM_CHANNEL_WIDTH_40 = 1, -+ HTC_OM_CHANNEL_WIDTH_80 = 2, -+ HTC_OM_CHANNEL_WIDTH_160_OR_80_80 = 3, -+}; -+#define RTW89_HTC_MASK_HTC_OM_CH_WIDTH GENMASK(10, 9) -+#define RTW89_HTC_MASK_HTC_OM_UL_MU_DIS BIT(11) -+#define RTW89_HTC_MASK_HTC_OM_TX_NSTS GENMASK(14, 12) -+#define RTW89_HTC_MASK_HTC_OM_ER_SU_DIS BIT(15) -+#define RTW89_HTC_MASK_HTC_OM_DL_MU_MIMO_RR BIT(16) -+#define RTW89_HTC_MASK_HTC_OM_UL_MU_DATA_DIS BIT(17) -+ -+enum rtw89_subband { -+ RTW89_CH_2G = 0, -+ RTW89_CH_5G_BAND_1 = 1, -+ /* RTW89_CH_5G_BAND_2 = 2, unused */ -+ RTW89_CH_5G_BAND_3 = 3, -+ RTW89_CH_5G_BAND_4 = 4, -+ -+ RTW89_SUBBAND_NR, -+}; -+ -+enum rtw89_hci_type { -+ RTW89_HCI_TYPE_PCIE, -+ RTW89_HCI_TYPE_USB, -+ RTW89_HCI_TYPE_SDIO, -+}; -+ -+enum rtw89_core_chip_id { -+ RTL8852A, -+ RTL8852B, -+ RTL8852C, -+}; -+ -+enum rtw89_cv { -+ CHIP_CAV, -+ CHIP_CBV, -+ CHIP_CCV, -+ CHIP_CDV, -+ CHIP_CEV, -+ CHIP_CFV, -+ CHIP_CV_MAX, -+ CHIP_CV_INVALID = CHIP_CV_MAX, -+}; -+ -+enum rtw89_core_tx_type { -+ RTW89_CORE_TX_TYPE_DATA, -+ RTW89_CORE_TX_TYPE_MGMT, -+ RTW89_CORE_TX_TYPE_FWCMD, -+}; -+ -+enum rtw89_core_rx_type { -+ RTW89_CORE_RX_TYPE_WIFI = 0, -+ RTW89_CORE_RX_TYPE_PPDU_STAT = 1, -+ RTW89_CORE_RX_TYPE_CHAN_INFO = 2, -+ RTW89_CORE_RX_TYPE_BB_SCOPE = 3, -+ RTW89_CORE_RX_TYPE_F2P_TXCMD = 4, -+ RTW89_CORE_RX_TYPE_SS2FW = 5, -+ RTW89_CORE_RX_TYPE_TX_REPORT = 6, -+ RTW89_CORE_RX_TYPE_TX_REL_HOST = 7, -+ RTW89_CORE_RX_TYPE_DFS_REPORT = 8, -+ RTW89_CORE_RX_TYPE_TX_REL_CPU = 9, -+ RTW89_CORE_RX_TYPE_C2H = 10, -+ RTW89_CORE_RX_TYPE_CSI = 11, -+ RTW89_CORE_RX_TYPE_CQI = 12, -+}; -+ -+enum rtw89_txq_flags { -+ RTW89_TXQ_F_AMPDU = 0, -+ RTW89_TXQ_F_BLOCK_BA = 1, -+}; -+ -+enum rtw89_net_type { -+ RTW89_NET_TYPE_NO_LINK = 0, -+ RTW89_NET_TYPE_AD_HOC = 1, -+ RTW89_NET_TYPE_INFRA = 2, -+ RTW89_NET_TYPE_AP_MODE = 3, -+}; -+ -+enum rtw89_wifi_role { -+ RTW89_WIFI_ROLE_NONE, -+ RTW89_WIFI_ROLE_STATION, -+ RTW89_WIFI_ROLE_AP, -+ RTW89_WIFI_ROLE_AP_VLAN, -+ RTW89_WIFI_ROLE_ADHOC, -+ RTW89_WIFI_ROLE_ADHOC_MASTER, -+ RTW89_WIFI_ROLE_MESH_POINT, -+ RTW89_WIFI_ROLE_MONITOR, -+ RTW89_WIFI_ROLE_P2P_DEVICE, -+ RTW89_WIFI_ROLE_P2P_CLIENT, -+ RTW89_WIFI_ROLE_P2P_GO, -+ RTW89_WIFI_ROLE_NAN, -+ RTW89_WIFI_ROLE_MLME_MAX -+}; -+ -+enum rtw89_upd_mode { -+ RTW89_VIF_CREATE, -+ RTW89_VIF_REMOVE, -+ RTW89_VIF_TYPE_CHANGE, -+ RTW89_VIF_INFO_CHANGE, -+ RTW89_VIF_CON_DISCONN -+}; -+ -+enum rtw89_self_role { -+ RTW89_SELF_ROLE_CLIENT, -+ RTW89_SELF_ROLE_AP, -+ RTW89_SELF_ROLE_AP_CLIENT -+}; -+ -+enum rtw89_msk_sO_el { -+ RTW89_NO_MSK, -+ RTW89_SMA, -+ RTW89_TMA, -+ RTW89_BSSID -+}; -+ -+enum rtw89_sch_tx_sel { -+ RTW89_SCH_TX_SEL_ALL, -+ RTW89_SCH_TX_SEL_HIQ, -+ RTW89_SCH_TX_SEL_MG0, -+ RTW89_SCH_TX_SEL_MACID, -+}; -+ -+/* RTW89_ADDR_CAM_SEC_NONE : not enabled -+ * RTW89_ADDR_CAM_SEC_ALL_UNI : 0 - 6 unicast -+ * RTW89_ADDR_CAM_SEC_NORMAL : 0 - 1 unicast, 2 - 4 group, 5 - 6 BIP -+ * RTW89_ADDR_CAM_SEC_4GROUP : 0 - 1 unicast, 2 - 5 group, 6 BIP -+ */ -+enum rtw89_add_cam_sec_mode { -+ RTW89_ADDR_CAM_SEC_NONE = 0, -+ RTW89_ADDR_CAM_SEC_ALL_UNI = 1, -+ RTW89_ADDR_CAM_SEC_NORMAL = 2, -+ RTW89_ADDR_CAM_SEC_4GROUP = 3, -+}; -+ -+enum rtw89_sec_key_type { -+ RTW89_SEC_KEY_TYPE_NONE = 0, -+ RTW89_SEC_KEY_TYPE_WEP40 = 1, -+ RTW89_SEC_KEY_TYPE_WEP104 = 2, -+ RTW89_SEC_KEY_TYPE_TKIP = 3, -+ RTW89_SEC_KEY_TYPE_WAPI = 4, -+ RTW89_SEC_KEY_TYPE_GCMSMS4 = 5, -+ RTW89_SEC_KEY_TYPE_CCMP128 = 6, -+ RTW89_SEC_KEY_TYPE_CCMP256 = 7, -+ RTW89_SEC_KEY_TYPE_GCMP128 = 8, -+ RTW89_SEC_KEY_TYPE_GCMP256 = 9, -+ RTW89_SEC_KEY_TYPE_BIP_CCMP128 = 10, -+}; -+ -+enum rtw89_port { -+ RTW89_PORT_0 = 0, -+ RTW89_PORT_1 = 1, -+ RTW89_PORT_2 = 2, -+ RTW89_PORT_3 = 3, -+ RTW89_PORT_4 = 4, -+ RTW89_PORT_NUM -+}; -+ -+enum rtw89_band { -+ RTW89_BAND_2G = 0, -+ RTW89_BAND_5G = 1, -+ RTW89_BAND_MAX, -+}; -+ -+enum rtw89_hw_rate { -+ RTW89_HW_RATE_CCK1 = 0x0, -+ RTW89_HW_RATE_CCK2 = 0x1, -+ RTW89_HW_RATE_CCK5_5 = 0x2, -+ RTW89_HW_RATE_CCK11 = 0x3, -+ RTW89_HW_RATE_OFDM6 = 0x4, -+ RTW89_HW_RATE_OFDM9 = 0x5, -+ RTW89_HW_RATE_OFDM12 = 0x6, -+ RTW89_HW_RATE_OFDM18 = 0x7, -+ RTW89_HW_RATE_OFDM24 = 0x8, -+ RTW89_HW_RATE_OFDM36 = 0x9, -+ RTW89_HW_RATE_OFDM48 = 0xA, -+ RTW89_HW_RATE_OFDM54 = 0xB, -+ RTW89_HW_RATE_MCS0 = 0x80, -+ RTW89_HW_RATE_MCS1 = 0x81, -+ RTW89_HW_RATE_MCS2 = 0x82, -+ RTW89_HW_RATE_MCS3 = 0x83, -+ RTW89_HW_RATE_MCS4 = 0x84, -+ RTW89_HW_RATE_MCS5 = 0x85, -+ RTW89_HW_RATE_MCS6 = 0x86, -+ RTW89_HW_RATE_MCS7 = 0x87, -+ RTW89_HW_RATE_MCS8 = 0x88, -+ RTW89_HW_RATE_MCS9 = 0x89, -+ RTW89_HW_RATE_MCS10 = 0x8A, -+ RTW89_HW_RATE_MCS11 = 0x8B, -+ RTW89_HW_RATE_MCS12 = 0x8C, -+ RTW89_HW_RATE_MCS13 = 0x8D, -+ RTW89_HW_RATE_MCS14 = 0x8E, -+ RTW89_HW_RATE_MCS15 = 0x8F, -+ RTW89_HW_RATE_MCS16 = 0x90, -+ RTW89_HW_RATE_MCS17 = 0x91, -+ RTW89_HW_RATE_MCS18 = 0x92, -+ RTW89_HW_RATE_MCS19 = 0x93, -+ RTW89_HW_RATE_MCS20 = 0x94, -+ RTW89_HW_RATE_MCS21 = 0x95, -+ RTW89_HW_RATE_MCS22 = 0x96, -+ RTW89_HW_RATE_MCS23 = 0x97, -+ RTW89_HW_RATE_MCS24 = 0x98, -+ RTW89_HW_RATE_MCS25 = 0x99, -+ RTW89_HW_RATE_MCS26 = 0x9A, -+ RTW89_HW_RATE_MCS27 = 0x9B, -+ RTW89_HW_RATE_MCS28 = 0x9C, -+ RTW89_HW_RATE_MCS29 = 0x9D, -+ RTW89_HW_RATE_MCS30 = 0x9E, -+ RTW89_HW_RATE_MCS31 = 0x9F, -+ RTW89_HW_RATE_VHT_NSS1_MCS0 = 0x100, -+ RTW89_HW_RATE_VHT_NSS1_MCS1 = 0x101, -+ RTW89_HW_RATE_VHT_NSS1_MCS2 = 0x102, -+ RTW89_HW_RATE_VHT_NSS1_MCS3 = 0x103, -+ RTW89_HW_RATE_VHT_NSS1_MCS4 = 0x104, -+ RTW89_HW_RATE_VHT_NSS1_MCS5 = 0x105, -+ RTW89_HW_RATE_VHT_NSS1_MCS6 = 0x106, -+ RTW89_HW_RATE_VHT_NSS1_MCS7 = 0x107, -+ RTW89_HW_RATE_VHT_NSS1_MCS8 = 0x108, -+ RTW89_HW_RATE_VHT_NSS1_MCS9 = 0x109, -+ RTW89_HW_RATE_VHT_NSS2_MCS0 = 0x110, -+ RTW89_HW_RATE_VHT_NSS2_MCS1 = 0x111, -+ RTW89_HW_RATE_VHT_NSS2_MCS2 = 0x112, -+ RTW89_HW_RATE_VHT_NSS2_MCS3 = 0x113, -+ RTW89_HW_RATE_VHT_NSS2_MCS4 = 0x114, -+ RTW89_HW_RATE_VHT_NSS2_MCS5 = 0x115, -+ RTW89_HW_RATE_VHT_NSS2_MCS6 = 0x116, -+ RTW89_HW_RATE_VHT_NSS2_MCS7 = 0x117, -+ RTW89_HW_RATE_VHT_NSS2_MCS8 = 0x118, -+ RTW89_HW_RATE_VHT_NSS2_MCS9 = 0x119, -+ RTW89_HW_RATE_VHT_NSS3_MCS0 = 0x120, -+ RTW89_HW_RATE_VHT_NSS3_MCS1 = 0x121, -+ RTW89_HW_RATE_VHT_NSS3_MCS2 = 0x122, -+ RTW89_HW_RATE_VHT_NSS3_MCS3 = 0x123, -+ RTW89_HW_RATE_VHT_NSS3_MCS4 = 0x124, -+ RTW89_HW_RATE_VHT_NSS3_MCS5 = 0x125, -+ RTW89_HW_RATE_VHT_NSS3_MCS6 = 0x126, -+ RTW89_HW_RATE_VHT_NSS3_MCS7 = 0x127, -+ RTW89_HW_RATE_VHT_NSS3_MCS8 = 0x128, -+ RTW89_HW_RATE_VHT_NSS3_MCS9 = 0x129, -+ RTW89_HW_RATE_VHT_NSS4_MCS0 = 0x130, -+ RTW89_HW_RATE_VHT_NSS4_MCS1 = 0x131, -+ RTW89_HW_RATE_VHT_NSS4_MCS2 = 0x132, -+ RTW89_HW_RATE_VHT_NSS4_MCS3 = 0x133, -+ RTW89_HW_RATE_VHT_NSS4_MCS4 = 0x134, -+ RTW89_HW_RATE_VHT_NSS4_MCS5 = 0x135, -+ RTW89_HW_RATE_VHT_NSS4_MCS6 = 0x136, -+ RTW89_HW_RATE_VHT_NSS4_MCS7 = 0x137, -+ RTW89_HW_RATE_VHT_NSS4_MCS8 = 0x138, -+ RTW89_HW_RATE_VHT_NSS4_MCS9 = 0x139, -+ RTW89_HW_RATE_HE_NSS1_MCS0 = 0x180, -+ RTW89_HW_RATE_HE_NSS1_MCS1 = 0x181, -+ RTW89_HW_RATE_HE_NSS1_MCS2 = 0x182, -+ RTW89_HW_RATE_HE_NSS1_MCS3 = 0x183, -+ RTW89_HW_RATE_HE_NSS1_MCS4 = 0x184, -+ RTW89_HW_RATE_HE_NSS1_MCS5 = 0x185, -+ RTW89_HW_RATE_HE_NSS1_MCS6 = 0x186, -+ RTW89_HW_RATE_HE_NSS1_MCS7 = 0x187, -+ RTW89_HW_RATE_HE_NSS1_MCS8 = 0x188, -+ RTW89_HW_RATE_HE_NSS1_MCS9 = 0x189, -+ RTW89_HW_RATE_HE_NSS1_MCS10 = 0x18A, -+ RTW89_HW_RATE_HE_NSS1_MCS11 = 0x18B, -+ RTW89_HW_RATE_HE_NSS2_MCS0 = 0x190, -+ RTW89_HW_RATE_HE_NSS2_MCS1 = 0x191, -+ RTW89_HW_RATE_HE_NSS2_MCS2 = 0x192, -+ RTW89_HW_RATE_HE_NSS2_MCS3 = 0x193, -+ RTW89_HW_RATE_HE_NSS2_MCS4 = 0x194, -+ RTW89_HW_RATE_HE_NSS2_MCS5 = 0x195, -+ RTW89_HW_RATE_HE_NSS2_MCS6 = 0x196, -+ RTW89_HW_RATE_HE_NSS2_MCS7 = 0x197, -+ RTW89_HW_RATE_HE_NSS2_MCS8 = 0x198, -+ RTW89_HW_RATE_HE_NSS2_MCS9 = 0x199, -+ RTW89_HW_RATE_HE_NSS2_MCS10 = 0x19A, -+ RTW89_HW_RATE_HE_NSS2_MCS11 = 0x19B, -+ RTW89_HW_RATE_HE_NSS3_MCS0 = 0x1A0, -+ RTW89_HW_RATE_HE_NSS3_MCS1 = 0x1A1, -+ RTW89_HW_RATE_HE_NSS3_MCS2 = 0x1A2, -+ RTW89_HW_RATE_HE_NSS3_MCS3 = 0x1A3, -+ RTW89_HW_RATE_HE_NSS3_MCS4 = 0x1A4, -+ RTW89_HW_RATE_HE_NSS3_MCS5 = 0x1A5, -+ RTW89_HW_RATE_HE_NSS3_MCS6 = 0x1A6, -+ RTW89_HW_RATE_HE_NSS3_MCS7 = 0x1A7, -+ RTW89_HW_RATE_HE_NSS3_MCS8 = 0x1A8, -+ RTW89_HW_RATE_HE_NSS3_MCS9 = 0x1A9, -+ RTW89_HW_RATE_HE_NSS3_MCS10 = 0x1AA, -+ RTW89_HW_RATE_HE_NSS3_MCS11 = 0x1AB, -+ RTW89_HW_RATE_HE_NSS4_MCS0 = 0x1B0, -+ RTW89_HW_RATE_HE_NSS4_MCS1 = 0x1B1, -+ RTW89_HW_RATE_HE_NSS4_MCS2 = 0x1B2, -+ RTW89_HW_RATE_HE_NSS4_MCS3 = 0x1B3, -+ RTW89_HW_RATE_HE_NSS4_MCS4 = 0x1B4, -+ RTW89_HW_RATE_HE_NSS4_MCS5 = 0x1B5, -+ RTW89_HW_RATE_HE_NSS4_MCS6 = 0x1B6, -+ RTW89_HW_RATE_HE_NSS4_MCS7 = 0x1B7, -+ RTW89_HW_RATE_HE_NSS4_MCS8 = 0x1B8, -+ RTW89_HW_RATE_HE_NSS4_MCS9 = 0x1B9, -+ RTW89_HW_RATE_HE_NSS4_MCS10 = 0x1BA, -+ RTW89_HW_RATE_HE_NSS4_MCS11 = 0x1BB, -+ RTW89_HW_RATE_NR, -+ -+ RTW89_HW_RATE_MASK_MOD = GENMASK(8, 7), -+ RTW89_HW_RATE_MASK_VAL = GENMASK(6, 0), -+}; -+ -+/* 2G channels, -+ * 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14 -+ */ -+#define RTW89_2G_CH_NUM 14 -+ -+/* 5G channels, -+ * 36, 38, 40, 42, 44, 46, 48, 50, -+ * 52, 54, 56, 58, 60, 62, 64, -+ * 100, 102, 104, 106, 108, 110, 112, 114, -+ * 116, 118, 120, 122, 124, 126, 128, 130, -+ * 132, 134, 136, 138, 140, 142, 144, -+ * 149, 151, 153, 155, 157, 159, 161, 163, -+ * 165, 167, 169, 171, 173, 175, 177 -+ */ -+#define RTW89_5G_CH_NUM 53 -+ -+enum rtw89_rate_section { -+ RTW89_RS_CCK, -+ RTW89_RS_OFDM, -+ RTW89_RS_MCS, /* for HT/VHT/HE */ -+ RTW89_RS_HEDCM, -+ RTW89_RS_OFFSET, -+ RTW89_RS_MAX, -+ RTW89_RS_LMT_NUM = RTW89_RS_MCS + 1, -+}; -+ -+enum rtw89_rate_max { -+ RTW89_RATE_CCK_MAX = 4, -+ RTW89_RATE_OFDM_MAX = 8, -+ RTW89_RATE_MCS_MAX = 12, -+ RTW89_RATE_HEDCM_MAX = 4, /* for HEDCM MCS0/1/3/4 */ -+ RTW89_RATE_OFFSET_MAX = 5, /* for HE(HEDCM)/VHT/HT/OFDM/CCK offset */ -+}; -+ -+enum rtw89_nss { -+ RTW89_NSS_1 = 0, -+ RTW89_NSS_2 = 1, -+ /* HE DCM only support 1ss and 2ss */ -+ RTW89_NSS_HEDCM_MAX = RTW89_NSS_2 + 1, -+ RTW89_NSS_3 = 2, -+ RTW89_NSS_4 = 3, -+ RTW89_NSS_MAX, -+}; -+ -+enum rtw89_ntx { -+ RTW89_1TX = 0, -+ RTW89_2TX = 1, -+ RTW89_NTX_NUM, -+}; -+ -+enum rtw89_beamforming_type { -+ RTW89_NONBF = 0, -+ RTW89_BF = 1, -+ RTW89_BF_NUM, -+}; -+ -+enum rtw89_regulation_type { -+ RTW89_WW = 0, -+ RTW89_ETSI = 1, -+ RTW89_FCC = 2, -+ RTW89_MKK = 3, -+ RTW89_NA = 4, -+ RTW89_IC = 5, -+ RTW89_KCC = 6, -+ RTW89_NCC = 7, -+ RTW89_CHILE = 8, -+ RTW89_ACMA = 9, -+ RTW89_MEXICO = 10, -+ RTW89_UKRAINE = 11, -+ RTW89_CN = 12, -+ RTW89_REGD_NUM, -+}; -+ -+extern const u8 rtw89_rs_idx_max[RTW89_RS_MAX]; -+extern const u8 rtw89_rs_nss_max[RTW89_RS_MAX]; -+ -+struct rtw89_txpwr_byrate { -+ s8 cck[RTW89_RATE_CCK_MAX]; -+ s8 ofdm[RTW89_RATE_OFDM_MAX]; -+ s8 mcs[RTW89_NSS_MAX][RTW89_RATE_MCS_MAX]; -+ s8 hedcm[RTW89_NSS_HEDCM_MAX][RTW89_RATE_HEDCM_MAX]; -+ s8 offset[RTW89_RATE_OFFSET_MAX]; -+}; -+ -+enum rtw89_bandwidth_section_num { -+ RTW89_BW20_SEC_NUM = 8, -+ RTW89_BW40_SEC_NUM = 4, -+ RTW89_BW80_SEC_NUM = 2, -+}; -+ -+struct rtw89_txpwr_limit { -+ s8 cck_20m[RTW89_BF_NUM]; -+ s8 cck_40m[RTW89_BF_NUM]; -+ s8 ofdm[RTW89_BF_NUM]; -+ s8 mcs_20m[RTW89_BW20_SEC_NUM][RTW89_BF_NUM]; -+ s8 mcs_40m[RTW89_BW40_SEC_NUM][RTW89_BF_NUM]; -+ s8 mcs_80m[RTW89_BW80_SEC_NUM][RTW89_BF_NUM]; -+ s8 mcs_160m[RTW89_BF_NUM]; -+ s8 mcs_40m_0p5[RTW89_BF_NUM]; -+ s8 mcs_40m_2p5[RTW89_BF_NUM]; -+}; -+ -+#define RTW89_RU_SEC_NUM 8 -+ -+struct rtw89_txpwr_limit_ru { -+ s8 ru26[RTW89_RU_SEC_NUM]; -+ s8 ru52[RTW89_RU_SEC_NUM]; -+ s8 ru106[RTW89_RU_SEC_NUM]; -+}; -+ -+struct rtw89_rate_desc { -+ enum rtw89_nss nss; -+ enum rtw89_rate_section rs; -+ u8 idx; -+}; -+ -+#define PHY_STS_HDR_LEN 8 -+#define RF_PATH_MAX 4 -+#define RTW89_MAX_PPDU_CNT 8 -+struct rtw89_rx_phy_ppdu { -+ u8 *buf; -+ u32 len; -+ u8 rssi_avg; -+ s8 rssi[RF_PATH_MAX]; -+ u8 mac_id; -+ bool to_self; -+ bool valid; -+}; -+ -+enum rtw89_mac_idx { -+ RTW89_MAC_0 = 0, -+ RTW89_MAC_1 = 1, -+}; -+ -+enum rtw89_phy_idx { -+ RTW89_PHY_0 = 0, -+ RTW89_PHY_1 = 1, -+ RTW89_PHY_MAX -+}; -+ -+enum rtw89_rf_path { -+ RF_PATH_A = 0, -+ RF_PATH_B = 1, -+ RF_PATH_C = 2, -+ RF_PATH_D = 3, -+ RF_PATH_AB, -+ RF_PATH_AC, -+ RF_PATH_AD, -+ RF_PATH_BC, -+ RF_PATH_BD, -+ RF_PATH_CD, -+ RF_PATH_ABC, -+ RF_PATH_ABD, -+ RF_PATH_ACD, -+ RF_PATH_BCD, -+ RF_PATH_ABCD, -+}; -+ -+enum rtw89_rf_path_bit { -+ RF_A = BIT(0), -+ RF_B = BIT(1), -+ RF_C = BIT(2), -+ RF_D = BIT(3), -+ -+ RF_AB = (RF_A | RF_B), -+ RF_AC = (RF_A | RF_C), -+ RF_AD = (RF_A | RF_D), -+ RF_BC = (RF_B | RF_C), -+ RF_BD = (RF_B | RF_D), -+ RF_CD = (RF_C | RF_D), -+ -+ RF_ABC = (RF_A | RF_B | RF_C), -+ RF_ABD = (RF_A | RF_B | RF_D), -+ RF_ACD = (RF_A | RF_C | RF_D), -+ RF_BCD = (RF_B | RF_C | RF_D), -+ -+ RF_ABCD = (RF_A | RF_B | RF_C | RF_D), -+}; -+ -+enum rtw89_bandwidth { -+ RTW89_CHANNEL_WIDTH_20 = 0, -+ RTW89_CHANNEL_WIDTH_40 = 1, -+ RTW89_CHANNEL_WIDTH_80 = 2, -+ RTW89_CHANNEL_WIDTH_160 = 3, -+ RTW89_CHANNEL_WIDTH_80_80 = 4, -+ RTW89_CHANNEL_WIDTH_5 = 5, -+ RTW89_CHANNEL_WIDTH_10 = 6, -+}; -+ -+enum rtw89_ps_mode { -+ RTW89_PS_MODE_NONE = 0, -+ RTW89_PS_MODE_RFOFF = 1, -+ RTW89_PS_MODE_CLK_GATED = 2, -+ RTW89_PS_MODE_PWR_GATED = 3, -+}; -+ -+#define RTW89_MAX_CHANNEL_WIDTH RTW89_CHANNEL_WIDTH_80 -+#define RTW89_2G_BW_NUM (RTW89_CHANNEL_WIDTH_40 + 1) -+#define RTW89_5G_BW_NUM (RTW89_CHANNEL_WIDTH_80 + 1) -+#define RTW89_PPE_BW_NUM (RTW89_CHANNEL_WIDTH_80 + 1) -+ -+enum rtw89_ru_bandwidth { -+ RTW89_RU26 = 0, -+ RTW89_RU52 = 1, -+ RTW89_RU106 = 2, -+ RTW89_RU_NUM, -+}; -+ -+enum rtw89_sc_offset { -+ RTW89_SC_DONT_CARE = 0, -+ RTW89_SC_20_UPPER = 1, -+ RTW89_SC_20_LOWER = 2, -+ RTW89_SC_20_UPMOST = 3, -+ RTW89_SC_20_LOWEST = 4, -+ RTW89_SC_40_UPPER = 9, -+ RTW89_SC_40_LOWER = 10, -+}; -+ -+struct rtw89_channel_params { -+ u8 center_chan; -+ u8 primary_chan; -+ u8 bandwidth; -+ u8 pri_ch_idx; -+ u8 cch_by_bw[RTW89_MAX_CHANNEL_WIDTH + 1]; -+}; -+ -+struct rtw89_channel_help_params { -+ u16 tx_en; -+}; -+ -+struct rtw89_port_reg { -+ u32 port_cfg; -+ u32 tbtt_prohib; -+ u32 bcn_area; -+ u32 bcn_early; -+ u32 tbtt_early; -+ u32 tbtt_agg; -+ u32 bcn_space; -+ u32 bcn_forcetx; -+ u32 bcn_err_cnt; -+ u32 bcn_err_flag; -+ u32 dtim_ctrl; -+ u32 tbtt_shift; -+ u32 bcn_cnt_tmr; -+ u32 tsftr_l; -+ u32 tsftr_h; -+}; -+ -+struct rtw89_txwd_body { -+ __le32 dword0; -+ __le32 dword1; -+ __le32 dword2; -+ __le32 dword3; -+ __le32 dword4; -+ __le32 dword5; -+} __packed; -+ -+struct rtw89_txwd_info { -+ __le32 dword0; -+ __le32 dword1; -+ __le32 dword2; -+ __le32 dword3; -+ __le32 dword4; -+ __le32 dword5; -+} __packed; -+ -+struct rtw89_rx_desc_info { -+ u16 pkt_size; -+ u8 pkt_type; -+ u8 drv_info_size; -+ u8 shift; -+ u8 wl_hd_iv_len; -+ bool long_rxdesc; -+ bool bb_sel; -+ bool mac_info_valid; -+ u16 data_rate; -+ u8 gi_ltf; -+ u8 bw; -+ u32 free_run_cnt; -+ u8 user_id; -+ bool sr_en; -+ u8 ppdu_cnt; -+ u8 ppdu_type; -+ bool icv_err; -+ bool crc32_err; -+ bool hw_dec; -+ bool sw_dec; -+ bool addr1_match; -+ u8 frag; -+ u16 seq; -+ u8 frame_type; -+ u8 rx_pl_id; -+ bool addr_cam_valid; -+ u8 addr_cam_id; -+ u8 sec_cam_id; -+ u8 mac_id; -+ u16 offset; -+ bool ready; -+}; -+ -+struct rtw89_rxdesc_short { -+ __le32 dword0; -+ __le32 dword1; -+ __le32 dword2; -+ __le32 dword3; -+} __packed; -+ -+struct rtw89_rxdesc_long { -+ __le32 dword0; -+ __le32 dword1; -+ __le32 dword2; -+ __le32 dword3; -+ __le32 dword4; -+ __le32 dword5; -+ __le32 dword6; -+ __le32 dword7; -+} __packed; -+ -+struct rtw89_tx_desc_info { -+ u16 pkt_size; -+ u8 wp_offset; -+ u8 qsel; -+ u8 ch_dma; -+ u8 hdr_llc_len; -+ bool is_bmc; -+ bool en_wd_info; -+ bool wd_page; -+ bool use_rate; -+ bool dis_data_fb; -+ bool tid_indicate; -+ bool agg_en; -+ bool bk; -+ u8 ampdu_density; -+ u8 ampdu_num; -+ bool sec_en; -+ u8 sec_type; -+ u8 sec_cam_idx; -+ u16 data_rate; -+ u16 data_retry_lowest_rate; -+ bool fw_dl; -+ u16 seq; -+ bool a_ctrl_bsr; -+}; -+ -+struct rtw89_core_tx_request { -+ enum rtw89_core_tx_type tx_type; -+ -+ struct sk_buff *skb; -+ struct ieee80211_vif *vif; -+ struct ieee80211_sta *sta; -+ struct rtw89_tx_desc_info desc_info; -+}; -+ -+struct rtw89_txq { -+ struct list_head list; -+ unsigned long flags; -+ int wait_cnt; -+}; -+ -+struct rtw89_mac_ax_gnt { -+ u8 gnt_bt_sw_en; -+ u8 gnt_bt; -+ u8 gnt_wl_sw_en; -+ u8 gnt_wl; -+}; -+ -+#define RTW89_MAC_AX_COEX_GNT_NR 2 -+struct rtw89_mac_ax_coex_gnt { -+ struct rtw89_mac_ax_gnt band[RTW89_MAC_AX_COEX_GNT_NR]; -+}; -+ -+enum rtw89_btc_ncnt { -+ BTC_NCNT_POWER_ON = 0x0, -+ BTC_NCNT_POWER_OFF, -+ BTC_NCNT_INIT_COEX, -+ BTC_NCNT_SCAN_START, -+ BTC_NCNT_SCAN_FINISH, -+ BTC_NCNT_SPECIAL_PACKET, -+ BTC_NCNT_SWITCH_BAND, -+ BTC_NCNT_RFK_TIMEOUT, -+ BTC_NCNT_SHOW_COEX_INFO, -+ BTC_NCNT_ROLE_INFO, -+ BTC_NCNT_CONTROL, -+ BTC_NCNT_RADIO_STATE, -+ BTC_NCNT_CUSTOMERIZE, -+ BTC_NCNT_WL_RFK, -+ BTC_NCNT_WL_STA, -+ BTC_NCNT_FWINFO, -+ BTC_NCNT_TIMER, -+ BTC_NCNT_NUM -+}; -+ -+enum rtw89_btc_btinfo { -+ BTC_BTINFO_L0 = 0, -+ BTC_BTINFO_L1, -+ BTC_BTINFO_L2, -+ BTC_BTINFO_L3, -+ BTC_BTINFO_H0, -+ BTC_BTINFO_H1, -+ BTC_BTINFO_H2, -+ BTC_BTINFO_H3, -+ BTC_BTINFO_MAX -+}; -+ -+enum rtw89_btc_dcnt { -+ BTC_DCNT_RUN = 0x0, -+ BTC_DCNT_CX_RUNINFO, -+ BTC_DCNT_RPT, -+ BTC_DCNT_RPT_FREEZE, -+ BTC_DCNT_CYCLE, -+ BTC_DCNT_CYCLE_FREEZE, -+ BTC_DCNT_W1, -+ BTC_DCNT_W1_FREEZE, -+ BTC_DCNT_B1, -+ BTC_DCNT_B1_FREEZE, -+ BTC_DCNT_TDMA_NONSYNC, -+ BTC_DCNT_SLOT_NONSYNC, -+ BTC_DCNT_BTCNT_FREEZE, -+ BTC_DCNT_WL_SLOT_DRIFT, -+ BTC_DCNT_WL_STA_LAST, -+ BTC_DCNT_NUM, -+}; -+ -+enum rtw89_btc_wl_state_cnt { -+ BTC_WCNT_SCANAP = 0x0, -+ BTC_WCNT_DHCP, -+ BTC_WCNT_EAPOL, -+ BTC_WCNT_ARP, -+ BTC_WCNT_SCBDUPDATE, -+ BTC_WCNT_RFK_REQ, -+ BTC_WCNT_RFK_GO, -+ BTC_WCNT_RFK_REJECT, -+ BTC_WCNT_RFK_TIMEOUT, -+ BTC_WCNT_CH_UPDATE, -+ BTC_WCNT_NUM -+}; -+ -+enum rtw89_btc_bt_state_cnt { -+ BTC_BCNT_RETRY = 0x0, -+ BTC_BCNT_REINIT, -+ BTC_BCNT_REENABLE, -+ BTC_BCNT_SCBDREAD, -+ BTC_BCNT_RELINK, -+ BTC_BCNT_IGNOWL, -+ BTC_BCNT_INQPAG, -+ BTC_BCNT_INQ, -+ BTC_BCNT_PAGE, -+ BTC_BCNT_ROLESW, -+ BTC_BCNT_AFH, -+ BTC_BCNT_INFOUPDATE, -+ BTC_BCNT_INFOSAME, -+ BTC_BCNT_SCBDUPDATE, -+ BTC_BCNT_HIPRI_TX, -+ BTC_BCNT_HIPRI_RX, -+ BTC_BCNT_LOPRI_TX, -+ BTC_BCNT_LOPRI_RX, -+ BTC_BCNT_RATECHG, -+ BTC_BCNT_NUM -+}; -+ -+enum rtw89_btc_bt_profile { -+ BTC_BT_NOPROFILE = 0, -+ BTC_BT_HFP = BIT(0), -+ BTC_BT_HID = BIT(1), -+ BTC_BT_A2DP = BIT(2), -+ BTC_BT_PAN = BIT(3), -+ BTC_PROFILE_MAX = 4, -+}; -+ -+struct rtw89_btc_ant_info { -+ u8 type; /* shared, dedicated */ -+ u8 num; -+ u8 isolation; -+ -+ u8 single_pos: 1;/* Single antenna at S0 or S1 */ -+ u8 diversity: 1; -+}; -+ -+enum rtw89_tfc_dir { -+ RTW89_TFC_UL, -+ RTW89_TFC_DL, -+}; -+ -+struct rtw89_btc_wl_smap { -+ u32 busy: 1; -+ u32 scan: 1; -+ u32 connecting: 1; -+ u32 roaming: 1; -+ u32 _4way: 1; -+ u32 rf_off: 1; -+ u32 lps: 1; -+ u32 ips: 1; -+ u32 init_ok: 1; -+ u32 traffic_dir : 2; -+ u32 rf_off_pre: 1; -+ u32 lps_pre: 1; -+}; -+ -+enum rtw89_tfc_lv { -+ RTW89_TFC_IDLE, -+ RTW89_TFC_ULTRA_LOW, -+ RTW89_TFC_LOW, -+ RTW89_TFC_MID, -+ RTW89_TFC_HIGH, -+}; -+ -+#define RTW89_TP_SHIFT 18 /* bytes/2s --> Mbps */ -+DECLARE_EWMA(tp, 10, 2); -+ -+struct rtw89_traffic_stats { -+ /* units in bytes */ -+ u64 tx_unicast; -+ u64 rx_unicast; -+ u32 tx_avg_len; -+ u32 rx_avg_len; -+ -+ /* count for packets */ -+ u64 tx_cnt; -+ u64 rx_cnt; -+ -+ /* units in Mbps */ -+ u32 tx_throughput; -+ u32 rx_throughput; -+ u32 tx_throughput_raw; -+ u32 rx_throughput_raw; -+ enum rtw89_tfc_lv tx_tfc_lv; -+ enum rtw89_tfc_lv rx_tfc_lv; -+ struct ewma_tp tx_ewma_tp; -+ struct ewma_tp rx_ewma_tp; -+ -+ u16 tx_rate; -+ u16 rx_rate; -+}; -+ -+struct rtw89_btc_statistic { -+ u8 rssi; /* 0%~110% (dBm = rssi -110) */ -+ struct rtw89_traffic_stats traffic; -+}; -+ -+#define BTC_WL_RSSI_THMAX 4 -+ -+struct rtw89_btc_wl_link_info { -+ struct rtw89_btc_statistic stat; -+ enum rtw89_tfc_dir dir; -+ u8 rssi_state[BTC_WL_RSSI_THMAX]; -+ u8 mac_addr[ETH_ALEN]; -+ u8 busy; -+ u8 ch; -+ u8 bw; -+ u8 band; -+ u8 role; -+ u8 pid; -+ u8 phy; -+ u8 dtim_period; -+ u8 mode; -+ -+ u8 mac_id; -+ u8 tx_retry; -+ -+ u32 bcn_period; -+ u32 busy_t; -+ u32 tx_time; -+ u32 client_cnt; -+ u32 rx_rate_drop_cnt; -+ -+ u32 active: 1; -+ u32 noa: 1; -+ u32 client_ps: 1; -+ u32 connected: 2; -+}; -+ -+union rtw89_btc_wl_state_map { -+ u32 val; -+ struct rtw89_btc_wl_smap map; -+}; -+ -+struct rtw89_btc_bt_hfp_desc { -+ u32 exist: 1; -+ u32 type: 2; -+ u32 rsvd: 29; -+}; -+ -+struct rtw89_btc_bt_hid_desc { -+ u32 exist: 1; -+ u32 slot_info: 2; -+ u32 pair_cnt: 2; -+ u32 type: 8; -+ u32 rsvd: 19; -+}; -+ -+struct rtw89_btc_bt_a2dp_desc { -+ u8 exist: 1; -+ u8 exist_last: 1; -+ u8 play_latency: 1; -+ u8 type: 3; -+ u8 active: 1; -+ u8 sink: 1; -+ -+ u8 bitpool; -+ u16 vendor_id; -+ u32 device_name; -+ u32 flush_time; -+}; -+ -+struct rtw89_btc_bt_pan_desc { -+ u32 exist: 1; -+ u32 type: 1; -+ u32 active: 1; -+ u32 rsvd: 29; -+}; -+ -+struct rtw89_btc_bt_rfk_info { -+ u32 run: 1; -+ u32 req: 1; -+ u32 timeout: 1; -+ u32 rsvd: 29; -+}; -+ -+union rtw89_btc_bt_rfk_info_map { -+ u32 val; -+ struct rtw89_btc_bt_rfk_info map; -+}; -+ -+struct rtw89_btc_bt_ver_info { -+ u32 fw_coex; /* match with which coex_ver */ -+ u32 fw; -+}; -+ -+struct rtw89_btc_bool_sta_chg { -+ u32 now: 1; -+ u32 last: 1; -+ u32 remain: 1; -+ u32 srvd: 29; -+}; -+ -+struct rtw89_btc_u8_sta_chg { -+ u8 now; -+ u8 last; -+ u8 remain; -+ u8 rsvd; -+}; -+ -+struct rtw89_btc_wl_scan_info { -+ u8 band[RTW89_PHY_MAX]; -+ u8 phy_map; -+ u8 rsvd; -+}; -+ -+struct rtw89_btc_wl_dbcc_info { -+ u8 op_band[RTW89_PHY_MAX]; /* op band in each phy */ -+ u8 scan_band[RTW89_PHY_MAX]; /* scan band in each phy */ -+ u8 real_band[RTW89_PHY_MAX]; -+ u8 role[RTW89_PHY_MAX]; /* role in each phy */ -+}; -+ -+struct rtw89_btc_wl_active_role { -+ u8 connected: 1; -+ u8 pid: 3; -+ u8 phy: 1; -+ u8 noa: 1; -+ u8 band: 2; -+ -+ u8 client_ps: 1; -+ u8 bw: 7; -+ -+ u8 role; -+ u8 ch; -+ -+ u16 tx_lvl; -+ u16 rx_lvl; -+ u16 tx_rate; -+ u16 rx_rate; -+}; -+ -+struct rtw89_btc_wl_role_info_bpos { -+ u16 none: 1; -+ u16 station: 1; -+ u16 ap: 1; -+ u16 vap: 1; -+ u16 adhoc: 1; -+ u16 adhoc_master: 1; -+ u16 mesh: 1; -+ u16 moniter: 1; -+ u16 p2p_device: 1; -+ u16 p2p_gc: 1; -+ u16 p2p_go: 1; -+ u16 nan: 1; -+}; -+ -+union rtw89_btc_wl_role_info_map { -+ u16 val; -+ struct rtw89_btc_wl_role_info_bpos role; -+}; -+ -+struct rtw89_btc_wl_role_info { /* struct size must be n*4 bytes */ -+ u8 connect_cnt; -+ u8 link_mode; -+ union rtw89_btc_wl_role_info_map role_map; -+ struct rtw89_btc_wl_active_role active_role[RTW89_MAX_HW_PORT_NUM]; -+}; -+ -+struct rtw89_btc_wl_ver_info { -+ u32 fw_coex; /* match with which coex_ver */ -+ u32 fw; -+ u32 mac; -+ u32 bb; -+ u32 rf; -+}; -+ -+struct rtw89_btc_wl_afh_info { -+ u8 en; -+ u8 ch; -+ u8 bw; -+ u8 rsvd; -+} __packed; -+ -+struct rtw89_btc_wl_rfk_info { -+ u32 state: 2; -+ u32 path_map: 4; -+ u32 phy_map: 2; -+ u32 band: 2; -+ u32 type: 8; -+ u32 rsvd: 14; -+}; -+ -+struct rtw89_btc_bt_smap { -+ u32 connect: 1; -+ u32 ble_connect: 1; -+ u32 acl_busy: 1; -+ u32 sco_busy: 1; -+ u32 mesh_busy: 1; -+ u32 inq_pag: 1; -+}; -+ -+union rtw89_btc_bt_state_map { -+ u32 val; -+ struct rtw89_btc_bt_smap map; -+}; -+ -+#define BTC_BT_RSSI_THMAX 4 -+#define BTC_BT_AFH_GROUP 12 -+ -+struct rtw89_btc_bt_link_info { -+ struct rtw89_btc_u8_sta_chg profile_cnt; -+ struct rtw89_btc_bool_sta_chg multi_link; -+ struct rtw89_btc_bool_sta_chg relink; -+ struct rtw89_btc_bt_hfp_desc hfp_desc; -+ struct rtw89_btc_bt_hid_desc hid_desc; -+ struct rtw89_btc_bt_a2dp_desc a2dp_desc; -+ struct rtw89_btc_bt_pan_desc pan_desc; -+ union rtw89_btc_bt_state_map status; -+ -+ u8 sut_pwr_level[BTC_PROFILE_MAX]; -+ u8 golden_rx_shift[BTC_PROFILE_MAX]; -+ u8 rssi_state[BTC_BT_RSSI_THMAX]; -+ u8 afh_map[BTC_BT_AFH_GROUP]; -+ -+ u32 role_sw: 1; -+ u32 slave_role: 1; -+ u32 afh_update: 1; -+ u32 cqddr: 1; -+ u32 rssi: 8; -+ u32 tx_3m: 1; -+ u32 rsvd: 19; -+}; -+ -+struct rtw89_btc_3rdcx_info { -+ u8 type; /* 0: none, 1:zigbee, 2:LTE */ -+ u8 hw_coex; -+ u16 rsvd; -+}; -+ -+struct rtw89_btc_dm_emap { -+ u32 init: 1; -+ u32 pta_owner: 1; -+ u32 wl_rfk_timeout: 1; -+ u32 bt_rfk_timeout: 1; -+ -+ u32 wl_fw_hang: 1; -+ u32 offload_mismatch: 1; -+ u32 cycle_hang: 1; -+ u32 w1_hang: 1; -+ -+ u32 b1_hang: 1; -+ u32 tdma_no_sync: 1; -+ u32 wl_slot_drift: 1; -+}; -+ -+union rtw89_btc_dm_error_map { -+ u32 val; -+ struct rtw89_btc_dm_emap map; -+}; -+ -+struct rtw89_btc_rf_para { -+ u32 tx_pwr_freerun; -+ u32 rx_gain_freerun; -+ u32 tx_pwr_perpkt; -+ u32 rx_gain_perpkt; -+}; -+ -+struct rtw89_btc_wl_info { -+ struct rtw89_btc_wl_link_info link_info[RTW89_MAX_HW_PORT_NUM]; -+ struct rtw89_btc_wl_rfk_info rfk_info; -+ struct rtw89_btc_wl_ver_info ver_info; -+ struct rtw89_btc_wl_afh_info afh_info; -+ struct rtw89_btc_wl_role_info role_info; -+ struct rtw89_btc_wl_scan_info scan_info; -+ struct rtw89_btc_wl_dbcc_info dbcc_info; -+ struct rtw89_btc_rf_para rf_para; -+ union rtw89_btc_wl_state_map status; -+ -+ u8 port_id[RTW89_WIFI_ROLE_MLME_MAX]; -+ u8 rssi_level; -+ -+ u32 scbd; -+}; -+ -+struct rtw89_btc_module { -+ struct rtw89_btc_ant_info ant; -+ u8 rfe_type; -+ u8 cv; -+ -+ u8 bt_solo: 1; -+ u8 bt_pos: 1; -+ u8 switch_type: 1; -+ -+ u8 rsvd; -+}; -+ -+#define RTW89_BTC_DM_MAXSTEP 30 -+#define RTW89_BTC_DM_CNT_MAX (RTW89_BTC_DM_MAXSTEP * 8) -+ -+struct rtw89_btc_dm_step { -+ u16 step[RTW89_BTC_DM_MAXSTEP]; -+ u8 step_pos; -+ bool step_ov; -+}; -+ -+struct rtw89_btc_init_info { -+ struct rtw89_btc_module module; -+ u8 wl_guard_ch; -+ -+ u8 wl_only: 1; -+ u8 wl_init_ok: 1; -+ u8 dbcc_en: 1; -+ u8 cx_other: 1; -+ u8 bt_only: 1; -+ -+ u16 rsvd; -+}; -+ -+struct rtw89_btc_wl_tx_limit_para { -+ u16 enable; -+ u32 tx_time; /* unit: us */ -+ u16 tx_retry; -+}; -+ -+struct rtw89_btc_bt_scan_info { -+ u16 win; -+ u16 intvl; -+ u32 enable: 1; -+ u32 interlace: 1; -+ u32 rsvd: 30; -+}; -+ -+enum rtw89_btc_bt_scan_type { -+ BTC_SCAN_INQ = 0, -+ BTC_SCAN_PAGE, -+ BTC_SCAN_BLE, -+ BTC_SCAN_INIT, -+ BTC_SCAN_TV, -+ BTC_SCAN_ADV, -+ BTC_SCAN_MAX1, -+}; -+ -+struct rtw89_btc_bt_info { -+ struct rtw89_btc_bt_link_info link_info; -+ struct rtw89_btc_bt_scan_info scan_info[BTC_SCAN_MAX1]; -+ struct rtw89_btc_bt_ver_info ver_info; -+ struct rtw89_btc_bool_sta_chg enable; -+ struct rtw89_btc_bool_sta_chg inq_pag; -+ struct rtw89_btc_rf_para rf_para; -+ union rtw89_btc_bt_rfk_info_map rfk_info; -+ -+ u8 raw_info[BTC_BTINFO_MAX]; /* raw bt info from mailbox */ -+ -+ u32 scbd; -+ u32 feature; -+ -+ u32 mbx_avl: 1; -+ u32 whql_test: 1; -+ u32 igno_wl: 1; -+ u32 reinit: 1; -+ u32 ble_scan_en: 1; -+ u32 btg_type: 1; -+ u32 inq: 1; -+ u32 pag: 1; -+ u32 run_patch_code: 1; -+ u32 hi_lna_rx: 1; -+ u32 rsvd: 22; -+}; -+ -+struct rtw89_btc_cx { -+ struct rtw89_btc_wl_info wl; -+ struct rtw89_btc_bt_info bt; -+ struct rtw89_btc_3rdcx_info other; -+ u32 state_map; -+ u32 cnt_bt[BTC_BCNT_NUM]; -+ u32 cnt_wl[BTC_WCNT_NUM]; -+}; -+ -+struct rtw89_btc_fbtc_tdma { -+ u8 type; -+ u8 rxflctrl; -+ u8 txpause; -+ u8 wtgle_n; -+ u8 leak_n; -+ u8 ext_ctrl; -+ u8 rsvd0; -+ u8 rsvd1; -+} __packed; -+ -+#define CXMREG_MAX 30 -+#define FCXMAX_STEP 255 /*STEP trace record cnt, Max:65535, default:255*/ -+#define BTCRPT_VER 1 -+#define BTC_CYCLE_SLOT_MAX 48 /* must be even number, non-zero */ -+ -+enum rtw89_btc_bt_rfk_counter { -+ BTC_BCNT_RFK_REQ = 0, -+ BTC_BCNT_RFK_GO = 1, -+ BTC_BCNT_RFK_REJECT = 2, -+ BTC_BCNT_RFK_FAIL = 3, -+ BTC_BCNT_RFK_TIMEOUT = 4, -+ BTC_BCNT_RFK_MAX -+}; -+ -+struct rtw89_btc_fbtc_rpt_ctrl { -+ u16 fver; -+ u16 rpt_cnt; /* tmr counters */ -+ u32 wl_fw_coex_ver; /* match which driver's coex version */ -+ u32 wl_fw_cx_offload; -+ u32 wl_fw_ver; -+ u32 rpt_enable; -+ u32 rpt_para; /* ms */ -+ u32 mb_send_fail_cnt; /* fw send mailbox fail counter */ -+ u32 mb_send_ok_cnt; /* fw send mailbox ok counter */ -+ u32 mb_recv_cnt; /* fw recv mailbox counter */ -+ u32 mb_a2dp_empty_cnt; /* a2dp empty count */ -+ u32 mb_a2dp_flct_cnt; /* a2dp empty flow control counter */ -+ u32 mb_a2dp_full_cnt; /* a2dp empty full counter */ -+ u32 bt_rfk_cnt[BTC_BCNT_RFK_MAX]; -+ u32 c2h_cnt; /* fw send c2h counter */ -+ u32 h2c_cnt; /* fw recv h2c counter */ -+} __packed; -+ -+enum rtw89_fbtc_ext_ctrl_type { -+ CXECTL_OFF = 0x0, /* tdma off */ -+ CXECTL_B2 = 0x1, /* allow B2 (beacon-early) */ -+ CXECTL_EXT = 0x2, -+ CXECTL_MAX -+}; -+ -+union rtw89_btc_fbtc_rxflct { -+ u8 val; -+ u8 type: 3; -+ u8 tgln_n: 5; -+}; -+ -+enum rtw89_btc_cxst_state { -+ CXST_OFF = 0x0, -+ CXST_B2W = 0x1, -+ CXST_W1 = 0x2, -+ CXST_W2 = 0x3, -+ CXST_W2B = 0x4, -+ CXST_B1 = 0x5, -+ CXST_B2 = 0x6, -+ CXST_B3 = 0x7, -+ CXST_B4 = 0x8, -+ CXST_LK = 0x9, -+ CXST_BLK = 0xa, -+ CXST_E2G = 0xb, -+ CXST_E5G = 0xc, -+ CXST_EBT = 0xd, -+ CXST_ENULL = 0xe, -+ CXST_WLK = 0xf, -+ CXST_W1FDD = 0x10, -+ CXST_B1FDD = 0x11, -+ CXST_MAX = 0x12, -+}; -+ -+enum { -+ CXBCN_ALL = 0x0, -+ CXBCN_ALL_OK, -+ CXBCN_BT_SLOT, -+ CXBCN_BT_OK, -+ CXBCN_MAX -+}; -+ -+enum btc_slot_type { -+ SLOT_MIX = 0x0, /* accept BT Lower-Pri Tx/Rx request 0x778 = 1 */ -+ SLOT_ISO = 0x1, /* no accept BT Lower-Pri Tx/Rx request 0x778 = d*/ -+ CXSTYPE_NUM, -+}; -+ -+enum { /* TIME */ -+ CXT_BT = 0x0, -+ CXT_WL = 0x1, -+ CXT_MAX -+}; -+ -+enum { /* TIME-A2DP */ -+ CXT_FLCTRL_OFF = 0x0, -+ CXT_FLCTRL_ON = 0x1, -+ CXT_FLCTRL_MAX -+}; -+ -+enum { /* STEP TYPE */ -+ CXSTEP_NONE = 0x0, -+ CXSTEP_EVNT = 0x1, -+ CXSTEP_SLOT = 0x2, -+ CXSTEP_MAX, -+}; -+ -+#define FCXGPIODBG_VER 1 -+#define BTC_DBG_MAX1 32 -+struct rtw89_btc_fbtc_gpio_dbg { -+ u8 fver; -+ u8 rsvd; -+ u16 rsvd2; -+ u32 en_map; /* which debug signal (see btc_wl_gpio_debug) is enable */ -+ u32 pre_state; /* the debug signal is 1 or 0 */ -+ u8 gpio_map[BTC_DBG_MAX1]; /*the debug signals to GPIO-Position */ -+} __packed; -+ -+#define FCXMREG_VER 1 -+struct rtw89_btc_fbtc_mreg_val { -+ u8 fver; -+ u8 reg_num; -+ __le16 rsvd; -+ __le32 mreg_val[CXMREG_MAX]; -+} __packed; -+ -+#define RTW89_DEF_FBTC_MREG(__type, __bytes, __offset) \ -+ { .type = cpu_to_le16(__type), .bytes = cpu_to_le16(__bytes), \ -+ .offset = cpu_to_le32(__offset), } -+ -+struct rtw89_btc_fbtc_mreg { -+ __le16 type; -+ __le16 bytes; -+ __le32 offset; -+} __packed; -+ -+struct rtw89_btc_fbtc_slot { -+ __le16 dur; -+ __le32 cxtbl; -+ __le16 cxtype; -+} __packed; -+ -+#define FCXSLOTS_VER 1 -+struct rtw89_btc_fbtc_slots { -+ u8 fver; -+ u8 tbl_num; -+ __le16 rsvd; -+ __le32 update_map; -+ struct rtw89_btc_fbtc_slot slot[CXST_MAX]; -+} __packed; -+ -+#define FCXSTEP_VER 2 -+struct rtw89_btc_fbtc_step { -+ u8 type; -+ u8 val; -+ __le16 difft; -+} __packed; -+ -+struct rtw89_btc_fbtc_steps { -+ u8 fver; -+ u8 rsvd; -+ __le16 cnt; -+ __le16 pos_old; -+ __le16 pos_new; -+ struct rtw89_btc_fbtc_step step[FCXMAX_STEP]; -+} __packed; -+ -+#define FCXCYSTA_VER 2 -+struct rtw89_btc_fbtc_cysta { /* statistics for cycles */ -+ u8 fver; -+ u8 rsvd; -+ __le16 cycles; /* total cycle number */ -+ __le16 cycles_a2dp[CXT_FLCTRL_MAX]; -+ __le16 a2dpept; /* a2dp empty cnt */ -+ __le16 a2dpeptto; /* a2dp empty timeout cnt*/ -+ __le16 tavg_cycle[CXT_MAX]; /* avg wl/bt cycle time */ -+ __le16 tmax_cycle[CXT_MAX]; /* max wl/bt cycle time */ -+ __le16 tmaxdiff_cycle[CXT_MAX]; /* max wl-wl bt-bt cycle diff time */ -+ __le16 tavg_a2dp[CXT_FLCTRL_MAX]; /* avg a2dp PSTDMA/TDMA time */ -+ __le16 tmax_a2dp[CXT_FLCTRL_MAX]; /* max a2dp PSTDMA/TDMA time */ -+ __le16 tavg_a2dpept; /* avg a2dp empty time */ -+ __le16 tmax_a2dpept; /* max a2dp empty time */ -+ __le16 tavg_lk; /* avg leak-slot time */ -+ __le16 tmax_lk; /* max leak-slot time */ -+ __le32 slot_cnt[CXST_MAX]; /* slot count */ -+ __le32 bcn_cnt[CXBCN_MAX]; -+ __le32 leakrx_cnt; /* the rximr occur at leak slot */ -+ __le32 collision_cnt; /* counter for event/timer occur at same time */ -+ __le32 skip_cnt; -+ __le32 exception; -+ __le32 except_cnt; -+ __le16 tslot_cycle[BTC_CYCLE_SLOT_MAX]; -+} __packed; -+ -+#define FCXNULLSTA_VER 1 -+struct rtw89_btc_fbtc_cynullsta { /* cycle null statistics */ -+ u8 fver; -+ u8 rsvd; -+ __le16 rsvd2; -+ __le32 max_t[2]; /* max_t for 0:null0/1:null1 */ -+ __le32 avg_t[2]; /* avg_t for 0:null0/1:null1 */ -+ __le32 result[2][4]; /* 0:fail, 1:ok, 2:on_time, 3:retry */ -+} __packed; -+ -+#define FCX_BTVER_VER 1 -+struct rtw89_btc_fbtc_btver { -+ u8 fver; -+ u8 rsvd; -+ __le16 rsvd2; -+ __le32 coex_ver; /*bit[15:8]->shared, bit[7:0]->non-shared */ -+ __le32 fw_ver; -+ __le32 feature; -+} __packed; -+ -+#define FCX_BTSCAN_VER 1 -+struct rtw89_btc_fbtc_btscan { -+ u8 fver; -+ u8 rsvd; -+ __le16 rsvd2; -+ u8 scan[6]; -+} __packed; -+ -+#define FCX_BTAFH_VER 1 -+struct rtw89_btc_fbtc_btafh { -+ u8 fver; -+ u8 rsvd; -+ __le16 rsvd2; -+ u8 afh_l[4]; /*bit0:2402, bit1: 2403.... bit31:2433 */ -+ u8 afh_m[4]; /*bit0:2434, bit1: 2435.... bit31:2465 */ -+ u8 afh_h[4]; /*bit0:2466, bit1:2467......bit14:2480 */ -+} __packed; -+ -+#define FCX_BTDEVINFO_VER 1 -+struct rtw89_btc_fbtc_btdevinfo { -+ u8 fver; -+ u8 rsvd; -+ __le16 vendor_id; -+ __le32 dev_name; /* only 24 bits valid */ -+ __le32 flush_time; -+} __packed; -+ -+#define RTW89_BTC_WL_DEF_TX_PWR GENMASK(7, 0) -+struct rtw89_btc_rf_trx_para { -+ u32 wl_tx_power; /* absolute Tx power (dBm), 0xff-> no BTC control */ -+ u32 wl_rx_gain; /* rx gain table index (TBD.) */ -+ u8 bt_tx_power; /* decrease Tx power (dB) */ -+ u8 bt_rx_gain; /* LNA constrain level */ -+}; -+ -+struct rtw89_btc_dm { -+ struct rtw89_btc_fbtc_slot slot[CXST_MAX]; -+ struct rtw89_btc_fbtc_slot slot_now[CXST_MAX]; -+ struct rtw89_btc_fbtc_tdma tdma; -+ struct rtw89_btc_fbtc_tdma tdma_now; -+ struct rtw89_mac_ax_coex_gnt gnt; -+ struct rtw89_btc_init_info init_info; /* pass to wl_fw if offload */ -+ struct rtw89_btc_rf_trx_para rf_trx_para; -+ struct rtw89_btc_wl_tx_limit_para wl_tx_limit; -+ struct rtw89_btc_dm_step dm_step; -+ union rtw89_btc_dm_error_map error; -+ u32 cnt_dm[BTC_DCNT_NUM]; -+ u32 cnt_notify[BTC_NCNT_NUM]; -+ -+ u32 update_slot_map; -+ u32 set_ant_path; -+ -+ u32 wl_only: 1; -+ u32 wl_fw_cx_offload: 1; -+ u32 freerun: 1; -+ u32 wl_ps_ctrl: 2; -+ u32 wl_mimo_ps: 1; -+ u32 leak_ap: 1; -+ u32 noisy_level: 3; -+ u32 coex_info_map: 8; -+ u32 bt_only: 1; -+ u32 wl_btg_rx: 1; -+ u32 trx_para_level: 8; -+ u32 wl_stb_chg: 1; -+ u32 rsvd: 3; -+ -+ u16 slot_dur[CXST_MAX]; -+ -+ u8 run_reason; -+ u8 run_action; -+}; -+ -+struct rtw89_btc_ctrl { -+ u32 manual: 1; -+ u32 igno_bt: 1; -+ u32 always_freerun: 1; -+ u32 trace_step: 16; -+ u32 rsvd: 12; -+}; -+ -+struct rtw89_btc_dbg { -+ /* cmd "rb" */ -+ bool rb_done; -+ u32 rb_val; -+}; -+ -+#define FCXTDMA_VER 1 -+ -+enum rtw89_btc_btf_fw_event { -+ BTF_EVNT_RPT = 0, -+ BTF_EVNT_BT_INFO = 1, -+ BTF_EVNT_BT_SCBD = 2, -+ BTF_EVNT_BT_REG = 3, -+ BTF_EVNT_CX_RUNINFO = 4, -+ BTF_EVNT_BT_PSD = 5, -+ BTF_EVNT_BUF_OVERFLOW, -+ BTF_EVNT_C2H_LOOPBACK, -+ BTF_EVNT_MAX, -+}; -+ -+enum btf_fw_event_report { -+ BTC_RPT_TYPE_CTRL = 0x0, -+ BTC_RPT_TYPE_TDMA, -+ BTC_RPT_TYPE_SLOT, -+ BTC_RPT_TYPE_CYSTA, -+ BTC_RPT_TYPE_STEP, -+ BTC_RPT_TYPE_NULLSTA, -+ BTC_RPT_TYPE_MREG, -+ BTC_RPT_TYPE_GPIO_DBG, -+ BTC_RPT_TYPE_BT_VER, -+ BTC_RPT_TYPE_BT_SCAN, -+ BTC_RPT_TYPE_BT_AFH, -+ BTC_RPT_TYPE_BT_DEVICE, -+ BTC_RPT_TYPE_TEST, -+ BTC_RPT_TYPE_MAX = 31 -+}; -+ -+enum rtw_btc_btf_reg_type { -+ REG_MAC = 0x0, -+ REG_BB = 0x1, -+ REG_RF = 0x2, -+ REG_BT_RF = 0x3, -+ REG_BT_MODEM = 0x4, -+ REG_BT_BLUEWIZE = 0x5, -+ REG_BT_VENDOR = 0x6, -+ REG_BT_LE = 0x7, -+ REG_MAX_TYPE, -+}; -+ -+struct rtw89_btc_rpt_cmn_info { -+ u32 rx_cnt; -+ u32 rx_len; -+ u32 req_len; /* expected rsp len */ -+ u8 req_fver; /* expected rsp fver */ -+ u8 rsp_fver; /* fver from fw */ -+ u8 valid; -+} __packed; -+ -+struct rtw89_btc_report_ctrl_state { -+ struct rtw89_btc_rpt_cmn_info cinfo; /* common info, by driver */ -+ struct rtw89_btc_fbtc_rpt_ctrl finfo; /* info from fw */ -+}; -+ -+struct rtw89_btc_rpt_fbtc_tdma { -+ struct rtw89_btc_rpt_cmn_info cinfo; /* common info, by driver */ -+ struct rtw89_btc_fbtc_tdma finfo; /* info from fw */ -+}; -+ -+struct rtw89_btc_rpt_fbtc_slots { -+ struct rtw89_btc_rpt_cmn_info cinfo; /* common info, by driver */ -+ struct rtw89_btc_fbtc_slots finfo; /* info from fw */ -+}; -+ -+struct rtw89_btc_rpt_fbtc_cysta { -+ struct rtw89_btc_rpt_cmn_info cinfo; /* common info, by driver */ -+ struct rtw89_btc_fbtc_cysta finfo; /* info from fw */ -+}; -+ -+struct rtw89_btc_rpt_fbtc_step { -+ struct rtw89_btc_rpt_cmn_info cinfo; /* common info, by driver */ -+ struct rtw89_btc_fbtc_steps finfo; /* info from fw */ -+}; -+ -+struct rtw89_btc_rpt_fbtc_nullsta { -+ struct rtw89_btc_rpt_cmn_info cinfo; /* common info, by driver */ -+ struct rtw89_btc_fbtc_cynullsta finfo; /* info from fw */ -+}; -+ -+struct rtw89_btc_rpt_fbtc_mreg { -+ struct rtw89_btc_rpt_cmn_info cinfo; /* common info, by driver */ -+ struct rtw89_btc_fbtc_mreg_val finfo; /* info from fw */ -+}; -+ -+struct rtw89_btc_rpt_fbtc_gpio_dbg { -+ struct rtw89_btc_rpt_cmn_info cinfo; /* common info, by driver */ -+ struct rtw89_btc_fbtc_gpio_dbg finfo; /* info from fw */ -+}; -+ -+struct rtw89_btc_rpt_fbtc_btver { -+ struct rtw89_btc_rpt_cmn_info cinfo; /* common info, by driver */ -+ struct rtw89_btc_fbtc_btver finfo; /* info from fw */ -+}; -+ -+struct rtw89_btc_rpt_fbtc_btscan { -+ struct rtw89_btc_rpt_cmn_info cinfo; /* common info, by driver */ -+ struct rtw89_btc_fbtc_btscan finfo; /* info from fw */ -+}; -+ -+struct rtw89_btc_rpt_fbtc_btafh { -+ struct rtw89_btc_rpt_cmn_info cinfo; /* common info, by driver */ -+ struct rtw89_btc_fbtc_btafh finfo; /* info from fw */ -+}; -+ -+struct rtw89_btc_rpt_fbtc_btdev { -+ struct rtw89_btc_rpt_cmn_info cinfo; /* common info, by driver */ -+ struct rtw89_btc_fbtc_btdevinfo finfo; /* info from fw */ -+}; -+ -+enum rtw89_btc_btfre_type { -+ BTFRE_INVALID_INPUT = 0x0, /* invalid input parameters */ -+ BTFRE_UNDEF_TYPE, -+ BTFRE_EXCEPTION, -+ BTFRE_MAX, -+}; -+ -+struct rtw89_btc_btf_fwinfo { -+ u32 cnt_c2h; -+ u32 cnt_h2c; -+ u32 cnt_h2c_fail; -+ u32 event[BTF_EVNT_MAX]; -+ -+ u32 err[BTFRE_MAX]; -+ u32 len_mismch; -+ u32 fver_mismch; -+ u32 rpt_en_map; -+ -+ struct rtw89_btc_report_ctrl_state rpt_ctrl; -+ struct rtw89_btc_rpt_fbtc_tdma rpt_fbtc_tdma; -+ struct rtw89_btc_rpt_fbtc_slots rpt_fbtc_slots; -+ struct rtw89_btc_rpt_fbtc_cysta rpt_fbtc_cysta; -+ struct rtw89_btc_rpt_fbtc_step rpt_fbtc_step; -+ struct rtw89_btc_rpt_fbtc_nullsta rpt_fbtc_nullsta; -+ struct rtw89_btc_rpt_fbtc_mreg rpt_fbtc_mregval; -+ struct rtw89_btc_rpt_fbtc_gpio_dbg rpt_fbtc_gpio_dbg; -+ struct rtw89_btc_rpt_fbtc_btver rpt_fbtc_btver; -+ struct rtw89_btc_rpt_fbtc_btscan rpt_fbtc_btscan; -+ struct rtw89_btc_rpt_fbtc_btafh rpt_fbtc_btafh; -+ struct rtw89_btc_rpt_fbtc_btdev rpt_fbtc_btdev; -+}; -+ -+#define RTW89_BTC_POLICY_MAXLEN 512 -+ -+struct rtw89_btc { -+ struct rtw89_btc_cx cx; -+ struct rtw89_btc_dm dm; -+ struct rtw89_btc_ctrl ctrl; -+ struct rtw89_btc_module mdinfo; -+ struct rtw89_btc_btf_fwinfo fwinfo; -+ struct rtw89_btc_dbg dbg; -+ -+ struct work_struct eapol_notify_work; -+ struct work_struct arp_notify_work; -+ struct work_struct dhcp_notify_work; -+ struct work_struct icmp_notify_work; -+ -+ u32 bt_req_len; -+ -+ u8 policy[RTW89_BTC_POLICY_MAXLEN]; -+ u16 policy_len; -+ u16 policy_type; -+ bool bt_req_en; -+ bool update_policy_force; -+ bool lps; -+}; -+ -+enum rtw89_ra_mode { -+ RTW89_RA_MODE_CCK = BIT(0), -+ RTW89_RA_MODE_OFDM = BIT(1), -+ RTW89_RA_MODE_HT = BIT(2), -+ RTW89_RA_MODE_VHT = BIT(3), -+ RTW89_RA_MODE_HE = BIT(4), -+}; -+ -+enum rtw89_ra_report_mode { -+ RTW89_RA_RPT_MODE_LEGACY, -+ RTW89_RA_RPT_MODE_HT, -+ RTW89_RA_RPT_MODE_VHT, -+ RTW89_RA_RPT_MODE_HE, -+}; -+ -+enum rtw89_dig_noisy_level { -+ RTW89_DIG_NOISY_LEVEL0 = -1, -+ RTW89_DIG_NOISY_LEVEL1 = 0, -+ RTW89_DIG_NOISY_LEVEL2 = 1, -+ RTW89_DIG_NOISY_LEVEL3 = 2, -+ RTW89_DIG_NOISY_LEVEL_MAX = 3, -+}; -+ -+enum rtw89_gi_ltf { -+ RTW89_GILTF_LGI_4XHE32 = 0, -+ RTW89_GILTF_SGI_4XHE08 = 1, -+ RTW89_GILTF_2XHE16 = 2, -+ RTW89_GILTF_2XHE08 = 3, -+ RTW89_GILTF_1XHE16 = 4, -+ RTW89_GILTF_1XHE08 = 5, -+ RTW89_GILTF_MAX -+}; -+ -+enum rtw89_rx_frame_type { -+ RTW89_RX_TYPE_MGNT = 0, -+ RTW89_RX_TYPE_CTRL = 1, -+ RTW89_RX_TYPE_DATA = 2, -+ RTW89_RX_TYPE_RSVD = 3, -+}; -+ -+struct rtw89_ra_info { -+ u8 is_dis_ra:1; -+ /* Bit0 : CCK -+ * Bit1 : OFDM -+ * Bit2 : HT -+ * Bit3 : VHT -+ * Bit4 : HE -+ */ -+ u8 mode_ctrl:5; -+ u8 bw_cap:2; -+ u8 macid; -+ u8 dcm_cap:1; -+ u8 er_cap:1; -+ u8 init_rate_lv:2; -+ u8 upd_all:1; -+ u8 en_sgi:1; -+ u8 ldpc_cap:1; -+ u8 stbc_cap:1; -+ u8 ss_num:3; -+ u8 giltf:3; -+ u8 upd_bw_nss_mask:1; -+ u8 upd_mask:1; -+ u64 ra_mask; /* 63 bits ra_mask + 1 bit CSI ctrl */ -+ /* BFee CSI */ -+ u8 band_num; -+ u8 ra_csi_rate_en:1; -+ u8 fixed_csi_rate_en:1; -+ u8 cr_tbl_sel:1; -+ u8 rsvd2:5; -+ u8 csi_mcs_ss_idx; -+ u8 csi_mode:2; -+ u8 csi_gi_ltf:3; -+ u8 csi_bw:3; -+}; -+ -+#define RTW89_PPDU_MAX_USR 4 -+#define RTW89_PPDU_MAC_INFO_USR_SIZE 4 -+#define RTW89_PPDU_MAC_INFO_SIZE 8 -+#define RTW89_PPDU_MAC_RX_CNT_SIZE 96 -+ -+#define RTW89_MAX_RX_AGG_NUM 64 -+#define RTW89_MAX_TX_AGG_NUM 128 -+ -+struct rtw89_ampdu_params { -+ u16 agg_num; -+ bool amsdu; -+}; -+ -+struct rtw89_ra_report { -+ struct rate_info txrate; -+ u32 bit_rate; -+ u16 hw_rate; -+}; -+ -+DECLARE_EWMA(rssi, 10, 16); -+ -+struct rtw89_sta { -+ u8 mac_id; -+ bool disassoc; -+ struct rtw89_vif *rtwvif; -+ struct rtw89_ra_info ra; -+ struct rtw89_ra_report ra_report; -+ int max_agg_wait; -+ u8 prev_rssi; -+ struct ewma_rssi avg_rssi; -+ struct rtw89_ampdu_params ampdu_params[IEEE80211_NUM_TIDS]; -+ struct ieee80211_rx_status rx_status; -+ u16 rx_hw_rate; -+ __le32 htc_template; -+ -+ bool use_cfg_mask; -+ struct cfg80211_bitrate_mask mask; -+ -+ bool cctl_tx_time; -+ u32 ampdu_max_time:4; -+ bool cctl_tx_retry_limit; -+ u32 data_tx_cnt_lmt:6; -+}; -+ -+#define RTW89_MAX_ADDR_CAM_NUM 128 -+#define RTW89_MAX_BSSID_CAM_NUM 20 -+#define RTW89_MAX_SEC_CAM_NUM 128 -+#define RTW89_SEC_CAM_IN_ADDR_CAM 7 -+ -+struct rtw89_addr_cam_entry { -+ u8 addr_cam_idx; -+ u8 offset; -+ u8 len; -+ u8 valid : 1; -+ u8 addr_mask : 6; -+ u8 wapi : 1; -+ u8 mask_sel : 2; -+ u8 bssid_cam_idx: 6; -+ u8 tma[ETH_ALEN]; -+ u8 sma[ETH_ALEN]; -+ -+ u8 sec_ent_mode; -+ DECLARE_BITMAP(sec_cam_map, RTW89_SEC_CAM_IN_ADDR_CAM); -+ u8 sec_ent_keyid[RTW89_SEC_CAM_IN_ADDR_CAM]; -+ u8 sec_ent[RTW89_SEC_CAM_IN_ADDR_CAM]; -+ struct rtw89_sec_cam_entry *sec_entries[RTW89_SEC_CAM_IN_ADDR_CAM]; -+}; -+ -+struct rtw89_bssid_cam_entry { -+ u8 bssid[ETH_ALEN]; -+ u8 phy_idx; -+ u8 bssid_cam_idx; -+ u8 offset; -+ u8 len; -+ u8 valid : 1; -+ u8 num; -+}; -+ -+struct rtw89_sec_cam_entry { -+ u8 sec_cam_idx; -+ u8 offset; -+ u8 len; -+ u8 type : 4; -+ u8 ext_key : 1; -+ u8 spp_mode : 1; -+ /* 256 bits */ -+ u8 key[32]; -+}; -+ -+struct rtw89_efuse { -+ bool valid; -+ u8 xtal_cap; -+ u8 addr[ETH_ALEN]; -+ u8 rfe_type; -+ char country_code[2]; -+}; -+ -+struct rtw89_phy_rate_pattern { -+ u64 ra_mask; -+ u16 rate; -+ u8 ra_mode; -+ bool enable; -+}; -+ -+struct rtw89_vif { -+ struct list_head list; -+ u8 mac_id; -+ u8 port; -+ u8 mac_addr[ETH_ALEN]; -+ u8 bssid[ETH_ALEN]; -+ u8 phy_idx; -+ u8 mac_idx; -+ u8 net_type; -+ u8 wifi_role; -+ u8 self_role; -+ u8 wmm; -+ u8 bcn_hit_cond; -+ u8 hit_rule; -+ bool trigger; -+ bool lsig_txop; -+ u8 tgt_ind; -+ u8 frm_tgt_ind; -+ bool wowlan_pattern; -+ bool wowlan_uc; -+ bool wowlan_magic; -+ bool is_hesta; -+ bool last_a_ctrl; -+ union { -+ struct { -+ struct ieee80211_sta *ap; -+ } mgd; -+ struct { -+ struct list_head sta_list; -+ } ap; -+ }; -+ struct rtw89_addr_cam_entry addr_cam; -+ struct rtw89_bssid_cam_entry bssid_cam; -+ struct ieee80211_tx_queue_params tx_params[IEEE80211_NUM_ACS]; -+ struct rtw89_traffic_stats stats; -+ struct rtw89_phy_rate_pattern rate_pattern; -+}; -+ -+enum rtw89_lv1_rcvy_step { -+ RTW89_LV1_RCVY_STEP_1, -+ RTW89_LV1_RCVY_STEP_2, -+}; -+ -+struct rtw89_hci_ops { -+ int (*tx_write)(struct rtw89_dev *rtwdev, struct rtw89_core_tx_request *tx_req); -+ void (*tx_kick_off)(struct rtw89_dev *rtwdev, u8 txch); -+ void (*flush_queues)(struct rtw89_dev *rtwdev, u32 queues, bool drop); -+ void (*reset)(struct rtw89_dev *rtwdev); -+ int (*start)(struct rtw89_dev *rtwdev); -+ void (*stop)(struct rtw89_dev *rtwdev); -+ void (*recalc_int_mit)(struct rtw89_dev *rtwdev); -+ -+ u8 (*read8)(struct rtw89_dev *rtwdev, u32 addr); -+ u16 (*read16)(struct rtw89_dev *rtwdev, u32 addr); -+ u32 (*read32)(struct rtw89_dev *rtwdev, u32 addr); -+ void (*write8)(struct rtw89_dev *rtwdev, u32 addr, u8 data); -+ void (*write16)(struct rtw89_dev *rtwdev, u32 addr, u16 data); -+ void (*write32)(struct rtw89_dev *rtwdev, u32 addr, u32 data); -+ -+ int (*mac_pre_init)(struct rtw89_dev *rtwdev); -+ int (*mac_post_init)(struct rtw89_dev *rtwdev); -+ int (*deinit)(struct rtw89_dev *rtwdev); -+ -+ u32 (*check_and_reclaim_tx_resource)(struct rtw89_dev *rtwdev, u8 txch); -+ int (*mac_lv1_rcvy)(struct rtw89_dev *rtwdev, enum rtw89_lv1_rcvy_step step); -+ void (*dump_err_status)(struct rtw89_dev *rtwdev); -+ int (*napi_poll)(struct napi_struct *napi, int budget); -+}; -+ -+struct rtw89_hci_info { -+ const struct rtw89_hci_ops *ops; -+ enum rtw89_hci_type type; -+ u32 rpwm_addr; -+ u32 cpwm_addr; -+}; -+ -+struct rtw89_chip_ops { -+ void (*bb_reset)(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy_idx); -+ void (*bb_sethw)(struct rtw89_dev *rtwdev); -+ u32 (*read_rf)(struct rtw89_dev *rtwdev, enum rtw89_rf_path rf_path, -+ u32 addr, u32 mask); -+ bool (*write_rf)(struct rtw89_dev *rtwdev, enum rtw89_rf_path rf_path, -+ u32 addr, u32 mask, u32 data); -+ void (*set_channel)(struct rtw89_dev *rtwdev, -+ struct rtw89_channel_params *param); -+ void (*set_channel_help)(struct rtw89_dev *rtwdev, bool enter, -+ struct rtw89_channel_help_params *p); -+ int (*read_efuse)(struct rtw89_dev *rtwdev, u8 *log_map); -+ int (*read_phycap)(struct rtw89_dev *rtwdev, u8 *phycap_map); -+ void (*fem_setup)(struct rtw89_dev *rtwdev); -+ void (*rfk_init)(struct rtw89_dev *rtwdev); -+ void (*rfk_channel)(struct rtw89_dev *rtwdev); -+ void (*rfk_band_changed)(struct rtw89_dev *rtwdev); -+ void (*rfk_scan)(struct rtw89_dev *rtwdev, bool start); -+ void (*rfk_track)(struct rtw89_dev *rtwdev); -+ void (*power_trim)(struct rtw89_dev *rtwdev); -+ void (*set_txpwr)(struct rtw89_dev *rtwdev); -+ void (*set_txpwr_ctrl)(struct rtw89_dev *rtwdev); -+ int (*init_txpwr_unit)(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx); -+ u8 (*get_thermal)(struct rtw89_dev *rtwdev, enum rtw89_rf_path rf_path); -+ void (*ctrl_btg)(struct rtw89_dev *rtwdev, bool btg); -+ void (*query_ppdu)(struct rtw89_dev *rtwdev, -+ struct rtw89_rx_phy_ppdu *phy_ppdu, -+ struct ieee80211_rx_status *status); -+ void (*bb_ctrl_btc_preagc)(struct rtw89_dev *rtwdev, bool bt_en); -+ void (*set_txpwr_ul_tb_offset)(struct rtw89_dev *rtwdev, -+ s16 pw_ofst, enum rtw89_mac_idx mac_idx); -+ -+ void (*btc_set_rfe)(struct rtw89_dev *rtwdev); -+ void (*btc_init_cfg)(struct rtw89_dev *rtwdev); -+ void (*btc_set_wl_pri)(struct rtw89_dev *rtwdev, u8 map, bool state); -+ void (*btc_set_wl_txpwr_ctrl)(struct rtw89_dev *rtwdev, u32 txpwr_val); -+ s8 (*btc_get_bt_rssi)(struct rtw89_dev *rtwdev, s8 val); -+ void (*btc_bt_aci_imp)(struct rtw89_dev *rtwdev); -+ void (*btc_update_bt_cnt)(struct rtw89_dev *rtwdev); -+ void (*btc_wl_s1_standby)(struct rtw89_dev *rtwdev, bool state); -+}; -+ -+enum rtw89_dma_ch { -+ RTW89_DMA_ACH0 = 0, -+ RTW89_DMA_ACH1 = 1, -+ RTW89_DMA_ACH2 = 2, -+ RTW89_DMA_ACH3 = 3, -+ RTW89_DMA_ACH4 = 4, -+ RTW89_DMA_ACH5 = 5, -+ RTW89_DMA_ACH6 = 6, -+ RTW89_DMA_ACH7 = 7, -+ RTW89_DMA_B0MG = 8, -+ RTW89_DMA_B0HI = 9, -+ RTW89_DMA_B1MG = 10, -+ RTW89_DMA_B1HI = 11, -+ RTW89_DMA_H2C = 12, -+ RTW89_DMA_CH_NUM = 13 -+}; -+ -+enum rtw89_qta_mode { -+ RTW89_QTA_SCC, -+ RTW89_QTA_DLFW, -+ -+ /* keep last */ -+ RTW89_QTA_INVALID, -+}; -+ -+struct rtw89_hfc_ch_cfg { -+ u16 min; -+ u16 max; -+#define grp_0 0 -+#define grp_1 1 -+#define grp_num 2 -+ u8 grp; -+}; -+ -+struct rtw89_hfc_ch_info { -+ u16 aval; -+ u16 used; -+}; -+ -+struct rtw89_hfc_pub_cfg { -+ u16 grp0; -+ u16 grp1; -+ u16 pub_max; -+ u16 wp_thrd; -+}; -+ -+struct rtw89_hfc_pub_info { -+ u16 g0_used; -+ u16 g1_used; -+ u16 g0_aval; -+ u16 g1_aval; -+ u16 pub_aval; -+ u16 wp_aval; -+}; -+ -+struct rtw89_hfc_prec_cfg { -+ u16 ch011_prec; -+ u16 h2c_prec; -+ u16 wp_ch07_prec; -+ u16 wp_ch811_prec; -+ u8 ch011_full_cond; -+ u8 h2c_full_cond; -+ u8 wp_ch07_full_cond; -+ u8 wp_ch811_full_cond; -+}; -+ -+struct rtw89_hfc_param { -+ bool en; -+ bool h2c_en; -+ u8 mode; -+ const struct rtw89_hfc_ch_cfg *ch_cfg; -+ struct rtw89_hfc_ch_info ch_info[RTW89_DMA_CH_NUM]; -+ struct rtw89_hfc_pub_cfg pub_cfg; -+ struct rtw89_hfc_pub_info pub_info; -+ struct rtw89_hfc_prec_cfg prec_cfg; -+}; -+ -+struct rtw89_hfc_param_ini { -+ const struct rtw89_hfc_ch_cfg *ch_cfg; -+ const struct rtw89_hfc_pub_cfg *pub_cfg; -+ const struct rtw89_hfc_prec_cfg *prec_cfg; -+ u8 mode; -+}; -+ -+struct rtw89_dle_size { -+ u16 pge_size; -+ u16 lnk_pge_num; -+ u16 unlnk_pge_num; -+}; -+ -+struct rtw89_wde_quota { -+ u16 hif; -+ u16 wcpu; -+ u16 pkt_in; -+ u16 cpu_io; -+}; -+ -+struct rtw89_ple_quota { -+ u16 cma0_tx; -+ u16 cma1_tx; -+ u16 c2h; -+ u16 h2c; -+ u16 wcpu; -+ u16 mpdu_proc; -+ u16 cma0_dma; -+ u16 cma1_dma; -+ u16 bb_rpt; -+ u16 wd_rel; -+ u16 cpu_io; -+}; -+ -+struct rtw89_dle_mem { -+ enum rtw89_qta_mode mode; -+ const struct rtw89_dle_size *wde_size; -+ const struct rtw89_dle_size *ple_size; -+ const struct rtw89_wde_quota *wde_min_qt; -+ const struct rtw89_wde_quota *wde_max_qt; -+ const struct rtw89_ple_quota *ple_min_qt; -+ const struct rtw89_ple_quota *ple_max_qt; -+}; -+ -+struct rtw89_reg_def { -+ u32 addr; -+ u32 mask; -+}; -+ -+struct rtw89_reg2_def { -+ u32 addr; -+ u32 data; -+}; -+ -+struct rtw89_reg3_def { -+ u32 addr; -+ u32 mask; -+ u32 data; -+}; -+ -+struct rtw89_reg5_def { -+ u8 flag; /* recognized by parsers */ -+ u8 path; -+ u32 addr; -+ u32 mask; -+ u32 data; -+}; -+ -+struct rtw89_phy_table { -+ const struct rtw89_reg2_def *regs; -+ u32 n_regs; -+ enum rtw89_rf_path rf_path; -+}; -+ -+struct rtw89_txpwr_table { -+ const void *data; -+ u32 size; -+ void (*load)(struct rtw89_dev *rtwdev, -+ const struct rtw89_txpwr_table *tbl); -+}; -+ -+struct rtw89_chip_info { -+ enum rtw89_core_chip_id chip_id; -+ const struct rtw89_chip_ops *ops; -+ const char *fw_name; -+ u32 fifo_size; -+ u16 max_amsdu_limit; -+ bool dis_2g_40m_ul_ofdma; -+ const struct rtw89_hfc_param_ini *hfc_param_ini; -+ const struct rtw89_dle_mem *dle_mem; -+ u32 rf_base_addr[2]; -+ u8 rf_path_num; -+ u8 tx_nss; -+ u8 rx_nss; -+ u8 acam_num; -+ u8 bcam_num; -+ u8 scam_num; -+ -+ u8 sec_ctrl_efuse_size; -+ u32 physical_efuse_size; -+ u32 logical_efuse_size; -+ u32 limit_efuse_size; -+ u32 phycap_addr; -+ u32 phycap_size; -+ -+ const struct rtw89_pwr_cfg * const *pwr_on_seq; -+ const struct rtw89_pwr_cfg * const *pwr_off_seq; -+ const struct rtw89_phy_table *bb_table; -+ const struct rtw89_phy_table *rf_table[RF_PATH_MAX]; -+ const struct rtw89_phy_table *nctl_table; -+ const struct rtw89_txpwr_table *byr_table; -+ const struct rtw89_phy_dig_gain_table *dig_table; -+ const s8 (*txpwr_lmt_2g)[RTW89_2G_BW_NUM][RTW89_NTX_NUM] -+ [RTW89_RS_LMT_NUM][RTW89_BF_NUM] -+ [RTW89_REGD_NUM][RTW89_2G_CH_NUM]; -+ const s8 (*txpwr_lmt_5g)[RTW89_5G_BW_NUM][RTW89_NTX_NUM] -+ [RTW89_RS_LMT_NUM][RTW89_BF_NUM] -+ [RTW89_REGD_NUM][RTW89_5G_CH_NUM]; -+ const s8 (*txpwr_lmt_ru_2g)[RTW89_RU_NUM][RTW89_NTX_NUM] -+ [RTW89_REGD_NUM][RTW89_2G_CH_NUM]; -+ const s8 (*txpwr_lmt_ru_5g)[RTW89_RU_NUM][RTW89_NTX_NUM] -+ [RTW89_REGD_NUM][RTW89_5G_CH_NUM]; -+ -+ u8 txpwr_factor_rf; -+ u8 txpwr_factor_mac; -+ -+ u32 para_ver; -+ u32 wlcx_desired; -+ u8 btcx_desired; -+ u8 scbd; -+ u8 mailbox; -+ -+ u8 afh_guard_ch; -+ const u8 *wl_rssi_thres; -+ const u8 *bt_rssi_thres; -+ u8 rssi_tol; -+ -+ u8 mon_reg_num; -+ const struct rtw89_btc_fbtc_mreg *mon_reg; -+ u8 rf_para_ulink_num; -+ const struct rtw89_btc_rf_trx_para *rf_para_ulink; -+ u8 rf_para_dlink_num; -+ const struct rtw89_btc_rf_trx_para *rf_para_dlink; -+ u8 ps_mode_supported; -+}; -+ -+enum rtw89_hcifc_mode { -+ RTW89_HCIFC_POH = 0, -+ RTW89_HCIFC_STF = 1, -+ RTW89_HCIFC_SDIO = 2, -+ -+ /* keep last */ -+ RTW89_HCIFC_MODE_INVALID, -+}; -+ -+struct rtw89_dle_info { -+ enum rtw89_qta_mode qta_mode; -+ u16 wde_pg_size; -+ u16 ple_pg_size; -+ u16 c0_rx_qta; -+ u16 c1_rx_qta; -+}; -+ -+enum rtw89_host_rpr_mode { -+ RTW89_RPR_MODE_POH = 0, -+ RTW89_RPR_MODE_STF -+}; -+ -+struct rtw89_mac_info { -+ struct rtw89_dle_info dle_info; -+ struct rtw89_hfc_param hfc_param; -+ enum rtw89_qta_mode qta_mode; -+ u8 rpwm_seq_num; -+ u8 cpwm_seq_num; -+}; -+ -+enum rtw89_fw_type { -+ RTW89_FW_NORMAL = 1, -+ RTW89_FW_WOWLAN = 3, -+}; -+ -+struct rtw89_fw_suit { -+ const u8 *data; -+ u32 size; -+ u8 major_ver; -+ u8 minor_ver; -+ u8 sub_ver; -+ u8 sub_idex; -+ u16 build_year; -+ u16 build_mon; -+ u16 build_date; -+ u16 build_hour; -+ u16 build_min; -+ u8 cmd_ver; -+}; -+ -+#define RTW89_FW_VER_CODE(major, minor, sub, idx) \ -+ (((major) << 24) | ((minor) << 16) | ((sub) << 8) | (idx)) -+#define RTW89_FW_SUIT_VER_CODE(s) \ -+ RTW89_FW_VER_CODE((s)->major_ver, (s)->minor_ver, (s)->sub_ver, (s)->sub_idex) -+ -+struct rtw89_fw_info { -+ const struct firmware *firmware; -+ struct rtw89_dev *rtwdev; -+ struct completion completion; -+ u8 h2c_seq; -+ u8 rec_seq; -+ struct rtw89_fw_suit normal; -+ struct rtw89_fw_suit wowlan; -+ bool fw_log_enable; -+ bool old_ht_ra_format; -+}; -+ -+struct rtw89_cam_info { -+ DECLARE_BITMAP(addr_cam_map, RTW89_MAX_ADDR_CAM_NUM); -+ DECLARE_BITMAP(bssid_cam_map, RTW89_MAX_BSSID_CAM_NUM); -+ DECLARE_BITMAP(sec_cam_map, RTW89_MAX_SEC_CAM_NUM); -+}; -+ -+enum rtw89_sar_sources { -+ RTW89_SAR_SOURCE_NONE, -+ RTW89_SAR_SOURCE_COMMON, -+ -+ RTW89_SAR_SOURCE_NR, -+}; -+ -+struct rtw89_sar_cfg_common { -+ bool set[RTW89_SUBBAND_NR]; -+ s32 cfg[RTW89_SUBBAND_NR]; -+}; -+ -+struct rtw89_sar_info { -+ /* used to decide how to acces SAR cfg union */ -+ enum rtw89_sar_sources src; -+ -+ /* reserved for different knids of SAR cfg struct. -+ * supposed that a single cfg struct cannot handle various SAR sources. -+ */ -+ union { -+ struct rtw89_sar_cfg_common cfg_common; -+ }; -+}; -+ -+struct rtw89_hal { -+ u32 rx_fltr; -+ u8 cv; -+ u8 current_channel; -+ u8 current_primary_channel; -+ enum rtw89_subband current_subband; -+ u8 current_band_width; -+ u8 current_band_type; -+ /* center channel for different available bandwidth, -+ * val of (bw > current_band_width) is invalid -+ */ -+ u8 cch_by_bw[RTW89_MAX_CHANNEL_WIDTH + 1]; -+ u32 sw_amsdu_max_size; -+ u32 antenna_tx; -+ u32 antenna_rx; -+ u8 tx_nss; -+ u8 rx_nss; -+}; -+ -+#define RTW89_MAX_MAC_ID_NUM 128 -+ -+enum rtw89_flags { -+ RTW89_FLAG_POWERON, -+ RTW89_FLAG_FW_RDY, -+ RTW89_FLAG_RUNNING, -+ RTW89_FLAG_BFEE_MON, -+ RTW89_FLAG_BFEE_EN, -+ RTW89_FLAG_NAPI_RUNNING, -+ RTW89_FLAG_LEISURE_PS, -+ RTW89_FLAG_LOW_POWER_MODE, -+ RTW89_FLAG_INACTIVE_PS, -+ -+ NUM_OF_RTW89_FLAGS, -+}; -+ -+struct rtw89_pkt_stat { -+ u16 beacon_nr; -+ u32 rx_rate_cnt[RTW89_HW_RATE_NR]; -+}; -+ -+DECLARE_EWMA(thermal, 4, 4); -+ -+struct rtw89_phy_stat { -+ struct ewma_thermal avg_thermal[RF_PATH_MAX]; -+ struct rtw89_pkt_stat cur_pkt_stat; -+ struct rtw89_pkt_stat last_pkt_stat; -+}; -+ -+#define RTW89_DACK_PATH_NR 2 -+#define RTW89_DACK_IDX_NR 2 -+#define RTW89_DACK_MSBK_NR 16 -+struct rtw89_dack_info { -+ bool dack_done; -+ u8 msbk_d[RTW89_DACK_PATH_NR][RTW89_DACK_IDX_NR][RTW89_DACK_MSBK_NR]; -+ u8 dadck_d[RTW89_DACK_PATH_NR][RTW89_DACK_IDX_NR]; -+ u16 addck_d[RTW89_DACK_PATH_NR][RTW89_DACK_IDX_NR]; -+ u16 biask_d[RTW89_DACK_PATH_NR][RTW89_DACK_IDX_NR]; -+ u32 dack_cnt; -+ bool addck_timeout[RTW89_DACK_PATH_NR]; -+ bool dadck_timeout[RTW89_DACK_PATH_NR]; -+ bool msbk_timeout[RTW89_DACK_PATH_NR]; -+}; -+ -+#define RTW89_IQK_CHS_NR 2 -+#define RTW89_IQK_PATH_NR 4 -+struct rtw89_iqk_info { -+ bool lok_cor_fail[RTW89_IQK_CHS_NR][RTW89_IQK_PATH_NR]; -+ bool lok_fin_fail[RTW89_IQK_CHS_NR][RTW89_IQK_PATH_NR]; -+ bool iqk_tx_fail[RTW89_IQK_CHS_NR][RTW89_IQK_PATH_NR]; -+ bool iqk_rx_fail[RTW89_IQK_CHS_NR][RTW89_IQK_PATH_NR]; -+ u32 iqk_fail_cnt; -+ bool is_iqk_init; -+ u32 iqk_channel[RTW89_IQK_CHS_NR]; -+ u8 iqk_band[RTW89_IQK_PATH_NR]; -+ u8 iqk_ch[RTW89_IQK_PATH_NR]; -+ u8 iqk_bw[RTW89_IQK_PATH_NR]; -+ u8 kcount; -+ u8 iqk_times; -+ u8 version; -+ u32 nb_txcfir[RTW89_IQK_PATH_NR]; -+ u32 nb_rxcfir[RTW89_IQK_PATH_NR]; -+ u32 bp_txkresult[RTW89_IQK_PATH_NR]; -+ u32 bp_rxkresult[RTW89_IQK_PATH_NR]; -+ u32 bp_iqkenable[RTW89_IQK_PATH_NR]; -+ bool is_wb_txiqk[RTW89_IQK_PATH_NR]; -+ bool is_wb_rxiqk[RTW89_IQK_PATH_NR]; -+ bool is_nbiqk; -+ bool iqk_fft_en; -+ bool iqk_xym_en; -+ bool iqk_sram_en; -+ bool iqk_cfir_en; -+ u8 thermal[RTW89_IQK_PATH_NR]; -+ bool thermal_rek_en; -+ u32 syn1to2; -+ u8 iqk_mcc_ch[RTW89_IQK_CHS_NR][RTW89_IQK_PATH_NR]; -+ u8 iqk_table_idx[RTW89_IQK_PATH_NR]; -+}; -+ -+#define RTW89_DPK_RF_PATH 2 -+#define RTW89_DPK_AVG_THERMAL_NUM 8 -+#define RTW89_DPK_BKUP_NUM 2 -+struct rtw89_dpk_bkup_para { -+ enum rtw89_band band; -+ enum rtw89_bandwidth bw; -+ u8 ch; -+ bool path_ok; -+ u8 txagc_dpk; -+ u8 ther_dpk; -+ u8 gs; -+ u16 pwsf; -+}; -+ -+struct rtw89_dpk_info { -+ bool is_dpk_enable; -+ bool is_dpk_reload_en; -+ u16 dc_i[RTW89_DPK_RF_PATH]; -+ u16 dc_q[RTW89_DPK_RF_PATH]; -+ u8 corr_val[RTW89_DPK_RF_PATH]; -+ u8 corr_idx[RTW89_DPK_RF_PATH]; -+ u8 cur_idx[RTW89_DPK_RF_PATH]; -+ struct rtw89_dpk_bkup_para bp[RTW89_DPK_RF_PATH][RTW89_DPK_BKUP_NUM]; -+}; -+ -+struct rtw89_fem_info { -+ bool elna_2g; -+ bool elna_5g; -+ bool epa_2g; -+ bool epa_5g; -+}; -+ -+struct rtw89_phy_ch_info { -+ u8 rssi_min; -+ u16 rssi_min_macid; -+ u8 pre_rssi_min; -+ u8 rssi_max; -+ u16 rssi_max_macid; -+ u8 rxsc_160; -+ u8 rxsc_80; -+ u8 rxsc_40; -+ u8 rxsc_20; -+ u8 rxsc_l; -+ u8 is_noisy; -+}; -+ -+struct rtw89_agc_gaincode_set { -+ u8 lna_idx; -+ u8 tia_idx; -+ u8 rxb_idx; -+}; -+ -+#define IGI_RSSI_TH_NUM 5 -+#define FA_TH_NUM 4 -+#define LNA_GAIN_NUM 7 -+#define TIA_GAIN_NUM 2 -+struct rtw89_dig_info { -+ struct rtw89_agc_gaincode_set cur_gaincode; -+ bool force_gaincode_idx_en; -+ struct rtw89_agc_gaincode_set force_gaincode; -+ u8 igi_rssi_th[IGI_RSSI_TH_NUM]; -+ u16 fa_th[FA_TH_NUM]; -+ u8 igi_rssi; -+ u8 igi_fa_rssi; -+ u8 fa_rssi_ofst; -+ u8 dyn_igi_max; -+ u8 dyn_igi_min; -+ bool dyn_pd_th_en; -+ u8 dyn_pd_th_max; -+ u8 pd_low_th_ofst; -+ u8 ib_pbk; -+ s8 ib_pkpwr; -+ s8 lna_gain_a[LNA_GAIN_NUM]; -+ s8 lna_gain_g[LNA_GAIN_NUM]; -+ s8 *lna_gain; -+ s8 tia_gain_a[TIA_GAIN_NUM]; -+ s8 tia_gain_g[TIA_GAIN_NUM]; -+ s8 *tia_gain; -+ bool is_linked_pre; -+ bool bypass_dig; -+}; -+ -+enum rtw89_multi_cfo_mode { -+ RTW89_PKT_BASED_AVG_MODE = 0, -+ RTW89_ENTRY_BASED_AVG_MODE = 1, -+ RTW89_TP_BASED_AVG_MODE = 2, -+}; -+ -+enum rtw89_phy_cfo_status { -+ RTW89_PHY_DCFO_STATE_NORMAL = 0, -+ RTW89_PHY_DCFO_STATE_ENHANCE = 1, -+ RTW89_PHY_DCFO_STATE_MAX -+}; -+ -+struct rtw89_cfo_tracking_info { -+ u16 cfo_timer_ms; -+ bool cfo_trig_by_timer_en; -+ enum rtw89_phy_cfo_status phy_cfo_status; -+ u8 phy_cfo_trk_cnt; -+ bool is_adjust; -+ enum rtw89_multi_cfo_mode rtw89_multi_cfo_mode; -+ bool apply_compensation; -+ u8 crystal_cap; -+ u8 crystal_cap_default; -+ u8 def_x_cap; -+ s8 x_cap_ofst; -+ u32 sta_cfo_tolerance; -+ s32 cfo_tail[CFO_TRACK_MAX_USER]; -+ u16 cfo_cnt[CFO_TRACK_MAX_USER]; -+ s32 cfo_avg_pre; -+ s32 cfo_avg[CFO_TRACK_MAX_USER]; -+ s32 pre_cfo_avg[CFO_TRACK_MAX_USER]; -+ u32 packet_count; -+ u32 packet_count_pre; -+ s32 residual_cfo_acc; -+ u8 phy_cfotrk_state; -+ u8 phy_cfotrk_cnt; -+}; -+ -+/* 2GL, 2GH, 5GL1, 5GH1, 5GM1, 5GM2, 5GH1, 5GH2 */ -+#define TSSI_TRIM_CH_GROUP_NUM 8 -+ -+#define TSSI_CCK_CH_GROUP_NUM 6 -+#define TSSI_MCS_2G_CH_GROUP_NUM 5 -+#define TSSI_MCS_5G_CH_GROUP_NUM 14 -+#define TSSI_MCS_CH_GROUP_NUM \ -+ (TSSI_MCS_2G_CH_GROUP_NUM + TSSI_MCS_5G_CH_GROUP_NUM) -+ -+struct rtw89_tssi_info { -+ u8 thermal[RF_PATH_MAX]; -+ s8 tssi_trim[RF_PATH_MAX][TSSI_TRIM_CH_GROUP_NUM]; -+ s8 tssi_cck[RF_PATH_MAX][TSSI_CCK_CH_GROUP_NUM]; -+ s8 tssi_mcs[RF_PATH_MAX][TSSI_MCS_CH_GROUP_NUM]; -+ s8 extra_ofst[RF_PATH_MAX]; -+ bool tssi_tracking_check[RF_PATH_MAX]; -+ u8 default_txagc_offset[RF_PATH_MAX]; -+ u32 base_thermal[RF_PATH_MAX]; -+}; -+ -+struct rtw89_power_trim_info { -+ bool pg_thermal_trim; -+ bool pg_pa_bias_trim; -+ u8 thermal_trim[RF_PATH_MAX]; -+ u8 pa_bias_trim[RF_PATH_MAX]; -+}; -+ -+struct rtw89_regulatory { -+ char alpha2[3]; -+ u8 txpwr_regd[RTW89_BAND_MAX]; -+}; -+ -+enum rtw89_ifs_clm_application { -+ RTW89_IFS_CLM_INIT = 0, -+ RTW89_IFS_CLM_BACKGROUND = 1, -+ RTW89_IFS_CLM_ACS = 2, -+ RTW89_IFS_CLM_DIG = 3, -+ RTW89_IFS_CLM_TDMA_DIG = 4, -+ RTW89_IFS_CLM_DBG = 5, -+ RTW89_IFS_CLM_DBG_MANUAL = 6 -+}; -+ -+enum rtw89_env_racing_lv { -+ RTW89_RAC_RELEASE = 0, -+ RTW89_RAC_LV_1 = 1, -+ RTW89_RAC_LV_2 = 2, -+ RTW89_RAC_LV_3 = 3, -+ RTW89_RAC_LV_4 = 4, -+ RTW89_RAC_MAX_NUM = 5 -+}; -+ -+struct rtw89_ccx_para_info { -+ enum rtw89_env_racing_lv rac_lv; -+ u16 mntr_time; -+ u8 nhm_manual_th_ofst; -+ u8 nhm_manual_th0; -+ enum rtw89_ifs_clm_application ifs_clm_app; -+ u32 ifs_clm_manual_th_times; -+ u32 ifs_clm_manual_th0; -+ u8 fahm_manual_th_ofst; -+ u8 fahm_manual_th0; -+ u8 fahm_numer_opt; -+ u8 fahm_denom_opt; -+}; -+ -+enum rtw89_ccx_edcca_opt_sc_idx { -+ RTW89_CCX_EDCCA_SEG0_P0 = 0, -+ RTW89_CCX_EDCCA_SEG0_S1 = 1, -+ RTW89_CCX_EDCCA_SEG0_S2 = 2, -+ RTW89_CCX_EDCCA_SEG0_S3 = 3, -+ RTW89_CCX_EDCCA_SEG1_P0 = 4, -+ RTW89_CCX_EDCCA_SEG1_S1 = 5, -+ RTW89_CCX_EDCCA_SEG1_S2 = 6, -+ RTW89_CCX_EDCCA_SEG1_S3 = 7 -+}; -+ -+enum rtw89_ccx_edcca_opt_bw_idx { -+ RTW89_CCX_EDCCA_BW20_0 = 0, -+ RTW89_CCX_EDCCA_BW20_1 = 1, -+ RTW89_CCX_EDCCA_BW20_2 = 2, -+ RTW89_CCX_EDCCA_BW20_3 = 3, -+ RTW89_CCX_EDCCA_BW20_4 = 4, -+ RTW89_CCX_EDCCA_BW20_5 = 5, -+ RTW89_CCX_EDCCA_BW20_6 = 6, -+ RTW89_CCX_EDCCA_BW20_7 = 7 -+}; -+ -+#define RTW89_NHM_TH_NUM 11 -+#define RTW89_FAHM_TH_NUM 11 -+#define RTW89_NHM_RPT_NUM 12 -+#define RTW89_FAHM_RPT_NUM 12 -+#define RTW89_IFS_CLM_NUM 4 -+struct rtw89_env_monitor_info { -+ u32 ccx_trigger_time; -+ u64 start_time; -+ u8 ccx_rpt_stamp; -+ u8 ccx_watchdog_result; -+ bool ccx_ongoing; -+ u8 ccx_rac_lv; -+ bool ccx_manual_ctrl; -+ u8 ccx_pre_rssi; -+ u16 clm_mntr_time; -+ u16 nhm_mntr_time; -+ u16 ifs_clm_mntr_time; -+ enum rtw89_ifs_clm_application ifs_clm_app; -+ u16 fahm_mntr_time; -+ u16 edcca_clm_mntr_time; -+ u16 ccx_period; -+ u8 ccx_unit_idx; -+ enum rtw89_ccx_edcca_opt_bw_idx ccx_edcca_opt_bw_idx; -+ u8 nhm_th[RTW89_NHM_TH_NUM]; -+ u16 ifs_clm_th_l[RTW89_IFS_CLM_NUM]; -+ u16 ifs_clm_th_h[RTW89_IFS_CLM_NUM]; -+ u8 fahm_numer_opt; -+ u8 fahm_denom_opt; -+ u8 fahm_th[RTW89_FAHM_TH_NUM]; -+ u16 clm_result; -+ u16 nhm_result[RTW89_NHM_RPT_NUM]; -+ u8 nhm_wgt[RTW89_NHM_RPT_NUM]; -+ u16 nhm_tx_cnt; -+ u16 nhm_cca_cnt; -+ u16 nhm_idle_cnt; -+ u16 ifs_clm_tx; -+ u16 ifs_clm_edcca_excl_cca; -+ u16 ifs_clm_ofdmfa; -+ u16 ifs_clm_ofdmcca_excl_fa; -+ u16 ifs_clm_cckfa; -+ u16 ifs_clm_cckcca_excl_fa; -+ u16 ifs_clm_total_ifs; -+ u8 ifs_clm_his[RTW89_IFS_CLM_NUM]; -+ u16 ifs_clm_avg[RTW89_IFS_CLM_NUM]; -+ u16 ifs_clm_cca[RTW89_IFS_CLM_NUM]; -+ u16 fahm_result[RTW89_FAHM_RPT_NUM]; -+ u16 fahm_denom_result; -+ u16 edcca_clm_result; -+ u8 clm_ratio; -+ u8 nhm_rpt[RTW89_NHM_RPT_NUM]; -+ u8 nhm_tx_ratio; -+ u8 nhm_cca_ratio; -+ u8 nhm_idle_ratio; -+ u8 nhm_ratio; -+ u16 nhm_result_sum; -+ u8 nhm_pwr; -+ u8 ifs_clm_tx_ratio; -+ u8 ifs_clm_edcca_excl_cca_ratio; -+ u8 ifs_clm_cck_fa_ratio; -+ u8 ifs_clm_ofdm_fa_ratio; -+ u8 ifs_clm_cck_cca_excl_fa_ratio; -+ u8 ifs_clm_ofdm_cca_excl_fa_ratio; -+ u16 ifs_clm_cck_fa_permil; -+ u16 ifs_clm_ofdm_fa_permil; -+ u32 ifs_clm_ifs_avg[RTW89_IFS_CLM_NUM]; -+ u32 ifs_clm_cca_avg[RTW89_IFS_CLM_NUM]; -+ u8 fahm_rpt[RTW89_FAHM_RPT_NUM]; -+ u16 fahm_result_sum; -+ u8 fahm_ratio; -+ u8 fahm_denom_ratio; -+ u8 fahm_pwr; -+ u8 edcca_clm_ratio; -+}; -+ -+enum rtw89_ser_rcvy_step { -+ RTW89_SER_DRV_STOP_TX, -+ RTW89_SER_DRV_STOP_RX, -+ RTW89_SER_DRV_STOP_RUN, -+ RTW89_SER_HAL_STOP_DMA, -+ RTW89_NUM_OF_SER_FLAGS -+}; -+ -+struct rtw89_ser { -+ u8 state; -+ u8 alarm_event; -+ -+ struct work_struct ser_hdl_work; -+ struct delayed_work ser_alarm_work; -+ struct state_ent *st_tbl; -+ struct event_ent *ev_tbl; -+ struct list_head msg_q; -+ spinlock_t msg_q_lock; /* lock when read/write ser msg */ -+ DECLARE_BITMAP(flags, RTW89_NUM_OF_SER_FLAGS); -+}; -+ -+enum rtw89_mac_ax_ps_mode { -+ RTW89_MAC_AX_PS_MODE_ACTIVE = 0, -+ RTW89_MAC_AX_PS_MODE_LEGACY = 1, -+ RTW89_MAC_AX_PS_MODE_WMMPS = 2, -+ RTW89_MAC_AX_PS_MODE_MAX = 3, -+}; -+ -+enum rtw89_last_rpwm_mode { -+ RTW89_LAST_RPWM_PS = 0x0, -+ RTW89_LAST_RPWM_ACTIVE = 0x6, -+}; -+ -+struct rtw89_lps_parm { -+ u8 macid; -+ u8 psmode; /* enum rtw89_mac_ax_ps_mode */ -+ u8 lastrpwm; /* enum rtw89_last_rpwm_mode */ -+}; -+ -+struct rtw89_ppdu_sts_info { -+ struct sk_buff_head rx_queue[RTW89_PHY_MAX]; -+ u8 curr_rx_ppdu_cnt[RTW89_PHY_MAX]; -+}; -+ -+struct rtw89_early_h2c { -+ struct list_head list; -+ u8 *h2c; -+ u16 h2c_len; -+}; -+ -+struct rtw89_dev { -+ struct ieee80211_hw *hw; -+ struct device *dev; -+ -+ bool dbcc_en; -+ const struct rtw89_chip_info *chip; -+ struct rtw89_hal hal; -+ struct rtw89_mac_info mac; -+ struct rtw89_fw_info fw; -+ struct rtw89_hci_info hci; -+ struct rtw89_efuse efuse; -+ struct rtw89_traffic_stats stats; -+ -+ /* ensures exclusive access from mac80211 callbacks */ -+ struct mutex mutex; -+ struct list_head rtwvifs_list; -+ /* used to protect rf read write */ -+ struct mutex rf_mutex; -+ struct workqueue_struct *txq_wq; -+ struct work_struct txq_work; -+ struct delayed_work txq_reinvoke_work; -+ /* used to protect ba_list */ -+ spinlock_t ba_lock; -+ /* txqs to setup ba session */ -+ struct list_head ba_list; -+ struct work_struct ba_work; -+ -+ struct rtw89_cam_info cam_info; -+ -+ struct sk_buff_head c2h_queue; -+ struct work_struct c2h_work; -+ -+ struct list_head early_h2c_list; -+ -+ struct rtw89_ser ser; -+ -+ DECLARE_BITMAP(hw_port, RTW89_MAX_HW_PORT_NUM); -+ DECLARE_BITMAP(mac_id_map, RTW89_MAX_MAC_ID_NUM); -+ DECLARE_BITMAP(flags, NUM_OF_RTW89_FLAGS); -+ -+ struct rtw89_phy_stat phystat; -+ struct rtw89_dack_info dack; -+ struct rtw89_iqk_info iqk; -+ struct rtw89_dpk_info dpk; -+ bool is_tssi_mode[RF_PATH_MAX]; -+ bool is_bt_iqk_timeout; -+ -+ struct rtw89_fem_info fem; -+ struct rtw89_txpwr_byrate byr[RTW89_BAND_MAX]; -+ struct rtw89_tssi_info tssi; -+ struct rtw89_power_trim_info pwr_trim; -+ -+ struct rtw89_cfo_tracking_info cfo_tracking; -+ struct rtw89_env_monitor_info env_monitor; -+ struct rtw89_dig_info dig; -+ struct rtw89_phy_ch_info ch_info; -+ struct delayed_work track_work; -+ struct delayed_work coex_act1_work; -+ struct delayed_work coex_bt_devinfo_work; -+ struct delayed_work coex_rfk_chk_work; -+ struct delayed_work cfo_track_work; -+ struct rtw89_ppdu_sts_info ppdu_sts; -+ u8 total_sta_assoc; -+ bool scanning; -+ -+ const struct rtw89_regulatory *regd; -+ struct rtw89_sar_info sar; -+ -+ struct rtw89_btc btc; -+ enum rtw89_ps_mode ps_mode; -+ bool lps_enabled; -+ -+ /* napi structure */ -+ struct net_device netdev; -+ struct napi_struct napi; -+ int napi_budget_countdown; -+ -+ /* HCI related data, keep last */ -+ u8 priv[0] __aligned(sizeof(void *)); -+}; -+ -+static inline int rtw89_hci_tx_write(struct rtw89_dev *rtwdev, -+ struct rtw89_core_tx_request *tx_req) -+{ -+ return rtwdev->hci.ops->tx_write(rtwdev, tx_req); -+} -+ -+static inline void rtw89_hci_reset(struct rtw89_dev *rtwdev) -+{ -+ rtwdev->hci.ops->reset(rtwdev); -+} -+ -+static inline int rtw89_hci_start(struct rtw89_dev *rtwdev) -+{ -+ return rtwdev->hci.ops->start(rtwdev); -+} -+ -+static inline void rtw89_hci_stop(struct rtw89_dev *rtwdev) -+{ -+ rtwdev->hci.ops->stop(rtwdev); -+} -+ -+static inline int rtw89_hci_deinit(struct rtw89_dev *rtwdev) -+{ -+ return rtwdev->hci.ops->deinit(rtwdev); -+} -+ -+static inline void rtw89_hci_recalc_int_mit(struct rtw89_dev *rtwdev) -+{ -+ rtwdev->hci.ops->recalc_int_mit(rtwdev); -+} -+ -+static inline u32 rtw89_hci_check_and_reclaim_tx_resource(struct rtw89_dev *rtwdev, u8 txch) -+{ -+ return rtwdev->hci.ops->check_and_reclaim_tx_resource(rtwdev, txch); -+} -+ -+static inline void rtw89_hci_tx_kick_off(struct rtw89_dev *rtwdev, u8 txch) -+{ -+ return rtwdev->hci.ops->tx_kick_off(rtwdev, txch); -+} -+ -+static inline void rtw89_hci_flush_queues(struct rtw89_dev *rtwdev, u32 queues, -+ bool drop) -+{ -+ if (rtwdev->hci.ops->flush_queues) -+ return rtwdev->hci.ops->flush_queues(rtwdev, queues, drop); -+} -+ -+static inline u8 rtw89_read8(struct rtw89_dev *rtwdev, u32 addr) -+{ -+ return rtwdev->hci.ops->read8(rtwdev, addr); -+} -+ -+static inline u16 rtw89_read16(struct rtw89_dev *rtwdev, u32 addr) -+{ -+ return rtwdev->hci.ops->read16(rtwdev, addr); -+} -+ -+static inline u32 rtw89_read32(struct rtw89_dev *rtwdev, u32 addr) -+{ -+ return rtwdev->hci.ops->read32(rtwdev, addr); -+} -+ -+static inline void rtw89_write8(struct rtw89_dev *rtwdev, u32 addr, u8 data) -+{ -+ rtwdev->hci.ops->write8(rtwdev, addr, data); -+} -+ -+static inline void rtw89_write16(struct rtw89_dev *rtwdev, u32 addr, u16 data) -+{ -+ rtwdev->hci.ops->write16(rtwdev, addr, data); -+} -+ -+static inline void rtw89_write32(struct rtw89_dev *rtwdev, u32 addr, u32 data) -+{ -+ rtwdev->hci.ops->write32(rtwdev, addr, data); -+} -+ -+static inline void -+rtw89_write8_set(struct rtw89_dev *rtwdev, u32 addr, u8 bit) -+{ -+ u8 val; -+ -+ val = rtw89_read8(rtwdev, addr); -+ rtw89_write8(rtwdev, addr, val | bit); -+} -+ -+static inline void -+rtw89_write16_set(struct rtw89_dev *rtwdev, u32 addr, u16 bit) -+{ -+ u16 val; -+ -+ val = rtw89_read16(rtwdev, addr); -+ rtw89_write16(rtwdev, addr, val | bit); -+} -+ -+static inline void -+rtw89_write32_set(struct rtw89_dev *rtwdev, u32 addr, u32 bit) -+{ -+ u32 val; -+ -+ val = rtw89_read32(rtwdev, addr); -+ rtw89_write32(rtwdev, addr, val | bit); -+} -+ -+static inline void -+rtw89_write8_clr(struct rtw89_dev *rtwdev, u32 addr, u8 bit) -+{ -+ u8 val; -+ -+ val = rtw89_read8(rtwdev, addr); -+ rtw89_write8(rtwdev, addr, val & ~bit); -+} -+ -+static inline void -+rtw89_write16_clr(struct rtw89_dev *rtwdev, u32 addr, u16 bit) -+{ -+ u16 val; -+ -+ val = rtw89_read16(rtwdev, addr); -+ rtw89_write16(rtwdev, addr, val & ~bit); -+} -+ -+static inline void -+rtw89_write32_clr(struct rtw89_dev *rtwdev, u32 addr, u32 bit) -+{ -+ u32 val; -+ -+ val = rtw89_read32(rtwdev, addr); -+ rtw89_write32(rtwdev, addr, val & ~bit); -+} -+ -+static inline u32 -+rtw89_read32_mask(struct rtw89_dev *rtwdev, u32 addr, u32 mask) -+{ -+ u32 shift = __ffs(mask); -+ u32 orig; -+ u32 ret; -+ -+ orig = rtw89_read32(rtwdev, addr); -+ ret = (orig & mask) >> shift; -+ -+ return ret; -+} -+ -+static inline u16 -+rtw89_read16_mask(struct rtw89_dev *rtwdev, u32 addr, u32 mask) -+{ -+ u32 shift = __ffs(mask); -+ u32 orig; -+ u32 ret; -+ -+ orig = rtw89_read16(rtwdev, addr); -+ ret = (orig & mask) >> shift; -+ -+ return ret; -+} -+ -+static inline u8 -+rtw89_read8_mask(struct rtw89_dev *rtwdev, u32 addr, u32 mask) -+{ -+ u32 shift = __ffs(mask); -+ u32 orig; -+ u32 ret; -+ -+ orig = rtw89_read8(rtwdev, addr); -+ ret = (orig & mask) >> shift; -+ -+ return ret; -+} -+ -+static inline void -+rtw89_write32_mask(struct rtw89_dev *rtwdev, u32 addr, u32 mask, u32 data) -+{ -+ u32 shift = __ffs(mask); -+ u32 orig; -+ u32 set; -+ -+ WARN(addr & 0x3, "should be 4-byte aligned, addr = 0x%08x\n", addr); -+ -+ orig = rtw89_read32(rtwdev, addr); -+ set = (orig & ~mask) | ((data << shift) & mask); -+ rtw89_write32(rtwdev, addr, set); -+} -+ -+static inline void -+rtw89_write16_mask(struct rtw89_dev *rtwdev, u32 addr, u32 mask, u16 data) -+{ -+ u32 shift; -+ u16 orig, set; -+ -+ mask &= 0xffff; -+ shift = __ffs(mask); -+ -+ orig = rtw89_read16(rtwdev, addr); -+ set = (orig & ~mask) | ((data << shift) & mask); -+ rtw89_write16(rtwdev, addr, set); -+} -+ -+static inline void -+rtw89_write8_mask(struct rtw89_dev *rtwdev, u32 addr, u32 mask, u8 data) -+{ -+ u32 shift; -+ u8 orig, set; -+ -+ mask &= 0xff; -+ shift = __ffs(mask); -+ -+ orig = rtw89_read8(rtwdev, addr); -+ set = (orig & ~mask) | ((data << shift) & mask); -+ rtw89_write8(rtwdev, addr, set); -+} -+ -+static inline u32 -+rtw89_read_rf(struct rtw89_dev *rtwdev, enum rtw89_rf_path rf_path, -+ u32 addr, u32 mask) -+{ -+ u32 val; -+ -+ mutex_lock(&rtwdev->rf_mutex); -+ val = rtwdev->chip->ops->read_rf(rtwdev, rf_path, addr, mask); -+ mutex_unlock(&rtwdev->rf_mutex); -+ -+ return val; -+} -+ -+static inline void -+rtw89_write_rf(struct rtw89_dev *rtwdev, enum rtw89_rf_path rf_path, -+ u32 addr, u32 mask, u32 data) -+{ -+ mutex_lock(&rtwdev->rf_mutex); -+ rtwdev->chip->ops->write_rf(rtwdev, rf_path, addr, mask, data); -+ mutex_unlock(&rtwdev->rf_mutex); -+} -+ -+static inline struct ieee80211_txq *rtw89_txq_to_txq(struct rtw89_txq *rtwtxq) -+{ -+ void *p = rtwtxq; -+ -+ return container_of(p, struct ieee80211_txq, drv_priv); -+} -+ -+static inline void rtw89_core_txq_init(struct rtw89_dev *rtwdev, -+ struct ieee80211_txq *txq) -+{ -+ struct rtw89_txq *rtwtxq; -+ -+ if (!txq) -+ return; -+ -+ rtwtxq = (struct rtw89_txq *)txq->drv_priv; -+ INIT_LIST_HEAD(&rtwtxq->list); -+} -+ -+static inline struct ieee80211_vif *rtwvif_to_vif(struct rtw89_vif *rtwvif) -+{ -+ void *p = rtwvif; -+ -+ return container_of(p, struct ieee80211_vif, drv_priv); -+} -+ -+static inline struct ieee80211_sta *rtwsta_to_sta(struct rtw89_sta *rtwsta) -+{ -+ void *p = rtwsta; -+ -+ return container_of(p, struct ieee80211_sta, drv_priv); -+} -+ -+static inline -+void rtw89_chip_set_channel_prepare(struct rtw89_dev *rtwdev, -+ struct rtw89_channel_help_params *p) -+{ -+ rtwdev->chip->ops->set_channel_help(rtwdev, true, p); -+} -+ -+static inline -+void rtw89_chip_set_channel_done(struct rtw89_dev *rtwdev, -+ struct rtw89_channel_help_params *p) -+{ -+ rtwdev->chip->ops->set_channel_help(rtwdev, false, p); -+} -+ -+static inline void rtw89_chip_fem_setup(struct rtw89_dev *rtwdev) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ -+ if (chip->ops->fem_setup) -+ chip->ops->fem_setup(rtwdev); -+} -+ -+static inline void rtw89_chip_bb_sethw(struct rtw89_dev *rtwdev) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ -+ if (chip->ops->bb_sethw) -+ chip->ops->bb_sethw(rtwdev); -+} -+ -+static inline void rtw89_chip_rfk_init(struct rtw89_dev *rtwdev) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ -+ if (chip->ops->rfk_init) -+ chip->ops->rfk_init(rtwdev); -+} -+ -+static inline void rtw89_chip_rfk_channel(struct rtw89_dev *rtwdev) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ -+ if (chip->ops->rfk_channel) -+ chip->ops->rfk_channel(rtwdev); -+} -+ -+static inline void rtw89_chip_rfk_band_changed(struct rtw89_dev *rtwdev) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ -+ if (chip->ops->rfk_band_changed) -+ chip->ops->rfk_band_changed(rtwdev); -+} -+ -+static inline void rtw89_chip_rfk_scan(struct rtw89_dev *rtwdev, bool start) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ -+ if (chip->ops->rfk_scan) -+ chip->ops->rfk_scan(rtwdev, start); -+} -+ -+static inline void rtw89_chip_rfk_track(struct rtw89_dev *rtwdev) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ -+ if (chip->ops->rfk_track) -+ chip->ops->rfk_track(rtwdev); -+} -+ -+static inline void rtw89_chip_set_txpwr_ctrl(struct rtw89_dev *rtwdev) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ -+ if (chip->ops->set_txpwr_ctrl) -+ chip->ops->set_txpwr_ctrl(rtwdev); -+} -+ -+static inline void rtw89_chip_set_txpwr(struct rtw89_dev *rtwdev) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ u8 ch = rtwdev->hal.current_channel; -+ -+ if (!ch) -+ return; -+ -+ if (chip->ops->set_txpwr) -+ chip->ops->set_txpwr(rtwdev); -+} -+ -+static inline void rtw89_chip_power_trim(struct rtw89_dev *rtwdev) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ -+ if (chip->ops->power_trim) -+ chip->ops->power_trim(rtwdev); -+} -+ -+static inline void rtw89_chip_init_txpwr_unit(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy_idx) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ -+ if (chip->ops->init_txpwr_unit) -+ chip->ops->init_txpwr_unit(rtwdev, phy_idx); -+} -+ -+static inline u8 rtw89_chip_get_thermal(struct rtw89_dev *rtwdev, -+ enum rtw89_rf_path rf_path) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ -+ if (!chip->ops->get_thermal) -+ return 0x10; -+ -+ return chip->ops->get_thermal(rtwdev, rf_path); -+} -+ -+static inline void rtw89_chip_query_ppdu(struct rtw89_dev *rtwdev, -+ struct rtw89_rx_phy_ppdu *phy_ppdu, -+ struct ieee80211_rx_status *status) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ -+ if (chip->ops->query_ppdu) -+ chip->ops->query_ppdu(rtwdev, phy_ppdu, status); -+} -+ -+static inline void rtw89_chip_bb_ctrl_btc_preagc(struct rtw89_dev *rtwdev, -+ bool bt_en) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ -+ if (chip->ops->bb_ctrl_btc_preagc) -+ chip->ops->bb_ctrl_btc_preagc(rtwdev, bt_en); -+} -+ -+static inline -+void rtw89_chip_cfg_txpwr_ul_tb_offset(struct rtw89_dev *rtwdev, -+ struct ieee80211_vif *vif) -+{ -+ struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ -+ if (!vif->bss_conf.he_support || !vif->bss_conf.assoc) -+ return; -+ -+ if (chip->ops->set_txpwr_ul_tb_offset) -+ chip->ops->set_txpwr_ul_tb_offset(rtwdev, 0, rtwvif->mac_idx); -+} -+ -+static inline void rtw89_load_txpwr_table(struct rtw89_dev *rtwdev, -+ const struct rtw89_txpwr_table *tbl) -+{ -+ tbl->load(rtwdev, tbl); -+} -+ -+static inline u8 rtw89_regd_get(struct rtw89_dev *rtwdev, u8 band) -+{ -+ return rtwdev->regd->txpwr_regd[band]; -+} -+ -+static inline void rtw89_ctrl_btg(struct rtw89_dev *rtwdev, bool btg) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ -+ if (chip->ops->ctrl_btg) -+ chip->ops->ctrl_btg(rtwdev, btg); -+} -+ -+static inline u8 *get_hdr_bssid(struct ieee80211_hdr *hdr) -+{ -+ __le16 fc = hdr->frame_control; -+ -+ if (ieee80211_has_tods(fc)) -+ return hdr->addr1; -+ else if (ieee80211_has_fromds(fc)) -+ return hdr->addr2; -+ else -+ return hdr->addr3; -+} -+ -+static inline bool rtw89_sta_has_beamformer_cap(struct ieee80211_sta *sta) -+{ -+ if ((sta->vht_cap.cap & IEEE80211_VHT_CAP_MU_BEAMFORMER_CAPABLE) || -+ (sta->vht_cap.cap & IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE) || -+ (sta->he_cap.he_cap_elem.phy_cap_info[3] & IEEE80211_HE_PHY_CAP3_SU_BEAMFORMER) || -+ (sta->he_cap.he_cap_elem.phy_cap_info[4] & IEEE80211_HE_PHY_CAP4_MU_BEAMFORMER)) -+ return true; -+ return false; -+} -+ -+static inline struct rtw89_fw_suit *rtw89_fw_suit_get(struct rtw89_dev *rtwdev, -+ enum rtw89_fw_type type) -+{ -+ struct rtw89_fw_info *fw_info = &rtwdev->fw; -+ -+ if (type == RTW89_FW_WOWLAN) -+ return &fw_info->wowlan; -+ return &fw_info->normal; -+} -+ -+int rtw89_core_tx_write(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif, -+ struct ieee80211_sta *sta, struct sk_buff *skb, int *qsel); -+int rtw89_h2c_tx(struct rtw89_dev *rtwdev, -+ struct sk_buff *skb, bool fwdl); -+void rtw89_core_tx_kick_off(struct rtw89_dev *rtwdev, u8 qsel); -+void rtw89_core_fill_txdesc(struct rtw89_dev *rtwdev, -+ struct rtw89_tx_desc_info *desc_info, -+ void *txdesc); -+void rtw89_core_rx(struct rtw89_dev *rtwdev, -+ struct rtw89_rx_desc_info *desc_info, -+ struct sk_buff *skb); -+void rtw89_core_query_rxdesc(struct rtw89_dev *rtwdev, -+ struct rtw89_rx_desc_info *desc_info, -+ u8 *data, u32 data_offset); -+void rtw89_core_napi_start(struct rtw89_dev *rtwdev); -+void rtw89_core_napi_stop(struct rtw89_dev *rtwdev); -+void rtw89_core_napi_init(struct rtw89_dev *rtwdev); -+void rtw89_core_napi_deinit(struct rtw89_dev *rtwdev); -+int rtw89_core_sta_add(struct rtw89_dev *rtwdev, -+ struct ieee80211_vif *vif, -+ struct ieee80211_sta *sta); -+int rtw89_core_sta_assoc(struct rtw89_dev *rtwdev, -+ struct ieee80211_vif *vif, -+ struct ieee80211_sta *sta); -+int rtw89_core_sta_disassoc(struct rtw89_dev *rtwdev, -+ struct ieee80211_vif *vif, -+ struct ieee80211_sta *sta); -+int rtw89_core_sta_disconnect(struct rtw89_dev *rtwdev, -+ struct ieee80211_vif *vif, -+ struct ieee80211_sta *sta); -+int rtw89_core_sta_remove(struct rtw89_dev *rtwdev, -+ struct ieee80211_vif *vif, -+ struct ieee80211_sta *sta); -+int rtw89_core_init(struct rtw89_dev *rtwdev); -+void rtw89_core_deinit(struct rtw89_dev *rtwdev); -+int rtw89_core_register(struct rtw89_dev *rtwdev); -+void rtw89_core_unregister(struct rtw89_dev *rtwdev); -+void rtw89_set_channel(struct rtw89_dev *rtwdev); -+u8 rtw89_core_acquire_bit_map(unsigned long *addr, unsigned long size); -+void rtw89_core_release_bit_map(unsigned long *addr, u8 bit); -+void rtw89_core_release_all_bits_map(unsigned long *addr, unsigned int nbits); -+void rtw89_vif_type_mapping(struct ieee80211_vif *vif, bool assoc); -+int rtw89_chip_info_setup(struct rtw89_dev *rtwdev); -+u16 rtw89_ra_report_to_bitrate(struct rtw89_dev *rtwdev, u8 rpt_rate); -+int rtw89_regd_init(struct rtw89_dev *rtwdev, -+ void (*reg_notifier)(struct wiphy *wiphy, struct regulatory_request *request)); -+void rtw89_regd_notifier(struct wiphy *wiphy, struct regulatory_request *request); -+void rtw89_traffic_stats_init(struct rtw89_dev *rtwdev, -+ struct rtw89_traffic_stats *stats); -+int rtw89_core_start(struct rtw89_dev *rtwdev); -+void rtw89_core_stop(struct rtw89_dev *rtwdev); -+ -+#endif -diff --git a/drivers/net/wireless/realtek/rtw89/debug.c b/drivers/net/wireless/realtek/rtw89/debug.c -new file mode 100644 -index 000000000000..29eb188c888c ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/debug.c -@@ -0,0 +1,2489 @@ -+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause -+/* Copyright(c) 2019-2020 Realtek Corporation -+ */ -+ -+#include "coex.h" -+#include "debug.h" -+#include "fw.h" -+#include "mac.h" -+#include "ps.h" -+#include "reg.h" -+#include "sar.h" -+ -+#ifdef CONFIG_RTW89_DEBUGMSG -+unsigned int rtw89_debug_mask; -+EXPORT_SYMBOL(rtw89_debug_mask); -+module_param_named(debug_mask, rtw89_debug_mask, uint, 0644); -+MODULE_PARM_DESC(debug_mask, "Debugging mask"); -+#endif -+ -+#ifdef CONFIG_RTW89_DEBUGFS -+struct rtw89_debugfs_priv { -+ struct rtw89_dev *rtwdev; -+ int (*cb_read)(struct seq_file *m, void *v); -+ ssize_t (*cb_write)(struct file *filp, const char __user *buffer, -+ size_t count, loff_t *loff); -+ union { -+ u32 cb_data; -+ struct { -+ u32 addr; -+ u8 len; -+ } read_reg; -+ struct { -+ u32 addr; -+ u32 mask; -+ u8 path; -+ } read_rf; -+ struct { -+ u8 ss_dbg:1; -+ u8 dle_dbg:1; -+ u8 dmac_dbg:1; -+ u8 cmac_dbg:1; -+ u8 dbg_port:1; -+ } dbgpkg_en; -+ struct { -+ u32 start; -+ u32 len; -+ u8 sel; -+ } mac_mem; -+ }; -+}; -+ -+static int rtw89_debugfs_single_show(struct seq_file *m, void *v) -+{ -+ struct rtw89_debugfs_priv *debugfs_priv = m->private; -+ -+ return debugfs_priv->cb_read(m, v); -+} -+ -+static ssize_t rtw89_debugfs_single_write(struct file *filp, -+ const char __user *buffer, -+ size_t count, loff_t *loff) -+{ -+ struct rtw89_debugfs_priv *debugfs_priv = filp->private_data; -+ -+ return debugfs_priv->cb_write(filp, buffer, count, loff); -+} -+ -+static ssize_t rtw89_debugfs_seq_file_write(struct file *filp, -+ const char __user *buffer, -+ size_t count, loff_t *loff) -+{ -+ struct seq_file *seqpriv = (struct seq_file *)filp->private_data; -+ struct rtw89_debugfs_priv *debugfs_priv = seqpriv->private; -+ -+ return debugfs_priv->cb_write(filp, buffer, count, loff); -+} -+ -+static int rtw89_debugfs_single_open(struct inode *inode, struct file *filp) -+{ -+ return single_open(filp, rtw89_debugfs_single_show, inode->i_private); -+} -+ -+static int rtw89_debugfs_close(struct inode *inode, struct file *filp) -+{ -+ return 0; -+} -+ -+static const struct file_operations file_ops_single_r = { -+ .owner = THIS_MODULE, -+ .open = rtw89_debugfs_single_open, -+ .read = seq_read, -+ .llseek = seq_lseek, -+ .release = single_release, -+}; -+ -+static const struct file_operations file_ops_common_rw = { -+ .owner = THIS_MODULE, -+ .open = rtw89_debugfs_single_open, -+ .release = single_release, -+ .read = seq_read, -+ .llseek = seq_lseek, -+ .write = rtw89_debugfs_seq_file_write, -+}; -+ -+static const struct file_operations file_ops_single_w = { -+ .owner = THIS_MODULE, -+ .write = rtw89_debugfs_single_write, -+ .open = simple_open, -+ .release = rtw89_debugfs_close, -+}; -+ -+static ssize_t -+rtw89_debug_priv_read_reg_select(struct file *filp, -+ const char __user *user_buf, -+ size_t count, loff_t *loff) -+{ -+ struct seq_file *m = (struct seq_file *)filp->private_data; -+ struct rtw89_debugfs_priv *debugfs_priv = m->private; -+ struct rtw89_dev *rtwdev = debugfs_priv->rtwdev; -+ char buf[32]; -+ size_t buf_size; -+ u32 addr, len; -+ int num; -+ -+ buf_size = min(count, sizeof(buf) - 1); -+ if (copy_from_user(buf, user_buf, buf_size)) -+ return -EFAULT; -+ -+ buf[buf_size] = '\0'; -+ num = sscanf(buf, "%x %x", &addr, &len); -+ if (num != 2) { -+ rtw89_info(rtwdev, "invalid format: \n"); -+ return -EINVAL; -+ } -+ -+ debugfs_priv->read_reg.addr = addr; -+ debugfs_priv->read_reg.len = len; -+ -+ rtw89_info(rtwdev, "select read %d bytes from 0x%08x\n", len, addr); -+ -+ return count; -+} -+ -+static int rtw89_debug_priv_read_reg_get(struct seq_file *m, void *v) -+{ -+ struct rtw89_debugfs_priv *debugfs_priv = m->private; -+ struct rtw89_dev *rtwdev = debugfs_priv->rtwdev; -+ u32 addr, data; -+ u8 len; -+ -+ len = debugfs_priv->read_reg.len; -+ addr = debugfs_priv->read_reg.addr; -+ -+ switch (len) { -+ case 1: -+ data = rtw89_read8(rtwdev, addr); -+ break; -+ case 2: -+ data = rtw89_read16(rtwdev, addr); -+ break; -+ case 4: -+ data = rtw89_read32(rtwdev, addr); -+ break; -+ default: -+ rtw89_info(rtwdev, "invalid read reg len %d\n", len); -+ return -EINVAL; -+ } -+ -+ seq_printf(m, "get %d bytes at 0x%08x=0x%08x\n", len, addr, data); -+ -+ return 0; -+} -+ -+static ssize_t rtw89_debug_priv_write_reg_set(struct file *filp, -+ const char __user *user_buf, -+ size_t count, loff_t *loff) -+{ -+ struct rtw89_debugfs_priv *debugfs_priv = filp->private_data; -+ struct rtw89_dev *rtwdev = debugfs_priv->rtwdev; -+ char buf[32]; -+ size_t buf_size; -+ u32 addr, val, len; -+ int num; -+ -+ buf_size = min(count, sizeof(buf) - 1); -+ if (copy_from_user(buf, user_buf, buf_size)) -+ return -EFAULT; -+ -+ buf[buf_size] = '\0'; -+ num = sscanf(buf, "%x %x %x", &addr, &val, &len); -+ if (num != 3) { -+ rtw89_info(rtwdev, "invalid format: \n"); -+ return -EINVAL; -+ } -+ -+ switch (len) { -+ case 1: -+ rtw89_info(rtwdev, "reg write8 0x%08x: 0x%02x\n", addr, val); -+ rtw89_write8(rtwdev, addr, (u8)val); -+ break; -+ case 2: -+ rtw89_info(rtwdev, "reg write16 0x%08x: 0x%04x\n", addr, val); -+ rtw89_write16(rtwdev, addr, (u16)val); -+ break; -+ case 4: -+ rtw89_info(rtwdev, "reg write32 0x%08x: 0x%08x\n", addr, val); -+ rtw89_write32(rtwdev, addr, (u32)val); -+ break; -+ default: -+ rtw89_info(rtwdev, "invalid read write len %d\n", len); -+ break; -+ } -+ -+ return count; -+} -+ -+static ssize_t -+rtw89_debug_priv_read_rf_select(struct file *filp, -+ const char __user *user_buf, -+ size_t count, loff_t *loff) -+{ -+ struct seq_file *m = (struct seq_file *)filp->private_data; -+ struct rtw89_debugfs_priv *debugfs_priv = m->private; -+ struct rtw89_dev *rtwdev = debugfs_priv->rtwdev; -+ char buf[32]; -+ size_t buf_size; -+ u32 addr, mask; -+ u8 path; -+ int num; -+ -+ buf_size = min(count, sizeof(buf) - 1); -+ if (copy_from_user(buf, user_buf, buf_size)) -+ return -EFAULT; -+ -+ buf[buf_size] = '\0'; -+ num = sscanf(buf, "%hhd %x %x", &path, &addr, &mask); -+ if (num != 3) { -+ rtw89_info(rtwdev, "invalid format: \n"); -+ return -EINVAL; -+ } -+ -+ if (path >= rtwdev->chip->rf_path_num) { -+ rtw89_info(rtwdev, "wrong rf path\n"); -+ return -EINVAL; -+ } -+ debugfs_priv->read_rf.addr = addr; -+ debugfs_priv->read_rf.mask = mask; -+ debugfs_priv->read_rf.path = path; -+ -+ rtw89_info(rtwdev, "select read rf path %d from 0x%08x\n", path, addr); -+ -+ return count; -+} -+ -+static int rtw89_debug_priv_read_rf_get(struct seq_file *m, void *v) -+{ -+ struct rtw89_debugfs_priv *debugfs_priv = m->private; -+ struct rtw89_dev *rtwdev = debugfs_priv->rtwdev; -+ u32 addr, data, mask; -+ u8 path; -+ -+ addr = debugfs_priv->read_rf.addr; -+ mask = debugfs_priv->read_rf.mask; -+ path = debugfs_priv->read_rf.path; -+ -+ data = rtw89_read_rf(rtwdev, path, addr, mask); -+ -+ seq_printf(m, "path %d, rf register 0x%08x=0x%08x\n", path, addr, data); -+ -+ return 0; -+} -+ -+static ssize_t rtw89_debug_priv_write_rf_set(struct file *filp, -+ const char __user *user_buf, -+ size_t count, loff_t *loff) -+{ -+ struct rtw89_debugfs_priv *debugfs_priv = filp->private_data; -+ struct rtw89_dev *rtwdev = debugfs_priv->rtwdev; -+ char buf[32]; -+ size_t buf_size; -+ u32 addr, val, mask; -+ u8 path; -+ int num; -+ -+ buf_size = min(count, sizeof(buf) - 1); -+ if (copy_from_user(buf, user_buf, buf_size)) -+ return -EFAULT; -+ -+ buf[buf_size] = '\0'; -+ num = sscanf(buf, "%hhd %x %x %x", &path, &addr, &mask, &val); -+ if (num != 4) { -+ rtw89_info(rtwdev, "invalid format: \n"); -+ return -EINVAL; -+ } -+ -+ if (path >= rtwdev->chip->rf_path_num) { -+ rtw89_info(rtwdev, "wrong rf path\n"); -+ return -EINVAL; -+ } -+ -+ rtw89_info(rtwdev, "path %d, rf register write 0x%08x=0x%08x (mask = 0x%08x)\n", -+ path, addr, val, mask); -+ rtw89_write_rf(rtwdev, path, addr, mask, val); -+ -+ return count; -+} -+ -+static int rtw89_debug_priv_rf_reg_dump_get(struct seq_file *m, void *v) -+{ -+ struct rtw89_debugfs_priv *debugfs_priv = m->private; -+ struct rtw89_dev *rtwdev = debugfs_priv->rtwdev; -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ u32 addr, offset, data; -+ u8 path; -+ -+ for (path = 0; path < chip->rf_path_num; path++) { -+ seq_printf(m, "RF path %d:\n\n", path); -+ for (addr = 0; addr < 0x100; addr += 4) { -+ seq_printf(m, "0x%08x: ", addr); -+ for (offset = 0; offset < 4; offset++) { -+ data = rtw89_read_rf(rtwdev, path, -+ addr + offset, RFREG_MASK); -+ seq_printf(m, "0x%05x ", data); -+ } -+ seq_puts(m, "\n"); -+ } -+ seq_puts(m, "\n"); -+ } -+ -+ return 0; -+} -+ -+struct txpwr_ent { -+ const char *txt; -+ u8 len; -+}; -+ -+struct txpwr_map { -+ const struct txpwr_ent *ent; -+ u8 size; -+ u32 addr_from; -+ u32 addr_to; -+}; -+ -+#define __GEN_TXPWR_ENT2(_t, _e0, _e1) \ -+ { .len = 2, .txt = _t "\t- " _e0 " " _e1 } -+ -+#define __GEN_TXPWR_ENT4(_t, _e0, _e1, _e2, _e3) \ -+ { .len = 4, .txt = _t "\t- " _e0 " " _e1 " " _e2 " " _e3 } -+ -+#define __GEN_TXPWR_ENT8(_t, _e0, _e1, _e2, _e3, _e4, _e5, _e6, _e7) \ -+ { .len = 8, .txt = _t "\t- " \ -+ _e0 " " _e1 " " _e2 " " _e3 " " \ -+ _e4 " " _e5 " " _e6 " " _e7 } -+ -+static const struct txpwr_ent __txpwr_ent_byr[] = { -+ __GEN_TXPWR_ENT4("CCK ", "1M ", "2M ", "5.5M ", "11M "), -+ __GEN_TXPWR_ENT4("LEGACY ", "6M ", "9M ", "12M ", "18M "), -+ __GEN_TXPWR_ENT4("LEGACY ", "24M ", "36M ", "48M ", "54M "), -+ /* 1NSS */ -+ __GEN_TXPWR_ENT4("MCS_1NSS ", "MCS0 ", "MCS1 ", "MCS2 ", "MCS3 "), -+ __GEN_TXPWR_ENT4("MCS_1NSS ", "MCS4 ", "MCS5 ", "MCS6 ", "MCS7 "), -+ __GEN_TXPWR_ENT4("MCS_1NSS ", "MCS8 ", "MCS9 ", "MCS10", "MCS11"), -+ __GEN_TXPWR_ENT4("HEDCM_1NSS", "MCS0 ", "MCS1 ", "MCS3 ", "MCS4 "), -+ /* 2NSS */ -+ __GEN_TXPWR_ENT4("MCS_2NSS ", "MCS0 ", "MCS1 ", "MCS2 ", "MCS3 "), -+ __GEN_TXPWR_ENT4("MCS_2NSS ", "MCS4 ", "MCS5 ", "MCS6 ", "MCS7 "), -+ __GEN_TXPWR_ENT4("MCS_2NSS ", "MCS8 ", "MCS9 ", "MCS10", "MCS11"), -+ __GEN_TXPWR_ENT4("HEDCM_2NSS", "MCS0 ", "MCS1 ", "MCS3 ", "MCS4 "), -+}; -+ -+static_assert((ARRAY_SIZE(__txpwr_ent_byr) * 4) == -+ (R_AX_PWR_BY_RATE_MAX - R_AX_PWR_BY_RATE + 4)); -+ -+static const struct txpwr_map __txpwr_map_byr = { -+ .ent = __txpwr_ent_byr, -+ .size = ARRAY_SIZE(__txpwr_ent_byr), -+ .addr_from = R_AX_PWR_BY_RATE, -+ .addr_to = R_AX_PWR_BY_RATE_MAX, -+}; -+ -+static const struct txpwr_ent __txpwr_ent_lmt[] = { -+ /* 1TX */ -+ __GEN_TXPWR_ENT2("CCK_1TX_20M ", "NON_BF", "BF"), -+ __GEN_TXPWR_ENT2("CCK_1TX_40M ", "NON_BF", "BF"), -+ __GEN_TXPWR_ENT2("OFDM_1TX ", "NON_BF", "BF"), -+ __GEN_TXPWR_ENT2("MCS_1TX_20M_0 ", "NON_BF", "BF"), -+ __GEN_TXPWR_ENT2("MCS_1TX_20M_1 ", "NON_BF", "BF"), -+ __GEN_TXPWR_ENT2("MCS_1TX_20M_2 ", "NON_BF", "BF"), -+ __GEN_TXPWR_ENT2("MCS_1TX_20M_3 ", "NON_BF", "BF"), -+ __GEN_TXPWR_ENT2("MCS_1TX_20M_4 ", "NON_BF", "BF"), -+ __GEN_TXPWR_ENT2("MCS_1TX_20M_5 ", "NON_BF", "BF"), -+ __GEN_TXPWR_ENT2("MCS_1TX_20M_6 ", "NON_BF", "BF"), -+ __GEN_TXPWR_ENT2("MCS_1TX_20M_7 ", "NON_BF", "BF"), -+ __GEN_TXPWR_ENT2("MCS_1TX_40M_0 ", "NON_BF", "BF"), -+ __GEN_TXPWR_ENT2("MCS_1TX_40M_1 ", "NON_BF", "BF"), -+ __GEN_TXPWR_ENT2("MCS_1TX_40M_2 ", "NON_BF", "BF"), -+ __GEN_TXPWR_ENT2("MCS_1TX_40M_3 ", "NON_BF", "BF"), -+ __GEN_TXPWR_ENT2("MCS_1TX_80M_0 ", "NON_BF", "BF"), -+ __GEN_TXPWR_ENT2("MCS_1TX_80M_1 ", "NON_BF", "BF"), -+ __GEN_TXPWR_ENT2("MCS_1TX_160M ", "NON_BF", "BF"), -+ __GEN_TXPWR_ENT2("MCS_1TX_40M_0p5", "NON_BF", "BF"), -+ __GEN_TXPWR_ENT2("MCS_1TX_40M_2p5", "NON_BF", "BF"), -+ /* 2TX */ -+ __GEN_TXPWR_ENT2("CCK_2TX_20M ", "NON_BF", "BF"), -+ __GEN_TXPWR_ENT2("CCK_2TX_40M ", "NON_BF", "BF"), -+ __GEN_TXPWR_ENT2("OFDM_2TX ", "NON_BF", "BF"), -+ __GEN_TXPWR_ENT2("MCS_2TX_20M_0 ", "NON_BF", "BF"), -+ __GEN_TXPWR_ENT2("MCS_2TX_20M_1 ", "NON_BF", "BF"), -+ __GEN_TXPWR_ENT2("MCS_2TX_20M_2 ", "NON_BF", "BF"), -+ __GEN_TXPWR_ENT2("MCS_2TX_20M_3 ", "NON_BF", "BF"), -+ __GEN_TXPWR_ENT2("MCS_2TX_20M_4 ", "NON_BF", "BF"), -+ __GEN_TXPWR_ENT2("MCS_2TX_20M_5 ", "NON_BF", "BF"), -+ __GEN_TXPWR_ENT2("MCS_2TX_20M_6 ", "NON_BF", "BF"), -+ __GEN_TXPWR_ENT2("MCS_2TX_20M_7 ", "NON_BF", "BF"), -+ __GEN_TXPWR_ENT2("MCS_2TX_40M_0 ", "NON_BF", "BF"), -+ __GEN_TXPWR_ENT2("MCS_2TX_40M_1 ", "NON_BF", "BF"), -+ __GEN_TXPWR_ENT2("MCS_2TX_40M_2 ", "NON_BF", "BF"), -+ __GEN_TXPWR_ENT2("MCS_2TX_40M_3 ", "NON_BF", "BF"), -+ __GEN_TXPWR_ENT2("MCS_2TX_80M_0 ", "NON_BF", "BF"), -+ __GEN_TXPWR_ENT2("MCS_2TX_80M_1 ", "NON_BF", "BF"), -+ __GEN_TXPWR_ENT2("MCS_2TX_160M ", "NON_BF", "BF"), -+ __GEN_TXPWR_ENT2("MCS_2TX_40M_0p5", "NON_BF", "BF"), -+ __GEN_TXPWR_ENT2("MCS_2TX_40M_2p5", "NON_BF", "BF"), -+}; -+ -+static_assert((ARRAY_SIZE(__txpwr_ent_lmt) * 2) == -+ (R_AX_PWR_LMT_MAX - R_AX_PWR_LMT + 4)); -+ -+static const struct txpwr_map __txpwr_map_lmt = { -+ .ent = __txpwr_ent_lmt, -+ .size = ARRAY_SIZE(__txpwr_ent_lmt), -+ .addr_from = R_AX_PWR_LMT, -+ .addr_to = R_AX_PWR_LMT_MAX, -+}; -+ -+static const struct txpwr_ent __txpwr_ent_lmt_ru[] = { -+ /* 1TX */ -+ __GEN_TXPWR_ENT8("1TX", "RU26__0", "RU26__1", "RU26__2", "RU26__3", -+ "RU26__4", "RU26__5", "RU26__6", "RU26__7"), -+ __GEN_TXPWR_ENT8("1TX", "RU52__0", "RU52__1", "RU52__2", "RU52__3", -+ "RU52__4", "RU52__5", "RU52__6", "RU52__7"), -+ __GEN_TXPWR_ENT8("1TX", "RU106_0", "RU106_1", "RU106_2", "RU106_3", -+ "RU106_4", "RU106_5", "RU106_6", "RU106_7"), -+ /* 2TX */ -+ __GEN_TXPWR_ENT8("2TX", "RU26__0", "RU26__1", "RU26__2", "RU26__3", -+ "RU26__4", "RU26__5", "RU26__6", "RU26__7"), -+ __GEN_TXPWR_ENT8("2TX", "RU52__0", "RU52__1", "RU52__2", "RU52__3", -+ "RU52__4", "RU52__5", "RU52__6", "RU52__7"), -+ __GEN_TXPWR_ENT8("2TX", "RU106_0", "RU106_1", "RU106_2", "RU106_3", -+ "RU106_4", "RU106_5", "RU106_6", "RU106_7"), -+}; -+ -+static_assert((ARRAY_SIZE(__txpwr_ent_lmt_ru) * 8) == -+ (R_AX_PWR_RU_LMT_MAX - R_AX_PWR_RU_LMT + 4)); -+ -+static const struct txpwr_map __txpwr_map_lmt_ru = { -+ .ent = __txpwr_ent_lmt_ru, -+ .size = ARRAY_SIZE(__txpwr_ent_lmt_ru), -+ .addr_from = R_AX_PWR_RU_LMT, -+ .addr_to = R_AX_PWR_RU_LMT_MAX, -+}; -+ -+static u8 __print_txpwr_ent(struct seq_file *m, const struct txpwr_ent *ent, -+ const u8 *buf, const u8 cur) -+{ -+ char *fmt; -+ -+ switch (ent->len) { -+ case 2: -+ fmt = "%s\t| %3d, %3d,\tdBm\n"; -+ seq_printf(m, fmt, ent->txt, buf[cur], buf[cur + 1]); -+ return 2; -+ case 4: -+ fmt = "%s\t| %3d, %3d, %3d, %3d,\tdBm\n"; -+ seq_printf(m, fmt, ent->txt, buf[cur], buf[cur + 1], -+ buf[cur + 2], buf[cur + 3]); -+ return 4; -+ case 8: -+ fmt = "%s\t| %3d, %3d, %3d, %3d, %3d, %3d, %3d, %3d,\tdBm\n"; -+ seq_printf(m, fmt, ent->txt, buf[cur], buf[cur + 1], -+ buf[cur + 2], buf[cur + 3], buf[cur + 4], -+ buf[cur + 5], buf[cur + 6], buf[cur + 7]); -+ return 8; -+ default: -+ return 0; -+ } -+} -+ -+static int __print_txpwr_map(struct seq_file *m, struct rtw89_dev *rtwdev, -+ const struct txpwr_map *map) -+{ -+ u8 fct = rtwdev->chip->txpwr_factor_mac; -+ u8 *buf, cur, i; -+ u32 val, addr; -+ int ret; -+ -+ buf = vzalloc(map->addr_to - map->addr_from + 4); -+ if (!buf) -+ return -ENOMEM; -+ -+ for (addr = map->addr_from; addr <= map->addr_to; addr += 4) { -+ ret = rtw89_mac_txpwr_read32(rtwdev, RTW89_PHY_0, addr, &val); -+ if (ret) -+ val = MASKDWORD; -+ -+ cur = addr - map->addr_from; -+ for (i = 0; i < 4; i++, val >>= 8) -+ buf[cur + i] = FIELD_GET(MASKBYTE0, val) >> fct; -+ } -+ -+ for (cur = 0, i = 0; i < map->size; i++) -+ cur += __print_txpwr_ent(m, &map->ent[i], buf, cur); -+ -+ vfree(buf); -+ return 0; -+} -+ -+#define case_REGD(_regd) \ -+ case RTW89_ ## _regd: \ -+ seq_puts(m, #_regd "\n"); \ -+ break -+ -+static void __print_regd(struct seq_file *m, struct rtw89_dev *rtwdev) -+{ -+ u8 band = rtwdev->hal.current_band_type; -+ u8 regd = rtw89_regd_get(rtwdev, band); -+ -+ switch (regd) { -+ default: -+ seq_printf(m, "UNKNOWN: %d\n", regd); -+ break; -+ case_REGD(WW); -+ case_REGD(ETSI); -+ case_REGD(FCC); -+ case_REGD(MKK); -+ case_REGD(NA); -+ case_REGD(IC); -+ case_REGD(KCC); -+ case_REGD(NCC); -+ case_REGD(CHILE); -+ case_REGD(ACMA); -+ case_REGD(MEXICO); -+ case_REGD(UKRAINE); -+ case_REGD(CN); -+ } -+} -+ -+#undef case_REGD -+ -+static int rtw89_debug_priv_txpwr_table_get(struct seq_file *m, void *v) -+{ -+ struct rtw89_debugfs_priv *debugfs_priv = m->private; -+ struct rtw89_dev *rtwdev = debugfs_priv->rtwdev; -+ int ret = 0; -+ -+ mutex_lock(&rtwdev->mutex); -+ rtw89_leave_ps_mode(rtwdev); -+ -+ seq_puts(m, "[Regulatory] "); -+ __print_regd(m, rtwdev); -+ -+ seq_puts(m, "[SAR]\n"); -+ rtw89_print_sar(m, rtwdev); -+ -+ seq_puts(m, "\n[TX power byrate]\n"); -+ ret = __print_txpwr_map(m, rtwdev, &__txpwr_map_byr); -+ if (ret) -+ goto err; -+ -+ seq_puts(m, "\n[TX power limit]\n"); -+ ret = __print_txpwr_map(m, rtwdev, &__txpwr_map_lmt); -+ if (ret) -+ goto err; -+ -+ seq_puts(m, "\n[TX power limit_ru]\n"); -+ ret = __print_txpwr_map(m, rtwdev, &__txpwr_map_lmt_ru); -+ if (ret) -+ goto err; -+ -+err: -+ mutex_unlock(&rtwdev->mutex); -+ return ret; -+} -+ -+static ssize_t -+rtw89_debug_priv_mac_reg_dump_select(struct file *filp, -+ const char __user *user_buf, -+ size_t count, loff_t *loff) -+{ -+ struct seq_file *m = (struct seq_file *)filp->private_data; -+ struct rtw89_debugfs_priv *debugfs_priv = m->private; -+ struct rtw89_dev *rtwdev = debugfs_priv->rtwdev; -+ char buf[32]; -+ size_t buf_size; -+ int sel; -+ int ret; -+ -+ buf_size = min(count, sizeof(buf) - 1); -+ if (copy_from_user(buf, user_buf, buf_size)) -+ return -EFAULT; -+ -+ buf[buf_size] = '\0'; -+ ret = kstrtoint(buf, 0, &sel); -+ if (ret) -+ return ret; -+ -+ if (sel < RTW89_DBG_SEL_MAC_00 || sel > RTW89_DBG_SEL_RFC) { -+ rtw89_info(rtwdev, "invalid args: %d\n", sel); -+ return -EINVAL; -+ } -+ -+ debugfs_priv->cb_data = sel; -+ rtw89_info(rtwdev, "select mac page dump %d\n", debugfs_priv->cb_data); -+ -+ return count; -+} -+ -+#define RTW89_MAC_PAGE_SIZE 0x100 -+ -+static int rtw89_debug_priv_mac_reg_dump_get(struct seq_file *m, void *v) -+{ -+ struct rtw89_debugfs_priv *debugfs_priv = m->private; -+ struct rtw89_dev *rtwdev = debugfs_priv->rtwdev; -+ enum rtw89_debug_mac_reg_sel reg_sel = debugfs_priv->cb_data; -+ u32 start, end; -+ u32 i, j, k, page; -+ u32 val; -+ -+ switch (reg_sel) { -+ case RTW89_DBG_SEL_MAC_00: -+ seq_puts(m, "Debug selected MAC page 0x00\n"); -+ start = 0x000; -+ end = 0x014; -+ break; -+ case RTW89_DBG_SEL_MAC_40: -+ seq_puts(m, "Debug selected MAC page 0x40\n"); -+ start = 0x040; -+ end = 0x07f; -+ break; -+ case RTW89_DBG_SEL_MAC_80: -+ seq_puts(m, "Debug selected MAC page 0x80\n"); -+ start = 0x080; -+ end = 0x09f; -+ break; -+ case RTW89_DBG_SEL_MAC_C0: -+ seq_puts(m, "Debug selected MAC page 0xc0\n"); -+ start = 0x0c0; -+ end = 0x0df; -+ break; -+ case RTW89_DBG_SEL_MAC_E0: -+ seq_puts(m, "Debug selected MAC page 0xe0\n"); -+ start = 0x0e0; -+ end = 0x0ff; -+ break; -+ case RTW89_DBG_SEL_BB: -+ seq_puts(m, "Debug selected BB register\n"); -+ start = 0x100; -+ end = 0x17f; -+ break; -+ case RTW89_DBG_SEL_IQK: -+ seq_puts(m, "Debug selected IQK register\n"); -+ start = 0x180; -+ end = 0x1bf; -+ break; -+ case RTW89_DBG_SEL_RFC: -+ seq_puts(m, "Debug selected RFC register\n"); -+ start = 0x1c0; -+ end = 0x1ff; -+ break; -+ default: -+ seq_puts(m, "Selected invalid register page\n"); -+ return -EINVAL; -+ } -+ -+ for (i = start; i <= end; i++) { -+ page = i << 8; -+ for (j = page; j < page + RTW89_MAC_PAGE_SIZE; j += 16) { -+ seq_printf(m, "%08xh : ", 0x18600000 + j); -+ for (k = 0; k < 4; k++) { -+ val = rtw89_read32(rtwdev, j + (k << 2)); -+ seq_printf(m, "%08x ", val); -+ } -+ seq_puts(m, "\n"); -+ } -+ } -+ -+ return 0; -+} -+ -+static ssize_t -+rtw89_debug_priv_mac_mem_dump_select(struct file *filp, -+ const char __user *user_buf, -+ size_t count, loff_t *loff) -+{ -+ struct seq_file *m = (struct seq_file *)filp->private_data; -+ struct rtw89_debugfs_priv *debugfs_priv = m->private; -+ struct rtw89_dev *rtwdev = debugfs_priv->rtwdev; -+ char buf[32]; -+ size_t buf_size; -+ u32 sel, start_addr, len; -+ int num; -+ -+ buf_size = min(count, sizeof(buf) - 1); -+ if (copy_from_user(buf, user_buf, buf_size)) -+ return -EFAULT; -+ -+ buf[buf_size] = '\0'; -+ num = sscanf(buf, "%x %x %x", &sel, &start_addr, &len); -+ if (num != 3) { -+ rtw89_info(rtwdev, "invalid format: \n"); -+ return -EINVAL; -+ } -+ -+ debugfs_priv->mac_mem.sel = sel; -+ debugfs_priv->mac_mem.start = start_addr; -+ debugfs_priv->mac_mem.len = len; -+ -+ rtw89_info(rtwdev, "select mem %d start %d len %d\n", -+ sel, start_addr, len); -+ -+ return count; -+} -+ -+static const u32 mac_mem_base_addr_table[RTW89_MAC_MEM_MAX] = { -+ [RTW89_MAC_MEM_SHARED_BUF] = SHARED_BUF_BASE_ADDR, -+ [RTW89_MAC_MEM_DMAC_TBL] = DMAC_TBL_BASE_ADDR, -+ [RTW89_MAC_MEM_SHCUT_MACHDR] = SHCUT_MACHDR_BASE_ADDR, -+ [RTW89_MAC_MEM_STA_SCHED] = STA_SCHED_BASE_ADDR, -+ [RTW89_MAC_MEM_RXPLD_FLTR_CAM] = RXPLD_FLTR_CAM_BASE_ADDR, -+ [RTW89_MAC_MEM_SECURITY_CAM] = SECURITY_CAM_BASE_ADDR, -+ [RTW89_MAC_MEM_WOW_CAM] = WOW_CAM_BASE_ADDR, -+ [RTW89_MAC_MEM_CMAC_TBL] = CMAC_TBL_BASE_ADDR, -+ [RTW89_MAC_MEM_ADDR_CAM] = ADDR_CAM_BASE_ADDR, -+ [RTW89_MAC_MEM_BA_CAM] = BA_CAM_BASE_ADDR, -+ [RTW89_MAC_MEM_BCN_IE_CAM0] = BCN_IE_CAM0_BASE_ADDR, -+ [RTW89_MAC_MEM_BCN_IE_CAM1] = BCN_IE_CAM1_BASE_ADDR, -+}; -+ -+static void rtw89_debug_dump_mac_mem(struct seq_file *m, -+ struct rtw89_dev *rtwdev, -+ u8 sel, u32 start_addr, u32 len) -+{ -+ u32 base_addr, start_page, residue; -+ u32 i, j, p, pages; -+ u32 dump_len, remain; -+ u32 val; -+ -+ remain = len; -+ pages = len / MAC_MEM_DUMP_PAGE_SIZE + 1; -+ start_page = start_addr / MAC_MEM_DUMP_PAGE_SIZE; -+ residue = start_addr % MAC_MEM_DUMP_PAGE_SIZE; -+ base_addr = mac_mem_base_addr_table[sel]; -+ base_addr += start_page * MAC_MEM_DUMP_PAGE_SIZE; -+ -+ for (p = 0; p < pages; p++) { -+ dump_len = min_t(u32, remain, MAC_MEM_DUMP_PAGE_SIZE); -+ rtw89_write32(rtwdev, R_AX_FILTER_MODEL_ADDR, base_addr); -+ for (i = R_AX_INDIR_ACCESS_ENTRY + residue; -+ i < R_AX_INDIR_ACCESS_ENTRY + dump_len;) { -+ seq_printf(m, "%08xh:", i); -+ for (j = 0; -+ j < 4 && i < R_AX_INDIR_ACCESS_ENTRY + dump_len; -+ j++, i += 4) { -+ val = rtw89_read32(rtwdev, i); -+ seq_printf(m, " %08x", val); -+ remain -= 4; -+ } -+ seq_puts(m, "\n"); -+ } -+ base_addr += MAC_MEM_DUMP_PAGE_SIZE; -+ } -+} -+ -+static int -+rtw89_debug_priv_mac_mem_dump_get(struct seq_file *m, void *v) -+{ -+ struct rtw89_debugfs_priv *debugfs_priv = m->private; -+ struct rtw89_dev *rtwdev = debugfs_priv->rtwdev; -+ -+ mutex_lock(&rtwdev->mutex); -+ rtw89_leave_ps_mode(rtwdev); -+ rtw89_debug_dump_mac_mem(m, rtwdev, -+ debugfs_priv->mac_mem.sel, -+ debugfs_priv->mac_mem.start, -+ debugfs_priv->mac_mem.len); -+ mutex_unlock(&rtwdev->mutex); -+ -+ return 0; -+} -+ -+static ssize_t -+rtw89_debug_priv_mac_dbg_port_dump_select(struct file *filp, -+ const char __user *user_buf, -+ size_t count, loff_t *loff) -+{ -+ struct seq_file *m = (struct seq_file *)filp->private_data; -+ struct rtw89_debugfs_priv *debugfs_priv = m->private; -+ struct rtw89_dev *rtwdev = debugfs_priv->rtwdev; -+ char buf[32]; -+ size_t buf_size; -+ int sel, set; -+ int num; -+ bool enable; -+ -+ buf_size = min(count, sizeof(buf) - 1); -+ if (copy_from_user(buf, user_buf, buf_size)) -+ return -EFAULT; -+ -+ buf[buf_size] = '\0'; -+ num = sscanf(buf, "%d %d", &sel, &set); -+ if (num != 2) { -+ rtw89_info(rtwdev, "invalid format: \n"); -+ return -EINVAL; -+ } -+ -+ enable = set == 0 ? false : true; -+ switch (sel) { -+ case 0: -+ debugfs_priv->dbgpkg_en.ss_dbg = enable; -+ break; -+ case 1: -+ debugfs_priv->dbgpkg_en.dle_dbg = enable; -+ break; -+ case 2: -+ debugfs_priv->dbgpkg_en.dmac_dbg = enable; -+ break; -+ case 3: -+ debugfs_priv->dbgpkg_en.cmac_dbg = enable; -+ break; -+ case 4: -+ debugfs_priv->dbgpkg_en.dbg_port = enable; -+ break; -+ default: -+ rtw89_info(rtwdev, "invalid args: sel %d set %d\n", sel, set); -+ return -EINVAL; -+ } -+ -+ rtw89_info(rtwdev, "%s debug port dump %d\n", -+ enable ? "Enable" : "Disable", sel); -+ -+ return count; -+} -+ -+static int rtw89_debug_mac_dump_ss_dbg(struct rtw89_dev *rtwdev, -+ struct seq_file *m) -+{ -+ return 0; -+} -+ -+static int rtw89_debug_mac_dump_dle_dbg(struct rtw89_dev *rtwdev, -+ struct seq_file *m) -+{ -+#define DLE_DFI_DUMP(__type, __target, __sel) \ -+({ \ -+ u32 __ctrl; \ -+ u32 __reg_ctrl = R_AX_##__type##_DBG_FUN_INTF_CTL; \ -+ u32 __reg_data = R_AX_##__type##_DBG_FUN_INTF_DATA; \ -+ u32 __data, __val32; \ -+ int __ret; \ -+ \ -+ __ctrl = FIELD_PREP(B_AX_##__type##_DFI_TRGSEL_MASK, \ -+ DLE_DFI_TYPE_##__target) | \ -+ FIELD_PREP(B_AX_##__type##_DFI_ADDR_MASK, __sel) | \ -+ B_AX_WDE_DFI_ACTIVE; \ -+ rtw89_write32(rtwdev, __reg_ctrl, __ctrl); \ -+ __ret = read_poll_timeout(rtw89_read32, __val32, \ -+ !(__val32 & B_AX_##__type##_DFI_ACTIVE), \ -+ 1000, 50000, false, \ -+ rtwdev, __reg_ctrl); \ -+ if (__ret) { \ -+ rtw89_err(rtwdev, "failed to dump DLE %s %s %d\n", \ -+ #__type, #__target, __sel); \ -+ return __ret; \ -+ } \ -+ \ -+ __data = rtw89_read32(rtwdev, __reg_data); \ -+ __data; \ -+}) -+ -+#define DLE_DFI_FREE_PAGE_DUMP(__m, __type) \ -+({ \ -+ u32 __freepg, __pubpg; \ -+ u32 __freepg_head, __freepg_tail, __pubpg_num; \ -+ \ -+ __freepg = DLE_DFI_DUMP(__type, FREEPG, 0); \ -+ __pubpg = DLE_DFI_DUMP(__type, FREEPG, 1); \ -+ __freepg_head = FIELD_GET(B_AX_DLE_FREE_HEADPG, __freepg); \ -+ __freepg_tail = FIELD_GET(B_AX_DLE_FREE_TAILPG, __freepg); \ -+ __pubpg_num = FIELD_GET(B_AX_DLE_PUB_PGNUM, __pubpg); \ -+ seq_printf(__m, "[%s] freepg head: %d\n", \ -+ #__type, __freepg_head); \ -+ seq_printf(__m, "[%s] freepg tail: %d\n", \ -+ #__type, __freepg_tail); \ -+ seq_printf(__m, "[%s] pubpg num : %d\n", \ -+ #__type, __pubpg_num); \ -+}) -+ -+#define case_QUOTA(__m, __type, __id) \ -+ case __type##_QTAID_##__id: \ -+ val32 = DLE_DFI_DUMP(__type, QUOTA, __type##_QTAID_##__id); \ -+ rsv_pgnum = FIELD_GET(B_AX_DLE_RSV_PGNUM, val32); \ -+ use_pgnum = FIELD_GET(B_AX_DLE_USE_PGNUM, val32); \ -+ seq_printf(__m, "[%s][%s] rsv_pgnum: %d\n", \ -+ #__type, #__id, rsv_pgnum); \ -+ seq_printf(__m, "[%s][%s] use_pgnum: %d\n", \ -+ #__type, #__id, use_pgnum); \ -+ break -+ u32 quota_id; -+ u32 val32; -+ u16 rsv_pgnum, use_pgnum; -+ int ret; -+ -+ ret = rtw89_mac_check_mac_en(rtwdev, 0, RTW89_DMAC_SEL); -+ if (ret) { -+ seq_puts(m, "[DLE] : DMAC not enabled\n"); -+ return ret; -+ } -+ -+ DLE_DFI_FREE_PAGE_DUMP(m, WDE); -+ DLE_DFI_FREE_PAGE_DUMP(m, PLE); -+ for (quota_id = 0; quota_id <= WDE_QTAID_CPUIO; quota_id++) { -+ switch (quota_id) { -+ case_QUOTA(m, WDE, HOST_IF); -+ case_QUOTA(m, WDE, WLAN_CPU); -+ case_QUOTA(m, WDE, DATA_CPU); -+ case_QUOTA(m, WDE, PKTIN); -+ case_QUOTA(m, WDE, CPUIO); -+ } -+ } -+ for (quota_id = 0; quota_id <= PLE_QTAID_CPUIO; quota_id++) { -+ switch (quota_id) { -+ case_QUOTA(m, PLE, B0_TXPL); -+ case_QUOTA(m, PLE, B1_TXPL); -+ case_QUOTA(m, PLE, C2H); -+ case_QUOTA(m, PLE, H2C); -+ case_QUOTA(m, PLE, WLAN_CPU); -+ case_QUOTA(m, PLE, MPDU); -+ case_QUOTA(m, PLE, CMAC0_RX); -+ case_QUOTA(m, PLE, CMAC1_RX); -+ case_QUOTA(m, PLE, CMAC1_BBRPT); -+ case_QUOTA(m, PLE, WDRLS); -+ case_QUOTA(m, PLE, CPUIO); -+ } -+ } -+ -+ return 0; -+ -+#undef case_QUOTA -+#undef DLE_DFI_DUMP -+#undef DLE_DFI_FREE_PAGE_DUMP -+} -+ -+static int rtw89_debug_mac_dump_dmac_dbg(struct rtw89_dev *rtwdev, -+ struct seq_file *m) -+{ -+ int ret; -+ -+ ret = rtw89_mac_check_mac_en(rtwdev, 0, RTW89_DMAC_SEL); -+ if (ret) { -+ seq_puts(m, "[DMAC] : DMAC not enabled\n"); -+ return ret; -+ } -+ -+ seq_printf(m, "R_AX_DMAC_ERR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_DMAC_ERR_ISR)); -+ seq_printf(m, "[0]R_AX_WDRLS_ERR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_WDRLS_ERR_ISR)); -+ seq_printf(m, "[1]R_AX_SEC_ERR_IMR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_SEC_ERR_IMR_ISR)); -+ seq_printf(m, "[2.1]R_AX_MPDU_TX_ERR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_MPDU_TX_ERR_ISR)); -+ seq_printf(m, "[2.2]R_AX_MPDU_RX_ERR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_MPDU_RX_ERR_ISR)); -+ seq_printf(m, "[3]R_AX_STA_SCHEDULER_ERR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_STA_SCHEDULER_ERR_ISR)); -+ seq_printf(m, "[4]R_AX_WDE_ERR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_WDE_ERR_ISR)); -+ seq_printf(m, "[5.1]R_AX_TXPKTCTL_ERR_IMR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_TXPKTCTL_ERR_IMR_ISR)); -+ seq_printf(m, "[5.2]R_AX_TXPKTCTL_ERR_IMR_ISR_B1=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_TXPKTCTL_ERR_IMR_ISR_B1)); -+ seq_printf(m, "[6]R_AX_PLE_ERR_FLAG_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_PLE_ERR_FLAG_ISR)); -+ seq_printf(m, "[7]R_AX_PKTIN_ERR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_PKTIN_ERR_ISR)); -+ seq_printf(m, "[8.1]R_AX_OTHER_DISPATCHER_ERR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_OTHER_DISPATCHER_ERR_ISR)); -+ seq_printf(m, "[8.2]R_AX_HOST_DISPATCHER_ERR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_HOST_DISPATCHER_ERR_ISR)); -+ seq_printf(m, "[8.3]R_AX_CPU_DISPATCHER_ERR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_CPU_DISPATCHER_ERR_ISR)); -+ seq_printf(m, "[10]R_AX_CPUIO_ERR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_CPUIO_ERR_ISR)); -+ seq_printf(m, "[11.1]R_AX_BBRPT_COM_ERR_IMR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_BBRPT_COM_ERR_IMR_ISR)); -+ seq_printf(m, "[11.2]R_AX_BBRPT_CHINFO_ERR_IMR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_BBRPT_CHINFO_ERR_IMR_ISR)); -+ seq_printf(m, "[11.3]R_AX_BBRPT_DFS_ERR_IMR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_BBRPT_DFS_ERR_IMR_ISR)); -+ seq_printf(m, "[11.4]R_AX_LA_ERRFLAG=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_LA_ERRFLAG)); -+ -+ return 0; -+} -+ -+static int rtw89_debug_mac_dump_cmac_dbg(struct rtw89_dev *rtwdev, -+ struct seq_file *m) -+{ -+ int ret; -+ -+ ret = rtw89_mac_check_mac_en(rtwdev, 0, RTW89_CMAC_SEL); -+ if (ret) { -+ seq_puts(m, "[CMAC] : CMAC 0 not enabled\n"); -+ return ret; -+ } -+ -+ seq_printf(m, "R_AX_CMAC_ERR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_CMAC_ERR_ISR)); -+ seq_printf(m, "[0]R_AX_SCHEDULE_ERR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_SCHEDULE_ERR_ISR)); -+ seq_printf(m, "[1]R_AX_PTCL_ISR0=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_PTCL_ISR0)); -+ seq_printf(m, "[3]R_AX_DLE_CTRL=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_DLE_CTRL)); -+ seq_printf(m, "[4]R_AX_PHYINFO_ERR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_PHYINFO_ERR_ISR)); -+ seq_printf(m, "[5]R_AX_TXPWR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_TXPWR_ISR)); -+ seq_printf(m, "[6]R_AX_RMAC_ERR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_RMAC_ERR_ISR)); -+ seq_printf(m, "[7]R_AX_TMAC_ERR_IMR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_TMAC_ERR_IMR_ISR)); -+ -+ ret = rtw89_mac_check_mac_en(rtwdev, 1, RTW89_CMAC_SEL); -+ if (ret) { -+ seq_puts(m, "[CMAC] : CMAC 1 not enabled\n"); -+ return ret; -+ } -+ -+ seq_printf(m, "R_AX_CMAC_ERR_ISR_C1=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_CMAC_ERR_ISR_C1)); -+ seq_printf(m, "[0]R_AX_SCHEDULE_ERR_ISR_C1=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_SCHEDULE_ERR_ISR_C1)); -+ seq_printf(m, "[1]R_AX_PTCL_ISR0_C1=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_PTCL_ISR0_C1)); -+ seq_printf(m, "[3]R_AX_DLE_CTRL_C1=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_DLE_CTRL_C1)); -+ seq_printf(m, "[4]R_AX_PHYINFO_ERR_ISR_C1=0x%02x\n", -+ rtw89_read32(rtwdev, R_AX_PHYINFO_ERR_ISR_C1)); -+ seq_printf(m, "[5]R_AX_TXPWR_ISR_C1=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_TXPWR_ISR_C1)); -+ seq_printf(m, "[6]R_AX_RMAC_ERR_ISR_C1=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_RMAC_ERR_ISR_C1)); -+ seq_printf(m, "[7]R_AX_TMAC_ERR_IMR_ISR_C1=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_TMAC_ERR_IMR_ISR_C1)); -+ -+ return 0; -+} -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_ptcl_c0 = { -+ .sel_addr = R_AX_PTCL_DBG, -+ .sel_byte = 1, -+ .sel_msk = B_AX_PTCL_DBG_SEL_MASK, -+ .srt = 0x00, -+ .end = 0x3F, -+ .rd_addr = R_AX_PTCL_DBG_INFO, -+ .rd_byte = 4, -+ .rd_msk = B_AX_PTCL_DBG_INFO_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_ptcl_c1 = { -+ .sel_addr = R_AX_PTCL_DBG_C1, -+ .sel_byte = 1, -+ .sel_msk = B_AX_PTCL_DBG_SEL_MASK, -+ .srt = 0x00, -+ .end = 0x3F, -+ .rd_addr = R_AX_PTCL_DBG_INFO_C1, -+ .rd_byte = 4, -+ .rd_msk = B_AX_PTCL_DBG_INFO_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_sch_c0 = { -+ .sel_addr = R_AX_SCH_DBG_SEL, -+ .sel_byte = 1, -+ .sel_msk = B_AX_SCH_DBG_SEL_MASK, -+ .srt = 0x00, -+ .end = 0x2F, -+ .rd_addr = R_AX_SCH_DBG, -+ .rd_byte = 4, -+ .rd_msk = B_AX_SCHEDULER_DBG_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_sch_c1 = { -+ .sel_addr = R_AX_SCH_DBG_SEL_C1, -+ .sel_byte = 1, -+ .sel_msk = B_AX_SCH_DBG_SEL_MASK, -+ .srt = 0x00, -+ .end = 0x2F, -+ .rd_addr = R_AX_SCH_DBG_C1, -+ .rd_byte = 4, -+ .rd_msk = B_AX_SCHEDULER_DBG_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_tmac_c0 = { -+ .sel_addr = R_AX_MACTX_DBG_SEL_CNT, -+ .sel_byte = 1, -+ .sel_msk = B_AX_DBGSEL_MACTX_MASK, -+ .srt = 0x00, -+ .end = 0x19, -+ .rd_addr = R_AX_DBG_PORT_SEL, -+ .rd_byte = 4, -+ .rd_msk = B_AX_DEBUG_ST_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_tmac_c1 = { -+ .sel_addr = R_AX_MACTX_DBG_SEL_CNT_C1, -+ .sel_byte = 1, -+ .sel_msk = B_AX_DBGSEL_MACTX_MASK, -+ .srt = 0x00, -+ .end = 0x19, -+ .rd_addr = R_AX_DBG_PORT_SEL, -+ .rd_byte = 4, -+ .rd_msk = B_AX_DEBUG_ST_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_rmac_c0 = { -+ .sel_addr = R_AX_RX_DEBUG_SELECT, -+ .sel_byte = 1, -+ .sel_msk = B_AX_DEBUG_SEL_MASK, -+ .srt = 0x00, -+ .end = 0x58, -+ .rd_addr = R_AX_DBG_PORT_SEL, -+ .rd_byte = 4, -+ .rd_msk = B_AX_DEBUG_ST_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_rmac_c1 = { -+ .sel_addr = R_AX_RX_DEBUG_SELECT_C1, -+ .sel_byte = 1, -+ .sel_msk = B_AX_DEBUG_SEL_MASK, -+ .srt = 0x00, -+ .end = 0x58, -+ .rd_addr = R_AX_DBG_PORT_SEL, -+ .rd_byte = 4, -+ .rd_msk = B_AX_DEBUG_ST_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_rmacst_c0 = { -+ .sel_addr = R_AX_RX_STATE_MONITOR, -+ .sel_byte = 1, -+ .sel_msk = B_AX_STATE_SEL_MASK, -+ .srt = 0x00, -+ .end = 0x17, -+ .rd_addr = R_AX_RX_STATE_MONITOR, -+ .rd_byte = 4, -+ .rd_msk = B_AX_RX_STATE_MONITOR_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_rmacst_c1 = { -+ .sel_addr = R_AX_RX_STATE_MONITOR_C1, -+ .sel_byte = 1, -+ .sel_msk = B_AX_STATE_SEL_MASK, -+ .srt = 0x00, -+ .end = 0x17, -+ .rd_addr = R_AX_RX_STATE_MONITOR_C1, -+ .rd_byte = 4, -+ .rd_msk = B_AX_RX_STATE_MONITOR_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_rmac_plcp_c0 = { -+ .sel_addr = R_AX_RMAC_PLCP_MON, -+ .sel_byte = 4, -+ .sel_msk = B_AX_PCLP_MON_SEL_MASK, -+ .srt = 0x0, -+ .end = 0xF, -+ .rd_addr = R_AX_RMAC_PLCP_MON, -+ .rd_byte = 4, -+ .rd_msk = B_AX_RMAC_PLCP_MON_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_rmac_plcp_c1 = { -+ .sel_addr = R_AX_RMAC_PLCP_MON_C1, -+ .sel_byte = 4, -+ .sel_msk = B_AX_PCLP_MON_SEL_MASK, -+ .srt = 0x0, -+ .end = 0xF, -+ .rd_addr = R_AX_RMAC_PLCP_MON_C1, -+ .rd_byte = 4, -+ .rd_msk = B_AX_RMAC_PLCP_MON_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_trxptcl_c0 = { -+ .sel_addr = R_AX_DBGSEL_TRXPTCL, -+ .sel_byte = 1, -+ .sel_msk = B_AX_DBGSEL_TRXPTCL_MASK, -+ .srt = 0x08, -+ .end = 0x10, -+ .rd_addr = R_AX_DBG_PORT_SEL, -+ .rd_byte = 4, -+ .rd_msk = B_AX_DEBUG_ST_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_trxptcl_c1 = { -+ .sel_addr = R_AX_DBGSEL_TRXPTCL_C1, -+ .sel_byte = 1, -+ .sel_msk = B_AX_DBGSEL_TRXPTCL_MASK, -+ .srt = 0x08, -+ .end = 0x10, -+ .rd_addr = R_AX_DBG_PORT_SEL, -+ .rd_byte = 4, -+ .rd_msk = B_AX_DEBUG_ST_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_tx_infol_c0 = { -+ .sel_addr = R_AX_WMAC_TX_CTRL_DEBUG, -+ .sel_byte = 1, -+ .sel_msk = B_AX_TX_CTRL_DEBUG_SEL_MASK, -+ .srt = 0x00, -+ .end = 0x07, -+ .rd_addr = R_AX_WMAC_TX_INFO0_DEBUG, -+ .rd_byte = 4, -+ .rd_msk = B_AX_TX_CTRL_INFO_P0_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_tx_infoh_c0 = { -+ .sel_addr = R_AX_WMAC_TX_CTRL_DEBUG, -+ .sel_byte = 1, -+ .sel_msk = B_AX_TX_CTRL_DEBUG_SEL_MASK, -+ .srt = 0x00, -+ .end = 0x07, -+ .rd_addr = R_AX_WMAC_TX_INFO1_DEBUG, -+ .rd_byte = 4, -+ .rd_msk = B_AX_TX_CTRL_INFO_P1_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_tx_infol_c1 = { -+ .sel_addr = R_AX_WMAC_TX_CTRL_DEBUG_C1, -+ .sel_byte = 1, -+ .sel_msk = B_AX_TX_CTRL_DEBUG_SEL_MASK, -+ .srt = 0x00, -+ .end = 0x07, -+ .rd_addr = R_AX_WMAC_TX_INFO0_DEBUG_C1, -+ .rd_byte = 4, -+ .rd_msk = B_AX_TX_CTRL_INFO_P0_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_tx_infoh_c1 = { -+ .sel_addr = R_AX_WMAC_TX_CTRL_DEBUG_C1, -+ .sel_byte = 1, -+ .sel_msk = B_AX_TX_CTRL_DEBUG_SEL_MASK, -+ .srt = 0x00, -+ .end = 0x07, -+ .rd_addr = R_AX_WMAC_TX_INFO1_DEBUG_C1, -+ .rd_byte = 4, -+ .rd_msk = B_AX_TX_CTRL_INFO_P1_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_txtf_infol_c0 = { -+ .sel_addr = R_AX_WMAC_TX_TF_INFO_0, -+ .sel_byte = 1, -+ .sel_msk = B_AX_WMAC_TX_TF_INFO_SEL_MASK, -+ .srt = 0x00, -+ .end = 0x04, -+ .rd_addr = R_AX_WMAC_TX_TF_INFO_1, -+ .rd_byte = 4, -+ .rd_msk = B_AX_WMAC_TX_TF_INFO_P0_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_txtf_infoh_c0 = { -+ .sel_addr = R_AX_WMAC_TX_TF_INFO_0, -+ .sel_byte = 1, -+ .sel_msk = B_AX_WMAC_TX_TF_INFO_SEL_MASK, -+ .srt = 0x00, -+ .end = 0x04, -+ .rd_addr = R_AX_WMAC_TX_TF_INFO_2, -+ .rd_byte = 4, -+ .rd_msk = B_AX_WMAC_TX_TF_INFO_P1_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_txtf_infol_c1 = { -+ .sel_addr = R_AX_WMAC_TX_TF_INFO_0_C1, -+ .sel_byte = 1, -+ .sel_msk = B_AX_WMAC_TX_TF_INFO_SEL_MASK, -+ .srt = 0x00, -+ .end = 0x04, -+ .rd_addr = R_AX_WMAC_TX_TF_INFO_1_C1, -+ .rd_byte = 4, -+ .rd_msk = B_AX_WMAC_TX_TF_INFO_P0_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_txtf_infoh_c1 = { -+ .sel_addr = R_AX_WMAC_TX_TF_INFO_0_C1, -+ .sel_byte = 1, -+ .sel_msk = B_AX_WMAC_TX_TF_INFO_SEL_MASK, -+ .srt = 0x00, -+ .end = 0x04, -+ .rd_addr = R_AX_WMAC_TX_TF_INFO_2_C1, -+ .rd_byte = 4, -+ .rd_msk = B_AX_WMAC_TX_TF_INFO_P1_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_wde_bufmgn_freepg = { -+ .sel_addr = R_AX_WDE_DBG_FUN_INTF_CTL, -+ .sel_byte = 4, -+ .sel_msk = B_AX_WDE_DFI_DATA_MASK, -+ .srt = 0x80000000, -+ .end = 0x80000001, -+ .rd_addr = R_AX_WDE_DBG_FUN_INTF_DATA, -+ .rd_byte = 4, -+ .rd_msk = B_AX_WDE_DFI_DATA_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_wde_bufmgn_quota = { -+ .sel_addr = R_AX_WDE_DBG_FUN_INTF_CTL, -+ .sel_byte = 4, -+ .sel_msk = B_AX_WDE_DFI_DATA_MASK, -+ .srt = 0x80010000, -+ .end = 0x80010004, -+ .rd_addr = R_AX_WDE_DBG_FUN_INTF_DATA, -+ .rd_byte = 4, -+ .rd_msk = B_AX_WDE_DFI_DATA_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_wde_bufmgn_pagellt = { -+ .sel_addr = R_AX_WDE_DBG_FUN_INTF_CTL, -+ .sel_byte = 4, -+ .sel_msk = B_AX_WDE_DFI_DATA_MASK, -+ .srt = 0x80020000, -+ .end = 0x80020FFF, -+ .rd_addr = R_AX_WDE_DBG_FUN_INTF_DATA, -+ .rd_byte = 4, -+ .rd_msk = B_AX_WDE_DFI_DATA_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_wde_bufmgn_pktinfo = { -+ .sel_addr = R_AX_WDE_DBG_FUN_INTF_CTL, -+ .sel_byte = 4, -+ .sel_msk = B_AX_WDE_DFI_DATA_MASK, -+ .srt = 0x80030000, -+ .end = 0x80030FFF, -+ .rd_addr = R_AX_WDE_DBG_FUN_INTF_DATA, -+ .rd_byte = 4, -+ .rd_msk = B_AX_WDE_DFI_DATA_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_wde_quemgn_prepkt = { -+ .sel_addr = R_AX_WDE_DBG_FUN_INTF_CTL, -+ .sel_byte = 4, -+ .sel_msk = B_AX_WDE_DFI_DATA_MASK, -+ .srt = 0x80040000, -+ .end = 0x80040FFF, -+ .rd_addr = R_AX_WDE_DBG_FUN_INTF_DATA, -+ .rd_byte = 4, -+ .rd_msk = B_AX_WDE_DFI_DATA_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_wde_quemgn_nxtpkt = { -+ .sel_addr = R_AX_WDE_DBG_FUN_INTF_CTL, -+ .sel_byte = 4, -+ .sel_msk = B_AX_WDE_DFI_DATA_MASK, -+ .srt = 0x80050000, -+ .end = 0x80050FFF, -+ .rd_addr = R_AX_WDE_DBG_FUN_INTF_DATA, -+ .rd_byte = 4, -+ .rd_msk = B_AX_WDE_DFI_DATA_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_wde_quemgn_qlnktbl = { -+ .sel_addr = R_AX_WDE_DBG_FUN_INTF_CTL, -+ .sel_byte = 4, -+ .sel_msk = B_AX_WDE_DFI_DATA_MASK, -+ .srt = 0x80060000, -+ .end = 0x80060453, -+ .rd_addr = R_AX_WDE_DBG_FUN_INTF_DATA, -+ .rd_byte = 4, -+ .rd_msk = B_AX_WDE_DFI_DATA_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_wde_quemgn_qempty = { -+ .sel_addr = R_AX_WDE_DBG_FUN_INTF_CTL, -+ .sel_byte = 4, -+ .sel_msk = B_AX_WDE_DFI_DATA_MASK, -+ .srt = 0x80070000, -+ .end = 0x80070011, -+ .rd_addr = R_AX_WDE_DBG_FUN_INTF_DATA, -+ .rd_byte = 4, -+ .rd_msk = B_AX_WDE_DFI_DATA_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_ple_bufmgn_freepg = { -+ .sel_addr = R_AX_PLE_DBG_FUN_INTF_CTL, -+ .sel_byte = 4, -+ .sel_msk = B_AX_PLE_DFI_DATA_MASK, -+ .srt = 0x80000000, -+ .end = 0x80000001, -+ .rd_addr = R_AX_PLE_DBG_FUN_INTF_DATA, -+ .rd_byte = 4, -+ .rd_msk = B_AX_PLE_DFI_DATA_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_ple_bufmgn_quota = { -+ .sel_addr = R_AX_PLE_DBG_FUN_INTF_CTL, -+ .sel_byte = 4, -+ .sel_msk = B_AX_PLE_DFI_DATA_MASK, -+ .srt = 0x80010000, -+ .end = 0x8001000A, -+ .rd_addr = R_AX_PLE_DBG_FUN_INTF_DATA, -+ .rd_byte = 4, -+ .rd_msk = B_AX_PLE_DFI_DATA_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_ple_bufmgn_pagellt = { -+ .sel_addr = R_AX_PLE_DBG_FUN_INTF_CTL, -+ .sel_byte = 4, -+ .sel_msk = B_AX_PLE_DFI_DATA_MASK, -+ .srt = 0x80020000, -+ .end = 0x80020DBF, -+ .rd_addr = R_AX_PLE_DBG_FUN_INTF_DATA, -+ .rd_byte = 4, -+ .rd_msk = B_AX_PLE_DFI_DATA_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_ple_bufmgn_pktinfo = { -+ .sel_addr = R_AX_PLE_DBG_FUN_INTF_CTL, -+ .sel_byte = 4, -+ .sel_msk = B_AX_PLE_DFI_DATA_MASK, -+ .srt = 0x80030000, -+ .end = 0x80030DBF, -+ .rd_addr = R_AX_PLE_DBG_FUN_INTF_DATA, -+ .rd_byte = 4, -+ .rd_msk = B_AX_PLE_DFI_DATA_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_ple_quemgn_prepkt = { -+ .sel_addr = R_AX_PLE_DBG_FUN_INTF_CTL, -+ .sel_byte = 4, -+ .sel_msk = B_AX_PLE_DFI_DATA_MASK, -+ .srt = 0x80040000, -+ .end = 0x80040DBF, -+ .rd_addr = R_AX_PLE_DBG_FUN_INTF_DATA, -+ .rd_byte = 4, -+ .rd_msk = B_AX_PLE_DFI_DATA_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_ple_quemgn_nxtpkt = { -+ .sel_addr = R_AX_PLE_DBG_FUN_INTF_CTL, -+ .sel_byte = 4, -+ .sel_msk = B_AX_PLE_DFI_DATA_MASK, -+ .srt = 0x80050000, -+ .end = 0x80050DBF, -+ .rd_addr = R_AX_PLE_DBG_FUN_INTF_DATA, -+ .rd_byte = 4, -+ .rd_msk = B_AX_PLE_DFI_DATA_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_ple_quemgn_qlnktbl = { -+ .sel_addr = R_AX_PLE_DBG_FUN_INTF_CTL, -+ .sel_byte = 4, -+ .sel_msk = B_AX_PLE_DFI_DATA_MASK, -+ .srt = 0x80060000, -+ .end = 0x80060041, -+ .rd_addr = R_AX_PLE_DBG_FUN_INTF_DATA, -+ .rd_byte = 4, -+ .rd_msk = B_AX_PLE_DFI_DATA_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_ple_quemgn_qempty = { -+ .sel_addr = R_AX_PLE_DBG_FUN_INTF_CTL, -+ .sel_byte = 4, -+ .sel_msk = B_AX_PLE_DFI_DATA_MASK, -+ .srt = 0x80070000, -+ .end = 0x80070001, -+ .rd_addr = R_AX_PLE_DBG_FUN_INTF_DATA, -+ .rd_byte = 4, -+ .rd_msk = B_AX_PLE_DFI_DATA_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_pktinfo = { -+ .sel_addr = R_AX_DBG_FUN_INTF_CTL, -+ .sel_byte = 4, -+ .sel_msk = B_AX_DFI_DATA_MASK, -+ .srt = 0x80000000, -+ .end = 0x8000017f, -+ .rd_addr = R_AX_DBG_FUN_INTF_DATA, -+ .rd_byte = 4, -+ .rd_msk = B_AX_DFI_DATA_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_pcie_txdma = { -+ .sel_addr = R_AX_PCIE_DBG_CTRL, -+ .sel_byte = 2, -+ .sel_msk = B_AX_DBG_SEL_MASK, -+ .srt = 0x00, -+ .end = 0x03, -+ .rd_addr = R_AX_DBG_PORT_SEL, -+ .rd_byte = 4, -+ .rd_msk = B_AX_DEBUG_ST_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_pcie_rxdma = { -+ .sel_addr = R_AX_PCIE_DBG_CTRL, -+ .sel_byte = 2, -+ .sel_msk = B_AX_DBG_SEL_MASK, -+ .srt = 0x00, -+ .end = 0x04, -+ .rd_addr = R_AX_DBG_PORT_SEL, -+ .rd_byte = 4, -+ .rd_msk = B_AX_DEBUG_ST_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_pcie_cvt = { -+ .sel_addr = R_AX_PCIE_DBG_CTRL, -+ .sel_byte = 2, -+ .sel_msk = B_AX_DBG_SEL_MASK, -+ .srt = 0x00, -+ .end = 0x01, -+ .rd_addr = R_AX_DBG_PORT_SEL, -+ .rd_byte = 4, -+ .rd_msk = B_AX_DEBUG_ST_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_pcie_cxpl = { -+ .sel_addr = R_AX_PCIE_DBG_CTRL, -+ .sel_byte = 2, -+ .sel_msk = B_AX_DBG_SEL_MASK, -+ .srt = 0x00, -+ .end = 0x05, -+ .rd_addr = R_AX_DBG_PORT_SEL, -+ .rd_byte = 4, -+ .rd_msk = B_AX_DEBUG_ST_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_pcie_io = { -+ .sel_addr = R_AX_PCIE_DBG_CTRL, -+ .sel_byte = 2, -+ .sel_msk = B_AX_DBG_SEL_MASK, -+ .srt = 0x00, -+ .end = 0x05, -+ .rd_addr = R_AX_DBG_PORT_SEL, -+ .rd_byte = 4, -+ .rd_msk = B_AX_DEBUG_ST_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_pcie_misc = { -+ .sel_addr = R_AX_PCIE_DBG_CTRL, -+ .sel_byte = 2, -+ .sel_msk = B_AX_DBG_SEL_MASK, -+ .srt = 0x00, -+ .end = 0x06, -+ .rd_addr = R_AX_DBG_PORT_SEL, -+ .rd_byte = 4, -+ .rd_msk = B_AX_DEBUG_ST_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_pcie_misc2 = { -+ .sel_addr = R_AX_DBG_CTRL, -+ .sel_byte = 1, -+ .sel_msk = B_AX_DBG_SEL0, -+ .srt = 0x34, -+ .end = 0x3C, -+ .rd_addr = R_AX_DBG_PORT_SEL, -+ .rd_byte = 4, -+ .rd_msk = B_AX_DEBUG_ST_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info * -+rtw89_debug_mac_dbg_port_sel(struct seq_file *m, -+ struct rtw89_dev *rtwdev, u32 sel) -+{ -+ const struct rtw89_mac_dbg_port_info *info; -+ u32 val32; -+ u16 val16; -+ u8 val8; -+ -+ switch (sel) { -+ case RTW89_DBG_PORT_SEL_PTCL_C0: -+ info = &dbg_port_ptcl_c0; -+ val16 = rtw89_read16(rtwdev, R_AX_PTCL_DBG); -+ val16 |= B_AX_PTCL_DBG_EN; -+ rtw89_write16(rtwdev, R_AX_PTCL_DBG, val16); -+ seq_puts(m, "Enable PTCL C0 dbgport.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_PTCL_C1: -+ info = &dbg_port_ptcl_c1; -+ val16 = rtw89_read16(rtwdev, R_AX_PTCL_DBG_C1); -+ val16 |= B_AX_PTCL_DBG_EN; -+ rtw89_write16(rtwdev, R_AX_PTCL_DBG_C1, val16); -+ seq_puts(m, "Enable PTCL C1 dbgport.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_SCH_C0: -+ info = &dbg_port_sch_c0; -+ val32 = rtw89_read32(rtwdev, R_AX_SCH_DBG_SEL); -+ val32 |= B_AX_SCH_DBG_EN; -+ rtw89_write32(rtwdev, R_AX_SCH_DBG_SEL, val32); -+ seq_puts(m, "Enable SCH C0 dbgport.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_SCH_C1: -+ info = &dbg_port_sch_c1; -+ val32 = rtw89_read32(rtwdev, R_AX_SCH_DBG_SEL_C1); -+ val32 |= B_AX_SCH_DBG_EN; -+ rtw89_write32(rtwdev, R_AX_SCH_DBG_SEL_C1, val32); -+ seq_puts(m, "Enable SCH C1 dbgport.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_TMAC_C0: -+ info = &dbg_port_tmac_c0; -+ val32 = rtw89_read32(rtwdev, R_AX_DBGSEL_TRXPTCL); -+ val32 = u32_replace_bits(val32, TRXPTRL_DBG_SEL_TMAC, -+ B_AX_DBGSEL_TRXPTCL_MASK); -+ rtw89_write32(rtwdev, R_AX_DBGSEL_TRXPTCL, val32); -+ -+ val32 = rtw89_read32(rtwdev, R_AX_DBG_CTRL); -+ val32 = u32_replace_bits(val32, TMAC_DBG_SEL_C0, B_AX_DBG_SEL0); -+ val32 = u32_replace_bits(val32, TMAC_DBG_SEL_C0, B_AX_DBG_SEL1); -+ rtw89_write32(rtwdev, R_AX_DBG_CTRL, val32); -+ -+ val32 = rtw89_read32(rtwdev, R_AX_SYS_STATUS1); -+ val32 = u32_replace_bits(val32, MAC_DBG_SEL, B_AX_SEL_0XC0_MASK); -+ rtw89_write32(rtwdev, R_AX_SYS_STATUS1, val32); -+ seq_puts(m, "Enable TMAC C0 dbgport.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_TMAC_C1: -+ info = &dbg_port_tmac_c1; -+ val32 = rtw89_read32(rtwdev, R_AX_DBGSEL_TRXPTCL_C1); -+ val32 = u32_replace_bits(val32, TRXPTRL_DBG_SEL_TMAC, -+ B_AX_DBGSEL_TRXPTCL_MASK); -+ rtw89_write32(rtwdev, R_AX_DBGSEL_TRXPTCL_C1, val32); -+ -+ val32 = rtw89_read32(rtwdev, R_AX_DBG_CTRL); -+ val32 = u32_replace_bits(val32, TMAC_DBG_SEL_C1, B_AX_DBG_SEL0); -+ val32 = u32_replace_bits(val32, TMAC_DBG_SEL_C1, B_AX_DBG_SEL1); -+ rtw89_write32(rtwdev, R_AX_DBG_CTRL, val32); -+ -+ val32 = rtw89_read32(rtwdev, R_AX_SYS_STATUS1); -+ val32 = u32_replace_bits(val32, MAC_DBG_SEL, B_AX_SEL_0XC0_MASK); -+ rtw89_write32(rtwdev, R_AX_SYS_STATUS1, val32); -+ seq_puts(m, "Enable TMAC C1 dbgport.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_RMAC_C0: -+ info = &dbg_port_rmac_c0; -+ val32 = rtw89_read32(rtwdev, R_AX_DBGSEL_TRXPTCL); -+ val32 = u32_replace_bits(val32, TRXPTRL_DBG_SEL_RMAC, -+ B_AX_DBGSEL_TRXPTCL_MASK); -+ rtw89_write32(rtwdev, R_AX_DBGSEL_TRXPTCL, val32); -+ -+ val32 = rtw89_read32(rtwdev, R_AX_DBG_CTRL); -+ val32 = u32_replace_bits(val32, RMAC_DBG_SEL_C0, B_AX_DBG_SEL0); -+ val32 = u32_replace_bits(val32, RMAC_DBG_SEL_C0, B_AX_DBG_SEL1); -+ rtw89_write32(rtwdev, R_AX_DBG_CTRL, val32); -+ -+ val32 = rtw89_read32(rtwdev, R_AX_SYS_STATUS1); -+ val32 = u32_replace_bits(val32, MAC_DBG_SEL, B_AX_SEL_0XC0_MASK); -+ rtw89_write32(rtwdev, R_AX_SYS_STATUS1, val32); -+ -+ val8 = rtw89_read8(rtwdev, R_AX_DBGSEL_TRXPTCL); -+ val8 = u8_replace_bits(val8, RMAC_CMAC_DBG_SEL, -+ B_AX_DBGSEL_TRXPTCL_MASK); -+ rtw89_write8(rtwdev, R_AX_DBGSEL_TRXPTCL, val8); -+ seq_puts(m, "Enable RMAC C0 dbgport.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_RMAC_C1: -+ info = &dbg_port_rmac_c1; -+ val32 = rtw89_read32(rtwdev, R_AX_DBGSEL_TRXPTCL_C1); -+ val32 = u32_replace_bits(val32, TRXPTRL_DBG_SEL_RMAC, -+ B_AX_DBGSEL_TRXPTCL_MASK); -+ rtw89_write32(rtwdev, R_AX_DBGSEL_TRXPTCL_C1, val32); -+ -+ val32 = rtw89_read32(rtwdev, R_AX_DBG_CTRL); -+ val32 = u32_replace_bits(val32, RMAC_DBG_SEL_C1, B_AX_DBG_SEL0); -+ val32 = u32_replace_bits(val32, RMAC_DBG_SEL_C1, B_AX_DBG_SEL1); -+ rtw89_write32(rtwdev, R_AX_DBG_CTRL, val32); -+ -+ val32 = rtw89_read32(rtwdev, R_AX_SYS_STATUS1); -+ val32 = u32_replace_bits(val32, MAC_DBG_SEL, B_AX_SEL_0XC0_MASK); -+ rtw89_write32(rtwdev, R_AX_SYS_STATUS1, val32); -+ -+ val8 = rtw89_read8(rtwdev, R_AX_DBGSEL_TRXPTCL_C1); -+ val8 = u8_replace_bits(val8, RMAC_CMAC_DBG_SEL, -+ B_AX_DBGSEL_TRXPTCL_MASK); -+ rtw89_write8(rtwdev, R_AX_DBGSEL_TRXPTCL_C1, val8); -+ seq_puts(m, "Enable RMAC C1 dbgport.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_RMACST_C0: -+ info = &dbg_port_rmacst_c0; -+ seq_puts(m, "Enable RMAC state C0 dbgport.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_RMACST_C1: -+ info = &dbg_port_rmacst_c1; -+ seq_puts(m, "Enable RMAC state C1 dbgport.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_RMAC_PLCP_C0: -+ info = &dbg_port_rmac_plcp_c0; -+ seq_puts(m, "Enable RMAC PLCP C0 dbgport.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_RMAC_PLCP_C1: -+ info = &dbg_port_rmac_plcp_c1; -+ seq_puts(m, "Enable RMAC PLCP C1 dbgport.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_TRXPTCL_C0: -+ info = &dbg_port_trxptcl_c0; -+ val32 = rtw89_read32(rtwdev, R_AX_DBG_CTRL); -+ val32 = u32_replace_bits(val32, TRXPTCL_DBG_SEL_C0, B_AX_DBG_SEL0); -+ val32 = u32_replace_bits(val32, TRXPTCL_DBG_SEL_C0, B_AX_DBG_SEL1); -+ rtw89_write32(rtwdev, R_AX_DBG_CTRL, val32); -+ -+ val32 = rtw89_read32(rtwdev, R_AX_SYS_STATUS1); -+ val32 = u32_replace_bits(val32, MAC_DBG_SEL, B_AX_SEL_0XC0_MASK); -+ rtw89_write32(rtwdev, R_AX_SYS_STATUS1, val32); -+ seq_puts(m, "Enable TRXPTCL C0 dbgport.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_TRXPTCL_C1: -+ info = &dbg_port_trxptcl_c1; -+ val32 = rtw89_read32(rtwdev, R_AX_DBG_CTRL); -+ val32 = u32_replace_bits(val32, TRXPTCL_DBG_SEL_C1, B_AX_DBG_SEL0); -+ val32 = u32_replace_bits(val32, TRXPTCL_DBG_SEL_C1, B_AX_DBG_SEL1); -+ rtw89_write32(rtwdev, R_AX_DBG_CTRL, val32); -+ -+ val32 = rtw89_read32(rtwdev, R_AX_SYS_STATUS1); -+ val32 = u32_replace_bits(val32, MAC_DBG_SEL, B_AX_SEL_0XC0_MASK); -+ rtw89_write32(rtwdev, R_AX_SYS_STATUS1, val32); -+ seq_puts(m, "Enable TRXPTCL C1 dbgport.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_TX_INFOL_C0: -+ info = &dbg_port_tx_infol_c0; -+ val32 = rtw89_read32(rtwdev, R_AX_TCR1); -+ val32 |= B_AX_TCR_FORCE_READ_TXDFIFO; -+ rtw89_write32(rtwdev, R_AX_TCR1, val32); -+ seq_puts(m, "Enable tx infol dump.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_TX_INFOH_C0: -+ info = &dbg_port_tx_infoh_c0; -+ val32 = rtw89_read32(rtwdev, R_AX_TCR1); -+ val32 |= B_AX_TCR_FORCE_READ_TXDFIFO; -+ rtw89_write32(rtwdev, R_AX_TCR1, val32); -+ seq_puts(m, "Enable tx infoh dump.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_TX_INFOL_C1: -+ info = &dbg_port_tx_infol_c1; -+ val32 = rtw89_read32(rtwdev, R_AX_TCR1_C1); -+ val32 |= B_AX_TCR_FORCE_READ_TXDFIFO; -+ rtw89_write32(rtwdev, R_AX_TCR1_C1, val32); -+ seq_puts(m, "Enable tx infol dump.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_TX_INFOH_C1: -+ info = &dbg_port_tx_infoh_c1; -+ val32 = rtw89_read32(rtwdev, R_AX_TCR1_C1); -+ val32 |= B_AX_TCR_FORCE_READ_TXDFIFO; -+ rtw89_write32(rtwdev, R_AX_TCR1_C1, val32); -+ seq_puts(m, "Enable tx infoh dump.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_TXTF_INFOL_C0: -+ info = &dbg_port_txtf_infol_c0; -+ val32 = rtw89_read32(rtwdev, R_AX_TCR1); -+ val32 |= B_AX_TCR_FORCE_READ_TXDFIFO; -+ rtw89_write32(rtwdev, R_AX_TCR1, val32); -+ seq_puts(m, "Enable tx tf infol dump.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_TXTF_INFOH_C0: -+ info = &dbg_port_txtf_infoh_c0; -+ val32 = rtw89_read32(rtwdev, R_AX_TCR1); -+ val32 |= B_AX_TCR_FORCE_READ_TXDFIFO; -+ rtw89_write32(rtwdev, R_AX_TCR1, val32); -+ seq_puts(m, "Enable tx tf infoh dump.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_TXTF_INFOL_C1: -+ info = &dbg_port_txtf_infol_c1; -+ val32 = rtw89_read32(rtwdev, R_AX_TCR1_C1); -+ val32 |= B_AX_TCR_FORCE_READ_TXDFIFO; -+ rtw89_write32(rtwdev, R_AX_TCR1_C1, val32); -+ seq_puts(m, "Enable tx tf infol dump.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_TXTF_INFOH_C1: -+ info = &dbg_port_txtf_infoh_c1; -+ val32 = rtw89_read32(rtwdev, R_AX_TCR1_C1); -+ val32 |= B_AX_TCR_FORCE_READ_TXDFIFO; -+ rtw89_write32(rtwdev, R_AX_TCR1_C1, val32); -+ seq_puts(m, "Enable tx tf infoh dump.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_WDE_BUFMGN_FREEPG: -+ info = &dbg_port_wde_bufmgn_freepg; -+ seq_puts(m, "Enable wde bufmgn freepg dump.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_WDE_BUFMGN_QUOTA: -+ info = &dbg_port_wde_bufmgn_quota; -+ seq_puts(m, "Enable wde bufmgn quota dump.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_WDE_BUFMGN_PAGELLT: -+ info = &dbg_port_wde_bufmgn_pagellt; -+ seq_puts(m, "Enable wde bufmgn pagellt dump.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_WDE_BUFMGN_PKTINFO: -+ info = &dbg_port_wde_bufmgn_pktinfo; -+ seq_puts(m, "Enable wde bufmgn pktinfo dump.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_WDE_QUEMGN_PREPKT: -+ info = &dbg_port_wde_quemgn_prepkt; -+ seq_puts(m, "Enable wde quemgn prepkt dump.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_WDE_QUEMGN_NXTPKT: -+ info = &dbg_port_wde_quemgn_nxtpkt; -+ seq_puts(m, "Enable wde quemgn nxtpkt dump.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_WDE_QUEMGN_QLNKTBL: -+ info = &dbg_port_wde_quemgn_qlnktbl; -+ seq_puts(m, "Enable wde quemgn qlnktbl dump.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_WDE_QUEMGN_QEMPTY: -+ info = &dbg_port_wde_quemgn_qempty; -+ seq_puts(m, "Enable wde quemgn qempty dump.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_PLE_BUFMGN_FREEPG: -+ info = &dbg_port_ple_bufmgn_freepg; -+ seq_puts(m, "Enable ple bufmgn freepg dump.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_PLE_BUFMGN_QUOTA: -+ info = &dbg_port_ple_bufmgn_quota; -+ seq_puts(m, "Enable ple bufmgn quota dump.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_PLE_BUFMGN_PAGELLT: -+ info = &dbg_port_ple_bufmgn_pagellt; -+ seq_puts(m, "Enable ple bufmgn pagellt dump.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_PLE_BUFMGN_PKTINFO: -+ info = &dbg_port_ple_bufmgn_pktinfo; -+ seq_puts(m, "Enable ple bufmgn pktinfo dump.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_PLE_QUEMGN_PREPKT: -+ info = &dbg_port_ple_quemgn_prepkt; -+ seq_puts(m, "Enable ple quemgn prepkt dump.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_PLE_QUEMGN_NXTPKT: -+ info = &dbg_port_ple_quemgn_nxtpkt; -+ seq_puts(m, "Enable ple quemgn nxtpkt dump.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_PLE_QUEMGN_QLNKTBL: -+ info = &dbg_port_ple_quemgn_qlnktbl; -+ seq_puts(m, "Enable ple quemgn qlnktbl dump.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_PLE_QUEMGN_QEMPTY: -+ info = &dbg_port_ple_quemgn_qempty; -+ seq_puts(m, "Enable ple quemgn qempty dump.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_PKTINFO: -+ info = &dbg_port_pktinfo; -+ seq_puts(m, "Enable pktinfo dump.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_PCIE_TXDMA: -+ info = &dbg_port_pcie_txdma; -+ val32 = rtw89_read32(rtwdev, R_AX_DBG_CTRL); -+ val32 = u32_replace_bits(val32, PCIE_TXDMA_DBG_SEL, B_AX_DBG_SEL0); -+ val32 = u32_replace_bits(val32, PCIE_TXDMA_DBG_SEL, B_AX_DBG_SEL1); -+ rtw89_write32(rtwdev, R_AX_DBG_CTRL, val32); -+ seq_puts(m, "Enable pcie txdma dump.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_PCIE_RXDMA: -+ info = &dbg_port_pcie_rxdma; -+ val32 = rtw89_read32(rtwdev, R_AX_DBG_CTRL); -+ val32 = u32_replace_bits(val32, PCIE_RXDMA_DBG_SEL, B_AX_DBG_SEL0); -+ val32 = u32_replace_bits(val32, PCIE_RXDMA_DBG_SEL, B_AX_DBG_SEL1); -+ rtw89_write32(rtwdev, R_AX_DBG_CTRL, val32); -+ seq_puts(m, "Enable pcie rxdma dump.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_PCIE_CVT: -+ info = &dbg_port_pcie_cvt; -+ val32 = rtw89_read32(rtwdev, R_AX_DBG_CTRL); -+ val32 = u32_replace_bits(val32, PCIE_CVT_DBG_SEL, B_AX_DBG_SEL0); -+ val32 = u32_replace_bits(val32, PCIE_CVT_DBG_SEL, B_AX_DBG_SEL1); -+ rtw89_write32(rtwdev, R_AX_DBG_CTRL, val32); -+ seq_puts(m, "Enable pcie cvt dump.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_PCIE_CXPL: -+ info = &dbg_port_pcie_cxpl; -+ val32 = rtw89_read32(rtwdev, R_AX_DBG_CTRL); -+ val32 = u32_replace_bits(val32, PCIE_CXPL_DBG_SEL, B_AX_DBG_SEL0); -+ val32 = u32_replace_bits(val32, PCIE_CXPL_DBG_SEL, B_AX_DBG_SEL1); -+ rtw89_write32(rtwdev, R_AX_DBG_CTRL, val32); -+ seq_puts(m, "Enable pcie cxpl dump.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_PCIE_IO: -+ info = &dbg_port_pcie_io; -+ val32 = rtw89_read32(rtwdev, R_AX_DBG_CTRL); -+ val32 = u32_replace_bits(val32, PCIE_IO_DBG_SEL, B_AX_DBG_SEL0); -+ val32 = u32_replace_bits(val32, PCIE_IO_DBG_SEL, B_AX_DBG_SEL1); -+ rtw89_write32(rtwdev, R_AX_DBG_CTRL, val32); -+ seq_puts(m, "Enable pcie io dump.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_PCIE_MISC: -+ info = &dbg_port_pcie_misc; -+ val32 = rtw89_read32(rtwdev, R_AX_DBG_CTRL); -+ val32 = u32_replace_bits(val32, PCIE_MISC_DBG_SEL, B_AX_DBG_SEL0); -+ val32 = u32_replace_bits(val32, PCIE_MISC_DBG_SEL, B_AX_DBG_SEL1); -+ rtw89_write32(rtwdev, R_AX_DBG_CTRL, val32); -+ seq_puts(m, "Enable pcie misc dump.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_PCIE_MISC2: -+ info = &dbg_port_pcie_misc2; -+ val16 = rtw89_read16(rtwdev, R_AX_PCIE_DBG_CTRL); -+ val16 = u16_replace_bits(val16, PCIE_MISC2_DBG_SEL, -+ B_AX_DBG_SEL_MASK); -+ rtw89_write16(rtwdev, R_AX_PCIE_DBG_CTRL, val16); -+ seq_puts(m, "Enable pcie misc2 dump.\n"); -+ break; -+ default: -+ seq_puts(m, "Dbg port select err\n"); -+ return NULL; -+ } -+ -+ return info; -+} -+ -+static bool is_dbg_port_valid(struct rtw89_dev *rtwdev, u32 sel) -+{ -+ if (rtwdev->hci.type != RTW89_HCI_TYPE_PCIE && -+ sel >= RTW89_DBG_PORT_SEL_PCIE_TXDMA && -+ sel <= RTW89_DBG_PORT_SEL_PCIE_MISC2) -+ return false; -+ if (rtwdev->chip->chip_id == RTL8852B && -+ sel >= RTW89_DBG_PORT_SEL_PTCL_C1 && -+ sel <= RTW89_DBG_PORT_SEL_TXTF_INFOH_C1) -+ return false; -+ if (rtw89_mac_check_mac_en(rtwdev, 0, RTW89_DMAC_SEL) && -+ sel >= RTW89_DBG_PORT_SEL_WDE_BUFMGN_FREEPG && -+ sel <= RTW89_DBG_PORT_SEL_PKTINFO) -+ return false; -+ if (rtw89_mac_check_mac_en(rtwdev, 0, RTW89_CMAC_SEL) && -+ sel >= RTW89_DBG_PORT_SEL_PTCL_C0 && -+ sel <= RTW89_DBG_PORT_SEL_TXTF_INFOH_C0) -+ return false; -+ if (rtw89_mac_check_mac_en(rtwdev, 1, RTW89_CMAC_SEL) && -+ sel >= RTW89_DBG_PORT_SEL_PTCL_C1 && -+ sel <= RTW89_DBG_PORT_SEL_TXTF_INFOH_C1) -+ return false; -+ -+ return true; -+} -+ -+static int rtw89_debug_mac_dbg_port_dump(struct rtw89_dev *rtwdev, -+ struct seq_file *m, u32 sel) -+{ -+ const struct rtw89_mac_dbg_port_info *info; -+ u8 val8; -+ u16 val16; -+ u32 val32; -+ u32 i; -+ -+ info = rtw89_debug_mac_dbg_port_sel(m, rtwdev, sel); -+ if (!info) { -+ rtw89_err(rtwdev, "failed to select debug port %d\n", sel); -+ return -EINVAL; -+ } -+ -+#define case_DBG_SEL(__sel) \ -+ case RTW89_DBG_PORT_SEL_##__sel: \ -+ seq_puts(m, "Dump debug port " #__sel ":\n"); \ -+ break -+ -+ switch (sel) { -+ case_DBG_SEL(PTCL_C0); -+ case_DBG_SEL(PTCL_C1); -+ case_DBG_SEL(SCH_C0); -+ case_DBG_SEL(SCH_C1); -+ case_DBG_SEL(TMAC_C0); -+ case_DBG_SEL(TMAC_C1); -+ case_DBG_SEL(RMAC_C0); -+ case_DBG_SEL(RMAC_C1); -+ case_DBG_SEL(RMACST_C0); -+ case_DBG_SEL(RMACST_C1); -+ case_DBG_SEL(TRXPTCL_C0); -+ case_DBG_SEL(TRXPTCL_C1); -+ case_DBG_SEL(TX_INFOL_C0); -+ case_DBG_SEL(TX_INFOH_C0); -+ case_DBG_SEL(TX_INFOL_C1); -+ case_DBG_SEL(TX_INFOH_C1); -+ case_DBG_SEL(TXTF_INFOL_C0); -+ case_DBG_SEL(TXTF_INFOH_C0); -+ case_DBG_SEL(TXTF_INFOL_C1); -+ case_DBG_SEL(TXTF_INFOH_C1); -+ case_DBG_SEL(WDE_BUFMGN_FREEPG); -+ case_DBG_SEL(WDE_BUFMGN_QUOTA); -+ case_DBG_SEL(WDE_BUFMGN_PAGELLT); -+ case_DBG_SEL(WDE_BUFMGN_PKTINFO); -+ case_DBG_SEL(WDE_QUEMGN_PREPKT); -+ case_DBG_SEL(WDE_QUEMGN_NXTPKT); -+ case_DBG_SEL(WDE_QUEMGN_QLNKTBL); -+ case_DBG_SEL(WDE_QUEMGN_QEMPTY); -+ case_DBG_SEL(PLE_BUFMGN_FREEPG); -+ case_DBG_SEL(PLE_BUFMGN_QUOTA); -+ case_DBG_SEL(PLE_BUFMGN_PAGELLT); -+ case_DBG_SEL(PLE_BUFMGN_PKTINFO); -+ case_DBG_SEL(PLE_QUEMGN_PREPKT); -+ case_DBG_SEL(PLE_QUEMGN_NXTPKT); -+ case_DBG_SEL(PLE_QUEMGN_QLNKTBL); -+ case_DBG_SEL(PLE_QUEMGN_QEMPTY); -+ case_DBG_SEL(PKTINFO); -+ case_DBG_SEL(PCIE_TXDMA); -+ case_DBG_SEL(PCIE_RXDMA); -+ case_DBG_SEL(PCIE_CVT); -+ case_DBG_SEL(PCIE_CXPL); -+ case_DBG_SEL(PCIE_IO); -+ case_DBG_SEL(PCIE_MISC); -+ case_DBG_SEL(PCIE_MISC2); -+ } -+ -+#undef case_DBG_SEL -+ -+ seq_printf(m, "Sel addr = 0x%X\n", info->sel_addr); -+ seq_printf(m, "Read addr = 0x%X\n", info->rd_addr); -+ -+ for (i = info->srt; i <= info->end; i++) { -+ switch (info->sel_byte) { -+ case 1: -+ default: -+ rtw89_write8_mask(rtwdev, info->sel_addr, -+ info->sel_msk, i); -+ seq_printf(m, "0x%02X: ", i); -+ break; -+ case 2: -+ rtw89_write16_mask(rtwdev, info->sel_addr, -+ info->sel_msk, i); -+ seq_printf(m, "0x%04X: ", i); -+ break; -+ case 4: -+ rtw89_write32_mask(rtwdev, info->sel_addr, -+ info->sel_msk, i); -+ seq_printf(m, "0x%04X: ", i); -+ break; -+ } -+ -+ udelay(10); -+ -+ switch (info->rd_byte) { -+ case 1: -+ default: -+ val8 = rtw89_read8_mask(rtwdev, -+ info->rd_addr, info->rd_msk); -+ seq_printf(m, "0x%02X\n", val8); -+ break; -+ case 2: -+ val16 = rtw89_read16_mask(rtwdev, -+ info->rd_addr, info->rd_msk); -+ seq_printf(m, "0x%04X\n", val16); -+ break; -+ case 4: -+ val32 = rtw89_read32_mask(rtwdev, -+ info->rd_addr, info->rd_msk); -+ seq_printf(m, "0x%08X\n", val32); -+ break; -+ } -+ } -+ -+ return 0; -+} -+ -+static int rtw89_debug_mac_dump_dbg_port(struct rtw89_dev *rtwdev, -+ struct seq_file *m) -+{ -+ u32 sel; -+ int ret = 0; -+ -+ for (sel = RTW89_DBG_PORT_SEL_PTCL_C0; -+ sel < RTW89_DBG_PORT_SEL_LAST; sel++) { -+ if (!is_dbg_port_valid(rtwdev, sel)) -+ continue; -+ ret = rtw89_debug_mac_dbg_port_dump(rtwdev, m, sel); -+ if (ret) { -+ rtw89_err(rtwdev, -+ "failed to dump debug port %d\n", sel); -+ break; -+ } -+ } -+ -+ return ret; -+} -+ -+static int -+rtw89_debug_priv_mac_dbg_port_dump_get(struct seq_file *m, void *v) -+{ -+ struct rtw89_debugfs_priv *debugfs_priv = m->private; -+ struct rtw89_dev *rtwdev = debugfs_priv->rtwdev; -+ -+ if (debugfs_priv->dbgpkg_en.ss_dbg) -+ rtw89_debug_mac_dump_ss_dbg(rtwdev, m); -+ if (debugfs_priv->dbgpkg_en.dle_dbg) -+ rtw89_debug_mac_dump_dle_dbg(rtwdev, m); -+ if (debugfs_priv->dbgpkg_en.dmac_dbg) -+ rtw89_debug_mac_dump_dmac_dbg(rtwdev, m); -+ if (debugfs_priv->dbgpkg_en.cmac_dbg) -+ rtw89_debug_mac_dump_cmac_dbg(rtwdev, m); -+ if (debugfs_priv->dbgpkg_en.dbg_port) -+ rtw89_debug_mac_dump_dbg_port(rtwdev, m); -+ -+ return 0; -+}; -+ -+static u8 *rtw89_hex2bin_user(struct rtw89_dev *rtwdev, -+ const char __user *user_buf, size_t count) -+{ -+ char *buf; -+ u8 *bin; -+ int num; -+ int err = 0; -+ -+ buf = memdup_user(user_buf, count); -+ if (IS_ERR(buf)) -+ return buf; -+ -+ num = count / 2; -+ bin = kmalloc(num, GFP_KERNEL); -+ if (!bin) { -+ err = -EFAULT; -+ goto out; -+ } -+ -+ if (hex2bin(bin, buf, num)) { -+ rtw89_info(rtwdev, "valid format: H1H2H3...\n"); -+ kfree(bin); -+ err = -EINVAL; -+ } -+ -+out: -+ kfree(buf); -+ -+ return err ? ERR_PTR(err) : bin; -+} -+ -+static ssize_t rtw89_debug_priv_send_h2c_set(struct file *filp, -+ const char __user *user_buf, -+ size_t count, loff_t *loff) -+{ -+ struct rtw89_debugfs_priv *debugfs_priv = filp->private_data; -+ struct rtw89_dev *rtwdev = debugfs_priv->rtwdev; -+ u8 *h2c; -+ u16 h2c_len = count / 2; -+ -+ h2c = rtw89_hex2bin_user(rtwdev, user_buf, count); -+ if (IS_ERR(h2c)) -+ return -EFAULT; -+ -+ rtw89_fw_h2c_raw(rtwdev, h2c, h2c_len); -+ -+ kfree(h2c); -+ -+ return count; -+} -+ -+static int -+rtw89_debug_priv_early_h2c_get(struct seq_file *m, void *v) -+{ -+ struct rtw89_debugfs_priv *debugfs_priv = m->private; -+ struct rtw89_dev *rtwdev = debugfs_priv->rtwdev; -+ struct rtw89_early_h2c *early_h2c; -+ int seq = 0; -+ -+ mutex_lock(&rtwdev->mutex); -+ list_for_each_entry(early_h2c, &rtwdev->early_h2c_list, list) -+ seq_printf(m, "%d: %*ph\n", ++seq, early_h2c->h2c_len, early_h2c->h2c); -+ mutex_unlock(&rtwdev->mutex); -+ -+ return 0; -+} -+ -+static ssize_t -+rtw89_debug_priv_early_h2c_set(struct file *filp, const char __user *user_buf, -+ size_t count, loff_t *loff) -+{ -+ struct seq_file *m = (struct seq_file *)filp->private_data; -+ struct rtw89_debugfs_priv *debugfs_priv = m->private; -+ struct rtw89_dev *rtwdev = debugfs_priv->rtwdev; -+ struct rtw89_early_h2c *early_h2c; -+ u8 *h2c; -+ u16 h2c_len = count / 2; -+ -+ h2c = rtw89_hex2bin_user(rtwdev, user_buf, count); -+ if (IS_ERR(h2c)) -+ return -EFAULT; -+ -+ if (h2c_len >= 2 && h2c[0] == 0x00 && h2c[1] == 0x00) { -+ kfree(h2c); -+ rtw89_fw_free_all_early_h2c(rtwdev); -+ goto out; -+ } -+ -+ early_h2c = kmalloc(sizeof(*early_h2c), GFP_KERNEL); -+ if (!early_h2c) { -+ kfree(h2c); -+ return -EFAULT; -+ } -+ -+ early_h2c->h2c = h2c; -+ early_h2c->h2c_len = h2c_len; -+ -+ mutex_lock(&rtwdev->mutex); -+ list_add_tail(&early_h2c->list, &rtwdev->early_h2c_list); -+ mutex_unlock(&rtwdev->mutex); -+ -+out: -+ return count; -+} -+ -+static int rtw89_debug_priv_btc_info_get(struct seq_file *m, void *v) -+{ -+ struct rtw89_debugfs_priv *debugfs_priv = m->private; -+ struct rtw89_dev *rtwdev = debugfs_priv->rtwdev; -+ -+ rtw89_btc_dump_info(rtwdev, m); -+ -+ return 0; -+} -+ -+static ssize_t rtw89_debug_priv_btc_manual_set(struct file *filp, -+ const char __user *user_buf, -+ size_t count, loff_t *loff) -+{ -+ struct rtw89_debugfs_priv *debugfs_priv = filp->private_data; -+ struct rtw89_dev *rtwdev = debugfs_priv->rtwdev; -+ struct rtw89_btc *btc = &rtwdev->btc; -+ bool btc_manual; -+ -+ if (kstrtobool_from_user(user_buf, count, &btc_manual)) -+ goto out; -+ -+ btc->ctrl.manual = btc_manual; -+out: -+ return count; -+} -+ -+static ssize_t rtw89_debug_fw_log_btc_manual_set(struct file *filp, -+ const char __user *user_buf, -+ size_t count, loff_t *loff) -+{ -+ struct rtw89_debugfs_priv *debugfs_priv = filp->private_data; -+ struct rtw89_dev *rtwdev = debugfs_priv->rtwdev; -+ struct rtw89_fw_info *fw_info = &rtwdev->fw; -+ bool fw_log_manual; -+ -+ if (kstrtobool_from_user(user_buf, count, &fw_log_manual)) -+ goto out; -+ -+ mutex_lock(&rtwdev->mutex); -+ fw_info->fw_log_enable = fw_log_manual; -+ rtw89_fw_h2c_fw_log(rtwdev, fw_log_manual); -+ mutex_unlock(&rtwdev->mutex); -+out: -+ return count; -+} -+ -+static void rtw89_sta_info_get_iter(void *data, struct ieee80211_sta *sta) -+{ -+ static const char * const he_gi_str[] = { -+ [NL80211_RATE_INFO_HE_GI_0_8] = "0.8", -+ [NL80211_RATE_INFO_HE_GI_1_6] = "1.6", -+ [NL80211_RATE_INFO_HE_GI_3_2] = "3.2", -+ }; -+ struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; -+ struct rate_info *rate = &rtwsta->ra_report.txrate; -+ struct ieee80211_rx_status *status = &rtwsta->rx_status; -+ struct seq_file *m = (struct seq_file *)data; -+ u8 rssi; -+ -+ seq_printf(m, "TX rate [%d]: ", rtwsta->mac_id); -+ -+ if (rate->flags & RATE_INFO_FLAGS_MCS) -+ seq_printf(m, "HT MCS-%d%s", rate->mcs, -+ rate->flags & RATE_INFO_FLAGS_SHORT_GI ? " SGI" : ""); -+ else if (rate->flags & RATE_INFO_FLAGS_VHT_MCS) -+ seq_printf(m, "VHT %dSS MCS-%d%s", rate->nss, rate->mcs, -+ rate->flags & RATE_INFO_FLAGS_SHORT_GI ? " SGI" : ""); -+ else if (rate->flags & RATE_INFO_FLAGS_HE_MCS) -+ seq_printf(m, "HE %dSS MCS-%d GI:%s", rate->nss, rate->mcs, -+ rate->he_gi <= NL80211_RATE_INFO_HE_GI_3_2 ? -+ he_gi_str[rate->he_gi] : "N/A"); -+ else -+ seq_printf(m, "Legacy %d", rate->legacy); -+ seq_printf(m, "\t(hw_rate=0x%x)", rtwsta->ra_report.hw_rate); -+ seq_printf(m, "\t==> agg_wait=%d (%d)\n", rtwsta->max_agg_wait, -+ sta->max_rc_amsdu_len); -+ -+ seq_printf(m, "RX rate [%d]: ", rtwsta->mac_id); -+ -+ switch (status->encoding) { -+ case RX_ENC_LEGACY: -+ seq_printf(m, "Legacy %d", status->rate_idx + -+ (status->band == NL80211_BAND_5GHZ ? 4 : 0)); -+ break; -+ case RX_ENC_HT: -+ seq_printf(m, "HT MCS-%d%s", status->rate_idx, -+ status->enc_flags & RX_ENC_FLAG_SHORT_GI ? " SGI" : ""); -+ break; -+ case RX_ENC_VHT: -+ seq_printf(m, "VHT %dSS MCS-%d%s", status->nss, status->rate_idx, -+ status->enc_flags & RX_ENC_FLAG_SHORT_GI ? " SGI" : ""); -+ break; -+ case RX_ENC_HE: -+ seq_printf(m, "HE %dSS MCS-%d GI:%s", status->nss, status->rate_idx, -+ status->he_gi <= NL80211_RATE_INFO_HE_GI_3_2 ? -+ he_gi_str[rate->he_gi] : "N/A"); -+ break; -+ } -+ seq_printf(m, "\t(hw_rate=0x%x)\n", rtwsta->rx_hw_rate); -+ -+ rssi = ewma_rssi_read(&rtwsta->avg_rssi); -+ seq_printf(m, "RSSI: %d dBm (raw=%d, prev=%d)\n", -+ RTW89_RSSI_RAW_TO_DBM(rssi), rssi, rtwsta->prev_rssi); -+} -+ -+static void -+rtw89_debug_append_rx_rate(struct seq_file *m, struct rtw89_pkt_stat *pkt_stat, -+ enum rtw89_hw_rate first_rate, int len) -+{ -+ int i; -+ -+ for (i = 0; i < len; i++) -+ seq_printf(m, "%s%u", i == 0 ? "" : ", ", -+ pkt_stat->rx_rate_cnt[first_rate + i]); -+} -+ -+static const struct rtw89_rx_rate_cnt_info { -+ enum rtw89_hw_rate first_rate; -+ int len; -+ const char *rate_mode; -+} rtw89_rx_rate_cnt_infos[] = { -+ {RTW89_HW_RATE_CCK1, 4, "Legacy:"}, -+ {RTW89_HW_RATE_OFDM6, 8, "OFDM:"}, -+ {RTW89_HW_RATE_MCS0, 8, "HT 0:"}, -+ {RTW89_HW_RATE_MCS8, 8, "HT 1:"}, -+ {RTW89_HW_RATE_VHT_NSS1_MCS0, 10, "VHT 1SS:"}, -+ {RTW89_HW_RATE_VHT_NSS2_MCS0, 10, "VHT 2SS:"}, -+ {RTW89_HW_RATE_HE_NSS1_MCS0, 12, "HE 1SS:"}, -+ {RTW89_HW_RATE_HE_NSS2_MCS0, 12, "HE 2ss:"}, -+}; -+ -+static int rtw89_debug_priv_phy_info_get(struct seq_file *m, void *v) -+{ -+ struct rtw89_debugfs_priv *debugfs_priv = m->private; -+ struct rtw89_dev *rtwdev = debugfs_priv->rtwdev; -+ struct rtw89_traffic_stats *stats = &rtwdev->stats; -+ struct rtw89_pkt_stat *pkt_stat = &rtwdev->phystat.last_pkt_stat; -+ const struct rtw89_rx_rate_cnt_info *info; -+ int i; -+ -+ seq_printf(m, "TP TX: %u [%u] Mbps (lv: %d), RX: %u [%u] Mbps (lv: %d)\n", -+ stats->tx_throughput, stats->tx_throughput_raw, stats->tx_tfc_lv, -+ stats->rx_throughput, stats->rx_throughput_raw, stats->rx_tfc_lv); -+ seq_printf(m, "Beacon: %u\n", pkt_stat->beacon_nr); -+ seq_printf(m, "Avg packet length: TX=%u, RX=%u\n", stats->tx_avg_len, -+ stats->rx_avg_len); -+ -+ seq_puts(m, "RX count:\n"); -+ for (i = 0; i < ARRAY_SIZE(rtw89_rx_rate_cnt_infos); i++) { -+ info = &rtw89_rx_rate_cnt_infos[i]; -+ seq_printf(m, "%10s [", info->rate_mode); -+ rtw89_debug_append_rx_rate(m, pkt_stat, -+ info->first_rate, info->len); -+ seq_puts(m, "]\n"); -+ } -+ -+ ieee80211_iterate_stations_atomic(rtwdev->hw, rtw89_sta_info_get_iter, m); -+ -+ return 0; -+} -+ -+static struct rtw89_debugfs_priv rtw89_debug_priv_read_reg = { -+ .cb_read = rtw89_debug_priv_read_reg_get, -+ .cb_write = rtw89_debug_priv_read_reg_select, -+}; -+ -+static struct rtw89_debugfs_priv rtw89_debug_priv_write_reg = { -+ .cb_write = rtw89_debug_priv_write_reg_set, -+}; -+ -+static struct rtw89_debugfs_priv rtw89_debug_priv_read_rf = { -+ .cb_read = rtw89_debug_priv_read_rf_get, -+ .cb_write = rtw89_debug_priv_read_rf_select, -+}; -+ -+static struct rtw89_debugfs_priv rtw89_debug_priv_write_rf = { -+ .cb_write = rtw89_debug_priv_write_rf_set, -+}; -+ -+static struct rtw89_debugfs_priv rtw89_debug_priv_rf_reg_dump = { -+ .cb_read = rtw89_debug_priv_rf_reg_dump_get, -+}; -+ -+static struct rtw89_debugfs_priv rtw89_debug_priv_txpwr_table = { -+ .cb_read = rtw89_debug_priv_txpwr_table_get, -+}; -+ -+static struct rtw89_debugfs_priv rtw89_debug_priv_mac_reg_dump = { -+ .cb_read = rtw89_debug_priv_mac_reg_dump_get, -+ .cb_write = rtw89_debug_priv_mac_reg_dump_select, -+}; -+ -+static struct rtw89_debugfs_priv rtw89_debug_priv_mac_mem_dump = { -+ .cb_read = rtw89_debug_priv_mac_mem_dump_get, -+ .cb_write = rtw89_debug_priv_mac_mem_dump_select, -+}; -+ -+static struct rtw89_debugfs_priv rtw89_debug_priv_mac_dbg_port_dump = { -+ .cb_read = rtw89_debug_priv_mac_dbg_port_dump_get, -+ .cb_write = rtw89_debug_priv_mac_dbg_port_dump_select, -+}; -+ -+static struct rtw89_debugfs_priv rtw89_debug_priv_send_h2c = { -+ .cb_write = rtw89_debug_priv_send_h2c_set, -+}; -+ -+static struct rtw89_debugfs_priv rtw89_debug_priv_early_h2c = { -+ .cb_read = rtw89_debug_priv_early_h2c_get, -+ .cb_write = rtw89_debug_priv_early_h2c_set, -+}; -+ -+static struct rtw89_debugfs_priv rtw89_debug_priv_btc_info = { -+ .cb_read = rtw89_debug_priv_btc_info_get, -+}; -+ -+static struct rtw89_debugfs_priv rtw89_debug_priv_btc_manual = { -+ .cb_write = rtw89_debug_priv_btc_manual_set, -+}; -+ -+static struct rtw89_debugfs_priv rtw89_debug_priv_fw_log_manual = { -+ .cb_write = rtw89_debug_fw_log_btc_manual_set, -+}; -+ -+static struct rtw89_debugfs_priv rtw89_debug_priv_phy_info = { -+ .cb_read = rtw89_debug_priv_phy_info_get, -+}; -+ -+#define rtw89_debugfs_add(name, mode, fopname, parent) \ -+ do { \ -+ rtw89_debug_priv_ ##name.rtwdev = rtwdev; \ -+ if (!debugfs_create_file(#name, mode, \ -+ parent, &rtw89_debug_priv_ ##name, \ -+ &file_ops_ ##fopname)) \ -+ pr_debug("Unable to initialize debugfs:%s\n", #name); \ -+ } while (0) -+ -+#define rtw89_debugfs_add_w(name) \ -+ rtw89_debugfs_add(name, S_IFREG | 0222, single_w, debugfs_topdir) -+#define rtw89_debugfs_add_rw(name) \ -+ rtw89_debugfs_add(name, S_IFREG | 0666, common_rw, debugfs_topdir) -+#define rtw89_debugfs_add_r(name) \ -+ rtw89_debugfs_add(name, S_IFREG | 0444, single_r, debugfs_topdir) -+ -+void rtw89_debugfs_init(struct rtw89_dev *rtwdev) -+{ -+ struct dentry *debugfs_topdir; -+ -+ debugfs_topdir = debugfs_create_dir("rtw89", -+ rtwdev->hw->wiphy->debugfsdir); -+ -+ rtw89_debugfs_add_rw(read_reg); -+ rtw89_debugfs_add_w(write_reg); -+ rtw89_debugfs_add_rw(read_rf); -+ rtw89_debugfs_add_w(write_rf); -+ rtw89_debugfs_add_r(rf_reg_dump); -+ rtw89_debugfs_add_r(txpwr_table); -+ rtw89_debugfs_add_rw(mac_reg_dump); -+ rtw89_debugfs_add_rw(mac_mem_dump); -+ rtw89_debugfs_add_rw(mac_dbg_port_dump); -+ rtw89_debugfs_add_w(send_h2c); -+ rtw89_debugfs_add_rw(early_h2c); -+ rtw89_debugfs_add_r(btc_info); -+ rtw89_debugfs_add_w(btc_manual); -+ rtw89_debugfs_add_w(fw_log_manual); -+ rtw89_debugfs_add_r(phy_info); -+} -+#endif -+ -+#ifdef CONFIG_RTW89_DEBUGMSG -+void __rtw89_debug(struct rtw89_dev *rtwdev, -+ enum rtw89_debug_mask mask, -+ const char *fmt, ...) -+{ -+ struct va_format vaf = { -+ .fmt = fmt, -+ }; -+ -+ va_list args; -+ -+ va_start(args, fmt); -+ vaf.va = &args; -+ -+ if (rtw89_debug_mask & mask) -+ dev_printk(KERN_DEBUG, rtwdev->dev, "%pV", &vaf); -+ -+ va_end(args); -+} -+EXPORT_SYMBOL(__rtw89_debug); -+#endif -diff --git a/drivers/net/wireless/realtek/rtw89/debug.h b/drivers/net/wireless/realtek/rtw89/debug.h -new file mode 100644 -index 000000000000..f14b726c1a9f ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/debug.h -@@ -0,0 +1,77 @@ -+/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ -+/* Copyright(c) 2019-2020 Realtek Corporation -+ */ -+ -+#ifndef __RTW89_DEBUG_H__ -+#define __RTW89_DEBUG_H__ -+ -+#include "core.h" -+ -+enum rtw89_debug_mask { -+ RTW89_DBG_TXRX = BIT(0), -+ RTW89_DBG_RFK = BIT(1), -+ RTW89_DBG_RFK_TRACK = BIT(2), -+ RTW89_DBG_CFO = BIT(3), -+ RTW89_DBG_TSSI = BIT(4), -+ RTW89_DBG_TXPWR = BIT(5), -+ RTW89_DBG_HCI = BIT(6), -+ RTW89_DBG_RA = BIT(7), -+ RTW89_DBG_REGD = BIT(8), -+ RTW89_DBG_PHY_TRACK = BIT(9), -+ RTW89_DBG_DIG = BIT(10), -+ RTW89_DBG_SER = BIT(11), -+ RTW89_DBG_FW = BIT(12), -+ RTW89_DBG_BTC = BIT(13), -+ RTW89_DBG_BF = BIT(14), -+}; -+ -+enum rtw89_debug_mac_reg_sel { -+ RTW89_DBG_SEL_MAC_00, -+ RTW89_DBG_SEL_MAC_40, -+ RTW89_DBG_SEL_MAC_80, -+ RTW89_DBG_SEL_MAC_C0, -+ RTW89_DBG_SEL_MAC_E0, -+ RTW89_DBG_SEL_BB, -+ RTW89_DBG_SEL_IQK, -+ RTW89_DBG_SEL_RFC, -+}; -+ -+#ifdef CONFIG_RTW89_DEBUGFS -+void rtw89_debugfs_init(struct rtw89_dev *rtwdev); -+#else -+static inline void rtw89_debugfs_init(struct rtw89_dev *rtwdev) {} -+#endif -+ -+#define rtw89_info(rtwdev, a...) dev_info((rtwdev)->dev, ##a) -+#define rtw89_warn(rtwdev, a...) dev_warn((rtwdev)->dev, ##a) -+#define rtw89_err(rtwdev, a...) dev_err((rtwdev)->dev, ##a) -+ -+#ifdef CONFIG_RTW89_DEBUGMSG -+extern unsigned int rtw89_debug_mask; -+#define rtw89_debug(rtwdev, a...) __rtw89_debug(rtwdev, ##a) -+ -+__printf(3, 4) -+void __rtw89_debug(struct rtw89_dev *rtwdev, -+ enum rtw89_debug_mask mask, -+ const char *fmt, ...); -+static inline void rtw89_hex_dump(struct rtw89_dev *rtwdev, -+ enum rtw89_debug_mask mask, -+ const char *prefix_str, -+ const void *buf, size_t len) -+{ -+ if (!(rtw89_debug_mask & mask)) -+ return; -+ -+ print_hex_dump_bytes(prefix_str, DUMP_PREFIX_OFFSET, buf, len); -+} -+#else -+static inline void rtw89_debug(struct rtw89_dev *rtwdev, -+ enum rtw89_debug_mask mask, -+ const char *fmt, ...) {} -+static inline void rtw89_hex_dump(struct rtw89_dev *rtwdev, -+ enum rtw89_debug_mask mask, -+ const char *prefix_str, -+ const void *buf, size_t len) {} -+#endif -+ -+#endif -diff --git a/drivers/net/wireless/realtek/rtw89/efuse.c b/drivers/net/wireless/realtek/rtw89/efuse.c -new file mode 100644 -index 000000000000..c0b80f3da56c ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/efuse.c -@@ -0,0 +1,188 @@ -+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause -+/* Copyright(c) 2019-2020 Realtek Corporation -+ */ -+ -+#include "debug.h" -+#include "efuse.h" -+#include "reg.h" -+ -+enum rtw89_efuse_bank { -+ RTW89_EFUSE_BANK_WIFI, -+ RTW89_EFUSE_BANK_BT, -+}; -+ -+static int rtw89_switch_efuse_bank(struct rtw89_dev *rtwdev, -+ enum rtw89_efuse_bank bank) -+{ -+ u8 val; -+ -+ val = rtw89_read32_mask(rtwdev, R_AX_EFUSE_CTRL_1, -+ B_AX_EF_CELL_SEL_MASK); -+ if (bank == val) -+ return 0; -+ -+ rtw89_write32_mask(rtwdev, R_AX_EFUSE_CTRL_1, B_AX_EF_CELL_SEL_MASK, -+ bank); -+ -+ val = rtw89_read32_mask(rtwdev, R_AX_EFUSE_CTRL_1, -+ B_AX_EF_CELL_SEL_MASK); -+ if (bank == val) -+ return 0; -+ -+ return -EBUSY; -+} -+ -+static int rtw89_dump_physical_efuse_map(struct rtw89_dev *rtwdev, u8 *map, -+ u32 dump_addr, u32 dump_size) -+{ -+ u32 efuse_ctl; -+ u32 addr; -+ int ret; -+ -+ rtw89_switch_efuse_bank(rtwdev, RTW89_EFUSE_BANK_WIFI); -+ -+ for (addr = dump_addr; addr < dump_addr + dump_size; addr++) { -+ efuse_ctl = u32_encode_bits(addr, B_AX_EF_ADDR_MASK); -+ rtw89_write32(rtwdev, R_AX_EFUSE_CTRL, efuse_ctl & ~B_AX_EF_RDY); -+ -+ ret = read_poll_timeout_atomic(rtw89_read32, efuse_ctl, -+ efuse_ctl & B_AX_EF_RDY, 1, 1000000, -+ true, rtwdev, R_AX_EFUSE_CTRL); -+ if (ret) -+ return -EBUSY; -+ -+ *map++ = (u8)(efuse_ctl & 0xff); -+ } -+ -+ return 0; -+} -+ -+#define invalid_efuse_header(hdr1, hdr2) \ -+ ((hdr1) == 0xff || (hdr2) == 0xff) -+#define invalid_efuse_content(word_en, i) \ -+ (((word_en) & BIT(i)) != 0x0) -+#define get_efuse_blk_idx(hdr1, hdr2) \ -+ ((((hdr2) & 0xf0) >> 4) | (((hdr1) & 0x0f) << 4)) -+#define block_idx_to_logical_idx(blk_idx, i) \ -+ (((blk_idx) << 3) + ((i) << 1)) -+static int rtw89_dump_logical_efuse_map(struct rtw89_dev *rtwdev, u8 *phy_map, -+ u8 *log_map) -+{ -+ u32 physical_size = rtwdev->chip->physical_efuse_size; -+ u32 logical_size = rtwdev->chip->logical_efuse_size; -+ u8 sec_ctrl_size = rtwdev->chip->sec_ctrl_efuse_size; -+ u32 phy_idx = sec_ctrl_size; -+ u32 log_idx; -+ u8 hdr1, hdr2; -+ u8 blk_idx; -+ u8 word_en; -+ int i; -+ -+ while (phy_idx < physical_size - sec_ctrl_size) { -+ hdr1 = phy_map[phy_idx]; -+ hdr2 = phy_map[phy_idx + 1]; -+ if (invalid_efuse_header(hdr1, hdr2)) -+ break; -+ -+ blk_idx = get_efuse_blk_idx(hdr1, hdr2); -+ word_en = hdr2 & 0xf; -+ phy_idx += 2; -+ -+ for (i = 0; i < 4; i++) { -+ if (invalid_efuse_content(word_en, i)) -+ continue; -+ -+ log_idx = block_idx_to_logical_idx(blk_idx, i); -+ if (phy_idx + 1 > physical_size - sec_ctrl_size - 1 || -+ log_idx + 1 > logical_size) -+ return -EINVAL; -+ -+ log_map[log_idx] = phy_map[phy_idx]; -+ log_map[log_idx + 1] = phy_map[phy_idx + 1]; -+ phy_idx += 2; -+ } -+ } -+ return 0; -+} -+ -+int rtw89_parse_efuse_map(struct rtw89_dev *rtwdev) -+{ -+ u32 phy_size = rtwdev->chip->physical_efuse_size; -+ u32 log_size = rtwdev->chip->logical_efuse_size; -+ u8 *phy_map = NULL; -+ u8 *log_map = NULL; -+ int ret; -+ -+ if (rtw89_read16(rtwdev, R_AX_SYS_WL_EFUSE_CTRL) & B_AX_AUTOLOAD_SUS) -+ rtwdev->efuse.valid = true; -+ else -+ rtw89_warn(rtwdev, "failed to check efuse autoload\n"); -+ -+ phy_map = kmalloc(phy_size, GFP_KERNEL); -+ log_map = kmalloc(log_size, GFP_KERNEL); -+ -+ if (!phy_map || !log_map) { -+ ret = -ENOMEM; -+ goto out_free; -+ } -+ -+ ret = rtw89_dump_physical_efuse_map(rtwdev, phy_map, 0, phy_size); -+ if (ret) { -+ rtw89_warn(rtwdev, "failed to dump efuse physical map\n"); -+ goto out_free; -+ } -+ -+ memset(log_map, 0xff, log_size); -+ ret = rtw89_dump_logical_efuse_map(rtwdev, phy_map, log_map); -+ if (ret) { -+ rtw89_warn(rtwdev, "failed to dump efuse logical map\n"); -+ goto out_free; -+ } -+ -+ rtw89_hex_dump(rtwdev, RTW89_DBG_FW, "log_map: ", log_map, log_size); -+ -+ ret = rtwdev->chip->ops->read_efuse(rtwdev, log_map); -+ if (ret) { -+ rtw89_warn(rtwdev, "failed to read efuse map\n"); -+ goto out_free; -+ } -+ -+out_free: -+ kfree(log_map); -+ kfree(phy_map); -+ -+ return ret; -+} -+ -+int rtw89_parse_phycap_map(struct rtw89_dev *rtwdev) -+{ -+ u32 phycap_addr = rtwdev->chip->phycap_addr; -+ u32 phycap_size = rtwdev->chip->phycap_size; -+ u8 *phycap_map = NULL; -+ int ret = 0; -+ -+ if (!phycap_size) -+ return 0; -+ -+ phycap_map = kmalloc(phycap_size, GFP_KERNEL); -+ if (!phycap_map) -+ return -ENOMEM; -+ -+ ret = rtw89_dump_physical_efuse_map(rtwdev, phycap_map, -+ phycap_addr, phycap_size); -+ if (ret) { -+ rtw89_warn(rtwdev, "failed to dump phycap map\n"); -+ goto out_free; -+ } -+ -+ ret = rtwdev->chip->ops->read_phycap(rtwdev, phycap_map); -+ if (ret) { -+ rtw89_warn(rtwdev, "failed to read phycap map\n"); -+ goto out_free; -+ } -+ -+out_free: -+ kfree(phycap_map); -+ -+ return ret; -+} -diff --git a/drivers/net/wireless/realtek/rtw89/efuse.h b/drivers/net/wireless/realtek/rtw89/efuse.h -new file mode 100644 -index 000000000000..622ff95e7476 ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/efuse.h -@@ -0,0 +1,13 @@ -+/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ -+/* Copyright(c) 2019-2020 Realtek Corporation -+ */ -+ -+#ifndef __RTW89_EFUSE_H__ -+#define __RTW89_EFUSE_H__ -+ -+#include "core.h" -+ -+int rtw89_parse_efuse_map(struct rtw89_dev *rtwdev); -+int rtw89_parse_phycap_map(struct rtw89_dev *rtwdev); -+ -+#endif -diff --git a/drivers/net/wireless/realtek/rtw89/fw.c b/drivers/net/wireless/realtek/rtw89/fw.c -new file mode 100644 -index 000000000000..212aaf577d3c ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/fw.c -@@ -0,0 +1,1641 @@ -+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause -+/* Copyright(c) 2019-2020 Realtek Corporation -+ */ -+ -+#include "cam.h" -+#include "coex.h" -+#include "debug.h" -+#include "fw.h" -+#include "mac.h" -+#include "phy.h" -+#include "reg.h" -+ -+static struct sk_buff *rtw89_fw_h2c_alloc_skb(u32 len, bool header) -+{ -+ struct sk_buff *skb; -+ u32 header_len = 0; -+ -+ if (header) -+ header_len = H2C_HEADER_LEN; -+ -+ skb = dev_alloc_skb(len + header_len + 24); -+ if (!skb) -+ return NULL; -+ skb_reserve(skb, header_len + 24); -+ memset(skb->data, 0, len); -+ -+ return skb; -+} -+ -+struct sk_buff *rtw89_fw_h2c_alloc_skb_with_hdr(u32 len) -+{ -+ return rtw89_fw_h2c_alloc_skb(len, true); -+} -+ -+struct sk_buff *rtw89_fw_h2c_alloc_skb_no_hdr(u32 len) -+{ -+ return rtw89_fw_h2c_alloc_skb(len, false); -+} -+ -+static u8 _fw_get_rdy(struct rtw89_dev *rtwdev) -+{ -+ u8 val = rtw89_read8(rtwdev, R_AX_WCPU_FW_CTRL); -+ -+ return FIELD_GET(B_AX_WCPU_FWDL_STS_MASK, val); -+} -+ -+#define FWDL_WAIT_CNT 400000 -+int rtw89_fw_check_rdy(struct rtw89_dev *rtwdev) -+{ -+ u8 val; -+ int ret; -+ -+ ret = read_poll_timeout_atomic(_fw_get_rdy, val, -+ val == RTW89_FWDL_WCPU_FW_INIT_RDY, -+ 1, FWDL_WAIT_CNT, false, rtwdev); -+ if (ret) { -+ switch (val) { -+ case RTW89_FWDL_CHECKSUM_FAIL: -+ rtw89_err(rtwdev, "fw checksum fail\n"); -+ return -EINVAL; -+ -+ case RTW89_FWDL_SECURITY_FAIL: -+ rtw89_err(rtwdev, "fw security fail\n"); -+ return -EINVAL; -+ -+ case RTW89_FWDL_CV_NOT_MATCH: -+ rtw89_err(rtwdev, "fw cv not match\n"); -+ return -EINVAL; -+ -+ default: -+ return -EBUSY; -+ } -+ } -+ -+ set_bit(RTW89_FLAG_FW_RDY, rtwdev->flags); -+ -+ return 0; -+} -+ -+static int rtw89_fw_hdr_parser(struct rtw89_dev *rtwdev, const u8 *fw, u32 len, -+ struct rtw89_fw_bin_info *info) -+{ -+ struct rtw89_fw_hdr_section_info *section_info; -+ const u8 *fw_end = fw + len; -+ const u8 *bin; -+ u32 i; -+ -+ if (!info) -+ return -EINVAL; -+ -+ info->section_num = GET_FW_HDR_SEC_NUM(fw); -+ info->hdr_len = RTW89_FW_HDR_SIZE + -+ info->section_num * RTW89_FW_SECTION_HDR_SIZE; -+ SET_FW_HDR_PART_SIZE(fw, FWDL_SECTION_PER_PKT_LEN); -+ -+ bin = fw + info->hdr_len; -+ -+ /* jump to section header */ -+ fw += RTW89_FW_HDR_SIZE; -+ section_info = info->section_info; -+ for (i = 0; i < info->section_num; i++) { -+ section_info->len = GET_FWSECTION_HDR_SEC_SIZE(fw); -+ if (GET_FWSECTION_HDR_CHECKSUM(fw)) -+ section_info->len += FWDL_SECTION_CHKSUM_LEN; -+ section_info->redl = GET_FWSECTION_HDR_REDL(fw); -+ section_info->dladdr = -+ GET_FWSECTION_HDR_DL_ADDR(fw) & 0x1fffffff; -+ section_info->addr = bin; -+ bin += section_info->len; -+ fw += RTW89_FW_SECTION_HDR_SIZE; -+ section_info++; -+ } -+ -+ if (fw_end != bin) { -+ rtw89_err(rtwdev, "[ERR]fw bin size\n"); -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+static -+int rtw89_mfw_recognize(struct rtw89_dev *rtwdev, enum rtw89_fw_type type, -+ struct rtw89_fw_suit *fw_suit) -+{ -+ struct rtw89_fw_info *fw_info = &rtwdev->fw; -+ const u8 *mfw = fw_info->firmware->data; -+ u32 mfw_len = fw_info->firmware->size; -+ const struct rtw89_mfw_hdr *mfw_hdr = (const struct rtw89_mfw_hdr *)mfw; -+ const struct rtw89_mfw_info *mfw_info; -+ int i; -+ -+ if (mfw_hdr->sig != RTW89_MFW_SIG) { -+ rtw89_debug(rtwdev, RTW89_DBG_FW, "use legacy firmware\n"); -+ /* legacy firmware support normal type only */ -+ if (type != RTW89_FW_NORMAL) -+ return -EINVAL; -+ fw_suit->data = mfw; -+ fw_suit->size = mfw_len; -+ return 0; -+ } -+ -+ for (i = 0; i < mfw_hdr->fw_nr; i++) { -+ mfw_info = &mfw_hdr->info[i]; -+ if (mfw_info->cv != rtwdev->hal.cv || -+ mfw_info->type != type || -+ mfw_info->mp) -+ continue; -+ -+ fw_suit->data = mfw + le32_to_cpu(mfw_info->shift); -+ fw_suit->size = le32_to_cpu(mfw_info->size); -+ return 0; -+ } -+ -+ rtw89_err(rtwdev, "no suitable firmware found\n"); -+ return -ENOENT; -+} -+ -+static void rtw89_fw_update_ver(struct rtw89_dev *rtwdev, -+ enum rtw89_fw_type type, -+ struct rtw89_fw_suit *fw_suit) -+{ -+ const u8 *hdr = fw_suit->data; -+ -+ fw_suit->major_ver = GET_FW_HDR_MAJOR_VERSION(hdr); -+ fw_suit->minor_ver = GET_FW_HDR_MINOR_VERSION(hdr); -+ fw_suit->sub_ver = GET_FW_HDR_SUBVERSION(hdr); -+ fw_suit->sub_idex = GET_FW_HDR_SUBINDEX(hdr); -+ fw_suit->build_year = GET_FW_HDR_YEAR(hdr); -+ fw_suit->build_mon = GET_FW_HDR_MONTH(hdr); -+ fw_suit->build_date = GET_FW_HDR_DATE(hdr); -+ fw_suit->build_hour = GET_FW_HDR_HOUR(hdr); -+ fw_suit->build_min = GET_FW_HDR_MIN(hdr); -+ fw_suit->cmd_ver = GET_FW_HDR_CMD_VERSERION(hdr); -+ -+ rtw89_info(rtwdev, -+ "Firmware version %u.%u.%u.%u, cmd version %u, type %u\n", -+ fw_suit->major_ver, fw_suit->minor_ver, fw_suit->sub_ver, -+ fw_suit->sub_idex, fw_suit->cmd_ver, type); -+} -+ -+static -+int __rtw89_fw_recognize(struct rtw89_dev *rtwdev, enum rtw89_fw_type type) -+{ -+ struct rtw89_fw_suit *fw_suit = rtw89_fw_suit_get(rtwdev, type); -+ int ret; -+ -+ ret = rtw89_mfw_recognize(rtwdev, type, fw_suit); -+ if (ret) -+ return ret; -+ -+ rtw89_fw_update_ver(rtwdev, type, fw_suit); -+ -+ return 0; -+} -+ -+static void rtw89_fw_recognize_features(struct rtw89_dev *rtwdev) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ struct rtw89_fw_suit *fw_suit = rtw89_fw_suit_get(rtwdev, RTW89_FW_NORMAL); -+ -+ if (chip->chip_id == RTL8852A && -+ RTW89_FW_SUIT_VER_CODE(fw_suit) <= RTW89_FW_VER_CODE(0, 13, 29, 0)) -+ rtwdev->fw.old_ht_ra_format = true; -+} -+ -+int rtw89_fw_recognize(struct rtw89_dev *rtwdev) -+{ -+ int ret; -+ -+ ret = __rtw89_fw_recognize(rtwdev, RTW89_FW_NORMAL); -+ if (ret) -+ return ret; -+ -+ /* It still works if wowlan firmware isn't existing. */ -+ __rtw89_fw_recognize(rtwdev, RTW89_FW_WOWLAN); -+ -+ rtw89_fw_recognize_features(rtwdev); -+ -+ return 0; -+} -+ -+void rtw89_h2c_pkt_set_hdr(struct rtw89_dev *rtwdev, struct sk_buff *skb, -+ u8 type, u8 cat, u8 class, u8 func, -+ bool rack, bool dack, u32 len) -+{ -+ struct fwcmd_hdr *hdr; -+ -+ hdr = (struct fwcmd_hdr *)skb_push(skb, 8); -+ -+ if (!(rtwdev->fw.h2c_seq % 4)) -+ rack = true; -+ hdr->hdr0 = cpu_to_le32(FIELD_PREP(H2C_HDR_DEL_TYPE, type) | -+ FIELD_PREP(H2C_HDR_CAT, cat) | -+ FIELD_PREP(H2C_HDR_CLASS, class) | -+ FIELD_PREP(H2C_HDR_FUNC, func) | -+ FIELD_PREP(H2C_HDR_H2C_SEQ, rtwdev->fw.h2c_seq)); -+ -+ hdr->hdr1 = cpu_to_le32(FIELD_PREP(H2C_HDR_TOTAL_LEN, -+ len + H2C_HEADER_LEN) | -+ (rack ? H2C_HDR_REC_ACK : 0) | -+ (dack ? H2C_HDR_DONE_ACK : 0)); -+ -+ rtwdev->fw.h2c_seq++; -+} -+ -+static void rtw89_h2c_pkt_set_hdr_fwdl(struct rtw89_dev *rtwdev, -+ struct sk_buff *skb, -+ u8 type, u8 cat, u8 class, u8 func, -+ u32 len) -+{ -+ struct fwcmd_hdr *hdr; -+ -+ hdr = (struct fwcmd_hdr *)skb_push(skb, 8); -+ -+ hdr->hdr0 = cpu_to_le32(FIELD_PREP(H2C_HDR_DEL_TYPE, type) | -+ FIELD_PREP(H2C_HDR_CAT, cat) | -+ FIELD_PREP(H2C_HDR_CLASS, class) | -+ FIELD_PREP(H2C_HDR_FUNC, func) | -+ FIELD_PREP(H2C_HDR_H2C_SEQ, rtwdev->fw.h2c_seq)); -+ -+ hdr->hdr1 = cpu_to_le32(FIELD_PREP(H2C_HDR_TOTAL_LEN, -+ len + H2C_HEADER_LEN)); -+} -+ -+static int __rtw89_fw_download_hdr(struct rtw89_dev *rtwdev, const u8 *fw, u32 len) -+{ -+ struct sk_buff *skb; -+ u32 ret = 0; -+ -+ skb = rtw89_fw_h2c_alloc_skb_with_hdr(len); -+ if (!skb) { -+ rtw89_err(rtwdev, "failed to alloc skb for fw hdr dl\n"); -+ return -ENOMEM; -+ } -+ -+ skb_put_data(skb, fw, len); -+ rtw89_h2c_pkt_set_hdr_fwdl(rtwdev, skb, FWCMD_TYPE_H2C, -+ H2C_CAT_MAC, H2C_CL_MAC_FWDL, -+ H2C_FUNC_MAC_FWHDR_DL, len); -+ -+ ret = rtw89_h2c_tx(rtwdev, skb, false); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to send h2c\n"); -+ ret = -1; -+ goto fail; -+ } -+ -+ return 0; -+fail: -+ dev_kfree_skb_any(skb); -+ -+ return ret; -+} -+ -+static int rtw89_fw_download_hdr(struct rtw89_dev *rtwdev, const u8 *fw, u32 len) -+{ -+ u8 val; -+ int ret; -+ -+ ret = __rtw89_fw_download_hdr(rtwdev, fw, len); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR]FW header download\n"); -+ return ret; -+ } -+ -+ ret = read_poll_timeout_atomic(rtw89_read8, val, val & B_AX_FWDL_PATH_RDY, -+ 1, FWDL_WAIT_CNT, false, -+ rtwdev, R_AX_WCPU_FW_CTRL); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR]FWDL path ready\n"); -+ return ret; -+ } -+ -+ rtw89_write32(rtwdev, R_AX_HALT_H2C_CTRL, 0); -+ rtw89_write32(rtwdev, R_AX_HALT_C2H_CTRL, 0); -+ -+ return 0; -+} -+ -+static int __rtw89_fw_download_main(struct rtw89_dev *rtwdev, -+ struct rtw89_fw_hdr_section_info *info) -+{ -+ struct sk_buff *skb; -+ const u8 *section = info->addr; -+ u32 residue_len = info->len; -+ u32 pkt_len; -+ int ret; -+ -+ while (residue_len) { -+ if (residue_len >= FWDL_SECTION_PER_PKT_LEN) -+ pkt_len = FWDL_SECTION_PER_PKT_LEN; -+ else -+ pkt_len = residue_len; -+ -+ skb = rtw89_fw_h2c_alloc_skb_no_hdr(pkt_len); -+ if (!skb) { -+ rtw89_err(rtwdev, "failed to alloc skb for fw dl\n"); -+ return -ENOMEM; -+ } -+ skb_put_data(skb, section, pkt_len); -+ -+ ret = rtw89_h2c_tx(rtwdev, skb, true); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to send h2c\n"); -+ ret = -1; -+ goto fail; -+ } -+ -+ section += pkt_len; -+ residue_len -= pkt_len; -+ } -+ -+ return 0; -+fail: -+ dev_kfree_skb_any(skb); -+ -+ return ret; -+} -+ -+static int rtw89_fw_download_main(struct rtw89_dev *rtwdev, const u8 *fw, -+ struct rtw89_fw_bin_info *info) -+{ -+ struct rtw89_fw_hdr_section_info *section_info = info->section_info; -+ u8 section_num = info->section_num; -+ int ret; -+ -+ while (section_num--) { -+ ret = __rtw89_fw_download_main(rtwdev, section_info); -+ if (ret) -+ return ret; -+ section_info++; -+ } -+ -+ mdelay(5); -+ -+ ret = rtw89_fw_check_rdy(rtwdev); -+ if (ret) { -+ rtw89_warn(rtwdev, "download firmware fail\n"); -+ return ret; -+ } -+ -+ return 0; -+} -+ -+static void rtw89_fw_prog_cnt_dump(struct rtw89_dev *rtwdev) -+{ -+ u32 val32; -+ u16 index; -+ -+ rtw89_write32(rtwdev, R_AX_DBG_CTRL, -+ FIELD_PREP(B_AX_DBG_SEL0, FW_PROG_CNTR_DBG_SEL) | -+ FIELD_PREP(B_AX_DBG_SEL1, FW_PROG_CNTR_DBG_SEL)); -+ rtw89_write32_mask(rtwdev, R_AX_SYS_STATUS1, B_AX_SEL_0XC0_MASK, MAC_DBG_SEL); -+ -+ for (index = 0; index < 15; index++) { -+ val32 = rtw89_read32(rtwdev, R_AX_DBG_PORT_SEL); -+ rtw89_err(rtwdev, "[ERR]fw PC = 0x%x\n", val32); -+ fsleep(10); -+ } -+} -+ -+static void rtw89_fw_dl_fail_dump(struct rtw89_dev *rtwdev) -+{ -+ u32 val32; -+ u16 val16; -+ -+ val32 = rtw89_read32(rtwdev, R_AX_WCPU_FW_CTRL); -+ rtw89_err(rtwdev, "[ERR]fwdl 0x1E0 = 0x%x\n", val32); -+ -+ val16 = rtw89_read16(rtwdev, R_AX_BOOT_DBG + 2); -+ rtw89_err(rtwdev, "[ERR]fwdl 0x83F2 = 0x%x\n", val16); -+ -+ rtw89_fw_prog_cnt_dump(rtwdev); -+} -+ -+int rtw89_fw_download(struct rtw89_dev *rtwdev, enum rtw89_fw_type type) -+{ -+ struct rtw89_fw_info *fw_info = &rtwdev->fw; -+ struct rtw89_fw_suit *fw_suit = rtw89_fw_suit_get(rtwdev, type); -+ struct rtw89_fw_bin_info info; -+ const u8 *fw = fw_suit->data; -+ u32 len = fw_suit->size; -+ u8 val; -+ int ret; -+ -+ if (!fw || !len) { -+ rtw89_err(rtwdev, "fw type %d isn't recognized\n", type); -+ return -ENOENT; -+ } -+ -+ ret = rtw89_fw_hdr_parser(rtwdev, fw, len, &info); -+ if (ret) { -+ rtw89_err(rtwdev, "parse fw header fail\n"); -+ goto fwdl_err; -+ } -+ -+ ret = read_poll_timeout_atomic(rtw89_read8, val, val & B_AX_H2C_PATH_RDY, -+ 1, FWDL_WAIT_CNT, false, -+ rtwdev, R_AX_WCPU_FW_CTRL); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR]H2C path ready\n"); -+ goto fwdl_err; -+ } -+ -+ ret = rtw89_fw_download_hdr(rtwdev, fw, info.hdr_len); -+ if (ret) { -+ ret = -EBUSY; -+ goto fwdl_err; -+ } -+ -+ ret = rtw89_fw_download_main(rtwdev, fw, &info); -+ if (ret) { -+ ret = -EBUSY; -+ goto fwdl_err; -+ } -+ -+ fw_info->h2c_seq = 0; -+ fw_info->rec_seq = 0; -+ rtwdev->mac.rpwm_seq_num = RPWM_SEQ_NUM_MAX; -+ rtwdev->mac.cpwm_seq_num = CPWM_SEQ_NUM_MAX; -+ -+ return ret; -+ -+fwdl_err: -+ rtw89_fw_dl_fail_dump(rtwdev); -+ return ret; -+} -+ -+int rtw89_wait_firmware_completion(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_fw_info *fw = &rtwdev->fw; -+ -+ wait_for_completion(&fw->completion); -+ if (!fw->firmware) -+ return -EINVAL; -+ -+ return 0; -+} -+ -+static void rtw89_load_firmware_cb(const struct firmware *firmware, void *context) -+{ -+ struct rtw89_fw_info *fw = context; -+ struct rtw89_dev *rtwdev = fw->rtwdev; -+ -+ if (!firmware || !firmware->data) { -+ rtw89_err(rtwdev, "failed to request firmware\n"); -+ complete_all(&fw->completion); -+ return; -+ } -+ -+ fw->firmware = firmware; -+ complete_all(&fw->completion); -+} -+ -+int rtw89_load_firmware(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_fw_info *fw = &rtwdev->fw; -+ const char *fw_name = rtwdev->chip->fw_name; -+ int ret; -+ -+ fw->rtwdev = rtwdev; -+ init_completion(&fw->completion); -+ -+ ret = request_firmware_nowait(THIS_MODULE, true, fw_name, rtwdev->dev, -+ GFP_KERNEL, fw, rtw89_load_firmware_cb); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to async firmware request\n"); -+ return ret; -+ } -+ -+ return 0; -+} -+ -+void rtw89_unload_firmware(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_fw_info *fw = &rtwdev->fw; -+ -+ rtw89_wait_firmware_completion(rtwdev); -+ -+ if (fw->firmware) -+ release_firmware(fw->firmware); -+} -+ -+#define H2C_CAM_LEN 60 -+int rtw89_fw_h2c_cam(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif) -+{ -+ struct sk_buff *skb; -+ -+ skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_CAM_LEN); -+ if (!skb) { -+ rtw89_err(rtwdev, "failed to alloc skb for fw dl\n"); -+ return -ENOMEM; -+ } -+ skb_put(skb, H2C_CAM_LEN); -+ rtw89_cam_fill_addr_cam_info(rtwdev, rtwvif, skb->data); -+ rtw89_cam_fill_bssid_cam_info(rtwdev, rtwvif, skb->data); -+ -+ rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, -+ H2C_CAT_MAC, -+ H2C_CL_MAC_ADDR_CAM_UPDATE, -+ H2C_FUNC_MAC_ADDR_CAM_UPD, 0, 1, -+ H2C_CAM_LEN); -+ -+ if (rtw89_h2c_tx(rtwdev, skb, false)) { -+ rtw89_err(rtwdev, "failed to send h2c\n"); -+ goto fail; -+ } -+ -+ return 0; -+fail: -+ dev_kfree_skb_any(skb); -+ -+ return -EBUSY; -+} -+ -+#define H2C_BA_CAM_LEN 4 -+int rtw89_fw_h2c_ba_cam(struct rtw89_dev *rtwdev, bool valid, u8 macid, -+ struct ieee80211_ampdu_params *params) -+{ -+ struct sk_buff *skb; -+ -+ skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_BA_CAM_LEN); -+ if (!skb) { -+ rtw89_err(rtwdev, "failed to alloc skb for h2c ba cam\n"); -+ return -ENOMEM; -+ } -+ skb_put(skb, H2C_BA_CAM_LEN); -+ SET_BA_CAM_MACID(skb->data, macid); -+ if (!valid) -+ goto end; -+ SET_BA_CAM_VALID(skb->data, valid); -+ SET_BA_CAM_TID(skb->data, params->tid); -+ if (params->buf_size > 64) -+ SET_BA_CAM_BMAP_SIZE(skb->data, 4); -+ else -+ SET_BA_CAM_BMAP_SIZE(skb->data, 0); -+ /* If init req is set, hw will set the ssn */ -+ SET_BA_CAM_INIT_REQ(skb->data, 0); -+ SET_BA_CAM_SSN(skb->data, params->ssn); -+ -+end: -+ rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, -+ H2C_CAT_MAC, -+ H2C_CL_BA_CAM, -+ H2C_FUNC_MAC_BA_CAM, 0, 1, -+ H2C_BA_CAM_LEN); -+ -+ if (rtw89_h2c_tx(rtwdev, skb, false)) { -+ rtw89_err(rtwdev, "failed to send h2c\n"); -+ goto fail; -+ } -+ -+ return 0; -+fail: -+ dev_kfree_skb_any(skb); -+ -+ return -EBUSY; -+} -+ -+#define H2C_LOG_CFG_LEN 12 -+int rtw89_fw_h2c_fw_log(struct rtw89_dev *rtwdev, bool enable) -+{ -+ struct sk_buff *skb; -+ u32 comp = enable ? BIT(RTW89_FW_LOG_COMP_INIT) | BIT(RTW89_FW_LOG_COMP_TASK) | -+ BIT(RTW89_FW_LOG_COMP_PS) | BIT(RTW89_FW_LOG_COMP_ERROR) : 0; -+ -+ skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_LOG_CFG_LEN); -+ if (!skb) { -+ rtw89_err(rtwdev, "failed to alloc skb for fw log cfg\n"); -+ return -ENOMEM; -+ } -+ -+ skb_put(skb, H2C_LOG_CFG_LEN); -+ SET_LOG_CFG_LEVEL(skb->data, RTW89_FW_LOG_LEVEL_SER); -+ SET_LOG_CFG_PATH(skb->data, BIT(RTW89_FW_LOG_LEVEL_C2H)); -+ SET_LOG_CFG_COMP(skb->data, comp); -+ SET_LOG_CFG_COMP_EXT(skb->data, 0); -+ -+ rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, -+ H2C_CAT_MAC, -+ H2C_CL_FW_INFO, -+ H2C_FUNC_LOG_CFG, 0, 0, -+ H2C_LOG_CFG_LEN); -+ -+ if (rtw89_h2c_tx(rtwdev, skb, false)) { -+ rtw89_err(rtwdev, "failed to send h2c\n"); -+ goto fail; -+ } -+ -+ return 0; -+fail: -+ dev_kfree_skb_any(skb); -+ -+ return -EBUSY; -+} -+ -+#define H2C_GENERAL_PKT_LEN 6 -+#define H2C_GENERAL_PKT_ID_UND 0xff -+int rtw89_fw_h2c_general_pkt(struct rtw89_dev *rtwdev, u8 macid) -+{ -+ struct sk_buff *skb; -+ -+ skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_GENERAL_PKT_LEN); -+ if (!skb) { -+ rtw89_err(rtwdev, "failed to alloc skb for fw dl\n"); -+ return -ENOMEM; -+ } -+ skb_put(skb, H2C_GENERAL_PKT_LEN); -+ SET_GENERAL_PKT_MACID(skb->data, macid); -+ SET_GENERAL_PKT_PROBRSP_ID(skb->data, H2C_GENERAL_PKT_ID_UND); -+ SET_GENERAL_PKT_PSPOLL_ID(skb->data, H2C_GENERAL_PKT_ID_UND); -+ SET_GENERAL_PKT_NULL_ID(skb->data, H2C_GENERAL_PKT_ID_UND); -+ SET_GENERAL_PKT_QOS_NULL_ID(skb->data, H2C_GENERAL_PKT_ID_UND); -+ SET_GENERAL_PKT_CTS2SELF_ID(skb->data, H2C_GENERAL_PKT_ID_UND); -+ -+ rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, -+ H2C_CAT_MAC, -+ H2C_CL_FW_INFO, -+ H2C_FUNC_MAC_GENERAL_PKT, 0, 1, -+ H2C_GENERAL_PKT_LEN); -+ -+ if (rtw89_h2c_tx(rtwdev, skb, false)) { -+ rtw89_err(rtwdev, "failed to send h2c\n"); -+ goto fail; -+ } -+ -+ return 0; -+fail: -+ dev_kfree_skb_any(skb); -+ -+ return -EBUSY; -+} -+ -+#define H2C_LPS_PARM_LEN 8 -+int rtw89_fw_h2c_lps_parm(struct rtw89_dev *rtwdev, -+ struct rtw89_lps_parm *lps_param) -+{ -+ struct sk_buff *skb; -+ -+ skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_LPS_PARM_LEN); -+ if (!skb) { -+ rtw89_err(rtwdev, "failed to alloc skb for fw dl\n"); -+ return -ENOMEM; -+ } -+ skb_put(skb, H2C_LPS_PARM_LEN); -+ -+ SET_LPS_PARM_MACID(skb->data, lps_param->macid); -+ SET_LPS_PARM_PSMODE(skb->data, lps_param->psmode); -+ SET_LPS_PARM_LASTRPWM(skb->data, lps_param->lastrpwm); -+ SET_LPS_PARM_RLBM(skb->data, 1); -+ SET_LPS_PARM_SMARTPS(skb->data, 1); -+ SET_LPS_PARM_AWAKEINTERVAL(skb->data, 1); -+ SET_LPS_PARM_VOUAPSD(skb->data, 0); -+ SET_LPS_PARM_VIUAPSD(skb->data, 0); -+ SET_LPS_PARM_BEUAPSD(skb->data, 0); -+ SET_LPS_PARM_BKUAPSD(skb->data, 0); -+ -+ rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, -+ H2C_CAT_MAC, -+ H2C_CL_MAC_PS, -+ H2C_FUNC_MAC_LPS_PARM, 0, 1, -+ H2C_LPS_PARM_LEN); -+ -+ if (rtw89_h2c_tx(rtwdev, skb, false)) { -+ rtw89_err(rtwdev, "failed to send h2c\n"); -+ goto fail; -+ } -+ -+ return 0; -+fail: -+ dev_kfree_skb_any(skb); -+ -+ return -EBUSY; -+} -+ -+#define H2C_CMC_TBL_LEN 68 -+int rtw89_fw_h2c_default_cmac_tbl(struct rtw89_dev *rtwdev, u8 macid) -+{ -+ struct rtw89_hal *hal = &rtwdev->hal; -+ struct sk_buff *skb; -+ u8 ntx_path = hal->antenna_tx ? hal->antenna_tx : RF_B; -+ u8 map_b = hal->antenna_tx == RF_AB ? 1 : 0; -+ -+ skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_CMC_TBL_LEN); -+ if (!skb) { -+ rtw89_err(rtwdev, "failed to alloc skb for fw dl\n"); -+ return -ENOMEM; -+ } -+ skb_put(skb, H2C_CMC_TBL_LEN); -+ SET_CTRL_INFO_MACID(skb->data, macid); -+ SET_CTRL_INFO_OPERATION(skb->data, 1); -+ SET_CMC_TBL_TXPWR_MODE(skb->data, 0); -+ SET_CMC_TBL_NTX_PATH_EN(skb->data, ntx_path); -+ SET_CMC_TBL_PATH_MAP_A(skb->data, 0); -+ SET_CMC_TBL_PATH_MAP_B(skb->data, map_b); -+ SET_CMC_TBL_PATH_MAP_C(skb->data, 0); -+ SET_CMC_TBL_PATH_MAP_D(skb->data, 0); -+ SET_CMC_TBL_ANTSEL_A(skb->data, 0); -+ SET_CMC_TBL_ANTSEL_B(skb->data, 0); -+ SET_CMC_TBL_ANTSEL_C(skb->data, 0); -+ SET_CMC_TBL_ANTSEL_D(skb->data, 0); -+ SET_CMC_TBL_DOPPLER_CTRL(skb->data, 0); -+ SET_CMC_TBL_TXPWR_TOLERENCE(skb->data, 0); -+ -+ rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, -+ H2C_CAT_MAC, H2C_CL_MAC_FR_EXCHG, -+ H2C_FUNC_MAC_CCTLINFO_UD, 0, 1, -+ H2C_CMC_TBL_LEN); -+ -+ if (rtw89_h2c_tx(rtwdev, skb, false)) { -+ rtw89_err(rtwdev, "failed to send h2c\n"); -+ goto fail; -+ } -+ -+ return 0; -+fail: -+ dev_kfree_skb_any(skb); -+ -+ return -EBUSY; -+} -+ -+static void __get_sta_he_pkt_padding(struct rtw89_dev *rtwdev, -+ struct ieee80211_sta *sta, u8 *pads) -+{ -+ bool ppe_th; -+ u8 ppe16, ppe8; -+ u8 nss = min(sta->rx_nss, rtwdev->hal.tx_nss) - 1; -+ u8 ppe_thres_hdr = sta->he_cap.ppe_thres[0]; -+ u8 ru_bitmap; -+ u8 n, idx, sh; -+ u16 ppe; -+ int i; -+ -+ if (!sta->he_cap.has_he) -+ return; -+ -+ ppe_th = FIELD_GET(IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT, -+ sta->he_cap.he_cap_elem.phy_cap_info[6]); -+ if (!ppe_th) { -+ u8 pad; -+ -+ pad = FIELD_GET(IEEE80211_HE_PHY_CAP9_NOMIMAL_PKT_PADDING_MASK, -+ sta->he_cap.he_cap_elem.phy_cap_info[9]); -+ -+ for (i = 0; i < RTW89_PPE_BW_NUM; i++) -+ pads[i] = pad; -+ } -+ -+ ru_bitmap = FIELD_GET(IEEE80211_PPE_THRES_RU_INDEX_BITMASK_MASK, ppe_thres_hdr); -+ n = hweight8(ru_bitmap); -+ n = 7 + (n * IEEE80211_PPE_THRES_INFO_PPET_SIZE * 2) * nss; -+ -+ for (i = 0; i < RTW89_PPE_BW_NUM; i++) { -+ if (!(ru_bitmap & BIT(i))) { -+ pads[i] = 1; -+ continue; -+ } -+ -+ idx = n >> 3; -+ sh = n & 7; -+ n += IEEE80211_PPE_THRES_INFO_PPET_SIZE * 2; -+ -+ ppe = le16_to_cpu(*((__le16 *)&sta->he_cap.ppe_thres[idx])); -+ ppe16 = (ppe >> sh) & IEEE80211_PPE_THRES_NSS_MASK; -+ sh += IEEE80211_PPE_THRES_INFO_PPET_SIZE; -+ ppe8 = (ppe >> sh) & IEEE80211_PPE_THRES_NSS_MASK; -+ -+ if (ppe16 != 7 && ppe8 == 7) -+ pads[i] = 2; -+ else if (ppe8 != 7) -+ pads[i] = 1; -+ else -+ pads[i] = 0; -+ } -+} -+ -+int rtw89_fw_h2c_assoc_cmac_tbl(struct rtw89_dev *rtwdev, -+ struct ieee80211_vif *vif, -+ struct ieee80211_sta *sta) -+{ -+ struct rtw89_hal *hal = &rtwdev->hal; -+ struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; -+ struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; -+ struct sk_buff *skb; -+ u8 pads[RTW89_PPE_BW_NUM]; -+ -+ memset(pads, 0, sizeof(pads)); -+ __get_sta_he_pkt_padding(rtwdev, sta, pads); -+ -+ skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_CMC_TBL_LEN); -+ if (!skb) { -+ rtw89_err(rtwdev, "failed to alloc skb for fw dl\n"); -+ return -ENOMEM; -+ } -+ skb_put(skb, H2C_CMC_TBL_LEN); -+ SET_CTRL_INFO_MACID(skb->data, rtwsta->mac_id); -+ SET_CTRL_INFO_OPERATION(skb->data, 1); -+ SET_CMC_TBL_DISRTSFB(skb->data, 1); -+ SET_CMC_TBL_DISDATAFB(skb->data, 1); -+ if (hal->current_band_type == RTW89_BAND_2G) -+ SET_CMC_TBL_RTS_RTY_LOWEST_RATE(skb->data, RTW89_HW_RATE_CCK1); -+ else -+ SET_CMC_TBL_RTS_RTY_LOWEST_RATE(skb->data, RTW89_HW_RATE_OFDM6); -+ SET_CMC_TBL_RTS_TXCNT_LMT_SEL(skb->data, 0); -+ SET_CMC_TBL_DATA_TXCNT_LMT_SEL(skb->data, 0); -+ if (vif->type == NL80211_IFTYPE_STATION) -+ SET_CMC_TBL_ULDL(skb->data, 1); -+ else -+ SET_CMC_TBL_ULDL(skb->data, 0); -+ SET_CMC_TBL_MULTI_PORT_ID(skb->data, rtwvif->port); -+ SET_CMC_TBL_NOMINAL_PKT_PADDING(skb->data, pads[RTW89_CHANNEL_WIDTH_20]); -+ SET_CMC_TBL_NOMINAL_PKT_PADDING40(skb->data, pads[RTW89_CHANNEL_WIDTH_40]); -+ SET_CMC_TBL_NOMINAL_PKT_PADDING80(skb->data, pads[RTW89_CHANNEL_WIDTH_80]); -+ SET_CMC_TBL_BSR_QUEUE_SIZE_FORMAT(skb->data, sta->he_cap.has_he); -+ -+ rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, -+ H2C_CAT_MAC, H2C_CL_MAC_FR_EXCHG, -+ H2C_FUNC_MAC_CCTLINFO_UD, 0, 1, -+ H2C_CMC_TBL_LEN); -+ -+ if (rtw89_h2c_tx(rtwdev, skb, false)) { -+ rtw89_err(rtwdev, "failed to send h2c\n"); -+ goto fail; -+ } -+ -+ return 0; -+fail: -+ dev_kfree_skb_any(skb); -+ -+ return -EBUSY; -+} -+ -+int rtw89_fw_h2c_txtime_cmac_tbl(struct rtw89_dev *rtwdev, -+ struct rtw89_sta *rtwsta) -+{ -+ struct sk_buff *skb; -+ -+ skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_CMC_TBL_LEN); -+ if (!skb) { -+ rtw89_err(rtwdev, "failed to alloc skb for fw dl\n"); -+ return -ENOMEM; -+ } -+ skb_put(skb, H2C_CMC_TBL_LEN); -+ SET_CTRL_INFO_MACID(skb->data, rtwsta->mac_id); -+ SET_CTRL_INFO_OPERATION(skb->data, 1); -+ if (rtwsta->cctl_tx_time) { -+ SET_CMC_TBL_AMPDU_TIME_SEL(skb->data, 1); -+ SET_CMC_TBL_AMPDU_MAX_TIME(skb->data, rtwsta->ampdu_max_time); -+ } -+ if (rtwsta->cctl_tx_retry_limit) { -+ SET_CMC_TBL_DATA_TXCNT_LMT_SEL(skb->data, 1); -+ SET_CMC_TBL_DATA_TX_CNT_LMT(skb->data, rtwsta->data_tx_cnt_lmt); -+ } -+ -+ rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, -+ H2C_CAT_MAC, H2C_CL_MAC_FR_EXCHG, -+ H2C_FUNC_MAC_CCTLINFO_UD, 0, 1, -+ H2C_CMC_TBL_LEN); -+ -+ if (rtw89_h2c_tx(rtwdev, skb, false)) { -+ rtw89_err(rtwdev, "failed to send h2c\n"); -+ goto fail; -+ } -+ -+ return 0; -+fail: -+ dev_kfree_skb_any(skb); -+ -+ return -EBUSY; -+} -+ -+#define H2C_VIF_MAINTAIN_LEN 4 -+int rtw89_fw_h2c_vif_maintain(struct rtw89_dev *rtwdev, -+ struct rtw89_vif *rtwvif, -+ enum rtw89_upd_mode upd_mode) -+{ -+ struct sk_buff *skb; -+ -+ skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_VIF_MAINTAIN_LEN); -+ if (!skb) { -+ rtw89_err(rtwdev, "failed to alloc skb for h2c join\n"); -+ return -ENOMEM; -+ } -+ skb_put(skb, H2C_VIF_MAINTAIN_LEN); -+ SET_FWROLE_MAINTAIN_MACID(skb->data, rtwvif->mac_id); -+ SET_FWROLE_MAINTAIN_SELF_ROLE(skb->data, rtwvif->self_role); -+ SET_FWROLE_MAINTAIN_UPD_MODE(skb->data, upd_mode); -+ SET_FWROLE_MAINTAIN_WIFI_ROLE(skb->data, rtwvif->wifi_role); -+ -+ rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, -+ H2C_CAT_MAC, H2C_CL_MAC_MEDIA_RPT, -+ H2C_FUNC_MAC_FWROLE_MAINTAIN, 0, 1, -+ H2C_VIF_MAINTAIN_LEN); -+ -+ if (rtw89_h2c_tx(rtwdev, skb, false)) { -+ rtw89_err(rtwdev, "failed to send h2c\n"); -+ goto fail; -+ } -+ -+ return 0; -+fail: -+ dev_kfree_skb_any(skb); -+ -+ return -EBUSY; -+} -+ -+#define H2C_JOIN_INFO_LEN 4 -+int rtw89_fw_h2c_join_info(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif, -+ u8 dis_conn) -+{ -+ struct sk_buff *skb; -+ -+ skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_JOIN_INFO_LEN); -+ if (!skb) { -+ rtw89_err(rtwdev, "failed to alloc skb for h2c join\n"); -+ return -ENOMEM; -+ } -+ skb_put(skb, H2C_JOIN_INFO_LEN); -+ SET_JOININFO_MACID(skb->data, rtwvif->mac_id); -+ SET_JOININFO_OP(skb->data, dis_conn); -+ SET_JOININFO_BAND(skb->data, rtwvif->mac_idx); -+ SET_JOININFO_WMM(skb->data, rtwvif->wmm); -+ SET_JOININFO_TGR(skb->data, rtwvif->trigger); -+ SET_JOININFO_ISHESTA(skb->data, 0); -+ SET_JOININFO_DLBW(skb->data, 0); -+ SET_JOININFO_TF_MAC_PAD(skb->data, 0); -+ SET_JOININFO_DL_T_PE(skb->data, 0); -+ SET_JOININFO_PORT_ID(skb->data, rtwvif->port); -+ SET_JOININFO_NET_TYPE(skb->data, rtwvif->net_type); -+ SET_JOININFO_WIFI_ROLE(skb->data, rtwvif->wifi_role); -+ SET_JOININFO_SELF_ROLE(skb->data, rtwvif->self_role); -+ -+ rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, -+ H2C_CAT_MAC, H2C_CL_MAC_MEDIA_RPT, -+ H2C_FUNC_MAC_JOININFO, 0, 1, -+ H2C_JOIN_INFO_LEN); -+ -+ if (rtw89_h2c_tx(rtwdev, skb, false)) { -+ rtw89_err(rtwdev, "failed to send h2c\n"); -+ goto fail; -+ } -+ -+ return 0; -+fail: -+ dev_kfree_skb_any(skb); -+ -+ return -EBUSY; -+} -+ -+int rtw89_fw_h2c_macid_pause(struct rtw89_dev *rtwdev, u8 sh, u8 grp, -+ bool pause) -+{ -+ struct rtw89_fw_macid_pause_grp h2c = {{0}}; -+ u8 len = sizeof(struct rtw89_fw_macid_pause_grp); -+ struct sk_buff *skb; -+ -+ skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_JOIN_INFO_LEN); -+ if (!skb) { -+ rtw89_err(rtwdev, "failed to alloc skb for h2c join\n"); -+ return -ENOMEM; -+ } -+ h2c.mask_grp[grp] = cpu_to_le32(BIT(sh)); -+ if (pause) -+ h2c.pause_grp[grp] = cpu_to_le32(BIT(sh)); -+ skb_put_data(skb, &h2c, len); -+ -+ rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, -+ H2C_CAT_MAC, H2C_CL_MAC_FW_OFLD, -+ H2C_FUNC_MAC_MACID_PAUSE, 1, 0, -+ len); -+ -+ if (rtw89_h2c_tx(rtwdev, skb, false)) { -+ rtw89_err(rtwdev, "failed to send h2c\n"); -+ goto fail; -+ } -+ -+ return 0; -+fail: -+ dev_kfree_skb_any(skb); -+ -+ return -EBUSY; -+} -+ -+#define H2C_EDCA_LEN 12 -+int rtw89_fw_h2c_set_edca(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif, -+ u8 ac, u32 val) -+{ -+ struct sk_buff *skb; -+ -+ skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_EDCA_LEN); -+ if (!skb) { -+ rtw89_err(rtwdev, "failed to alloc skb for h2c edca\n"); -+ return -ENOMEM; -+ } -+ skb_put(skb, H2C_EDCA_LEN); -+ RTW89_SET_EDCA_SEL(skb->data, 0); -+ RTW89_SET_EDCA_BAND(skb->data, rtwvif->mac_idx); -+ RTW89_SET_EDCA_WMM(skb->data, 0); -+ RTW89_SET_EDCA_AC(skb->data, ac); -+ RTW89_SET_EDCA_PARAM(skb->data, val); -+ -+ rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, -+ H2C_CAT_MAC, H2C_CL_MAC_FW_OFLD, -+ H2C_FUNC_USR_EDCA, 0, 1, -+ H2C_EDCA_LEN); -+ -+ if (rtw89_h2c_tx(rtwdev, skb, false)) { -+ rtw89_err(rtwdev, "failed to send h2c\n"); -+ goto fail; -+ } -+ -+ return 0; -+fail: -+ dev_kfree_skb_any(skb); -+ -+ return -EBUSY; -+} -+ -+#define H2C_OFLD_CFG_LEN 8 -+int rtw89_fw_h2c_set_ofld_cfg(struct rtw89_dev *rtwdev) -+{ -+ static const u8 cfg[] = {0x09, 0x00, 0x00, 0x00, 0x5e, 0x00, 0x00, 0x00}; -+ struct sk_buff *skb; -+ -+ skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_OFLD_CFG_LEN); -+ if (!skb) { -+ rtw89_err(rtwdev, "failed to alloc skb for h2c ofld\n"); -+ return -ENOMEM; -+ } -+ skb_put_data(skb, cfg, H2C_OFLD_CFG_LEN); -+ -+ rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, -+ H2C_CAT_MAC, H2C_CL_MAC_FW_OFLD, -+ H2C_FUNC_OFLD_CFG, 0, 1, -+ H2C_OFLD_CFG_LEN); -+ -+ if (rtw89_h2c_tx(rtwdev, skb, false)) { -+ rtw89_err(rtwdev, "failed to send h2c\n"); -+ goto fail; -+ } -+ -+ return 0; -+fail: -+ dev_kfree_skb_any(skb); -+ -+ return -EBUSY; -+} -+ -+#define H2C_RA_LEN 16 -+int rtw89_fw_h2c_ra(struct rtw89_dev *rtwdev, struct rtw89_ra_info *ra, bool csi) -+{ -+ struct sk_buff *skb; -+ u8 *cmd; -+ -+ skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_RA_LEN); -+ if (!skb) { -+ rtw89_err(rtwdev, "failed to alloc skb for h2c join\n"); -+ return -ENOMEM; -+ } -+ skb_put(skb, H2C_RA_LEN); -+ cmd = skb->data; -+ rtw89_debug(rtwdev, RTW89_DBG_RA, -+ "ra cmd msk: %llx ", ra->ra_mask); -+ -+ RTW89_SET_FWCMD_RA_MODE(cmd, ra->mode_ctrl); -+ RTW89_SET_FWCMD_RA_BW_CAP(cmd, ra->bw_cap); -+ RTW89_SET_FWCMD_RA_MACID(cmd, ra->macid); -+ RTW89_SET_FWCMD_RA_DCM(cmd, ra->dcm_cap); -+ RTW89_SET_FWCMD_RA_ER(cmd, ra->er_cap); -+ RTW89_SET_FWCMD_RA_INIT_RATE_LV(cmd, ra->init_rate_lv); -+ RTW89_SET_FWCMD_RA_UPD_ALL(cmd, ra->upd_all); -+ RTW89_SET_FWCMD_RA_SGI(cmd, ra->en_sgi); -+ RTW89_SET_FWCMD_RA_LDPC(cmd, ra->ldpc_cap); -+ RTW89_SET_FWCMD_RA_STBC(cmd, ra->stbc_cap); -+ RTW89_SET_FWCMD_RA_SS_NUM(cmd, ra->ss_num); -+ RTW89_SET_FWCMD_RA_GILTF(cmd, ra->giltf); -+ RTW89_SET_FWCMD_RA_UPD_BW_NSS_MASK(cmd, ra->upd_bw_nss_mask); -+ RTW89_SET_FWCMD_RA_UPD_MASK(cmd, ra->upd_mask); -+ RTW89_SET_FWCMD_RA_MASK_0(cmd, FIELD_GET(MASKBYTE0, ra->ra_mask)); -+ RTW89_SET_FWCMD_RA_MASK_1(cmd, FIELD_GET(MASKBYTE1, ra->ra_mask)); -+ RTW89_SET_FWCMD_RA_MASK_2(cmd, FIELD_GET(MASKBYTE2, ra->ra_mask)); -+ RTW89_SET_FWCMD_RA_MASK_3(cmd, FIELD_GET(MASKBYTE3, ra->ra_mask)); -+ RTW89_SET_FWCMD_RA_MASK_4(cmd, FIELD_GET(MASKBYTE4, ra->ra_mask)); -+ -+ if (csi) { -+ RTW89_SET_FWCMD_RA_BFEE_CSI_CTL(cmd, 1); -+ RTW89_SET_FWCMD_RA_BAND_NUM(cmd, ra->band_num); -+ RTW89_SET_FWCMD_RA_CR_TBL_SEL(cmd, ra->cr_tbl_sel); -+ RTW89_SET_FWCMD_RA_FIXED_CSI_RATE_EN(cmd, ra->fixed_csi_rate_en); -+ RTW89_SET_FWCMD_RA_RA_CSI_RATE_EN(cmd, ra->ra_csi_rate_en); -+ RTW89_SET_FWCMD_RA_FIXED_CSI_MCS_SS_IDX(cmd, ra->csi_mcs_ss_idx); -+ RTW89_SET_FWCMD_RA_FIXED_CSI_MODE(cmd, ra->csi_mode); -+ RTW89_SET_FWCMD_RA_FIXED_CSI_GI_LTF(cmd, ra->csi_gi_ltf); -+ RTW89_SET_FWCMD_RA_FIXED_CSI_BW(cmd, ra->csi_bw); -+ } -+ -+ rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, -+ H2C_CAT_OUTSRC, H2C_CL_OUTSRC_RA, -+ H2C_FUNC_OUTSRC_RA_MACIDCFG, 0, 0, -+ H2C_RA_LEN); -+ -+ if (rtw89_h2c_tx(rtwdev, skb, false)) { -+ rtw89_err(rtwdev, "failed to send h2c\n"); -+ goto fail; -+ } -+ -+ return 0; -+fail: -+ dev_kfree_skb_any(skb); -+ -+ return -EBUSY; -+} -+ -+#define H2C_LEN_CXDRVHDR 2 -+#define H2C_LEN_CXDRVINFO_INIT (12 + H2C_LEN_CXDRVHDR) -+int rtw89_fw_h2c_cxdrv_init(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_dm *dm = &btc->dm; -+ struct rtw89_btc_init_info *init_info = &dm->init_info; -+ struct rtw89_btc_module *module = &init_info->module; -+ struct rtw89_btc_ant_info *ant = &module->ant; -+ struct sk_buff *skb; -+ u8 *cmd; -+ -+ skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_LEN_CXDRVINFO_INIT); -+ if (!skb) { -+ rtw89_err(rtwdev, "failed to alloc skb for h2c cxdrv_init\n"); -+ return -ENOMEM; -+ } -+ skb_put(skb, H2C_LEN_CXDRVINFO_INIT); -+ cmd = skb->data; -+ -+ RTW89_SET_FWCMD_CXHDR_TYPE(cmd, CXDRVINFO_INIT); -+ RTW89_SET_FWCMD_CXHDR_LEN(cmd, H2C_LEN_CXDRVINFO_INIT - H2C_LEN_CXDRVHDR); -+ -+ RTW89_SET_FWCMD_CXINIT_ANT_TYPE(cmd, ant->type); -+ RTW89_SET_FWCMD_CXINIT_ANT_NUM(cmd, ant->num); -+ RTW89_SET_FWCMD_CXINIT_ANT_ISO(cmd, ant->isolation); -+ RTW89_SET_FWCMD_CXINIT_ANT_POS(cmd, ant->single_pos); -+ RTW89_SET_FWCMD_CXINIT_ANT_DIVERSITY(cmd, ant->diversity); -+ -+ RTW89_SET_FWCMD_CXINIT_MOD_RFE(cmd, module->rfe_type); -+ RTW89_SET_FWCMD_CXINIT_MOD_CV(cmd, module->cv); -+ RTW89_SET_FWCMD_CXINIT_MOD_BT_SOLO(cmd, module->bt_solo); -+ RTW89_SET_FWCMD_CXINIT_MOD_BT_POS(cmd, module->bt_pos); -+ RTW89_SET_FWCMD_CXINIT_MOD_SW_TYPE(cmd, module->switch_type); -+ -+ RTW89_SET_FWCMD_CXINIT_WL_GCH(cmd, init_info->wl_guard_ch); -+ RTW89_SET_FWCMD_CXINIT_WL_ONLY(cmd, init_info->wl_only); -+ RTW89_SET_FWCMD_CXINIT_WL_INITOK(cmd, init_info->wl_init_ok); -+ RTW89_SET_FWCMD_CXINIT_DBCC_EN(cmd, init_info->dbcc_en); -+ RTW89_SET_FWCMD_CXINIT_CX_OTHER(cmd, init_info->cx_other); -+ RTW89_SET_FWCMD_CXINIT_BT_ONLY(cmd, init_info->bt_only); -+ -+ rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, -+ H2C_CAT_OUTSRC, BTFC_SET, -+ SET_DRV_INFO, 0, 0, -+ H2C_LEN_CXDRVINFO_INIT); -+ -+ if (rtw89_h2c_tx(rtwdev, skb, false)) { -+ rtw89_err(rtwdev, "failed to send h2c\n"); -+ goto fail; -+ } -+ -+ return 0; -+fail: -+ dev_kfree_skb_any(skb); -+ -+ return -EBUSY; -+} -+ -+#define H2C_LEN_CXDRVINFO_ROLE (4 + 12 * RTW89_MAX_HW_PORT_NUM + H2C_LEN_CXDRVHDR) -+int rtw89_fw_h2c_cxdrv_role(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_wl_info *wl = &btc->cx.wl; -+ struct rtw89_btc_wl_role_info *role_info = &wl->role_info; -+ struct rtw89_btc_wl_role_info_bpos *bpos = &role_info->role_map.role; -+ struct rtw89_btc_wl_active_role *active = role_info->active_role; -+ struct sk_buff *skb; -+ u8 *cmd; -+ int i; -+ -+ skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_LEN_CXDRVINFO_ROLE); -+ if (!skb) { -+ rtw89_err(rtwdev, "failed to alloc skb for h2c cxdrv_role\n"); -+ return -ENOMEM; -+ } -+ skb_put(skb, H2C_LEN_CXDRVINFO_ROLE); -+ cmd = skb->data; -+ -+ RTW89_SET_FWCMD_CXHDR_TYPE(cmd, CXDRVINFO_ROLE); -+ RTW89_SET_FWCMD_CXHDR_LEN(cmd, H2C_LEN_CXDRVINFO_ROLE - H2C_LEN_CXDRVHDR); -+ -+ RTW89_SET_FWCMD_CXROLE_CONNECT_CNT(cmd, role_info->connect_cnt); -+ RTW89_SET_FWCMD_CXROLE_LINK_MODE(cmd, role_info->link_mode); -+ -+ RTW89_SET_FWCMD_CXROLE_ROLE_NONE(cmd, bpos->none); -+ RTW89_SET_FWCMD_CXROLE_ROLE_STA(cmd, bpos->station); -+ RTW89_SET_FWCMD_CXROLE_ROLE_AP(cmd, bpos->ap); -+ RTW89_SET_FWCMD_CXROLE_ROLE_VAP(cmd, bpos->vap); -+ RTW89_SET_FWCMD_CXROLE_ROLE_ADHOC(cmd, bpos->adhoc); -+ RTW89_SET_FWCMD_CXROLE_ROLE_ADHOC_MASTER(cmd, bpos->adhoc_master); -+ RTW89_SET_FWCMD_CXROLE_ROLE_MESH(cmd, bpos->mesh); -+ RTW89_SET_FWCMD_CXROLE_ROLE_MONITOR(cmd, bpos->moniter); -+ RTW89_SET_FWCMD_CXROLE_ROLE_P2P_DEV(cmd, bpos->p2p_device); -+ RTW89_SET_FWCMD_CXROLE_ROLE_P2P_GC(cmd, bpos->p2p_gc); -+ RTW89_SET_FWCMD_CXROLE_ROLE_P2P_GO(cmd, bpos->p2p_go); -+ RTW89_SET_FWCMD_CXROLE_ROLE_NAN(cmd, bpos->nan); -+ -+ for (i = 0; i < RTW89_MAX_HW_PORT_NUM; i++, active++) { -+ RTW89_SET_FWCMD_CXROLE_ACT_CONNECTED(cmd, active->connected, i); -+ RTW89_SET_FWCMD_CXROLE_ACT_PID(cmd, active->pid, i); -+ RTW89_SET_FWCMD_CXROLE_ACT_PHY(cmd, active->phy, i); -+ RTW89_SET_FWCMD_CXROLE_ACT_NOA(cmd, active->noa, i); -+ RTW89_SET_FWCMD_CXROLE_ACT_BAND(cmd, active->band, i); -+ RTW89_SET_FWCMD_CXROLE_ACT_CLIENT_PS(cmd, active->client_ps, i); -+ RTW89_SET_FWCMD_CXROLE_ACT_BW(cmd, active->bw, i); -+ RTW89_SET_FWCMD_CXROLE_ACT_ROLE(cmd, active->role, i); -+ RTW89_SET_FWCMD_CXROLE_ACT_CH(cmd, active->ch, i); -+ RTW89_SET_FWCMD_CXROLE_ACT_TX_LVL(cmd, active->tx_lvl, i); -+ RTW89_SET_FWCMD_CXROLE_ACT_RX_LVL(cmd, active->rx_lvl, i); -+ RTW89_SET_FWCMD_CXROLE_ACT_TX_RATE(cmd, active->tx_rate, i); -+ RTW89_SET_FWCMD_CXROLE_ACT_RX_RATE(cmd, active->rx_rate, i); -+ } -+ -+ rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, -+ H2C_CAT_OUTSRC, BTFC_SET, -+ SET_DRV_INFO, 0, 0, -+ H2C_LEN_CXDRVINFO_ROLE); -+ -+ if (rtw89_h2c_tx(rtwdev, skb, false)) { -+ rtw89_err(rtwdev, "failed to send h2c\n"); -+ goto fail; -+ } -+ -+ return 0; -+fail: -+ dev_kfree_skb_any(skb); -+ -+ return -EBUSY; -+} -+ -+#define H2C_LEN_CXDRVINFO_CTRL (4 + H2C_LEN_CXDRVHDR) -+int rtw89_fw_h2c_cxdrv_ctrl(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_ctrl *ctrl = &btc->ctrl; -+ struct sk_buff *skb; -+ u8 *cmd; -+ -+ skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_LEN_CXDRVINFO_CTRL); -+ if (!skb) { -+ rtw89_err(rtwdev, "failed to alloc skb for h2c cxdrv_ctrl\n"); -+ return -ENOMEM; -+ } -+ skb_put(skb, H2C_LEN_CXDRVINFO_CTRL); -+ cmd = skb->data; -+ -+ RTW89_SET_FWCMD_CXHDR_TYPE(cmd, CXDRVINFO_CTRL); -+ RTW89_SET_FWCMD_CXHDR_LEN(cmd, H2C_LEN_CXDRVINFO_CTRL - H2C_LEN_CXDRVHDR); -+ -+ RTW89_SET_FWCMD_CXCTRL_MANUAL(cmd, ctrl->manual); -+ RTW89_SET_FWCMD_CXCTRL_IGNORE_BT(cmd, ctrl->igno_bt); -+ RTW89_SET_FWCMD_CXCTRL_ALWAYS_FREERUN(cmd, ctrl->always_freerun); -+ RTW89_SET_FWCMD_CXCTRL_TRACE_STEP(cmd, ctrl->trace_step); -+ -+ rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, -+ H2C_CAT_OUTSRC, BTFC_SET, -+ SET_DRV_INFO, 0, 0, -+ H2C_LEN_CXDRVINFO_CTRL); -+ -+ if (rtw89_h2c_tx(rtwdev, skb, false)) { -+ rtw89_err(rtwdev, "failed to send h2c\n"); -+ goto fail; -+ } -+ -+ return 0; -+fail: -+ dev_kfree_skb_any(skb); -+ -+ return -EBUSY; -+} -+ -+#define H2C_LEN_CXDRVINFO_RFK (4 + H2C_LEN_CXDRVHDR) -+int rtw89_fw_h2c_cxdrv_rfk(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_wl_info *wl = &btc->cx.wl; -+ struct rtw89_btc_wl_rfk_info *rfk_info = &wl->rfk_info; -+ struct sk_buff *skb; -+ u8 *cmd; -+ -+ skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_LEN_CXDRVINFO_RFK); -+ if (!skb) { -+ rtw89_err(rtwdev, "failed to alloc skb for h2c cxdrv_ctrl\n"); -+ return -ENOMEM; -+ } -+ skb_put(skb, H2C_LEN_CXDRVINFO_RFK); -+ cmd = skb->data; -+ -+ RTW89_SET_FWCMD_CXHDR_TYPE(cmd, CXDRVINFO_RFK); -+ RTW89_SET_FWCMD_CXHDR_LEN(cmd, H2C_LEN_CXDRVINFO_RFK - H2C_LEN_CXDRVHDR); -+ -+ RTW89_SET_FWCMD_CXRFK_STATE(cmd, rfk_info->state); -+ RTW89_SET_FWCMD_CXRFK_PATH_MAP(cmd, rfk_info->path_map); -+ RTW89_SET_FWCMD_CXRFK_PHY_MAP(cmd, rfk_info->phy_map); -+ RTW89_SET_FWCMD_CXRFK_BAND(cmd, rfk_info->band); -+ RTW89_SET_FWCMD_CXRFK_TYPE(cmd, rfk_info->type); -+ -+ rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, -+ H2C_CAT_OUTSRC, BTFC_SET, -+ SET_DRV_INFO, 0, 0, -+ H2C_LEN_CXDRVINFO_RFK); -+ -+ if (rtw89_h2c_tx(rtwdev, skb, false)) { -+ rtw89_err(rtwdev, "failed to send h2c\n"); -+ goto fail; -+ } -+ -+ return 0; -+fail: -+ dev_kfree_skb_any(skb); -+ -+ return -EBUSY; -+} -+ -+int rtw89_fw_h2c_rf_reg(struct rtw89_dev *rtwdev, -+ struct rtw89_fw_h2c_rf_reg_info *info, -+ u16 len, u8 page) -+{ -+ struct sk_buff *skb; -+ u8 class = info->rf_path == RF_PATH_A ? -+ H2C_CL_OUTSRC_RF_REG_A : H2C_CL_OUTSRC_RF_REG_B; -+ -+ skb = rtw89_fw_h2c_alloc_skb_with_hdr(len); -+ if (!skb) { -+ rtw89_err(rtwdev, "failed to alloc skb for h2c rf reg\n"); -+ return -ENOMEM; -+ } -+ skb_put_data(skb, info->rtw89_phy_config_rf_h2c[page], len); -+ -+ rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, -+ H2C_CAT_OUTSRC, class, page, 0, 0, -+ len); -+ -+ if (rtw89_h2c_tx(rtwdev, skb, false)) { -+ rtw89_err(rtwdev, "failed to send h2c\n"); -+ goto fail; -+ } -+ -+ return 0; -+fail: -+ dev_kfree_skb_any(skb); -+ -+ return -EBUSY; -+} -+ -+int rtw89_fw_h2c_raw_with_hdr(struct rtw89_dev *rtwdev, -+ u8 h2c_class, u8 h2c_func, u8 *buf, u16 len, -+ bool rack, bool dack) -+{ -+ struct sk_buff *skb; -+ -+ skb = rtw89_fw_h2c_alloc_skb_with_hdr(len); -+ if (!skb) { -+ rtw89_err(rtwdev, "failed to alloc skb for raw with hdr\n"); -+ return -ENOMEM; -+ } -+ skb_put_data(skb, buf, len); -+ -+ rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, -+ H2C_CAT_OUTSRC, h2c_class, h2c_func, rack, dack, -+ len); -+ -+ if (rtw89_h2c_tx(rtwdev, skb, false)) { -+ rtw89_err(rtwdev, "failed to send h2c\n"); -+ goto fail; -+ } -+ -+ return 0; -+fail: -+ dev_kfree_skb_any(skb); -+ -+ return -EBUSY; -+} -+ -+int rtw89_fw_h2c_raw(struct rtw89_dev *rtwdev, const u8 *buf, u16 len) -+{ -+ struct sk_buff *skb; -+ -+ skb = rtw89_fw_h2c_alloc_skb_no_hdr(len); -+ if (!skb) { -+ rtw89_err(rtwdev, "failed to alloc skb for h2c raw\n"); -+ return -ENOMEM; -+ } -+ skb_put_data(skb, buf, len); -+ -+ if (rtw89_h2c_tx(rtwdev, skb, false)) { -+ rtw89_err(rtwdev, "failed to send h2c\n"); -+ goto fail; -+ } -+ -+ return 0; -+fail: -+ dev_kfree_skb_any(skb); -+ -+ return -EBUSY; -+} -+ -+void rtw89_fw_send_all_early_h2c(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_early_h2c *early_h2c; -+ -+ lockdep_assert_held(&rtwdev->mutex); -+ -+ list_for_each_entry(early_h2c, &rtwdev->early_h2c_list, list) { -+ rtw89_fw_h2c_raw(rtwdev, early_h2c->h2c, early_h2c->h2c_len); -+ } -+} -+ -+void rtw89_fw_free_all_early_h2c(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_early_h2c *early_h2c, *tmp; -+ -+ mutex_lock(&rtwdev->mutex); -+ list_for_each_entry_safe(early_h2c, tmp, &rtwdev->early_h2c_list, list) { -+ list_del(&early_h2c->list); -+ kfree(early_h2c->h2c); -+ kfree(early_h2c); -+ } -+ mutex_unlock(&rtwdev->mutex); -+} -+ -+void rtw89_fw_c2h_irqsafe(struct rtw89_dev *rtwdev, struct sk_buff *c2h) -+{ -+ skb_queue_tail(&rtwdev->c2h_queue, c2h); -+ ieee80211_queue_work(rtwdev->hw, &rtwdev->c2h_work); -+} -+ -+static void rtw89_fw_c2h_cmd_handle(struct rtw89_dev *rtwdev, -+ struct sk_buff *skb) -+{ -+ u8 category = RTW89_GET_C2H_CATEGORY(skb->data); -+ u8 class = RTW89_GET_C2H_CLASS(skb->data); -+ u8 func = RTW89_GET_C2H_FUNC(skb->data); -+ u16 len = RTW89_GET_C2H_LEN(skb->data); -+ bool dump = true; -+ -+ if (!test_bit(RTW89_FLAG_RUNNING, rtwdev->flags)) -+ return; -+ -+ switch (category) { -+ case RTW89_C2H_CAT_TEST: -+ break; -+ case RTW89_C2H_CAT_MAC: -+ rtw89_mac_c2h_handle(rtwdev, skb, len, class, func); -+ if (class == RTW89_MAC_C2H_CLASS_INFO && -+ func == RTW89_MAC_C2H_FUNC_C2H_LOG) -+ dump = false; -+ break; -+ case RTW89_C2H_CAT_OUTSRC: -+ if (class >= RTW89_PHY_C2H_CLASS_BTC_MIN && -+ class <= RTW89_PHY_C2H_CLASS_BTC_MAX) -+ rtw89_btc_c2h_handle(rtwdev, skb, len, class, func); -+ else -+ rtw89_phy_c2h_handle(rtwdev, skb, len, class, func); -+ break; -+ } -+ -+ if (dump) -+ rtw89_hex_dump(rtwdev, RTW89_DBG_FW, "C2H: ", skb->data, skb->len); -+} -+ -+void rtw89_fw_c2h_work(struct work_struct *work) -+{ -+ struct rtw89_dev *rtwdev = container_of(work, struct rtw89_dev, -+ c2h_work); -+ struct sk_buff *skb, *tmp; -+ -+ skb_queue_walk_safe(&rtwdev->c2h_queue, skb, tmp) { -+ skb_unlink(skb, &rtwdev->c2h_queue); -+ mutex_lock(&rtwdev->mutex); -+ rtw89_fw_c2h_cmd_handle(rtwdev, skb); -+ mutex_unlock(&rtwdev->mutex); -+ dev_kfree_skb_any(skb); -+ } -+} -+ -+static int rtw89_fw_write_h2c_reg(struct rtw89_dev *rtwdev, -+ struct rtw89_mac_h2c_info *info) -+{ -+ static const u32 h2c_reg[RTW89_H2CREG_MAX] = { -+ R_AX_H2CREG_DATA0, R_AX_H2CREG_DATA1, -+ R_AX_H2CREG_DATA2, R_AX_H2CREG_DATA3 -+ }; -+ u8 i, val, len; -+ int ret; -+ -+ ret = read_poll_timeout(rtw89_read8, val, val == 0, 1000, 5000, false, -+ rtwdev, R_AX_H2CREG_CTRL); -+ if (ret) { -+ rtw89_warn(rtwdev, "FW does not process h2c registers\n"); -+ return ret; -+ } -+ -+ len = DIV_ROUND_UP(info->content_len + RTW89_H2CREG_HDR_LEN, -+ sizeof(info->h2creg[0])); -+ -+ RTW89_SET_H2CREG_HDR_FUNC(&info->h2creg[0], info->id); -+ RTW89_SET_H2CREG_HDR_LEN(&info->h2creg[0], len); -+ for (i = 0; i < RTW89_H2CREG_MAX; i++) -+ rtw89_write32(rtwdev, h2c_reg[i], info->h2creg[i]); -+ -+ rtw89_write8(rtwdev, R_AX_H2CREG_CTRL, B_AX_H2CREG_TRIGGER); -+ -+ return 0; -+} -+ -+static int rtw89_fw_read_c2h_reg(struct rtw89_dev *rtwdev, -+ struct rtw89_mac_c2h_info *info) -+{ -+ static const u32 c2h_reg[RTW89_C2HREG_MAX] = { -+ R_AX_C2HREG_DATA0, R_AX_C2HREG_DATA1, -+ R_AX_C2HREG_DATA2, R_AX_C2HREG_DATA3 -+ }; -+ u32 ret; -+ u8 i, val; -+ -+ info->id = RTW89_FWCMD_C2HREG_FUNC_NULL; -+ -+ ret = read_poll_timeout_atomic(rtw89_read8, val, val, 1, -+ RTW89_C2H_TIMEOUT, false, rtwdev, -+ R_AX_C2HREG_CTRL); -+ if (ret) { -+ rtw89_warn(rtwdev, "c2h reg timeout\n"); -+ return ret; -+ } -+ -+ for (i = 0; i < RTW89_C2HREG_MAX; i++) -+ info->c2hreg[i] = rtw89_read32(rtwdev, c2h_reg[i]); -+ -+ rtw89_write8(rtwdev, R_AX_C2HREG_CTRL, 0); -+ -+ info->id = RTW89_GET_C2H_HDR_FUNC(*info->c2hreg); -+ info->content_len = (RTW89_GET_C2H_HDR_LEN(*info->c2hreg) << 2) - -+ RTW89_C2HREG_HDR_LEN; -+ -+ return 0; -+} -+ -+int rtw89_fw_msg_reg(struct rtw89_dev *rtwdev, -+ struct rtw89_mac_h2c_info *h2c_info, -+ struct rtw89_mac_c2h_info *c2h_info) -+{ -+ u32 ret; -+ -+ if (h2c_info && h2c_info->id != RTW89_FWCMD_H2CREG_FUNC_GET_FEATURE) -+ lockdep_assert_held(&rtwdev->mutex); -+ -+ if (!h2c_info && !c2h_info) -+ return -EINVAL; -+ -+ if (!h2c_info) -+ goto recv_c2h; -+ -+ ret = rtw89_fw_write_h2c_reg(rtwdev, h2c_info); -+ if (ret) -+ return ret; -+ -+recv_c2h: -+ if (!c2h_info) -+ return 0; -+ -+ ret = rtw89_fw_read_c2h_reg(rtwdev, c2h_info); -+ if (ret) -+ return ret; -+ -+ return 0; -+} -+ -+void rtw89_fw_st_dbg_dump(struct rtw89_dev *rtwdev) -+{ -+ if (!test_bit(RTW89_FLAG_POWERON, rtwdev->flags)) { -+ rtw89_err(rtwdev, "[ERR]pwr is off\n"); -+ return; -+ } -+ -+ rtw89_info(rtwdev, "FW status = 0x%x\n", rtw89_read32(rtwdev, R_AX_UDM0)); -+ rtw89_info(rtwdev, "FW BADADDR = 0x%x\n", rtw89_read32(rtwdev, R_AX_UDM1)); -+ rtw89_info(rtwdev, "FW EPC/RA = 0x%x\n", rtw89_read32(rtwdev, R_AX_UDM2)); -+ rtw89_info(rtwdev, "FW MISC = 0x%x\n", rtw89_read32(rtwdev, R_AX_UDM3)); -+ rtw89_info(rtwdev, "R_AX_HALT_C2H = 0x%x\n", -+ rtw89_read32(rtwdev, R_AX_HALT_C2H)); -+ rtw89_info(rtwdev, "R_AX_SER_DBG_INFO = 0x%x\n", -+ rtw89_read32(rtwdev, R_AX_SER_DBG_INFO)); -+ -+ rtw89_fw_prog_cnt_dump(rtwdev); -+} -diff --git a/drivers/net/wireless/realtek/rtw89/fw.h b/drivers/net/wireless/realtek/rtw89/fw.h -new file mode 100644 -index 000000000000..7ee0d9323310 ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/fw.h -@@ -0,0 +1,1378 @@ -+/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ -+/* Copyright(c) 2019-2020 Realtek Corporation -+ */ -+ -+#ifndef __RTW89_FW_H__ -+#define __RTW89_FW_H__ -+ -+#include "core.h" -+ -+enum rtw89_fw_dl_status { -+ RTW89_FWDL_INITIAL_STATE = 0, -+ RTW89_FWDL_FWDL_ONGOING = 1, -+ RTW89_FWDL_CHECKSUM_FAIL = 2, -+ RTW89_FWDL_SECURITY_FAIL = 3, -+ RTW89_FWDL_CV_NOT_MATCH = 4, -+ RTW89_FWDL_RSVD0 = 5, -+ RTW89_FWDL_WCPU_FWDL_RDY = 6, -+ RTW89_FWDL_WCPU_FW_INIT_RDY = 7 -+}; -+ -+#define RTW89_GET_C2H_HDR_FUNC(info) \ -+ u32_get_bits(info, GENMASK(6, 0)) -+#define RTW89_GET_C2H_HDR_LEN(info) \ -+ u32_get_bits(info, GENMASK(11, 8)) -+ -+#define RTW89_SET_H2CREG_HDR_FUNC(info, val) \ -+ u32p_replace_bits(info, val, GENMASK(6, 0)) -+#define RTW89_SET_H2CREG_HDR_LEN(info, val) \ -+ u32p_replace_bits(info, val, GENMASK(11, 8)) -+ -+#define RTW89_H2CREG_MAX 4 -+#define RTW89_C2HREG_MAX 4 -+#define RTW89_C2HREG_HDR_LEN 2 -+#define RTW89_H2CREG_HDR_LEN 2 -+#define RTW89_C2H_TIMEOUT 1000000 -+struct rtw89_mac_c2h_info { -+ u8 id; -+ u8 content_len; -+ u32 c2hreg[RTW89_C2HREG_MAX]; -+}; -+ -+struct rtw89_mac_h2c_info { -+ u8 id; -+ u8 content_len; -+ u32 h2creg[RTW89_H2CREG_MAX]; -+}; -+ -+enum rtw89_mac_h2c_type { -+ RTW89_FWCMD_H2CREG_FUNC_H2CREG_LB = 0, -+ RTW89_FWCMD_H2CREG_FUNC_CNSL_CMD, -+ RTW89_FWCMD_H2CREG_FUNC_FWERR, -+ RTW89_FWCMD_H2CREG_FUNC_GET_FEATURE, -+ RTW89_FWCMD_H2CREG_FUNC_GETPKT_INFORM, -+ RTW89_FWCMD_H2CREG_FUNC_SCH_TX_EN -+}; -+ -+enum rtw89_mac_c2h_type { -+ RTW89_FWCMD_C2HREG_FUNC_C2HREG_LB = 0, -+ RTW89_FWCMD_C2HREG_FUNC_ERR_RPT, -+ RTW89_FWCMD_C2HREG_FUNC_ERR_MSG, -+ RTW89_FWCMD_C2HREG_FUNC_PHY_CAP, -+ RTW89_FWCMD_C2HREG_FUNC_TX_PAUSE_RPT, -+ RTW89_FWCMD_C2HREG_FUNC_NULL = 0xFF -+}; -+ -+struct rtw89_c2h_phy_cap { -+ u32 func:7; -+ u32 ack:1; -+ u32 len:4; -+ u32 seq:4; -+ u32 rx_nss:8; -+ u32 bw:8; -+ -+ u32 tx_nss:8; -+ u32 prot:8; -+ u32 nic:8; -+ u32 wl_func:8; -+ -+ u32 hw_type:8; -+} __packed; -+ -+enum rtw89_fw_c2h_category { -+ RTW89_C2H_CAT_TEST, -+ RTW89_C2H_CAT_MAC, -+ RTW89_C2H_CAT_OUTSRC, -+}; -+ -+enum rtw89_fw_log_level { -+ RTW89_FW_LOG_LEVEL_OFF, -+ RTW89_FW_LOG_LEVEL_CRT, -+ RTW89_FW_LOG_LEVEL_SER, -+ RTW89_FW_LOG_LEVEL_WARN, -+ RTW89_FW_LOG_LEVEL_LOUD, -+ RTW89_FW_LOG_LEVEL_TR, -+}; -+ -+enum rtw89_fw_log_path { -+ RTW89_FW_LOG_LEVEL_UART, -+ RTW89_FW_LOG_LEVEL_C2H, -+ RTW89_FW_LOG_LEVEL_SNI, -+}; -+ -+enum rtw89_fw_log_comp { -+ RTW89_FW_LOG_COMP_VER, -+ RTW89_FW_LOG_COMP_INIT, -+ RTW89_FW_LOG_COMP_TASK, -+ RTW89_FW_LOG_COMP_CNS, -+ RTW89_FW_LOG_COMP_H2C, -+ RTW89_FW_LOG_COMP_C2H, -+ RTW89_FW_LOG_COMP_TX, -+ RTW89_FW_LOG_COMP_RX, -+ RTW89_FW_LOG_COMP_IPSEC, -+ RTW89_FW_LOG_COMP_TIMER, -+ RTW89_FW_LOG_COMP_DBGPKT, -+ RTW89_FW_LOG_COMP_PS, -+ RTW89_FW_LOG_COMP_ERROR, -+ RTW89_FW_LOG_COMP_WOWLAN, -+ RTW89_FW_LOG_COMP_SECURE_BOOT, -+ RTW89_FW_LOG_COMP_BTC, -+ RTW89_FW_LOG_COMP_BB, -+ RTW89_FW_LOG_COMP_TWT, -+ RTW89_FW_LOG_COMP_RF, -+ RTW89_FW_LOG_COMP_MCC = 20, -+}; -+ -+#define FWDL_SECTION_MAX_NUM 10 -+#define FWDL_SECTION_CHKSUM_LEN 8 -+#define FWDL_SECTION_PER_PKT_LEN 2020 -+ -+struct rtw89_fw_hdr_section_info { -+ u8 redl; -+ const u8 *addr; -+ u32 len; -+ u32 dladdr; -+}; -+ -+struct rtw89_fw_bin_info { -+ u8 section_num; -+ u32 hdr_len; -+ struct rtw89_fw_hdr_section_info section_info[FWDL_SECTION_MAX_NUM]; -+}; -+ -+struct rtw89_fw_macid_pause_grp { -+ __le32 pause_grp[4]; -+ __le32 mask_grp[4]; -+} __packed; -+ -+struct rtw89_h2creg_sch_tx_en { -+ u8 func:7; -+ u8 ack:1; -+ u8 total_len:4; -+ u8 seq_num:4; -+ u16 tx_en:16; -+ u16 mask:16; -+ u8 band:1; -+ u16 rsvd:15; -+} __packed; -+ -+#define RTW89_SET_FWCMD_RA_IS_DIS(cmd, val) \ -+ le32p_replace_bits((__le32 *)(cmd) + 0x00, val, BIT(0)) -+#define RTW89_SET_FWCMD_RA_MODE(cmd, val) \ -+ le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(5, 1)) -+#define RTW89_SET_FWCMD_RA_BW_CAP(cmd, val) \ -+ le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(7, 6)) -+#define RTW89_SET_FWCMD_RA_MACID(cmd, val) \ -+ le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(15, 8)) -+#define RTW89_SET_FWCMD_RA_DCM(cmd, val) \ -+ le32p_replace_bits((__le32 *)(cmd) + 0x00, val, BIT(16)) -+#define RTW89_SET_FWCMD_RA_ER(cmd, val) \ -+ le32p_replace_bits((__le32 *)(cmd) + 0x00, val, BIT(17)) -+#define RTW89_SET_FWCMD_RA_INIT_RATE_LV(cmd, val) \ -+ le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(19, 18)) -+#define RTW89_SET_FWCMD_RA_UPD_ALL(cmd, val) \ -+ le32p_replace_bits((__le32 *)(cmd) + 0x00, val, BIT(20)) -+#define RTW89_SET_FWCMD_RA_SGI(cmd, val) \ -+ le32p_replace_bits((__le32 *)(cmd) + 0x00, val, BIT(21)) -+#define RTW89_SET_FWCMD_RA_LDPC(cmd, val) \ -+ le32p_replace_bits((__le32 *)(cmd) + 0x00, val, BIT(22)) -+#define RTW89_SET_FWCMD_RA_STBC(cmd, val) \ -+ le32p_replace_bits((__le32 *)(cmd) + 0x00, val, BIT(23)) -+#define RTW89_SET_FWCMD_RA_SS_NUM(cmd, val) \ -+ le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(26, 24)) -+#define RTW89_SET_FWCMD_RA_GILTF(cmd, val) \ -+ le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(29, 27)) -+#define RTW89_SET_FWCMD_RA_UPD_BW_NSS_MASK(cmd, val) \ -+ le32p_replace_bits((__le32 *)(cmd) + 0x00, val, BIT(30)) -+#define RTW89_SET_FWCMD_RA_UPD_MASK(cmd, val) \ -+ le32p_replace_bits((__le32 *)(cmd) + 0x00, val, BIT(31)) -+#define RTW89_SET_FWCMD_RA_MASK_0(cmd, val) \ -+ le32p_replace_bits((__le32 *)(cmd) + 0x01, val, GENMASK(7, 0)) -+#define RTW89_SET_FWCMD_RA_MASK_1(cmd, val) \ -+ le32p_replace_bits((__le32 *)(cmd) + 0x01, val, GENMASK(15, 8)) -+#define RTW89_SET_FWCMD_RA_MASK_2(cmd, val) \ -+ le32p_replace_bits((__le32 *)(cmd) + 0x01, val, GENMASK(23, 16)) -+#define RTW89_SET_FWCMD_RA_MASK_3(cmd, val) \ -+ le32p_replace_bits((__le32 *)(cmd) + 0x01, val, GENMASK(31, 24)) -+#define RTW89_SET_FWCMD_RA_MASK_4(cmd, val) \ -+ le32p_replace_bits((__le32 *)(cmd) + 0x02, val, GENMASK(7, 0)) -+#define RTW89_SET_FWCMD_RA_BFEE_CSI_CTL(cmd, val) \ -+ le32p_replace_bits((__le32 *)(cmd) + 0x02, val, BIT(31)) -+#define RTW89_SET_FWCMD_RA_BAND_NUM(cmd, val) \ -+ le32p_replace_bits((__le32 *)(cmd) + 0x03, val, GENMASK(7, 0)) -+#define RTW89_SET_FWCMD_RA_RA_CSI_RATE_EN(cmd, val) \ -+ le32p_replace_bits((__le32 *)(cmd) + 0x03, val, BIT(8)) -+#define RTW89_SET_FWCMD_RA_FIXED_CSI_RATE_EN(cmd, val) \ -+ le32p_replace_bits((__le32 *)(cmd) + 0x03, val, BIT(9)) -+#define RTW89_SET_FWCMD_RA_CR_TBL_SEL(cmd, val) \ -+ le32p_replace_bits((__le32 *)(cmd) + 0x03, val, BIT(10)) -+#define RTW89_SET_FWCMD_RA_FIXED_CSI_MCS_SS_IDX(cmd, val) \ -+ le32p_replace_bits((__le32 *)(cmd) + 0x03, val, GENMASK(23, 16)) -+#define RTW89_SET_FWCMD_RA_FIXED_CSI_MODE(cmd, val) \ -+ le32p_replace_bits((__le32 *)(cmd) + 0x03, val, GENMASK(25, 24)) -+#define RTW89_SET_FWCMD_RA_FIXED_CSI_GI_LTF(cmd, val) \ -+ le32p_replace_bits((__le32 *)(cmd) + 0x03, val, GENMASK(28, 26)) -+#define RTW89_SET_FWCMD_RA_FIXED_CSI_BW(cmd, val) \ -+ le32p_replace_bits((__le32 *)(cmd) + 0x03, val, GENMASK(31, 29)) -+ -+#define RTW89_SET_FWCMD_SEC_IDX(cmd, val) \ -+ le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(7, 0)) -+#define RTW89_SET_FWCMD_SEC_OFFSET(cmd, val) \ -+ le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(15, 8)) -+#define RTW89_SET_FWCMD_SEC_LEN(cmd, val) \ -+ le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(23, 16)) -+#define RTW89_SET_FWCMD_SEC_TYPE(cmd, val) \ -+ le32p_replace_bits((__le32 *)(cmd) + 0x01, val, GENMASK(3, 0)) -+#define RTW89_SET_FWCMD_SEC_EXT_KEY(cmd, val) \ -+ le32p_replace_bits((__le32 *)(cmd) + 0x01, val, BIT(4)) -+#define RTW89_SET_FWCMD_SEC_SPP_MODE(cmd, val) \ -+ le32p_replace_bits((__le32 *)(cmd) + 0x01, val, BIT(5)) -+#define RTW89_SET_FWCMD_SEC_KEY0(cmd, val) \ -+ le32p_replace_bits((__le32 *)(cmd) + 0x02, val, GENMASK(31, 0)) -+#define RTW89_SET_FWCMD_SEC_KEY1(cmd, val) \ -+ le32p_replace_bits((__le32 *)(cmd) + 0x03, val, GENMASK(31, 0)) -+#define RTW89_SET_FWCMD_SEC_KEY2(cmd, val) \ -+ le32p_replace_bits((__le32 *)(cmd) + 0x04, val, GENMASK(31, 0)) -+#define RTW89_SET_FWCMD_SEC_KEY3(cmd, val) \ -+ le32p_replace_bits((__le32 *)(cmd) + 0x05, val, GENMASK(31, 0)) -+ -+#define RTW89_SET_EDCA_SEL(cmd, val) \ -+ le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(1, 0)) -+#define RTW89_SET_EDCA_BAND(cmd, val) \ -+ le32p_replace_bits((__le32 *)(cmd) + 0x00, val, BIT(3)) -+#define RTW89_SET_EDCA_WMM(cmd, val) \ -+ le32p_replace_bits((__le32 *)(cmd) + 0x00, val, BIT(4)) -+#define RTW89_SET_EDCA_AC(cmd, val) \ -+ le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(6, 5)) -+#define RTW89_SET_EDCA_PARAM(cmd, val) \ -+ le32p_replace_bits((__le32 *)(cmd) + 0x01, val, GENMASK(31, 0)) -+#define FW_EDCA_PARAM_TXOPLMT_MSK GENMASK(26, 16) -+#define FW_EDCA_PARAM_CWMAX_MSK GENMASK(15, 12) -+#define FW_EDCA_PARAM_CWMIN_MSK GENMASK(11, 8) -+#define FW_EDCA_PARAM_AIFS_MSK GENMASK(7, 0) -+ -+#define GET_FWSECTION_HDR_SEC_SIZE(fwhdr) \ -+ le32_get_bits(*((__le32 *)(fwhdr) + 1), GENMASK(23, 0)) -+#define GET_FWSECTION_HDR_CHECKSUM(fwhdr) \ -+ le32_get_bits(*((__le32 *)(fwhdr) + 1), BIT(28)) -+#define GET_FWSECTION_HDR_REDL(fwhdr) \ -+ le32_get_bits(*((__le32 *)(fwhdr) + 1), BIT(29)) -+#define GET_FWSECTION_HDR_DL_ADDR(fwhdr) \ -+ le32_get_bits(*((__le32 *)(fwhdr)), GENMASK(31, 0)) -+ -+#define GET_FW_HDR_MAJOR_VERSION(fwhdr) \ -+ le32_get_bits(*((__le32 *)(fwhdr) + 1), GENMASK(7, 0)) -+#define GET_FW_HDR_MINOR_VERSION(fwhdr) \ -+ le32_get_bits(*((__le32 *)(fwhdr) + 1), GENMASK(15, 8)) -+#define GET_FW_HDR_SUBVERSION(fwhdr) \ -+ le32_get_bits(*((__le32 *)(fwhdr) + 1), GENMASK(23, 16)) -+#define GET_FW_HDR_SUBINDEX(fwhdr) \ -+ le32_get_bits(*((__le32 *)(fwhdr) + 1), GENMASK(31, 24)) -+#define GET_FW_HDR_MONTH(fwhdr) \ -+ le32_get_bits(*((__le32 *)(fwhdr) + 4), GENMASK(7, 0)) -+#define GET_FW_HDR_DATE(fwhdr) \ -+ le32_get_bits(*((__le32 *)(fwhdr) + 4), GENMASK(15, 8)) -+#define GET_FW_HDR_HOUR(fwhdr) \ -+ le32_get_bits(*((__le32 *)(fwhdr) + 4), GENMASK(23, 16)) -+#define GET_FW_HDR_MIN(fwhdr) \ -+ le32_get_bits(*((__le32 *)(fwhdr) + 4), GENMASK(31, 24)) -+#define GET_FW_HDR_YEAR(fwhdr) \ -+ le32_get_bits(*((__le32 *)(fwhdr) + 5), GENMASK(31, 0)) -+#define GET_FW_HDR_SEC_NUM(fwhdr) \ -+ le32_get_bits(*((__le32 *)(fwhdr) + 6), GENMASK(15, 8)) -+#define GET_FW_HDR_CMD_VERSERION(fwhdr) \ -+ le32_get_bits(*((__le32 *)(fwhdr) + 7), GENMASK(31, 24)) -+#define SET_FW_HDR_PART_SIZE(fwhdr, val) \ -+ le32p_replace_bits((__le32 *)(fwhdr) + 7, val, GENMASK(15, 0)) -+ -+#define SET_CTRL_INFO_MACID(table, val) \ -+ le32p_replace_bits((__le32 *)(table) + 0, val, GENMASK(6, 0)) -+#define SET_CTRL_INFO_OPERATION(table, val) \ -+ le32p_replace_bits((__le32 *)(table) + 0, val, BIT(7)) -+#define SET_CMC_TBL_MASK_DATARATE GENMASK(8, 0) -+#define SET_CMC_TBL_DATARATE(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 1, val, GENMASK(8, 0)); \ -+ le32p_replace_bits((__le32 *)(table) + 9, SET_CMC_TBL_MASK_DATARATE, \ -+ GENMASK(8, 0)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_FORCE_TXOP BIT(0) -+#define SET_CMC_TBL_FORCE_TXOP(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 1, val, BIT(9)); \ -+ le32p_replace_bits((__le32 *)(table) + 9, SET_CMC_TBL_MASK_FORCE_TXOP, \ -+ BIT(9)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_DATA_BW GENMASK(1, 0) -+#define SET_CMC_TBL_DATA_BW(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 1, val, GENMASK(11, 10)); \ -+ le32p_replace_bits((__le32 *)(table) + 9, SET_CMC_TBL_MASK_DATA_BW, \ -+ GENMASK(11, 10)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_DATA_GI_LTF GENMASK(2, 0) -+#define SET_CMC_TBL_DATA_GI_LTF(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 1, val, GENMASK(14, 12)); \ -+ le32p_replace_bits((__le32 *)(table) + 9, SET_CMC_TBL_MASK_DATA_GI_LTF, \ -+ GENMASK(14, 12)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_DARF_TC_INDEX BIT(0) -+#define SET_CMC_TBL_DARF_TC_INDEX(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 1, val, BIT(15)); \ -+ le32p_replace_bits((__le32 *)(table) + 9, SET_CMC_TBL_MASK_DARF_TC_INDEX, \ -+ BIT(15)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_ARFR_CTRL GENMASK(3, 0) -+#define SET_CMC_TBL_ARFR_CTRL(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 1, val, GENMASK(19, 16)); \ -+ le32p_replace_bits((__le32 *)(table) + 9, SET_CMC_TBL_MASK_ARFR_CTRL, \ -+ GENMASK(19, 16)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_ACQ_RPT_EN BIT(0) -+#define SET_CMC_TBL_ACQ_RPT_EN(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 1, val, BIT(20)); \ -+ le32p_replace_bits((__le32 *)(table) + 9, SET_CMC_TBL_MASK_ACQ_RPT_EN, \ -+ BIT(20)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_MGQ_RPT_EN BIT(0) -+#define SET_CMC_TBL_MGQ_RPT_EN(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 1, val, BIT(21)); \ -+ le32p_replace_bits((__le32 *)(table) + 9, SET_CMC_TBL_MASK_MGQ_RPT_EN, \ -+ BIT(21)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_ULQ_RPT_EN BIT(0) -+#define SET_CMC_TBL_ULQ_RPT_EN(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 1, val, BIT(22)); \ -+ le32p_replace_bits((__le32 *)(table) + 9, SET_CMC_TBL_MASK_ULQ_RPT_EN, \ -+ BIT(22)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_TWTQ_RPT_EN BIT(0) -+#define SET_CMC_TBL_TWTQ_RPT_EN(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 1, val, BIT(23)); \ -+ le32p_replace_bits((__le32 *)(table) + 9, SET_CMC_TBL_MASK_TWTQ_RPT_EN, \ -+ BIT(23)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_DISRTSFB BIT(0) -+#define SET_CMC_TBL_DISRTSFB(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 1, val, BIT(25)); \ -+ le32p_replace_bits((__le32 *)(table) + 9, SET_CMC_TBL_MASK_DISRTSFB, \ -+ BIT(25)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_DISDATAFB BIT(0) -+#define SET_CMC_TBL_DISDATAFB(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 1, val, BIT(26)); \ -+ le32p_replace_bits((__le32 *)(table) + 9, SET_CMC_TBL_MASK_DISDATAFB, \ -+ BIT(26)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_TRYRATE BIT(0) -+#define SET_CMC_TBL_TRYRATE(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 1, val, BIT(27)); \ -+ le32p_replace_bits((__le32 *)(table) + 9, SET_CMC_TBL_MASK_TRYRATE, \ -+ BIT(27)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_AMPDU_DENSITY GENMASK(3, 0) -+#define SET_CMC_TBL_AMPDU_DENSITY(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 1, val, GENMASK(31, 28)); \ -+ le32p_replace_bits((__le32 *)(table) + 9, SET_CMC_TBL_MASK_AMPDU_DENSITY, \ -+ GENMASK(31, 28)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_DATA_RTY_LOWEST_RATE GENMASK(8, 0) -+#define SET_CMC_TBL_DATA_RTY_LOWEST_RATE(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 2, val, GENMASK(8, 0)); \ -+ le32p_replace_bits((__le32 *)(table) + 10, SET_CMC_TBL_MASK_DATA_RTY_LOWEST_RATE, \ -+ GENMASK(8, 0)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_AMPDU_TIME_SEL BIT(0) -+#define SET_CMC_TBL_AMPDU_TIME_SEL(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 2, val, BIT(9)); \ -+ le32p_replace_bits((__le32 *)(table) + 10, SET_CMC_TBL_MASK_AMPDU_TIME_SEL, \ -+ BIT(9)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_AMPDU_LEN_SEL BIT(0) -+#define SET_CMC_TBL_AMPDU_LEN_SEL(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 2, val, BIT(10)); \ -+ le32p_replace_bits((__le32 *)(table) + 10, SET_CMC_TBL_MASK_AMPDU_LEN_SEL, \ -+ BIT(10)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_RTS_TXCNT_LMT_SEL BIT(0) -+#define SET_CMC_TBL_RTS_TXCNT_LMT_SEL(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 2, val, BIT(11)); \ -+ le32p_replace_bits((__le32 *)(table) + 10, SET_CMC_TBL_MASK_RTS_TXCNT_LMT_SEL, \ -+ BIT(11)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_RTS_TXCNT_LMT GENMASK(3, 0) -+#define SET_CMC_TBL_RTS_TXCNT_LMT(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 2, val, GENMASK(15, 12)); \ -+ le32p_replace_bits((__le32 *)(table) + 10, SET_CMC_TBL_MASK_RTS_TXCNT_LMT, \ -+ GENMASK(15, 12)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_RTSRATE GENMASK(8, 0) -+#define SET_CMC_TBL_RTSRATE(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 2, val, GENMASK(24, 16)); \ -+ le32p_replace_bits((__le32 *)(table) + 10, SET_CMC_TBL_MASK_RTSRATE, \ -+ GENMASK(24, 16)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_VCS_STBC BIT(0) -+#define SET_CMC_TBL_VCS_STBC(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 2, val, BIT(27)); \ -+ le32p_replace_bits((__le32 *)(table) + 10, SET_CMC_TBL_MASK_VCS_STBC, \ -+ BIT(27)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_RTS_RTY_LOWEST_RATE GENMASK(3, 0) -+#define SET_CMC_TBL_RTS_RTY_LOWEST_RATE(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 2, val, GENMASK(31, 28)); \ -+ le32p_replace_bits((__le32 *)(table) + 10, SET_CMC_TBL_MASK_RTS_RTY_LOWEST_RATE, \ -+ GENMASK(31, 28)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_DATA_TX_CNT_LMT GENMASK(5, 0) -+#define SET_CMC_TBL_DATA_TX_CNT_LMT(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 3, val, GENMASK(5, 0)); \ -+ le32p_replace_bits((__le32 *)(table) + 11, SET_CMC_TBL_MASK_DATA_TX_CNT_LMT, \ -+ GENMASK(5, 0)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_DATA_TXCNT_LMT_SEL BIT(0) -+#define SET_CMC_TBL_DATA_TXCNT_LMT_SEL(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 3, val, BIT(6)); \ -+ le32p_replace_bits((__le32 *)(table) + 11, SET_CMC_TBL_MASK_DATA_TXCNT_LMT_SEL, \ -+ BIT(6)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_MAX_AGG_NUM_SEL BIT(0) -+#define SET_CMC_TBL_MAX_AGG_NUM_SEL(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 3, val, BIT(7)); \ -+ le32p_replace_bits((__le32 *)(table) + 11, SET_CMC_TBL_MASK_MAX_AGG_NUM_SEL, \ -+ BIT(7)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_RTS_EN BIT(0) -+#define SET_CMC_TBL_RTS_EN(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 3, val, BIT(8)); \ -+ le32p_replace_bits((__le32 *)(table) + 11, SET_CMC_TBL_MASK_RTS_EN, \ -+ BIT(8)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_CTS2SELF_EN BIT(0) -+#define SET_CMC_TBL_CTS2SELF_EN(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 3, val, BIT(9)); \ -+ le32p_replace_bits((__le32 *)(table) + 11, SET_CMC_TBL_MASK_CTS2SELF_EN, \ -+ BIT(9)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_CCA_RTS GENMASK(1, 0) -+#define SET_CMC_TBL_CCA_RTS(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 3, val, GENMASK(11, 10)); \ -+ le32p_replace_bits((__le32 *)(table) + 11, SET_CMC_TBL_MASK_CCA_RTS, \ -+ GENMASK(11, 10)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_HW_RTS_EN BIT(0) -+#define SET_CMC_TBL_HW_RTS_EN(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 3, val, BIT(12)); \ -+ le32p_replace_bits((__le32 *)(table) + 11, SET_CMC_TBL_MASK_HW_RTS_EN, \ -+ BIT(12)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_RTS_DROP_DATA_MODE GENMASK(1, 0) -+#define SET_CMC_TBL_RTS_DROP_DATA_MODE(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 3, val, GENMASK(14, 13)); \ -+ le32p_replace_bits((__le32 *)(table) + 11, SET_CMC_TBL_MASK_RTS_DROP_DATA_MODE, \ -+ GENMASK(14, 13)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_AMPDU_MAX_LEN GENMASK(10, 0) -+#define SET_CMC_TBL_AMPDU_MAX_LEN(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 3, val, GENMASK(26, 16)); \ -+ le32p_replace_bits((__le32 *)(table) + 11, SET_CMC_TBL_MASK_AMPDU_MAX_LEN, \ -+ GENMASK(26, 16)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_UL_MU_DIS BIT(0) -+#define SET_CMC_TBL_UL_MU_DIS(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 3, val, BIT(27)); \ -+ le32p_replace_bits((__le32 *)(table) + 11, SET_CMC_TBL_MASK_UL_MU_DIS, \ -+ BIT(27)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_AMPDU_MAX_TIME GENMASK(3, 0) -+#define SET_CMC_TBL_AMPDU_MAX_TIME(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 3, val, GENMASK(31, 28)); \ -+ le32p_replace_bits((__le32 *)(table) + 11, SET_CMC_TBL_MASK_AMPDU_MAX_TIME, \ -+ GENMASK(31, 28)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_MAX_AGG_NUM GENMASK(7, 0) -+#define SET_CMC_TBL_MAX_AGG_NUM(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 4, val, GENMASK(7, 0)); \ -+ le32p_replace_bits((__le32 *)(table) + 12, SET_CMC_TBL_MASK_MAX_AGG_NUM, \ -+ GENMASK(7, 0)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_BA_BMAP GENMASK(1, 0) -+#define SET_CMC_TBL_BA_BMAP(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 4, val, GENMASK(9, 8)); \ -+ le32p_replace_bits((__le32 *)(table) + 12, SET_CMC_TBL_MASK_BA_BMAP, \ -+ GENMASK(9, 8)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_VO_LFTIME_SEL GENMASK(2, 0) -+#define SET_CMC_TBL_VO_LFTIME_SEL(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 4, val, GENMASK(18, 16)); \ -+ le32p_replace_bits((__le32 *)(table) + 12, SET_CMC_TBL_MASK_VO_LFTIME_SEL, \ -+ GENMASK(18, 16)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_VI_LFTIME_SEL GENMASK(2, 0) -+#define SET_CMC_TBL_VI_LFTIME_SEL(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 4, val, GENMASK(21, 19)); \ -+ le32p_replace_bits((__le32 *)(table) + 12, SET_CMC_TBL_MASK_VI_LFTIME_SEL, \ -+ GENMASK(21, 19)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_BE_LFTIME_SEL GENMASK(2, 0) -+#define SET_CMC_TBL_BE_LFTIME_SEL(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 4, val, GENMASK(24, 22)); \ -+ le32p_replace_bits((__le32 *)(table) + 12, SET_CMC_TBL_MASK_BE_LFTIME_SEL, \ -+ GENMASK(24, 22)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_BK_LFTIME_SEL GENMASK(2, 0) -+#define SET_CMC_TBL_BK_LFTIME_SEL(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 4, val, GENMASK(27, 25)); \ -+ le32p_replace_bits((__le32 *)(table) + 12, SET_CMC_TBL_MASK_BK_LFTIME_SEL, \ -+ GENMASK(27, 25)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_SECTYPE GENMASK(3, 0) -+#define SET_CMC_TBL_SECTYPE(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 4, val, GENMASK(31, 28)); \ -+ le32p_replace_bits((__le32 *)(table) + 12, SET_CMC_TBL_MASK_SECTYPE, \ -+ GENMASK(31, 28)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_MULTI_PORT_ID GENMASK(2, 0) -+#define SET_CMC_TBL_MULTI_PORT_ID(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 5, val, GENMASK(2, 0)); \ -+ le32p_replace_bits((__le32 *)(table) + 13, SET_CMC_TBL_MASK_MULTI_PORT_ID, \ -+ GENMASK(2, 0)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_BMC BIT(0) -+#define SET_CMC_TBL_BMC(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 5, val, BIT(3)); \ -+ le32p_replace_bits((__le32 *)(table) + 13, SET_CMC_TBL_MASK_BMC, \ -+ BIT(3)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_MBSSID GENMASK(3, 0) -+#define SET_CMC_TBL_MBSSID(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 5, val, GENMASK(7, 4)); \ -+ le32p_replace_bits((__le32 *)(table) + 13, SET_CMC_TBL_MASK_MBSSID, \ -+ GENMASK(7, 4)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_NAVUSEHDR BIT(0) -+#define SET_CMC_TBL_NAVUSEHDR(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 5, val, BIT(8)); \ -+ le32p_replace_bits((__le32 *)(table) + 13, SET_CMC_TBL_MASK_NAVUSEHDR, \ -+ BIT(8)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_TXPWR_MODE GENMASK(2, 0) -+#define SET_CMC_TBL_TXPWR_MODE(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 5, val, GENMASK(11, 9)); \ -+ le32p_replace_bits((__le32 *)(table) + 13, SET_CMC_TBL_MASK_TXPWR_MODE, \ -+ GENMASK(11, 9)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_DATA_DCM BIT(0) -+#define SET_CMC_TBL_DATA_DCM(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 5, val, BIT(12)); \ -+ le32p_replace_bits((__le32 *)(table) + 13, SET_CMC_TBL_MASK_DATA_DCM, \ -+ BIT(12)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_DATA_ER BIT(0) -+#define SET_CMC_TBL_DATA_ER(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 5, val, BIT(13)); \ -+ le32p_replace_bits((__le32 *)(table) + 13, SET_CMC_TBL_MASK_DATA_ER, \ -+ BIT(13)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_DATA_LDPC BIT(0) -+#define SET_CMC_TBL_DATA_LDPC(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 5, val, BIT(14)); \ -+ le32p_replace_bits((__le32 *)(table) + 13, SET_CMC_TBL_MASK_DATA_LDPC, \ -+ BIT(14)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_DATA_STBC BIT(0) -+#define SET_CMC_TBL_DATA_STBC(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 5, val, BIT(15)); \ -+ le32p_replace_bits((__le32 *)(table) + 13, SET_CMC_TBL_MASK_DATA_STBC, \ -+ BIT(15)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_A_CTRL_BQR BIT(0) -+#define SET_CMC_TBL_A_CTRL_BQR(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 5, val, BIT(16)); \ -+ le32p_replace_bits((__le32 *)(table) + 13, SET_CMC_TBL_MASK_A_CTRL_BQR, \ -+ BIT(16)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_A_CTRL_UPH BIT(0) -+#define SET_CMC_TBL_A_CTRL_UPH(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 5, val, BIT(17)); \ -+ le32p_replace_bits((__le32 *)(table) + 13, SET_CMC_TBL_MASK_A_CTRL_UPH, \ -+ BIT(17)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_A_CTRL_BSR BIT(0) -+#define SET_CMC_TBL_A_CTRL_BSR(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 5, val, BIT(18)); \ -+ le32p_replace_bits((__le32 *)(table) + 13, SET_CMC_TBL_MASK_A_CTRL_BSR, \ -+ BIT(18)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_A_CTRL_CAS BIT(0) -+#define SET_CMC_TBL_A_CTRL_CAS(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 5, val, BIT(19)); \ -+ le32p_replace_bits((__le32 *)(table) + 13, SET_CMC_TBL_MASK_A_CTRL_CAS, \ -+ BIT(19)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_DATA_BW_ER BIT(0) -+#define SET_CMC_TBL_DATA_BW_ER(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 5, val, BIT(20)); \ -+ le32p_replace_bits((__le32 *)(table) + 13, SET_CMC_TBL_MASK_DATA_BW_ER, \ -+ BIT(20)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_LSIG_TXOP_EN BIT(0) -+#define SET_CMC_TBL_LSIG_TXOP_EN(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 5, val, BIT(21)); \ -+ le32p_replace_bits((__le32 *)(table) + 13, SET_CMC_TBL_MASK_LSIG_TXOP_EN, \ -+ BIT(21)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_CTRL_CNT_VLD BIT(0) -+#define SET_CMC_TBL_CTRL_CNT_VLD(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 5, val, BIT(27)); \ -+ le32p_replace_bits((__le32 *)(table) + 13, SET_CMC_TBL_MASK_CTRL_CNT_VLD, \ -+ BIT(27)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_CTRL_CNT GENMASK(3, 0) -+#define SET_CMC_TBL_CTRL_CNT(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 5, val, GENMASK(31, 28)); \ -+ le32p_replace_bits((__le32 *)(table) + 13, SET_CMC_TBL_MASK_CTRL_CNT, \ -+ GENMASK(31, 28)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_RESP_REF_RATE GENMASK(8, 0) -+#define SET_CMC_TBL_RESP_REF_RATE(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 6, val, GENMASK(8, 0)); \ -+ le32p_replace_bits((__le32 *)(table) + 14, SET_CMC_TBL_MASK_RESP_REF_RATE, \ -+ GENMASK(8, 0)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_ALL_ACK_SUPPORT BIT(0) -+#define SET_CMC_TBL_ALL_ACK_SUPPORT(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 6, val, BIT(12)); \ -+ le32p_replace_bits((__le32 *)(table) + 14, SET_CMC_TBL_MASK_ALL_ACK_SUPPORT, \ -+ BIT(12)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_BSR_QUEUE_SIZE_FORMAT BIT(0) -+#define SET_CMC_TBL_BSR_QUEUE_SIZE_FORMAT(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 6, val, BIT(13)); \ -+ le32p_replace_bits((__le32 *)(table) + 14, SET_CMC_TBL_MASK_BSR_QUEUE_SIZE_FORMAT, \ -+ BIT(13)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_NTX_PATH_EN GENMASK(3, 0) -+#define SET_CMC_TBL_NTX_PATH_EN(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 6, val, GENMASK(19, 16)); \ -+ le32p_replace_bits((__le32 *)(table) + 14, SET_CMC_TBL_MASK_NTX_PATH_EN, \ -+ GENMASK(19, 16)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_PATH_MAP_A GENMASK(1, 0) -+#define SET_CMC_TBL_PATH_MAP_A(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 6, val, GENMASK(21, 20)); \ -+ le32p_replace_bits((__le32 *)(table) + 14, SET_CMC_TBL_MASK_PATH_MAP_A, \ -+ GENMASK(21, 20)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_PATH_MAP_B GENMASK(1, 0) -+#define SET_CMC_TBL_PATH_MAP_B(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 6, val, GENMASK(23, 22)); \ -+ le32p_replace_bits((__le32 *)(table) + 14, SET_CMC_TBL_MASK_PATH_MAP_B, \ -+ GENMASK(23, 22)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_PATH_MAP_C GENMASK(1, 0) -+#define SET_CMC_TBL_PATH_MAP_C(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 6, val, GENMASK(25, 24)); \ -+ le32p_replace_bits((__le32 *)(table) + 14, SET_CMC_TBL_MASK_PATH_MAP_C, \ -+ GENMASK(25, 24)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_PATH_MAP_D GENMASK(1, 0) -+#define SET_CMC_TBL_PATH_MAP_D(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 6, val, GENMASK(27, 26)); \ -+ le32p_replace_bits((__le32 *)(table) + 14, SET_CMC_TBL_MASK_PATH_MAP_D, \ -+ GENMASK(27, 26)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_ANTSEL_A BIT(0) -+#define SET_CMC_TBL_ANTSEL_A(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 6, val, BIT(28)); \ -+ le32p_replace_bits((__le32 *)(table) + 14, SET_CMC_TBL_MASK_ANTSEL_A, \ -+ BIT(28)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_ANTSEL_B BIT(0) -+#define SET_CMC_TBL_ANTSEL_B(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 6, val, BIT(29)); \ -+ le32p_replace_bits((__le32 *)(table) + 14, SET_CMC_TBL_MASK_ANTSEL_B, \ -+ BIT(29)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_ANTSEL_C BIT(0) -+#define SET_CMC_TBL_ANTSEL_C(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 6, val, BIT(30)); \ -+ le32p_replace_bits((__le32 *)(table) + 14, SET_CMC_TBL_MASK_ANTSEL_C, \ -+ BIT(30)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_ANTSEL_D BIT(0) -+#define SET_CMC_TBL_ANTSEL_D(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 6, val, BIT(31)); \ -+ le32p_replace_bits((__le32 *)(table) + 14, SET_CMC_TBL_MASK_ANTSEL_D, \ -+ BIT(31)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_ADDR_CAM_INDEX GENMASK(7, 0) -+#define SET_CMC_TBL_ADDR_CAM_INDEX(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(7, 0)); \ -+ le32p_replace_bits((__le32 *)(table) + 15, SET_CMC_TBL_MASK_ADDR_CAM_INDEX, \ -+ GENMASK(7, 0)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_PAID GENMASK(8, 0) -+#define SET_CMC_TBL_PAID(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(16, 8)); \ -+ le32p_replace_bits((__le32 *)(table) + 15, SET_CMC_TBL_MASK_PAID, \ -+ GENMASK(16, 8)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_ULDL BIT(0) -+#define SET_CMC_TBL_ULDL(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 7, val, BIT(17)); \ -+ le32p_replace_bits((__le32 *)(table) + 15, SET_CMC_TBL_MASK_ULDL, \ -+ BIT(17)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_DOPPLER_CTRL GENMASK(1, 0) -+#define SET_CMC_TBL_DOPPLER_CTRL(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(19, 18)); \ -+ le32p_replace_bits((__le32 *)(table) + 15, SET_CMC_TBL_MASK_DOPPLER_CTRL, \ -+ GENMASK(19, 18)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_NOMINAL_PKT_PADDING GENMASK(1, 0) -+#define SET_CMC_TBL_NOMINAL_PKT_PADDING(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(21, 20)); \ -+ le32p_replace_bits((__le32 *)(table) + 15, SET_CMC_TBL_MASK_NOMINAL_PKT_PADDING, \ -+ GENMASK(21, 20)); \ -+} while (0) -+#define SET_CMC_TBL_NOMINAL_PKT_PADDING40(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(23, 22)); \ -+ le32p_replace_bits((__le32 *)(table) + 15, SET_CMC_TBL_MASK_NOMINAL_PKT_PADDING, \ -+ GENMASK(23, 22)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_TXPWR_TOLERENCE GENMASK(3, 0) -+#define SET_CMC_TBL_TXPWR_TOLERENCE(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(27, 24)); \ -+ le32p_replace_bits((__le32 *)(table) + 15, SET_CMC_TBL_MASK_TXPWR_TOLERENCE, \ -+ GENMASK(27, 24)); \ -+} while (0) -+#define SET_CMC_TBL_NOMINAL_PKT_PADDING80(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(31, 30)); \ -+ le32p_replace_bits((__le32 *)(table) + 15, SET_CMC_TBL_MASK_NOMINAL_PKT_PADDING, \ -+ GENMASK(31, 30)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_NC GENMASK(2, 0) -+#define SET_CMC_TBL_NC(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 8, val, GENMASK(2, 0)); \ -+ le32p_replace_bits((__le32 *)(table) + 16, SET_CMC_TBL_MASK_NC, \ -+ GENMASK(2, 0)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_NR GENMASK(2, 0) -+#define SET_CMC_TBL_NR(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 8, val, GENMASK(5, 3)); \ -+ le32p_replace_bits((__le32 *)(table) + 16, SET_CMC_TBL_MASK_NR, \ -+ GENMASK(5, 3)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_NG GENMASK(1, 0) -+#define SET_CMC_TBL_NG(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 8, val, GENMASK(7, 6)); \ -+ le32p_replace_bits((__le32 *)(table) + 16, SET_CMC_TBL_MASK_NG, \ -+ GENMASK(7, 6)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_CB GENMASK(1, 0) -+#define SET_CMC_TBL_CB(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 8, val, GENMASK(9, 8)); \ -+ le32p_replace_bits((__le32 *)(table) + 16, SET_CMC_TBL_MASK_CB, \ -+ GENMASK(9, 8)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_CS GENMASK(1, 0) -+#define SET_CMC_TBL_CS(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 8, val, GENMASK(11, 10)); \ -+ le32p_replace_bits((__le32 *)(table) + 16, SET_CMC_TBL_MASK_CS, \ -+ GENMASK(11, 10)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_CSI_TXBF_EN BIT(0) -+#define SET_CMC_TBL_CSI_TXBF_EN(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 8, val, BIT(12)); \ -+ le32p_replace_bits((__le32 *)(table) + 16, SET_CMC_TBL_MASK_CSI_TXBF_EN, \ -+ BIT(12)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_CSI_STBC_EN BIT(0) -+#define SET_CMC_TBL_CSI_STBC_EN(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 8, val, BIT(13)); \ -+ le32p_replace_bits((__le32 *)(table) + 16, SET_CMC_TBL_MASK_CSI_STBC_EN, \ -+ BIT(13)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_CSI_LDPC_EN BIT(0) -+#define SET_CMC_TBL_CSI_LDPC_EN(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 8, val, BIT(14)); \ -+ le32p_replace_bits((__le32 *)(table) + 16, SET_CMC_TBL_MASK_CSI_LDPC_EN, \ -+ BIT(14)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_CSI_PARA_EN BIT(0) -+#define SET_CMC_TBL_CSI_PARA_EN(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 8, val, BIT(15)); \ -+ le32p_replace_bits((__le32 *)(table) + 16, SET_CMC_TBL_MASK_CSI_PARA_EN, \ -+ BIT(15)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_CSI_FIX_RATE GENMASK(8, 0) -+#define SET_CMC_TBL_CSI_FIX_RATE(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 8, val, GENMASK(24, 16)); \ -+ le32p_replace_bits((__le32 *)(table) + 16, SET_CMC_TBL_MASK_CSI_FIX_RATE, \ -+ GENMASK(24, 16)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_CSI_GI_LTF GENMASK(2, 0) -+#define SET_CMC_TBL_CSI_GI_LTF(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 8, val, GENMASK(27, 25)); \ -+ le32p_replace_bits((__le32 *)(table) + 16, SET_CMC_TBL_MASK_CSI_GI_LTF, \ -+ GENMASK(27, 25)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_CSI_GID_SEL BIT(0) -+#define SET_CMC_TBL_CSI_GID_SEL(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 8, val, BIT(29)); \ -+ le32p_replace_bits((__le32 *)(table) + 16, SET_CMC_TBL_MASK_CSI_GID_SEL, \ -+ BIT(29)); \ -+} while (0) -+#define SET_CMC_TBL_MASK_CSI_BW GENMASK(1, 0) -+#define SET_CMC_TBL_CSI_BW(table, val) \ -+do { \ -+ le32p_replace_bits((__le32 *)(table) + 8, val, GENMASK(31, 30)); \ -+ le32p_replace_bits((__le32 *)(table) + 16, SET_CMC_TBL_MASK_CSI_BW, \ -+ GENMASK(31, 30)); \ -+} while (0) -+ -+#define SET_FWROLE_MAINTAIN_MACID(h2c, val) \ -+ le32p_replace_bits((__le32 *)h2c, val, GENMASK(7, 0)) -+#define SET_FWROLE_MAINTAIN_SELF_ROLE(h2c, val) \ -+ le32p_replace_bits((__le32 *)h2c, val, GENMASK(9, 8)) -+#define SET_FWROLE_MAINTAIN_UPD_MODE(h2c, val) \ -+ le32p_replace_bits((__le32 *)h2c, val, GENMASK(12, 10)) -+#define SET_FWROLE_MAINTAIN_WIFI_ROLE(h2c, val) \ -+ le32p_replace_bits((__le32 *)h2c, val, GENMASK(16, 13)) -+ -+#define SET_JOININFO_MACID(h2c, val) \ -+ le32p_replace_bits((__le32 *)h2c, val, GENMASK(7, 0)) -+#define SET_JOININFO_OP(h2c, val) \ -+ le32p_replace_bits((__le32 *)h2c, val, BIT(8)) -+#define SET_JOININFO_BAND(h2c, val) \ -+ le32p_replace_bits((__le32 *)h2c, val, BIT(9)) -+#define SET_JOININFO_WMM(h2c, val) \ -+ le32p_replace_bits((__le32 *)h2c, val, GENMASK(11, 10)) -+#define SET_JOININFO_TGR(h2c, val) \ -+ le32p_replace_bits((__le32 *)h2c, val, BIT(12)) -+#define SET_JOININFO_ISHESTA(h2c, val) \ -+ le32p_replace_bits((__le32 *)h2c, val, BIT(13)) -+#define SET_JOININFO_DLBW(h2c, val) \ -+ le32p_replace_bits((__le32 *)h2c, val, GENMASK(15, 14)) -+#define SET_JOININFO_TF_MAC_PAD(h2c, val) \ -+ le32p_replace_bits((__le32 *)h2c, val, GENMASK(17, 16)) -+#define SET_JOININFO_DL_T_PE(h2c, val) \ -+ le32p_replace_bits((__le32 *)h2c, val, GENMASK(20, 18)) -+#define SET_JOININFO_PORT_ID(h2c, val) \ -+ le32p_replace_bits((__le32 *)h2c, val, GENMASK(23, 21)) -+#define SET_JOININFO_NET_TYPE(h2c, val) \ -+ le32p_replace_bits((__le32 *)h2c, val, GENMASK(25, 24)) -+#define SET_JOININFO_WIFI_ROLE(h2c, val) \ -+ le32p_replace_bits((__le32 *)h2c, val, GENMASK(29, 26)) -+#define SET_JOININFO_SELF_ROLE(h2c, val) \ -+ le32p_replace_bits((__le32 *)h2c, val, GENMASK(31, 30)) -+ -+#define SET_GENERAL_PKT_MACID(h2c, val) \ -+ le32p_replace_bits((__le32 *)h2c, val, GENMASK(7, 0)) -+#define SET_GENERAL_PKT_PROBRSP_ID(h2c, val) \ -+ le32p_replace_bits((__le32 *)h2c, val, GENMASK(15, 8)) -+#define SET_GENERAL_PKT_PSPOLL_ID(h2c, val) \ -+ le32p_replace_bits((__le32 *)h2c, val, GENMASK(23, 16)) -+#define SET_GENERAL_PKT_NULL_ID(h2c, val) \ -+ le32p_replace_bits((__le32 *)h2c, val, GENMASK(31, 24)) -+#define SET_GENERAL_PKT_QOS_NULL_ID(h2c, val) \ -+ le32p_replace_bits((__le32 *)(h2c) + 1, val, GENMASK(7, 0)) -+#define SET_GENERAL_PKT_CTS2SELF_ID(h2c, val) \ -+ le32p_replace_bits((__le32 *)(h2c) + 1, val, GENMASK(15, 8)) -+ -+#define SET_LOG_CFG_LEVEL(h2c, val) \ -+ le32p_replace_bits((__le32 *)h2c, val, GENMASK(7, 0)) -+#define SET_LOG_CFG_PATH(h2c, val) \ -+ le32p_replace_bits((__le32 *)h2c, val, GENMASK(15, 8)) -+#define SET_LOG_CFG_COMP(h2c, val) \ -+ le32p_replace_bits((__le32 *)(h2c) + 1, val, GENMASK(31, 0)) -+#define SET_LOG_CFG_COMP_EXT(h2c, val) \ -+ le32p_replace_bits((__le32 *)(h2c) + 2, val, GENMASK(31, 0)) -+ -+#define SET_BA_CAM_VALID(h2c, val) \ -+ le32p_replace_bits((__le32 *)h2c, val, BIT(0)) -+#define SET_BA_CAM_INIT_REQ(h2c, val) \ -+ le32p_replace_bits((__le32 *)h2c, val, BIT(1)) -+#define SET_BA_CAM_ENTRY_IDX(h2c, val) \ -+ le32p_replace_bits((__le32 *)h2c, val, GENMASK(3, 2)) -+#define SET_BA_CAM_TID(h2c, val) \ -+ le32p_replace_bits((__le32 *)h2c, val, GENMASK(7, 4)) -+#define SET_BA_CAM_MACID(h2c, val) \ -+ le32p_replace_bits((__le32 *)h2c, val, GENMASK(15, 8)) -+#define SET_BA_CAM_BMAP_SIZE(h2c, val) \ -+ le32p_replace_bits((__le32 *)h2c, val, GENMASK(19, 16)) -+#define SET_BA_CAM_SSN(h2c, val) \ -+ le32p_replace_bits((__le32 *)h2c, val, GENMASK(31, 20)) -+ -+#define SET_LPS_PARM_MACID(h2c, val) \ -+ le32p_replace_bits((__le32 *)h2c, val, GENMASK(7, 0)) -+#define SET_LPS_PARM_PSMODE(h2c, val) \ -+ le32p_replace_bits((__le32 *)h2c, val, GENMASK(15, 8)) -+#define SET_LPS_PARM_RLBM(h2c, val) \ -+ le32p_replace_bits((__le32 *)h2c, val, GENMASK(19, 16)) -+#define SET_LPS_PARM_SMARTPS(h2c, val) \ -+ le32p_replace_bits((__le32 *)h2c, val, GENMASK(23, 20)) -+#define SET_LPS_PARM_AWAKEINTERVAL(h2c, val) \ -+ le32p_replace_bits((__le32 *)h2c, val, GENMASK(31, 24)) -+#define SET_LPS_PARM_VOUAPSD(h2c, val) \ -+ le32p_replace_bits((__le32 *)(h2c) + 1, val, BIT(0)) -+#define SET_LPS_PARM_VIUAPSD(h2c, val) \ -+ le32p_replace_bits((__le32 *)(h2c) + 1, val, BIT(1)) -+#define SET_LPS_PARM_BEUAPSD(h2c, val) \ -+ le32p_replace_bits((__le32 *)(h2c) + 1, val, BIT(2)) -+#define SET_LPS_PARM_BKUAPSD(h2c, val) \ -+ le32p_replace_bits((__le32 *)(h2c) + 1, val, BIT(3)) -+#define SET_LPS_PARM_LASTRPWM(h2c, val) \ -+ le32p_replace_bits((__le32 *)(h2c) + 1, val, GENMASK(15, 8)) -+ -+enum rtw89_btc_btf_h2c_class { -+ BTFC_SET = 0x10, -+ BTFC_GET = 0x11, -+ BTFC_FW_EVENT = 0x12, -+}; -+ -+enum rtw89_btc_btf_set { -+ SET_REPORT_EN = 0x0, -+ SET_SLOT_TABLE, -+ SET_MREG_TABLE, -+ SET_CX_POLICY, -+ SET_GPIO_DBG, -+ SET_DRV_INFO, -+ SET_DRV_EVENT, -+ SET_BT_WREG_ADDR, -+ SET_BT_WREG_VAL, -+ SET_BT_RREG_ADDR, -+ SET_BT_WL_CH_INFO, -+ SET_BT_INFO_REPORT, -+ SET_BT_IGNORE_WLAN_ACT, -+ SET_BT_TX_PWR, -+ SET_BT_LNA_CONSTRAIN, -+ SET_BT_GOLDEN_RX_RANGE, -+ SET_BT_PSD_REPORT, -+ SET_H2C_TEST, -+ SET_MAX1, -+}; -+ -+enum rtw89_btc_cxdrvinfo { -+ CXDRVINFO_INIT = 0, -+ CXDRVINFO_ROLE, -+ CXDRVINFO_DBCC, -+ CXDRVINFO_SMAP, -+ CXDRVINFO_RFK, -+ CXDRVINFO_RUN, -+ CXDRVINFO_CTRL, -+ CXDRVINFO_SCAN, -+ CXDRVINFO_MAX, -+}; -+ -+#define RTW89_SET_FWCMD_CXHDR_TYPE(cmd, val) \ -+ u8p_replace_bits((u8 *)(cmd) + 0, val, GENMASK(7, 0)) -+#define RTW89_SET_FWCMD_CXHDR_LEN(cmd, val) \ -+ u8p_replace_bits((u8 *)(cmd) + 1, val, GENMASK(7, 0)) -+ -+#define RTW89_SET_FWCMD_CXINIT_ANT_TYPE(cmd, val) \ -+ u8p_replace_bits((u8 *)(cmd) + 2, val, GENMASK(7, 0)) -+#define RTW89_SET_FWCMD_CXINIT_ANT_NUM(cmd, val) \ -+ u8p_replace_bits((u8 *)(cmd) + 3, val, GENMASK(7, 0)) -+#define RTW89_SET_FWCMD_CXINIT_ANT_ISO(cmd, val) \ -+ u8p_replace_bits((u8 *)(cmd) + 4, val, GENMASK(7, 0)) -+#define RTW89_SET_FWCMD_CXINIT_ANT_POS(cmd, val) \ -+ u8p_replace_bits((u8 *)(cmd) + 5, val, BIT(0)) -+#define RTW89_SET_FWCMD_CXINIT_ANT_DIVERSITY(cmd, val) \ -+ u8p_replace_bits((u8 *)(cmd) + 5, val, BIT(1)) -+#define RTW89_SET_FWCMD_CXINIT_MOD_RFE(cmd, val) \ -+ u8p_replace_bits((u8 *)(cmd) + 6, val, GENMASK(7, 0)) -+#define RTW89_SET_FWCMD_CXINIT_MOD_CV(cmd, val) \ -+ u8p_replace_bits((u8 *)(cmd) + 7, val, GENMASK(7, 0)) -+#define RTW89_SET_FWCMD_CXINIT_MOD_BT_SOLO(cmd, val) \ -+ u8p_replace_bits((u8 *)(cmd) + 8, val, BIT(0)) -+#define RTW89_SET_FWCMD_CXINIT_MOD_BT_POS(cmd, val) \ -+ u8p_replace_bits((u8 *)(cmd) + 8, val, BIT(1)) -+#define RTW89_SET_FWCMD_CXINIT_MOD_SW_TYPE(cmd, val) \ -+ u8p_replace_bits((u8 *)(cmd) + 8, val, BIT(2)) -+#define RTW89_SET_FWCMD_CXINIT_WL_GCH(cmd, val) \ -+ u8p_replace_bits((u8 *)(cmd) + 10, val, GENMASK(7, 0)) -+#define RTW89_SET_FWCMD_CXINIT_WL_ONLY(cmd, val) \ -+ u8p_replace_bits((u8 *)(cmd) + 11, val, BIT(0)) -+#define RTW89_SET_FWCMD_CXINIT_WL_INITOK(cmd, val) \ -+ u8p_replace_bits((u8 *)(cmd) + 11, val, BIT(1)) -+#define RTW89_SET_FWCMD_CXINIT_DBCC_EN(cmd, val) \ -+ u8p_replace_bits((u8 *)(cmd) + 11, val, BIT(2)) -+#define RTW89_SET_FWCMD_CXINIT_CX_OTHER(cmd, val) \ -+ u8p_replace_bits((u8 *)(cmd) + 11, val, BIT(3)) -+#define RTW89_SET_FWCMD_CXINIT_BT_ONLY(cmd, val) \ -+ u8p_replace_bits((u8 *)(cmd) + 11, val, BIT(4)) -+ -+#define RTW89_SET_FWCMD_CXROLE_CONNECT_CNT(cmd, val) \ -+ u8p_replace_bits((u8 *)(cmd) + 2, val, GENMASK(7, 0)) -+#define RTW89_SET_FWCMD_CXROLE_LINK_MODE(cmd, val) \ -+ u8p_replace_bits((u8 *)(cmd) + 3, val, GENMASK(7, 0)) -+#define RTW89_SET_FWCMD_CXROLE_ROLE_NONE(cmd, val) \ -+ le16p_replace_bits((__le16 *)((u8 *)(cmd) + 4), val, BIT(0)) -+#define RTW89_SET_FWCMD_CXROLE_ROLE_STA(cmd, val) \ -+ le16p_replace_bits((__le16 *)((u8 *)(cmd) + 4), val, BIT(1)) -+#define RTW89_SET_FWCMD_CXROLE_ROLE_AP(cmd, val) \ -+ le16p_replace_bits((__le16 *)((u8 *)(cmd) + 4), val, BIT(2)) -+#define RTW89_SET_FWCMD_CXROLE_ROLE_VAP(cmd, val) \ -+ le16p_replace_bits((__le16 *)((u8 *)(cmd) + 4), val, BIT(3)) -+#define RTW89_SET_FWCMD_CXROLE_ROLE_ADHOC(cmd, val) \ -+ le16p_replace_bits((__le16 *)((u8 *)(cmd) + 4), val, BIT(4)) -+#define RTW89_SET_FWCMD_CXROLE_ROLE_ADHOC_MASTER(cmd, val) \ -+ le16p_replace_bits((__le16 *)((u8 *)(cmd) + 4), val, BIT(5)) -+#define RTW89_SET_FWCMD_CXROLE_ROLE_MESH(cmd, val) \ -+ le16p_replace_bits((__le16 *)((u8 *)(cmd) + 4), val, BIT(6)) -+#define RTW89_SET_FWCMD_CXROLE_ROLE_MONITOR(cmd, val) \ -+ le16p_replace_bits((__le16 *)((u8 *)(cmd) + 4), val, BIT(7)) -+#define RTW89_SET_FWCMD_CXROLE_ROLE_P2P_DEV(cmd, val) \ -+ le16p_replace_bits((__le16 *)((u8 *)(cmd) + 4), val, BIT(8)) -+#define RTW89_SET_FWCMD_CXROLE_ROLE_P2P_GC(cmd, val) \ -+ le16p_replace_bits((__le16 *)((u8 *)(cmd) + 4), val, BIT(9)) -+#define RTW89_SET_FWCMD_CXROLE_ROLE_P2P_GO(cmd, val) \ -+ le16p_replace_bits((__le16 *)((u8 *)(cmd) + 4), val, BIT(10)) -+#define RTW89_SET_FWCMD_CXROLE_ROLE_NAN(cmd, val) \ -+ le16p_replace_bits((__le16 *)((u8 *)(cmd) + 4), val, BIT(11)) -+#define RTW89_SET_FWCMD_CXROLE_ACT_CONNECTED(cmd, val, n) \ -+ u8p_replace_bits((u8 *)(cmd) + (6 + 12 * (n)), val, BIT(0)) -+#define RTW89_SET_FWCMD_CXROLE_ACT_PID(cmd, val, n) \ -+ u8p_replace_bits((u8 *)(cmd) + (6 + 12 * (n)), val, GENMASK(3, 1)) -+#define RTW89_SET_FWCMD_CXROLE_ACT_PHY(cmd, val, n) \ -+ u8p_replace_bits((u8 *)(cmd) + (6 + 12 * (n)), val, BIT(4)) -+#define RTW89_SET_FWCMD_CXROLE_ACT_NOA(cmd, val, n) \ -+ u8p_replace_bits((u8 *)(cmd) + (6 + 12 * (n)), val, BIT(5)) -+#define RTW89_SET_FWCMD_CXROLE_ACT_BAND(cmd, val, n) \ -+ u8p_replace_bits((u8 *)(cmd) + (6 + 12 * (n)), val, GENMASK(7, 6)) -+#define RTW89_SET_FWCMD_CXROLE_ACT_CLIENT_PS(cmd, val, n) \ -+ u8p_replace_bits((u8 *)(cmd) + (7 + 12 * (n)), val, BIT(0)) -+#define RTW89_SET_FWCMD_CXROLE_ACT_BW(cmd, val, n) \ -+ u8p_replace_bits((u8 *)(cmd) + (7 + 12 * (n)), val, GENMASK(7, 1)) -+#define RTW89_SET_FWCMD_CXROLE_ACT_ROLE(cmd, val, n) \ -+ u8p_replace_bits((u8 *)(cmd) + (8 + 12 * (n)), val, GENMASK(7, 0)) -+#define RTW89_SET_FWCMD_CXROLE_ACT_CH(cmd, val, n) \ -+ u8p_replace_bits((u8 *)(cmd) + (9 + 12 * (n)), val, GENMASK(7, 0)) -+#define RTW89_SET_FWCMD_CXROLE_ACT_TX_LVL(cmd, val, n) \ -+ le16p_replace_bits((__le16 *)((u8 *)(cmd) + (10 + 12 * (n))), val, GENMASK(15, 0)) -+#define RTW89_SET_FWCMD_CXROLE_ACT_RX_LVL(cmd, val, n) \ -+ le16p_replace_bits((__le16 *)((u8 *)(cmd) + (12 + 12 * (n))), val, GENMASK(15, 0)) -+#define RTW89_SET_FWCMD_CXROLE_ACT_TX_RATE(cmd, val, n) \ -+ le16p_replace_bits((__le16 *)((u8 *)(cmd) + (14 + 12 * (n))), val, GENMASK(15, 0)) -+#define RTW89_SET_FWCMD_CXROLE_ACT_RX_RATE(cmd, val, n) \ -+ le16p_replace_bits((__le16 *)((u8 *)(cmd) + (16 + 12 * (n))), val, GENMASK(15, 0)) -+ -+#define RTW89_SET_FWCMD_CXCTRL_MANUAL(cmd, val) \ -+ le32p_replace_bits((__le32 *)((u8 *)(cmd) + 2), val, BIT(0)) -+#define RTW89_SET_FWCMD_CXCTRL_IGNORE_BT(cmd, val) \ -+ le32p_replace_bits((__le32 *)((u8 *)(cmd) + 2), val, BIT(1)) -+#define RTW89_SET_FWCMD_CXCTRL_ALWAYS_FREERUN(cmd, val) \ -+ le32p_replace_bits((__le32 *)((u8 *)(cmd) + 2), val, BIT(2)) -+#define RTW89_SET_FWCMD_CXCTRL_TRACE_STEP(cmd, val) \ -+ le32p_replace_bits((__le32 *)((u8 *)(cmd) + 2), val, GENMASK(18, 3)) -+ -+#define RTW89_SET_FWCMD_CXRFK_STATE(cmd, val) \ -+ le32p_replace_bits((__le32 *)((u8 *)(cmd) + 2), val, GENMASK(1, 0)) -+#define RTW89_SET_FWCMD_CXRFK_PATH_MAP(cmd, val) \ -+ le32p_replace_bits((__le32 *)((u8 *)(cmd) + 2), val, GENMASK(5, 2)) -+#define RTW89_SET_FWCMD_CXRFK_PHY_MAP(cmd, val) \ -+ le32p_replace_bits((__le32 *)((u8 *)(cmd) + 2), val, GENMASK(7, 6)) -+#define RTW89_SET_FWCMD_CXRFK_BAND(cmd, val) \ -+ le32p_replace_bits((__le32 *)((u8 *)(cmd) + 2), val, GENMASK(9, 8)) -+#define RTW89_SET_FWCMD_CXRFK_TYPE(cmd, val) \ -+ le32p_replace_bits((__le32 *)((u8 *)(cmd) + 2), val, GENMASK(17, 10)) -+ -+#define RTW89_C2H_HEADER_LEN 8 -+ -+#define RTW89_GET_C2H_CATEGORY(c2h) \ -+ le32_get_bits(*((__le32 *)c2h), GENMASK(1, 0)) -+#define RTW89_GET_C2H_CLASS(c2h) \ -+ le32_get_bits(*((__le32 *)c2h), GENMASK(7, 2)) -+#define RTW89_GET_C2H_FUNC(c2h) \ -+ le32_get_bits(*((__le32 *)c2h), GENMASK(15, 8)) -+#define RTW89_GET_C2H_LEN(c2h) \ -+ le32_get_bits(*((__le32 *)(c2h) + 1), GENMASK(13, 0)) -+ -+#define RTW89_GET_C2H_LOG_SRT_PRT(c2h) (char *)((__le32 *)(c2h) + 2) -+#define RTW89_GET_C2H_LOG_LEN(len) ((len) - RTW89_C2H_HEADER_LEN) -+ -+#define RTW89_GET_MAC_C2H_DONE_ACK_CAT(c2h) \ -+ le32_get_bits(*((__le32 *)(c2h) + 2), GENMASK(1, 0)) -+#define RTW89_GET_MAC_C2H_DONE_ACK_CLASS(c2h) \ -+ le32_get_bits(*((__le32 *)(c2h) + 2), GENMASK(7, 2)) -+#define RTW89_GET_MAC_C2H_DONE_ACK_FUNC(c2h) \ -+ le32_get_bits(*((__le32 *)(c2h) + 2), GENMASK(15, 8)) -+#define RTW89_GET_MAC_C2H_DONE_ACK_H2C_RETURN(c2h) \ -+ le32_get_bits(*((__le32 *)(c2h) + 2), GENMASK(23, 16)) -+#define RTW89_GET_MAC_C2H_DONE_ACK_H2C_SEQ(c2h) \ -+ le32_get_bits(*((__le32 *)(c2h) + 2), GENMASK(31, 24)) -+ -+#define RTW89_GET_MAC_C2H_REV_ACK_CAT(c2h) \ -+ le32_get_bits(*((__le32 *)(c2h) + 2), GENMASK(1, 0)) -+#define RTW89_GET_MAC_C2H_REV_ACK_CLASS(c2h) \ -+ le32_get_bits(*((__le32 *)(c2h) + 2), GENMASK(7, 2)) -+#define RTW89_GET_MAC_C2H_REV_ACK_FUNC(c2h) \ -+ le32_get_bits(*((__le32 *)(c2h) + 2), GENMASK(15, 8)) -+#define RTW89_GET_MAC_C2H_REV_ACK_H2C_SEQ(c2h) \ -+ le32_get_bits(*((__le32 *)(c2h) + 2), GENMASK(23, 16)) -+ -+#define RTW89_GET_PHY_C2H_RA_RPT_MACID(c2h) \ -+ le32_get_bits(*((__le32 *)(c2h) + 2), GENMASK(15, 0)) -+#define RTW89_GET_PHY_C2H_RA_RPT_RETRY_RATIO(c2h) \ -+ le32_get_bits(*((__le32 *)(c2h) + 2), GENMASK(23, 16)) -+#define RTW89_GET_PHY_C2H_RA_RPT_MCSNSS(c2h) \ -+ le32_get_bits(*((__le32 *)(c2h) + 3), GENMASK(6, 0)) -+#define RTW89_GET_PHY_C2H_RA_RPT_MD_SEL(c2h) \ -+ le32_get_bits(*((__le32 *)(c2h) + 3), GENMASK(9, 8)) -+#define RTW89_GET_PHY_C2H_RA_RPT_GILTF(c2h) \ -+ le32_get_bits(*((__le32 *)(c2h) + 3), GENMASK(12, 10)) -+#define RTW89_GET_PHY_C2H_RA_RPT_BW(c2h) \ -+ le32_get_bits(*((__le32 *)(c2h) + 3), GENMASK(14, 13)) -+ -+/* VHT, HE, HT-old: [6:4]: NSS, [3:0]: MCS -+ * HT-new: [6:5]: NA, [4:0]: MCS -+ */ -+#define RTW89_RA_RATE_MASK_NSS GENMASK(6, 4) -+#define RTW89_RA_RATE_MASK_MCS GENMASK(3, 0) -+#define RTW89_RA_RATE_MASK_HT_MCS GENMASK(4, 0) -+#define RTW89_MK_HT_RATE(nss, mcs) (FIELD_PREP(GENMASK(4, 3), nss) | \ -+ FIELD_PREP(GENMASK(2, 0), mcs)) -+ -+#define RTW89_FW_HDR_SIZE 32 -+#define RTW89_FW_SECTION_HDR_SIZE 16 -+ -+#define RTW89_MFW_SIG 0xFF -+ -+struct rtw89_mfw_info { -+ u8 cv; -+ u8 type; /* enum rtw89_fw_type */ -+ u8 mp; -+ u8 rsvd; -+ __le32 shift; -+ __le32 size; -+ u8 rsvd2[4]; -+} __packed; -+ -+struct rtw89_mfw_hdr { -+ u8 sig; /* RTW89_MFW_SIG */ -+ u8 fw_nr; -+ u8 rsvd[14]; -+ struct rtw89_mfw_info info[]; -+} __packed; -+ -+struct fwcmd_hdr { -+ __le32 hdr0; -+ __le32 hdr1; -+}; -+ -+#define RTW89_H2C_RF_PAGE_SIZE 500 -+#define RTW89_H2C_RF_PAGE_NUM 3 -+struct rtw89_fw_h2c_rf_reg_info { -+ enum rtw89_rf_path rf_path; -+ __le32 rtw89_phy_config_rf_h2c[RTW89_H2C_RF_PAGE_NUM][RTW89_H2C_RF_PAGE_SIZE]; -+ u16 curr_idx; -+}; -+ -+#define H2C_SEC_CAM_LEN 24 -+ -+#define H2C_HEADER_LEN 8 -+#define H2C_HDR_CAT GENMASK(1, 0) -+#define H2C_HDR_CLASS GENMASK(7, 2) -+#define H2C_HDR_FUNC GENMASK(15, 8) -+#define H2C_HDR_DEL_TYPE GENMASK(19, 16) -+#define H2C_HDR_H2C_SEQ GENMASK(31, 24) -+#define H2C_HDR_TOTAL_LEN GENMASK(13, 0) -+#define H2C_HDR_REC_ACK BIT(14) -+#define H2C_HDR_DONE_ACK BIT(15) -+ -+#define FWCMD_TYPE_H2C 0 -+ -+#define H2C_CAT_MAC 0x1 -+ -+/* CLASS 0 - FW INFO */ -+#define H2C_CL_FW_INFO 0x0 -+#define H2C_FUNC_LOG_CFG 0x0 -+#define H2C_FUNC_MAC_GENERAL_PKT 0x1 -+ -+/* CLASS 2 - PS */ -+#define H2C_CL_MAC_PS 0x2 -+#define H2C_FUNC_MAC_LPS_PARM 0x0 -+ -+/* CLASS 3 - FW download */ -+#define H2C_CL_MAC_FWDL 0x3 -+#define H2C_FUNC_MAC_FWHDR_DL 0x0 -+ -+/* CLASS 5 - Frame Exchange */ -+#define H2C_CL_MAC_FR_EXCHG 0x5 -+#define H2C_FUNC_MAC_CCTLINFO_UD 0x2 -+ -+/* CLASS 6 - Address CAM */ -+#define H2C_CL_MAC_ADDR_CAM_UPDATE 0x6 -+#define H2C_FUNC_MAC_ADDR_CAM_UPD 0x0 -+ -+/* CLASS 8 - Media Status Report */ -+#define H2C_CL_MAC_MEDIA_RPT 0x8 -+#define H2C_FUNC_MAC_JOININFO 0x0 -+#define H2C_FUNC_MAC_FWROLE_MAINTAIN 0x4 -+ -+/* CLASS 9 - FW offload */ -+#define H2C_CL_MAC_FW_OFLD 0x9 -+#define H2C_FUNC_MAC_MACID_PAUSE 0x8 -+#define H2C_FUNC_USR_EDCA 0xF -+#define H2C_FUNC_OFLD_CFG 0x14 -+ -+/* CLASS 10 - Security CAM */ -+#define H2C_CL_MAC_SEC_CAM 0xa -+#define H2C_FUNC_MAC_SEC_UPD 0x1 -+ -+/* CLASS 12 - BA CAM */ -+#define H2C_CL_BA_CAM 0xc -+#define H2C_FUNC_MAC_BA_CAM 0x0 -+ -+#define H2C_CAT_OUTSRC 0x2 -+ -+#define H2C_CL_OUTSRC_RA 0x1 -+#define H2C_FUNC_OUTSRC_RA_MACIDCFG 0x0 -+ -+#define H2C_CL_OUTSRC_RF_REG_A 0x8 -+#define H2C_CL_OUTSRC_RF_REG_B 0x9 -+ -+int rtw89_fw_check_rdy(struct rtw89_dev *rtwdev); -+int rtw89_fw_recognize(struct rtw89_dev *rtwdev); -+int rtw89_fw_download(struct rtw89_dev *rtwdev, enum rtw89_fw_type type); -+int rtw89_load_firmware(struct rtw89_dev *rtwdev); -+void rtw89_unload_firmware(struct rtw89_dev *rtwdev); -+int rtw89_wait_firmware_completion(struct rtw89_dev *rtwdev); -+void rtw89_h2c_pkt_set_hdr(struct rtw89_dev *rtwdev, struct sk_buff *skb, -+ u8 type, u8 cat, u8 class, u8 func, -+ bool rack, bool dack, u32 len); -+int rtw89_fw_h2c_default_cmac_tbl(struct rtw89_dev *rtwdev, u8 macid); -+int rtw89_fw_h2c_assoc_cmac_tbl(struct rtw89_dev *rtwdev, -+ struct ieee80211_vif *vif, -+ struct ieee80211_sta *sta); -+int rtw89_fw_h2c_txtime_cmac_tbl(struct rtw89_dev *rtwdev, -+ struct rtw89_sta *rtwsta); -+int rtw89_fw_h2c_cam(struct rtw89_dev *rtwdev, struct rtw89_vif *vif); -+void rtw89_fw_c2h_irqsafe(struct rtw89_dev *rtwdev, struct sk_buff *c2h); -+void rtw89_fw_c2h_work(struct work_struct *work); -+int rtw89_fw_h2c_vif_maintain(struct rtw89_dev *rtwdev, -+ struct rtw89_vif *rtwvif, -+ enum rtw89_upd_mode upd_mode); -+int rtw89_fw_h2c_join_info(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif, -+ u8 dis_conn); -+int rtw89_fw_h2c_macid_pause(struct rtw89_dev *rtwdev, u8 sh, u8 grp, -+ bool pause); -+int rtw89_fw_h2c_set_edca(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif, -+ u8 ac, u32 val); -+int rtw89_fw_h2c_set_ofld_cfg(struct rtw89_dev *rtwdev); -+int rtw89_fw_h2c_ra(struct rtw89_dev *rtwdev, struct rtw89_ra_info *ra, bool csi); -+int rtw89_fw_h2c_cxdrv_init(struct rtw89_dev *rtwdev); -+int rtw89_fw_h2c_cxdrv_role(struct rtw89_dev *rtwdev); -+int rtw89_fw_h2c_cxdrv_ctrl(struct rtw89_dev *rtwdev); -+int rtw89_fw_h2c_cxdrv_rfk(struct rtw89_dev *rtwdev); -+int rtw89_fw_h2c_rf_reg(struct rtw89_dev *rtwdev, -+ struct rtw89_fw_h2c_rf_reg_info *info, -+ u16 len, u8 page); -+int rtw89_fw_h2c_raw_with_hdr(struct rtw89_dev *rtwdev, -+ u8 h2c_class, u8 h2c_func, u8 *buf, u16 len, -+ bool rack, bool dack); -+int rtw89_fw_h2c_raw(struct rtw89_dev *rtwdev, const u8 *buf, u16 len); -+void rtw89_fw_send_all_early_h2c(struct rtw89_dev *rtwdev); -+void rtw89_fw_free_all_early_h2c(struct rtw89_dev *rtwdev); -+int rtw89_fw_h2c_general_pkt(struct rtw89_dev *rtwdev, u8 macid); -+int rtw89_fw_h2c_ba_cam(struct rtw89_dev *rtwdev, bool valid, u8 macid, -+ struct ieee80211_ampdu_params *params); -+int rtw89_fw_h2c_lps_parm(struct rtw89_dev *rtwdev, -+ struct rtw89_lps_parm *lps_param); -+struct sk_buff *rtw89_fw_h2c_alloc_skb_with_hdr(u32 len); -+struct sk_buff *rtw89_fw_h2c_alloc_skb_no_hdr(u32 len); -+int rtw89_fw_msg_reg(struct rtw89_dev *rtwdev, -+ struct rtw89_mac_h2c_info *h2c_info, -+ struct rtw89_mac_c2h_info *c2h_info); -+int rtw89_fw_h2c_fw_log(struct rtw89_dev *rtwdev, bool enable); -+void rtw89_fw_st_dbg_dump(struct rtw89_dev *rtwdev); -+ -+#endif -diff --git a/drivers/net/wireless/realtek/rtw89/mac.c b/drivers/net/wireless/realtek/rtw89/mac.c -new file mode 100644 -index 000000000000..0171a5a7b1de ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/mac.c -@@ -0,0 +1,3838 @@ -+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause -+/* Copyright(c) 2019-2020 Realtek Corporation -+ */ -+ -+#include "cam.h" -+#include "debug.h" -+#include "fw.h" -+#include "mac.h" -+#include "ps.h" -+#include "reg.h" -+#include "util.h" -+ -+int rtw89_mac_check_mac_en(struct rtw89_dev *rtwdev, u8 mac_idx, -+ enum rtw89_mac_hwmod_sel sel) -+{ -+ u32 val, r_val; -+ -+ if (sel == RTW89_DMAC_SEL) { -+ r_val = rtw89_read32(rtwdev, R_AX_DMAC_FUNC_EN); -+ val = (B_AX_MAC_FUNC_EN | B_AX_DMAC_FUNC_EN); -+ } else if (sel == RTW89_CMAC_SEL && mac_idx == 0) { -+ r_val = rtw89_read32(rtwdev, R_AX_CMAC_FUNC_EN); -+ val = B_AX_CMAC_EN; -+ } else if (sel == RTW89_CMAC_SEL && mac_idx == 1) { -+ r_val = rtw89_read32(rtwdev, R_AX_SYS_ISO_CTRL_EXTEND); -+ val = B_AX_CMAC1_FEN; -+ } else { -+ return -EINVAL; -+ } -+ if (r_val == RTW89_R32_EA || r_val == RTW89_R32_DEAD || -+ (val & r_val) != val) -+ return -EFAULT; -+ -+ return 0; -+} -+ -+int rtw89_mac_write_lte(struct rtw89_dev *rtwdev, const u32 offset, u32 val) -+{ -+ u8 lte_ctrl; -+ int ret; -+ -+ ret = read_poll_timeout(rtw89_read8, lte_ctrl, (lte_ctrl & BIT(5)) != 0, -+ 50, 50000, false, rtwdev, R_AX_LTE_CTRL + 3); -+ if (ret) -+ rtw89_err(rtwdev, "[ERR]lte not ready(W)\n"); -+ -+ rtw89_write32(rtwdev, R_AX_LTE_WDATA, val); -+ rtw89_write32(rtwdev, R_AX_LTE_CTRL, 0xC00F0000 | offset); -+ -+ return ret; -+} -+ -+int rtw89_mac_read_lte(struct rtw89_dev *rtwdev, const u32 offset, u32 *val) -+{ -+ u8 lte_ctrl; -+ int ret; -+ -+ ret = read_poll_timeout(rtw89_read8, lte_ctrl, (lte_ctrl & BIT(5)) != 0, -+ 50, 50000, false, rtwdev, R_AX_LTE_CTRL + 3); -+ if (ret) -+ rtw89_err(rtwdev, "[ERR]lte not ready(W)\n"); -+ -+ rtw89_write32(rtwdev, R_AX_LTE_CTRL, 0x800F0000 | offset); -+ *val = rtw89_read32(rtwdev, R_AX_LTE_RDATA); -+ -+ return ret; -+} -+ -+static -+int dle_dfi_ctrl(struct rtw89_dev *rtwdev, struct rtw89_mac_dle_dfi_ctrl *ctrl) -+{ -+ u32 ctrl_reg, data_reg, ctrl_data; -+ u32 val; -+ int ret; -+ -+ switch (ctrl->type) { -+ case DLE_CTRL_TYPE_WDE: -+ ctrl_reg = R_AX_WDE_DBG_FUN_INTF_CTL; -+ data_reg = R_AX_WDE_DBG_FUN_INTF_DATA; -+ ctrl_data = FIELD_PREP(B_AX_WDE_DFI_TRGSEL_MASK, ctrl->target) | -+ FIELD_PREP(B_AX_WDE_DFI_ADDR_MASK, ctrl->addr) | -+ B_AX_WDE_DFI_ACTIVE; -+ break; -+ case DLE_CTRL_TYPE_PLE: -+ ctrl_reg = R_AX_PLE_DBG_FUN_INTF_CTL; -+ data_reg = R_AX_PLE_DBG_FUN_INTF_DATA; -+ ctrl_data = FIELD_PREP(B_AX_PLE_DFI_TRGSEL_MASK, ctrl->target) | -+ FIELD_PREP(B_AX_PLE_DFI_ADDR_MASK, ctrl->addr) | -+ B_AX_PLE_DFI_ACTIVE; -+ break; -+ default: -+ rtw89_warn(rtwdev, "[ERR] dfi ctrl type %d\n", ctrl->type); -+ return -EINVAL; -+ } -+ -+ rtw89_write32(rtwdev, ctrl_reg, ctrl_data); -+ -+ ret = read_poll_timeout_atomic(rtw89_read32, val, !(val & B_AX_WDE_DFI_ACTIVE), -+ 1, 1000, false, rtwdev, ctrl_reg); -+ if (ret) { -+ rtw89_warn(rtwdev, "[ERR] dle dfi ctrl 0x%X set 0x%X timeout\n", -+ ctrl_reg, ctrl_data); -+ return ret; -+ } -+ -+ ctrl->out_data = rtw89_read32(rtwdev, data_reg); -+ return 0; -+} -+ -+static int dle_dfi_quota(struct rtw89_dev *rtwdev, -+ struct rtw89_mac_dle_dfi_quota *quota) -+{ -+ struct rtw89_mac_dle_dfi_ctrl ctrl; -+ int ret; -+ -+ ctrl.type = quota->dle_type; -+ ctrl.target = DLE_DFI_TYPE_QUOTA; -+ ctrl.addr = quota->qtaid; -+ ret = dle_dfi_ctrl(rtwdev, &ctrl); -+ if (ret) { -+ rtw89_warn(rtwdev, "[ERR]dle_dfi_ctrl %d\n", ret); -+ return ret; -+ } -+ -+ quota->rsv_pgnum = FIELD_GET(B_AX_DLE_RSV_PGNUM, ctrl.out_data); -+ quota->use_pgnum = FIELD_GET(B_AX_DLE_USE_PGNUM, ctrl.out_data); -+ return 0; -+} -+ -+static int dle_dfi_qempty(struct rtw89_dev *rtwdev, -+ struct rtw89_mac_dle_dfi_qempty *qempty) -+{ -+ struct rtw89_mac_dle_dfi_ctrl ctrl; -+ u32 ret; -+ -+ ctrl.type = qempty->dle_type; -+ ctrl.target = DLE_DFI_TYPE_QEMPTY; -+ ctrl.addr = qempty->grpsel; -+ ret = dle_dfi_ctrl(rtwdev, &ctrl); -+ if (ret) { -+ rtw89_warn(rtwdev, "[ERR]dle_dfi_ctrl %d\n", ret); -+ return ret; -+ } -+ -+ qempty->qempty = FIELD_GET(B_AX_DLE_QEMPTY_GRP, ctrl.out_data); -+ return 0; -+} -+ -+static void dump_err_status_dispatcher(struct rtw89_dev *rtwdev) -+{ -+ rtw89_info(rtwdev, "R_AX_HOST_DISPATCHER_ALWAYS_IMR=0x%08x ", -+ rtw89_read32(rtwdev, R_AX_HOST_DISPATCHER_ERR_IMR)); -+ rtw89_info(rtwdev, "R_AX_HOST_DISPATCHER_ALWAYS_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_HOST_DISPATCHER_ERR_ISR)); -+ rtw89_info(rtwdev, "R_AX_CPU_DISPATCHER_ALWAYS_IMR=0x%08x ", -+ rtw89_read32(rtwdev, R_AX_CPU_DISPATCHER_ERR_IMR)); -+ rtw89_info(rtwdev, "R_AX_CPU_DISPATCHER_ALWAYS_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_CPU_DISPATCHER_ERR_ISR)); -+ rtw89_info(rtwdev, "R_AX_OTHER_DISPATCHER_ALWAYS_IMR=0x%08x ", -+ rtw89_read32(rtwdev, R_AX_OTHER_DISPATCHER_ERR_IMR)); -+ rtw89_info(rtwdev, "R_AX_OTHER_DISPATCHER_ALWAYS_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_OTHER_DISPATCHER_ERR_ISR)); -+} -+ -+static void rtw89_mac_dump_qta_lost(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_mac_dle_dfi_qempty qempty; -+ struct rtw89_mac_dle_dfi_quota quota; -+ struct rtw89_mac_dle_dfi_ctrl ctrl; -+ u32 val, not_empty, i; -+ int ret; -+ -+ qempty.dle_type = DLE_CTRL_TYPE_PLE; -+ qempty.grpsel = 0; -+ ret = dle_dfi_qempty(rtwdev, &qempty); -+ if (ret) -+ rtw89_warn(rtwdev, "%s: query DLE fail\n", __func__); -+ else -+ rtw89_info(rtwdev, "DLE group0 empty: 0x%x\n", qempty.qempty); -+ -+ for (not_empty = ~qempty.qempty, i = 0; not_empty != 0; not_empty >>= 1, i++) { -+ if (!(not_empty & BIT(0))) -+ continue; -+ ctrl.type = DLE_CTRL_TYPE_PLE; -+ ctrl.target = DLE_DFI_TYPE_QLNKTBL; -+ ctrl.addr = (QLNKTBL_ADDR_INFO_SEL_0 ? QLNKTBL_ADDR_INFO_SEL : 0) | -+ FIELD_PREP(QLNKTBL_ADDR_TBL_IDX_MASK, i); -+ ret = dle_dfi_ctrl(rtwdev, &ctrl); -+ if (ret) -+ rtw89_warn(rtwdev, "%s: query DLE fail\n", __func__); -+ else -+ rtw89_info(rtwdev, "qidx%d pktcnt = %ld\n", i, -+ FIELD_GET(QLNKTBL_DATA_SEL1_PKT_CNT_MASK, -+ ctrl.out_data)); -+ } -+ -+ quota.dle_type = DLE_CTRL_TYPE_PLE; -+ quota.qtaid = 6; -+ ret = dle_dfi_quota(rtwdev, "a); -+ if (ret) -+ rtw89_warn(rtwdev, "%s: query DLE fail\n", __func__); -+ else -+ rtw89_info(rtwdev, "quota6 rsv/use: 0x%x/0x%x\n", -+ quota.rsv_pgnum, quota.use_pgnum); -+ -+ val = rtw89_read32(rtwdev, R_AX_PLE_QTA6_CFG); -+ rtw89_info(rtwdev, "[PLE][CMAC0_RX]min_pgnum=0x%lx\n", -+ FIELD_GET(B_AX_PLE_Q6_MIN_SIZE_MASK, val)); -+ rtw89_info(rtwdev, "[PLE][CMAC0_RX]max_pgnum=0x%lx\n", -+ FIELD_GET(B_AX_PLE_Q6_MAX_SIZE_MASK, val)); -+ -+ dump_err_status_dispatcher(rtwdev); -+} -+ -+static void rtw89_mac_dump_l0_to_l1(struct rtw89_dev *rtwdev, -+ enum mac_ax_err_info err) -+{ -+ u32 dbg, event; -+ -+ dbg = rtw89_read32(rtwdev, R_AX_SER_DBG_INFO); -+ event = FIELD_GET(B_AX_L0_TO_L1_EVENT_MASK, dbg); -+ -+ switch (event) { -+ case MAC_AX_L0_TO_L1_RX_QTA_LOST: -+ rtw89_info(rtwdev, "quota lost!\n"); -+ rtw89_mac_dump_qta_lost(rtwdev); -+ break; -+ default: -+ break; -+ } -+} -+ -+static void rtw89_mac_dump_err_status(struct rtw89_dev *rtwdev, -+ enum mac_ax_err_info err) -+{ -+ u32 dmac_err, cmac_err; -+ -+ if (err != MAC_AX_ERR_L1_ERR_DMAC && -+ err != MAC_AX_ERR_L0_PROMOTE_TO_L1) -+ return; -+ -+ rtw89_info(rtwdev, "--->\nerr=0x%x\n", err); -+ rtw89_info(rtwdev, "R_AX_SER_DBG_INFO =0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_SER_DBG_INFO)); -+ -+ cmac_err = rtw89_read32(rtwdev, R_AX_CMAC_ERR_ISR); -+ rtw89_info(rtwdev, "R_AX_CMAC_ERR_ISR =0x%08x\n", cmac_err); -+ dmac_err = rtw89_read32(rtwdev, R_AX_DMAC_ERR_ISR); -+ rtw89_info(rtwdev, "R_AX_DMAC_ERR_ISR =0x%08x\n", dmac_err); -+ -+ if (dmac_err) { -+ rtw89_info(rtwdev, "R_AX_WDE_ERR_FLAG_CFG =0x%08x ", -+ rtw89_read32(rtwdev, R_AX_WDE_ERR_FLAG_CFG)); -+ rtw89_info(rtwdev, "R_AX_PLE_ERR_FLAG_CFG =0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_PLE_ERR_FLAG_CFG)); -+ } -+ -+ if (dmac_err & B_AX_WDRLS_ERR_FLAG) { -+ rtw89_info(rtwdev, "R_AX_WDRLS_ERR_IMR =0x%08x ", -+ rtw89_read32(rtwdev, R_AX_WDRLS_ERR_IMR)); -+ rtw89_info(rtwdev, "R_AX_WDRLS_ERR_ISR =0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_WDRLS_ERR_ISR)); -+ } -+ -+ if (dmac_err & B_AX_WSEC_ERR_FLAG) { -+ rtw89_info(rtwdev, "R_AX_SEC_ERR_IMR_ISR =0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_SEC_DEBUG)); -+ rtw89_info(rtwdev, "SEC_local_Register 0x9D00 =0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_SEC_ENG_CTRL)); -+ rtw89_info(rtwdev, "SEC_local_Register 0x9D04 =0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_SEC_MPDU_PROC)); -+ rtw89_info(rtwdev, "SEC_local_Register 0x9D10 =0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_SEC_CAM_ACCESS)); -+ rtw89_info(rtwdev, "SEC_local_Register 0x9D14 =0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_SEC_CAM_RDATA)); -+ rtw89_info(rtwdev, "SEC_local_Register 0x9D18 =0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_SEC_CAM_WDATA)); -+ rtw89_info(rtwdev, "SEC_local_Register 0x9D20 =0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_SEC_TX_DEBUG)); -+ rtw89_info(rtwdev, "SEC_local_Register 0x9D24 =0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_SEC_RX_DEBUG)); -+ rtw89_info(rtwdev, "SEC_local_Register 0x9D28 =0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_SEC_TRX_PKT_CNT)); -+ rtw89_info(rtwdev, "SEC_local_Register 0x9D2C =0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_SEC_TRX_BLK_CNT)); -+ } -+ -+ if (dmac_err & B_AX_MPDU_ERR_FLAG) { -+ rtw89_info(rtwdev, "R_AX_MPDU_TX_ERR_IMR =0x%08x ", -+ rtw89_read32(rtwdev, R_AX_MPDU_TX_ERR_IMR)); -+ rtw89_info(rtwdev, "R_AX_MPDU_TX_ERR_ISR =0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_MPDU_TX_ERR_ISR)); -+ rtw89_info(rtwdev, "R_AX_MPDU_RX_ERR_IMR =0x%08x ", -+ rtw89_read32(rtwdev, R_AX_MPDU_RX_ERR_IMR)); -+ rtw89_info(rtwdev, "R_AX_MPDU_RX_ERR_ISR =0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_MPDU_RX_ERR_ISR)); -+ } -+ -+ if (dmac_err & B_AX_STA_SCHEDULER_ERR_FLAG) { -+ rtw89_info(rtwdev, "R_AX_STA_SCHEDULER_ERR_IMR =0x%08x ", -+ rtw89_read32(rtwdev, R_AX_STA_SCHEDULER_ERR_IMR)); -+ rtw89_info(rtwdev, "R_AX_STA_SCHEDULER_ERR_ISR= 0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_STA_SCHEDULER_ERR_ISR)); -+ } -+ -+ if (dmac_err & B_AX_WDE_DLE_ERR_FLAG) { -+ rtw89_info(rtwdev, "R_AX_WDE_ERR_IMR=0x%08x ", -+ rtw89_read32(rtwdev, R_AX_WDE_ERR_IMR)); -+ rtw89_info(rtwdev, "R_AX_WDE_ERR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_WDE_ERR_ISR)); -+ rtw89_info(rtwdev, "R_AX_PLE_ERR_IMR=0x%08x ", -+ rtw89_read32(rtwdev, R_AX_PLE_ERR_IMR)); -+ rtw89_info(rtwdev, "R_AX_PLE_ERR_FLAG_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_PLE_ERR_FLAG_ISR)); -+ dump_err_status_dispatcher(rtwdev); -+ } -+ -+ if (dmac_err & B_AX_TXPKTCTRL_ERR_FLAG) { -+ rtw89_info(rtwdev, "R_AX_TXPKTCTL_ERR_IMR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_TXPKTCTL_ERR_IMR_ISR)); -+ rtw89_info(rtwdev, "R_AX_TXPKTCTL_ERR_IMR_ISR_B1=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_TXPKTCTL_ERR_IMR_ISR_B1)); -+ } -+ -+ if (dmac_err & B_AX_PLE_DLE_ERR_FLAG) { -+ rtw89_info(rtwdev, "R_AX_WDE_ERR_IMR=0x%08x ", -+ rtw89_read32(rtwdev, R_AX_WDE_ERR_IMR)); -+ rtw89_info(rtwdev, "R_AX_WDE_ERR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_WDE_ERR_ISR)); -+ rtw89_info(rtwdev, "R_AX_PLE_ERR_IMR=0x%08x ", -+ rtw89_read32(rtwdev, R_AX_PLE_ERR_IMR)); -+ rtw89_info(rtwdev, "R_AX_PLE_ERR_FLAG_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_PLE_ERR_FLAG_ISR)); -+ rtw89_info(rtwdev, "R_AX_WD_CPUQ_OP_0=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_WD_CPUQ_OP_0)); -+ rtw89_info(rtwdev, "R_AX_WD_CPUQ_OP_1=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_WD_CPUQ_OP_1)); -+ rtw89_info(rtwdev, "R_AX_WD_CPUQ_OP_2=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_WD_CPUQ_OP_2)); -+ rtw89_info(rtwdev, "R_AX_WD_CPUQ_OP_STATUS=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_WD_CPUQ_OP_STATUS)); -+ rtw89_info(rtwdev, "R_AX_PL_CPUQ_OP_0=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_PL_CPUQ_OP_0)); -+ rtw89_info(rtwdev, "R_AX_PL_CPUQ_OP_1=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_PL_CPUQ_OP_1)); -+ rtw89_info(rtwdev, "R_AX_PL_CPUQ_OP_2=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_PL_CPUQ_OP_2)); -+ rtw89_info(rtwdev, "R_AX_PL_CPUQ_OP_STATUS=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_PL_CPUQ_OP_STATUS)); -+ rtw89_info(rtwdev, "R_AX_RXDMA_PKT_INFO_0=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_RXDMA_PKT_INFO_0)); -+ rtw89_info(rtwdev, "R_AX_RXDMA_PKT_INFO_1=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_RXDMA_PKT_INFO_1)); -+ rtw89_info(rtwdev, "R_AX_RXDMA_PKT_INFO_2=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_RXDMA_PKT_INFO_2)); -+ dump_err_status_dispatcher(rtwdev); -+ } -+ -+ if (dmac_err & B_AX_PKTIN_ERR_FLAG) { -+ rtw89_info(rtwdev, "R_AX_PKTIN_ERR_IMR =0x%08x ", -+ rtw89_read32(rtwdev, R_AX_PKTIN_ERR_IMR)); -+ rtw89_info(rtwdev, "R_AX_PKTIN_ERR_ISR =0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_PKTIN_ERR_ISR)); -+ rtw89_info(rtwdev, "R_AX_PKTIN_ERR_IMR =0x%08x ", -+ rtw89_read32(rtwdev, R_AX_PKTIN_ERR_IMR)); -+ rtw89_info(rtwdev, "R_AX_PKTIN_ERR_ISR =0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_PKTIN_ERR_ISR)); -+ } -+ -+ if (dmac_err & B_AX_DISPATCH_ERR_FLAG) -+ dump_err_status_dispatcher(rtwdev); -+ -+ if (dmac_err & B_AX_DLE_CPUIO_ERR_FLAG) { -+ rtw89_info(rtwdev, "R_AX_CPUIO_ERR_IMR=0x%08x ", -+ rtw89_read32(rtwdev, R_AX_CPUIO_ERR_IMR)); -+ rtw89_info(rtwdev, "R_AX_CPUIO_ERR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_CPUIO_ERR_ISR)); -+ } -+ -+ if (dmac_err & BIT(11)) { -+ rtw89_info(rtwdev, "R_AX_BBRPT_COM_ERR_IMR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_BBRPT_COM_ERR_IMR_ISR)); -+ } -+ -+ if (cmac_err & B_AX_SCHEDULE_TOP_ERR_IND) { -+ rtw89_info(rtwdev, "R_AX_SCHEDULE_ERR_IMR=0x%08x ", -+ rtw89_read32(rtwdev, R_AX_SCHEDULE_ERR_IMR)); -+ rtw89_info(rtwdev, "R_AX_SCHEDULE_ERR_ISR=0x%04x\n", -+ rtw89_read16(rtwdev, R_AX_SCHEDULE_ERR_ISR)); -+ } -+ -+ if (cmac_err & B_AX_PTCL_TOP_ERR_IND) { -+ rtw89_info(rtwdev, "R_AX_PTCL_IMR0=0x%08x ", -+ rtw89_read32(rtwdev, R_AX_PTCL_IMR0)); -+ rtw89_info(rtwdev, "R_AX_PTCL_ISR0=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_PTCL_ISR0)); -+ } -+ -+ if (cmac_err & B_AX_DMA_TOP_ERR_IND) { -+ rtw89_info(rtwdev, "R_AX_DLE_CTRL=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_DLE_CTRL)); -+ } -+ -+ if (cmac_err & B_AX_PHYINTF_ERR_IND) { -+ rtw89_info(rtwdev, "R_AX_PHYINFO_ERR_IMR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_PHYINFO_ERR_IMR)); -+ } -+ -+ if (cmac_err & B_AX_TXPWR_CTRL_ERR_IND) { -+ rtw89_info(rtwdev, "R_AX_TXPWR_IMR=0x%08x ", -+ rtw89_read32(rtwdev, R_AX_TXPWR_IMR)); -+ rtw89_info(rtwdev, "R_AX_TXPWR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_TXPWR_ISR)); -+ } -+ -+ if (cmac_err & B_AX_WMAC_RX_ERR_IND) { -+ rtw89_info(rtwdev, "R_AX_DBGSEL_TRXPTCL=0x%08x ", -+ rtw89_read32(rtwdev, R_AX_DBGSEL_TRXPTCL)); -+ rtw89_info(rtwdev, "R_AX_PHYINFO_ERR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_PHYINFO_ERR_ISR)); -+ } -+ -+ if (cmac_err & B_AX_WMAC_TX_ERR_IND) { -+ rtw89_info(rtwdev, "R_AX_TMAC_ERR_IMR_ISR=0x%08x ", -+ rtw89_read32(rtwdev, R_AX_TMAC_ERR_IMR_ISR)); -+ rtw89_info(rtwdev, "R_AX_DBGSEL_TRXPTCL=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_DBGSEL_TRXPTCL)); -+ } -+ -+ rtwdev->hci.ops->dump_err_status(rtwdev); -+ -+ if (err == MAC_AX_ERR_L0_PROMOTE_TO_L1) -+ rtw89_mac_dump_l0_to_l1(rtwdev, err); -+ -+ rtw89_info(rtwdev, "<---\n"); -+} -+ -+u32 rtw89_mac_get_err_status(struct rtw89_dev *rtwdev) -+{ -+ u32 err; -+ int ret; -+ -+ ret = read_poll_timeout(rtw89_read32, err, (err != 0), 1000, 100000, -+ false, rtwdev, R_AX_HALT_C2H_CTRL); -+ if (ret) { -+ rtw89_warn(rtwdev, "Polling FW err status fail\n"); -+ return ret; -+ } -+ -+ err = rtw89_read32(rtwdev, R_AX_HALT_C2H); -+ rtw89_write32(rtwdev, R_AX_HALT_C2H_CTRL, 0); -+ -+ rtw89_fw_st_dbg_dump(rtwdev); -+ rtw89_mac_dump_err_status(rtwdev, err); -+ -+ return err; -+} -+EXPORT_SYMBOL(rtw89_mac_get_err_status); -+ -+int rtw89_mac_set_err_status(struct rtw89_dev *rtwdev, u32 err) -+{ -+ u32 halt; -+ int ret = 0; -+ -+ if (err > MAC_AX_SET_ERR_MAX) { -+ rtw89_err(rtwdev, "Bad set-err-status value 0x%08x\n", err); -+ return -EINVAL; -+ } -+ -+ ret = read_poll_timeout(rtw89_read32, halt, (halt == 0x0), 1000, -+ 100000, false, rtwdev, R_AX_HALT_H2C_CTRL); -+ if (ret) { -+ rtw89_err(rtwdev, "FW doesn't receive previous msg\n"); -+ return -EFAULT; -+ } -+ -+ rtw89_write32(rtwdev, R_AX_HALT_H2C, err); -+ rtw89_write32(rtwdev, R_AX_HALT_H2C_CTRL, B_AX_HALT_H2C_TRIGGER); -+ -+ return 0; -+} -+EXPORT_SYMBOL(rtw89_mac_set_err_status); -+ -+const struct rtw89_hfc_prec_cfg rtw_hfc_preccfg_pcie = { -+ 2, 40, 0, 0, 1, 0, 0, 0 -+}; -+ -+static int hfc_reset_param(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_hfc_param *param = &rtwdev->mac.hfc_param; -+ struct rtw89_hfc_param_ini param_ini = {NULL}; -+ u8 qta_mode = rtwdev->mac.dle_info.qta_mode; -+ -+ switch (rtwdev->hci.type) { -+ case RTW89_HCI_TYPE_PCIE: -+ param_ini = rtwdev->chip->hfc_param_ini[qta_mode]; -+ param->en = 0; -+ break; -+ default: -+ return -EINVAL; -+ } -+ -+ if (param_ini.pub_cfg) -+ param->pub_cfg = *param_ini.pub_cfg; -+ -+ if (param_ini.prec_cfg) { -+ param->prec_cfg = *param_ini.prec_cfg; -+ rtwdev->hal.sw_amsdu_max_size = -+ param->prec_cfg.wp_ch07_prec * HFC_PAGE_UNIT; -+ } -+ -+ if (param_ini.ch_cfg) -+ param->ch_cfg = param_ini.ch_cfg; -+ -+ memset(¶m->ch_info, 0, sizeof(param->ch_info)); -+ memset(¶m->pub_info, 0, sizeof(param->pub_info)); -+ param->mode = param_ini.mode; -+ -+ return 0; -+} -+ -+static int hfc_ch_cfg_chk(struct rtw89_dev *rtwdev, u8 ch) -+{ -+ struct rtw89_hfc_param *param = &rtwdev->mac.hfc_param; -+ const struct rtw89_hfc_ch_cfg *ch_cfg = param->ch_cfg; -+ const struct rtw89_hfc_pub_cfg *pub_cfg = ¶m->pub_cfg; -+ const struct rtw89_hfc_prec_cfg *prec_cfg = ¶m->prec_cfg; -+ -+ if (ch >= RTW89_DMA_CH_NUM) -+ return -EINVAL; -+ -+ if ((ch_cfg[ch].min && ch_cfg[ch].min < prec_cfg->ch011_prec) || -+ ch_cfg[ch].max > pub_cfg->pub_max) -+ return -EINVAL; -+ if (ch_cfg[ch].grp >= grp_num) -+ return -EINVAL; -+ -+ return 0; -+} -+ -+static int hfc_pub_info_chk(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_hfc_param *param = &rtwdev->mac.hfc_param; -+ const struct rtw89_hfc_pub_cfg *cfg = ¶m->pub_cfg; -+ struct rtw89_hfc_pub_info *info = ¶m->pub_info; -+ -+ if (info->g0_used + info->g1_used + info->pub_aval != cfg->pub_max) { -+ if (rtwdev->chip->chip_id == RTL8852A) -+ return 0; -+ else -+ return -EFAULT; -+ } -+ -+ return 0; -+} -+ -+static int hfc_pub_cfg_chk(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_hfc_param *param = &rtwdev->mac.hfc_param; -+ const struct rtw89_hfc_pub_cfg *pub_cfg = ¶m->pub_cfg; -+ -+ if (pub_cfg->grp0 + pub_cfg->grp1 != pub_cfg->pub_max) -+ return 0; -+ -+ return 0; -+} -+ -+static int hfc_ch_ctrl(struct rtw89_dev *rtwdev, u8 ch) -+{ -+ struct rtw89_hfc_param *param = &rtwdev->mac.hfc_param; -+ const struct rtw89_hfc_ch_cfg *cfg = param->ch_cfg; -+ int ret = 0; -+ u32 val = 0; -+ -+ ret = rtw89_mac_check_mac_en(rtwdev, RTW89_MAC_0, RTW89_DMAC_SEL); -+ if (ret) -+ return ret; -+ -+ ret = hfc_ch_cfg_chk(rtwdev, ch); -+ if (ret) -+ return ret; -+ -+ if (ch > RTW89_DMA_B1HI) -+ return -EINVAL; -+ -+ val = u32_encode_bits(cfg[ch].min, B_AX_MIN_PG_MASK) | -+ u32_encode_bits(cfg[ch].max, B_AX_MAX_PG_MASK) | -+ (cfg[ch].grp ? B_AX_GRP : 0); -+ rtw89_write32(rtwdev, R_AX_ACH0_PAGE_CTRL + ch * 4, val); -+ -+ return 0; -+} -+ -+static int hfc_upd_ch_info(struct rtw89_dev *rtwdev, u8 ch) -+{ -+ struct rtw89_hfc_param *param = &rtwdev->mac.hfc_param; -+ struct rtw89_hfc_ch_info *info = param->ch_info; -+ const struct rtw89_hfc_ch_cfg *cfg = param->ch_cfg; -+ u32 val; -+ u32 ret; -+ -+ ret = rtw89_mac_check_mac_en(rtwdev, RTW89_MAC_0, RTW89_DMAC_SEL); -+ if (ret) -+ return ret; -+ -+ if (ch > RTW89_DMA_H2C) -+ return -EINVAL; -+ -+ val = rtw89_read32(rtwdev, R_AX_ACH0_PAGE_INFO + ch * 4); -+ info[ch].aval = u32_get_bits(val, B_AX_AVAL_PG_MASK); -+ if (ch < RTW89_DMA_H2C) -+ info[ch].used = u32_get_bits(val, B_AX_USE_PG_MASK); -+ else -+ info[ch].used = cfg[ch].min - info[ch].aval; -+ -+ return 0; -+} -+ -+static int hfc_pub_ctrl(struct rtw89_dev *rtwdev) -+{ -+ const struct rtw89_hfc_pub_cfg *cfg = &rtwdev->mac.hfc_param.pub_cfg; -+ u32 val; -+ int ret; -+ -+ ret = rtw89_mac_check_mac_en(rtwdev, RTW89_MAC_0, RTW89_DMAC_SEL); -+ if (ret) -+ return ret; -+ -+ ret = hfc_pub_cfg_chk(rtwdev); -+ if (ret) -+ return ret; -+ -+ val = u32_encode_bits(cfg->grp0, B_AX_PUBPG_G0_MASK) | -+ u32_encode_bits(cfg->grp1, B_AX_PUBPG_G1_MASK); -+ rtw89_write32(rtwdev, R_AX_PUB_PAGE_CTRL1, val); -+ -+ val = u32_encode_bits(cfg->wp_thrd, B_AX_WP_THRD_MASK); -+ rtw89_write32(rtwdev, R_AX_WP_PAGE_CTRL2, val); -+ -+ return 0; -+} -+ -+static int hfc_upd_mix_info(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_hfc_param *param = &rtwdev->mac.hfc_param; -+ struct rtw89_hfc_pub_cfg *pub_cfg = ¶m->pub_cfg; -+ struct rtw89_hfc_prec_cfg *prec_cfg = ¶m->prec_cfg; -+ struct rtw89_hfc_pub_info *info = ¶m->pub_info; -+ u32 val; -+ int ret; -+ -+ ret = rtw89_mac_check_mac_en(rtwdev, RTW89_MAC_0, RTW89_DMAC_SEL); -+ if (ret) -+ return ret; -+ -+ val = rtw89_read32(rtwdev, R_AX_PUB_PAGE_INFO1); -+ info->g0_used = u32_get_bits(val, B_AX_G0_USE_PG_MASK); -+ info->g1_used = u32_get_bits(val, B_AX_G1_USE_PG_MASK); -+ val = rtw89_read32(rtwdev, R_AX_PUB_PAGE_INFO3); -+ info->g0_aval = u32_get_bits(val, B_AX_G0_AVAL_PG_MASK); -+ info->g1_aval = u32_get_bits(val, B_AX_G1_AVAL_PG_MASK); -+ info->pub_aval = -+ u32_get_bits(rtw89_read32(rtwdev, R_AX_PUB_PAGE_INFO2), -+ B_AX_PUB_AVAL_PG_MASK); -+ info->wp_aval = -+ u32_get_bits(rtw89_read32(rtwdev, R_AX_WP_PAGE_INFO1), -+ B_AX_WP_AVAL_PG_MASK); -+ -+ val = rtw89_read32(rtwdev, R_AX_HCI_FC_CTRL); -+ param->en = val & B_AX_HCI_FC_EN ? 1 : 0; -+ param->h2c_en = val & B_AX_HCI_FC_CH12_EN ? 1 : 0; -+ param->mode = u32_get_bits(val, B_AX_HCI_FC_MODE_MASK); -+ prec_cfg->ch011_full_cond = -+ u32_get_bits(val, B_AX_HCI_FC_WD_FULL_COND_MASK); -+ prec_cfg->h2c_full_cond = -+ u32_get_bits(val, B_AX_HCI_FC_CH12_FULL_COND_MASK); -+ prec_cfg->wp_ch07_full_cond = -+ u32_get_bits(val, B_AX_HCI_FC_WP_CH07_FULL_COND_MASK); -+ prec_cfg->wp_ch811_full_cond = -+ u32_get_bits(val, B_AX_HCI_FC_WP_CH811_FULL_COND_MASK); -+ -+ val = rtw89_read32(rtwdev, R_AX_CH_PAGE_CTRL); -+ prec_cfg->ch011_prec = u32_get_bits(val, B_AX_PREC_PAGE_CH011_MASK); -+ prec_cfg->h2c_prec = u32_get_bits(val, B_AX_PREC_PAGE_CH12_MASK); -+ -+ val = rtw89_read32(rtwdev, R_AX_PUB_PAGE_CTRL2); -+ pub_cfg->pub_max = u32_get_bits(val, B_AX_PUBPG_ALL_MASK); -+ -+ val = rtw89_read32(rtwdev, R_AX_WP_PAGE_CTRL1); -+ prec_cfg->wp_ch07_prec = u32_get_bits(val, B_AX_PREC_PAGE_WP_CH07_MASK); -+ prec_cfg->wp_ch811_prec = u32_get_bits(val, B_AX_PREC_PAGE_WP_CH811_MASK); -+ -+ val = rtw89_read32(rtwdev, R_AX_WP_PAGE_CTRL2); -+ pub_cfg->wp_thrd = u32_get_bits(val, B_AX_WP_THRD_MASK); -+ -+ val = rtw89_read32(rtwdev, R_AX_PUB_PAGE_CTRL1); -+ pub_cfg->grp0 = u32_get_bits(val, B_AX_PUBPG_G0_MASK); -+ pub_cfg->grp1 = u32_get_bits(val, B_AX_PUBPG_G1_MASK); -+ -+ ret = hfc_pub_info_chk(rtwdev); -+ if (param->en && ret) -+ return ret; -+ -+ return 0; -+} -+ -+static void hfc_h2c_cfg(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_hfc_param *param = &rtwdev->mac.hfc_param; -+ const struct rtw89_hfc_prec_cfg *prec_cfg = ¶m->prec_cfg; -+ u32 val; -+ -+ val = u32_encode_bits(prec_cfg->h2c_prec, B_AX_PREC_PAGE_CH12_MASK); -+ rtw89_write32(rtwdev, R_AX_CH_PAGE_CTRL, val); -+ -+ rtw89_write32_mask(rtwdev, R_AX_HCI_FC_CTRL, -+ B_AX_HCI_FC_CH12_FULL_COND_MASK, -+ prec_cfg->h2c_full_cond); -+} -+ -+static void hfc_mix_cfg(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_hfc_param *param = &rtwdev->mac.hfc_param; -+ const struct rtw89_hfc_pub_cfg *pub_cfg = ¶m->pub_cfg; -+ const struct rtw89_hfc_prec_cfg *prec_cfg = ¶m->prec_cfg; -+ u32 val; -+ -+ val = u32_encode_bits(prec_cfg->ch011_prec, B_AX_PREC_PAGE_CH011_MASK) | -+ u32_encode_bits(prec_cfg->h2c_prec, B_AX_PREC_PAGE_CH12_MASK); -+ rtw89_write32(rtwdev, R_AX_CH_PAGE_CTRL, val); -+ -+ val = u32_encode_bits(pub_cfg->pub_max, B_AX_PUBPG_ALL_MASK); -+ rtw89_write32(rtwdev, R_AX_PUB_PAGE_CTRL2, val); -+ -+ val = u32_encode_bits(prec_cfg->wp_ch07_prec, -+ B_AX_PREC_PAGE_WP_CH07_MASK) | -+ u32_encode_bits(prec_cfg->wp_ch811_prec, -+ B_AX_PREC_PAGE_WP_CH811_MASK); -+ rtw89_write32(rtwdev, R_AX_WP_PAGE_CTRL1, val); -+ -+ val = u32_replace_bits(rtw89_read32(rtwdev, R_AX_HCI_FC_CTRL), -+ param->mode, B_AX_HCI_FC_MODE_MASK); -+ val = u32_replace_bits(val, prec_cfg->ch011_full_cond, -+ B_AX_HCI_FC_WD_FULL_COND_MASK); -+ val = u32_replace_bits(val, prec_cfg->h2c_full_cond, -+ B_AX_HCI_FC_CH12_FULL_COND_MASK); -+ val = u32_replace_bits(val, prec_cfg->wp_ch07_full_cond, -+ B_AX_HCI_FC_WP_CH07_FULL_COND_MASK); -+ val = u32_replace_bits(val, prec_cfg->wp_ch811_full_cond, -+ B_AX_HCI_FC_WP_CH811_FULL_COND_MASK); -+ rtw89_write32(rtwdev, R_AX_HCI_FC_CTRL, val); -+} -+ -+static void hfc_func_en(struct rtw89_dev *rtwdev, bool en, bool h2c_en) -+{ -+ struct rtw89_hfc_param *param = &rtwdev->mac.hfc_param; -+ u32 val; -+ -+ val = rtw89_read32(rtwdev, R_AX_HCI_FC_CTRL); -+ param->en = en; -+ param->h2c_en = h2c_en; -+ val = en ? (val | B_AX_HCI_FC_EN) : (val & ~B_AX_HCI_FC_EN); -+ val = h2c_en ? (val | B_AX_HCI_FC_CH12_EN) : -+ (val & ~B_AX_HCI_FC_CH12_EN); -+ rtw89_write32(rtwdev, R_AX_HCI_FC_CTRL, val); -+} -+ -+static int hfc_init(struct rtw89_dev *rtwdev, bool reset, bool en, bool h2c_en) -+{ -+ u8 ch; -+ u32 ret = 0; -+ -+ if (reset) -+ ret = hfc_reset_param(rtwdev); -+ if (ret) -+ return ret; -+ -+ ret = rtw89_mac_check_mac_en(rtwdev, RTW89_MAC_0, RTW89_DMAC_SEL); -+ if (ret) -+ return ret; -+ -+ hfc_func_en(rtwdev, false, false); -+ -+ if (!en && h2c_en) { -+ hfc_h2c_cfg(rtwdev); -+ hfc_func_en(rtwdev, en, h2c_en); -+ return ret; -+ } -+ -+ for (ch = RTW89_DMA_ACH0; ch < RTW89_DMA_H2C; ch++) { -+ ret = hfc_ch_ctrl(rtwdev, ch); -+ if (ret) -+ return ret; -+ } -+ -+ ret = hfc_pub_ctrl(rtwdev); -+ if (ret) -+ return ret; -+ -+ hfc_mix_cfg(rtwdev); -+ if (en || h2c_en) { -+ hfc_func_en(rtwdev, en, h2c_en); -+ udelay(10); -+ } -+ for (ch = RTW89_DMA_ACH0; ch < RTW89_DMA_H2C; ch++) { -+ ret = hfc_upd_ch_info(rtwdev, ch); -+ if (ret) -+ return ret; -+ } -+ ret = hfc_upd_mix_info(rtwdev); -+ -+ return ret; -+} -+ -+#define PWR_POLL_CNT 2000 -+static int pwr_cmd_poll(struct rtw89_dev *rtwdev, -+ const struct rtw89_pwr_cfg *cfg) -+{ -+ u8 val = 0; -+ int ret; -+ u32 addr = cfg->base == PWR_INTF_MSK_SDIO ? -+ cfg->addr | SDIO_LOCAL_BASE_ADDR : cfg->addr; -+ -+ ret = read_poll_timeout(rtw89_read8, val, !((val ^ cfg->val) & cfg->msk), -+ 1000, 1000 * PWR_POLL_CNT, false, rtwdev, addr); -+ -+ if (!ret) -+ return 0; -+ -+ rtw89_warn(rtwdev, "[ERR] Polling timeout\n"); -+ rtw89_warn(rtwdev, "[ERR] addr: %X, %X\n", addr, cfg->addr); -+ rtw89_warn(rtwdev, "[ERR] val: %X, %X\n", val, cfg->val); -+ -+ return -EBUSY; -+} -+ -+static int rtw89_mac_sub_pwr_seq(struct rtw89_dev *rtwdev, u8 cv_msk, -+ u8 intf_msk, const struct rtw89_pwr_cfg *cfg) -+{ -+ const struct rtw89_pwr_cfg *cur_cfg; -+ u32 addr; -+ u8 val; -+ -+ for (cur_cfg = cfg; cur_cfg->cmd != PWR_CMD_END; cur_cfg++) { -+ if (!(cur_cfg->intf_msk & intf_msk) || -+ !(cur_cfg->cv_msk & cv_msk)) -+ continue; -+ -+ switch (cur_cfg->cmd) { -+ case PWR_CMD_WRITE: -+ addr = cur_cfg->addr; -+ -+ if (cur_cfg->base == PWR_BASE_SDIO) -+ addr |= SDIO_LOCAL_BASE_ADDR; -+ -+ val = rtw89_read8(rtwdev, addr); -+ val &= ~(cur_cfg->msk); -+ val |= (cur_cfg->val & cur_cfg->msk); -+ -+ rtw89_write8(rtwdev, addr, val); -+ break; -+ case PWR_CMD_POLL: -+ if (pwr_cmd_poll(rtwdev, cur_cfg)) -+ return -EBUSY; -+ break; -+ case PWR_CMD_DELAY: -+ if (cur_cfg->val == PWR_DELAY_US) -+ udelay(cur_cfg->addr); -+ else -+ fsleep(cur_cfg->addr * 1000); -+ break; -+ default: -+ return -EINVAL; -+ } -+ } -+ -+ return 0; -+} -+ -+static int rtw89_mac_pwr_seq(struct rtw89_dev *rtwdev, -+ const struct rtw89_pwr_cfg * const *cfg_seq) -+{ -+ int ret; -+ -+ for (; *cfg_seq; cfg_seq++) { -+ ret = rtw89_mac_sub_pwr_seq(rtwdev, BIT(rtwdev->hal.cv), -+ PWR_INTF_MSK_PCIE, *cfg_seq); -+ if (ret) -+ return -EBUSY; -+ } -+ -+ return 0; -+} -+ -+static enum rtw89_rpwm_req_pwr_state -+rtw89_mac_get_req_pwr_state(struct rtw89_dev *rtwdev) -+{ -+ enum rtw89_rpwm_req_pwr_state state; -+ -+ switch (rtwdev->ps_mode) { -+ case RTW89_PS_MODE_RFOFF: -+ state = RTW89_MAC_RPWM_REQ_PWR_STATE_BAND0_RFOFF; -+ break; -+ case RTW89_PS_MODE_CLK_GATED: -+ state = RTW89_MAC_RPWM_REQ_PWR_STATE_CLK_GATED; -+ break; -+ case RTW89_PS_MODE_PWR_GATED: -+ state = RTW89_MAC_RPWM_REQ_PWR_STATE_PWR_GATED; -+ break; -+ default: -+ state = RTW89_MAC_RPWM_REQ_PWR_STATE_ACTIVE; -+ break; -+ } -+ return state; -+} -+ -+static void rtw89_mac_send_rpwm(struct rtw89_dev *rtwdev, -+ enum rtw89_rpwm_req_pwr_state req_pwr_state) -+{ -+ u16 request; -+ -+ request = rtw89_read16(rtwdev, R_AX_RPWM); -+ request ^= request | PS_RPWM_TOGGLE; -+ -+ rtwdev->mac.rpwm_seq_num = (rtwdev->mac.rpwm_seq_num + 1) & -+ RPWM_SEQ_NUM_MAX; -+ request |= FIELD_PREP(PS_RPWM_SEQ_NUM, rtwdev->mac.rpwm_seq_num); -+ -+ request |= req_pwr_state; -+ -+ if (req_pwr_state < RTW89_MAC_RPWM_REQ_PWR_STATE_CLK_GATED) -+ request |= PS_RPWM_ACK; -+ -+ rtw89_write16(rtwdev, rtwdev->hci.rpwm_addr, request); -+} -+ -+static int rtw89_mac_check_cpwm_state(struct rtw89_dev *rtwdev, -+ enum rtw89_rpwm_req_pwr_state req_pwr_state) -+{ -+ bool request_deep_mode; -+ bool in_deep_mode; -+ u8 rpwm_req_num; -+ u8 cpwm_rsp_seq; -+ u8 cpwm_seq; -+ u8 cpwm_status; -+ -+ if (req_pwr_state >= RTW89_MAC_RPWM_REQ_PWR_STATE_CLK_GATED) -+ request_deep_mode = true; -+ else -+ request_deep_mode = false; -+ -+ if (rtw89_read32_mask(rtwdev, R_AX_LDM, B_AX_EN_32K)) -+ in_deep_mode = true; -+ else -+ in_deep_mode = false; -+ -+ if (request_deep_mode != in_deep_mode) -+ return -EPERM; -+ -+ if (request_deep_mode) -+ return 0; -+ -+ rpwm_req_num = rtwdev->mac.rpwm_seq_num; -+ cpwm_rsp_seq = rtw89_read16_mask(rtwdev, R_AX_CPWM, -+ PS_CPWM_RSP_SEQ_NUM); -+ -+ if (rpwm_req_num != cpwm_rsp_seq) -+ return -EPERM; -+ -+ rtwdev->mac.cpwm_seq_num = (rtwdev->mac.cpwm_seq_num + 1) & -+ CPWM_SEQ_NUM_MAX; -+ -+ cpwm_seq = rtw89_read16_mask(rtwdev, R_AX_CPWM, PS_CPWM_SEQ_NUM); -+ if (cpwm_seq != rtwdev->mac.cpwm_seq_num) -+ return -EPERM; -+ -+ cpwm_status = rtw89_read16_mask(rtwdev, R_AX_CPWM, PS_CPWM_STATE); -+ if (cpwm_status != req_pwr_state) -+ return -EPERM; -+ -+ return 0; -+} -+ -+void rtw89_mac_power_mode_change(struct rtw89_dev *rtwdev, bool enter) -+{ -+ enum rtw89_rpwm_req_pwr_state state; -+ int ret; -+ -+ if (enter) -+ state = rtw89_mac_get_req_pwr_state(rtwdev); -+ else -+ state = RTW89_MAC_RPWM_REQ_PWR_STATE_ACTIVE; -+ -+ rtw89_mac_send_rpwm(rtwdev, state); -+ ret = read_poll_timeout_atomic(rtw89_mac_check_cpwm_state, ret, !ret, -+ 1000, 15000, false, rtwdev, state); -+ if (ret) -+ rtw89_err(rtwdev, "firmware failed to ack for %s ps mode\n", -+ enter ? "entering" : "leaving"); -+} -+ -+static int rtw89_mac_power_switch(struct rtw89_dev *rtwdev, bool on) -+{ -+#define PWR_ACT 1 -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ const struct rtw89_pwr_cfg * const *cfg_seq; -+ struct rtw89_hal *hal = &rtwdev->hal; -+ int ret; -+ u8 val; -+ -+ if (on) -+ cfg_seq = chip->pwr_on_seq; -+ else -+ cfg_seq = chip->pwr_off_seq; -+ -+ if (test_bit(RTW89_FLAG_FW_RDY, rtwdev->flags)) -+ __rtw89_leave_ps_mode(rtwdev); -+ -+ val = rtw89_read32_mask(rtwdev, R_AX_IC_PWR_STATE, B_AX_WLMAC_PWR_STE_MASK); -+ if (on && val == PWR_ACT) { -+ rtw89_err(rtwdev, "MAC has already powered on\n"); -+ return -EBUSY; -+ } -+ -+ ret = rtw89_mac_pwr_seq(rtwdev, cfg_seq); -+ if (ret) -+ return ret; -+ -+ if (on) { -+ set_bit(RTW89_FLAG_POWERON, rtwdev->flags); -+ rtw89_write8(rtwdev, R_AX_SCOREBOARD + 3, MAC_AX_NOTIFY_TP_MAJOR); -+ } else { -+ clear_bit(RTW89_FLAG_POWERON, rtwdev->flags); -+ clear_bit(RTW89_FLAG_FW_RDY, rtwdev->flags); -+ rtw89_write8(rtwdev, R_AX_SCOREBOARD + 3, MAC_AX_NOTIFY_PWR_MAJOR); -+ hal->current_channel = 0; -+ } -+ -+ return 0; -+#undef PWR_ACT -+} -+ -+void rtw89_mac_pwr_off(struct rtw89_dev *rtwdev) -+{ -+ rtw89_mac_power_switch(rtwdev, false); -+} -+ -+static int cmac_func_en(struct rtw89_dev *rtwdev, u8 mac_idx, bool en) -+{ -+ u32 func_en = 0; -+ u32 ck_en = 0; -+ u32 c1pc_en = 0; -+ u32 addrl_func_en[] = {R_AX_CMAC_FUNC_EN, R_AX_CMAC_FUNC_EN_C1}; -+ u32 addrl_ck_en[] = {R_AX_CK_EN, R_AX_CK_EN_C1}; -+ -+ func_en = B_AX_CMAC_EN | B_AX_CMAC_TXEN | B_AX_CMAC_RXEN | -+ B_AX_PHYINTF_EN | B_AX_CMAC_DMA_EN | B_AX_PTCLTOP_EN | -+ B_AX_SCHEDULER_EN | B_AX_TMAC_EN | B_AX_RMAC_EN; -+ ck_en = B_AX_CMAC_CKEN | B_AX_PHYINTF_CKEN | B_AX_CMAC_DMA_CKEN | -+ B_AX_PTCLTOP_CKEN | B_AX_SCHEDULER_CKEN | B_AX_TMAC_CKEN | -+ B_AX_RMAC_CKEN; -+ c1pc_en = B_AX_R_SYM_WLCMAC1_PC_EN | -+ B_AX_R_SYM_WLCMAC1_P1_PC_EN | -+ B_AX_R_SYM_WLCMAC1_P2_PC_EN | -+ B_AX_R_SYM_WLCMAC1_P3_PC_EN | -+ B_AX_R_SYM_WLCMAC1_P4_PC_EN; -+ -+ if (en) { -+ if (mac_idx == RTW89_MAC_1) { -+ rtw89_write32_set(rtwdev, R_AX_AFE_CTRL1, c1pc_en); -+ rtw89_write32_clr(rtwdev, R_AX_SYS_ISO_CTRL_EXTEND, -+ B_AX_R_SYM_ISO_CMAC12PP); -+ rtw89_write32_set(rtwdev, R_AX_SYS_ISO_CTRL_EXTEND, -+ B_AX_CMAC1_FEN); -+ } -+ rtw89_write32_set(rtwdev, addrl_ck_en[mac_idx], ck_en); -+ rtw89_write32_set(rtwdev, addrl_func_en[mac_idx], func_en); -+ } else { -+ rtw89_write32_clr(rtwdev, addrl_func_en[mac_idx], func_en); -+ rtw89_write32_clr(rtwdev, addrl_ck_en[mac_idx], ck_en); -+ if (mac_idx == RTW89_MAC_1) { -+ rtw89_write32_clr(rtwdev, R_AX_SYS_ISO_CTRL_EXTEND, -+ B_AX_CMAC1_FEN); -+ rtw89_write32_set(rtwdev, R_AX_SYS_ISO_CTRL_EXTEND, -+ B_AX_R_SYM_ISO_CMAC12PP); -+ rtw89_write32_clr(rtwdev, R_AX_AFE_CTRL1, c1pc_en); -+ } -+ } -+ -+ return 0; -+} -+ -+static int dmac_func_en(struct rtw89_dev *rtwdev) -+{ -+ u32 val32; -+ u32 ret = 0; -+ -+ val32 = (B_AX_MAC_FUNC_EN | B_AX_DMAC_FUNC_EN | B_AX_MAC_SEC_EN | -+ B_AX_DISPATCHER_EN | B_AX_DLE_CPUIO_EN | B_AX_PKT_IN_EN | -+ B_AX_DMAC_TBL_EN | B_AX_PKT_BUF_EN | B_AX_STA_SCH_EN | -+ B_AX_TXPKT_CTRL_EN | B_AX_WD_RLS_EN | B_AX_MPDU_PROC_EN); -+ rtw89_write32(rtwdev, R_AX_DMAC_FUNC_EN, val32); -+ -+ val32 = (B_AX_MAC_SEC_CLK_EN | B_AX_DISPATCHER_CLK_EN | -+ B_AX_DLE_CPUIO_CLK_EN | B_AX_PKT_IN_CLK_EN | -+ B_AX_STA_SCH_CLK_EN | B_AX_TXPKT_CTRL_CLK_EN | -+ B_AX_WD_RLS_CLK_EN); -+ rtw89_write32(rtwdev, R_AX_DMAC_CLK_EN, val32); -+ -+ return ret; -+} -+ -+static int chip_func_en(struct rtw89_dev *rtwdev) -+{ -+ rtw89_write32_set(rtwdev, R_AX_SPSLDO_ON_CTRL0, B_AX_OCP_L1_MASK); -+ -+ return 0; -+} -+ -+static int rtw89_mac_sys_init(struct rtw89_dev *rtwdev) -+{ -+ int ret; -+ -+ ret = dmac_func_en(rtwdev); -+ if (ret) -+ return ret; -+ -+ ret = cmac_func_en(rtwdev, 0, true); -+ if (ret) -+ return ret; -+ -+ ret = chip_func_en(rtwdev); -+ if (ret) -+ return ret; -+ -+ return ret; -+} -+ -+/* PCIE 64 */ -+const struct rtw89_dle_size wde_size0 = { -+ RTW89_WDE_PG_64, 4095, 1, -+}; -+ -+/* DLFW */ -+const struct rtw89_dle_size wde_size4 = { -+ RTW89_WDE_PG_64, 0, 4096, -+}; -+ -+/* PCIE */ -+const struct rtw89_dle_size ple_size0 = { -+ RTW89_PLE_PG_128, 1520, 16, -+}; -+ -+/* DLFW */ -+const struct rtw89_dle_size ple_size4 = { -+ RTW89_PLE_PG_128, 64, 1472, -+}; -+ -+/* PCIE 64 */ -+const struct rtw89_wde_quota wde_qt0 = { -+ 3792, 196, 0, 107, -+}; -+ -+/* DLFW */ -+const struct rtw89_wde_quota wde_qt4 = { -+ 0, 0, 0, 0, -+}; -+ -+/* PCIE SCC */ -+const struct rtw89_ple_quota ple_qt4 = { -+ 264, 0, 16, 20, 26, 13, 356, 0, 32, 40, 8, -+}; -+ -+/* PCIE SCC */ -+const struct rtw89_ple_quota ple_qt5 = { -+ 264, 0, 32, 20, 64, 13, 1101, 0, 64, 128, 120, -+}; -+ -+/* DLFW */ -+const struct rtw89_ple_quota ple_qt13 = { -+ 0, 0, 16, 48, 0, 0, 0, 0, 0, 0, 0 -+}; -+ -+static const struct rtw89_dle_mem *get_dle_mem_cfg(struct rtw89_dev *rtwdev, -+ enum rtw89_qta_mode mode) -+{ -+ struct rtw89_mac_info *mac = &rtwdev->mac; -+ const struct rtw89_dle_mem *cfg; -+ -+ cfg = &rtwdev->chip->dle_mem[mode]; -+ if (!cfg) -+ return NULL; -+ -+ if (cfg->mode != mode) { -+ rtw89_warn(rtwdev, "qta mode unmatch!\n"); -+ return NULL; -+ } -+ -+ mac->dle_info.wde_pg_size = cfg->wde_size->pge_size; -+ mac->dle_info.ple_pg_size = cfg->ple_size->pge_size; -+ mac->dle_info.qta_mode = mode; -+ mac->dle_info.c0_rx_qta = cfg->ple_min_qt->cma0_dma; -+ mac->dle_info.c1_rx_qta = cfg->ple_min_qt->cma1_dma; -+ -+ return cfg; -+} -+ -+static inline u32 dle_used_size(const struct rtw89_dle_size *wde, -+ const struct rtw89_dle_size *ple) -+{ -+ return wde->pge_size * (wde->lnk_pge_num + wde->unlnk_pge_num) + -+ ple->pge_size * (ple->lnk_pge_num + ple->unlnk_pge_num); -+} -+ -+static void dle_func_en(struct rtw89_dev *rtwdev, bool enable) -+{ -+ if (enable) -+ rtw89_write32_set(rtwdev, R_AX_DMAC_FUNC_EN, -+ B_AX_DLE_WDE_EN | B_AX_DLE_PLE_EN); -+ else -+ rtw89_write32_clr(rtwdev, R_AX_DMAC_FUNC_EN, -+ B_AX_DLE_WDE_EN | B_AX_DLE_PLE_EN); -+} -+ -+static void dle_clk_en(struct rtw89_dev *rtwdev, bool enable) -+{ -+ if (enable) -+ rtw89_write32_set(rtwdev, R_AX_DMAC_CLK_EN, -+ B_AX_DLE_WDE_CLK_EN | B_AX_DLE_PLE_CLK_EN); -+ else -+ rtw89_write32_clr(rtwdev, R_AX_DMAC_CLK_EN, -+ B_AX_DLE_WDE_CLK_EN | B_AX_DLE_PLE_CLK_EN); -+} -+ -+static int dle_mix_cfg(struct rtw89_dev *rtwdev, const struct rtw89_dle_mem *cfg) -+{ -+ const struct rtw89_dle_size *size_cfg; -+ u32 val; -+ u8 bound = 0; -+ -+ val = rtw89_read32(rtwdev, R_AX_WDE_PKTBUF_CFG); -+ size_cfg = cfg->wde_size; -+ -+ switch (size_cfg->pge_size) { -+ default: -+ case RTW89_WDE_PG_64: -+ val = u32_replace_bits(val, S_AX_WDE_PAGE_SEL_64, -+ B_AX_WDE_PAGE_SEL_MASK); -+ break; -+ case RTW89_WDE_PG_128: -+ val = u32_replace_bits(val, S_AX_WDE_PAGE_SEL_128, -+ B_AX_WDE_PAGE_SEL_MASK); -+ break; -+ case RTW89_WDE_PG_256: -+ rtw89_err(rtwdev, "[ERR]WDE DLE doesn't support 256 byte!\n"); -+ return -EINVAL; -+ } -+ -+ val = u32_replace_bits(val, bound, B_AX_WDE_START_BOUND_MASK); -+ val = u32_replace_bits(val, size_cfg->lnk_pge_num, -+ B_AX_WDE_FREE_PAGE_NUM_MASK); -+ rtw89_write32(rtwdev, R_AX_WDE_PKTBUF_CFG, val); -+ -+ val = rtw89_read32(rtwdev, R_AX_PLE_PKTBUF_CFG); -+ bound = (size_cfg->lnk_pge_num + size_cfg->unlnk_pge_num) -+ * size_cfg->pge_size / DLE_BOUND_UNIT; -+ size_cfg = cfg->ple_size; -+ -+ switch (size_cfg->pge_size) { -+ default: -+ case RTW89_PLE_PG_64: -+ rtw89_err(rtwdev, "[ERR]PLE DLE doesn't support 64 byte!\n"); -+ return -EINVAL; -+ case RTW89_PLE_PG_128: -+ val = u32_replace_bits(val, S_AX_PLE_PAGE_SEL_128, -+ B_AX_PLE_PAGE_SEL_MASK); -+ break; -+ case RTW89_PLE_PG_256: -+ val = u32_replace_bits(val, S_AX_PLE_PAGE_SEL_256, -+ B_AX_PLE_PAGE_SEL_MASK); -+ break; -+ } -+ -+ val = u32_replace_bits(val, bound, B_AX_PLE_START_BOUND_MASK); -+ val = u32_replace_bits(val, size_cfg->lnk_pge_num, -+ B_AX_PLE_FREE_PAGE_NUM_MASK); -+ rtw89_write32(rtwdev, R_AX_PLE_PKTBUF_CFG, val); -+ -+ return 0; -+} -+ -+#define INVALID_QT_WCPU U16_MAX -+#define SET_QUOTA_VAL(_min_x, _max_x, _module, _idx) \ -+ do { \ -+ val = ((_min_x) & \ -+ B_AX_ ## _module ## _MIN_SIZE_MASK) | \ -+ (((_max_x) << 16) & \ -+ B_AX_ ## _module ## _MAX_SIZE_MASK); \ -+ rtw89_write32(rtwdev, \ -+ R_AX_ ## _module ## _QTA ## _idx ## _CFG, \ -+ val); \ -+ } while (0) -+#define SET_QUOTA(_x, _module, _idx) \ -+ SET_QUOTA_VAL(min_cfg->_x, max_cfg->_x, _module, _idx) -+ -+static void wde_quota_cfg(struct rtw89_dev *rtwdev, -+ const struct rtw89_wde_quota *min_cfg, -+ const struct rtw89_wde_quota *max_cfg, -+ u16 ext_wde_min_qt_wcpu) -+{ -+ u16 min_qt_wcpu = ext_wde_min_qt_wcpu != INVALID_QT_WCPU ? -+ ext_wde_min_qt_wcpu : min_cfg->wcpu; -+ u32 val; -+ -+ SET_QUOTA(hif, WDE, 0); -+ SET_QUOTA_VAL(min_qt_wcpu, max_cfg->wcpu, WDE, 1); -+ SET_QUOTA(pkt_in, WDE, 3); -+ SET_QUOTA(cpu_io, WDE, 4); -+} -+ -+static void ple_quota_cfg(struct rtw89_dev *rtwdev, -+ const struct rtw89_ple_quota *min_cfg, -+ const struct rtw89_ple_quota *max_cfg) -+{ -+ u32 val; -+ -+ SET_QUOTA(cma0_tx, PLE, 0); -+ SET_QUOTA(cma1_tx, PLE, 1); -+ SET_QUOTA(c2h, PLE, 2); -+ SET_QUOTA(h2c, PLE, 3); -+ SET_QUOTA(wcpu, PLE, 4); -+ SET_QUOTA(mpdu_proc, PLE, 5); -+ SET_QUOTA(cma0_dma, PLE, 6); -+ SET_QUOTA(cma1_dma, PLE, 7); -+ SET_QUOTA(bb_rpt, PLE, 8); -+ SET_QUOTA(wd_rel, PLE, 9); -+ SET_QUOTA(cpu_io, PLE, 10); -+} -+ -+#undef SET_QUOTA -+ -+static void dle_quota_cfg(struct rtw89_dev *rtwdev, -+ const struct rtw89_dle_mem *cfg, -+ u16 ext_wde_min_qt_wcpu) -+{ -+ wde_quota_cfg(rtwdev, cfg->wde_min_qt, cfg->wde_max_qt, ext_wde_min_qt_wcpu); -+ ple_quota_cfg(rtwdev, cfg->ple_min_qt, cfg->ple_max_qt); -+} -+ -+static int dle_init(struct rtw89_dev *rtwdev, enum rtw89_qta_mode mode, -+ enum rtw89_qta_mode ext_mode) -+{ -+ const struct rtw89_dle_mem *cfg, *ext_cfg; -+ u16 ext_wde_min_qt_wcpu = INVALID_QT_WCPU; -+ int ret = 0; -+ u32 ini; -+ -+ ret = rtw89_mac_check_mac_en(rtwdev, RTW89_MAC_0, RTW89_DMAC_SEL); -+ if (ret) -+ return ret; -+ -+ cfg = get_dle_mem_cfg(rtwdev, mode); -+ if (!cfg) { -+ rtw89_err(rtwdev, "[ERR]get_dle_mem_cfg\n"); -+ ret = -EINVAL; -+ goto error; -+ } -+ -+ if (mode == RTW89_QTA_DLFW) { -+ ext_cfg = get_dle_mem_cfg(rtwdev, ext_mode); -+ if (!ext_cfg) { -+ rtw89_err(rtwdev, "[ERR]get_dle_ext_mem_cfg %d\n", -+ ext_mode); -+ ret = -EINVAL; -+ goto error; -+ } -+ ext_wde_min_qt_wcpu = ext_cfg->wde_min_qt->wcpu; -+ } -+ -+ if (dle_used_size(cfg->wde_size, cfg->ple_size) != rtwdev->chip->fifo_size) { -+ rtw89_err(rtwdev, "[ERR]wd/dle mem cfg\n"); -+ ret = -EINVAL; -+ goto error; -+ } -+ -+ dle_func_en(rtwdev, false); -+ dle_clk_en(rtwdev, true); -+ -+ ret = dle_mix_cfg(rtwdev, cfg); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR] dle mix cfg\n"); -+ goto error; -+ } -+ dle_quota_cfg(rtwdev, cfg, ext_wde_min_qt_wcpu); -+ -+ dle_func_en(rtwdev, true); -+ -+ ret = read_poll_timeout(rtw89_read32, ini, -+ (ini & WDE_MGN_INI_RDY) == WDE_MGN_INI_RDY, 1, -+ 2000, false, rtwdev, R_AX_WDE_INI_STATUS); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR]WDE cfg ready\n"); -+ return ret; -+ } -+ -+ ret = read_poll_timeout(rtw89_read32, ini, -+ (ini & WDE_MGN_INI_RDY) == WDE_MGN_INI_RDY, 1, -+ 2000, false, rtwdev, R_AX_PLE_INI_STATUS); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR]PLE cfg ready\n"); -+ return ret; -+ } -+ -+ return 0; -+error: -+ dle_func_en(rtwdev, false); -+ rtw89_err(rtwdev, "[ERR]trxcfg wde 0x8900 = %x\n", -+ rtw89_read32(rtwdev, R_AX_WDE_INI_STATUS)); -+ rtw89_err(rtwdev, "[ERR]trxcfg ple 0x8D00 = %x\n", -+ rtw89_read32(rtwdev, R_AX_PLE_INI_STATUS)); -+ -+ return ret; -+} -+ -+static bool dle_is_txq_empty(struct rtw89_dev *rtwdev) -+{ -+ u32 msk32; -+ u32 val32; -+ -+ msk32 = B_AX_WDE_EMPTY_QUE_CMAC0_ALL_AC | B_AX_WDE_EMPTY_QUE_CMAC0_MBH | -+ B_AX_WDE_EMPTY_QUE_CMAC1_MBH | B_AX_WDE_EMPTY_QUE_CMAC0_WMM0 | -+ B_AX_WDE_EMPTY_QUE_CMAC0_WMM1 | B_AX_WDE_EMPTY_QUE_OTHERS | -+ B_AX_PLE_EMPTY_QUE_DMAC_MPDU_TX | B_AX_PLE_EMPTY_QTA_DMAC_H2C | -+ B_AX_PLE_EMPTY_QUE_DMAC_SEC_TX | B_AX_WDE_EMPTY_QUE_DMAC_PKTIN | -+ B_AX_WDE_EMPTY_QTA_DMAC_HIF | B_AX_WDE_EMPTY_QTA_DMAC_WLAN_CPU | -+ B_AX_WDE_EMPTY_QTA_DMAC_PKTIN | B_AX_WDE_EMPTY_QTA_DMAC_CPUIO | -+ B_AX_PLE_EMPTY_QTA_DMAC_B0_TXPL | -+ B_AX_PLE_EMPTY_QTA_DMAC_B1_TXPL | -+ B_AX_PLE_EMPTY_QTA_DMAC_MPDU_TX | -+ B_AX_PLE_EMPTY_QTA_DMAC_CPUIO | -+ B_AX_WDE_EMPTY_QTA_DMAC_DATA_CPU | -+ B_AX_PLE_EMPTY_QTA_DMAC_WLAN_CPU; -+ val32 = rtw89_read32(rtwdev, R_AX_DLE_EMPTY0); -+ -+ if ((val32 & msk32) == msk32) -+ return true; -+ -+ return false; -+} -+ -+static int sta_sch_init(struct rtw89_dev *rtwdev) -+{ -+ u32 p_val; -+ u8 val; -+ int ret; -+ -+ ret = rtw89_mac_check_mac_en(rtwdev, RTW89_MAC_0, RTW89_DMAC_SEL); -+ if (ret) -+ return ret; -+ -+ val = rtw89_read8(rtwdev, R_AX_SS_CTRL); -+ val |= B_AX_SS_EN; -+ rtw89_write8(rtwdev, R_AX_SS_CTRL, val); -+ -+ ret = read_poll_timeout(rtw89_read32, p_val, p_val & B_AX_SS_INIT_DONE_1, -+ 1, TRXCFG_WAIT_CNT, false, rtwdev, R_AX_SS_CTRL); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR]STA scheduler init\n"); -+ return ret; -+ } -+ -+ rtw89_write32_set(rtwdev, R_AX_SS_CTRL, B_AX_SS_WARM_INIT_FLG); -+ -+ return 0; -+} -+ -+static int mpdu_proc_init(struct rtw89_dev *rtwdev) -+{ -+ int ret; -+ -+ ret = rtw89_mac_check_mac_en(rtwdev, RTW89_MAC_0, RTW89_DMAC_SEL); -+ if (ret) -+ return ret; -+ -+ rtw89_write32(rtwdev, R_AX_ACTION_FWD0, TRXCFG_MPDU_PROC_ACT_FRWD); -+ rtw89_write32(rtwdev, R_AX_TF_FWD, TRXCFG_MPDU_PROC_TF_FRWD); -+ rtw89_write32_set(rtwdev, R_AX_MPDU_PROC, -+ B_AX_APPEND_FCS | B_AX_A_ICV_ERR); -+ rtw89_write32(rtwdev, R_AX_CUT_AMSDU_CTRL, TRXCFG_MPDU_PROC_CUT_CTRL); -+ -+ return 0; -+} -+ -+static int sec_eng_init(struct rtw89_dev *rtwdev) -+{ -+ u32 val = 0; -+ int ret; -+ -+ ret = rtw89_mac_check_mac_en(rtwdev, RTW89_MAC_0, RTW89_DMAC_SEL); -+ if (ret) -+ return ret; -+ -+ val = rtw89_read32(rtwdev, R_AX_SEC_ENG_CTRL); -+ /* init clock */ -+ val |= (B_AX_CLK_EN_CGCMP | B_AX_CLK_EN_WAPI | B_AX_CLK_EN_WEP_TKIP); -+ /* init TX encryption */ -+ val |= (B_AX_SEC_TX_ENC | B_AX_SEC_RX_DEC); -+ val |= (B_AX_MC_DEC | B_AX_BC_DEC); -+ val &= ~B_AX_TX_PARTIAL_MODE; -+ rtw89_write32(rtwdev, R_AX_SEC_ENG_CTRL, val); -+ -+ /* init MIC ICV append */ -+ val = rtw89_read32(rtwdev, R_AX_SEC_MPDU_PROC); -+ val |= (B_AX_APPEND_ICV | B_AX_APPEND_MIC); -+ -+ /* option init */ -+ rtw89_write32(rtwdev, R_AX_SEC_MPDU_PROC, val); -+ -+ return 0; -+} -+ -+static int dmac_init(struct rtw89_dev *rtwdev, u8 mac_idx) -+{ -+ int ret; -+ -+ ret = dle_init(rtwdev, rtwdev->mac.qta_mode, RTW89_QTA_INVALID); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR]DLE init %d\n", ret); -+ return ret; -+ } -+ -+ ret = hfc_init(rtwdev, true, true, true); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR]HCI FC init %d\n", ret); -+ return ret; -+ } -+ -+ ret = sta_sch_init(rtwdev); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR]STA SCH init %d\n", ret); -+ return ret; -+ } -+ -+ ret = mpdu_proc_init(rtwdev); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR]MPDU Proc init %d\n", ret); -+ return ret; -+ } -+ -+ ret = sec_eng_init(rtwdev); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR]Security Engine init %d\n", ret); -+ return ret; -+ } -+ -+ return ret; -+} -+ -+static int addr_cam_init(struct rtw89_dev *rtwdev, u8 mac_idx) -+{ -+ u32 val, reg; -+ u16 p_val; -+ int ret; -+ -+ ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, RTW89_CMAC_SEL); -+ if (ret) -+ return ret; -+ -+ reg = rtw89_mac_reg_by_idx(R_AX_ADDR_CAM_CTRL, mac_idx); -+ -+ val = rtw89_read32(rtwdev, reg); -+ val |= u32_encode_bits(0x7f, B_AX_ADDR_CAM_RANGE_MASK) | -+ B_AX_ADDR_CAM_CLR | B_AX_ADDR_CAM_EN; -+ rtw89_write32(rtwdev, reg, val); -+ -+ ret = read_poll_timeout(rtw89_read16, p_val, !(p_val & B_AX_ADDR_CAM_CLR), -+ 1, TRXCFG_WAIT_CNT, false, rtwdev, B_AX_ADDR_CAM_CLR); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR]ADDR_CAM reset\n"); -+ return ret; -+ } -+ -+ return 0; -+} -+ -+static int scheduler_init(struct rtw89_dev *rtwdev, u8 mac_idx) -+{ -+ u32 ret; -+ u32 reg; -+ -+ ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, RTW89_CMAC_SEL); -+ if (ret) -+ return ret; -+ -+ reg = rtw89_mac_reg_by_idx(R_AX_PREBKF_CFG_0, mac_idx); -+ rtw89_write32_mask(rtwdev, reg, B_AX_PREBKF_TIME_MASK, SCH_PREBKF_24US); -+ -+ return 0; -+} -+ -+static int rtw89_mac_typ_fltr_opt(struct rtw89_dev *rtwdev, -+ enum rtw89_machdr_frame_type type, -+ enum rtw89_mac_fwd_target fwd_target, -+ u8 mac_idx) -+{ -+ u32 reg; -+ u32 val; -+ -+ switch (fwd_target) { -+ case RTW89_FWD_DONT_CARE: -+ val = RX_FLTR_FRAME_DROP; -+ break; -+ case RTW89_FWD_TO_HOST: -+ val = RX_FLTR_FRAME_TO_HOST; -+ break; -+ case RTW89_FWD_TO_WLAN_CPU: -+ val = RX_FLTR_FRAME_TO_WLCPU; -+ break; -+ default: -+ rtw89_err(rtwdev, "[ERR]set rx filter fwd target err\n"); -+ return -EINVAL; -+ } -+ -+ switch (type) { -+ case RTW89_MGNT: -+ reg = rtw89_mac_reg_by_idx(R_AX_MGNT_FLTR, mac_idx); -+ break; -+ case RTW89_CTRL: -+ reg = rtw89_mac_reg_by_idx(R_AX_CTRL_FLTR, mac_idx); -+ break; -+ case RTW89_DATA: -+ reg = rtw89_mac_reg_by_idx(R_AX_DATA_FLTR, mac_idx); -+ break; -+ default: -+ rtw89_err(rtwdev, "[ERR]set rx filter type err\n"); -+ return -EINVAL; -+ } -+ rtw89_write32(rtwdev, reg, val); -+ -+ return 0; -+} -+ -+static int rx_fltr_init(struct rtw89_dev *rtwdev, u8 mac_idx) -+{ -+ int ret, i; -+ u32 mac_ftlr, plcp_ftlr; -+ -+ ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, RTW89_CMAC_SEL); -+ if (ret) -+ return ret; -+ -+ for (i = RTW89_MGNT; i <= RTW89_DATA; i++) { -+ ret = rtw89_mac_typ_fltr_opt(rtwdev, i, RTW89_FWD_TO_HOST, -+ mac_idx); -+ if (ret) -+ return ret; -+ } -+ mac_ftlr = rtwdev->hal.rx_fltr; -+ plcp_ftlr = B_AX_CCK_CRC_CHK | B_AX_CCK_SIG_CHK | -+ B_AX_LSIG_PARITY_CHK_EN | B_AX_SIGA_CRC_CHK | -+ B_AX_VHT_SU_SIGB_CRC_CHK | B_AX_VHT_MU_SIGB_CRC_CHK | -+ B_AX_HE_SIGB_CRC_CHK; -+ rtw89_write32(rtwdev, rtw89_mac_reg_by_idx(R_AX_RX_FLTR_OPT, mac_idx), -+ mac_ftlr); -+ rtw89_write16(rtwdev, rtw89_mac_reg_by_idx(R_AX_PLCP_HDR_FLTR, mac_idx), -+ plcp_ftlr); -+ -+ return 0; -+} -+ -+static void _patch_dis_resp_chk(struct rtw89_dev *rtwdev, u8 mac_idx) -+{ -+ u32 reg, val32; -+ u32 b_rsp_chk_nav, b_rsp_chk_cca; -+ -+ b_rsp_chk_nav = B_AX_RSP_CHK_TXNAV | B_AX_RSP_CHK_INTRA_NAV | -+ B_AX_RSP_CHK_BASIC_NAV; -+ b_rsp_chk_cca = B_AX_RSP_CHK_SEC_CCA_80 | B_AX_RSP_CHK_SEC_CCA_40 | -+ B_AX_RSP_CHK_SEC_CCA_20 | B_AX_RSP_CHK_BTCCA | -+ B_AX_RSP_CHK_EDCCA | B_AX_RSP_CHK_CCA; -+ -+ switch (rtwdev->chip->chip_id) { -+ case RTL8852A: -+ case RTL8852B: -+ reg = rtw89_mac_reg_by_idx(R_AX_RSP_CHK_SIG, mac_idx); -+ val32 = rtw89_read32(rtwdev, reg) & ~b_rsp_chk_nav; -+ rtw89_write32(rtwdev, reg, val32); -+ -+ reg = rtw89_mac_reg_by_idx(R_AX_TRXPTCL_RESP_0, mac_idx); -+ val32 = rtw89_read32(rtwdev, reg) & ~b_rsp_chk_cca; -+ rtw89_write32(rtwdev, reg, val32); -+ break; -+ default: -+ reg = rtw89_mac_reg_by_idx(R_AX_RSP_CHK_SIG, mac_idx); -+ val32 = rtw89_read32(rtwdev, reg) | b_rsp_chk_nav; -+ rtw89_write32(rtwdev, reg, val32); -+ -+ reg = rtw89_mac_reg_by_idx(R_AX_TRXPTCL_RESP_0, mac_idx); -+ val32 = rtw89_read32(rtwdev, reg) | b_rsp_chk_cca; -+ rtw89_write32(rtwdev, reg, val32); -+ break; -+ } -+} -+ -+static int cca_ctrl_init(struct rtw89_dev *rtwdev, u8 mac_idx) -+{ -+ u32 val, reg; -+ int ret; -+ -+ ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, RTW89_CMAC_SEL); -+ if (ret) -+ return ret; -+ -+ reg = rtw89_mac_reg_by_idx(R_AX_CCA_CONTROL, mac_idx); -+ val = rtw89_read32(rtwdev, reg); -+ val |= (B_AX_TB_CHK_BASIC_NAV | B_AX_TB_CHK_BTCCA | -+ B_AX_TB_CHK_EDCCA | B_AX_TB_CHK_CCA_P20 | -+ B_AX_SIFS_CHK_BTCCA | B_AX_SIFS_CHK_CCA_P20 | -+ B_AX_CTN_CHK_INTRA_NAV | -+ B_AX_CTN_CHK_BASIC_NAV | B_AX_CTN_CHK_BTCCA | -+ B_AX_CTN_CHK_EDCCA | B_AX_CTN_CHK_CCA_S80 | -+ B_AX_CTN_CHK_CCA_S40 | B_AX_CTN_CHK_CCA_S20 | -+ B_AX_CTN_CHK_CCA_P20 | B_AX_SIFS_CHK_EDCCA); -+ val &= ~(B_AX_TB_CHK_TX_NAV | B_AX_TB_CHK_CCA_S80 | -+ B_AX_TB_CHK_CCA_S40 | B_AX_TB_CHK_CCA_S20 | -+ B_AX_SIFS_CHK_CCA_S80 | B_AX_SIFS_CHK_CCA_S40 | -+ B_AX_SIFS_CHK_CCA_S20 | B_AX_CTN_CHK_TXNAV); -+ -+ rtw89_write32(rtwdev, reg, val); -+ -+ _patch_dis_resp_chk(rtwdev, mac_idx); -+ -+ return 0; -+} -+ -+static int spatial_reuse_init(struct rtw89_dev *rtwdev, u8 mac_idx) -+{ -+ u32 reg; -+ int ret; -+ -+ ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, RTW89_CMAC_SEL); -+ if (ret) -+ return ret; -+ reg = rtw89_mac_reg_by_idx(R_AX_RX_SR_CTRL, mac_idx); -+ rtw89_write8_clr(rtwdev, reg, B_AX_SR_EN); -+ -+ return 0; -+} -+ -+static int tmac_init(struct rtw89_dev *rtwdev, u8 mac_idx) -+{ -+ u32 reg; -+ int ret; -+ -+ ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, RTW89_CMAC_SEL); -+ if (ret) -+ return ret; -+ -+ reg = rtw89_mac_reg_by_idx(R_AX_MAC_LOOPBACK, mac_idx); -+ rtw89_write32_clr(rtwdev, reg, B_AX_MACLBK_EN); -+ -+ return 0; -+} -+ -+static int trxptcl_init(struct rtw89_dev *rtwdev, u8 mac_idx) -+{ -+ u32 reg, val, sifs; -+ int ret; -+ -+ ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, RTW89_CMAC_SEL); -+ if (ret) -+ return ret; -+ -+ reg = rtw89_mac_reg_by_idx(R_AX_TRXPTCL_RESP_0, mac_idx); -+ val = rtw89_read32(rtwdev, reg); -+ val &= ~B_AX_WMAC_SPEC_SIFS_CCK_MASK; -+ val |= FIELD_PREP(B_AX_WMAC_SPEC_SIFS_CCK_MASK, WMAC_SPEC_SIFS_CCK); -+ -+ switch (rtwdev->chip->chip_id) { -+ case RTL8852A: -+ sifs = WMAC_SPEC_SIFS_OFDM_52A; -+ break; -+ case RTL8852B: -+ sifs = WMAC_SPEC_SIFS_OFDM_52B; -+ break; -+ default: -+ sifs = WMAC_SPEC_SIFS_OFDM_52C; -+ break; -+ } -+ val &= ~B_AX_WMAC_SPEC_SIFS_OFDM_MASK; -+ val |= FIELD_PREP(B_AX_WMAC_SPEC_SIFS_OFDM_MASK, sifs); -+ rtw89_write32(rtwdev, reg, val); -+ -+ reg = rtw89_mac_reg_by_idx(R_AX_RXTRIG_TEST_USER_2, mac_idx); -+ rtw89_write32_set(rtwdev, reg, B_AX_RXTRIG_FCSCHK_EN); -+ -+ return 0; -+} -+ -+static int rmac_init(struct rtw89_dev *rtwdev, u8 mac_idx) -+{ -+#define TRXCFG_RMAC_CCA_TO 32 -+#define TRXCFG_RMAC_DATA_TO 15 -+#define RX_MAX_LEN_UNIT 512 -+#define PLD_RLS_MAX_PG 127 -+ int ret; -+ u32 reg, rx_max_len, rx_qta; -+ u16 val; -+ -+ ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, RTW89_CMAC_SEL); -+ if (ret) -+ return ret; -+ -+ reg = rtw89_mac_reg_by_idx(R_AX_RESPBA_CAM_CTRL, mac_idx); -+ rtw89_write8_set(rtwdev, reg, B_AX_SSN_SEL); -+ -+ reg = rtw89_mac_reg_by_idx(R_AX_DLK_PROTECT_CTL, mac_idx); -+ val = rtw89_read16(rtwdev, reg); -+ val = u16_replace_bits(val, TRXCFG_RMAC_DATA_TO, -+ B_AX_RX_DLK_DATA_TIME_MASK); -+ val = u16_replace_bits(val, TRXCFG_RMAC_CCA_TO, -+ B_AX_RX_DLK_CCA_TIME_MASK); -+ rtw89_write16(rtwdev, reg, val); -+ -+ reg = rtw89_mac_reg_by_idx(R_AX_RCR, mac_idx); -+ rtw89_write8_mask(rtwdev, reg, B_AX_CH_EN_MASK, 0x1); -+ -+ reg = rtw89_mac_reg_by_idx(R_AX_RX_FLTR_OPT, mac_idx); -+ if (mac_idx == RTW89_MAC_0) -+ rx_qta = rtwdev->mac.dle_info.c0_rx_qta; -+ else -+ rx_qta = rtwdev->mac.dle_info.c1_rx_qta; -+ rx_qta = rx_qta > PLD_RLS_MAX_PG ? PLD_RLS_MAX_PG : rx_qta; -+ rx_max_len = (rx_qta - 1) * rtwdev->mac.dle_info.ple_pg_size / -+ RX_MAX_LEN_UNIT; -+ rx_max_len = rx_max_len > B_AX_RX_MPDU_MAX_LEN_SIZE ? -+ B_AX_RX_MPDU_MAX_LEN_SIZE : rx_max_len; -+ rtw89_write32_mask(rtwdev, reg, B_AX_RX_MPDU_MAX_LEN_MASK, rx_max_len); -+ -+ if (rtwdev->chip->chip_id == RTL8852A && -+ rtwdev->hal.cv == CHIP_CBV) { -+ rtw89_write16_mask(rtwdev, -+ rtw89_mac_reg_by_idx(R_AX_DLK_PROTECT_CTL, mac_idx), -+ B_AX_RX_DLK_CCA_TIME_MASK, 0); -+ rtw89_write16_set(rtwdev, rtw89_mac_reg_by_idx(R_AX_RCR, mac_idx), -+ BIT(12)); -+ } -+ -+ reg = rtw89_mac_reg_by_idx(R_AX_PLCP_HDR_FLTR, mac_idx); -+ rtw89_write8_clr(rtwdev, reg, B_AX_VHT_SU_SIGB_CRC_CHK); -+ -+ return ret; -+} -+ -+static int cmac_com_init(struct rtw89_dev *rtwdev, u8 mac_idx) -+{ -+ u32 val, reg; -+ int ret; -+ -+ ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, RTW89_CMAC_SEL); -+ if (ret) -+ return ret; -+ -+ reg = rtw89_mac_reg_by_idx(R_AX_TX_SUB_CARRIER_VALUE, mac_idx); -+ val = rtw89_read32(rtwdev, reg); -+ val = u32_replace_bits(val, 0, B_AX_TXSC_20M_MASK); -+ val = u32_replace_bits(val, 0, B_AX_TXSC_40M_MASK); -+ val = u32_replace_bits(val, 0, B_AX_TXSC_80M_MASK); -+ rtw89_write32(rtwdev, reg, val); -+ -+ return 0; -+} -+ -+static bool is_qta_dbcc(struct rtw89_dev *rtwdev, enum rtw89_qta_mode mode) -+{ -+ const struct rtw89_dle_mem *cfg; -+ -+ cfg = get_dle_mem_cfg(rtwdev, mode); -+ if (!cfg) { -+ rtw89_err(rtwdev, "[ERR]get_dle_mem_cfg\n"); -+ return false; -+ } -+ -+ return (cfg->ple_min_qt->cma1_dma && cfg->ple_max_qt->cma1_dma); -+} -+ -+static int ptcl_init(struct rtw89_dev *rtwdev, u8 mac_idx) -+{ -+ u32 val, reg; -+ int ret; -+ -+ ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, RTW89_CMAC_SEL); -+ if (ret) -+ return ret; -+ -+ if (rtwdev->hci.type == RTW89_HCI_TYPE_PCIE) { -+ reg = rtw89_mac_reg_by_idx(R_AX_SIFS_SETTING, mac_idx); -+ val = rtw89_read32(rtwdev, reg); -+ val = u32_replace_bits(val, S_AX_CTS2S_TH_1K, -+ B_AX_HW_CTS2SELF_PKT_LEN_TH_MASK); -+ val |= B_AX_HW_CTS2SELF_EN; -+ rtw89_write32(rtwdev, reg, val); -+ -+ reg = rtw89_mac_reg_by_idx(R_AX_PTCL_FSM_MON, mac_idx); -+ val = rtw89_read32(rtwdev, reg); -+ val = u32_replace_bits(val, S_AX_PTCL_TO_2MS, B_AX_PTCL_TX_ARB_TO_THR_MASK); -+ val &= ~B_AX_PTCL_TX_ARB_TO_MODE; -+ rtw89_write32(rtwdev, reg, val); -+ } -+ -+ reg = rtw89_mac_reg_by_idx(R_AX_SIFS_SETTING, mac_idx); -+ val = rtw89_read32(rtwdev, reg); -+ val = u32_replace_bits(val, S_AX_CTS2S_TH_SEC_256B, B_AX_HW_CTS2SELF_PKT_LEN_TH_TWW_MASK); -+ val |= B_AX_HW_CTS2SELF_EN; -+ rtw89_write32(rtwdev, reg, val); -+ -+ return 0; -+} -+ -+static int cmac_init(struct rtw89_dev *rtwdev, u8 mac_idx) -+{ -+ int ret; -+ -+ ret = scheduler_init(rtwdev, mac_idx); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR]CMAC%d SCH init %d\n", mac_idx, ret); -+ return ret; -+ } -+ -+ ret = addr_cam_init(rtwdev, mac_idx); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR]CMAC%d ADDR_CAM reset %d\n", mac_idx, -+ ret); -+ return ret; -+ } -+ -+ ret = rx_fltr_init(rtwdev, mac_idx); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR]CMAC%d RX filter init %d\n", mac_idx, -+ ret); -+ return ret; -+ } -+ -+ ret = cca_ctrl_init(rtwdev, mac_idx); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR]CMAC%d CCA CTRL init %d\n", mac_idx, -+ ret); -+ return ret; -+ } -+ -+ ret = spatial_reuse_init(rtwdev, mac_idx); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR]CMAC%d Spatial Reuse init %d\n", -+ mac_idx, ret); -+ return ret; -+ } -+ -+ ret = tmac_init(rtwdev, mac_idx); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR]CMAC%d TMAC init %d\n", mac_idx, ret); -+ return ret; -+ } -+ -+ ret = trxptcl_init(rtwdev, mac_idx); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR]CMAC%d TRXPTCL init %d\n", mac_idx, ret); -+ return ret; -+ } -+ -+ ret = rmac_init(rtwdev, mac_idx); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR]CMAC%d RMAC init %d\n", mac_idx, ret); -+ return ret; -+ } -+ -+ ret = cmac_com_init(rtwdev, mac_idx); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR]CMAC%d Com init %d\n", mac_idx, ret); -+ return ret; -+ } -+ -+ ret = ptcl_init(rtwdev, mac_idx); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR]CMAC%d PTCL init %d\n", mac_idx, ret); -+ return ret; -+ } -+ -+ return ret; -+} -+ -+static int rtw89_mac_read_phycap(struct rtw89_dev *rtwdev, -+ struct rtw89_mac_c2h_info *c2h_info) -+{ -+ struct rtw89_mac_h2c_info h2c_info = {0}; -+ u32 ret; -+ -+ h2c_info.id = RTW89_FWCMD_H2CREG_FUNC_GET_FEATURE; -+ h2c_info.content_len = 0; -+ -+ ret = rtw89_fw_msg_reg(rtwdev, &h2c_info, c2h_info); -+ if (ret) -+ return ret; -+ -+ if (c2h_info->id != RTW89_FWCMD_C2HREG_FUNC_PHY_CAP) -+ return -EINVAL; -+ -+ return 0; -+} -+ -+int rtw89_mac_setup_phycap(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_hal *hal = &rtwdev->hal; -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ struct rtw89_mac_c2h_info c2h_info = {0}; -+ struct rtw89_c2h_phy_cap *cap = -+ (struct rtw89_c2h_phy_cap *)&c2h_info.c2hreg[0]; -+ u32 ret; -+ -+ ret = rtw89_mac_read_phycap(rtwdev, &c2h_info); -+ if (ret) -+ return ret; -+ -+ hal->tx_nss = cap->tx_nss ? -+ min_t(u8, cap->tx_nss, chip->tx_nss) : chip->tx_nss; -+ hal->rx_nss = cap->rx_nss ? -+ min_t(u8, cap->rx_nss, chip->rx_nss) : chip->rx_nss; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_FW, -+ "phycap hal/phy/chip: tx_nss=0x%x/0x%x/0x%x rx_nss=0x%x/0x%x/0x%x\n", -+ hal->tx_nss, cap->tx_nss, chip->tx_nss, -+ hal->rx_nss, cap->rx_nss, chip->rx_nss); -+ -+ return 0; -+} -+ -+static int rtw89_hw_sch_tx_en_h2c(struct rtw89_dev *rtwdev, u8 band, -+ u16 tx_en_u16, u16 mask_u16) -+{ -+ u32 ret; -+ struct rtw89_mac_c2h_info c2h_info = {0}; -+ struct rtw89_mac_h2c_info h2c_info = {0}; -+ struct rtw89_h2creg_sch_tx_en *h2creg = -+ (struct rtw89_h2creg_sch_tx_en *)h2c_info.h2creg; -+ -+ h2c_info.id = RTW89_FWCMD_H2CREG_FUNC_SCH_TX_EN; -+ h2c_info.content_len = sizeof(*h2creg) - RTW89_H2CREG_HDR_LEN; -+ h2creg->tx_en = tx_en_u16; -+ h2creg->mask = mask_u16; -+ h2creg->band = band; -+ -+ ret = rtw89_fw_msg_reg(rtwdev, &h2c_info, &c2h_info); -+ if (ret) -+ return ret; -+ -+ if (c2h_info.id != RTW89_FWCMD_C2HREG_FUNC_TX_PAUSE_RPT) -+ return -EINVAL; -+ -+ return 0; -+} -+ -+static int rtw89_set_hw_sch_tx_en(struct rtw89_dev *rtwdev, u8 mac_idx, -+ u16 tx_en, u16 tx_en_mask) -+{ -+ u32 reg = rtw89_mac_reg_by_idx(R_AX_CTN_TXEN, mac_idx); -+ u16 val; -+ int ret; -+ -+ ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, RTW89_CMAC_SEL); -+ if (ret) -+ return ret; -+ -+ if (test_bit(RTW89_FLAG_FW_RDY, rtwdev->flags)) -+ return rtw89_hw_sch_tx_en_h2c(rtwdev, mac_idx, -+ tx_en, tx_en_mask); -+ -+ val = rtw89_read16(rtwdev, reg); -+ val = (val & ~tx_en_mask) | (tx_en & tx_en_mask); -+ rtw89_write16(rtwdev, reg, val); -+ -+ return 0; -+} -+ -+int rtw89_mac_stop_sch_tx(struct rtw89_dev *rtwdev, u8 mac_idx, -+ u16 *tx_en, enum rtw89_sch_tx_sel sel) -+{ -+ int ret; -+ -+ *tx_en = rtw89_read16(rtwdev, -+ rtw89_mac_reg_by_idx(R_AX_CTN_TXEN, mac_idx)); -+ -+ switch (sel) { -+ case RTW89_SCH_TX_SEL_ALL: -+ ret = rtw89_set_hw_sch_tx_en(rtwdev, mac_idx, 0, 0xffff); -+ if (ret) -+ return ret; -+ break; -+ case RTW89_SCH_TX_SEL_HIQ: -+ ret = rtw89_set_hw_sch_tx_en(rtwdev, mac_idx, -+ 0, B_AX_CTN_TXEN_HGQ); -+ if (ret) -+ return ret; -+ break; -+ case RTW89_SCH_TX_SEL_MG0: -+ ret = rtw89_set_hw_sch_tx_en(rtwdev, mac_idx, -+ 0, B_AX_CTN_TXEN_MGQ); -+ if (ret) -+ return ret; -+ break; -+ case RTW89_SCH_TX_SEL_MACID: -+ ret = rtw89_set_hw_sch_tx_en(rtwdev, mac_idx, 0, 0xffff); -+ if (ret) -+ return ret; -+ break; -+ default: -+ return 0; -+ } -+ -+ return 0; -+} -+ -+int rtw89_mac_resume_sch_tx(struct rtw89_dev *rtwdev, u8 mac_idx, u16 tx_en) -+{ -+ int ret; -+ -+ ret = rtw89_set_hw_sch_tx_en(rtwdev, mac_idx, tx_en, 0xffff); -+ if (ret) -+ return ret; -+ -+ return 0; -+} -+ -+static u16 rtw89_mac_dle_buf_req(struct rtw89_dev *rtwdev, u16 buf_len, -+ bool wd) -+{ -+ u32 val, reg; -+ int ret; -+ -+ reg = wd ? R_AX_WD_BUF_REQ : R_AX_PL_BUF_REQ; -+ val = buf_len; -+ val |= B_AX_WD_BUF_REQ_EXEC; -+ rtw89_write32(rtwdev, reg, val); -+ -+ reg = wd ? R_AX_WD_BUF_STATUS : R_AX_PL_BUF_STATUS; -+ -+ ret = read_poll_timeout(rtw89_read32, val, val & B_AX_WD_BUF_STAT_DONE, -+ 1, 2000, false, rtwdev, reg); -+ if (ret) -+ return 0xffff; -+ -+ return FIELD_GET(B_AX_WD_BUF_STAT_PKTID_MASK, val); -+} -+ -+static int rtw89_mac_set_cpuio(struct rtw89_dev *rtwdev, -+ struct rtw89_cpuio_ctrl *ctrl_para, -+ bool wd) -+{ -+ u32 val, cmd_type, reg; -+ int ret; -+ -+ cmd_type = ctrl_para->cmd_type; -+ -+ reg = wd ? R_AX_WD_CPUQ_OP_2 : R_AX_PL_CPUQ_OP_2; -+ val = 0; -+ val = u32_replace_bits(val, ctrl_para->start_pktid, -+ B_AX_WD_CPUQ_OP_STRT_PKTID_MASK); -+ val = u32_replace_bits(val, ctrl_para->end_pktid, -+ B_AX_WD_CPUQ_OP_END_PKTID_MASK); -+ rtw89_write32(rtwdev, reg, val); -+ -+ reg = wd ? R_AX_WD_CPUQ_OP_1 : R_AX_PL_CPUQ_OP_1; -+ val = 0; -+ val = u32_replace_bits(val, ctrl_para->src_pid, -+ B_AX_CPUQ_OP_SRC_PID_MASK); -+ val = u32_replace_bits(val, ctrl_para->src_qid, -+ B_AX_CPUQ_OP_SRC_QID_MASK); -+ val = u32_replace_bits(val, ctrl_para->dst_pid, -+ B_AX_CPUQ_OP_DST_PID_MASK); -+ val = u32_replace_bits(val, ctrl_para->dst_qid, -+ B_AX_CPUQ_OP_DST_QID_MASK); -+ rtw89_write32(rtwdev, reg, val); -+ -+ reg = wd ? R_AX_WD_CPUQ_OP_0 : R_AX_PL_CPUQ_OP_0; -+ val = 0; -+ val = u32_replace_bits(val, cmd_type, -+ B_AX_CPUQ_OP_CMD_TYPE_MASK); -+ val = u32_replace_bits(val, ctrl_para->macid, -+ B_AX_CPUQ_OP_MACID_MASK); -+ val = u32_replace_bits(val, ctrl_para->pkt_num, -+ B_AX_CPUQ_OP_PKTNUM_MASK); -+ val |= B_AX_WD_CPUQ_OP_EXEC; -+ rtw89_write32(rtwdev, reg, val); -+ -+ reg = wd ? R_AX_WD_CPUQ_OP_STATUS : R_AX_PL_CPUQ_OP_STATUS; -+ -+ ret = read_poll_timeout(rtw89_read32, val, val & B_AX_WD_CPUQ_OP_STAT_DONE, -+ 1, 2000, false, rtwdev, reg); -+ if (ret) -+ return ret; -+ -+ if (cmd_type == CPUIO_OP_CMD_GET_1ST_PID || -+ cmd_type == CPUIO_OP_CMD_GET_NEXT_PID) -+ ctrl_para->pktid = FIELD_GET(B_AX_WD_CPUQ_OP_PKTID_MASK, val); -+ -+ return 0; -+} -+ -+static int dle_quota_change(struct rtw89_dev *rtwdev, enum rtw89_qta_mode mode) -+{ -+ const struct rtw89_dle_mem *cfg; -+ struct rtw89_cpuio_ctrl ctrl_para = {0}; -+ u16 pkt_id; -+ int ret; -+ -+ cfg = get_dle_mem_cfg(rtwdev, mode); -+ if (!cfg) { -+ rtw89_err(rtwdev, "[ERR]wd/dle mem cfg\n"); -+ return -EINVAL; -+ } -+ -+ if (dle_used_size(cfg->wde_size, cfg->ple_size) != rtwdev->chip->fifo_size) { -+ rtw89_err(rtwdev, "[ERR]wd/dle mem cfg\n"); -+ return -EINVAL; -+ } -+ -+ dle_quota_cfg(rtwdev, cfg, INVALID_QT_WCPU); -+ -+ pkt_id = rtw89_mac_dle_buf_req(rtwdev, 0x20, true); -+ if (pkt_id == 0xffff) { -+ rtw89_err(rtwdev, "[ERR]WDE DLE buf req\n"); -+ return -ENOMEM; -+ } -+ -+ ctrl_para.cmd_type = CPUIO_OP_CMD_ENQ_TO_HEAD; -+ ctrl_para.start_pktid = pkt_id; -+ ctrl_para.end_pktid = pkt_id; -+ ctrl_para.pkt_num = 0; -+ ctrl_para.dst_pid = WDE_DLE_PORT_ID_WDRLS; -+ ctrl_para.dst_qid = WDE_DLE_QUEID_NO_REPORT; -+ ret = rtw89_mac_set_cpuio(rtwdev, &ctrl_para, true); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR]WDE DLE enqueue to head\n"); -+ return -EFAULT; -+ } -+ -+ pkt_id = rtw89_mac_dle_buf_req(rtwdev, 0x20, false); -+ if (pkt_id == 0xffff) { -+ rtw89_err(rtwdev, "[ERR]PLE DLE buf req\n"); -+ return -ENOMEM; -+ } -+ -+ ctrl_para.cmd_type = CPUIO_OP_CMD_ENQ_TO_HEAD; -+ ctrl_para.start_pktid = pkt_id; -+ ctrl_para.end_pktid = pkt_id; -+ ctrl_para.pkt_num = 0; -+ ctrl_para.dst_pid = PLE_DLE_PORT_ID_PLRLS; -+ ctrl_para.dst_qid = PLE_DLE_QUEID_NO_REPORT; -+ ret = rtw89_mac_set_cpuio(rtwdev, &ctrl_para, false); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR]PLE DLE enqueue to head\n"); -+ return -EFAULT; -+ } -+ -+ return 0; -+} -+ -+static int band_idle_ck_b(struct rtw89_dev *rtwdev, u8 mac_idx) -+{ -+ int ret; -+ u32 reg; -+ u8 val; -+ -+ ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, RTW89_CMAC_SEL); -+ if (ret) -+ return ret; -+ -+ reg = rtw89_mac_reg_by_idx(R_AX_PTCL_TX_CTN_SEL, mac_idx); -+ -+ ret = read_poll_timeout(rtw89_read8, val, -+ (val & B_AX_PTCL_TX_ON_STAT) == 0, -+ SW_CVR_DUR_US, -+ SW_CVR_DUR_US * PTCL_IDLE_POLL_CNT, -+ false, rtwdev, reg); -+ if (ret) -+ return ret; -+ -+ return 0; -+} -+ -+static int band1_enable(struct rtw89_dev *rtwdev) -+{ -+ int ret, i; -+ u32 sleep_bak[4] = {0}; -+ u32 pause_bak[4] = {0}; -+ u16 tx_en; -+ -+ ret = rtw89_mac_stop_sch_tx(rtwdev, 0, &tx_en, RTW89_SCH_TX_SEL_ALL); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR]stop sch tx %d\n", ret); -+ return ret; -+ } -+ -+ for (i = 0; i < 4; i++) { -+ sleep_bak[i] = rtw89_read32(rtwdev, R_AX_MACID_SLEEP_0 + i * 4); -+ pause_bak[i] = rtw89_read32(rtwdev, R_AX_SS_MACID_PAUSE_0 + i * 4); -+ rtw89_write32(rtwdev, R_AX_MACID_SLEEP_0 + i * 4, U32_MAX); -+ rtw89_write32(rtwdev, R_AX_SS_MACID_PAUSE_0 + i * 4, U32_MAX); -+ } -+ -+ ret = band_idle_ck_b(rtwdev, 0); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR]tx idle poll %d\n", ret); -+ return ret; -+ } -+ -+ ret = dle_quota_change(rtwdev, rtwdev->mac.qta_mode); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR]DLE quota change %d\n", ret); -+ return ret; -+ } -+ -+ for (i = 0; i < 4; i++) { -+ rtw89_write32(rtwdev, R_AX_MACID_SLEEP_0 + i * 4, sleep_bak[i]); -+ rtw89_write32(rtwdev, R_AX_SS_MACID_PAUSE_0 + i * 4, pause_bak[i]); -+ } -+ -+ ret = rtw89_mac_resume_sch_tx(rtwdev, 0, tx_en); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR]CMAC1 resume sch tx %d\n", ret); -+ return ret; -+ } -+ -+ ret = cmac_func_en(rtwdev, 1, true); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR]CMAC1 func en %d\n", ret); -+ return ret; -+ } -+ -+ ret = cmac_init(rtwdev, 1); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR]CMAC1 init %d\n", ret); -+ return ret; -+ } -+ -+ rtw89_write32_set(rtwdev, R_AX_SYS_ISO_CTRL_EXTEND, -+ B_AX_R_SYM_FEN_WLBBFUN_1 | B_AX_R_SYM_FEN_WLBBGLB_1); -+ -+ return 0; -+} -+ -+static int rtw89_mac_enable_imr(struct rtw89_dev *rtwdev, u8 mac_idx, -+ enum rtw89_mac_hwmod_sel sel) -+{ -+ u32 reg, val; -+ int ret; -+ -+ ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, sel); -+ if (ret) { -+ rtw89_err(rtwdev, "MAC%d mac_idx%d is not ready\n", -+ sel, mac_idx); -+ return ret; -+ } -+ -+ if (sel == RTW89_DMAC_SEL) { -+ rtw89_write32_clr(rtwdev, R_AX_TXPKTCTL_ERR_IMR_ISR, -+ B_AX_TXPKTCTL_USRCTL_RLSBMPLEN_ERR_INT_EN | -+ B_AX_TXPKTCTL_USRCTL_RDNRLSCMD_ERR_INT_EN | -+ B_AX_TXPKTCTL_CMDPSR_FRZTO_ERR_INT_EN); -+ rtw89_write32_clr(rtwdev, R_AX_TXPKTCTL_ERR_IMR_ISR_B1, -+ B_AX_TXPKTCTL_USRCTL_RLSBMPLEN_ERR_INT_EN | -+ B_AX_TXPKTCTL_USRCTL_RDNRLSCMD_ERR_INT_EN); -+ rtw89_write32_clr(rtwdev, R_AX_HOST_DISPATCHER_ERR_IMR, -+ B_AX_HDT_PKT_FAIL_DBG_INT_EN | -+ B_AX_HDT_OFFSET_UNMATCH_INT_EN); -+ rtw89_write32_clr(rtwdev, R_AX_CPU_DISPATCHER_ERR_IMR, -+ B_AX_CPU_SHIFT_EN_ERR_INT_EN); -+ rtw89_write32_clr(rtwdev, R_AX_PLE_ERR_IMR, -+ B_AX_PLE_GETNPG_STRPG_ERR_INT_EN); -+ rtw89_write32_clr(rtwdev, R_AX_WDRLS_ERR_IMR, -+ B_AX_WDRLS_PLEBREQ_TO_ERR_INT_EN); -+ rtw89_write32_set(rtwdev, R_AX_HD0IMR, B_AX_WDT_PTFM_INT_EN); -+ rtw89_write32_clr(rtwdev, R_AX_TXPKTCTL_ERR_IMR_ISR, -+ B_AX_TXPKTCTL_USRCTL_NOINIT_ERR_INT_EN); -+ } else if (sel == RTW89_CMAC_SEL) { -+ reg = rtw89_mac_reg_by_idx(R_AX_SCHEDULE_ERR_IMR, mac_idx); -+ rtw89_write32_clr(rtwdev, reg, -+ B_AX_SORT_NON_IDLE_ERR_INT_EN); -+ -+ reg = rtw89_mac_reg_by_idx(R_AX_DLE_CTRL, mac_idx); -+ rtw89_write32_clr(rtwdev, reg, -+ B_AX_NO_RESERVE_PAGE_ERR_IMR | -+ B_AX_RXDATA_FSM_HANG_ERROR_IMR); -+ -+ reg = rtw89_mac_reg_by_idx(R_AX_PTCL_IMR0, mac_idx); -+ val = B_AX_F2PCMD_USER_ALLC_ERR_INT_EN | -+ B_AX_TX_RECORD_PKTID_ERR_INT_EN | -+ B_AX_FSM_TIMEOUT_ERR_INT_EN; -+ rtw89_write32(rtwdev, reg, val); -+ -+ reg = rtw89_mac_reg_by_idx(R_AX_PHYINFO_ERR_IMR, mac_idx); -+ rtw89_write32_set(rtwdev, reg, -+ B_AX_PHY_TXON_TIMEOUT_INT_EN | -+ B_AX_CCK_CCA_TIMEOUT_INT_EN | -+ B_AX_OFDM_CCA_TIMEOUT_INT_EN | -+ B_AX_DATA_ON_TIMEOUT_INT_EN | -+ B_AX_STS_ON_TIMEOUT_INT_EN | -+ B_AX_CSI_ON_TIMEOUT_INT_EN); -+ -+ reg = rtw89_mac_reg_by_idx(R_AX_RMAC_ERR_ISR, mac_idx); -+ val = rtw89_read32(rtwdev, reg); -+ val |= (B_AX_RMAC_RX_CSI_TIMEOUT_INT_EN | -+ B_AX_RMAC_RX_TIMEOUT_INT_EN | -+ B_AX_RMAC_CSI_TIMEOUT_INT_EN); -+ val &= ~(B_AX_RMAC_CCA_TO_IDLE_TIMEOUT_INT_EN | -+ B_AX_RMAC_DATA_ON_TO_IDLE_TIMEOUT_INT_EN | -+ B_AX_RMAC_CCA_TIMEOUT_INT_EN | -+ B_AX_RMAC_DATA_ON_TIMEOUT_INT_EN); -+ rtw89_write32(rtwdev, reg, val); -+ } else { -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+static int rtw89_mac_dbcc_enable(struct rtw89_dev *rtwdev, bool enable) -+{ -+ int ret = 0; -+ -+ if (enable) { -+ ret = band1_enable(rtwdev); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR] band1_enable %d\n", ret); -+ return ret; -+ } -+ -+ ret = rtw89_mac_enable_imr(rtwdev, RTW89_MAC_1, RTW89_CMAC_SEL); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR] enable CMAC1 IMR %d\n", ret); -+ return ret; -+ } -+ } else { -+ rtw89_err(rtwdev, "[ERR] disable dbcc is not implemented not\n"); -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+static int set_host_rpr(struct rtw89_dev *rtwdev) -+{ -+ if (rtwdev->hci.type == RTW89_HCI_TYPE_PCIE) { -+ rtw89_write32_mask(rtwdev, R_AX_WDRLS_CFG, -+ B_AX_WDRLS_MODE_MASK, RTW89_RPR_MODE_POH); -+ rtw89_write32_set(rtwdev, R_AX_RLSRPT0_CFG0, -+ B_AX_RLSRPT0_FLTR_MAP_MASK); -+ } else { -+ rtw89_write32_mask(rtwdev, R_AX_WDRLS_CFG, -+ B_AX_WDRLS_MODE_MASK, RTW89_RPR_MODE_STF); -+ rtw89_write32_clr(rtwdev, R_AX_RLSRPT0_CFG0, -+ B_AX_RLSRPT0_FLTR_MAP_MASK); -+ } -+ -+ rtw89_write32_mask(rtwdev, R_AX_RLSRPT0_CFG1, B_AX_RLSRPT0_AGGNUM_MASK, 30); -+ rtw89_write32_mask(rtwdev, R_AX_RLSRPT0_CFG1, B_AX_RLSRPT0_TO_MASK, 255); -+ -+ return 0; -+} -+ -+static int rtw89_mac_trx_init(struct rtw89_dev *rtwdev) -+{ -+ enum rtw89_qta_mode qta_mode = rtwdev->mac.qta_mode; -+ int ret; -+ -+ ret = dmac_init(rtwdev, 0); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR]DMAC init %d\n", ret); -+ return ret; -+ } -+ -+ ret = cmac_init(rtwdev, 0); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR]CMAC%d init %d\n", 0, ret); -+ return ret; -+ } -+ -+ if (is_qta_dbcc(rtwdev, qta_mode)) { -+ ret = rtw89_mac_dbcc_enable(rtwdev, true); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR]dbcc_enable init %d\n", ret); -+ return ret; -+ } -+ } -+ -+ ret = rtw89_mac_enable_imr(rtwdev, RTW89_MAC_0, RTW89_DMAC_SEL); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR] enable DMAC IMR %d\n", ret); -+ return ret; -+ } -+ -+ ret = rtw89_mac_enable_imr(rtwdev, RTW89_MAC_0, RTW89_CMAC_SEL); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR] to enable CMAC0 IMR %d\n", ret); -+ return ret; -+ } -+ -+ ret = set_host_rpr(rtwdev); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR] set host rpr %d\n", ret); -+ return ret; -+ } -+ -+ return 0; -+} -+ -+static void rtw89_mac_disable_cpu(struct rtw89_dev *rtwdev) -+{ -+ clear_bit(RTW89_FLAG_FW_RDY, rtwdev->flags); -+ -+ rtw89_write32_clr(rtwdev, R_AX_PLATFORM_ENABLE, B_AX_WCPU_EN); -+ rtw89_write32_clr(rtwdev, R_AX_SYS_CLK_CTRL, B_AX_CPU_CLK_EN); -+} -+ -+static int rtw89_mac_enable_cpu(struct rtw89_dev *rtwdev, u8 boot_reason, -+ bool dlfw) -+{ -+ u32 val; -+ int ret; -+ -+ if (rtw89_read32(rtwdev, R_AX_PLATFORM_ENABLE) & B_AX_WCPU_EN) -+ return -EFAULT; -+ -+ rtw89_write32(rtwdev, R_AX_HALT_H2C_CTRL, 0); -+ rtw89_write32(rtwdev, R_AX_HALT_C2H_CTRL, 0); -+ -+ rtw89_write32_set(rtwdev, R_AX_SYS_CLK_CTRL, B_AX_CPU_CLK_EN); -+ -+ val = rtw89_read32(rtwdev, R_AX_WCPU_FW_CTRL); -+ val &= ~(B_AX_WCPU_FWDL_EN | B_AX_H2C_PATH_RDY | B_AX_FWDL_PATH_RDY); -+ val = u32_replace_bits(val, RTW89_FWDL_INITIAL_STATE, -+ B_AX_WCPU_FWDL_STS_MASK); -+ -+ if (dlfw) -+ val |= B_AX_WCPU_FWDL_EN; -+ -+ rtw89_write32(rtwdev, R_AX_WCPU_FW_CTRL, val); -+ rtw89_write16_mask(rtwdev, R_AX_BOOT_REASON, B_AX_BOOT_REASON_MASK, -+ boot_reason); -+ rtw89_write32_set(rtwdev, R_AX_PLATFORM_ENABLE, B_AX_WCPU_EN); -+ -+ if (!dlfw) { -+ mdelay(5); -+ -+ ret = rtw89_fw_check_rdy(rtwdev); -+ if (ret) -+ return ret; -+ } -+ -+ return 0; -+} -+ -+static int rtw89_mac_fw_dl_pre_init(struct rtw89_dev *rtwdev) -+{ -+ u32 val; -+ int ret; -+ -+ val = B_AX_MAC_FUNC_EN | B_AX_DMAC_FUNC_EN | B_AX_DISPATCHER_EN | -+ B_AX_PKT_BUF_EN; -+ rtw89_write32(rtwdev, R_AX_DMAC_FUNC_EN, val); -+ -+ val = B_AX_DISPATCHER_CLK_EN; -+ rtw89_write32(rtwdev, R_AX_DMAC_CLK_EN, val); -+ -+ ret = dle_init(rtwdev, RTW89_QTA_DLFW, rtwdev->mac.qta_mode); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR]DLE pre init %d\n", ret); -+ return ret; -+ } -+ -+ ret = hfc_init(rtwdev, true, false, true); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR]HCI FC pre init %d\n", ret); -+ return ret; -+ } -+ -+ return ret; -+} -+ -+static void rtw89_mac_hci_func_en(struct rtw89_dev *rtwdev) -+{ -+ rtw89_write32_set(rtwdev, R_AX_HCI_FUNC_EN, -+ B_AX_HCI_TXDMA_EN | B_AX_HCI_RXDMA_EN); -+} -+ -+void rtw89_mac_enable_bb_rf(struct rtw89_dev *rtwdev) -+{ -+ rtw89_write8_set(rtwdev, R_AX_SYS_FUNC_EN, -+ B_AX_FEN_BBRSTB | B_AX_FEN_BB_GLB_RSTN); -+ rtw89_write32_set(rtwdev, R_AX_WLRF_CTRL, -+ B_AX_WLRF1_CTRL_7 | B_AX_WLRF1_CTRL_1 | -+ B_AX_WLRF_CTRL_7 | B_AX_WLRF_CTRL_1); -+ rtw89_write8_set(rtwdev, R_AX_PHYREG_SET, PHYREG_SET_ALL_CYCLE); -+} -+ -+void rtw89_mac_disable_bb_rf(struct rtw89_dev *rtwdev) -+{ -+ rtw89_write8_clr(rtwdev, R_AX_SYS_FUNC_EN, -+ B_AX_FEN_BBRSTB | B_AX_FEN_BB_GLB_RSTN); -+ rtw89_write32_clr(rtwdev, R_AX_WLRF_CTRL, -+ B_AX_WLRF1_CTRL_7 | B_AX_WLRF1_CTRL_1 | -+ B_AX_WLRF_CTRL_7 | B_AX_WLRF_CTRL_1); -+ rtw89_write8_clr(rtwdev, R_AX_PHYREG_SET, PHYREG_SET_ALL_CYCLE); -+} -+ -+int rtw89_mac_partial_init(struct rtw89_dev *rtwdev) -+{ -+ int ret; -+ -+ ret = rtw89_mac_power_switch(rtwdev, true); -+ if (ret) { -+ rtw89_mac_power_switch(rtwdev, false); -+ ret = rtw89_mac_power_switch(rtwdev, true); -+ if (ret) -+ return ret; -+ } -+ -+ rtw89_mac_hci_func_en(rtwdev); -+ -+ if (rtwdev->hci.ops->mac_pre_init) { -+ ret = rtwdev->hci.ops->mac_pre_init(rtwdev); -+ if (ret) -+ return ret; -+ } -+ -+ ret = rtw89_mac_fw_dl_pre_init(rtwdev); -+ if (ret) -+ return ret; -+ -+ rtw89_mac_disable_cpu(rtwdev); -+ ret = rtw89_mac_enable_cpu(rtwdev, 0, true); -+ if (ret) -+ return ret; -+ -+ ret = rtw89_fw_download(rtwdev, RTW89_FW_NORMAL); -+ if (ret) -+ return ret; -+ -+ return 0; -+} -+ -+int rtw89_mac_init(struct rtw89_dev *rtwdev) -+{ -+ int ret; -+ -+ ret = rtw89_mac_partial_init(rtwdev); -+ if (ret) -+ goto fail; -+ -+ rtw89_mac_enable_bb_rf(rtwdev); -+ if (ret) -+ goto fail; -+ -+ ret = rtw89_mac_sys_init(rtwdev); -+ if (ret) -+ goto fail; -+ -+ ret = rtw89_mac_trx_init(rtwdev); -+ if (ret) -+ goto fail; -+ -+ if (rtwdev->hci.ops->mac_post_init) { -+ ret = rtwdev->hci.ops->mac_post_init(rtwdev); -+ if (ret) -+ goto fail; -+ } -+ -+ rtw89_fw_send_all_early_h2c(rtwdev); -+ rtw89_fw_h2c_set_ofld_cfg(rtwdev); -+ -+ return ret; -+fail: -+ rtw89_mac_power_switch(rtwdev, false); -+ -+ return ret; -+} -+ -+static void rtw89_mac_dmac_tbl_init(struct rtw89_dev *rtwdev, u8 macid) -+{ -+ u8 i; -+ -+ for (i = 0; i < 4; i++) { -+ rtw89_write32(rtwdev, R_AX_FILTER_MODEL_ADDR, -+ DMAC_TBL_BASE_ADDR + (macid << 4) + (i << 2)); -+ rtw89_write32(rtwdev, R_AX_INDIR_ACCESS_ENTRY, 0); -+ } -+} -+ -+static void rtw89_mac_cmac_tbl_init(struct rtw89_dev *rtwdev, u8 macid) -+{ -+ rtw89_write32(rtwdev, R_AX_FILTER_MODEL_ADDR, -+ CMAC_TBL_BASE_ADDR + macid * CCTL_INFO_SIZE); -+ rtw89_write32(rtwdev, R_AX_INDIR_ACCESS_ENTRY, 0x4); -+ rtw89_write32(rtwdev, R_AX_INDIR_ACCESS_ENTRY + 4, 0x400A0004); -+ rtw89_write32(rtwdev, R_AX_INDIR_ACCESS_ENTRY + 8, 0); -+ rtw89_write32(rtwdev, R_AX_INDIR_ACCESS_ENTRY + 12, 0); -+ rtw89_write32(rtwdev, R_AX_INDIR_ACCESS_ENTRY + 16, 0); -+ rtw89_write32(rtwdev, R_AX_INDIR_ACCESS_ENTRY + 20, 0xE43000B); -+ rtw89_write32(rtwdev, R_AX_INDIR_ACCESS_ENTRY + 24, 0); -+ rtw89_write32(rtwdev, R_AX_INDIR_ACCESS_ENTRY + 28, 0xB8109); -+} -+ -+static int rtw89_set_macid_pause(struct rtw89_dev *rtwdev, u8 macid, bool pause) -+{ -+ u8 sh = FIELD_GET(GENMASK(4, 0), macid); -+ u8 grp = macid >> 5; -+ int ret; -+ -+ ret = rtw89_mac_check_mac_en(rtwdev, RTW89_MAC_0, RTW89_CMAC_SEL); -+ if (ret) -+ return ret; -+ -+ rtw89_fw_h2c_macid_pause(rtwdev, sh, grp, pause); -+ -+ return 0; -+} -+ -+static const struct rtw89_port_reg rtw_port_base = { -+ .port_cfg = R_AX_PORT_CFG_P0, -+ .tbtt_prohib = R_AX_TBTT_PROHIB_P0, -+ .bcn_area = R_AX_BCN_AREA_P0, -+ .bcn_early = R_AX_BCNERLYINT_CFG_P0, -+ .tbtt_early = R_AX_TBTTERLYINT_CFG_P0, -+ .tbtt_agg = R_AX_TBTT_AGG_P0, -+ .bcn_space = R_AX_BCN_SPACE_CFG_P0, -+ .bcn_forcetx = R_AX_BCN_FORCETX_P0, -+ .bcn_err_cnt = R_AX_BCN_ERR_CNT_P0, -+ .bcn_err_flag = R_AX_BCN_ERR_FLAG_P0, -+ .dtim_ctrl = R_AX_DTIM_CTRL_P0, -+ .tbtt_shift = R_AX_TBTT_SHIFT_P0, -+ .bcn_cnt_tmr = R_AX_BCN_CNT_TMR_P0, -+ .tsftr_l = R_AX_TSFTR_LOW_P0, -+ .tsftr_h = R_AX_TSFTR_HIGH_P0 -+}; -+ -+#define BCN_INTERVAL 100 -+#define BCN_ERLY_DEF 160 -+#define BCN_SETUP_DEF 2 -+#define BCN_HOLD_DEF 200 -+#define BCN_MASK_DEF 0 -+#define TBTT_ERLY_DEF 5 -+#define BCN_SET_UNIT 32 -+#define BCN_ERLY_SET_DLY (10 * 2) -+ -+static void rtw89_mac_port_cfg_func_sw(struct rtw89_dev *rtwdev, -+ struct rtw89_vif *rtwvif) -+{ -+ struct ieee80211_vif *vif = rtwvif_to_vif(rtwvif); -+ const struct rtw89_port_reg *p = &rtw_port_base; -+ -+ if (!rtw89_read32_port_mask(rtwdev, rtwvif, p->port_cfg, B_AX_PORT_FUNC_EN)) -+ return; -+ -+ rtw89_write32_port_clr(rtwdev, rtwvif, p->tbtt_prohib, B_AX_TBTT_SETUP_MASK); -+ rtw89_write32_port_mask(rtwdev, rtwvif, p->tbtt_prohib, B_AX_TBTT_HOLD_MASK, 1); -+ rtw89_write16_port_clr(rtwdev, rtwvif, p->tbtt_early, B_AX_TBTTERLY_MASK); -+ rtw89_write16_port_clr(rtwdev, rtwvif, p->bcn_early, B_AX_BCNERLY_MASK); -+ -+ msleep(vif->bss_conf.beacon_int + 1); -+ -+ rtw89_write32_port_clr(rtwdev, rtwvif, p->port_cfg, B_AX_PORT_FUNC_EN | -+ B_AX_BRK_SETUP); -+ rtw89_write32_port_set(rtwdev, rtwvif, p->port_cfg, B_AX_TSFTR_RST); -+ rtw89_write32_port(rtwdev, rtwvif, p->bcn_cnt_tmr, 0); -+} -+ -+static void rtw89_mac_port_cfg_tx_rpt(struct rtw89_dev *rtwdev, -+ struct rtw89_vif *rtwvif, bool en) -+{ -+ const struct rtw89_port_reg *p = &rtw_port_base; -+ -+ if (en) -+ rtw89_write32_port_set(rtwdev, rtwvif, p->port_cfg, B_AX_TXBCN_RPT_EN); -+ else -+ rtw89_write32_port_clr(rtwdev, rtwvif, p->port_cfg, B_AX_TXBCN_RPT_EN); -+} -+ -+static void rtw89_mac_port_cfg_rx_rpt(struct rtw89_dev *rtwdev, -+ struct rtw89_vif *rtwvif, bool en) -+{ -+ const struct rtw89_port_reg *p = &rtw_port_base; -+ -+ if (en) -+ rtw89_write32_port_set(rtwdev, rtwvif, p->port_cfg, B_AX_RXBCN_RPT_EN); -+ else -+ rtw89_write32_port_clr(rtwdev, rtwvif, p->port_cfg, B_AX_RXBCN_RPT_EN); -+} -+ -+static void rtw89_mac_port_cfg_net_type(struct rtw89_dev *rtwdev, -+ struct rtw89_vif *rtwvif) -+{ -+ const struct rtw89_port_reg *p = &rtw_port_base; -+ -+ rtw89_write32_port_mask(rtwdev, rtwvif, p->port_cfg, B_AX_NET_TYPE_MASK, -+ rtwvif->net_type); -+} -+ -+static void rtw89_mac_port_cfg_bcn_prct(struct rtw89_dev *rtwdev, -+ struct rtw89_vif *rtwvif) -+{ -+ const struct rtw89_port_reg *p = &rtw_port_base; -+ bool en = rtwvif->net_type != RTW89_NET_TYPE_NO_LINK; -+ u32 bits = B_AX_TBTT_PROHIB_EN | B_AX_BRK_SETUP; -+ -+ if (en) -+ rtw89_write32_port_set(rtwdev, rtwvif, p->port_cfg, bits); -+ else -+ rtw89_write32_port_clr(rtwdev, rtwvif, p->port_cfg, bits); -+} -+ -+static void rtw89_mac_port_cfg_rx_sw(struct rtw89_dev *rtwdev, -+ struct rtw89_vif *rtwvif) -+{ -+ const struct rtw89_port_reg *p = &rtw_port_base; -+ bool en = rtwvif->net_type == RTW89_NET_TYPE_INFRA || -+ rtwvif->net_type == RTW89_NET_TYPE_AD_HOC; -+ u32 bit = B_AX_RX_BSSID_FIT_EN; -+ -+ if (en) -+ rtw89_write32_port_set(rtwdev, rtwvif, p->port_cfg, bit); -+ else -+ rtw89_write32_port_clr(rtwdev, rtwvif, p->port_cfg, bit); -+} -+ -+static void rtw89_mac_port_cfg_rx_sync(struct rtw89_dev *rtwdev, -+ struct rtw89_vif *rtwvif) -+{ -+ const struct rtw89_port_reg *p = &rtw_port_base; -+ bool en = rtwvif->net_type == RTW89_NET_TYPE_INFRA || -+ rtwvif->net_type == RTW89_NET_TYPE_AD_HOC; -+ -+ if (en) -+ rtw89_write32_port_set(rtwdev, rtwvif, p->port_cfg, B_AX_TSF_UDT_EN); -+ else -+ rtw89_write32_port_clr(rtwdev, rtwvif, p->port_cfg, B_AX_TSF_UDT_EN); -+} -+ -+static void rtw89_mac_port_cfg_tx_sw(struct rtw89_dev *rtwdev, -+ struct rtw89_vif *rtwvif) -+{ -+ const struct rtw89_port_reg *p = &rtw_port_base; -+ bool en = rtwvif->net_type == RTW89_NET_TYPE_AP_MODE || -+ rtwvif->net_type == RTW89_NET_TYPE_AD_HOC; -+ -+ if (en) -+ rtw89_write32_port_set(rtwdev, rtwvif, p->port_cfg, B_AX_BCNTX_EN); -+ else -+ rtw89_write32_port_clr(rtwdev, rtwvif, p->port_cfg, B_AX_BCNTX_EN); -+} -+ -+static void rtw89_mac_port_cfg_bcn_intv(struct rtw89_dev *rtwdev, -+ struct rtw89_vif *rtwvif) -+{ -+ struct ieee80211_vif *vif = rtwvif_to_vif(rtwvif); -+ const struct rtw89_port_reg *p = &rtw_port_base; -+ u16 bcn_int = vif->bss_conf.beacon_int ? vif->bss_conf.beacon_int : BCN_INTERVAL; -+ -+ rtw89_write32_port_mask(rtwdev, rtwvif, p->bcn_space, B_AX_BCN_SPACE_MASK, -+ bcn_int); -+} -+ -+static void rtw89_mac_port_cfg_bcn_setup_time(struct rtw89_dev *rtwdev, -+ struct rtw89_vif *rtwvif) -+{ -+ const struct rtw89_port_reg *p = &rtw_port_base; -+ -+ rtw89_write32_port_mask(rtwdev, rtwvif, p->tbtt_prohib, -+ B_AX_TBTT_SETUP_MASK, BCN_SETUP_DEF); -+} -+ -+static void rtw89_mac_port_cfg_bcn_hold_time(struct rtw89_dev *rtwdev, -+ struct rtw89_vif *rtwvif) -+{ -+ const struct rtw89_port_reg *p = &rtw_port_base; -+ -+ rtw89_write32_port_mask(rtwdev, rtwvif, p->tbtt_prohib, -+ B_AX_TBTT_HOLD_MASK, BCN_HOLD_DEF); -+} -+ -+static void rtw89_mac_port_cfg_bcn_mask_area(struct rtw89_dev *rtwdev, -+ struct rtw89_vif *rtwvif) -+{ -+ const struct rtw89_port_reg *p = &rtw_port_base; -+ -+ rtw89_write32_port_mask(rtwdev, rtwvif, p->bcn_area, -+ B_AX_BCN_MSK_AREA_MASK, BCN_MASK_DEF); -+} -+ -+static void rtw89_mac_port_cfg_tbtt_early(struct rtw89_dev *rtwdev, -+ struct rtw89_vif *rtwvif) -+{ -+ const struct rtw89_port_reg *p = &rtw_port_base; -+ -+ rtw89_write16_port_mask(rtwdev, rtwvif, p->tbtt_early, -+ B_AX_TBTTERLY_MASK, TBTT_ERLY_DEF); -+} -+ -+static void rtw89_mac_port_cfg_bss_color(struct rtw89_dev *rtwdev, -+ struct rtw89_vif *rtwvif) -+{ -+ struct ieee80211_vif *vif = rtwvif_to_vif(rtwvif); -+ static const u32 masks[RTW89_PORT_NUM] = { -+ B_AX_BSS_COLOB_AX_PORT_0_MASK, B_AX_BSS_COLOB_AX_PORT_1_MASK, -+ B_AX_BSS_COLOB_AX_PORT_2_MASK, B_AX_BSS_COLOB_AX_PORT_3_MASK, -+ B_AX_BSS_COLOB_AX_PORT_4_MASK, -+ }; -+ u8 port = rtwvif->port; -+ u32 reg_base; -+ u32 reg; -+ u8 bss_color; -+ -+ bss_color = vif->bss_conf.he_bss_color.color; -+ reg_base = port >= 4 ? R_AX_PTCL_BSS_COLOR_1 : R_AX_PTCL_BSS_COLOR_0; -+ reg = rtw89_mac_reg_by_idx(reg_base, rtwvif->mac_idx); -+ rtw89_write32_mask(rtwdev, reg, masks[port], bss_color); -+} -+ -+static void rtw89_mac_port_cfg_mbssid(struct rtw89_dev *rtwdev, -+ struct rtw89_vif *rtwvif) -+{ -+ u8 port = rtwvif->port; -+ u32 reg; -+ -+ if (rtwvif->net_type == RTW89_NET_TYPE_AP_MODE) -+ return; -+ -+ if (port == 0) { -+ reg = rtw89_mac_reg_by_idx(R_AX_MBSSID_CTRL, rtwvif->mac_idx); -+ rtw89_write32_clr(rtwdev, reg, B_AX_P0MB_ALL_MASK); -+ } -+} -+ -+static void rtw89_mac_port_cfg_hiq_drop(struct rtw89_dev *rtwdev, -+ struct rtw89_vif *rtwvif) -+{ -+ u8 port = rtwvif->port; -+ u32 reg; -+ u32 val; -+ -+ reg = rtw89_mac_reg_by_idx(R_AX_MBSSID_DROP_0, rtwvif->mac_idx); -+ val = rtw89_read32(rtwdev, reg); -+ val &= ~FIELD_PREP(B_AX_PORT_DROP_4_0_MASK, BIT(port)); -+ if (port == 0) -+ val &= ~BIT(0); -+ rtw89_write32(rtwdev, reg, val); -+} -+ -+static void rtw89_mac_port_cfg_func_en(struct rtw89_dev *rtwdev, -+ struct rtw89_vif *rtwvif) -+{ -+ const struct rtw89_port_reg *p = &rtw_port_base; -+ -+ rtw89_write32_port_set(rtwdev, rtwvif, p->port_cfg, B_AX_PORT_FUNC_EN); -+} -+ -+static void rtw89_mac_port_cfg_bcn_early(struct rtw89_dev *rtwdev, -+ struct rtw89_vif *rtwvif) -+{ -+ const struct rtw89_port_reg *p = &rtw_port_base; -+ -+ rtw89_write32_port_mask(rtwdev, rtwvif, p->bcn_early, B_AX_BCNERLY_MASK, -+ BCN_ERLY_DEF); -+} -+ -+int rtw89_mac_vif_init(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif) -+{ -+ int ret; -+ -+ ret = rtw89_mac_port_update(rtwdev, rtwvif); -+ if (ret) -+ return ret; -+ -+ rtw89_mac_dmac_tbl_init(rtwdev, rtwvif->mac_id); -+ rtw89_mac_cmac_tbl_init(rtwdev, rtwvif->mac_id); -+ -+ ret = rtw89_set_macid_pause(rtwdev, rtwvif->mac_id, false); -+ if (ret) -+ return ret; -+ -+ ret = rtw89_fw_h2c_vif_maintain(rtwdev, rtwvif, RTW89_VIF_CREATE); -+ if (ret) -+ return ret; -+ -+ ret = rtw89_cam_init(rtwdev, rtwvif); -+ if (ret) -+ return ret; -+ -+ ret = rtw89_fw_h2c_cam(rtwdev, rtwvif); -+ if (ret) -+ return ret; -+ -+ ret = rtw89_fw_h2c_default_cmac_tbl(rtwdev, rtwvif->mac_id); -+ if (ret) -+ return ret; -+ -+ return 0; -+} -+ -+int rtw89_mac_vif_deinit(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif) -+{ -+ int ret; -+ -+ ret = rtw89_fw_h2c_vif_maintain(rtwdev, rtwvif, RTW89_VIF_REMOVE); -+ if (ret) -+ return ret; -+ -+ rtw89_cam_deinit(rtwdev, rtwvif); -+ -+ ret = rtw89_fw_h2c_cam(rtwdev, rtwvif); -+ if (ret) -+ return ret; -+ -+ return 0; -+} -+ -+int rtw89_mac_port_update(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif) -+{ -+ u8 port = rtwvif->port; -+ -+ if (port >= RTW89_PORT_NUM) -+ return -EINVAL; -+ -+ rtw89_mac_port_cfg_func_sw(rtwdev, rtwvif); -+ rtw89_mac_port_cfg_tx_rpt(rtwdev, rtwvif, false); -+ rtw89_mac_port_cfg_rx_rpt(rtwdev, rtwvif, false); -+ rtw89_mac_port_cfg_net_type(rtwdev, rtwvif); -+ rtw89_mac_port_cfg_bcn_prct(rtwdev, rtwvif); -+ rtw89_mac_port_cfg_rx_sw(rtwdev, rtwvif); -+ rtw89_mac_port_cfg_rx_sync(rtwdev, rtwvif); -+ rtw89_mac_port_cfg_tx_sw(rtwdev, rtwvif); -+ rtw89_mac_port_cfg_bcn_intv(rtwdev, rtwvif); -+ rtw89_mac_port_cfg_bcn_setup_time(rtwdev, rtwvif); -+ rtw89_mac_port_cfg_bcn_hold_time(rtwdev, rtwvif); -+ rtw89_mac_port_cfg_bcn_mask_area(rtwdev, rtwvif); -+ rtw89_mac_port_cfg_tbtt_early(rtwdev, rtwvif); -+ rtw89_mac_port_cfg_bss_color(rtwdev, rtwvif); -+ rtw89_mac_port_cfg_mbssid(rtwdev, rtwvif); -+ rtw89_mac_port_cfg_hiq_drop(rtwdev, rtwvif); -+ rtw89_mac_port_cfg_func_en(rtwdev, rtwvif); -+ fsleep(BCN_ERLY_SET_DLY); -+ rtw89_mac_port_cfg_bcn_early(rtwdev, rtwvif); -+ -+ return 0; -+} -+ -+int rtw89_mac_add_vif(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif) -+{ -+ int ret; -+ -+ rtwvif->mac_id = rtw89_core_acquire_bit_map(rtwdev->mac_id_map, -+ RTW89_MAX_MAC_ID_NUM); -+ if (rtwvif->mac_id == RTW89_MAX_MAC_ID_NUM) -+ return -ENOSPC; -+ -+ ret = rtw89_mac_vif_init(rtwdev, rtwvif); -+ if (ret) -+ goto release_mac_id; -+ -+ return 0; -+ -+release_mac_id: -+ rtw89_core_release_bit_map(rtwdev->mac_id_map, rtwvif->mac_id); -+ -+ return ret; -+} -+ -+int rtw89_mac_remove_vif(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif) -+{ -+ int ret; -+ -+ ret = rtw89_mac_vif_deinit(rtwdev, rtwvif); -+ rtw89_core_release_bit_map(rtwdev->mac_id_map, rtwvif->mac_id); -+ -+ return ret; -+} -+ -+static void -+rtw89_mac_c2h_macid_pause(struct rtw89_dev *rtwdev, struct sk_buff *c2h, u32 len) -+{ -+} -+ -+static void -+rtw89_mac_c2h_rec_ack(struct rtw89_dev *rtwdev, struct sk_buff *c2h, u32 len) -+{ -+ rtw89_debug(rtwdev, RTW89_DBG_FW, -+ "C2H rev ack recv, cat: %d, class: %d, func: %d, seq : %d\n", -+ RTW89_GET_MAC_C2H_REV_ACK_CAT(c2h->data), -+ RTW89_GET_MAC_C2H_REV_ACK_CLASS(c2h->data), -+ RTW89_GET_MAC_C2H_REV_ACK_FUNC(c2h->data), -+ RTW89_GET_MAC_C2H_REV_ACK_H2C_SEQ(c2h->data)); -+} -+ -+static void -+rtw89_mac_c2h_done_ack(struct rtw89_dev *rtwdev, struct sk_buff *c2h, u32 len) -+{ -+ rtw89_debug(rtwdev, RTW89_DBG_FW, -+ "C2H done ack recv, cat: %d, class: %d, func: %d, ret: %d, seq : %d\n", -+ RTW89_GET_MAC_C2H_DONE_ACK_CAT(c2h->data), -+ RTW89_GET_MAC_C2H_DONE_ACK_CLASS(c2h->data), -+ RTW89_GET_MAC_C2H_DONE_ACK_FUNC(c2h->data), -+ RTW89_GET_MAC_C2H_DONE_ACK_H2C_RETURN(c2h->data), -+ RTW89_GET_MAC_C2H_DONE_ACK_H2C_SEQ(c2h->data)); -+} -+ -+static void -+rtw89_mac_c2h_log(struct rtw89_dev *rtwdev, struct sk_buff *c2h, u32 len) -+{ -+ rtw89_info(rtwdev, "%*s", RTW89_GET_C2H_LOG_LEN(len), -+ RTW89_GET_C2H_LOG_SRT_PRT(c2h->data)); -+} -+ -+static -+void (* const rtw89_mac_c2h_ofld_handler[])(struct rtw89_dev *rtwdev, -+ struct sk_buff *c2h, u32 len) = { -+ [RTW89_MAC_C2H_FUNC_EFUSE_DUMP] = NULL, -+ [RTW89_MAC_C2H_FUNC_READ_RSP] = NULL, -+ [RTW89_MAC_C2H_FUNC_PKT_OFLD_RSP] = NULL, -+ [RTW89_MAC_C2H_FUNC_BCN_RESEND] = NULL, -+ [RTW89_MAC_C2H_FUNC_MACID_PAUSE] = rtw89_mac_c2h_macid_pause, -+}; -+ -+static -+void (* const rtw89_mac_c2h_info_handler[])(struct rtw89_dev *rtwdev, -+ struct sk_buff *c2h, u32 len) = { -+ [RTW89_MAC_C2H_FUNC_REC_ACK] = rtw89_mac_c2h_rec_ack, -+ [RTW89_MAC_C2H_FUNC_DONE_ACK] = rtw89_mac_c2h_done_ack, -+ [RTW89_MAC_C2H_FUNC_C2H_LOG] = rtw89_mac_c2h_log, -+}; -+ -+void rtw89_mac_c2h_handle(struct rtw89_dev *rtwdev, struct sk_buff *skb, -+ u32 len, u8 class, u8 func) -+{ -+ void (*handler)(struct rtw89_dev *rtwdev, -+ struct sk_buff *c2h, u32 len) = NULL; -+ -+ switch (class) { -+ case RTW89_MAC_C2H_CLASS_INFO: -+ if (func < RTW89_MAC_C2H_FUNC_INFO_MAX) -+ handler = rtw89_mac_c2h_info_handler[func]; -+ break; -+ case RTW89_MAC_C2H_CLASS_OFLD: -+ if (func < RTW89_MAC_C2H_FUNC_OFLD_MAX) -+ handler = rtw89_mac_c2h_ofld_handler[func]; -+ break; -+ case RTW89_MAC_C2H_CLASS_FWDBG: -+ return; -+ default: -+ rtw89_info(rtwdev, "c2h class %d not support\n", class); -+ return; -+ } -+ if (!handler) { -+ rtw89_info(rtwdev, "c2h class %d func %d not support\n", class, -+ func); -+ return; -+ } -+ handler(rtwdev, skb, len); -+} -+ -+bool rtw89_mac_get_txpwr_cr(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy_idx, -+ u32 reg_base, u32 *cr) -+{ -+ const struct rtw89_dle_mem *dle_mem = rtwdev->chip->dle_mem; -+ enum rtw89_qta_mode mode = dle_mem->mode; -+ u32 addr = rtw89_mac_reg_by_idx(reg_base, phy_idx); -+ -+ if (addr < R_AX_PWR_RATE_CTRL || addr > CMAC1_END_ADDR) { -+ rtw89_err(rtwdev, "[TXPWR] addr=0x%x exceed txpwr cr\n", -+ addr); -+ goto error; -+ } -+ -+ if (addr >= CMAC1_START_ADDR && addr <= CMAC1_END_ADDR) -+ if (mode == RTW89_QTA_SCC) { -+ rtw89_err(rtwdev, -+ "[TXPWR] addr=0x%x but hw not enable\n", -+ addr); -+ goto error; -+ } -+ -+ *cr = addr; -+ return true; -+ -+error: -+ rtw89_err(rtwdev, "[TXPWR] check txpwr cr 0x%x(phy%d) fail\n", -+ addr, phy_idx); -+ -+ return false; -+} -+ -+int rtw89_mac_cfg_ppdu_status(struct rtw89_dev *rtwdev, u8 mac_idx, bool enable) -+{ -+ u32 reg = rtw89_mac_reg_by_idx(R_AX_PPDU_STAT, mac_idx); -+ int ret = 0; -+ -+ ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, RTW89_CMAC_SEL); -+ if (ret) -+ return ret; -+ -+ if (!enable) { -+ rtw89_write32_clr(rtwdev, reg, B_AX_PPDU_STAT_RPT_EN); -+ return ret; -+ } -+ -+ rtw89_write32(rtwdev, reg, B_AX_PPDU_STAT_RPT_EN | -+ B_AX_APP_MAC_INFO_RPT | -+ B_AX_APP_RX_CNT_RPT | B_AX_APP_PLCP_HDR_RPT | -+ B_AX_PPDU_STAT_RPT_CRC32); -+ rtw89_write32_mask(rtwdev, R_AX_HW_RPT_FWD, B_AX_FWD_PPDU_STAT_MASK, -+ RTW89_PRPT_DEST_HOST); -+ -+ return ret; -+} -+ -+void rtw89_mac_update_rts_threshold(struct rtw89_dev *rtwdev, u8 mac_idx) -+{ -+#define MAC_AX_TIME_TH_SH 5 -+#define MAC_AX_LEN_TH_SH 4 -+#define MAC_AX_TIME_TH_MAX 255 -+#define MAC_AX_LEN_TH_MAX 255 -+#define MAC_AX_TIME_TH_DEF 88 -+#define MAC_AX_LEN_TH_DEF 4080 -+ struct ieee80211_hw *hw = rtwdev->hw; -+ u32 rts_threshold = hw->wiphy->rts_threshold; -+ u32 time_th, len_th; -+ u32 reg; -+ -+ if (rts_threshold == (u32)-1) { -+ time_th = MAC_AX_TIME_TH_DEF; -+ len_th = MAC_AX_LEN_TH_DEF; -+ } else { -+ time_th = MAC_AX_TIME_TH_MAX << MAC_AX_TIME_TH_SH; -+ len_th = rts_threshold; -+ } -+ -+ time_th = min_t(u32, time_th >> MAC_AX_TIME_TH_SH, MAC_AX_TIME_TH_MAX); -+ len_th = min_t(u32, len_th >> MAC_AX_LEN_TH_SH, MAC_AX_LEN_TH_MAX); -+ -+ reg = rtw89_mac_reg_by_idx(R_AX_AGG_LEN_HT_0, mac_idx); -+ rtw89_write16_mask(rtwdev, reg, B_AX_RTS_TXTIME_TH_MASK, time_th); -+ rtw89_write16_mask(rtwdev, reg, B_AX_RTS_LEN_TH_MASK, len_th); -+} -+ -+void rtw89_mac_flush_txq(struct rtw89_dev *rtwdev, u32 queues, bool drop) -+{ -+ bool empty; -+ int ret; -+ -+ if (!test_bit(RTW89_FLAG_POWERON, rtwdev->flags)) -+ return; -+ -+ ret = read_poll_timeout(dle_is_txq_empty, empty, empty, -+ 10000, 200000, false, rtwdev); -+ if (ret && !drop && (rtwdev->total_sta_assoc || rtwdev->scanning)) -+ rtw89_info(rtwdev, "timed out to flush queues\n"); -+} -+ -+int rtw89_mac_coex_init(struct rtw89_dev *rtwdev, const struct rtw89_mac_ax_coex *coex) -+{ -+ u8 val; -+ u16 val16; -+ u32 val32; -+ int ret; -+ -+ rtw89_write8_set(rtwdev, R_AX_GPIO_MUXCFG, B_AX_ENBT); -+ rtw89_write8_set(rtwdev, R_AX_BTC_FUNC_EN, B_AX_PTA_WL_TX_EN); -+ rtw89_write8_set(rtwdev, R_AX_BT_COEX_CFG_2 + 1, B_AX_GNT_BT_POLARITY >> 8); -+ rtw89_write8_set(rtwdev, R_AX_CSR_MODE, B_AX_STATIS_BT_EN | B_AX_WL_ACT_MSK); -+ rtw89_write8_set(rtwdev, R_AX_CSR_MODE + 2, B_AX_BT_CNT_RST >> 16); -+ rtw89_write8_clr(rtwdev, R_AX_TRXPTCL_RESP_0 + 3, B_AX_RSP_CHK_BTCCA >> 24); -+ -+ val16 = rtw89_read16(rtwdev, R_AX_CCA_CFG_0); -+ val16 = (val16 | B_AX_BTCCA_EN) & ~B_AX_BTCCA_BRK_TXOP_EN; -+ rtw89_write16(rtwdev, R_AX_CCA_CFG_0, val16); -+ -+ ret = rtw89_mac_read_lte(rtwdev, R_AX_LTE_SW_CFG_2, &val32); -+ if (ret) { -+ rtw89_err(rtwdev, "Read R_AX_LTE_SW_CFG_2 fail!\n"); -+ return ret; -+ } -+ val32 = val32 & B_AX_WL_RX_CTRL; -+ ret = rtw89_mac_write_lte(rtwdev, R_AX_LTE_SW_CFG_2, val32); -+ if (ret) { -+ rtw89_err(rtwdev, "Write R_AX_LTE_SW_CFG_2 fail!\n"); -+ return ret; -+ } -+ -+ switch (coex->pta_mode) { -+ case RTW89_MAC_AX_COEX_RTK_MODE: -+ val = rtw89_read8(rtwdev, R_AX_GPIO_MUXCFG); -+ val &= ~B_AX_BTMODE_MASK; -+ val |= FIELD_PREP(B_AX_BTMODE_MASK, MAC_AX_BT_MODE_0_3); -+ rtw89_write8(rtwdev, R_AX_GPIO_MUXCFG, val); -+ -+ val = rtw89_read8(rtwdev, R_AX_TDMA_MODE); -+ rtw89_write8(rtwdev, R_AX_TDMA_MODE, val | B_AX_RTK_BT_ENABLE); -+ -+ val = rtw89_read8(rtwdev, R_AX_BT_COEX_CFG_5); -+ val &= ~B_AX_BT_RPT_SAMPLE_RATE_MASK; -+ val |= FIELD_PREP(B_AX_BT_RPT_SAMPLE_RATE_MASK, MAC_AX_RTK_RATE); -+ rtw89_write8(rtwdev, R_AX_BT_COEX_CFG_5, val); -+ break; -+ case RTW89_MAC_AX_COEX_CSR_MODE: -+ val = rtw89_read8(rtwdev, R_AX_GPIO_MUXCFG); -+ val &= ~B_AX_BTMODE_MASK; -+ val |= FIELD_PREP(B_AX_BTMODE_MASK, MAC_AX_BT_MODE_2); -+ rtw89_write8(rtwdev, R_AX_GPIO_MUXCFG, val); -+ -+ val16 = rtw89_read16(rtwdev, R_AX_CSR_MODE); -+ val16 &= ~B_AX_BT_PRI_DETECT_TO_MASK; -+ val16 |= FIELD_PREP(B_AX_BT_PRI_DETECT_TO_MASK, MAC_AX_CSR_PRI_TO); -+ val16 &= ~B_AX_BT_TRX_INIT_DETECT_MASK; -+ val16 |= FIELD_PREP(B_AX_BT_TRX_INIT_DETECT_MASK, MAC_AX_CSR_TRX_TO); -+ val16 &= ~B_AX_BT_STAT_DELAY_MASK; -+ val16 |= FIELD_PREP(B_AX_BT_STAT_DELAY_MASK, MAC_AX_CSR_DELAY); -+ val16 |= B_AX_ENHANCED_BT; -+ rtw89_write16(rtwdev, R_AX_CSR_MODE, val16); -+ -+ rtw89_write8(rtwdev, R_AX_BT_COEX_CFG_2, MAC_AX_CSR_RATE); -+ break; -+ default: -+ return -EINVAL; -+ } -+ -+ switch (coex->direction) { -+ case RTW89_MAC_AX_COEX_INNER: -+ val = rtw89_read8(rtwdev, R_AX_GPIO_MUXCFG + 1); -+ val = (val & ~BIT(2)) | BIT(1); -+ rtw89_write8(rtwdev, R_AX_GPIO_MUXCFG + 1, val); -+ break; -+ case RTW89_MAC_AX_COEX_OUTPUT: -+ val = rtw89_read8(rtwdev, R_AX_GPIO_MUXCFG + 1); -+ val = val | BIT(1) | BIT(0); -+ rtw89_write8(rtwdev, R_AX_GPIO_MUXCFG + 1, val); -+ break; -+ case RTW89_MAC_AX_COEX_INPUT: -+ val = rtw89_read8(rtwdev, R_AX_GPIO_MUXCFG + 1); -+ val = val & ~(BIT(2) | BIT(1)); -+ rtw89_write8(rtwdev, R_AX_GPIO_MUXCFG + 1, val); -+ break; -+ default: -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+int rtw89_mac_cfg_gnt(struct rtw89_dev *rtwdev, -+ const struct rtw89_mac_ax_coex_gnt *gnt_cfg) -+{ -+ u32 val, ret; -+ -+ ret = rtw89_mac_read_lte(rtwdev, R_AX_LTE_SW_CFG_1, &val); -+ if (ret) { -+ rtw89_err(rtwdev, "Read LTE fail!\n"); -+ return ret; -+ } -+ val = (gnt_cfg->band[0].gnt_bt ? -+ B_AX_GNT_BT_RFC_S0_SW_VAL | B_AX_GNT_BT_BB_S0_SW_VAL : 0) | -+ (gnt_cfg->band[0].gnt_bt_sw_en ? -+ B_AX_GNT_BT_RFC_S0_SW_CTRL | B_AX_GNT_BT_BB_S0_SW_CTRL : 0) | -+ (gnt_cfg->band[0].gnt_wl ? -+ B_AX_GNT_WL_RFC_S0_SW_VAL | B_AX_GNT_WL_BB_S0_SW_VAL : 0) | -+ (gnt_cfg->band[0].gnt_wl_sw_en ? -+ B_AX_GNT_WL_RFC_S0_SW_CTRL | B_AX_GNT_WL_BB_S0_SW_CTRL : 0) | -+ (gnt_cfg->band[1].gnt_bt ? -+ B_AX_GNT_BT_RFC_S1_SW_VAL | B_AX_GNT_BT_BB_S1_SW_VAL : 0) | -+ (gnt_cfg->band[1].gnt_bt_sw_en ? -+ B_AX_GNT_BT_RFC_S1_SW_CTRL | B_AX_GNT_BT_BB_S1_SW_CTRL : 0) | -+ (gnt_cfg->band[1].gnt_wl ? -+ B_AX_GNT_WL_RFC_S1_SW_VAL | B_AX_GNT_WL_BB_S1_SW_VAL : 0) | -+ (gnt_cfg->band[1].gnt_wl_sw_en ? -+ B_AX_GNT_WL_RFC_S1_SW_CTRL | B_AX_GNT_WL_BB_S1_SW_CTRL : 0); -+ ret = rtw89_mac_write_lte(rtwdev, R_AX_LTE_SW_CFG_1, val); -+ if (ret) { -+ rtw89_err(rtwdev, "Write LTE fail!\n"); -+ return ret; -+ } -+ -+ return 0; -+} -+ -+int rtw89_mac_cfg_plt(struct rtw89_dev *rtwdev, struct rtw89_mac_ax_plt *plt) -+{ -+ u32 reg; -+ u8 val; -+ int ret; -+ -+ ret = rtw89_mac_check_mac_en(rtwdev, plt->band, RTW89_CMAC_SEL); -+ if (ret) -+ return ret; -+ -+ reg = rtw89_mac_reg_by_idx(R_AX_BT_PLT, plt->band); -+ val = (plt->tx & RTW89_MAC_AX_PLT_LTE_RX ? B_AX_TX_PLT_GNT_LTE_RX : 0) | -+ (plt->tx & RTW89_MAC_AX_PLT_GNT_BT_TX ? B_AX_TX_PLT_GNT_BT_TX : 0) | -+ (plt->tx & RTW89_MAC_AX_PLT_GNT_BT_RX ? B_AX_TX_PLT_GNT_BT_RX : 0) | -+ (plt->tx & RTW89_MAC_AX_PLT_GNT_WL ? B_AX_TX_PLT_GNT_WL : 0) | -+ (plt->rx & RTW89_MAC_AX_PLT_LTE_RX ? B_AX_RX_PLT_GNT_LTE_RX : 0) | -+ (plt->rx & RTW89_MAC_AX_PLT_GNT_BT_TX ? B_AX_RX_PLT_GNT_BT_TX : 0) | -+ (plt->rx & RTW89_MAC_AX_PLT_GNT_BT_RX ? B_AX_RX_PLT_GNT_BT_RX : 0) | -+ (plt->rx & RTW89_MAC_AX_PLT_GNT_WL ? B_AX_RX_PLT_GNT_WL : 0); -+ rtw89_write8(rtwdev, reg, val); -+ -+ return 0; -+} -+ -+void rtw89_mac_cfg_sb(struct rtw89_dev *rtwdev, u32 val) -+{ -+ u32 fw_sb; -+ -+ fw_sb = rtw89_read32(rtwdev, R_AX_SCOREBOARD); -+ fw_sb = FIELD_GET(B_MAC_AX_SB_FW_MASK, fw_sb); -+ fw_sb = fw_sb & ~B_MAC_AX_BTGS1_NOTIFY; -+ if (!test_bit(RTW89_FLAG_POWERON, rtwdev->flags)) -+ fw_sb = fw_sb | MAC_AX_NOTIFY_PWR_MAJOR; -+ else -+ fw_sb = fw_sb | MAC_AX_NOTIFY_TP_MAJOR; -+ val = FIELD_GET(B_MAC_AX_SB_DRV_MASK, val); -+ val = B_AX_TOGGLE | -+ FIELD_PREP(B_MAC_AX_SB_DRV_MASK, val) | -+ FIELD_PREP(B_MAC_AX_SB_FW_MASK, fw_sb); -+ rtw89_write32(rtwdev, R_AX_SCOREBOARD, val); -+ fsleep(1000); /* avoid BT FW loss information */ -+} -+ -+u32 rtw89_mac_get_sb(struct rtw89_dev *rtwdev) -+{ -+ return rtw89_read32(rtwdev, R_AX_SCOREBOARD); -+} -+ -+int rtw89_mac_cfg_ctrl_path(struct rtw89_dev *rtwdev, bool wl) -+{ -+ u8 val = rtw89_read8(rtwdev, R_AX_SYS_SDIO_CTRL + 3); -+ -+ val = wl ? val | BIT(2) : val & ~BIT(2); -+ rtw89_write8(rtwdev, R_AX_SYS_SDIO_CTRL + 3, val); -+ -+ return 0; -+} -+ -+bool rtw89_mac_get_ctrl_path(struct rtw89_dev *rtwdev) -+{ -+ u8 val = rtw89_read8(rtwdev, R_AX_SYS_SDIO_CTRL + 3); -+ -+ return FIELD_GET(B_AX_LTE_MUX_CTRL_PATH >> 24, val); -+} -+ -+static void rtw89_mac_bfee_ctrl(struct rtw89_dev *rtwdev, u8 mac_idx, bool en) -+{ -+ u32 reg; -+ u32 mask = B_AX_BFMEE_HT_NDPA_EN | B_AX_BFMEE_VHT_NDPA_EN | -+ B_AX_BFMEE_HE_NDPA_EN; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_BF, "set bfee ndpa_en to %d\n", en); -+ reg = rtw89_mac_reg_by_idx(R_AX_BFMEE_RESP_OPTION, mac_idx); -+ if (en) { -+ set_bit(RTW89_FLAG_BFEE_EN, rtwdev->flags); -+ rtw89_write32_set(rtwdev, reg, mask); -+ } else { -+ clear_bit(RTW89_FLAG_BFEE_EN, rtwdev->flags); -+ rtw89_write32_clr(rtwdev, reg, mask); -+ } -+} -+ -+static int rtw89_mac_init_bfee(struct rtw89_dev *rtwdev, u8 mac_idx) -+{ -+ u32 reg; -+ u32 val32; -+ int ret; -+ -+ ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, RTW89_CMAC_SEL); -+ if (ret) -+ return ret; -+ -+ /* AP mode set tx gid to 63 */ -+ /* STA mode set tx gid to 0(default) */ -+ reg = rtw89_mac_reg_by_idx(R_AX_BFMER_CTRL_0, mac_idx); -+ rtw89_write32_set(rtwdev, reg, B_AX_BFMER_NDP_BFEN); -+ -+ reg = rtw89_mac_reg_by_idx(R_AX_TRXPTCL_RESP_CSI_RRSC, mac_idx); -+ rtw89_write32(rtwdev, reg, CSI_RRSC_BMAP); -+ -+ reg = rtw89_mac_reg_by_idx(R_AX_BFMEE_RESP_OPTION, mac_idx); -+ val32 = FIELD_PREP(B_AX_BFMEE_BFRP_RX_STANDBY_TIMER_MASK, BFRP_RX_STANDBY_TIMER); -+ val32 |= FIELD_PREP(B_AX_BFMEE_NDP_RX_STANDBY_TIMER_MASK, NDP_RX_STANDBY_TIMER); -+ rtw89_write32(rtwdev, reg, val32); -+ rtw89_mac_bfee_ctrl(rtwdev, mac_idx, true); -+ -+ reg = rtw89_mac_reg_by_idx(R_AX_TRXPTCL_RESP_CSI_CTRL_0, mac_idx); -+ rtw89_write32_set(rtwdev, reg, B_AX_BFMEE_BFPARAM_SEL | -+ B_AX_BFMEE_USE_NSTS | -+ B_AX_BFMEE_CSI_GID_SEL | -+ B_AX_BFMEE_CSI_FORCE_RETE_EN); -+ reg = rtw89_mac_reg_by_idx(R_AX_TRXPTCL_RESP_CSI_RATE, mac_idx); -+ rtw89_write32(rtwdev, reg, -+ u32_encode_bits(CSI_INIT_RATE_HT, B_AX_BFMEE_HT_CSI_RATE_MASK) | -+ u32_encode_bits(CSI_INIT_RATE_VHT, B_AX_BFMEE_VHT_CSI_RATE_MASK) | -+ u32_encode_bits(CSI_INIT_RATE_HE, B_AX_BFMEE_HE_CSI_RATE_MASK)); -+ -+ return 0; -+} -+ -+static int rtw89_mac_set_csi_para_reg(struct rtw89_dev *rtwdev, -+ struct ieee80211_vif *vif, -+ struct ieee80211_sta *sta) -+{ -+ struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; -+ u8 mac_idx = rtwvif->mac_idx; -+ u8 nc = 1, nr = 3, ng = 0, cb = 1, cs = 1, ldpc_en = 1, stbc_en = 1; -+ u8 port_sel = rtwvif->port; -+ u8 sound_dim = 3, t; -+ u8 *phy_cap = sta->he_cap.he_cap_elem.phy_cap_info; -+ u32 reg; -+ u16 val; -+ int ret; -+ -+ ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, RTW89_CMAC_SEL); -+ if (ret) -+ return ret; -+ -+ if ((phy_cap[3] & IEEE80211_HE_PHY_CAP3_SU_BEAMFORMER) || -+ (phy_cap[4] & IEEE80211_HE_PHY_CAP4_MU_BEAMFORMER)) { -+ ldpc_en &= !!(phy_cap[1] & IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD); -+ stbc_en &= !!(phy_cap[2] & IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ); -+ t = FIELD_GET(IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK, -+ phy_cap[5]); -+ sound_dim = min(sound_dim, t); -+ } -+ if ((sta->vht_cap.cap & IEEE80211_VHT_CAP_MU_BEAMFORMER_CAPABLE) || -+ (sta->vht_cap.cap & IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE)) { -+ ldpc_en &= !!(sta->vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC); -+ stbc_en &= !!(sta->vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_MASK); -+ t = FIELD_GET(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK, -+ sta->vht_cap.cap); -+ sound_dim = min(sound_dim, t); -+ } -+ nc = min(nc, sound_dim); -+ nr = min(nr, sound_dim); -+ -+ reg = rtw89_mac_reg_by_idx(R_AX_TRXPTCL_RESP_CSI_CTRL_0, mac_idx); -+ rtw89_write32_set(rtwdev, reg, B_AX_BFMEE_BFPARAM_SEL); -+ -+ val = FIELD_PREP(B_AX_BFMEE_CSIINFO0_NC_MASK, nc) | -+ FIELD_PREP(B_AX_BFMEE_CSIINFO0_NR_MASK, nr) | -+ FIELD_PREP(B_AX_BFMEE_CSIINFO0_NG_MASK, ng) | -+ FIELD_PREP(B_AX_BFMEE_CSIINFO0_CB_MASK, cb) | -+ FIELD_PREP(B_AX_BFMEE_CSIINFO0_CS_MASK, cs) | -+ FIELD_PREP(B_AX_BFMEE_CSIINFO0_LDPC_EN, ldpc_en) | -+ FIELD_PREP(B_AX_BFMEE_CSIINFO0_STBC_EN, stbc_en); -+ -+ if (port_sel == 0) -+ reg = rtw89_mac_reg_by_idx(R_AX_TRXPTCL_RESP_CSI_CTRL_0, mac_idx); -+ else -+ reg = rtw89_mac_reg_by_idx(R_AX_TRXPTCL_RESP_CSI_CTRL_1, mac_idx); -+ -+ rtw89_write16(rtwdev, reg, val); -+ -+ return 0; -+} -+ -+static int rtw89_mac_csi_rrsc(struct rtw89_dev *rtwdev, -+ struct ieee80211_vif *vif, -+ struct ieee80211_sta *sta) -+{ -+ struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; -+ u32 rrsc = BIT(RTW89_MAC_BF_RRSC_6M) | BIT(RTW89_MAC_BF_RRSC_24M); -+ u32 reg; -+ u8 mac_idx = rtwvif->mac_idx; -+ int ret; -+ -+ ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, RTW89_CMAC_SEL); -+ if (ret) -+ return ret; -+ -+ if (sta->he_cap.has_he) { -+ rrsc |= (BIT(RTW89_MAC_BF_RRSC_HE_MSC0) | -+ BIT(RTW89_MAC_BF_RRSC_HE_MSC3) | -+ BIT(RTW89_MAC_BF_RRSC_HE_MSC5)); -+ } -+ if (sta->vht_cap.vht_supported) { -+ rrsc |= (BIT(RTW89_MAC_BF_RRSC_VHT_MSC0) | -+ BIT(RTW89_MAC_BF_RRSC_VHT_MSC3) | -+ BIT(RTW89_MAC_BF_RRSC_VHT_MSC5)); -+ } -+ if (sta->ht_cap.ht_supported) { -+ rrsc |= (BIT(RTW89_MAC_BF_RRSC_HT_MSC0) | -+ BIT(RTW89_MAC_BF_RRSC_HT_MSC3) | -+ BIT(RTW89_MAC_BF_RRSC_HT_MSC5)); -+ } -+ reg = rtw89_mac_reg_by_idx(R_AX_TRXPTCL_RESP_CSI_CTRL_0, mac_idx); -+ rtw89_write32_set(rtwdev, reg, B_AX_BFMEE_BFPARAM_SEL); -+ rtw89_write32_clr(rtwdev, reg, B_AX_BFMEE_CSI_FORCE_RETE_EN); -+ rtw89_write32(rtwdev, -+ rtw89_mac_reg_by_idx(R_AX_TRXPTCL_RESP_CSI_RRSC, mac_idx), -+ rrsc); -+ -+ return 0; -+} -+ -+void rtw89_mac_bf_assoc(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif, -+ struct ieee80211_sta *sta) -+{ -+ struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; -+ -+ if (rtw89_sta_has_beamformer_cap(sta)) { -+ rtw89_debug(rtwdev, RTW89_DBG_BF, -+ "initialize bfee for new association\n"); -+ rtw89_mac_init_bfee(rtwdev, rtwvif->mac_idx); -+ rtw89_mac_set_csi_para_reg(rtwdev, vif, sta); -+ rtw89_mac_csi_rrsc(rtwdev, vif, sta); -+ } -+} -+ -+void rtw89_mac_bf_disassoc(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif, -+ struct ieee80211_sta *sta) -+{ -+ struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; -+ -+ rtw89_mac_bfee_ctrl(rtwdev, rtwvif->mac_idx, false); -+} -+ -+void rtw89_mac_bf_set_gid_table(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif, -+ struct ieee80211_bss_conf *conf) -+{ -+ struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; -+ u8 mac_idx = rtwvif->mac_idx; -+ __le32 *p; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_BF, "update bf GID table\n"); -+ -+ p = (__le32 *)conf->mu_group.membership; -+ rtw89_write32(rtwdev, rtw89_mac_reg_by_idx(R_AX_GID_POSITION_EN0, mac_idx), -+ le32_to_cpu(p[0])); -+ rtw89_write32(rtwdev, rtw89_mac_reg_by_idx(R_AX_GID_POSITION_EN1, mac_idx), -+ le32_to_cpu(p[1])); -+ -+ p = (__le32 *)conf->mu_group.position; -+ rtw89_write32(rtwdev, rtw89_mac_reg_by_idx(R_AX_GID_POSITION0, mac_idx), -+ le32_to_cpu(p[0])); -+ rtw89_write32(rtwdev, rtw89_mac_reg_by_idx(R_AX_GID_POSITION1, mac_idx), -+ le32_to_cpu(p[1])); -+ rtw89_write32(rtwdev, rtw89_mac_reg_by_idx(R_AX_GID_POSITION2, mac_idx), -+ le32_to_cpu(p[2])); -+ rtw89_write32(rtwdev, rtw89_mac_reg_by_idx(R_AX_GID_POSITION3, mac_idx), -+ le32_to_cpu(p[3])); -+} -+ -+struct rtw89_mac_bf_monitor_iter_data { -+ struct rtw89_dev *rtwdev; -+ struct ieee80211_sta *down_sta; -+ int count; -+}; -+ -+static -+void rtw89_mac_bf_monitor_calc_iter(void *data, struct ieee80211_sta *sta) -+{ -+ struct rtw89_mac_bf_monitor_iter_data *iter_data = -+ (struct rtw89_mac_bf_monitor_iter_data *)data; -+ struct ieee80211_sta *down_sta = iter_data->down_sta; -+ int *count = &iter_data->count; -+ -+ if (down_sta == sta) -+ return; -+ -+ if (rtw89_sta_has_beamformer_cap(sta)) -+ (*count)++; -+} -+ -+void rtw89_mac_bf_monitor_calc(struct rtw89_dev *rtwdev, -+ struct ieee80211_sta *sta, bool disconnect) -+{ -+ struct rtw89_mac_bf_monitor_iter_data data; -+ -+ data.rtwdev = rtwdev; -+ data.down_sta = disconnect ? sta : NULL; -+ data.count = 0; -+ ieee80211_iterate_stations_atomic(rtwdev->hw, -+ rtw89_mac_bf_monitor_calc_iter, -+ &data); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_BF, "bfee STA count=%d\n", data.count); -+ if (data.count) -+ set_bit(RTW89_FLAG_BFEE_MON, rtwdev->flags); -+ else -+ clear_bit(RTW89_FLAG_BFEE_MON, rtwdev->flags); -+} -+ -+void _rtw89_mac_bf_monitor_track(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_traffic_stats *stats = &rtwdev->stats; -+ struct rtw89_vif *rtwvif; -+ bool en = stats->tx_tfc_lv > stats->rx_tfc_lv ? false : true; -+ bool old = test_bit(RTW89_FLAG_BFEE_EN, rtwdev->flags); -+ -+ if (en == old) -+ return; -+ -+ rtw89_for_each_rtwvif(rtwdev, rtwvif) -+ rtw89_mac_bfee_ctrl(rtwdev, rtwvif->mac_idx, en); -+} -+ -+static int -+__rtw89_mac_set_tx_time(struct rtw89_dev *rtwdev, struct rtw89_sta *rtwsta, -+ u32 tx_time) -+{ -+#define MAC_AX_DFLT_TX_TIME 5280 -+ u8 mac_idx = rtwsta->rtwvif->mac_idx; -+ u32 max_tx_time = tx_time == 0 ? MAC_AX_DFLT_TX_TIME : tx_time; -+ u32 reg; -+ int ret = 0; -+ -+ if (rtwsta->cctl_tx_time) { -+ rtwsta->ampdu_max_time = (max_tx_time - 512) >> 9; -+ ret = rtw89_fw_h2c_txtime_cmac_tbl(rtwdev, rtwsta); -+ } else { -+ ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, RTW89_CMAC_SEL); -+ if (ret) { -+ rtw89_warn(rtwdev, "failed to check cmac in set txtime\n"); -+ return ret; -+ } -+ -+ reg = rtw89_mac_reg_by_idx(R_AX_AMPDU_AGG_LIMIT, mac_idx); -+ rtw89_write32_mask(rtwdev, reg, B_AX_AMPDU_MAX_TIME_MASK, -+ max_tx_time >> 5); -+ } -+ -+ return ret; -+} -+ -+int rtw89_mac_set_tx_time(struct rtw89_dev *rtwdev, struct rtw89_sta *rtwsta, -+ bool resume, u32 tx_time) -+{ -+ int ret = 0; -+ -+ if (!resume) { -+ rtwsta->cctl_tx_time = true; -+ ret = __rtw89_mac_set_tx_time(rtwdev, rtwsta, tx_time); -+ } else { -+ ret = __rtw89_mac_set_tx_time(rtwdev, rtwsta, tx_time); -+ rtwsta->cctl_tx_time = false; -+ } -+ -+ return ret; -+} -+ -+int rtw89_mac_get_tx_time(struct rtw89_dev *rtwdev, struct rtw89_sta *rtwsta, -+ u32 *tx_time) -+{ -+ u8 mac_idx = rtwsta->rtwvif->mac_idx; -+ u32 reg; -+ int ret = 0; -+ -+ if (rtwsta->cctl_tx_time) { -+ *tx_time = (rtwsta->ampdu_max_time + 1) << 9; -+ } else { -+ ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, RTW89_CMAC_SEL); -+ if (ret) { -+ rtw89_warn(rtwdev, "failed to check cmac in tx_time\n"); -+ return ret; -+ } -+ -+ reg = rtw89_mac_reg_by_idx(R_AX_AMPDU_AGG_LIMIT, mac_idx); -+ *tx_time = rtw89_read32_mask(rtwdev, reg, B_AX_AMPDU_MAX_TIME_MASK) << 5; -+ } -+ -+ return ret; -+} -+ -+int rtw89_mac_set_tx_retry_limit(struct rtw89_dev *rtwdev, -+ struct rtw89_sta *rtwsta, -+ bool resume, u8 tx_retry) -+{ -+ int ret = 0; -+ -+ rtwsta->data_tx_cnt_lmt = tx_retry; -+ -+ if (!resume) { -+ rtwsta->cctl_tx_retry_limit = true; -+ ret = rtw89_fw_h2c_txtime_cmac_tbl(rtwdev, rtwsta); -+ } else { -+ ret = rtw89_fw_h2c_txtime_cmac_tbl(rtwdev, rtwsta); -+ rtwsta->cctl_tx_retry_limit = false; -+ } -+ -+ return ret; -+} -+ -+int rtw89_mac_get_tx_retry_limit(struct rtw89_dev *rtwdev, -+ struct rtw89_sta *rtwsta, u8 *tx_retry) -+{ -+ u8 mac_idx = rtwsta->rtwvif->mac_idx; -+ u32 reg; -+ int ret = 0; -+ -+ if (rtwsta->cctl_tx_retry_limit) { -+ *tx_retry = rtwsta->data_tx_cnt_lmt; -+ } else { -+ ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, RTW89_CMAC_SEL); -+ if (ret) { -+ rtw89_warn(rtwdev, "failed to check cmac in rty_lmt\n"); -+ return ret; -+ } -+ -+ reg = rtw89_mac_reg_by_idx(R_AX_TXCNT, mac_idx); -+ *tx_retry = rtw89_read32_mask(rtwdev, reg, B_AX_L_TXCNT_LMT_MASK); -+ } -+ -+ return ret; -+} -+ -+int rtw89_mac_set_hw_muedca_ctrl(struct rtw89_dev *rtwdev, -+ struct rtw89_vif *rtwvif, bool en) -+{ -+ u8 mac_idx = rtwvif->mac_idx; -+ u16 set = B_AX_MUEDCA_EN_0 | B_AX_SET_MUEDCATIMER_TF_0; -+ u32 reg; -+ u32 ret; -+ -+ ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, RTW89_CMAC_SEL); -+ if (ret) -+ return ret; -+ -+ reg = rtw89_mac_reg_by_idx(R_AX_MUEDCA_EN, mac_idx); -+ if (en) -+ rtw89_write16_set(rtwdev, reg, set); -+ else -+ rtw89_write16_clr(rtwdev, reg, set); -+ -+ return 0; -+} -diff --git a/drivers/net/wireless/realtek/rtw89/mac.h b/drivers/net/wireless/realtek/rtw89/mac.h -new file mode 100644 -index 000000000000..6f3db8a2a9c2 ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/mac.h -@@ -0,0 +1,860 @@ -+/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ -+/* Copyright(c) 2019-2020 Realtek Corporation -+ */ -+ -+#ifndef __RTW89_MAC_H__ -+#define __RTW89_MAC_H__ -+ -+#include "core.h" -+ -+#define MAC_MEM_DUMP_PAGE_SIZE 0x40000 -+#define ADDR_CAM_ENT_SIZE 0x40 -+#define BSSID_CAM_ENT_SIZE 0x08 -+#define HFC_PAGE_UNIT 64 -+ -+enum rtw89_mac_hwmod_sel { -+ RTW89_DMAC_SEL = 0, -+ RTW89_CMAC_SEL = 1, -+ -+ RTW89_MAC_INVALID, -+}; -+ -+enum rtw89_mac_fwd_target { -+ RTW89_FWD_DONT_CARE = 0, -+ RTW89_FWD_TO_HOST = 1, -+ RTW89_FWD_TO_WLAN_CPU = 2 -+}; -+ -+enum rtw89_mac_wd_dma_intvl { -+ RTW89_MAC_WD_DMA_INTVL_0S, -+ RTW89_MAC_WD_DMA_INTVL_256NS, -+ RTW89_MAC_WD_DMA_INTVL_512NS, -+ RTW89_MAC_WD_DMA_INTVL_768NS, -+ RTW89_MAC_WD_DMA_INTVL_1US, -+ RTW89_MAC_WD_DMA_INTVL_1_5US, -+ RTW89_MAC_WD_DMA_INTVL_2US, -+ RTW89_MAC_WD_DMA_INTVL_4US, -+ RTW89_MAC_WD_DMA_INTVL_8US, -+ RTW89_MAC_WD_DMA_INTVL_16US, -+ RTW89_MAC_WD_DMA_INTVL_DEF = 0xFE -+}; -+ -+enum rtw89_mac_multi_tag_num { -+ RTW89_MAC_TAG_NUM_1, -+ RTW89_MAC_TAG_NUM_2, -+ RTW89_MAC_TAG_NUM_3, -+ RTW89_MAC_TAG_NUM_4, -+ RTW89_MAC_TAG_NUM_5, -+ RTW89_MAC_TAG_NUM_6, -+ RTW89_MAC_TAG_NUM_7, -+ RTW89_MAC_TAG_NUM_8, -+ RTW89_MAC_TAG_NUM_DEF = 0xFE -+}; -+ -+enum rtw89_mac_lbc_tmr { -+ RTW89_MAC_LBC_TMR_8US = 0, -+ RTW89_MAC_LBC_TMR_16US, -+ RTW89_MAC_LBC_TMR_32US, -+ RTW89_MAC_LBC_TMR_64US, -+ RTW89_MAC_LBC_TMR_128US, -+ RTW89_MAC_LBC_TMR_256US, -+ RTW89_MAC_LBC_TMR_512US, -+ RTW89_MAC_LBC_TMR_1MS, -+ RTW89_MAC_LBC_TMR_2MS, -+ RTW89_MAC_LBC_TMR_4MS, -+ RTW89_MAC_LBC_TMR_8MS, -+ RTW89_MAC_LBC_TMR_DEF = 0xFE -+}; -+ -+enum rtw89_mac_cpuio_op_cmd_type { -+ CPUIO_OP_CMD_GET_1ST_PID = 0, -+ CPUIO_OP_CMD_GET_NEXT_PID = 1, -+ CPUIO_OP_CMD_ENQ_TO_TAIL = 4, -+ CPUIO_OP_CMD_ENQ_TO_HEAD = 5, -+ CPUIO_OP_CMD_DEQ = 8, -+ CPUIO_OP_CMD_DEQ_ENQ_ALL = 9, -+ CPUIO_OP_CMD_DEQ_ENQ_TO_TAIL = 12 -+}; -+ -+enum rtw89_mac_wde_dle_port_id { -+ WDE_DLE_PORT_ID_DISPATCH = 0, -+ WDE_DLE_PORT_ID_PKTIN = 1, -+ WDE_DLE_PORT_ID_CMAC0 = 3, -+ WDE_DLE_PORT_ID_CMAC1 = 4, -+ WDE_DLE_PORT_ID_CPU_IO = 6, -+ WDE_DLE_PORT_ID_WDRLS = 7, -+ WDE_DLE_PORT_ID_END = 8 -+}; -+ -+enum rtw89_mac_wde_dle_queid_wdrls { -+ WDE_DLE_QUEID_TXOK = 0, -+ WDE_DLE_QUEID_DROP_RETRY_LIMIT = 1, -+ WDE_DLE_QUEID_DROP_LIFETIME_TO = 2, -+ WDE_DLE_QUEID_DROP_MACID_DROP = 3, -+ WDE_DLE_QUEID_NO_REPORT = 4 -+}; -+ -+enum rtw89_mac_ple_dle_port_id { -+ PLE_DLE_PORT_ID_DISPATCH = 0, -+ PLE_DLE_PORT_ID_MPDU = 1, -+ PLE_DLE_PORT_ID_SEC = 2, -+ PLE_DLE_PORT_ID_CMAC0 = 3, -+ PLE_DLE_PORT_ID_CMAC1 = 4, -+ PLE_DLE_PORT_ID_WDRLS = 5, -+ PLE_DLE_PORT_ID_CPU_IO = 6, -+ PLE_DLE_PORT_ID_PLRLS = 7, -+ PLE_DLE_PORT_ID_END = 8 -+}; -+ -+enum rtw89_mac_ple_dle_queid_plrls { -+ PLE_DLE_QUEID_NO_REPORT = 0x0 -+}; -+ -+enum rtw89_machdr_frame_type { -+ RTW89_MGNT = 0, -+ RTW89_CTRL = 1, -+ RTW89_DATA = 2, -+}; -+ -+enum rtw89_mac_dle_dfi_type { -+ DLE_DFI_TYPE_FREEPG = 0, -+ DLE_DFI_TYPE_QUOTA = 1, -+ DLE_DFI_TYPE_PAGELLT = 2, -+ DLE_DFI_TYPE_PKTINFO = 3, -+ DLE_DFI_TYPE_PREPKTLLT = 4, -+ DLE_DFI_TYPE_NXTPKTLLT = 5, -+ DLE_DFI_TYPE_QLNKTBL = 6, -+ DLE_DFI_TYPE_QEMPTY = 7, -+}; -+ -+enum rtw89_mac_dle_wde_quota_id { -+ WDE_QTAID_HOST_IF = 0, -+ WDE_QTAID_WLAN_CPU = 1, -+ WDE_QTAID_DATA_CPU = 2, -+ WDE_QTAID_PKTIN = 3, -+ WDE_QTAID_CPUIO = 4, -+}; -+ -+enum rtw89_mac_dle_ple_quota_id { -+ PLE_QTAID_B0_TXPL = 0, -+ PLE_QTAID_B1_TXPL = 1, -+ PLE_QTAID_C2H = 2, -+ PLE_QTAID_H2C = 3, -+ PLE_QTAID_WLAN_CPU = 4, -+ PLE_QTAID_MPDU = 5, -+ PLE_QTAID_CMAC0_RX = 6, -+ PLE_QTAID_CMAC1_RX = 7, -+ PLE_QTAID_CMAC1_BBRPT = 8, -+ PLE_QTAID_WDRLS = 9, -+ PLE_QTAID_CPUIO = 10, -+}; -+ -+enum rtw89_mac_dle_ctrl_type { -+ DLE_CTRL_TYPE_WDE = 0, -+ DLE_CTRL_TYPE_PLE = 1, -+ DLE_CTRL_TYPE_NUM = 2, -+}; -+ -+enum rtw89_mac_ax_l0_to_l1_event { -+ MAC_AX_L0_TO_L1_CHIF_IDLE = 0, -+ MAC_AX_L0_TO_L1_CMAC_DMA_IDLE = 1, -+ MAC_AX_L0_TO_L1_RLS_PKID = 2, -+ MAC_AX_L0_TO_L1_PTCL_IDLE = 3, -+ MAC_AX_L0_TO_L1_RX_QTA_LOST = 4, -+ MAC_AX_L0_TO_L1_DLE_STAT_HANG = 5, -+ MAC_AX_L0_TO_L1_PCIE_STUCK = 6, -+ MAC_AX_L0_TO_L1_EVENT_MAX = 15, -+}; -+ -+enum rtw89_mac_dbg_port_sel { -+ /* CMAC 0 related */ -+ RTW89_DBG_PORT_SEL_PTCL_C0 = 0, -+ RTW89_DBG_PORT_SEL_SCH_C0, -+ RTW89_DBG_PORT_SEL_TMAC_C0, -+ RTW89_DBG_PORT_SEL_RMAC_C0, -+ RTW89_DBG_PORT_SEL_RMACST_C0, -+ RTW89_DBG_PORT_SEL_RMAC_PLCP_C0, -+ RTW89_DBG_PORT_SEL_TRXPTCL_C0, -+ RTW89_DBG_PORT_SEL_TX_INFOL_C0, -+ RTW89_DBG_PORT_SEL_TX_INFOH_C0, -+ RTW89_DBG_PORT_SEL_TXTF_INFOL_C0, -+ RTW89_DBG_PORT_SEL_TXTF_INFOH_C0, -+ /* CMAC 1 related */ -+ RTW89_DBG_PORT_SEL_PTCL_C1, -+ RTW89_DBG_PORT_SEL_SCH_C1, -+ RTW89_DBG_PORT_SEL_TMAC_C1, -+ RTW89_DBG_PORT_SEL_RMAC_C1, -+ RTW89_DBG_PORT_SEL_RMACST_C1, -+ RTW89_DBG_PORT_SEL_RMAC_PLCP_C1, -+ RTW89_DBG_PORT_SEL_TRXPTCL_C1, -+ RTW89_DBG_PORT_SEL_TX_INFOL_C1, -+ RTW89_DBG_PORT_SEL_TX_INFOH_C1, -+ RTW89_DBG_PORT_SEL_TXTF_INFOL_C1, -+ RTW89_DBG_PORT_SEL_TXTF_INFOH_C1, -+ /* DLE related */ -+ RTW89_DBG_PORT_SEL_WDE_BUFMGN_FREEPG, -+ RTW89_DBG_PORT_SEL_WDE_BUFMGN_QUOTA, -+ RTW89_DBG_PORT_SEL_WDE_BUFMGN_PAGELLT, -+ RTW89_DBG_PORT_SEL_WDE_BUFMGN_PKTINFO, -+ RTW89_DBG_PORT_SEL_WDE_QUEMGN_PREPKT, -+ RTW89_DBG_PORT_SEL_WDE_QUEMGN_NXTPKT, -+ RTW89_DBG_PORT_SEL_WDE_QUEMGN_QLNKTBL, -+ RTW89_DBG_PORT_SEL_WDE_QUEMGN_QEMPTY, -+ RTW89_DBG_PORT_SEL_PLE_BUFMGN_FREEPG, -+ RTW89_DBG_PORT_SEL_PLE_BUFMGN_QUOTA, -+ RTW89_DBG_PORT_SEL_PLE_BUFMGN_PAGELLT, -+ RTW89_DBG_PORT_SEL_PLE_BUFMGN_PKTINFO, -+ RTW89_DBG_PORT_SEL_PLE_QUEMGN_PREPKT, -+ RTW89_DBG_PORT_SEL_PLE_QUEMGN_NXTPKT, -+ RTW89_DBG_PORT_SEL_PLE_QUEMGN_QLNKTBL, -+ RTW89_DBG_PORT_SEL_PLE_QUEMGN_QEMPTY, -+ RTW89_DBG_PORT_SEL_PKTINFO, -+ /* PCIE related */ -+ RTW89_DBG_PORT_SEL_PCIE_TXDMA, -+ RTW89_DBG_PORT_SEL_PCIE_RXDMA, -+ RTW89_DBG_PORT_SEL_PCIE_CVT, -+ RTW89_DBG_PORT_SEL_PCIE_CXPL, -+ RTW89_DBG_PORT_SEL_PCIE_IO, -+ RTW89_DBG_PORT_SEL_PCIE_MISC, -+ RTW89_DBG_PORT_SEL_PCIE_MISC2, -+ -+ /* keep last */ -+ RTW89_DBG_PORT_SEL_LAST, -+ RTW89_DBG_PORT_SEL_MAX = RTW89_DBG_PORT_SEL_LAST, -+ RTW89_DBG_PORT_SEL_INVALID = RTW89_DBG_PORT_SEL_LAST, -+}; -+ -+/* SRAM mem dump */ -+#define R_AX_INDIR_ACCESS_ENTRY 0x40000 -+ -+#define STA_SCHED_BASE_ADDR 0x18808000 -+#define RXPLD_FLTR_CAM_BASE_ADDR 0x18813000 -+#define SECURITY_CAM_BASE_ADDR 0x18814000 -+#define WOW_CAM_BASE_ADDR 0x18815000 -+#define CMAC_TBL_BASE_ADDR 0x18840000 -+#define ADDR_CAM_BASE_ADDR 0x18850000 -+#define BSSID_CAM_BASE_ADDR 0x18853000 -+#define BA_CAM_BASE_ADDR 0x18854000 -+#define BCN_IE_CAM0_BASE_ADDR 0x18855000 -+#define SHARED_BUF_BASE_ADDR 0x18700000 -+#define DMAC_TBL_BASE_ADDR 0x18800000 -+#define SHCUT_MACHDR_BASE_ADDR 0x18800800 -+#define BCN_IE_CAM1_BASE_ADDR 0x188A0000 -+ -+#define CCTL_INFO_SIZE 32 -+ -+enum rtw89_mac_mem_sel { -+ RTW89_MAC_MEM_SHARED_BUF, -+ RTW89_MAC_MEM_DMAC_TBL, -+ RTW89_MAC_MEM_SHCUT_MACHDR, -+ RTW89_MAC_MEM_STA_SCHED, -+ RTW89_MAC_MEM_RXPLD_FLTR_CAM, -+ RTW89_MAC_MEM_SECURITY_CAM, -+ RTW89_MAC_MEM_WOW_CAM, -+ RTW89_MAC_MEM_CMAC_TBL, -+ RTW89_MAC_MEM_ADDR_CAM, -+ RTW89_MAC_MEM_BA_CAM, -+ RTW89_MAC_MEM_BCN_IE_CAM0, -+ RTW89_MAC_MEM_BCN_IE_CAM1, -+ -+ /* keep last */ -+ RTW89_MAC_MEM_LAST, -+ RTW89_MAC_MEM_MAX = RTW89_MAC_MEM_LAST, -+ RTW89_MAC_MEM_INVALID = RTW89_MAC_MEM_LAST, -+}; -+ -+enum rtw89_rpwm_req_pwr_state { -+ RTW89_MAC_RPWM_REQ_PWR_STATE_ACTIVE = 0, -+ RTW89_MAC_RPWM_REQ_PWR_STATE_BAND0_RFON = 1, -+ RTW89_MAC_RPWM_REQ_PWR_STATE_BAND1_RFON = 2, -+ RTW89_MAC_RPWM_REQ_PWR_STATE_BAND0_RFOFF = 3, -+ RTW89_MAC_RPWM_REQ_PWR_STATE_BAND1_RFOFF = 4, -+ RTW89_MAC_RPWM_REQ_PWR_STATE_CLK_GATED = 5, -+ RTW89_MAC_RPWM_REQ_PWR_STATE_PWR_GATED = 6, -+ RTW89_MAC_RPWM_REQ_PWR_STATE_HIOE_PWR_GATED = 7, -+ RTW89_MAC_RPWM_REQ_PWR_STATE_MAX, -+}; -+ -+struct rtw89_pwr_cfg { -+ u16 addr; -+ u8 cv_msk; -+ u8 intf_msk; -+ u8 base:4; -+ u8 cmd:4; -+ u8 msk; -+ u8 val; -+}; -+ -+enum rtw89_mac_c2h_ofld_func { -+ RTW89_MAC_C2H_FUNC_EFUSE_DUMP, -+ RTW89_MAC_C2H_FUNC_READ_RSP, -+ RTW89_MAC_C2H_FUNC_PKT_OFLD_RSP, -+ RTW89_MAC_C2H_FUNC_BCN_RESEND, -+ RTW89_MAC_C2H_FUNC_MACID_PAUSE, -+ RTW89_MAC_C2H_FUNC_OFLD_MAX, -+}; -+ -+enum rtw89_mac_c2h_info_func { -+ RTW89_MAC_C2H_FUNC_REC_ACK, -+ RTW89_MAC_C2H_FUNC_DONE_ACK, -+ RTW89_MAC_C2H_FUNC_C2H_LOG, -+ RTW89_MAC_C2H_FUNC_INFO_MAX, -+}; -+ -+enum rtw89_mac_c2h_class { -+ RTW89_MAC_C2H_CLASS_INFO, -+ RTW89_MAC_C2H_CLASS_OFLD, -+ RTW89_MAC_C2H_CLASS_TWT, -+ RTW89_MAC_C2H_CLASS_WOW, -+ RTW89_MAC_C2H_CLASS_MCC, -+ RTW89_MAC_C2H_CLASS_FWDBG, -+ RTW89_MAC_C2H_CLASS_MAX, -+}; -+ -+struct rtw89_mac_ax_coex { -+#define RTW89_MAC_AX_COEX_RTK_MODE 0 -+#define RTW89_MAC_AX_COEX_CSR_MODE 1 -+ u8 pta_mode; -+#define RTW89_MAC_AX_COEX_INNER 0 -+#define RTW89_MAC_AX_COEX_OUTPUT 1 -+#define RTW89_MAC_AX_COEX_INPUT 2 -+ u8 direction; -+}; -+ -+struct rtw89_mac_ax_plt { -+#define RTW89_MAC_AX_PLT_LTE_RX BIT(0) -+#define RTW89_MAC_AX_PLT_GNT_BT_TX BIT(1) -+#define RTW89_MAC_AX_PLT_GNT_BT_RX BIT(2) -+#define RTW89_MAC_AX_PLT_GNT_WL BIT(3) -+ u8 band; -+ u8 tx; -+ u8 rx; -+}; -+ -+enum rtw89_mac_bf_rrsc_rate { -+ RTW89_MAC_BF_RRSC_6M = 0, -+ RTW89_MAC_BF_RRSC_9M = 1, -+ RTW89_MAC_BF_RRSC_12M, -+ RTW89_MAC_BF_RRSC_18M, -+ RTW89_MAC_BF_RRSC_24M, -+ RTW89_MAC_BF_RRSC_36M, -+ RTW89_MAC_BF_RRSC_48M, -+ RTW89_MAC_BF_RRSC_54M, -+ RTW89_MAC_BF_RRSC_HT_MSC0, -+ RTW89_MAC_BF_RRSC_HT_MSC1, -+ RTW89_MAC_BF_RRSC_HT_MSC2, -+ RTW89_MAC_BF_RRSC_HT_MSC3, -+ RTW89_MAC_BF_RRSC_HT_MSC4, -+ RTW89_MAC_BF_RRSC_HT_MSC5, -+ RTW89_MAC_BF_RRSC_HT_MSC6, -+ RTW89_MAC_BF_RRSC_HT_MSC7, -+ RTW89_MAC_BF_RRSC_VHT_MSC0, -+ RTW89_MAC_BF_RRSC_VHT_MSC1, -+ RTW89_MAC_BF_RRSC_VHT_MSC2, -+ RTW89_MAC_BF_RRSC_VHT_MSC3, -+ RTW89_MAC_BF_RRSC_VHT_MSC4, -+ RTW89_MAC_BF_RRSC_VHT_MSC5, -+ RTW89_MAC_BF_RRSC_VHT_MSC6, -+ RTW89_MAC_BF_RRSC_VHT_MSC7, -+ RTW89_MAC_BF_RRSC_HE_MSC0, -+ RTW89_MAC_BF_RRSC_HE_MSC1, -+ RTW89_MAC_BF_RRSC_HE_MSC2, -+ RTW89_MAC_BF_RRSC_HE_MSC3, -+ RTW89_MAC_BF_RRSC_HE_MSC4, -+ RTW89_MAC_BF_RRSC_HE_MSC5, -+ RTW89_MAC_BF_RRSC_HE_MSC6, -+ RTW89_MAC_BF_RRSC_HE_MSC7 = 31, -+ RTW89_MAC_BF_RRSC_MAX = 32 -+}; -+ -+#define RTW89_R32_EA 0xEAEAEAEA -+#define RTW89_R32_DEAD 0xDEADBEEF -+#define MAC_REG_POOL_COUNT 10 -+#define ACCESS_CMAC(_addr) \ -+ ({typeof(_addr) __addr = (_addr); \ -+ __addr >= R_AX_CMAC_REG_START && __addr <= R_AX_CMAC_REG_END; }) -+ -+#define PTCL_IDLE_POLL_CNT 10000 -+#define SW_CVR_DUR_US 8 -+#define SW_CVR_CNT 8 -+ -+#define DLE_BOUND_UNIT (8 * 1024) -+#define DLE_WAIT_CNT 2000 -+#define TRXCFG_WAIT_CNT 2000 -+ -+#define RTW89_WDE_PG_64 64 -+#define RTW89_WDE_PG_128 128 -+#define RTW89_WDE_PG_256 256 -+ -+#define S_AX_WDE_PAGE_SEL_64 0 -+#define S_AX_WDE_PAGE_SEL_128 1 -+#define S_AX_WDE_PAGE_SEL_256 2 -+ -+#define RTW89_PLE_PG_64 64 -+#define RTW89_PLE_PG_128 128 -+#define RTW89_PLE_PG_256 256 -+ -+#define S_AX_PLE_PAGE_SEL_64 0 -+#define S_AX_PLE_PAGE_SEL_128 1 -+#define S_AX_PLE_PAGE_SEL_256 2 -+ -+#define SDIO_LOCAL_BASE_ADDR 0x80000000 -+ -+#define PWR_CMD_WRITE 0 -+#define PWR_CMD_POLL 1 -+#define PWR_CMD_DELAY 2 -+#define PWR_CMD_END 3 -+ -+#define PWR_INTF_MSK_SDIO BIT(0) -+#define PWR_INTF_MSK_USB BIT(1) -+#define PWR_INTF_MSK_PCIE BIT(2) -+#define PWR_INTF_MSK_ALL 0x7 -+ -+#define PWR_BASE_MAC 0 -+#define PWR_BASE_USB 1 -+#define PWR_BASE_PCIE 2 -+#define PWR_BASE_SDIO 3 -+ -+#define PWR_CV_MSK_A BIT(0) -+#define PWR_CV_MSK_B BIT(1) -+#define PWR_CV_MSK_C BIT(2) -+#define PWR_CV_MSK_D BIT(3) -+#define PWR_CV_MSK_E BIT(4) -+#define PWR_CV_MSK_F BIT(5) -+#define PWR_CV_MSK_G BIT(6) -+#define PWR_CV_MSK_TEST BIT(7) -+#define PWR_CV_MSK_ALL 0xFF -+ -+#define PWR_DELAY_US 0 -+#define PWR_DELAY_MS 1 -+ -+/* STA scheduler */ -+#define SS_MACID_SH 8 -+#define SS_TX_LEN_MSK 0x1FFFFF -+#define SS_CTRL1_R_TX_LEN 5 -+#define SS_CTRL1_R_NEXT_LINK 20 -+#define SS_LINK_SIZE 256 -+ -+/* MAC debug port */ -+#define TMAC_DBG_SEL_C0 0xA5 -+#define RMAC_DBG_SEL_C0 0xA6 -+#define TRXPTCL_DBG_SEL_C0 0xA7 -+#define TMAC_DBG_SEL_C1 0xB5 -+#define RMAC_DBG_SEL_C1 0xB6 -+#define TRXPTCL_DBG_SEL_C1 0xB7 -+#define FW_PROG_CNTR_DBG_SEL 0xF2 -+#define PCIE_TXDMA_DBG_SEL 0x30 -+#define PCIE_RXDMA_DBG_SEL 0x31 -+#define PCIE_CVT_DBG_SEL 0x32 -+#define PCIE_CXPL_DBG_SEL 0x33 -+#define PCIE_IO_DBG_SEL 0x37 -+#define PCIE_MISC_DBG_SEL 0x38 -+#define PCIE_MISC2_DBG_SEL 0x00 -+#define MAC_DBG_SEL 1 -+#define RMAC_CMAC_DBG_SEL 1 -+ -+/* TRXPTCL dbg port sel */ -+#define TRXPTRL_DBG_SEL_TMAC 0 -+#define TRXPTRL_DBG_SEL_RMAC 1 -+ -+struct rtw89_cpuio_ctrl { -+ u16 pkt_num; -+ u16 start_pktid; -+ u16 end_pktid; -+ u8 cmd_type; -+ u8 macid; -+ u8 src_pid; -+ u8 src_qid; -+ u8 dst_pid; -+ u8 dst_qid; -+ u16 pktid; -+}; -+ -+struct rtw89_mac_dbg_port_info { -+ u32 sel_addr; -+ u8 sel_byte; -+ u32 sel_msk; -+ u32 srt; -+ u32 end; -+ u32 rd_addr; -+ u8 rd_byte; -+ u32 rd_msk; -+}; -+ -+#define QLNKTBL_ADDR_INFO_SEL BIT(0) -+#define QLNKTBL_ADDR_INFO_SEL_0 0 -+#define QLNKTBL_ADDR_INFO_SEL_1 1 -+#define QLNKTBL_ADDR_TBL_IDX_MASK GENMASK(10, 1) -+#define QLNKTBL_DATA_SEL1_PKT_CNT_MASK GENMASK(11, 0) -+ -+struct rtw89_mac_dle_dfi_ctrl { -+ enum rtw89_mac_dle_ctrl_type type; -+ u32 target; -+ u32 addr; -+ u32 out_data; -+}; -+ -+struct rtw89_mac_dle_dfi_quota { -+ enum rtw89_mac_dle_ctrl_type dle_type; -+ u32 qtaid; -+ u16 rsv_pgnum; -+ u16 use_pgnum; -+}; -+ -+struct rtw89_mac_dle_dfi_qempty { -+ enum rtw89_mac_dle_ctrl_type dle_type; -+ u32 grpsel; -+ u32 qempty; -+}; -+ -+/* Define DBG and recovery enum */ -+enum mac_ax_err_info { -+ /* Get error info */ -+ -+ /* L0 */ -+ MAC_AX_ERR_L0_ERR_CMAC0 = 0x0001, -+ MAC_AX_ERR_L0_ERR_CMAC1 = 0x0002, -+ MAC_AX_ERR_L0_RESET_DONE = 0x0003, -+ MAC_AX_ERR_L0_PROMOTE_TO_L1 = 0x0010, -+ -+ /* L1 */ -+ MAC_AX_ERR_L1_ERR_DMAC = 0x1000, -+ MAC_AX_ERR_L1_RESET_DISABLE_DMAC_DONE = 0x1001, -+ MAC_AX_ERR_L1_RESET_RECOVERY_DONE = 0x1002, -+ MAC_AX_ERR_L1_PROMOTE_TO_L2 = 0x1010, -+ MAC_AX_ERR_L1_RCVY_STOP_DONE = 0x1011, -+ -+ /* L2 */ -+ /* address hole (master) */ -+ MAC_AX_ERR_L2_ERR_AH_DMA = 0x2000, -+ MAC_AX_ERR_L2_ERR_AH_HCI = 0x2010, -+ MAC_AX_ERR_L2_ERR_AH_RLX4081 = 0x2020, -+ MAC_AX_ERR_L2_ERR_AH_IDDMA = 0x2030, -+ MAC_AX_ERR_L2_ERR_AH_HIOE = 0x2040, -+ MAC_AX_ERR_L2_ERR_AH_IPSEC = 0x2050, -+ MAC_AX_ERR_L2_ERR_AH_RX4281 = 0x2060, -+ MAC_AX_ERR_L2_ERR_AH_OTHERS = 0x2070, -+ -+ /* AHB bridge timeout (master) */ -+ MAC_AX_ERR_L2_ERR_AHB_TO_DMA = 0x2100, -+ MAC_AX_ERR_L2_ERR_AHB_TO_HCI = 0x2110, -+ MAC_AX_ERR_L2_ERR_AHB_TO_RLX4081 = 0x2120, -+ MAC_AX_ERR_L2_ERR_AHB_TO_IDDMA = 0x2130, -+ MAC_AX_ERR_L2_ERR_AHB_TO_HIOE = 0x2140, -+ MAC_AX_ERR_L2_ERR_AHB_TO_IPSEC = 0x2150, -+ MAC_AX_ERR_L2_ERR_AHB_TO_RX4281 = 0x2160, -+ MAC_AX_ERR_L2_ERR_AHB_TO_OTHERS = 0x2170, -+ -+ /* APB_SA bridge timeout (master + slave) */ -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_DMA_WVA = 0x2200, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_DMA_UART = 0x2201, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_DMA_CPULOCAL = 0x2202, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_DMA_AXIDMA = 0x2203, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_DMA_HIOE = 0x2204, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_DMA_IDDMA = 0x2205, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_DMA_IPSEC = 0x2206, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_DMA_WON = 0x2207, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_DMA_WDMAC = 0x2208, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_DMA_WCMAC = 0x2209, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_DMA_OTHERS = 0x220A, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_HCI_WVA = 0x2210, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_HCI_UART = 0x2211, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_HCI_CPULOCAL = 0x2212, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_HCI_AXIDMA = 0x2213, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_HCI_HIOE = 0x2214, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_HCI_IDDMA = 0x2215, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_HCI_IPSEC = 0x2216, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_HCI_WDMAC = 0x2218, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_HCI_WCMAC = 0x2219, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_HCI_OTHERS = 0x221A, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_RLX4081_WVA = 0x2220, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_RLX4081_UART = 0x2221, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_RLX4081_CPULOCAL = 0x2222, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_RLX4081_AXIDMA = 0x2223, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_RLX4081_HIOE = 0x2224, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_RLX4081_IDDMA = 0x2225, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_RLX4081_IPSEC = 0x2226, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_RLX4081_WON = 0x2227, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_RLX4081_WDMAC = 0x2228, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_RLX4081_WCMAC = 0x2229, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_RLX4081_OTHERS = 0x222A, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_IDDMA_WVA = 0x2230, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_IDDMA_UART = 0x2231, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_IDDMA_CPULOCAL = 0x2232, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_IDDMA_AXIDMA = 0x2233, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_IDDMA_HIOE = 0x2234, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_IDDMA_IDDMA = 0x2235, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_IDDMA_IPSEC = 0x2236, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_IDDMA_WON = 0x2237, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_IDDMA_WDMAC = 0x2238, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_IDDMA_WCMAC = 0x2239, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_IDDMA_OTHERS = 0x223A, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_HIOE_WVA = 0x2240, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_HIOE_UART = 0x2241, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_HIOE_CPULOCAL = 0x2242, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_HIOE_AXIDMA = 0x2243, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_HIOE_HIOE = 0x2244, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_HIOE_IDDMA = 0x2245, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_HIOE_IPSEC = 0x2246, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_HIOE_WON = 0x2247, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_HIOE_WDMAC = 0x2248, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_HIOE_WCMAC = 0x2249, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_HIOE_OTHERS = 0x224A, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_IPSEC_WVA = 0x2250, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_IPSEC_UART = 0x2251, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_IPSEC_CPULOCAL = 0x2252, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_IPSEC_AXIDMA = 0x2253, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_IPSEC_HIOE = 0x2254, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_IPSEC_IDDMA = 0x2255, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_IPSEC_IPSEC = 0x2256, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_IPSEC_WON = 0x2257, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_IPSEC_WDMAC = 0x2258, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_IPSEC_WCMAC = 0x2259, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_IPSEC_OTHERS = 0x225A, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_RX4281_WVA = 0x2260, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_RX4281_UART = 0x2261, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_RX4281_CPULOCAL = 0x2262, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_RX4281_AXIDMA = 0x2263, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_RX4281_HIOE = 0x2264, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_RX4281_IDDMA = 0x2265, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_RX4281_IPSEC = 0x2266, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_RX4281_WON = 0x2267, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_RX4281_WDMAC = 0x2268, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_RX4281_WCMAC = 0x2269, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_RX4281_OTHERS = 0x226A, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_OTHERS_WVA = 0x2270, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_OTHERS_UART = 0x2271, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_OTHERS_CPULOCAL = 0x2272, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_OTHERS_AXIDMA = 0x2273, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_OTHERS_HIOE = 0x2274, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_OTHERS_IDDMA = 0x2275, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_OTHERS_IPSEC = 0x2276, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_OTHERS_WON = 0x2277, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_OTHERS_WDMAC = 0x2278, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_OTHERS_WCMAC = 0x2279, -+ MAC_AX_ERR_L2_ERR_APB_SA_TO_OTHERS_OTHERS = 0x227A, -+ -+ /* APB_BBRF bridge timeout (master) */ -+ MAC_AX_ERR_L2_ERR_APB_BBRF_TO_DMA = 0x2300, -+ MAC_AX_ERR_L2_ERR_APB_BBRF_TO_HCI = 0x2310, -+ MAC_AX_ERR_L2_ERR_APB_BBRF_TO_RLX4081 = 0x2320, -+ MAC_AX_ERR_L2_ERR_APB_BBRF_TO_IDDMA = 0x2330, -+ MAC_AX_ERR_L2_ERR_APB_BBRF_TO_HIOE = 0x2340, -+ MAC_AX_ERR_L2_ERR_APB_BBRF_TO_IPSEC = 0x2350, -+ MAC_AX_ERR_L2_ERR_APB_BBRF_TO_RX4281 = 0x2360, -+ MAC_AX_ERR_L2_ERR_APB_BBRF_TO_OTHERS = 0x2370, -+ MAC_AX_ERR_L2_RESET_DONE = 0x2400, -+ MAC_AX_ERR_CPU_EXCEPTION = 0x3000, -+ MAC_AX_GET_ERR_MAX, -+ MAC_AX_DUMP_SHAREBUFF_INDICATOR = 0x80000000, -+ -+ /* set error info */ -+ MAC_AX_ERR_L1_DISABLE_EN = 0x0001, -+ MAC_AX_ERR_L1_RCVY_EN = 0x0002, -+ MAC_AX_ERR_L1_RCVY_STOP_REQ = 0x0003, -+ MAC_AX_ERR_L1_RCVY_START_REQ = 0x0004, -+ MAC_AX_ERR_L0_CFG_NOTIFY = 0x0010, -+ MAC_AX_ERR_L0_CFG_DIS_NOTIFY = 0x0011, -+ MAC_AX_ERR_L0_CFG_HANDSHAKE = 0x0012, -+ MAC_AX_ERR_L0_RCVY_EN = 0x0013, -+ MAC_AX_SET_ERR_MAX, -+}; -+ -+extern const struct rtw89_hfc_prec_cfg rtw_hfc_preccfg_pcie; -+extern const struct rtw89_dle_size wde_size0; -+extern const struct rtw89_dle_size wde_size4; -+extern const struct rtw89_dle_size ple_size0; -+extern const struct rtw89_dle_size ple_size4; -+extern const struct rtw89_wde_quota wde_qt0; -+extern const struct rtw89_wde_quota wde_qt4; -+extern const struct rtw89_ple_quota ple_qt4; -+extern const struct rtw89_ple_quota ple_qt5; -+extern const struct rtw89_ple_quota ple_qt13; -+ -+static inline u32 rtw89_mac_reg_by_idx(u32 reg_base, u8 band) -+{ -+ return band == 0 ? reg_base : (reg_base + 0x2000); -+} -+ -+static inline u32 rtw89_mac_reg_by_port(u32 base, u8 port, u8 mac_idx) -+{ -+ return rtw89_mac_reg_by_idx(base + port * 0x40, mac_idx); -+} -+ -+static inline u32 -+rtw89_read32_port_mask(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif, -+ u32 base, u32 mask) -+{ -+ u32 reg; -+ -+ reg = rtw89_mac_reg_by_port(base, rtwvif->port, rtwvif->mac_idx); -+ return rtw89_read32_mask(rtwdev, reg, mask); -+} -+ -+static inline void -+rtw89_write32_port(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif, u32 base, -+ u32 data) -+{ -+ u32 reg; -+ -+ reg = rtw89_mac_reg_by_port(base, rtwvif->port, rtwvif->mac_idx); -+ rtw89_write32(rtwdev, reg, data); -+} -+ -+static inline void -+rtw89_write32_port_mask(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif, -+ u32 base, u32 mask, u32 data) -+{ -+ u32 reg; -+ -+ reg = rtw89_mac_reg_by_port(base, rtwvif->port, rtwvif->mac_idx); -+ rtw89_write32_mask(rtwdev, reg, mask, data); -+} -+ -+static inline void -+rtw89_write16_port_mask(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif, -+ u32 base, u32 mask, u16 data) -+{ -+ u32 reg; -+ -+ reg = rtw89_mac_reg_by_port(base, rtwvif->port, rtwvif->mac_idx); -+ rtw89_write16_mask(rtwdev, reg, mask, data); -+} -+ -+static inline void -+rtw89_write32_port_clr(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif, -+ u32 base, u32 bit) -+{ -+ u32 reg; -+ -+ reg = rtw89_mac_reg_by_port(base, rtwvif->port, rtwvif->mac_idx); -+ rtw89_write32_clr(rtwdev, reg, bit); -+} -+ -+static inline void -+rtw89_write16_port_clr(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif, -+ u32 base, u16 bit) -+{ -+ u32 reg; -+ -+ reg = rtw89_mac_reg_by_port(base, rtwvif->port, rtwvif->mac_idx); -+ rtw89_write16_clr(rtwdev, reg, bit); -+} -+ -+static inline void -+rtw89_write32_port_set(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif, -+ u32 base, u32 bit) -+{ -+ u32 reg; -+ -+ reg = rtw89_mac_reg_by_port(base, rtwvif->port, rtwvif->mac_idx); -+ rtw89_write32_set(rtwdev, reg, bit); -+} -+ -+void rtw89_mac_pwr_off(struct rtw89_dev *rtwdev); -+int rtw89_mac_partial_init(struct rtw89_dev *rtwdev); -+int rtw89_mac_init(struct rtw89_dev *rtwdev); -+int rtw89_mac_check_mac_en(struct rtw89_dev *rtwdev, u8 band, -+ enum rtw89_mac_hwmod_sel sel); -+int rtw89_mac_write_lte(struct rtw89_dev *rtwdev, const u32 offset, u32 val); -+int rtw89_mac_read_lte(struct rtw89_dev *rtwdev, const u32 offset, u32 *val); -+int rtw89_mac_add_vif(struct rtw89_dev *rtwdev, struct rtw89_vif *vif); -+int rtw89_mac_port_update(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif); -+int rtw89_mac_remove_vif(struct rtw89_dev *rtwdev, struct rtw89_vif *vif); -+void rtw89_mac_enable_bb_rf(struct rtw89_dev *rtwdev); -+void rtw89_mac_disable_bb_rf(struct rtw89_dev *rtwdev); -+u32 rtw89_mac_get_err_status(struct rtw89_dev *rtwdev); -+int rtw89_mac_set_err_status(struct rtw89_dev *rtwdev, u32 err); -+void rtw89_mac_c2h_handle(struct rtw89_dev *rtwdev, struct sk_buff *skb, -+ u32 len, u8 class, u8 func); -+int rtw89_mac_setup_phycap(struct rtw89_dev *rtwdev); -+int rtw89_mac_stop_sch_tx(struct rtw89_dev *rtwdev, u8 mac_idx, -+ u16 *tx_en, enum rtw89_sch_tx_sel sel); -+int rtw89_mac_resume_sch_tx(struct rtw89_dev *rtwdev, u8 mac_idx, u16 tx_en); -+int rtw89_mac_cfg_ppdu_status(struct rtw89_dev *rtwdev, u8 mac_ids, bool enable); -+void rtw89_mac_update_rts_threshold(struct rtw89_dev *rtwdev, u8 mac_idx); -+void rtw89_mac_flush_txq(struct rtw89_dev *rtwdev, u32 queues, bool drop); -+int rtw89_mac_coex_init(struct rtw89_dev *rtwdev, const struct rtw89_mac_ax_coex *coex); -+int rtw89_mac_cfg_gnt(struct rtw89_dev *rtwdev, -+ const struct rtw89_mac_ax_coex_gnt *gnt_cfg); -+int rtw89_mac_cfg_plt(struct rtw89_dev *rtwdev, struct rtw89_mac_ax_plt *plt); -+void rtw89_mac_cfg_sb(struct rtw89_dev *rtwdev, u32 val); -+u32 rtw89_mac_get_sb(struct rtw89_dev *rtwdev); -+bool rtw89_mac_get_ctrl_path(struct rtw89_dev *rtwdev); -+int rtw89_mac_cfg_ctrl_path(struct rtw89_dev *rtwdev, bool wl); -+bool rtw89_mac_get_txpwr_cr(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy_idx, -+ u32 reg_base, u32 *cr); -+void rtw89_mac_power_mode_change(struct rtw89_dev *rtwdev, bool enter); -+void rtw89_mac_bf_assoc(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif, -+ struct ieee80211_sta *sta); -+void rtw89_mac_bf_disassoc(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif, -+ struct ieee80211_sta *sta); -+void rtw89_mac_bf_set_gid_table(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif, -+ struct ieee80211_bss_conf *conf); -+void rtw89_mac_bf_monitor_calc(struct rtw89_dev *rtwdev, -+ struct ieee80211_sta *sta, bool disconnect); -+void _rtw89_mac_bf_monitor_track(struct rtw89_dev *rtwdev); -+int rtw89_mac_vif_init(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif); -+int rtw89_mac_vif_deinit(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif); -+int rtw89_mac_set_hw_muedca_ctrl(struct rtw89_dev *rtwdev, -+ struct rtw89_vif *rtwvif, bool en); -+ -+static inline void rtw89_mac_bf_monitor_track(struct rtw89_dev *rtwdev) -+{ -+ if (!test_bit(RTW89_FLAG_BFEE_MON, rtwdev->flags)) -+ return; -+ -+ _rtw89_mac_bf_monitor_track(rtwdev); -+} -+ -+static inline int rtw89_mac_txpwr_read32(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy_idx, -+ u32 reg_base, u32 *val) -+{ -+ u32 cr; -+ -+ if (!rtw89_mac_get_txpwr_cr(rtwdev, phy_idx, reg_base, &cr)) -+ return -EINVAL; -+ -+ *val = rtw89_read32(rtwdev, cr); -+ return 0; -+} -+ -+static inline int rtw89_mac_txpwr_write32(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy_idx, -+ u32 reg_base, u32 val) -+{ -+ u32 cr; -+ -+ if (!rtw89_mac_get_txpwr_cr(rtwdev, phy_idx, reg_base, &cr)) -+ return -EINVAL; -+ -+ rtw89_write32(rtwdev, cr, val); -+ return 0; -+} -+ -+static inline int rtw89_mac_txpwr_write32_mask(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy_idx, -+ u32 reg_base, u32 mask, u32 val) -+{ -+ u32 cr; -+ -+ if (!rtw89_mac_get_txpwr_cr(rtwdev, phy_idx, reg_base, &cr)) -+ return -EINVAL; -+ -+ rtw89_write32_mask(rtwdev, cr, mask, val); -+ return 0; -+} -+ -+int rtw89_mac_set_tx_time(struct rtw89_dev *rtwdev, struct rtw89_sta *rtwsta, -+ bool resume, u32 tx_time); -+int rtw89_mac_get_tx_time(struct rtw89_dev *rtwdev, struct rtw89_sta *rtwsta, -+ u32 *tx_time); -+int rtw89_mac_set_tx_retry_limit(struct rtw89_dev *rtwdev, -+ struct rtw89_sta *rtwsta, -+ bool resume, u8 tx_retry); -+int rtw89_mac_get_tx_retry_limit(struct rtw89_dev *rtwdev, -+ struct rtw89_sta *rtwsta, u8 *tx_retry); -+ -+#endif -diff --git a/drivers/net/wireless/realtek/rtw89/mac80211.c b/drivers/net/wireless/realtek/rtw89/mac80211.c -new file mode 100644 -index 000000000000..16dc6fb7dbb0 ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/mac80211.c -@@ -0,0 +1,676 @@ -+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause -+/* Copyright(c) 2019-2020 Realtek Corporation -+ */ -+ -+#include "cam.h" -+#include "coex.h" -+#include "debug.h" -+#include "fw.h" -+#include "mac.h" -+#include "phy.h" -+#include "ps.h" -+#include "reg.h" -+#include "sar.h" -+#include "ser.h" -+ -+static void rtw89_ops_tx(struct ieee80211_hw *hw, -+ struct ieee80211_tx_control *control, -+ struct sk_buff *skb) -+{ -+ struct rtw89_dev *rtwdev = hw->priv; -+ struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); -+ struct ieee80211_vif *vif = info->control.vif; -+ struct ieee80211_sta *sta = control->sta; -+ int ret, qsel; -+ -+ ret = rtw89_core_tx_write(rtwdev, vif, sta, skb, &qsel); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to transmit skb: %d\n", ret); -+ ieee80211_free_txskb(hw, skb); -+ } -+ rtw89_core_tx_kick_off(rtwdev, qsel); -+} -+ -+static void rtw89_ops_wake_tx_queue(struct ieee80211_hw *hw, -+ struct ieee80211_txq *txq) -+{ -+ struct rtw89_dev *rtwdev = hw->priv; -+ -+ ieee80211_schedule_txq(hw, txq); -+ queue_work(rtwdev->txq_wq, &rtwdev->txq_work); -+} -+ -+static int rtw89_ops_start(struct ieee80211_hw *hw) -+{ -+ struct rtw89_dev *rtwdev = hw->priv; -+ int ret; -+ -+ mutex_lock(&rtwdev->mutex); -+ ret = rtw89_core_start(rtwdev); -+ mutex_unlock(&rtwdev->mutex); -+ -+ return ret; -+} -+ -+static void rtw89_ops_stop(struct ieee80211_hw *hw) -+{ -+ struct rtw89_dev *rtwdev = hw->priv; -+ -+ mutex_lock(&rtwdev->mutex); -+ rtw89_core_stop(rtwdev); -+ mutex_unlock(&rtwdev->mutex); -+} -+ -+static int rtw89_ops_config(struct ieee80211_hw *hw, u32 changed) -+{ -+ struct rtw89_dev *rtwdev = hw->priv; -+ -+ mutex_lock(&rtwdev->mutex); -+ rtw89_leave_ps_mode(rtwdev); -+ -+ if ((changed & IEEE80211_CONF_CHANGE_IDLE) && -+ !(hw->conf.flags & IEEE80211_CONF_IDLE)) -+ rtw89_leave_ips(rtwdev); -+ -+ if (changed & IEEE80211_CONF_CHANGE_PS) { -+ if (hw->conf.flags & IEEE80211_CONF_PS) { -+ rtwdev->lps_enabled = true; -+ } else { -+ rtw89_leave_lps(rtwdev); -+ rtwdev->lps_enabled = false; -+ } -+ } -+ -+ if (changed & IEEE80211_CONF_CHANGE_CHANNEL) -+ rtw89_set_channel(rtwdev); -+ -+ if ((changed & IEEE80211_CONF_CHANGE_IDLE) && -+ (hw->conf.flags & IEEE80211_CONF_IDLE)) -+ rtw89_enter_ips(rtwdev); -+ -+ mutex_unlock(&rtwdev->mutex); -+ -+ return 0; -+} -+ -+static int rtw89_ops_add_interface(struct ieee80211_hw *hw, -+ struct ieee80211_vif *vif) -+{ -+ struct rtw89_dev *rtwdev = hw->priv; -+ struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; -+ int ret = 0; -+ -+ mutex_lock(&rtwdev->mutex); -+ list_add_tail(&rtwvif->list, &rtwdev->rtwvifs_list); -+ rtw89_leave_ps_mode(rtwdev); -+ -+ rtw89_traffic_stats_init(rtwdev, &rtwvif->stats); -+ rtw89_vif_type_mapping(vif, false); -+ rtwvif->port = rtw89_core_acquire_bit_map(rtwdev->hw_port, -+ RTW89_MAX_HW_PORT_NUM); -+ if (rtwvif->port == RTW89_MAX_HW_PORT_NUM) { -+ ret = -ENOSPC; -+ goto out; -+ } -+ -+ rtwvif->bcn_hit_cond = 0; -+ rtwvif->mac_idx = RTW89_MAC_0; -+ rtwvif->phy_idx = RTW89_PHY_0; -+ rtwvif->hit_rule = 0; -+ ether_addr_copy(rtwvif->mac_addr, vif->addr); -+ -+ ret = rtw89_mac_add_vif(rtwdev, rtwvif); -+ if (ret) { -+ rtw89_core_release_bit_map(rtwdev->hw_port, rtwvif->port); -+ goto out; -+ } -+ -+ rtw89_core_txq_init(rtwdev, vif->txq); -+ -+ rtw89_btc_ntfy_role_info(rtwdev, rtwvif, NULL, BTC_ROLE_START); -+out: -+ mutex_unlock(&rtwdev->mutex); -+ -+ return ret; -+} -+ -+static void rtw89_ops_remove_interface(struct ieee80211_hw *hw, -+ struct ieee80211_vif *vif) -+{ -+ struct rtw89_dev *rtwdev = hw->priv; -+ struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; -+ -+ mutex_lock(&rtwdev->mutex); -+ rtw89_leave_ps_mode(rtwdev); -+ rtw89_btc_ntfy_role_info(rtwdev, rtwvif, NULL, BTC_ROLE_STOP); -+ rtw89_mac_remove_vif(rtwdev, rtwvif); -+ rtw89_core_release_bit_map(rtwdev->hw_port, rtwvif->port); -+ list_del_init(&rtwvif->list); -+ mutex_unlock(&rtwdev->mutex); -+} -+ -+static void rtw89_ops_configure_filter(struct ieee80211_hw *hw, -+ unsigned int changed_flags, -+ unsigned int *new_flags, -+ u64 multicast) -+{ -+ struct rtw89_dev *rtwdev = hw->priv; -+ -+ mutex_lock(&rtwdev->mutex); -+ rtw89_leave_ps_mode(rtwdev); -+ -+ *new_flags &= FIF_ALLMULTI | FIF_OTHER_BSS | FIF_FCSFAIL | -+ FIF_BCN_PRBRESP_PROMISC; -+ -+ if (changed_flags & FIF_ALLMULTI) { -+ if (*new_flags & FIF_ALLMULTI) -+ rtwdev->hal.rx_fltr &= ~B_AX_A_MC; -+ else -+ rtwdev->hal.rx_fltr |= B_AX_A_MC; -+ } -+ if (changed_flags & FIF_FCSFAIL) { -+ if (*new_flags & FIF_FCSFAIL) -+ rtwdev->hal.rx_fltr |= B_AX_A_CRC32_ERR; -+ else -+ rtwdev->hal.rx_fltr &= ~B_AX_A_CRC32_ERR; -+ } -+ if (changed_flags & FIF_OTHER_BSS) { -+ if (*new_flags & FIF_OTHER_BSS) -+ rtwdev->hal.rx_fltr &= ~B_AX_A_A1_MATCH; -+ else -+ rtwdev->hal.rx_fltr |= B_AX_A_A1_MATCH; -+ } -+ if (changed_flags & FIF_BCN_PRBRESP_PROMISC) { -+ if (*new_flags & FIF_BCN_PRBRESP_PROMISC) { -+ rtwdev->hal.rx_fltr &= ~B_AX_A_BCN_CHK_EN; -+ rtwdev->hal.rx_fltr &= ~B_AX_A_BC; -+ rtwdev->hal.rx_fltr &= ~B_AX_A_A1_MATCH; -+ } else { -+ rtwdev->hal.rx_fltr |= B_AX_A_BCN_CHK_EN; -+ rtwdev->hal.rx_fltr |= B_AX_A_BC; -+ rtwdev->hal.rx_fltr |= B_AX_A_A1_MATCH; -+ } -+ } -+ -+ rtw89_write32_mask(rtwdev, -+ rtw89_mac_reg_by_idx(R_AX_RX_FLTR_OPT, RTW89_MAC_0), -+ B_AX_RX_FLTR_CFG_MASK, -+ rtwdev->hal.rx_fltr); -+ if (!rtwdev->dbcc_en) -+ goto out; -+ rtw89_write32_mask(rtwdev, -+ rtw89_mac_reg_by_idx(R_AX_RX_FLTR_OPT, RTW89_MAC_1), -+ B_AX_RX_FLTR_CFG_MASK, -+ rtwdev->hal.rx_fltr); -+ -+out: -+ mutex_unlock(&rtwdev->mutex); -+} -+ -+static const u8 ac_to_fw_idx[IEEE80211_NUM_ACS] = { -+ [IEEE80211_AC_VO] = 3, -+ [IEEE80211_AC_VI] = 2, -+ [IEEE80211_AC_BE] = 0, -+ [IEEE80211_AC_BK] = 1, -+}; -+ -+static u8 rtw89_aifsn_to_aifs(struct rtw89_dev *rtwdev, -+ struct rtw89_vif *rtwvif, u8 aifsn) -+{ -+ struct ieee80211_vif *vif = rtwvif_to_vif(rtwvif); -+ u8 slot_time; -+ u8 sifs; -+ -+ slot_time = vif->bss_conf.use_short_slot ? 9 : 20; -+ sifs = rtwdev->hal.current_band_type == RTW89_BAND_5G ? 16 : 10; -+ -+ return aifsn * slot_time + sifs; -+} -+ -+static void ____rtw89_conf_tx_edca(struct rtw89_dev *rtwdev, -+ struct rtw89_vif *rtwvif, u16 ac) -+{ -+ struct ieee80211_tx_queue_params *params = &rtwvif->tx_params[ac]; -+ u32 val; -+ u8 ecw_max, ecw_min; -+ u8 aifs; -+ -+ /* 2^ecw - 1 = cw; ecw = log2(cw + 1) */ -+ ecw_max = ilog2(params->cw_max + 1); -+ ecw_min = ilog2(params->cw_min + 1); -+ aifs = rtw89_aifsn_to_aifs(rtwdev, rtwvif, params->aifs); -+ val = FIELD_PREP(FW_EDCA_PARAM_TXOPLMT_MSK, params->txop) | -+ FIELD_PREP(FW_EDCA_PARAM_CWMAX_MSK, ecw_max) | -+ FIELD_PREP(FW_EDCA_PARAM_CWMIN_MSK, ecw_min) | -+ FIELD_PREP(FW_EDCA_PARAM_AIFS_MSK, aifs); -+ rtw89_fw_h2c_set_edca(rtwdev, rtwvif, ac_to_fw_idx[ac], val); -+} -+ -+static const u32 ac_to_mu_edca_param[IEEE80211_NUM_ACS] = { -+ [IEEE80211_AC_VO] = R_AX_MUEDCA_VO_PARAM_0, -+ [IEEE80211_AC_VI] = R_AX_MUEDCA_VI_PARAM_0, -+ [IEEE80211_AC_BE] = R_AX_MUEDCA_BE_PARAM_0, -+ [IEEE80211_AC_BK] = R_AX_MUEDCA_BK_PARAM_0, -+}; -+ -+static void ____rtw89_conf_tx_mu_edca(struct rtw89_dev *rtwdev, -+ struct rtw89_vif *rtwvif, u16 ac) -+{ -+ struct ieee80211_tx_queue_params *params = &rtwvif->tx_params[ac]; -+ struct ieee80211_he_mu_edca_param_ac_rec *mu_edca; -+ u8 aifs, aifsn; -+ u16 timer_32us; -+ u32 reg; -+ u32 val; -+ -+ if (!params->mu_edca) -+ return; -+ -+ mu_edca = ¶ms->mu_edca_param_rec; -+ aifsn = FIELD_GET(GENMASK(3, 0), mu_edca->aifsn); -+ aifs = aifsn ? rtw89_aifsn_to_aifs(rtwdev, rtwvif, aifsn) : 0; -+ timer_32us = mu_edca->mu_edca_timer << 8; -+ -+ val = FIELD_PREP(B_AX_MUEDCA_BE_PARAM_0_TIMER_MASK, timer_32us) | -+ FIELD_PREP(B_AX_MUEDCA_BE_PARAM_0_CW_MASK, mu_edca->ecw_min_max) | -+ FIELD_PREP(B_AX_MUEDCA_BE_PARAM_0_AIFS_MASK, aifs); -+ reg = rtw89_mac_reg_by_idx(ac_to_mu_edca_param[ac], rtwvif->mac_idx); -+ rtw89_write32(rtwdev, reg, val); -+ -+ rtw89_mac_set_hw_muedca_ctrl(rtwdev, rtwvif, true); -+} -+ -+static void __rtw89_conf_tx(struct rtw89_dev *rtwdev, -+ struct rtw89_vif *rtwvif, u16 ac) -+{ -+ ____rtw89_conf_tx_edca(rtwdev, rtwvif, ac); -+ ____rtw89_conf_tx_mu_edca(rtwdev, rtwvif, ac); -+} -+ -+static void rtw89_conf_tx(struct rtw89_dev *rtwdev, -+ struct rtw89_vif *rtwvif) -+{ -+ u16 ac; -+ -+ for (ac = 0; ac < IEEE80211_NUM_ACS; ac++) -+ __rtw89_conf_tx(rtwdev, rtwvif, ac); -+} -+ -+static void rtw89_station_mode_sta_assoc(struct rtw89_dev *rtwdev, -+ struct ieee80211_vif *vif, -+ struct ieee80211_bss_conf *conf) -+{ -+ struct ieee80211_sta *sta; -+ -+ if (vif->type != NL80211_IFTYPE_STATION) -+ return; -+ -+ sta = ieee80211_find_sta(vif, conf->bssid); -+ if (!sta) { -+ rtw89_err(rtwdev, "can't find sta to set sta_assoc state\n"); -+ return; -+ } -+ rtw89_core_sta_assoc(rtwdev, vif, sta); -+} -+ -+static void rtw89_ops_bss_info_changed(struct ieee80211_hw *hw, -+ struct ieee80211_vif *vif, -+ struct ieee80211_bss_conf *conf, -+ u32 changed) -+{ -+ struct rtw89_dev *rtwdev = hw->priv; -+ struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; -+ -+ mutex_lock(&rtwdev->mutex); -+ rtw89_leave_ps_mode(rtwdev); -+ -+ if (changed & BSS_CHANGED_ASSOC) { -+ if (conf->assoc) { -+ rtw89_station_mode_sta_assoc(rtwdev, vif, conf); -+ rtw89_phy_set_bss_color(rtwdev, vif); -+ rtw89_chip_cfg_txpwr_ul_tb_offset(rtwdev, vif); -+ rtw89_mac_port_update(rtwdev, rtwvif); -+ } -+ } -+ -+ if (changed & BSS_CHANGED_BSSID) { -+ ether_addr_copy(rtwvif->bssid, conf->bssid); -+ rtw89_cam_bssid_changed(rtwdev, rtwvif); -+ rtw89_fw_h2c_cam(rtwdev, rtwvif); -+ } -+ -+ if (changed & BSS_CHANGED_ERP_SLOT) -+ rtw89_conf_tx(rtwdev, rtwvif); -+ -+ if (changed & BSS_CHANGED_HE_BSS_COLOR) -+ rtw89_phy_set_bss_color(rtwdev, vif); -+ -+ if (changed & BSS_CHANGED_MU_GROUPS) -+ rtw89_mac_bf_set_gid_table(rtwdev, vif, conf); -+ -+ mutex_unlock(&rtwdev->mutex); -+} -+ -+static int rtw89_ops_conf_tx(struct ieee80211_hw *hw, -+ struct ieee80211_vif *vif, u16 ac, -+ const struct ieee80211_tx_queue_params *params) -+{ -+ struct rtw89_dev *rtwdev = hw->priv; -+ struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; -+ -+ mutex_lock(&rtwdev->mutex); -+ rtw89_leave_ps_mode(rtwdev); -+ rtwvif->tx_params[ac] = *params; -+ __rtw89_conf_tx(rtwdev, rtwvif, ac); -+ mutex_unlock(&rtwdev->mutex); -+ -+ return 0; -+} -+ -+static int __rtw89_ops_sta_state(struct ieee80211_hw *hw, -+ struct ieee80211_vif *vif, -+ struct ieee80211_sta *sta, -+ enum ieee80211_sta_state old_state, -+ enum ieee80211_sta_state new_state) -+{ -+ struct rtw89_dev *rtwdev = hw->priv; -+ -+ if (old_state == IEEE80211_STA_NOTEXIST && -+ new_state == IEEE80211_STA_NONE) -+ return rtw89_core_sta_add(rtwdev, vif, sta); -+ -+ if (old_state == IEEE80211_STA_AUTH && -+ new_state == IEEE80211_STA_ASSOC) { -+ if (vif->type == NL80211_IFTYPE_STATION) -+ return 0; /* defer to bss_info_changed to have vif info */ -+ return rtw89_core_sta_assoc(rtwdev, vif, sta); -+ } -+ -+ if (old_state == IEEE80211_STA_ASSOC && -+ new_state == IEEE80211_STA_AUTH) -+ return rtw89_core_sta_disassoc(rtwdev, vif, sta); -+ -+ if (old_state == IEEE80211_STA_AUTH && -+ new_state == IEEE80211_STA_NONE) -+ return rtw89_core_sta_disconnect(rtwdev, vif, sta); -+ -+ if (old_state == IEEE80211_STA_NONE && -+ new_state == IEEE80211_STA_NOTEXIST) -+ return rtw89_core_sta_remove(rtwdev, vif, sta); -+ -+ return 0; -+} -+ -+static int rtw89_ops_sta_state(struct ieee80211_hw *hw, -+ struct ieee80211_vif *vif, -+ struct ieee80211_sta *sta, -+ enum ieee80211_sta_state old_state, -+ enum ieee80211_sta_state new_state) -+{ -+ struct rtw89_dev *rtwdev = hw->priv; -+ int ret; -+ -+ mutex_lock(&rtwdev->mutex); -+ rtw89_leave_ps_mode(rtwdev); -+ ret = __rtw89_ops_sta_state(hw, vif, sta, old_state, new_state); -+ mutex_unlock(&rtwdev->mutex); -+ -+ return ret; -+} -+ -+static int rtw89_ops_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, -+ struct ieee80211_vif *vif, -+ struct ieee80211_sta *sta, -+ struct ieee80211_key_conf *key) -+{ -+ struct rtw89_dev *rtwdev = hw->priv; -+ int ret = 0; -+ -+ mutex_lock(&rtwdev->mutex); -+ rtw89_leave_ps_mode(rtwdev); -+ -+ switch (cmd) { -+ case SET_KEY: -+ rtw89_btc_ntfy_specific_packet(rtwdev, PACKET_EAPOL_END); -+ ret = rtw89_cam_sec_key_add(rtwdev, vif, sta, key); -+ if (ret && ret != -EOPNOTSUPP) { -+ rtw89_err(rtwdev, "failed to add key to sec cam\n"); -+ goto out; -+ } -+ break; -+ case DISABLE_KEY: -+ rtw89_hci_flush_queues(rtwdev, BIT(rtwdev->hw->queues) - 1, -+ false); -+ rtw89_mac_flush_txq(rtwdev, BIT(rtwdev->hw->queues) - 1, false); -+ ret = rtw89_cam_sec_key_del(rtwdev, vif, sta, key, true); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to remove key from sec cam\n"); -+ goto out; -+ } -+ break; -+ } -+ -+out: -+ mutex_unlock(&rtwdev->mutex); -+ -+ return ret; -+} -+ -+static int rtw89_ops_ampdu_action(struct ieee80211_hw *hw, -+ struct ieee80211_vif *vif, -+ struct ieee80211_ampdu_params *params) -+{ -+ struct rtw89_dev *rtwdev = hw->priv; -+ struct ieee80211_sta *sta = params->sta; -+ struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; -+ u16 tid = params->tid; -+ struct ieee80211_txq *txq = sta->txq[tid]; -+ struct rtw89_txq *rtwtxq = (struct rtw89_txq *)txq->drv_priv; -+ -+ switch (params->action) { -+ case IEEE80211_AMPDU_TX_START: -+ return IEEE80211_AMPDU_TX_START_IMMEDIATE; -+ case IEEE80211_AMPDU_TX_STOP_CONT: -+ case IEEE80211_AMPDU_TX_STOP_FLUSH: -+ case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT: -+ mutex_lock(&rtwdev->mutex); -+ clear_bit(RTW89_TXQ_F_AMPDU, &rtwtxq->flags); -+ rtw89_fw_h2c_ba_cam(rtwdev, false, rtwsta->mac_id, params); -+ mutex_unlock(&rtwdev->mutex); -+ ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid); -+ break; -+ case IEEE80211_AMPDU_TX_OPERATIONAL: -+ mutex_lock(&rtwdev->mutex); -+ set_bit(RTW89_TXQ_F_AMPDU, &rtwtxq->flags); -+ rtwsta->ampdu_params[tid].agg_num = params->buf_size; -+ rtwsta->ampdu_params[tid].amsdu = params->amsdu; -+ rtw89_leave_ps_mode(rtwdev); -+ rtw89_fw_h2c_ba_cam(rtwdev, true, rtwsta->mac_id, params); -+ mutex_unlock(&rtwdev->mutex); -+ break; -+ case IEEE80211_AMPDU_RX_START: -+ case IEEE80211_AMPDU_RX_STOP: -+ break; -+ default: -+ WARN_ON(1); -+ return -ENOTSUPP; -+ } -+ -+ return 0; -+} -+ -+static int rtw89_ops_set_rts_threshold(struct ieee80211_hw *hw, u32 value) -+{ -+ struct rtw89_dev *rtwdev = hw->priv; -+ -+ mutex_lock(&rtwdev->mutex); -+ rtw89_leave_ps_mode(rtwdev); -+ if (test_bit(RTW89_FLAG_POWERON, rtwdev->flags)) -+ rtw89_mac_update_rts_threshold(rtwdev, RTW89_MAC_0); -+ mutex_unlock(&rtwdev->mutex); -+ -+ return 0; -+} -+ -+static void rtw89_ops_sta_statistics(struct ieee80211_hw *hw, -+ struct ieee80211_vif *vif, -+ struct ieee80211_sta *sta, -+ struct station_info *sinfo) -+{ -+ struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; -+ -+ sinfo->txrate = rtwsta->ra_report.txrate; -+ sinfo->filled |= BIT_ULL(NL80211_STA_INFO_TX_BITRATE); -+} -+ -+static void rtw89_ops_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif, -+ u32 queues, bool drop) -+{ -+ struct rtw89_dev *rtwdev = hw->priv; -+ -+ mutex_lock(&rtwdev->mutex); -+ rtw89_leave_lps(rtwdev); -+ rtw89_hci_flush_queues(rtwdev, queues, drop); -+ rtw89_mac_flush_txq(rtwdev, queues, drop); -+ mutex_unlock(&rtwdev->mutex); -+} -+ -+struct rtw89_iter_bitrate_mask_data { -+ struct rtw89_dev *rtwdev; -+ struct ieee80211_vif *vif; -+ const struct cfg80211_bitrate_mask *mask; -+}; -+ -+static void rtw89_ra_mask_info_update_iter(void *data, struct ieee80211_sta *sta) -+{ -+ struct rtw89_iter_bitrate_mask_data *br_data = data; -+ struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; -+ struct ieee80211_vif *vif = rtwvif_to_vif(rtwsta->rtwvif); -+ -+ if (vif != br_data->vif) -+ return; -+ -+ rtwsta->use_cfg_mask = true; -+ rtwsta->mask = *br_data->mask; -+ rtw89_phy_ra_updata_sta(br_data->rtwdev, sta); -+} -+ -+static void rtw89_ra_mask_info_update(struct rtw89_dev *rtwdev, -+ struct ieee80211_vif *vif, -+ const struct cfg80211_bitrate_mask *mask) -+{ -+ struct rtw89_iter_bitrate_mask_data br_data = { .rtwdev = rtwdev, -+ .vif = vif, -+ .mask = mask}; -+ -+ ieee80211_iterate_stations_atomic(rtwdev->hw, rtw89_ra_mask_info_update_iter, -+ &br_data); -+} -+ -+static int rtw89_ops_set_bitrate_mask(struct ieee80211_hw *hw, -+ struct ieee80211_vif *vif, -+ const struct cfg80211_bitrate_mask *mask) -+{ -+ struct rtw89_dev *rtwdev = hw->priv; -+ -+ mutex_lock(&rtwdev->mutex); -+ rtw89_phy_rate_pattern_vif(rtwdev, vif, mask); -+ rtw89_ra_mask_info_update(rtwdev, vif, mask); -+ mutex_unlock(&rtwdev->mutex); -+ -+ return 0; -+} -+ -+static -+int rtw89_ops_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant) -+{ -+ struct rtw89_dev *rtwdev = hw->priv; -+ struct rtw89_hal *hal = &rtwdev->hal; -+ -+ if (rx_ant != hw->wiphy->available_antennas_rx) -+ return -EINVAL; -+ -+ mutex_lock(&rtwdev->mutex); -+ hal->antenna_tx = tx_ant; -+ hal->antenna_rx = rx_ant; -+ mutex_unlock(&rtwdev->mutex); -+ -+ return 0; -+} -+ -+static -+int rtw89_ops_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant) -+{ -+ struct rtw89_dev *rtwdev = hw->priv; -+ struct rtw89_hal *hal = &rtwdev->hal; -+ -+ *tx_ant = hal->antenna_tx; -+ *rx_ant = hal->antenna_rx; -+ -+ return 0; -+} -+ -+static void rtw89_ops_sw_scan_start(struct ieee80211_hw *hw, -+ struct ieee80211_vif *vif, -+ const u8 *mac_addr) -+{ -+ struct rtw89_dev *rtwdev = hw->priv; -+ struct rtw89_hal *hal = &rtwdev->hal; -+ -+ mutex_lock(&rtwdev->mutex); -+ rtwdev->scanning = true; -+ rtw89_leave_lps(rtwdev); -+ rtw89_btc_ntfy_scan_start(rtwdev, RTW89_PHY_0, hal->current_band_type); -+ rtw89_chip_rfk_scan(rtwdev, true); -+ rtw89_hci_recalc_int_mit(rtwdev); -+ mutex_unlock(&rtwdev->mutex); -+} -+ -+static void rtw89_ops_sw_scan_complete(struct ieee80211_hw *hw, -+ struct ieee80211_vif *vif) -+{ -+ struct rtw89_dev *rtwdev = hw->priv; -+ -+ mutex_lock(&rtwdev->mutex); -+ rtw89_chip_rfk_scan(rtwdev, false); -+ rtw89_btc_ntfy_scan_finish(rtwdev, RTW89_PHY_0); -+ rtwdev->scanning = false; -+ rtwdev->dig.bypass_dig = true; -+ mutex_unlock(&rtwdev->mutex); -+} -+ -+static void rtw89_ops_reconfig_complete(struct ieee80211_hw *hw, -+ enum ieee80211_reconfig_type reconfig_type) -+{ -+ struct rtw89_dev *rtwdev = hw->priv; -+ -+ if (reconfig_type == IEEE80211_RECONFIG_TYPE_RESTART) -+ rtw89_ser_recfg_done(rtwdev); -+} -+ -+const struct ieee80211_ops rtw89_ops = { -+ .tx = rtw89_ops_tx, -+ .wake_tx_queue = rtw89_ops_wake_tx_queue, -+ .start = rtw89_ops_start, -+ .stop = rtw89_ops_stop, -+ .config = rtw89_ops_config, -+ .add_interface = rtw89_ops_add_interface, -+ .remove_interface = rtw89_ops_remove_interface, -+ .configure_filter = rtw89_ops_configure_filter, -+ .bss_info_changed = rtw89_ops_bss_info_changed, -+ .conf_tx = rtw89_ops_conf_tx, -+ .sta_state = rtw89_ops_sta_state, -+ .set_key = rtw89_ops_set_key, -+ .ampdu_action = rtw89_ops_ampdu_action, -+ .set_rts_threshold = rtw89_ops_set_rts_threshold, -+ .sta_statistics = rtw89_ops_sta_statistics, -+ .flush = rtw89_ops_flush, -+ .set_bitrate_mask = rtw89_ops_set_bitrate_mask, -+ .set_antenna = rtw89_ops_set_antenna, -+ .get_antenna = rtw89_ops_get_antenna, -+ .sw_scan_start = rtw89_ops_sw_scan_start, -+ .sw_scan_complete = rtw89_ops_sw_scan_complete, -+ .reconfig_complete = rtw89_ops_reconfig_complete, -+ .set_sar_specs = rtw89_ops_set_sar_specs, -+}; -+EXPORT_SYMBOL(rtw89_ops); -diff --git a/drivers/net/wireless/realtek/rtw89/pci.c b/drivers/net/wireless/realtek/rtw89/pci.c -new file mode 100644 -index 000000000000..e9731012bca9 ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/pci.c -@@ -0,0 +1,3060 @@ -+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause -+/* Copyright(c) 2020 Realtek Corporation -+ */ -+ -+#include -+ -+#include "mac.h" -+#include "pci.h" -+#include "reg.h" -+#include "ser.h" -+ -+static bool rtw89_pci_disable_clkreq; -+static bool rtw89_pci_disable_aspm_l1; -+static bool rtw89_pci_disable_l1ss; -+module_param_named(disable_clkreq, rtw89_pci_disable_clkreq, bool, 0644); -+module_param_named(disable_aspm_l1, rtw89_pci_disable_aspm_l1, bool, 0644); -+module_param_named(disable_aspm_l1ss, rtw89_pci_disable_l1ss, bool, 0644); -+MODULE_PARM_DESC(disable_clkreq, "Set Y to disable PCI clkreq support"); -+MODULE_PARM_DESC(disable_aspm_l1, "Set Y to disable PCI ASPM L1 support"); -+MODULE_PARM_DESC(disable_aspm_l1ss, "Set Y to disable PCI L1SS support"); -+ -+static int rtw89_pci_rst_bdram_pcie(struct rtw89_dev *rtwdev) -+{ -+ u32 val; -+ int ret; -+ -+ rtw89_write32(rtwdev, R_AX_PCIE_INIT_CFG1, -+ rtw89_read32(rtwdev, R_AX_PCIE_INIT_CFG1) | B_AX_RST_BDRAM); -+ -+ ret = read_poll_timeout_atomic(rtw89_read32, val, !(val & B_AX_RST_BDRAM), -+ 1, RTW89_PCI_POLL_BDRAM_RST_CNT, false, -+ rtwdev, R_AX_PCIE_INIT_CFG1); -+ -+ if (ret) -+ return -EBUSY; -+ -+ return 0; -+} -+ -+static u32 rtw89_pci_dma_recalc(struct rtw89_dev *rtwdev, -+ struct rtw89_pci_dma_ring *bd_ring, -+ u32 cur_idx, bool tx) -+{ -+ u32 cnt, cur_rp, wp, rp, len; -+ -+ rp = bd_ring->rp; -+ wp = bd_ring->wp; -+ len = bd_ring->len; -+ -+ cur_rp = FIELD_GET(TXBD_HW_IDX_MASK, cur_idx); -+ if (tx) -+ cnt = cur_rp >= rp ? cur_rp - rp : len - (rp - cur_rp); -+ else -+ cnt = cur_rp >= wp ? cur_rp - wp : len - (wp - cur_rp); -+ -+ bd_ring->rp = cur_rp; -+ -+ return cnt; -+} -+ -+static u32 rtw89_pci_txbd_recalc(struct rtw89_dev *rtwdev, -+ struct rtw89_pci_tx_ring *tx_ring) -+{ -+ struct rtw89_pci_dma_ring *bd_ring = &tx_ring->bd_ring; -+ u32 addr_idx = bd_ring->addr_idx; -+ u32 cnt, idx; -+ -+ idx = rtw89_read32(rtwdev, addr_idx); -+ cnt = rtw89_pci_dma_recalc(rtwdev, bd_ring, idx, true); -+ -+ return cnt; -+} -+ -+static void rtw89_pci_release_fwcmd(struct rtw89_dev *rtwdev, -+ struct rtw89_pci *rtwpci, -+ u32 cnt, bool release_all) -+{ -+ struct rtw89_pci_tx_data *tx_data; -+ struct sk_buff *skb; -+ u32 qlen; -+ -+ while (cnt--) { -+ skb = skb_dequeue(&rtwpci->h2c_queue); -+ if (!skb) { -+ rtw89_err(rtwdev, "failed to pre-release fwcmd\n"); -+ return; -+ } -+ skb_queue_tail(&rtwpci->h2c_release_queue, skb); -+ } -+ -+ qlen = skb_queue_len(&rtwpci->h2c_release_queue); -+ if (!release_all) -+ qlen = qlen > RTW89_PCI_MULTITAG ? qlen - RTW89_PCI_MULTITAG : 0; -+ -+ while (qlen--) { -+ skb = skb_dequeue(&rtwpci->h2c_release_queue); -+ if (!skb) { -+ rtw89_err(rtwdev, "failed to release fwcmd\n"); -+ return; -+ } -+ tx_data = RTW89_PCI_TX_SKB_CB(skb); -+ dma_unmap_single(&rtwpci->pdev->dev, tx_data->dma, skb->len, -+ DMA_TO_DEVICE); -+ dev_kfree_skb_any(skb); -+ } -+} -+ -+static void rtw89_pci_reclaim_tx_fwcmd(struct rtw89_dev *rtwdev, -+ struct rtw89_pci *rtwpci) -+{ -+ struct rtw89_pci_tx_ring *tx_ring = &rtwpci->tx_rings[RTW89_TXCH_CH12]; -+ u32 cnt; -+ -+ cnt = rtw89_pci_txbd_recalc(rtwdev, tx_ring); -+ if (!cnt) -+ return; -+ rtw89_pci_release_fwcmd(rtwdev, rtwpci, cnt, false); -+} -+ -+static u32 rtw89_pci_rxbd_recalc(struct rtw89_dev *rtwdev, -+ struct rtw89_pci_rx_ring *rx_ring) -+{ -+ struct rtw89_pci_dma_ring *bd_ring = &rx_ring->bd_ring; -+ u32 addr_idx = bd_ring->addr_idx; -+ u32 cnt, idx; -+ -+ idx = rtw89_read32(rtwdev, addr_idx); -+ cnt = rtw89_pci_dma_recalc(rtwdev, bd_ring, idx, false); -+ -+ return cnt; -+} -+ -+static void rtw89_pci_sync_skb_for_cpu(struct rtw89_dev *rtwdev, -+ struct sk_buff *skb) -+{ -+ struct rtw89_pci_rx_info *rx_info; -+ dma_addr_t dma; -+ -+ rx_info = RTW89_PCI_RX_SKB_CB(skb); -+ dma = rx_info->dma; -+ dma_sync_single_for_cpu(rtwdev->dev, dma, RTW89_PCI_RX_BUF_SIZE, -+ DMA_FROM_DEVICE); -+} -+ -+static void rtw89_pci_sync_skb_for_device(struct rtw89_dev *rtwdev, -+ struct sk_buff *skb) -+{ -+ struct rtw89_pci_rx_info *rx_info; -+ dma_addr_t dma; -+ -+ rx_info = RTW89_PCI_RX_SKB_CB(skb); -+ dma = rx_info->dma; -+ dma_sync_single_for_device(rtwdev->dev, dma, RTW89_PCI_RX_BUF_SIZE, -+ DMA_FROM_DEVICE); -+} -+ -+static int rtw89_pci_rxbd_info_update(struct rtw89_dev *rtwdev, -+ struct sk_buff *skb) -+{ -+ struct rtw89_pci_rxbd_info *rxbd_info; -+ struct rtw89_pci_rx_info *rx_info = RTW89_PCI_RX_SKB_CB(skb); -+ -+ rxbd_info = (struct rtw89_pci_rxbd_info *)skb->data; -+ rx_info->fs = le32_get_bits(rxbd_info->dword, RTW89_PCI_RXBD_FS); -+ rx_info->ls = le32_get_bits(rxbd_info->dword, RTW89_PCI_RXBD_LS); -+ rx_info->len = le32_get_bits(rxbd_info->dword, RTW89_PCI_RXBD_WRITE_SIZE); -+ rx_info->tag = le32_get_bits(rxbd_info->dword, RTW89_PCI_RXBD_TAG); -+ -+ return 0; -+} -+ -+static bool -+rtw89_skb_put_rx_data(struct rtw89_dev *rtwdev, bool fs, bool ls, -+ struct sk_buff *new, -+ const struct sk_buff *skb, u32 offset, -+ const struct rtw89_pci_rx_info *rx_info, -+ const struct rtw89_rx_desc_info *desc_info) -+{ -+ u32 copy_len = rx_info->len - offset; -+ -+ if (unlikely(skb_tailroom(new) < copy_len)) { -+ rtw89_debug(rtwdev, RTW89_DBG_TXRX, -+ "invalid rx data length bd_len=%d desc_len=%d offset=%d (fs=%d ls=%d)\n", -+ rx_info->len, desc_info->pkt_size, offset, fs, ls); -+ rtw89_hex_dump(rtwdev, RTW89_DBG_TXRX, "rx_data: ", -+ skb->data, rx_info->len); -+ /* length of a single segment skb is desc_info->pkt_size */ -+ if (fs && ls) { -+ copy_len = desc_info->pkt_size; -+ } else { -+ rtw89_info(rtwdev, "drop rx data due to invalid length\n"); -+ return false; -+ } -+ } -+ -+ skb_put_data(new, skb->data + offset, copy_len); -+ -+ return true; -+} -+ -+static u32 rtw89_pci_rxbd_deliver_skbs(struct rtw89_dev *rtwdev, -+ struct rtw89_pci_rx_ring *rx_ring) -+{ -+ struct rtw89_pci_dma_ring *bd_ring = &rx_ring->bd_ring; -+ struct rtw89_pci_rx_info *rx_info; -+ struct rtw89_rx_desc_info *desc_info = &rx_ring->diliver_desc; -+ struct sk_buff *new = rx_ring->diliver_skb; -+ struct sk_buff *skb; -+ u32 rxinfo_size = sizeof(struct rtw89_pci_rxbd_info); -+ u32 offset; -+ u32 cnt = 1; -+ bool fs, ls; -+ int ret; -+ -+ skb = rx_ring->buf[bd_ring->wp]; -+ rtw89_pci_sync_skb_for_cpu(rtwdev, skb); -+ -+ ret = rtw89_pci_rxbd_info_update(rtwdev, skb); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to update %d RXBD info: %d\n", -+ bd_ring->wp, ret); -+ goto err_sync_device; -+ } -+ -+ rx_info = RTW89_PCI_RX_SKB_CB(skb); -+ fs = rx_info->fs; -+ ls = rx_info->ls; -+ -+ if (fs) { -+ if (new) { -+ rtw89_err(rtwdev, "skb should not be ready before first segment start\n"); -+ goto err_sync_device; -+ } -+ if (desc_info->ready) { -+ rtw89_warn(rtwdev, "desc info should not be ready before first segment start\n"); -+ goto err_sync_device; -+ } -+ -+ rtw89_core_query_rxdesc(rtwdev, desc_info, skb->data, rxinfo_size); -+ -+ new = dev_alloc_skb(desc_info->pkt_size); -+ if (!new) -+ goto err_sync_device; -+ -+ rx_ring->diliver_skb = new; -+ -+ /* first segment has RX desc */ -+ offset = desc_info->offset; -+ offset += desc_info->long_rxdesc ? sizeof(struct rtw89_rxdesc_long) : -+ sizeof(struct rtw89_rxdesc_short); -+ } else { -+ offset = sizeof(struct rtw89_pci_rxbd_info); -+ if (!new) { -+ rtw89_warn(rtwdev, "no last skb\n"); -+ goto err_sync_device; -+ } -+ } -+ if (!rtw89_skb_put_rx_data(rtwdev, fs, ls, new, skb, offset, rx_info, desc_info)) -+ goto err_sync_device; -+ rtw89_pci_sync_skb_for_device(rtwdev, skb); -+ rtw89_pci_rxbd_increase(rx_ring, 1); -+ -+ if (!desc_info->ready) { -+ rtw89_warn(rtwdev, "no rx desc information\n"); -+ goto err_free_resource; -+ } -+ if (ls) { -+ rtw89_core_rx(rtwdev, desc_info, new); -+ rx_ring->diliver_skb = NULL; -+ desc_info->ready = false; -+ } -+ -+ return cnt; -+ -+err_sync_device: -+ rtw89_pci_sync_skb_for_device(rtwdev, skb); -+ rtw89_pci_rxbd_increase(rx_ring, 1); -+err_free_resource: -+ if (new) -+ dev_kfree_skb_any(new); -+ rx_ring->diliver_skb = NULL; -+ desc_info->ready = false; -+ -+ return cnt; -+} -+ -+static void rtw89_pci_rxbd_deliver(struct rtw89_dev *rtwdev, -+ struct rtw89_pci_rx_ring *rx_ring, -+ u32 cnt) -+{ -+ struct rtw89_pci_dma_ring *bd_ring = &rx_ring->bd_ring; -+ u32 rx_cnt; -+ -+ while (cnt && rtwdev->napi_budget_countdown > 0) { -+ rx_cnt = rtw89_pci_rxbd_deliver_skbs(rtwdev, rx_ring); -+ if (!rx_cnt) { -+ rtw89_err(rtwdev, "failed to deliver RXBD skb\n"); -+ -+ /* skip the rest RXBD bufs */ -+ rtw89_pci_rxbd_increase(rx_ring, cnt); -+ break; -+ } -+ -+ cnt -= rx_cnt; -+ } -+ -+ rtw89_write16(rtwdev, bd_ring->addr_idx, bd_ring->wp); -+} -+ -+static int rtw89_pci_poll_rxq_dma(struct rtw89_dev *rtwdev, -+ struct rtw89_pci *rtwpci, int budget) -+{ -+ struct rtw89_pci_rx_ring *rx_ring; -+ int countdown = rtwdev->napi_budget_countdown; -+ u32 cnt; -+ -+ rx_ring = &rtwpci->rx_rings[RTW89_RXCH_RXQ]; -+ -+ cnt = rtw89_pci_rxbd_recalc(rtwdev, rx_ring); -+ if (!cnt) -+ return 0; -+ -+ cnt = min_t(u32, budget, cnt); -+ -+ rtw89_pci_rxbd_deliver(rtwdev, rx_ring, cnt); -+ -+ /* In case of flushing pending SKBs, the countdown may exceed. */ -+ if (rtwdev->napi_budget_countdown <= 0) -+ return budget; -+ -+ return budget - countdown; -+} -+ -+static void rtw89_pci_tx_status(struct rtw89_dev *rtwdev, -+ struct rtw89_pci_tx_ring *tx_ring, -+ struct sk_buff *skb, u8 tx_status) -+{ -+ struct ieee80211_tx_info *info; -+ -+ info = IEEE80211_SKB_CB(skb); -+ ieee80211_tx_info_clear_status(info); -+ -+ if (info->flags & IEEE80211_TX_CTL_NO_ACK) -+ info->flags |= IEEE80211_TX_STAT_NOACK_TRANSMITTED; -+ if (tx_status == RTW89_TX_DONE) { -+ info->flags |= IEEE80211_TX_STAT_ACK; -+ tx_ring->tx_acked++; -+ } else { -+ if (info->flags & IEEE80211_TX_CTL_REQ_TX_STATUS) -+ rtw89_debug(rtwdev, RTW89_DBG_FW, -+ "failed to TX of status %x\n", tx_status); -+ switch (tx_status) { -+ case RTW89_TX_RETRY_LIMIT: -+ tx_ring->tx_retry_lmt++; -+ break; -+ case RTW89_TX_LIFE_TIME: -+ tx_ring->tx_life_time++; -+ break; -+ case RTW89_TX_MACID_DROP: -+ tx_ring->tx_mac_id_drop++; -+ break; -+ default: -+ rtw89_warn(rtwdev, "invalid TX status %x\n", tx_status); -+ break; -+ } -+ } -+ -+ ieee80211_tx_status_ni(rtwdev->hw, skb); -+} -+ -+static void rtw89_pci_reclaim_txbd(struct rtw89_dev *rtwdev, struct rtw89_pci_tx_ring *tx_ring) -+{ -+ struct rtw89_pci_tx_wd *txwd; -+ u32 cnt; -+ -+ cnt = rtw89_pci_txbd_recalc(rtwdev, tx_ring); -+ while (cnt--) { -+ txwd = list_first_entry_or_null(&tx_ring->busy_pages, struct rtw89_pci_tx_wd, list); -+ if (!txwd) { -+ rtw89_warn(rtwdev, "No busy txwd pages available\n"); -+ break; -+ } -+ -+ list_del_init(&txwd->list); -+ } -+} -+ -+static void rtw89_pci_release_busy_txwd(struct rtw89_dev *rtwdev, -+ struct rtw89_pci_tx_ring *tx_ring) -+{ -+ struct rtw89_pci_tx_wd_ring *wd_ring = &tx_ring->wd_ring; -+ struct rtw89_pci_tx_wd *txwd; -+ int i; -+ -+ for (i = 0; i < wd_ring->page_num; i++) { -+ txwd = list_first_entry_or_null(&tx_ring->busy_pages, struct rtw89_pci_tx_wd, list); -+ if (!txwd) -+ break; -+ -+ list_del_init(&txwd->list); -+ } -+} -+ -+static void rtw89_pci_release_txwd_skb(struct rtw89_dev *rtwdev, -+ struct rtw89_pci_tx_ring *tx_ring, -+ struct rtw89_pci_tx_wd *txwd, u16 seq, -+ u8 tx_status) -+{ -+ struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; -+ struct rtw89_pci_tx_data *tx_data; -+ struct sk_buff *skb, *tmp; -+ u8 txch = tx_ring->txch; -+ -+ if (!list_empty(&txwd->list)) { -+ rtw89_warn(rtwdev, "queue %d txwd %d is not idle\n", -+ txch, seq); -+ return; -+ } -+ -+ /* currently, support for only one frame */ -+ if (skb_queue_len(&txwd->queue) != 1) { -+ rtw89_warn(rtwdev, "empty pending queue %d page %d\n", -+ txch, seq); -+ return; -+ } -+ -+ skb_queue_walk_safe(&txwd->queue, skb, tmp) { -+ skb_unlink(skb, &txwd->queue); -+ -+ tx_data = RTW89_PCI_TX_SKB_CB(skb); -+ dma_unmap_single(&rtwpci->pdev->dev, tx_data->dma, skb->len, -+ DMA_TO_DEVICE); -+ -+ rtw89_pci_tx_status(rtwdev, tx_ring, skb, tx_status); -+ } -+ -+ rtw89_pci_enqueue_txwd(tx_ring, txwd); -+} -+ -+static void rtw89_pci_release_rpp(struct rtw89_dev *rtwdev, -+ struct rtw89_pci_rpp_fmt *rpp) -+{ -+ struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; -+ struct rtw89_pci_tx_ring *tx_ring; -+ struct rtw89_pci_tx_wd_ring *wd_ring; -+ struct rtw89_pci_tx_wd *txwd; -+ u16 seq; -+ u8 qsel, tx_status, txch; -+ -+ seq = le32_get_bits(rpp->dword, RTW89_PCI_RPP_SEQ); -+ qsel = le32_get_bits(rpp->dword, RTW89_PCI_RPP_QSEL); -+ tx_status = le32_get_bits(rpp->dword, RTW89_PCI_RPP_TX_STATUS); -+ txch = rtw89_core_get_ch_dma(rtwdev, qsel); -+ -+ if (txch == RTW89_TXCH_CH12) { -+ rtw89_warn(rtwdev, "should no fwcmd release report\n"); -+ return; -+ } -+ -+ tx_ring = &rtwpci->tx_rings[txch]; -+ rtw89_pci_reclaim_txbd(rtwdev, tx_ring); -+ wd_ring = &tx_ring->wd_ring; -+ txwd = &wd_ring->pages[seq]; -+ -+ rtw89_pci_release_txwd_skb(rtwdev, tx_ring, txwd, seq, tx_status); -+} -+ -+static void rtw89_pci_release_pending_txwd_skb(struct rtw89_dev *rtwdev, -+ struct rtw89_pci_tx_ring *tx_ring) -+{ -+ struct rtw89_pci_tx_wd_ring *wd_ring = &tx_ring->wd_ring; -+ struct rtw89_pci_tx_wd *txwd; -+ int i; -+ -+ for (i = 0; i < wd_ring->page_num; i++) { -+ txwd = &wd_ring->pages[i]; -+ -+ if (!list_empty(&txwd->list)) -+ continue; -+ -+ rtw89_pci_release_txwd_skb(rtwdev, tx_ring, txwd, i, RTW89_TX_MACID_DROP); -+ } -+} -+ -+static u32 rtw89_pci_release_tx_skbs(struct rtw89_dev *rtwdev, -+ struct rtw89_pci_rx_ring *rx_ring, -+ u32 max_cnt) -+{ -+ struct rtw89_pci_dma_ring *bd_ring = &rx_ring->bd_ring; -+ struct rtw89_pci_rx_info *rx_info; -+ struct rtw89_pci_rpp_fmt *rpp; -+ struct rtw89_rx_desc_info desc_info = {}; -+ struct sk_buff *skb; -+ u32 cnt = 0; -+ u32 rpp_size = sizeof(struct rtw89_pci_rpp_fmt); -+ u32 rxinfo_size = sizeof(struct rtw89_pci_rxbd_info); -+ u32 offset; -+ int ret; -+ -+ skb = rx_ring->buf[bd_ring->wp]; -+ rtw89_pci_sync_skb_for_cpu(rtwdev, skb); -+ -+ ret = rtw89_pci_rxbd_info_update(rtwdev, skb); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to update %d RXBD info: %d\n", -+ bd_ring->wp, ret); -+ goto err_sync_device; -+ } -+ -+ rx_info = RTW89_PCI_RX_SKB_CB(skb); -+ if (!rx_info->fs || !rx_info->ls) { -+ rtw89_err(rtwdev, "cannot process RP frame not set FS/LS\n"); -+ return cnt; -+ } -+ -+ rtw89_core_query_rxdesc(rtwdev, &desc_info, skb->data, rxinfo_size); -+ -+ /* first segment has RX desc */ -+ offset = desc_info.offset; -+ offset += desc_info.long_rxdesc ? sizeof(struct rtw89_rxdesc_long) : -+ sizeof(struct rtw89_rxdesc_short); -+ for (; offset + rpp_size <= rx_info->len; offset += rpp_size) { -+ rpp = (struct rtw89_pci_rpp_fmt *)(skb->data + offset); -+ rtw89_pci_release_rpp(rtwdev, rpp); -+ } -+ -+ rtw89_pci_sync_skb_for_device(rtwdev, skb); -+ rtw89_pci_rxbd_increase(rx_ring, 1); -+ cnt++; -+ -+ return cnt; -+ -+err_sync_device: -+ rtw89_pci_sync_skb_for_device(rtwdev, skb); -+ return 0; -+} -+ -+static void rtw89_pci_release_tx(struct rtw89_dev *rtwdev, -+ struct rtw89_pci_rx_ring *rx_ring, -+ u32 cnt) -+{ -+ struct rtw89_pci_dma_ring *bd_ring = &rx_ring->bd_ring; -+ u32 release_cnt; -+ -+ while (cnt) { -+ release_cnt = rtw89_pci_release_tx_skbs(rtwdev, rx_ring, cnt); -+ if (!release_cnt) { -+ rtw89_err(rtwdev, "failed to release TX skbs\n"); -+ -+ /* skip the rest RXBD bufs */ -+ rtw89_pci_rxbd_increase(rx_ring, cnt); -+ break; -+ } -+ -+ cnt -= release_cnt; -+ } -+ -+ rtw89_write16(rtwdev, bd_ring->addr_idx, bd_ring->wp); -+} -+ -+static int rtw89_pci_poll_rpq_dma(struct rtw89_dev *rtwdev, -+ struct rtw89_pci *rtwpci, int budget) -+{ -+ struct rtw89_pci_rx_ring *rx_ring; -+ u32 cnt; -+ int work_done; -+ -+ rx_ring = &rtwpci->rx_rings[RTW89_RXCH_RPQ]; -+ -+ spin_lock_bh(&rtwpci->trx_lock); -+ -+ cnt = rtw89_pci_rxbd_recalc(rtwdev, rx_ring); -+ if (cnt == 0) -+ goto out_unlock; -+ -+ rtw89_pci_release_tx(rtwdev, rx_ring, cnt); -+ -+out_unlock: -+ spin_unlock_bh(&rtwpci->trx_lock); -+ -+ /* always release all RPQ */ -+ work_done = min_t(int, cnt, budget); -+ rtwdev->napi_budget_countdown -= work_done; -+ -+ return work_done; -+} -+ -+static void rtw89_pci_isr_rxd_unavail(struct rtw89_dev *rtwdev, -+ struct rtw89_pci *rtwpci) -+{ -+ struct rtw89_pci_rx_ring *rx_ring; -+ struct rtw89_pci_dma_ring *bd_ring; -+ u32 reg_idx; -+ u16 hw_idx, hw_idx_next, host_idx; -+ int i; -+ -+ for (i = 0; i < RTW89_RXCH_NUM; i++) { -+ rx_ring = &rtwpci->rx_rings[i]; -+ bd_ring = &rx_ring->bd_ring; -+ -+ reg_idx = rtw89_read32(rtwdev, bd_ring->addr_idx); -+ hw_idx = FIELD_GET(TXBD_HW_IDX_MASK, reg_idx); -+ host_idx = FIELD_GET(TXBD_HOST_IDX_MASK, reg_idx); -+ hw_idx_next = (hw_idx + 1) % bd_ring->len; -+ -+ if (hw_idx_next == host_idx) -+ rtw89_warn(rtwdev, "%d RXD unavailable\n", i); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TXRX, -+ "%d RXD unavailable, idx=0x%08x, len=%d\n", -+ i, reg_idx, bd_ring->len); -+ } -+} -+ -+static void rtw89_pci_recognize_intrs(struct rtw89_dev *rtwdev, -+ struct rtw89_pci *rtwpci, -+ struct rtw89_pci_isrs *isrs) -+{ -+ isrs->halt_c2h_isrs = rtw89_read32(rtwdev, R_AX_HISR0) & rtwpci->halt_c2h_intrs; -+ isrs->isrs[0] = rtw89_read32(rtwdev, R_AX_PCIE_HISR00) & rtwpci->intrs[0]; -+ isrs->isrs[1] = rtw89_read32(rtwdev, R_AX_PCIE_HISR10) & rtwpci->intrs[1]; -+ -+ rtw89_write32(rtwdev, R_AX_HISR0, isrs->halt_c2h_isrs); -+ rtw89_write32(rtwdev, R_AX_PCIE_HISR00, isrs->isrs[0]); -+ rtw89_write32(rtwdev, R_AX_PCIE_HISR10, isrs->isrs[1]); -+} -+ -+static void rtw89_pci_clear_isr0(struct rtw89_dev *rtwdev, u32 isr00) -+{ -+ /* write 1 clear */ -+ rtw89_write32(rtwdev, R_AX_PCIE_HISR00, isr00); -+} -+ -+static void rtw89_pci_enable_intr(struct rtw89_dev *rtwdev, -+ struct rtw89_pci *rtwpci) -+{ -+ rtw89_write32(rtwdev, R_AX_HIMR0, rtwpci->halt_c2h_intrs); -+ rtw89_write32(rtwdev, R_AX_PCIE_HIMR00, rtwpci->intrs[0]); -+ rtw89_write32(rtwdev, R_AX_PCIE_HIMR10, rtwpci->intrs[1]); -+} -+ -+static void rtw89_pci_disable_intr(struct rtw89_dev *rtwdev, -+ struct rtw89_pci *rtwpci) -+{ -+ rtw89_write32(rtwdev, R_AX_HIMR0, 0); -+ rtw89_write32(rtwdev, R_AX_PCIE_HIMR00, 0); -+ rtw89_write32(rtwdev, R_AX_PCIE_HIMR10, 0); -+} -+ -+static irqreturn_t rtw89_pci_interrupt_threadfn(int irq, void *dev) -+{ -+ struct rtw89_dev *rtwdev = dev; -+ struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; -+ struct rtw89_pci_isrs isrs; -+ unsigned long flags; -+ -+ spin_lock_irqsave(&rtwpci->irq_lock, flags); -+ rtw89_pci_recognize_intrs(rtwdev, rtwpci, &isrs); -+ spin_unlock_irqrestore(&rtwpci->irq_lock, flags); -+ -+ if (unlikely(isrs.isrs[0] & B_AX_RDU_INT)) -+ rtw89_pci_isr_rxd_unavail(rtwdev, rtwpci); -+ -+ if (unlikely(isrs.halt_c2h_isrs & B_AX_HALT_C2H_INT_EN)) -+ rtw89_ser_notify(rtwdev, rtw89_mac_get_err_status(rtwdev)); -+ -+ if (likely(rtwpci->running)) { -+ local_bh_disable(); -+ napi_schedule(&rtwdev->napi); -+ local_bh_enable(); -+ } -+ -+ return IRQ_HANDLED; -+} -+ -+static irqreturn_t rtw89_pci_interrupt_handler(int irq, void *dev) -+{ -+ struct rtw89_dev *rtwdev = dev; -+ struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; -+ unsigned long flags; -+ irqreturn_t irqret = IRQ_WAKE_THREAD; -+ -+ spin_lock_irqsave(&rtwpci->irq_lock, flags); -+ -+ /* If interrupt event is on the road, it is still trigger interrupt -+ * even we have done pci_stop() to turn off IMR. -+ */ -+ if (unlikely(!rtwpci->running)) { -+ irqret = IRQ_HANDLED; -+ goto exit; -+ } -+ -+ rtw89_pci_disable_intr(rtwdev, rtwpci); -+exit: -+ spin_unlock_irqrestore(&rtwpci->irq_lock, flags); -+ -+ return irqret; -+} -+ -+#define case_TXCHADDRS(txch) \ -+ case RTW89_TXCH_##txch: \ -+ *addr_num = R_AX_##txch##_TXBD_NUM; \ -+ *addr_idx = R_AX_##txch##_TXBD_IDX; \ -+ *addr_bdram = R_AX_##txch##_BDRAM_CTRL; \ -+ *addr_desa_l = R_AX_##txch##_TXBD_DESA_L; \ -+ *addr_desa_h = R_AX_##txch##_TXBD_DESA_H; \ -+ break -+ -+static int rtw89_pci_get_txch_addrs(enum rtw89_tx_channel txch, -+ u32 *addr_num, -+ u32 *addr_idx, -+ u32 *addr_bdram, -+ u32 *addr_desa_l, -+ u32 *addr_desa_h) -+{ -+ switch (txch) { -+ case_TXCHADDRS(ACH0); -+ case_TXCHADDRS(ACH1); -+ case_TXCHADDRS(ACH2); -+ case_TXCHADDRS(ACH3); -+ case_TXCHADDRS(ACH4); -+ case_TXCHADDRS(ACH5); -+ case_TXCHADDRS(ACH6); -+ case_TXCHADDRS(ACH7); -+ case_TXCHADDRS(CH8); -+ case_TXCHADDRS(CH9); -+ case_TXCHADDRS(CH10); -+ case_TXCHADDRS(CH11); -+ case_TXCHADDRS(CH12); -+ default: -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+#undef case_TXCHADDRS -+ -+#define case_RXCHADDRS(rxch) \ -+ case RTW89_RXCH_##rxch: \ -+ *addr_num = R_AX_##rxch##_RXBD_NUM; \ -+ *addr_idx = R_AX_##rxch##_RXBD_IDX; \ -+ *addr_desa_l = R_AX_##rxch##_RXBD_DESA_L; \ -+ *addr_desa_h = R_AX_##rxch##_RXBD_DESA_H; \ -+ break -+ -+static int rtw89_pci_get_rxch_addrs(enum rtw89_rx_channel rxch, -+ u32 *addr_num, -+ u32 *addr_idx, -+ u32 *addr_desa_l, -+ u32 *addr_desa_h) -+{ -+ switch (rxch) { -+ case_RXCHADDRS(RXQ); -+ case_RXCHADDRS(RPQ); -+ default: -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+#undef case_RXCHADDRS -+ -+static u32 rtw89_pci_get_avail_txbd_num(struct rtw89_pci_tx_ring *ring) -+{ -+ struct rtw89_pci_dma_ring *bd_ring = &ring->bd_ring; -+ -+ /* reserved 1 desc check ring is full or not */ -+ if (bd_ring->rp > bd_ring->wp) -+ return bd_ring->rp - bd_ring->wp - 1; -+ -+ return bd_ring->len - (bd_ring->wp - bd_ring->rp) - 1; -+} -+ -+static -+u32 __rtw89_pci_check_and_reclaim_tx_fwcmd_resource(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; -+ struct rtw89_pci_tx_ring *tx_ring = &rtwpci->tx_rings[RTW89_TXCH_CH12]; -+ u32 cnt; -+ -+ spin_lock_bh(&rtwpci->trx_lock); -+ rtw89_pci_reclaim_tx_fwcmd(rtwdev, rtwpci); -+ cnt = rtw89_pci_get_avail_txbd_num(tx_ring); -+ spin_unlock_bh(&rtwpci->trx_lock); -+ -+ return cnt; -+} -+ -+static u32 __rtw89_pci_check_and_reclaim_tx_resource(struct rtw89_dev *rtwdev, -+ u8 txch) -+{ -+ struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; -+ struct rtw89_pci_tx_ring *tx_ring = &rtwpci->tx_rings[txch]; -+ struct rtw89_pci_tx_wd_ring *wd_ring = &tx_ring->wd_ring; -+ u32 bd_cnt, wd_cnt, min_cnt = 0; -+ struct rtw89_pci_rx_ring *rx_ring; -+ u32 cnt; -+ -+ rx_ring = &rtwpci->rx_rings[RTW89_RXCH_RPQ]; -+ -+ spin_lock_bh(&rtwpci->trx_lock); -+ bd_cnt = rtw89_pci_get_avail_txbd_num(tx_ring); -+ wd_cnt = wd_ring->curr_num; -+ -+ if (wd_cnt == 0 || bd_cnt == 0) { -+ cnt = rtw89_pci_rxbd_recalc(rtwdev, rx_ring); -+ if (!cnt) -+ goto out_unlock; -+ rtw89_pci_release_tx(rtwdev, rx_ring, cnt); -+ } -+ -+ bd_cnt = rtw89_pci_get_avail_txbd_num(tx_ring); -+ wd_cnt = wd_ring->curr_num; -+ min_cnt = min(bd_cnt, wd_cnt); -+ if (min_cnt == 0) -+ rtw89_warn(rtwdev, "still no tx resource after reclaim\n"); -+ -+out_unlock: -+ spin_unlock_bh(&rtwpci->trx_lock); -+ -+ return min_cnt; -+} -+ -+static u32 rtw89_pci_check_and_reclaim_tx_resource(struct rtw89_dev *rtwdev, -+ u8 txch) -+{ -+ if (txch == RTW89_TXCH_CH12) -+ return __rtw89_pci_check_and_reclaim_tx_fwcmd_resource(rtwdev); -+ -+ return __rtw89_pci_check_and_reclaim_tx_resource(rtwdev, txch); -+} -+ -+static void __rtw89_pci_tx_kick_off(struct rtw89_dev *rtwdev, struct rtw89_pci_tx_ring *tx_ring) -+{ -+ struct rtw89_pci_dma_ring *bd_ring = &tx_ring->bd_ring; -+ u32 host_idx, addr; -+ -+ addr = bd_ring->addr_idx; -+ host_idx = bd_ring->wp; -+ rtw89_write16(rtwdev, addr, host_idx); -+} -+ -+static void rtw89_pci_tx_bd_ring_update(struct rtw89_dev *rtwdev, struct rtw89_pci_tx_ring *tx_ring, -+ int n_txbd) -+{ -+ struct rtw89_pci_dma_ring *bd_ring = &tx_ring->bd_ring; -+ u32 host_idx, len; -+ -+ len = bd_ring->len; -+ host_idx = bd_ring->wp + n_txbd; -+ host_idx = host_idx < len ? host_idx : host_idx - len; -+ -+ bd_ring->wp = host_idx; -+} -+ -+static void rtw89_pci_ops_tx_kick_off(struct rtw89_dev *rtwdev, u8 txch) -+{ -+ struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; -+ struct rtw89_pci_tx_ring *tx_ring = &rtwpci->tx_rings[txch]; -+ -+ spin_lock_bh(&rtwpci->trx_lock); -+ __rtw89_pci_tx_kick_off(rtwdev, tx_ring); -+ spin_unlock_bh(&rtwpci->trx_lock); -+} -+ -+static void __pci_flush_txch(struct rtw89_dev *rtwdev, u8 txch, bool drop) -+{ -+ struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; -+ struct rtw89_pci_tx_ring *tx_ring = &rtwpci->tx_rings[txch]; -+ struct rtw89_pci_dma_ring *bd_ring = &tx_ring->bd_ring; -+ u32 cur_idx, cur_rp; -+ u8 i; -+ -+ /* Because the time taked by the I/O is a bit dynamic, it's hard to -+ * define a reasonable fixed total timeout to use read_poll_timeout* -+ * helper. Instead, we can ensure a reasonable polling times, so we -+ * just use for loop with udelay here. -+ */ -+ for (i = 0; i < 60; i++) { -+ cur_idx = rtw89_read32(rtwdev, bd_ring->addr_idx); -+ cur_rp = FIELD_GET(TXBD_HW_IDX_MASK, cur_idx); -+ if (cur_rp == bd_ring->wp) -+ return; -+ -+ udelay(1); -+ } -+ -+ if (!drop) -+ rtw89_info(rtwdev, "timed out to flush pci txch: %d\n", txch); -+} -+ -+static void __rtw89_pci_ops_flush_txchs(struct rtw89_dev *rtwdev, u32 txchs, -+ bool drop) -+{ -+ u8 i; -+ -+ for (i = 0; i < RTW89_TXCH_NUM; i++) { -+ /* It may be unnecessary to flush FWCMD queue. */ -+ if (i == RTW89_TXCH_CH12) -+ continue; -+ -+ if (txchs & BIT(i)) -+ __pci_flush_txch(rtwdev, i, drop); -+ } -+} -+ -+static void rtw89_pci_ops_flush_queues(struct rtw89_dev *rtwdev, u32 queues, -+ bool drop) -+{ -+ __rtw89_pci_ops_flush_txchs(rtwdev, BIT(RTW89_TXCH_NUM) - 1, drop); -+} -+ -+static int rtw89_pci_txwd_submit(struct rtw89_dev *rtwdev, -+ struct rtw89_pci_tx_ring *tx_ring, -+ struct rtw89_pci_tx_wd *txwd, -+ struct rtw89_core_tx_request *tx_req) -+{ -+ struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; -+ struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info; -+ struct rtw89_txwd_body *txwd_body; -+ struct rtw89_txwd_info *txwd_info; -+ struct rtw89_pci_tx_wp_info *txwp_info; -+ struct rtw89_pci_tx_addr_info_32 *txaddr_info; -+ struct pci_dev *pdev = rtwpci->pdev; -+ struct sk_buff *skb = tx_req->skb; -+ struct rtw89_pci_tx_data *tx_data = RTW89_PCI_TX_SKB_CB(skb); -+ bool en_wd_info = desc_info->en_wd_info; -+ u32 txwd_len; -+ u32 txwp_len; -+ u32 txaddr_info_len; -+ dma_addr_t dma; -+ int ret; -+ -+ rtw89_core_fill_txdesc(rtwdev, desc_info, txwd->vaddr); -+ -+ dma = dma_map_single(&pdev->dev, skb->data, skb->len, DMA_TO_DEVICE); -+ if (dma_mapping_error(&pdev->dev, dma)) { -+ rtw89_err(rtwdev, "failed to map skb dma data\n"); -+ ret = -EBUSY; -+ goto err; -+ } -+ -+ tx_data->dma = dma; -+ -+ txaddr_info_len = sizeof(*txaddr_info); -+ txwp_len = sizeof(*txwp_info); -+ txwd_len = sizeof(*txwd_body); -+ txwd_len += en_wd_info ? sizeof(*txwd_info) : 0; -+ -+ txwp_info = txwd->vaddr + txwd_len; -+ txwp_info->seq0 = cpu_to_le16(txwd->seq | RTW89_PCI_TXWP_VALID); -+ txwp_info->seq1 = 0; -+ txwp_info->seq2 = 0; -+ txwp_info->seq3 = 0; -+ -+ tx_ring->tx_cnt++; -+ txaddr_info = txwd->vaddr + txwd_len + txwp_len; -+ txaddr_info->length = cpu_to_le16(skb->len); -+ txaddr_info->option = cpu_to_le16(RTW89_PCI_ADDR_MSDU_LS | -+ RTW89_PCI_ADDR_NUM(1)); -+ txaddr_info->dma = cpu_to_le32(dma); -+ -+ txwd->len = txwd_len + txwp_len + txaddr_info_len; -+ -+ skb_queue_tail(&txwd->queue, skb); -+ -+ return 0; -+ -+err: -+ return ret; -+} -+ -+static int rtw89_pci_fwcmd_submit(struct rtw89_dev *rtwdev, -+ struct rtw89_pci_tx_ring *tx_ring, -+ struct rtw89_pci_tx_bd_32 *txbd, -+ struct rtw89_core_tx_request *tx_req) -+{ -+ struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; -+ struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info; -+ struct rtw89_txwd_body *txwd_body; -+ struct pci_dev *pdev = rtwpci->pdev; -+ struct sk_buff *skb = tx_req->skb; -+ struct rtw89_pci_tx_data *tx_data = RTW89_PCI_TX_SKB_CB(skb); -+ dma_addr_t dma; -+ -+ txwd_body = (struct rtw89_txwd_body *)skb_push(skb, sizeof(*txwd_body)); -+ memset(txwd_body, 0, sizeof(*txwd_body)); -+ rtw89_core_fill_txdesc(rtwdev, desc_info, txwd_body); -+ -+ dma = dma_map_single(&pdev->dev, skb->data, skb->len, DMA_TO_DEVICE); -+ if (dma_mapping_error(&pdev->dev, dma)) { -+ rtw89_err(rtwdev, "failed to map fwcmd dma data\n"); -+ return -EBUSY; -+ } -+ -+ tx_data->dma = dma; -+ txbd->option = cpu_to_le16(RTW89_PCI_TXBD_OPTION_LS); -+ txbd->length = cpu_to_le16(skb->len); -+ txbd->dma = cpu_to_le32(tx_data->dma); -+ skb_queue_tail(&rtwpci->h2c_queue, skb); -+ -+ rtw89_pci_tx_bd_ring_update(rtwdev, tx_ring, 1); -+ -+ return 0; -+} -+ -+static int rtw89_pci_txbd_submit(struct rtw89_dev *rtwdev, -+ struct rtw89_pci_tx_ring *tx_ring, -+ struct rtw89_pci_tx_bd_32 *txbd, -+ struct rtw89_core_tx_request *tx_req) -+{ -+ struct rtw89_pci_tx_wd *txwd; -+ int ret; -+ -+ /* FWCMD queue doesn't have wd pages. Instead, it submits the CMD -+ * buffer with WD BODY only. So here we don't need to check the free -+ * pages of the wd ring. -+ */ -+ if (tx_ring->txch == RTW89_TXCH_CH12) -+ return rtw89_pci_fwcmd_submit(rtwdev, tx_ring, txbd, tx_req); -+ -+ txwd = rtw89_pci_dequeue_txwd(tx_ring); -+ if (!txwd) { -+ rtw89_err(rtwdev, "no available TXWD\n"); -+ ret = -ENOSPC; -+ goto err; -+ } -+ -+ ret = rtw89_pci_txwd_submit(rtwdev, tx_ring, txwd, tx_req); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to submit TXWD %d\n", txwd->seq); -+ goto err_enqueue_wd; -+ } -+ -+ list_add_tail(&txwd->list, &tx_ring->busy_pages); -+ -+ txbd->option = cpu_to_le16(RTW89_PCI_TXBD_OPTION_LS); -+ txbd->length = cpu_to_le16(txwd->len); -+ txbd->dma = cpu_to_le32(txwd->paddr); -+ -+ rtw89_pci_tx_bd_ring_update(rtwdev, tx_ring, 1); -+ -+ return 0; -+ -+err_enqueue_wd: -+ rtw89_pci_enqueue_txwd(tx_ring, txwd); -+err: -+ return ret; -+} -+ -+static int rtw89_pci_tx_write(struct rtw89_dev *rtwdev, struct rtw89_core_tx_request *tx_req, -+ u8 txch) -+{ -+ struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; -+ struct rtw89_pci_tx_ring *tx_ring; -+ struct rtw89_pci_tx_bd_32 *txbd; -+ u32 n_avail_txbd; -+ int ret = 0; -+ -+ /* check the tx type and dma channel for fw cmd queue */ -+ if ((txch == RTW89_TXCH_CH12 || -+ tx_req->tx_type == RTW89_CORE_TX_TYPE_FWCMD) && -+ (txch != RTW89_TXCH_CH12 || -+ tx_req->tx_type != RTW89_CORE_TX_TYPE_FWCMD)) { -+ rtw89_err(rtwdev, "only fw cmd uses dma channel 12\n"); -+ return -EINVAL; -+ } -+ -+ tx_ring = &rtwpci->tx_rings[txch]; -+ spin_lock_bh(&rtwpci->trx_lock); -+ -+ n_avail_txbd = rtw89_pci_get_avail_txbd_num(tx_ring); -+ if (n_avail_txbd == 0) { -+ rtw89_err(rtwdev, "no available TXBD\n"); -+ ret = -ENOSPC; -+ goto err_unlock; -+ } -+ -+ txbd = rtw89_pci_get_next_txbd(tx_ring); -+ ret = rtw89_pci_txbd_submit(rtwdev, tx_ring, txbd, tx_req); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to submit TXBD\n"); -+ goto err_unlock; -+ } -+ -+ spin_unlock_bh(&rtwpci->trx_lock); -+ return 0; -+ -+err_unlock: -+ spin_unlock_bh(&rtwpci->trx_lock); -+ return ret; -+} -+ -+static int rtw89_pci_ops_tx_write(struct rtw89_dev *rtwdev, struct rtw89_core_tx_request *tx_req) -+{ -+ struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info; -+ int ret; -+ -+ ret = rtw89_pci_tx_write(rtwdev, tx_req, desc_info->ch_dma); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to TX Queue %d\n", desc_info->ch_dma); -+ return ret; -+ } -+ -+ return 0; -+} -+ -+static const struct rtw89_pci_bd_ram bd_ram_table[RTW89_TXCH_NUM] = { -+ [RTW89_TXCH_ACH0] = {.start_idx = 0, .max_num = 5, .min_num = 2}, -+ [RTW89_TXCH_ACH1] = {.start_idx = 5, .max_num = 5, .min_num = 2}, -+ [RTW89_TXCH_ACH2] = {.start_idx = 10, .max_num = 5, .min_num = 2}, -+ [RTW89_TXCH_ACH3] = {.start_idx = 15, .max_num = 5, .min_num = 2}, -+ [RTW89_TXCH_ACH4] = {.start_idx = 20, .max_num = 5, .min_num = 2}, -+ [RTW89_TXCH_ACH5] = {.start_idx = 25, .max_num = 5, .min_num = 2}, -+ [RTW89_TXCH_ACH6] = {.start_idx = 30, .max_num = 5, .min_num = 2}, -+ [RTW89_TXCH_ACH7] = {.start_idx = 35, .max_num = 5, .min_num = 2}, -+ [RTW89_TXCH_CH8] = {.start_idx = 40, .max_num = 5, .min_num = 1}, -+ [RTW89_TXCH_CH9] = {.start_idx = 45, .max_num = 5, .min_num = 1}, -+ [RTW89_TXCH_CH10] = {.start_idx = 50, .max_num = 5, .min_num = 1}, -+ [RTW89_TXCH_CH11] = {.start_idx = 55, .max_num = 5, .min_num = 1}, -+ [RTW89_TXCH_CH12] = {.start_idx = 60, .max_num = 4, .min_num = 1}, -+}; -+ -+static void rtw89_pci_reset_trx_rings(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; -+ struct rtw89_pci_tx_ring *tx_ring; -+ struct rtw89_pci_rx_ring *rx_ring; -+ struct rtw89_pci_dma_ring *bd_ring; -+ const struct rtw89_pci_bd_ram *bd_ram; -+ u32 addr_num; -+ u32 addr_bdram; -+ u32 addr_desa_l; -+ u32 val32; -+ int i; -+ -+ for (i = 0; i < RTW89_TXCH_NUM; i++) { -+ tx_ring = &rtwpci->tx_rings[i]; -+ bd_ring = &tx_ring->bd_ring; -+ bd_ram = &bd_ram_table[i]; -+ addr_num = bd_ring->addr_num; -+ addr_bdram = bd_ring->addr_bdram; -+ addr_desa_l = bd_ring->addr_desa_l; -+ bd_ring->wp = 0; -+ bd_ring->rp = 0; -+ -+ val32 = FIELD_PREP(BDRAM_SIDX_MASK, bd_ram->start_idx) | -+ FIELD_PREP(BDRAM_MAX_MASK, bd_ram->max_num) | -+ FIELD_PREP(BDRAM_MIN_MASK, bd_ram->min_num); -+ -+ rtw89_write16(rtwdev, addr_num, bd_ring->len); -+ rtw89_write32(rtwdev, addr_bdram, val32); -+ rtw89_write32(rtwdev, addr_desa_l, bd_ring->dma); -+ } -+ -+ for (i = 0; i < RTW89_RXCH_NUM; i++) { -+ rx_ring = &rtwpci->rx_rings[i]; -+ bd_ring = &rx_ring->bd_ring; -+ addr_num = bd_ring->addr_num; -+ addr_desa_l = bd_ring->addr_desa_l; -+ bd_ring->wp = 0; -+ bd_ring->rp = 0; -+ rx_ring->diliver_skb = NULL; -+ rx_ring->diliver_desc.ready = false; -+ -+ rtw89_write16(rtwdev, addr_num, bd_ring->len); -+ rtw89_write32(rtwdev, addr_desa_l, bd_ring->dma); -+ } -+} -+ -+static void rtw89_pci_release_tx_ring(struct rtw89_dev *rtwdev, -+ struct rtw89_pci_tx_ring *tx_ring) -+{ -+ rtw89_pci_release_busy_txwd(rtwdev, tx_ring); -+ rtw89_pci_release_pending_txwd_skb(rtwdev, tx_ring); -+} -+ -+static void rtw89_pci_ops_reset(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; -+ int txch; -+ -+ rtw89_pci_reset_trx_rings(rtwdev); -+ -+ spin_lock_bh(&rtwpci->trx_lock); -+ for (txch = 0; txch < RTW89_TXCH_NUM; txch++) { -+ if (txch == RTW89_TXCH_CH12) { -+ rtw89_pci_release_fwcmd(rtwdev, rtwpci, -+ skb_queue_len(&rtwpci->h2c_queue), true); -+ continue; -+ } -+ rtw89_pci_release_tx_ring(rtwdev, &rtwpci->tx_rings[txch]); -+ } -+ spin_unlock_bh(&rtwpci->trx_lock); -+} -+ -+static int rtw89_pci_ops_start(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; -+ unsigned long flags; -+ -+ rtw89_core_napi_start(rtwdev); -+ -+ spin_lock_irqsave(&rtwpci->irq_lock, flags); -+ rtwpci->running = true; -+ rtw89_pci_enable_intr(rtwdev, rtwpci); -+ spin_unlock_irqrestore(&rtwpci->irq_lock, flags); -+ -+ return 0; -+} -+ -+static void rtw89_pci_ops_stop(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; -+ struct pci_dev *pdev = rtwpci->pdev; -+ unsigned long flags; -+ -+ spin_lock_irqsave(&rtwpci->irq_lock, flags); -+ rtwpci->running = false; -+ rtw89_pci_disable_intr(rtwdev, rtwpci); -+ spin_unlock_irqrestore(&rtwpci->irq_lock, flags); -+ -+ synchronize_irq(pdev->irq); -+ rtw89_core_napi_stop(rtwdev); -+} -+ -+static void rtw89_pci_ops_write32(struct rtw89_dev *rtwdev, u32 addr, u32 data); -+ -+static u32 rtw89_pci_ops_read32_cmac(struct rtw89_dev *rtwdev, u32 addr) -+{ -+ struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; -+ u32 val = readl(rtwpci->mmap + addr); -+ int count; -+ -+ for (count = 0; ; count++) { -+ if (val != RTW89_R32_DEAD) -+ return val; -+ if (count >= MAC_REG_POOL_COUNT) { -+ rtw89_warn(rtwdev, "addr %#x = %#x\n", addr, val); -+ return RTW89_R32_DEAD; -+ } -+ rtw89_pci_ops_write32(rtwdev, R_AX_CK_EN, B_AX_CMAC_ALLCKEN); -+ val = readl(rtwpci->mmap + addr); -+ } -+ -+ return val; -+} -+ -+static u8 rtw89_pci_ops_read8(struct rtw89_dev *rtwdev, u32 addr) -+{ -+ struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; -+ u32 addr32, val32, shift; -+ -+ if (!ACCESS_CMAC(addr)) -+ return readb(rtwpci->mmap + addr); -+ -+ addr32 = addr & ~0x3; -+ shift = (addr & 0x3) * 8; -+ val32 = rtw89_pci_ops_read32_cmac(rtwdev, addr32); -+ return val32 >> shift; -+} -+ -+static u16 rtw89_pci_ops_read16(struct rtw89_dev *rtwdev, u32 addr) -+{ -+ struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; -+ u32 addr32, val32, shift; -+ -+ if (!ACCESS_CMAC(addr)) -+ return readw(rtwpci->mmap + addr); -+ -+ addr32 = addr & ~0x3; -+ shift = (addr & 0x3) * 8; -+ val32 = rtw89_pci_ops_read32_cmac(rtwdev, addr32); -+ return val32 >> shift; -+} -+ -+static u32 rtw89_pci_ops_read32(struct rtw89_dev *rtwdev, u32 addr) -+{ -+ struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; -+ -+ if (!ACCESS_CMAC(addr)) -+ return readl(rtwpci->mmap + addr); -+ -+ return rtw89_pci_ops_read32_cmac(rtwdev, addr); -+} -+ -+static void rtw89_pci_ops_write8(struct rtw89_dev *rtwdev, u32 addr, u8 data) -+{ -+ struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; -+ -+ writeb(data, rtwpci->mmap + addr); -+} -+ -+static void rtw89_pci_ops_write16(struct rtw89_dev *rtwdev, u32 addr, u16 data) -+{ -+ struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; -+ -+ writew(data, rtwpci->mmap + addr); -+} -+ -+static void rtw89_pci_ops_write32(struct rtw89_dev *rtwdev, u32 addr, u32 data) -+{ -+ struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; -+ -+ writel(data, rtwpci->mmap + addr); -+} -+ -+static void rtw89_pci_ctrl_dma_all(struct rtw89_dev *rtwdev, bool enable) -+{ -+ if (enable) { -+ rtw89_write32_set(rtwdev, R_AX_PCIE_INIT_CFG1, -+ B_AX_TXHCI_EN | B_AX_RXHCI_EN); -+ rtw89_write32_clr(rtwdev, R_AX_PCIE_DMA_STOP1, -+ B_AX_STOP_PCIEIO); -+ } else { -+ rtw89_write32_set(rtwdev, R_AX_PCIE_DMA_STOP1, -+ B_AX_STOP_PCIEIO); -+ rtw89_write32_clr(rtwdev, R_AX_PCIE_INIT_CFG1, -+ B_AX_TXHCI_EN | B_AX_RXHCI_EN); -+ } -+} -+ -+static int rtw89_pci_check_mdio(struct rtw89_dev *rtwdev, u8 addr, u8 speed, u16 rw_bit) -+{ -+ u16 val; -+ -+ rtw89_write8(rtwdev, R_AX_MDIO_CFG, addr & 0x1F); -+ -+ val = rtw89_read16(rtwdev, R_AX_MDIO_CFG); -+ switch (speed) { -+ case PCIE_PHY_GEN1: -+ if (addr < 0x20) -+ val = u16_replace_bits(val, MDIO_PG0_G1, B_AX_MDIO_PHY_ADDR_MASK); -+ else -+ val = u16_replace_bits(val, MDIO_PG1_G1, B_AX_MDIO_PHY_ADDR_MASK); -+ break; -+ case PCIE_PHY_GEN2: -+ if (addr < 0x20) -+ val = u16_replace_bits(val, MDIO_PG0_G2, B_AX_MDIO_PHY_ADDR_MASK); -+ else -+ val = u16_replace_bits(val, MDIO_PG1_G2, B_AX_MDIO_PHY_ADDR_MASK); -+ break; -+ default: -+ rtw89_err(rtwdev, "[ERR]Error Speed %d!\n", speed); -+ return -EINVAL; -+ }; -+ rtw89_write16(rtwdev, R_AX_MDIO_CFG, val); -+ rtw89_write16_set(rtwdev, R_AX_MDIO_CFG, rw_bit); -+ -+ return read_poll_timeout(rtw89_read16, val, !(val & rw_bit), 10, 2000, -+ false, rtwdev, R_AX_MDIO_CFG); -+} -+ -+static int -+rtw89_read16_mdio(struct rtw89_dev *rtwdev, u8 addr, u8 speed, u16 *val) -+{ -+ int ret; -+ -+ ret = rtw89_pci_check_mdio(rtwdev, addr, speed, B_AX_MDIO_RFLAG); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR]MDIO R16 0x%X fail ret=%d!\n", addr, ret); -+ return ret; -+ } -+ *val = rtw89_read16(rtwdev, R_AX_MDIO_RDATA); -+ -+ return 0; -+} -+ -+static int -+rtw89_write16_mdio(struct rtw89_dev *rtwdev, u8 addr, u16 data, u8 speed) -+{ -+ int ret; -+ -+ rtw89_write16(rtwdev, R_AX_MDIO_WDATA, data); -+ ret = rtw89_pci_check_mdio(rtwdev, addr, speed, B_AX_MDIO_WFLAG); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR]MDIO W16 0x%X = %x fail ret=%d!\n", addr, data, ret); -+ return ret; -+ } -+ -+ return 0; -+} -+ -+static int rtw89_write16_mdio_set(struct rtw89_dev *rtwdev, u8 addr, u16 mask, u8 speed) -+{ -+ int ret; -+ u16 val; -+ -+ ret = rtw89_read16_mdio(rtwdev, addr, speed, &val); -+ if (ret) -+ return ret; -+ ret = rtw89_write16_mdio(rtwdev, addr, val | mask, speed); -+ if (ret) -+ return ret; -+ -+ return 0; -+} -+ -+static int rtw89_write16_mdio_clr(struct rtw89_dev *rtwdev, u8 addr, u16 mask, u8 speed) -+{ -+ int ret; -+ u16 val; -+ -+ ret = rtw89_read16_mdio(rtwdev, addr, speed, &val); -+ if (ret) -+ return ret; -+ ret = rtw89_write16_mdio(rtwdev, addr, val & ~mask, speed); -+ if (ret) -+ return ret; -+ -+ return 0; -+} -+ -+static int rtw89_dbi_write8(struct rtw89_dev *rtwdev, u16 addr, u8 data) -+{ -+ u16 write_addr; -+ u16 remainder = addr & ~(B_AX_DBI_ADDR_MSK | B_AX_DBI_WREN_MSK); -+ u8 flag; -+ int ret; -+ -+ write_addr = addr & B_AX_DBI_ADDR_MSK; -+ write_addr |= u16_encode_bits(BIT(remainder), B_AX_DBI_WREN_MSK); -+ rtw89_write8(rtwdev, R_AX_DBI_WDATA + remainder, data); -+ rtw89_write16(rtwdev, R_AX_DBI_FLAG, write_addr); -+ rtw89_write8(rtwdev, R_AX_DBI_FLAG + 2, B_AX_DBI_WFLAG >> 16); -+ -+ ret = read_poll_timeout_atomic(rtw89_read8, flag, !flag, 10, -+ 10 * RTW89_PCI_WR_RETRY_CNT, false, -+ rtwdev, R_AX_DBI_FLAG + 2); -+ if (ret) -+ WARN(flag, "failed to write to DBI register, addr=0x%04x\n", -+ addr); -+ -+ return ret; -+} -+ -+static int rtw89_dbi_read8(struct rtw89_dev *rtwdev, u16 addr, u8 *value) -+{ -+ u16 read_addr = addr & B_AX_DBI_ADDR_MSK; -+ u8 flag; -+ int ret; -+ -+ rtw89_write16(rtwdev, R_AX_DBI_FLAG, read_addr); -+ rtw89_write8(rtwdev, R_AX_DBI_FLAG + 2, B_AX_DBI_RFLAG >> 16); -+ -+ ret = read_poll_timeout_atomic(rtw89_read8, flag, !flag, 10, -+ 10 * RTW89_PCI_WR_RETRY_CNT, false, -+ rtwdev, R_AX_DBI_FLAG + 2); -+ -+ if (!ret) { -+ read_addr = R_AX_DBI_RDATA + (addr & 3); -+ *value = rtw89_read8(rtwdev, read_addr); -+ } else { -+ WARN(1, "failed to read DBI register, addr=0x%04x\n", addr); -+ ret = -EIO; -+ } -+ -+ return ret; -+} -+ -+static int rtw89_dbi_write8_set(struct rtw89_dev *rtwdev, u16 addr, u8 bit) -+{ -+ u8 value; -+ int ret; -+ -+ ret = rtw89_dbi_read8(rtwdev, addr, &value); -+ if (ret) -+ return ret; -+ -+ value |= bit; -+ ret = rtw89_dbi_write8(rtwdev, addr, value); -+ -+ return ret; -+} -+ -+static int rtw89_dbi_write8_clr(struct rtw89_dev *rtwdev, u16 addr, u8 bit) -+{ -+ u8 value; -+ int ret; -+ -+ ret = rtw89_dbi_read8(rtwdev, addr, &value); -+ if (ret) -+ return ret; -+ -+ value &= ~bit; -+ ret = rtw89_dbi_write8(rtwdev, addr, value); -+ -+ return ret; -+} -+ -+static int -+__get_target(struct rtw89_dev *rtwdev, u16 *target, enum rtw89_pcie_phy phy_rate) -+{ -+ u16 val, tar; -+ int ret; -+ -+ /* Enable counter */ -+ ret = rtw89_read16_mdio(rtwdev, RAC_CTRL_PPR_V1, phy_rate, &val); -+ if (ret) -+ return ret; -+ ret = rtw89_write16_mdio(rtwdev, RAC_CTRL_PPR_V1, val & ~B_AX_CLK_CALIB_EN, -+ phy_rate); -+ if (ret) -+ return ret; -+ ret = rtw89_write16_mdio(rtwdev, RAC_CTRL_PPR_V1, val | B_AX_CLK_CALIB_EN, -+ phy_rate); -+ if (ret) -+ return ret; -+ -+ fsleep(300); -+ -+ ret = rtw89_read16_mdio(rtwdev, RAC_CTRL_PPR_V1, phy_rate, &tar); -+ if (ret) -+ return ret; -+ ret = rtw89_write16_mdio(rtwdev, RAC_CTRL_PPR_V1, val & ~B_AX_CLK_CALIB_EN, -+ phy_rate); -+ if (ret) -+ return ret; -+ -+ tar = tar & 0x0FFF; -+ if (tar == 0 || tar == 0x0FFF) { -+ rtw89_err(rtwdev, "[ERR]Get target failed.\n"); -+ return -EINVAL; -+ } -+ -+ *target = tar; -+ -+ return 0; -+} -+ -+static int rtw89_pci_auto_refclk_cal(struct rtw89_dev *rtwdev, bool autook_en) -+{ -+ enum rtw89_pcie_phy phy_rate; -+ u16 val16, mgn_set, div_set, tar; -+ u8 val8, bdr_ori; -+ bool l1_flag = false; -+ int ret = 0; -+ -+ if ((rtwdev->chip->chip_id == RTL8852A && rtwdev->hal.cv == CHIP_CBV) || -+ rtwdev->chip->chip_id == RTL8852C) -+ return 0; -+ -+ ret = rtw89_dbi_read8(rtwdev, RTW89_PCIE_PHY_RATE, &val8); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR]dbi_r8_pcie %X\n", RTW89_PCIE_PHY_RATE); -+ return ret; -+ } -+ -+ if (FIELD_GET(RTW89_PCIE_PHY_RATE_MASK, val8) == 0x1) { -+ phy_rate = PCIE_PHY_GEN1; -+ } else if (FIELD_GET(RTW89_PCIE_PHY_RATE_MASK, val8) == 0x2) { -+ phy_rate = PCIE_PHY_GEN2; -+ } else { -+ rtw89_err(rtwdev, "[ERR]PCIe PHY rate %#x not support\n", val8); -+ return -EOPNOTSUPP; -+ } -+ /* Disable L1BD */ -+ ret = rtw89_dbi_read8(rtwdev, RTW89_PCIE_L1_CTRL, &bdr_ori); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR]dbi_r8_pcie %X\n", RTW89_PCIE_L1_CTRL); -+ return ret; -+ } -+ -+ if (bdr_ori & RTW89_PCIE_BIT_L1) { -+ ret = rtw89_dbi_write8(rtwdev, RTW89_PCIE_L1_CTRL, -+ bdr_ori & ~RTW89_PCIE_BIT_L1); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR]dbi_w8_pcie %X\n", RTW89_PCIE_L1_CTRL); -+ return ret; -+ } -+ l1_flag = true; -+ } -+ -+ ret = rtw89_read16_mdio(rtwdev, RAC_CTRL_PPR_V1, phy_rate, &val16); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR]mdio_r16_pcie %X\n", RAC_CTRL_PPR_V1); -+ goto end; -+ } -+ -+ if (val16 & B_AX_CALIB_EN) { -+ ret = rtw89_write16_mdio(rtwdev, RAC_CTRL_PPR_V1, -+ val16 & ~B_AX_CALIB_EN, phy_rate); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR]mdio_w16_pcie %X\n", RAC_CTRL_PPR_V1); -+ goto end; -+ } -+ } -+ -+ if (!autook_en) -+ goto end; -+ /* Set div */ -+ ret = rtw89_write16_mdio_clr(rtwdev, RAC_CTRL_PPR_V1, B_AX_DIV, phy_rate); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR]mdio_w16_pcie %X\n", RAC_CTRL_PPR_V1); -+ goto end; -+ } -+ -+ /* Obtain div and margin */ -+ ret = __get_target(rtwdev, &tar, phy_rate); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR]1st get target fail %d\n", ret); -+ goto end; -+ } -+ -+ mgn_set = tar * INTF_INTGRA_HOSTREF_V1 / INTF_INTGRA_MINREF_V1 - tar; -+ -+ if (mgn_set >= 128) { -+ div_set = 0x0003; -+ mgn_set = 0x000F; -+ } else if (mgn_set >= 64) { -+ div_set = 0x0003; -+ mgn_set >>= 3; -+ } else if (mgn_set >= 32) { -+ div_set = 0x0002; -+ mgn_set >>= 2; -+ } else if (mgn_set >= 16) { -+ div_set = 0x0001; -+ mgn_set >>= 1; -+ } else if (mgn_set == 0) { -+ rtw89_err(rtwdev, "[ERR]cal mgn is 0,tar = %d\n", tar); -+ goto end; -+ } else { -+ div_set = 0x0000; -+ } -+ -+ ret = rtw89_read16_mdio(rtwdev, RAC_CTRL_PPR_V1, phy_rate, &val16); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR]mdio_r16_pcie %X\n", RAC_CTRL_PPR_V1); -+ goto end; -+ } -+ -+ val16 |= u16_encode_bits(div_set, B_AX_DIV); -+ -+ ret = rtw89_write16_mdio(rtwdev, RAC_CTRL_PPR_V1, val16, phy_rate); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR]mdio_w16_pcie %X\n", RAC_CTRL_PPR_V1); -+ goto end; -+ } -+ -+ ret = __get_target(rtwdev, &tar, phy_rate); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR]2nd get target fail %d\n", ret); -+ goto end; -+ } -+ -+ rtw89_debug(rtwdev, RTW89_DBG_HCI, "[TRACE]target = 0x%X, div = 0x%X, margin = 0x%X\n", -+ tar, div_set, mgn_set); -+ ret = rtw89_write16_mdio(rtwdev, RAC_SET_PPR_V1, -+ (tar & 0x0FFF) | (mgn_set << 12), phy_rate); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR]mdio_w16_pcie %X\n", RAC_SET_PPR_V1); -+ goto end; -+ } -+ -+ /* Enable function */ -+ ret = rtw89_write16_mdio_set(rtwdev, RAC_CTRL_PPR_V1, B_AX_CALIB_EN, phy_rate); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR]mdio_w16_pcie %X\n", RAC_CTRL_PPR_V1); -+ goto end; -+ } -+ -+ /* CLK delay = 0 */ -+ ret = rtw89_dbi_write8(rtwdev, RTW89_PCIE_CLK_CTRL, PCIE_CLKDLY_HW_0); -+ -+end: -+ /* Set L1BD to ori */ -+ if (l1_flag) { -+ ret = rtw89_dbi_write8(rtwdev, RTW89_PCIE_L1_CTRL, bdr_ori); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR]dbi_w8_pcie %X\n", RTW89_PCIE_L1_CTRL); -+ return ret; -+ } -+ } -+ -+ return ret; -+} -+ -+static int rtw89_pci_deglitch_setting(struct rtw89_dev *rtwdev) -+{ -+ int ret; -+ -+ if (rtwdev->chip->chip_id != RTL8852A) -+ return 0; -+ -+ ret = rtw89_write16_mdio_clr(rtwdev, RAC_ANA24, B_AX_DEGLITCH, -+ PCIE_PHY_GEN1); -+ if (ret) -+ return ret; -+ ret = rtw89_write16_mdio_clr(rtwdev, RAC_ANA24, B_AX_DEGLITCH, -+ PCIE_PHY_GEN2); -+ if (ret) -+ return ret; -+ -+ return 0; -+} -+ -+static void rtw89_pci_rxdma_prefth(struct rtw89_dev *rtwdev) -+{ -+ rtw89_write32_set(rtwdev, R_AX_PCIE_INIT_CFG1, B_AX_DIS_RXDMA_PRE); -+} -+ -+static void rtw89_pci_l1off_pwroff(struct rtw89_dev *rtwdev) -+{ -+ if (rtwdev->chip->chip_id == RTL8852C) -+ return; -+ -+ rtw89_write32_clr(rtwdev, R_AX_PCIE_PS_CTRL, B_AX_L1OFF_PWR_OFF_EN); -+} -+ -+static u32 rtw89_pci_l2_rxen_lat(struct rtw89_dev *rtwdev) -+{ -+ int ret; -+ -+ if (rtwdev->chip->chip_id == RTL8852C) -+ return 0; -+ -+ ret = rtw89_write16_mdio_clr(rtwdev, RAC_ANA26, B_AX_RXEN, -+ PCIE_PHY_GEN1); -+ if (ret) -+ return ret; -+ -+ ret = rtw89_write16_mdio_clr(rtwdev, RAC_ANA26, B_AX_RXEN, -+ PCIE_PHY_GEN2); -+ if (ret) -+ return ret; -+ -+ return 0; -+} -+ -+static void rtw89_pci_aphy_pwrcut(struct rtw89_dev *rtwdev) -+{ -+ if (rtwdev->chip->chip_id != RTL8852A) -+ return; -+ -+ rtw89_write32_clr(rtwdev, R_AX_SYS_PW_CTRL, B_AX_PSUS_OFF_CAPC_EN); -+} -+ -+static void rtw89_pci_hci_ldo(struct rtw89_dev *rtwdev) -+{ -+ if (rtwdev->chip->chip_id != RTL8852A) -+ return; -+ -+ rtw89_write32_set(rtwdev, R_AX_SYS_SDIO_CTRL, -+ B_AX_PCIE_DIS_L2_CTRL_LDO_HCI); -+ rtw89_write32_clr(rtwdev, R_AX_SYS_SDIO_CTRL, -+ B_AX_PCIE_DIS_WLSUS_AFT_PDN); -+} -+ -+static void rtw89_pci_set_sic(struct rtw89_dev *rtwdev) -+{ -+ if (rtwdev->chip->chip_id == RTL8852C) -+ return; -+ -+ rtw89_write32_clr(rtwdev, R_AX_PCIE_EXP_CTRL, -+ B_AX_SIC_EN_FORCE_CLKREQ); -+} -+ -+static void rtw89_pci_set_dbg(struct rtw89_dev *rtwdev) -+{ -+ if (rtwdev->chip->chip_id == RTL8852C) -+ return; -+ -+ rtw89_write32_set(rtwdev, R_AX_PCIE_DBG_CTRL, -+ B_AX_ASFF_FULL_NO_STK | B_AX_EN_STUCK_DBG); -+ -+ if (rtwdev->chip->chip_id == RTL8852A) -+ rtw89_write32_set(rtwdev, R_AX_PCIE_EXP_CTRL, -+ B_AX_EN_CHKDSC_NO_RX_STUCK); -+} -+ -+static void rtw89_pci_clr_idx_all(struct rtw89_dev *rtwdev) -+{ -+ u32 val = B_AX_CLR_ACH0_IDX | B_AX_CLR_ACH1_IDX | B_AX_CLR_ACH2_IDX | -+ B_AX_CLR_ACH3_IDX | B_AX_CLR_CH8_IDX | B_AX_CLR_CH9_IDX | -+ B_AX_CLR_CH12_IDX; -+ -+ if (rtwdev->chip->chip_id == RTL8852A) -+ val |= B_AX_CLR_ACH4_IDX | B_AX_CLR_ACH5_IDX | -+ B_AX_CLR_ACH6_IDX | B_AX_CLR_ACH7_IDX; -+ /* clear DMA indexes */ -+ rtw89_write32_set(rtwdev, R_AX_TXBD_RWPTR_CLR1, val); -+ if (rtwdev->chip->chip_id == RTL8852A) -+ rtw89_write32_set(rtwdev, R_AX_TXBD_RWPTR_CLR2, -+ B_AX_CLR_CH10_IDX | B_AX_CLR_CH11_IDX); -+ rtw89_write32_set(rtwdev, R_AX_RXBD_RWPTR_CLR, -+ B_AX_CLR_RXQ_IDX | B_AX_CLR_RPQ_IDX); -+} -+ -+static int rtw89_pci_ops_deinit(struct rtw89_dev *rtwdev) -+{ -+ if (rtwdev->chip->chip_id == RTL8852A) { -+ /* ltr sw trigger */ -+ rtw89_write32_set(rtwdev, R_AX_LTR_CTRL_0, B_AX_APP_LTR_IDLE); -+ } -+ rtw89_pci_ctrl_dma_all(rtwdev, false); -+ rtw89_pci_clr_idx_all(rtwdev); -+ -+ return 0; -+} -+ -+static int rtw89_pci_ops_mac_pre_init(struct rtw89_dev *rtwdev) -+{ -+ u32 dma_busy; -+ u32 check; -+ u32 lbc; -+ int ret; -+ -+ rtw89_pci_rxdma_prefth(rtwdev); -+ rtw89_pci_l1off_pwroff(rtwdev); -+ rtw89_pci_deglitch_setting(rtwdev); -+ ret = rtw89_pci_l2_rxen_lat(rtwdev); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR] pcie l2 rxen lat %d\n", ret); -+ return ret; -+ } -+ -+ rtw89_pci_aphy_pwrcut(rtwdev); -+ rtw89_pci_hci_ldo(rtwdev); -+ -+ ret = rtw89_pci_auto_refclk_cal(rtwdev, false); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR] pcie autok fail %d\n", ret); -+ return ret; -+ } -+ -+ rtw89_pci_set_sic(rtwdev); -+ rtw89_pci_set_dbg(rtwdev); -+ -+ if (rtwdev->chip->chip_id == RTL8852A) -+ rtw89_write32_clr(rtwdev, R_AX_SYS_SDIO_CTRL, -+ B_AX_PCIE_AUXCLK_GATE); -+ -+ lbc = rtw89_read32(rtwdev, R_AX_LBC_WATCHDOG); -+ lbc = u32_replace_bits(lbc, RTW89_MAC_LBC_TMR_128US, B_AX_LBC_TIMER); -+ lbc |= B_AX_LBC_FLAG | B_AX_LBC_EN; -+ rtw89_write32(rtwdev, R_AX_LBC_WATCHDOG, lbc); -+ -+ rtw89_write32_set(rtwdev, R_AX_PCIE_INIT_CFG1, -+ B_AX_PCIE_TXRST_KEEP_REG | B_AX_PCIE_RXRST_KEEP_REG); -+ rtw89_write32_set(rtwdev, R_AX_PCIE_DMA_STOP1, B_AX_STOP_WPDMA); -+ -+ /* stop DMA activities */ -+ rtw89_pci_ctrl_dma_all(rtwdev, false); -+ -+ /* check PCI at idle state */ -+ check = B_AX_PCIEIO_BUSY | B_AX_PCIEIO_TX_BUSY | B_AX_PCIEIO_RX_BUSY; -+ ret = read_poll_timeout(rtw89_read32, dma_busy, (dma_busy & check) == 0, -+ 100, 3000, false, rtwdev, R_AX_PCIE_DMA_BUSY1); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to poll io busy\n"); -+ return ret; -+ } -+ -+ rtw89_pci_clr_idx_all(rtwdev); -+ -+ /* configure TX/RX op modes */ -+ rtw89_write32_set(rtwdev, R_AX_PCIE_INIT_CFG1, B_AX_TX_TRUNC_MODE | -+ B_AX_RX_TRUNC_MODE); -+ rtw89_write32_clr(rtwdev, R_AX_PCIE_INIT_CFG1, B_AX_RXBD_MODE); -+ rtw89_write32_mask(rtwdev, R_AX_PCIE_INIT_CFG1, B_AX_PCIE_MAX_TXDMA_MASK, 7); -+ rtw89_write32_mask(rtwdev, R_AX_PCIE_INIT_CFG1, B_AX_PCIE_MAX_RXDMA_MASK, 3); -+ /* multi-tag mode */ -+ rtw89_write32_set(rtwdev, R_AX_PCIE_INIT_CFG1, B_AX_LATENCY_CONTROL); -+ rtw89_write32_mask(rtwdev, R_AX_PCIE_EXP_CTRL, B_AX_MAX_TAG_NUM, -+ RTW89_MAC_TAG_NUM_8); -+ rtw89_write32_mask(rtwdev, R_AX_PCIE_INIT_CFG2, B_AX_WD_ITVL_IDLE, -+ RTW89_MAC_WD_DMA_INTVL_256NS); -+ rtw89_write32_mask(rtwdev, R_AX_PCIE_INIT_CFG2, B_AX_WD_ITVL_ACT, -+ RTW89_MAC_WD_DMA_INTVL_256NS); -+ -+ /* fill TRX BD indexes */ -+ rtw89_pci_ops_reset(rtwdev); -+ -+ ret = rtw89_pci_rst_bdram_pcie(rtwdev); -+ if (ret) { -+ rtw89_warn(rtwdev, "reset bdram busy\n"); -+ return ret; -+ } -+ -+ /* enable FW CMD queue to download firmware */ -+ rtw89_write32_set(rtwdev, R_AX_PCIE_DMA_STOP1, B_AX_TX_STOP1_ALL); -+ rtw89_write32_clr(rtwdev, R_AX_PCIE_DMA_STOP1, B_AX_STOP_CH12); -+ rtw89_write32_set(rtwdev, R_AX_PCIE_DMA_STOP2, B_AX_TX_STOP2_ALL); -+ -+ /* start DMA activities */ -+ rtw89_pci_ctrl_dma_all(rtwdev, true); -+ -+ return 0; -+} -+ -+static int rtw89_pci_ltr_set(struct rtw89_dev *rtwdev) -+{ -+ u32 val; -+ -+ val = rtw89_read32(rtwdev, R_AX_LTR_CTRL_0); -+ if (rtw89_pci_ltr_is_err_reg_val(val)) -+ return -EINVAL; -+ val = rtw89_read32(rtwdev, R_AX_LTR_CTRL_1); -+ if (rtw89_pci_ltr_is_err_reg_val(val)) -+ return -EINVAL; -+ val = rtw89_read32(rtwdev, R_AX_LTR_IDLE_LATENCY); -+ if (rtw89_pci_ltr_is_err_reg_val(val)) -+ return -EINVAL; -+ val = rtw89_read32(rtwdev, R_AX_LTR_ACTIVE_LATENCY); -+ if (rtw89_pci_ltr_is_err_reg_val(val)) -+ return -EINVAL; -+ -+ rtw89_write32_clr(rtwdev, R_AX_LTR_CTRL_0, B_AX_LTR_HW_EN); -+ rtw89_write32_set(rtwdev, R_AX_LTR_CTRL_0, B_AX_LTR_EN); -+ rtw89_write32_mask(rtwdev, R_AX_LTR_CTRL_0, B_AX_LTR_SPACE_IDX_MASK, -+ PCI_LTR_SPC_500US); -+ rtw89_write32_mask(rtwdev, R_AX_LTR_CTRL_0, B_AX_LTR_IDLE_TIMER_IDX_MASK, -+ PCI_LTR_IDLE_TIMER_800US); -+ rtw89_write32_mask(rtwdev, R_AX_LTR_CTRL_1, B_AX_LTR_RX0_TH_MASK, 0x28); -+ rtw89_write32_mask(rtwdev, R_AX_LTR_CTRL_1, B_AX_LTR_RX1_TH_MASK, 0x28); -+ rtw89_write32(rtwdev, R_AX_LTR_IDLE_LATENCY, 0x88e088e0); -+ rtw89_write32(rtwdev, R_AX_LTR_ACTIVE_LATENCY, 0x880b880b); -+ -+ return 0; -+} -+ -+static int rtw89_pci_ops_mac_post_init(struct rtw89_dev *rtwdev) -+{ -+ int ret; -+ -+ ret = rtw89_pci_ltr_set(rtwdev); -+ if (ret) { -+ rtw89_err(rtwdev, "pci ltr set fail\n"); -+ return ret; -+ } -+ if (rtwdev->chip->chip_id == RTL8852A) { -+ /* ltr sw trigger */ -+ rtw89_write32_set(rtwdev, R_AX_LTR_CTRL_0, B_AX_APP_LTR_ACT); -+ } -+ /* ADDR info 8-byte mode */ -+ rtw89_write32_set(rtwdev, R_AX_TX_ADDRESS_INFO_MODE_SETTING, -+ B_AX_HOST_ADDR_INFO_8B_SEL); -+ rtw89_write32_clr(rtwdev, R_AX_PKTIN_SETTING, B_AX_WD_ADDR_INFO_LENGTH); -+ -+ /* enable DMA for all queues */ -+ rtw89_write32_clr(rtwdev, R_AX_PCIE_DMA_STOP1, B_AX_TX_STOP1_ALL); -+ rtw89_write32_clr(rtwdev, R_AX_PCIE_DMA_STOP2, B_AX_TX_STOP2_ALL); -+ -+ /* Release PCI IO */ -+ rtw89_write32_clr(rtwdev, R_AX_PCIE_DMA_STOP1, -+ B_AX_STOP_WPDMA | B_AX_STOP_PCIEIO); -+ -+ return 0; -+} -+ -+static int rtw89_pci_claim_device(struct rtw89_dev *rtwdev, -+ struct pci_dev *pdev) -+{ -+ struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; -+ int ret; -+ -+ ret = pci_enable_device(pdev); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to enable pci device\n"); -+ return ret; -+ } -+ -+ pci_set_master(pdev); -+ pci_set_drvdata(pdev, rtwdev->hw); -+ -+ rtwpci->pdev = pdev; -+ -+ return 0; -+} -+ -+static void rtw89_pci_declaim_device(struct rtw89_dev *rtwdev, -+ struct pci_dev *pdev) -+{ -+ pci_clear_master(pdev); -+ pci_disable_device(pdev); -+} -+ -+static int rtw89_pci_setup_mapping(struct rtw89_dev *rtwdev, -+ struct pci_dev *pdev) -+{ -+ struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; -+ unsigned long resource_len; -+ u8 bar_id = 2; -+ int ret; -+ -+ ret = pci_request_regions(pdev, KBUILD_MODNAME); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to request pci regions\n"); -+ goto err; -+ } -+ -+ ret = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to set dma mask to 32-bit\n"); -+ goto err_release_regions; -+ } -+ -+ ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to set consistent dma mask to 32-bit\n"); -+ goto err_release_regions; -+ } -+ -+ resource_len = pci_resource_len(pdev, bar_id); -+ rtwpci->mmap = pci_iomap(pdev, bar_id, resource_len); -+ if (!rtwpci->mmap) { -+ rtw89_err(rtwdev, "failed to map pci io\n"); -+ ret = -EIO; -+ goto err_release_regions; -+ } -+ -+ return 0; -+ -+err_release_regions: -+ pci_release_regions(pdev); -+err: -+ return ret; -+} -+ -+static void rtw89_pci_clear_mapping(struct rtw89_dev *rtwdev, -+ struct pci_dev *pdev) -+{ -+ struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; -+ -+ if (rtwpci->mmap) { -+ pci_iounmap(pdev, rtwpci->mmap); -+ pci_release_regions(pdev); -+ } -+} -+ -+static void rtw89_pci_free_tx_wd_ring(struct rtw89_dev *rtwdev, -+ struct pci_dev *pdev, -+ struct rtw89_pci_tx_ring *tx_ring) -+{ -+ struct rtw89_pci_tx_wd_ring *wd_ring = &tx_ring->wd_ring; -+ u8 *head = wd_ring->head; -+ dma_addr_t dma = wd_ring->dma; -+ u32 page_size = wd_ring->page_size; -+ u32 page_num = wd_ring->page_num; -+ u32 ring_sz = page_size * page_num; -+ -+ dma_free_coherent(&pdev->dev, ring_sz, head, dma); -+ wd_ring->head = NULL; -+} -+ -+static void rtw89_pci_free_tx_ring(struct rtw89_dev *rtwdev, -+ struct pci_dev *pdev, -+ struct rtw89_pci_tx_ring *tx_ring) -+{ -+ int ring_sz; -+ u8 *head; -+ dma_addr_t dma; -+ -+ head = tx_ring->bd_ring.head; -+ dma = tx_ring->bd_ring.dma; -+ ring_sz = tx_ring->bd_ring.desc_size * tx_ring->bd_ring.len; -+ dma_free_coherent(&pdev->dev, ring_sz, head, dma); -+ -+ tx_ring->bd_ring.head = NULL; -+} -+ -+static void rtw89_pci_free_tx_rings(struct rtw89_dev *rtwdev, -+ struct pci_dev *pdev) -+{ -+ struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; -+ struct rtw89_pci_tx_ring *tx_ring; -+ int i; -+ -+ for (i = 0; i < RTW89_TXCH_NUM; i++) { -+ tx_ring = &rtwpci->tx_rings[i]; -+ rtw89_pci_free_tx_wd_ring(rtwdev, pdev, tx_ring); -+ rtw89_pci_free_tx_ring(rtwdev, pdev, tx_ring); -+ } -+} -+ -+static void rtw89_pci_free_rx_ring(struct rtw89_dev *rtwdev, -+ struct pci_dev *pdev, -+ struct rtw89_pci_rx_ring *rx_ring) -+{ -+ struct rtw89_pci_rx_info *rx_info; -+ struct sk_buff *skb; -+ dma_addr_t dma; -+ u32 buf_sz; -+ u8 *head; -+ int ring_sz = rx_ring->bd_ring.desc_size * rx_ring->bd_ring.len; -+ int i; -+ -+ buf_sz = rx_ring->buf_sz; -+ for (i = 0; i < rx_ring->bd_ring.len; i++) { -+ skb = rx_ring->buf[i]; -+ if (!skb) -+ continue; -+ -+ rx_info = RTW89_PCI_RX_SKB_CB(skb); -+ dma = rx_info->dma; -+ dma_unmap_single(&pdev->dev, dma, buf_sz, DMA_FROM_DEVICE); -+ dev_kfree_skb(skb); -+ rx_ring->buf[i] = NULL; -+ } -+ -+ head = rx_ring->bd_ring.head; -+ dma = rx_ring->bd_ring.dma; -+ dma_free_coherent(&pdev->dev, ring_sz, head, dma); -+ -+ rx_ring->bd_ring.head = NULL; -+} -+ -+static void rtw89_pci_free_rx_rings(struct rtw89_dev *rtwdev, -+ struct pci_dev *pdev) -+{ -+ struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; -+ struct rtw89_pci_rx_ring *rx_ring; -+ int i; -+ -+ for (i = 0; i < RTW89_RXCH_NUM; i++) { -+ rx_ring = &rtwpci->rx_rings[i]; -+ rtw89_pci_free_rx_ring(rtwdev, pdev, rx_ring); -+ } -+} -+ -+static void rtw89_pci_free_trx_rings(struct rtw89_dev *rtwdev, -+ struct pci_dev *pdev) -+{ -+ rtw89_pci_free_rx_rings(rtwdev, pdev); -+ rtw89_pci_free_tx_rings(rtwdev, pdev); -+} -+ -+static int rtw89_pci_init_rx_bd(struct rtw89_dev *rtwdev, struct pci_dev *pdev, -+ struct rtw89_pci_rx_ring *rx_ring, -+ struct sk_buff *skb, int buf_sz, u32 idx) -+{ -+ struct rtw89_pci_rx_info *rx_info; -+ struct rtw89_pci_rx_bd_32 *rx_bd; -+ dma_addr_t dma; -+ -+ if (!skb) -+ return -EINVAL; -+ -+ dma = dma_map_single(&pdev->dev, skb->data, buf_sz, DMA_FROM_DEVICE); -+ if (dma_mapping_error(&pdev->dev, dma)) -+ return -EBUSY; -+ -+ rx_info = RTW89_PCI_RX_SKB_CB(skb); -+ rx_bd = RTW89_PCI_RX_BD(rx_ring, idx); -+ -+ memset(rx_bd, 0, sizeof(*rx_bd)); -+ rx_bd->buf_size = cpu_to_le16(buf_sz); -+ rx_bd->dma = cpu_to_le32(dma); -+ rx_info->dma = dma; -+ -+ return 0; -+} -+ -+static int rtw89_pci_alloc_tx_wd_ring(struct rtw89_dev *rtwdev, -+ struct pci_dev *pdev, -+ struct rtw89_pci_tx_ring *tx_ring, -+ enum rtw89_tx_channel txch) -+{ -+ struct rtw89_pci_tx_wd_ring *wd_ring = &tx_ring->wd_ring; -+ struct rtw89_pci_tx_wd *txwd; -+ dma_addr_t dma; -+ dma_addr_t cur_paddr; -+ u8 *head; -+ u8 *cur_vaddr; -+ u32 page_size = RTW89_PCI_TXWD_PAGE_SIZE; -+ u32 page_num = RTW89_PCI_TXWD_NUM_MAX; -+ u32 ring_sz = page_size * page_num; -+ u32 page_offset; -+ int i; -+ -+ /* FWCMD queue doesn't use txwd as pages */ -+ if (txch == RTW89_TXCH_CH12) -+ return 0; -+ -+ head = dma_alloc_coherent(&pdev->dev, ring_sz, &dma, GFP_KERNEL); -+ if (!head) -+ return -ENOMEM; -+ -+ INIT_LIST_HEAD(&wd_ring->free_pages); -+ wd_ring->head = head; -+ wd_ring->dma = dma; -+ wd_ring->page_size = page_size; -+ wd_ring->page_num = page_num; -+ -+ page_offset = 0; -+ for (i = 0; i < page_num; i++) { -+ txwd = &wd_ring->pages[i]; -+ cur_paddr = dma + page_offset; -+ cur_vaddr = head + page_offset; -+ -+ skb_queue_head_init(&txwd->queue); -+ INIT_LIST_HEAD(&txwd->list); -+ txwd->paddr = cur_paddr; -+ txwd->vaddr = cur_vaddr; -+ txwd->len = page_size; -+ txwd->seq = i; -+ rtw89_pci_enqueue_txwd(tx_ring, txwd); -+ -+ page_offset += page_size; -+ } -+ -+ return 0; -+} -+ -+static int rtw89_pci_alloc_tx_ring(struct rtw89_dev *rtwdev, -+ struct pci_dev *pdev, -+ struct rtw89_pci_tx_ring *tx_ring, -+ u32 desc_size, u32 len, -+ enum rtw89_tx_channel txch) -+{ -+ int ring_sz = desc_size * len; -+ u8 *head; -+ dma_addr_t dma; -+ u32 addr_num; -+ u32 addr_idx; -+ u32 addr_bdram; -+ u32 addr_desa_l; -+ u32 addr_desa_h; -+ int ret; -+ -+ ret = rtw89_pci_alloc_tx_wd_ring(rtwdev, pdev, tx_ring, txch); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to alloc txwd ring of txch %d\n", txch); -+ goto err; -+ } -+ -+ ret = rtw89_pci_get_txch_addrs(txch, &addr_num, &addr_idx, &addr_bdram, -+ &addr_desa_l, &addr_desa_h); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to get address of txch %d", txch); -+ goto err_free_wd_ring; -+ } -+ -+ head = dma_alloc_coherent(&pdev->dev, ring_sz, &dma, GFP_KERNEL); -+ if (!head) { -+ ret = -ENOMEM; -+ goto err_free_wd_ring; -+ } -+ -+ INIT_LIST_HEAD(&tx_ring->busy_pages); -+ tx_ring->bd_ring.head = head; -+ tx_ring->bd_ring.dma = dma; -+ tx_ring->bd_ring.len = len; -+ tx_ring->bd_ring.desc_size = desc_size; -+ tx_ring->bd_ring.addr_num = addr_num; -+ tx_ring->bd_ring.addr_idx = addr_idx; -+ tx_ring->bd_ring.addr_bdram = addr_bdram; -+ tx_ring->bd_ring.addr_desa_l = addr_desa_l; -+ tx_ring->bd_ring.addr_desa_h = addr_desa_h; -+ tx_ring->bd_ring.wp = 0; -+ tx_ring->bd_ring.rp = 0; -+ tx_ring->txch = txch; -+ -+ return 0; -+ -+err_free_wd_ring: -+ rtw89_pci_free_tx_wd_ring(rtwdev, pdev, tx_ring); -+err: -+ return ret; -+} -+ -+static int rtw89_pci_alloc_tx_rings(struct rtw89_dev *rtwdev, -+ struct pci_dev *pdev) -+{ -+ struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; -+ struct rtw89_pci_tx_ring *tx_ring; -+ u32 desc_size; -+ u32 len; -+ u32 i, tx_allocated; -+ int ret; -+ -+ for (i = 0; i < RTW89_TXCH_NUM; i++) { -+ tx_ring = &rtwpci->tx_rings[i]; -+ desc_size = sizeof(struct rtw89_pci_tx_bd_32); -+ len = RTW89_PCI_TXBD_NUM_MAX; -+ ret = rtw89_pci_alloc_tx_ring(rtwdev, pdev, tx_ring, -+ desc_size, len, i); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to alloc tx ring %d\n", i); -+ goto err_free; -+ } -+ } -+ -+ return 0; -+ -+err_free: -+ tx_allocated = i; -+ for (i = 0; i < tx_allocated; i++) { -+ tx_ring = &rtwpci->tx_rings[i]; -+ rtw89_pci_free_tx_ring(rtwdev, pdev, tx_ring); -+ } -+ -+ return ret; -+} -+ -+static int rtw89_pci_alloc_rx_ring(struct rtw89_dev *rtwdev, -+ struct pci_dev *pdev, -+ struct rtw89_pci_rx_ring *rx_ring, -+ u32 desc_size, u32 len, u32 rxch) -+{ -+ struct sk_buff *skb; -+ u8 *head; -+ dma_addr_t dma; -+ u32 addr_num; -+ u32 addr_idx; -+ u32 addr_desa_l; -+ u32 addr_desa_h; -+ int ring_sz = desc_size * len; -+ int buf_sz = RTW89_PCI_RX_BUF_SIZE; -+ int i, allocated; -+ int ret; -+ -+ ret = rtw89_pci_get_rxch_addrs(rxch, &addr_num, &addr_idx, -+ &addr_desa_l, &addr_desa_h); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to get address of rxch %d", rxch); -+ return ret; -+ } -+ -+ head = dma_alloc_coherent(&pdev->dev, ring_sz, &dma, GFP_KERNEL); -+ if (!head) { -+ ret = -ENOMEM; -+ goto err; -+ } -+ -+ rx_ring->bd_ring.head = head; -+ rx_ring->bd_ring.dma = dma; -+ rx_ring->bd_ring.len = len; -+ rx_ring->bd_ring.desc_size = desc_size; -+ rx_ring->bd_ring.addr_num = addr_num; -+ rx_ring->bd_ring.addr_idx = addr_idx; -+ rx_ring->bd_ring.addr_desa_l = addr_desa_l; -+ rx_ring->bd_ring.addr_desa_h = addr_desa_h; -+ rx_ring->bd_ring.wp = 0; -+ rx_ring->bd_ring.rp = 0; -+ rx_ring->buf_sz = buf_sz; -+ rx_ring->diliver_skb = NULL; -+ rx_ring->diliver_desc.ready = false; -+ -+ for (i = 0; i < len; i++) { -+ skb = dev_alloc_skb(buf_sz); -+ if (!skb) { -+ ret = -ENOMEM; -+ goto err_free; -+ } -+ -+ memset(skb->data, 0, buf_sz); -+ rx_ring->buf[i] = skb; -+ ret = rtw89_pci_init_rx_bd(rtwdev, pdev, rx_ring, skb, -+ buf_sz, i); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to init rx buf %d\n", i); -+ dev_kfree_skb_any(skb); -+ rx_ring->buf[i] = NULL; -+ goto err_free; -+ } -+ } -+ -+ return 0; -+ -+err_free: -+ allocated = i; -+ for (i = 0; i < allocated; i++) { -+ skb = rx_ring->buf[i]; -+ if (!skb) -+ continue; -+ dma = *((dma_addr_t *)skb->cb); -+ dma_unmap_single(&pdev->dev, dma, buf_sz, DMA_FROM_DEVICE); -+ dev_kfree_skb(skb); -+ rx_ring->buf[i] = NULL; -+ } -+ -+ head = rx_ring->bd_ring.head; -+ dma = rx_ring->bd_ring.dma; -+ dma_free_coherent(&pdev->dev, ring_sz, head, dma); -+ -+ rx_ring->bd_ring.head = NULL; -+err: -+ return ret; -+} -+ -+static int rtw89_pci_alloc_rx_rings(struct rtw89_dev *rtwdev, -+ struct pci_dev *pdev) -+{ -+ struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; -+ struct rtw89_pci_rx_ring *rx_ring; -+ u32 desc_size; -+ u32 len; -+ int i, rx_allocated; -+ int ret; -+ -+ for (i = 0; i < RTW89_RXCH_NUM; i++) { -+ rx_ring = &rtwpci->rx_rings[i]; -+ desc_size = sizeof(struct rtw89_pci_rx_bd_32); -+ len = RTW89_PCI_RXBD_NUM_MAX; -+ ret = rtw89_pci_alloc_rx_ring(rtwdev, pdev, rx_ring, -+ desc_size, len, i); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to alloc rx ring %d\n", i); -+ goto err_free; -+ } -+ } -+ -+ return 0; -+ -+err_free: -+ rx_allocated = i; -+ for (i = 0; i < rx_allocated; i++) { -+ rx_ring = &rtwpci->rx_rings[i]; -+ rtw89_pci_free_rx_ring(rtwdev, pdev, rx_ring); -+ } -+ -+ return ret; -+} -+ -+static int rtw89_pci_alloc_trx_rings(struct rtw89_dev *rtwdev, -+ struct pci_dev *pdev) -+{ -+ int ret; -+ -+ ret = rtw89_pci_alloc_tx_rings(rtwdev, pdev); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to alloc dma tx rings\n"); -+ goto err; -+ } -+ -+ ret = rtw89_pci_alloc_rx_rings(rtwdev, pdev); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to alloc dma rx rings\n"); -+ goto err_free_tx_rings; -+ } -+ -+ return 0; -+ -+err_free_tx_rings: -+ rtw89_pci_free_tx_rings(rtwdev, pdev); -+err: -+ return ret; -+} -+ -+static void rtw89_pci_h2c_init(struct rtw89_dev *rtwdev, -+ struct rtw89_pci *rtwpci) -+{ -+ skb_queue_head_init(&rtwpci->h2c_queue); -+ skb_queue_head_init(&rtwpci->h2c_release_queue); -+} -+ -+static int rtw89_pci_setup_resource(struct rtw89_dev *rtwdev, -+ struct pci_dev *pdev) -+{ -+ struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; -+ int ret; -+ -+ ret = rtw89_pci_setup_mapping(rtwdev, pdev); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to setup pci mapping\n"); -+ goto err; -+ } -+ -+ ret = rtw89_pci_alloc_trx_rings(rtwdev, pdev); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to alloc pci trx rings\n"); -+ goto err_pci_unmap; -+ } -+ -+ rtw89_pci_h2c_init(rtwdev, rtwpci); -+ -+ spin_lock_init(&rtwpci->irq_lock); -+ spin_lock_init(&rtwpci->trx_lock); -+ -+ return 0; -+ -+err_pci_unmap: -+ rtw89_pci_clear_mapping(rtwdev, pdev); -+err: -+ return ret; -+} -+ -+static void rtw89_pci_clear_resource(struct rtw89_dev *rtwdev, -+ struct pci_dev *pdev) -+{ -+ struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; -+ -+ rtw89_pci_free_trx_rings(rtwdev, pdev); -+ rtw89_pci_clear_mapping(rtwdev, pdev); -+ rtw89_pci_release_fwcmd(rtwdev, rtwpci, -+ skb_queue_len(&rtwpci->h2c_queue), true); -+} -+ -+static void rtw89_pci_default_intr_mask(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; -+ -+ rtwpci->halt_c2h_intrs = B_AX_HALT_C2H_INT_EN | 0; -+ rtwpci->intrs[0] = B_AX_TXDMA_STUCK_INT_EN | -+ B_AX_RXDMA_INT_EN | -+ B_AX_RXP1DMA_INT_EN | -+ B_AX_RPQDMA_INT_EN | -+ B_AX_RXDMA_STUCK_INT_EN | -+ B_AX_RDU_INT_EN | -+ B_AX_RPQBD_FULL_INT_EN | -+ B_AX_HS0ISR_IND_INT_EN; -+ -+ rtwpci->intrs[1] = B_AX_HC10ISR_IND_INT_EN; -+} -+ -+static int rtw89_pci_request_irq(struct rtw89_dev *rtwdev, -+ struct pci_dev *pdev) -+{ -+ unsigned long flags = 0; -+ int ret; -+ -+ flags |= PCI_IRQ_LEGACY | PCI_IRQ_MSI; -+ ret = pci_alloc_irq_vectors(pdev, 1, 1, flags); -+ if (ret < 0) { -+ rtw89_err(rtwdev, "failed to alloc irq vectors, ret %d\n", ret); -+ goto err; -+ } -+ -+ ret = devm_request_threaded_irq(rtwdev->dev, pdev->irq, -+ rtw89_pci_interrupt_handler, -+ rtw89_pci_interrupt_threadfn, -+ IRQF_SHARED, KBUILD_MODNAME, rtwdev); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to request threaded irq\n"); -+ goto err_free_vector; -+ } -+ -+ rtw89_pci_default_intr_mask(rtwdev); -+ -+ return 0; -+ -+err_free_vector: -+ pci_free_irq_vectors(pdev); -+err: -+ return ret; -+} -+ -+static void rtw89_pci_free_irq(struct rtw89_dev *rtwdev, -+ struct pci_dev *pdev) -+{ -+ devm_free_irq(rtwdev->dev, pdev->irq, rtwdev); -+ pci_free_irq_vectors(pdev); -+} -+ -+static void rtw89_pci_clkreq_set(struct rtw89_dev *rtwdev, bool enable) -+{ -+ int ret; -+ -+ if (rtw89_pci_disable_clkreq) -+ return; -+ -+ ret = rtw89_dbi_write8(rtwdev, RTW89_PCIE_CLK_CTRL, -+ PCIE_CLKDLY_HW_30US); -+ if (ret) -+ rtw89_err(rtwdev, "failed to set CLKREQ Delay\n"); -+ -+ if (enable) -+ ret = rtw89_dbi_write8_set(rtwdev, RTW89_PCIE_L1_CTRL, -+ RTW89_PCIE_BIT_CLK); -+ else -+ ret = rtw89_dbi_write8_clr(rtwdev, RTW89_PCIE_L1_CTRL, -+ RTW89_PCIE_BIT_CLK); -+ if (ret) -+ rtw89_err(rtwdev, "failed to %s CLKREQ_L1, ret=%d", -+ enable ? "set" : "unset", ret); -+} -+ -+static void rtw89_pci_aspm_set(struct rtw89_dev *rtwdev, bool enable) -+{ -+ u8 value = 0; -+ int ret; -+ -+ if (rtw89_pci_disable_aspm_l1) -+ return; -+ -+ ret = rtw89_dbi_read8(rtwdev, RTW89_PCIE_ASPM_CTRL, &value); -+ if (ret) -+ rtw89_err(rtwdev, "failed to read ASPM Delay\n"); -+ -+ value &= ~(RTW89_L1DLY_MASK | RTW89_L0DLY_MASK); -+ value |= FIELD_PREP(RTW89_L1DLY_MASK, PCIE_L1DLY_16US) | -+ FIELD_PREP(RTW89_L0DLY_MASK, PCIE_L0SDLY_4US); -+ -+ ret = rtw89_dbi_write8(rtwdev, RTW89_PCIE_ASPM_CTRL, value); -+ if (ret) -+ rtw89_err(rtwdev, "failed to read ASPM Delay\n"); -+ -+ if (enable) -+ ret = rtw89_dbi_write8_set(rtwdev, RTW89_PCIE_L1_CTRL, -+ RTW89_PCIE_BIT_L1); -+ else -+ ret = rtw89_dbi_write8_clr(rtwdev, RTW89_PCIE_L1_CTRL, -+ RTW89_PCIE_BIT_L1); -+ if (ret) -+ rtw89_err(rtwdev, "failed to %s ASPM L1, ret=%d", -+ enable ? "set" : "unset", ret); -+} -+ -+static void rtw89_pci_recalc_int_mit(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_traffic_stats *stats = &rtwdev->stats; -+ enum rtw89_tfc_lv tx_tfc_lv = stats->tx_tfc_lv; -+ enum rtw89_tfc_lv rx_tfc_lv = stats->rx_tfc_lv; -+ u32 val = 0; -+ -+ if (!rtwdev->scanning && -+ (tx_tfc_lv >= RTW89_TFC_HIGH || rx_tfc_lv >= RTW89_TFC_HIGH)) -+ val = B_AX_RXMIT_RXP2_SEL | B_AX_RXMIT_RXP1_SEL | -+ FIELD_PREP(B_AX_RXCOUNTER_MATCH_MASK, RTW89_PCI_RXBD_NUM_MAX / 2) | -+ FIELD_PREP(B_AX_RXTIMER_UNIT_MASK, AX_RXTIMER_UNIT_64US) | -+ FIELD_PREP(B_AX_RXTIMER_MATCH_MASK, 2048 / 64); -+ -+ rtw89_write32(rtwdev, R_AX_INT_MIT_RX, val); -+} -+ -+static void rtw89_pci_link_cfg(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; -+ struct pci_dev *pdev = rtwpci->pdev; -+ u16 link_ctrl; -+ int ret; -+ -+ /* Though there is standard PCIE configuration space to set the -+ * link control register, but by Realtek's design, driver should -+ * check if host supports CLKREQ/ASPM to enable the HW module. -+ * -+ * These functions are implemented by two HW modules associated, -+ * one is responsible to access PCIE configuration space to -+ * follow the host settings, and another is in charge of doing -+ * CLKREQ/ASPM mechanisms, it is default disabled. Because sometimes -+ * the host does not support it, and due to some reasons or wrong -+ * settings (ex. CLKREQ# not Bi-Direction), it could lead to device -+ * loss if HW misbehaves on the link. -+ * -+ * Hence it's designed that driver should first check the PCIE -+ * configuration space is sync'ed and enabled, then driver can turn -+ * on the other module that is actually working on the mechanism. -+ */ -+ ret = pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &link_ctrl); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to read PCI cap, ret=%d\n", ret); -+ return; -+ } -+ -+ if (link_ctrl & PCI_EXP_LNKCTL_CLKREQ_EN) -+ rtw89_pci_clkreq_set(rtwdev, true); -+ -+ if (link_ctrl & PCI_EXP_LNKCTL_ASPM_L1) -+ rtw89_pci_aspm_set(rtwdev, true); -+} -+ -+static void rtw89_pci_l1ss_set(struct rtw89_dev *rtwdev, bool enable) -+{ -+ int ret; -+ -+ if (enable) -+ ret = rtw89_dbi_write8_set(rtwdev, RTW89_PCIE_TIMER_CTRL, -+ RTW89_PCIE_BIT_L1SUB); -+ else -+ ret = rtw89_dbi_write8_clr(rtwdev, RTW89_PCIE_TIMER_CTRL, -+ RTW89_PCIE_BIT_L1SUB); -+ if (ret) -+ rtw89_err(rtwdev, "failed to %s L1SS, ret=%d", -+ enable ? "set" : "unset", ret); -+} -+ -+static void rtw89_pci_l1ss_cfg(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; -+ struct pci_dev *pdev = rtwpci->pdev; -+ u32 l1ss_cap_ptr, l1ss_ctrl; -+ -+ if (rtw89_pci_disable_l1ss) -+ return; -+ -+ l1ss_cap_ptr = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_L1SS); -+ if (!l1ss_cap_ptr) -+ return; -+ -+ pci_read_config_dword(pdev, l1ss_cap_ptr + PCI_L1SS_CTL1, &l1ss_ctrl); -+ -+ if (l1ss_ctrl & PCI_L1SS_CTL1_L1SS_MASK) -+ rtw89_pci_l1ss_set(rtwdev, true); -+} -+ -+static void rtw89_pci_ctrl_dma_all_pcie(struct rtw89_dev *rtwdev, u8 en) -+{ -+ u32 val32; -+ -+ if (en == MAC_AX_FUNC_EN) { -+ val32 = B_AX_STOP_PCIEIO; -+ rtw89_write32_clr(rtwdev, R_AX_PCIE_DMA_STOP1, val32); -+ -+ val32 = B_AX_TXHCI_EN | B_AX_RXHCI_EN; -+ rtw89_write32_set(rtwdev, R_AX_PCIE_INIT_CFG1, val32); -+ } else { -+ val32 = B_AX_STOP_PCIEIO; -+ rtw89_write32_set(rtwdev, R_AX_PCIE_DMA_STOP1, val32); -+ -+ val32 = B_AX_TXHCI_EN | B_AX_RXHCI_EN; -+ rtw89_write32_clr(rtwdev, R_AX_PCIE_INIT_CFG1, val32); -+ } -+} -+ -+static int rtw89_pci_poll_io_idle(struct rtw89_dev *rtwdev) -+{ -+ int ret = 0; -+ u32 sts; -+ u32 busy = B_AX_PCIEIO_BUSY | B_AX_PCIEIO_TX_BUSY | B_AX_PCIEIO_RX_BUSY; -+ -+ ret = read_poll_timeout_atomic(rtw89_read32, sts, (sts & busy) == 0x0, -+ 10, 1000, false, rtwdev, -+ R_AX_PCIE_DMA_BUSY1); -+ if (ret) { -+ rtw89_err(rtwdev, "pci dmach busy1 0x%X\n", -+ rtw89_read32(rtwdev, R_AX_PCIE_DMA_BUSY1)); -+ return -EINVAL; -+ } -+ return ret; -+} -+ -+static int rtw89_pci_lv1rst_stop_dma(struct rtw89_dev *rtwdev) -+{ -+ u32 val, dma_rst = 0; -+ int ret; -+ -+ rtw89_pci_ctrl_dma_all_pcie(rtwdev, MAC_AX_FUNC_DIS); -+ ret = rtw89_pci_poll_io_idle(rtwdev); -+ if (ret) { -+ val = rtw89_read32(rtwdev, R_AX_DBG_ERR_FLAG); -+ rtw89_debug(rtwdev, RTW89_DBG_HCI, -+ "[PCIe] poll_io_idle fail, before 0x%08x: 0x%08x\n", -+ R_AX_DBG_ERR_FLAG, val); -+ if (val & B_AX_TX_STUCK || val & B_AX_PCIE_TXBD_LEN0) -+ dma_rst |= B_AX_HCI_TXDMA_EN; -+ if (val & B_AX_RX_STUCK) -+ dma_rst |= B_AX_HCI_RXDMA_EN; -+ val = rtw89_read32(rtwdev, R_AX_HCI_FUNC_EN); -+ rtw89_write32(rtwdev, R_AX_HCI_FUNC_EN, val & ~dma_rst); -+ rtw89_write32(rtwdev, R_AX_HCI_FUNC_EN, val | dma_rst); -+ ret = rtw89_pci_poll_io_idle(rtwdev); -+ val = rtw89_read32(rtwdev, R_AX_DBG_ERR_FLAG); -+ rtw89_debug(rtwdev, RTW89_DBG_HCI, -+ "[PCIe] poll_io_idle fail, after 0x%08x: 0x%08x\n", -+ R_AX_DBG_ERR_FLAG, val); -+ } -+ -+ return ret; -+} -+ -+static void rtw89_pci_ctrl_hci_dma_en(struct rtw89_dev *rtwdev, u8 en) -+{ -+ u32 val32; -+ -+ if (en == MAC_AX_FUNC_EN) { -+ val32 = B_AX_HCI_TXDMA_EN | B_AX_HCI_RXDMA_EN; -+ rtw89_write32_set(rtwdev, R_AX_HCI_FUNC_EN, val32); -+ } else { -+ val32 = B_AX_HCI_TXDMA_EN | B_AX_HCI_RXDMA_EN; -+ rtw89_write32_clr(rtwdev, R_AX_HCI_FUNC_EN, val32); -+ } -+} -+ -+static int rtw89_pci_rst_bdram(struct rtw89_dev *rtwdev) -+{ -+ int ret = 0; -+ u32 val32, sts; -+ -+ val32 = B_AX_RST_BDRAM; -+ rtw89_write32_set(rtwdev, R_AX_PCIE_INIT_CFG1, val32); -+ -+ ret = read_poll_timeout_atomic(rtw89_read32, sts, -+ (sts & B_AX_RST_BDRAM) == 0x0, 1, 100, -+ true, rtwdev, R_AX_PCIE_INIT_CFG1); -+ return ret; -+} -+ -+static int rtw89_pci_lv1rst_start_dma(struct rtw89_dev *rtwdev) -+{ -+ u32 ret; -+ -+ rtw89_pci_ctrl_hci_dma_en(rtwdev, MAC_AX_FUNC_DIS); -+ rtw89_pci_ctrl_hci_dma_en(rtwdev, MAC_AX_FUNC_EN); -+ rtw89_pci_clr_idx_all(rtwdev); -+ -+ ret = rtw89_pci_rst_bdram(rtwdev); -+ if (ret) -+ return ret; -+ -+ rtw89_pci_ctrl_dma_all_pcie(rtwdev, MAC_AX_FUNC_EN); -+ return ret; -+} -+ -+static int rtw89_pci_ops_mac_lv1_recovery(struct rtw89_dev *rtwdev, -+ enum rtw89_lv1_rcvy_step step) -+{ -+ int ret; -+ -+ switch (step) { -+ case RTW89_LV1_RCVY_STEP_1: -+ ret = rtw89_pci_lv1rst_stop_dma(rtwdev); -+ if (ret) -+ rtw89_err(rtwdev, "lv1 rcvy pci stop dma fail\n"); -+ -+ break; -+ -+ case RTW89_LV1_RCVY_STEP_2: -+ ret = rtw89_pci_lv1rst_start_dma(rtwdev); -+ if (ret) -+ rtw89_err(rtwdev, "lv1 rcvy pci start dma fail\n"); -+ break; -+ -+ default: -+ return -EINVAL; -+ } -+ -+ return ret; -+} -+ -+static void rtw89_pci_ops_dump_err_status(struct rtw89_dev *rtwdev) -+{ -+ rtw89_info(rtwdev, "R_AX_RPQ_RXBD_IDX =0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_RPQ_RXBD_IDX)); -+ rtw89_info(rtwdev, "R_AX_DBG_ERR_FLAG=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_DBG_ERR_FLAG)); -+ rtw89_info(rtwdev, "R_AX_LBC_WATCHDOG=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_LBC_WATCHDOG)); -+} -+ -+static int rtw89_pci_napi_poll(struct napi_struct *napi, int budget) -+{ -+ struct rtw89_dev *rtwdev = container_of(napi, struct rtw89_dev, napi); -+ struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; -+ unsigned long flags; -+ int work_done; -+ -+ rtwdev->napi_budget_countdown = budget; -+ -+ rtw89_pci_clear_isr0(rtwdev, B_AX_RPQDMA_INT | B_AX_RPQBD_FULL_INT); -+ work_done = rtw89_pci_poll_rpq_dma(rtwdev, rtwpci, rtwdev->napi_budget_countdown); -+ if (work_done == budget) -+ return budget; -+ -+ rtw89_pci_clear_isr0(rtwdev, B_AX_RXP1DMA_INT | B_AX_RXDMA_INT | B_AX_RDU_INT); -+ work_done += rtw89_pci_poll_rxq_dma(rtwdev, rtwpci, rtwdev->napi_budget_countdown); -+ if (work_done < budget && napi_complete_done(napi, work_done)) { -+ spin_lock_irqsave(&rtwpci->irq_lock, flags); -+ if (likely(rtwpci->running)) -+ rtw89_pci_enable_intr(rtwdev, rtwpci); -+ spin_unlock_irqrestore(&rtwpci->irq_lock, flags); -+ } -+ -+ return work_done; -+} -+ -+static int __maybe_unused rtw89_pci_suspend(struct device *dev) -+{ -+ struct ieee80211_hw *hw = dev_get_drvdata(dev); -+ struct rtw89_dev *rtwdev = hw->priv; -+ -+ rtw89_write32_clr(rtwdev, R_AX_SYS_SDIO_CTRL, -+ B_AX_PCIE_DIS_L2_CTRL_LDO_HCI); -+ rtw89_write32_set(rtwdev, R_AX_RSV_CTRL, B_AX_WLOCK_1C_BIT6); -+ rtw89_write32_set(rtwdev, R_AX_RSV_CTRL, B_AX_R_DIS_PRST); -+ rtw89_write32_clr(rtwdev, R_AX_RSV_CTRL, B_AX_WLOCK_1C_BIT6); -+ rtw89_write32_set(rtwdev, R_AX_PCIE_INIT_CFG1, -+ B_AX_PCIE_PERST_KEEP_REG | B_AX_PCIE_TRAIN_KEEP_REG); -+ -+ return 0; -+} -+ -+static void rtw89_pci_l2_hci_ldo(struct rtw89_dev *rtwdev) -+{ -+ if (rtwdev->chip->chip_id == RTL8852C) -+ return; -+ -+ /* Hardware need write the reg twice to ensure the setting work */ -+ rtw89_dbi_write8_set(rtwdev, RTW89_PCIE_RST_MSTATE, -+ RTW89_PCIE_BIT_CFG_RST_MSTATE); -+ rtw89_dbi_write8_set(rtwdev, RTW89_PCIE_RST_MSTATE, -+ RTW89_PCIE_BIT_CFG_RST_MSTATE); -+} -+ -+static int __maybe_unused rtw89_pci_resume(struct device *dev) -+{ -+ struct ieee80211_hw *hw = dev_get_drvdata(dev); -+ struct rtw89_dev *rtwdev = hw->priv; -+ -+ rtw89_write32_set(rtwdev, R_AX_SYS_SDIO_CTRL, -+ B_AX_PCIE_DIS_L2_CTRL_LDO_HCI); -+ rtw89_write32_set(rtwdev, R_AX_RSV_CTRL, B_AX_WLOCK_1C_BIT6); -+ rtw89_write32_clr(rtwdev, R_AX_RSV_CTRL, B_AX_R_DIS_PRST); -+ rtw89_write32_clr(rtwdev, R_AX_RSV_CTRL, B_AX_WLOCK_1C_BIT6); -+ rtw89_write32_clr(rtwdev, R_AX_PCIE_INIT_CFG1, -+ B_AX_PCIE_PERST_KEEP_REG | B_AX_PCIE_TRAIN_KEEP_REG); -+ rtw89_pci_l2_hci_ldo(rtwdev); -+ rtw89_pci_link_cfg(rtwdev); -+ rtw89_pci_l1ss_cfg(rtwdev); -+ -+ return 0; -+} -+ -+SIMPLE_DEV_PM_OPS(rtw89_pm_ops, rtw89_pci_suspend, rtw89_pci_resume); -+EXPORT_SYMBOL(rtw89_pm_ops); -+ -+static const struct rtw89_hci_ops rtw89_pci_ops = { -+ .tx_write = rtw89_pci_ops_tx_write, -+ .tx_kick_off = rtw89_pci_ops_tx_kick_off, -+ .flush_queues = rtw89_pci_ops_flush_queues, -+ .reset = rtw89_pci_ops_reset, -+ .start = rtw89_pci_ops_start, -+ .stop = rtw89_pci_ops_stop, -+ .recalc_int_mit = rtw89_pci_recalc_int_mit, -+ -+ .read8 = rtw89_pci_ops_read8, -+ .read16 = rtw89_pci_ops_read16, -+ .read32 = rtw89_pci_ops_read32, -+ .write8 = rtw89_pci_ops_write8, -+ .write16 = rtw89_pci_ops_write16, -+ .write32 = rtw89_pci_ops_write32, -+ -+ .mac_pre_init = rtw89_pci_ops_mac_pre_init, -+ .mac_post_init = rtw89_pci_ops_mac_post_init, -+ .deinit = rtw89_pci_ops_deinit, -+ -+ .check_and_reclaim_tx_resource = rtw89_pci_check_and_reclaim_tx_resource, -+ .mac_lv1_rcvy = rtw89_pci_ops_mac_lv1_recovery, -+ .dump_err_status = rtw89_pci_ops_dump_err_status, -+ .napi_poll = rtw89_pci_napi_poll, -+}; -+ -+static int rtw89_pci_probe(struct pci_dev *pdev, -+ const struct pci_device_id *id) -+{ -+ struct ieee80211_hw *hw; -+ struct rtw89_dev *rtwdev; -+ int driver_data_size; -+ int ret; -+ -+ driver_data_size = sizeof(struct rtw89_dev) + sizeof(struct rtw89_pci); -+ hw = ieee80211_alloc_hw(driver_data_size, &rtw89_ops); -+ if (!hw) { -+ dev_err(&pdev->dev, "failed to allocate hw\n"); -+ return -ENOMEM; -+ } -+ -+ rtwdev = hw->priv; -+ rtwdev->hw = hw; -+ rtwdev->dev = &pdev->dev; -+ rtwdev->hci.ops = &rtw89_pci_ops; -+ rtwdev->hci.type = RTW89_HCI_TYPE_PCIE; -+ rtwdev->hci.rpwm_addr = R_AX_PCIE_HRPWM; -+ rtwdev->hci.cpwm_addr = R_AX_CPWM; -+ -+ SET_IEEE80211_DEV(rtwdev->hw, &pdev->dev); -+ -+ switch (id->driver_data) { -+ case RTL8852A: -+ rtwdev->chip = &rtw8852a_chip_info; -+ break; -+ default: -+ return -ENOENT; -+ } -+ -+ ret = rtw89_core_init(rtwdev); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to initialise core\n"); -+ goto err_release_hw; -+ } -+ -+ ret = rtw89_pci_claim_device(rtwdev, pdev); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to claim pci device\n"); -+ goto err_core_deinit; -+ } -+ -+ ret = rtw89_pci_setup_resource(rtwdev, pdev); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to setup pci resource\n"); -+ goto err_declaim_pci; -+ } -+ -+ ret = rtw89_chip_info_setup(rtwdev); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to setup chip information\n"); -+ goto err_clear_resource; -+ } -+ -+ rtw89_pci_link_cfg(rtwdev); -+ rtw89_pci_l1ss_cfg(rtwdev); -+ -+ ret = rtw89_core_register(rtwdev); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to register core\n"); -+ goto err_clear_resource; -+ } -+ -+ rtw89_core_napi_init(rtwdev); -+ -+ ret = rtw89_pci_request_irq(rtwdev, pdev); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to request pci irq\n"); -+ goto err_unregister; -+ } -+ -+ return 0; -+ -+err_unregister: -+ rtw89_core_napi_deinit(rtwdev); -+ rtw89_core_unregister(rtwdev); -+err_clear_resource: -+ rtw89_pci_clear_resource(rtwdev, pdev); -+err_declaim_pci: -+ rtw89_pci_declaim_device(rtwdev, pdev); -+err_core_deinit: -+ rtw89_core_deinit(rtwdev); -+err_release_hw: -+ ieee80211_free_hw(hw); -+ -+ return ret; -+} -+ -+static void rtw89_pci_remove(struct pci_dev *pdev) -+{ -+ struct ieee80211_hw *hw = pci_get_drvdata(pdev); -+ struct rtw89_dev *rtwdev; -+ -+ rtwdev = hw->priv; -+ -+ rtw89_pci_free_irq(rtwdev, pdev); -+ rtw89_core_napi_deinit(rtwdev); -+ rtw89_core_unregister(rtwdev); -+ rtw89_pci_clear_resource(rtwdev, pdev); -+ rtw89_pci_declaim_device(rtwdev, pdev); -+ rtw89_core_deinit(rtwdev); -+ ieee80211_free_hw(hw); -+} -+ -+static const struct pci_device_id rtw89_pci_id_table[] = { -+ { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8852), .driver_data = RTL8852A }, -+ { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0xa85a), .driver_data = RTL8852A }, -+ {}, -+}; -+MODULE_DEVICE_TABLE(pci, rtw89_pci_id_table); -+ -+static struct pci_driver rtw89_pci_driver = { -+ .name = "rtw89_pci", -+ .id_table = rtw89_pci_id_table, -+ .probe = rtw89_pci_probe, -+ .remove = rtw89_pci_remove, -+ .driver.pm = &rtw89_pm_ops, -+}; -+module_pci_driver(rtw89_pci_driver); -+ -+MODULE_AUTHOR("Realtek Corporation"); -+MODULE_DESCRIPTION("Realtek 802.11ax wireless PCI driver"); -+MODULE_LICENSE("Dual BSD/GPL"); -diff --git a/drivers/net/wireless/realtek/rtw89/pci.h b/drivers/net/wireless/realtek/rtw89/pci.h -new file mode 100644 -index 000000000000..34333c441aea ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/pci.h -@@ -0,0 +1,635 @@ -+/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ -+/* Copyright(c) 2020 Realtek Corporation -+ */ -+ -+#ifndef __RTW89_PCI_H__ -+#define __RTW89_PCI_H__ -+ -+#include "txrx.h" -+ -+#define MDIO_PG0_G1 0 -+#define MDIO_PG1_G1 1 -+#define MDIO_PG0_G2 2 -+#define MDIO_PG1_G2 3 -+#define RAC_ANA10 0x10 -+#define RAC_ANA19 0x19 -+#define RAC_ANA1F 0x1F -+#define RAC_ANA24 0x24 -+#define B_AX_DEGLITCH GENMASK(11, 8) -+#define RAC_ANA26 0x26 -+#define B_AX_RXEN GENMASK(15, 14) -+#define RAC_CTRL_PPR_V1 0x30 -+#define B_AX_CLK_CALIB_EN BIT(12) -+#define B_AX_CALIB_EN BIT(13) -+#define B_AX_DIV GENMASK(15, 14) -+#define RAC_SET_PPR_V1 0x31 -+ -+#define R_AX_DBI_FLAG 0x1090 -+#define B_AX_DBI_RFLAG BIT(17) -+#define B_AX_DBI_WFLAG BIT(16) -+#define B_AX_DBI_WREN_MSK GENMASK(15, 12) -+#define B_AX_DBI_ADDR_MSK GENMASK(11, 2) -+#define R_AX_DBI_WDATA 0x1094 -+#define R_AX_DBI_RDATA 0x1098 -+ -+#define R_AX_MDIO_WDATA 0x10A4 -+#define R_AX_MDIO_RDATA 0x10A6 -+ -+#define RTW89_PCI_WR_RETRY_CNT 20 -+ -+/* Interrupts */ -+#define R_AX_HIMR0 0x01A0 -+#define B_AX_HALT_C2H_INT_EN BIT(21) -+#define R_AX_HISR0 0x01A4 -+ -+#define R_AX_MDIO_CFG 0x10A0 -+#define B_AX_MDIO_PHY_ADDR_MASK GENMASK(13, 12) -+#define B_AX_MDIO_RFLAG BIT(9) -+#define B_AX_MDIO_WFLAG BIT(8) -+#define B_AX_MDIO_ADDR_MASK GENMASK(4, 0) -+ -+#define R_AX_PCIE_HIMR00 0x10B0 -+#define B_AX_HC00ISR_IND_INT_EN BIT(27) -+#define B_AX_HD1ISR_IND_INT_EN BIT(26) -+#define B_AX_HD0ISR_IND_INT_EN BIT(25) -+#define B_AX_HS0ISR_IND_INT_EN BIT(24) -+#define B_AX_RETRAIN_INT_EN BIT(21) -+#define B_AX_RPQBD_FULL_INT_EN BIT(20) -+#define B_AX_RDU_INT_EN BIT(19) -+#define B_AX_RXDMA_STUCK_INT_EN BIT(18) -+#define B_AX_TXDMA_STUCK_INT_EN BIT(17) -+#define B_AX_PCIE_HOTRST_INT_EN BIT(16) -+#define B_AX_PCIE_FLR_INT_EN BIT(15) -+#define B_AX_PCIE_PERST_INT_EN BIT(14) -+#define B_AX_TXDMA_CH12_INT_EN BIT(13) -+#define B_AX_TXDMA_CH9_INT_EN BIT(12) -+#define B_AX_TXDMA_CH8_INT_EN BIT(11) -+#define B_AX_TXDMA_ACH7_INT_EN BIT(10) -+#define B_AX_TXDMA_ACH6_INT_EN BIT(9) -+#define B_AX_TXDMA_ACH5_INT_EN BIT(8) -+#define B_AX_TXDMA_ACH4_INT_EN BIT(7) -+#define B_AX_TXDMA_ACH3_INT_EN BIT(6) -+#define B_AX_TXDMA_ACH2_INT_EN BIT(5) -+#define B_AX_TXDMA_ACH1_INT_EN BIT(4) -+#define B_AX_TXDMA_ACH0_INT_EN BIT(3) -+#define B_AX_RPQDMA_INT_EN BIT(2) -+#define B_AX_RXP1DMA_INT_EN BIT(1) -+#define B_AX_RXDMA_INT_EN BIT(0) -+ -+#define R_AX_PCIE_HISR00 0x10B4 -+#define B_AX_HC00ISR_IND_INT BIT(27) -+#define B_AX_HD1ISR_IND_INT BIT(26) -+#define B_AX_HD0ISR_IND_INT BIT(25) -+#define B_AX_HS0ISR_IND_INT BIT(24) -+#define B_AX_RETRAIN_INT BIT(21) -+#define B_AX_RPQBD_FULL_INT BIT(20) -+#define B_AX_RDU_INT BIT(19) -+#define B_AX_RXDMA_STUCK_INT BIT(18) -+#define B_AX_TXDMA_STUCK_INT BIT(17) -+#define B_AX_PCIE_HOTRST_INT BIT(16) -+#define B_AX_PCIE_FLR_INT BIT(15) -+#define B_AX_PCIE_PERST_INT BIT(14) -+#define B_AX_TXDMA_CH12_INT BIT(13) -+#define B_AX_TXDMA_CH9_INT BIT(12) -+#define B_AX_TXDMA_CH8_INT BIT(11) -+#define B_AX_TXDMA_ACH7_INT BIT(10) -+#define B_AX_TXDMA_ACH6_INT BIT(9) -+#define B_AX_TXDMA_ACH5_INT BIT(8) -+#define B_AX_TXDMA_ACH4_INT BIT(7) -+#define B_AX_TXDMA_ACH3_INT BIT(6) -+#define B_AX_TXDMA_ACH2_INT BIT(5) -+#define B_AX_TXDMA_ACH1_INT BIT(4) -+#define B_AX_TXDMA_ACH0_INT BIT(3) -+#define B_AX_RPQDMA_INT BIT(2) -+#define B_AX_RXP1DMA_INT BIT(1) -+#define B_AX_RXDMA_INT BIT(0) -+ -+#define R_AX_PCIE_HIMR10 0x13B0 -+#define B_AX_HC10ISR_IND_INT_EN BIT(28) -+#define B_AX_TXDMA_CH11_INT_EN BIT(12) -+#define B_AX_TXDMA_CH10_INT_EN BIT(11) -+ -+#define R_AX_PCIE_HISR10 0x13B4 -+#define B_AX_HC10ISR_IND_INT BIT(28) -+#define B_AX_TXDMA_CH11_INT BIT(12) -+#define B_AX_TXDMA_CH10_INT BIT(11) -+ -+/* TX/RX */ -+#define R_AX_RXQ_RXBD_IDX 0x1050 -+#define R_AX_RPQ_RXBD_IDX 0x1054 -+#define R_AX_ACH0_TXBD_IDX 0x1058 -+#define R_AX_ACH1_TXBD_IDX 0x105C -+#define R_AX_ACH2_TXBD_IDX 0x1060 -+#define R_AX_ACH3_TXBD_IDX 0x1064 -+#define R_AX_ACH4_TXBD_IDX 0x1068 -+#define R_AX_ACH5_TXBD_IDX 0x106C -+#define R_AX_ACH6_TXBD_IDX 0x1070 -+#define R_AX_ACH7_TXBD_IDX 0x1074 -+#define R_AX_CH8_TXBD_IDX 0x1078 /* Management Queue band 0 */ -+#define R_AX_CH9_TXBD_IDX 0x107C /* HI Queue band 0 */ -+#define R_AX_CH10_TXBD_IDX 0x137C /* Management Queue band 1 */ -+#define R_AX_CH11_TXBD_IDX 0x1380 /* HI Queue band 1 */ -+#define R_AX_CH12_TXBD_IDX 0x1080 /* FWCMD Queue */ -+#define TXBD_HW_IDX_MASK GENMASK(27, 16) -+#define TXBD_HOST_IDX_MASK GENMASK(11, 0) -+ -+#define R_AX_ACH0_TXBD_DESA_L 0x1110 -+#define R_AX_ACH0_TXBD_DESA_H 0x1114 -+#define R_AX_ACH1_TXBD_DESA_L 0x1118 -+#define R_AX_ACH1_TXBD_DESA_H 0x111C -+#define R_AX_ACH2_TXBD_DESA_L 0x1120 -+#define R_AX_ACH2_TXBD_DESA_H 0x1124 -+#define R_AX_ACH3_TXBD_DESA_L 0x1128 -+#define R_AX_ACH3_TXBD_DESA_H 0x112C -+#define R_AX_ACH4_TXBD_DESA_L 0x1130 -+#define R_AX_ACH4_TXBD_DESA_H 0x1134 -+#define R_AX_ACH5_TXBD_DESA_L 0x1138 -+#define R_AX_ACH5_TXBD_DESA_H 0x113C -+#define R_AX_ACH6_TXBD_DESA_L 0x1140 -+#define R_AX_ACH6_TXBD_DESA_H 0x1144 -+#define R_AX_ACH7_TXBD_DESA_L 0x1148 -+#define R_AX_ACH7_TXBD_DESA_H 0x114C -+#define R_AX_CH8_TXBD_DESA_L 0x1150 -+#define R_AX_CH8_TXBD_DESA_H 0x1154 -+#define R_AX_CH9_TXBD_DESA_L 0x1158 -+#define R_AX_CH9_TXBD_DESA_H 0x115C -+#define R_AX_CH10_TXBD_DESA_L 0x1358 -+#define R_AX_CH10_TXBD_DESA_H 0x135C -+#define R_AX_CH11_TXBD_DESA_L 0x1360 -+#define R_AX_CH11_TXBD_DESA_H 0x1364 -+#define R_AX_CH12_TXBD_DESA_L 0x1160 -+#define R_AX_CH12_TXBD_DESA_H 0x1164 -+#define R_AX_RXQ_RXBD_DESA_L 0x1100 -+#define R_AX_RXQ_RXBD_DESA_H 0x1104 -+#define R_AX_RPQ_RXBD_DESA_L 0x1108 -+#define R_AX_RPQ_RXBD_DESA_H 0x110C -+#define B_AX_DESC_NUM_MSK GENMASK(11, 0) -+ -+#define R_AX_RXQ_RXBD_NUM 0x1020 -+#define R_AX_RPQ_RXBD_NUM 0x1022 -+#define R_AX_ACH0_TXBD_NUM 0x1024 -+#define R_AX_ACH1_TXBD_NUM 0x1026 -+#define R_AX_ACH2_TXBD_NUM 0x1028 -+#define R_AX_ACH3_TXBD_NUM 0x102A -+#define R_AX_ACH4_TXBD_NUM 0x102C -+#define R_AX_ACH5_TXBD_NUM 0x102E -+#define R_AX_ACH6_TXBD_NUM 0x1030 -+#define R_AX_ACH7_TXBD_NUM 0x1032 -+#define R_AX_CH8_TXBD_NUM 0x1034 -+#define R_AX_CH9_TXBD_NUM 0x1036 -+#define R_AX_CH10_TXBD_NUM 0x1338 -+#define R_AX_CH11_TXBD_NUM 0x133A -+#define R_AX_CH12_TXBD_NUM 0x1038 -+ -+#define R_AX_ACH0_BDRAM_CTRL 0x1200 -+#define R_AX_ACH1_BDRAM_CTRL 0x1204 -+#define R_AX_ACH2_BDRAM_CTRL 0x1208 -+#define R_AX_ACH3_BDRAM_CTRL 0x120C -+#define R_AX_ACH4_BDRAM_CTRL 0x1210 -+#define R_AX_ACH5_BDRAM_CTRL 0x1214 -+#define R_AX_ACH6_BDRAM_CTRL 0x1218 -+#define R_AX_ACH7_BDRAM_CTRL 0x121C -+#define R_AX_CH8_BDRAM_CTRL 0x1220 -+#define R_AX_CH9_BDRAM_CTRL 0x1224 -+#define R_AX_CH10_BDRAM_CTRL 0x1320 -+#define R_AX_CH11_BDRAM_CTRL 0x1324 -+#define R_AX_CH12_BDRAM_CTRL 0x1228 -+#define BDRAM_SIDX_MASK GENMASK(7, 0) -+#define BDRAM_MAX_MASK GENMASK(15, 8) -+#define BDRAM_MIN_MASK GENMASK(23, 16) -+ -+#define R_AX_PCIE_INIT_CFG1 0x1000 -+#define B_AX_PCIE_RXRST_KEEP_REG BIT(23) -+#define B_AX_PCIE_TXRST_KEEP_REG BIT(22) -+#define B_AX_PCIE_PERST_KEEP_REG BIT(21) -+#define B_AX_PCIE_FLR_KEEP_REG BIT(20) -+#define B_AX_PCIE_TRAIN_KEEP_REG BIT(19) -+#define B_AX_RXBD_MODE BIT(18) -+#define B_AX_PCIE_MAX_RXDMA_MASK GENMASK(16, 14) -+#define B_AX_RXHCI_EN BIT(13) -+#define B_AX_LATENCY_CONTROL BIT(12) -+#define B_AX_TXHCI_EN BIT(11) -+#define B_AX_PCIE_MAX_TXDMA_MASK GENMASK(10, 8) -+#define B_AX_TX_TRUNC_MODE BIT(5) -+#define B_AX_RX_TRUNC_MODE BIT(4) -+#define B_AX_RST_BDRAM BIT(3) -+#define B_AX_DIS_RXDMA_PRE BIT(2) -+ -+#define R_AX_TXDMA_ADDR_H 0x10F0 -+#define R_AX_RXDMA_ADDR_H 0x10F4 -+ -+#define R_AX_PCIE_DMA_STOP1 0x1010 -+#define B_AX_STOP_PCIEIO BIT(20) -+#define B_AX_STOP_WPDMA BIT(19) -+#define B_AX_STOP_CH12 BIT(18) -+#define B_AX_STOP_CH9 BIT(17) -+#define B_AX_STOP_CH8 BIT(16) -+#define B_AX_STOP_ACH7 BIT(15) -+#define B_AX_STOP_ACH6 BIT(14) -+#define B_AX_STOP_ACH5 BIT(13) -+#define B_AX_STOP_ACH4 BIT(12) -+#define B_AX_STOP_ACH3 BIT(11) -+#define B_AX_STOP_ACH2 BIT(10) -+#define B_AX_STOP_ACH1 BIT(9) -+#define B_AX_STOP_ACH0 BIT(8) -+#define B_AX_STOP_RPQ BIT(1) -+#define B_AX_STOP_RXQ BIT(0) -+#define B_AX_TX_STOP1_ALL GENMASK(18, 8) -+ -+#define R_AX_PCIE_DMA_STOP2 0x1310 -+#define B_AX_STOP_CH11 BIT(1) -+#define B_AX_STOP_CH10 BIT(0) -+#define B_AX_TX_STOP2_ALL GENMASK(1, 0) -+ -+#define R_AX_TXBD_RWPTR_CLR1 0x1014 -+#define B_AX_CLR_CH12_IDX BIT(10) -+#define B_AX_CLR_CH9_IDX BIT(9) -+#define B_AX_CLR_CH8_IDX BIT(8) -+#define B_AX_CLR_ACH7_IDX BIT(7) -+#define B_AX_CLR_ACH6_IDX BIT(6) -+#define B_AX_CLR_ACH5_IDX BIT(5) -+#define B_AX_CLR_ACH4_IDX BIT(4) -+#define B_AX_CLR_ACH3_IDX BIT(3) -+#define B_AX_CLR_ACH2_IDX BIT(2) -+#define B_AX_CLR_ACH1_IDX BIT(1) -+#define B_AX_CLR_ACH0_IDX BIT(0) -+#define B_AX_TXBD_CLR1_ALL GENMASK(10, 0) -+ -+#define R_AX_RXBD_RWPTR_CLR 0x1018 -+#define B_AX_CLR_RPQ_IDX BIT(1) -+#define B_AX_CLR_RXQ_IDX BIT(0) -+#define B_AX_RXBD_CLR_ALL GENMASK(1, 0) -+ -+#define R_AX_TXBD_RWPTR_CLR2 0x1314 -+#define B_AX_CLR_CH11_IDX BIT(1) -+#define B_AX_CLR_CH10_IDX BIT(0) -+#define B_AX_TXBD_CLR2_ALL GENMASK(1, 0) -+ -+#define R_AX_PCIE_DMA_BUSY1 0x101C -+#define B_AX_PCIEIO_RX_BUSY BIT(22) -+#define B_AX_PCIEIO_TX_BUSY BIT(21) -+#define B_AX_PCIEIO_BUSY BIT(20) -+#define B_AX_WPDMA_BUSY BIT(19) -+ -+#define R_AX_PCIE_DMA_BUSY2 0x131C -+#define B_AX_CH11_BUSY BIT(1) -+#define B_AX_CH10_BUSY BIT(0) -+ -+/* Configure */ -+#define R_AX_PCIE_INIT_CFG1 0x1000 -+#define B_AX_PCIE_RXRST_KEEP_REG BIT(23) -+#define B_AX_PCIE_TXRST_KEEP_REG BIT(22) -+#define B_AX_DIS_RXDMA_PRE BIT(2) -+ -+#define R_AX_PCIE_INIT_CFG2 0x1004 -+#define B_AX_WD_ITVL_IDLE GENMASK(27, 24) -+#define B_AX_WD_ITVL_ACT GENMASK(19, 16) -+ -+#define R_AX_PCIE_PS_CTRL 0x1008 -+#define B_AX_L1OFF_PWR_OFF_EN BIT(5) -+ -+#define R_AX_INT_MIT_RX 0x10D4 -+#define B_AX_RXMIT_RXP2_SEL BIT(19) -+#define B_AX_RXMIT_RXP1_SEL BIT(18) -+#define B_AX_RXTIMER_UNIT_MASK GENMASK(17, 16) -+#define AX_RXTIMER_UNIT_64US 0 -+#define AX_RXTIMER_UNIT_128US 1 -+#define AX_RXTIMER_UNIT_256US 2 -+#define AX_RXTIMER_UNIT_512US 3 -+#define B_AX_RXCOUNTER_MATCH_MASK GENMASK(15, 8) -+#define B_AX_RXTIMER_MATCH_MASK GENMASK(7, 0) -+ -+#define R_AX_DBG_ERR_FLAG 0x11C4 -+#define B_AX_PCIE_RPQ_FULL BIT(29) -+#define B_AX_PCIE_RXQ_FULL BIT(28) -+#define B_AX_CPL_STATUS_MASK GENMASK(27, 25) -+#define B_AX_RX_STUCK BIT(22) -+#define B_AX_TX_STUCK BIT(21) -+#define B_AX_PCIEDBG_TXERR0 BIT(16) -+#define B_AX_PCIE_RXP1_ERR0 BIT(4) -+#define B_AX_PCIE_TXBD_LEN0 BIT(1) -+#define B_AX_PCIE_TXBD_4KBOUD_LENERR BIT(0) -+ -+#define R_AX_LBC_WATCHDOG 0x11D8 -+#define B_AX_LBC_TIMER GENMASK(7, 4) -+#define B_AX_LBC_FLAG BIT(1) -+#define B_AX_LBC_EN BIT(0) -+ -+#define R_AX_PCIE_EXP_CTRL 0x13F0 -+#define B_AX_EN_CHKDSC_NO_RX_STUCK BIT(20) -+#define B_AX_MAX_TAG_NUM GENMASK(18, 16) -+#define B_AX_SIC_EN_FORCE_CLKREQ BIT(4) -+ -+#define R_AX_PCIE_RX_PREF_ADV 0x13F4 -+#define B_AX_RXDMA_PREF_ADV_EN BIT(0) -+ -+#define RTW89_PCI_TXBD_NUM_MAX 256 -+#define RTW89_PCI_RXBD_NUM_MAX 256 -+#define RTW89_PCI_TXWD_NUM_MAX 512 -+#define RTW89_PCI_TXWD_PAGE_SIZE 128 -+#define RTW89_PCI_ADDRINFO_MAX 4 -+#define RTW89_PCI_RX_BUF_SIZE 11460 -+ -+#define RTW89_PCI_POLL_BDRAM_RST_CNT 100 -+#define RTW89_PCI_MULTITAG 8 -+ -+/* PCIE CFG register */ -+#define RTW89_PCIE_ASPM_CTRL 0x070F -+#define RTW89_L1DLY_MASK GENMASK(5, 3) -+#define RTW89_L0DLY_MASK GENMASK(2, 0) -+#define RTW89_PCIE_TIMER_CTRL 0x0718 -+#define RTW89_PCIE_BIT_L1SUB BIT(5) -+#define RTW89_PCIE_L1_CTRL 0x0719 -+#define RTW89_PCIE_BIT_CLK BIT(4) -+#define RTW89_PCIE_BIT_L1 BIT(3) -+#define RTW89_PCIE_CLK_CTRL 0x0725 -+#define RTW89_PCIE_RST_MSTATE 0x0B48 -+#define RTW89_PCIE_BIT_CFG_RST_MSTATE BIT(0) -+#define RTW89_PCIE_PHY_RATE 0x82 -+#define RTW89_PCIE_PHY_RATE_MASK GENMASK(1, 0) -+#define INTF_INTGRA_MINREF_V1 90 -+#define INTF_INTGRA_HOSTREF_V1 100 -+ -+enum rtw89_pcie_phy { -+ PCIE_PHY_GEN1, -+ PCIE_PHY_GEN2, -+ PCIE_PHY_GEN1_UNDEFINE = 0x7F, -+}; -+ -+enum mac_ax_func_sw { -+ MAC_AX_FUNC_DIS, -+ MAC_AX_FUNC_EN, -+}; -+ -+enum rtw89_pcie_l0sdly { -+ PCIE_L0SDLY_1US = 0, -+ PCIE_L0SDLY_2US = 1, -+ PCIE_L0SDLY_3US = 2, -+ PCIE_L0SDLY_4US = 3, -+ PCIE_L0SDLY_5US = 4, -+ PCIE_L0SDLY_6US = 5, -+ PCIE_L0SDLY_7US = 6, -+}; -+ -+enum rtw89_pcie_l1dly { -+ PCIE_L1DLY_16US = 4, -+ PCIE_L1DLY_32US = 5, -+ PCIE_L1DLY_64US = 6, -+ PCIE_L1DLY_HW_INFI = 7, -+}; -+ -+enum rtw89_pcie_clkdly_hw { -+ PCIE_CLKDLY_HW_0 = 0, -+ PCIE_CLKDLY_HW_30US = 0x1, -+ PCIE_CLKDLY_HW_50US = 0x2, -+ PCIE_CLKDLY_HW_100US = 0x3, -+ PCIE_CLKDLY_HW_150US = 0x4, -+ PCIE_CLKDLY_HW_200US = 0x5, -+}; -+ -+struct rtw89_pci_bd_ram { -+ u8 start_idx; -+ u8 max_num; -+ u8 min_num; -+}; -+ -+struct rtw89_pci_tx_data { -+ dma_addr_t dma; -+}; -+ -+struct rtw89_pci_rx_info { -+ dma_addr_t dma; -+ u32 fs:1, ls:1, tag:11, len:14; -+}; -+ -+#define RTW89_PCI_TXBD_OPTION_LS BIT(14) -+ -+struct rtw89_pci_tx_bd_32 { -+ __le16 length; -+ __le16 option; -+ __le32 dma; -+} __packed; -+ -+#define RTW89_PCI_TXWP_VALID BIT(15) -+ -+struct rtw89_pci_tx_wp_info { -+ __le16 seq0; -+ __le16 seq1; -+ __le16 seq2; -+ __le16 seq3; -+} __packed; -+ -+#define RTW89_PCI_ADDR_MSDU_LS BIT(15) -+#define RTW89_PCI_ADDR_LS BIT(14) -+#define RTW89_PCI_ADDR_HIGH(a) (((a) << 6) & GENMASK(13, 6)) -+#define RTW89_PCI_ADDR_NUM(x) ((x) & GENMASK(5, 0)) -+ -+struct rtw89_pci_tx_addr_info_32 { -+ __le16 length; -+ __le16 option; -+ __le32 dma; -+} __packed; -+ -+#define RTW89_PCI_RPP_POLLUTED BIT(31) -+#define RTW89_PCI_RPP_SEQ GENMASK(30, 16) -+#define RTW89_PCI_RPP_TX_STATUS GENMASK(15, 13) -+#define RTW89_TX_DONE 0x0 -+#define RTW89_TX_RETRY_LIMIT 0x1 -+#define RTW89_TX_LIFE_TIME 0x2 -+#define RTW89_TX_MACID_DROP 0x3 -+#define RTW89_PCI_RPP_QSEL GENMASK(12, 8) -+#define RTW89_PCI_RPP_MACID GENMASK(7, 0) -+ -+struct rtw89_pci_rpp_fmt { -+ __le32 dword; -+} __packed; -+ -+struct rtw89_pci_rx_bd_32 { -+ __le16 buf_size; -+ __le16 rsvd; -+ __le32 dma; -+} __packed; -+ -+#define RTW89_PCI_RXBD_FS BIT(15) -+#define RTW89_PCI_RXBD_LS BIT(14) -+#define RTW89_PCI_RXBD_WRITE_SIZE GENMASK(13, 0) -+#define RTW89_PCI_RXBD_TAG GENMASK(28, 16) -+ -+struct rtw89_pci_rxbd_info { -+ __le32 dword; -+}; -+ -+struct rtw89_pci_tx_wd { -+ struct list_head list; -+ struct sk_buff_head queue; -+ -+ void *vaddr; -+ dma_addr_t paddr; -+ u32 len; -+ u32 seq; -+}; -+ -+struct rtw89_pci_dma_ring { -+ void *head; -+ u8 desc_size; -+ dma_addr_t dma; -+ -+ u32 addr_num; -+ u32 addr_idx; -+ u32 addr_bdram; -+ u32 addr_desa_l; -+ u32 addr_desa_h; -+ -+ u32 len; -+ u32 wp; /* host idx */ -+ u32 rp; /* hw idx */ -+}; -+ -+struct rtw89_pci_tx_wd_ring { -+ void *head; -+ dma_addr_t dma; -+ -+ struct rtw89_pci_tx_wd pages[RTW89_PCI_TXWD_NUM_MAX]; -+ struct list_head free_pages; -+ -+ u32 page_size; -+ u32 page_num; -+ u32 curr_num; -+}; -+ -+#define RTW89_RX_TAG_MAX 0x1fff -+ -+struct rtw89_pci_tx_ring { -+ struct rtw89_pci_tx_wd_ring wd_ring; -+ struct rtw89_pci_dma_ring bd_ring; -+ struct list_head busy_pages; -+ u8 txch; -+ bool dma_enabled; -+ u16 tag; /* range from 0x0001 ~ 0x1fff */ -+ -+ u64 tx_cnt; -+ u64 tx_acked; -+ u64 tx_retry_lmt; -+ u64 tx_life_time; -+ u64 tx_mac_id_drop; -+}; -+ -+struct rtw89_pci_rx_ring { -+ struct rtw89_pci_dma_ring bd_ring; -+ struct sk_buff *buf[RTW89_PCI_RXBD_NUM_MAX]; -+ u32 buf_sz; -+ struct sk_buff *diliver_skb; -+ struct rtw89_rx_desc_info diliver_desc; -+}; -+ -+struct rtw89_pci_isrs { -+ u32 halt_c2h_isrs; -+ u32 isrs[2]; -+}; -+ -+struct rtw89_pci { -+ struct pci_dev *pdev; -+ -+ /* protect HW irq related registers */ -+ spinlock_t irq_lock; -+ /* protect TRX resources (exclude RXQ) */ -+ spinlock_t trx_lock; -+ bool running; -+ struct rtw89_pci_tx_ring tx_rings[RTW89_TXCH_NUM]; -+ struct rtw89_pci_rx_ring rx_rings[RTW89_RXCH_NUM]; -+ struct sk_buff_head h2c_queue; -+ struct sk_buff_head h2c_release_queue; -+ -+ u32 halt_c2h_intrs; -+ u32 intrs[2]; -+ void __iomem *mmap; -+}; -+ -+static inline struct rtw89_pci_rx_info *RTW89_PCI_RX_SKB_CB(struct sk_buff *skb) -+{ -+ struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); -+ -+ BUILD_BUG_ON(sizeof(struct rtw89_pci_tx_data) > -+ sizeof(info->status.status_driver_data)); -+ -+ return (struct rtw89_pci_rx_info *)skb->cb; -+} -+ -+static inline struct rtw89_pci_rx_bd_32 * -+RTW89_PCI_RX_BD(struct rtw89_pci_rx_ring *rx_ring, u32 idx) -+{ -+ struct rtw89_pci_dma_ring *bd_ring = &rx_ring->bd_ring; -+ u8 *head = bd_ring->head; -+ u32 desc_size = bd_ring->desc_size; -+ u32 offset = idx * desc_size; -+ -+ return (struct rtw89_pci_rx_bd_32 *)(head + offset); -+} -+ -+static inline void -+rtw89_pci_rxbd_increase(struct rtw89_pci_rx_ring *rx_ring, u32 cnt) -+{ -+ struct rtw89_pci_dma_ring *bd_ring = &rx_ring->bd_ring; -+ -+ bd_ring->wp += cnt; -+ -+ if (bd_ring->wp >= bd_ring->len) -+ bd_ring->wp -= bd_ring->len; -+} -+ -+static inline struct rtw89_pci_tx_data *RTW89_PCI_TX_SKB_CB(struct sk_buff *skb) -+{ -+ struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); -+ -+ return (struct rtw89_pci_tx_data *)info->status.status_driver_data; -+} -+ -+static inline struct rtw89_pci_tx_bd_32 * -+rtw89_pci_get_next_txbd(struct rtw89_pci_tx_ring *tx_ring) -+{ -+ struct rtw89_pci_dma_ring *bd_ring = &tx_ring->bd_ring; -+ struct rtw89_pci_tx_bd_32 *tx_bd, *head; -+ -+ head = bd_ring->head; -+ tx_bd = head + bd_ring->wp; -+ -+ return tx_bd; -+} -+ -+static inline struct rtw89_pci_tx_wd * -+rtw89_pci_dequeue_txwd(struct rtw89_pci_tx_ring *tx_ring) -+{ -+ struct rtw89_pci_tx_wd_ring *wd_ring = &tx_ring->wd_ring; -+ struct rtw89_pci_tx_wd *txwd; -+ -+ txwd = list_first_entry_or_null(&wd_ring->free_pages, -+ struct rtw89_pci_tx_wd, list); -+ if (!txwd) -+ return NULL; -+ -+ list_del_init(&txwd->list); -+ txwd->len = 0; -+ wd_ring->curr_num--; -+ -+ return txwd; -+} -+ -+static inline void -+rtw89_pci_enqueue_txwd(struct rtw89_pci_tx_ring *tx_ring, -+ struct rtw89_pci_tx_wd *txwd) -+{ -+ struct rtw89_pci_tx_wd_ring *wd_ring = &tx_ring->wd_ring; -+ -+ memset(txwd->vaddr, 0, wd_ring->page_size); -+ list_add_tail(&txwd->list, &wd_ring->free_pages); -+ wd_ring->curr_num++; -+} -+ -+static inline bool rtw89_pci_ltr_is_err_reg_val(u32 val) -+{ -+ return val == 0xffffffff || val == 0xeaeaeaea; -+} -+ -+extern const struct dev_pm_ops rtw89_pm_ops; -+ -+#endif -diff --git a/drivers/net/wireless/realtek/rtw89/phy.c b/drivers/net/wireless/realtek/rtw89/phy.c -new file mode 100644 -index 000000000000..53c36cc82c57 ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/phy.c -@@ -0,0 +1,2868 @@ -+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause -+/* Copyright(c) 2019-2020 Realtek Corporation -+ */ -+ -+#include "debug.h" -+#include "fw.h" -+#include "phy.h" -+#include "ps.h" -+#include "reg.h" -+#include "sar.h" -+#include "coex.h" -+ -+static u16 get_max_amsdu_len(struct rtw89_dev *rtwdev, -+ const struct rtw89_ra_report *report) -+{ -+ const struct rate_info *txrate = &report->txrate; -+ u32 bit_rate = report->bit_rate; -+ u8 mcs; -+ -+ /* lower than ofdm, do not aggregate */ -+ if (bit_rate < 550) -+ return 1; -+ -+ /* prevent hardware rate fallback to G mode rate */ -+ if (txrate->flags & RATE_INFO_FLAGS_MCS) -+ mcs = txrate->mcs & 0x07; -+ else if (txrate->flags & (RATE_INFO_FLAGS_VHT_MCS | RATE_INFO_FLAGS_HE_MCS)) -+ mcs = txrate->mcs; -+ else -+ mcs = 0; -+ -+ if (mcs <= 2) -+ return 1; -+ -+ /* lower than 20M vht 2ss mcs8, make it small */ -+ if (bit_rate < 1800) -+ return 1200; -+ -+ /* lower than 40M vht 2ss mcs9, make it medium */ -+ if (bit_rate < 4000) -+ return 2600; -+ -+ /* not yet 80M vht 2ss mcs8/9, make it twice regular packet size */ -+ if (bit_rate < 7000) -+ return 3500; -+ -+ return rtwdev->chip->max_amsdu_limit; -+} -+ -+static u64 get_mcs_ra_mask(u16 mcs_map, u8 highest_mcs, u8 gap) -+{ -+ u64 ra_mask = 0; -+ u8 mcs_cap; -+ int i, nss; -+ -+ for (i = 0, nss = 12; i < 4; i++, mcs_map >>= 2, nss += 12) { -+ mcs_cap = mcs_map & 0x3; -+ switch (mcs_cap) { -+ case 2: -+ ra_mask |= GENMASK_ULL(highest_mcs, 0) << nss; -+ break; -+ case 1: -+ ra_mask |= GENMASK_ULL(highest_mcs - gap, 0) << nss; -+ break; -+ case 0: -+ ra_mask |= GENMASK_ULL(highest_mcs - gap * 2, 0) << nss; -+ break; -+ default: -+ break; -+ } -+ } -+ -+ return ra_mask; -+} -+ -+static u64 get_he_ra_mask(struct ieee80211_sta *sta) -+{ -+ struct ieee80211_sta_he_cap cap = sta->he_cap; -+ u16 mcs_map; -+ -+ switch (sta->bandwidth) { -+ case IEEE80211_STA_RX_BW_160: -+ if (cap.he_cap_elem.phy_cap_info[0] & -+ IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G) -+ mcs_map = le16_to_cpu(cap.he_mcs_nss_supp.rx_mcs_80p80); -+ else -+ mcs_map = le16_to_cpu(cap.he_mcs_nss_supp.rx_mcs_160); -+ break; -+ default: -+ mcs_map = le16_to_cpu(cap.he_mcs_nss_supp.rx_mcs_80); -+ } -+ -+ /* MCS11, MCS9, MCS7 */ -+ return get_mcs_ra_mask(mcs_map, 11, 2); -+} -+ -+#define RA_FLOOR_TABLE_SIZE 7 -+#define RA_FLOOR_UP_GAP 3 -+static u64 rtw89_phy_ra_mask_rssi(struct rtw89_dev *rtwdev, u8 rssi, -+ u8 ratr_state) -+{ -+ u8 rssi_lv_t[RA_FLOOR_TABLE_SIZE] = {30, 44, 48, 52, 56, 60, 100}; -+ u8 rssi_lv = 0; -+ u8 i; -+ -+ rssi >>= 1; -+ for (i = 0; i < RA_FLOOR_TABLE_SIZE; i++) { -+ if (i >= ratr_state) -+ rssi_lv_t[i] += RA_FLOOR_UP_GAP; -+ if (rssi < rssi_lv_t[i]) { -+ rssi_lv = i; -+ break; -+ } -+ } -+ if (rssi_lv == 0) -+ return 0xffffffffffffffffULL; -+ else if (rssi_lv == 1) -+ return 0xfffffffffffffff0ULL; -+ else if (rssi_lv == 2) -+ return 0xffffffffffffffe0ULL; -+ else if (rssi_lv == 3) -+ return 0xffffffffffffffc0ULL; -+ else if (rssi_lv == 4) -+ return 0xffffffffffffff80ULL; -+ else if (rssi_lv >= 5) -+ return 0xffffffffffffff00ULL; -+ -+ return 0xffffffffffffffffULL; -+} -+ -+static u64 rtw89_phy_ra_mask_cfg(struct rtw89_dev *rtwdev, struct rtw89_sta *rtwsta) -+{ -+ struct rtw89_hal *hal = &rtwdev->hal; -+ struct ieee80211_sta *sta = rtwsta_to_sta(rtwsta); -+ struct cfg80211_bitrate_mask *mask = &rtwsta->mask; -+ enum nl80211_band band; -+ u64 cfg_mask; -+ -+ if (!rtwsta->use_cfg_mask) -+ return -1; -+ -+ switch (hal->current_band_type) { -+ case RTW89_BAND_2G: -+ band = NL80211_BAND_2GHZ; -+ cfg_mask = u64_encode_bits(mask->control[NL80211_BAND_2GHZ].legacy, -+ RA_MASK_CCK_RATES | RA_MASK_OFDM_RATES); -+ break; -+ case RTW89_BAND_5G: -+ band = NL80211_BAND_5GHZ; -+ cfg_mask = u64_encode_bits(mask->control[NL80211_BAND_5GHZ].legacy, -+ RA_MASK_OFDM_RATES); -+ break; -+ default: -+ rtw89_warn(rtwdev, "unhandled band type %d\n", hal->current_band_type); -+ return -1; -+ } -+ -+ if (sta->he_cap.has_he) { -+ cfg_mask |= u64_encode_bits(mask->control[band].he_mcs[0], -+ RA_MASK_HE_1SS_RATES); -+ cfg_mask |= u64_encode_bits(mask->control[band].he_mcs[1], -+ RA_MASK_HE_2SS_RATES); -+ } else if (sta->vht_cap.vht_supported) { -+ cfg_mask |= u64_encode_bits(mask->control[band].vht_mcs[0], -+ RA_MASK_VHT_1SS_RATES); -+ cfg_mask |= u64_encode_bits(mask->control[band].vht_mcs[1], -+ RA_MASK_VHT_2SS_RATES); -+ } else if (sta->ht_cap.ht_supported) { -+ cfg_mask |= u64_encode_bits(mask->control[band].ht_mcs[0], -+ RA_MASK_HT_1SS_RATES); -+ cfg_mask |= u64_encode_bits(mask->control[band].ht_mcs[1], -+ RA_MASK_HT_2SS_RATES); -+ } -+ -+ return cfg_mask; -+} -+ -+static const u64 -+rtw89_ra_mask_ht_rates[4] = {RA_MASK_HT_1SS_RATES, RA_MASK_HT_2SS_RATES, -+ RA_MASK_HT_3SS_RATES, RA_MASK_HT_4SS_RATES}; -+static const u64 -+rtw89_ra_mask_vht_rates[4] = {RA_MASK_VHT_1SS_RATES, RA_MASK_VHT_2SS_RATES, -+ RA_MASK_VHT_3SS_RATES, RA_MASK_VHT_4SS_RATES}; -+static const u64 -+rtw89_ra_mask_he_rates[4] = {RA_MASK_HE_1SS_RATES, RA_MASK_HE_2SS_RATES, -+ RA_MASK_HE_3SS_RATES, RA_MASK_HE_4SS_RATES}; -+ -+static void rtw89_phy_ra_sta_update(struct rtw89_dev *rtwdev, -+ struct ieee80211_sta *sta, bool csi) -+{ -+ struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; -+ struct rtw89_vif *rtwvif = rtwsta->rtwvif; -+ struct rtw89_phy_rate_pattern *rate_pattern = &rtwvif->rate_pattern; -+ struct rtw89_ra_info *ra = &rtwsta->ra; -+ const u64 *high_rate_masks = rtw89_ra_mask_ht_rates; -+ u8 rssi = ewma_rssi_read(&rtwsta->avg_rssi); -+ u64 high_rate_mask = 0; -+ u64 ra_mask = 0; -+ u8 mode = 0; -+ u8 csi_mode = RTW89_RA_RPT_MODE_LEGACY; -+ u8 bw_mode = 0; -+ u8 stbc_en = 0; -+ u8 ldpc_en = 0; -+ u8 i; -+ bool sgi = false; -+ -+ memset(ra, 0, sizeof(*ra)); -+ /* Set the ra mask from sta's capability */ -+ if (sta->he_cap.has_he) { -+ mode |= RTW89_RA_MODE_HE; -+ csi_mode = RTW89_RA_RPT_MODE_HE; -+ ra_mask |= get_he_ra_mask(sta); -+ high_rate_masks = rtw89_ra_mask_he_rates; -+ if (sta->he_cap.he_cap_elem.phy_cap_info[2] & -+ IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ) -+ stbc_en = 1; -+ if (sta->he_cap.he_cap_elem.phy_cap_info[1] & -+ IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD) -+ ldpc_en = 1; -+ } else if (sta->vht_cap.vht_supported) { -+ u16 mcs_map = le16_to_cpu(sta->vht_cap.vht_mcs.rx_mcs_map); -+ -+ mode |= RTW89_RA_MODE_VHT; -+ csi_mode = RTW89_RA_RPT_MODE_VHT; -+ /* MCS9, MCS8, MCS7 */ -+ ra_mask |= get_mcs_ra_mask(mcs_map, 9, 1); -+ high_rate_masks = rtw89_ra_mask_vht_rates; -+ if (sta->vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_MASK) -+ stbc_en = 1; -+ if (sta->vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC) -+ ldpc_en = 1; -+ } else if (sta->ht_cap.ht_supported) { -+ mode |= RTW89_RA_MODE_HT; -+ csi_mode = RTW89_RA_RPT_MODE_HT; -+ ra_mask |= ((u64)sta->ht_cap.mcs.rx_mask[3] << 48) | -+ ((u64)sta->ht_cap.mcs.rx_mask[2] << 36) | -+ (sta->ht_cap.mcs.rx_mask[1] << 24) | -+ (sta->ht_cap.mcs.rx_mask[0] << 12); -+ high_rate_masks = rtw89_ra_mask_ht_rates; -+ if (sta->ht_cap.cap & IEEE80211_HT_CAP_RX_STBC) -+ stbc_en = 1; -+ if (sta->ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING) -+ ldpc_en = 1; -+ } -+ -+ if (rtwdev->hal.current_band_type == RTW89_BAND_2G) { -+ if (sta->supp_rates[NL80211_BAND_2GHZ] <= 0xf) -+ mode |= RTW89_RA_MODE_CCK; -+ else -+ mode |= RTW89_RA_MODE_CCK | RTW89_RA_MODE_OFDM; -+ } else { -+ mode |= RTW89_RA_MODE_OFDM; -+ } -+ -+ if (mode >= RTW89_RA_MODE_HT) { -+ for (i = 0; i < rtwdev->hal.tx_nss; i++) -+ high_rate_mask |= high_rate_masks[i]; -+ ra_mask &= high_rate_mask; -+ if (mode & RTW89_RA_MODE_OFDM) -+ ra_mask |= RA_MASK_SUBOFDM_RATES; -+ if (mode & RTW89_RA_MODE_CCK) -+ ra_mask |= RA_MASK_SUBCCK_RATES; -+ } else if (mode & RTW89_RA_MODE_OFDM) { -+ if (mode & RTW89_RA_MODE_CCK) -+ ra_mask |= RA_MASK_SUBCCK_RATES; -+ ra_mask |= RA_MASK_OFDM_RATES; -+ } else { -+ ra_mask = RA_MASK_CCK_RATES; -+ } -+ -+ if (mode != RTW89_RA_MODE_CCK) { -+ ra_mask &= rtw89_phy_ra_mask_rssi(rtwdev, rssi, 0); -+ ra_mask &= rtw89_phy_ra_mask_cfg(rtwdev, rtwsta); -+ } -+ -+ switch (sta->bandwidth) { -+ case IEEE80211_STA_RX_BW_80: -+ bw_mode = RTW89_CHANNEL_WIDTH_80; -+ sgi = sta->vht_cap.vht_supported && -+ (sta->vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80); -+ break; -+ case IEEE80211_STA_RX_BW_40: -+ bw_mode = RTW89_CHANNEL_WIDTH_40; -+ sgi = sta->ht_cap.ht_supported && -+ (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_40); -+ break; -+ default: -+ bw_mode = RTW89_CHANNEL_WIDTH_20; -+ sgi = sta->ht_cap.ht_supported && -+ (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_20); -+ break; -+ } -+ -+ if (sta->he_cap.he_cap_elem.phy_cap_info[3] & -+ IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_16_QAM) -+ ra->dcm_cap = 1; -+ -+ if (rate_pattern->enable) { -+ ra_mask = rtw89_phy_ra_mask_cfg(rtwdev, rtwsta); -+ ra_mask &= rate_pattern->ra_mask; -+ mode = rate_pattern->ra_mode; -+ } -+ -+ ra->bw_cap = bw_mode; -+ ra->mode_ctrl = mode; -+ ra->macid = rtwsta->mac_id; -+ ra->stbc_cap = stbc_en; -+ ra->ldpc_cap = ldpc_en; -+ ra->ss_num = min(sta->rx_nss, rtwdev->hal.tx_nss) - 1; -+ ra->en_sgi = sgi; -+ ra->ra_mask = ra_mask; -+ -+ if (!csi) -+ return; -+ -+ ra->fixed_csi_rate_en = false; -+ ra->ra_csi_rate_en = true; -+ ra->cr_tbl_sel = false; -+ ra->band_num = rtwvif->phy_idx; -+ ra->csi_bw = bw_mode; -+ ra->csi_gi_ltf = RTW89_GILTF_LGI_4XHE32; -+ ra->csi_mcs_ss_idx = 5; -+ ra->csi_mode = csi_mode; -+} -+ -+void rtw89_phy_ra_updata_sta(struct rtw89_dev *rtwdev, struct ieee80211_sta *sta) -+{ -+ struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; -+ struct rtw89_ra_info *ra = &rtwsta->ra; -+ -+ rtw89_phy_ra_sta_update(rtwdev, sta, false); -+ ra->upd_mask = 1; -+ rtw89_debug(rtwdev, RTW89_DBG_RA, -+ "ra updat: macid = %d, bw = %d, nss = %d, gi = %d %d", -+ ra->macid, -+ ra->bw_cap, -+ ra->ss_num, -+ ra->en_sgi, -+ ra->giltf); -+ -+ rtw89_fw_h2c_ra(rtwdev, ra, false); -+} -+ -+static bool __check_rate_pattern(struct rtw89_phy_rate_pattern *next, -+ u16 rate_base, u64 ra_mask, u8 ra_mode, -+ u32 rate_ctrl, u32 ctrl_skip, bool force) -+{ -+ u8 n, c; -+ -+ if (rate_ctrl == ctrl_skip) -+ return true; -+ -+ n = hweight32(rate_ctrl); -+ if (n == 0) -+ return true; -+ -+ if (force && n != 1) -+ return false; -+ -+ if (next->enable) -+ return false; -+ -+ c = __fls(rate_ctrl); -+ next->rate = rate_base + c; -+ next->ra_mode = ra_mode; -+ next->ra_mask = ra_mask; -+ next->enable = true; -+ -+ return true; -+} -+ -+void rtw89_phy_rate_pattern_vif(struct rtw89_dev *rtwdev, -+ struct ieee80211_vif *vif, -+ const struct cfg80211_bitrate_mask *mask) -+{ -+ struct ieee80211_supported_band *sband; -+ struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; -+ struct rtw89_phy_rate_pattern next_pattern = {0}; -+ static const u16 hw_rate_he[] = {RTW89_HW_RATE_HE_NSS1_MCS0, -+ RTW89_HW_RATE_HE_NSS2_MCS0, -+ RTW89_HW_RATE_HE_NSS3_MCS0, -+ RTW89_HW_RATE_HE_NSS4_MCS0}; -+ static const u16 hw_rate_vht[] = {RTW89_HW_RATE_VHT_NSS1_MCS0, -+ RTW89_HW_RATE_VHT_NSS2_MCS0, -+ RTW89_HW_RATE_VHT_NSS3_MCS0, -+ RTW89_HW_RATE_VHT_NSS4_MCS0}; -+ static const u16 hw_rate_ht[] = {RTW89_HW_RATE_MCS0, -+ RTW89_HW_RATE_MCS8, -+ RTW89_HW_RATE_MCS16, -+ RTW89_HW_RATE_MCS24}; -+ u8 band = rtwdev->hal.current_band_type; -+ u8 tx_nss = rtwdev->hal.tx_nss; -+ u8 i; -+ -+ for (i = 0; i < tx_nss; i++) -+ if (!__check_rate_pattern(&next_pattern, hw_rate_he[i], -+ RA_MASK_HE_RATES, RTW89_RA_MODE_HE, -+ mask->control[band].he_mcs[i], -+ 0, true)) -+ goto out; -+ -+ for (i = 0; i < tx_nss; i++) -+ if (!__check_rate_pattern(&next_pattern, hw_rate_vht[i], -+ RA_MASK_VHT_RATES, RTW89_RA_MODE_VHT, -+ mask->control[band].vht_mcs[i], -+ 0, true)) -+ goto out; -+ -+ for (i = 0; i < tx_nss; i++) -+ if (!__check_rate_pattern(&next_pattern, hw_rate_ht[i], -+ RA_MASK_HT_RATES, RTW89_RA_MODE_HT, -+ mask->control[band].ht_mcs[i], -+ 0, true)) -+ goto out; -+ -+ /* lagacy cannot be empty for nl80211_parse_tx_bitrate_mask, and -+ * require at least one basic rate for ieee80211_set_bitrate_mask, -+ * so the decision just depends on if all bitrates are set or not. -+ */ -+ sband = rtwdev->hw->wiphy->bands[band]; -+ if (band == RTW89_BAND_2G) { -+ if (!__check_rate_pattern(&next_pattern, RTW89_HW_RATE_CCK1, -+ RA_MASK_CCK_RATES | RA_MASK_OFDM_RATES, -+ RTW89_RA_MODE_CCK | RTW89_RA_MODE_OFDM, -+ mask->control[band].legacy, -+ BIT(sband->n_bitrates) - 1, false)) -+ goto out; -+ } else { -+ if (!__check_rate_pattern(&next_pattern, RTW89_HW_RATE_OFDM6, -+ RA_MASK_OFDM_RATES, RTW89_RA_MODE_OFDM, -+ mask->control[band].legacy, -+ BIT(sband->n_bitrates) - 1, false)) -+ goto out; -+ } -+ -+ if (!next_pattern.enable) -+ goto out; -+ -+ rtwvif->rate_pattern = next_pattern; -+ rtw89_debug(rtwdev, RTW89_DBG_RA, -+ "configure pattern: rate 0x%x, mask 0x%llx, mode 0x%x\n", -+ next_pattern.rate, -+ next_pattern.ra_mask, -+ next_pattern.ra_mode); -+ return; -+ -+out: -+ rtwvif->rate_pattern.enable = false; -+ rtw89_debug(rtwdev, RTW89_DBG_RA, "unset rate pattern\n"); -+} -+ -+static void rtw89_phy_ra_updata_sta_iter(void *data, struct ieee80211_sta *sta) -+{ -+ struct rtw89_dev *rtwdev = (struct rtw89_dev *)data; -+ -+ rtw89_phy_ra_updata_sta(rtwdev, sta); -+} -+ -+void rtw89_phy_ra_update(struct rtw89_dev *rtwdev) -+{ -+ ieee80211_iterate_stations_atomic(rtwdev->hw, -+ rtw89_phy_ra_updata_sta_iter, -+ rtwdev); -+} -+ -+void rtw89_phy_ra_assoc(struct rtw89_dev *rtwdev, struct ieee80211_sta *sta) -+{ -+ struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; -+ struct rtw89_ra_info *ra = &rtwsta->ra; -+ u8 rssi = ewma_rssi_read(&rtwsta->avg_rssi) >> RSSI_FACTOR; -+ bool csi = rtw89_sta_has_beamformer_cap(sta); -+ -+ rtw89_phy_ra_sta_update(rtwdev, sta, csi); -+ -+ if (rssi > 40) -+ ra->init_rate_lv = 1; -+ else if (rssi > 20) -+ ra->init_rate_lv = 2; -+ else if (rssi > 1) -+ ra->init_rate_lv = 3; -+ else -+ ra->init_rate_lv = 0; -+ ra->upd_all = 1; -+ rtw89_debug(rtwdev, RTW89_DBG_RA, -+ "ra assoc: macid = %d, mode = %d, bw = %d, nss = %d, lv = %d", -+ ra->macid, -+ ra->mode_ctrl, -+ ra->bw_cap, -+ ra->ss_num, -+ ra->init_rate_lv); -+ rtw89_debug(rtwdev, RTW89_DBG_RA, -+ "ra assoc: dcm = %d, er = %d, ldpc = %d, stbc = %d, gi = %d %d", -+ ra->dcm_cap, -+ ra->er_cap, -+ ra->ldpc_cap, -+ ra->stbc_cap, -+ ra->en_sgi, -+ ra->giltf); -+ -+ rtw89_fw_h2c_ra(rtwdev, ra, csi); -+} -+ -+u8 rtw89_phy_get_txsc(struct rtw89_dev *rtwdev, -+ struct rtw89_channel_params *param, -+ enum rtw89_bandwidth dbw) -+{ -+ enum rtw89_bandwidth cbw = param->bandwidth; -+ u8 pri_ch = param->primary_chan; -+ u8 central_ch = param->center_chan; -+ u8 txsc_idx = 0; -+ u8 tmp = 0; -+ -+ if (cbw == dbw || cbw == RTW89_CHANNEL_WIDTH_20) -+ return txsc_idx; -+ -+ switch (cbw) { -+ case RTW89_CHANNEL_WIDTH_40: -+ txsc_idx = pri_ch > central_ch ? 1 : 2; -+ break; -+ case RTW89_CHANNEL_WIDTH_80: -+ if (dbw == RTW89_CHANNEL_WIDTH_20) { -+ if (pri_ch > central_ch) -+ txsc_idx = (pri_ch - central_ch) >> 1; -+ else -+ txsc_idx = ((central_ch - pri_ch) >> 1) + 1; -+ } else { -+ txsc_idx = pri_ch > central_ch ? 9 : 10; -+ } -+ break; -+ case RTW89_CHANNEL_WIDTH_160: -+ if (pri_ch > central_ch) -+ tmp = (pri_ch - central_ch) >> 1; -+ else -+ tmp = ((central_ch - pri_ch) >> 1) + 1; -+ -+ if (dbw == RTW89_CHANNEL_WIDTH_20) { -+ txsc_idx = tmp; -+ } else if (dbw == RTW89_CHANNEL_WIDTH_40) { -+ if (tmp == 1 || tmp == 3) -+ txsc_idx = 9; -+ else if (tmp == 5 || tmp == 7) -+ txsc_idx = 11; -+ else if (tmp == 2 || tmp == 4) -+ txsc_idx = 10; -+ else if (tmp == 6 || tmp == 8) -+ txsc_idx = 12; -+ else -+ return 0xff; -+ } else { -+ txsc_idx = pri_ch > central_ch ? 13 : 14; -+ } -+ break; -+ case RTW89_CHANNEL_WIDTH_80_80: -+ if (dbw == RTW89_CHANNEL_WIDTH_20) { -+ if (pri_ch > central_ch) -+ txsc_idx = (10 - (pri_ch - central_ch)) >> 1; -+ else -+ txsc_idx = ((central_ch - pri_ch) >> 1) + 5; -+ } else if (dbw == RTW89_CHANNEL_WIDTH_40) { -+ txsc_idx = pri_ch > central_ch ? 10 : 12; -+ } else { -+ txsc_idx = 14; -+ } -+ break; -+ default: -+ break; -+ } -+ -+ return txsc_idx; -+} -+ -+u32 rtw89_phy_read_rf(struct rtw89_dev *rtwdev, enum rtw89_rf_path rf_path, -+ u32 addr, u32 mask) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ const u32 *base_addr = chip->rf_base_addr; -+ u32 val, direct_addr; -+ -+ if (rf_path >= rtwdev->chip->rf_path_num) { -+ rtw89_err(rtwdev, "unsupported rf path (%d)\n", rf_path); -+ return INV_RF_DATA; -+ } -+ -+ addr &= 0xff; -+ direct_addr = base_addr[rf_path] + (addr << 2); -+ mask &= RFREG_MASK; -+ -+ val = rtw89_phy_read32_mask(rtwdev, direct_addr, mask); -+ -+ return val; -+} -+EXPORT_SYMBOL(rtw89_phy_read_rf); -+ -+bool rtw89_phy_write_rf(struct rtw89_dev *rtwdev, enum rtw89_rf_path rf_path, -+ u32 addr, u32 mask, u32 data) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ const u32 *base_addr = chip->rf_base_addr; -+ u32 direct_addr; -+ -+ if (rf_path >= rtwdev->chip->rf_path_num) { -+ rtw89_err(rtwdev, "unsupported rf path (%d)\n", rf_path); -+ return false; -+ } -+ -+ addr &= 0xff; -+ direct_addr = base_addr[rf_path] + (addr << 2); -+ mask &= RFREG_MASK; -+ -+ rtw89_phy_write32_mask(rtwdev, direct_addr, mask, data); -+ -+ /* delay to ensure writing properly */ -+ udelay(1); -+ -+ return true; -+} -+EXPORT_SYMBOL(rtw89_phy_write_rf); -+ -+static void rtw89_phy_bb_reset(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy_idx) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ -+ chip->ops->bb_reset(rtwdev, phy_idx); -+} -+ -+static void rtw89_phy_config_bb_reg(struct rtw89_dev *rtwdev, -+ const struct rtw89_reg2_def *reg, -+ enum rtw89_rf_path rf_path, -+ void *extra_data) -+{ -+ if (reg->addr == 0xfe) -+ mdelay(50); -+ else if (reg->addr == 0xfd) -+ mdelay(5); -+ else if (reg->addr == 0xfc) -+ mdelay(1); -+ else if (reg->addr == 0xfb) -+ udelay(50); -+ else if (reg->addr == 0xfa) -+ udelay(5); -+ else if (reg->addr == 0xf9) -+ udelay(1); -+ else -+ rtw89_phy_write32(rtwdev, reg->addr, reg->data); -+} -+ -+static void -+rtw89_phy_cofig_rf_reg_store(struct rtw89_dev *rtwdev, -+ const struct rtw89_reg2_def *reg, -+ enum rtw89_rf_path rf_path, -+ struct rtw89_fw_h2c_rf_reg_info *info) -+{ -+ u16 idx = info->curr_idx % RTW89_H2C_RF_PAGE_SIZE; -+ u8 page = info->curr_idx / RTW89_H2C_RF_PAGE_SIZE; -+ -+ info->rtw89_phy_config_rf_h2c[page][idx] = -+ cpu_to_le32((reg->addr << 20) | reg->data); -+ info->curr_idx++; -+} -+ -+static int rtw89_phy_config_rf_reg_fw(struct rtw89_dev *rtwdev, -+ struct rtw89_fw_h2c_rf_reg_info *info) -+{ -+ u16 page = info->curr_idx / RTW89_H2C_RF_PAGE_SIZE; -+ u16 len = (info->curr_idx % RTW89_H2C_RF_PAGE_SIZE) * 4; -+ u8 i; -+ int ret = 0; -+ -+ if (page > RTW89_H2C_RF_PAGE_NUM) { -+ rtw89_warn(rtwdev, -+ "rf reg h2c total page num %d larger than %d (RTW89_H2C_RF_PAGE_NUM)\n", -+ page, RTW89_H2C_RF_PAGE_NUM); -+ return -EINVAL; -+ } -+ -+ for (i = 0; i < page; i++) { -+ ret = rtw89_fw_h2c_rf_reg(rtwdev, info, -+ RTW89_H2C_RF_PAGE_SIZE * 4, i); -+ if (ret) -+ return ret; -+ } -+ ret = rtw89_fw_h2c_rf_reg(rtwdev, info, len, i); -+ if (ret) -+ return ret; -+ info->curr_idx = 0; -+ -+ return 0; -+} -+ -+static void rtw89_phy_config_rf_reg(struct rtw89_dev *rtwdev, -+ const struct rtw89_reg2_def *reg, -+ enum rtw89_rf_path rf_path, -+ void *extra_data) -+{ -+ if (reg->addr == 0xfe) { -+ mdelay(50); -+ } else if (reg->addr == 0xfd) { -+ mdelay(5); -+ } else if (reg->addr == 0xfc) { -+ mdelay(1); -+ } else if (reg->addr == 0xfb) { -+ udelay(50); -+ } else if (reg->addr == 0xfa) { -+ udelay(5); -+ } else if (reg->addr == 0xf9) { -+ udelay(1); -+ } else { -+ rtw89_write_rf(rtwdev, rf_path, reg->addr, 0xfffff, reg->data); -+ rtw89_phy_cofig_rf_reg_store(rtwdev, reg, rf_path, -+ (struct rtw89_fw_h2c_rf_reg_info *)extra_data); -+ } -+} -+ -+static int rtw89_phy_sel_headline(struct rtw89_dev *rtwdev, -+ const struct rtw89_phy_table *table, -+ u32 *headline_size, u32 *headline_idx, -+ u8 rfe, u8 cv) -+{ -+ const struct rtw89_reg2_def *reg; -+ u32 headline; -+ u32 compare, target; -+ u8 rfe_para, cv_para; -+ u8 cv_max = 0; -+ bool case_matched = false; -+ u32 i; -+ -+ for (i = 0; i < table->n_regs; i++) { -+ reg = &table->regs[i]; -+ headline = get_phy_headline(reg->addr); -+ if (headline != PHY_HEADLINE_VALID) -+ break; -+ } -+ *headline_size = i; -+ if (*headline_size == 0) -+ return 0; -+ -+ /* case 1: RFE match, CV match */ -+ compare = get_phy_compare(rfe, cv); -+ for (i = 0; i < *headline_size; i++) { -+ reg = &table->regs[i]; -+ target = get_phy_target(reg->addr); -+ if (target == compare) { -+ *headline_idx = i; -+ return 0; -+ } -+ } -+ -+ /* case 2: RFE match, CV don't care */ -+ compare = get_phy_compare(rfe, PHY_COND_DONT_CARE); -+ for (i = 0; i < *headline_size; i++) { -+ reg = &table->regs[i]; -+ target = get_phy_target(reg->addr); -+ if (target == compare) { -+ *headline_idx = i; -+ return 0; -+ } -+ } -+ -+ /* case 3: RFE match, CV max in table */ -+ for (i = 0; i < *headline_size; i++) { -+ reg = &table->regs[i]; -+ rfe_para = get_phy_cond_rfe(reg->addr); -+ cv_para = get_phy_cond_cv(reg->addr); -+ if (rfe_para == rfe) { -+ if (cv_para >= cv_max) { -+ cv_max = cv_para; -+ *headline_idx = i; -+ case_matched = true; -+ } -+ } -+ } -+ -+ if (case_matched) -+ return 0; -+ -+ /* case 4: RFE don't care, CV max in table */ -+ for (i = 0; i < *headline_size; i++) { -+ reg = &table->regs[i]; -+ rfe_para = get_phy_cond_rfe(reg->addr); -+ cv_para = get_phy_cond_cv(reg->addr); -+ if (rfe_para == PHY_COND_DONT_CARE) { -+ if (cv_para >= cv_max) { -+ cv_max = cv_para; -+ *headline_idx = i; -+ case_matched = true; -+ } -+ } -+ } -+ -+ if (case_matched) -+ return 0; -+ -+ return -EINVAL; -+} -+ -+static void rtw89_phy_init_reg(struct rtw89_dev *rtwdev, -+ const struct rtw89_phy_table *table, -+ void (*config)(struct rtw89_dev *rtwdev, -+ const struct rtw89_reg2_def *reg, -+ enum rtw89_rf_path rf_path, -+ void *data), -+ void *extra_data) -+{ -+ const struct rtw89_reg2_def *reg; -+ enum rtw89_rf_path rf_path = table->rf_path; -+ u8 rfe = rtwdev->efuse.rfe_type; -+ u8 cv = rtwdev->hal.cv; -+ u32 i; -+ u32 headline_size = 0, headline_idx = 0; -+ u32 target = 0, cfg_target; -+ u8 cond; -+ bool is_matched = true; -+ bool target_found = false; -+ int ret; -+ -+ ret = rtw89_phy_sel_headline(rtwdev, table, &headline_size, -+ &headline_idx, rfe, cv); -+ if (ret) { -+ rtw89_err(rtwdev, "invalid PHY package: %d/%d\n", rfe, cv); -+ return; -+ } -+ -+ cfg_target = get_phy_target(table->regs[headline_idx].addr); -+ for (i = headline_size; i < table->n_regs; i++) { -+ reg = &table->regs[i]; -+ cond = get_phy_cond(reg->addr); -+ switch (cond) { -+ case PHY_COND_BRANCH_IF: -+ case PHY_COND_BRANCH_ELIF: -+ target = get_phy_target(reg->addr); -+ break; -+ case PHY_COND_BRANCH_ELSE: -+ is_matched = false; -+ if (!target_found) { -+ rtw89_warn(rtwdev, "failed to load CR %x/%x\n", -+ reg->addr, reg->data); -+ return; -+ } -+ break; -+ case PHY_COND_BRANCH_END: -+ is_matched = true; -+ target_found = false; -+ break; -+ case PHY_COND_CHECK: -+ if (target_found) { -+ is_matched = false; -+ break; -+ } -+ -+ if (target == cfg_target) { -+ is_matched = true; -+ target_found = true; -+ } else { -+ is_matched = false; -+ target_found = false; -+ } -+ break; -+ default: -+ if (is_matched) -+ config(rtwdev, reg, rf_path, extra_data); -+ break; -+ } -+ } -+} -+ -+void rtw89_phy_init_bb_reg(struct rtw89_dev *rtwdev) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ const struct rtw89_phy_table *bb_table = chip->bb_table; -+ -+ rtw89_phy_init_reg(rtwdev, bb_table, rtw89_phy_config_bb_reg, NULL); -+ rtw89_chip_init_txpwr_unit(rtwdev, RTW89_PHY_0); -+ rtw89_phy_bb_reset(rtwdev, RTW89_PHY_0); -+} -+ -+static u32 rtw89_phy_nctl_poll(struct rtw89_dev *rtwdev) -+{ -+ rtw89_phy_write32(rtwdev, 0x8080, 0x4); -+ udelay(1); -+ return rtw89_phy_read32(rtwdev, 0x8080); -+} -+ -+void rtw89_phy_init_rf_reg(struct rtw89_dev *rtwdev) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ const struct rtw89_phy_table *rf_table; -+ struct rtw89_fw_h2c_rf_reg_info *rf_reg_info; -+ u8 path; -+ -+ rf_reg_info = kzalloc(sizeof(*rf_reg_info), GFP_KERNEL); -+ if (!rf_reg_info) -+ return; -+ -+ for (path = RF_PATH_A; path < chip->rf_path_num; path++) { -+ rf_reg_info->rf_path = path; -+ rf_table = chip->rf_table[path]; -+ rtw89_phy_init_reg(rtwdev, rf_table, rtw89_phy_config_rf_reg, -+ (void *)rf_reg_info); -+ if (rtw89_phy_config_rf_reg_fw(rtwdev, rf_reg_info)) -+ rtw89_warn(rtwdev, "rf path %d reg h2c config failed\n", -+ path); -+ } -+ kfree(rf_reg_info); -+} -+ -+static void rtw89_phy_init_rf_nctl(struct rtw89_dev *rtwdev) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ const struct rtw89_phy_table *nctl_table; -+ u32 val; -+ int ret; -+ -+ /* IQK/DPK clock & reset */ -+ rtw89_phy_write32_set(rtwdev, 0x0c60, 0x3); -+ rtw89_phy_write32_set(rtwdev, 0x0c6c, 0x1); -+ rtw89_phy_write32_set(rtwdev, 0x58ac, 0x8000000); -+ rtw89_phy_write32_set(rtwdev, 0x78ac, 0x8000000); -+ -+ /* check 0x8080 */ -+ rtw89_phy_write32(rtwdev, 0x8000, 0x8); -+ -+ ret = read_poll_timeout(rtw89_phy_nctl_poll, val, val == 0x4, 10, -+ 1000, false, rtwdev); -+ if (ret) -+ rtw89_err(rtwdev, "failed to poll nctl block\n"); -+ -+ nctl_table = chip->nctl_table; -+ rtw89_phy_init_reg(rtwdev, nctl_table, rtw89_phy_config_bb_reg, NULL); -+} -+ -+static u32 rtw89_phy0_phy1_offset(struct rtw89_dev *rtwdev, u32 addr) -+{ -+ u32 phy_page = addr >> 8; -+ u32 ofst = 0; -+ -+ switch (phy_page) { -+ case 0x6: -+ case 0x7: -+ case 0x8: -+ case 0x9: -+ case 0xa: -+ case 0xb: -+ case 0xc: -+ case 0xd: -+ case 0x19: -+ case 0x1a: -+ case 0x1b: -+ ofst = 0x2000; -+ break; -+ default: -+ /* warning case */ -+ ofst = 0; -+ break; -+ } -+ -+ if (phy_page >= 0x40 && phy_page <= 0x4f) -+ ofst = 0x2000; -+ -+ return ofst; -+} -+ -+void rtw89_phy_write32_idx(struct rtw89_dev *rtwdev, u32 addr, u32 mask, -+ u32 data, enum rtw89_phy_idx phy_idx) -+{ -+ if (rtwdev->dbcc_en && phy_idx == RTW89_PHY_1) -+ addr += rtw89_phy0_phy1_offset(rtwdev, addr); -+ rtw89_phy_write32_mask(rtwdev, addr, mask, data); -+} -+ -+void rtw89_phy_set_phy_regs(struct rtw89_dev *rtwdev, u32 addr, u32 mask, -+ u32 val) -+{ -+ rtw89_phy_write32_idx(rtwdev, addr, mask, val, RTW89_PHY_0); -+ -+ if (!rtwdev->dbcc_en) -+ return; -+ -+ rtw89_phy_write32_idx(rtwdev, addr, mask, val, RTW89_PHY_1); -+} -+ -+void rtw89_phy_write_reg3_tbl(struct rtw89_dev *rtwdev, -+ const struct rtw89_phy_reg3_tbl *tbl) -+{ -+ const struct rtw89_reg3_def *reg3; -+ int i; -+ -+ for (i = 0; i < tbl->size; i++) { -+ reg3 = &tbl->reg3[i]; -+ rtw89_phy_write32_mask(rtwdev, reg3->addr, reg3->mask, reg3->data); -+ } -+} -+ -+const u8 rtw89_rs_idx_max[] = { -+ [RTW89_RS_CCK] = RTW89_RATE_CCK_MAX, -+ [RTW89_RS_OFDM] = RTW89_RATE_OFDM_MAX, -+ [RTW89_RS_MCS] = RTW89_RATE_MCS_MAX, -+ [RTW89_RS_HEDCM] = RTW89_RATE_HEDCM_MAX, -+ [RTW89_RS_OFFSET] = RTW89_RATE_OFFSET_MAX, -+}; -+ -+const u8 rtw89_rs_nss_max[] = { -+ [RTW89_RS_CCK] = 1, -+ [RTW89_RS_OFDM] = 1, -+ [RTW89_RS_MCS] = RTW89_NSS_MAX, -+ [RTW89_RS_HEDCM] = RTW89_NSS_HEDCM_MAX, -+ [RTW89_RS_OFFSET] = 1, -+}; -+ -+static const u8 _byr_of_rs[] = { -+ [RTW89_RS_CCK] = offsetof(struct rtw89_txpwr_byrate, cck), -+ [RTW89_RS_OFDM] = offsetof(struct rtw89_txpwr_byrate, ofdm), -+ [RTW89_RS_MCS] = offsetof(struct rtw89_txpwr_byrate, mcs), -+ [RTW89_RS_HEDCM] = offsetof(struct rtw89_txpwr_byrate, hedcm), -+ [RTW89_RS_OFFSET] = offsetof(struct rtw89_txpwr_byrate, offset), -+}; -+ -+#define _byr_seek(rs, raw) ((s8 *)(raw) + _byr_of_rs[rs]) -+#define _byr_idx(rs, nss, idx) ((nss) * rtw89_rs_idx_max[rs] + (idx)) -+#define _byr_chk(rs, nss, idx) \ -+ ((nss) < rtw89_rs_nss_max[rs] && (idx) < rtw89_rs_idx_max[rs]) -+ -+void rtw89_phy_load_txpwr_byrate(struct rtw89_dev *rtwdev, -+ const struct rtw89_txpwr_table *tbl) -+{ -+ const struct rtw89_txpwr_byrate_cfg *cfg = tbl->data; -+ const struct rtw89_txpwr_byrate_cfg *end = cfg + tbl->size; -+ s8 *byr; -+ u32 data; -+ u8 i, idx; -+ -+ for (; cfg < end; cfg++) { -+ byr = _byr_seek(cfg->rs, &rtwdev->byr[cfg->band]); -+ data = cfg->data; -+ -+ for (i = 0; i < cfg->len; i++, data >>= 8) { -+ idx = _byr_idx(cfg->rs, cfg->nss, (cfg->shf + i)); -+ byr[idx] = (s8)(data & 0xff); -+ } -+ } -+} -+ -+#define _phy_txpwr_rf_to_mac(rtwdev, txpwr_rf) \ -+({ \ -+ const struct rtw89_chip_info *__c = (rtwdev)->chip; \ -+ (txpwr_rf) >> (__c->txpwr_factor_rf - __c->txpwr_factor_mac); \ -+}) -+ -+s8 rtw89_phy_read_txpwr_byrate(struct rtw89_dev *rtwdev, -+ const struct rtw89_rate_desc *rate_desc) -+{ -+ enum rtw89_band band = rtwdev->hal.current_band_type; -+ s8 *byr; -+ u8 idx; -+ -+ if (rate_desc->rs == RTW89_RS_CCK) -+ band = RTW89_BAND_2G; -+ -+ if (!_byr_chk(rate_desc->rs, rate_desc->nss, rate_desc->idx)) { -+ rtw89_debug(rtwdev, RTW89_DBG_TXPWR, -+ "[TXPWR] unknown byrate desc rs=%d nss=%d idx=%d\n", -+ rate_desc->rs, rate_desc->nss, rate_desc->idx); -+ -+ return 0; -+ } -+ -+ byr = _byr_seek(rate_desc->rs, &rtwdev->byr[band]); -+ idx = _byr_idx(rate_desc->rs, rate_desc->nss, rate_desc->idx); -+ -+ return _phy_txpwr_rf_to_mac(rtwdev, byr[idx]); -+} -+ -+static u8 rtw89_channel_to_idx(struct rtw89_dev *rtwdev, u8 channel) -+{ -+ switch (channel) { -+ case 1 ... 14: -+ return channel - 1; -+ case 36 ... 64: -+ return (channel - 36) / 2; -+ case 100 ... 144: -+ return ((channel - 100) / 2) + 15; -+ case 149 ... 177: -+ return ((channel - 149) / 2) + 38; -+ default: -+ rtw89_warn(rtwdev, "unknown channel: %d\n", channel); -+ return 0; -+ } -+} -+ -+s8 rtw89_phy_read_txpwr_limit(struct rtw89_dev *rtwdev, -+ u8 bw, u8 ntx, u8 rs, u8 bf, u8 ch) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ u8 ch_idx = rtw89_channel_to_idx(rtwdev, ch); -+ u8 band = rtwdev->hal.current_band_type; -+ u8 regd = rtw89_regd_get(rtwdev, band); -+ s8 lmt = 0, sar; -+ -+ switch (band) { -+ case RTW89_BAND_2G: -+ lmt = (*chip->txpwr_lmt_2g)[bw][ntx][rs][bf][regd][ch_idx]; -+ break; -+ case RTW89_BAND_5G: -+ lmt = (*chip->txpwr_lmt_5g)[bw][ntx][rs][bf][regd][ch_idx]; -+ break; -+ default: -+ rtw89_warn(rtwdev, "unknown band type: %d\n", band); -+ return 0; -+ } -+ -+ lmt = _phy_txpwr_rf_to_mac(rtwdev, lmt); -+ sar = rtw89_query_sar(rtwdev); -+ -+ return min(lmt, sar); -+} -+ -+#define __fill_txpwr_limit_nonbf_bf(ptr, bw, ntx, rs, ch) \ -+ do { \ -+ u8 __i; \ -+ for (__i = 0; __i < RTW89_BF_NUM; __i++) \ -+ ptr[__i] = rtw89_phy_read_txpwr_limit(rtwdev, \ -+ bw, ntx, \ -+ rs, __i, \ -+ (ch)); \ -+ } while (0) -+ -+static void rtw89_phy_fill_txpwr_limit_20m(struct rtw89_dev *rtwdev, -+ struct rtw89_txpwr_limit *lmt, -+ u8 ntx, u8 ch) -+{ -+ __fill_txpwr_limit_nonbf_bf(lmt->cck_20m, RTW89_CHANNEL_WIDTH_20, -+ ntx, RTW89_RS_CCK, ch); -+ __fill_txpwr_limit_nonbf_bf(lmt->cck_40m, RTW89_CHANNEL_WIDTH_40, -+ ntx, RTW89_RS_CCK, ch); -+ __fill_txpwr_limit_nonbf_bf(lmt->ofdm, RTW89_CHANNEL_WIDTH_20, -+ ntx, RTW89_RS_OFDM, ch); -+ __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[0], RTW89_CHANNEL_WIDTH_20, -+ ntx, RTW89_RS_MCS, ch); -+} -+ -+static void rtw89_phy_fill_txpwr_limit_40m(struct rtw89_dev *rtwdev, -+ struct rtw89_txpwr_limit *lmt, -+ u8 ntx, u8 ch) -+{ -+ __fill_txpwr_limit_nonbf_bf(lmt->cck_20m, RTW89_CHANNEL_WIDTH_20, -+ ntx, RTW89_RS_CCK, ch - 2); -+ __fill_txpwr_limit_nonbf_bf(lmt->cck_40m, RTW89_CHANNEL_WIDTH_40, -+ ntx, RTW89_RS_CCK, ch); -+ __fill_txpwr_limit_nonbf_bf(lmt->ofdm, RTW89_CHANNEL_WIDTH_20, -+ ntx, RTW89_RS_OFDM, ch - 2); -+ __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[0], RTW89_CHANNEL_WIDTH_20, -+ ntx, RTW89_RS_MCS, ch - 2); -+ __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[1], RTW89_CHANNEL_WIDTH_20, -+ ntx, RTW89_RS_MCS, ch + 2); -+ __fill_txpwr_limit_nonbf_bf(lmt->mcs_40m[0], RTW89_CHANNEL_WIDTH_40, -+ ntx, RTW89_RS_MCS, ch); -+} -+ -+static void rtw89_phy_fill_txpwr_limit_80m(struct rtw89_dev *rtwdev, -+ struct rtw89_txpwr_limit *lmt, -+ u8 ntx, u8 ch) -+{ -+ s8 val_0p5_n[RTW89_BF_NUM]; -+ s8 val_0p5_p[RTW89_BF_NUM]; -+ u8 i; -+ -+ __fill_txpwr_limit_nonbf_bf(lmt->ofdm, RTW89_CHANNEL_WIDTH_20, -+ ntx, RTW89_RS_OFDM, ch - 6); -+ __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[0], RTW89_CHANNEL_WIDTH_20, -+ ntx, RTW89_RS_MCS, ch - 6); -+ __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[1], RTW89_CHANNEL_WIDTH_20, -+ ntx, RTW89_RS_MCS, ch - 2); -+ __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[2], RTW89_CHANNEL_WIDTH_20, -+ ntx, RTW89_RS_MCS, ch + 2); -+ __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[3], RTW89_CHANNEL_WIDTH_20, -+ ntx, RTW89_RS_MCS, ch + 6); -+ __fill_txpwr_limit_nonbf_bf(lmt->mcs_40m[0], RTW89_CHANNEL_WIDTH_40, -+ ntx, RTW89_RS_MCS, ch - 4); -+ __fill_txpwr_limit_nonbf_bf(lmt->mcs_40m[1], RTW89_CHANNEL_WIDTH_40, -+ ntx, RTW89_RS_MCS, ch + 4); -+ __fill_txpwr_limit_nonbf_bf(lmt->mcs_80m[0], RTW89_CHANNEL_WIDTH_80, -+ ntx, RTW89_RS_MCS, ch); -+ -+ __fill_txpwr_limit_nonbf_bf(val_0p5_n, RTW89_CHANNEL_WIDTH_40, -+ ntx, RTW89_RS_MCS, ch - 4); -+ __fill_txpwr_limit_nonbf_bf(val_0p5_p, RTW89_CHANNEL_WIDTH_40, -+ ntx, RTW89_RS_MCS, ch + 4); -+ -+ for (i = 0; i < RTW89_BF_NUM; i++) -+ lmt->mcs_40m_0p5[i] = min_t(s8, val_0p5_n[i], val_0p5_p[i]); -+} -+ -+void rtw89_phy_fill_txpwr_limit(struct rtw89_dev *rtwdev, -+ struct rtw89_txpwr_limit *lmt, -+ u8 ntx) -+{ -+ u8 ch = rtwdev->hal.current_channel; -+ u8 bw = rtwdev->hal.current_band_width; -+ -+ memset(lmt, 0, sizeof(*lmt)); -+ -+ switch (bw) { -+ case RTW89_CHANNEL_WIDTH_20: -+ rtw89_phy_fill_txpwr_limit_20m(rtwdev, lmt, ntx, ch); -+ break; -+ case RTW89_CHANNEL_WIDTH_40: -+ rtw89_phy_fill_txpwr_limit_40m(rtwdev, lmt, ntx, ch); -+ break; -+ case RTW89_CHANNEL_WIDTH_80: -+ rtw89_phy_fill_txpwr_limit_80m(rtwdev, lmt, ntx, ch); -+ break; -+ } -+} -+ -+static s8 rtw89_phy_read_txpwr_limit_ru(struct rtw89_dev *rtwdev, -+ u8 ru, u8 ntx, u8 ch) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ u8 ch_idx = rtw89_channel_to_idx(rtwdev, ch); -+ u8 band = rtwdev->hal.current_band_type; -+ u8 regd = rtw89_regd_get(rtwdev, band); -+ s8 lmt_ru = 0, sar; -+ -+ switch (band) { -+ case RTW89_BAND_2G: -+ lmt_ru = (*chip->txpwr_lmt_ru_2g)[ru][ntx][regd][ch_idx]; -+ break; -+ case RTW89_BAND_5G: -+ lmt_ru = (*chip->txpwr_lmt_ru_5g)[ru][ntx][regd][ch_idx]; -+ break; -+ default: -+ rtw89_warn(rtwdev, "unknown band type: %d\n", band); -+ return 0; -+ } -+ -+ lmt_ru = _phy_txpwr_rf_to_mac(rtwdev, lmt_ru); -+ sar = rtw89_query_sar(rtwdev); -+ -+ return min(lmt_ru, sar); -+} -+ -+static void -+rtw89_phy_fill_txpwr_limit_ru_20m(struct rtw89_dev *rtwdev, -+ struct rtw89_txpwr_limit_ru *lmt_ru, -+ u8 ntx, u8 ch) -+{ -+ lmt_ru->ru26[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, RTW89_RU26, -+ ntx, ch); -+ lmt_ru->ru52[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, RTW89_RU52, -+ ntx, ch); -+ lmt_ru->ru106[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, RTW89_RU106, -+ ntx, ch); -+} -+ -+static void -+rtw89_phy_fill_txpwr_limit_ru_40m(struct rtw89_dev *rtwdev, -+ struct rtw89_txpwr_limit_ru *lmt_ru, -+ u8 ntx, u8 ch) -+{ -+ lmt_ru->ru26[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, RTW89_RU26, -+ ntx, ch - 2); -+ lmt_ru->ru26[1] = rtw89_phy_read_txpwr_limit_ru(rtwdev, RTW89_RU26, -+ ntx, ch + 2); -+ lmt_ru->ru52[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, RTW89_RU52, -+ ntx, ch - 2); -+ lmt_ru->ru52[1] = rtw89_phy_read_txpwr_limit_ru(rtwdev, RTW89_RU52, -+ ntx, ch + 2); -+ lmt_ru->ru106[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, RTW89_RU106, -+ ntx, ch - 2); -+ lmt_ru->ru106[1] = rtw89_phy_read_txpwr_limit_ru(rtwdev, RTW89_RU106, -+ ntx, ch + 2); -+} -+ -+static void -+rtw89_phy_fill_txpwr_limit_ru_80m(struct rtw89_dev *rtwdev, -+ struct rtw89_txpwr_limit_ru *lmt_ru, -+ u8 ntx, u8 ch) -+{ -+ lmt_ru->ru26[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, RTW89_RU26, -+ ntx, ch - 6); -+ lmt_ru->ru26[1] = rtw89_phy_read_txpwr_limit_ru(rtwdev, RTW89_RU26, -+ ntx, ch - 2); -+ lmt_ru->ru26[2] = rtw89_phy_read_txpwr_limit_ru(rtwdev, RTW89_RU26, -+ ntx, ch + 2); -+ lmt_ru->ru26[3] = rtw89_phy_read_txpwr_limit_ru(rtwdev, RTW89_RU26, -+ ntx, ch + 6); -+ lmt_ru->ru52[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, RTW89_RU52, -+ ntx, ch - 6); -+ lmt_ru->ru52[1] = rtw89_phy_read_txpwr_limit_ru(rtwdev, RTW89_RU52, -+ ntx, ch - 2); -+ lmt_ru->ru52[2] = rtw89_phy_read_txpwr_limit_ru(rtwdev, RTW89_RU52, -+ ntx, ch + 2); -+ lmt_ru->ru52[3] = rtw89_phy_read_txpwr_limit_ru(rtwdev, RTW89_RU52, -+ ntx, ch + 6); -+ lmt_ru->ru106[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, RTW89_RU106, -+ ntx, ch - 6); -+ lmt_ru->ru106[1] = rtw89_phy_read_txpwr_limit_ru(rtwdev, RTW89_RU106, -+ ntx, ch - 2); -+ lmt_ru->ru106[2] = rtw89_phy_read_txpwr_limit_ru(rtwdev, RTW89_RU106, -+ ntx, ch + 2); -+ lmt_ru->ru106[3] = rtw89_phy_read_txpwr_limit_ru(rtwdev, RTW89_RU106, -+ ntx, ch + 6); -+} -+ -+void rtw89_phy_fill_txpwr_limit_ru(struct rtw89_dev *rtwdev, -+ struct rtw89_txpwr_limit_ru *lmt_ru, -+ u8 ntx) -+{ -+ u8 ch = rtwdev->hal.current_channel; -+ u8 bw = rtwdev->hal.current_band_width; -+ -+ memset(lmt_ru, 0, sizeof(*lmt_ru)); -+ -+ switch (bw) { -+ case RTW89_CHANNEL_WIDTH_20: -+ rtw89_phy_fill_txpwr_limit_ru_20m(rtwdev, lmt_ru, ntx, ch); -+ break; -+ case RTW89_CHANNEL_WIDTH_40: -+ rtw89_phy_fill_txpwr_limit_ru_40m(rtwdev, lmt_ru, ntx, ch); -+ break; -+ case RTW89_CHANNEL_WIDTH_80: -+ rtw89_phy_fill_txpwr_limit_ru_80m(rtwdev, lmt_ru, ntx, ch); -+ break; -+ } -+} -+ -+struct rtw89_phy_iter_ra_data { -+ struct rtw89_dev *rtwdev; -+ struct sk_buff *c2h; -+}; -+ -+static void rtw89_phy_c2h_ra_rpt_iter(void *data, struct ieee80211_sta *sta) -+{ -+ struct rtw89_phy_iter_ra_data *ra_data = (struct rtw89_phy_iter_ra_data *)data; -+ struct rtw89_dev *rtwdev = ra_data->rtwdev; -+ struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; -+ struct rtw89_ra_report *ra_report = &rtwsta->ra_report; -+ struct sk_buff *c2h = ra_data->c2h; -+ u8 mode, rate, bw, giltf, mac_id; -+ -+ mac_id = RTW89_GET_PHY_C2H_RA_RPT_MACID(c2h->data); -+ if (mac_id != rtwsta->mac_id) -+ return; -+ -+ memset(ra_report, 0, sizeof(*ra_report)); -+ -+ rate = RTW89_GET_PHY_C2H_RA_RPT_MCSNSS(c2h->data); -+ bw = RTW89_GET_PHY_C2H_RA_RPT_BW(c2h->data); -+ giltf = RTW89_GET_PHY_C2H_RA_RPT_GILTF(c2h->data); -+ mode = RTW89_GET_PHY_C2H_RA_RPT_MD_SEL(c2h->data); -+ -+ switch (mode) { -+ case RTW89_RA_RPT_MODE_LEGACY: -+ ra_report->txrate.legacy = rtw89_ra_report_to_bitrate(rtwdev, rate); -+ break; -+ case RTW89_RA_RPT_MODE_HT: -+ ra_report->txrate.flags |= RATE_INFO_FLAGS_MCS; -+ if (rtwdev->fw.old_ht_ra_format) -+ rate = RTW89_MK_HT_RATE(FIELD_GET(RTW89_RA_RATE_MASK_NSS, rate), -+ FIELD_GET(RTW89_RA_RATE_MASK_MCS, rate)); -+ else -+ rate = FIELD_GET(RTW89_RA_RATE_MASK_HT_MCS, rate); -+ ra_report->txrate.mcs = rate; -+ if (giltf) -+ ra_report->txrate.flags |= RATE_INFO_FLAGS_SHORT_GI; -+ break; -+ case RTW89_RA_RPT_MODE_VHT: -+ ra_report->txrate.flags |= RATE_INFO_FLAGS_VHT_MCS; -+ ra_report->txrate.mcs = FIELD_GET(RTW89_RA_RATE_MASK_MCS, rate); -+ ra_report->txrate.nss = FIELD_GET(RTW89_RA_RATE_MASK_NSS, rate) + 1; -+ if (giltf) -+ ra_report->txrate.flags |= RATE_INFO_FLAGS_SHORT_GI; -+ break; -+ case RTW89_RA_RPT_MODE_HE: -+ ra_report->txrate.flags |= RATE_INFO_FLAGS_HE_MCS; -+ ra_report->txrate.mcs = FIELD_GET(RTW89_RA_RATE_MASK_MCS, rate); -+ ra_report->txrate.nss = FIELD_GET(RTW89_RA_RATE_MASK_NSS, rate) + 1; -+ if (giltf == RTW89_GILTF_2XHE08 || giltf == RTW89_GILTF_1XHE08) -+ ra_report->txrate.he_gi = NL80211_RATE_INFO_HE_GI_0_8; -+ else if (giltf == RTW89_GILTF_2XHE16 || giltf == RTW89_GILTF_1XHE16) -+ ra_report->txrate.he_gi = NL80211_RATE_INFO_HE_GI_1_6; -+ else -+ ra_report->txrate.he_gi = NL80211_RATE_INFO_HE_GI_3_2; -+ break; -+ } -+ -+ if (bw == RTW89_CHANNEL_WIDTH_80) -+ ra_report->txrate.bw = RATE_INFO_BW_80; -+ else if (bw == RTW89_CHANNEL_WIDTH_40) -+ ra_report->txrate.bw = RATE_INFO_BW_40; -+ else -+ ra_report->txrate.bw = RATE_INFO_BW_20; -+ -+ ra_report->bit_rate = cfg80211_calculate_bitrate(&ra_report->txrate); -+ ra_report->hw_rate = FIELD_PREP(RTW89_HW_RATE_MASK_MOD, mode) | -+ FIELD_PREP(RTW89_HW_RATE_MASK_VAL, rate); -+ sta->max_rc_amsdu_len = get_max_amsdu_len(rtwdev, ra_report); -+ rtwsta->max_agg_wait = sta->max_rc_amsdu_len / 1500 - 1; -+} -+ -+static void -+rtw89_phy_c2h_ra_rpt(struct rtw89_dev *rtwdev, struct sk_buff *c2h, u32 len) -+{ -+ struct rtw89_phy_iter_ra_data ra_data; -+ -+ ra_data.rtwdev = rtwdev; -+ ra_data.c2h = c2h; -+ ieee80211_iterate_stations_atomic(rtwdev->hw, -+ rtw89_phy_c2h_ra_rpt_iter, -+ &ra_data); -+} -+ -+static -+void (* const rtw89_phy_c2h_ra_handler[])(struct rtw89_dev *rtwdev, -+ struct sk_buff *c2h, u32 len) = { -+ [RTW89_PHY_C2H_FUNC_STS_RPT] = rtw89_phy_c2h_ra_rpt, -+ [RTW89_PHY_C2H_FUNC_MU_GPTBL_RPT] = NULL, -+ [RTW89_PHY_C2H_FUNC_TXSTS] = NULL, -+}; -+ -+void rtw89_phy_c2h_handle(struct rtw89_dev *rtwdev, struct sk_buff *skb, -+ u32 len, u8 class, u8 func) -+{ -+ void (*handler)(struct rtw89_dev *rtwdev, -+ struct sk_buff *c2h, u32 len) = NULL; -+ -+ switch (class) { -+ case RTW89_PHY_C2H_CLASS_RA: -+ if (func < RTW89_PHY_C2H_FUNC_RA_MAX) -+ handler = rtw89_phy_c2h_ra_handler[func]; -+ break; -+ default: -+ rtw89_info(rtwdev, "c2h class %d not support\n", class); -+ return; -+ } -+ if (!handler) { -+ rtw89_info(rtwdev, "c2h class %d func %d not support\n", class, -+ func); -+ return; -+ } -+ handler(rtwdev, skb, len); -+} -+ -+static u8 rtw89_phy_cfo_get_xcap_reg(struct rtw89_dev *rtwdev, bool sc_xo) -+{ -+ u32 reg_mask; -+ -+ if (sc_xo) -+ reg_mask = B_AX_XTAL_SC_XO_MASK; -+ else -+ reg_mask = B_AX_XTAL_SC_XI_MASK; -+ -+ return (u8)rtw89_read32_mask(rtwdev, R_AX_XTAL_ON_CTRL0, reg_mask); -+} -+ -+static void rtw89_phy_cfo_set_xcap_reg(struct rtw89_dev *rtwdev, bool sc_xo, -+ u8 val) -+{ -+ u32 reg_mask; -+ -+ if (sc_xo) -+ reg_mask = B_AX_XTAL_SC_XO_MASK; -+ else -+ reg_mask = B_AX_XTAL_SC_XI_MASK; -+ -+ rtw89_write32_mask(rtwdev, R_AX_XTAL_ON_CTRL0, reg_mask, val); -+} -+ -+static void rtw89_phy_cfo_set_crystal_cap(struct rtw89_dev *rtwdev, -+ u8 crystal_cap, bool force) -+{ -+ struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; -+ u8 sc_xi_val, sc_xo_val; -+ -+ if (!force && cfo->crystal_cap == crystal_cap) -+ return; -+ crystal_cap = clamp_t(u8, crystal_cap, 0, 127); -+ rtw89_phy_cfo_set_xcap_reg(rtwdev, true, crystal_cap); -+ rtw89_phy_cfo_set_xcap_reg(rtwdev, false, crystal_cap); -+ sc_xo_val = rtw89_phy_cfo_get_xcap_reg(rtwdev, true); -+ sc_xi_val = rtw89_phy_cfo_get_xcap_reg(rtwdev, false); -+ cfo->crystal_cap = sc_xi_val; -+ cfo->x_cap_ofst = (s8)((int)cfo->crystal_cap - cfo->def_x_cap); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_CFO, "Set sc_xi=0x%x\n", sc_xi_val); -+ rtw89_debug(rtwdev, RTW89_DBG_CFO, "Set sc_xo=0x%x\n", sc_xo_val); -+ rtw89_debug(rtwdev, RTW89_DBG_CFO, "Get xcap_ofst=%d\n", -+ cfo->x_cap_ofst); -+ rtw89_debug(rtwdev, RTW89_DBG_CFO, "Set xcap OK\n"); -+} -+ -+static void rtw89_phy_cfo_reset(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; -+ u8 cap; -+ -+ cfo->def_x_cap = cfo->crystal_cap_default & B_AX_XTAL_SC_MASK; -+ cfo->is_adjust = false; -+ if (cfo->crystal_cap == cfo->def_x_cap) -+ return; -+ cap = cfo->crystal_cap; -+ cap += (cap > cfo->def_x_cap ? -1 : 1); -+ rtw89_phy_cfo_set_crystal_cap(rtwdev, cap, false); -+ rtw89_debug(rtwdev, RTW89_DBG_CFO, -+ "(0x%x) approach to dflt_val=(0x%x)\n", cfo->crystal_cap, -+ cfo->def_x_cap); -+} -+ -+static void rtw89_dcfo_comp(struct rtw89_dev *rtwdev, s32 curr_cfo) -+{ -+ bool is_linked = rtwdev->total_sta_assoc > 0; -+ s32 cfo_avg_312; -+ s32 dcfo_comp; -+ int sign; -+ -+ if (!is_linked) { -+ rtw89_debug(rtwdev, RTW89_DBG_CFO, "DCFO: is_linked=%d\n", -+ is_linked); -+ return; -+ } -+ rtw89_debug(rtwdev, RTW89_DBG_CFO, "DCFO: curr_cfo=%d\n", curr_cfo); -+ if (curr_cfo == 0) -+ return; -+ dcfo_comp = rtw89_phy_read32_mask(rtwdev, R_DCFO, B_DCFO); -+ sign = curr_cfo > 0 ? 1 : -1; -+ cfo_avg_312 = (curr_cfo << 3) / 5 + sign * dcfo_comp; -+ rtw89_debug(rtwdev, RTW89_DBG_CFO, "DCFO: avg_cfo=%d\n", cfo_avg_312); -+ if (rtwdev->chip->chip_id == RTL8852A && rtwdev->hal.cv == CHIP_CBV) -+ cfo_avg_312 = -cfo_avg_312; -+ rtw89_phy_set_phy_regs(rtwdev, R_DCFO_COMP_S0, B_DCFO_COMP_S0_MSK, -+ cfo_avg_312); -+} -+ -+static void rtw89_dcfo_comp_init(struct rtw89_dev *rtwdev) -+{ -+ rtw89_phy_set_phy_regs(rtwdev, R_DCFO_OPT, B_DCFO_OPT_EN, 1); -+ rtw89_phy_set_phy_regs(rtwdev, R_DCFO_WEIGHT, B_DCFO_WEIGHT_MSK, 8); -+ rtw89_write32_clr(rtwdev, R_AX_PWR_UL_CTRL2, B_AX_PWR_UL_CFO_MASK); -+} -+ -+static void rtw89_phy_cfo_init(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; -+ struct rtw89_efuse *efuse = &rtwdev->efuse; -+ -+ cfo->crystal_cap_default = efuse->xtal_cap & B_AX_XTAL_SC_MASK; -+ cfo->crystal_cap = cfo->crystal_cap_default; -+ cfo->def_x_cap = cfo->crystal_cap; -+ cfo->is_adjust = false; -+ cfo->x_cap_ofst = 0; -+ cfo->rtw89_multi_cfo_mode = RTW89_TP_BASED_AVG_MODE; -+ cfo->apply_compensation = false; -+ cfo->residual_cfo_acc = 0; -+ rtw89_debug(rtwdev, RTW89_DBG_CFO, "Default xcap=%0x\n", -+ cfo->crystal_cap_default); -+ rtw89_phy_cfo_set_crystal_cap(rtwdev, cfo->crystal_cap_default, true); -+ rtw89_phy_set_phy_regs(rtwdev, R_DCFO, B_DCFO, 1); -+ rtw89_dcfo_comp_init(rtwdev); -+ cfo->cfo_timer_ms = 2000; -+ cfo->cfo_trig_by_timer_en = false; -+ cfo->phy_cfo_trk_cnt = 0; -+ cfo->phy_cfo_status = RTW89_PHY_DCFO_STATE_NORMAL; -+} -+ -+static void rtw89_phy_cfo_crystal_cap_adjust(struct rtw89_dev *rtwdev, -+ s32 curr_cfo) -+{ -+ struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; -+ s8 crystal_cap = cfo->crystal_cap; -+ s32 cfo_abs = abs(curr_cfo); -+ int sign; -+ -+ if (!cfo->is_adjust) { -+ if (cfo_abs > CFO_TRK_ENABLE_TH) -+ cfo->is_adjust = true; -+ } else { -+ if (cfo_abs < CFO_TRK_STOP_TH) -+ cfo->is_adjust = false; -+ } -+ if (!cfo->is_adjust) { -+ rtw89_debug(rtwdev, RTW89_DBG_CFO, "Stop CFO tracking\n"); -+ return; -+ } -+ sign = curr_cfo > 0 ? 1 : -1; -+ if (cfo_abs > CFO_TRK_STOP_TH_4) -+ crystal_cap += 7 * sign; -+ else if (cfo_abs > CFO_TRK_STOP_TH_3) -+ crystal_cap += 5 * sign; -+ else if (cfo_abs > CFO_TRK_STOP_TH_2) -+ crystal_cap += 3 * sign; -+ else if (cfo_abs > CFO_TRK_STOP_TH_1) -+ crystal_cap += 1 * sign; -+ else -+ return; -+ rtw89_phy_cfo_set_crystal_cap(rtwdev, (u8)crystal_cap, false); -+ rtw89_debug(rtwdev, RTW89_DBG_CFO, -+ "X_cap{Curr,Default}={0x%x,0x%x}\n", -+ cfo->crystal_cap, cfo->def_x_cap); -+} -+ -+static s32 rtw89_phy_average_cfo_calc(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; -+ s32 cfo_khz_all = 0; -+ s32 cfo_cnt_all = 0; -+ s32 cfo_all_avg = 0; -+ u8 i; -+ -+ if (rtwdev->total_sta_assoc != 1) -+ return 0; -+ rtw89_debug(rtwdev, RTW89_DBG_CFO, "one_entry_only\n"); -+ for (i = 0; i < CFO_TRACK_MAX_USER; i++) { -+ if (cfo->cfo_cnt[i] == 0) -+ continue; -+ cfo_khz_all += cfo->cfo_tail[i]; -+ cfo_cnt_all += cfo->cfo_cnt[i]; -+ cfo_all_avg = phy_div(cfo_khz_all, cfo_cnt_all); -+ cfo->pre_cfo_avg[i] = cfo->cfo_avg[i]; -+ } -+ rtw89_debug(rtwdev, RTW89_DBG_CFO, -+ "CFO track for macid = %d\n", i); -+ rtw89_debug(rtwdev, RTW89_DBG_CFO, -+ "Total cfo=%dK, pkt_cnt=%d, avg_cfo=%dK\n", -+ cfo_khz_all, cfo_cnt_all, cfo_all_avg); -+ return cfo_all_avg; -+} -+ -+static s32 rtw89_phy_multi_sta_cfo_calc(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; -+ struct rtw89_traffic_stats *stats = &rtwdev->stats; -+ s32 target_cfo = 0; -+ s32 cfo_khz_all = 0; -+ s32 cfo_khz_all_tp_wgt = 0; -+ s32 cfo_avg = 0; -+ s32 max_cfo_lb = BIT(31); -+ s32 min_cfo_ub = GENMASK(30, 0); -+ u16 cfo_cnt_all = 0; -+ u8 active_entry_cnt = 0; -+ u8 sta_cnt = 0; -+ u32 tp_all = 0; -+ u8 i; -+ u8 cfo_tol = 0; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_CFO, "Multi entry cfo_trk\n"); -+ if (cfo->rtw89_multi_cfo_mode == RTW89_PKT_BASED_AVG_MODE) { -+ rtw89_debug(rtwdev, RTW89_DBG_CFO, "Pkt based avg mode\n"); -+ for (i = 0; i < CFO_TRACK_MAX_USER; i++) { -+ if (cfo->cfo_cnt[i] == 0) -+ continue; -+ cfo_khz_all += cfo->cfo_tail[i]; -+ cfo_cnt_all += cfo->cfo_cnt[i]; -+ cfo_avg = phy_div(cfo_khz_all, (s32)cfo_cnt_all); -+ rtw89_debug(rtwdev, RTW89_DBG_CFO, -+ "Msta cfo=%d, pkt_cnt=%d, avg_cfo=%d\n", -+ cfo_khz_all, cfo_cnt_all, cfo_avg); -+ target_cfo = cfo_avg; -+ } -+ } else if (cfo->rtw89_multi_cfo_mode == RTW89_ENTRY_BASED_AVG_MODE) { -+ rtw89_debug(rtwdev, RTW89_DBG_CFO, "Entry based avg mode\n"); -+ for (i = 0; i < CFO_TRACK_MAX_USER; i++) { -+ if (cfo->cfo_cnt[i] == 0) -+ continue; -+ cfo->cfo_avg[i] = phy_div(cfo->cfo_tail[i], -+ (s32)cfo->cfo_cnt[i]); -+ cfo_khz_all += cfo->cfo_avg[i]; -+ rtw89_debug(rtwdev, RTW89_DBG_CFO, -+ "Macid=%d, cfo_avg=%d\n", i, -+ cfo->cfo_avg[i]); -+ } -+ sta_cnt = rtwdev->total_sta_assoc; -+ cfo_avg = phy_div(cfo_khz_all, (s32)sta_cnt); -+ rtw89_debug(rtwdev, RTW89_DBG_CFO, -+ "Msta cfo_acc=%d, ent_cnt=%d, avg_cfo=%d\n", -+ cfo_khz_all, sta_cnt, cfo_avg); -+ target_cfo = cfo_avg; -+ } else if (cfo->rtw89_multi_cfo_mode == RTW89_TP_BASED_AVG_MODE) { -+ rtw89_debug(rtwdev, RTW89_DBG_CFO, "TP based avg mode\n"); -+ cfo_tol = cfo->sta_cfo_tolerance; -+ for (i = 0; i < CFO_TRACK_MAX_USER; i++) { -+ sta_cnt++; -+ if (cfo->cfo_cnt[i] != 0) { -+ cfo->cfo_avg[i] = phy_div(cfo->cfo_tail[i], -+ (s32)cfo->cfo_cnt[i]); -+ active_entry_cnt++; -+ } else { -+ cfo->cfo_avg[i] = cfo->pre_cfo_avg[i]; -+ } -+ max_cfo_lb = max(cfo->cfo_avg[i] - cfo_tol, max_cfo_lb); -+ min_cfo_ub = min(cfo->cfo_avg[i] + cfo_tol, min_cfo_ub); -+ cfo_khz_all += cfo->cfo_avg[i]; -+ /* need tp for each entry */ -+ rtw89_debug(rtwdev, RTW89_DBG_CFO, -+ "[%d] cfo_avg=%d, tp=tbd\n", -+ i, cfo->cfo_avg[i]); -+ if (sta_cnt >= rtwdev->total_sta_assoc) -+ break; -+ } -+ tp_all = stats->rx_throughput; /* need tp for each entry */ -+ cfo_avg = phy_div(cfo_khz_all_tp_wgt, (s32)tp_all); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_CFO, "Assoc sta cnt=%d\n", -+ sta_cnt); -+ rtw89_debug(rtwdev, RTW89_DBG_CFO, "Active sta cnt=%d\n", -+ active_entry_cnt); -+ rtw89_debug(rtwdev, RTW89_DBG_CFO, -+ "Msta cfo with tp_wgt=%d, avg_cfo=%d\n", -+ cfo_khz_all_tp_wgt, cfo_avg); -+ rtw89_debug(rtwdev, RTW89_DBG_CFO, "cfo_lb=%d,cfo_ub=%d\n", -+ max_cfo_lb, min_cfo_ub); -+ if (max_cfo_lb <= min_cfo_ub) { -+ rtw89_debug(rtwdev, RTW89_DBG_CFO, -+ "cfo win_size=%d\n", -+ min_cfo_ub - max_cfo_lb); -+ target_cfo = clamp(cfo_avg, max_cfo_lb, min_cfo_ub); -+ } else { -+ rtw89_debug(rtwdev, RTW89_DBG_CFO, -+ "No intersection of cfo torlence windows\n"); -+ target_cfo = phy_div(cfo_khz_all, (s32)sta_cnt); -+ } -+ for (i = 0; i < CFO_TRACK_MAX_USER; i++) -+ cfo->pre_cfo_avg[i] = cfo->cfo_avg[i]; -+ } -+ rtw89_debug(rtwdev, RTW89_DBG_CFO, "Target cfo=%d\n", target_cfo); -+ return target_cfo; -+} -+ -+static void rtw89_phy_cfo_statistics_reset(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; -+ -+ memset(&cfo->cfo_tail, 0, sizeof(cfo->cfo_tail)); -+ memset(&cfo->cfo_cnt, 0, sizeof(cfo->cfo_cnt)); -+ cfo->packet_count = 0; -+ cfo->packet_count_pre = 0; -+ cfo->cfo_avg_pre = 0; -+} -+ -+static void rtw89_phy_cfo_dm(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; -+ s32 new_cfo = 0; -+ bool x_cap_update = false; -+ u8 pre_x_cap = cfo->crystal_cap; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_CFO, "CFO:total_sta_assoc=%d\n", -+ rtwdev->total_sta_assoc); -+ if (rtwdev->total_sta_assoc == 0) { -+ rtw89_phy_cfo_reset(rtwdev); -+ return; -+ } -+ if (cfo->packet_count == 0) { -+ rtw89_debug(rtwdev, RTW89_DBG_CFO, "Pkt cnt = 0\n"); -+ return; -+ } -+ if (cfo->packet_count == cfo->packet_count_pre) { -+ rtw89_debug(rtwdev, RTW89_DBG_CFO, "Pkt cnt doesn't change\n"); -+ return; -+ } -+ if (rtwdev->total_sta_assoc == 1) -+ new_cfo = rtw89_phy_average_cfo_calc(rtwdev); -+ else -+ new_cfo = rtw89_phy_multi_sta_cfo_calc(rtwdev); -+ if (new_cfo == 0) { -+ rtw89_debug(rtwdev, RTW89_DBG_CFO, "curr_cfo=0\n"); -+ return; -+ } -+ rtw89_phy_cfo_crystal_cap_adjust(rtwdev, new_cfo); -+ cfo->cfo_avg_pre = new_cfo; -+ x_cap_update = cfo->crystal_cap == pre_x_cap ? false : true; -+ rtw89_debug(rtwdev, RTW89_DBG_CFO, "Xcap_up=%d\n", x_cap_update); -+ rtw89_debug(rtwdev, RTW89_DBG_CFO, "Xcap: D:%x C:%x->%x, ofst=%d\n", -+ cfo->def_x_cap, pre_x_cap, cfo->crystal_cap, -+ cfo->x_cap_ofst); -+ if (x_cap_update) { -+ if (new_cfo > 0) -+ new_cfo -= CFO_SW_COMP_FINE_TUNE; -+ else -+ new_cfo += CFO_SW_COMP_FINE_TUNE; -+ } -+ rtw89_dcfo_comp(rtwdev, new_cfo); -+ rtw89_phy_cfo_statistics_reset(rtwdev); -+} -+ -+void rtw89_phy_cfo_track_work(struct work_struct *work) -+{ -+ struct rtw89_dev *rtwdev = container_of(work, struct rtw89_dev, -+ cfo_track_work.work); -+ struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; -+ -+ mutex_lock(&rtwdev->mutex); -+ if (!cfo->cfo_trig_by_timer_en) -+ goto out; -+ rtw89_leave_ps_mode(rtwdev); -+ rtw89_phy_cfo_dm(rtwdev); -+ ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->cfo_track_work, -+ msecs_to_jiffies(cfo->cfo_timer_ms)); -+out: -+ mutex_unlock(&rtwdev->mutex); -+} -+ -+static void rtw89_phy_cfo_start_work(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; -+ -+ ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->cfo_track_work, -+ msecs_to_jiffies(cfo->cfo_timer_ms)); -+} -+ -+void rtw89_phy_cfo_track(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; -+ struct rtw89_traffic_stats *stats = &rtwdev->stats; -+ -+ switch (cfo->phy_cfo_status) { -+ case RTW89_PHY_DCFO_STATE_NORMAL: -+ if (stats->tx_throughput >= CFO_TP_UPPER) { -+ cfo->phy_cfo_status = RTW89_PHY_DCFO_STATE_ENHANCE; -+ cfo->cfo_trig_by_timer_en = true; -+ cfo->cfo_timer_ms = CFO_COMP_PERIOD; -+ rtw89_phy_cfo_start_work(rtwdev); -+ } -+ break; -+ case RTW89_PHY_DCFO_STATE_ENHANCE: -+ if (cfo->phy_cfo_trk_cnt >= CFO_PERIOD_CNT) { -+ cfo->phy_cfo_trk_cnt = 0; -+ cfo->cfo_trig_by_timer_en = false; -+ } -+ if (cfo->cfo_trig_by_timer_en == 1) -+ cfo->phy_cfo_trk_cnt++; -+ if (stats->tx_throughput <= CFO_TP_LOWER) { -+ cfo->phy_cfo_status = RTW89_PHY_DCFO_STATE_NORMAL; -+ cfo->phy_cfo_trk_cnt = 0; -+ cfo->cfo_trig_by_timer_en = false; -+ } -+ break; -+ default: -+ cfo->phy_cfo_status = RTW89_PHY_DCFO_STATE_NORMAL; -+ cfo->phy_cfo_trk_cnt = 0; -+ break; -+ } -+ rtw89_debug(rtwdev, RTW89_DBG_CFO, -+ "[CFO]WatchDog tp=%d,state=%d,timer_en=%d,trk_cnt=%d,thermal=%ld\n", -+ stats->tx_throughput, cfo->phy_cfo_status, -+ cfo->cfo_trig_by_timer_en, cfo->phy_cfo_trk_cnt, -+ ewma_thermal_read(&rtwdev->phystat.avg_thermal[0])); -+ if (cfo->cfo_trig_by_timer_en) -+ return; -+ rtw89_phy_cfo_dm(rtwdev); -+} -+ -+void rtw89_phy_cfo_parse(struct rtw89_dev *rtwdev, s16 cfo_val, -+ struct rtw89_rx_phy_ppdu *phy_ppdu) -+{ -+ struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; -+ u8 macid = phy_ppdu->mac_id; -+ -+ cfo->cfo_tail[macid] += cfo_val; -+ cfo->cfo_cnt[macid]++; -+ cfo->packet_count++; -+} -+ -+static void rtw89_phy_stat_thermal_update(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_phy_stat *phystat = &rtwdev->phystat; -+ int i; -+ u8 th; -+ -+ for (i = 0; i < rtwdev->chip->rf_path_num; i++) { -+ th = rtw89_chip_get_thermal(rtwdev, i); -+ if (th) -+ ewma_thermal_add(&phystat->avg_thermal[i], th); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK_TRACK, -+ "path(%d) thermal cur=%u avg=%ld", i, th, -+ ewma_thermal_read(&phystat->avg_thermal[i])); -+ } -+} -+ -+struct rtw89_phy_iter_rssi_data { -+ struct rtw89_dev *rtwdev; -+ struct rtw89_phy_ch_info *ch_info; -+ bool rssi_changed; -+}; -+ -+static void rtw89_phy_stat_rssi_update_iter(void *data, -+ struct ieee80211_sta *sta) -+{ -+ struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; -+ struct rtw89_phy_iter_rssi_data *rssi_data = -+ (struct rtw89_phy_iter_rssi_data *)data; -+ struct rtw89_phy_ch_info *ch_info = rssi_data->ch_info; -+ unsigned long rssi_curr; -+ -+ rssi_curr = ewma_rssi_read(&rtwsta->avg_rssi); -+ -+ if (rssi_curr < ch_info->rssi_min) { -+ ch_info->rssi_min = rssi_curr; -+ ch_info->rssi_min_macid = rtwsta->mac_id; -+ } -+ -+ if (rtwsta->prev_rssi == 0) { -+ rtwsta->prev_rssi = rssi_curr; -+ } else if (abs((int)rtwsta->prev_rssi - (int)rssi_curr) > (3 << RSSI_FACTOR)) { -+ rtwsta->prev_rssi = rssi_curr; -+ rssi_data->rssi_changed = true; -+ } -+} -+ -+static void rtw89_phy_stat_rssi_update(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_phy_iter_rssi_data rssi_data = {0}; -+ -+ rssi_data.rtwdev = rtwdev; -+ rssi_data.ch_info = &rtwdev->ch_info; -+ rssi_data.ch_info->rssi_min = U8_MAX; -+ ieee80211_iterate_stations_atomic(rtwdev->hw, -+ rtw89_phy_stat_rssi_update_iter, -+ &rssi_data); -+ if (rssi_data.rssi_changed) -+ rtw89_btc_ntfy_wl_sta(rtwdev); -+} -+ -+static void rtw89_phy_stat_init(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_phy_stat *phystat = &rtwdev->phystat; -+ int i; -+ -+ for (i = 0; i < rtwdev->chip->rf_path_num; i++) -+ ewma_thermal_init(&phystat->avg_thermal[i]); -+ -+ rtw89_phy_stat_thermal_update(rtwdev); -+ -+ memset(&phystat->cur_pkt_stat, 0, sizeof(phystat->cur_pkt_stat)); -+ memset(&phystat->last_pkt_stat, 0, sizeof(phystat->last_pkt_stat)); -+} -+ -+void rtw89_phy_stat_track(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_phy_stat *phystat = &rtwdev->phystat; -+ -+ rtw89_phy_stat_thermal_update(rtwdev); -+ rtw89_phy_stat_rssi_update(rtwdev); -+ -+ phystat->last_pkt_stat = phystat->cur_pkt_stat; -+ memset(&phystat->cur_pkt_stat, 0, sizeof(phystat->cur_pkt_stat)); -+} -+ -+static u16 rtw89_phy_ccx_us_to_idx(struct rtw89_dev *rtwdev, u32 time_us) -+{ -+ struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; -+ -+ return time_us >> (ilog2(CCX_US_BASE_RATIO) + env->ccx_unit_idx); -+} -+ -+static u32 rtw89_phy_ccx_idx_to_us(struct rtw89_dev *rtwdev, u16 idx) -+{ -+ struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; -+ -+ return idx << (ilog2(CCX_US_BASE_RATIO) + env->ccx_unit_idx); -+} -+ -+static void rtw89_phy_ccx_top_setting_init(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; -+ -+ env->ccx_manual_ctrl = false; -+ env->ccx_ongoing = false; -+ env->ccx_rac_lv = RTW89_RAC_RELEASE; -+ env->ccx_rpt_stamp = 0; -+ env->ccx_period = 0; -+ env->ccx_unit_idx = RTW89_CCX_32_US; -+ env->ccx_trigger_time = 0; -+ env->ccx_edcca_opt_bw_idx = RTW89_CCX_EDCCA_BW20_0; -+ -+ rtw89_phy_set_phy_regs(rtwdev, R_CCX, B_CCX_EN_MSK, 1); -+ rtw89_phy_set_phy_regs(rtwdev, R_CCX, B_CCX_TRIG_OPT_MSK, 1); -+ rtw89_phy_set_phy_regs(rtwdev, R_CCX, B_MEASUREMENT_TRIG_MSK, 1); -+ rtw89_phy_set_phy_regs(rtwdev, R_CCX, B_CCX_EDCCA_OPT_MSK, -+ RTW89_CCX_EDCCA_BW20_0); -+} -+ -+static u16 rtw89_phy_ccx_get_report(struct rtw89_dev *rtwdev, u16 report, -+ u16 score) -+{ -+ struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; -+ u32 numer = 0; -+ u16 ret = 0; -+ -+ numer = report * score + (env->ccx_period >> 1); -+ if (env->ccx_period) -+ ret = numer / env->ccx_period; -+ -+ return ret >= score ? score - 1 : ret; -+} -+ -+static void rtw89_phy_ccx_ms_to_period_unit(struct rtw89_dev *rtwdev, -+ u16 time_ms, u32 *period, -+ u32 *unit_idx) -+{ -+ u32 idx; -+ u8 quotient; -+ -+ if (time_ms >= CCX_MAX_PERIOD) -+ time_ms = CCX_MAX_PERIOD; -+ -+ quotient = CCX_MAX_PERIOD_UNIT * time_ms / CCX_MAX_PERIOD; -+ -+ if (quotient < 4) -+ idx = RTW89_CCX_4_US; -+ else if (quotient < 8) -+ idx = RTW89_CCX_8_US; -+ else if (quotient < 16) -+ idx = RTW89_CCX_16_US; -+ else -+ idx = RTW89_CCX_32_US; -+ -+ *unit_idx = idx; -+ *period = (time_ms * MS_TO_4US_RATIO) >> idx; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_PHY_TRACK, -+ "[Trigger Time] period:%d, unit_idx:%d\n", -+ *period, *unit_idx); -+} -+ -+static void rtw89_phy_ccx_racing_release(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_PHY_TRACK, -+ "lv:(%d)->(0)\n", env->ccx_rac_lv); -+ -+ env->ccx_ongoing = false; -+ env->ccx_rac_lv = RTW89_RAC_RELEASE; -+ env->ifs_clm_app = RTW89_IFS_CLM_BACKGROUND; -+} -+ -+static bool rtw89_phy_ifs_clm_th_update_check(struct rtw89_dev *rtwdev, -+ struct rtw89_ccx_para_info *para) -+{ -+ struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; -+ bool is_update = env->ifs_clm_app != para->ifs_clm_app; -+ u8 i = 0; -+ u16 *ifs_th_l = env->ifs_clm_th_l; -+ u16 *ifs_th_h = env->ifs_clm_th_h; -+ u32 ifs_th0_us = 0, ifs_th_times = 0; -+ u32 ifs_th_h_us[RTW89_IFS_CLM_NUM] = {0}; -+ -+ if (!is_update) -+ goto ifs_update_finished; -+ -+ switch (para->ifs_clm_app) { -+ case RTW89_IFS_CLM_INIT: -+ case RTW89_IFS_CLM_BACKGROUND: -+ case RTW89_IFS_CLM_ACS: -+ case RTW89_IFS_CLM_DBG: -+ case RTW89_IFS_CLM_DIG: -+ case RTW89_IFS_CLM_TDMA_DIG: -+ ifs_th0_us = IFS_CLM_TH0_UPPER; -+ ifs_th_times = IFS_CLM_TH_MUL; -+ break; -+ case RTW89_IFS_CLM_DBG_MANUAL: -+ ifs_th0_us = para->ifs_clm_manual_th0; -+ ifs_th_times = para->ifs_clm_manual_th_times; -+ break; -+ default: -+ break; -+ } -+ -+ /* Set sampling threshold for 4 different regions, unit in idx_cnt. -+ * low[i] = high[i-1] + 1 -+ * high[i] = high[i-1] * ifs_th_times -+ */ -+ ifs_th_l[IFS_CLM_TH_START_IDX] = 0; -+ ifs_th_h_us[IFS_CLM_TH_START_IDX] = ifs_th0_us; -+ ifs_th_h[IFS_CLM_TH_START_IDX] = rtw89_phy_ccx_us_to_idx(rtwdev, -+ ifs_th0_us); -+ for (i = 1; i < RTW89_IFS_CLM_NUM; i++) { -+ ifs_th_l[i] = ifs_th_h[i - 1] + 1; -+ ifs_th_h_us[i] = ifs_th_h_us[i - 1] * ifs_th_times; -+ ifs_th_h[i] = rtw89_phy_ccx_us_to_idx(rtwdev, ifs_th_h_us[i]); -+ } -+ -+ifs_update_finished: -+ if (!is_update) -+ rtw89_debug(rtwdev, RTW89_DBG_PHY_TRACK, -+ "No need to update IFS_TH\n"); -+ -+ return is_update; -+} -+ -+static void rtw89_phy_ifs_clm_set_th_reg(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; -+ u8 i = 0; -+ -+ rtw89_phy_set_phy_regs(rtwdev, R_IFS_T1, B_IFS_T1_TH_LOW_MSK, -+ env->ifs_clm_th_l[0]); -+ rtw89_phy_set_phy_regs(rtwdev, R_IFS_T2, B_IFS_T2_TH_LOW_MSK, -+ env->ifs_clm_th_l[1]); -+ rtw89_phy_set_phy_regs(rtwdev, R_IFS_T3, B_IFS_T3_TH_LOW_MSK, -+ env->ifs_clm_th_l[2]); -+ rtw89_phy_set_phy_regs(rtwdev, R_IFS_T4, B_IFS_T4_TH_LOW_MSK, -+ env->ifs_clm_th_l[3]); -+ -+ rtw89_phy_set_phy_regs(rtwdev, R_IFS_T1, B_IFS_T1_TH_HIGH_MSK, -+ env->ifs_clm_th_h[0]); -+ rtw89_phy_set_phy_regs(rtwdev, R_IFS_T2, B_IFS_T2_TH_HIGH_MSK, -+ env->ifs_clm_th_h[1]); -+ rtw89_phy_set_phy_regs(rtwdev, R_IFS_T3, B_IFS_T3_TH_HIGH_MSK, -+ env->ifs_clm_th_h[2]); -+ rtw89_phy_set_phy_regs(rtwdev, R_IFS_T4, B_IFS_T4_TH_HIGH_MSK, -+ env->ifs_clm_th_h[3]); -+ -+ for (i = 0; i < RTW89_IFS_CLM_NUM; i++) -+ rtw89_debug(rtwdev, RTW89_DBG_PHY_TRACK, -+ "Update IFS_T%d_th{low, high} : {%d, %d}\n", -+ i + 1, env->ifs_clm_th_l[i], env->ifs_clm_th_h[i]); -+} -+ -+static void rtw89_phy_ifs_clm_setting_init(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; -+ struct rtw89_ccx_para_info para = {0}; -+ -+ env->ifs_clm_app = RTW89_IFS_CLM_BACKGROUND; -+ env->ifs_clm_mntr_time = 0; -+ -+ para.ifs_clm_app = RTW89_IFS_CLM_INIT; -+ if (rtw89_phy_ifs_clm_th_update_check(rtwdev, ¶)) -+ rtw89_phy_ifs_clm_set_th_reg(rtwdev); -+ -+ rtw89_phy_set_phy_regs(rtwdev, R_IFS_COUNTER, B_IFS_COLLECT_EN, -+ true); -+ rtw89_phy_set_phy_regs(rtwdev, R_IFS_T1, B_IFS_T1_EN_MSK, true); -+ rtw89_phy_set_phy_regs(rtwdev, R_IFS_T2, B_IFS_T2_EN_MSK, true); -+ rtw89_phy_set_phy_regs(rtwdev, R_IFS_T3, B_IFS_T3_EN_MSK, true); -+ rtw89_phy_set_phy_regs(rtwdev, R_IFS_T4, B_IFS_T4_EN_MSK, true); -+} -+ -+static int rtw89_phy_ccx_racing_ctrl(struct rtw89_dev *rtwdev, -+ enum rtw89_env_racing_lv level) -+{ -+ struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; -+ int ret = 0; -+ -+ if (level >= RTW89_RAC_MAX_NUM) { -+ rtw89_debug(rtwdev, RTW89_DBG_PHY_TRACK, -+ "[WARNING] Wrong LV=%d\n", level); -+ return -EINVAL; -+ } -+ -+ rtw89_debug(rtwdev, RTW89_DBG_PHY_TRACK, -+ "ccx_ongoing=%d, level:(%d)->(%d)\n", env->ccx_ongoing, -+ env->ccx_rac_lv, level); -+ -+ if (env->ccx_ongoing) { -+ if (level <= env->ccx_rac_lv) -+ ret = -EINVAL; -+ else -+ env->ccx_ongoing = false; -+ } -+ -+ if (ret == 0) -+ env->ccx_rac_lv = level; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_PHY_TRACK, "ccx racing success=%d\n", -+ !ret); -+ -+ return ret; -+} -+ -+static void rtw89_phy_ccx_trigger(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; -+ -+ rtw89_phy_set_phy_regs(rtwdev, R_IFS_COUNTER, B_IFS_COUNTER_CLR_MSK, 0); -+ rtw89_phy_set_phy_regs(rtwdev, R_CCX, B_MEASUREMENT_TRIG_MSK, 0); -+ rtw89_phy_set_phy_regs(rtwdev, R_IFS_COUNTER, B_IFS_COUNTER_CLR_MSK, 1); -+ rtw89_phy_set_phy_regs(rtwdev, R_CCX, B_MEASUREMENT_TRIG_MSK, 1); -+ -+ env->ccx_rpt_stamp++; -+ env->ccx_ongoing = true; -+} -+ -+static void rtw89_phy_ifs_clm_get_utility(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; -+ u8 i = 0; -+ u32 res = 0; -+ -+ env->ifs_clm_tx_ratio = -+ rtw89_phy_ccx_get_report(rtwdev, env->ifs_clm_tx, PERCENT); -+ env->ifs_clm_edcca_excl_cca_ratio = -+ rtw89_phy_ccx_get_report(rtwdev, env->ifs_clm_edcca_excl_cca, -+ PERCENT); -+ env->ifs_clm_cck_fa_ratio = -+ rtw89_phy_ccx_get_report(rtwdev, env->ifs_clm_cckfa, PERCENT); -+ env->ifs_clm_ofdm_fa_ratio = -+ rtw89_phy_ccx_get_report(rtwdev, env->ifs_clm_ofdmfa, PERCENT); -+ env->ifs_clm_cck_cca_excl_fa_ratio = -+ rtw89_phy_ccx_get_report(rtwdev, env->ifs_clm_cckcca_excl_fa, -+ PERCENT); -+ env->ifs_clm_ofdm_cca_excl_fa_ratio = -+ rtw89_phy_ccx_get_report(rtwdev, env->ifs_clm_ofdmcca_excl_fa, -+ PERCENT); -+ env->ifs_clm_cck_fa_permil = -+ rtw89_phy_ccx_get_report(rtwdev, env->ifs_clm_cckfa, PERMIL); -+ env->ifs_clm_ofdm_fa_permil = -+ rtw89_phy_ccx_get_report(rtwdev, env->ifs_clm_ofdmfa, PERMIL); -+ -+ for (i = 0; i < RTW89_IFS_CLM_NUM; i++) { -+ if (env->ifs_clm_his[i] > ENV_MNTR_IFSCLM_HIS_MAX) { -+ env->ifs_clm_ifs_avg[i] = ENV_MNTR_FAIL_DWORD; -+ } else { -+ env->ifs_clm_ifs_avg[i] = -+ rtw89_phy_ccx_idx_to_us(rtwdev, -+ env->ifs_clm_avg[i]); -+ } -+ -+ res = rtw89_phy_ccx_idx_to_us(rtwdev, env->ifs_clm_cca[i]); -+ res += env->ifs_clm_his[i] >> 1; -+ if (env->ifs_clm_his[i]) -+ res /= env->ifs_clm_his[i]; -+ else -+ res = 0; -+ env->ifs_clm_cca_avg[i] = res; -+ } -+ -+ rtw89_debug(rtwdev, RTW89_DBG_PHY_TRACK, -+ "IFS-CLM ratio {Tx, EDCCA_exclu_cca} = {%d, %d}\n", -+ env->ifs_clm_tx_ratio, env->ifs_clm_edcca_excl_cca_ratio); -+ rtw89_debug(rtwdev, RTW89_DBG_PHY_TRACK, -+ "IFS-CLM FA ratio {CCK, OFDM} = {%d, %d}\n", -+ env->ifs_clm_cck_fa_ratio, env->ifs_clm_ofdm_fa_ratio); -+ rtw89_debug(rtwdev, RTW89_DBG_PHY_TRACK, -+ "IFS-CLM FA permil {CCK, OFDM} = {%d, %d}\n", -+ env->ifs_clm_cck_fa_permil, env->ifs_clm_ofdm_fa_permil); -+ rtw89_debug(rtwdev, RTW89_DBG_PHY_TRACK, -+ "IFS-CLM CCA_exclu_FA ratio {CCK, OFDM} = {%d, %d}\n", -+ env->ifs_clm_cck_cca_excl_fa_ratio, -+ env->ifs_clm_ofdm_cca_excl_fa_ratio); -+ rtw89_debug(rtwdev, RTW89_DBG_PHY_TRACK, -+ "Time:[his, ifs_avg(us), cca_avg(us)]\n"); -+ for (i = 0; i < RTW89_IFS_CLM_NUM; i++) -+ rtw89_debug(rtwdev, RTW89_DBG_PHY_TRACK, "T%d:[%d, %d, %d]\n", -+ i + 1, env->ifs_clm_his[i], env->ifs_clm_ifs_avg[i], -+ env->ifs_clm_cca_avg[i]); -+} -+ -+static bool rtw89_phy_ifs_clm_get_result(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; -+ u8 i = 0; -+ -+ if (rtw89_phy_read32_mask(rtwdev, R_IFSCNT, B_IFSCNT_DONE_MSK) == 0) { -+ rtw89_debug(rtwdev, RTW89_DBG_PHY_TRACK, -+ "Get IFS_CLM report Fail\n"); -+ return false; -+ } -+ -+ env->ifs_clm_tx = -+ rtw89_phy_read32_mask(rtwdev, R_IFS_CLM_TX_CNT, -+ B_IFS_CLM_TX_CNT_MSK); -+ env->ifs_clm_edcca_excl_cca = -+ rtw89_phy_read32_mask(rtwdev, R_IFS_CLM_TX_CNT, -+ B_IFS_CLM_EDCCA_EXCLUDE_CCA_FA_MSK); -+ env->ifs_clm_cckcca_excl_fa = -+ rtw89_phy_read32_mask(rtwdev, R_IFS_CLM_CCA, -+ B_IFS_CLM_CCKCCA_EXCLUDE_FA_MSK); -+ env->ifs_clm_ofdmcca_excl_fa = -+ rtw89_phy_read32_mask(rtwdev, R_IFS_CLM_CCA, -+ B_IFS_CLM_OFDMCCA_EXCLUDE_FA_MSK); -+ env->ifs_clm_cckfa = -+ rtw89_phy_read32_mask(rtwdev, R_IFS_CLM_FA, -+ B_IFS_CLM_CCK_FA_MSK); -+ env->ifs_clm_ofdmfa = -+ rtw89_phy_read32_mask(rtwdev, R_IFS_CLM_FA, -+ B_IFS_CLM_OFDM_FA_MSK); -+ -+ env->ifs_clm_his[0] = -+ rtw89_phy_read32_mask(rtwdev, R_IFS_HIS, B_IFS_T1_HIS_MSK); -+ env->ifs_clm_his[1] = -+ rtw89_phy_read32_mask(rtwdev, R_IFS_HIS, B_IFS_T2_HIS_MSK); -+ env->ifs_clm_his[2] = -+ rtw89_phy_read32_mask(rtwdev, R_IFS_HIS, B_IFS_T3_HIS_MSK); -+ env->ifs_clm_his[3] = -+ rtw89_phy_read32_mask(rtwdev, R_IFS_HIS, B_IFS_T4_HIS_MSK); -+ -+ env->ifs_clm_avg[0] = -+ rtw89_phy_read32_mask(rtwdev, R_IFS_AVG_L, B_IFS_T1_AVG_MSK); -+ env->ifs_clm_avg[1] = -+ rtw89_phy_read32_mask(rtwdev, R_IFS_AVG_L, B_IFS_T2_AVG_MSK); -+ env->ifs_clm_avg[2] = -+ rtw89_phy_read32_mask(rtwdev, R_IFS_AVG_H, B_IFS_T3_AVG_MSK); -+ env->ifs_clm_avg[3] = -+ rtw89_phy_read32_mask(rtwdev, R_IFS_AVG_H, B_IFS_T4_AVG_MSK); -+ -+ env->ifs_clm_cca[0] = -+ rtw89_phy_read32_mask(rtwdev, R_IFS_CCA_L, B_IFS_T1_CCA_MSK); -+ env->ifs_clm_cca[1] = -+ rtw89_phy_read32_mask(rtwdev, R_IFS_CCA_L, B_IFS_T2_CCA_MSK); -+ env->ifs_clm_cca[2] = -+ rtw89_phy_read32_mask(rtwdev, R_IFS_CCA_H, B_IFS_T3_CCA_MSK); -+ env->ifs_clm_cca[3] = -+ rtw89_phy_read32_mask(rtwdev, R_IFS_CCA_H, B_IFS_T4_CCA_MSK); -+ -+ env->ifs_clm_total_ifs = -+ rtw89_phy_read32_mask(rtwdev, R_IFSCNT, B_IFSCNT_TOTAL_CNT_MSK); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_PHY_TRACK, "IFS-CLM total_ifs = %d\n", -+ env->ifs_clm_total_ifs); -+ rtw89_debug(rtwdev, RTW89_DBG_PHY_TRACK, -+ "{Tx, EDCCA_exclu_cca} = {%d, %d}\n", -+ env->ifs_clm_tx, env->ifs_clm_edcca_excl_cca); -+ rtw89_debug(rtwdev, RTW89_DBG_PHY_TRACK, -+ "IFS-CLM FA{CCK, OFDM} = {%d, %d}\n", -+ env->ifs_clm_cckfa, env->ifs_clm_ofdmfa); -+ rtw89_debug(rtwdev, RTW89_DBG_PHY_TRACK, -+ "IFS-CLM CCA_exclu_FA{CCK, OFDM} = {%d, %d}\n", -+ env->ifs_clm_cckcca_excl_fa, env->ifs_clm_ofdmcca_excl_fa); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_PHY_TRACK, "Time:[his, avg, cca]\n"); -+ for (i = 0; i < RTW89_IFS_CLM_NUM; i++) -+ rtw89_debug(rtwdev, RTW89_DBG_PHY_TRACK, -+ "T%d:[%d, %d, %d]\n", i + 1, env->ifs_clm_his[i], -+ env->ifs_clm_avg[i], env->ifs_clm_cca[i]); -+ -+ rtw89_phy_ifs_clm_get_utility(rtwdev); -+ -+ return true; -+} -+ -+static int rtw89_phy_ifs_clm_set(struct rtw89_dev *rtwdev, -+ struct rtw89_ccx_para_info *para) -+{ -+ struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; -+ u32 period = 0; -+ u32 unit_idx = 0; -+ -+ if (para->mntr_time == 0) { -+ rtw89_debug(rtwdev, RTW89_DBG_PHY_TRACK, -+ "[WARN] MNTR_TIME is 0\n"); -+ return -EINVAL; -+ } -+ -+ if (rtw89_phy_ccx_racing_ctrl(rtwdev, para->rac_lv)) -+ return -EINVAL; -+ -+ if (para->mntr_time != env->ifs_clm_mntr_time) { -+ rtw89_phy_ccx_ms_to_period_unit(rtwdev, para->mntr_time, -+ &period, &unit_idx); -+ rtw89_phy_set_phy_regs(rtwdev, R_IFS_COUNTER, -+ B_IFS_CLM_PERIOD_MSK, period); -+ rtw89_phy_set_phy_regs(rtwdev, R_IFS_COUNTER, -+ B_IFS_CLM_COUNTER_UNIT_MSK, unit_idx); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_PHY_TRACK, -+ "Update IFS-CLM time ((%d)) -> ((%d))\n", -+ env->ifs_clm_mntr_time, para->mntr_time); -+ -+ env->ifs_clm_mntr_time = para->mntr_time; -+ env->ccx_period = (u16)period; -+ env->ccx_unit_idx = (u8)unit_idx; -+ } -+ -+ if (rtw89_phy_ifs_clm_th_update_check(rtwdev, para)) { -+ env->ifs_clm_app = para->ifs_clm_app; -+ rtw89_phy_ifs_clm_set_th_reg(rtwdev); -+ } -+ -+ return 0; -+} -+ -+void rtw89_phy_env_monitor_track(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; -+ struct rtw89_ccx_para_info para = {0}; -+ u8 chk_result = RTW89_PHY_ENV_MON_CCX_FAIL; -+ -+ env->ccx_watchdog_result = RTW89_PHY_ENV_MON_CCX_FAIL; -+ if (env->ccx_manual_ctrl) { -+ rtw89_debug(rtwdev, RTW89_DBG_PHY_TRACK, -+ "CCX in manual ctrl\n"); -+ return; -+ } -+ -+ /* only ifs_clm for now */ -+ if (rtw89_phy_ifs_clm_get_result(rtwdev)) -+ env->ccx_watchdog_result |= RTW89_PHY_ENV_MON_IFS_CLM; -+ -+ rtw89_phy_ccx_racing_release(rtwdev); -+ para.mntr_time = 1900; -+ para.rac_lv = RTW89_RAC_LV_1; -+ para.ifs_clm_app = RTW89_IFS_CLM_BACKGROUND; -+ -+ if (rtw89_phy_ifs_clm_set(rtwdev, ¶) == 0) -+ chk_result |= RTW89_PHY_ENV_MON_IFS_CLM; -+ if (chk_result) -+ rtw89_phy_ccx_trigger(rtwdev); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_PHY_TRACK, -+ "get_result=0x%x, chk_result:0x%x\n", -+ env->ccx_watchdog_result, chk_result); -+} -+ -+static void rtw89_phy_dig_read_gain_table(struct rtw89_dev *rtwdev, int type) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ struct rtw89_dig_info *dig = &rtwdev->dig; -+ const struct rtw89_phy_dig_gain_cfg *cfg; -+ const char *msg; -+ u8 i; -+ s8 gain_base; -+ s8 *gain_arr; -+ u32 tmp; -+ -+ switch (type) { -+ case RTW89_DIG_GAIN_LNA_G: -+ gain_arr = dig->lna_gain_g; -+ gain_base = LNA0_GAIN; -+ cfg = chip->dig_table->cfg_lna_g; -+ msg = "lna_gain_g"; -+ break; -+ case RTW89_DIG_GAIN_TIA_G: -+ gain_arr = dig->tia_gain_g; -+ gain_base = TIA0_GAIN_G; -+ cfg = chip->dig_table->cfg_tia_g; -+ msg = "tia_gain_g"; -+ break; -+ case RTW89_DIG_GAIN_LNA_A: -+ gain_arr = dig->lna_gain_a; -+ gain_base = LNA0_GAIN; -+ cfg = chip->dig_table->cfg_lna_a; -+ msg = "lna_gain_a"; -+ break; -+ case RTW89_DIG_GAIN_TIA_A: -+ gain_arr = dig->tia_gain_a; -+ gain_base = TIA0_GAIN_A; -+ cfg = chip->dig_table->cfg_tia_a; -+ msg = "tia_gain_a"; -+ break; -+ default: -+ return; -+ } -+ -+ for (i = 0; i < cfg->size; i++) { -+ tmp = rtw89_phy_read32_mask(rtwdev, cfg->table[i].addr, -+ cfg->table[i].mask); -+ tmp >>= DIG_GAIN_SHIFT; -+ gain_arr[i] = sign_extend32(tmp, U4_MAX_BIT) + gain_base; -+ gain_base += DIG_GAIN; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_DIG, "%s[%d]=%d\n", -+ msg, i, gain_arr[i]); -+ } -+} -+ -+static void rtw89_phy_dig_update_gain_para(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_dig_info *dig = &rtwdev->dig; -+ u32 tmp; -+ u8 i; -+ -+ tmp = rtw89_phy_read32_mask(rtwdev, R_PATH0_IB_PKPW, -+ B_PATH0_IB_PKPW_MSK); -+ dig->ib_pkpwr = sign_extend32(tmp >> DIG_GAIN_SHIFT, U8_MAX_BIT); -+ dig->ib_pbk = rtw89_phy_read32_mask(rtwdev, R_PATH0_IB_PBK, -+ B_PATH0_IB_PBK_MSK); -+ rtw89_debug(rtwdev, RTW89_DBG_DIG, "ib_pkpwr=%d, ib_pbk=%d\n", -+ dig->ib_pkpwr, dig->ib_pbk); -+ -+ for (i = RTW89_DIG_GAIN_LNA_G; i < RTW89_DIG_GAIN_MAX; i++) -+ rtw89_phy_dig_read_gain_table(rtwdev, i); -+} -+ -+static const u8 rssi_nolink = 22; -+static const u8 igi_rssi_th[IGI_RSSI_TH_NUM] = {68, 84, 90, 98, 104}; -+static const u16 fa_th_2g[FA_TH_NUM] = {22, 44, 66, 88}; -+static const u16 fa_th_5g[FA_TH_NUM] = {4, 8, 12, 16}; -+static const u16 fa_th_nolink[FA_TH_NUM] = {196, 352, 440, 528}; -+ -+static void rtw89_phy_dig_update_rssi_info(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_phy_ch_info *ch_info = &rtwdev->ch_info; -+ struct rtw89_dig_info *dig = &rtwdev->dig; -+ bool is_linked = rtwdev->total_sta_assoc > 0; -+ -+ if (is_linked) { -+ dig->igi_rssi = ch_info->rssi_min >> 1; -+ } else { -+ rtw89_debug(rtwdev, RTW89_DBG_DIG, "RSSI update : NO Link\n"); -+ dig->igi_rssi = rssi_nolink; -+ } -+} -+ -+static void rtw89_phy_dig_update_para(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_dig_info *dig = &rtwdev->dig; -+ bool is_linked = rtwdev->total_sta_assoc > 0; -+ const u16 *fa_th_src = NULL; -+ -+ switch (rtwdev->hal.current_band_type) { -+ case RTW89_BAND_2G: -+ dig->lna_gain = dig->lna_gain_g; -+ dig->tia_gain = dig->tia_gain_g; -+ fa_th_src = is_linked ? fa_th_2g : fa_th_nolink; -+ dig->force_gaincode_idx_en = false; -+ dig->dyn_pd_th_en = true; -+ break; -+ case RTW89_BAND_5G: -+ default: -+ dig->lna_gain = dig->lna_gain_a; -+ dig->tia_gain = dig->tia_gain_a; -+ fa_th_src = is_linked ? fa_th_5g : fa_th_nolink; -+ dig->force_gaincode_idx_en = true; -+ dig->dyn_pd_th_en = true; -+ break; -+ } -+ memcpy(dig->fa_th, fa_th_src, sizeof(dig->fa_th)); -+ memcpy(dig->igi_rssi_th, igi_rssi_th, sizeof(dig->igi_rssi_th)); -+} -+ -+static const u8 pd_low_th_offset = 20, dynamic_igi_min = 0x20; -+static const u8 igi_max_performance_mode = 0x5a; -+static const u8 dynamic_pd_threshold_max; -+ -+static void rtw89_phy_dig_para_reset(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_dig_info *dig = &rtwdev->dig; -+ -+ dig->cur_gaincode.lna_idx = LNA_IDX_MAX; -+ dig->cur_gaincode.tia_idx = TIA_IDX_MAX; -+ dig->cur_gaincode.rxb_idx = RXB_IDX_MAX; -+ dig->force_gaincode.lna_idx = LNA_IDX_MAX; -+ dig->force_gaincode.tia_idx = TIA_IDX_MAX; -+ dig->force_gaincode.rxb_idx = RXB_IDX_MAX; -+ -+ dig->dyn_igi_max = igi_max_performance_mode; -+ dig->dyn_igi_min = dynamic_igi_min; -+ dig->dyn_pd_th_max = dynamic_pd_threshold_max; -+ dig->pd_low_th_ofst = pd_low_th_offset; -+ dig->is_linked_pre = false; -+} -+ -+static void rtw89_phy_dig_init(struct rtw89_dev *rtwdev) -+{ -+ rtw89_phy_dig_update_gain_para(rtwdev); -+ rtw89_phy_dig_reset(rtwdev); -+} -+ -+static u8 rtw89_phy_dig_lna_idx_by_rssi(struct rtw89_dev *rtwdev, u8 rssi) -+{ -+ struct rtw89_dig_info *dig = &rtwdev->dig; -+ u8 lna_idx; -+ -+ if (rssi < dig->igi_rssi_th[0]) -+ lna_idx = RTW89_DIG_GAIN_LNA_IDX6; -+ else if (rssi < dig->igi_rssi_th[1]) -+ lna_idx = RTW89_DIG_GAIN_LNA_IDX5; -+ else if (rssi < dig->igi_rssi_th[2]) -+ lna_idx = RTW89_DIG_GAIN_LNA_IDX4; -+ else if (rssi < dig->igi_rssi_th[3]) -+ lna_idx = RTW89_DIG_GAIN_LNA_IDX3; -+ else if (rssi < dig->igi_rssi_th[4]) -+ lna_idx = RTW89_DIG_GAIN_LNA_IDX2; -+ else -+ lna_idx = RTW89_DIG_GAIN_LNA_IDX1; -+ -+ return lna_idx; -+} -+ -+static u8 rtw89_phy_dig_tia_idx_by_rssi(struct rtw89_dev *rtwdev, u8 rssi) -+{ -+ struct rtw89_dig_info *dig = &rtwdev->dig; -+ u8 tia_idx; -+ -+ if (rssi < dig->igi_rssi_th[0]) -+ tia_idx = RTW89_DIG_GAIN_TIA_IDX1; -+ else -+ tia_idx = RTW89_DIG_GAIN_TIA_IDX0; -+ -+ return tia_idx; -+} -+ -+#define IB_PBK_BASE 110 -+#define WB_RSSI_BASE 10 -+static u8 rtw89_phy_dig_rxb_idx_by_rssi(struct rtw89_dev *rtwdev, u8 rssi, -+ struct rtw89_agc_gaincode_set *set) -+{ -+ struct rtw89_dig_info *dig = &rtwdev->dig; -+ s8 lna_gain = dig->lna_gain[set->lna_idx]; -+ s8 tia_gain = dig->tia_gain[set->tia_idx]; -+ s32 wb_rssi = rssi + lna_gain + tia_gain; -+ s32 rxb_idx_tmp = IB_PBK_BASE + WB_RSSI_BASE; -+ u8 rxb_idx; -+ -+ rxb_idx_tmp += dig->ib_pkpwr - dig->ib_pbk - wb_rssi; -+ rxb_idx = clamp_t(s32, rxb_idx_tmp, RXB_IDX_MIN, RXB_IDX_MAX); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_DIG, "wb_rssi=%03d, rxb_idx_tmp=%03d\n", -+ wb_rssi, rxb_idx_tmp); -+ -+ return rxb_idx; -+} -+ -+static void rtw89_phy_dig_gaincode_by_rssi(struct rtw89_dev *rtwdev, u8 rssi, -+ struct rtw89_agc_gaincode_set *set) -+{ -+ set->lna_idx = rtw89_phy_dig_lna_idx_by_rssi(rtwdev, rssi); -+ set->tia_idx = rtw89_phy_dig_tia_idx_by_rssi(rtwdev, rssi); -+ set->rxb_idx = rtw89_phy_dig_rxb_idx_by_rssi(rtwdev, rssi, set); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_DIG, -+ "final_rssi=%03d, (lna,tia,rab)=(%d,%d,%02d)\n", -+ rssi, set->lna_idx, set->tia_idx, set->rxb_idx); -+} -+ -+#define IGI_OFFSET_MAX 25 -+#define IGI_OFFSET_MUL 2 -+static void rtw89_phy_dig_igi_offset_by_env(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_dig_info *dig = &rtwdev->dig; -+ struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; -+ enum rtw89_dig_noisy_level noisy_lv; -+ u8 igi_offset = dig->fa_rssi_ofst; -+ u16 fa_ratio = 0; -+ -+ fa_ratio = env->ifs_clm_cck_fa_permil + env->ifs_clm_ofdm_fa_permil; -+ -+ if (fa_ratio < dig->fa_th[0]) -+ noisy_lv = RTW89_DIG_NOISY_LEVEL0; -+ else if (fa_ratio < dig->fa_th[1]) -+ noisy_lv = RTW89_DIG_NOISY_LEVEL1; -+ else if (fa_ratio < dig->fa_th[2]) -+ noisy_lv = RTW89_DIG_NOISY_LEVEL2; -+ else if (fa_ratio < dig->fa_th[3]) -+ noisy_lv = RTW89_DIG_NOISY_LEVEL3; -+ else -+ noisy_lv = RTW89_DIG_NOISY_LEVEL_MAX; -+ -+ if (noisy_lv == RTW89_DIG_NOISY_LEVEL0 && igi_offset < 2) -+ igi_offset = 0; -+ else -+ igi_offset += noisy_lv * IGI_OFFSET_MUL; -+ -+ igi_offset = min_t(u8, igi_offset, IGI_OFFSET_MAX); -+ dig->fa_rssi_ofst = igi_offset; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_DIG, -+ "fa_th: [+6 (%d) +4 (%d) +2 (%d) 0 (%d) -2 ]\n", -+ dig->fa_th[3], dig->fa_th[2], dig->fa_th[1], dig->fa_th[0]); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_DIG, -+ "fa(CCK,OFDM,ALL)=(%d,%d,%d)%%, noisy_lv=%d, ofst=%d\n", -+ env->ifs_clm_cck_fa_permil, env->ifs_clm_ofdm_fa_permil, -+ env->ifs_clm_cck_fa_permil + env->ifs_clm_ofdm_fa_permil, -+ noisy_lv, igi_offset); -+} -+ -+static void rtw89_phy_dig_set_lna_idx(struct rtw89_dev *rtwdev, u8 lna_idx) -+{ -+ rtw89_phy_write32_mask(rtwdev, R_PATH0_LNA_INIT, -+ B_PATH0_LNA_INIT_IDX_MSK, lna_idx); -+ rtw89_phy_write32_mask(rtwdev, R_PATH1_LNA_INIT, -+ B_PATH1_LNA_INIT_IDX_MSK, lna_idx); -+} -+ -+static void rtw89_phy_dig_set_tia_idx(struct rtw89_dev *rtwdev, u8 tia_idx) -+{ -+ rtw89_phy_write32_mask(rtwdev, R_PATH0_TIA_INIT, -+ B_PATH0_TIA_INIT_IDX_MSK, tia_idx); -+ rtw89_phy_write32_mask(rtwdev, R_PATH1_TIA_INIT, -+ B_PATH1_TIA_INIT_IDX_MSK, tia_idx); -+} -+ -+static void rtw89_phy_dig_set_rxb_idx(struct rtw89_dev *rtwdev, u8 rxb_idx) -+{ -+ rtw89_phy_write32_mask(rtwdev, R_PATH0_RXB_INIT, -+ B_PATH0_RXB_INIT_IDX_MSK, rxb_idx); -+ rtw89_phy_write32_mask(rtwdev, R_PATH1_RXB_INIT, -+ B_PATH1_RXB_INIT_IDX_MSK, rxb_idx); -+} -+ -+static void rtw89_phy_dig_set_igi_cr(struct rtw89_dev *rtwdev, -+ const struct rtw89_agc_gaincode_set set) -+{ -+ rtw89_phy_dig_set_lna_idx(rtwdev, set.lna_idx); -+ rtw89_phy_dig_set_tia_idx(rtwdev, set.tia_idx); -+ rtw89_phy_dig_set_rxb_idx(rtwdev, set.rxb_idx); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_DIG, "Set (lna,tia,rxb)=((%d,%d,%02d))\n", -+ set.lna_idx, set.tia_idx, set.rxb_idx); -+} -+ -+static const struct rtw89_reg_def sdagc_config[4] = { -+ {R_PATH0_P20_FOLLOW_BY_PAGCUGC, B_PATH0_P20_FOLLOW_BY_PAGCUGC_EN_MSK}, -+ {R_PATH0_S20_FOLLOW_BY_PAGCUGC, B_PATH0_S20_FOLLOW_BY_PAGCUGC_EN_MSK}, -+ {R_PATH1_P20_FOLLOW_BY_PAGCUGC, B_PATH1_P20_FOLLOW_BY_PAGCUGC_EN_MSK}, -+ {R_PATH1_S20_FOLLOW_BY_PAGCUGC, B_PATH1_S20_FOLLOW_BY_PAGCUGC_EN_MSK}, -+}; -+ -+static void rtw89_phy_dig_sdagc_follow_pagc_config(struct rtw89_dev *rtwdev, -+ bool enable) -+{ -+ u8 i = 0; -+ -+ for (i = 0; i < ARRAY_SIZE(sdagc_config); i++) -+ rtw89_phy_write32_mask(rtwdev, sdagc_config[i].addr, -+ sdagc_config[i].mask, enable); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_DIG, "sdagc_follow_pagc=%d\n", enable); -+} -+ -+static void rtw89_phy_dig_dyn_pd_th(struct rtw89_dev *rtwdev, u8 rssi, -+ bool enable) -+{ -+ enum rtw89_bandwidth cbw = rtwdev->hal.current_band_width; -+ struct rtw89_dig_info *dig = &rtwdev->dig; -+ u8 final_rssi = 0, under_region = dig->pd_low_th_ofst; -+ u32 val = 0; -+ -+ under_region += PD_TH_SB_FLTR_CMP_VAL; -+ -+ switch (cbw) { -+ case RTW89_CHANNEL_WIDTH_40: -+ under_region += PD_TH_BW40_CMP_VAL; -+ break; -+ case RTW89_CHANNEL_WIDTH_80: -+ under_region += PD_TH_BW80_CMP_VAL; -+ break; -+ case RTW89_CHANNEL_WIDTH_20: -+ fallthrough; -+ default: -+ under_region += PD_TH_BW20_CMP_VAL; -+ break; -+ } -+ -+ dig->dyn_pd_th_max = dig->igi_rssi; -+ -+ final_rssi = min_t(u8, rssi, dig->igi_rssi); -+ final_rssi = clamp_t(u8, final_rssi, PD_TH_MIN_RSSI + under_region, -+ PD_TH_MAX_RSSI + under_region); -+ -+ if (enable) { -+ val = (final_rssi - under_region - PD_TH_MIN_RSSI) >> 1; -+ rtw89_debug(rtwdev, RTW89_DBG_DIG, -+ "dyn_max=%d, final_rssi=%d, total=%d, PD_low=%d\n", -+ dig->igi_rssi, final_rssi, under_region, val); -+ } else { -+ rtw89_debug(rtwdev, RTW89_DBG_DIG, -+ "Dynamic PD th dsiabled, Set PD_low_bd=0\n"); -+ } -+ -+ rtw89_phy_write32_mask(rtwdev, R_SEG0R_PD, B_SEG0R_PD_LOWER_BOUND_MSK, -+ val); -+ rtw89_phy_write32_mask(rtwdev, R_SEG0R_PD, -+ B_SEG0R_PD_SPATIAL_REUSE_EN_MSK, enable); -+} -+ -+void rtw89_phy_dig_reset(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_dig_info *dig = &rtwdev->dig; -+ -+ dig->bypass_dig = false; -+ rtw89_phy_dig_para_reset(rtwdev); -+ rtw89_phy_dig_set_igi_cr(rtwdev, dig->force_gaincode); -+ rtw89_phy_dig_dyn_pd_th(rtwdev, rssi_nolink, false); -+ rtw89_phy_dig_sdagc_follow_pagc_config(rtwdev, false); -+ rtw89_phy_dig_update_para(rtwdev); -+} -+ -+#define IGI_RSSI_MIN 10 -+void rtw89_phy_dig(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_dig_info *dig = &rtwdev->dig; -+ bool is_linked = rtwdev->total_sta_assoc > 0; -+ -+ if (unlikely(dig->bypass_dig)) { -+ dig->bypass_dig = false; -+ return; -+ } -+ -+ if (!dig->is_linked_pre && is_linked) { -+ rtw89_debug(rtwdev, RTW89_DBG_DIG, "First connected\n"); -+ rtw89_phy_dig_update_para(rtwdev); -+ } else if (dig->is_linked_pre && !is_linked) { -+ rtw89_debug(rtwdev, RTW89_DBG_DIG, "First disconnected\n"); -+ rtw89_phy_dig_update_para(rtwdev); -+ } -+ dig->is_linked_pre = is_linked; -+ -+ rtw89_phy_dig_igi_offset_by_env(rtwdev); -+ rtw89_phy_dig_update_rssi_info(rtwdev); -+ -+ dig->dyn_igi_min = (dig->igi_rssi > IGI_RSSI_MIN) ? -+ dig->igi_rssi - IGI_RSSI_MIN : 0; -+ dig->dyn_igi_max = dig->dyn_igi_min + IGI_OFFSET_MAX; -+ dig->igi_fa_rssi = dig->dyn_igi_min + dig->fa_rssi_ofst; -+ -+ dig->igi_fa_rssi = clamp(dig->igi_fa_rssi, dig->dyn_igi_min, -+ dig->dyn_igi_max); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_DIG, -+ "rssi=%03d, dyn(max,min)=(%d,%d), final_rssi=%d\n", -+ dig->igi_rssi, dig->dyn_igi_max, dig->dyn_igi_min, -+ dig->igi_fa_rssi); -+ -+ if (dig->force_gaincode_idx_en) { -+ rtw89_phy_dig_set_igi_cr(rtwdev, dig->force_gaincode); -+ rtw89_debug(rtwdev, RTW89_DBG_DIG, -+ "Force gaincode index enabled.\n"); -+ } else { -+ rtw89_phy_dig_gaincode_by_rssi(rtwdev, dig->igi_fa_rssi, -+ &dig->cur_gaincode); -+ rtw89_phy_dig_set_igi_cr(rtwdev, dig->cur_gaincode); -+ } -+ -+ rtw89_phy_dig_dyn_pd_th(rtwdev, dig->igi_fa_rssi, dig->dyn_pd_th_en); -+ -+ if (dig->dyn_pd_th_en && dig->igi_fa_rssi > dig->dyn_pd_th_max) -+ rtw89_phy_dig_sdagc_follow_pagc_config(rtwdev, true); -+ else -+ rtw89_phy_dig_sdagc_follow_pagc_config(rtwdev, false); -+} -+ -+static void rtw89_phy_env_monitor_init(struct rtw89_dev *rtwdev) -+{ -+ rtw89_phy_ccx_top_setting_init(rtwdev); -+ rtw89_phy_ifs_clm_setting_init(rtwdev); -+} -+ -+void rtw89_phy_dm_init(struct rtw89_dev *rtwdev) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ -+ rtw89_phy_stat_init(rtwdev); -+ -+ rtw89_chip_bb_sethw(rtwdev); -+ -+ rtw89_phy_env_monitor_init(rtwdev); -+ rtw89_phy_dig_init(rtwdev); -+ rtw89_phy_cfo_init(rtwdev); -+ -+ rtw89_phy_init_rf_nctl(rtwdev); -+ rtw89_chip_rfk_init(rtwdev); -+ rtw89_load_txpwr_table(rtwdev, chip->byr_table); -+ rtw89_chip_set_txpwr_ctrl(rtwdev); -+ rtw89_chip_power_trim(rtwdev); -+} -+ -+void rtw89_phy_set_bss_color(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif) -+{ -+ enum rtw89_phy_idx phy_idx = RTW89_PHY_0; -+ u8 bss_color; -+ -+ if (!vif->bss_conf.he_support || !vif->bss_conf.assoc) -+ return; -+ -+ bss_color = vif->bss_conf.he_bss_color.color; -+ -+ rtw89_phy_write32_idx(rtwdev, R_BSS_CLR_MAP, B_BSS_CLR_MAP_VLD0, 0x1, -+ phy_idx); -+ rtw89_phy_write32_idx(rtwdev, R_BSS_CLR_MAP, B_BSS_CLR_MAP_TGT, bss_color, -+ phy_idx); -+ rtw89_phy_write32_idx(rtwdev, R_BSS_CLR_MAP, B_BSS_CLR_MAP_STAID, -+ vif->bss_conf.aid, phy_idx); -+} -diff --git a/drivers/net/wireless/realtek/rtw89/phy.h b/drivers/net/wireless/realtek/rtw89/phy.h -new file mode 100644 -index 000000000000..370129345e0f ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/phy.h -@@ -0,0 +1,311 @@ -+/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ -+/* Copyright(c) 2019-2020 Realtek Corporation -+ */ -+ -+#ifndef __RTW89_PHY_H__ -+#define __RTW89_PHY_H__ -+ -+#include "core.h" -+ -+#define RTW89_PHY_ADDR_OFFSET 0x10000 -+ -+#define get_phy_headline(addr) FIELD_GET(GENMASK(31, 28), addr) -+#define PHY_HEADLINE_VALID 0xf -+#define get_phy_target(addr) FIELD_GET(GENMASK(27, 0), addr) -+#define get_phy_compare(rfe, cv) (FIELD_PREP(GENMASK(23, 16), rfe) | \ -+ FIELD_PREP(GENMASK(7, 0), cv)) -+ -+#define get_phy_cond(addr) FIELD_GET(GENMASK(31, 28), addr) -+#define get_phy_cond_rfe(addr) FIELD_GET(GENMASK(23, 16), addr) -+#define get_phy_cond_pkg(addr) FIELD_GET(GENMASK(15, 8), addr) -+#define get_phy_cond_cv(addr) FIELD_GET(GENMASK(7, 0), addr) -+#define phy_div(a, b) ({typeof(b) _b = (b); (_b) ? ((a) / (_b)) : 0; }) -+#define PHY_COND_BRANCH_IF 0x8 -+#define PHY_COND_BRANCH_ELIF 0x9 -+#define PHY_COND_BRANCH_ELSE 0xa -+#define PHY_COND_BRANCH_END 0xb -+#define PHY_COND_CHECK 0x4 -+#define PHY_COND_DONT_CARE 0xff -+ -+#define RA_MASK_CCK_RATES GENMASK_ULL(3, 0) -+#define RA_MASK_OFDM_RATES GENMASK_ULL(11, 4) -+#define RA_MASK_SUBCCK_RATES 0x5ULL -+#define RA_MASK_SUBOFDM_RATES 0x10ULL -+#define RA_MASK_HT_1SS_RATES GENMASK_ULL(19, 12) -+#define RA_MASK_HT_2SS_RATES GENMASK_ULL(31, 24) -+#define RA_MASK_HT_3SS_RATES GENMASK_ULL(43, 36) -+#define RA_MASK_HT_4SS_RATES GENMASK_ULL(55, 48) -+#define RA_MASK_HT_RATES GENMASK_ULL(55, 12) -+#define RA_MASK_VHT_1SS_RATES GENMASK_ULL(21, 12) -+#define RA_MASK_VHT_2SS_RATES GENMASK_ULL(33, 24) -+#define RA_MASK_VHT_3SS_RATES GENMASK_ULL(45, 36) -+#define RA_MASK_VHT_4SS_RATES GENMASK_ULL(57, 48) -+#define RA_MASK_VHT_RATES GENMASK_ULL(57, 12) -+#define RA_MASK_HE_1SS_RATES GENMASK_ULL(23, 12) -+#define RA_MASK_HE_2SS_RATES GENMASK_ULL(35, 24) -+#define RA_MASK_HE_3SS_RATES GENMASK_ULL(47, 36) -+#define RA_MASK_HE_4SS_RATES GENMASK_ULL(59, 48) -+#define RA_MASK_HE_RATES GENMASK_ULL(59, 12) -+ -+#define CFO_TRK_ENABLE_TH (2 << 2) -+#define CFO_TRK_STOP_TH_4 (30 << 2) -+#define CFO_TRK_STOP_TH_3 (20 << 2) -+#define CFO_TRK_STOP_TH_2 (10 << 2) -+#define CFO_TRK_STOP_TH_1 (00 << 2) -+#define CFO_TRK_STOP_TH (2 << 2) -+#define CFO_SW_COMP_FINE_TUNE (2 << 2) -+#define CFO_PERIOD_CNT 15 -+#define CFO_TP_UPPER 100 -+#define CFO_TP_LOWER 50 -+#define CFO_COMP_PERIOD 250 -+#define CFO_COMP_WEIGHT 8 -+#define MAX_CFO_TOLERANCE 30 -+ -+#define CCX_MAX_PERIOD 2097 -+#define CCX_MAX_PERIOD_UNIT 32 -+#define MS_TO_4US_RATIO 250 -+#define ENV_MNTR_FAIL_DWORD 0xffffffff -+#define ENV_MNTR_IFSCLM_HIS_MAX 127 -+#define PERMIL 1000 -+#define PERCENT 100 -+#define IFS_CLM_TH0_UPPER 64 -+#define IFS_CLM_TH_MUL 4 -+#define IFS_CLM_TH_START_IDX 0 -+ -+#define TIA0_GAIN_A 12 -+#define TIA0_GAIN_G 16 -+#define LNA0_GAIN (-24) -+#define U4_MAX_BIT 3 -+#define U8_MAX_BIT 7 -+#define DIG_GAIN_SHIFT 2 -+#define DIG_GAIN 8 -+ -+#define LNA_IDX_MAX 6 -+#define LNA_IDX_MIN 0 -+#define TIA_IDX_MAX 1 -+#define TIA_IDX_MIN 0 -+#define RXB_IDX_MAX 31 -+#define RXB_IDX_MIN 0 -+ -+#define PD_TH_MAX_RSSI 70 -+#define PD_TH_MIN_RSSI 8 -+#define PD_TH_BW80_CMP_VAL 6 -+#define PD_TH_BW40_CMP_VAL 3 -+#define PD_TH_BW20_CMP_VAL 0 -+#define PD_TH_CMP_VAL 3 -+#define PD_TH_SB_FLTR_CMP_VAL 7 -+ -+#define PHYSTS_MGNT BIT(RTW89_RX_TYPE_MGNT) -+#define PHYSTS_CTRL BIT(RTW89_RX_TYPE_CTRL) -+#define PHYSTS_DATA BIT(RTW89_RX_TYPE_DATA) -+#define PHYSTS_RSVD BIT(RTW89_RX_TYPE_RSVD) -+#define PPDU_FILTER_BITMAP (PHYSTS_MGNT | PHYSTS_DATA) -+ -+enum rtw89_phy_c2h_ra_func { -+ RTW89_PHY_C2H_FUNC_STS_RPT, -+ RTW89_PHY_C2H_FUNC_MU_GPTBL_RPT, -+ RTW89_PHY_C2H_FUNC_TXSTS, -+ RTW89_PHY_C2H_FUNC_RA_MAX, -+}; -+ -+enum rtw89_phy_c2h_class { -+ RTW89_PHY_C2H_CLASS_RUA, -+ RTW89_PHY_C2H_CLASS_RA, -+ RTW89_PHY_C2H_CLASS_DM, -+ RTW89_PHY_C2H_CLASS_BTC_MIN = 0x10, -+ RTW89_PHY_C2H_CLASS_BTC_MAX = 0x17, -+ RTW89_PHY_C2H_CLASS_MAX, -+}; -+ -+enum rtw89_env_monitor_result_level { -+ RTW89_PHY_ENV_MON_CCX_FAIL = 0, -+ RTW89_PHY_ENV_MON_NHM = BIT(0), -+ RTW89_PHY_ENV_MON_CLM = BIT(1), -+ RTW89_PHY_ENV_MON_FAHM = BIT(2), -+ RTW89_PHY_ENV_MON_IFS_CLM = BIT(3), -+ RTW89_PHY_ENV_MON_EDCCA_CLM = BIT(4), -+}; -+ -+#define CCX_US_BASE_RATIO 4 -+enum rtw89_ccx_unit { -+ RTW89_CCX_4_US = 0, -+ RTW89_CCX_8_US = 1, -+ RTW89_CCX_16_US = 2, -+ RTW89_CCX_32_US = 3 -+}; -+ -+enum rtw89_dig_gain_type { -+ RTW89_DIG_GAIN_LNA_G = 0, -+ RTW89_DIG_GAIN_TIA_G = 1, -+ RTW89_DIG_GAIN_LNA_A = 2, -+ RTW89_DIG_GAIN_TIA_A = 3, -+ RTW89_DIG_GAIN_MAX = 4 -+}; -+ -+enum rtw89_dig_gain_lna_idx { -+ RTW89_DIG_GAIN_LNA_IDX1 = 1, -+ RTW89_DIG_GAIN_LNA_IDX2 = 2, -+ RTW89_DIG_GAIN_LNA_IDX3 = 3, -+ RTW89_DIG_GAIN_LNA_IDX4 = 4, -+ RTW89_DIG_GAIN_LNA_IDX5 = 5, -+ RTW89_DIG_GAIN_LNA_IDX6 = 6 -+}; -+ -+enum rtw89_dig_gain_tia_idx { -+ RTW89_DIG_GAIN_TIA_IDX0 = 0, -+ RTW89_DIG_GAIN_TIA_IDX1 = 1 -+}; -+ -+struct rtw89_txpwr_byrate_cfg { -+ enum rtw89_band band; -+ enum rtw89_nss nss; -+ enum rtw89_rate_section rs; -+ u8 shf; -+ u8 len; -+ u32 data; -+}; -+ -+#define DELTA_SWINGIDX_SIZE 30 -+ -+struct rtw89_txpwr_track_cfg { -+ const u8 (*delta_swingidx_5gb_n)[DELTA_SWINGIDX_SIZE]; -+ const u8 (*delta_swingidx_5gb_p)[DELTA_SWINGIDX_SIZE]; -+ const u8 (*delta_swingidx_5ga_n)[DELTA_SWINGIDX_SIZE]; -+ const u8 (*delta_swingidx_5ga_p)[DELTA_SWINGIDX_SIZE]; -+ const u8 *delta_swingidx_2gb_n; -+ const u8 *delta_swingidx_2gb_p; -+ const u8 *delta_swingidx_2ga_n; -+ const u8 *delta_swingidx_2ga_p; -+ const u8 *delta_swingidx_2g_cck_b_n; -+ const u8 *delta_swingidx_2g_cck_b_p; -+ const u8 *delta_swingidx_2g_cck_a_n; -+ const u8 *delta_swingidx_2g_cck_a_p; -+}; -+ -+struct rtw89_phy_dig_gain_cfg { -+ const struct rtw89_reg_def *table; -+ u8 size; -+}; -+ -+struct rtw89_phy_dig_gain_table { -+ const struct rtw89_phy_dig_gain_cfg *cfg_lna_g; -+ const struct rtw89_phy_dig_gain_cfg *cfg_tia_g; -+ const struct rtw89_phy_dig_gain_cfg *cfg_lna_a; -+ const struct rtw89_phy_dig_gain_cfg *cfg_tia_a; -+}; -+ -+struct rtw89_phy_reg3_tbl { -+ const struct rtw89_reg3_def *reg3; -+ int size; -+}; -+ -+#define DECLARE_PHY_REG3_TBL(_name) \ -+const struct rtw89_phy_reg3_tbl _name ## _tbl = { \ -+ .reg3 = _name, \ -+ .size = ARRAY_SIZE(_name), \ -+} -+ -+static inline void rtw89_phy_write8(struct rtw89_dev *rtwdev, -+ u32 addr, u8 data) -+{ -+ rtw89_write8(rtwdev, addr | RTW89_PHY_ADDR_OFFSET, data); -+} -+ -+static inline void rtw89_phy_write16(struct rtw89_dev *rtwdev, -+ u32 addr, u16 data) -+{ -+ rtw89_write16(rtwdev, addr | RTW89_PHY_ADDR_OFFSET, data); -+} -+ -+static inline void rtw89_phy_write32(struct rtw89_dev *rtwdev, -+ u32 addr, u32 data) -+{ -+ rtw89_write32(rtwdev, addr | RTW89_PHY_ADDR_OFFSET, data); -+} -+ -+static inline void rtw89_phy_write32_set(struct rtw89_dev *rtwdev, -+ u32 addr, u32 bits) -+{ -+ rtw89_write32_set(rtwdev, addr | RTW89_PHY_ADDR_OFFSET, bits); -+} -+ -+static inline void rtw89_phy_write32_clr(struct rtw89_dev *rtwdev, -+ u32 addr, u32 bits) -+{ -+ rtw89_write32_clr(rtwdev, addr | RTW89_PHY_ADDR_OFFSET, bits); -+} -+ -+static inline void rtw89_phy_write32_mask(struct rtw89_dev *rtwdev, -+ u32 addr, u32 mask, u32 data) -+{ -+ rtw89_write32_mask(rtwdev, addr | RTW89_PHY_ADDR_OFFSET, mask, data); -+} -+ -+static inline u8 rtw89_phy_read8(struct rtw89_dev *rtwdev, u32 addr) -+{ -+ return rtw89_read8(rtwdev, addr | RTW89_PHY_ADDR_OFFSET); -+} -+ -+static inline u16 rtw89_phy_read16(struct rtw89_dev *rtwdev, u32 addr) -+{ -+ return rtw89_read16(rtwdev, addr | RTW89_PHY_ADDR_OFFSET); -+} -+ -+static inline u32 rtw89_phy_read32(struct rtw89_dev *rtwdev, u32 addr) -+{ -+ return rtw89_read32(rtwdev, addr | RTW89_PHY_ADDR_OFFSET); -+} -+ -+static inline u32 rtw89_phy_read32_mask(struct rtw89_dev *rtwdev, -+ u32 addr, u32 mask) -+{ -+ return rtw89_read32_mask(rtwdev, addr | RTW89_PHY_ADDR_OFFSET, mask); -+} -+ -+void rtw89_phy_write_reg3_tbl(struct rtw89_dev *rtwdev, -+ const struct rtw89_phy_reg3_tbl *tbl); -+u8 rtw89_phy_get_txsc(struct rtw89_dev *rtwdev, -+ struct rtw89_channel_params *param, -+ enum rtw89_bandwidth dbw); -+u32 rtw89_phy_read_rf(struct rtw89_dev *rtwdev, enum rtw89_rf_path rf_path, -+ u32 addr, u32 mask); -+bool rtw89_phy_write_rf(struct rtw89_dev *rtwdev, enum rtw89_rf_path rf_path, -+ u32 addr, u32 mask, u32 data); -+void rtw89_phy_init_bb_reg(struct rtw89_dev *rtwdev); -+void rtw89_phy_init_rf_reg(struct rtw89_dev *rtwdev); -+void rtw89_phy_dm_init(struct rtw89_dev *rtwdev); -+void rtw89_phy_write32_idx(struct rtw89_dev *rtwdev, u32 addr, u32 mask, -+ u32 data, enum rtw89_phy_idx phy_idx); -+void rtw89_phy_load_txpwr_byrate(struct rtw89_dev *rtwdev, -+ const struct rtw89_txpwr_table *tbl); -+s8 rtw89_phy_read_txpwr_byrate(struct rtw89_dev *rtwdev, -+ const struct rtw89_rate_desc *rate_desc); -+void rtw89_phy_fill_txpwr_limit(struct rtw89_dev *rtwdev, -+ struct rtw89_txpwr_limit *lmt, -+ u8 ntx); -+void rtw89_phy_fill_txpwr_limit_ru(struct rtw89_dev *rtwdev, -+ struct rtw89_txpwr_limit_ru *lmt_ru, -+ u8 ntx); -+s8 rtw89_phy_read_txpwr_limit(struct rtw89_dev *rtwdev, -+ u8 bw, u8 ntx, u8 rs, u8 bf, u8 ch); -+void rtw89_phy_ra_assoc(struct rtw89_dev *rtwdev, struct ieee80211_sta *sta); -+void rtw89_phy_ra_update(struct rtw89_dev *rtwdev); -+void rtw89_phy_ra_updata_sta(struct rtw89_dev *rtwdev, struct ieee80211_sta *sta); -+void rtw89_phy_rate_pattern_vif(struct rtw89_dev *rtwdev, -+ struct ieee80211_vif *vif, -+ const struct cfg80211_bitrate_mask *mask); -+void rtw89_phy_c2h_handle(struct rtw89_dev *rtwdev, struct sk_buff *skb, -+ u32 len, u8 class, u8 func); -+void rtw89_phy_cfo_track(struct rtw89_dev *rtwdev); -+void rtw89_phy_cfo_track_work(struct work_struct *work); -+void rtw89_phy_cfo_parse(struct rtw89_dev *rtwdev, s16 cfo_val, -+ struct rtw89_rx_phy_ppdu *phy_ppdu); -+void rtw89_phy_stat_track(struct rtw89_dev *rtwdev); -+void rtw89_phy_env_monitor_track(struct rtw89_dev *rtwdev); -+void rtw89_phy_set_phy_regs(struct rtw89_dev *rtwdev, u32 addr, u32 mask, -+ u32 val); -+void rtw89_phy_dig_reset(struct rtw89_dev *rtwdev); -+void rtw89_phy_dig(struct rtw89_dev *rtwdev); -+void rtw89_phy_set_bss_color(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif); -+ -+#endif -diff --git a/drivers/net/wireless/realtek/rtw89/ps.c b/drivers/net/wireless/realtek/rtw89/ps.c -new file mode 100644 -index 000000000000..7eaa01e41ef2 ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/ps.c -@@ -0,0 +1,150 @@ -+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause -+/* Copyright(c) 2019-2020 Realtek Corporation -+ */ -+ -+#include "coex.h" -+#include "core.h" -+#include "debug.h" -+#include "fw.h" -+#include "mac.h" -+#include "ps.h" -+#include "reg.h" -+#include "util.h" -+ -+static int rtw89_fw_leave_lps_check(struct rtw89_dev *rtwdev, u8 macid) -+{ -+ u32 pwr_en_bit = 0xE; -+ u32 chk_msk = pwr_en_bit << (4 * macid); -+ u32 polling; -+ int ret; -+ -+ ret = read_poll_timeout_atomic(rtw89_read32_mask, polling, !polling, -+ 1000, 50000, false, rtwdev, -+ R_AX_PPWRBIT_SETTING, chk_msk); -+ if (ret) { -+ rtw89_info(rtwdev, "rtw89: failed to leave lps state\n"); -+ return -EBUSY; -+ } -+ -+ return 0; -+} -+ -+static void __rtw89_enter_ps_mode(struct rtw89_dev *rtwdev) -+{ -+ if (!rtwdev->ps_mode) -+ return; -+ -+ if (test_and_set_bit(RTW89_FLAG_LOW_POWER_MODE, rtwdev->flags)) -+ return; -+ -+ rtw89_mac_power_mode_change(rtwdev, true); -+} -+ -+void __rtw89_leave_ps_mode(struct rtw89_dev *rtwdev) -+{ -+ if (!rtwdev->ps_mode) -+ return; -+ -+ if (test_and_clear_bit(RTW89_FLAG_LOW_POWER_MODE, rtwdev->flags)) -+ rtw89_mac_power_mode_change(rtwdev, false); -+} -+ -+static void __rtw89_enter_lps(struct rtw89_dev *rtwdev, u8 mac_id) -+{ -+ struct rtw89_lps_parm lps_param = { -+ .macid = mac_id, -+ .psmode = RTW89_MAC_AX_PS_MODE_LEGACY, -+ .lastrpwm = RTW89_LAST_RPWM_PS, -+ }; -+ -+ rtw89_btc_ntfy_radio_state(rtwdev, BTC_RFCTRL_FW_CTRL); -+ rtw89_fw_h2c_lps_parm(rtwdev, &lps_param); -+} -+ -+static void __rtw89_leave_lps(struct rtw89_dev *rtwdev, u8 mac_id) -+{ -+ struct rtw89_lps_parm lps_param = { -+ .macid = mac_id, -+ .psmode = RTW89_MAC_AX_PS_MODE_ACTIVE, -+ .lastrpwm = RTW89_LAST_RPWM_ACTIVE, -+ }; -+ -+ rtw89_fw_h2c_lps_parm(rtwdev, &lps_param); -+ rtw89_fw_leave_lps_check(rtwdev, 0); -+ rtw89_btc_ntfy_radio_state(rtwdev, BTC_RFCTRL_WL_ON); -+} -+ -+void rtw89_leave_ps_mode(struct rtw89_dev *rtwdev) -+{ -+ lockdep_assert_held(&rtwdev->mutex); -+ -+ __rtw89_leave_ps_mode(rtwdev); -+} -+ -+void rtw89_enter_lps(struct rtw89_dev *rtwdev, u8 mac_id) -+{ -+ lockdep_assert_held(&rtwdev->mutex); -+ -+ if (test_and_set_bit(RTW89_FLAG_LEISURE_PS, rtwdev->flags)) -+ return; -+ -+ __rtw89_enter_lps(rtwdev, mac_id); -+ __rtw89_enter_ps_mode(rtwdev); -+} -+ -+static void rtw89_leave_lps_vif(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif) -+{ -+ if (rtwvif->wifi_role != RTW89_WIFI_ROLE_STATION) -+ return; -+ -+ __rtw89_leave_ps_mode(rtwdev); -+ __rtw89_leave_lps(rtwdev, rtwvif->mac_id); -+} -+ -+void rtw89_leave_lps(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_vif *rtwvif; -+ -+ lockdep_assert_held(&rtwdev->mutex); -+ -+ if (!test_and_clear_bit(RTW89_FLAG_LEISURE_PS, rtwdev->flags)) -+ return; -+ -+ rtw89_for_each_rtwvif(rtwdev, rtwvif) -+ rtw89_leave_lps_vif(rtwdev, rtwvif); -+} -+ -+void rtw89_enter_ips(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_vif *rtwvif; -+ -+ set_bit(RTW89_FLAG_INACTIVE_PS, rtwdev->flags); -+ -+ rtw89_for_each_rtwvif(rtwdev, rtwvif) -+ rtw89_mac_vif_deinit(rtwdev, rtwvif); -+ -+ rtw89_core_stop(rtwdev); -+} -+ -+void rtw89_leave_ips(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_vif *rtwvif; -+ int ret; -+ -+ ret = rtw89_core_start(rtwdev); -+ if (ret) -+ rtw89_err(rtwdev, "failed to leave idle state\n"); -+ -+ rtw89_set_channel(rtwdev); -+ -+ rtw89_for_each_rtwvif(rtwdev, rtwvif) -+ rtw89_mac_vif_init(rtwdev, rtwvif); -+ -+ clear_bit(RTW89_FLAG_INACTIVE_PS, rtwdev->flags); -+} -+ -+void rtw89_set_coex_ctrl_lps(struct rtw89_dev *rtwdev, bool btc_ctrl) -+{ -+ if (btc_ctrl) -+ rtw89_leave_lps(rtwdev); -+} -diff --git a/drivers/net/wireless/realtek/rtw89/ps.h b/drivers/net/wireless/realtek/rtw89/ps.h -new file mode 100644 -index 000000000000..a184b68994aa ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/ps.h -@@ -0,0 +1,16 @@ -+/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ -+/* Copyright(c) 2019-2020 Realtek Corporation -+ */ -+ -+#ifndef __RTW89_PS_H_ -+#define __RTW89_PS_H_ -+ -+void rtw89_enter_lps(struct rtw89_dev *rtwdev, u8 mac_id); -+void rtw89_leave_lps(struct rtw89_dev *rtwdev); -+void __rtw89_leave_ps_mode(struct rtw89_dev *rtwdev); -+void rtw89_leave_ps_mode(struct rtw89_dev *rtwdev); -+void rtw89_enter_ips(struct rtw89_dev *rtwdev); -+void rtw89_leave_ips(struct rtw89_dev *rtwdev); -+void rtw89_set_coex_ctrl_lps(struct rtw89_dev *rtwdev, bool btc_ctrl); -+ -+#endif -diff --git a/drivers/net/wireless/realtek/rtw89/reg.h b/drivers/net/wireless/realtek/rtw89/reg.h -new file mode 100644 -index 000000000000..365d8c8ce57b ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/reg.h -@@ -0,0 +1,2159 @@ -+/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ -+/* Copyright(c) 2019-2020 Realtek Corporation -+ */ -+ -+#ifndef __RTW89_REG_H__ -+#define __RTW89_REG_H__ -+ -+#define R_AX_SYS_WL_EFUSE_CTRL 0x000A -+#define B_AX_AUTOLOAD_SUS BIT(5) -+ -+#define R_AX_SYS_FUNC_EN 0x0002 -+#define B_AX_FEN_BB_GLB_RSTN BIT(1) -+#define B_AX_FEN_BBRSTB BIT(0) -+ -+#define R_AX_SYS_PW_CTRL 0x0004 -+#define B_AX_PSUS_OFF_CAPC_EN BIT(14) -+ -+#define R_AX_SYS_CLK_CTRL 0x0008 -+#define B_AX_CPU_CLK_EN BIT(14) -+ -+#define R_AX_RSV_CTRL 0x001C -+#define B_AX_R_DIS_PRST BIT(6) -+#define B_AX_WLOCK_1C_BIT6 BIT(5) -+ -+#define R_AX_EFUSE_CTRL_1 0x0038 -+#define B_AX_EF_PGPD_MASK GENMASK(30, 28) -+#define B_AX_EF_RDT BIT(27) -+#define B_AX_EF_VDDQST_MASK GENMASK(26, 24) -+#define B_AX_EF_PGTS_MASK GENMASK(23, 20) -+#define B_AX_EF_PD_DIS BIT(11) -+#define B_AX_EF_POR BIT(10) -+#define B_AX_EF_CELL_SEL_MASK GENMASK(9, 8) -+ -+#define R_AX_SPSLDO_ON_CTRL0 0x0200 -+#define B_AX_OCP_L1_MASK GENMASK(15, 13) -+ -+#define R_AX_EFUSE_CTRL 0x0030 -+#define B_AX_EF_MODE_SEL_MASK GENMASK(31, 30) -+#define B_AX_EF_RDY BIT(29) -+#define B_AX_EF_COMP_RESULT BIT(28) -+#define B_AX_EF_ADDR_MASK GENMASK(26, 16) -+#define B_AX_EF_DATA_MASK GENMASK(15, 0) -+ -+#define R_AX_GPIO_MUXCFG 0x0040 -+#define B_AX_BOOT_MODE BIT(19) -+#define B_AX_WL_EECS_EXT_32K_SEL BIT(18) -+#define B_AX_WL_SEC_BONDING_OPT_STS BIT(17) -+#define B_AX_SECSIC_SEL BIT(16) -+#define B_AX_ENHTP BIT(14) -+#define B_AX_BT_AOD_GPIO3 BIT(13) -+#define B_AX_ENSIC BIT(12) -+#define B_AX_SIC_SWRST BIT(11) -+#define B_AX_PO_WIFI_PTA_PINS BIT(10) -+#define B_AX_PO_BT_PTA_PINS BIT(9) -+#define B_AX_ENUARTTX BIT(8) -+#define B_AX_BTMODE_MASK GENMASK(7, 6) -+#define MAC_AX_BT_MODE_0_3 0 -+#define MAC_AX_BT_MODE_2 2 -+#define B_AX_ENBT BIT(5) -+#define B_AX_EROM_EN BIT(4) -+#define B_AX_ENUARTRX BIT(2) -+#define B_AX_GPIOSEL_MASK GENMASK(1, 0) -+ -+#define R_AX_DBG_CTRL 0x0058 -+#define B_AX_DBG_SEL1_4BIT GENMASK(31, 30) -+#define B_AX_DBG_SEL1_16BIT BIT(27) -+#define B_AX_DBG_SEL1 GENMASK(23, 16) -+#define B_AX_DBG_SEL0_4BIT GENMASK(15, 14) -+#define B_AX_DBG_SEL0_16BIT BIT(11) -+#define B_AX_DBG_SEL0 GENMASK(7, 0) -+ -+#define R_AX_SYS_SDIO_CTRL 0x0070 -+#define B_AX_PCIE_DIS_L2_CTRL_LDO_HCI BIT(15) -+#define B_AX_PCIE_DIS_WLSUS_AFT_PDN BIT(14) -+#define B_AX_PCIE_AUXCLK_GATE BIT(11) -+#define B_AX_LTE_MUX_CTRL_PATH BIT(26) -+ -+#define R_AX_PLATFORM_ENABLE 0x0088 -+#define B_AX_WCPU_EN BIT(1) -+ -+#define R_AX_SCOREBOARD 0x00AC -+#define B_AX_TOGGLE BIT(31) -+#define B_MAC_AX_SB_FW_MASK GENMASK(30, 24) -+#define B_MAC_AX_SB_DRV_MASK GENMASK(23, 0) -+#define B_MAC_AX_BTGS1_NOTIFY BIT(0) -+#define MAC_AX_NOTIFY_TP_MAJOR 0x81 -+#define MAC_AX_NOTIFY_PWR_MAJOR 0x80 -+ -+#define R_AX_DBG_PORT_SEL 0x00C0 -+#define B_AX_DEBUG_ST_MASK GENMASK(31, 0) -+ -+#define R_AX_SYS_CFG1 0x00F0 -+#define B_AX_CHIP_VER_MASK GENMASK(15, 12) -+ -+#define R_AX_SYS_STATUS1 0x00F4 -+#define B_AX_SEL_0XC0_MASK GENMASK(17, 16) -+ -+#define R_AX_HALT_H2C_CTRL 0x0160 -+#define R_AX_HALT_H2C 0x0168 -+#define B_AX_HALT_H2C_TRIGGER BIT(0) -+#define R_AX_HALT_C2H_CTRL 0x0164 -+#define R_AX_HALT_C2H 0x016C -+ -+#define R_AX_WCPU_FW_CTRL 0x01E0 -+#define B_AX_WCPU_FWDL_STS_MASK GENMASK(7, 5) -+#define B_AX_FWDL_PATH_RDY BIT(2) -+#define B_AX_H2C_PATH_RDY BIT(1) -+#define B_AX_WCPU_FWDL_EN BIT(0) -+ -+#define R_AX_RPWM 0x01E4 -+#define R_AX_PCIE_HRPWM 0x10C0 -+#define PS_RPWM_TOGGLE BIT(15) -+#define PS_RPWM_ACK BIT(14) -+#define PS_RPWM_SEQ_NUM GENMASK(13, 12) -+#define PS_RPWM_STATE 0x7 -+#define RPWM_SEQ_NUM_MAX 3 -+#define PS_CPWM_SEQ_NUM GENMASK(13, 12) -+#define PS_CPWM_RSP_SEQ_NUM GENMASK(9, 8) -+#define PS_CPWM_STATE GENMASK(2, 0) -+#define CPWM_SEQ_NUM_MAX 3 -+ -+#define R_AX_BOOT_REASON 0x01E6 -+#define B_AX_BOOT_REASON_MASK GENMASK(2, 0) -+ -+#define R_AX_LDM 0x01E8 -+#define B_AX_EN_32K BIT(31) -+ -+#define R_AX_UDM0 0x01F0 -+#define R_AX_UDM1 0x01F4 -+#define R_AX_UDM2 0x01F8 -+#define R_AX_UDM3 0x01FC -+ -+#define R_AX_XTAL_ON_CTRL0 0x0280 -+#define B_AX_XTAL_SC_LPS BIT(31) -+#define B_AX_XTAL_SC_XO_MASK GENMASK(23, 17) -+#define B_AX_XTAL_SC_XI_MASK GENMASK(16, 10) -+#define B_AX_XTAL_SC_MASK GENMASK(6, 0) -+ -+#define R_AX_GPIO0_7_FUNC_SEL 0x02D0 -+ -+#define R_AX_WLRF_CTRL 0x02F0 -+#define B_AX_WLRF1_CTRL_7 BIT(15) -+#define B_AX_WLRF1_CTRL_1 BIT(9) -+#define B_AX_WLRF_CTRL_7 BIT(7) -+#define B_AX_WLRF_CTRL_1 BIT(1) -+ -+#define R_AX_IC_PWR_STATE 0x03F0 -+#define B_AX_WHOLE_SYS_PWR_STE_MASK GENMASK(25, 16) -+#define B_AX_WLMAC_PWR_STE_MASK GENMASK(9, 8) -+#define B_AX_UART_HCISYS_PWR_STE_MASK GENMASK(7, 6) -+#define B_AX_SDIO_HCISYS_PWR_STE_MASK GENMASK(5, 4) -+#define B_AX_USB_HCISYS_PWR_STE_MASK GENMASK(3, 2) -+#define B_AX_PCIE_HCISYS_PWR_STE_MASK GENMASK(1, 0) -+ -+#define R_AX_FILTER_MODEL_ADDR 0x0C04 -+ -+#define R_AX_PCIE_DBG_CTRL 0x11C0 -+#define B_AX_DBG_DUMMY_MASK GENMASK(23, 16) -+#define B_AX_DBG_SEL_MASK GENMASK(15, 13) -+#define B_AX_PCIE_DBG_SEL BIT(12) -+#define B_AX_MRD_TIMEOUT_EN BIT(10) -+#define B_AX_ASFF_FULL_NO_STK BIT(1) -+#define B_AX_EN_STUCK_DBG BIT(0) -+ -+#define R_AX_PHYREG_SET 0x8040 -+#define PHYREG_SET_ALL_CYCLE 0x8 -+ -+#define R_AX_HD0IMR 0x8110 -+#define B_AX_WDT_PTFM_INT_EN BIT(5) -+#define B_AX_CPWM_INT_EN BIT(2) -+#define B_AX_GT3_INT_EN BIT(1) -+#define B_AX_C2H_INT_EN BIT(0) -+#define R_AX_HD0ISR 0x8114 -+#define B_AX_C2H_INT BIT(0) -+ -+#define R_AX_H2CREG_DATA0 0x8140 -+#define R_AX_H2CREG_DATA1 0x8144 -+#define R_AX_H2CREG_DATA2 0x8148 -+#define R_AX_H2CREG_DATA3 0x814C -+#define R_AX_C2HREG_DATA0 0x8150 -+#define R_AX_C2HREG_DATA1 0x8154 -+#define R_AX_C2HREG_DATA2 0x8158 -+#define R_AX_C2HREG_DATA3 0x815C -+#define R_AX_H2CREG_CTRL 0x8160 -+#define B_AX_H2CREG_TRIGGER BIT(0) -+#define R_AX_C2HREG_CTRL 0x8164 -+#define B_AX_C2HREG_TRIGGER BIT(0) -+#define R_AX_CPWM 0x8170 -+ -+#define R_AX_HCI_FUNC_EN 0x8380 -+#define B_AX_HCI_RXDMA_EN BIT(1) -+#define B_AX_HCI_TXDMA_EN BIT(0) -+ -+#define R_AX_BOOT_DBG 0x83F0 -+ -+#define R_AX_DMAC_FUNC_EN 0x8400 -+#define B_AX_MAC_FUNC_EN BIT(30) -+#define B_AX_DMAC_FUNC_EN BIT(29) -+#define B_AX_MPDU_PROC_EN BIT(28) -+#define B_AX_WD_RLS_EN BIT(27) -+#define B_AX_DLE_WDE_EN BIT(26) -+#define B_AX_TXPKT_CTRL_EN BIT(25) -+#define B_AX_STA_SCH_EN BIT(24) -+#define B_AX_DLE_PLE_EN BIT(23) -+#define B_AX_PKT_BUF_EN BIT(22) -+#define B_AX_DMAC_TBL_EN BIT(21) -+#define B_AX_PKT_IN_EN BIT(20) -+#define B_AX_DLE_CPUIO_EN BIT(19) -+#define B_AX_DISPATCHER_EN BIT(18) -+#define B_AX_MAC_SEC_EN BIT(16) -+ -+#define R_AX_DMAC_CLK_EN 0x8404 -+#define B_AX_WD_RLS_CLK_EN BIT(27) -+#define B_AX_DLE_WDE_CLK_EN BIT(26) -+#define B_AX_TXPKT_CTRL_CLK_EN BIT(25) -+#define B_AX_STA_SCH_CLK_EN BIT(24) -+#define B_AX_DLE_PLE_CLK_EN BIT(23) -+#define B_AX_PKT_IN_CLK_EN BIT(20) -+#define B_AX_DLE_CPUIO_CLK_EN BIT(19) -+#define B_AX_DISPATCHER_CLK_EN BIT(18) -+#define B_AX_MAC_SEC_CLK_EN BIT(16) -+ -+#define PCI_LTR_IDLE_TIMER_1US 0 -+#define PCI_LTR_IDLE_TIMER_10US 1 -+#define PCI_LTR_IDLE_TIMER_100US 2 -+#define PCI_LTR_IDLE_TIMER_200US 3 -+#define PCI_LTR_IDLE_TIMER_400US 4 -+#define PCI_LTR_IDLE_TIMER_800US 5 -+#define PCI_LTR_IDLE_TIMER_1_6MS 6 -+#define PCI_LTR_IDLE_TIMER_3_2MS 7 -+#define PCI_LTR_IDLE_TIMER_R_ERR 0xFD -+#define PCI_LTR_IDLE_TIMER_DEF 0xFE -+#define PCI_LTR_IDLE_TIMER_IGNORE 0xFF -+ -+#define PCI_LTR_SPC_10US 0 -+#define PCI_LTR_SPC_100US 1 -+#define PCI_LTR_SPC_500US 2 -+#define PCI_LTR_SPC_1MS 3 -+#define PCI_LTR_SPC_R_ERR 0xFD -+#define PCI_LTR_SPC_DEF 0xFE -+#define PCI_LTR_SPC_IGNORE 0xFF -+ -+#define R_AX_LTR_CTRL_0 0x8410 -+#define B_AX_LTR_SPACE_IDX_MASK GENMASK(13, 12) -+#define B_AX_LTR_IDLE_TIMER_IDX_MASK GENMASK(10, 8) -+#define B_AX_APP_LTR_ACT BIT(5) -+#define B_AX_APP_LTR_IDLE BIT(4) -+#define B_AX_LTR_EN BIT(1) -+#define B_AX_LTR_HW_EN BIT(0) -+ -+#define R_AX_LTR_CTRL_1 0x8414 -+#define B_AX_LTR_RX1_TH_MASK GENMASK(27, 16) -+#define B_AX_LTR_RX0_TH_MASK GENMASK(11, 0) -+ -+#define R_AX_LTR_IDLE_LATENCY 0x8418 -+ -+#define R_AX_LTR_ACTIVE_LATENCY 0x841C -+ -+#define R_AX_SER_DBG_INFO 0x8424 -+#define B_AX_L0_TO_L1_EVENT_MASK GENMASK(31, 28) -+ -+#define R_AX_DLE_EMPTY0 0x8430 -+#define B_AX_PLE_EMPTY_QTA_DMAC_CPUIO BIT(26) -+#define B_AX_PLE_EMPTY_QTA_DMAC_MPDU_TX BIT(25) -+#define B_AX_PLE_EMPTY_QTA_DMAC_WLAN_CPU BIT(24) -+#define B_AX_PLE_EMPTY_QTA_DMAC_H2C BIT(23) -+#define B_AX_PLE_EMPTY_QTA_DMAC_B1_TXPL BIT(22) -+#define B_AX_PLE_EMPTY_QTA_DMAC_B0_TXPL BIT(21) -+#define B_AX_WDE_EMPTY_QTA_DMAC_CPUIO BIT(20) -+#define B_AX_WDE_EMPTY_QTA_DMAC_PKTIN BIT(19) -+#define B_AX_WDE_EMPTY_QTA_DMAC_DATA_CPU BIT(18) -+#define B_AX_WDE_EMPTY_QTA_DMAC_WLAN_CPU BIT(17) -+#define B_AX_WDE_EMPTY_QTA_DMAC_HIF BIT(16) -+#define B_AX_WDE_EMPTY_QUE_DMAC_PKTIN BIT(10) -+#define B_AX_PLE_EMPTY_QUE_DMAC_SEC_TX BIT(9) -+#define B_AX_PLE_EMPTY_QUE_DMAC_MPDU_TX BIT(8) -+#define B_AX_WDE_EMPTY_QUE_OTHERS BIT(7) -+#define B_AX_WDE_EMPTY_QUE_CMAC0_WMM1 BIT(4) -+#define B_AX_WDE_EMPTY_QUE_CMAC0_WMM0 BIT(3) -+#define B_AX_WDE_EMPTY_QUE_CMAC1_MBH BIT(2) -+#define B_AX_WDE_EMPTY_QUE_CMAC0_MBH BIT(1) -+#define B_AX_WDE_EMPTY_QUE_CMAC0_ALL_AC BIT(0) -+ -+#define R_AX_DMAC_ERR_ISR 0x8524 -+#define B_AX_DLE_CPUIO_ERR_FLAG BIT(10) -+#define B_AX_APB_BRIDGE_ERR_FLAG BIT(9) -+#define B_AX_DISPATCH_ERR_FLAG BIT(8) -+#define B_AX_PKTIN_ERR_FLAG BIT(7) -+#define B_AX_PLE_DLE_ERR_FLAG BIT(6) -+#define B_AX_TXPKTCTRL_ERR_FLAG BIT(5) -+#define B_AX_WDE_DLE_ERR_FLAG BIT(4) -+#define B_AX_STA_SCHEDULER_ERR_FLAG BIT(3) -+#define B_AX_MPDU_ERR_FLAG BIT(2) -+#define B_AX_WSEC_ERR_FLAG BIT(1) -+#define B_AX_WDRLS_ERR_FLAG BIT(0) -+ -+#define R_AX_DISPATCHER_GLOBAL_SETTING_0 0x8800 -+#define B_AX_PL_PAGE_128B_SEL BIT(9) -+#define B_AX_WD_PAGE_64B_SEL BIT(8) -+#define R_AX_OTHER_DISPATCHER_ERR_ISR 0x8804 -+#define R_AX_HOST_DISPATCHER_ERR_ISR 0x8808 -+#define R_AX_CPU_DISPATCHER_ERR_ISR 0x880C -+#define R_AX_TX_ADDRESS_INFO_MODE_SETTING 0x8810 -+#define B_AX_HOST_ADDR_INFO_8B_SEL BIT(0) -+ -+#define R_AX_HOST_DISPATCHER_ERR_IMR 0x8850 -+#define B_AX_HDT_OFFSET_UNMATCH_INT_EN BIT(7) -+#define B_AX_HDT_PKT_FAIL_DBG_INT_EN BIT(2) -+ -+#define R_AX_CPU_DISPATCHER_ERR_IMR 0x8854 -+#define B_AX_CPU_SHIFT_EN_ERR_INT_EN BIT(25) -+ -+#define R_AX_OTHER_DISPATCHER_ERR_IMR 0x8858 -+ -+#define R_AX_HCI_FC_CTRL 0x8A00 -+#define B_AX_HCI_FC_CH12_FULL_COND_MASK GENMASK(11, 10) -+#define B_AX_HCI_FC_WP_CH811_FULL_COND_MASK GENMASK(9, 8) -+#define B_AX_HCI_FC_WP_CH07_FULL_COND_MASK GENMASK(7, 6) -+#define B_AX_HCI_FC_WD_FULL_COND_MASK GENMASK(5, 4) -+#define B_AX_HCI_FC_CH12_EN BIT(3) -+#define B_AX_HCI_FC_MODE_MASK GENMASK(2, 1) -+#define B_AX_HCI_FC_EN BIT(0) -+ -+#define R_AX_CH_PAGE_CTRL 0x8A04 -+#define B_AX_PREC_PAGE_CH12_MASK GENMASK(24, 16) -+#define B_AX_PREC_PAGE_CH011_MASK GENMASK(8, 0) -+ -+#define B_AX_MAX_PG_MASK GENMASK(28, 16) -+#define B_AX_MIN_PG_MASK GENMASK(12, 0) -+#define B_AX_GRP BIT(31) -+#define R_AX_ACH0_PAGE_CTRL 0x8A10 -+#define R_AX_ACH1_PAGE_CTRL 0x8A14 -+#define R_AX_ACH2_PAGE_CTRL 0x8A18 -+#define R_AX_ACH3_PAGE_CTRL 0x8A1C -+#define R_AX_ACH4_PAGE_CTRL 0x8A20 -+#define R_AX_ACH5_PAGE_CTRL 0x8A24 -+#define R_AX_ACH6_PAGE_CTRL 0x8A28 -+#define R_AX_ACH7_PAGE_CTRL 0x8A2C -+#define R_AX_CH8_PAGE_CTRL 0x8A30 -+#define R_AX_CH9_PAGE_CTRL 0x8A34 -+#define R_AX_CH10_PAGE_CTRL 0x8A38 -+#define R_AX_CH11_PAGE_CTRL 0x8A3C -+ -+#define B_AX_AVAL_PG_MASK GENMASK(27, 16) -+#define B_AX_USE_PG_MASK GENMASK(12, 0) -+#define R_AX_ACH0_PAGE_INFO 0x8A50 -+#define R_AX_ACH1_PAGE_INFO 0x8A54 -+#define R_AX_ACH2_PAGE_INFO 0x8A58 -+#define R_AX_ACH3_PAGE_INFO 0x8A5C -+#define R_AX_ACH4_PAGE_INFO 0x8A60 -+#define R_AX_ACH5_PAGE_INFO 0x8A64 -+#define R_AX_ACH6_PAGE_INFO 0x8A68 -+#define R_AX_ACH7_PAGE_INFO 0x8A6C -+#define R_AX_CH8_PAGE_INFO 0x8A70 -+#define R_AX_CH9_PAGE_INFO 0x8A74 -+#define R_AX_CH10_PAGE_INFO 0x8A78 -+#define R_AX_CH11_PAGE_INFO 0x8A7C -+#define R_AX_CH12_PAGE_INFO 0x8A80 -+ -+#define R_AX_PUB_PAGE_INFO3 0x8A8C -+#define B_AX_G1_AVAL_PG_MASK GENMASK(28, 16) -+#define B_AX_G0_AVAL_PG_MASK GENMASK(12, 0) -+ -+#define R_AX_PUB_PAGE_CTRL1 0x8A90 -+#define B_AX_PUBPG_G1_MASK GENMASK(28, 16) -+#define B_AX_PUBPG_G0_MASK GENMASK(12, 0) -+ -+#define R_AX_PUB_PAGE_CTRL2 0x8A94 -+#define B_AX_PUBPG_ALL_MASK GENMASK(12, 0) -+ -+#define R_AX_PUB_PAGE_INFO1 0x8A98 -+#define B_AX_G1_USE_PG_MASK GENMASK(28, 16) -+#define B_AX_G0_USE_PG_MASK GENMASK(12, 0) -+ -+#define R_AX_PUB_PAGE_INFO2 0x8A9C -+#define B_AX_PUB_AVAL_PG_MASK GENMASK(12, 0) -+ -+#define R_AX_WP_PAGE_CTRL1 0x8AA0 -+#define B_AX_PREC_PAGE_WP_CH811_MASK GENMASK(24, 16) -+#define B_AX_PREC_PAGE_WP_CH07_MASK GENMASK(8, 0) -+ -+#define R_AX_WP_PAGE_CTRL2 0x8AA4 -+#define B_AX_WP_THRD_MASK GENMASK(12, 0) -+ -+#define R_AX_WP_PAGE_INFO1 0x8AA8 -+#define B_AX_WP_AVAL_PG_MASK GENMASK(28, 16) -+ -+#define R_AX_WDE_PKTBUF_CFG 0x8C08 -+#define B_AX_WDE_START_BOUND_MASK GENMASK(13, 8) -+#define B_AX_WDE_PAGE_SEL_MASK GENMASK(1, 0) -+#define B_AX_WDE_FREE_PAGE_NUM_MASK GENMASK(28, 16) -+#define R_AX_WDE_ERR_FLAG_CFG 0x8C34 -+#define R_AX_WDE_ERR_IMR 0x8C38 -+#define R_AX_WDE_ERR_ISR 0x8C3C -+ -+#define B_AX_WDE_MAX_SIZE_MASK GENMASK(27, 16) -+#define B_AX_WDE_MIN_SIZE_MASK GENMASK(11, 0) -+#define R_AX_WDE_QTA0_CFG 0x8C40 -+#define R_AX_WDE_QTA1_CFG 0x8C44 -+#define R_AX_WDE_QTA2_CFG 0x8C48 -+#define R_AX_WDE_QTA3_CFG 0x8C4C -+#define R_AX_WDE_QTA4_CFG 0x8C50 -+ -+#define B_AX_DLE_PUB_PGNUM GENMASK(12, 0) -+#define B_AX_DLE_FREE_HEADPG GENMASK(11, 0) -+#define B_AX_DLE_FREE_TAILPG GENMASK(27, 16) -+#define B_AX_DLE_USE_PGNUM GENMASK(27, 16) -+#define B_AX_DLE_RSV_PGNUM GENMASK(11, 0) -+#define B_AX_DLE_QEMPTY_GRP GENMASK(31, 0) -+ -+#define R_AX_WDE_INI_STATUS 0x8D00 -+#define B_AX_WDE_Q_MGN_INI_RDY BIT(1) -+#define B_AX_WDE_BUF_MGN_INI_RDY BIT(0) -+#define WDE_MGN_INI_RDY (B_AX_WDE_Q_MGN_INI_RDY | B_AX_WDE_BUF_MGN_INI_RDY) -+#define R_AX_WDE_DBG_FUN_INTF_CTL 0x8D10 -+#define B_AX_WDE_DFI_ACTIVE BIT(31) -+#define B_AX_WDE_DFI_TRGSEL_MASK GENMASK(19, 16) -+#define B_AX_WDE_DFI_ADDR_MASK GENMASK(15, 0) -+#define R_AX_WDE_DBG_FUN_INTF_DATA 0x8D14 -+#define B_AX_WDE_DFI_DATA_MASK GENMASK(31, 0) -+ -+#define R_AX_PLE_PKTBUF_CFG 0x9008 -+#define B_AX_PLE_START_BOUND_MASK GENMASK(13, 8) -+#define B_AX_PLE_PAGE_SEL_MASK GENMASK(1, 0) -+#define B_AX_PLE_FREE_PAGE_NUM_MASK GENMASK(28, 16) -+#define R_AX_PLE_ERR_FLAG_CFG 0x9034 -+ -+#define R_AX_PLE_ERR_IMR 0x9038 -+#define B_AX_PLE_GETNPG_STRPG_ERR_INT_EN BIT(5) -+ -+#define R_AX_PLE_ERR_FLAG_ISR 0x903C -+#define B_AX_PLE_MAX_SIZE_MASK GENMASK(27, 16) -+#define B_AX_PLE_MIN_SIZE_MASK GENMASK(11, 0) -+#define R_AX_PLE_QTA0_CFG 0x9040 -+#define R_AX_PLE_QTA1_CFG 0x9044 -+#define R_AX_PLE_QTA2_CFG 0x9048 -+#define R_AX_PLE_QTA3_CFG 0x904C -+#define R_AX_PLE_QTA4_CFG 0x9050 -+#define R_AX_PLE_QTA5_CFG 0x9054 -+#define R_AX_PLE_QTA6_CFG 0x9058 -+#define B_AX_PLE_Q6_MAX_SIZE_MASK GENMASK(27, 16) -+#define B_AX_PLE_Q6_MIN_SIZE_MASK GENMASK(11, 0) -+#define R_AX_PLE_QTA7_CFG 0x905C -+#define R_AX_PLE_QTA8_CFG 0x9060 -+#define R_AX_PLE_QTA9_CFG 0x9064 -+#define R_AX_PLE_QTA10_CFG 0x9068 -+ -+#define R_AX_PLE_INI_STATUS 0x9100 -+#define B_AX_PLE_Q_MGN_INI_RDY BIT(1) -+#define B_AX_PLE_BUF_MGN_INI_RDY BIT(0) -+#define PLE_MGN_INI_RDY (B_AX_PLE_Q_MGN_INI_RDY | B_AX_PLE_BUF_MGN_INI_RDY) -+#define R_AX_PLE_DBG_FUN_INTF_CTL 0x9110 -+#define B_AX_PLE_DFI_ACTIVE BIT(31) -+#define B_AX_PLE_DFI_TRGSEL_MASK GENMASK(19, 16) -+#define B_AX_PLE_DFI_ADDR_MASK GENMASK(15, 0) -+#define R_AX_PLE_DBG_FUN_INTF_DATA 0x9114 -+#define B_AX_PLE_DFI_DATA_MASK GENMASK(31, 0) -+ -+#define R_AX_WDRLS_CFG 0x9408 -+#define B_AX_RLSRPT_BUFREQ_TO_MASK GENMASK(15, 8) -+#define B_AX_WDRLS_MODE_MASK GENMASK(1, 0) -+ -+#define R_AX_RLSRPT0_CFG0 0x9410 -+#define B_AX_RLSRPT0_FLTR_MAP_MASK GENMASK(27, 24) -+#define B_AX_RLSRPT0_PKTTYPE_MASK GENMASK(19, 16) -+#define B_AX_RLSRPT0_PID_MASK GENMASK(10, 8) -+#define B_AX_RLSRPT0_QID_MASK GENMASK(5, 0) -+ -+#define R_AX_RLSRPT0_CFG1 0x9414 -+#define B_AX_RLSRPT0_TO_MASK GENMASK(23, 16) -+#define B_AX_RLSRPT0_AGGNUM_MASK GENMASK(7, 0) -+ -+#define R_AX_WDRLS_ERR_IMR 0x9430 -+#define B_AX_WDRLS_RPT1_FRZTO_ERR_INT_EN BIT(13) -+#define B_AX_WDRLS_RPT1_AGGNUM0_ERR_INT_EN BIT(12) -+#define B_AX_WDRLS_RPT0_FRZTO_ERR_INT_EN BIT(9) -+#define B_AX_WDRLS_RPT0_AGGNUM0_ERR_INT_EN BIT(8) -+#define B_AX_WDRLS_PLEBREQ_PKTID_ISNULL_ERR_INT_EN BIT(5) -+#define B_AX_WDRLS_PLEBREQ_TO_ERR_INT_EN BIT(4) -+#define B_AX_WDRLS_CTL_FRZTO_ERR_INT_EN BIT(2) -+#define B_AX_WDRLS_CTL_PLPKTID_ISNULL_ERR_INT_EN BIT(1) -+#define B_AX_WDRLS_CTL_WDPKTID_ISNULL_ERR_INT_EN BIT(0) -+#define R_AX_WDRLS_ERR_ISR 0x9434 -+ -+#define R_AX_BBRPT_COM_ERR_IMR_ISR 0x960C -+#define R_AX_BBRPT_CHINFO_ERR_IMR_ISR 0x962C -+#define R_AX_BBRPT_DFS_ERR_IMR_ISR 0x963C -+#define R_AX_LA_ERRFLAG 0x966C -+ -+#define R_AX_WD_BUF_REQ 0x9800 -+#define R_AX_PL_BUF_REQ 0x9820 -+#define B_AX_WD_BUF_REQ_EXEC BIT(31) -+#define B_AX_WD_BUF_REQ_QUOTA_ID_MASK GENMASK(23, 16) -+#define B_AX_WD_BUF_REQ_LEN_MASK GENMASK(15, 0) -+ -+#define R_AX_WD_BUF_STATUS 0x9804 -+#define R_AX_PL_BUF_STATUS 0x9824 -+#define B_AX_WD_BUF_STAT_DONE BIT(31) -+#define B_AX_WD_BUF_STAT_PKTID_MASK GENMASK(11, 0) -+ -+#define R_AX_WD_CPUQ_OP_0 0x9810 -+#define R_AX_PL_CPUQ_OP_0 0x9830 -+#define B_AX_WD_CPUQ_OP_EXEC BIT(31) -+#define B_AX_CPUQ_OP_CMD_TYPE_MASK GENMASK(27, 24) -+#define B_AX_CPUQ_OP_MACID_MASK GENMASK(23, 16) -+#define B_AX_CPUQ_OP_PKTNUM_MASK GENMASK(7, 0) -+ -+#define R_AX_WD_CPUQ_OP_1 0x9814 -+#define R_AX_PL_CPUQ_OP_1 0x9834 -+#define B_AX_CPUQ_OP_SRC_PID_MASK GENMASK(24, 22) -+#define B_AX_CPUQ_OP_SRC_QID_MASK GENMASK(21, 16) -+#define B_AX_CPUQ_OP_DST_PID_MASK GENMASK(8, 6) -+#define B_AX_CPUQ_OP_DST_QID_MASK GENMASK(5, 0) -+ -+#define R_AX_WD_CPUQ_OP_2 0x9818 -+#define R_AX_PL_CPUQ_OP_2 0x9838 -+#define B_AX_WD_CPUQ_OP_STRT_PKTID_MASK GENMASK(27, 16) -+#define B_AX_WD_CPUQ_OP_END_PKTID_MASK GENMASK(11, 0) -+ -+#define R_AX_WD_CPUQ_OP_STATUS 0x981C -+#define R_AX_PL_CPUQ_OP_STATUS 0x983C -+#define B_AX_WD_CPUQ_OP_STAT_DONE BIT(31) -+#define B_AX_WD_CPUQ_OP_PKTID_MASK GENMASK(11, 0) -+#define R_AX_CPUIO_ERR_IMR 0x9840 -+#define R_AX_CPUIO_ERR_ISR 0x9844 -+ -+#define R_AX_SEC_ERR_IMR_ISR 0x991C -+ -+#define R_AX_PKTIN_SETTING 0x9A00 -+#define B_AX_WD_ADDR_INFO_LENGTH BIT(1) -+#define R_AX_PKTIN_ERR_IMR 0x9A20 -+#define R_AX_PKTIN_ERR_ISR 0x9A24 -+ -+#define R_AX_MPDU_TX_ERR_ISR 0x9BF0 -+#define R_AX_MPDU_TX_ERR_IMR 0x9BF4 -+ -+#define R_AX_MPDU_PROC 0x9C00 -+#define B_AX_A_ICV_ERR BIT(1) -+#define B_AX_APPEND_FCS BIT(0) -+ -+#define R_AX_ACTION_FWD0 0x9C04 -+#define TRXCFG_MPDU_PROC_ACT_FRWD 0x02A95A95 -+ -+#define R_AX_TF_FWD 0x9C14 -+#define TRXCFG_MPDU_PROC_TF_FRWD 0x0000AA55 -+ -+#define R_AX_HW_RPT_FWD 0x9C18 -+#define B_AX_FWD_PPDU_STAT_MASK GENMASK(1, 0) -+#define RTW89_PRPT_DEST_HOST 1 -+#define RTW89_PRPT_DEST_WLCPU 2 -+ -+#define R_AX_CUT_AMSDU_CTRL 0x9C40 -+#define TRXCFG_MPDU_PROC_CUT_CTRL 0x010E05F0 -+ -+#define R_AX_MPDU_RX_ERR_ISR 0x9CF0 -+#define R_AX_MPDU_RX_ERR_IMR 0x9CF4 -+ -+#define R_AX_SEC_ENG_CTRL 0x9D00 -+#define B_AX_TX_PARTIAL_MODE BIT(11) -+#define B_AX_CLK_EN_CGCMP BIT(10) -+#define B_AX_CLK_EN_WAPI BIT(9) -+#define B_AX_CLK_EN_WEP_TKIP BIT(8) -+#define B_AX_BMC_MGNT_DEC BIT(5) -+#define B_AX_UC_MGNT_DEC BIT(4) -+#define B_AX_MC_DEC BIT(3) -+#define B_AX_BC_DEC BIT(2) -+#define B_AX_SEC_RX_DEC BIT(1) -+#define B_AX_SEC_TX_ENC BIT(0) -+ -+#define R_AX_SEC_MPDU_PROC 0x9D04 -+#define B_AX_APPEND_ICV BIT(1) -+#define B_AX_APPEND_MIC BIT(0) -+ -+#define R_AX_SEC_CAM_ACCESS 0x9D10 -+#define R_AX_SEC_CAM_RDATA 0x9D14 -+#define R_AX_SEC_CAM_WDATA 0x9D18 -+#define R_AX_SEC_DEBUG 0x9D1C -+#define R_AX_SEC_TX_DEBUG 0x9D20 -+#define R_AX_SEC_RX_DEBUG 0x9D24 -+#define R_AX_SEC_TRX_PKT_CNT 0x9D28 -+#define R_AX_SEC_TRX_BLK_CNT 0x9D2C -+ -+#define R_AX_SS_CTRL 0x9E10 -+#define B_AX_SS_INIT_DONE_1 BIT(31) -+#define B_AX_SS_WARM_INIT_FLG BIT(29) -+#define B_AX_SS_EN BIT(0) -+ -+#define R_AX_SS_MACID_PAUSE_0 0x9EB0 -+#define B_AX_SS_MACID31_0_PAUSE_SH 0 -+#define B_AX_SS_MACID31_0_PAUSE_MASK GENMASK(31, 0) -+ -+#define R_AX_SS_MACID_PAUSE_1 0x9EB4 -+#define B_AX_SS_MACID63_32_PAUSE_SH 0 -+#define B_AX_SS_MACID63_32_PAUSE_MASK GENMASK(31, 0) -+ -+#define R_AX_SS_MACID_PAUSE_2 0x9EB8 -+#define B_AX_SS_MACID95_64_PAUSE_SH 0 -+#define B_AX_SS_MACID95_64_PAUSE_MASK GENMASK(31, 0) -+ -+#define R_AX_SS_MACID_PAUSE_3 0x9EBC -+#define B_AX_SS_MACID127_96_PAUSE_SH 0 -+#define B_AX_SS_MACID127_96_PAUSE_MASK GENMASK(31, 0) -+ -+#define R_AX_STA_SCHEDULER_ERR_IMR 0x9EF0 -+#define R_AX_STA_SCHEDULER_ERR_ISR 0x9EF4 -+ -+#define R_AX_TXPKTCTL_ERR_IMR_ISR 0x9F1C -+#define R_AX_TXPKTCTL_ERR_IMR_ISR_B1 0x9F2C -+#define B_AX_TXPKTCTL_CMDPSR_FRZTO_ERR_INT_EN BIT(9) -+#define B_AX_TXPKTCTL_USRCTL_RLSBMPLEN_ERR_INT_EN BIT(3) -+#define B_AX_TXPKTCTL_USRCTL_RDNRLSCMD_ERR_INT_EN BIT(2) -+#define B_AX_TXPKTCTL_USRCTL_NOINIT_ERR_INT_EN BIT(1) -+ -+#define R_AX_DBG_FUN_INTF_CTL 0x9F30 -+#define B_AX_DFI_ACTIVE BIT(31) -+#define B_AX_DFI_TRGSEL_MASK GENMASK(19, 16) -+#define B_AX_DFI_ADDR_MASK GENMASK(15, 0) -+#define R_AX_DBG_FUN_INTF_DATA 0x9F34 -+#define B_AX_DFI_DATA_MASK GENMASK(31, 0) -+ -+#define R_AX_AFE_CTRL1 0x0024 -+ -+#define B_AX_R_SYM_WLCMAC1_P4_PC_EN BIT(4) -+#define B_AX_R_SYM_WLCMAC1_P3_PC_EN BIT(3) -+#define B_AX_R_SYM_WLCMAC1_P2_PC_EN BIT(2) -+#define B_AX_R_SYM_WLCMAC1_P1_PC_EN BIT(1) -+#define B_AX_R_SYM_WLCMAC1_PC_EN BIT(0) -+ -+#define R_AX_SYS_ISO_CTRL_EXTEND 0x0080 -+#define B_AX_CMAC1_FEN BIT(30) -+#define B_AX_R_SYM_FEN_WLBBGLB_1 BIT(17) -+#define B_AX_R_SYM_FEN_WLBBFUN_1 BIT(16) -+#define B_AX_R_SYM_ISO_CMAC12PP BIT(5) -+ -+#define R_AX_CMAC_REG_START 0xC000 -+ -+#define R_AX_CMAC_FUNC_EN 0xC000 -+#define R_AX_CMAC_FUNC_EN_C1 0xE000 -+#define B_AX_CMAC_CRPRT BIT(31) -+#define B_AX_CMAC_EN BIT(30) -+#define B_AX_CMAC_TXEN BIT(29) -+#define B_AX_CMAC_RXEN BIT(28) -+#define B_AX_FORCE_CMACREG_GCKEN BIT(15) -+#define B_AX_PHYINTF_EN BIT(5) -+#define B_AX_CMAC_DMA_EN BIT(4) -+#define B_AX_PTCLTOP_EN BIT(3) -+#define B_AX_SCHEDULER_EN BIT(2) -+#define B_AX_TMAC_EN BIT(1) -+#define B_AX_RMAC_EN BIT(0) -+ -+#define R_AX_CK_EN 0xC004 -+#define R_AX_CK_EN_C1 0xE004 -+#define B_AX_CMAC_ALLCKEN GENMASK(31, 0) -+#define B_AX_CMAC_CKEN BIT(30) -+#define B_AX_PHYINTF_CKEN BIT(5) -+#define B_AX_CMAC_DMA_CKEN BIT(4) -+#define B_AX_PTCLTOP_CKEN BIT(3) -+#define B_AX_SCHEDULER_CKEN BIT(2) -+#define B_AX_TMAC_CKEN BIT(1) -+#define B_AX_RMAC_CKEN BIT(0) -+ -+#define R_AX_WMAC_RFMOD 0xC010 -+#define R_AX_WMAC_RFMOD_C1 0xE010 -+#define B_AX_WMAC_RFMOD_MASK GENMASK(1, 0) -+ -+#define R_AX_GID_POSITION0 0xC070 -+#define R_AX_GID_POSITION0_C1 0xE070 -+#define R_AX_GID_POSITION1 0xC074 -+#define R_AX_GID_POSITION1_C1 0xE074 -+#define R_AX_GID_POSITION2 0xC078 -+#define R_AX_GID_POSITION2_C1 0xE078 -+#define R_AX_GID_POSITION3 0xC07C -+#define R_AX_GID_POSITION3_C1 0xE07C -+#define R_AX_GID_POSITION_EN0 0xC080 -+#define R_AX_GID_POSITION_EN0_C1 0xE080 -+#define R_AX_GID_POSITION_EN1 0xC084 -+#define R_AX_GID_POSITION_EN1_C1 0xE084 -+ -+#define R_AX_TX_SUB_CARRIER_VALUE 0xC088 -+#define R_AX_TX_SUB_CARRIER_VALUE_C1 0xE088 -+#define B_AX_TXSC_80M_MASK GENMASK(11, 8) -+#define B_AX_TXSC_40M_MASK GENMASK(7, 4) -+#define B_AX_TXSC_20M_MASK GENMASK(3, 0) -+ -+#define R_AX_CMAC_ERR_ISR 0xC164 -+#define R_AX_CMAC_ERR_ISR_C1 0xE164 -+#define B_AX_WMAC_TX_ERR_IND BIT(7) -+#define B_AX_WMAC_RX_ERR_IND BIT(6) -+#define B_AX_TXPWR_CTRL_ERR_IND BIT(5) -+#define B_AX_PHYINTF_ERR_IND BIT(4) -+#define B_AX_DMA_TOP_ERR_IND BIT(3) -+#define B_AX_PTCL_TOP_ERR_IND BIT(1) -+#define B_AX_SCHEDULE_TOP_ERR_IND BIT(0) -+ -+#define R_AX_MACID_SLEEP_0 0xC2C0 -+#define R_AX_MACID_SLEEP_0_C1 0xE2C0 -+#define B_AX_MACID31_0_SLEEP_SH 0 -+#define B_AX_MACID31_0_SLEEP_MASK GENMASK(31, 0) -+ -+#define R_AX_MACID_SLEEP_1 0xC2C4 -+#define R_AX_MACID_SLEEP_1_C1 0xE2C4 -+#define B_AX_MACID63_32_SLEEP_SH 0 -+#define B_AX_MACID63_32_SLEEP_MASK GENMASK(31, 0) -+ -+#define R_AX_MACID_SLEEP_2 0xC2C8 -+#define R_AX_MACID_SLEEP_2_C1 0xE2C8 -+#define B_AX_MACID95_64_SLEEP_SH 0 -+#define B_AX_MACID95_64_SLEEP_MASK GENMASK(31, 0) -+ -+#define R_AX_MACID_SLEEP_3 0xC2CC -+#define R_AX_MACID_SLEEP_3_C1 0xE2CC -+#define B_AX_MACID127_96_SLEEP_SH 0 -+#define B_AX_MACID127_96_SLEEP_MASK GENMASK(31, 0) -+ -+#define SCH_PREBKF_24US 0x18 -+#define R_AX_PREBKF_CFG_0 0xC338 -+#define R_AX_PREBKF_CFG_0_C1 0xE338 -+#define B_AX_PREBKF_TIME_MASK GENMASK(4, 0) -+ -+#define R_AX_CCA_CFG_0 0xC340 -+#define R_AX_CCA_CFG_0_C1 0xE340 -+#define B_AX_BTCCA_BRK_TXOP_EN BIT(9) -+#define B_AX_BTCCA_EN BIT(5) -+#define B_AX_EDCCA_EN BIT(4) -+#define B_AX_SEC80_EN BIT(3) -+#define B_AX_SEC40_EN BIT(2) -+#define B_AX_SEC20_EN BIT(1) -+#define B_AX_CCA_EN BIT(0) -+ -+#define R_AX_CTN_TXEN 0xC348 -+#define R_AX_CTN_TXEN_C1 0xE348 -+#define B_AX_CTN_TXEN_TWT_1 BIT(15) -+#define B_AX_CTN_TXEN_TWT_0 BIT(14) -+#define B_AX_CTN_TXEN_ULQ BIT(13) -+#define B_AX_CTN_TXEN_BCNQ BIT(12) -+#define B_AX_CTN_TXEN_HGQ BIT(11) -+#define B_AX_CTN_TXEN_CPUMGQ BIT(10) -+#define B_AX_CTN_TXEN_MGQ1 BIT(9) -+#define B_AX_CTN_TXEN_MGQ BIT(8) -+#define B_AX_CTN_TXEN_VO_1 BIT(7) -+#define B_AX_CTN_TXEN_VI_1 BIT(6) -+#define B_AX_CTN_TXEN_BK_1 BIT(5) -+#define B_AX_CTN_TXEN_BE_1 BIT(4) -+#define B_AX_CTN_TXEN_VO_0 BIT(3) -+#define B_AX_CTN_TXEN_VI_0 BIT(2) -+#define B_AX_CTN_TXEN_BK_0 BIT(1) -+#define B_AX_CTN_TXEN_BE_0 BIT(0) -+ -+#define R_AX_MUEDCA_BE_PARAM_0 0xC350 -+#define R_AX_MUEDCA_BE_PARAM_0_C1 0xE350 -+#define B_AX_MUEDCA_BE_PARAM_0_TIMER_MASK GENMASK(31, 16) -+#define B_AX_MUEDCA_BE_PARAM_0_CW_MASK GENMASK(15, 8) -+#define B_AX_MUEDCA_BE_PARAM_0_AIFS_MASK GENMASK(7, 0) -+ -+#define R_AX_MUEDCA_BK_PARAM_0 0xC354 -+#define R_AX_MUEDCA_BK_PARAM_0_C1 0xE354 -+#define R_AX_MUEDCA_VI_PARAM_0 0xC358 -+#define R_AX_MUEDCA_VI_PARAM_0_C1 0xE358 -+#define R_AX_MUEDCA_VO_PARAM_0 0xC35C -+#define R_AX_MUEDCA_VO_PARAM_0_C1 0xE35C -+ -+#define R_AX_MUEDCA_EN 0xC370 -+#define R_AX_MUEDCA_EN_C1 0xE370 -+#define B_AX_MUEDCA_WMM_SEL BIT(8) -+#define B_AX_SET_MUEDCATIMER_TF_0 BIT(4) -+#define B_AX_MUEDCA_EN_0 BIT(0) -+ -+#define R_AX_CCA_CONTROL 0xC390 -+#define R_AX_CCA_CONTROL_C1 0xE390 -+#define B_AX_TB_CHK_TX_NAV BIT(31) -+#define B_AX_TB_CHK_BASIC_NAV BIT(30) -+#define B_AX_TB_CHK_BTCCA BIT(29) -+#define B_AX_TB_CHK_EDCCA BIT(28) -+#define B_AX_TB_CHK_CCA_S80 BIT(27) -+#define B_AX_TB_CHK_CCA_S40 BIT(26) -+#define B_AX_TB_CHK_CCA_S20 BIT(25) -+#define B_AX_TB_CHK_CCA_P20 BIT(24) -+#define B_AX_SIFS_CHK_BTCCA BIT(21) -+#define B_AX_SIFS_CHK_EDCCA BIT(20) -+#define B_AX_SIFS_CHK_CCA_S80 BIT(19) -+#define B_AX_SIFS_CHK_CCA_S40 BIT(18) -+#define B_AX_SIFS_CHK_CCA_S20 BIT(17) -+#define B_AX_SIFS_CHK_CCA_P20 BIT(16) -+#define B_AX_CTN_CHK_TXNAV BIT(8) -+#define B_AX_CTN_CHK_INTRA_NAV BIT(7) -+#define B_AX_CTN_CHK_BASIC_NAV BIT(6) -+#define B_AX_CTN_CHK_BTCCA BIT(5) -+#define B_AX_CTN_CHK_EDCCA BIT(4) -+#define B_AX_CTN_CHK_CCA_S80 BIT(3) -+#define B_AX_CTN_CHK_CCA_S40 BIT(2) -+#define B_AX_CTN_CHK_CCA_S20 BIT(1) -+#define B_AX_CTN_CHK_CCA_P20 BIT(0) -+ -+#define R_AX_SCHEDULE_ERR_IMR 0xC3E8 -+#define R_AX_SCHEDULE_ERR_IMR_C1 0xE3E8 -+#define B_AX_SORT_NON_IDLE_ERR_INT_EN BIT(1) -+#define B_AX_FSM_TIMEOUT_ERR_INT_EN BIT(0) -+ -+#define R_AX_SCHEDULE_ERR_ISR 0xC3EC -+#define R_AX_SCHEDULE_ERR_ISR_C1 0xE3EC -+ -+#define R_AX_SCH_DBG_SEL 0xC3F4 -+#define R_AX_SCH_DBG_SEL_C1 0xE3F4 -+#define B_AX_SCH_DBG_EN BIT(16) -+#define B_AX_SCH_CFG_CMD_SEL GENMASK(15, 8) -+#define B_AX_SCH_DBG_SEL_MASK GENMASK(7, 0) -+ -+#define R_AX_SCH_DBG 0xC3F8 -+#define R_AX_SCH_DBG_C1 0xE3F8 -+#define B_AX_SCHEDULER_DBG_MASK GENMASK(31, 0) -+ -+#define R_AX_PORT_CFG_P0 0xC400 -+#define R_AX_PORT_CFG_P1 0xC440 -+#define R_AX_PORT_CFG_P2 0xC480 -+#define R_AX_PORT_CFG_P3 0xC4C0 -+#define R_AX_PORT_CFG_P4 0xC500 -+#define B_AX_BRK_SETUP BIT(16) -+#define B_AX_TBTT_UPD_SHIFT_SEL BIT(15) -+#define B_AX_BCN_DROP_ALLOW BIT(14) -+#define B_AX_TBTT_PROHIB_EN BIT(13) -+#define B_AX_BCNTX_EN BIT(12) -+#define B_AX_NET_TYPE_MASK GENMASK(11, 10) -+#define B_AX_BCN_FORCETX_EN BIT(9) -+#define B_AX_TXBCN_BTCCA_EN BIT(8) -+#define B_AX_BCNERR_CNT_EN BIT(7) -+#define B_AX_BCN_AGRES BIT(6) -+#define B_AX_TSFTR_RST BIT(5) -+#define B_AX_RX_BSSID_FIT_EN BIT(4) -+#define B_AX_TSF_UDT_EN BIT(3) -+#define B_AX_PORT_FUNC_EN BIT(2) -+#define B_AX_TXBCN_RPT_EN BIT(1) -+#define B_AX_RXBCN_RPT_EN BIT(0) -+ -+#define R_AX_TBTT_PROHIB_P0 0xC404 -+#define R_AX_TBTT_PROHIB_P1 0xC444 -+#define R_AX_TBTT_PROHIB_P2 0xC484 -+#define R_AX_TBTT_PROHIB_P3 0xC4C4 -+#define R_AX_TBTT_PROHIB_P4 0xC504 -+#define B_AX_TBTT_HOLD_MASK GENMASK(27, 16) -+#define B_AX_TBTT_SETUP_MASK GENMASK(7, 0) -+ -+#define R_AX_BCN_AREA_P0 0xC408 -+#define R_AX_BCN_AREA_P1 0xC448 -+#define R_AX_BCN_AREA_P2 0xC488 -+#define R_AX_BCN_AREA_P3 0xC4C8 -+#define R_AX_BCN_AREA_P4 0xC508 -+#define B_AX_BCN_MSK_AREA_MASK GENMASK(27, 16) -+#define B_AX_BCN_CTN_AREA_MASK GENMASK(11, 0) -+ -+#define R_AX_BCNERLYINT_CFG_P0 0xC40C -+#define R_AX_BCNERLYINT_CFG_P1 0xC44C -+#define R_AX_BCNERLYINT_CFG_P2 0xC48C -+#define R_AX_BCNERLYINT_CFG_P3 0xC4CC -+#define R_AX_BCNERLYINT_CFG_P4 0xC50C -+#define B_AX_BCNERLY_MASK GENMASK(11, 0) -+ -+#define R_AX_TBTTERLYINT_CFG_P0 0xC40E -+#define R_AX_TBTTERLYINT_CFG_P1 0xC44E -+#define R_AX_TBTTERLYINT_CFG_P2 0xC48E -+#define R_AX_TBTTERLYINT_CFG_P3 0xC4CE -+#define R_AX_TBTTERLYINT_CFG_P4 0xC50E -+#define B_AX_TBTTERLY_MASK GENMASK(11, 0) -+ -+#define R_AX_TBTT_AGG_P0 0xC412 -+#define R_AX_TBTT_AGG_P1 0xC452 -+#define R_AX_TBTT_AGG_P2 0xC492 -+#define R_AX_TBTT_AGG_P3 0xC4D2 -+#define R_AX_TBTT_AGG_P4 0xC512 -+#define B_AX_TBTT_AGG_NUM_MASK GENMASK(15, 8) -+ -+#define R_AX_BCN_SPACE_CFG_P0 0xC414 -+#define R_AX_BCN_SPACE_CFG_P1 0xC454 -+#define R_AX_BCN_SPACE_CFG_P2 0xC494 -+#define R_AX_BCN_SPACE_CFG_P3 0xC4D4 -+#define R_AX_BCN_SPACE_CFG_P4 0xC514 -+#define B_AX_SUB_BCN_SPACE_MASK GENMASK(23, 16) -+#define B_AX_BCN_SPACE_MASK GENMASK(15, 0) -+ -+#define R_AX_BCN_FORCETX_P0 0xC418 -+#define R_AX_BCN_FORCETX_P1 0xC458 -+#define R_AX_BCN_FORCETX_P2 0xC498 -+#define R_AX_BCN_FORCETX_P3 0xC4D8 -+#define R_AX_BCN_FORCETX_P4 0xC518 -+#define B_AX_FORCE_BCN_CURRCNT_MASK GENMASK(23, 16) -+#define B_AX_FORCE_BCN_NUM_MASK GENMASK(15, 0) -+#define B_AX_BCN_MAX_ERR_MASK GENMASK(7, 0) -+ -+#define R_AX_BCN_ERR_CNT_P0 0xC420 -+#define R_AX_BCN_ERR_CNT_P1 0xC460 -+#define R_AX_BCN_ERR_CNT_P2 0xC4A0 -+#define R_AX_BCN_ERR_CNT_P3 0xC4E0 -+#define R_AX_BCN_ERR_CNT_P4 0xC520 -+#define B_AX_BCN_ERR_CNT_SUM_MASK GENMASK(31, 24) -+#define B_AX_BCN_ERR_CNT_NAV_MASK GENMASK(23, 16) -+#define B_AX_BCN_ERR_CNT_EDCCA_MASK GENMASK(15, 0) -+#define B_AX_BCN_ERR_CNT_CCA_MASK GENMASK(7, 0) -+ -+#define R_AX_BCN_ERR_FLAG_P0 0xC424 -+#define R_AX_BCN_ERR_FLAG_P1 0xC464 -+#define R_AX_BCN_ERR_FLAG_P2 0xC4A4 -+#define R_AX_BCN_ERR_FLAG_P3 0xC4E4 -+#define R_AX_BCN_ERR_FLAG_P4 0xC524 -+#define B_AX_BCN_ERR_FLAG_OTHERS BIT(6) -+#define B_AX_BCN_ERR_FLAG_MAC BIT(5) -+#define B_AX_BCN_ERR_FLAG_TXON BIT(4) -+#define B_AX_BCN_ERR_FLAG_SRCHEND BIT(3) -+#define B_AX_BCN_ERR_FLAG_INVALID BIT(2) -+#define B_AX_BCN_ERR_FLAG_CMP BIT(1) -+#define B_AX_BCN_ERR_FLAG_LOCK BIT(0) -+ -+#define R_AX_DTIM_CTRL_P0 0xC426 -+#define R_AX_DTIM_CTRL_P1 0xC466 -+#define R_AX_DTIM_CTRL_P2 0xC4A6 -+#define R_AX_DTIM_CTRL_P3 0xC4E6 -+#define R_AX_DTIM_CTRL_P4 0xC526 -+#define B_AX_DTIM_NUM_MASK GENMASK(15, 0) -+#define B_AX_DTIM_CURRCNT_MASK GENMASK(7, 0) -+ -+#define R_AX_TBTT_SHIFT_P0 0xC428 -+#define R_AX_TBTT_SHIFT_P1 0xC468 -+#define R_AX_TBTT_SHIFT_P2 0xC4A8 -+#define R_AX_TBTT_SHIFT_P3 0xC4E8 -+#define R_AX_TBTT_SHIFT_P4 0xC528 -+#define B_AX_TBTT_SHIFT_OFST_MASK GENMASK(11, 0) -+ -+#define R_AX_BCN_CNT_TMR_P0 0xC434 -+#define R_AX_BCN_CNT_TMR_P1 0xC474 -+#define R_AX_BCN_CNT_TMR_P2 0xC4B4 -+#define R_AX_BCN_CNT_TMR_P3 0xC4F4 -+#define R_AX_BCN_CNT_TMR_P4 0xC534 -+#define B_AX_BCN_CNT_TMR_MASK GENMASK(31, 0) -+ -+#define R_AX_TSFTR_LOW_P0 0xC438 -+#define R_AX_TSFTR_LOW_P1 0xC478 -+#define R_AX_TSFTR_LOW_P2 0xC4B8 -+#define R_AX_TSFTR_LOW_P3 0xC4F8 -+#define R_AX_TSFTR_LOW_P4 0xC538 -+#define B_AX_TSFTR_LOW_MASK GENMASK(31, 0) -+ -+#define R_AX_TSFTR_HIGH_P0 0xC43C -+#define R_AX_TSFTR_HIGH_P1 0xC47C -+#define R_AX_TSFTR_HIGH_P2 0xC4BC -+#define R_AX_TSFTR_HIGH_P3 0xC4FC -+#define R_AX_TSFTR_HIGH_P4 0xC53C -+#define B_AX_TSFTR_HIGH_MASK GENMASK(31, 0) -+ -+#define R_AX_MBSSID_CTRL 0xC568 -+#define R_AX_MBSSID_CTRL_C1 0xE568 -+#define B_AX_P0MB_ALL_MASK GENMASK(23, 1) -+#define B_AX_P0MB_NUM_MASK GENMASK(19, 16) -+#define B_AX_P0MB15_EN BIT(15) -+#define B_AX_P0MB14_EN BIT(14) -+#define B_AX_P0MB13_EN BIT(13) -+#define B_AX_P0MB12_EN BIT(12) -+#define B_AX_P0MB11_EN BIT(11) -+#define B_AX_P0MB10_EN BIT(10) -+#define B_AX_P0MB9_EN BIT(9) -+#define B_AX_P0MB8_EN BIT(8) -+#define B_AX_P0MB7_EN BIT(7) -+#define B_AX_P0MB6_EN BIT(6) -+#define B_AX_P0MB5_EN BIT(5) -+#define B_AX_P0MB4_EN BIT(4) -+#define B_AX_P0MB3_EN BIT(3) -+#define B_AX_P0MB2_EN BIT(2) -+#define B_AX_P0MB1_EN BIT(1) -+ -+#define R_AX_AMPDU_AGG_LIMIT 0xC610 -+#define B_AX_AMPDU_MAX_TIME_MASK GENMASK(31, 24) -+#define B_AX_RA_TRY_RATE_AGG_LMT_MASK GENMASK(23, 16) -+#define B_AX_RTS_MAX_AGG_NUM_MASK GENMASK(15, 8) -+#define B_AX_MAX_AGG_NUM_MASK GENMASK(7, 0) -+ -+#define R_AX_AGG_LEN_HT_0 0xC614 -+#define R_AX_AGG_LEN_HT_0_C1 0xE614 -+#define B_AX_AMPDU_MAX_LEN_HT_MASK GENMASK(31, 16) -+#define B_AX_RTS_TXTIME_TH_MASK GENMASK(15, 8) -+#define B_AX_RTS_LEN_TH_MASK GENMASK(7, 0) -+ -+#define S_AX_CTS2S_TH_SEC_256B 1 -+#define R_AX_SIFS_SETTING 0xC624 -+#define R_AX_SIFS_SETTING_C1 0xE624 -+#define B_AX_HW_CTS2SELF_PKT_LEN_TH_MASK GENMASK(31, 24) -+#define B_AX_HW_CTS2SELF_PKT_LEN_TH_TWW_MASK GENMASK(23, 18) -+#define B_AX_HW_CTS2SELF_EN BIT(16) -+#define B_AX_SPEC_SIFS_OFDM_PTCL_SH 8 -+#define B_AX_SPEC_SIFS_OFDM_PTCL_MASK GENMASK(15, 8) -+#define B_AX_SPEC_SIFS_CCK_PTCL_MASK GENMASK(7, 0) -+#define S_AX_CTS2S_TH_1K 4 -+ -+#define R_AX_TXRATE_CHK 0xC628 -+#define R_AX_TXRATE_CHK_C1 0xE628 -+#define B_AX_DEFT_RATE_MASK GENMASK(15, 7) -+#define B_AX_BAND_MODE BIT(4) -+#define B_AX_MAX_TXNSS_MASK GENMASK(3, 2) -+#define B_AX_RTS_LIMIT_IN_OFDM6 BIT(1) -+#define B_AX_CHECK_CCK_EN BIT(0) -+ -+#define R_AX_TXCNT 0xC62C -+#define R_AX_TXCNT_C1 0xE62C -+#define B_AX_ADD_TXCNT_BY BIT(31) -+#define B_AX_S_TXCNT_LMT_MASK GENMASK(29, 24) -+#define B_AX_L_TXCNT_LMT_MASK GENMASK(21, 16) -+ -+#define R_AX_MBSSID_DROP_0 0xC63C -+#define R_AX_MBSSID_DROP_0_C1 0xE63C -+#define B_AX_GI_LTF_FB_SEL BIT(30) -+#define B_AX_RATE_SEL_MASK GENMASK(29, 24) -+#define B_AX_PORT_DROP_4_0_MASK GENMASK(20, 16) -+#define B_AX_MBSSID_DROP_15_0_MASK GENMASK(15, 0) -+ -+#define R_AX_BT_PLT 0xC67C -+#define R_AX_BT_PLT_C1 0xE67C -+#define B_AX_BT_PLT_PKT_CNT_MASK GENMASK(31, 16) -+#define B_AX_BT_PLT_RST BIT(9) -+#define B_AX_PLT_EN BIT(8) -+#define B_AX_RX_PLT_GNT_LTE_RX BIT(7) -+#define B_AX_RX_PLT_GNT_BT_RX BIT(6) -+#define B_AX_RX_PLT_GNT_BT_TX BIT(5) -+#define B_AX_RX_PLT_GNT_WL BIT(4) -+#define B_AX_TX_PLT_GNT_LTE_RX BIT(3) -+#define B_AX_TX_PLT_GNT_BT_RX BIT(2) -+#define B_AX_TX_PLT_GNT_BT_TX BIT(1) -+#define B_AX_TX_PLT_GNT_WL BIT(0) -+ -+#define R_AX_PTCL_BSS_COLOR_0 0xC6A0 -+#define R_AX_PTCL_BSS_COLOR_0_C1 0xE6A0 -+#define B_AX_BSS_COLOB_AX_PORT_3_MASK GENMASK(29, 24) -+#define B_AX_BSS_COLOB_AX_PORT_2_MASK GENMASK(21, 16) -+#define B_AX_BSS_COLOB_AX_PORT_1_MASK GENMASK(13, 8) -+#define B_AX_BSS_COLOB_AX_PORT_0_MASK GENMASK(5, 0) -+ -+#define R_AX_PTCL_BSS_COLOR_1 0xC6A4 -+#define R_AX_PTCL_BSS_COLOR_1_C1 0xE6A4 -+#define B_AX_BSS_COLOB_AX_PORT_4_MASK GENMASK(5, 0) -+ -+#define R_AX_PTCL_IMR0 0xC6C0 -+#define R_AX_PTCL_IMR0_C1 0xE6C0 -+#define B_AX_F2PCMD_USER_ALLC_ERR_INT_EN BIT(28) -+#define B_AX_TX_RECORD_PKTID_ERR_INT_EN BIT(23) -+ -+#define R_AX_PTCL_ISR0 0xC6C4 -+#define R_AX_PTCL_ISR0_C1 0xE6C4 -+ -+#define S_AX_PTCL_TO_2MS 0x3F -+#define R_AX_PTCL_FSM_MON 0xC6E8 -+#define R_AX_PTCL_FSM_MON_C1 0xE6E8 -+#define B_AX_PTCL_TX_ARB_TO_MODE BIT(6) -+#define B_AX_PTCL_TX_ARB_TO_THR_MASK GENMASK(5, 0) -+ -+#define R_AX_PTCL_TX_CTN_SEL 0xC6EC -+#define R_AX_PTCL_TX_CTN_SEL_C1 0xE6EC -+#define B_AX_PTCL_TX_ON_STAT BIT(7) -+ -+#define R_AX_PTCL_DBG_INFO 0xC6F0 -+#define R_AX_PTCL_DBG_INFO_C1 0xE6F0 -+#define B_AX_PTCL_DBG_INFO_MASK GENMASK(31, 0) -+#define R_AX_PTCL_DBG 0xC6F4 -+#define R_AX_PTCL_DBG_C1 0xE6F4 -+#define B_AX_PTCL_DBG_EN BIT(8) -+#define B_AX_PTCL_DBG_SEL_MASK GENMASK(7, 0) -+ -+#define R_AX_DLE_CTRL 0xC800 -+#define R_AX_DLE_CTRL_C1 0xE800 -+#define B_AX_NO_RESERVE_PAGE_ERR_IMR BIT(23) -+#define B_AX_RXDATA_FSM_HANG_ERROR_IMR BIT(15) -+#define R_AX_RXDMA_PKT_INFO_0 0xC814 -+#define R_AX_RXDMA_PKT_INFO_1 0xC818 -+#define R_AX_RXDMA_PKT_INFO_2 0xC81C -+ -+#define R_AX_TCR1 0xCA04 -+#define R_AX_TCR1_C1 0xEA04 -+#define B_AX_TXDFIFO_THRESHOLD GENMASK(31, 28) -+#define B_AX_TCR_CCK_LOCK_CLK BIT(27) -+#define B_AX_TCR_FORCE_READ_TXDFIFO BIT(26) -+#define B_AX_TCR_USTIME GENMASK(23, 16) -+#define B_AX_TCR_SMOOTH_VAL BIT(15) -+#define B_AX_TCR_SMOOTH_CTRL BIT(14) -+#define B_AX_CS_REQ_VAL BIT(13) -+#define B_AX_CS_REQ_SEL BIT(12) -+#define B_AX_TCR_ZLD_USTIME_AFTERPHYTXON GENMASK(11, 8) -+#define B_AX_TCR_TXTIMEOUT GENMASK(7, 0) -+ -+#define R_AX_PPWRBIT_SETTING 0xCA0C -+#define R_AX_PPWRBIT_SETTING_C1 0xEA0C -+ -+#define R_AX_MACTX_DBG_SEL_CNT 0xCA20 -+#define R_AX_MACTX_DBG_SEL_CNT_C1 0xEA20 -+#define B_AX_MACTX_MPDU_CNT GENMASK(31, 24) -+#define B_AX_MACTX_DMA_CNT GENMASK(23, 16) -+#define B_AX_LENGTH_ERR_FLAG_U3 BIT(11) -+#define B_AX_LENGTH_ERR_FLAG_U2 BIT(10) -+#define B_AX_LENGTH_ERR_FLAG_U1 BIT(9) -+#define B_AX_LENGTH_ERR_FLAG_U0 BIT(8) -+#define B_AX_DBGSEL_MACTX_MASK GENMASK(5, 0) -+ -+#define R_AX_WMAC_TX_CTRL_DEBUG 0xCAE4 -+#define R_AX_WMAC_TX_CTRL_DEBUG_C1 0xEAE4 -+#define B_AX_TX_CTRL_DEBUG_SEL_MASK GENMASK(3, 0) -+ -+#define R_AX_WMAC_TX_INFO0_DEBUG 0xCAE8 -+#define R_AX_WMAC_TX_INFO0_DEBUG_C1 0xEAE8 -+#define B_AX_TX_CTRL_INFO_P0_MASK GENMASK(31, 0) -+ -+#define R_AX_WMAC_TX_INFO1_DEBUG 0xCAEC -+#define R_AX_WMAC_TX_INFO1_DEBUG_C1 0xEAEC -+#define B_AX_TX_CTRL_INFO_P1_MASK GENMASK(31, 0) -+ -+#define R_AX_RSP_CHK_SIG 0xCC00 -+#define R_AX_RSP_CHK_SIG_C1 0xEC00 -+#define B_AX_RSP_STATIC_RTS_CHK_SERV_BW_EN BIT(30) -+#define B_AX_RSP_TBPPDU_CHK_PWR BIT(29) -+#define B_AX_RSP_CHK_BASIC_NAV BIT(21) -+#define B_AX_RSP_CHK_INTRA_NAV BIT(20) -+#define B_AX_RSP_CHK_TXNAV BIT(19) -+#define B_AX_TXDATA_END_PS_OPT BIT(18) -+#define B_AX_CHECK_SOUNDING_SEQ BIT(17) -+#define B_AX_RXBA_IGNOREA2 BIT(16) -+#define B_AX_ACKTO_CCK_MASK GENMASK(15, 8) -+#define B_AX_ACKTO_MASK GENMASK(7, 0) -+ -+#define R_AX_TRXPTCL_RESP_0 0xCC04 -+#define R_AX_TRXPTCL_RESP_0_C1 0xEC04 -+#define B_AX_WMAC_RESP_STBC_EN BIT(31) -+#define B_AX_WMAC_RXFTM_TXACK_SC BIT(30) -+#define B_AX_WMAC_RXFTM_TXACKBWEQ BIT(29) -+#define B_AX_RSP_CHK_SEC_CCA_80 BIT(28) -+#define B_AX_RSP_CHK_SEC_CCA_40 BIT(27) -+#define B_AX_RSP_CHK_SEC_CCA_20 BIT(26) -+#define B_AX_RSP_CHK_BTCCA BIT(25) -+#define B_AX_RSP_CHK_EDCCA BIT(24) -+#define B_AX_RSP_CHK_CCA BIT(23) -+#define B_AX_WMAC_LDPC_EN BIT(22) -+#define B_AX_WMAC_SGIEN BIT(21) -+#define B_AX_WMAC_SPLCPEN BIT(20) -+#define B_AX_WMAC_BESP_EARLY_TXBA BIT(17) -+#define B_AX_WMAC_SPEC_SIFS_OFDM_MASK GENMASK(15, 8) -+#define B_AX_WMAC_SPEC_SIFS_CCK_MASK GENMASK(7, 0) -+#define WMAC_SPEC_SIFS_OFDM_52A 0x15 -+#define WMAC_SPEC_SIFS_OFDM_52B 0x11 -+#define WMAC_SPEC_SIFS_OFDM_52C 0x11 -+#define WMAC_SPEC_SIFS_CCK 0xA -+ -+#define R_AX_MAC_LOOPBACK 0xCC20 -+#define R_AX_MAC_LOOPBACK_C1 0xEC20 -+#define B_AX_MACLBK_EN BIT(0) -+ -+#define R_AX_RXTRIG_TEST_USER_2 0xCCB0 -+#define R_AX_RXTRIG_TEST_USER_2_C1 0xECB0 -+#define B_AX_RXTRIG_MACID_MASK GENMASK(31, 24) -+#define B_AX_RXTRIG_RU26_DIS BIT(21) -+#define B_AX_RXTRIG_FCSCHK_EN BIT(20) -+#define B_AX_RXTRIG_PORT_SEL_MASK GENMASK(19, 17) -+#define B_AX_RXTRIG_EN BIT(16) -+#define B_AX_RXTRIG_USERINFO_2_MASK GENMASK(15, 0) -+ -+#define R_AX_WMAC_TX_TF_INFO_0 0xCCD0 -+#define R_AX_WMAC_TX_TF_INFO_0_C1 0xECD0 -+#define B_AX_WMAC_TX_TF_INFO_SEL_MASK GENMASK(2, 0) -+ -+#define R_AX_WMAC_TX_TF_INFO_1 0xCCD4 -+#define R_AX_WMAC_TX_TF_INFO_1_C1 0xECD4 -+#define B_AX_WMAC_TX_TF_INFO_P0_MASK GENMASK(31, 0) -+ -+#define R_AX_WMAC_TX_TF_INFO_2 0xCCD8 -+#define R_AX_WMAC_TX_TF_INFO_2_C1 0xECD8 -+#define B_AX_WMAC_TX_TF_INFO_P1_MASK GENMASK(31, 0) -+ -+#define R_AX_TMAC_ERR_IMR_ISR 0xCCEC -+#define R_AX_TMAC_ERR_IMR_ISR_C1 0xECEC -+ -+#define R_AX_DBGSEL_TRXPTCL 0xCCF4 -+#define R_AX_DBGSEL_TRXPTCL_C1 0xECF4 -+#define B_AX_DBGSEL_TRXPTCL_MASK GENMASK(7, 0) -+ -+#define R_AX_PHYINFO_ERR_IMR 0xCCFC -+#define R_AX_PHYINFO_ERR_IMR_C1 0xECFC -+#define B_AX_CSI_ON_TIMEOUT BIT(29) -+#define B_AX_STS_ON_TIMEOUT BIT(28) -+#define B_AX_DATA_ON_TIMEOUT BIT(27) -+#define B_AX_OFDM_CCA_TIMEOUT BIT(26) -+#define B_AX_CCK_CCA_TIMEOUT BIT(25) -+#define B_AXC_PHY_TXON_TIMEOUT BIT(24) -+#define B_AX_CSI_ON_TIMEOUT_INT_EN BIT(21) -+#define B_AX_STS_ON_TIMEOUT_INT_EN BIT(20) -+#define B_AX_DATA_ON_TIMEOUT_INT_EN BIT(19) -+#define B_AX_OFDM_CCA_TIMEOUT_INT_EN BIT(18) -+#define B_AX_CCK_CCA_TIMEOUT_INT_EN BIT(17) -+#define B_AX_PHY_TXON_TIMEOUT_INT_EN BIT(16) -+#define B_AX_PHYINTF_TIMEOUT_THR_MSAK GENMASK(5, 0) -+ -+#define R_AX_PHYINFO_ERR_ISR 0xCCFC -+#define R_AX_PHYINFO_ERR_ISR_C1 0xECFC -+ -+#define R_AX_BFMER_CTRL_0 0xCD78 -+#define R_AX_BFMER_CTRL_0_C1 0xED78 -+#define B_AX_BFMER_HE_CSI_OFFSET_MASK GENMASK(31, 24) -+#define B_AX_BFMER_VHT_CSI_OFFSET_MASK GENMASK(23, 16) -+#define B_AX_BFMER_HT_CSI_OFFSET_MASK GENMASK(15, 8) -+#define B_AX_BFMER_NDP_BFEN BIT(2) -+#define B_AX_BFMER_VHT_BFPRT_CHK BIT(0) -+ -+#define R_AX_BFMEE_RESP_OPTION 0xCD80 -+#define R_AX_BFMEE_RESP_OPTION_C1 0xED80 -+#define B_AX_BFMEE_NDP_RX_STANDBY_TIMER_MASK GENMASK(31, 24) -+#define B_AX_BFMEE_BFRP_RX_STANDBY_TIMER_MASK GENMASK(23, 20) -+#define B_AX_MU_BFRPTSEG_SEL_MASK GENMASK(18, 17) -+#define B_AX_BFMEE_NDP_RXSTDBY_SEL BIT(16) -+#define BFRP_RX_STANDBY_TIMER 0x0 -+#define NDP_RX_STANDBY_TIMER 0xFF -+#define B_AX_BFMEE_HE_NDPA_EN BIT(2) -+#define B_AX_BFMEE_VHT_NDPA_EN BIT(1) -+#define B_AX_BFMEE_HT_NDPA_EN BIT(0) -+ -+#define R_AX_TRXPTCL_RESP_CSI_CTRL_0 0xCD88 -+#define R_AX_TRXPTCL_RESP_CSI_CTRL_0_C1 0xED88 -+#define R_AX_TRXPTCL_RESP_CSI_CTRL_1 0xCD94 -+#define R_AX_TRXPTCL_RESP_CSI_CTRL_1_C1 0xED94 -+#define B_AX_BFMEE_CSISEQ_SEL BIT(29) -+#define B_AX_BFMEE_BFPARAM_SEL BIT(28) -+#define B_AX_BFMEE_OFDM_LEN_TH_MASK GENMASK(27, 24) -+#define B_AX_BFMEE_BF_PORT_SEL BIT(23) -+#define B_AX_BFMEE_USE_NSTS BIT(22) -+#define B_AX_BFMEE_CSI_RATE_FB_EN BIT(21) -+#define B_AX_BFMEE_CSI_GID_SEL BIT(20) -+#define B_AX_BFMEE_CSI_RSC_MASK GENMASK(19, 18) -+#define B_AX_BFMEE_CSI_FORCE_RETE_EN BIT(17) -+#define B_AX_BFMEE_CSI_USE_NDPARATE BIT(16) -+#define B_AX_BFMEE_CSI_WITHHTC_EN BIT(15) -+#define B_AX_BFMEE_CSIINFO0_BF_EN BIT(14) -+#define B_AX_BFMEE_CSIINFO0_STBC_EN BIT(13) -+#define B_AX_BFMEE_CSIINFO0_LDPC_EN BIT(12) -+#define B_AX_BFMEE_CSIINFO0_CS_MASK GENMASK(11, 10) -+#define B_AX_BFMEE_CSIINFO0_CB_MASK GENMASK(9, 8) -+#define B_AX_BFMEE_CSIINFO0_NG_MASK GENMASK(7, 6) -+#define B_AX_BFMEE_CSIINFO0_NR_MASK GENMASK(5, 3) -+#define B_AX_BFMEE_CSIINFO0_NC_MASK GENMASK(2, 0) -+ -+#define R_AX_TRXPTCL_RESP_CSI_RRSC 0xCD8C -+#define R_AX_TRXPTCL_RESP_CSI_RRSC_C1 0xED8C -+#define CSI_RRSC_BMAP 0x29292911 -+ -+#define R_AX_TRXPTCL_RESP_CSI_RATE 0xCD90 -+#define R_AX_TRXPTCL_RESP_CSI_RATE_C1 0xED90 -+#define B_AX_BFMEE_HE_CSI_RATE_MASK GENMASK(22, 16) -+#define B_AX_BFMEE_VHT_CSI_RATE_MASK GENMASK(14, 8) -+#define B_AX_BFMEE_HT_CSI_RATE_MASK GENMASK(6, 0) -+#define CSI_INIT_RATE_HE 0x3 -+#define CSI_INIT_RATE_VHT 0x3 -+#define CSI_INIT_RATE_HT 0x3 -+ -+#define R_AX_RCR 0xCE00 -+#define R_AX_RCR_C1 0xEE00 -+#define B_AX_STOP_RX_IN BIT(11) -+#define B_AX_DRV_INFO_SIZE_MASK GENMASK(10, 8) -+#define B_AX_CH_EN_MASK GENMASK(3, 0) -+ -+#define R_AX_DLK_PROTECT_CTL 0xCE02 -+#define R_AX_DLK_PROTECT_CTL_C1 0xEE02 -+#define B_AX_RX_DLK_CCA_TIME_MASK GENMASK(15, 8) -+#define B_AX_RX_DLK_DATA_TIME_MASK GENMASK(7, 4) -+ -+#define R_AX_PLCP_HDR_FLTR 0xCE04 -+#define R_AX_PLCP_HDR_FLTR_C1 0xEE04 -+#define B_AX_DIS_CHK_MIN_LEN BIT(8) -+#define B_AX_HE_SIGB_CRC_CHK BIT(6) -+#define B_AX_VHT_MU_SIGB_CRC_CHK BIT(5) -+#define B_AX_VHT_SU_SIGB_CRC_CHK BIT(4) -+#define B_AX_SIGA_CRC_CHK BIT(3) -+#define B_AX_LSIG_PARITY_CHK_EN BIT(2) -+#define B_AX_CCK_SIG_CHK BIT(1) -+#define B_AX_CCK_CRC_CHK BIT(0) -+ -+#define R_AX_RX_FLTR_OPT 0xCE20 -+#define R_AX_RX_FLTR_OPT_C1 0xEE20 -+#define B_AX_UID_FILTER_MASK GENMASK(31, 24) -+#define B_AX_UNSPT_FILTER_SH 22 -+#define B_AX_UNSPT_FILTER_MASK GENMASK(23, 22) -+#define B_AX_RX_MPDU_MAX_LEN_MASK GENMASK(21, 16) -+#define B_AX_RX_MPDU_MAX_LEN_SIZE 0x3f -+#define B_AX_A_FTM_REQ BIT(14) -+#define B_AX_A_ERR_PKT BIT(13) -+#define B_AX_A_UNSUP_PKT BIT(12) -+#define B_AX_A_CRC32_ERR BIT(11) -+#define B_AX_A_PWR_MGNT BIT(10) -+#define B_AX_A_BCN_CHK_RULE_MASK GENMASK(9, 8) -+#define B_AX_A_BCN_CHK_EN BIT(7) -+#define B_AX_A_MC_LIST_CAM_MATCH BIT(6) -+#define B_AX_A_BC_CAM_MATCH BIT(5) -+#define B_AX_A_UC_CAM_MATCH BIT(4) -+#define B_AX_A_MC BIT(3) -+#define B_AX_A_BC BIT(2) -+#define B_AX_A_A1_MATCH BIT(1) -+#define B_AX_SNIFFER_MODE BIT(0) -+#define DEFAULT_AX_RX_FLTR (B_AX_A_A1_MATCH | B_AX_A_BC | B_AX_A_MC | \ -+ B_AX_A_UC_CAM_MATCH | B_AX_A_BC_CAM_MATCH | \ -+ B_AX_A_PWR_MGNT | B_AX_A_FTM_REQ | \ -+ u32_encode_bits(3, B_AX_UID_FILTER_MASK) | \ -+ B_AX_A_BCN_CHK_EN) -+#define B_AX_RX_FLTR_CFG_MASK ((u32)~B_AX_RX_MPDU_MAX_LEN_MASK) -+ -+#define R_AX_CTRL_FLTR 0xCE24 -+#define R_AX_CTRL_FLTR_C1 0xEE24 -+#define R_AX_MGNT_FLTR 0xCE28 -+#define R_AX_MGNT_FLTR_C1 0xEE28 -+#define R_AX_DATA_FLTR 0xCE2C -+#define R_AX_DATA_FLTR_C1 0xEE2C -+#define RX_FLTR_FRAME_DROP 0x00000000 -+#define RX_FLTR_FRAME_TO_HOST 0x55555555 -+#define RX_FLTR_FRAME_TO_WLCPU 0xAAAAAAAA -+ -+#define R_AX_ADDR_CAM_CTRL 0xCE34 -+#define R_AX_ADDR_CAM_CTRL_C1 0xEE34 -+#define B_AX_ADDR_CAM_RANGE_MASK GENMASK(23, 16) -+#define B_AX_ADDR_CAM_CMPLIMT_MASK GENMASK(15, 12) -+#define B_AX_ADDR_CAM_CLR BIT(8) -+#define B_AX_ADDR_CAM_A2_B0_CHK BIT(2) -+#define B_AX_ADDR_CAM_SRCH_PERPKT BIT(1) -+#define B_AX_ADDR_CAM_EN BIT(0) -+ -+#define R_AX_RESPBA_CAM_CTRL 0xCE3C -+#define R_AX_RESPBA_CAM_CTRL_C1 0xEE3C -+#define B_AX_SSN_SEL BIT(2) -+ -+#define R_AX_PPDU_STAT 0xCE40 -+#define R_AX_PPDU_STAT_C1 0xEE40 -+#define B_AX_PPDU_STAT_RPT_TRIG BIT(8) -+#define B_AX_PPDU_STAT_RPT_CRC32 BIT(5) -+#define B_AX_PPDU_STAT_RPT_A1M BIT(4) -+#define B_AX_APP_PLCP_HDR_RPT BIT(3) -+#define B_AX_APP_RX_CNT_RPT BIT(2) -+#define B_AX_APP_MAC_INFO_RPT BIT(1) -+#define B_AX_PPDU_STAT_RPT_EN BIT(0) -+ -+#define R_AX_RX_SR_CTRL 0xCE4A -+#define R_AX_RX_SR_CTRL_C1 0xEE4A -+#define B_AX_SR_EN BIT(0) -+ -+#define R_AX_RX_STATE_MONITOR 0xCEF0 -+#define R_AX_RX_STATE_MONITOR_C1 0xEEF0 -+#define B_AX_RX_STATE_MONITOR_MASK GENMASK(31, 0) -+#define B_AX_STATE_CUR_MASK GENMASK(31, 16) -+#define B_AX_STATE_NXT_MASK GENMASK(13, 8) -+#define B_AX_STATE_UPD BIT(7) -+#define B_AX_STATE_SEL_MASK GENMASK(4, 0) -+ -+#define R_AX_RMAC_ERR_ISR 0xCEF4 -+#define R_AX_RMAC_ERR_ISR_C1 0xEEF4 -+#define B_AX_RXERR_INTPS_EN BIT(31) -+#define B_AX_RMAC_RX_CSI_TIMEOUT_INT_EN BIT(19) -+#define B_AX_RMAC_RX_TIMEOUT_INT_EN BIT(18) -+#define B_AX_RMAC_CSI_TIMEOUT_INT_EN BIT(17) -+#define B_AX_RMAC_DATA_ON_TIMEOUT_INT_EN BIT(16) -+#define B_AX_RMAC_CCA_TIMEOUT_INT_EN BIT(15) -+#define B_AX_RMAC_DMA_TIMEOUT_INT_EN BIT(14) -+#define B_AX_RMAC_DATA_ON_TO_IDLE_TIMEOUT_INT_EN BIT(13) -+#define B_AX_RMAC_CCA_TO_IDLE_TIMEOUT_INT_EN BIT(12) -+#define B_AX_RMAC_RX_CSI_TIMEOUT_FLAG BIT(7) -+#define B_AX_RMAC_RX_TIMEOUT_FLAG BIT(6) -+#define B_AX_BMAC_CSI_TIMEOUT_FLAG BIT(5) -+#define B_AX_BMAC_DATA_ON_TIMEOUT_FLAG BIT(4) -+#define B_AX_BMAC_CCA_TIMEOUT_FLAG BIT(3) -+#define B_AX_BMAC_DMA_TIMEOUT_FLAG BIT(2) -+#define B_AX_BMAC_DATA_ON_TO_IDLE_TIMEOUT_FLAG BIT(1) -+#define B_AX_BMAC_CCA_TO_IDLE_TIMEOUT_FLAG BIT(0) -+ -+#define R_AX_RMAC_PLCP_MON 0xCEF8 -+#define R_AX_RMAC_PLCP_MON_C1 0xEEF8 -+#define B_AX_RMAC_PLCP_MON_MASK GENMASK(31, 0) -+#define B_AX_PCLP_MON_SEL_MASK GENMASK(31, 28) -+#define B_AX_PCLP_MON_CONT_MASK GENMASK(27, 0) -+ -+#define R_AX_RX_DEBUG_SELECT 0xCEFC -+#define R_AX_RX_DEBUG_SELECT_C1 0xEEFC -+#define B_AX_DEBUG_SEL_MASK GENMASK(7, 0) -+ -+#define R_AX_PWR_RATE_CTRL 0xD200 -+#define R_AX_PWR_RATE_CTRL_C1 0xF200 -+#define B_AX_FORCE_PWR_BY_RATE_EN BIT(9) -+#define B_AX_FORCE_PWR_BY_RATE_VALUE_MASK GENMASK(8, 0) -+ -+#define R_AX_PWR_RATE_OFST_CTRL 0xD204 -+#define R_AX_PWR_COEXT_CTRL 0xD220 -+#define B_AX_TXAGC_BT_EN BIT(1) -+#define B_AX_TXAGC_BT_MASK GENMASK(11, 3) -+ -+#define R_AX_PWR_UL_CTRL0 0xD240 -+#define R_AX_PWR_UL_CTRL2 0xD248 -+#define B_AX_PWR_UL_CFO_MASK GENMASK(2, 0) -+#define B_AX_PWR_UL_CTRL2_MASK 0x07700007 -+#define R_AX_PWR_UL_TB_CTRL 0xD288 -+#define B_AX_PWR_UL_TB_CTRL_EN BIT(31) -+#define R_AX_PWR_UL_TB_1T 0xD28C -+#define B_AX_PWR_UL_TB_1T_MASK GENMASK(4, 0) -+#define R_AX_PWR_UL_TB_2T 0xD290 -+#define B_AX_PWR_UL_TB_2T_MASK GENMASK(4, 0) -+#define R_AX_PWR_BY_RATE_TABLE0 0xD2C0 -+#define R_AX_PWR_BY_RATE_TABLE10 0xD2E8 -+#define R_AX_PWR_BY_RATE R_AX_PWR_BY_RATE_TABLE0 -+#define R_AX_PWR_BY_RATE_MAX R_AX_PWR_BY_RATE_TABLE10 -+#define R_AX_PWR_LMT_TABLE0 0xD2EC -+#define R_AX_PWR_LMT_TABLE19 0xD338 -+#define R_AX_PWR_LMT R_AX_PWR_LMT_TABLE0 -+#define R_AX_PWR_LMT_MAX R_AX_PWR_LMT_TABLE19 -+#define R_AX_PWR_RU_LMT_TABLE0 0xD33C -+#define R_AX_PWR_RU_LMT_TABLE11 0xD368 -+#define R_AX_PWR_RU_LMT R_AX_PWR_RU_LMT_TABLE0 -+#define R_AX_PWR_RU_LMT_MAX R_AX_PWR_RU_LMT_TABLE11 -+#define R_AX_PWR_MACID_LMT_TABLE0 0xD36C -+#define R_AX_PWR_MACID_LMT_TABLE127 0xD568 -+ -+#define R_AX_TXPWR_IMR 0xD9E0 -+#define R_AX_TXPWR_IMR_C1 0xF9E0 -+#define R_AX_TXPWR_ISR 0xD9E4 -+#define R_AX_TXPWR_ISR_C1 0xF9E4 -+ -+#define R_AX_BTC_CFG 0xDA00 -+#define B_AX_DIS_BTC_CLK_G BIT(2) -+ -+#define R_AX_WL_PRI_MSK 0xDA10 -+#define B_AX_PTA_WL_PRI_MASK_BCNQ BIT(8) -+ -+#define R_AX_BTC_FUNC_EN 0xDA20 -+#define R_AX_BTC_FUNC_EN_C1 0xFA20 -+#define B_AX_PTA_WL_TX_EN BIT(1) -+#define B_AX_PTA_EDCCA_EN BIT(0) -+ -+#define R_BTC_BREAK_TABLE 0xDA2C -+#define BTC_BREAK_PARAM 0xf0ffffff -+ -+#define R_BTC_BT_COEX_MSK_TABLE 0xDA30 -+#define B_BTC_PRI_MASK_TX_RESP_V1 BIT(3) -+ -+#define R_AX_BT_COEX_CFG_2 0xDA34 -+#define R_AX_BT_COEX_CFG_2_C1 0xFA34 -+#define B_AX_GNT_BT_BYPASS_PRIORITY BIT(12) -+#define B_AX_GNT_BT_POLARITY BIT(8) -+#define B_AX_TIMER_MASK GENMASK(7, 0) -+#define MAC_AX_CSR_RATE 80 -+ -+#define R_AX_CSR_MODE 0xDA40 -+#define R_AX_CSR_MODE_C1 0xFA40 -+#define B_AX_BT_CNT_RST BIT(16) -+#define B_AX_BT_STAT_DELAY_MASK GENMASK(15, 12) -+#define MAC_AX_CSR_DELAY 0 -+#define B_AX_BT_TRX_INIT_DETECT_MASK GENMASK(11, 8) -+#define MAC_AX_CSR_TRX_TO 4 -+#define B_AX_BT_PRI_DETECT_TO_MASK GENMASK(7, 4) -+#define MAC_AX_CSR_PRI_TO 5 -+#define B_AX_WL_ACT_MSK BIT(3) -+#define B_AX_STATIS_BT_EN BIT(2) -+#define B_AX_WL_ACT_MASK_ENABLE BIT(1) -+#define B_AX_ENHANCED_BT BIT(0) -+ -+#define R_AX_BT_STAST_HIGH 0xDA44 -+#define B_AX_STATIS_BT_HI_RX_MASK GENMASK(31, 16) -+#define B_AX_STATIS_BT_HI_TX_MASK GENMASK(15, 0) -+#define R_AX_BT_STAST_LOW 0xDA48 -+#define B_AX_STATIS_BT_LO_TX_1_MASK GENMASK(15, 0) -+#define B_AX_STATIS_BT_LO_RX_1_MASK GENMASK(31, 16) -+ -+#define R_AX_TDMA_MODE 0xDA4C -+#define R_AX_TDMA_MODE_C1 0xFA4C -+#define B_AX_R_BT_CMD_RPT_MASK GENMASK(31, 16) -+#define B_AX_R_RPT_FROM_BT_MASK GENMASK(15, 8) -+#define B_AX_BT_HID_ISR_SET_MASK GENMASK(7, 6) -+#define B_AX_TDMA_BT_START_NOTIFY BIT(5) -+#define B_AX_ENABLE_TDMA_FW_MODE BIT(4) -+#define B_AX_ENABLE_PTA_TDMA_MODE BIT(3) -+#define B_AX_ENABLE_COEXIST_TAB_IN_TDMA BIT(2) -+#define B_AX_GPIO2_GPIO3_EXANGE_OR_NO_BT_CCA BIT(1) -+#define B_AX_RTK_BT_ENABLE BIT(0) -+ -+#define R_AX_BT_COEX_CFG_5 0xDA6C -+#define R_AX_BT_COEX_CFG_5_C1 0xFA6C -+#define B_AX_BT_TIME_MASK GENMASK(31, 6) -+#define B_AX_BT_RPT_SAMPLE_RATE_MASK GENMASK(5, 0) -+#define MAC_AX_RTK_RATE 5 -+ -+#define R_AX_LTE_CTRL 0xDAF0 -+#define R_AX_LTE_WDATA 0xDAF4 -+#define R_AX_LTE_RDATA 0xDAF8 -+ -+#define CMAC1_START_ADDR 0xE000 -+#define CMAC1_END_ADDR 0xFFFF -+#define R_AX_CMAC_REG_END 0xFFFF -+ -+#define R_AX_LTE_SW_CFG_1 0x0038 -+#define R_AX_LTE_SW_CFG_1_C1 0x2038 -+#define B_AX_GNT_BT_RFC_S1_SW_VAL BIT(31) -+#define B_AX_GNT_BT_RFC_S1_SW_CTRL BIT(30) -+#define B_AX_GNT_WL_RFC_S1_SW_VAL BIT(29) -+#define B_AX_GNT_WL_RFC_S1_SW_CTRL BIT(28) -+#define B_AX_GNT_BT_BB_S1_SW_VAL BIT(27) -+#define B_AX_GNT_BT_BB_S1_SW_CTRL BIT(26) -+#define B_AX_GNT_WL_BB_S1_SW_VAL BIT(25) -+#define B_AX_GNT_WL_BB_S1_SW_CTRL BIT(24) -+#define B_AX_BT_SW_CTRL_WL_PRIORITY BIT(19) -+#define B_AX_WL_SW_CTRL_WL_PRIORITY BIT(18) -+#define B_AX_LTE_PATTERN_2_EN BIT(17) -+#define B_AX_LTE_PATTERN_1_EN BIT(16) -+#define B_AX_GNT_BT_RFC_S0_SW_VAL BIT(15) -+#define B_AX_GNT_BT_RFC_S0_SW_CTRL BIT(14) -+#define B_AX_GNT_WL_RFC_S0_SW_VAL BIT(13) -+#define B_AX_GNT_WL_RFC_S0_SW_CTRL BIT(12) -+#define B_AX_GNT_BT_BB_S0_SW_VAL BIT(11) -+#define B_AX_GNT_BT_BB_S0_SW_CTRL BIT(10) -+#define B_AX_GNT_WL_BB_S0_SW_VAL BIT(9) -+#define B_AX_GNT_WL_BB_S0_SW_CTRL BIT(8) -+#define B_AX_LTECOEX_FUN_EN BIT(7) -+#define B_AX_LTECOEX_3WIRE_CTRL_MUX BIT(6) -+#define B_AX_LTECOEX_OP_MODE_SEL_MASK GENMASK(5, 4) -+#define B_AX_LTECOEX_UART_MUX BIT(3) -+#define B_AX_LTECOEX_UART_MODE_SEL_MASK GENMASK(2, 0) -+ -+#define R_AX_LTE_SW_CFG_2 0x003C -+#define R_AX_LTE_SW_CFG_2_C1 0x203C -+#define B_AX_WL_RX_CTRL BIT(8) -+#define B_AX_GNT_WL_RX_SW_VAL BIT(7) -+#define B_AX_GNT_WL_RX_SW_CTRL BIT(6) -+#define B_AX_GNT_WL_TX_SW_VAL BIT(5) -+#define B_AX_GNT_WL_TX_SW_CTRL BIT(4) -+#define B_AX_GNT_BT_RX_SW_VAL BIT(3) -+#define B_AX_GNT_BT_RX_SW_CTRL BIT(2) -+#define B_AX_GNT_BT_TX_SW_VAL BIT(1) -+#define B_AX_GNT_BT_TX_SW_CTRL BIT(0) -+ -+#define RR_MOD 0x00 -+#define RR_MOD_IQK GENMASK(19, 4) -+#define RR_MOD_DPK GENMASK(19, 5) -+#define RR_MOD_MASK GENMASK(19, 16) -+#define RR_MOD_V_DOWN 0x0 -+#define RR_MOD_V_STANDBY 0x1 -+#define RR_MOD_V_TX 0x2 -+#define RR_MOD_V_RX 0x3 -+#define RR_MOD_V_TXIQK 0x4 -+#define RR_MOD_V_DPK 0x5 -+#define RR_MOD_V_RXK1 0x6 -+#define RR_MOD_V_RXK2 0x7 -+#define RR_MOD_M_RXG GENMASK(13, 4) -+#define RR_MOD_M_RXBB GENMASK(9, 5) -+#define RR_MODOPT 0x01 -+#define RR_MODOPT_M_TXPWR GENMASK(5, 0) -+#define RR_WLSEL 0x02 -+#define RR_WLSEL_AG GENMASK(18, 16) -+#define RR_RSV1 0x05 -+#define RR_RSV1_RST BIT(0) -+#define RR_DTXLOK 0x08 -+#define RR_RSV2 0x09 -+#define RR_CFGCH 0x18 -+#define RR_BTC 0x1a -+#define RR_BTC_TXBB GENMASK(14, 12) -+#define RR_BTC_RXBB GENMASK(11, 10) -+#define RR_RCKC 0x1b -+#define RR_RCKC_CA GENMASK(14, 10) -+#define RR_RCKS 0x1c -+#define RR_RCKO 0x1d -+#define RR_RCKO_OFF GENMASK(13, 9) -+#define RR_RXKPLL 0x1e -+#define RR_RXKPLL_OFF GENMASK(5, 0) -+#define RR_RXKPLL_POW BIT(19) -+#define RR_RSV4 0x1f -+#define RR_RXK 0x20 -+#define RR_RXK_PLLEN BIT(5) -+#define RR_RXK_SEL5G BIT(7) -+#define RR_RXK_SEL2G BIT(8) -+#define RR_LUTWA 0x33 -+#define RR_LUTWA_MASK GENMASK(9, 0) -+#define RR_LUTWD1 0x3e -+#define RR_LUTWD0 0x3f -+#define RR_TM 0x42 -+#define RR_TM_TRI BIT(19) -+#define RR_TM_VAL GENMASK(6, 1) -+#define RR_TM2 0x43 -+#define RR_TM2_OFF GENMASK(19, 16) -+#define RR_TXG1 0x51 -+#define RR_TXG1_ATT2 BIT(19) -+#define RR_TXG1_ATT1 BIT(11) -+#define RR_TXG2 0x52 -+#define RR_TXG2_ATT0 BIT(11) -+#define RR_BSPAD 0x54 -+#define RR_TXGA 0x55 -+#define RR_TXGA_LOK_EN BIT(0) -+#define RR_TXGA_TRK_EN BIT(7) -+#define RR_GAINTX 0x56 -+#define RR_GAINTX_ALL GENMASK(15, 0) -+#define RR_GAINTX_PAD GENMASK(9, 5) -+#define RR_GAINTX_BB GENMASK(4, 0) -+#define RR_TXMO 0x58 -+#define RR_TXMO_COI GENMASK(19, 15) -+#define RR_TXMO_COQ GENMASK(14, 10) -+#define RR_TXMO_FII GENMASK(9, 6) -+#define RR_TXMO_FIQ GENMASK(5, 2) -+#define RR_TXA 0x5d -+#define RR_TXA_TRK GENMASK(19, 14) -+#define RR_TXRSV 0x5c -+#define RR_TXRSV_GAPK BIT(19) -+#define RR_BIAS 0x5e -+#define RR_BIAS_GAPK BIT(19) -+#define RR_BIASA 0x60 -+#define RR_BIASA_TXG GENMASK(15, 12) -+#define RR_BIASA_TXA GENMASK(19, 16) -+#define RR_BIASA_A GENMASK(2, 0) -+#define RR_BIASA2 0x63 -+#define RR_BIASA2_LB GENMASK(4, 2) -+#define RR_TXATANK 0x64 -+#define RR_TXATANK_LBSW GENMASK(16, 15) -+#define RR_TRXIQ 0x66 -+#define RR_RSV6 0x6d -+#define RR_TXPOW 0x7f -+#define RR_TXPOW_TXG BIT(1) -+#define RR_TXPOW_TXA BIT(8) -+#define RR_RXPOW 0x80 -+#define RR_RXPOW_IQK GENMASK(17, 16) -+#define RR_RXBB 0x83 -+#define RR_RXBB_C2G GENMASK(16, 10) -+#define RR_RXBB_C1G GENMASK(9, 8) -+#define RR_RXBB_ATTR GENMASK(7, 4) -+#define RR_RXBB_ATTC GENMASK(2, 0) -+#define RR_XGLNA2 0x85 -+#define RR_XGLNA2_SW GENMASK(1, 0) -+#define RR_RXA 0x8a -+#define RR_RXA_DPK GENMASK(9, 8) -+#define RR_RXA2 0x8c -+#define RR_RXA2_C2 GENMASK(9, 3) -+#define RR_RXA2_C1 GENMASK(12, 10) -+#define RR_RXIQGEN 0x8d -+#define RR_RXIQGEN_ATTL GENMASK(12, 8) -+#define RR_RXIQGEN_ATTH GENMASK(14, 13) -+#define RR_RXBB2 0x8f -+#define RR_EN_TIA_IDA GENMASK(11, 10) -+#define RR_RXBB2_DAC_EN BIT(13) -+#define RR_XALNA2 0x90 -+#define RR_XALNA2_SW GENMASK(1, 0) -+#define RR_DCK 0x92 -+#define RR_DCK_FINE BIT(1) -+#define RR_DCK_LV BIT(0) -+#define RR_DCK1 0x93 -+#define RR_DCK1_SEL BIT(3) -+#define RR_DCK2 0x94 -+#define RR_DCK2_CYCLE GENMASK(7, 2) -+#define RR_MIXER 0x9f -+#define RR_MIXER_GN GENMASK(4, 3) -+#define RR_XTALX2 0xb8 -+#define RR_MALSEL 0xbe -+#define RR_RCKD 0xde -+#define RR_RCKD_POW GENMASK(19, 13) -+#define RR_RCKD_BW BIT(2) -+#define RR_TXADBG 0xde -+#define RR_LUTDBG 0xdf -+#define RR_LUTDBG_LOK BIT(2) -+#define RR_LUTWE2 0xee -+#define RR_LUTWE 0xef -+#define RR_LUTWE_LOK BIT(2) -+#define RR_RFC 0xf0 -+#define RR_RFC_CKEN BIT(1) -+ -+#define R_UPD_P0 0x0000 -+#define R_RSTB_WATCH_DOG 0x000C -+#define B_P0_RSTB_WATCH_DOG BIT(0) -+#define B_P1_RSTB_WATCH_DOG BIT(1) -+#define B_UPD_P0_EN BIT(30) -+#define R_ANAPAR_PW15 0x030C -+#define B_ANAPAR_PW15 GENMASK(31, 24) -+#define B_ANAPAR_PW15_H GENMASK(27, 24) -+#define B_ANAPAR_PW15_H2 GENMASK(27, 26) -+#define R_ANAPAR 0x032C -+#define B_ANAPAR_15 GENMASK(31, 16) -+#define B_ANAPAR_ADCCLK BIT(30) -+#define B_ANAPAR_FLTRST BIT(22) -+#define B_ANAPAR_CRXBB GENMASK(18, 16) -+#define B_ANAPAR_14 GENMASK(15, 0) -+#define R_UPD_CLK_ADC 0x0700 -+#define B_UPD_CLK_ADC_ON BIT(24) -+#define B_UPD_CLK_ADC_VAL GENMASK(26, 25) -+#define R_RSTB_ASYNC 0x0704 -+#define B_RSTB_ASYNC_ALL BIT(1) -+#define R_PMAC_GNT 0x0980 -+#define B_PMAC_GNT_TXEN BIT(0) -+#define B_PMAC_GNT_RXEN BIT(16) -+#define B_PMAC_GNT_P1 GENMASK(20, 17) -+#define B_PMAC_GNT_P2 GENMASK(29, 26) -+#define R_PMAC_RX_CFG1 0x0988 -+#define B_PMAC_OPT1_MSK GENMASK(11, 0) -+#define R_PMAC_RXMOD 0x0994 -+#define B_PMAC_RXMOD_MSK GENMASK(7, 4) -+#define R_MAC_SEL 0x09A4 -+#define B_MAC_SEL_MOD GENMASK(4, 2) -+#define B_MAC_SEL_DPD_EN BIT(10) -+#define B_MAC_SEL_PWR_EN BIT(16) -+#define R_PMAC_TX_CTRL 0x09C0 -+#define B_PMAC_TXEN_DIS BIT(0) -+#define R_PMAC_TX_PRD 0x09C4 -+#define B_PMAC_TX_PRD_MSK GENMASK(31, 8) -+#define B_PMAC_CTX_EN BIT(0) -+#define B_PMAC_PTX_EN BIT(4) -+#define R_PMAC_TX_CNT 0x09C8 -+#define B_PMAC_TX_CNT_MSK GENMASK(31, 0) -+#define R_CCX 0x0C00 -+#define B_CCX_EDCCA_OPT_MSK GENMASK(6, 4) -+#define B_MEASUREMENT_TRIG_MSK BIT(2) -+#define B_CCX_TRIG_OPT_MSK BIT(1) -+#define B_CCX_EN_MSK BIT(0) -+#define R_IFS_COUNTER 0x0C28 -+#define B_IFS_CLM_PERIOD_MSK GENMASK(31, 16) -+#define B_IFS_CLM_COUNTER_UNIT_MSK GENMASK(15, 14) -+#define B_IFS_COUNTER_CLR_MSK BIT(13) -+#define B_IFS_COLLECT_EN BIT(12) -+#define R_IFS_T1 0x0C2C -+#define B_IFS_T1_TH_HIGH_MSK GENMASK(31, 16) -+#define B_IFS_T1_EN_MSK BIT(15) -+#define B_IFS_T1_TH_LOW_MSK GENMASK(14, 0) -+#define R_IFS_T2 0x0C30 -+#define B_IFS_T2_TH_HIGH_MSK GENMASK(31, 16) -+#define B_IFS_T2_EN_MSK BIT(15) -+#define B_IFS_T2_TH_LOW_MSK GENMASK(14, 0) -+#define R_IFS_T3 0x0C34 -+#define B_IFS_T3_TH_HIGH_MSK GENMASK(31, 16) -+#define B_IFS_T3_EN_MSK BIT(15) -+#define B_IFS_T3_TH_LOW_MSK GENMASK(14, 0) -+#define R_IFS_T4 0x0C38 -+#define B_IFS_T4_TH_HIGH_MSK GENMASK(31, 16) -+#define B_IFS_T4_EN_MSK BIT(15) -+#define B_IFS_T4_TH_LOW_MSK GENMASK(14, 0) -+#define R_PD_CTRL 0x0C3C -+#define B_PD_HIT_DIS BIT(9) -+#define R_IOQ_IQK_DPK 0x0C60 -+#define B_IOQ_IQK_DPK_EN BIT(1) -+#define R_P0_EN_SOUND_WO_NDP 0x0D7C -+#define B_P0_EN_SOUND_WO_NDP BIT(1) -+#define R_SPOOF_ASYNC_RST 0x0D84 -+#define B_SPOOF_ASYNC_RST BIT(15) -+#define R_NDP_BRK0 0xDA0 -+#define R_NDP_BRK1 0xDA4 -+#define B_NDP_RU_BRK BIT(0) -+#define R_BRK_ASYNC_RST_EN_1 0x0DC0 -+#define R_BRK_ASYNC_RST_EN_2 0x0DC4 -+#define R_BRK_ASYNC_RST_EN_3 0x0DC8 -+#define R_P0_RXCK 0x12A0 -+#define B_P0_RXCK_VAL GENMASK(18, 16) -+#define B_P0_RXCK_ON BIT(19) -+#define B_P0_RXCK_BW3 BIT(30) -+#define R_P0_NRBW 0x12B8 -+#define B_P0_NRBW_DBG BIT(30) -+#define R_S0_RXDC 0x12D4 -+#define B_S0_RXDC_I GENMASK(25, 16) -+#define B_S0_RXDC_Q GENMASK(31, 26) -+#define R_S0_RXDC2 0x12D8 -+#define B_S0_RXDC2_SEL GENMASK(9, 8) -+#define B_S0_RXDC2_AVG GENMASK(7, 6) -+#define B_S0_RXDC2_MEN GENMASK(5, 4) -+#define B_S0_RXDC2_Q2 GENMASK(3, 0) -+#define R_CFO_COMP_SEG0_L 0x1384 -+#define R_CFO_COMP_SEG0_H 0x1388 -+#define R_CFO_COMP_SEG0_CTRL 0x138C -+#define R_DBG32_D 0x1730 -+#define R_TX_COUNTER 0x1A40 -+#define R_IFS_CLM_TX_CNT 0x1ACC -+#define B_IFS_CLM_EDCCA_EXCLUDE_CCA_FA_MSK GENMASK(31, 16) -+#define B_IFS_CLM_TX_CNT_MSK GENMASK(15, 0) -+#define R_IFS_CLM_CCA 0x1AD0 -+#define B_IFS_CLM_OFDMCCA_EXCLUDE_FA_MSK GENMASK(31, 16) -+#define B_IFS_CLM_CCKCCA_EXCLUDE_FA_MSK GENMASK(15, 0) -+#define R_IFS_CLM_FA 0x1AD4 -+#define B_IFS_CLM_OFDM_FA_MSK GENMASK(31, 16) -+#define B_IFS_CLM_CCK_FA_MSK GENMASK(15, 0) -+#define R_IFS_HIS 0x1AD8 -+#define B_IFS_T4_HIS_MSK GENMASK(31, 24) -+#define B_IFS_T3_HIS_MSK GENMASK(23, 16) -+#define B_IFS_T2_HIS_MSK GENMASK(15, 8) -+#define B_IFS_T1_HIS_MSK GENMASK(7, 0) -+#define R_IFS_AVG_L 0x1ADC -+#define B_IFS_T2_AVG_MSK GENMASK(31, 16) -+#define B_IFS_T1_AVG_MSK GENMASK(15, 0) -+#define R_IFS_AVG_H 0x1AE0 -+#define B_IFS_T4_AVG_MSK GENMASK(31, 16) -+#define B_IFS_T3_AVG_MSK GENMASK(15, 0) -+#define R_IFS_CCA_L 0x1AE4 -+#define B_IFS_T2_CCA_MSK GENMASK(31, 16) -+#define B_IFS_T1_CCA_MSK GENMASK(15, 0) -+#define R_IFS_CCA_H 0x1AE8 -+#define B_IFS_T4_CCA_MSK GENMASK(31, 16) -+#define B_IFS_T3_CCA_MSK GENMASK(15, 0) -+#define R_IFSCNT 0x1AEC -+#define B_IFSCNT_DONE_MSK BIT(16) -+#define B_IFSCNT_TOTAL_CNT_MSK GENMASK(15, 0) -+#define R_TXAGC_TP 0x1C04 -+#define B_TXAGC_TP GENMASK(2, 0) -+#define R_TSSI_THER 0x1C10 -+#define B_TSSI_THER GENMASK(29, 24) -+#define R_TXAGC_BB 0x1C60 -+#define B_TXAGC_BB_OFT GENMASK(31, 16) -+#define B_TXAGC_BB GENMASK(31, 24) -+#define R_S0_ADDCK 0x1E00 -+#define B_S0_ADDCK_I GENMASK(9, 0) -+#define B_S0_ADDCK_Q GENMASK(19, 10) -+#define R_ADC_FIFO 0x20fc -+#define B_ADC_FIFO_RST GENMASK(31, 24) -+#define R_TXFIR0 0x2300 -+#define B_TXFIR_C01 GENMASK(23, 0) -+#define R_TXFIR2 0x2304 -+#define B_TXFIR_C23 GENMASK(23, 0) -+#define R_TXFIR4 0x2308 -+#define B_TXFIR_C45 GENMASK(23, 0) -+#define R_TXFIR6 0x230c -+#define B_TXFIR_C67 GENMASK(23, 0) -+#define R_TXFIR8 0x2310 -+#define B_TXFIR_C89 GENMASK(23, 0) -+#define R_TXFIRA 0x2314 -+#define B_TXFIR_CAB GENMASK(23, 0) -+#define R_TXFIRC 0x2318 -+#define B_TXFIR_CCD GENMASK(23, 0) -+#define R_TXFIRE 0x231c -+#define B_TXFIR_CEF GENMASK(23, 0) -+#define R_RXCCA 0x2344 -+#define B_RXCCA_DIS BIT(31) -+#define R_RXSC 0x237C -+#define B_RXSC_EN BIT(0) -+#define R_RXSCOBC 0x23B0 -+#define B_RXSCOBC_TH GENMASK(18, 0) -+#define R_RXSCOCCK 0x23B4 -+#define B_RXSCOCCK_TH GENMASK(18, 0) -+#define R_P1_EN_SOUND_WO_NDP 0x2D7C -+#define B_P1_EN_SOUND_WO_NDP BIT(1) -+#define R_P1_DBGMOD 0x32B8 -+#define B_P1_DBGMOD_ON BIT(30) -+#define R_S1_RXDC 0x32D4 -+#define B_S1_RXDC_I GENMASK(25, 16) -+#define B_S1_RXDC_Q GENMASK(31, 26) -+#define R_S1_RXDC2 0x32D8 -+#define B_S1_RXDC2_EN GENMASK(5, 4) -+#define B_S1_RXDC2_SEL GENMASK(9, 8) -+#define B_S1_RXDC2_Q2 GENMASK(3, 0) -+#define R_TXAGC_BB_S1 0x3C60 -+#define B_TXAGC_BB_S1_OFT GENMASK(31, 16) -+#define B_TXAGC_BB_S1 GENMASK(31, 24) -+#define R_S1_ADDCK 0x3E00 -+#define B_S1_ADDCK_I GENMASK(9, 0) -+#define B_S1_ADDCK_Q GENMASK(19, 10) -+#define R_DCFO 0x4264 -+#define B_DCFO GENMASK(1, 0) -+#define R_SEG0CSI 0x42AC -+#define B_SEG0CSI_IDX GENMASK(10, 0) -+#define R_SEG0CSI_EN 0x42C4 -+#define B_SEG0CSI_EN BIT(23) -+#define R_BSS_CLR_MAP 0x43ac -+#define B_BSS_CLR_MAP_VLD0 BIT(28) -+#define B_BSS_CLR_MAP_TGT GENMASK(27, 22) -+#define B_BSS_CLR_MAP_STAID GENMASK(21, 11) -+#define R_CFO_TRK0 0x4404 -+#define R_CFO_TRK1 0x440C -+#define B_CFO_TRK_MSK GENMASK(14, 10) -+#define R_DCFO_COMP_S0 0x448C -+#define B_DCFO_COMP_S0_MSK GENMASK(11, 0) -+#define R_DCFO_WEIGHT 0x4490 -+#define B_DCFO_WEIGHT_MSK GENMASK(27, 24) -+#define R_DCFO_OPT 0x4494 -+#define B_DCFO_OPT_EN BIT(29) -+#define R_BANDEDGE 0x4498 -+#define B_BANDEDGE_EN BIT(30) -+#define R_TXPATH_SEL 0x458C -+#define B_TXPATH_SEL_MSK GENMASK(31, 28) -+#define R_TXPWR 0x4594 -+#define B_TXPWR_MSK GENMASK(30, 22) -+#define R_TXNSS_MAP 0x45B4 -+#define B_TXNSS_MAP_MSK GENMASK(20, 17) -+#define R_PATH0_IB_PKPW 0x4628 -+#define B_PATH0_IB_PKPW_MSK GENMASK(11, 6) -+#define R_PATH0_LNA_ERR1 0x462C -+#define B_PATH0_LNA_ERR_G1_A_MSK GENMASK(29, 24) -+#define B_PATH0_LNA_ERR_G0_G_MSK GENMASK(17, 12) -+#define B_PATH0_LNA_ERR_G0_A_MSK GENMASK(11, 6) -+#define R_PATH0_LNA_ERR2 0x4630 -+#define B_PATH0_LNA_ERR_G2_G_MSK GENMASK(23, 18) -+#define B_PATH0_LNA_ERR_G2_A_MSK GENMASK(17, 12) -+#define B_PATH0_LNA_ERR_G1_G_MSK GENMASK(5, 0) -+#define R_PATH0_LNA_ERR3 0x4634 -+#define B_PATH0_LNA_ERR_G4_G_MSK GENMASK(29, 24) -+#define B_PATH0_LNA_ERR_G4_A_MSK GENMASK(23, 18) -+#define B_PATH0_LNA_ERR_G3_G_MSK GENMASK(11, 6) -+#define B_PATH0_LNA_ERR_G3_A_MSK GENMASK(5, 0) -+#define R_PATH0_LNA_ERR4 0x4638 -+#define B_PATH0_LNA_ERR_G6_A_MSK GENMASK(29, 24) -+#define B_PATH0_LNA_ERR_G5_G_MSK GENMASK(17, 12) -+#define B_PATH0_LNA_ERR_G5_A_MSK GENMASK(11, 6) -+#define R_PATH0_LNA_ERR5 0x463C -+#define B_PATH0_LNA_ERR_G6_G_MSK GENMASK(5, 0) -+#define R_PATH0_TIA_ERR_G0 0x4640 -+#define B_PATH0_TIA_ERR_G0_G_MSK GENMASK(23, 18) -+#define B_PATH0_TIA_ERR_G0_A_MSK GENMASK(17, 12) -+#define R_PATH0_TIA_ERR_G1 0x4644 -+#define B_PATH0_TIA_ERR_G1_SEL GENMASK(31, 30) -+#define B_PATH0_TIA_ERR_G1_G_MSK GENMASK(11, 6) -+#define B_PATH0_TIA_ERR_G1_A_MSK GENMASK(5, 0) -+#define R_PATH0_IB_PBK 0x4650 -+#define B_PATH0_IB_PBK_MSK GENMASK(14, 10) -+#define R_PATH0_RXB_INIT 0x4658 -+#define B_PATH0_RXB_INIT_IDX_MSK GENMASK(9, 5) -+#define R_PATH0_LNA_INIT 0x4668 -+#define B_PATH0_LNA_INIT_IDX_MSK GENMASK(26, 24) -+#define R_PATH0_BTG 0x466C -+#define B_PATH0_BTG_SHEN GENMASK(18, 17) -+#define R_PATH0_TIA_INIT 0x4674 -+#define B_PATH0_TIA_INIT_IDX_MSK BIT(17) -+#define R_PATH0_P20_FOLLOW_BY_PAGCUGC 0x46A0 -+#define B_PATH0_P20_FOLLOW_BY_PAGCUGC_EN_MSK BIT(5) -+#define R_PATH0_S20_FOLLOW_BY_PAGCUGC 0x46A4 -+#define B_PATH0_S20_FOLLOW_BY_PAGCUGC_EN_MSK BIT(5) -+#define R_P0_NBIIDX 0x469C -+#define B_P0_NBIIDX_VAL GENMASK(11, 0) -+#define B_P0_NBIIDX_NOTCH_EN BIT(12) -+#define R_P1_MODE 0x4718 -+#define B_P1_MODE_SEL GENMASK(31, 30) -+#define R_PATH1_LNA_INIT 0x473C -+#define B_PATH1_LNA_INIT_IDX_MSK GENMASK(26, 24) -+#define R_PATH1_TIA_INIT 0x4748 -+#define B_PATH1_TIA_INIT_IDX_MSK BIT(17) -+#define R_PATH1_BTG 0x4740 -+#define B_PATH1_BTG_SHEN GENMASK(18, 17) -+#define R_PATH1_RXB_INIT 0x472C -+#define B_PATH1_RXB_INIT_IDX_MSK GENMASK(9, 5) -+#define R_PATH1_P20_FOLLOW_BY_PAGCUGC 0x4774 -+#define B_PATH1_P20_FOLLOW_BY_PAGCUGC_EN_MSK BIT(5) -+#define R_PATH1_S20_FOLLOW_BY_PAGCUGC 0x4778 -+#define B_PATH1_S20_FOLLOW_BY_PAGCUGC_EN_MSK BIT(5) -+#define R_P1_NBIIDX 0x4770 -+#define B_P1_NBIIDX_VAL GENMASK(11, 0) -+#define B_P1_NBIIDX_NOTCH_EN BIT(12) -+#define R_SEG0R_PD 0x481C -+#define B_SEG0R_PD_SPATIAL_REUSE_EN_MSK BIT(29) -+#define B_SEG0R_PD_LOWER_BOUND_MSK GENMASK(10, 6) -+#define R_2P4G_BAND 0x4970 -+#define B_2P4G_BAND_SEL BIT(1) -+#define R_FC0_BW 0x4974 -+#define B_FC0_BW_INV GENMASK(6, 0) -+#define B_FC0_BW_SET GENMASK(31, 30) -+#define R_CHBW_MOD 0x4978 -+#define B_CHBW_MOD_PRICH GENMASK(11, 8) -+#define B_CHBW_MOD_SBW GENMASK(13, 12) -+#define R_CFO_COMP_SEG1_L 0x5384 -+#define R_CFO_COMP_SEG1_H 0x5388 -+#define R_CFO_COMP_SEG1_CTRL 0x538C -+#define B_CFO_COMP_VALID_BIT BIT(29) -+#define B_CFO_COMP_WEIGHT_MSK GENMASK(27, 24) -+#define B_CFO_COMP_VAL_MSK GENMASK(11, 0) -+#define R_DPD_OFT_EN 0x5800 -+#define B_DPD_OFT_EN BIT(28) -+#define R_DPD_OFT_ADDR 0x5804 -+#define B_DPD_OFT_ADDR GENMASK(31, 27) -+#define R_P0_TMETER 0x5810 -+#define B_P0_TMETER GENMASK(15, 10) -+#define B_P0_TMETER_DIS BIT(16) -+#define B_P0_TMETER_TRK BIT(24) -+#define R_P0_TSSI_TRK 0x5818 -+#define B_P0_TSSI_TRK_EN BIT(30) -+#define B_P0_TSSI_OFT_EN BIT(28) -+#define B_P0_TSSI_OFT GENMASK(7, 0) -+#define R_P0_TSSI_AVG 0x5820 -+#define B_P0_TSSI_AVG GENMASK(15, 12) -+#define R_P0_RFCTM 0x5864 -+#define B_P0_RFCTM_VAL GENMASK(25, 20) -+#define R_P0_RFCTM_RDY BIT(26) -+#define R_P0_TXDPD 0x58D4 -+#define B_P0_TXDPD GENMASK(31, 28) -+#define R_P0_TXPW_RSTB 0x58DC -+#define B_P0_TXPW_RSTB_MANON BIT(30) -+#define B_P0_TXPW_RSTB_TSSI BIT(31) -+#define R_P0_TSSI_MV_AVG 0x58E4 -+#define B_P0_TSSI_MV_AVG GENMASK(13, 11) -+#define R_TXGAIN_SCALE 0x58F0 -+#define B_TXGAIN_SCALE_EN BIT(19) -+#define B_TXGAIN_SCALE_OFT GENMASK(31, 24) -+#define R_P0_TSSI_BASE 0x5C00 -+#define R_S0_DACKI 0x5E00 -+#define B_S0_DACKI_AR GENMASK(31, 28) -+#define B_S0_DACKI_EN BIT(3) -+#define R_S0_DACKI2 0x5E30 -+#define B_S0_DACKI2_K GENMASK(21, 12) -+#define R_S0_DACKI7 0x5E44 -+#define B_S0_DACKI7_K GENMASK(15, 8) -+#define R_S0_DACKI8 0x5E48 -+#define B_S0_DACKI8_K GENMASK(15, 8) -+#define R_S0_DACKQ 0x5E50 -+#define B_S0_DACKQ_AR GENMASK(31, 28) -+#define B_S0_DACKQ_EN BIT(3) -+#define R_S0_DACKQ2 0x5E80 -+#define B_S0_DACKQ2_K GENMASK(21, 12) -+#define R_S0_DACKQ7 0x5E94 -+#define B_S0_DACKQ7_K GENMASK(15, 8) -+#define R_S0_DACKQ8 0x5E98 -+#define B_S0_DACKQ8_K GENMASK(15, 8) -+#define R_P1_TMETER 0x7810 -+#define B_P1_TMETER GENMASK(15, 10) -+#define B_P1_TMETER_DIS BIT(16) -+#define B_P1_TMETER_TRK BIT(24) -+#define R_P1_TSSI_TRK 0x7818 -+#define B_P1_TSSI_TRK_EN BIT(30) -+#define B_P1_TSSI_OFT_EN BIT(28) -+#define B_P1_TSSI_OFT GENMASK(7, 0) -+#define R_P1_TSSI_AVG 0x7820 -+#define B_P1_TSSI_AVG GENMASK(15, 12) -+#define R_P1_RFCTM 0x7864 -+#define R_P1_RFCTM_RDY BIT(26) -+#define B_P1_RFCTM_VAL GENMASK(25, 20) -+#define R_P1_TXPW_RSTB 0x78DC -+#define B_P1_TXPW_RSTB_MANON BIT(30) -+#define B_P1_TXPW_RSTB_TSSI BIT(31) -+#define R_P1_TSSI_MV_AVG 0x78E4 -+#define B_P1_TSSI_MV_AVG GENMASK(13, 11) -+#define R_TSSI_THOF 0x7C00 -+#define R_S1_DACKI 0x7E00 -+#define B_S1_DACKI_AR GENMASK(31, 28) -+#define B_S1_DACKI_EN BIT(3) -+#define R_S1_DACKI2 0x7E30 -+#define B_S1_DACKI2_K GENMASK(21, 12) -+#define R_S1_DACKI7 0x7E44 -+#define B_S1_DACKI_K GENMASK(15, 8) -+#define R_S1_DACKI8 0x7E48 -+#define B_S1_DACKI8_K GENMASK(15, 8) -+#define R_S1_DACKQ 0x7E50 -+#define B_S1_DACKQ_AR GENMASK(31, 28) -+#define B_S1_DACKQ_EN BIT(3) -+#define R_S1_DACKQ2 0x7E80 -+#define B_S1_DACKQ2_K GENMASK(21, 12) -+#define R_S1_DACKQ7 0x7E94 -+#define B_S1_DACKQ7_K GENMASK(15, 8) -+#define R_S1_DACKQ8 0x7E98 -+#define B_S1_DACKQ8_K GENMASK(15, 8) -+#define R_NCTL_CFG 0x8000 -+#define B_NCTL_CFG_SPAGE GENMASK(2, 1) -+#define R_NCTL_RPT 0x8008 -+#define B_NCTL_RPT_FLG BIT(26) -+#define R_NCTL_N1 0x8010 -+#define B_NCTL_N1_CIP GENMASK(7, 0) -+#define R_NCTL_N2 0x8014 -+#define R_IQK_COM 0x8018 -+#define R_IQK_DIF 0x801C -+#define B_IQK_DIF_TRX GENMASK(1, 0) -+#define R_IQK_DIF1 0x8020 -+#define B_IQK_DIF1_TXPI GENMASK(19, 0) -+#define R_IQK_DIF2 0x8024 -+#define B_IQK_DIF2_RXPI GENMASK(19, 0) -+#define R_IQK_DIF4 0x802C -+#define B_IQK_DIF4_TXT GENMASK(11, 0) -+#define B_IQK_DIF4_RXT GENMASK(27, 16) -+#define R_IQK_CFG 0x8034 -+#define B_IQK_CFG_SET GENMASK(5, 4) -+#define R_TPG_MOD 0x806C -+#define B_TPG_MOD_F GENMASK(2, 1) -+#define R_MDPK_SYNC 0x8070 -+#define B_MDPK_SYNC_SEL BIT(31) -+#define B_MDPK_SYNC_MAN GENMASK(31, 28) -+#define R_MDPK_RX_DCK 0x8074 -+#define R_NCTL_RW 0x8080 -+#define R_KIP_SYSCFG 0x8088 -+#define R_KIP_CLK 0x808C -+#define R_LDL_NORM 0x80A0 -+#define B_LDL_NORM_PN GENMASK(12, 8) -+#define B_LDL_NORM_OP GENMASK(1, 0) -+#define R_DPK_CTL 0x80B0 -+#define B_DPK_CTL_EN BIT(28) -+#define R_DPK_CFG 0x80B8 -+#define B_DPK_CFG_IDX GENMASK(14, 12) -+#define R_DPK_CFG2 0x80BC -+#define B_DPK_CFG2_ST BIT(14) -+#define R_DPK_CFG3 0x80C0 -+#define R_KPATH_CFG 0x80D0 -+#define R_KIP_RPT1 0x80D4 -+#define B_KIP_RPT1_SEL GENMASK(21, 16) -+#define R_SRAM_IQRX 0x80D8 -+#define R_GAPK 0x80E0 -+#define B_GAPK_ADR BIT(0) -+#define R_SRAM_IQRX2 0x80E8 -+#define R_DPK_TRK 0x80f0 -+#define B_DPK_TRK_DIS BIT(31) -+#define R_RPT_COM 0x80FC -+#define B_PRT_COM_SYNERR BIT(30) -+#define B_PRT_COM_DCI GENMASK(27, 16) -+#define B_PRT_COM_CORV GENMASK(15, 8) -+#define B_PRT_COM_DCQ GENMASK(11, 0) -+#define B_PRT_COM_GL GENMASK(7, 4) -+#define B_PRT_COM_CORI GENMASK(7, 0) -+#define R_COEF_SEL 0x8104 -+#define B_COEF_SEL_IQC BIT(0) -+#define B_COEF_SEL_MDPD BIT(8) -+#define R_CFIR_SYS 0x8120 -+#define R_IQK_RES 0x8124 -+#define B_IQK_RES_TXCFIR GENMASK(11, 8) -+#define B_IQK_RES_RXCFIR GENMASK(3, 0) -+#define R_TXIQC 0x8138 -+#define R_RXIQC 0x813c -+#define B_RXIQC_BYPASS BIT(0) -+#define B_RXIQC_BYPASS2 BIT(2) -+#define B_RXIQC_NEWP GENMASK(19, 8) -+#define B_RXIQC_NEWX GENMASK(31, 20) -+#define R_KIP 0x8140 -+#define B_KIP_DBCC BIT(0) -+#define B_KIP_RFGAIN BIT(8) -+#define R_RFGAIN 0x8144 -+#define B_RFGAIN_PAD GENMASK(4, 0) -+#define B_RFGAIN_TXBB GENMASK(12, 8) -+#define R_RFGAIN_BND 0x8148 -+#define B_RFGAIN_BND GENMASK(4, 0) -+#define R_CFIR_MAP 0x8150 -+#define R_CFIR_LUT 0x8154 -+#define B_CFIR_LUT_SEL BIT(8) -+#define B_CFIR_LUT_G3 BIT(3) -+#define B_CFIR_LUT_G2 BIT(2) -+#define B_CFIR_LUT_GP GENMASK(1, 0) -+#define R_DPD_V1 0x81a0 -+#define R_DPD_CH0 0x81AC -+#define R_DPD_BND 0x81B4 -+#define R_DPD_CH0A 0x81BC -+#define R_TXAGC_RFK 0x81C4 -+#define B_TXAGC_RFK_CH0 GENMASK(5, 0) -+#define R_DPD_COM 0x81C8 -+#define R_KIP_IQP 0x81CC -+#define B_KIP_IQP_IQSW GENMASK(5, 0) -+#define R_KIP_RPT 0x81D4 -+#define B_KIP_RPT_SEL GENMASK(21, 16) -+#define R_W_COEF 0x81D8 -+#define R_LOAD_COEF 0x81DC -+#define B_LOAD_COEF_MDPD BIT(16) -+#define B_LOAD_COEF_CFIR GENMASK(1, 0) -+#define B_LOAD_COEF_AUTO BIT(0) -+#define R_RPT_PER 0x81FC -+#define R_RXCFIR_P0C0 0x8D40 -+#define R_RXCFIR_P0C1 0x8D84 -+#define R_RXCFIR_P0C2 0x8DC8 -+#define R_RXCFIR_P0C3 0x8E0C -+#define R_TXCFIR_P0C0 0x8F50 -+#define R_TXCFIR_P0C1 0x8F84 -+#define R_TXCFIR_P0C2 0x8FB8 -+#define R_TXCFIR_P0C3 0x8FEC -+#define R_RXCFIR_P1C0 0x9140 -+#define R_RXCFIR_P1C1 0x9184 -+#define R_RXCFIR_P1C2 0x91C8 -+#define R_RXCFIR_P1C3 0x920C -+#define R_TXCFIR_P1C0 0x9350 -+#define R_TXCFIR_P1C1 0x9384 -+#define R_TXCFIR_P1C2 0x93B8 -+#define R_TXCFIR_P1C3 0x93EC -+#define R_IQKINF 0x9FE0 -+#define B_IQKINF_VER GENMASK(31, 24) -+#define B_IQKINF_FAIL_RXGRP GENMASK(23, 16) -+#define B_IQKINF_FAIL_TXGRP GENMASK(15, 8) -+#define B_IQKINF_FAIL GENMASK(3, 0) -+#define B_IQKINF_F_RX BIT(3) -+#define B_IQKINF_FTX BIT(2) -+#define B_IQKINF_FFIN BIT(1) -+#define B_IQKINF_FCOR BIT(0) -+#define R_IQKCH 0x9FE4 -+#define B_IQKCH_CH GENMASK(15, 8) -+#define B_IQKCH_BW GENMASK(7, 4) -+#define B_IQKCH_BAND GENMASK(3, 0) -+#define R_IQKINF2 0x9FE8 -+#define B_IQKINF2_FCNT GENMASK(23, 16) -+#define B_IQKINF2_KCNT GENMASK(15, 8) -+#define B_IQKINF2_NCTLV GENMAKS(7, 0) -+#endif -diff --git a/drivers/net/wireless/realtek/rtw89/regd.c b/drivers/net/wireless/realtek/rtw89/regd.c -new file mode 100644 -index 000000000000..f00b94ecfff4 ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/regd.c -@@ -0,0 +1,353 @@ -+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause -+/* Copyright(c) 2019-2020 Realtek Corporation -+ */ -+ -+#include "debug.h" -+#include "ps.h" -+ -+#define COUNTRY_REGD(_alpha2, _txpwr_regd_2g, _txpwr_regd_5g) \ -+ {.alpha2 = (_alpha2), \ -+ .txpwr_regd[RTW89_BAND_2G] = (_txpwr_regd_2g), \ -+ .txpwr_regd[RTW89_BAND_5G] = (_txpwr_regd_5g) \ -+ } -+ -+static const struct rtw89_regulatory rtw89_ww_regd = -+ COUNTRY_REGD("00", RTW89_WW, RTW89_WW); -+ -+static const struct rtw89_regulatory rtw89_regd_map[] = { -+ COUNTRY_REGD("AR", RTW89_FCC, RTW89_FCC), -+ COUNTRY_REGD("BO", RTW89_WW, RTW89_FCC), -+ COUNTRY_REGD("BR", RTW89_FCC, RTW89_FCC), -+ COUNTRY_REGD("CL", RTW89_WW, RTW89_CHILE), -+ COUNTRY_REGD("CO", RTW89_FCC, RTW89_FCC), -+ COUNTRY_REGD("CR", RTW89_FCC, RTW89_FCC), -+ COUNTRY_REGD("EC", RTW89_FCC, RTW89_FCC), -+ COUNTRY_REGD("SV", RTW89_WW, RTW89_FCC), -+ COUNTRY_REGD("GT", RTW89_FCC, RTW89_FCC), -+ COUNTRY_REGD("HN", RTW89_WW, RTW89_FCC), -+ COUNTRY_REGD("MX", RTW89_FCC, RTW89_MEXICO), -+ COUNTRY_REGD("NI", RTW89_FCC, RTW89_FCC), -+ COUNTRY_REGD("PA", RTW89_FCC, RTW89_FCC), -+ COUNTRY_REGD("PY", RTW89_FCC, RTW89_FCC), -+ COUNTRY_REGD("PE", RTW89_FCC, RTW89_FCC), -+ COUNTRY_REGD("US", RTW89_FCC, RTW89_FCC), -+ COUNTRY_REGD("UY", RTW89_WW, RTW89_FCC), -+ COUNTRY_REGD("VE", RTW89_WW, RTW89_FCC), -+ COUNTRY_REGD("PR", RTW89_FCC, RTW89_FCC), -+ COUNTRY_REGD("DO", RTW89_FCC, RTW89_FCC), -+ COUNTRY_REGD("AT", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("BE", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("CY", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("CZ", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("DK", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("EE", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("FI", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("FR", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("DE", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("GR", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("HU", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("IS", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("IE", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("IT", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("LV", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("LI", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("LT", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("LU", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("MT", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("MC", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("NL", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("NO", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("PL", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("PT", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("SK", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("SI", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("ES", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("SE", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("CH", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("GB", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("AL", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("AZ", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("BH", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("BA", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("BG", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("HR", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("EG", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("GH", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("IQ", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("IL", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("JO", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("KZ", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("KE", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("KW", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("KG", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("LB", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("LS", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("MK", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("MA", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("MZ", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("NA", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("NG", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("OM", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("QA", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("RO", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("RU", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("SA", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("SN", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("RS", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("ME", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("ZA", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("TR", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("UA", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("AE", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("YE", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("ZW", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("BD", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("KH", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("CN", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("HK", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("IN", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("ID", RTW89_ETSI, RTW89_ETSI), -+ COUNTRY_REGD("KR", RTW89_KCC, RTW89_KCC), -+ COUNTRY_REGD("MY", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("PK", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("PH", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("SG", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("LK", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("TW", RTW89_FCC, RTW89_FCC), -+ COUNTRY_REGD("TH", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("VN", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("AU", RTW89_WW, RTW89_ACMA), -+ COUNTRY_REGD("NZ", RTW89_WW, RTW89_ACMA), -+ COUNTRY_REGD("PG", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("CA", RTW89_IC, RTW89_IC), -+ COUNTRY_REGD("JP", RTW89_MKK, RTW89_MKK), -+ COUNTRY_REGD("JM", RTW89_WW, RTW89_FCC), -+ COUNTRY_REGD("AN", RTW89_FCC, RTW89_FCC), -+ COUNTRY_REGD("TT", RTW89_FCC, RTW89_FCC), -+ COUNTRY_REGD("TN", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("AF", RTW89_ETSI, RTW89_ETSI), -+ COUNTRY_REGD("DZ", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("AS", RTW89_FCC, RTW89_FCC), -+ COUNTRY_REGD("AD", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("AO", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("AI", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("AQ", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("AG", RTW89_FCC, RTW89_FCC), -+ COUNTRY_REGD("AM", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("AW", RTW89_FCC, RTW89_FCC), -+ COUNTRY_REGD("BS", RTW89_FCC, RTW89_FCC), -+ COUNTRY_REGD("BB", RTW89_FCC, RTW89_FCC), -+ COUNTRY_REGD("BY", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("BZ", RTW89_FCC, RTW89_FCC), -+ COUNTRY_REGD("BJ", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("BM", RTW89_FCC, RTW89_FCC), -+ COUNTRY_REGD("BT", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("BW", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("BV", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("IO", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("VG", RTW89_FCC, RTW89_FCC), -+ COUNTRY_REGD("BN", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("BF", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("MM", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("BI", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("CM", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("CV", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("KY", RTW89_FCC, RTW89_FCC), -+ COUNTRY_REGD("CF", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("TD", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("CX", RTW89_WW, RTW89_ACMA), -+ COUNTRY_REGD("CC", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("KM", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("CG", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("CD", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("CK", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("CI", RTW89_ETSI, RTW89_ETSI), -+ COUNTRY_REGD("DJ", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("DM", RTW89_FCC, RTW89_FCC), -+ COUNTRY_REGD("GQ", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("ER", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("ET", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("FK", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("FO", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("FJ", RTW89_FCC, RTW89_FCC), -+ COUNTRY_REGD("GF", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("PF", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("TF", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("GA", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("GM", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("GE", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("GI", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("GL", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("GD", RTW89_FCC, RTW89_FCC), -+ COUNTRY_REGD("GP", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("GU", RTW89_FCC, RTW89_FCC), -+ COUNTRY_REGD("GG", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("GN", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("GW", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("GY", RTW89_FCC, RTW89_NCC), -+ COUNTRY_REGD("HT", RTW89_FCC, RTW89_FCC), -+ COUNTRY_REGD("HM", RTW89_WW, RTW89_ACMA), -+ COUNTRY_REGD("VA", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("IM", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("JE", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("KI", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("LA", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("LR", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("LY", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("MO", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("MG", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("MW", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("MV", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("ML", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("MH", RTW89_FCC, RTW89_FCC), -+ COUNTRY_REGD("MQ", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("MR", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("MU", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("YT", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("FM", RTW89_FCC, RTW89_FCC), -+ COUNTRY_REGD("MD", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("MN", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("MS", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("NR", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("NP", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("NC", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("NE", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("NU", RTW89_WW, RTW89_ACMA), -+ COUNTRY_REGD("NF", RTW89_WW, RTW89_ACMA), -+ COUNTRY_REGD("MP", RTW89_FCC, RTW89_FCC), -+ COUNTRY_REGD("PW", RTW89_FCC, RTW89_FCC), -+ COUNTRY_REGD("RE", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("RW", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("SH", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("KN", RTW89_FCC, RTW89_FCC), -+ COUNTRY_REGD("LC", RTW89_FCC, RTW89_FCC), -+ COUNTRY_REGD("MF", RTW89_FCC, RTW89_FCC), -+ COUNTRY_REGD("SX", RTW89_FCC, RTW89_FCC), -+ COUNTRY_REGD("PM", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("VC", RTW89_FCC, RTW89_FCC), -+ COUNTRY_REGD("WS", RTW89_FCC, RTW89_FCC), -+ COUNTRY_REGD("SM", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("ST", RTW89_FCC, RTW89_FCC), -+ COUNTRY_REGD("SC", RTW89_FCC, RTW89_FCC), -+ COUNTRY_REGD("SL", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("SB", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("SO", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("GS", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("SR", RTW89_FCC, RTW89_FCC), -+ COUNTRY_REGD("SJ", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("SZ", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("TJ", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("TZ", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("TG", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("TK", RTW89_WW, RTW89_ACMA), -+ COUNTRY_REGD("TO", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("TM", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("TC", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("TV", RTW89_ETSI, RTW89_NA), -+ COUNTRY_REGD("UG", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("VI", RTW89_FCC, RTW89_FCC), -+ COUNTRY_REGD("UZ", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("VU", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("WF", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("EH", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("ZM", RTW89_WW, RTW89_ETSI), -+ COUNTRY_REGD("IR", RTW89_WW, RTW89_ETSI), -+}; -+ -+static const struct rtw89_regulatory *rtw89_regd_find_reg_by_name(char *alpha2) -+{ -+ u32 i; -+ -+ for (i = 0; i < ARRAY_SIZE(rtw89_regd_map); i++) { -+ if (!memcmp(rtw89_regd_map[i].alpha2, alpha2, 2)) -+ return &rtw89_regd_map[i]; -+ } -+ -+ return &rtw89_ww_regd; -+} -+ -+static bool rtw89_regd_is_ww(const struct rtw89_regulatory *regd) -+{ -+ return regd == &rtw89_ww_regd; -+} -+ -+int rtw89_regd_init(struct rtw89_dev *rtwdev, -+ void (*reg_notifier)(struct wiphy *wiphy, -+ struct regulatory_request *request)) -+{ -+ const struct rtw89_regulatory *chip_regd; -+ struct wiphy *wiphy = rtwdev->hw->wiphy; -+ int ret; -+ -+ if (!wiphy) -+ return -EINVAL; -+ -+ chip_regd = rtw89_regd_find_reg_by_name(rtwdev->efuse.country_code); -+ if (!rtw89_regd_is_ww(chip_regd)) { -+ rtwdev->regd = chip_regd; -+ /* Ignore country ie if there is a country domain programmed in chip */ -+ wiphy->regulatory_flags |= REGULATORY_COUNTRY_IE_IGNORE; -+ wiphy->regulatory_flags |= REGULATORY_STRICT_REG; -+ -+ ret = regulatory_hint(rtwdev->hw->wiphy, rtwdev->regd->alpha2); -+ if (ret) -+ rtw89_warn(rtwdev, "failed to hint regulatory:%d\n", ret); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_REGD, -+ "efuse country code %c%c, mapping to 2g txregd %d, 5g txregd %d\n", -+ rtwdev->efuse.country_code[0], rtwdev->efuse.country_code[1], -+ rtwdev->regd->txpwr_regd[RTW89_BAND_2G], -+ rtwdev->regd->txpwr_regd[RTW89_BAND_5G]); -+ -+ return 0; -+ } -+ rtw89_debug(rtwdev, RTW89_DBG_REGD, -+ "worldwide roaming chip, follow the setting of stack(%c%c), mapping to 2g txregd %d, 5g txregd %d\n", -+ rtwdev->regd->alpha2[0], rtwdev->regd->alpha2[1], -+ rtwdev->regd->txpwr_regd[RTW89_BAND_2G], -+ rtwdev->regd->txpwr_regd[RTW89_BAND_5G]); -+ -+ return 0; -+} -+ -+static void rtw89_regd_notifier_apply(struct rtw89_dev *rtwdev, -+ struct wiphy *wiphy, -+ struct regulatory_request *request) -+{ -+ rtwdev->regd = rtw89_regd_find_reg_by_name(request->alpha2); -+ /* This notification might be set from the system of distros, -+ * and it does not expect the regulatory will be modified by -+ * connecting to an AP (i.e. country ie). -+ */ -+ if (request->initiator == NL80211_REGDOM_SET_BY_USER && -+ !rtw89_regd_is_ww(rtwdev->regd)) -+ wiphy->regulatory_flags |= REGULATORY_COUNTRY_IE_IGNORE; -+ else -+ wiphy->regulatory_flags &= ~REGULATORY_COUNTRY_IE_IGNORE; -+} -+ -+void rtw89_regd_notifier(struct wiphy *wiphy, struct regulatory_request *request) -+{ -+ struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); -+ struct rtw89_dev *rtwdev = hw->priv; -+ -+ mutex_lock(&rtwdev->mutex); -+ rtw89_leave_ps_mode(rtwdev); -+ -+ if (wiphy->regd) { -+ rtw89_debug(rtwdev, RTW89_DBG_REGD, -+ "There is a country domain programmed in chip, ignore notifications\n"); -+ goto exit; -+ } -+ rtw89_regd_notifier_apply(rtwdev, wiphy, request); -+ rtw89_debug(rtwdev, RTW89_DBG_REGD, -+ "get alpha2 %c%c from initiator %d, mapping to 2g txregd %d, 5g txregd %d\n", -+ request->alpha2[0], request->alpha2[1], request->initiator, -+ rtwdev->regd->txpwr_regd[RTW89_BAND_2G], -+ rtwdev->regd->txpwr_regd[RTW89_BAND_5G]); -+ -+ rtw89_chip_set_txpwr(rtwdev); -+ -+exit: -+ mutex_unlock(&rtwdev->mutex); -+} -diff --git a/drivers/net/wireless/realtek/rtw89/rtw8852a.c b/drivers/net/wireless/realtek/rtw89/rtw8852a.c -new file mode 100644 -index 000000000000..b1b87f0aadbb ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852a.c -@@ -0,0 +1,2036 @@ -+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause -+/* Copyright(c) 2019-2020 Realtek Corporation -+ */ -+ -+#include "coex.h" -+#include "mac.h" -+#include "phy.h" -+#include "reg.h" -+#include "rtw8852a.h" -+#include "rtw8852a_rfk.h" -+#include "rtw8852a_table.h" -+#include "txrx.h" -+ -+static const struct rtw89_hfc_ch_cfg rtw8852a_hfc_chcfg_pcie[] = { -+ {128, 1896, grp_0}, /* ACH 0 */ -+ {128, 1896, grp_0}, /* ACH 1 */ -+ {128, 1896, grp_0}, /* ACH 2 */ -+ {128, 1896, grp_0}, /* ACH 3 */ -+ {128, 1896, grp_1}, /* ACH 4 */ -+ {128, 1896, grp_1}, /* ACH 5 */ -+ {128, 1896, grp_1}, /* ACH 6 */ -+ {128, 1896, grp_1}, /* ACH 7 */ -+ {32, 1896, grp_0}, /* B0MGQ */ -+ {128, 1896, grp_0}, /* B0HIQ */ -+ {32, 1896, grp_1}, /* B1MGQ */ -+ {128, 1896, grp_1}, /* B1HIQ */ -+ {40, 0, 0} /* FWCMDQ */ -+}; -+ -+static const struct rtw89_hfc_pub_cfg rtw8852a_hfc_pubcfg_pcie = { -+ 1896, /* Group 0 */ -+ 1896, /* Group 1 */ -+ 3792, /* Public Max */ -+ 0 /* WP threshold */ -+}; -+ -+static const struct rtw89_hfc_param_ini rtw8852a_hfc_param_ini_pcie[] = { -+ [RTW89_QTA_SCC] = {rtw8852a_hfc_chcfg_pcie, &rtw8852a_hfc_pubcfg_pcie, -+ &rtw_hfc_preccfg_pcie, RTW89_HCIFC_POH}, -+ [RTW89_QTA_DLFW] = {NULL, NULL, &rtw_hfc_preccfg_pcie, RTW89_HCIFC_POH}, -+ [RTW89_QTA_INVALID] = {NULL}, -+}; -+ -+static const struct rtw89_dle_mem rtw8852a_dle_mem_pcie[] = { -+ [RTW89_QTA_SCC] = {RTW89_QTA_SCC, &wde_size0, &ple_size0, &wde_qt0, -+ &wde_qt0, &ple_qt4, &ple_qt5}, -+ [RTW89_QTA_DLFW] = {RTW89_QTA_DLFW, &wde_size4, &ple_size4, -+ &wde_qt4, &wde_qt4, &ple_qt13, &ple_qt13}, -+ [RTW89_QTA_INVALID] = {RTW89_QTA_INVALID, NULL, NULL, NULL, NULL, NULL, -+ NULL}, -+}; -+ -+static const struct rtw89_reg2_def rtw8852a_pmac_ht20_mcs7_tbl[] = { -+ {0x44AC, 0x00000000}, -+ {0x44B0, 0x00000000}, -+ {0x44B4, 0x00000000}, -+ {0x44B8, 0x00000000}, -+ {0x44BC, 0x00000000}, -+ {0x44C0, 0x00000000}, -+ {0x44C4, 0x00000000}, -+ {0x44C8, 0x00000000}, -+ {0x44CC, 0x00000000}, -+ {0x44D0, 0x00000000}, -+ {0x44D4, 0x00000000}, -+ {0x44D8, 0x00000000}, -+ {0x44DC, 0x00000000}, -+ {0x44E0, 0x00000000}, -+ {0x44E4, 0x00000000}, -+ {0x44E8, 0x00000000}, -+ {0x44EC, 0x00000000}, -+ {0x44F0, 0x00000000}, -+ {0x44F4, 0x00000000}, -+ {0x44F8, 0x00000000}, -+ {0x44FC, 0x00000000}, -+ {0x4500, 0x00000000}, -+ {0x4504, 0x00000000}, -+ {0x4508, 0x00000000}, -+ {0x450C, 0x00000000}, -+ {0x4510, 0x00000000}, -+ {0x4514, 0x00000000}, -+ {0x4518, 0x00000000}, -+ {0x451C, 0x00000000}, -+ {0x4520, 0x00000000}, -+ {0x4524, 0x00000000}, -+ {0x4528, 0x00000000}, -+ {0x452C, 0x00000000}, -+ {0x4530, 0x4E1F3E81}, -+ {0x4534, 0x00000000}, -+ {0x4538, 0x0000005A}, -+ {0x453C, 0x00000000}, -+ {0x4540, 0x00000000}, -+ {0x4544, 0x00000000}, -+ {0x4548, 0x00000000}, -+ {0x454C, 0x00000000}, -+ {0x4550, 0x00000000}, -+ {0x4554, 0x00000000}, -+ {0x4558, 0x00000000}, -+ {0x455C, 0x00000000}, -+ {0x4560, 0x4060001A}, -+ {0x4564, 0x40000000}, -+ {0x4568, 0x00000000}, -+ {0x456C, 0x00000000}, -+ {0x4570, 0x04000007}, -+ {0x4574, 0x0000DC87}, -+ {0x4578, 0x00000BAB}, -+ {0x457C, 0x03E00000}, -+ {0x4580, 0x00000048}, -+ {0x4584, 0x00000000}, -+ {0x4588, 0x000003E8}, -+ {0x458C, 0x30000000}, -+ {0x4590, 0x00000000}, -+ {0x4594, 0x10000000}, -+ {0x4598, 0x00000001}, -+ {0x459C, 0x00030000}, -+ {0x45A0, 0x01000000}, -+ {0x45A4, 0x03000200}, -+ {0x45A8, 0xC00001C0}, -+ {0x45AC, 0x78018000}, -+ {0x45B0, 0x80000000}, -+ {0x45B4, 0x01C80600}, -+ {0x45B8, 0x00000002}, -+ {0x4594, 0x10000000} -+}; -+ -+static const struct rtw89_reg3_def rtw8852a_btc_preagc_en_defs[] = { -+ {0x4624, GENMASK(20, 14), 0x40}, -+ {0x46f8, GENMASK(20, 14), 0x40}, -+ {0x4674, GENMASK(20, 19), 0x2}, -+ {0x4748, GENMASK(20, 19), 0x2}, -+ {0x4650, GENMASK(14, 10), 0x18}, -+ {0x4724, GENMASK(14, 10), 0x18}, -+ {0x4688, GENMASK(1, 0), 0x3}, -+ {0x475c, GENMASK(1, 0), 0x3}, -+}; -+ -+static DECLARE_PHY_REG3_TBL(rtw8852a_btc_preagc_en_defs); -+ -+static const struct rtw89_reg3_def rtw8852a_btc_preagc_dis_defs[] = { -+ {0x4624, GENMASK(20, 14), 0x1a}, -+ {0x46f8, GENMASK(20, 14), 0x1a}, -+ {0x4674, GENMASK(20, 19), 0x1}, -+ {0x4748, GENMASK(20, 19), 0x1}, -+ {0x4650, GENMASK(14, 10), 0x12}, -+ {0x4724, GENMASK(14, 10), 0x12}, -+ {0x4688, GENMASK(1, 0), 0x0}, -+ {0x475c, GENMASK(1, 0), 0x0}, -+}; -+ -+static DECLARE_PHY_REG3_TBL(rtw8852a_btc_preagc_dis_defs); -+ -+static const struct rtw89_pwr_cfg rtw8852a_pwron[] = { -+ {0x00C6, -+ PWR_CV_MSK_B, -+ PWR_INTF_MSK_PCIE, -+ PWR_BASE_MAC, -+ PWR_CMD_WRITE, BIT(6), BIT(6)}, -+ {0x1086, -+ PWR_CV_MSK_ALL, -+ PWR_INTF_MSK_SDIO, -+ PWR_BASE_MAC, -+ PWR_CMD_WRITE, BIT(0), 0}, -+ {0x1086, -+ PWR_CV_MSK_ALL, -+ PWR_INTF_MSK_SDIO, -+ PWR_BASE_MAC, -+ PWR_CMD_POLL, BIT(1), BIT(1)}, -+ {0x0005, -+ PWR_CV_MSK_ALL, -+ PWR_INTF_MSK_ALL, -+ PWR_BASE_MAC, -+ PWR_CMD_WRITE, BIT(4) | BIT(3), 0}, -+ {0x0005, -+ PWR_CV_MSK_ALL, -+ PWR_INTF_MSK_ALL, -+ PWR_BASE_MAC, -+ PWR_CMD_WRITE, BIT(7), 0}, -+ {0x0005, -+ PWR_CV_MSK_ALL, -+ PWR_INTF_MSK_ALL, -+ PWR_BASE_MAC, -+ PWR_CMD_WRITE, BIT(2), 0}, -+ {0x0006, -+ PWR_CV_MSK_ALL, -+ PWR_INTF_MSK_ALL, -+ PWR_BASE_MAC, -+ PWR_CMD_POLL, BIT(1), BIT(1)}, -+ {0x0006, -+ PWR_CV_MSK_ALL, -+ PWR_INTF_MSK_ALL, -+ PWR_BASE_MAC, -+ PWR_CMD_WRITE, BIT(0), BIT(0)}, -+ {0x0005, -+ PWR_CV_MSK_ALL, -+ PWR_INTF_MSK_ALL, -+ PWR_BASE_MAC, -+ PWR_CMD_WRITE, BIT(0), BIT(0)}, -+ {0x0005, -+ PWR_CV_MSK_ALL, -+ PWR_INTF_MSK_ALL, -+ PWR_BASE_MAC, -+ PWR_CMD_POLL, BIT(0), 0}, -+ {0x106D, -+ PWR_CV_MSK_B | PWR_CV_MSK_C, -+ PWR_INTF_MSK_USB, -+ PWR_BASE_MAC, -+ PWR_CMD_WRITE, BIT(6), 0}, -+ {0x0088, -+ PWR_CV_MSK_ALL, -+ PWR_INTF_MSK_ALL, -+ PWR_BASE_MAC, -+ PWR_CMD_WRITE, BIT(0), BIT(0)}, -+ {0x0088, -+ PWR_CV_MSK_ALL, -+ PWR_INTF_MSK_ALL, -+ PWR_BASE_MAC, -+ PWR_CMD_WRITE, BIT(0), 0}, -+ {0x0088, -+ PWR_CV_MSK_ALL, -+ PWR_INTF_MSK_ALL, -+ PWR_BASE_MAC, -+ PWR_CMD_WRITE, BIT(0), BIT(0)}, -+ {0x0088, -+ PWR_CV_MSK_ALL, -+ PWR_INTF_MSK_ALL, -+ PWR_BASE_MAC, -+ PWR_CMD_WRITE, BIT(0), 0}, -+ {0x0088, -+ PWR_CV_MSK_ALL, -+ PWR_INTF_MSK_ALL, -+ PWR_BASE_MAC, -+ PWR_CMD_WRITE, BIT(0), BIT(0)}, -+ {0x0083, -+ PWR_CV_MSK_ALL, -+ PWR_INTF_MSK_ALL, -+ PWR_BASE_MAC, -+ PWR_CMD_WRITE, BIT(6), 0}, -+ {0x0080, -+ PWR_CV_MSK_ALL, -+ PWR_INTF_MSK_ALL, -+ PWR_BASE_MAC, -+ PWR_CMD_WRITE, BIT(5), BIT(5)}, -+ {0x0024, -+ PWR_CV_MSK_ALL, -+ PWR_INTF_MSK_ALL, -+ PWR_BASE_MAC, -+ PWR_CMD_WRITE, BIT(4) | BIT(3) | BIT(2) | BIT(1) | BIT(0), 0}, -+ {0x02A0, -+ PWR_CV_MSK_ALL, -+ PWR_INTF_MSK_ALL, -+ PWR_BASE_MAC, -+ PWR_CMD_WRITE, BIT(1), BIT(1)}, -+ {0x02A2, -+ PWR_CV_MSK_ALL, -+ PWR_INTF_MSK_ALL, -+ PWR_BASE_MAC, -+ PWR_CMD_WRITE, BIT(7) | BIT(6) | BIT(5), 0}, -+ {0x0071, -+ PWR_CV_MSK_ALL, -+ PWR_INTF_MSK_PCIE, -+ PWR_BASE_MAC, -+ PWR_CMD_WRITE, BIT(4), 0}, -+ {0x0010, -+ PWR_CV_MSK_A, -+ PWR_INTF_MSK_PCIE, -+ PWR_BASE_MAC, -+ PWR_CMD_WRITE, BIT(2), BIT(2)}, -+ {0x02A0, -+ PWR_CV_MSK_A, -+ PWR_INTF_MSK_ALL, -+ PWR_BASE_MAC, -+ PWR_CMD_WRITE, BIT(7) | BIT(6), 0}, -+ {0xFFFF, -+ PWR_CV_MSK_ALL, -+ PWR_INTF_MSK_ALL, -+ 0, -+ PWR_CMD_END, 0, 0}, -+}; -+ -+static const struct rtw89_pwr_cfg rtw8852a_pwroff[] = { -+ {0x02F0, -+ PWR_CV_MSK_ALL, -+ PWR_INTF_MSK_ALL, -+ PWR_BASE_MAC, -+ PWR_CMD_WRITE, 0xFF, 0}, -+ {0x02F1, -+ PWR_CV_MSK_ALL, -+ PWR_INTF_MSK_ALL, -+ PWR_BASE_MAC, -+ PWR_CMD_WRITE, 0xFF, 0}, -+ {0x0006, -+ PWR_CV_MSK_ALL, -+ PWR_INTF_MSK_ALL, -+ PWR_BASE_MAC, -+ PWR_CMD_WRITE, BIT(0), BIT(0)}, -+ {0x0002, -+ PWR_CV_MSK_ALL, -+ PWR_INTF_MSK_ALL, -+ PWR_BASE_MAC, -+ PWR_CMD_WRITE, BIT(1) | BIT(0), 0}, -+ {0x0082, -+ PWR_CV_MSK_ALL, -+ PWR_INTF_MSK_ALL, -+ PWR_BASE_MAC, -+ PWR_CMD_WRITE, BIT(1) | BIT(0), 0}, -+ {0x106D, -+ PWR_CV_MSK_B | PWR_CV_MSK_C, -+ PWR_INTF_MSK_USB, -+ PWR_BASE_MAC, -+ PWR_CMD_WRITE, BIT(6), BIT(6)}, -+ {0x0005, -+ PWR_CV_MSK_ALL, -+ PWR_INTF_MSK_ALL, -+ PWR_BASE_MAC, -+ PWR_CMD_WRITE, BIT(1), BIT(1)}, -+ {0x0005, -+ PWR_CV_MSK_ALL, -+ PWR_INTF_MSK_ALL, -+ PWR_BASE_MAC, -+ PWR_CMD_POLL, BIT(1), 0}, -+ {0x0091, -+ PWR_CV_MSK_ALL, -+ PWR_INTF_MSK_PCIE, -+ PWR_BASE_MAC, -+ PWR_CMD_WRITE, BIT(0), 0}, -+ {0x0005, -+ PWR_CV_MSK_ALL, -+ PWR_INTF_MSK_PCIE, -+ PWR_BASE_MAC, -+ PWR_CMD_WRITE, BIT(2), BIT(2)}, -+ {0x0007, -+ PWR_CV_MSK_ALL, -+ PWR_INTF_MSK_USB, -+ PWR_BASE_MAC, -+ PWR_CMD_WRITE, BIT(4), 0}, -+ {0x0007, -+ PWR_CV_MSK_ALL, -+ PWR_INTF_MSK_SDIO, -+ PWR_BASE_MAC, -+ PWR_CMD_WRITE, BIT(6) | BIT(4), 0}, -+ {0x0005, -+ PWR_CV_MSK_ALL, -+ PWR_INTF_MSK_SDIO, -+ PWR_BASE_MAC, -+ PWR_CMD_WRITE, BIT(4) | BIT(3), BIT(3)}, -+ {0x0005, -+ PWR_CV_MSK_C | PWR_CV_MSK_D | PWR_CV_MSK_E | PWR_CV_MSK_F | -+ PWR_CV_MSK_G, -+ PWR_INTF_MSK_USB, -+ PWR_BASE_MAC, -+ PWR_CMD_WRITE, BIT(4) | BIT(3), BIT(3)}, -+ {0x1086, -+ PWR_CV_MSK_ALL, -+ PWR_INTF_MSK_SDIO, -+ PWR_BASE_MAC, -+ PWR_CMD_WRITE, BIT(0), BIT(0)}, -+ {0x1086, -+ PWR_CV_MSK_ALL, -+ PWR_INTF_MSK_SDIO, -+ PWR_BASE_MAC, -+ PWR_CMD_POLL, BIT(1), 0}, -+ {0xFFFF, -+ PWR_CV_MSK_ALL, -+ PWR_INTF_MSK_ALL, -+ 0, -+ PWR_CMD_END, 0, 0}, -+}; -+ -+static const struct rtw89_pwr_cfg * const pwr_on_seq_8852a[] = { -+ rtw8852a_pwron, NULL -+}; -+ -+static const struct rtw89_pwr_cfg * const pwr_off_seq_8852a[] = { -+ rtw8852a_pwroff, NULL -+}; -+ -+static void rtw8852ae_efuse_parsing(struct rtw89_efuse *efuse, -+ struct rtw8852a_efuse *map) -+{ -+ ether_addr_copy(efuse->addr, map->e.mac_addr); -+ efuse->rfe_type = map->rfe_type; -+ efuse->xtal_cap = map->xtal_k; -+} -+ -+static void rtw8852a_efuse_parsing_tssi(struct rtw89_dev *rtwdev, -+ struct rtw8852a_efuse *map) -+{ -+ struct rtw89_tssi_info *tssi = &rtwdev->tssi; -+ struct rtw8852a_tssi_offset *ofst[] = {&map->path_a_tssi, &map->path_b_tssi}; -+ u8 i, j; -+ -+ tssi->thermal[RF_PATH_A] = map->path_a_therm; -+ tssi->thermal[RF_PATH_B] = map->path_b_therm; -+ -+ for (i = 0; i < RF_PATH_NUM_8852A; i++) { -+ memcpy(tssi->tssi_cck[i], ofst[i]->cck_tssi, -+ sizeof(ofst[i]->cck_tssi)); -+ -+ for (j = 0; j < TSSI_CCK_CH_GROUP_NUM; j++) -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI][EFUSE] path=%d cck[%d]=0x%x\n", -+ i, j, tssi->tssi_cck[i][j]); -+ -+ memcpy(tssi->tssi_mcs[i], ofst[i]->bw40_tssi, -+ sizeof(ofst[i]->bw40_tssi)); -+ memcpy(tssi->tssi_mcs[i] + TSSI_MCS_2G_CH_GROUP_NUM, -+ ofst[i]->bw40_1s_tssi_5g, sizeof(ofst[i]->bw40_1s_tssi_5g)); -+ -+ for (j = 0; j < TSSI_MCS_CH_GROUP_NUM; j++) -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI][EFUSE] path=%d mcs[%d]=0x%x\n", -+ i, j, tssi->tssi_mcs[i][j]); -+ } -+} -+ -+static int rtw8852a_read_efuse(struct rtw89_dev *rtwdev, u8 *log_map) -+{ -+ struct rtw89_efuse *efuse = &rtwdev->efuse; -+ struct rtw8852a_efuse *map; -+ -+ map = (struct rtw8852a_efuse *)log_map; -+ -+ efuse->country_code[0] = map->country_code[0]; -+ efuse->country_code[1] = map->country_code[1]; -+ rtw8852a_efuse_parsing_tssi(rtwdev, map); -+ -+ switch (rtwdev->hci.type) { -+ case RTW89_HCI_TYPE_PCIE: -+ rtw8852ae_efuse_parsing(efuse, map); -+ break; -+ default: -+ return -ENOTSUPP; -+ } -+ -+ rtw89_info(rtwdev, "chip rfe_type is %d\n", efuse->rfe_type); -+ -+ return 0; -+} -+ -+static void rtw8852a_phycap_parsing_tssi(struct rtw89_dev *rtwdev, u8 *phycap_map) -+{ -+ struct rtw89_tssi_info *tssi = &rtwdev->tssi; -+ static const u32 tssi_trim_addr[RF_PATH_NUM_8852A] = {0x5D6, 0x5AB}; -+ u32 addr = rtwdev->chip->phycap_addr; -+ bool pg = false; -+ u32 ofst; -+ u8 i, j; -+ -+ for (i = 0; i < RF_PATH_NUM_8852A; i++) { -+ for (j = 0; j < TSSI_TRIM_CH_GROUP_NUM; j++) { -+ /* addrs are in decreasing order */ -+ ofst = tssi_trim_addr[i] - addr - j; -+ tssi->tssi_trim[i][j] = phycap_map[ofst]; -+ -+ if (phycap_map[ofst] != 0xff) -+ pg = true; -+ } -+ } -+ -+ if (!pg) { -+ memset(tssi->tssi_trim, 0, sizeof(tssi->tssi_trim)); -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI][TRIM] no PG, set all trim info to 0\n"); -+ } -+ -+ for (i = 0; i < RF_PATH_NUM_8852A; i++) -+ for (j = 0; j < TSSI_TRIM_CH_GROUP_NUM; j++) -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI] path=%d idx=%d trim=0x%x addr=0x%x\n", -+ i, j, tssi->tssi_trim[i][j], -+ tssi_trim_addr[i] - j); -+} -+ -+static void rtw8852a_phycap_parsing_thermal_trim(struct rtw89_dev *rtwdev, -+ u8 *phycap_map) -+{ -+ struct rtw89_power_trim_info *info = &rtwdev->pwr_trim; -+ static const u32 thm_trim_addr[RF_PATH_NUM_8852A] = {0x5DF, 0x5DC}; -+ u32 addr = rtwdev->chip->phycap_addr; -+ u8 i; -+ -+ for (i = 0; i < RF_PATH_NUM_8852A; i++) { -+ info->thermal_trim[i] = phycap_map[thm_trim_addr[i] - addr]; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[THERMAL][TRIM] path=%d thermal_trim=0x%x\n", -+ i, info->thermal_trim[i]); -+ -+ if (info->thermal_trim[i] != 0xff) -+ info->pg_thermal_trim = true; -+ } -+} -+ -+static void rtw8852a_thermal_trim(struct rtw89_dev *rtwdev) -+{ -+#define __thm_setting(raw) \ -+({ \ -+ u8 __v = (raw); \ -+ ((__v & 0x1) << 3) | ((__v & 0x1f) >> 1); \ -+}) -+ struct rtw89_power_trim_info *info = &rtwdev->pwr_trim; -+ u8 i, val; -+ -+ if (!info->pg_thermal_trim) { -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[THERMAL][TRIM] no PG, do nothing\n"); -+ -+ return; -+ } -+ -+ for (i = 0; i < RF_PATH_NUM_8852A; i++) { -+ val = __thm_setting(info->thermal_trim[i]); -+ rtw89_write_rf(rtwdev, i, RR_TM2, RR_TM2_OFF, val); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[THERMAL][TRIM] path=%d thermal_setting=0x%x\n", -+ i, val); -+ } -+#undef __thm_setting -+} -+ -+static void rtw8852a_phycap_parsing_pa_bias_trim(struct rtw89_dev *rtwdev, -+ u8 *phycap_map) -+{ -+ struct rtw89_power_trim_info *info = &rtwdev->pwr_trim; -+ static const u32 pabias_trim_addr[RF_PATH_NUM_8852A] = {0x5DE, 0x5DB}; -+ u32 addr = rtwdev->chip->phycap_addr; -+ u8 i; -+ -+ for (i = 0; i < RF_PATH_NUM_8852A; i++) { -+ info->pa_bias_trim[i] = phycap_map[pabias_trim_addr[i] - addr]; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[PA_BIAS][TRIM] path=%d pa_bias_trim=0x%x\n", -+ i, info->pa_bias_trim[i]); -+ -+ if (info->pa_bias_trim[i] != 0xff) -+ info->pg_pa_bias_trim = true; -+ } -+} -+ -+static void rtw8852a_pa_bias_trim(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_power_trim_info *info = &rtwdev->pwr_trim; -+ u8 pabias_2g, pabias_5g; -+ u8 i; -+ -+ if (!info->pg_pa_bias_trim) { -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[PA_BIAS][TRIM] no PG, do nothing\n"); -+ -+ return; -+ } -+ -+ for (i = 0; i < RF_PATH_NUM_8852A; i++) { -+ pabias_2g = FIELD_GET(GENMASK(3, 0), info->pa_bias_trim[i]); -+ pabias_5g = FIELD_GET(GENMASK(7, 4), info->pa_bias_trim[i]); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[PA_BIAS][TRIM] path=%d 2G=0x%x 5G=0x%x\n", -+ i, pabias_2g, pabias_5g); -+ -+ rtw89_write_rf(rtwdev, i, RR_BIASA, RR_BIASA_TXG, pabias_2g); -+ rtw89_write_rf(rtwdev, i, RR_BIASA, RR_BIASA_TXA, pabias_5g); -+ } -+} -+ -+static int rtw8852a_read_phycap(struct rtw89_dev *rtwdev, u8 *phycap_map) -+{ -+ rtw8852a_phycap_parsing_tssi(rtwdev, phycap_map); -+ rtw8852a_phycap_parsing_thermal_trim(rtwdev, phycap_map); -+ rtw8852a_phycap_parsing_pa_bias_trim(rtwdev, phycap_map); -+ -+ return 0; -+} -+ -+static void rtw8852a_power_trim(struct rtw89_dev *rtwdev) -+{ -+ rtw8852a_thermal_trim(rtwdev); -+ rtw8852a_pa_bias_trim(rtwdev); -+} -+ -+static void rtw8852a_set_channel_mac(struct rtw89_dev *rtwdev, -+ struct rtw89_channel_params *param, -+ u8 mac_idx) -+{ -+ u32 rf_mod = rtw89_mac_reg_by_idx(R_AX_WMAC_RFMOD, mac_idx); -+ u32 sub_carr = rtw89_mac_reg_by_idx(R_AX_TX_SUB_CARRIER_VALUE, -+ mac_idx); -+ u32 chk_rate = rtw89_mac_reg_by_idx(R_AX_TXRATE_CHK, mac_idx); -+ u8 txsc20 = 0, txsc40 = 0; -+ -+ switch (param->bandwidth) { -+ case RTW89_CHANNEL_WIDTH_80: -+ txsc40 = rtw89_phy_get_txsc(rtwdev, param, -+ RTW89_CHANNEL_WIDTH_40); -+ fallthrough; -+ case RTW89_CHANNEL_WIDTH_40: -+ txsc20 = rtw89_phy_get_txsc(rtwdev, param, -+ RTW89_CHANNEL_WIDTH_20); -+ break; -+ default: -+ break; -+ } -+ -+ switch (param->bandwidth) { -+ case RTW89_CHANNEL_WIDTH_80: -+ rtw89_write8_mask(rtwdev, rf_mod, B_AX_WMAC_RFMOD_MASK, BIT(1)); -+ rtw89_write32(rtwdev, sub_carr, txsc20 | (txsc40 << 4)); -+ break; -+ case RTW89_CHANNEL_WIDTH_40: -+ rtw89_write8_mask(rtwdev, rf_mod, B_AX_WMAC_RFMOD_MASK, BIT(0)); -+ rtw89_write32(rtwdev, sub_carr, txsc20); -+ break; -+ case RTW89_CHANNEL_WIDTH_20: -+ rtw89_write8_clr(rtwdev, rf_mod, B_AX_WMAC_RFMOD_MASK); -+ rtw89_write32(rtwdev, sub_carr, 0); -+ break; -+ default: -+ break; -+ } -+ -+ if (param->center_chan > 14) -+ rtw89_write8_set(rtwdev, chk_rate, -+ B_AX_CHECK_CCK_EN | B_AX_RTS_LIMIT_IN_OFDM6); -+ else -+ rtw89_write8_clr(rtwdev, chk_rate, -+ B_AX_CHECK_CCK_EN | B_AX_RTS_LIMIT_IN_OFDM6); -+} -+ -+static const u32 rtw8852a_sco_barker_threshold[14] = { -+ 0x1cfea, 0x1d0e1, 0x1d1d7, 0x1d2cd, 0x1d3c3, 0x1d4b9, 0x1d5b0, 0x1d6a6, -+ 0x1d79c, 0x1d892, 0x1d988, 0x1da7f, 0x1db75, 0x1ddc4 -+}; -+ -+static const u32 rtw8852a_sco_cck_threshold[14] = { -+ 0x27de3, 0x27f35, 0x28088, 0x281da, 0x2832d, 0x2847f, 0x285d2, 0x28724, -+ 0x28877, 0x289c9, 0x28b1c, 0x28c6e, 0x28dc1, 0x290ed -+}; -+ -+static int rtw8852a_ctrl_sco_cck(struct rtw89_dev *rtwdev, u8 central_ch, -+ u8 primary_ch, enum rtw89_bandwidth bw) -+{ -+ u8 ch_element; -+ -+ if (bw == RTW89_CHANNEL_WIDTH_20) { -+ ch_element = central_ch - 1; -+ } else if (bw == RTW89_CHANNEL_WIDTH_40) { -+ if (primary_ch == 1) -+ ch_element = central_ch - 1 + 2; -+ else -+ ch_element = central_ch - 1 - 2; -+ } else { -+ rtw89_warn(rtwdev, "Invalid BW:%d for CCK\n", bw); -+ return -EINVAL; -+ } -+ rtw89_phy_write32_mask(rtwdev, R_RXSCOBC, B_RXSCOBC_TH, -+ rtw8852a_sco_barker_threshold[ch_element]); -+ rtw89_phy_write32_mask(rtwdev, R_RXSCOCCK, B_RXSCOCCK_TH, -+ rtw8852a_sco_cck_threshold[ch_element]); -+ -+ return 0; -+} -+ -+static void rtw8852a_ch_setting(struct rtw89_dev *rtwdev, u8 central_ch, -+ u8 path) -+{ -+ u32 val; -+ -+ val = rtw89_read_rf(rtwdev, path, RR_CFGCH, RFREG_MASK); -+ if (val == INV_RF_DATA) { -+ rtw89_warn(rtwdev, "Invalid RF_0x18 for Path-%d\n", path); -+ return; -+ } -+ val &= ~0x303ff; -+ val |= central_ch; -+ if (central_ch > 14) -+ val |= (BIT(16) | BIT(8)); -+ rtw89_write_rf(rtwdev, path, RR_CFGCH, RFREG_MASK, val); -+} -+ -+static u8 rtw8852a_sco_mapping(u8 central_ch) -+{ -+ if (central_ch == 1) -+ return 109; -+ else if (central_ch >= 2 && central_ch <= 6) -+ return 108; -+ else if (central_ch >= 7 && central_ch <= 10) -+ return 107; -+ else if (central_ch >= 11 && central_ch <= 14) -+ return 106; -+ else if (central_ch == 36 || central_ch == 38) -+ return 51; -+ else if (central_ch >= 40 && central_ch <= 58) -+ return 50; -+ else if (central_ch >= 60 && central_ch <= 64) -+ return 49; -+ else if (central_ch == 100 || central_ch == 102) -+ return 48; -+ else if (central_ch >= 104 && central_ch <= 126) -+ return 47; -+ else if (central_ch >= 128 && central_ch <= 151) -+ return 46; -+ else if (central_ch >= 153 && central_ch <= 177) -+ return 45; -+ else -+ return 0; -+} -+ -+static void rtw8852a_ctrl_ch(struct rtw89_dev *rtwdev, u8 central_ch, -+ enum rtw89_phy_idx phy_idx) -+{ -+ u8 sco_comp; -+ bool is_2g = central_ch <= 14; -+ -+ if (phy_idx == RTW89_PHY_0) { -+ /* Path A */ -+ rtw8852a_ch_setting(rtwdev, central_ch, RF_PATH_A); -+ if (is_2g) -+ rtw89_phy_write32_idx(rtwdev, R_PATH0_TIA_ERR_G1, -+ B_PATH0_TIA_ERR_G1_SEL, 1, -+ phy_idx); -+ else -+ rtw89_phy_write32_idx(rtwdev, R_PATH0_TIA_ERR_G1, -+ B_PATH0_TIA_ERR_G1_SEL, 0, -+ phy_idx); -+ -+ /* Path B */ -+ if (!rtwdev->dbcc_en) { -+ rtw8852a_ch_setting(rtwdev, central_ch, RF_PATH_B); -+ if (is_2g) -+ rtw89_phy_write32_idx(rtwdev, R_P1_MODE, -+ B_P1_MODE_SEL, -+ 1, phy_idx); -+ else -+ rtw89_phy_write32_idx(rtwdev, R_P1_MODE, -+ B_P1_MODE_SEL, -+ 0, phy_idx); -+ } else { -+ if (is_2g) -+ rtw89_phy_write32_clr(rtwdev, R_2P4G_BAND, -+ B_2P4G_BAND_SEL); -+ else -+ rtw89_phy_write32_set(rtwdev, R_2P4G_BAND, -+ B_2P4G_BAND_SEL); -+ } -+ /* SCO compensate FC setting */ -+ sco_comp = rtw8852a_sco_mapping(central_ch); -+ rtw89_phy_write32_idx(rtwdev, R_FC0_BW, B_FC0_BW_INV, -+ sco_comp, phy_idx); -+ } else { -+ /* Path B */ -+ rtw8852a_ch_setting(rtwdev, central_ch, RF_PATH_B); -+ if (is_2g) -+ rtw89_phy_write32_idx(rtwdev, R_P1_MODE, -+ B_P1_MODE_SEL, -+ 1, phy_idx); -+ else -+ rtw89_phy_write32_idx(rtwdev, R_P1_MODE, -+ B_P1_MODE_SEL, -+ 1, phy_idx); -+ /* SCO compensate FC setting */ -+ sco_comp = rtw8852a_sco_mapping(central_ch); -+ rtw89_phy_write32_idx(rtwdev, R_FC0_BW, B_FC0_BW_INV, -+ sco_comp, phy_idx); -+ } -+ -+ /* Band edge */ -+ if (is_2g) -+ rtw89_phy_write32_idx(rtwdev, R_BANDEDGE, B_BANDEDGE_EN, 1, -+ phy_idx); -+ else -+ rtw89_phy_write32_idx(rtwdev, R_BANDEDGE, B_BANDEDGE_EN, 0, -+ phy_idx); -+ -+ /* CCK parameters */ -+ if (central_ch == 14) { -+ rtw89_phy_write32_mask(rtwdev, R_TXFIR0, B_TXFIR_C01, -+ 0x3b13ff); -+ rtw89_phy_write32_mask(rtwdev, R_TXFIR2, B_TXFIR_C23, -+ 0x1c42de); -+ rtw89_phy_write32_mask(rtwdev, R_TXFIR4, B_TXFIR_C45, -+ 0xfdb0ad); -+ rtw89_phy_write32_mask(rtwdev, R_TXFIR6, B_TXFIR_C67, -+ 0xf60f6e); -+ rtw89_phy_write32_mask(rtwdev, R_TXFIR8, B_TXFIR_C89, -+ 0xfd8f92); -+ rtw89_phy_write32_mask(rtwdev, R_TXFIRA, B_TXFIR_CAB, 0x2d011); -+ rtw89_phy_write32_mask(rtwdev, R_TXFIRC, B_TXFIR_CCD, 0x1c02c); -+ rtw89_phy_write32_mask(rtwdev, R_TXFIRE, B_TXFIR_CEF, -+ 0xfff00a); -+ } else { -+ rtw89_phy_write32_mask(rtwdev, R_TXFIR0, B_TXFIR_C01, -+ 0x3d23ff); -+ rtw89_phy_write32_mask(rtwdev, R_TXFIR2, B_TXFIR_C23, -+ 0x29b354); -+ rtw89_phy_write32_mask(rtwdev, R_TXFIR4, B_TXFIR_C45, 0xfc1c8); -+ rtw89_phy_write32_mask(rtwdev, R_TXFIR6, B_TXFIR_C67, -+ 0xfdb053); -+ rtw89_phy_write32_mask(rtwdev, R_TXFIR8, B_TXFIR_C89, -+ 0xf86f9a); -+ rtw89_phy_write32_mask(rtwdev, R_TXFIRA, B_TXFIR_CAB, -+ 0xfaef92); -+ rtw89_phy_write32_mask(rtwdev, R_TXFIRC, B_TXFIR_CCD, -+ 0xfe5fcc); -+ rtw89_phy_write32_mask(rtwdev, R_TXFIRE, B_TXFIR_CEF, -+ 0xffdff5); -+ } -+} -+ -+static void rtw8852a_bw_setting(struct rtw89_dev *rtwdev, u8 bw, u8 path) -+{ -+ u32 val = 0; -+ u32 adc_sel[2] = {0x12d0, 0x32d0}; -+ u32 wbadc_sel[2] = {0x12ec, 0x32ec}; -+ -+ val = rtw89_read_rf(rtwdev, path, RR_CFGCH, RFREG_MASK); -+ if (val == INV_RF_DATA) { -+ rtw89_warn(rtwdev, "Invalid RF_0x18 for Path-%d\n", path); -+ return; -+ } -+ val &= ~(BIT(11) | BIT(10)); -+ switch (bw) { -+ case RTW89_CHANNEL_WIDTH_5: -+ rtw89_phy_write32_mask(rtwdev, adc_sel[path], 0x6000, 0x1); -+ rtw89_phy_write32_mask(rtwdev, wbadc_sel[path], 0x30, 0x0); -+ val |= (BIT(11) | BIT(10)); -+ break; -+ case RTW89_CHANNEL_WIDTH_10: -+ rtw89_phy_write32_mask(rtwdev, adc_sel[path], 0x6000, 0x2); -+ rtw89_phy_write32_mask(rtwdev, wbadc_sel[path], 0x30, 0x1); -+ val |= (BIT(11) | BIT(10)); -+ break; -+ case RTW89_CHANNEL_WIDTH_20: -+ rtw89_phy_write32_mask(rtwdev, adc_sel[path], 0x6000, 0x0); -+ rtw89_phy_write32_mask(rtwdev, wbadc_sel[path], 0x30, 0x2); -+ val |= (BIT(11) | BIT(10)); -+ break; -+ case RTW89_CHANNEL_WIDTH_40: -+ rtw89_phy_write32_mask(rtwdev, adc_sel[path], 0x6000, 0x0); -+ rtw89_phy_write32_mask(rtwdev, wbadc_sel[path], 0x30, 0x2); -+ val |= BIT(11); -+ break; -+ case RTW89_CHANNEL_WIDTH_80: -+ rtw89_phy_write32_mask(rtwdev, adc_sel[path], 0x6000, 0x0); -+ rtw89_phy_write32_mask(rtwdev, wbadc_sel[path], 0x30, 0x2); -+ val |= BIT(10); -+ break; -+ default: -+ rtw89_warn(rtwdev, "Fail to set ADC\n"); -+ } -+ -+ rtw89_write_rf(rtwdev, path, RR_CFGCH, RFREG_MASK, val); -+} -+ -+static void -+rtw8852a_ctrl_bw(struct rtw89_dev *rtwdev, u8 pri_ch, u8 bw, -+ enum rtw89_phy_idx phy_idx) -+{ -+ /* Switch bandwidth */ -+ switch (bw) { -+ case RTW89_CHANNEL_WIDTH_5: -+ rtw89_phy_write32_idx(rtwdev, R_FC0_BW, B_FC0_BW_SET, 0x0, -+ phy_idx); -+ rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD, B_CHBW_MOD_SBW, 0x1, -+ phy_idx); -+ rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD, B_CHBW_MOD_PRICH, -+ 0x0, phy_idx); -+ break; -+ case RTW89_CHANNEL_WIDTH_10: -+ rtw89_phy_write32_idx(rtwdev, R_FC0_BW, B_FC0_BW_SET, 0x0, -+ phy_idx); -+ rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD, B_CHBW_MOD_SBW, 0x2, -+ phy_idx); -+ rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD, B_CHBW_MOD_PRICH, -+ 0x0, phy_idx); -+ break; -+ case RTW89_CHANNEL_WIDTH_20: -+ rtw89_phy_write32_idx(rtwdev, R_FC0_BW, B_FC0_BW_SET, 0x0, -+ phy_idx); -+ rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD, B_CHBW_MOD_SBW, 0x0, -+ phy_idx); -+ rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD, B_CHBW_MOD_PRICH, -+ 0x0, phy_idx); -+ break; -+ case RTW89_CHANNEL_WIDTH_40: -+ rtw89_phy_write32_idx(rtwdev, R_FC0_BW, B_FC0_BW_SET, 0x1, -+ phy_idx); -+ rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD, B_CHBW_MOD_SBW, 0x0, -+ phy_idx); -+ rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD, B_CHBW_MOD_PRICH, -+ pri_ch, -+ phy_idx); -+ if (pri_ch == RTW89_SC_20_UPPER) -+ rtw89_phy_write32_mask(rtwdev, R_RXSC, B_RXSC_EN, 1); -+ else -+ rtw89_phy_write32_mask(rtwdev, R_RXSC, B_RXSC_EN, 0); -+ break; -+ case RTW89_CHANNEL_WIDTH_80: -+ rtw89_phy_write32_idx(rtwdev, R_FC0_BW, B_FC0_BW_SET, 0x2, -+ phy_idx); -+ rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD, B_CHBW_MOD_SBW, 0x0, -+ phy_idx); -+ rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD, B_CHBW_MOD_PRICH, -+ pri_ch, -+ phy_idx); -+ break; -+ default: -+ rtw89_warn(rtwdev, "Fail to switch bw (bw:%d, pri ch:%d)\n", bw, -+ pri_ch); -+ } -+ -+ if (phy_idx == RTW89_PHY_0) { -+ rtw8852a_bw_setting(rtwdev, bw, RF_PATH_A); -+ if (!rtwdev->dbcc_en) -+ rtw8852a_bw_setting(rtwdev, bw, RF_PATH_B); -+ } else { -+ rtw8852a_bw_setting(rtwdev, bw, RF_PATH_B); -+ } -+} -+ -+static void rtw8852a_spur_elimination(struct rtw89_dev *rtwdev, u8 central_ch) -+{ -+ if (central_ch == 153) { -+ rtw89_phy_write32_mask(rtwdev, R_P0_NBIIDX, B_P0_NBIIDX_VAL, -+ 0x210); -+ rtw89_phy_write32_mask(rtwdev, R_P1_NBIIDX, B_P1_NBIIDX_VAL, -+ 0x210); -+ rtw89_phy_write32_mask(rtwdev, R_SEG0CSI, 0xfff, 0x7c0); -+ rtw89_phy_write32_mask(rtwdev, R_P0_NBIIDX, -+ B_P0_NBIIDX_NOTCH_EN, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_P1_NBIIDX, -+ B_P1_NBIIDX_NOTCH_EN, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_SEG0CSI_EN, B_SEG0CSI_EN, -+ 0x1); -+ } else if (central_ch == 151) { -+ rtw89_phy_write32_mask(rtwdev, R_P0_NBIIDX, B_P0_NBIIDX_VAL, -+ 0x210); -+ rtw89_phy_write32_mask(rtwdev, R_P1_NBIIDX, B_P1_NBIIDX_VAL, -+ 0x210); -+ rtw89_phy_write32_mask(rtwdev, R_SEG0CSI, 0xfff, 0x40); -+ rtw89_phy_write32_mask(rtwdev, R_P0_NBIIDX, -+ B_P0_NBIIDX_NOTCH_EN, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_P1_NBIIDX, -+ B_P1_NBIIDX_NOTCH_EN, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_SEG0CSI_EN, B_SEG0CSI_EN, -+ 0x1); -+ } else if (central_ch == 155) { -+ rtw89_phy_write32_mask(rtwdev, R_P0_NBIIDX, B_P0_NBIIDX_VAL, -+ 0x2d0); -+ rtw89_phy_write32_mask(rtwdev, R_P1_NBIIDX, B_P1_NBIIDX_VAL, -+ 0x2d0); -+ rtw89_phy_write32_mask(rtwdev, R_SEG0CSI, 0xfff, 0x740); -+ rtw89_phy_write32_mask(rtwdev, R_P0_NBIIDX, -+ B_P0_NBIIDX_NOTCH_EN, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_P1_NBIIDX, -+ B_P1_NBIIDX_NOTCH_EN, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_SEG0CSI_EN, B_SEG0CSI_EN, -+ 0x1); -+ } else { -+ rtw89_phy_write32_mask(rtwdev, R_P0_NBIIDX, -+ B_P0_NBIIDX_NOTCH_EN, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_P1_NBIIDX, -+ B_P1_NBIIDX_NOTCH_EN, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_SEG0CSI_EN, B_SEG0CSI_EN, -+ 0x0); -+ } -+} -+ -+static void rtw8852a_bb_reset_all(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy_idx) -+{ -+ rtw89_phy_write32_idx(rtwdev, R_RSTB_ASYNC, B_RSTB_ASYNC_ALL, 1, -+ phy_idx); -+ rtw89_phy_write32_idx(rtwdev, R_RSTB_ASYNC, B_RSTB_ASYNC_ALL, 0, -+ phy_idx); -+ rtw89_phy_write32_idx(rtwdev, R_RSTB_ASYNC, B_RSTB_ASYNC_ALL, 1, -+ phy_idx); -+} -+ -+static void rtw8852a_bb_reset_en(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy_idx, bool en) -+{ -+ if (en) -+ rtw89_phy_write32_idx(rtwdev, R_RSTB_ASYNC, B_RSTB_ASYNC_ALL, -+ 1, -+ phy_idx); -+ else -+ rtw89_phy_write32_idx(rtwdev, R_RSTB_ASYNC, B_RSTB_ASYNC_ALL, -+ 0, -+ phy_idx); -+} -+ -+static void rtw8852a_bb_reset(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy_idx) -+{ -+ rtw89_phy_write32_set(rtwdev, R_P0_TXPW_RSTB, B_P0_TXPW_RSTB_MANON); -+ rtw89_phy_write32_set(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_TRK_EN); -+ rtw89_phy_write32_set(rtwdev, R_P1_TXPW_RSTB, B_P1_TXPW_RSTB_MANON); -+ rtw89_phy_write32_set(rtwdev, R_P1_TSSI_TRK, B_P1_TSSI_TRK_EN); -+ rtw8852a_bb_reset_all(rtwdev, phy_idx); -+ rtw89_phy_write32_clr(rtwdev, R_P0_TXPW_RSTB, B_P0_TXPW_RSTB_MANON); -+ rtw89_phy_write32_clr(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_TRK_EN); -+ rtw89_phy_write32_clr(rtwdev, R_P1_TXPW_RSTB, B_P1_TXPW_RSTB_MANON); -+ rtw89_phy_write32_clr(rtwdev, R_P1_TSSI_TRK, B_P1_TSSI_TRK_EN); -+} -+ -+static void rtw8852a_bb_macid_ctrl_init(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy_idx) -+{ -+ u32 addr; -+ -+ for (addr = R_AX_PWR_MACID_LMT_TABLE0; -+ addr <= R_AX_PWR_MACID_LMT_TABLE127; addr += 4) -+ rtw89_mac_txpwr_write32(rtwdev, phy_idx, addr, 0); -+} -+ -+static void rtw8852a_bb_sethw(struct rtw89_dev *rtwdev) -+{ -+ rtw89_phy_write32_clr(rtwdev, R_P0_EN_SOUND_WO_NDP, B_P0_EN_SOUND_WO_NDP); -+ rtw89_phy_write32_clr(rtwdev, R_P1_EN_SOUND_WO_NDP, B_P1_EN_SOUND_WO_NDP); -+ -+ if (rtwdev->hal.cv <= CHIP_CCV) { -+ rtw89_phy_write32_set(rtwdev, R_RSTB_WATCH_DOG, B_P0_RSTB_WATCH_DOG); -+ rtw89_phy_write32(rtwdev, R_BRK_ASYNC_RST_EN_1, 0x864FA000); -+ rtw89_phy_write32(rtwdev, R_BRK_ASYNC_RST_EN_2, 0x3F); -+ rtw89_phy_write32(rtwdev, R_BRK_ASYNC_RST_EN_3, 0x7FFF); -+ rtw89_phy_write32_set(rtwdev, R_SPOOF_ASYNC_RST, B_SPOOF_ASYNC_RST); -+ rtw89_phy_write32_set(rtwdev, R_P0_TXPW_RSTB, B_P0_TXPW_RSTB_MANON); -+ rtw89_phy_write32_set(rtwdev, R_P1_TXPW_RSTB, B_P1_TXPW_RSTB_MANON); -+ } -+ rtw89_phy_write32_mask(rtwdev, R_CFO_TRK0, B_CFO_TRK_MSK, 0x1f); -+ rtw89_phy_write32_mask(rtwdev, R_CFO_TRK1, B_CFO_TRK_MSK, 0x0c); -+ rtw89_phy_write32_idx(rtwdev, R_MAC_SEL, B_MAC_SEL_MOD, 0x0, RTW89_PHY_0); -+ rtw89_phy_write32_idx(rtwdev, R_MAC_SEL, B_MAC_SEL_MOD, 0x0, RTW89_PHY_1); -+ rtw89_phy_write32_clr(rtwdev, R_NDP_BRK0, B_NDP_RU_BRK); -+ rtw89_phy_write32_set(rtwdev, R_NDP_BRK1, B_NDP_RU_BRK); -+ -+ rtw8852a_bb_macid_ctrl_init(rtwdev, RTW89_PHY_0); -+} -+ -+static void rtw8852a_bbrst_for_rfk(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy_idx) -+{ -+ rtw89_phy_write32_set(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_TRK_EN); -+ rtw89_phy_write32_set(rtwdev, R_P1_TSSI_TRK, B_P1_TSSI_TRK_EN); -+ rtw8852a_bb_reset_all(rtwdev, phy_idx); -+ rtw89_phy_write32_clr(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_TRK_EN); -+ rtw89_phy_write32_clr(rtwdev, R_P1_TSSI_TRK, B_P1_TSSI_TRK_EN); -+ udelay(1); -+} -+ -+static void rtw8852a_set_channel_bb(struct rtw89_dev *rtwdev, -+ struct rtw89_channel_params *param, -+ enum rtw89_phy_idx phy_idx) -+{ -+ bool cck_en = param->center_chan > 14 ? false : true; -+ u8 pri_ch_idx = param->pri_ch_idx; -+ -+ if (param->center_chan <= 14) -+ rtw8852a_ctrl_sco_cck(rtwdev, param->center_chan, -+ param->primary_chan, param->bandwidth); -+ -+ rtw8852a_ctrl_ch(rtwdev, param->center_chan, phy_idx); -+ rtw8852a_ctrl_bw(rtwdev, pri_ch_idx, param->bandwidth, phy_idx); -+ if (cck_en) { -+ rtw89_phy_write32_mask(rtwdev, R_RXCCA, B_RXCCA_DIS, 0); -+ } else { -+ rtw89_phy_write32_mask(rtwdev, R_RXCCA, B_RXCCA_DIS, 1); -+ rtw8852a_bbrst_for_rfk(rtwdev, phy_idx); -+ } -+ rtw8852a_spur_elimination(rtwdev, param->center_chan); -+ rtw8852a_bb_reset_all(rtwdev, phy_idx); -+} -+ -+static void rtw8852a_set_channel(struct rtw89_dev *rtwdev, -+ struct rtw89_channel_params *params) -+{ -+ rtw8852a_set_channel_mac(rtwdev, params, RTW89_MAC_0); -+ rtw8852a_set_channel_bb(rtwdev, params, RTW89_PHY_0); -+} -+ -+static void rtw8852a_dfs_en(struct rtw89_dev *rtwdev, bool en) -+{ -+ if (en) -+ rtw89_phy_write32_mask(rtwdev, R_UPD_P0, B_UPD_P0_EN, 1); -+ else -+ rtw89_phy_write32_mask(rtwdev, R_UPD_P0, B_UPD_P0_EN, 0); -+} -+ -+static void rtw8852a_tssi_cont_en(struct rtw89_dev *rtwdev, bool en, -+ enum rtw89_rf_path path) -+{ -+ static const u32 tssi_trk[2] = {0x5818, 0x7818}; -+ static const u32 ctrl_bbrst[2] = {0x58dc, 0x78dc}; -+ -+ if (en) { -+ rtw89_phy_write32_mask(rtwdev, ctrl_bbrst[path], BIT(30), 0x0); -+ rtw89_phy_write32_mask(rtwdev, tssi_trk[path], BIT(30), 0x0); -+ } else { -+ rtw89_phy_write32_mask(rtwdev, ctrl_bbrst[path], BIT(30), 0x1); -+ rtw89_phy_write32_mask(rtwdev, tssi_trk[path], BIT(30), 0x1); -+ } -+} -+ -+static void rtw8852a_tssi_cont_en_phyidx(struct rtw89_dev *rtwdev, bool en, -+ u8 phy_idx) -+{ -+ if (!rtwdev->dbcc_en) { -+ rtw8852a_tssi_cont_en(rtwdev, en, RF_PATH_A); -+ rtw8852a_tssi_cont_en(rtwdev, en, RF_PATH_B); -+ } else { -+ if (phy_idx == RTW89_PHY_0) -+ rtw8852a_tssi_cont_en(rtwdev, en, RF_PATH_A); -+ else -+ rtw8852a_tssi_cont_en(rtwdev, en, RF_PATH_B); -+ } -+} -+ -+static void rtw8852a_adc_en(struct rtw89_dev *rtwdev, bool en) -+{ -+ if (en) -+ rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_RST, -+ 0x0); -+ else -+ rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_RST, -+ 0xf); -+} -+ -+static void rtw8852a_set_channel_help(struct rtw89_dev *rtwdev, bool enter, -+ struct rtw89_channel_help_params *p) -+{ -+ u8 phy_idx = RTW89_PHY_0; -+ -+ if (enter) { -+ rtw89_mac_stop_sch_tx(rtwdev, RTW89_MAC_0, &p->tx_en, RTW89_SCH_TX_SEL_ALL); -+ rtw89_mac_cfg_ppdu_status(rtwdev, RTW89_MAC_0, false); -+ rtw8852a_dfs_en(rtwdev, false); -+ rtw8852a_tssi_cont_en_phyidx(rtwdev, false, RTW89_PHY_0); -+ rtw8852a_adc_en(rtwdev, false); -+ fsleep(40); -+ rtw8852a_bb_reset_en(rtwdev, phy_idx, false); -+ } else { -+ rtw89_mac_cfg_ppdu_status(rtwdev, RTW89_MAC_0, true); -+ rtw8852a_adc_en(rtwdev, true); -+ rtw8852a_dfs_en(rtwdev, true); -+ rtw8852a_tssi_cont_en_phyidx(rtwdev, true, RTW89_PHY_0); -+ rtw8852a_bb_reset_en(rtwdev, phy_idx, true); -+ rtw89_mac_resume_sch_tx(rtwdev, RTW89_MAC_0, p->tx_en); -+ } -+} -+ -+static void rtw8852a_fem_setup(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_efuse *efuse = &rtwdev->efuse; -+ -+ switch (efuse->rfe_type) { -+ case 11: -+ case 12: -+ case 17: -+ case 18: -+ case 51: -+ case 53: -+ rtwdev->fem.epa_2g = true; -+ rtwdev->fem.elna_2g = true; -+ fallthrough; -+ case 9: -+ case 10: -+ case 15: -+ case 16: -+ rtwdev->fem.epa_5g = true; -+ rtwdev->fem.elna_5g = true; -+ break; -+ default: -+ break; -+ } -+} -+ -+static void rtw8852a_rfk_init(struct rtw89_dev *rtwdev) -+{ -+ rtwdev->is_tssi_mode[RF_PATH_A] = false; -+ rtwdev->is_tssi_mode[RF_PATH_B] = false; -+ -+ rtw8852a_rck(rtwdev); -+ rtw8852a_dack(rtwdev); -+ rtw8852a_rx_dck(rtwdev, RTW89_PHY_0, true); -+} -+ -+static void rtw8852a_rfk_channel(struct rtw89_dev *rtwdev) -+{ -+ enum rtw89_phy_idx phy_idx = RTW89_PHY_0; -+ -+ rtw8852a_rx_dck(rtwdev, phy_idx, true); -+ rtw8852a_iqk(rtwdev, phy_idx); -+ rtw8852a_tssi(rtwdev, phy_idx); -+ rtw8852a_dpk(rtwdev, phy_idx); -+} -+ -+static void rtw8852a_rfk_band_changed(struct rtw89_dev *rtwdev) -+{ -+ rtw8852a_tssi_scan(rtwdev, RTW89_PHY_0); -+} -+ -+static void rtw8852a_rfk_scan(struct rtw89_dev *rtwdev, bool start) -+{ -+ rtw8852a_wifi_scan_notify(rtwdev, start, RTW89_PHY_0); -+} -+ -+static void rtw8852a_rfk_track(struct rtw89_dev *rtwdev) -+{ -+ rtw8852a_dpk_track(rtwdev); -+ rtw8852a_iqk_track(rtwdev); -+ rtw8852a_tssi_track(rtwdev); -+} -+ -+static u32 rtw8852a_bb_cal_txpwr_ref(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy_idx, s16 ref) -+{ -+ s8 ofst_int = 0; -+ u8 base_cw_0db = 0x27; -+ u16 tssi_16dbm_cw = 0x12c; -+ s16 pwr_s10_3 = 0; -+ s16 rf_pwr_cw = 0; -+ u16 bb_pwr_cw = 0; -+ u32 pwr_cw = 0; -+ u32 tssi_ofst_cw = 0; -+ -+ pwr_s10_3 = (ref << 1) + (s16)(ofst_int) + (s16)(base_cw_0db << 3); -+ bb_pwr_cw = FIELD_GET(GENMASK(2, 0), pwr_s10_3); -+ rf_pwr_cw = FIELD_GET(GENMASK(8, 3), pwr_s10_3); -+ rf_pwr_cw = clamp_t(s16, rf_pwr_cw, 15, 63); -+ pwr_cw = (rf_pwr_cw << 3) | bb_pwr_cw; -+ -+ tssi_ofst_cw = (u32)((s16)tssi_16dbm_cw + (ref << 1) - (16 << 3)); -+ rtw89_debug(rtwdev, RTW89_DBG_TXPWR, -+ "[TXPWR] tssi_ofst_cw=%d rf_cw=0x%x bb_cw=0x%x\n", -+ tssi_ofst_cw, rf_pwr_cw, bb_pwr_cw); -+ -+ return (tssi_ofst_cw << 18) | (pwr_cw << 9) | (ref & GENMASK(8, 0)); -+} -+ -+static -+void rtw8852a_set_txpwr_ul_tb_offset(struct rtw89_dev *rtwdev, -+ s16 pw_ofst, enum rtw89_mac_idx mac_idx) -+{ -+ s32 val_1t = 0; -+ s32 val_2t = 0; -+ u32 reg; -+ -+ if (pw_ofst < -16 || pw_ofst > 15) { -+ rtw89_debug(rtwdev, RTW89_DBG_TXPWR, "[ULTB] Err pwr_offset=%d\n", -+ pw_ofst); -+ return; -+ } -+ reg = rtw89_mac_reg_by_idx(R_AX_PWR_UL_TB_CTRL, mac_idx); -+ rtw89_write32_set(rtwdev, reg, B_AX_PWR_UL_TB_CTRL_EN); -+ val_1t = (s32)pw_ofst; -+ reg = rtw89_mac_reg_by_idx(R_AX_PWR_UL_TB_1T, mac_idx); -+ rtw89_write32_mask(rtwdev, reg, B_AX_PWR_UL_TB_1T_MASK, val_1t); -+ val_2t = max(val_1t - 3, -16); -+ reg = rtw89_mac_reg_by_idx(R_AX_PWR_UL_TB_2T, mac_idx); -+ rtw89_write32_mask(rtwdev, reg, B_AX_PWR_UL_TB_2T_MASK, val_2t); -+ rtw89_debug(rtwdev, RTW89_DBG_TXPWR, "[ULTB] Set TB pwr_offset=(%d, %d)\n", -+ val_1t, val_2t); -+} -+ -+static void rtw8852a_set_txpwr_ref(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy_idx) -+{ -+ static const u32 addr[RF_PATH_NUM_8852A] = {0x5800, 0x7800}; -+ const u32 mask = 0x7FFFFFF; -+ const u8 ofst_ofdm = 0x4; -+ const u8 ofst_cck = 0x8; -+ s16 ref_ofdm = 0; -+ s16 ref_cck = 0; -+ u32 val; -+ u8 i; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TXPWR, "[TXPWR] set txpwr reference\n"); -+ -+ rtw89_mac_txpwr_write32_mask(rtwdev, phy_idx, R_AX_PWR_RATE_CTRL, -+ GENMASK(27, 10), 0x0); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TXPWR, "[TXPWR] set bb ofdm txpwr ref\n"); -+ val = rtw8852a_bb_cal_txpwr_ref(rtwdev, phy_idx, ref_ofdm); -+ -+ for (i = 0; i < RF_PATH_NUM_8852A; i++) -+ rtw89_phy_write32_idx(rtwdev, addr[i] + ofst_ofdm, mask, val, -+ phy_idx); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TXPWR, "[TXPWR] set bb cck txpwr ref\n"); -+ val = rtw8852a_bb_cal_txpwr_ref(rtwdev, phy_idx, ref_cck); -+ -+ for (i = 0; i < RF_PATH_NUM_8852A; i++) -+ rtw89_phy_write32_idx(rtwdev, addr[i] + ofst_cck, mask, val, -+ phy_idx); -+} -+ -+static void rtw8852a_set_txpwr_byrate(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy_idx) -+{ -+ u8 ch = rtwdev->hal.current_channel; -+ static const u8 rs[] = { -+ RTW89_RS_CCK, -+ RTW89_RS_OFDM, -+ RTW89_RS_MCS, -+ RTW89_RS_HEDCM, -+ }; -+ s8 tmp; -+ u8 i, j; -+ u32 val, shf, addr = R_AX_PWR_BY_RATE; -+ struct rtw89_rate_desc cur; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TXPWR, -+ "[TXPWR] set txpwr byrate with ch=%d\n", ch); -+ -+ for (cur.nss = 0; cur.nss <= RTW89_NSS_2; cur.nss++) { -+ for (i = 0; i < ARRAY_SIZE(rs); i++) { -+ if (cur.nss >= rtw89_rs_nss_max[rs[i]]) -+ continue; -+ -+ val = 0; -+ cur.rs = rs[i]; -+ -+ for (j = 0; j < rtw89_rs_idx_max[rs[i]]; j++) { -+ cur.idx = j; -+ shf = (j % 4) * 8; -+ tmp = rtw89_phy_read_txpwr_byrate(rtwdev, &cur); -+ val |= (tmp << shf); -+ -+ if ((j + 1) % 4) -+ continue; -+ -+ rtw89_mac_txpwr_write32(rtwdev, phy_idx, addr, val); -+ val = 0; -+ addr += 4; -+ } -+ } -+ } -+} -+ -+static void rtw8852a_set_txpwr_offset(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy_idx) -+{ -+ struct rtw89_rate_desc desc = { -+ .nss = RTW89_NSS_1, -+ .rs = RTW89_RS_OFFSET, -+ }; -+ u32 val = 0; -+ s8 v; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TXPWR, "[TXPWR] set txpwr offset\n"); -+ -+ for (desc.idx = 0; desc.idx < RTW89_RATE_OFFSET_MAX; desc.idx++) { -+ v = rtw89_phy_read_txpwr_byrate(rtwdev, &desc); -+ val |= ((v & 0xf) << (4 * desc.idx)); -+ } -+ -+ rtw89_mac_txpwr_write32_mask(rtwdev, phy_idx, R_AX_PWR_RATE_OFST_CTRL, -+ GENMASK(19, 0), val); -+} -+ -+static void rtw8852a_set_txpwr_limit(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy_idx) -+{ -+#define __MAC_TXPWR_LMT_PAGE_SIZE 40 -+ u8 ch = rtwdev->hal.current_channel; -+ u8 bw = rtwdev->hal.current_band_width; -+ struct rtw89_txpwr_limit lmt[NTX_NUM_8852A]; -+ u32 addr, val; -+ const s8 *ptr; -+ u8 i, j, k; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TXPWR, -+ "[TXPWR] set txpwr limit with ch=%d bw=%d\n", ch, bw); -+ -+ for (i = 0; i < NTX_NUM_8852A; i++) { -+ rtw89_phy_fill_txpwr_limit(rtwdev, &lmt[i], i); -+ -+ for (j = 0; j < __MAC_TXPWR_LMT_PAGE_SIZE; j += 4) { -+ addr = R_AX_PWR_LMT + j + __MAC_TXPWR_LMT_PAGE_SIZE * i; -+ ptr = (s8 *)&lmt[i] + j; -+ val = 0; -+ -+ for (k = 0; k < 4; k++) -+ val |= (ptr[k] << (8 * k)); -+ -+ rtw89_mac_txpwr_write32(rtwdev, phy_idx, addr, val); -+ } -+ } -+#undef __MAC_TXPWR_LMT_PAGE_SIZE -+} -+ -+static void rtw8852a_set_txpwr_limit_ru(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy_idx) -+{ -+#define __MAC_TXPWR_LMT_RU_PAGE_SIZE 24 -+ u8 ch = rtwdev->hal.current_channel; -+ u8 bw = rtwdev->hal.current_band_width; -+ struct rtw89_txpwr_limit_ru lmt_ru[NTX_NUM_8852A]; -+ u32 addr, val; -+ const s8 *ptr; -+ u8 i, j, k; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TXPWR, -+ "[TXPWR] set txpwr limit ru with ch=%d bw=%d\n", ch, bw); -+ -+ for (i = 0; i < NTX_NUM_8852A; i++) { -+ rtw89_phy_fill_txpwr_limit_ru(rtwdev, &lmt_ru[i], i); -+ -+ for (j = 0; j < __MAC_TXPWR_LMT_RU_PAGE_SIZE; j += 4) { -+ addr = R_AX_PWR_RU_LMT + j + -+ __MAC_TXPWR_LMT_RU_PAGE_SIZE * i; -+ ptr = (s8 *)&lmt_ru[i] + j; -+ val = 0; -+ -+ for (k = 0; k < 4; k++) -+ val |= (ptr[k] << (8 * k)); -+ -+ rtw89_mac_txpwr_write32(rtwdev, phy_idx, addr, val); -+ } -+ } -+ -+#undef __MAC_TXPWR_LMT_RU_PAGE_SIZE -+} -+ -+static void rtw8852a_set_txpwr(struct rtw89_dev *rtwdev) -+{ -+ rtw8852a_set_txpwr_byrate(rtwdev, RTW89_PHY_0); -+ rtw8852a_set_txpwr_limit(rtwdev, RTW89_PHY_0); -+ rtw8852a_set_txpwr_limit_ru(rtwdev, RTW89_PHY_0); -+} -+ -+static void rtw8852a_set_txpwr_ctrl(struct rtw89_dev *rtwdev) -+{ -+ rtw8852a_set_txpwr_ref(rtwdev, RTW89_PHY_0); -+ rtw8852a_set_txpwr_offset(rtwdev, RTW89_PHY_0); -+} -+ -+static int -+rtw8852a_init_txpwr_unit(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx) -+{ -+ int ret; -+ -+ ret = rtw89_mac_txpwr_write32(rtwdev, phy_idx, R_AX_PWR_UL_CTRL2, 0x07763333); -+ if (ret) -+ return ret; -+ -+ ret = rtw89_mac_txpwr_write32(rtwdev, phy_idx, R_AX_PWR_COEXT_CTRL, 0x01ebf004); -+ if (ret) -+ return ret; -+ -+ ret = rtw89_mac_txpwr_write32(rtwdev, phy_idx, R_AX_PWR_UL_CTRL0, 0x0002f8ff); -+ if (ret) -+ return ret; -+ -+ return 0; -+} -+ -+void rtw8852a_bb_set_plcp_tx(struct rtw89_dev *rtwdev) -+{ -+ u8 i = 0; -+ u32 addr, val; -+ -+ for (i = 0; i < ARRAY_SIZE(rtw8852a_pmac_ht20_mcs7_tbl); i++) { -+ addr = rtw8852a_pmac_ht20_mcs7_tbl[i].addr; -+ val = rtw8852a_pmac_ht20_mcs7_tbl[i].data; -+ rtw89_phy_write32(rtwdev, addr, val); -+ } -+} -+ -+static void rtw8852a_stop_pmac_tx(struct rtw89_dev *rtwdev, -+ struct rtw8852a_bb_pmac_info *tx_info, -+ enum rtw89_phy_idx idx) -+{ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, "PMAC Stop Tx"); -+ if (tx_info->mode == CONT_TX) -+ rtw89_phy_write32_idx(rtwdev, R_PMAC_TX_PRD, B_PMAC_CTX_EN, 0, -+ idx); -+ else if (tx_info->mode == PKTS_TX) -+ rtw89_phy_write32_idx(rtwdev, R_PMAC_TX_PRD, B_PMAC_PTX_EN, 0, -+ idx); -+} -+ -+static void rtw8852a_start_pmac_tx(struct rtw89_dev *rtwdev, -+ struct rtw8852a_bb_pmac_info *tx_info, -+ enum rtw89_phy_idx idx) -+{ -+ enum rtw8852a_pmac_mode mode = tx_info->mode; -+ u32 pkt_cnt = tx_info->tx_cnt; -+ u16 period = tx_info->period; -+ -+ if (mode == CONT_TX && !tx_info->is_cck) { -+ rtw89_phy_write32_idx(rtwdev, R_PMAC_TX_PRD, B_PMAC_CTX_EN, 1, -+ idx); -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, "PMAC CTx Start"); -+ } else if (mode == PKTS_TX) { -+ rtw89_phy_write32_idx(rtwdev, R_PMAC_TX_PRD, B_PMAC_PTX_EN, 1, -+ idx); -+ rtw89_phy_write32_idx(rtwdev, R_PMAC_TX_PRD, -+ B_PMAC_TX_PRD_MSK, period, idx); -+ rtw89_phy_write32_idx(rtwdev, R_PMAC_TX_CNT, B_PMAC_TX_CNT_MSK, -+ pkt_cnt, idx); -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, "PMAC PTx Start"); -+ } -+ rtw89_phy_write32_idx(rtwdev, R_PMAC_TX_CTRL, B_PMAC_TXEN_DIS, 1, idx); -+ rtw89_phy_write32_idx(rtwdev, R_PMAC_TX_CTRL, B_PMAC_TXEN_DIS, 0, idx); -+} -+ -+void rtw8852a_bb_set_pmac_tx(struct rtw89_dev *rtwdev, -+ struct rtw8852a_bb_pmac_info *tx_info, -+ enum rtw89_phy_idx idx) -+{ -+ if (!tx_info->en_pmac_tx) { -+ rtw8852a_stop_pmac_tx(rtwdev, tx_info, idx); -+ rtw89_phy_write32_idx(rtwdev, R_PD_CTRL, B_PD_HIT_DIS, 0, idx); -+ if (rtwdev->hal.current_band_type == RTW89_BAND_2G) -+ rtw89_phy_write32_clr(rtwdev, R_RXCCA, B_RXCCA_DIS); -+ return; -+ } -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, "PMAC Tx Enable"); -+ rtw89_phy_write32_idx(rtwdev, R_PMAC_GNT, B_PMAC_GNT_TXEN, 1, idx); -+ rtw89_phy_write32_idx(rtwdev, R_PMAC_GNT, B_PMAC_GNT_RXEN, 1, idx); -+ rtw89_phy_write32_idx(rtwdev, R_PMAC_RX_CFG1, B_PMAC_OPT1_MSK, 0x3f, -+ idx); -+ rtw89_phy_write32_idx(rtwdev, R_RSTB_ASYNC, B_RSTB_ASYNC_ALL, 0, idx); -+ rtw89_phy_write32_idx(rtwdev, R_PD_CTRL, B_PD_HIT_DIS, 1, idx); -+ rtw89_phy_write32_set(rtwdev, R_RXCCA, B_RXCCA_DIS); -+ rtw89_phy_write32_idx(rtwdev, R_RSTB_ASYNC, B_RSTB_ASYNC_ALL, 1, idx); -+ rtw8852a_start_pmac_tx(rtwdev, tx_info, idx); -+} -+ -+void rtw8852a_bb_set_pmac_pkt_tx(struct rtw89_dev *rtwdev, u8 enable, -+ u16 tx_cnt, u16 period, u16 tx_time, -+ enum rtw89_phy_idx idx) -+{ -+ struct rtw8852a_bb_pmac_info tx_info = {0}; -+ -+ tx_info.en_pmac_tx = enable; -+ tx_info.is_cck = 0; -+ tx_info.mode = PKTS_TX; -+ tx_info.tx_cnt = tx_cnt; -+ tx_info.period = period; -+ tx_info.tx_time = tx_time; -+ rtw8852a_bb_set_pmac_tx(rtwdev, &tx_info, idx); -+} -+ -+void rtw8852a_bb_set_power(struct rtw89_dev *rtwdev, s16 pwr_dbm, -+ enum rtw89_phy_idx idx) -+{ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, "PMAC CFG Tx PWR = %d", pwr_dbm); -+ rtw89_phy_write32_idx(rtwdev, R_MAC_SEL, B_MAC_SEL_PWR_EN, 1, idx); -+ rtw89_phy_write32_idx(rtwdev, R_TXPWR, B_TXPWR_MSK, pwr_dbm, idx); -+} -+ -+void rtw8852a_bb_cfg_tx_path(struct rtw89_dev *rtwdev, u8 tx_path) -+{ -+ u32 rst_mask0 = 0; -+ u32 rst_mask1 = 0; -+ -+ rtw89_phy_write32_idx(rtwdev, R_MAC_SEL, B_MAC_SEL_MOD, 7, RTW89_PHY_0); -+ rtw89_phy_write32_idx(rtwdev, R_MAC_SEL, B_MAC_SEL_MOD, 7, RTW89_PHY_1); -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, "PMAC CFG Tx Path = %d", tx_path); -+ if (!rtwdev->dbcc_en) { -+ if (tx_path == RF_PATH_A) { -+ rtw89_phy_write32_mask(rtwdev, R_TXPATH_SEL, -+ B_TXPATH_SEL_MSK, 1); -+ rtw89_phy_write32_mask(rtwdev, R_TXNSS_MAP, -+ B_TXNSS_MAP_MSK, 0); -+ } else if (tx_path == RF_PATH_B) { -+ rtw89_phy_write32_mask(rtwdev, R_TXPATH_SEL, -+ B_TXPATH_SEL_MSK, 2); -+ rtw89_phy_write32_mask(rtwdev, R_TXNSS_MAP, -+ B_TXNSS_MAP_MSK, 0); -+ } else if (tx_path == RF_PATH_AB) { -+ rtw89_phy_write32_mask(rtwdev, R_TXPATH_SEL, -+ B_TXPATH_SEL_MSK, 3); -+ rtw89_phy_write32_mask(rtwdev, R_TXNSS_MAP, -+ B_TXNSS_MAP_MSK, 4); -+ } else { -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, "Error Tx Path"); -+ } -+ } else { -+ rtw89_phy_write32_mask(rtwdev, R_TXPATH_SEL, B_TXPATH_SEL_MSK, -+ 1); -+ rtw89_phy_write32_idx(rtwdev, R_TXPATH_SEL, B_TXPATH_SEL_MSK, 2, -+ RTW89_PHY_1); -+ rtw89_phy_write32_mask(rtwdev, R_TXNSS_MAP, B_TXNSS_MAP_MSK, -+ 0); -+ rtw89_phy_write32_idx(rtwdev, R_TXNSS_MAP, B_TXNSS_MAP_MSK, 4, -+ RTW89_PHY_1); -+ } -+ rst_mask0 = B_P0_TXPW_RSTB_MANON | B_P0_TXPW_RSTB_TSSI; -+ rst_mask1 = B_P1_TXPW_RSTB_MANON | B_P1_TXPW_RSTB_TSSI; -+ if (tx_path == RF_PATH_A) { -+ rtw89_phy_write32_mask(rtwdev, R_P0_TXPW_RSTB, rst_mask0, 1); -+ rtw89_phy_write32_mask(rtwdev, R_P0_TXPW_RSTB, rst_mask0, 3); -+ } else { -+ rtw89_phy_write32_mask(rtwdev, R_P1_TXPW_RSTB, rst_mask1, 1); -+ rtw89_phy_write32_mask(rtwdev, R_P1_TXPW_RSTB, rst_mask1, 3); -+ } -+} -+ -+void rtw8852a_bb_tx_mode_switch(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx idx, u8 mode) -+{ -+ if (mode != 0) -+ return; -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, "Tx mode switch"); -+ rtw89_phy_write32_idx(rtwdev, R_PMAC_GNT, B_PMAC_GNT_TXEN, 0, idx); -+ rtw89_phy_write32_idx(rtwdev, R_PMAC_GNT, B_PMAC_GNT_RXEN, 0, idx); -+ rtw89_phy_write32_idx(rtwdev, R_PMAC_RX_CFG1, B_PMAC_OPT1_MSK, 0, idx); -+ rtw89_phy_write32_idx(rtwdev, R_PMAC_RXMOD, B_PMAC_RXMOD_MSK, 0, idx); -+ rtw89_phy_write32_idx(rtwdev, R_MAC_SEL, B_MAC_SEL_DPD_EN, 0, idx); -+ rtw89_phy_write32_idx(rtwdev, R_MAC_SEL, B_MAC_SEL_MOD, 0, idx); -+ rtw89_phy_write32_idx(rtwdev, R_MAC_SEL, B_MAC_SEL_PWR_EN, 0, idx); -+} -+ -+static void rtw8852a_bb_ctrl_btc_preagc(struct rtw89_dev *rtwdev, bool bt_en) -+{ -+ rtw89_phy_write_reg3_tbl(rtwdev, bt_en ? &rtw8852a_btc_preagc_en_defs_tbl : -+ &rtw8852a_btc_preagc_dis_defs_tbl); -+} -+ -+static u8 rtw8852a_get_thermal(struct rtw89_dev *rtwdev, enum rtw89_rf_path rf_path) -+{ -+ if (rtwdev->is_tssi_mode[rf_path]) { -+ u32 addr = 0x1c10 + (rf_path << 13); -+ -+ return (u8)rtw89_phy_read32_mask(rtwdev, addr, 0x3F000000); -+ } -+ -+ rtw89_write_rf(rtwdev, rf_path, RR_TM, RR_TM_TRI, 0x1); -+ rtw89_write_rf(rtwdev, rf_path, RR_TM, RR_TM_TRI, 0x0); -+ rtw89_write_rf(rtwdev, rf_path, RR_TM, RR_TM_TRI, 0x1); -+ -+ fsleep(200); -+ -+ return (u8)rtw89_read_rf(rtwdev, rf_path, RR_TM, RR_TM_VAL); -+} -+ -+static void rtw8852a_btc_set_rfe(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_module *module = &btc->mdinfo; -+ -+ module->rfe_type = rtwdev->efuse.rfe_type; -+ module->cv = rtwdev->hal.cv; -+ module->bt_solo = 0; -+ module->switch_type = BTC_SWITCH_INTERNAL; -+ -+ if (module->rfe_type > 0) -+ module->ant.num = (module->rfe_type % 2 ? 2 : 3); -+ else -+ module->ant.num = 2; -+ -+ module->ant.diversity = 0; -+ module->ant.isolation = 10; -+ -+ if (module->ant.num == 3) { -+ module->ant.type = BTC_ANT_DEDICATED; -+ module->bt_pos = BTC_BT_ALONE; -+ } else { -+ module->ant.type = BTC_ANT_SHARED; -+ module->bt_pos = BTC_BT_BTG; -+ } -+} -+ -+static -+void rtw8852a_set_trx_mask(struct rtw89_dev *rtwdev, u8 path, u8 group, u32 val) -+{ -+ rtw89_write_rf(rtwdev, path, RR_LUTWE, 0xfffff, 0x20000); -+ rtw89_write_rf(rtwdev, path, RR_LUTWA, 0xfffff, group); -+ rtw89_write_rf(rtwdev, path, RR_LUTWD0, 0xfffff, val); -+ rtw89_write_rf(rtwdev, path, RR_LUTWE, 0xfffff, 0x0); -+} -+ -+static void rtw8852a_ctrl_btg(struct rtw89_dev *rtwdev, bool btg) -+{ -+ if (btg) { -+ rtw89_phy_write32_mask(rtwdev, R_PATH0_BTG, B_PATH0_BTG_SHEN, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_PATH1_BTG, B_PATH1_BTG_SHEN, 0x3); -+ rtw89_phy_write32_mask(rtwdev, R_PMAC_GNT, B_PMAC_GNT_P1, 0x0); -+ } else { -+ rtw89_phy_write32_mask(rtwdev, R_PATH0_BTG, B_PATH0_BTG_SHEN, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_PATH1_BTG, B_PATH1_BTG_SHEN, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_PMAC_GNT, B_PMAC_GNT_P1, 0xf); -+ rtw89_phy_write32_mask(rtwdev, R_PMAC_GNT, B_PMAC_GNT_P2, 0x4); -+ } -+} -+ -+static void rtw8852a_btc_init_cfg(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_module *module = &btc->mdinfo; -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ const struct rtw89_mac_ax_coex coex_params = { -+ .pta_mode = RTW89_MAC_AX_COEX_RTK_MODE, -+ .direction = RTW89_MAC_AX_COEX_INNER, -+ }; -+ -+ /* PTA init */ -+ rtw89_mac_coex_init(rtwdev, &coex_params); -+ -+ /* set WL Tx response = Hi-Pri */ -+ chip->ops->btc_set_wl_pri(rtwdev, BTC_PRI_MASK_TX_RESP, true); -+ chip->ops->btc_set_wl_pri(rtwdev, BTC_PRI_MASK_BEACON, true); -+ -+ /* set rf gnt debug off */ -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_WLSEL, 0xfffff, 0x0); -+ rtw89_write_rf(rtwdev, RF_PATH_B, RR_WLSEL, 0xfffff, 0x0); -+ -+ /* set WL Tx thru in TRX mask table if GNT_WL = 0 && BT_S1 = ss group */ -+ if (module->ant.type == BTC_ANT_SHARED) { -+ rtw8852a_set_trx_mask(rtwdev, -+ RF_PATH_A, BTC_BT_SS_GROUP, 0x5ff); -+ rtw8852a_set_trx_mask(rtwdev, -+ RF_PATH_B, BTC_BT_SS_GROUP, 0x5ff); -+ } else { /* set WL Tx stb if GNT_WL = 0 && BT_S1 = ss group for 3-ant */ -+ rtw8852a_set_trx_mask(rtwdev, -+ RF_PATH_A, BTC_BT_SS_GROUP, 0x5df); -+ rtw8852a_set_trx_mask(rtwdev, -+ RF_PATH_B, BTC_BT_SS_GROUP, 0x5df); -+ } -+ -+ /* set PTA break table */ -+ rtw89_write32(rtwdev, R_BTC_BREAK_TABLE, BTC_BREAK_PARAM); -+ -+ /* enable BT counter 0xda40[16,2] = 2b'11 */ -+ rtw89_write32_set(rtwdev, -+ R_AX_CSR_MODE, B_AX_BT_CNT_RST | B_AX_STATIS_BT_EN); -+ btc->cx.wl.status.map.init_ok = true; -+} -+ -+static -+void rtw8852a_btc_set_wl_pri(struct rtw89_dev *rtwdev, u8 map, bool state) -+{ -+ u32 bitmap = 0; -+ u32 reg = 0; -+ -+ switch (map) { -+ case BTC_PRI_MASK_TX_RESP: -+ reg = R_BTC_BT_COEX_MSK_TABLE; -+ bitmap = B_BTC_PRI_MASK_TX_RESP_V1; -+ break; -+ case BTC_PRI_MASK_BEACON: -+ reg = R_AX_WL_PRI_MSK; -+ bitmap = B_AX_PTA_WL_PRI_MASK_BCNQ; -+ break; -+ default: -+ return; -+ } -+ -+ if (state) -+ rtw89_write32_set(rtwdev, reg, bitmap); -+ else -+ rtw89_write32_clr(rtwdev, reg, bitmap); -+} -+ -+static inline u32 __btc_ctrl_val_all_time(u32 ctrl) -+{ -+ return FIELD_GET(GENMASK(15, 0), ctrl); -+} -+ -+static inline u32 __btc_ctrl_rst_all_time(u32 cur) -+{ -+ return cur & ~B_AX_FORCE_PWR_BY_RATE_EN; -+} -+ -+static inline u32 __btc_ctrl_gen_all_time(u32 cur, u32 val) -+{ -+ u32 hv = cur & ~B_AX_FORCE_PWR_BY_RATE_VALUE_MASK; -+ u32 lv = val & B_AX_FORCE_PWR_BY_RATE_VALUE_MASK; -+ -+ return hv | lv | B_AX_FORCE_PWR_BY_RATE_EN; -+} -+ -+static inline u32 __btc_ctrl_val_gnt_bt(u32 ctrl) -+{ -+ return FIELD_GET(GENMASK(31, 16), ctrl); -+} -+ -+static inline u32 __btc_ctrl_rst_gnt_bt(u32 cur) -+{ -+ return cur & ~B_AX_TXAGC_BT_EN; -+} -+ -+static inline u32 __btc_ctrl_gen_gnt_bt(u32 cur, u32 val) -+{ -+ u32 ov = cur & ~B_AX_TXAGC_BT_MASK; -+ u32 iv = FIELD_PREP(B_AX_TXAGC_BT_MASK, val); -+ -+ return ov | iv | B_AX_TXAGC_BT_EN; -+} -+ -+static void -+rtw8852a_btc_set_wl_txpwr_ctrl(struct rtw89_dev *rtwdev, u32 txpwr_val) -+{ -+ const u32 __btc_cr_all_time = R_AX_PWR_RATE_CTRL; -+ const u32 __btc_cr_gnt_bt = R_AX_PWR_COEXT_CTRL; -+ -+#define __do_clr(_chk) ((_chk) == GENMASK(15, 0)) -+#define __handle(_case) \ -+ do { \ -+ const u32 _reg = __btc_cr_ ## _case; \ -+ u32 _val = __btc_ctrl_val_ ## _case(txpwr_val); \ -+ u32 _cur, _wrt; \ -+ rtw89_debug(rtwdev, RTW89_DBG_TXPWR, \ -+ "btc ctrl %s: 0x%x\n", #_case, _val); \ -+ rtw89_mac_txpwr_read32(rtwdev, RTW89_PHY_0, _reg, &_cur);\ -+ rtw89_debug(rtwdev, RTW89_DBG_TXPWR, \ -+ "btc ctrl ori 0x%x: 0x%x\n", _reg, _cur); \ -+ _wrt = __do_clr(_val) ? \ -+ __btc_ctrl_rst_ ## _case(_cur) : \ -+ __btc_ctrl_gen_ ## _case(_cur, _val); \ -+ rtw89_mac_txpwr_write32(rtwdev, RTW89_PHY_0, _reg, _wrt);\ -+ rtw89_debug(rtwdev, RTW89_DBG_TXPWR, \ -+ "btc ctrl set 0x%x: 0x%x\n", _reg, _wrt); \ -+ } while (0) -+ -+ __handle(all_time); -+ __handle(gnt_bt); -+ -+#undef __handle -+#undef __do_clr -+} -+ -+static -+s8 rtw8852a_btc_get_bt_rssi(struct rtw89_dev *rtwdev, s8 val) -+{ -+ return clamp_t(s8, val, -100, 0) + 100; -+} -+ -+static struct rtw89_btc_rf_trx_para rtw89_btc_8852a_rf_ul[] = { -+ {255, 0, 0, 7}, /* 0 -> original */ -+ {255, 2, 0, 7}, /* 1 -> for BT-connected ACI issue && BTG co-rx */ -+ {255, 0, 0, 7}, /* 2 ->reserved for shared-antenna */ -+ {255, 0, 0, 7}, /* 3- >reserved for shared-antenna */ -+ {255, 0, 0, 7}, /* 4 ->reserved for shared-antenna */ -+ {255, 0, 0, 7}, /* the below id is for non-shared-antenna free-run */ -+ {6, 1, 0, 7}, -+ {13, 1, 0, 7}, -+ {13, 1, 0, 7} -+}; -+ -+static struct rtw89_btc_rf_trx_para rtw89_btc_8852a_rf_dl[] = { -+ {255, 0, 0, 7}, /* 0 -> original */ -+ {255, 2, 0, 7}, /* 1 -> reserved for shared-antenna */ -+ {255, 0, 0, 7}, /* 2 ->reserved for shared-antenna */ -+ {255, 0, 0, 7}, /* 3- >reserved for shared-antenna */ -+ {255, 0, 0, 7}, /* 4 ->reserved for shared-antenna */ -+ {255, 0, 0, 7}, /* the below id is for non-shared-antenna free-run */ -+ {255, 1, 0, 7}, -+ {255, 1, 0, 7}, -+ {255, 1, 0, 7} -+}; -+ -+static const -+u8 rtw89_btc_8852a_wl_rssi_thres[BTC_WL_RSSI_THMAX] = {60, 50, 40, 30}; -+static const -+u8 rtw89_btc_8852a_bt_rssi_thres[BTC_BT_RSSI_THMAX] = {40, 36, 31, 28}; -+ -+static struct rtw89_btc_fbtc_mreg rtw89_btc_8852a_mon_reg[] = { -+ RTW89_DEF_FBTC_MREG(REG_MAC, 4, 0xda24), -+ RTW89_DEF_FBTC_MREG(REG_MAC, 4, 0xda28), -+ RTW89_DEF_FBTC_MREG(REG_MAC, 4, 0xda2c), -+ RTW89_DEF_FBTC_MREG(REG_MAC, 4, 0xda30), -+ RTW89_DEF_FBTC_MREG(REG_MAC, 4, 0xda4c), -+ RTW89_DEF_FBTC_MREG(REG_MAC, 4, 0xda10), -+ RTW89_DEF_FBTC_MREG(REG_MAC, 4, 0xda20), -+ RTW89_DEF_FBTC_MREG(REG_MAC, 4, 0xda34), -+ RTW89_DEF_FBTC_MREG(REG_MAC, 4, 0xcef4), -+ RTW89_DEF_FBTC_MREG(REG_MAC, 4, 0x8424), -+ RTW89_DEF_FBTC_MREG(REG_BB, 4, 0x980), -+ RTW89_DEF_FBTC_MREG(REG_BT_MODEM, 4, 0x178), -+}; -+ -+static -+void rtw8852a_btc_bt_aci_imp(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_dm *dm = &btc->dm; -+ struct rtw89_btc_bt_info *bt = &btc->cx.bt; -+ struct rtw89_btc_bt_link_info *b = &bt->link_info; -+ -+ /* fix LNA2 = level-5 for BT ACI issue at BTG */ -+ if (btc->dm.wl_btg_rx && b->profile_cnt.now != 0) -+ dm->trx_para_level = 1; -+} -+ -+static -+void rtw8852a_btc_update_bt_cnt(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_cx *cx = &btc->cx; -+ u32 val; -+ -+ val = rtw89_read32(rtwdev, R_AX_BT_STAST_HIGH); -+ cx->cnt_bt[BTC_BCNT_HIPRI_TX] = FIELD_GET(B_AX_STATIS_BT_HI_TX_MASK, val); -+ cx->cnt_bt[BTC_BCNT_HIPRI_RX] = FIELD_GET(B_AX_STATIS_BT_HI_RX_MASK, val); -+ -+ val = rtw89_read32(rtwdev, R_AX_BT_STAST_LOW); -+ cx->cnt_bt[BTC_BCNT_LOPRI_TX] = FIELD_GET(B_AX_STATIS_BT_LO_TX_1_MASK, val); -+ cx->cnt_bt[BTC_BCNT_LOPRI_RX] = FIELD_GET(B_AX_STATIS_BT_LO_RX_1_MASK, val); -+ -+ /* clock-gate off before reset counter*/ -+ rtw89_write32_set(rtwdev, R_AX_BTC_CFG, B_AX_DIS_BTC_CLK_G); -+ rtw89_write32_clr(rtwdev, R_AX_CSR_MODE, B_AX_BT_CNT_RST); -+ rtw89_write32_set(rtwdev, R_AX_CSR_MODE, B_AX_BT_CNT_RST); -+ rtw89_write32_clr(rtwdev, R_AX_BTC_CFG, B_AX_DIS_BTC_CLK_G); -+} -+ -+static -+void rtw8852a_btc_wl_s1_standby(struct rtw89_dev *rtwdev, bool state) -+{ -+ rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWE, RFREG_MASK, 0x80000); -+ rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWA, RFREG_MASK, 0x1); -+ rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWD1, RFREG_MASK, 0x1); -+ -+ /* set WL standby = Rx for GNT_BT_Tx = 1->0 settle issue */ -+ if (state) -+ rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWD0, -+ RFREG_MASK, 0xa2d7c); -+ else -+ rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWD0, -+ RFREG_MASK, 0xa2020); -+ -+ rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWE, RFREG_MASK, 0x0); -+} -+ -+static void rtw8852a_query_ppdu(struct rtw89_dev *rtwdev, -+ struct rtw89_rx_phy_ppdu *phy_ppdu, -+ struct ieee80211_rx_status *status) -+{ -+ u8 path; -+ s8 *rx_power = phy_ppdu->rssi; -+ -+ status->signal = max_t(s8, rx_power[RF_PATH_A], rx_power[RF_PATH_B]); -+ for (path = 0; path < rtwdev->chip->rf_path_num; path++) { -+ status->chains |= BIT(path); -+ status->chain_signal[path] = rx_power[path]; -+ } -+} -+ -+static const struct rtw89_chip_ops rtw8852a_chip_ops = { -+ .bb_reset = rtw8852a_bb_reset, -+ .bb_sethw = rtw8852a_bb_sethw, -+ .read_rf = rtw89_phy_read_rf, -+ .write_rf = rtw89_phy_write_rf, -+ .set_channel = rtw8852a_set_channel, -+ .set_channel_help = rtw8852a_set_channel_help, -+ .read_efuse = rtw8852a_read_efuse, -+ .read_phycap = rtw8852a_read_phycap, -+ .fem_setup = rtw8852a_fem_setup, -+ .rfk_init = rtw8852a_rfk_init, -+ .rfk_channel = rtw8852a_rfk_channel, -+ .rfk_band_changed = rtw8852a_rfk_band_changed, -+ .rfk_scan = rtw8852a_rfk_scan, -+ .rfk_track = rtw8852a_rfk_track, -+ .power_trim = rtw8852a_power_trim, -+ .set_txpwr = rtw8852a_set_txpwr, -+ .set_txpwr_ctrl = rtw8852a_set_txpwr_ctrl, -+ .init_txpwr_unit = rtw8852a_init_txpwr_unit, -+ .get_thermal = rtw8852a_get_thermal, -+ .ctrl_btg = rtw8852a_ctrl_btg, -+ .query_ppdu = rtw8852a_query_ppdu, -+ .bb_ctrl_btc_preagc = rtw8852a_bb_ctrl_btc_preagc, -+ .set_txpwr_ul_tb_offset = rtw8852a_set_txpwr_ul_tb_offset, -+ -+ .btc_set_rfe = rtw8852a_btc_set_rfe, -+ .btc_init_cfg = rtw8852a_btc_init_cfg, -+ .btc_set_wl_pri = rtw8852a_btc_set_wl_pri, -+ .btc_set_wl_txpwr_ctrl = rtw8852a_btc_set_wl_txpwr_ctrl, -+ .btc_get_bt_rssi = rtw8852a_btc_get_bt_rssi, -+ .btc_bt_aci_imp = rtw8852a_btc_bt_aci_imp, -+ .btc_update_bt_cnt = rtw8852a_btc_update_bt_cnt, -+ .btc_wl_s1_standby = rtw8852a_btc_wl_s1_standby, -+}; -+ -+const struct rtw89_chip_info rtw8852a_chip_info = { -+ .chip_id = RTL8852A, -+ .ops = &rtw8852a_chip_ops, -+ .fw_name = "rtw89/rtw8852a_fw.bin", -+ .fifo_size = 458752, -+ .max_amsdu_limit = 3500, -+ .dis_2g_40m_ul_ofdma = true, -+ .hfc_param_ini = rtw8852a_hfc_param_ini_pcie, -+ .dle_mem = rtw8852a_dle_mem_pcie, -+ .rf_base_addr = {0xc000, 0xd000}, -+ .pwr_on_seq = pwr_on_seq_8852a, -+ .pwr_off_seq = pwr_off_seq_8852a, -+ .bb_table = &rtw89_8852a_phy_bb_table, -+ .rf_table = {&rtw89_8852a_phy_radioa_table, -+ &rtw89_8852a_phy_radiob_table,}, -+ .nctl_table = &rtw89_8852a_phy_nctl_table, -+ .byr_table = &rtw89_8852a_byr_table, -+ .txpwr_lmt_2g = &rtw89_8852a_txpwr_lmt_2g, -+ .txpwr_lmt_5g = &rtw89_8852a_txpwr_lmt_5g, -+ .txpwr_lmt_ru_2g = &rtw89_8852a_txpwr_lmt_ru_2g, -+ .txpwr_lmt_ru_5g = &rtw89_8852a_txpwr_lmt_ru_5g, -+ .txpwr_factor_rf = 2, -+ .txpwr_factor_mac = 1, -+ .dig_table = &rtw89_8852a_phy_dig_table, -+ .rf_path_num = 2, -+ .tx_nss = 2, -+ .rx_nss = 2, -+ .acam_num = 128, -+ .bcam_num = 10, -+ .scam_num = 128, -+ .sec_ctrl_efuse_size = 4, -+ .physical_efuse_size = 1216, -+ .logical_efuse_size = 1536, -+ .limit_efuse_size = 1152, -+ .phycap_addr = 0x580, -+ .phycap_size = 128, -+ .para_ver = 0x05050764, -+ .wlcx_desired = 0x05050000, -+ .btcx_desired = 0x5, -+ .scbd = 0x1, -+ .mailbox = 0x1, -+ .afh_guard_ch = 6, -+ .wl_rssi_thres = rtw89_btc_8852a_wl_rssi_thres, -+ .bt_rssi_thres = rtw89_btc_8852a_bt_rssi_thres, -+ .rssi_tol = 2, -+ .mon_reg_num = ARRAY_SIZE(rtw89_btc_8852a_mon_reg), -+ .mon_reg = rtw89_btc_8852a_mon_reg, -+ .rf_para_ulink_num = ARRAY_SIZE(rtw89_btc_8852a_rf_ul), -+ .rf_para_ulink = rtw89_btc_8852a_rf_ul, -+ .rf_para_dlink_num = ARRAY_SIZE(rtw89_btc_8852a_rf_dl), -+ .rf_para_dlink = rtw89_btc_8852a_rf_dl, -+ .ps_mode_supported = BIT(RTW89_PS_MODE_RFOFF) | -+ BIT(RTW89_PS_MODE_CLK_GATED) | -+ BIT(RTW89_PS_MODE_PWR_GATED), -+}; -+EXPORT_SYMBOL(rtw8852a_chip_info); -+ -+MODULE_FIRMWARE("rtw89/rtw8852a_fw.bin"); -diff --git a/drivers/net/wireless/realtek/rtw89/rtw8852a.h b/drivers/net/wireless/realtek/rtw89/rtw8852a.h -new file mode 100644 -index 000000000000..633384374de0 ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852a.h -@@ -0,0 +1,109 @@ -+/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ -+/* Copyright(c) 2019-2020 Realtek Corporation -+ */ -+ -+#ifndef __RTW89_8852A_H__ -+#define __RTW89_8852A_H__ -+ -+#include "core.h" -+ -+#define RF_PATH_NUM_8852A 2 -+#define NTX_NUM_8852A 2 -+ -+enum rtw8852a_pmac_mode { -+ NONE_TEST, -+ PKTS_TX, -+ PKTS_RX, -+ CONT_TX -+}; -+ -+struct rtw8852au_efuse { -+ u8 rsvd[0x38]; -+ u8 mac_addr[ETH_ALEN]; -+}; -+ -+struct rtw8852ae_efuse { -+ u8 mac_addr[ETH_ALEN]; -+}; -+ -+struct rtw8852a_tssi_offset { -+ u8 cck_tssi[TSSI_CCK_CH_GROUP_NUM]; -+ u8 bw40_tssi[TSSI_MCS_2G_CH_GROUP_NUM]; -+ u8 rsvd[7]; -+ u8 bw40_1s_tssi_5g[TSSI_MCS_5G_CH_GROUP_NUM]; -+} __packed; -+ -+struct rtw8852a_efuse { -+ u8 rsvd[0x210]; -+ struct rtw8852a_tssi_offset path_a_tssi; -+ u8 rsvd1[10]; -+ struct rtw8852a_tssi_offset path_b_tssi; -+ u8 rsvd2[94]; -+ u8 channel_plan; -+ u8 xtal_k; -+ u8 rsvd3; -+ u8 iqk_lck; -+ u8 rsvd4[5]; -+ u8 reg_setting:2; -+ u8 tx_diversity:1; -+ u8 rx_diversity:2; -+ u8 ac_mode:1; -+ u8 module_type:2; -+ u8 rsvd5; -+ u8 shared_ant:1; -+ u8 coex_type:3; -+ u8 ant_iso:1; -+ u8 radio_on_off:1; -+ u8 rsvd6:2; -+ u8 eeprom_version; -+ u8 customer_id; -+ u8 tx_bb_swing_2g; -+ u8 tx_bb_swing_5g; -+ u8 tx_cali_pwr_trk_mode; -+ u8 trx_path_selection; -+ u8 rfe_type; -+ u8 country_code[2]; -+ u8 rsvd7[3]; -+ u8 path_a_therm; -+ u8 path_b_therm; -+ u8 rsvd8[46]; -+ u8 path_a_cck_pwr_idx[6]; -+ u8 path_a_bw40_1tx_pwr_idx[5]; -+ u8 path_a_ofdm_1tx_pwr_idx_diff:4; -+ u8 path_a_bw20_1tx_pwr_idx_diff:4; -+ u8 path_a_bw20_2tx_pwr_idx_diff:4; -+ u8 path_a_bw40_2tx_pwr_idx_diff:4; -+ u8 path_a_cck_2tx_pwr_idx_diff:4; -+ u8 path_a_ofdm_2tx_pwr_idx_diff:4; -+ u8 rsvd9[0xf2]; -+ union { -+ struct rtw8852au_efuse u; -+ struct rtw8852ae_efuse e; -+ }; -+} __packed; -+ -+struct rtw8852a_bb_pmac_info { -+ u8 en_pmac_tx:1; -+ u8 is_cck:1; -+ u8 mode:3; -+ u8 rsvd:3; -+ u16 tx_cnt; -+ u16 period; -+ u16 tx_time; -+ u8 duty_cycle; -+}; -+ -+void rtw8852a_bb_set_plcp_tx(struct rtw89_dev *rtwdev); -+void rtw8852a_bb_set_pmac_tx(struct rtw89_dev *rtwdev, -+ struct rtw8852a_bb_pmac_info *tx_info, -+ enum rtw89_phy_idx idx); -+void rtw8852a_bb_set_pmac_pkt_tx(struct rtw89_dev *rtwdev, u8 enable, -+ u16 tx_cnt, u16 period, u16 tx_time, -+ enum rtw89_phy_idx idx); -+void rtw8852a_bb_set_power(struct rtw89_dev *rtwdev, s16 pwr_dbm, -+ enum rtw89_phy_idx idx); -+void rtw8852a_bb_cfg_tx_path(struct rtw89_dev *rtwdev, u8 tx_path); -+void rtw8852a_bb_tx_mode_switch(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx idx, u8 mode); -+ -+#endif -diff --git a/drivers/net/wireless/realtek/rtw89/rtw8852a_rfk.c b/drivers/net/wireless/realtek/rtw89/rtw8852a_rfk.c -new file mode 100644 -index 000000000000..c021e93eb07b ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852a_rfk.c -@@ -0,0 +1,3911 @@ -+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause -+/* Copyright(c) 2019-2020 Realtek Corporation -+ */ -+ -+#include "coex.h" -+#include "debug.h" -+#include "mac.h" -+#include "phy.h" -+#include "reg.h" -+#include "rtw8852a.h" -+#include "rtw8852a_rfk.h" -+#include "rtw8852a_rfk_table.h" -+#include "rtw8852a_table.h" -+ -+static void -+_rfk_write_rf(struct rtw89_dev *rtwdev, const struct rtw89_reg5_def *def) -+{ -+ rtw89_write_rf(rtwdev, def->path, def->addr, def->mask, def->data); -+} -+ -+static void -+_rfk_write32_mask(struct rtw89_dev *rtwdev, const struct rtw89_reg5_def *def) -+{ -+ rtw89_phy_write32_mask(rtwdev, def->addr, def->mask, def->data); -+} -+ -+static void -+_rfk_write32_set(struct rtw89_dev *rtwdev, const struct rtw89_reg5_def *def) -+{ -+ rtw89_phy_write32_set(rtwdev, def->addr, def->mask); -+} -+ -+static void -+_rfk_write32_clr(struct rtw89_dev *rtwdev, const struct rtw89_reg5_def *def) -+{ -+ rtw89_phy_write32_clr(rtwdev, def->addr, def->mask); -+} -+ -+static void -+_rfk_delay(struct rtw89_dev *rtwdev, const struct rtw89_reg5_def *def) -+{ -+ udelay(def->data); -+} -+ -+static void -+(*_rfk_handler[])(struct rtw89_dev *rtwdev, const struct rtw89_reg5_def *def) = { -+ [RTW89_RFK_F_WRF] = _rfk_write_rf, -+ [RTW89_RFK_F_WM] = _rfk_write32_mask, -+ [RTW89_RFK_F_WS] = _rfk_write32_set, -+ [RTW89_RFK_F_WC] = _rfk_write32_clr, -+ [RTW89_RFK_F_DELAY] = _rfk_delay, -+}; -+ -+static_assert(ARRAY_SIZE(_rfk_handler) == RTW89_RFK_F_NUM); -+ -+static void -+rtw89_rfk_parser(struct rtw89_dev *rtwdev, const struct rtw89_rfk_tbl *tbl) -+{ -+ const struct rtw89_reg5_def *p = tbl->defs; -+ const struct rtw89_reg5_def *end = tbl->defs + tbl->size; -+ -+ for (; p < end; p++) -+ _rfk_handler[p->flag](rtwdev, p); -+} -+ -+#define rtw89_rfk_parser_by_cond(rtwdev, cond, tbl_t, tbl_f) \ -+ do { \ -+ typeof(rtwdev) _dev = (rtwdev); \ -+ if (cond) \ -+ rtw89_rfk_parser(_dev, (tbl_t)); \ -+ else \ -+ rtw89_rfk_parser(_dev, (tbl_f)); \ -+ } while (0) -+ -+static u8 _kpath(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx) -+{ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RFK]dbcc_en: %x, PHY%d\n", -+ rtwdev->dbcc_en, phy_idx); -+ -+ if (!rtwdev->dbcc_en) -+ return RF_AB; -+ -+ if (phy_idx == RTW89_PHY_0) -+ return RF_A; -+ else -+ return RF_B; -+} -+ -+static const u32 rtw8852a_backup_bb_regs[] = {0x2344, 0x58f0, 0x78f0}; -+static const u32 rtw8852a_backup_rf_regs[] = {0xef, 0xde, 0x0, 0x1e, 0x2, 0x85, 0x90, 0x5}; -+#define BACKUP_BB_REGS_NR ARRAY_SIZE(rtw8852a_backup_bb_regs) -+#define BACKUP_RF_REGS_NR ARRAY_SIZE(rtw8852a_backup_rf_regs) -+ -+static void _rfk_backup_bb_reg(struct rtw89_dev *rtwdev, u32 backup_bb_reg_val[]) -+{ -+ u32 i; -+ -+ for (i = 0; i < BACKUP_BB_REGS_NR; i++) { -+ backup_bb_reg_val[i] = -+ rtw89_phy_read32_mask(rtwdev, rtw8852a_backup_bb_regs[i], -+ MASKDWORD); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[IQK]backup bb reg : %x, value =%x\n", -+ rtw8852a_backup_bb_regs[i], backup_bb_reg_val[i]); -+ } -+} -+ -+static void _rfk_backup_rf_reg(struct rtw89_dev *rtwdev, u32 backup_rf_reg_val[], -+ u8 rf_path) -+{ -+ u32 i; -+ -+ for (i = 0; i < BACKUP_RF_REGS_NR; i++) { -+ backup_rf_reg_val[i] = -+ rtw89_read_rf(rtwdev, rf_path, -+ rtw8852a_backup_rf_regs[i], RFREG_MASK); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[IQK]backup rf S%d reg : %x, value =%x\n", rf_path, -+ rtw8852a_backup_rf_regs[i], backup_rf_reg_val[i]); -+ } -+} -+ -+static void _rfk_restore_bb_reg(struct rtw89_dev *rtwdev, -+ u32 backup_bb_reg_val[]) -+{ -+ u32 i; -+ -+ for (i = 0; i < BACKUP_BB_REGS_NR; i++) { -+ rtw89_phy_write32_mask(rtwdev, rtw8852a_backup_bb_regs[i], -+ MASKDWORD, backup_bb_reg_val[i]); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[IQK]restore bb reg : %x, value =%x\n", -+ rtw8852a_backup_bb_regs[i], backup_bb_reg_val[i]); -+ } -+} -+ -+static void _rfk_restore_rf_reg(struct rtw89_dev *rtwdev, -+ u32 backup_rf_reg_val[], u8 rf_path) -+{ -+ u32 i; -+ -+ for (i = 0; i < BACKUP_RF_REGS_NR; i++) { -+ rtw89_write_rf(rtwdev, rf_path, rtw8852a_backup_rf_regs[i], -+ RFREG_MASK, backup_rf_reg_val[i]); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[IQK]restore rf S%d reg: %x, value =%x\n", rf_path, -+ rtw8852a_backup_rf_regs[i], backup_rf_reg_val[i]); -+ } -+} -+ -+static void _wait_rx_mode(struct rtw89_dev *rtwdev, u8 kpath) -+{ -+ u8 path; -+ u32 rf_mode; -+ int ret; -+ -+ for (path = 0; path < RF_PATH_MAX; path++) { -+ if (!(kpath & BIT(path))) -+ continue; -+ -+ ret = read_poll_timeout_atomic(rtw89_read_rf, rf_mode, rf_mode != 2, -+ 2, 5000, false, rtwdev, path, 0x00, -+ RR_MOD_MASK); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[RFK] Wait S%d to Rx mode!! (ret = %d)\n", -+ path, ret); -+ } -+} -+ -+static void _dack_dump(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_dack_info *dack = &rtwdev->dack; -+ u8 i; -+ u8 t; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DACK]S0 ADC_DCK ic = 0x%x, qc = 0x%x\n", -+ dack->addck_d[0][0], dack->addck_d[0][1]); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DACK]S1 ADC_DCK ic = 0x%x, qc = 0x%x\n", -+ dack->addck_d[1][0], dack->addck_d[1][1]); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DACK]S0 DAC_DCK ic = 0x%x, qc = 0x%x\n", -+ dack->dadck_d[0][0], dack->dadck_d[0][1]); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DACK]S1 DAC_DCK ic = 0x%x, qc = 0x%x\n", -+ dack->dadck_d[1][0], dack->dadck_d[1][1]); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DACK]S0 biask ic = 0x%x, qc = 0x%x\n", -+ dack->biask_d[0][0], dack->biask_d[0][1]); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DACK]S1 biask ic = 0x%x, qc = 0x%x\n", -+ dack->biask_d[1][0], dack->biask_d[1][1]); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S0 MSBK ic:\n"); -+ for (i = 0; i < RTW89_DACK_MSBK_NR; i++) { -+ t = dack->msbk_d[0][0][i]; -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]0x%x\n", t); -+ } -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S0 MSBK qc:\n"); -+ for (i = 0; i < RTW89_DACK_MSBK_NR; i++) { -+ t = dack->msbk_d[0][1][i]; -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]0x%x\n", t); -+ } -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S1 MSBK ic:\n"); -+ for (i = 0; i < RTW89_DACK_MSBK_NR; i++) { -+ t = dack->msbk_d[1][0][i]; -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]0x%x\n", t); -+ } -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S1 MSBK qc:\n"); -+ for (i = 0; i < RTW89_DACK_MSBK_NR; i++) { -+ t = dack->msbk_d[1][1][i]; -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]0x%x\n", t); -+ } -+} -+ -+static void _afe_init(struct rtw89_dev *rtwdev) -+{ -+ rtw89_rfk_parser(rtwdev, &rtw8852a_rfk_afe_init_defs_tbl); -+} -+ -+static void _addck_backup(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_dack_info *dack = &rtwdev->dack; -+ -+ rtw89_phy_write32_clr(rtwdev, R_S0_RXDC2, B_S0_RXDC2_SEL); -+ dack->addck_d[0][0] = (u16)rtw89_phy_read32_mask(rtwdev, R_S0_ADDCK, -+ B_S0_ADDCK_Q); -+ dack->addck_d[0][1] = (u16)rtw89_phy_read32_mask(rtwdev, R_S0_ADDCK, -+ B_S0_ADDCK_I); -+ -+ rtw89_phy_write32_clr(rtwdev, R_S1_RXDC2, B_S1_RXDC2_SEL); -+ dack->addck_d[1][0] = (u16)rtw89_phy_read32_mask(rtwdev, R_S1_ADDCK, -+ B_S1_ADDCK_Q); -+ dack->addck_d[1][1] = (u16)rtw89_phy_read32_mask(rtwdev, R_S1_ADDCK, -+ B_S1_ADDCK_I); -+} -+ -+static void _addck_reload(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_dack_info *dack = &rtwdev->dack; -+ -+ rtw89_phy_write32_mask(rtwdev, R_S0_RXDC, B_S0_RXDC_I, dack->addck_d[0][0]); -+ rtw89_phy_write32_mask(rtwdev, R_S0_RXDC2, B_S0_RXDC2_Q2, -+ (dack->addck_d[0][1] >> 6)); -+ rtw89_phy_write32_mask(rtwdev, R_S0_RXDC, B_S0_RXDC_Q, -+ (dack->addck_d[0][1] & 0x3f)); -+ rtw89_phy_write32_set(rtwdev, R_S0_RXDC2, B_S0_RXDC2_MEN); -+ rtw89_phy_write32_mask(rtwdev, R_S1_RXDC, B_S1_RXDC_I, dack->addck_d[1][0]); -+ rtw89_phy_write32_mask(rtwdev, R_S1_RXDC2, B_S1_RXDC2_Q2, -+ (dack->addck_d[1][1] >> 6)); -+ rtw89_phy_write32_mask(rtwdev, R_S1_RXDC, B_S1_RXDC_Q, -+ (dack->addck_d[1][1] & 0x3f)); -+ rtw89_phy_write32_set(rtwdev, R_S1_RXDC2, B_S1_RXDC2_EN); -+} -+ -+static void _dack_backup_s0(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_dack_info *dack = &rtwdev->dack; -+ u8 i; -+ -+ rtw89_phy_write32_set(rtwdev, R_S0_DACKI, B_S0_DACKI_EN); -+ rtw89_phy_write32_set(rtwdev, R_S0_DACKQ, B_S0_DACKQ_EN); -+ rtw89_phy_write32_set(rtwdev, R_P0_NRBW, B_P0_NRBW_DBG); -+ -+ for (i = 0; i < RTW89_DACK_MSBK_NR; i++) { -+ rtw89_phy_write32_mask(rtwdev, R_S0_DACKI, B_S0_DACKI_AR, i); -+ dack->msbk_d[0][0][i] = -+ (u8)rtw89_phy_read32_mask(rtwdev, R_S0_DACKI7, B_S0_DACKI7_K); -+ rtw89_phy_write32_mask(rtwdev, R_S0_DACKQ, B_S0_DACKQ_AR, i); -+ dack->msbk_d[0][1][i] = -+ (u8)rtw89_phy_read32_mask(rtwdev, R_S0_DACKQ7, B_S0_DACKQ7_K); -+ } -+ dack->biask_d[0][0] = (u16)rtw89_phy_read32_mask(rtwdev, R_S0_DACKI2, -+ B_S0_DACKI2_K); -+ dack->biask_d[0][1] = (u16)rtw89_phy_read32_mask(rtwdev, R_S0_DACKQ2, -+ B_S0_DACKQ2_K); -+ dack->dadck_d[0][0] = (u8)rtw89_phy_read32_mask(rtwdev, R_S0_DACKI8, -+ B_S0_DACKI8_K) - 8; -+ dack->dadck_d[0][1] = (u8)rtw89_phy_read32_mask(rtwdev, R_S0_DACKQ8, -+ B_S0_DACKQ8_K) - 8; -+} -+ -+static void _dack_backup_s1(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_dack_info *dack = &rtwdev->dack; -+ u8 i; -+ -+ rtw89_phy_write32_set(rtwdev, R_S1_DACKI, B_S1_DACKI_EN); -+ rtw89_phy_write32_set(rtwdev, R_S1_DACKQ, B_S1_DACKQ_EN); -+ rtw89_phy_write32_set(rtwdev, R_P1_DBGMOD, B_P1_DBGMOD_ON); -+ -+ for (i = 0; i < RTW89_DACK_MSBK_NR; i++) { -+ rtw89_phy_write32_mask(rtwdev, R_S1_DACKI, B_S1_DACKI_AR, i); -+ dack->msbk_d[1][0][i] = -+ (u8)rtw89_phy_read32_mask(rtwdev, R_S1_DACKI7, B_S1_DACKI_K); -+ rtw89_phy_write32_mask(rtwdev, R_S1_DACKQ, B_S1_DACKQ_AR, i); -+ dack->msbk_d[1][1][i] = -+ (u8)rtw89_phy_read32_mask(rtwdev, R_S1_DACKQ7, B_S1_DACKQ7_K); -+ } -+ dack->biask_d[1][0] = -+ (u16)rtw89_phy_read32_mask(rtwdev, R_S1_DACKI2, B_S1_DACKI2_K); -+ dack->biask_d[1][1] = -+ (u16)rtw89_phy_read32_mask(rtwdev, R_S1_DACKQ2, B_S1_DACKQ2_K); -+ dack->dadck_d[1][0] = -+ (u8)rtw89_phy_read32_mask(rtwdev, R_S1_DACKI8, B_S1_DACKI8_K) - 8; -+ dack->dadck_d[1][1] = -+ (u8)rtw89_phy_read32_mask(rtwdev, R_S1_DACKQ8, B_S1_DACKQ8_K) - 8; -+} -+ -+static void _dack_reload_by_path(struct rtw89_dev *rtwdev, -+ enum rtw89_rf_path path, u8 index) -+{ -+ struct rtw89_dack_info *dack = &rtwdev->dack; -+ u32 tmp = 0, tmp_offset, tmp_reg; -+ u8 i; -+ u32 idx_offset, path_offset; -+ -+ if (index == 0) -+ idx_offset = 0; -+ else -+ idx_offset = 0x50; -+ -+ if (path == RF_PATH_A) -+ path_offset = 0; -+ else -+ path_offset = 0x2000; -+ -+ tmp_offset = idx_offset + path_offset; -+ /* msbk_d: 15/14/13/12 */ -+ tmp = 0x0; -+ for (i = 0; i < RTW89_DACK_MSBK_NR / 4; i++) -+ tmp |= dack->msbk_d[path][index][i + 12] << (i * 8); -+ tmp_reg = 0x5e14 + tmp_offset; -+ rtw89_phy_write32(rtwdev, tmp_reg, tmp); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]0x%x=0x%x\n", tmp_reg, -+ rtw89_phy_read32_mask(rtwdev, tmp_reg, MASKDWORD)); -+ /* msbk_d: 11/10/9/8 */ -+ tmp = 0x0; -+ for (i = 0; i < RTW89_DACK_MSBK_NR / 4; i++) -+ tmp |= dack->msbk_d[path][index][i + 8] << (i * 8); -+ tmp_reg = 0x5e18 + tmp_offset; -+ rtw89_phy_write32(rtwdev, tmp_reg, tmp); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]0x%x=0x%x\n", tmp_reg, -+ rtw89_phy_read32_mask(rtwdev, tmp_reg, MASKDWORD)); -+ /* msbk_d: 7/6/5/4 */ -+ tmp = 0x0; -+ for (i = 0; i < RTW89_DACK_MSBK_NR / 4; i++) -+ tmp |= dack->msbk_d[path][index][i + 4] << (i * 8); -+ tmp_reg = 0x5e1c + tmp_offset; -+ rtw89_phy_write32(rtwdev, tmp_reg, tmp); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]0x%x=0x%x\n", tmp_reg, -+ rtw89_phy_read32_mask(rtwdev, tmp_reg, MASKDWORD)); -+ /* msbk_d: 3/2/1/0 */ -+ tmp = 0x0; -+ for (i = 0; i < RTW89_DACK_MSBK_NR / 4; i++) -+ tmp |= dack->msbk_d[path][index][i] << (i * 8); -+ tmp_reg = 0x5e20 + tmp_offset; -+ rtw89_phy_write32(rtwdev, tmp_reg, tmp); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]0x%x=0x%x\n", tmp_reg, -+ rtw89_phy_read32_mask(rtwdev, tmp_reg, MASKDWORD)); -+ /* dadak_d/biask_d */ -+ tmp = 0x0; -+ tmp = (dack->biask_d[path][index] << 22) | -+ (dack->dadck_d[path][index] << 14); -+ tmp_reg = 0x5e24 + tmp_offset; -+ rtw89_phy_write32(rtwdev, tmp_reg, tmp); -+} -+ -+static void _dack_reload(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) -+{ -+ u8 i; -+ -+ for (i = 0; i < 2; i++) -+ _dack_reload_by_path(rtwdev, path, i); -+ -+ rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, -+ &rtw8852a_rfk_dack_reload_defs_a_tbl, -+ &rtw8852a_rfk_dack_reload_defs_b_tbl); -+} -+ -+#define ADDC_T_AVG 100 -+static void _check_addc(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) -+{ -+ s32 dc_re = 0, dc_im = 0; -+ u32 tmp; -+ u32 i; -+ -+ rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, -+ &rtw8852a_rfk_check_addc_defs_a_tbl, -+ &rtw8852a_rfk_check_addc_defs_b_tbl); -+ -+ for (i = 0; i < ADDC_T_AVG; i++) { -+ tmp = rtw89_phy_read32_mask(rtwdev, R_DBG32_D, MASKDWORD); -+ dc_re += sign_extend32(FIELD_GET(0xfff000, tmp), 11); -+ dc_im += sign_extend32(FIELD_GET(0xfff, tmp), 11); -+ } -+ -+ dc_re /= ADDC_T_AVG; -+ dc_im /= ADDC_T_AVG; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DACK]S%d,dc_re = 0x%x,dc_im =0x%x\n", path, dc_re, dc_im); -+} -+ -+static void _addck(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_dack_info *dack = &rtwdev->dack; -+ u32 val; -+ int ret; -+ -+ /* S0 */ -+ rtw89_rfk_parser(rtwdev, &rtw8852a_rfk_addck_reset_defs_a_tbl); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]before S0 ADDCK\n"); -+ _check_addc(rtwdev, RF_PATH_A); -+ -+ rtw89_rfk_parser(rtwdev, &rtw8852a_rfk_addck_trigger_defs_a_tbl); -+ -+ ret = read_poll_timeout_atomic(rtw89_phy_read32_mask, val, val, 1, 10000, -+ false, rtwdev, 0x1e00, BIT(0)); -+ if (ret) { -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S0 ADDCK timeout\n"); -+ dack->addck_timeout[0] = true; -+ } -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]ADDCK ret = %d\n", ret); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]after S0 ADDCK\n"); -+ _check_addc(rtwdev, RF_PATH_A); -+ -+ rtw89_rfk_parser(rtwdev, &rtw8852a_rfk_addck_restore_defs_a_tbl); -+ -+ /* S1 */ -+ rtw89_rfk_parser(rtwdev, &rtw8852a_rfk_addck_reset_defs_b_tbl); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]before S1 ADDCK\n"); -+ _check_addc(rtwdev, RF_PATH_B); -+ -+ rtw89_rfk_parser(rtwdev, &rtw8852a_rfk_addck_trigger_defs_b_tbl); -+ -+ ret = read_poll_timeout_atomic(rtw89_phy_read32_mask, val, val, 1, 10000, -+ false, rtwdev, 0x3e00, BIT(0)); -+ if (ret) { -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S1 ADDCK timeout\n"); -+ dack->addck_timeout[1] = true; -+ } -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]ADDCK ret = %d\n", ret); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]after S1 ADDCK\n"); -+ _check_addc(rtwdev, RF_PATH_B); -+ -+ rtw89_rfk_parser(rtwdev, &rtw8852a_rfk_addck_restore_defs_b_tbl); -+} -+ -+static void _check_dadc(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) -+{ -+ rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, -+ &rtw8852a_rfk_check_dadc_defs_f_a_tbl, -+ &rtw8852a_rfk_check_dadc_defs_f_b_tbl); -+ -+ _check_addc(rtwdev, path); -+ -+ rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, -+ &rtw8852a_rfk_check_dadc_defs_r_a_tbl, -+ &rtw8852a_rfk_check_dadc_defs_r_b_tbl); -+} -+ -+static void _dack_s0(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_dack_info *dack = &rtwdev->dack; -+ u32 val; -+ int ret; -+ -+ rtw89_rfk_parser(rtwdev, &rtw8852a_rfk_dack_defs_f_a_tbl); -+ -+ ret = read_poll_timeout_atomic(rtw89_phy_read32_mask, val, val, 1, 10000, -+ false, rtwdev, 0x5e28, BIT(15)); -+ ret |= read_poll_timeout_atomic(rtw89_phy_read32_mask, val, val, 1, 10000, -+ false, rtwdev, 0x5e78, BIT(15)); -+ if (ret) { -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S0 MSBK timeout\n"); -+ dack->msbk_timeout[0] = true; -+ } -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]DACK ret = %d\n", ret); -+ -+ rtw89_rfk_parser(rtwdev, &rtw8852a_rfk_dack_defs_m_a_tbl); -+ -+ ret = read_poll_timeout_atomic(rtw89_phy_read32_mask, val, val, 1, 10000, -+ false, rtwdev, 0x5e48, BIT(17)); -+ ret |= read_poll_timeout_atomic(rtw89_phy_read32_mask, val, val, 1, 10000, -+ false, rtwdev, 0x5e98, BIT(17)); -+ if (ret) { -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S0 DADACK timeout\n"); -+ dack->dadck_timeout[0] = true; -+ } -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]DACK ret = %d\n", ret); -+ -+ rtw89_rfk_parser(rtwdev, &rtw8852a_rfk_dack_defs_r_a_tbl); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]after S0 DADCK\n"); -+ _check_dadc(rtwdev, RF_PATH_A); -+ -+ _dack_backup_s0(rtwdev); -+ _dack_reload(rtwdev, RF_PATH_A); -+ -+ rtw89_phy_write32_clr(rtwdev, R_P0_NRBW, B_P0_NRBW_DBG); -+} -+ -+static void _dack_s1(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_dack_info *dack = &rtwdev->dack; -+ u32 val; -+ int ret; -+ -+ rtw89_rfk_parser(rtwdev, &rtw8852a_rfk_dack_defs_f_b_tbl); -+ -+ ret = read_poll_timeout_atomic(rtw89_phy_read32_mask, val, val, 1, 10000, -+ false, rtwdev, 0x7e28, BIT(15)); -+ ret |= read_poll_timeout_atomic(rtw89_phy_read32_mask, val, val, 1, 10000, -+ false, rtwdev, 0x7e78, BIT(15)); -+ if (ret) { -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S1 MSBK timeout\n"); -+ dack->msbk_timeout[1] = true; -+ } -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]DACK ret = %d\n", ret); -+ -+ rtw89_rfk_parser(rtwdev, &rtw8852a_rfk_dack_defs_m_b_tbl); -+ -+ ret = read_poll_timeout_atomic(rtw89_phy_read32_mask, val, val, 1, 10000, -+ false, rtwdev, 0x7e48, BIT(17)); -+ ret |= read_poll_timeout_atomic(rtw89_phy_read32_mask, val, val, 1, 10000, -+ false, rtwdev, 0x7e98, BIT(17)); -+ if (ret) { -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S1 DADCK timeout\n"); -+ dack->dadck_timeout[1] = true; -+ } -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]DACK ret = %d\n", ret); -+ -+ rtw89_rfk_parser(rtwdev, &rtw8852a_rfk_dack_defs_r_b_tbl); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]after S1 DADCK\n"); -+ _check_dadc(rtwdev, RF_PATH_B); -+ -+ _dack_backup_s1(rtwdev); -+ _dack_reload(rtwdev, RF_PATH_B); -+ -+ rtw89_phy_write32_clr(rtwdev, R_P1_DBGMOD, B_P1_DBGMOD_ON); -+} -+ -+static void _dack(struct rtw89_dev *rtwdev) -+{ -+ _dack_s0(rtwdev); -+ _dack_s1(rtwdev); -+} -+ -+static void _dac_cal(struct rtw89_dev *rtwdev, bool force) -+{ -+ struct rtw89_dack_info *dack = &rtwdev->dack; -+ u32 rf0_0, rf1_0; -+ u8 phy_map = rtw89_btc_phymap(rtwdev, RTW89_PHY_0, RF_AB); -+ -+ dack->dack_done = false; -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]DACK b\n"); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]DACK start!!!\n"); -+ rf0_0 = rtw89_read_rf(rtwdev, RF_PATH_A, RR_MOD, RFREG_MASK); -+ rf1_0 = rtw89_read_rf(rtwdev, RF_PATH_B, RR_MOD, RFREG_MASK); -+ _afe_init(rtwdev); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_RSV1, RR_RSV1_RST, 0x0); -+ rtw89_write_rf(rtwdev, RF_PATH_B, RR_RSV1, RR_RSV1_RST, 0x0); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_MOD, RFREG_MASK, 0x30001); -+ rtw89_write_rf(rtwdev, RF_PATH_B, RR_MOD, RFREG_MASK, 0x30001); -+ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_DACK, BTC_WRFK_ONESHOT_START); -+ _addck(rtwdev); -+ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_DACK, BTC_WRFK_ONESHOT_STOP); -+ _addck_backup(rtwdev); -+ _addck_reload(rtwdev); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_MOD, RFREG_MASK, 0x40001); -+ rtw89_write_rf(rtwdev, RF_PATH_B, RR_MOD, RFREG_MASK, 0x40001); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_MODOPT, RFREG_MASK, 0x0); -+ rtw89_write_rf(rtwdev, RF_PATH_B, RR_MODOPT, RFREG_MASK, 0x0); -+ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_DACK, BTC_WRFK_ONESHOT_START); -+ _dack(rtwdev); -+ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_DACK, BTC_WRFK_ONESHOT_STOP); -+ _dack_dump(rtwdev); -+ dack->dack_done = true; -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_MOD, RFREG_MASK, rf0_0); -+ rtw89_write_rf(rtwdev, RF_PATH_B, RR_MOD, RFREG_MASK, rf1_0); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_RSV1, RR_RSV1_RST, 0x1); -+ rtw89_write_rf(rtwdev, RF_PATH_B, RR_RSV1, RR_RSV1_RST, 0x1); -+ dack->dack_cnt++; -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]DACK finish!!!\n"); -+} -+ -+#define RTW8852A_NCTL_VER 0xd -+#define RTW8852A_IQK_VER 0x2a -+#define RTW8852A_IQK_SS 2 -+#define RTW8852A_IQK_THR_REK 8 -+#define RTW8852A_IQK_CFIR_GROUP_NR 4 -+ -+enum rtw8852a_iqk_type { -+ ID_TXAGC, -+ ID_FLOK_COARSE, -+ ID_FLOK_FINE, -+ ID_TXK, -+ ID_RXAGC, -+ ID_RXK, -+ ID_NBTXK, -+ ID_NBRXK, -+}; -+ -+static void _iqk_read_fft_dbcc0(struct rtw89_dev *rtwdev, u8 path) -+{ -+ u8 i = 0x0; -+ u32 fft[6] = {0x0}; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]===>%s\n", __func__); -+ rtw89_phy_write32_mask(rtwdev, R_KIP_RPT1, MASKDWORD, 0x00160000); -+ fft[0] = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, MASKDWORD); -+ rtw89_phy_write32_mask(rtwdev, R_KIP_RPT1, MASKDWORD, 0x00170000); -+ fft[1] = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, MASKDWORD); -+ rtw89_phy_write32_mask(rtwdev, R_KIP_RPT1, MASKDWORD, 0x00180000); -+ fft[2] = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, MASKDWORD); -+ rtw89_phy_write32_mask(rtwdev, R_KIP_RPT1, MASKDWORD, 0x00190000); -+ fft[3] = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, MASKDWORD); -+ rtw89_phy_write32_mask(rtwdev, R_KIP_RPT1, MASKDWORD, 0x001a0000); -+ fft[4] = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, MASKDWORD); -+ rtw89_phy_write32_mask(rtwdev, R_KIP_RPT1, MASKDWORD, 0x001b0000); -+ fft[5] = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, MASKDWORD); -+ for (i = 0; i < 6; i++) -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x,fft[%x]= %x\n", -+ path, i, fft[i]); -+} -+ -+static void _iqk_read_xym_dbcc0(struct rtw89_dev *rtwdev, u8 path) -+{ -+ u8 i = 0x0; -+ u32 tmp = 0x0; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]===>%s\n", __func__); -+ rtw89_phy_write32_mask(rtwdev, R_NCTL_CFG, B_NCTL_CFG_SPAGE, path); -+ rtw89_phy_write32_mask(rtwdev, R_IQK_DIF, B_IQK_DIF_TRX, 0x1); -+ -+ for (i = 0x0; i < 0x18; i++) { -+ rtw89_phy_write32_mask(rtwdev, R_NCTL_N2, MASKDWORD, 0x000000c0 + i); -+ rtw89_phy_write32_clr(rtwdev, R_NCTL_N2, MASKDWORD); -+ tmp = rtw89_phy_read32_mask(rtwdev, R_TXIQC + (path << 8), MASKDWORD); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, 0x8%lx38 = %x\n", -+ path, BIT(path), tmp); -+ udelay(1); -+ } -+ rtw89_phy_write32_clr(rtwdev, R_IQK_DIF, B_IQK_DIF_TRX); -+ rtw89_phy_write32_mask(rtwdev, R_TXIQC + (path << 8), MASKDWORD, 0x40000000); -+ rtw89_phy_write32_mask(rtwdev, R_NCTL_N2, MASKDWORD, 0x80010100); -+ udelay(1); -+} -+ -+static void _iqk_read_txcfir_dbcc0(struct rtw89_dev *rtwdev, u8 path, -+ u8 group) -+{ -+ static const u32 base_addrs[RTW8852A_IQK_SS][RTW8852A_IQK_CFIR_GROUP_NR] = { -+ {0x8f20, 0x8f54, 0x8f88, 0x8fbc}, -+ {0x9320, 0x9354, 0x9388, 0x93bc}, -+ }; -+ u8 idx = 0x0; -+ u32 tmp = 0x0; -+ u32 base_addr; -+ -+ if (path >= RTW8852A_IQK_SS) { -+ rtw89_warn(rtwdev, "cfir path %d out of range\n", path); -+ return; -+ } -+ if (group >= RTW8852A_IQK_CFIR_GROUP_NR) { -+ rtw89_warn(rtwdev, "cfir group %d out of range\n", group); -+ return; -+ } -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]===>%s\n", __func__); -+ rtw89_phy_write32_mask(rtwdev, R_W_COEF + (path << 8), MASKDWORD, 0x00000001); -+ -+ base_addr = base_addrs[path][group]; -+ -+ for (idx = 0; idx < 0x0d; idx++) { -+ tmp = rtw89_phy_read32_mask(rtwdev, base_addr + (idx << 2), MASKDWORD); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[IQK] %x = %x\n", -+ base_addr + (idx << 2), tmp); -+ } -+ -+ if (path == 0x0) { -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]\n"); -+ tmp = rtw89_phy_read32_mask(rtwdev, R_TXCFIR_P0C0, MASKDWORD); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] 0x8f50 = %x\n", tmp); -+ tmp = rtw89_phy_read32_mask(rtwdev, R_TXCFIR_P0C1, MASKDWORD); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] 0x8f84 = %x\n", tmp); -+ tmp = rtw89_phy_read32_mask(rtwdev, R_TXCFIR_P0C2, MASKDWORD); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] 0x8fb8 = %x\n", tmp); -+ tmp = rtw89_phy_read32_mask(rtwdev, R_TXCFIR_P0C3, MASKDWORD); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] 0x8fec = %x\n", tmp); -+ } else { -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]\n"); -+ tmp = rtw89_phy_read32_mask(rtwdev, R_TXCFIR_P1C0, MASKDWORD); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] 0x9350 = %x\n", tmp); -+ tmp = rtw89_phy_read32_mask(rtwdev, R_TXCFIR_P1C1, MASKDWORD); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] 0x9384 = %x\n", tmp); -+ tmp = rtw89_phy_read32_mask(rtwdev, R_TXCFIR_P1C2, MASKDWORD); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] 0x93b8 = %x\n", tmp); -+ tmp = rtw89_phy_read32_mask(rtwdev, R_TXCFIR_P1C3, MASKDWORD); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] 0x93ec = %x\n", tmp); -+ } -+ rtw89_phy_write32_clr(rtwdev, R_W_COEF + (path << 8), MASKDWORD); -+ rtw89_phy_write32_mask(rtwdev, R_KIP_RPT + (path << 8), B_KIP_RPT_SEL, 0xc); -+ udelay(1); -+ tmp = rtw89_phy_read32_mask(rtwdev, R_RPT_PER + (path << 8), MASKDWORD); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, 0x8%lxfc = %x\n", path, -+ BIT(path), tmp); -+} -+ -+static void _iqk_read_rxcfir_dbcc0(struct rtw89_dev *rtwdev, u8 path, -+ u8 group) -+{ -+ static const u32 base_addrs[RTW8852A_IQK_SS][RTW8852A_IQK_CFIR_GROUP_NR] = { -+ {0x8d00, 0x8d44, 0x8d88, 0x8dcc}, -+ {0x9100, 0x9144, 0x9188, 0x91cc}, -+ }; -+ u8 idx = 0x0; -+ u32 tmp = 0x0; -+ u32 base_addr; -+ -+ if (path >= RTW8852A_IQK_SS) { -+ rtw89_warn(rtwdev, "cfir path %d out of range\n", path); -+ return; -+ } -+ if (group >= RTW8852A_IQK_CFIR_GROUP_NR) { -+ rtw89_warn(rtwdev, "cfir group %d out of range\n", group); -+ return; -+ } -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]===>%s\n", __func__); -+ rtw89_phy_write32_mask(rtwdev, R_W_COEF + (path << 8), MASKDWORD, 0x00000001); -+ -+ base_addr = base_addrs[path][group]; -+ for (idx = 0; idx < 0x10; idx++) { -+ tmp = rtw89_phy_read32_mask(rtwdev, base_addr + (idx << 2), MASKDWORD); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[IQK]%x = %x\n", -+ base_addr + (idx << 2), tmp); -+ } -+ -+ if (path == 0x0) { -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]\n"); -+ tmp = rtw89_phy_read32_mask(rtwdev, R_RXCFIR_P0C0, MASKDWORD); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] 0x8d40 = %x\n", tmp); -+ tmp = rtw89_phy_read32_mask(rtwdev, R_RXCFIR_P0C1, MASKDWORD); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] 0x8d84 = %x\n", tmp); -+ tmp = rtw89_phy_read32_mask(rtwdev, R_RXCFIR_P0C2, MASKDWORD); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] 0x8dc8 = %x\n", tmp); -+ tmp = rtw89_phy_read32_mask(rtwdev, R_RXCFIR_P0C3, MASKDWORD); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] 0x8e0c = %x\n", tmp); -+ } else { -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]\n"); -+ tmp = rtw89_phy_read32_mask(rtwdev, R_RXCFIR_P1C0, MASKDWORD); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] 0x9140 = %x\n", tmp); -+ tmp = rtw89_phy_read32_mask(rtwdev, R_RXCFIR_P1C1, MASKDWORD); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] 0x9184 = %x\n", tmp); -+ tmp = rtw89_phy_read32_mask(rtwdev, R_RXCFIR_P1C2, MASKDWORD); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] 0x91c8 = %x\n", tmp); -+ tmp = rtw89_phy_read32_mask(rtwdev, R_RXCFIR_P1C3, MASKDWORD); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] 0x920c = %x\n", tmp); -+ } -+ rtw89_phy_write32_clr(rtwdev, R_W_COEF + (path << 8), MASKDWORD); -+ rtw89_phy_write32_mask(rtwdev, R_KIP_RPT + (path << 8), B_KIP_RPT_SEL, 0xd); -+ tmp = rtw89_phy_read32_mask(rtwdev, R_RPT_PER + (path << 8), MASKDWORD); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, 0x8%lxfc = %x\n", path, -+ BIT(path), tmp); -+} -+ -+static void _iqk_sram(struct rtw89_dev *rtwdev, u8 path) -+{ -+ u32 tmp = 0x0; -+ u32 i = 0x0; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]===>%s\n", __func__); -+ rtw89_phy_write32_mask(rtwdev, R_KIP_RPT1, MASKDWORD, 0x00020000); -+ rtw89_phy_write32_mask(rtwdev, R_SRAM_IQRX2, MASKDWORD, 0x00000080); -+ rtw89_phy_write32_mask(rtwdev, R_SRAM_IQRX, MASKDWORD, 0x00010000); -+ rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, B_IQK_DIF4_TXT, 0x009); -+ -+ for (i = 0; i <= 0x9f; i++) { -+ rtw89_phy_write32_mask(rtwdev, R_SRAM_IQRX, MASKDWORD, 0x00010000 + i); -+ tmp = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, B_PRT_COM_DCI); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]0x%x\n", tmp); -+ } -+ -+ for (i = 0; i <= 0x9f; i++) { -+ rtw89_phy_write32_mask(rtwdev, R_SRAM_IQRX, MASKDWORD, 0x00010000 + i); -+ tmp = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, B_PRT_COM_DCQ); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]0x%x\n", tmp); -+ } -+ rtw89_phy_write32_clr(rtwdev, R_SRAM_IQRX2, MASKDWORD); -+ rtw89_phy_write32_clr(rtwdev, R_SRAM_IQRX, MASKDWORD); -+} -+ -+static void _iqk_rxk_setting(struct rtw89_dev *rtwdev, u8 path) -+{ -+ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; -+ u32 tmp = 0x0; -+ -+ rtw89_phy_write32_set(rtwdev, R_P0_NRBW + (path << 13), B_P0_NRBW_DBG); -+ rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15, 0x3); -+ rtw89_phy_write32_mask(rtwdev, R_ANAPAR, B_ANAPAR_15, 0xa041); -+ udelay(1); -+ rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15_H2, 0x3); -+ rtw89_phy_write32_mask(rtwdev, R_ANAPAR, B_ANAPAR_FLTRST, 0x0); -+ udelay(1); -+ rtw89_phy_write32_mask(rtwdev, R_ANAPAR, B_ANAPAR_FLTRST, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15_H2, 0x0); -+ udelay(1); -+ rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_RST, 0x0303); -+ rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_RST, 0x0000); -+ -+ switch (iqk_info->iqk_band[path]) { -+ case RTW89_BAND_2G: -+ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, RR_MOD_V_RXK2); -+ rtw89_write_rf(rtwdev, path, RR_RXK, RR_RXK_SEL2G, 0x1); -+ break; -+ case RTW89_BAND_5G: -+ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, RR_MOD_V_RXK2); -+ rtw89_write_rf(rtwdev, path, RR_WLSEL, RR_WLSEL_AG, 0x5); -+ rtw89_write_rf(rtwdev, path, RR_RXK, RR_RXK_SEL5G, 0x1); -+ break; -+ default: -+ break; -+ } -+ tmp = rtw89_read_rf(rtwdev, path, RR_CFGCH, RFREG_MASK); -+ rtw89_write_rf(rtwdev, path, RR_RSV4, RFREG_MASK, tmp); -+ rtw89_write_rf(rtwdev, path, RR_RXKPLL, RR_RXKPLL_OFF, 0x13); -+ rtw89_write_rf(rtwdev, path, RR_RXKPLL, RR_RXKPLL_POW, 0x0); -+ rtw89_write_rf(rtwdev, path, RR_RXKPLL, RR_RXKPLL_POW, 0x1); -+ fsleep(128); -+} -+ -+static bool _iqk_check_cal(struct rtw89_dev *rtwdev, u8 path, u8 ktype) -+{ -+ u32 tmp; -+ u32 val; -+ int ret; -+ -+ ret = read_poll_timeout_atomic(rtw89_phy_read32_mask, val, val == 0x55, 1, 8200, -+ false, rtwdev, 0xbff8, MASKBYTE0); -+ if (ret) -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]IQK timeout!!!\n"); -+ rtw89_phy_write32_clr(rtwdev, R_NCTL_N1, MASKBYTE0); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, ret=%d\n", path, ret); -+ tmp = rtw89_phy_read32_mask(rtwdev, R_NCTL_RPT, MASKDWORD); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[IQK]S%x, type= %x, 0x8008 = 0x%x\n", path, ktype, tmp); -+ -+ return false; -+} -+ -+static bool _iqk_one_shot(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy_idx, u8 path, u8 ktype) -+{ -+ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; -+ bool fail = false; -+ u32 iqk_cmd = 0x0; -+ u8 phy_map = rtw89_btc_path_phymap(rtwdev, phy_idx, path); -+ u32 addr_rfc_ctl = 0x0; -+ -+ if (path == RF_PATH_A) -+ addr_rfc_ctl = 0x5864; -+ else -+ addr_rfc_ctl = 0x7864; -+ -+ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_IQK, BTC_WRFK_ONESHOT_START); -+ switch (ktype) { -+ case ID_TXAGC: -+ iqk_cmd = 0x008 | (1 << (4 + path)) | (path << 1); -+ break; -+ case ID_FLOK_COARSE: -+ rtw89_phy_write32_set(rtwdev, addr_rfc_ctl, 0x20000000); -+ rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, B_IQK_DIF4_TXT, 0x009); -+ iqk_cmd = 0x108 | (1 << (4 + path)); -+ break; -+ case ID_FLOK_FINE: -+ rtw89_phy_write32_set(rtwdev, addr_rfc_ctl, 0x20000000); -+ rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, B_IQK_DIF4_TXT, 0x009); -+ iqk_cmd = 0x208 | (1 << (4 + path)); -+ break; -+ case ID_TXK: -+ rtw89_phy_write32_clr(rtwdev, addr_rfc_ctl, 0x20000000); -+ rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, B_IQK_DIF4_TXT, 0x025); -+ iqk_cmd = 0x008 | (1 << (path + 4)) | -+ (((0x8 + iqk_info->iqk_bw[path]) & 0xf) << 8); -+ break; -+ case ID_RXAGC: -+ iqk_cmd = 0x508 | (1 << (4 + path)) | (path << 1); -+ break; -+ case ID_RXK: -+ rtw89_phy_write32_set(rtwdev, addr_rfc_ctl, 0x20000000); -+ rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, B_IQK_DIF4_RXT, 0x011); -+ iqk_cmd = 0x008 | (1 << (path + 4)) | -+ (((0xb + iqk_info->iqk_bw[path]) & 0xf) << 8); -+ break; -+ case ID_NBTXK: -+ rtw89_phy_write32_clr(rtwdev, addr_rfc_ctl, 0x20000000); -+ rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, B_IQK_DIF4_TXT, 0x025); -+ iqk_cmd = 0x308 | (1 << (4 + path)); -+ break; -+ case ID_NBRXK: -+ rtw89_phy_write32_set(rtwdev, addr_rfc_ctl, 0x20000000); -+ rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, B_IQK_DIF4_RXT, 0x011); -+ iqk_cmd = 0x608 | (1 << (4 + path)); -+ break; -+ default: -+ return false; -+ } -+ -+ rtw89_phy_write32_mask(rtwdev, R_NCTL_CFG, MASKDWORD, iqk_cmd + 1); -+ rtw89_phy_write32_set(rtwdev, R_DPK_CTL, B_DPK_CTL_EN); -+ udelay(1); -+ fail = _iqk_check_cal(rtwdev, path, ktype); -+ if (iqk_info->iqk_xym_en) -+ _iqk_read_xym_dbcc0(rtwdev, path); -+ if (iqk_info->iqk_fft_en) -+ _iqk_read_fft_dbcc0(rtwdev, path); -+ if (iqk_info->iqk_sram_en) -+ _iqk_sram(rtwdev, path); -+ if (iqk_info->iqk_cfir_en) { -+ if (ktype == ID_TXK) { -+ _iqk_read_txcfir_dbcc0(rtwdev, path, 0x0); -+ _iqk_read_txcfir_dbcc0(rtwdev, path, 0x1); -+ _iqk_read_txcfir_dbcc0(rtwdev, path, 0x2); -+ _iqk_read_txcfir_dbcc0(rtwdev, path, 0x3); -+ } else { -+ _iqk_read_rxcfir_dbcc0(rtwdev, path, 0x0); -+ _iqk_read_rxcfir_dbcc0(rtwdev, path, 0x1); -+ _iqk_read_rxcfir_dbcc0(rtwdev, path, 0x2); -+ _iqk_read_rxcfir_dbcc0(rtwdev, path, 0x3); -+ } -+ } -+ -+ rtw89_phy_write32_clr(rtwdev, addr_rfc_ctl, 0x20000000); -+ -+ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_IQK, BTC_WRFK_ONESHOT_STOP); -+ -+ return fail; -+} -+ -+static bool _rxk_group_sel(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy_idx, u8 path) -+{ -+ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; -+ static const u32 rxgn_a[4] = {0x18C, 0x1A0, 0x28C, 0x2A0}; -+ static const u32 attc2_a[4] = {0x0, 0x0, 0x07, 0x30}; -+ static const u32 attc1_a[4] = {0x7, 0x5, 0x1, 0x1}; -+ static const u32 rxgn_g[4] = {0x1CC, 0x1E0, 0x2CC, 0x2E0}; -+ static const u32 attc2_g[4] = {0x0, 0x15, 0x3, 0x1a}; -+ static const u32 attc1_g[4] = {0x1, 0x0, 0x1, 0x0}; -+ u8 gp = 0x0; -+ bool fail = false; -+ u32 rf0 = 0x0; -+ -+ for (gp = 0; gp < 0x4; gp++) { -+ switch (iqk_info->iqk_band[path]) { -+ case RTW89_BAND_2G: -+ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXG, rxgn_g[gp]); -+ rtw89_write_rf(rtwdev, path, RR_RXBB, RR_RXBB_C2G, attc2_g[gp]); -+ rtw89_write_rf(rtwdev, path, RR_RXBB, RR_RXBB_C1G, attc1_g[gp]); -+ break; -+ case RTW89_BAND_5G: -+ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXG, rxgn_a[gp]); -+ rtw89_write_rf(rtwdev, path, RR_RXA2, RR_RXA2_C2, attc2_a[gp]); -+ rtw89_write_rf(rtwdev, path, RR_RXA2, RR_RXA2_C1, attc1_a[gp]); -+ break; -+ default: -+ break; -+ } -+ rtw89_phy_write32_set(rtwdev, R_IQK_CFG, B_IQK_CFG_SET); -+ rf0 = rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK); -+ rtw89_phy_write32_mask(rtwdev, R_IQK_DIF2, B_IQK_DIF2_RXPI, -+ rf0 | iqk_info->syn1to2); -+ rtw89_phy_write32_mask(rtwdev, R_IQK_COM, MASKDWORD, 0x40010100); -+ rtw89_phy_write32_clr(rtwdev, R_IQK_RES + (path << 8), B_IQK_RES_RXCFIR); -+ rtw89_phy_write32_set(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_SEL); -+ rtw89_phy_write32_clr(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_G3); -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_GP, gp); -+ rtw89_phy_write32_mask(rtwdev, R_IOQ_IQK_DPK, B_IOQ_IQK_DPK_EN, 0x1); -+ rtw89_phy_write32_clr(rtwdev, R_NCTL_N1, B_NCTL_N1_CIP); -+ fail = _iqk_one_shot(rtwdev, phy_idx, path, ID_RXK); -+ rtw89_phy_write32_mask(rtwdev, R_IQKINF, BIT(16 + gp + path * 4), fail); -+ } -+ -+ switch (iqk_info->iqk_band[path]) { -+ case RTW89_BAND_2G: -+ rtw89_write_rf(rtwdev, path, RR_RXK, RR_RXK_SEL2G, 0x0); -+ rtw89_write_rf(rtwdev, path, RR_RXKPLL, RR_RXKPLL_POW, 0x0); -+ break; -+ case RTW89_BAND_5G: -+ rtw89_write_rf(rtwdev, path, RR_RXK, RR_RXK_SEL5G, 0x0); -+ rtw89_write_rf(rtwdev, path, RR_RXKPLL, RR_RXKPLL_POW, 0x0); -+ rtw89_write_rf(rtwdev, path, RR_WLSEL, RR_WLSEL_AG, 0x0); -+ break; -+ default: -+ break; -+ } -+ iqk_info->nb_rxcfir[path] = 0x40000000; -+ rtw89_phy_write32_mask(rtwdev, R_IQK_RES + (path << 8), -+ B_IQK_RES_RXCFIR, 0x5); -+ iqk_info->is_wb_rxiqk[path] = true; -+ return false; -+} -+ -+static bool _iqk_nbrxk(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy_idx, u8 path) -+{ -+ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; -+ u8 group = 0x0; -+ u32 rf0 = 0x0, tmp = 0x0; -+ u32 idxrxgain_a = 0x1a0; -+ u32 idxattc2_a = 0x00; -+ u32 idxattc1_a = 0x5; -+ u32 idxrxgain_g = 0x1E0; -+ u32 idxattc2_g = 0x15; -+ u32 idxattc1_g = 0x0; -+ bool fail = false; -+ -+ switch (iqk_info->iqk_band[path]) { -+ case RTW89_BAND_2G: -+ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXG, idxrxgain_g); -+ rtw89_write_rf(rtwdev, path, RR_RXBB, RR_RXBB_C2G, idxattc2_g); -+ rtw89_write_rf(rtwdev, path, RR_RXBB, RR_RXBB_C1G, idxattc1_g); -+ break; -+ case RTW89_BAND_5G: -+ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXG, idxrxgain_a); -+ rtw89_write_rf(rtwdev, path, RR_RXA2, RR_RXA2_C2, idxattc2_a); -+ rtw89_write_rf(rtwdev, path, RR_RXA2, RR_RXA2_C1, idxattc1_a); -+ break; -+ default: -+ break; -+ } -+ rtw89_phy_write32_set(rtwdev, R_IQK_CFG, B_IQK_CFG_SET); -+ rf0 = rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK); -+ rtw89_phy_write32_mask(rtwdev, R_IQK_DIF2, B_IQK_DIF2_RXPI, -+ rf0 | iqk_info->syn1to2); -+ rtw89_phy_write32_mask(rtwdev, R_IQK_COM, MASKDWORD, 0x40010100); -+ rtw89_phy_write32_clr(rtwdev, R_IQK_RES + (path << 8), B_IQK_RES_RXCFIR); -+ rtw89_phy_write32_set(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_SEL); -+ rtw89_phy_write32_clr(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_G3); -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), -+ B_CFIR_LUT_GP, group); -+ rtw89_phy_write32_set(rtwdev, R_IOQ_IQK_DPK, B_IOQ_IQK_DPK_EN); -+ rtw89_phy_write32_clr(rtwdev, R_NCTL_N1, B_NCTL_N1_CIP); -+ fail = _iqk_one_shot(rtwdev, phy_idx, path, ID_NBRXK); -+ -+ switch (iqk_info->iqk_band[path]) { -+ case RTW89_BAND_2G: -+ rtw89_write_rf(rtwdev, path, RR_RXK, RR_RXK_SEL2G, 0x0); -+ rtw89_write_rf(rtwdev, path, RR_RXKPLL, RR_RXKPLL_POW, 0x0); -+ break; -+ case RTW89_BAND_5G: -+ rtw89_write_rf(rtwdev, path, RR_RXK, RR_RXK_SEL5G, 0x0); -+ rtw89_write_rf(rtwdev, path, RR_RXKPLL, RR_RXKPLL_POW, 0x0); -+ rtw89_write_rf(rtwdev, path, RR_WLSEL, RR_WLSEL_AG, 0x0); -+ break; -+ default: -+ break; -+ } -+ if (!fail) { -+ tmp = rtw89_phy_read32_mask(rtwdev, R_RXIQC + (path << 8), MASKDWORD); -+ iqk_info->nb_rxcfir[path] = tmp | 0x2; -+ } else { -+ iqk_info->nb_rxcfir[path] = 0x40000002; -+ } -+ return fail; -+} -+ -+static void _iqk_rxclk_setting(struct rtw89_dev *rtwdev, u8 path) -+{ -+ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; -+ -+ if (iqk_info->iqk_bw[path] == RTW89_CHANNEL_WIDTH_80) { -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]===>%s\n", __func__); -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_SYS + (path << 8), -+ MASKDWORD, 0x4d000a08); -+ rtw89_phy_write32_mask(rtwdev, R_P0_RXCK + (path << 13), -+ B_P0_RXCK_VAL, 0x2); -+ rtw89_phy_write32_set(rtwdev, R_P0_RXCK + (path << 13), B_P0_RXCK_ON); -+ rtw89_phy_write32_set(rtwdev, R_UPD_CLK_ADC, B_UPD_CLK_ADC_ON); -+ rtw89_phy_write32_mask(rtwdev, R_UPD_CLK_ADC, B_UPD_CLK_ADC_VAL, 0x1); -+ } else { -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_SYS + (path << 8), -+ MASKDWORD, 0x44000a08); -+ rtw89_phy_write32_mask(rtwdev, R_P0_RXCK + (path << 13), -+ B_P0_RXCK_VAL, 0x1); -+ rtw89_phy_write32_set(rtwdev, R_P0_RXCK + (path << 13), B_P0_RXCK_ON); -+ rtw89_phy_write32_set(rtwdev, R_UPD_CLK_ADC, B_UPD_CLK_ADC_ON); -+ rtw89_phy_write32_clr(rtwdev, R_UPD_CLK_ADC, B_UPD_CLK_ADC_VAL); -+ } -+} -+ -+static bool _txk_group_sel(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy_idx, u8 path) -+{ -+ static const u32 a_txgain[4] = {0xE466, 0x646D, 0xE4E2, 0x64ED}; -+ static const u32 g_txgain[4] = {0x60e8, 0x60f0, 0x61e8, 0x61ED}; -+ static const u32 a_itqt[4] = {0x12, 0x12, 0x12, 0x1b}; -+ static const u32 g_itqt[4] = {0x09, 0x12, 0x12, 0x12}; -+ static const u32 g_attsmxr[4] = {0x0, 0x1, 0x1, 0x1}; -+ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; -+ bool fail = false; -+ u8 gp = 0x0; -+ u32 tmp = 0x0; -+ -+ for (gp = 0x0; gp < 0x4; gp++) { -+ switch (iqk_info->iqk_band[path]) { -+ case RTW89_BAND_2G: -+ rtw89_phy_write32_mask(rtwdev, R_RFGAIN_BND + (path << 8), -+ B_RFGAIN_BND, 0x08); -+ rtw89_write_rf(rtwdev, path, RR_GAINTX, RR_GAINTX_ALL, -+ g_txgain[gp]); -+ rtw89_write_rf(rtwdev, path, RR_TXG1, RR_TXG1_ATT1, -+ g_attsmxr[gp]); -+ rtw89_write_rf(rtwdev, path, RR_TXG2, RR_TXG2_ATT0, -+ g_attsmxr[gp]); -+ rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), -+ MASKDWORD, g_itqt[gp]); -+ break; -+ case RTW89_BAND_5G: -+ rtw89_phy_write32_mask(rtwdev, R_RFGAIN_BND + (path << 8), -+ B_RFGAIN_BND, 0x04); -+ rtw89_write_rf(rtwdev, path, RR_GAINTX, RR_GAINTX_ALL, -+ a_txgain[gp]); -+ rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), -+ MASKDWORD, a_itqt[gp]); -+ break; -+ default: -+ break; -+ } -+ rtw89_phy_write32_clr(rtwdev, R_IQK_RES + (path << 8), B_IQK_RES_TXCFIR); -+ rtw89_phy_write32_set(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_SEL); -+ rtw89_phy_write32_set(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_G3); -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), -+ B_CFIR_LUT_GP, gp); -+ rtw89_phy_write32_clr(rtwdev, R_NCTL_N1, B_NCTL_N1_CIP); -+ fail = _iqk_one_shot(rtwdev, phy_idx, path, ID_TXK); -+ rtw89_phy_write32_mask(rtwdev, R_IQKINF, BIT(8 + gp + path * 4), fail); -+ } -+ -+ iqk_info->nb_txcfir[path] = 0x40000000; -+ rtw89_phy_write32_mask(rtwdev, R_IQK_RES + (path << 8), -+ B_IQK_RES_TXCFIR, 0x5); -+ iqk_info->is_wb_txiqk[path] = true; -+ tmp = rtw89_phy_read32_mask(rtwdev, R_TXIQC + (path << 8), MASKDWORD); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, 0x8%lx38 = 0x%x\n", path, -+ BIT(path), tmp); -+ return false; -+} -+ -+static bool _iqk_nbtxk(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy_idx, u8 path) -+{ -+ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; -+ u8 group = 0x2; -+ u32 a_mode_txgain = 0x64e2; -+ u32 g_mode_txgain = 0x61e8; -+ u32 attsmxr = 0x1; -+ u32 itqt = 0x12; -+ u32 tmp = 0x0; -+ bool fail = false; -+ -+ switch (iqk_info->iqk_band[path]) { -+ case RTW89_BAND_2G: -+ rtw89_phy_write32_mask(rtwdev, R_RFGAIN_BND + (path << 8), -+ B_RFGAIN_BND, 0x08); -+ rtw89_write_rf(rtwdev, path, RR_GAINTX, RR_GAINTX_ALL, g_mode_txgain); -+ rtw89_write_rf(rtwdev, path, RR_TXG1, RR_TXG1_ATT1, attsmxr); -+ rtw89_write_rf(rtwdev, path, RR_TXG2, RR_TXG2_ATT0, attsmxr); -+ break; -+ case RTW89_BAND_5G: -+ rtw89_phy_write32_mask(rtwdev, R_RFGAIN_BND + (path << 8), -+ B_RFGAIN_BND, 0x04); -+ rtw89_write_rf(rtwdev, path, RR_GAINTX, RR_GAINTX_ALL, a_mode_txgain); -+ break; -+ default: -+ break; -+ } -+ rtw89_phy_write32_clr(rtwdev, R_IQK_RES + (path << 8), B_IQK_RES_TXCFIR); -+ rtw89_phy_write32_set(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_SEL); -+ rtw89_phy_write32_set(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_G3); -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_GP, group); -+ rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), MASKDWORD, itqt); -+ rtw89_phy_write32_clr(rtwdev, R_NCTL_N1, B_NCTL_N1_CIP); -+ fail = _iqk_one_shot(rtwdev, phy_idx, path, ID_NBTXK); -+ if (!fail) { -+ tmp = rtw89_phy_read32_mask(rtwdev, R_TXIQC + (path << 8), MASKDWORD); -+ iqk_info->nb_txcfir[path] = tmp | 0x2; -+ } else { -+ iqk_info->nb_txcfir[path] = 0x40000002; -+ } -+ tmp = rtw89_phy_read32_mask(rtwdev, R_TXIQC + (path << 8), MASKDWORD); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, 0x8%lx38 = 0x%x\n", path, -+ BIT(path), tmp); -+ return fail; -+} -+ -+static void _lok_res_table(struct rtw89_dev *rtwdev, u8 path, u8 ibias) -+{ -+ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, ibias = %x\n", path, ibias); -+ rtw89_write_rf(rtwdev, path, RR_LUTWE, RFREG_MASK, 0x2); -+ if (iqk_info->iqk_band[path] == RTW89_BAND_2G) -+ rtw89_write_rf(rtwdev, path, RR_LUTWA, RFREG_MASK, 0x0); -+ else -+ rtw89_write_rf(rtwdev, path, RR_LUTWA, RFREG_MASK, 0x1); -+ rtw89_write_rf(rtwdev, path, RR_LUTWD0, RFREG_MASK, ibias); -+ rtw89_write_rf(rtwdev, path, RR_LUTWE, RFREG_MASK, 0x0); -+} -+ -+static bool _lok_finetune_check(struct rtw89_dev *rtwdev, u8 path) -+{ -+ bool is_fail = false; -+ u32 tmp = 0x0; -+ u32 core_i = 0x0; -+ u32 core_q = 0x0; -+ -+ tmp = rtw89_read_rf(rtwdev, path, RR_TXMO, RFREG_MASK); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK][FineLOK] S%x, 0x58 = 0x%x\n", -+ path, tmp); -+ core_i = FIELD_GET(RR_TXMO_COI, tmp); -+ core_q = FIELD_GET(RR_TXMO_COQ, tmp); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, i = 0x%x\n", path, core_i); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, q = 0x%x\n", path, core_q); -+ -+ if (core_i < 0x2 || core_i > 0x1d || core_q < 0x2 || core_q > 0x1d) -+ is_fail = true; -+ return is_fail; -+} -+ -+static bool _iqk_lok(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy_idx, u8 path) -+{ -+ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; -+ u32 rf0 = 0x0; -+ u8 itqt = 0x12; -+ bool fail = false; -+ bool tmp = false; -+ -+ switch (iqk_info->iqk_band[path]) { -+ case RTW89_BAND_2G: -+ rtw89_write_rf(rtwdev, path, RR_GAINTX, RR_GAINTX_ALL, 0xe5e0); -+ itqt = 0x09; -+ break; -+ case RTW89_BAND_5G: -+ rtw89_write_rf(rtwdev, path, RR_GAINTX, RR_GAINTX_ALL, 0xe4e0); -+ itqt = 0x12; -+ break; -+ default: -+ break; -+ } -+ rtw89_phy_write32_set(rtwdev, R_IQK_CFG, B_IQK_CFG_SET); -+ rf0 = rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK); -+ rtw89_phy_write32_mask(rtwdev, R_IQK_DIF1, B_IQK_DIF1_TXPI, -+ rf0 | iqk_info->syn1to2); -+ rtw89_phy_write32_clr(rtwdev, R_IQK_RES + (path << 8), B_IQK_RES_TXCFIR); -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_SEL, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_G3, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_GP, 0x0); -+ rtw89_phy_write32_set(rtwdev, R_IOQ_IQK_DPK, B_IOQ_IQK_DPK_EN); -+ rtw89_phy_write32_clr(rtwdev, R_NCTL_N1, B_NCTL_N1_CIP); -+ rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), MASKDWORD, itqt); -+ tmp = _iqk_one_shot(rtwdev, phy_idx, path, ID_FLOK_COARSE); -+ iqk_info->lok_cor_fail[0][path] = tmp; -+ fsleep(10); -+ rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), MASKDWORD, itqt); -+ tmp = _iqk_one_shot(rtwdev, phy_idx, path, ID_FLOK_FINE); -+ iqk_info->lok_fin_fail[0][path] = tmp; -+ fail = _lok_finetune_check(rtwdev, path); -+ return fail; -+} -+ -+static void _iqk_txk_setting(struct rtw89_dev *rtwdev, u8 path) -+{ -+ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; -+ -+ rtw89_phy_write32_set(rtwdev, R_P0_NRBW + (path << 13), B_P0_NRBW_DBG); -+ rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15, 0x1f); -+ udelay(1); -+ rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15, 0x13); -+ rtw89_phy_write32_mask(rtwdev, R_ANAPAR, B_ANAPAR_15, 0x0001); -+ udelay(1); -+ rtw89_phy_write32_mask(rtwdev, R_ANAPAR, B_ANAPAR_15, 0x0041); -+ udelay(1); -+ rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_RST, 0x0303); -+ rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_RST, 0x0000); -+ switch (iqk_info->iqk_band[path]) { -+ case RTW89_BAND_2G: -+ rtw89_write_rf(rtwdev, path, RR_XALNA2, RR_XALNA2_SW, 0x00); -+ rtw89_write_rf(rtwdev, path, RR_RCKD, RR_RCKD_POW, 0x3f); -+ rtw89_write_rf(rtwdev, path, RR_TXG1, RR_TXG1_ATT2, 0x0); -+ rtw89_write_rf(rtwdev, path, RR_TXG1, RR_TXG1_ATT1, 0x1); -+ rtw89_write_rf(rtwdev, path, RR_TXG2, RR_TXG2_ATT0, 0x1); -+ rtw89_write_rf(rtwdev, path, RR_TXGA, RR_TXGA_LOK_EN, 0x0); -+ rtw89_write_rf(rtwdev, path, RR_LUTWE, RR_LUTWE_LOK, 0x1); -+ rtw89_write_rf(rtwdev, path, RR_LUTDBG, RR_LUTDBG_LOK, 0x0); -+ rtw89_write_rf(rtwdev, path, RR_LUTWA, RR_LUTWA_MASK, 0x000); -+ rtw89_write_rf(rtwdev, path, RR_RSV2, RFREG_MASK, 0x80200); -+ rtw89_write_rf(rtwdev, path, RR_DTXLOK, RFREG_MASK, 0x80200); -+ rtw89_write_rf(rtwdev, path, RR_MOD, RFREG_MASK, -+ 0x403e0 | iqk_info->syn1to2); -+ udelay(1); -+ break; -+ case RTW89_BAND_5G: -+ rtw89_write_rf(rtwdev, path, RR_XGLNA2, RR_XGLNA2_SW, 0x00); -+ rtw89_write_rf(rtwdev, path, RR_RCKD, RR_RCKD_POW, 0x3f); -+ rtw89_write_rf(rtwdev, path, RR_BIASA, RR_BIASA_A, 0x7); -+ rtw89_write_rf(rtwdev, path, RR_TXGA, RR_TXGA_LOK_EN, 0x0); -+ rtw89_write_rf(rtwdev, path, RR_LUTWE, RR_LUTWE_LOK, 0x1); -+ rtw89_write_rf(rtwdev, path, RR_LUTDBG, RR_LUTDBG_LOK, 0x0); -+ rtw89_write_rf(rtwdev, path, RR_LUTWA, RR_LUTWA_MASK, 0x100); -+ rtw89_write_rf(rtwdev, path, RR_RSV2, RFREG_MASK, 0x80200); -+ rtw89_write_rf(rtwdev, path, RR_DTXLOK, RFREG_MASK, 0x80200); -+ rtw89_write_rf(rtwdev, path, RR_LUTWD0, RFREG_MASK, 0x1); -+ rtw89_write_rf(rtwdev, path, RR_LUTWD0, RFREG_MASK, 0x0); -+ rtw89_write_rf(rtwdev, path, RR_MOD, RFREG_MASK, -+ 0x403e0 | iqk_info->syn1to2); -+ udelay(1); -+ break; -+ default: -+ break; -+ } -+} -+ -+static void _iqk_txclk_setting(struct rtw89_dev *rtwdev, u8 path) -+{ -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_SYS + (path << 8), MASKDWORD, 0xce000a08); -+} -+ -+static void _iqk_info_iqk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, -+ u8 path) -+{ -+ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; -+ u32 tmp = 0x0; -+ bool flag = 0x0; -+ -+ iqk_info->thermal[path] = -+ ewma_thermal_read(&rtwdev->phystat.avg_thermal[path]); -+ iqk_info->thermal_rek_en = false; -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%d_thermal = %d\n", path, -+ iqk_info->thermal[path]); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%d_LOK_COR_fail= %d\n", path, -+ iqk_info->lok_cor_fail[0][path]); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%d_LOK_FIN_fail= %d\n", path, -+ iqk_info->lok_fin_fail[0][path]); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%d_TXIQK_fail = %d\n", path, -+ iqk_info->iqk_tx_fail[0][path]); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%d_RXIQK_fail= %d,\n", path, -+ iqk_info->iqk_rx_fail[0][path]); -+ flag = iqk_info->lok_cor_fail[0][path]; -+ rtw89_phy_write32_mask(rtwdev, R_IQKINF, BIT(0) << (path * 4), flag); -+ flag = iqk_info->lok_fin_fail[0][path]; -+ rtw89_phy_write32_mask(rtwdev, R_IQKINF, BIT(1) << (path * 4), flag); -+ flag = iqk_info->iqk_tx_fail[0][path]; -+ rtw89_phy_write32_mask(rtwdev, R_IQKINF, BIT(2) << (path * 4), flag); -+ flag = iqk_info->iqk_rx_fail[0][path]; -+ rtw89_phy_write32_mask(rtwdev, R_IQKINF, BIT(3) << (path * 4), flag); -+ -+ tmp = rtw89_phy_read32_mask(rtwdev, R_IQK_RES + (path << 8), MASKDWORD); -+ iqk_info->bp_iqkenable[path] = tmp; -+ tmp = rtw89_phy_read32_mask(rtwdev, R_TXIQC + (path << 8), MASKDWORD); -+ iqk_info->bp_txkresult[path] = tmp; -+ tmp = rtw89_phy_read32_mask(rtwdev, R_RXIQC + (path << 8), MASKDWORD); -+ iqk_info->bp_rxkresult[path] = tmp; -+ -+ rtw89_phy_write32_mask(rtwdev, R_IQKINF2, B_IQKINF2_KCNT, -+ (u8)iqk_info->iqk_times); -+ -+ tmp = rtw89_phy_read32_mask(rtwdev, R_IQKINF, 0x0000000f << (path * 4)); -+ if (tmp != 0x0) -+ iqk_info->iqk_fail_cnt++; -+ rtw89_phy_write32_mask(rtwdev, R_IQKINF2, 0x00ff0000 << (path * 4), -+ iqk_info->iqk_fail_cnt); -+} -+ -+static -+void _iqk_by_path(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, u8 path) -+{ -+ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; -+ bool lok_is_fail = false; -+ u8 ibias = 0x1; -+ u8 i = 0; -+ -+ _iqk_txclk_setting(rtwdev, path); -+ -+ for (i = 0; i < 3; i++) { -+ _lok_res_table(rtwdev, path, ibias++); -+ _iqk_txk_setting(rtwdev, path); -+ lok_is_fail = _iqk_lok(rtwdev, phy_idx, path); -+ if (!lok_is_fail) -+ break; -+ } -+ if (iqk_info->is_nbiqk) -+ iqk_info->iqk_tx_fail[0][path] = _iqk_nbtxk(rtwdev, phy_idx, path); -+ else -+ iqk_info->iqk_tx_fail[0][path] = _txk_group_sel(rtwdev, phy_idx, path); -+ -+ _iqk_rxclk_setting(rtwdev, path); -+ _iqk_rxk_setting(rtwdev, path); -+ if (iqk_info->is_nbiqk || rtwdev->dbcc_en || iqk_info->iqk_band[path] == RTW89_BAND_2G) -+ iqk_info->iqk_rx_fail[0][path] = _iqk_nbrxk(rtwdev, phy_idx, path); -+ else -+ iqk_info->iqk_rx_fail[0][path] = _rxk_group_sel(rtwdev, phy_idx, path); -+ -+ _iqk_info_iqk(rtwdev, phy_idx, path); -+} -+ -+static void _iqk_get_ch_info(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy, u8 path) -+{ -+ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; -+ struct rtw89_hal *hal = &rtwdev->hal; -+ u32 reg_rf18 = 0x0, reg_35c = 0x0; -+ u8 idx = 0; -+ u8 get_empty_table = false; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]===>%s\n", __func__); -+ for (idx = 0; idx < RTW89_IQK_CHS_NR; idx++) { -+ if (iqk_info->iqk_mcc_ch[idx][path] == 0) { -+ get_empty_table = true; -+ break; -+ } -+ } -+ if (!get_empty_table) { -+ idx = iqk_info->iqk_table_idx[path] + 1; -+ if (idx > RTW89_IQK_CHS_NR - 1) -+ idx = 0; -+ } -+ reg_rf18 = rtw89_read_rf(rtwdev, path, RR_CFGCH, RFREG_MASK); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]cfg ch = %d\n", reg_rf18); -+ reg_35c = rtw89_phy_read32_mask(rtwdev, 0x35c, 0x00000c00); -+ -+ iqk_info->iqk_band[path] = hal->current_band_type; -+ iqk_info->iqk_bw[path] = hal->current_band_width; -+ iqk_info->iqk_ch[path] = hal->current_channel; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[IQK]iqk_info->iqk_band[%x] = 0x%x\n", path, -+ iqk_info->iqk_band[path]); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]iqk_info->iqk_bw[%x] = 0x%x\n", -+ path, iqk_info->iqk_bw[path]); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]iqk_info->iqk_ch[%x] = 0x%x\n", -+ path, iqk_info->iqk_ch[path]); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[IQK]S%d (PHY%d): / DBCC %s/ %s/ CH%d/ %s\n", path, phy, -+ rtwdev->dbcc_en ? "on" : "off", -+ iqk_info->iqk_band[path] == 0 ? "2G" : -+ iqk_info->iqk_band[path] == 1 ? "5G" : "6G", -+ iqk_info->iqk_ch[path], -+ iqk_info->iqk_bw[path] == 0 ? "20M" : -+ iqk_info->iqk_bw[path] == 1 ? "40M" : "80M"); -+ if (reg_35c == 0x01) -+ iqk_info->syn1to2 = 0x1; -+ else -+ iqk_info->syn1to2 = 0x0; -+ -+ rtw89_phy_write32_mask(rtwdev, R_IQKINF, B_IQKINF_VER, RTW8852A_IQK_VER); -+ rtw89_phy_write32_mask(rtwdev, R_IQKCH, 0x000f << (path * 16), -+ (u8)iqk_info->iqk_band[path]); -+ rtw89_phy_write32_mask(rtwdev, R_IQKCH, 0x00f0 << (path * 16), -+ (u8)iqk_info->iqk_bw[path]); -+ rtw89_phy_write32_mask(rtwdev, R_IQKCH, 0xff00 << (path * 16), -+ (u8)iqk_info->iqk_ch[path]); -+ -+ rtw89_phy_write32_mask(rtwdev, R_IQKINF2, 0x000000ff, RTW8852A_NCTL_VER); -+} -+ -+static void _iqk_start_iqk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, -+ u8 path) -+{ -+ _iqk_by_path(rtwdev, phy_idx, path); -+} -+ -+static void _iqk_restore(struct rtw89_dev *rtwdev, u8 path) -+{ -+ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; -+ -+ rtw89_phy_write32_mask(rtwdev, R_TXIQC + (path << 8), MASKDWORD, -+ iqk_info->nb_txcfir[path]); -+ rtw89_phy_write32_mask(rtwdev, R_RXIQC + (path << 8), MASKDWORD, -+ iqk_info->nb_rxcfir[path]); -+ rtw89_phy_write32_clr(rtwdev, R_NCTL_RPT, MASKDWORD); -+ rtw89_phy_write32_clr(rtwdev, R_MDPK_RX_DCK, MASKDWORD); -+ rtw89_phy_write32_mask(rtwdev, R_KIP_SYSCFG, MASKDWORD, 0x80000000); -+ rtw89_phy_write32_clr(rtwdev, R_KPATH_CFG, MASKDWORD); -+ rtw89_phy_write32_clr(rtwdev, R_GAPK, B_GAPK_ADR); -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_SYS + (path << 8), MASKDWORD, 0x10010000); -+ rtw89_phy_write32_clr(rtwdev, R_KIP + (path << 8), B_KIP_RFGAIN); -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_MAP + (path << 8), MASKDWORD, 0xe4e4e4e4); -+ rtw89_phy_write32_clr(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_SEL); -+ rtw89_phy_write32_clr(rtwdev, R_KIP_IQP + (path << 8), B_KIP_IQP_IQSW); -+ rtw89_phy_write32_mask(rtwdev, R_LOAD_COEF + (path << 8), MASKDWORD, 0x00000002); -+ rtw89_write_rf(rtwdev, path, RR_LUTWE, RR_LUTWE_LOK, 0x0); -+ rtw89_write_rf(rtwdev, path, RR_RCKD, RR_RCKD_POW, 0x0); -+ rtw89_write_rf(rtwdev, path, RR_LUTWE, RR_LUTWE_LOK, 0x0); -+ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, RR_MOD_V_RX); -+ rtw89_write_rf(rtwdev, path, RR_TXRSV, RR_TXRSV_GAPK, 0x0); -+ rtw89_write_rf(rtwdev, path, RR_BIAS, RR_BIAS_GAPK, 0x0); -+ rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x1); -+} -+ -+static void _iqk_afebb_restore(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy_idx, u8 path) -+{ -+ const struct rtw89_rfk_tbl *tbl; -+ -+ switch (_kpath(rtwdev, phy_idx)) { -+ case RF_A: -+ tbl = &rtw8852a_rfk_iqk_restore_defs_dbcc_path0_tbl; -+ break; -+ case RF_B: -+ tbl = &rtw8852a_rfk_iqk_restore_defs_dbcc_path1_tbl; -+ break; -+ default: -+ tbl = &rtw8852a_rfk_iqk_restore_defs_nondbcc_path01_tbl; -+ break; -+ } -+ -+ rtw89_rfk_parser(rtwdev, tbl); -+} -+ -+static void _iqk_preset(struct rtw89_dev *rtwdev, u8 path) -+{ -+ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; -+ u8 idx = iqk_info->iqk_table_idx[path]; -+ -+ if (rtwdev->dbcc_en) { -+ rtw89_phy_write32_mask(rtwdev, R_COEF_SEL + (path << 8), -+ B_COEF_SEL_IQC, path & 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), -+ B_CFIR_LUT_G2, path & 0x1); -+ } else { -+ rtw89_phy_write32_mask(rtwdev, R_COEF_SEL + (path << 8), -+ B_COEF_SEL_IQC, idx); -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), -+ B_CFIR_LUT_G2, idx); -+ } -+ rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_NCTL_RPT, MASKDWORD, 0x00000080); -+ rtw89_phy_write32_clr(rtwdev, R_NCTL_RW, MASKDWORD); -+ rtw89_phy_write32_mask(rtwdev, R_KIP_SYSCFG, MASKDWORD, 0x81ff010a); -+ rtw89_phy_write32_mask(rtwdev, R_KPATH_CFG, MASKDWORD, 0x00200000); -+ rtw89_phy_write32_mask(rtwdev, R_MDPK_RX_DCK, MASKDWORD, 0x80000000); -+ rtw89_phy_write32_clr(rtwdev, R_LOAD_COEF + (path << 8), MASKDWORD); -+} -+ -+static void _iqk_macbb_setting(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy_idx, u8 path) -+{ -+ const struct rtw89_rfk_tbl *tbl; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]===> %s\n", __func__); -+ -+ switch (_kpath(rtwdev, phy_idx)) { -+ case RF_A: -+ tbl = &rtw8852a_rfk_iqk_set_defs_dbcc_path0_tbl; -+ break; -+ case RF_B: -+ tbl = &rtw8852a_rfk_iqk_set_defs_dbcc_path1_tbl; -+ break; -+ default: -+ tbl = &rtw8852a_rfk_iqk_set_defs_nondbcc_path01_tbl; -+ break; -+ } -+ -+ rtw89_rfk_parser(rtwdev, tbl); -+} -+ -+static void _iqk_dbcc(struct rtw89_dev *rtwdev, u8 path) -+{ -+ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; -+ u8 phy_idx = 0x0; -+ -+ iqk_info->iqk_times++; -+ -+ if (path == 0x0) -+ phy_idx = RTW89_PHY_0; -+ else -+ phy_idx = RTW89_PHY_1; -+ -+ _iqk_get_ch_info(rtwdev, phy_idx, path); -+ _iqk_macbb_setting(rtwdev, phy_idx, path); -+ _iqk_preset(rtwdev, path); -+ _iqk_start_iqk(rtwdev, phy_idx, path); -+ _iqk_restore(rtwdev, path); -+ _iqk_afebb_restore(rtwdev, phy_idx, path); -+} -+ -+static void _iqk_track(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_iqk_info *iqk = &rtwdev->iqk; -+ u8 path = 0x0; -+ u8 cur_ther; -+ -+ if (iqk->iqk_band[0] == RTW89_BAND_2G) -+ return; -+ if (iqk->iqk_bw[0] < RTW89_CHANNEL_WIDTH_80) -+ return; -+ -+ /* only check path 0 */ -+ for (path = 0; path < 1; path++) { -+ cur_ther = ewma_thermal_read(&rtwdev->phystat.avg_thermal[path]); -+ -+ if (abs(cur_ther - iqk->thermal[path]) > RTW8852A_IQK_THR_REK) -+ iqk->thermal_rek_en = true; -+ else -+ iqk->thermal_rek_en = false; -+ } -+} -+ -+static void _rck(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) -+{ -+ u32 rf_reg5, rck_val = 0; -+ u32 val; -+ int ret; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RCK] ====== S%d RCK ======\n", path); -+ -+ rf_reg5 = rtw89_read_rf(rtwdev, path, RR_RSV1, RFREG_MASK); -+ -+ rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x0); -+ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, RR_MOD_V_RX); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RCK] RF0x00 = 0x%x\n", -+ rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK)); -+ -+ /* RCK trigger */ -+ rtw89_write_rf(rtwdev, path, RR_RCKC, RFREG_MASK, 0x00240); -+ -+ ret = read_poll_timeout_atomic(rtw89_read_rf, val, val, 2, 20, -+ false, rtwdev, path, 0x1c, BIT(3)); -+ if (ret) -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RCK] RCK timeout\n"); -+ -+ rck_val = rtw89_read_rf(rtwdev, path, RR_RCKC, RR_RCKC_CA); -+ rtw89_write_rf(rtwdev, path, RR_RCKC, RFREG_MASK, rck_val); -+ -+ /* RCK_ADC_OFFSET */ -+ rtw89_write_rf(rtwdev, path, RR_RCKO, RR_RCKO_OFF, 0x4); -+ -+ rtw89_write_rf(rtwdev, path, RR_RFC, RR_RFC_CKEN, 0x1); -+ rtw89_write_rf(rtwdev, path, RR_RFC, RR_RFC_CKEN, 0x0); -+ -+ rtw89_write_rf(rtwdev, path, RR_RSV1, RFREG_MASK, rf_reg5); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[RCK] RF 0x1b / 0x1c / 0x1d = 0x%x / 0x%x / 0x%x\n", -+ rtw89_read_rf(rtwdev, path, RR_RCKC, RFREG_MASK), -+ rtw89_read_rf(rtwdev, path, RR_RCKS, RFREG_MASK), -+ rtw89_read_rf(rtwdev, path, RR_RCKO, RFREG_MASK)); -+} -+ -+static void _iqk_init(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; -+ u8 ch, path; -+ -+ rtw89_phy_write32_clr(rtwdev, R_IQKINF, MASKDWORD); -+ if (iqk_info->is_iqk_init) -+ return; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]===>%s\n", __func__); -+ iqk_info->is_iqk_init = true; -+ iqk_info->is_nbiqk = false; -+ iqk_info->iqk_fft_en = false; -+ iqk_info->iqk_sram_en = false; -+ iqk_info->iqk_cfir_en = false; -+ iqk_info->iqk_xym_en = false; -+ iqk_info->thermal_rek_en = false; -+ iqk_info->iqk_times = 0x0; -+ -+ for (ch = 0; ch < RTW89_IQK_CHS_NR; ch++) { -+ iqk_info->iqk_channel[ch] = 0x0; -+ for (path = 0; path < RTW8852A_IQK_SS; path++) { -+ iqk_info->lok_cor_fail[ch][path] = false; -+ iqk_info->lok_fin_fail[ch][path] = false; -+ iqk_info->iqk_tx_fail[ch][path] = false; -+ iqk_info->iqk_rx_fail[ch][path] = false; -+ iqk_info->iqk_mcc_ch[ch][path] = 0x0; -+ iqk_info->iqk_table_idx[path] = 0x0; -+ } -+ } -+} -+ -+static void _doiqk(struct rtw89_dev *rtwdev, bool force, -+ enum rtw89_phy_idx phy_idx, u8 path) -+{ -+ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; -+ u32 backup_bb_val[BACKUP_BB_REGS_NR]; -+ u32 backup_rf_val[RTW8852A_IQK_SS][BACKUP_RF_REGS_NR]; -+ u8 phy_map = rtw89_btc_phymap(rtwdev, phy_idx, RF_AB); -+ -+ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_IQK, BTC_WRFK_ONESHOT_START); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[IQK]==========IQK strat!!!!!==========\n"); -+ iqk_info->iqk_times++; -+ iqk_info->kcount = 0; -+ iqk_info->version = RTW8852A_IQK_VER; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]Test Ver 0x%x\n", iqk_info->version); -+ _iqk_get_ch_info(rtwdev, phy_idx, path); -+ _rfk_backup_bb_reg(rtwdev, &backup_bb_val[0]); -+ _rfk_backup_rf_reg(rtwdev, &backup_rf_val[path][0], path); -+ _iqk_macbb_setting(rtwdev, phy_idx, path); -+ _iqk_preset(rtwdev, path); -+ _iqk_start_iqk(rtwdev, phy_idx, path); -+ _iqk_restore(rtwdev, path); -+ _iqk_afebb_restore(rtwdev, phy_idx, path); -+ _rfk_restore_bb_reg(rtwdev, &backup_bb_val[0]); -+ _rfk_restore_rf_reg(rtwdev, &backup_rf_val[path][0], path); -+ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_IQK, BTC_WRFK_ONESHOT_STOP); -+} -+ -+static void _iqk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, bool force) -+{ -+ switch (_kpath(rtwdev, phy_idx)) { -+ case RF_A: -+ _doiqk(rtwdev, force, phy_idx, RF_PATH_A); -+ break; -+ case RF_B: -+ _doiqk(rtwdev, force, phy_idx, RF_PATH_B); -+ break; -+ case RF_AB: -+ _doiqk(rtwdev, force, phy_idx, RF_PATH_A); -+ _doiqk(rtwdev, force, phy_idx, RF_PATH_B); -+ break; -+ default: -+ break; -+ } -+} -+ -+#define RXDCK_VER_8852A 0xe -+ -+static void _set_rx_dck(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path, bool is_afe) -+{ -+ u8 phy_map = rtw89_btc_path_phymap(rtwdev, phy, path); -+ u32 ori_val; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[RX_DCK] ==== S%d RX DCK (by %s)====\n", -+ path, is_afe ? "AFE" : "RFC"); -+ -+ ori_val = rtw89_phy_read32_mask(rtwdev, R_P0_RXCK + (path << 13), MASKDWORD); -+ -+ if (is_afe) { -+ rtw89_phy_write32_set(rtwdev, R_P0_NRBW + (path << 13), B_P0_NRBW_DBG); -+ rtw89_phy_write32_set(rtwdev, R_P0_RXCK + (path << 13), B_P0_RXCK_ON); -+ rtw89_phy_write32_mask(rtwdev, R_P0_RXCK + (path << 13), -+ B_P0_RXCK_VAL, 0x3); -+ rtw89_phy_write32_set(rtwdev, R_S0_RXDC2 + (path << 13), B_S0_RXDC2_MEN); -+ rtw89_phy_write32_mask(rtwdev, R_S0_RXDC2 + (path << 13), -+ B_S0_RXDC2_AVG, 0x3); -+ rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15_H, 0x3); -+ rtw89_phy_write32_clr(rtwdev, R_ANAPAR, B_ANAPAR_ADCCLK); -+ rtw89_phy_write32_clr(rtwdev, R_ANAPAR, B_ANAPAR_FLTRST); -+ rtw89_phy_write32_set(rtwdev, R_ANAPAR, B_ANAPAR_FLTRST); -+ rtw89_phy_write32_mask(rtwdev, R_ANAPAR, B_ANAPAR_CRXBB, 0x1); -+ } -+ -+ rtw89_write_rf(rtwdev, path, RR_DCK2, RR_DCK2_CYCLE, 0x3f); -+ rtw89_write_rf(rtwdev, path, RR_DCK1, RR_DCK1_SEL, is_afe); -+ -+ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_RXDCK, BTC_WRFK_ONESHOT_START); -+ -+ rtw89_write_rf(rtwdev, path, RR_DCK, RR_DCK_LV, 0x0); -+ rtw89_write_rf(rtwdev, path, RR_DCK, RR_DCK_LV, 0x1); -+ -+ fsleep(600); -+ -+ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_RXDCK, BTC_WRFK_ONESHOT_STOP); -+ -+ rtw89_write_rf(rtwdev, path, RR_DCK, RR_DCK_LV, 0x0); -+ -+ if (is_afe) { -+ rtw89_phy_write32_clr(rtwdev, R_P0_NRBW + (path << 13), B_P0_NRBW_DBG); -+ rtw89_phy_write32_mask(rtwdev, R_P0_RXCK + (path << 13), -+ MASKDWORD, ori_val); -+ } -+} -+ -+static void _rx_dck(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ bool is_afe) -+{ -+ u8 path, kpath, dck_tune; -+ u32 rf_reg5; -+ u32 addr; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[RX_DCK] ****** RXDCK Start (Ver: 0x%x, Cv: %d) ******\n", -+ RXDCK_VER_8852A, rtwdev->hal.cv); -+ -+ kpath = _kpath(rtwdev, phy); -+ -+ for (path = 0; path < 2; path++) { -+ if (!(kpath & BIT(path))) -+ continue; -+ -+ rf_reg5 = rtw89_read_rf(rtwdev, path, RR_RSV1, RFREG_MASK); -+ dck_tune = (u8)rtw89_read_rf(rtwdev, path, RR_DCK, RR_DCK_FINE); -+ -+ if (rtwdev->is_tssi_mode[path]) { -+ addr = 0x5818 + (path << 13); -+ /* TSSI pause */ -+ rtw89_phy_write32_set(rtwdev, addr, BIT(30)); -+ } -+ -+ rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x0); -+ rtw89_write_rf(rtwdev, path, RR_DCK, RR_DCK_FINE, 0x0); -+ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, RR_MOD_V_RX); -+ _set_rx_dck(rtwdev, phy, path, is_afe); -+ rtw89_write_rf(rtwdev, path, RR_DCK, RR_DCK_FINE, dck_tune); -+ rtw89_write_rf(rtwdev, path, RR_RSV1, RFREG_MASK, rf_reg5); -+ -+ if (rtwdev->is_tssi_mode[path]) { -+ addr = 0x5818 + (path << 13); -+ /* TSSI resume */ -+ rtw89_phy_write32_clr(rtwdev, addr, BIT(30)); -+ } -+ } -+} -+ -+#define RTW8852A_RF_REL_VERSION 34 -+#define RTW8852A_DPK_VER 0x10 -+#define RTW8852A_DPK_TH_AVG_NUM 4 -+#define RTW8852A_DPK_RF_PATH 2 -+#define RTW8852A_DPK_KIP_REG_NUM 2 -+ -+enum rtw8852a_dpk_id { -+ LBK_RXIQK = 0x06, -+ SYNC = 0x10, -+ MDPK_IDL = 0x11, -+ MDPK_MPA = 0x12, -+ GAIN_LOSS = 0x13, -+ GAIN_CAL = 0x14, -+}; -+ -+static void _rf_direct_cntrl(struct rtw89_dev *rtwdev, -+ enum rtw89_rf_path path, bool is_bybb) -+{ -+ if (is_bybb) -+ rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x1); -+ else -+ rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x0); -+} -+ -+static void _dpk_onoff(struct rtw89_dev *rtwdev, -+ enum rtw89_rf_path path, bool off); -+ -+static void _dpk_bkup_kip(struct rtw89_dev *rtwdev, u32 *reg, -+ u32 reg_bkup[][RTW8852A_DPK_KIP_REG_NUM], -+ u8 path) -+{ -+ u8 i; -+ -+ for (i = 0; i < RTW8852A_DPK_KIP_REG_NUM; i++) { -+ reg_bkup[path][i] = rtw89_phy_read32_mask(rtwdev, -+ reg[i] + (path << 8), -+ MASKDWORD); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] Backup 0x%x = %x\n", -+ reg[i] + (path << 8), reg_bkup[path][i]); -+ } -+} -+ -+static void _dpk_reload_kip(struct rtw89_dev *rtwdev, u32 *reg, -+ u32 reg_bkup[][RTW8852A_DPK_KIP_REG_NUM], u8 path) -+{ -+ u8 i; -+ -+ for (i = 0; i < RTW8852A_DPK_KIP_REG_NUM; i++) { -+ rtw89_phy_write32_mask(rtwdev, reg[i] + (path << 8), -+ MASKDWORD, reg_bkup[path][i]); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] Reload 0x%x = %x\n", -+ reg[i] + (path << 8), reg_bkup[path][i]); -+ } -+} -+ -+static u8 _dpk_one_shot(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path, enum rtw8852a_dpk_id id) -+{ -+ u8 phy_map = rtw89_btc_path_phymap(rtwdev, phy, path); -+ u16 dpk_cmd = 0x0; -+ u32 val; -+ int ret; -+ -+ dpk_cmd = (u16)((id << 8) | (0x19 + (path << 4))); -+ -+ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_DPK, BTC_WRFK_ONESHOT_START); -+ -+ rtw89_phy_write32_mask(rtwdev, R_NCTL_CFG, MASKDWORD, dpk_cmd); -+ rtw89_phy_write32_set(rtwdev, R_DPK_CTL, B_DPK_CTL_EN); -+ -+ ret = read_poll_timeout_atomic(rtw89_phy_read32_mask, val, val == 0x55, -+ 10, 20000, false, rtwdev, 0xbff8, MASKBYTE0); -+ -+ rtw89_phy_write32_clr(rtwdev, R_NCTL_N1, MASKBYTE0); -+ -+ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_DPK, BTC_WRFK_ONESHOT_STOP); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] one-shot for %s = 0x%x (ret=%d)\n", -+ id == 0x06 ? "LBK_RXIQK" : -+ id == 0x10 ? "SYNC" : -+ id == 0x11 ? "MDPK_IDL" : -+ id == 0x12 ? "MDPK_MPA" : -+ id == 0x13 ? "GAIN_LOSS" : "PWR_CAL", -+ dpk_cmd, ret); -+ -+ if (ret) { -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] one-shot over 20ms!!!!\n"); -+ return 1; -+ } -+ -+ return 0; -+} -+ -+static void _dpk_rx_dck(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path) -+{ -+ rtw89_write_rf(rtwdev, path, RR_RXBB2, RR_EN_TIA_IDA, 0x3); -+ _set_rx_dck(rtwdev, phy, path, false); -+} -+ -+static void _dpk_information(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path) -+{ -+ struct rtw89_dpk_info *dpk = &rtwdev->dpk; -+ struct rtw89_hal *hal = &rtwdev->hal; -+ -+ u8 kidx = dpk->cur_idx[path]; -+ -+ dpk->bp[path][kidx].band = hal->current_band_type; -+ dpk->bp[path][kidx].ch = hal->current_channel; -+ dpk->bp[path][kidx].bw = hal->current_band_width; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] S%d[%d] (PHY%d): TSSI %s/ DBCC %s/ %s/ CH%d/ %s\n", -+ path, dpk->cur_idx[path], phy, -+ rtwdev->is_tssi_mode[path] ? "on" : "off", -+ rtwdev->dbcc_en ? "on" : "off", -+ dpk->bp[path][kidx].band == 0 ? "2G" : -+ dpk->bp[path][kidx].band == 1 ? "5G" : "6G", -+ dpk->bp[path][kidx].ch, -+ dpk->bp[path][kidx].bw == 0 ? "20M" : -+ dpk->bp[path][kidx].bw == 1 ? "40M" : "80M"); -+} -+ -+static void _dpk_bb_afe_setting(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path, u8 kpath) -+{ -+ switch (kpath) { -+ case RF_A: -+ rtw89_rfk_parser(rtwdev, &rtw8852a_rfk_dpk_bb_afe_sf_defs_a_tbl); -+ -+ if (rtw89_phy_read32_mask(rtwdev, R_2P4G_BAND, B_2P4G_BAND_SEL) == 0x0) -+ rtw89_phy_write32_set(rtwdev, R_RXCCA, B_RXCCA_DIS); -+ -+ rtw89_rfk_parser(rtwdev, &rtw8852a_rfk_dpk_bb_afe_sr_defs_a_tbl); -+ break; -+ case RF_B: -+ rtw89_rfk_parser(rtwdev, &rtw8852a_rfk_dpk_bb_afe_sf_defs_b_tbl); -+ -+ if (rtw89_phy_read32_mask(rtwdev, R_2P4G_BAND, B_2P4G_BAND_SEL) == 0x1) -+ rtw89_phy_write32_set(rtwdev, R_RXCCA, B_RXCCA_DIS); -+ -+ rtw89_rfk_parser(rtwdev, &rtw8852a_rfk_dpk_bb_afe_sr_defs_b_tbl); -+ break; -+ case RF_AB: -+ rtw89_rfk_parser(rtwdev, &rtw8852a_rfk_dpk_bb_afe_s_defs_ab_tbl); -+ break; -+ default: -+ break; -+ } -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] Set BB/AFE for PHY%d (kpath=%d)\n", phy, kpath); -+} -+ -+static void _dpk_bb_afe_restore(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path, u8 kpath) -+{ -+ switch (kpath) { -+ case RF_A: -+ rtw89_rfk_parser(rtwdev, &rtw8852a_rfk_dpk_bb_afe_r_defs_a_tbl); -+ break; -+ case RF_B: -+ rtw89_rfk_parser(rtwdev, &rtw8852a_rfk_dpk_bb_afe_r_defs_b_tbl); -+ break; -+ case RF_AB: -+ rtw89_rfk_parser(rtwdev, &rtw8852a_rfk_dpk_bb_afe_r_defs_ab_tbl); -+ break; -+ default: -+ break; -+ } -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] Restore BB/AFE for PHY%d (kpath=%d)\n", phy, kpath); -+} -+ -+static void _dpk_tssi_pause(struct rtw89_dev *rtwdev, -+ enum rtw89_rf_path path, bool is_pause) -+{ -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK + (path << 13), -+ B_P0_TSSI_TRK_EN, is_pause); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d TSSI %s\n", path, -+ is_pause ? "pause" : "resume"); -+} -+ -+static void _dpk_kip_setting(struct rtw89_dev *rtwdev, -+ enum rtw89_rf_path path, u8 kidx) -+{ -+ rtw89_phy_write32_mask(rtwdev, R_NCTL_RPT, MASKDWORD, 0x00000080); -+ rtw89_phy_write32_mask(rtwdev, R_KIP_CLK, MASKDWORD, 0x00093f3f); -+ rtw89_phy_write32_mask(rtwdev, R_KIP_SYSCFG, MASKDWORD, 0x807f030a); -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_SYS + (path << 8), MASKDWORD, 0xce000a08); -+ rtw89_phy_write32_mask(rtwdev, R_DPK_CFG, B_DPK_CFG_IDX, 0x2); -+ rtw89_phy_write32_mask(rtwdev, R_NCTL_CFG, B_NCTL_CFG_SPAGE, path); /*subpage_id*/ -+ rtw89_phy_write32_mask(rtwdev, R_DPD_CH0 + (path << 8) + (kidx << 2), -+ MASKDWORD, 0x003f2e2e); -+ rtw89_phy_write32_mask(rtwdev, R_DPD_CH0A + (path << 8) + (kidx << 2), -+ MASKDWORD, 0x005b5b5b); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] KIP setting for S%d[%d]!!\n", -+ path, kidx); -+} -+ -+static void _dpk_kip_restore(struct rtw89_dev *rtwdev, -+ enum rtw89_rf_path path) -+{ -+ rtw89_phy_write32_clr(rtwdev, R_NCTL_RPT, MASKDWORD); -+ rtw89_phy_write32_mask(rtwdev, R_KIP_SYSCFG, MASKDWORD, 0x80000000); -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_SYS + (path << 8), MASKDWORD, 0x10010000); -+ rtw89_phy_write32_clr(rtwdev, R_KIP_CLK, MASKDWORD); -+ -+ if (rtwdev->hal.cv > CHIP_CBV) -+ rtw89_phy_write32_mask(rtwdev, R_DPD_COM + (path << 8), BIT(15), 0x1); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d restore KIP\n", path); -+} -+ -+static void _dpk_lbk_rxiqk(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path) -+{ -+ u8 cur_rxbb; -+ -+ cur_rxbb = (u8)rtw89_read_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXBB); -+ -+ rtw89_rfk_parser(rtwdev, &rtw8852a_rfk_dpk_lbk_rxiqk_defs_f_tbl); -+ -+ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, 0xc); -+ rtw89_write_rf(rtwdev, path, RR_RXK, RR_RXK_PLLEN, 0x1); -+ rtw89_write_rf(rtwdev, path, RR_RXPOW, RR_RXPOW_IQK, 0x2); -+ rtw89_write_rf(rtwdev, path, RR_RSV4, RFREG_MASK, -+ rtw89_read_rf(rtwdev, path, RR_CFGCH, RFREG_MASK)); -+ rtw89_write_rf(rtwdev, path, RR_RXKPLL, RR_RXKPLL_OFF, 0x13); -+ rtw89_write_rf(rtwdev, path, RR_RXKPLL, RR_RXKPLL_POW, 0x0); -+ rtw89_write_rf(rtwdev, path, RR_RXKPLL, RR_RXKPLL_POW, 0x1); -+ -+ fsleep(70); -+ -+ rtw89_write_rf(rtwdev, path, RR_RXIQGEN, RR_RXIQGEN_ATTL, 0x1f); -+ -+ if (cur_rxbb <= 0xa) -+ rtw89_write_rf(rtwdev, path, RR_RXIQGEN, RR_RXIQGEN_ATTH, 0x3); -+ else if (cur_rxbb <= 0x10 && cur_rxbb >= 0xb) -+ rtw89_write_rf(rtwdev, path, RR_RXIQGEN, RR_RXIQGEN_ATTH, 0x1); -+ else -+ rtw89_write_rf(rtwdev, path, RR_RXIQGEN, RR_RXIQGEN_ATTH, 0x0); -+ -+ rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, B_IQK_DIF4_RXT, 0x11); -+ -+ _dpk_one_shot(rtwdev, phy, path, LBK_RXIQK); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d LBK RXIQC = 0x%x\n", path, -+ rtw89_phy_read32_mask(rtwdev, R_RXIQC, MASKDWORD)); -+ -+ rtw89_write_rf(rtwdev, path, RR_RXK, RR_RXK_PLLEN, 0x0); -+ rtw89_write_rf(rtwdev, path, RR_RXPOW, RR_RXPOW_IQK, 0x0); -+ rtw89_write_rf(rtwdev, path, RR_RXKPLL, RR_RXKPLL_POW, 0x0); /*POW IQKPLL*/ -+ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, RR_MOD_V_DPK); -+ -+ rtw89_rfk_parser(rtwdev, &rtw8852a_rfk_dpk_lbk_rxiqk_defs_r_tbl); -+} -+ -+static void _dpk_get_thermal(struct rtw89_dev *rtwdev, u8 kidx, -+ enum rtw89_rf_path path) -+{ -+ struct rtw89_dpk_info *dpk = &rtwdev->dpk; -+ -+ dpk->bp[path][kidx].ther_dpk = -+ ewma_thermal_read(&rtwdev->phystat.avg_thermal[path]); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] thermal@DPK = 0x%x\n", -+ dpk->bp[path][kidx].ther_dpk); -+} -+ -+static u8 _dpk_set_tx_pwr(struct rtw89_dev *rtwdev, u8 gain, -+ enum rtw89_rf_path path) -+{ -+ u8 txagc_ori = 0x38; -+ -+ rtw89_write_rf(rtwdev, path, RR_MODOPT, RFREG_MASK, txagc_ori); -+ -+ return txagc_ori; -+} -+ -+static void _dpk_rf_setting(struct rtw89_dev *rtwdev, u8 gain, -+ enum rtw89_rf_path path, u8 kidx) -+{ -+ struct rtw89_dpk_info *dpk = &rtwdev->dpk; -+ -+ if (dpk->bp[path][kidx].band == RTW89_BAND_2G) { -+ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_DPK, 0x280b); -+ rtw89_write_rf(rtwdev, path, RR_RXBB, RR_RXBB_ATTC, 0x0); -+ rtw89_write_rf(rtwdev, path, RR_RXBB, RR_RXBB_ATTR, 0x4); -+ rtw89_write_rf(rtwdev, path, RR_MIXER, RR_MIXER_GN, 0x0); -+ } else { -+ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_DPK, 0x282e); -+ rtw89_write_rf(rtwdev, path, RR_BIASA2, RR_BIASA2_LB, 0x7); -+ rtw89_write_rf(rtwdev, path, RR_TXATANK, RR_TXATANK_LBSW, 0x3); -+ rtw89_write_rf(rtwdev, path, RR_RXA, RR_RXA_DPK, 0x3); -+ } -+ rtw89_write_rf(rtwdev, path, RR_RCKD, RR_RCKD_BW, 0x1); -+ rtw89_write_rf(rtwdev, path, RR_BTC, RR_BTC_TXBB, dpk->bp[path][kidx].bw + 1); -+ rtw89_write_rf(rtwdev, path, RR_BTC, RR_BTC_RXBB, 0x0); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] RF 0x0/0x1/0x1a = 0x%x/ 0x%x/ 0x%x\n", -+ rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK), -+ rtw89_read_rf(rtwdev, path, RR_MODOPT, RFREG_MASK), -+ rtw89_read_rf(rtwdev, path, RR_BTC, RFREG_MASK)); -+} -+ -+static void _dpk_manual_txcfir(struct rtw89_dev *rtwdev, -+ enum rtw89_rf_path path, bool is_manual) -+{ -+ u8 tmp_pad, tmp_txbb; -+ -+ if (is_manual) { -+ rtw89_phy_write32_mask(rtwdev, R_KIP + (path << 8), B_KIP_RFGAIN, 0x1); -+ tmp_pad = (u8)rtw89_read_rf(rtwdev, path, RR_GAINTX, RR_GAINTX_PAD); -+ rtw89_phy_write32_mask(rtwdev, R_RFGAIN + (path << 8), -+ B_RFGAIN_PAD, tmp_pad); -+ -+ tmp_txbb = (u8)rtw89_read_rf(rtwdev, path, RR_GAINTX, RR_GAINTX_BB); -+ rtw89_phy_write32_mask(rtwdev, R_RFGAIN + (path << 8), -+ B_RFGAIN_TXBB, tmp_txbb); -+ -+ rtw89_phy_write32_mask(rtwdev, R_LOAD_COEF + (path << 8), -+ B_LOAD_COEF_CFIR, 0x1); -+ rtw89_phy_write32_clr(rtwdev, R_LOAD_COEF + (path << 8), -+ B_LOAD_COEF_CFIR); -+ -+ rtw89_phy_write32_mask(rtwdev, R_LOAD_COEF + (path << 8), BIT(1), 0x1); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] PAD_man / TXBB_man = 0x%x / 0x%x\n", tmp_pad, -+ tmp_txbb); -+ } else { -+ rtw89_phy_write32_clr(rtwdev, R_KIP + (path << 8), B_KIP_RFGAIN); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] disable manual switch TXCFIR\n"); -+ } -+} -+ -+static void _dpk_bypass_rxcfir(struct rtw89_dev *rtwdev, -+ enum rtw89_rf_path path, bool is_bypass) -+{ -+ if (is_bypass) { -+ rtw89_phy_write32_mask(rtwdev, R_RXIQC + (path << 8), -+ B_RXIQC_BYPASS2, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_RXIQC + (path << 8), -+ B_RXIQC_BYPASS, 0x1); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] Bypass RXIQC (0x8%d3c = 0x%x)\n", 1 + path, -+ rtw89_phy_read32_mask(rtwdev, R_RXIQC + (path << 8), -+ MASKDWORD)); -+ } else { -+ rtw89_phy_write32_clr(rtwdev, R_RXIQC + (path << 8), B_RXIQC_BYPASS2); -+ rtw89_phy_write32_clr(rtwdev, R_RXIQC + (path << 8), B_RXIQC_BYPASS); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] restore 0x8%d3c = 0x%x\n", 1 + path, -+ rtw89_phy_read32_mask(rtwdev, R_RXIQC + (path << 8), -+ MASKDWORD)); -+ } -+} -+ -+static -+void _dpk_tpg_sel(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, u8 kidx) -+{ -+ struct rtw89_dpk_info *dpk = &rtwdev->dpk; -+ -+ if (dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_80) -+ rtw89_phy_write32_clr(rtwdev, R_TPG_MOD, B_TPG_MOD_F); -+ else if (dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_40) -+ rtw89_phy_write32_mask(rtwdev, R_TPG_MOD, B_TPG_MOD_F, 0x2); -+ else -+ rtw89_phy_write32_mask(rtwdev, R_TPG_MOD, B_TPG_MOD_F, 0x1); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] TPG_Select for %s\n", -+ dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_80 ? "80M" : -+ dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_40 ? "40M" : "20M"); -+} -+ -+static void _dpk_table_select(struct rtw89_dev *rtwdev, -+ enum rtw89_rf_path path, u8 kidx, u8 gain) -+{ -+ u8 val; -+ -+ val = 0x80 + kidx * 0x20 + gain * 0x10; -+ rtw89_phy_write32_mask(rtwdev, R_DPD_CH0 + (path << 8), MASKBYTE3, val); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] table select for Kidx[%d], Gain[%d] (0x%x)\n", kidx, -+ gain, val); -+} -+ -+static bool _dpk_sync_check(struct rtw89_dev *rtwdev, -+ enum rtw89_rf_path path) -+{ -+#define DPK_SYNC_TH_DC_I 200 -+#define DPK_SYNC_TH_DC_Q 200 -+#define DPK_SYNC_TH_CORR 170 -+ struct rtw89_dpk_info *dpk = &rtwdev->dpk; -+ u16 dc_i, dc_q; -+ u8 corr_val, corr_idx; -+ -+ rtw89_phy_write32_clr(rtwdev, R_KIP_RPT1, B_KIP_RPT1_SEL); -+ -+ corr_idx = (u8)rtw89_phy_read32_mask(rtwdev, R_RPT_COM, B_PRT_COM_CORI); -+ corr_val = (u8)rtw89_phy_read32_mask(rtwdev, R_RPT_COM, B_PRT_COM_CORV); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] S%d Corr_idx / Corr_val = %d / %d\n", path, corr_idx, -+ corr_val); -+ -+ dpk->corr_idx[path] = corr_idx; -+ dpk->corr_val[path] = corr_val; -+ -+ rtw89_phy_write32_mask(rtwdev, R_KIP_RPT1, B_KIP_RPT1_SEL, 0x9); -+ -+ dc_i = (u16)rtw89_phy_read32_mask(rtwdev, R_RPT_COM, B_PRT_COM_DCI); -+ dc_q = (u16)rtw89_phy_read32_mask(rtwdev, R_RPT_COM, B_PRT_COM_DCQ); -+ -+ dc_i = abs(sign_extend32(dc_i, 11)); -+ dc_q = abs(sign_extend32(dc_q, 11)); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d DC I/Q, = %d / %d\n", -+ path, dc_i, dc_q); -+ -+ dpk->dc_i[path] = dc_i; -+ dpk->dc_q[path] = dc_q; -+ -+ if (dc_i > DPK_SYNC_TH_DC_I || dc_q > DPK_SYNC_TH_DC_Q || -+ corr_val < DPK_SYNC_TH_CORR) -+ return true; -+ else -+ return false; -+} -+ -+static bool _dpk_sync(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path, u8 kidx) -+{ -+ _dpk_tpg_sel(rtwdev, path, kidx); -+ _dpk_one_shot(rtwdev, phy, path, SYNC); -+ return _dpk_sync_check(rtwdev, path); /*1= fail*/ -+} -+ -+static u16 _dpk_dgain_read(struct rtw89_dev *rtwdev) -+{ -+ u16 dgain = 0x0; -+ -+ rtw89_phy_write32_clr(rtwdev, R_KIP_RPT1, B_KIP_RPT1_SEL); -+ -+ rtw89_phy_read32_mask(rtwdev, R_RPT_COM, B_PRT_COM_SYNERR); -+ -+ dgain = (u16)rtw89_phy_read32_mask(rtwdev, R_RPT_COM, B_PRT_COM_DCI); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] DGain = 0x%x (%d)\n", dgain, -+ dgain); -+ -+ return dgain; -+} -+ -+static s8 _dpk_dgain_mapping(struct rtw89_dev *rtwdev, u16 dgain) -+{ -+ s8 offset; -+ -+ if (dgain >= 0x783) -+ offset = 0x6; -+ else if (dgain <= 0x782 && dgain >= 0x551) -+ offset = 0x3; -+ else if (dgain <= 0x550 && dgain >= 0x3c4) -+ offset = 0x0; -+ else if (dgain <= 0x3c3 && dgain >= 0x2aa) -+ offset = -3; -+ else if (dgain <= 0x2a9 && dgain >= 0x1e3) -+ offset = -6; -+ else if (dgain <= 0x1e2 && dgain >= 0x156) -+ offset = -9; -+ else if (dgain <= 0x155) -+ offset = -12; -+ else -+ offset = 0x0; -+ -+ return offset; -+} -+ -+static u8 _dpk_gainloss_read(struct rtw89_dev *rtwdev) -+{ -+ rtw89_phy_write32_mask(rtwdev, R_KIP_RPT1, B_KIP_RPT1_SEL, 0x6); -+ rtw89_phy_write32_mask(rtwdev, R_DPK_CFG2, B_DPK_CFG2_ST, 0x1); -+ return rtw89_phy_read32_mask(rtwdev, R_RPT_COM, B_PRT_COM_GL); -+} -+ -+static void _dpk_gainloss(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy, enum rtw89_rf_path path, -+ u8 kidx) -+{ -+ _dpk_table_select(rtwdev, path, kidx, 1); -+ _dpk_one_shot(rtwdev, phy, path, GAIN_LOSS); -+} -+ -+#define DPK_TXAGC_LOWER 0x2e -+#define DPK_TXAGC_UPPER 0x3f -+#define DPK_TXAGC_INVAL 0xff -+ -+static u8 _dpk_set_offset(struct rtw89_dev *rtwdev, -+ enum rtw89_rf_path path, s8 gain_offset) -+{ -+ u8 txagc; -+ -+ txagc = (u8)rtw89_read_rf(rtwdev, path, RR_MODOPT, RFREG_MASK); -+ -+ if (txagc - gain_offset < DPK_TXAGC_LOWER) -+ txagc = DPK_TXAGC_LOWER; -+ else if (txagc - gain_offset > DPK_TXAGC_UPPER) -+ txagc = DPK_TXAGC_UPPER; -+ else -+ txagc = txagc - gain_offset; -+ -+ rtw89_write_rf(rtwdev, path, RR_MODOPT, RFREG_MASK, txagc); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] tmp_txagc (GL=%d) = 0x%x\n", -+ gain_offset, txagc); -+ return txagc; -+} -+ -+enum dpk_agc_step { -+ DPK_AGC_STEP_SYNC_DGAIN, -+ DPK_AGC_STEP_GAIN_ADJ, -+ DPK_AGC_STEP_GAIN_LOSS_IDX, -+ DPK_AGC_STEP_GL_GT_CRITERION, -+ DPK_AGC_STEP_GL_LT_CRITERION, -+ DPK_AGC_STEP_SET_TX_GAIN, -+}; -+ -+static u8 _dpk_pas_read(struct rtw89_dev *rtwdev, bool is_check) -+{ -+ u32 val1_i = 0, val1_q = 0, val2_i = 0, val2_q = 0; -+ u8 i; -+ -+ rtw89_rfk_parser(rtwdev, &rtw8852a_rfk_dpk_pas_read_defs_tbl); -+ -+ if (is_check) { -+ rtw89_phy_write32_mask(rtwdev, R_DPK_CFG3, MASKBYTE3, 0x00); -+ val1_i = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, MASKHWORD); -+ val1_i = abs(sign_extend32(val1_i, 11)); -+ val1_q = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, MASKLWORD); -+ val1_q = abs(sign_extend32(val1_q, 11)); -+ rtw89_phy_write32_mask(rtwdev, R_DPK_CFG3, MASKBYTE3, 0x1f); -+ val2_i = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, MASKHWORD); -+ val2_i = abs(sign_extend32(val2_i, 11)); -+ val2_q = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, MASKLWORD); -+ val2_q = abs(sign_extend32(val2_q, 11)); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] PAS_delta = 0x%x\n", -+ (val1_i * val1_i + val1_q * val1_q) / -+ (val2_i * val2_i + val2_q * val2_q)); -+ -+ } else { -+ for (i = 0; i < 32; i++) { -+ rtw89_phy_write32_mask(rtwdev, R_DPK_CFG3, MASKBYTE3, i); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] PAS_Read[%02d]= 0x%08x\n", i, -+ rtw89_phy_read32_mask(rtwdev, R_RPT_COM, MASKDWORD)); -+ } -+ } -+ if ((val1_i * val1_i + val1_q * val1_q) >= -+ ((val2_i * val2_i + val2_q * val2_q) * 8 / 5)) -+ return 1; -+ else -+ return 0; -+} -+ -+static u8 _dpk_agc(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path, u8 kidx, u8 init_txagc, -+ bool loss_only) -+{ -+#define DPK_AGC_ADJ_LMT 6 -+#define DPK_DGAIN_UPPER 1922 -+#define DPK_DGAIN_LOWER 342 -+#define DPK_RXBB_UPPER 0x1f -+#define DPK_RXBB_LOWER 0 -+#define DPK_GL_CRIT 7 -+ u8 tmp_txagc, tmp_rxbb = 0, tmp_gl_idx = 0; -+ u8 agc_cnt = 0; -+ bool limited_rxbb = false; -+ s8 offset = 0; -+ u16 dgain = 0; -+ u8 step = DPK_AGC_STEP_SYNC_DGAIN; -+ bool goout = false; -+ -+ tmp_txagc = init_txagc; -+ -+ do { -+ switch (step) { -+ case DPK_AGC_STEP_SYNC_DGAIN: -+ if (_dpk_sync(rtwdev, phy, path, kidx)) { -+ tmp_txagc = DPK_TXAGC_INVAL; -+ goout = true; -+ break; -+ } -+ -+ dgain = _dpk_dgain_read(rtwdev); -+ -+ if (loss_only || limited_rxbb) -+ step = DPK_AGC_STEP_GAIN_LOSS_IDX; -+ else -+ step = DPK_AGC_STEP_GAIN_ADJ; -+ break; -+ -+ case DPK_AGC_STEP_GAIN_ADJ: -+ tmp_rxbb = (u8)rtw89_read_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXBB); -+ offset = _dpk_dgain_mapping(rtwdev, dgain); -+ -+ if (tmp_rxbb + offset > DPK_RXBB_UPPER) { -+ tmp_rxbb = DPK_RXBB_UPPER; -+ limited_rxbb = true; -+ } else if (tmp_rxbb + offset < DPK_RXBB_LOWER) { -+ tmp_rxbb = DPK_RXBB_LOWER; -+ limited_rxbb = true; -+ } else { -+ tmp_rxbb = tmp_rxbb + offset; -+ } -+ -+ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXBB, tmp_rxbb); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] Adjust RXBB (%d) = 0x%x\n", offset, -+ tmp_rxbb); -+ if (offset != 0 || agc_cnt == 0) { -+ if (rtwdev->hal.current_band_width < RTW89_CHANNEL_WIDTH_80) -+ _dpk_bypass_rxcfir(rtwdev, path, true); -+ else -+ _dpk_lbk_rxiqk(rtwdev, phy, path); -+ } -+ if (dgain > DPK_DGAIN_UPPER || dgain < DPK_DGAIN_LOWER) -+ step = DPK_AGC_STEP_SYNC_DGAIN; -+ else -+ step = DPK_AGC_STEP_GAIN_LOSS_IDX; -+ -+ agc_cnt++; -+ break; -+ -+ case DPK_AGC_STEP_GAIN_LOSS_IDX: -+ _dpk_gainloss(rtwdev, phy, path, kidx); -+ tmp_gl_idx = _dpk_gainloss_read(rtwdev); -+ -+ if ((tmp_gl_idx == 0 && _dpk_pas_read(rtwdev, true)) || -+ tmp_gl_idx > DPK_GL_CRIT) -+ step = DPK_AGC_STEP_GL_GT_CRITERION; -+ else if (tmp_gl_idx == 0) -+ step = DPK_AGC_STEP_GL_LT_CRITERION; -+ else -+ step = DPK_AGC_STEP_SET_TX_GAIN; -+ break; -+ -+ case DPK_AGC_STEP_GL_GT_CRITERION: -+ if (tmp_txagc == DPK_TXAGC_LOWER) { -+ goout = true; -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] Txagc@lower bound!!\n"); -+ } else { -+ tmp_txagc = _dpk_set_offset(rtwdev, path, 3); -+ } -+ step = DPK_AGC_STEP_GAIN_LOSS_IDX; -+ agc_cnt++; -+ break; -+ -+ case DPK_AGC_STEP_GL_LT_CRITERION: -+ if (tmp_txagc == DPK_TXAGC_UPPER) { -+ goout = true; -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] Txagc@upper bound!!\n"); -+ } else { -+ tmp_txagc = _dpk_set_offset(rtwdev, path, -2); -+ } -+ step = DPK_AGC_STEP_GAIN_LOSS_IDX; -+ agc_cnt++; -+ break; -+ -+ case DPK_AGC_STEP_SET_TX_GAIN: -+ tmp_txagc = _dpk_set_offset(rtwdev, path, tmp_gl_idx); -+ goout = true; -+ agc_cnt++; -+ break; -+ -+ default: -+ goout = true; -+ break; -+ } -+ } while (!goout && (agc_cnt < DPK_AGC_ADJ_LMT)); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] Txagc / RXBB for DPK = 0x%x / 0x%x\n", tmp_txagc, -+ tmp_rxbb); -+ -+ return tmp_txagc; -+} -+ -+static void _dpk_set_mdpd_para(struct rtw89_dev *rtwdev, u8 order) -+{ -+ switch (order) { -+ case 0: -+ rtw89_phy_write32_mask(rtwdev, R_LDL_NORM, B_LDL_NORM_OP, order); -+ rtw89_phy_write32_mask(rtwdev, R_LDL_NORM, B_LDL_NORM_PN, 0x3); -+ rtw89_phy_write32_mask(rtwdev, R_MDPK_SYNC, B_MDPK_SYNC_MAN, 0x1); -+ break; -+ case 1: -+ rtw89_phy_write32_mask(rtwdev, R_LDL_NORM, B_LDL_NORM_OP, order); -+ rtw89_phy_write32_clr(rtwdev, R_LDL_NORM, B_LDL_NORM_PN); -+ rtw89_phy_write32_clr(rtwdev, R_MDPK_SYNC, B_MDPK_SYNC_MAN); -+ break; -+ case 2: -+ rtw89_phy_write32_mask(rtwdev, R_LDL_NORM, B_LDL_NORM_OP, order); -+ rtw89_phy_write32_clr(rtwdev, R_LDL_NORM, B_LDL_NORM_PN); -+ rtw89_phy_write32_clr(rtwdev, R_MDPK_SYNC, B_MDPK_SYNC_MAN); -+ break; -+ default: -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] Wrong MDPD order!!(0x%x)\n", order); -+ break; -+ } -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] Set MDPD order to 0x%x for IDL\n", order); -+} -+ -+static void _dpk_idl_mpa(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path, u8 kidx, u8 gain) -+{ -+ _dpk_set_mdpd_para(rtwdev, 0x0); -+ _dpk_table_select(rtwdev, path, kidx, 1); -+ _dpk_one_shot(rtwdev, phy, path, MDPK_IDL); -+} -+ -+static void _dpk_fill_result(struct rtw89_dev *rtwdev, -+ enum rtw89_rf_path path, u8 kidx, u8 gain, -+ u8 txagc) -+{ -+ struct rtw89_dpk_info *dpk = &rtwdev->dpk; -+ -+ u16 pwsf = 0x78; -+ u8 gs = 0x5b; -+ -+ rtw89_phy_write32_mask(rtwdev, R_COEF_SEL + (path << 8), B_COEF_SEL_MDPD, kidx); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] Fill txagc/ pwsf/ gs = 0x%x/ 0x%x/ 0x%x\n", txagc, -+ pwsf, gs); -+ -+ dpk->bp[path][kidx].txagc_dpk = txagc; -+ rtw89_phy_write32_mask(rtwdev, R_TXAGC_RFK + (path << 8), -+ 0x3F << ((gain << 3) + (kidx << 4)), txagc); -+ -+ dpk->bp[path][kidx].pwsf = pwsf; -+ rtw89_phy_write32_mask(rtwdev, R_DPD_BND + (path << 8) + (kidx << 2), -+ 0x1FF << (gain << 4), pwsf); -+ -+ rtw89_phy_write32_mask(rtwdev, R_LOAD_COEF + (path << 8), B_LOAD_COEF_MDPD, 0x1); -+ rtw89_phy_write32_clr(rtwdev, R_LOAD_COEF + (path << 8), B_LOAD_COEF_MDPD); -+ -+ dpk->bp[path][kidx].gs = gs; -+ rtw89_phy_write32_mask(rtwdev, R_DPD_CH0A + (path << 8) + (kidx << 2), -+ MASKDWORD, 0x065b5b5b); -+ -+ rtw89_phy_write32_clr(rtwdev, R_DPD_V1 + (path << 8), MASKDWORD); -+ -+ rtw89_phy_write32_clr(rtwdev, R_MDPK_SYNC, B_MDPK_SYNC_SEL); -+} -+ -+static bool _dpk_reload_check(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path) -+{ -+ struct rtw89_dpk_info *dpk = &rtwdev->dpk; -+ bool is_reload = false; -+ u8 idx, cur_band, cur_ch; -+ -+ cur_band = rtwdev->hal.current_band_type; -+ cur_ch = rtwdev->hal.current_channel; -+ -+ for (idx = 0; idx < RTW89_DPK_BKUP_NUM; idx++) { -+ if (cur_band != dpk->bp[path][idx].band || -+ cur_ch != dpk->bp[path][idx].ch) -+ continue; -+ -+ rtw89_phy_write32_mask(rtwdev, R_COEF_SEL + (path << 8), -+ B_COEF_SEL_MDPD, idx); -+ dpk->cur_idx[path] = idx; -+ is_reload = true; -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] reload S%d[%d] success\n", path, idx); -+ } -+ -+ return is_reload; -+} -+ -+static bool _dpk_main(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path, u8 gain) -+{ -+ struct rtw89_dpk_info *dpk = &rtwdev->dpk; -+ u8 txagc = 0, kidx = dpk->cur_idx[path]; -+ bool is_fail = false; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] ========= S%d[%d] DPK Start =========\n", path, -+ kidx); -+ -+ _rf_direct_cntrl(rtwdev, path, false); -+ txagc = _dpk_set_tx_pwr(rtwdev, gain, path); -+ _dpk_rf_setting(rtwdev, gain, path, kidx); -+ _dpk_rx_dck(rtwdev, phy, path); -+ -+ _dpk_kip_setting(rtwdev, path, kidx); -+ _dpk_manual_txcfir(rtwdev, path, true); -+ txagc = _dpk_agc(rtwdev, phy, path, kidx, txagc, false); -+ if (txagc == DPK_TXAGC_INVAL) -+ is_fail = true; -+ _dpk_get_thermal(rtwdev, kidx, path); -+ -+ _dpk_idl_mpa(rtwdev, phy, path, kidx, gain); -+ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, RR_MOD_V_RX); -+ _dpk_fill_result(rtwdev, path, kidx, gain, txagc); -+ _dpk_manual_txcfir(rtwdev, path, false); -+ -+ if (!is_fail) -+ dpk->bp[path][kidx].path_ok = true; -+ else -+ dpk->bp[path][kidx].path_ok = false; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d[%d] DPK %s\n", path, kidx, -+ is_fail ? "Check" : "Success"); -+ -+ return is_fail; -+} -+ -+static void _dpk_cal_select(struct rtw89_dev *rtwdev, bool force, -+ enum rtw89_phy_idx phy, u8 kpath) -+{ -+ struct rtw89_dpk_info *dpk = &rtwdev->dpk; -+ u32 backup_bb_val[BACKUP_BB_REGS_NR]; -+ u32 backup_rf_val[RTW8852A_DPK_RF_PATH][BACKUP_RF_REGS_NR]; -+ u32 kip_bkup[RTW8852A_DPK_RF_PATH][RTW8852A_DPK_KIP_REG_NUM] = {{0}}; -+ u32 kip_reg[] = {R_RXIQC, R_IQK_RES}; -+ u8 path; -+ bool is_fail = true, reloaded[RTW8852A_DPK_RF_PATH] = {false}; -+ -+ if (dpk->is_dpk_reload_en) { -+ for (path = 0; path < RTW8852A_DPK_RF_PATH; path++) { -+ if (!(kpath & BIT(path))) -+ continue; -+ -+ reloaded[path] = _dpk_reload_check(rtwdev, phy, path); -+ if (!reloaded[path] && dpk->bp[path][0].ch != 0) -+ dpk->cur_idx[path] = !dpk->cur_idx[path]; -+ else -+ _dpk_onoff(rtwdev, path, false); -+ } -+ } else { -+ for (path = 0; path < RTW8852A_DPK_RF_PATH; path++) -+ dpk->cur_idx[path] = 0; -+ } -+ -+ if ((kpath == RF_A && reloaded[RF_PATH_A]) || -+ (kpath == RF_B && reloaded[RF_PATH_B]) || -+ (kpath == RF_AB && reloaded[RF_PATH_A] && reloaded[RF_PATH_B])) -+ return; -+ -+ _rfk_backup_bb_reg(rtwdev, &backup_bb_val[0]); -+ -+ for (path = 0; path < RTW8852A_DPK_RF_PATH; path++) { -+ if (!(kpath & BIT(path)) || reloaded[path]) -+ continue; -+ if (rtwdev->is_tssi_mode[path]) -+ _dpk_tssi_pause(rtwdev, path, true); -+ _dpk_bkup_kip(rtwdev, kip_reg, kip_bkup, path); -+ _rfk_backup_rf_reg(rtwdev, &backup_rf_val[path][0], path); -+ _dpk_information(rtwdev, phy, path); -+ } -+ -+ _dpk_bb_afe_setting(rtwdev, phy, path, kpath); -+ -+ for (path = 0; path < RTW8852A_DPK_RF_PATH; path++) { -+ if (!(kpath & BIT(path)) || reloaded[path]) -+ continue; -+ -+ is_fail = _dpk_main(rtwdev, phy, path, 1); -+ _dpk_onoff(rtwdev, path, is_fail); -+ } -+ -+ _dpk_bb_afe_restore(rtwdev, phy, path, kpath); -+ _rfk_restore_bb_reg(rtwdev, &backup_bb_val[0]); -+ -+ for (path = 0; path < RTW8852A_DPK_RF_PATH; path++) { -+ if (!(kpath & BIT(path)) || reloaded[path]) -+ continue; -+ -+ _dpk_kip_restore(rtwdev, path); -+ _dpk_reload_kip(rtwdev, kip_reg, kip_bkup, path); -+ _rfk_restore_rf_reg(rtwdev, &backup_rf_val[path][0], path); -+ if (rtwdev->is_tssi_mode[path]) -+ _dpk_tssi_pause(rtwdev, path, false); -+ } -+} -+ -+static bool _dpk_bypass_check(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy) -+{ -+ struct rtw89_fem_info *fem = &rtwdev->fem; -+ -+ if (fem->epa_2g && rtwdev->hal.current_band_type == RTW89_BAND_2G) { -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] Skip DPK due to 2G_ext_PA exist!!\n"); -+ return true; -+ } else if (fem->epa_5g && rtwdev->hal.current_band_type == RTW89_BAND_5G) { -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] Skip DPK due to 5G_ext_PA exist!!\n"); -+ return true; -+ } -+ -+ return false; -+} -+ -+static void _dpk_force_bypass(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy) -+{ -+ u8 path, kpath; -+ -+ kpath = _kpath(rtwdev, phy); -+ -+ for (path = 0; path < RTW8852A_DPK_RF_PATH; path++) { -+ if (kpath & BIT(path)) -+ _dpk_onoff(rtwdev, path, true); -+ } -+} -+ -+static void _dpk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, bool force) -+{ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] ****** DPK Start (Ver: 0x%x, Cv: %d, RF_para: %d) ******\n", -+ RTW8852A_DPK_VER, rtwdev->hal.cv, -+ RTW8852A_RF_REL_VERSION); -+ -+ if (_dpk_bypass_check(rtwdev, phy)) -+ _dpk_force_bypass(rtwdev, phy); -+ else -+ _dpk_cal_select(rtwdev, force, phy, _kpath(rtwdev, phy)); -+} -+ -+static void _dpk_onoff(struct rtw89_dev *rtwdev, -+ enum rtw89_rf_path path, bool off) -+{ -+ struct rtw89_dpk_info *dpk = &rtwdev->dpk; -+ u8 val, kidx = dpk->cur_idx[path]; -+ -+ val = dpk->is_dpk_enable && !off && dpk->bp[path][kidx].path_ok; -+ -+ rtw89_phy_write32_mask(rtwdev, R_DPD_CH0A + (path << 8) + (kidx << 2), -+ MASKBYTE3, 0x6 | val); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d[%d] DPK %s !!!\n", path, -+ kidx, dpk->is_dpk_enable && !off ? "enable" : "disable"); -+} -+ -+static void _dpk_track(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_dpk_info *dpk = &rtwdev->dpk; -+ struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; -+ u8 path, kidx; -+ u8 trk_idx = 0, txagc_rf = 0; -+ s8 txagc_bb = 0, txagc_bb_tp = 0, ini_diff = 0, txagc_ofst = 0; -+ u16 pwsf[2]; -+ u8 cur_ther; -+ s8 delta_ther[2] = {0}; -+ -+ for (path = 0; path < RTW8852A_DPK_RF_PATH; path++) { -+ kidx = dpk->cur_idx[path]; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK_TRACK, -+ "[DPK_TRK] ================[S%d[%d] (CH %d)]================\n", -+ path, kidx, dpk->bp[path][kidx].ch); -+ -+ cur_ther = ewma_thermal_read(&rtwdev->phystat.avg_thermal[path]); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK_TRACK, -+ "[DPK_TRK] thermal now = %d\n", cur_ther); -+ -+ if (dpk->bp[path][kidx].ch != 0 && cur_ther != 0) -+ delta_ther[path] = dpk->bp[path][kidx].ther_dpk - cur_ther; -+ -+ if (dpk->bp[path][kidx].band == RTW89_BAND_2G) -+ delta_ther[path] = delta_ther[path] * 3 / 2; -+ else -+ delta_ther[path] = delta_ther[path] * 5 / 2; -+ -+ txagc_rf = (u8)rtw89_phy_read32_mask(rtwdev, R_TXAGC_BB + (path << 13), -+ RR_MODOPT_M_TXPWR); -+ -+ if (rtwdev->is_tssi_mode[path]) { -+ trk_idx = (u8)rtw89_read_rf(rtwdev, path, RR_TXA, RR_TXA_TRK); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK_TRACK, -+ "[DPK_TRK] txagc_RF / track_idx = 0x%x / %d\n", -+ txagc_rf, trk_idx); -+ -+ txagc_bb = -+ (s8)rtw89_phy_read32_mask(rtwdev, -+ R_TXAGC_BB + (path << 13), -+ MASKBYTE2); -+ txagc_bb_tp = -+ (u8)rtw89_phy_read32_mask(rtwdev, -+ R_TXAGC_TP + (path << 13), -+ B_TXAGC_TP); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK_TRACK, -+ "[DPK_TRK] txagc_bb_tp / txagc_bb = 0x%x / 0x%x\n", -+ txagc_bb_tp, txagc_bb); -+ -+ txagc_ofst = -+ (s8)rtw89_phy_read32_mask(rtwdev, -+ R_TXAGC_BB + (path << 13), -+ MASKBYTE3); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK_TRACK, -+ "[DPK_TRK] txagc_offset / delta_ther = %d / %d\n", -+ txagc_ofst, delta_ther[path]); -+ -+ if (rtw89_phy_read32_mask(rtwdev, R_DPD_COM + (path << 8), -+ BIT(15)) == 0x1) -+ txagc_ofst = 0; -+ -+ if (txagc_rf != 0 && cur_ther != 0) -+ ini_diff = txagc_ofst + delta_ther[path]; -+ -+ if (rtw89_phy_read32_mask(rtwdev, R_P0_TXDPD + (path << 13), -+ B_P0_TXDPD) == 0x0) { -+ pwsf[0] = dpk->bp[path][kidx].pwsf + txagc_bb_tp - -+ txagc_bb + ini_diff + -+ tssi_info->extra_ofst[path]; -+ pwsf[1] = dpk->bp[path][kidx].pwsf + txagc_bb_tp - -+ txagc_bb + ini_diff + -+ tssi_info->extra_ofst[path]; -+ } else { -+ pwsf[0] = dpk->bp[path][kidx].pwsf + ini_diff + -+ tssi_info->extra_ofst[path]; -+ pwsf[1] = dpk->bp[path][kidx].pwsf + ini_diff + -+ tssi_info->extra_ofst[path]; -+ } -+ -+ } else { -+ pwsf[0] = (dpk->bp[path][kidx].pwsf + delta_ther[path]) & 0x1ff; -+ pwsf[1] = (dpk->bp[path][kidx].pwsf + delta_ther[path]) & 0x1ff; -+ } -+ -+ if (rtw89_phy_read32_mask(rtwdev, R_DPK_TRK, B_DPK_TRK_DIS) == 0x0 && -+ txagc_rf != 0) { -+ rtw89_debug(rtwdev, RTW89_DBG_RFK_TRACK, -+ "[DPK_TRK] New pwsf[0] / pwsf[1] = 0x%x / 0x%x\n", -+ pwsf[0], pwsf[1]); -+ -+ rtw89_phy_write32_mask(rtwdev, R_DPD_BND + (path << 8) + (kidx << 2), -+ 0x000001FF, pwsf[0]); -+ rtw89_phy_write32_mask(rtwdev, R_DPD_BND + (path << 8) + (kidx << 2), -+ 0x01FF0000, pwsf[1]); -+ } -+ } -+} -+ -+static void _tssi_rf_setting(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path) -+{ -+ enum rtw89_band band = rtwdev->hal.current_band_type; -+ -+ if (band == RTW89_BAND_2G) -+ rtw89_write_rf(rtwdev, path, RR_TXPOW, RR_TXPOW_TXG, 0x1); -+ else -+ rtw89_write_rf(rtwdev, path, RR_TXPOW, RR_TXPOW_TXA, 0x1); -+} -+ -+static void _tssi_set_sys(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy) -+{ -+ enum rtw89_band band = rtwdev->hal.current_band_type; -+ -+ rtw89_rfk_parser(rtwdev, &rtw8852a_tssi_sys_defs_tbl); -+ rtw89_rfk_parser_by_cond(rtwdev, band == RTW89_BAND_2G, -+ &rtw8852a_tssi_sys_defs_2g_tbl, -+ &rtw8852a_tssi_sys_defs_5g_tbl); -+} -+ -+static void _tssi_ini_txpwr_ctrl_bb(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path) -+{ -+ enum rtw89_band band = rtwdev->hal.current_band_type; -+ -+ rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, -+ &rtw8852a_tssi_txpwr_ctrl_bb_defs_a_tbl, -+ &rtw8852a_tssi_txpwr_ctrl_bb_defs_b_tbl); -+ rtw89_rfk_parser_by_cond(rtwdev, band == RTW89_BAND_2G, -+ &rtw8852a_tssi_txpwr_ctrl_bb_defs_2g_tbl, -+ &rtw8852a_tssi_txpwr_ctrl_bb_defs_5g_tbl); -+} -+ -+static void _tssi_ini_txpwr_ctrl_bb_he_tb(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path) -+{ -+ rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, -+ &rtw8852a_tssi_txpwr_ctrl_bb_he_tb_defs_a_tbl, -+ &rtw8852a_tssi_txpwr_ctrl_bb_he_tb_defs_b_tbl); -+} -+ -+static void _tssi_set_dck(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path) -+{ -+ rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, -+ &rtw8852a_tssi_dck_defs_a_tbl, -+ &rtw8852a_tssi_dck_defs_b_tbl); -+} -+ -+static void _tssi_set_tmeter_tbl(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path) -+{ -+#define __get_val(ptr, idx) \ -+({ \ -+ s8 *__ptr = (ptr); \ -+ u8 __idx = (idx), __i, __v; \ -+ u32 __val = 0; \ -+ for (__i = 0; __i < 4; __i++) { \ -+ __v = (__ptr[__idx + __i]); \ -+ __val |= (__v << (8 * __i)); \ -+ } \ -+ __val; \ -+}) -+ struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; -+ u8 ch = rtwdev->hal.current_channel; -+ u8 subband = rtwdev->hal.current_subband; -+ const u8 *thm_up_a = NULL; -+ const u8 *thm_down_a = NULL; -+ const u8 *thm_up_b = NULL; -+ const u8 *thm_down_b = NULL; -+ u8 thermal = 0xff; -+ s8 thm_ofst[64] = {0}; -+ u32 tmp = 0; -+ u8 i, j; -+ -+ switch (subband) { -+ case RTW89_CH_2G: -+ thm_up_a = rtw89_8852a_trk_cfg.delta_swingidx_2ga_p; -+ thm_down_a = rtw89_8852a_trk_cfg.delta_swingidx_2ga_n; -+ thm_up_b = rtw89_8852a_trk_cfg.delta_swingidx_2gb_p; -+ thm_down_b = rtw89_8852a_trk_cfg.delta_swingidx_2gb_n; -+ break; -+ case RTW89_CH_5G_BAND_1: -+ thm_up_a = rtw89_8852a_trk_cfg.delta_swingidx_5ga_p[0]; -+ thm_down_a = rtw89_8852a_trk_cfg.delta_swingidx_5ga_n[0]; -+ thm_up_b = rtw89_8852a_trk_cfg.delta_swingidx_5gb_p[0]; -+ thm_down_b = rtw89_8852a_trk_cfg.delta_swingidx_5gb_n[0]; -+ break; -+ case RTW89_CH_5G_BAND_3: -+ thm_up_a = rtw89_8852a_trk_cfg.delta_swingidx_5ga_p[1]; -+ thm_down_a = rtw89_8852a_trk_cfg.delta_swingidx_5ga_n[1]; -+ thm_up_b = rtw89_8852a_trk_cfg.delta_swingidx_5gb_p[1]; -+ thm_down_b = rtw89_8852a_trk_cfg.delta_swingidx_5gb_n[1]; -+ break; -+ case RTW89_CH_5G_BAND_4: -+ thm_up_a = rtw89_8852a_trk_cfg.delta_swingidx_5ga_p[2]; -+ thm_down_a = rtw89_8852a_trk_cfg.delta_swingidx_5ga_n[2]; -+ thm_up_b = rtw89_8852a_trk_cfg.delta_swingidx_5gb_p[2]; -+ thm_down_b = rtw89_8852a_trk_cfg.delta_swingidx_5gb_n[2]; -+ break; -+ } -+ -+ if (path == RF_PATH_A) { -+ thermal = tssi_info->thermal[RF_PATH_A]; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI] ch=%d thermal_pathA=0x%x\n", ch, thermal); -+ -+ rtw89_phy_write32_mask(rtwdev, R_P0_TMETER, B_P0_TMETER_DIS, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_P0_TMETER, B_P0_TMETER_TRK, 0x1); -+ -+ if (thermal == 0xff) { -+ rtw89_phy_write32_mask(rtwdev, R_P0_TMETER, B_P0_TMETER, 32); -+ rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, B_P0_RFCTM_VAL, 32); -+ -+ for (i = 0; i < 64; i += 4) { -+ rtw89_phy_write32(rtwdev, R_P0_TSSI_BASE + i, 0x0); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI] write 0x%x val=0x%08x\n", -+ 0x5c00 + i, 0x0); -+ } -+ -+ } else { -+ rtw89_phy_write32_mask(rtwdev, R_P0_TMETER, B_P0_TMETER, thermal); -+ rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, B_P0_RFCTM_VAL, -+ thermal); -+ -+ i = 0; -+ for (j = 0; j < 32; j++) -+ thm_ofst[j] = i < DELTA_SWINGIDX_SIZE ? -+ -thm_down_a[i++] : -+ -thm_down_a[DELTA_SWINGIDX_SIZE - 1]; -+ -+ i = 1; -+ for (j = 63; j >= 32; j--) -+ thm_ofst[j] = i < DELTA_SWINGIDX_SIZE ? -+ thm_up_a[i++] : -+ thm_up_a[DELTA_SWINGIDX_SIZE - 1]; -+ -+ for (i = 0; i < 64; i += 4) { -+ tmp = __get_val(thm_ofst, i); -+ rtw89_phy_write32(rtwdev, R_P0_TSSI_BASE + i, tmp); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI] write 0x%x val=0x%08x\n", -+ 0x5c00 + i, tmp); -+ } -+ } -+ rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, R_P0_RFCTM_RDY, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, R_P0_RFCTM_RDY, 0x0); -+ -+ } else { -+ thermal = tssi_info->thermal[RF_PATH_B]; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI] ch=%d thermal_pathB=0x%x\n", ch, thermal); -+ -+ rtw89_phy_write32_mask(rtwdev, R_P1_TMETER, B_P1_TMETER_DIS, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_P1_TMETER, B_P1_TMETER_TRK, 0x1); -+ -+ if (thermal == 0xff) { -+ rtw89_phy_write32_mask(rtwdev, R_P1_TMETER, B_P1_TMETER, 32); -+ rtw89_phy_write32_mask(rtwdev, R_P1_RFCTM, B_P1_RFCTM_VAL, 32); -+ -+ for (i = 0; i < 64; i += 4) { -+ rtw89_phy_write32(rtwdev, R_TSSI_THOF + i, 0x0); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI] write 0x%x val=0x%08x\n", -+ 0x7c00 + i, 0x0); -+ } -+ -+ } else { -+ rtw89_phy_write32_mask(rtwdev, R_P1_TMETER, B_P1_TMETER, thermal); -+ rtw89_phy_write32_mask(rtwdev, R_P1_RFCTM, B_P1_RFCTM_VAL, -+ thermal); -+ -+ i = 0; -+ for (j = 0; j < 32; j++) -+ thm_ofst[j] = i < DELTA_SWINGIDX_SIZE ? -+ -thm_down_b[i++] : -+ -thm_down_b[DELTA_SWINGIDX_SIZE - 1]; -+ -+ i = 1; -+ for (j = 63; j >= 32; j--) -+ thm_ofst[j] = i < DELTA_SWINGIDX_SIZE ? -+ thm_up_b[i++] : -+ thm_up_b[DELTA_SWINGIDX_SIZE - 1]; -+ -+ for (i = 0; i < 64; i += 4) { -+ tmp = __get_val(thm_ofst, i); -+ rtw89_phy_write32(rtwdev, R_TSSI_THOF + i, tmp); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI] write 0x%x val=0x%08x\n", -+ 0x7c00 + i, tmp); -+ } -+ } -+ rtw89_phy_write32_mask(rtwdev, R_P1_RFCTM, R_P1_RFCTM_RDY, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_P1_RFCTM, R_P1_RFCTM_RDY, 0x0); -+ } -+#undef __get_val -+} -+ -+static void _tssi_set_dac_gain_tbl(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path) -+{ -+ rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, -+ &rtw8852a_tssi_dac_gain_tbl_defs_a_tbl, -+ &rtw8852a_tssi_dac_gain_tbl_defs_b_tbl); -+} -+ -+static void _tssi_slope_cal_org(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path) -+{ -+ rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, -+ &rtw8852a_tssi_slope_cal_org_defs_a_tbl, -+ &rtw8852a_tssi_slope_cal_org_defs_b_tbl); -+} -+ -+static void _tssi_set_rf_gap_tbl(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path) -+{ -+ rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, -+ &rtw8852a_tssi_rf_gap_tbl_defs_a_tbl, -+ &rtw8852a_tssi_rf_gap_tbl_defs_b_tbl); -+} -+ -+static void _tssi_set_slope(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path) -+{ -+ rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, -+ &rtw8852a_tssi_slope_defs_a_tbl, -+ &rtw8852a_tssi_slope_defs_b_tbl); -+} -+ -+static void _tssi_set_track(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path) -+{ -+ rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, -+ &rtw8852a_tssi_track_defs_a_tbl, -+ &rtw8852a_tssi_track_defs_b_tbl); -+} -+ -+static void _tssi_set_txagc_offset_mv_avg(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path) -+{ -+ rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, -+ &rtw8852a_tssi_txagc_ofst_mv_avg_defs_a_tbl, -+ &rtw8852a_tssi_txagc_ofst_mv_avg_defs_b_tbl); -+} -+ -+static void _tssi_pak(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path) -+{ -+ u8 subband = rtwdev->hal.current_subband; -+ -+ switch (subband) { -+ case RTW89_CH_2G: -+ rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, -+ &rtw8852a_tssi_pak_defs_a_2g_tbl, -+ &rtw8852a_tssi_pak_defs_b_2g_tbl); -+ break; -+ case RTW89_CH_5G_BAND_1: -+ rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, -+ &rtw8852a_tssi_pak_defs_a_5g_1_tbl, -+ &rtw8852a_tssi_pak_defs_b_5g_1_tbl); -+ break; -+ case RTW89_CH_5G_BAND_3: -+ rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, -+ &rtw8852a_tssi_pak_defs_a_5g_3_tbl, -+ &rtw8852a_tssi_pak_defs_b_5g_3_tbl); -+ break; -+ case RTW89_CH_5G_BAND_4: -+ rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, -+ &rtw8852a_tssi_pak_defs_a_5g_4_tbl, -+ &rtw8852a_tssi_pak_defs_b_5g_4_tbl); -+ break; -+ } -+} -+ -+static void _tssi_enable(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy) -+{ -+ struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; -+ u8 i; -+ -+ for (i = 0; i < RF_PATH_NUM_8852A; i++) { -+ _tssi_set_track(rtwdev, phy, i); -+ _tssi_set_txagc_offset_mv_avg(rtwdev, phy, i); -+ -+ rtw89_rfk_parser_by_cond(rtwdev, i == RF_PATH_A, -+ &rtw8852a_tssi_enable_defs_a_tbl, -+ &rtw8852a_tssi_enable_defs_b_tbl); -+ -+ tssi_info->base_thermal[i] = -+ ewma_thermal_read(&rtwdev->phystat.avg_thermal[i]); -+ rtwdev->is_tssi_mode[i] = true; -+ } -+} -+ -+static void _tssi_disable(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy) -+{ -+ rtw89_rfk_parser(rtwdev, &rtw8852a_tssi_disable_defs_tbl); -+ -+ rtwdev->is_tssi_mode[RF_PATH_A] = false; -+ rtwdev->is_tssi_mode[RF_PATH_B] = false; -+} -+ -+static u32 _tssi_get_cck_group(struct rtw89_dev *rtwdev, u8 ch) -+{ -+ switch (ch) { -+ case 1 ... 2: -+ return 0; -+ case 3 ... 5: -+ return 1; -+ case 6 ... 8: -+ return 2; -+ case 9 ... 11: -+ return 3; -+ case 12 ... 13: -+ return 4; -+ case 14: -+ return 5; -+ } -+ -+ return 0; -+} -+ -+#define TSSI_EXTRA_GROUP_BIT (BIT(31)) -+#define TSSI_EXTRA_GROUP(idx) (TSSI_EXTRA_GROUP_BIT | (idx)) -+#define IS_TSSI_EXTRA_GROUP(group) ((group) & TSSI_EXTRA_GROUP_BIT) -+#define TSSI_EXTRA_GET_GROUP_IDX1(group) ((group) & ~TSSI_EXTRA_GROUP_BIT) -+#define TSSI_EXTRA_GET_GROUP_IDX2(group) (TSSI_EXTRA_GET_GROUP_IDX1(group) + 1) -+ -+static u32 _tssi_get_ofdm_group(struct rtw89_dev *rtwdev, u8 ch) -+{ -+ switch (ch) { -+ case 1 ... 2: -+ return 0; -+ case 3 ... 5: -+ return 1; -+ case 6 ... 8: -+ return 2; -+ case 9 ... 11: -+ return 3; -+ case 12 ... 14: -+ return 4; -+ case 36 ... 40: -+ return 5; -+ case 41 ... 43: -+ return TSSI_EXTRA_GROUP(5); -+ case 44 ... 48: -+ return 6; -+ case 49 ... 51: -+ return TSSI_EXTRA_GROUP(6); -+ case 52 ... 56: -+ return 7; -+ case 57 ... 59: -+ return TSSI_EXTRA_GROUP(7); -+ case 60 ... 64: -+ return 8; -+ case 100 ... 104: -+ return 9; -+ case 105 ... 107: -+ return TSSI_EXTRA_GROUP(9); -+ case 108 ... 112: -+ return 10; -+ case 113 ... 115: -+ return TSSI_EXTRA_GROUP(10); -+ case 116 ... 120: -+ return 11; -+ case 121 ... 123: -+ return TSSI_EXTRA_GROUP(11); -+ case 124 ... 128: -+ return 12; -+ case 129 ... 131: -+ return TSSI_EXTRA_GROUP(12); -+ case 132 ... 136: -+ return 13; -+ case 137 ... 139: -+ return TSSI_EXTRA_GROUP(13); -+ case 140 ... 144: -+ return 14; -+ case 149 ... 153: -+ return 15; -+ case 154 ... 156: -+ return TSSI_EXTRA_GROUP(15); -+ case 157 ... 161: -+ return 16; -+ case 162 ... 164: -+ return TSSI_EXTRA_GROUP(16); -+ case 165 ... 169: -+ return 17; -+ case 170 ... 172: -+ return TSSI_EXTRA_GROUP(17); -+ case 173 ... 177: -+ return 18; -+ } -+ -+ return 0; -+} -+ -+static u32 _tssi_get_trim_group(struct rtw89_dev *rtwdev, u8 ch) -+{ -+ switch (ch) { -+ case 1 ... 8: -+ return 0; -+ case 9 ... 14: -+ return 1; -+ case 36 ... 48: -+ return 2; -+ case 52 ... 64: -+ return 3; -+ case 100 ... 112: -+ return 4; -+ case 116 ... 128: -+ return 5; -+ case 132 ... 144: -+ return 6; -+ case 149 ... 177: -+ return 7; -+ } -+ -+ return 0; -+} -+ -+static s8 _tssi_get_ofdm_de(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path) -+{ -+ struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; -+ u8 ch = rtwdev->hal.current_channel; -+ u32 gidx, gidx_1st, gidx_2nd; -+ s8 de_1st = 0; -+ s8 de_2nd = 0; -+ s8 val; -+ -+ gidx = _tssi_get_ofdm_group(rtwdev, ch); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI][TRIM]: path=%d mcs group_idx=0x%x\n", -+ path, gidx); -+ -+ if (IS_TSSI_EXTRA_GROUP(gidx)) { -+ gidx_1st = TSSI_EXTRA_GET_GROUP_IDX1(gidx); -+ gidx_2nd = TSSI_EXTRA_GET_GROUP_IDX2(gidx); -+ de_1st = tssi_info->tssi_mcs[path][gidx_1st]; -+ de_2nd = tssi_info->tssi_mcs[path][gidx_2nd]; -+ val = (de_1st + de_2nd) / 2; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI][TRIM]: path=%d mcs de=%d 1st=%d 2nd=%d\n", -+ path, val, de_1st, de_2nd); -+ } else { -+ val = tssi_info->tssi_mcs[path][gidx]; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI][TRIM]: path=%d mcs de=%d\n", path, val); -+ } -+ -+ return val; -+} -+ -+static s8 _tssi_get_ofdm_trim_de(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path) -+{ -+ struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; -+ u8 ch = rtwdev->hal.current_channel; -+ u32 tgidx, tgidx_1st, tgidx_2nd; -+ s8 tde_1st = 0; -+ s8 tde_2nd = 0; -+ s8 val; -+ -+ tgidx = _tssi_get_trim_group(rtwdev, ch); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI][TRIM]: path=%d mcs trim_group_idx=0x%x\n", -+ path, tgidx); -+ -+ if (IS_TSSI_EXTRA_GROUP(tgidx)) { -+ tgidx_1st = TSSI_EXTRA_GET_GROUP_IDX1(tgidx); -+ tgidx_2nd = TSSI_EXTRA_GET_GROUP_IDX2(tgidx); -+ tde_1st = tssi_info->tssi_trim[path][tgidx_1st]; -+ tde_2nd = tssi_info->tssi_trim[path][tgidx_2nd]; -+ val = (tde_1st + tde_2nd) / 2; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI][TRIM]: path=%d mcs trim_de=%d 1st=%d 2nd=%d\n", -+ path, val, tde_1st, tde_2nd); -+ } else { -+ val = tssi_info->tssi_trim[path][tgidx]; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI][TRIM]: path=%d mcs trim_de=%d\n", -+ path, val); -+ } -+ -+ return val; -+} -+ -+static void _tssi_set_efuse_to_de(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy) -+{ -+#define __DE_MASK 0x003ff000 -+ struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; -+ static const u32 r_cck_long[RF_PATH_NUM_8852A] = {0x5858, 0x7858}; -+ static const u32 r_cck_short[RF_PATH_NUM_8852A] = {0x5860, 0x7860}; -+ static const u32 r_mcs_20m[RF_PATH_NUM_8852A] = {0x5838, 0x7838}; -+ static const u32 r_mcs_40m[RF_PATH_NUM_8852A] = {0x5840, 0x7840}; -+ static const u32 r_mcs_80m[RF_PATH_NUM_8852A] = {0x5848, 0x7848}; -+ static const u32 r_mcs_80m_80m[RF_PATH_NUM_8852A] = {0x5850, 0x7850}; -+ static const u32 r_mcs_5m[RF_PATH_NUM_8852A] = {0x5828, 0x7828}; -+ static const u32 r_mcs_10m[RF_PATH_NUM_8852A] = {0x5830, 0x7830}; -+ u8 ch = rtwdev->hal.current_channel; -+ u8 i, gidx; -+ s8 ofdm_de; -+ s8 trim_de; -+ s32 val; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, "[TSSI][TRIM]: phy=%d ch=%d\n", -+ phy, ch); -+ -+ for (i = 0; i < RF_PATH_NUM_8852A; i++) { -+ gidx = _tssi_get_cck_group(rtwdev, ch); -+ trim_de = _tssi_get_ofdm_trim_de(rtwdev, phy, i); -+ val = tssi_info->tssi_cck[i][gidx] + trim_de; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI][TRIM]: path=%d cck[%d]=0x%x trim=0x%x\n", -+ i, gidx, tssi_info->tssi_cck[i][gidx], trim_de); -+ -+ rtw89_phy_write32_mask(rtwdev, r_cck_long[i], __DE_MASK, val); -+ rtw89_phy_write32_mask(rtwdev, r_cck_short[i], __DE_MASK, val); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI] Set TSSI CCK DE 0x%x[21:12]=0x%x\n", -+ r_cck_long[i], -+ rtw89_phy_read32_mask(rtwdev, r_cck_long[i], -+ __DE_MASK)); -+ -+ ofdm_de = _tssi_get_ofdm_de(rtwdev, phy, i); -+ trim_de = _tssi_get_ofdm_trim_de(rtwdev, phy, i); -+ val = ofdm_de + trim_de; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI][TRIM]: path=%d mcs=0x%x trim=0x%x\n", -+ i, ofdm_de, trim_de); -+ -+ rtw89_phy_write32_mask(rtwdev, r_mcs_20m[i], __DE_MASK, val); -+ rtw89_phy_write32_mask(rtwdev, r_mcs_40m[i], __DE_MASK, val); -+ rtw89_phy_write32_mask(rtwdev, r_mcs_80m[i], __DE_MASK, val); -+ rtw89_phy_write32_mask(rtwdev, r_mcs_80m_80m[i], __DE_MASK, val); -+ rtw89_phy_write32_mask(rtwdev, r_mcs_5m[i], __DE_MASK, val); -+ rtw89_phy_write32_mask(rtwdev, r_mcs_10m[i], __DE_MASK, val); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI] Set TSSI MCS DE 0x%x[21:12]=0x%x\n", -+ r_mcs_20m[i], -+ rtw89_phy_read32_mask(rtwdev, r_mcs_20m[i], -+ __DE_MASK)); -+ } -+#undef __DE_MASK -+} -+ -+static void _tssi_track(struct rtw89_dev *rtwdev) -+{ -+ static const u32 tx_gain_scale_table[] = { -+ 0x400, 0x40e, 0x41d, 0x427, 0x43c, 0x44c, 0x45c, 0x46c, -+ 0x400, 0x39d, 0x3ab, 0x3b8, 0x3c6, 0x3d4, 0x3e2, 0x3f1 -+ }; -+ struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; -+ u8 path; -+ u8 cur_ther; -+ s32 delta_ther = 0, gain_offset_int, gain_offset_float; -+ s8 gain_offset; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, "[TSSI][TRK] %s:\n", -+ __func__); -+ -+ if (!rtwdev->is_tssi_mode[RF_PATH_A]) -+ return; -+ if (!rtwdev->is_tssi_mode[RF_PATH_B]) -+ return; -+ -+ for (path = RF_PATH_A; path < RF_PATH_NUM_8852A; path++) { -+ if (!tssi_info->tssi_tracking_check[path]) { -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, "[TSSI][TRK] return!!!\n"); -+ continue; -+ } -+ -+ cur_ther = (u8)rtw89_phy_read32_mask(rtwdev, -+ R_TSSI_THER + (path << 13), -+ B_TSSI_THER); -+ -+ if (cur_ther == 0 || tssi_info->base_thermal[path] == 0) -+ continue; -+ -+ delta_ther = cur_ther - tssi_info->base_thermal[path]; -+ -+ gain_offset = (s8)delta_ther * 15 / 10; -+ -+ tssi_info->extra_ofst[path] = gain_offset; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI][TRK] base_thermal=%d gain_offset=0x%x path=%d\n", -+ tssi_info->base_thermal[path], gain_offset, path); -+ -+ gain_offset_int = gain_offset >> 3; -+ gain_offset_float = gain_offset & 7; -+ -+ if (gain_offset_int > 15) -+ gain_offset_int = 15; -+ else if (gain_offset_int < -16) -+ gain_offset_int = -16; -+ -+ rtw89_phy_write32_mask(rtwdev, R_DPD_OFT_EN + (path << 13), -+ B_DPD_OFT_EN, 0x1); -+ -+ rtw89_phy_write32_mask(rtwdev, R_TXGAIN_SCALE + (path << 13), -+ B_TXGAIN_SCALE_EN, 0x1); -+ -+ rtw89_phy_write32_mask(rtwdev, R_DPD_OFT_ADDR + (path << 13), -+ B_DPD_OFT_ADDR, gain_offset_int); -+ -+ rtw89_phy_write32_mask(rtwdev, R_TXGAIN_SCALE + (path << 13), -+ B_TXGAIN_SCALE_OFT, -+ tx_gain_scale_table[gain_offset_float]); -+ } -+} -+ -+static void _tssi_high_power(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy) -+{ -+ struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; -+ u8 ch = rtwdev->hal.current_channel, ch_tmp; -+ u8 bw = rtwdev->hal.current_band_width; -+ u8 subband = rtwdev->hal.current_subband; -+ s8 power; -+ s32 xdbm; -+ -+ if (bw == RTW89_CHANNEL_WIDTH_40) -+ ch_tmp = ch - 2; -+ else if (bw == RTW89_CHANNEL_WIDTH_80) -+ ch_tmp = ch - 6; -+ else -+ ch_tmp = ch; -+ -+ power = rtw89_phy_read_txpwr_limit(rtwdev, bw, RTW89_1TX, -+ RTW89_RS_MCS, RTW89_NONBF, ch_tmp); -+ -+ xdbm = power * 100 / 4; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, "[TSSI] %s: phy=%d xdbm=%d\n", -+ __func__, phy, xdbm); -+ -+ if (xdbm > 1800 && subband == RTW89_CH_2G) { -+ tssi_info->tssi_tracking_check[RF_PATH_A] = true; -+ tssi_info->tssi_tracking_check[RF_PATH_B] = true; -+ } else { -+ rtw89_rfk_parser(rtwdev, &rtw8852a_tssi_tracking_defs_tbl); -+ tssi_info->extra_ofst[RF_PATH_A] = 0; -+ tssi_info->extra_ofst[RF_PATH_B] = 0; -+ tssi_info->tssi_tracking_check[RF_PATH_A] = false; -+ tssi_info->tssi_tracking_check[RF_PATH_B] = false; -+ } -+} -+ -+static void _tssi_hw_tx(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ u8 path, s16 pwr_dbm, u8 enable) -+{ -+ rtw8852a_bb_set_plcp_tx(rtwdev); -+ rtw8852a_bb_cfg_tx_path(rtwdev, path); -+ rtw8852a_bb_set_power(rtwdev, pwr_dbm, phy); -+ rtw8852a_bb_set_pmac_pkt_tx(rtwdev, enable, 20, 5000, 0, phy); -+} -+ -+static void _tssi_pre_tx(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy) -+{ -+ struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; -+ const struct rtw89_chip_info *mac_reg = rtwdev->chip; -+ u8 ch = rtwdev->hal.current_channel, ch_tmp; -+ u8 bw = rtwdev->hal.current_band_width; -+ u16 tx_en; -+ u8 phy_map = rtw89_btc_phymap(rtwdev, phy, 0); -+ s8 power; -+ s16 xdbm; -+ u32 i, tx_counter = 0; -+ -+ if (bw == RTW89_CHANNEL_WIDTH_40) -+ ch_tmp = ch - 2; -+ else if (bw == RTW89_CHANNEL_WIDTH_80) -+ ch_tmp = ch - 6; -+ else -+ ch_tmp = ch; -+ -+ power = rtw89_phy_read_txpwr_limit(rtwdev, RTW89_CHANNEL_WIDTH_20, RTW89_1TX, -+ RTW89_RS_OFDM, RTW89_NONBF, ch_tmp); -+ -+ xdbm = (power * 100) >> mac_reg->txpwr_factor_mac; -+ -+ if (xdbm > 1800) -+ xdbm = 68; -+ else -+ xdbm = power * 2; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI] %s: phy=%d org_power=%d xdbm=%d\n", -+ __func__, phy, power, xdbm); -+ -+ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_DPK, BTC_WRFK_START); -+ rtw89_mac_stop_sch_tx(rtwdev, phy, &tx_en, RTW89_SCH_TX_SEL_ALL); -+ _wait_rx_mode(rtwdev, _kpath(rtwdev, phy)); -+ tx_counter = rtw89_phy_read32_mask(rtwdev, R_TX_COUNTER, MASKLWORD); -+ -+ _tssi_hw_tx(rtwdev, phy, RF_PATH_AB, xdbm, true); -+ mdelay(15); -+ _tssi_hw_tx(rtwdev, phy, RF_PATH_AB, xdbm, false); -+ -+ tx_counter = rtw89_phy_read32_mask(rtwdev, R_TX_COUNTER, MASKLWORD) - -+ tx_counter; -+ -+ if (rtw89_phy_read32_mask(rtwdev, R_TXAGC_BB, MASKHWORD) != 0xc000 && -+ rtw89_phy_read32_mask(rtwdev, R_TXAGC_BB, MASKHWORD) != 0x0) { -+ for (i = 0; i < 6; i++) { -+ tssi_info->default_txagc_offset[RF_PATH_A] = -+ rtw89_phy_read32_mask(rtwdev, R_TXAGC_BB, -+ MASKBYTE3); -+ -+ if (tssi_info->default_txagc_offset[RF_PATH_A] != 0x0) -+ break; -+ } -+ } -+ -+ if (rtw89_phy_read32_mask(rtwdev, R_TXAGC_BB_S1, MASKHWORD) != 0xc000 && -+ rtw89_phy_read32_mask(rtwdev, R_TXAGC_BB_S1, MASKHWORD) != 0x0) { -+ for (i = 0; i < 6; i++) { -+ tssi_info->default_txagc_offset[RF_PATH_B] = -+ rtw89_phy_read32_mask(rtwdev, R_TXAGC_BB_S1, -+ MASKBYTE3); -+ -+ if (tssi_info->default_txagc_offset[RF_PATH_B] != 0x0) -+ break; -+ } -+ } -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI] %s: tx counter=%d\n", -+ __func__, tx_counter); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI] Backup R_TXAGC_BB=0x%x R_TXAGC_BB_S1=0x%x\n", -+ tssi_info->default_txagc_offset[RF_PATH_A], -+ tssi_info->default_txagc_offset[RF_PATH_B]); -+ -+ rtw8852a_bb_tx_mode_switch(rtwdev, phy, 0); -+ -+ rtw89_mac_resume_sch_tx(rtwdev, phy, tx_en); -+ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_DPK, BTC_WRFK_STOP); -+} -+ -+void rtw8852a_rck(struct rtw89_dev *rtwdev) -+{ -+ u8 path; -+ -+ for (path = 0; path < 2; path++) -+ _rck(rtwdev, path); -+} -+ -+void rtw8852a_dack(struct rtw89_dev *rtwdev) -+{ -+ u8 phy_map = rtw89_btc_phymap(rtwdev, RTW89_PHY_0, 0); -+ -+ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_DACK, BTC_WRFK_START); -+ _dac_cal(rtwdev, false); -+ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_DACK, BTC_WRFK_STOP); -+} -+ -+void rtw8852a_iqk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx) -+{ -+ u16 tx_en; -+ u8 phy_map = rtw89_btc_phymap(rtwdev, phy_idx, 0); -+ -+ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_IQK, BTC_WRFK_START); -+ rtw89_mac_stop_sch_tx(rtwdev, phy_idx, &tx_en, RTW89_SCH_TX_SEL_ALL); -+ _wait_rx_mode(rtwdev, _kpath(rtwdev, phy_idx)); -+ -+ _iqk_init(rtwdev); -+ if (rtwdev->dbcc_en) -+ _iqk_dbcc(rtwdev, phy_idx); -+ else -+ _iqk(rtwdev, phy_idx, false); -+ -+ rtw89_mac_resume_sch_tx(rtwdev, phy_idx, tx_en); -+ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_IQK, BTC_WRFK_STOP); -+} -+ -+void rtw8852a_iqk_track(struct rtw89_dev *rtwdev) -+{ -+ _iqk_track(rtwdev); -+} -+ -+void rtw8852a_rx_dck(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, -+ bool is_afe) -+{ -+ u16 tx_en; -+ u8 phy_map = rtw89_btc_phymap(rtwdev, phy_idx, 0); -+ -+ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_RXDCK, BTC_WRFK_START); -+ rtw89_mac_stop_sch_tx(rtwdev, phy_idx, &tx_en, RTW89_SCH_TX_SEL_ALL); -+ _wait_rx_mode(rtwdev, _kpath(rtwdev, phy_idx)); -+ -+ _rx_dck(rtwdev, phy_idx, is_afe); -+ -+ rtw89_mac_resume_sch_tx(rtwdev, phy_idx, tx_en); -+ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_RXDCK, BTC_WRFK_STOP); -+} -+ -+void rtw8852a_dpk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx) -+{ -+ u16 tx_en; -+ u8 phy_map = rtw89_btc_phymap(rtwdev, phy_idx, 0); -+ -+ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_DPK, BTC_WRFK_START); -+ rtw89_mac_stop_sch_tx(rtwdev, phy_idx, &tx_en, RTW89_SCH_TX_SEL_ALL); -+ _wait_rx_mode(rtwdev, _kpath(rtwdev, phy_idx)); -+ -+ rtwdev->dpk.is_dpk_enable = true; -+ rtwdev->dpk.is_dpk_reload_en = false; -+ _dpk(rtwdev, phy_idx, false); -+ -+ rtw89_mac_resume_sch_tx(rtwdev, phy_idx, tx_en); -+ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_DPK, BTC_WRFK_STOP); -+} -+ -+void rtw8852a_dpk_track(struct rtw89_dev *rtwdev) -+{ -+ _dpk_track(rtwdev); -+} -+ -+void rtw8852a_tssi(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy) -+{ -+ u8 i; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, "[TSSI] %s: phy=%d\n", -+ __func__, phy); -+ -+ _tssi_disable(rtwdev, phy); -+ -+ for (i = RF_PATH_A; i < RF_PATH_NUM_8852A; i++) { -+ _tssi_rf_setting(rtwdev, phy, i); -+ _tssi_set_sys(rtwdev, phy); -+ _tssi_ini_txpwr_ctrl_bb(rtwdev, phy, i); -+ _tssi_ini_txpwr_ctrl_bb_he_tb(rtwdev, phy, i); -+ _tssi_set_dck(rtwdev, phy, i); -+ _tssi_set_tmeter_tbl(rtwdev, phy, i); -+ _tssi_set_dac_gain_tbl(rtwdev, phy, i); -+ _tssi_slope_cal_org(rtwdev, phy, i); -+ _tssi_set_rf_gap_tbl(rtwdev, phy, i); -+ _tssi_set_slope(rtwdev, phy, i); -+ _tssi_pak(rtwdev, phy, i); -+ } -+ -+ _tssi_enable(rtwdev, phy); -+ _tssi_set_efuse_to_de(rtwdev, phy); -+ _tssi_high_power(rtwdev, phy); -+ _tssi_pre_tx(rtwdev, phy); -+} -+ -+void rtw8852a_tssi_scan(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy) -+{ -+ u8 i; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, "[TSSI] %s: phy=%d\n", -+ __func__, phy); -+ -+ if (!rtwdev->is_tssi_mode[RF_PATH_A]) -+ return; -+ if (!rtwdev->is_tssi_mode[RF_PATH_B]) -+ return; -+ -+ _tssi_disable(rtwdev, phy); -+ -+ for (i = RF_PATH_A; i < RF_PATH_NUM_8852A; i++) { -+ _tssi_rf_setting(rtwdev, phy, i); -+ _tssi_set_sys(rtwdev, phy); -+ _tssi_set_tmeter_tbl(rtwdev, phy, i); -+ _tssi_pak(rtwdev, phy, i); -+ } -+ -+ _tssi_enable(rtwdev, phy); -+ _tssi_set_efuse_to_de(rtwdev, phy); -+} -+ -+void rtw8852a_tssi_track(struct rtw89_dev *rtwdev) -+{ -+ _tssi_track(rtwdev); -+} -+ -+static -+void _rtw8852a_tssi_avg_scan(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy) -+{ -+ if (!rtwdev->is_tssi_mode[RF_PATH_A] && !rtwdev->is_tssi_mode[RF_PATH_B]) -+ return; -+ -+ /* disable */ -+ rtw89_rfk_parser(rtwdev, &rtw8852a_tssi_disable_defs_tbl); -+ -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_AVG, B_P0_TSSI_AVG, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_MV_AVG, B_P0_TSSI_MV_AVG, 0x0); -+ -+ rtw89_phy_write32_mask(rtwdev, R_P1_TSSI_AVG, B_P1_TSSI_AVG, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_P1_TSSI_MV_AVG, B_P1_TSSI_MV_AVG, 0x0); -+ -+ /* enable */ -+ rtw89_rfk_parser(rtwdev, &rtw8852a_tssi_enable_defs_ab_tbl); -+} -+ -+static -+void _rtw8852a_tssi_set_avg(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy) -+{ -+ if (!rtwdev->is_tssi_mode[RF_PATH_A] && !rtwdev->is_tssi_mode[RF_PATH_B]) -+ return; -+ -+ /* disable */ -+ rtw89_rfk_parser(rtwdev, &rtw8852a_tssi_disable_defs_tbl); -+ -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_AVG, B_P0_TSSI_AVG, 0x4); -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_MV_AVG, B_P0_TSSI_MV_AVG, 0x2); -+ -+ rtw89_phy_write32_mask(rtwdev, R_P1_TSSI_AVG, B_P1_TSSI_AVG, 0x4); -+ rtw89_phy_write32_mask(rtwdev, R_P1_TSSI_MV_AVG, B_P1_TSSI_MV_AVG, 0x2); -+ -+ /* enable */ -+ rtw89_rfk_parser(rtwdev, &rtw8852a_tssi_enable_defs_ab_tbl); -+} -+ -+static void rtw8852a_tssi_set_avg(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy, bool enable) -+{ -+ if (!rtwdev->is_tssi_mode[RF_PATH_A] && !rtwdev->is_tssi_mode[RF_PATH_B]) -+ return; -+ -+ if (enable) { -+ /* SCAN_START */ -+ _rtw8852a_tssi_avg_scan(rtwdev, phy); -+ } else { -+ /* SCAN_END */ -+ _rtw8852a_tssi_set_avg(rtwdev, phy); -+ } -+} -+ -+static void rtw8852a_tssi_default_txagc(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy, bool enable) -+{ -+ struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; -+ u8 i; -+ -+ if (!rtwdev->is_tssi_mode[RF_PATH_A] && !rtwdev->is_tssi_mode[RF_PATH_B]) -+ return; -+ -+ if (enable) { -+ if (rtw89_phy_read32_mask(rtwdev, R_TXAGC_BB, B_TXAGC_BB_OFT) != 0xc000 && -+ rtw89_phy_read32_mask(rtwdev, R_TXAGC_BB, B_TXAGC_BB_OFT) != 0x0) { -+ for (i = 0; i < 6; i++) { -+ tssi_info->default_txagc_offset[RF_PATH_A] = -+ rtw89_phy_read32_mask(rtwdev, R_TXAGC_BB, -+ B_TXAGC_BB); -+ if (tssi_info->default_txagc_offset[RF_PATH_A]) -+ break; -+ } -+ } -+ -+ if (rtw89_phy_read32_mask(rtwdev, R_TXAGC_BB_S1, B_TXAGC_BB_S1_OFT) != 0xc000 && -+ rtw89_phy_read32_mask(rtwdev, R_TXAGC_BB_S1, B_TXAGC_BB_S1_OFT) != 0x0) { -+ for (i = 0; i < 6; i++) { -+ tssi_info->default_txagc_offset[RF_PATH_B] = -+ rtw89_phy_read32_mask(rtwdev, R_TXAGC_BB_S1, -+ B_TXAGC_BB_S1); -+ if (tssi_info->default_txagc_offset[RF_PATH_B]) -+ break; -+ } -+ } -+ } else { -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_OFT, -+ tssi_info->default_txagc_offset[RF_PATH_A]); -+ rtw89_phy_write32_mask(rtwdev, R_P1_TSSI_TRK, B_P1_TSSI_OFT, -+ tssi_info->default_txagc_offset[RF_PATH_B]); -+ -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_OFT_EN, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_OFT_EN, 0x1); -+ -+ rtw89_phy_write32_mask(rtwdev, R_P1_TSSI_TRK, B_P1_TSSI_OFT_EN, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_P1_TSSI_TRK, B_P1_TSSI_OFT_EN, 0x1); -+ } -+} -+ -+void rtw8852a_wifi_scan_notify(struct rtw89_dev *rtwdev, -+ bool scan_start, enum rtw89_phy_idx phy_idx) -+{ -+ if (scan_start) { -+ rtw8852a_tssi_default_txagc(rtwdev, phy_idx, true); -+ rtw8852a_tssi_set_avg(rtwdev, phy_idx, true); -+ } else { -+ rtw8852a_tssi_default_txagc(rtwdev, phy_idx, false); -+ rtw8852a_tssi_set_avg(rtwdev, phy_idx, false); -+ } -+} -diff --git a/drivers/net/wireless/realtek/rtw89/rtw8852a_rfk.h b/drivers/net/wireless/realtek/rtw89/rtw8852a_rfk.h -new file mode 100644 -index 000000000000..ea36553a76b7 ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852a_rfk.h -@@ -0,0 +1,24 @@ -+/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ -+/* Copyright(c) 2019-2020 Realtek Corporation -+ */ -+ -+#ifndef __RTW89_8852A_RFK_H__ -+#define __RTW89_8852A_RFK_H__ -+ -+#include "core.h" -+ -+void rtw8852a_rck(struct rtw89_dev *rtwdev); -+void rtw8852a_dack(struct rtw89_dev *rtwdev); -+void rtw8852a_iqk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx); -+void rtw8852a_iqk_track(struct rtw89_dev *rtwdev); -+void rtw8852a_rx_dck(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, -+ bool is_afe); -+void rtw8852a_dpk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy); -+void rtw8852a_dpk_track(struct rtw89_dev *rtwdev); -+void rtw8852a_tssi(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy); -+void rtw8852a_tssi_scan(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy); -+void rtw8852a_tssi_track(struct rtw89_dev *rtwdev); -+void rtw8852a_wifi_scan_notify(struct rtw89_dev *rtwdev, bool scan_start, -+ enum rtw89_phy_idx phy_idx); -+ -+#endif -diff --git a/drivers/net/wireless/realtek/rtw89/rtw8852a_rfk_table.c b/drivers/net/wireless/realtek/rtw89/rtw8852a_rfk_table.c -new file mode 100644 -index 000000000000..510570090502 ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852a_rfk_table.c -@@ -0,0 +1,1607 @@ -+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause -+/* Copyright(c) 2019-2020 Realtek Corporation -+ */ -+ -+#include "rtw8852a_rfk_table.h" -+ -+static const struct rtw89_reg5_def rtw8852a_tssi_sys_defs[] = { -+ DECL_RFK_WM(0x12a8, 0x00000001, 0x00000001), -+ DECL_RFK_WM(0x12a8, 0x0000000e, 0x00000002), -+ DECL_RFK_WM(0x32a8, 0x00000001, 0x00000001), -+ DECL_RFK_WM(0x32a8, 0x0000000e, 0x00000002), -+ DECL_RFK_WM(0x12bc, 0x000000f0, 0x00000005), -+ DECL_RFK_WM(0x12bc, 0x00000f00, 0x00000005), -+ DECL_RFK_WM(0x12bc, 0x000f0000, 0x00000005), -+ DECL_RFK_WM(0x12bc, 0x0000f000, 0x00000005), -+ DECL_RFK_WM(0x120c, 0x000000ff, 0x00000033), -+ DECL_RFK_WM(0x12c0, 0x0ff00000, 0x00000033), -+ DECL_RFK_WM(0x32bc, 0x000000f0, 0x00000005), -+ DECL_RFK_WM(0x32bc, 0x00000f00, 0x00000005), -+ DECL_RFK_WM(0x32bc, 0x000f0000, 0x00000005), -+ DECL_RFK_WM(0x32bc, 0x0000f000, 0x00000005), -+ DECL_RFK_WM(0x320c, 0x000000ff, 0x00000033), -+ DECL_RFK_WM(0x32c0, 0x0ff00000, 0x00000033), -+ DECL_RFK_WM(0x0300, 0xff000000, 0x00000019), -+ DECL_RFK_WM(0x0304, 0x000000ff, 0x00000019), -+ DECL_RFK_WM(0x0304, 0x0000ff00, 0x0000001d), -+ DECL_RFK_WM(0x0314, 0xffff0000, 0x00002044), -+ DECL_RFK_WM(0x0318, 0x0000ffff, 0x00002042), -+ DECL_RFK_WM(0x0318, 0xffff0000, 0x00002002), -+ DECL_RFK_WM(0x0020, 0x00006000, 0x00000003), -+ DECL_RFK_WM(0x0024, 0x00006000, 0x00000003), -+ DECL_RFK_WM(0x0704, 0xffff0000, 0x0000601e), -+ DECL_RFK_WM(0x2704, 0xffff0000, 0x0000601e), -+ DECL_RFK_WM(0x0700, 0xf0000000, 0x00000004), -+ DECL_RFK_WM(0x2700, 0xf0000000, 0x00000004), -+ DECL_RFK_WM(0x0650, 0x3c000000, 0x00000000), -+ DECL_RFK_WM(0x2650, 0x3c000000, 0x00000000), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_tssi_sys_defs); -+ -+static const struct rtw89_reg5_def rtw8852a_tssi_sys_defs_2g[] = { -+ DECL_RFK_WM(0x120c, 0x000000ff, 0x00000033), -+ DECL_RFK_WM(0x12c0, 0x0ff00000, 0x00000033), -+ DECL_RFK_WM(0x32c0, 0x0ff00000, 0x00000033), -+ DECL_RFK_WM(0x320c, 0x000000ff, 0x00000033), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_tssi_sys_defs_2g); -+ -+static const struct rtw89_reg5_def rtw8852a_tssi_sys_defs_5g[] = { -+ DECL_RFK_WM(0x120c, 0x000000ff, 0x00000044), -+ DECL_RFK_WM(0x12c0, 0x0ff00000, 0x00000044), -+ DECL_RFK_WM(0x32c0, 0x0ff00000, 0x00000044), -+ DECL_RFK_WM(0x320c, 0x000000ff, 0x00000044), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_tssi_sys_defs_5g); -+ -+static const struct rtw89_reg5_def rtw8852a_tssi_txpwr_ctrl_bb_defs_a[] = { -+ DECL_RFK_WM(0x5800, 0x000000ff, 0x0000007f), -+ DECL_RFK_WM(0x5800, 0x0000ff00, 0x00000080), -+ DECL_RFK_WM(0x5800, 0x003f0000, 0x0000003f), -+ DECL_RFK_WM(0x5800, 0x10000000, 0x00000000), -+ DECL_RFK_WM(0x5800, 0x20000000, 0x00000000), -+ DECL_RFK_WM(0x5800, 0xc0000000, 0x00000000), -+ DECL_RFK_WM(0x5804, 0xf8000000, 0x00000000), -+ DECL_RFK_WM(0x580c, 0x0000007f, 0x00000040), -+ DECL_RFK_WM(0x580c, 0x00007f00, 0x00000040), -+ DECL_RFK_WM(0x580c, 0x00008000, 0x00000000), -+ DECL_RFK_WM(0x580c, 0x0fff0000, 0x00000000), -+ DECL_RFK_WM(0x5810, 0x000001ff, 0x00000000), -+ DECL_RFK_WM(0x5810, 0x00000200, 0x00000000), -+ DECL_RFK_WM(0x5810, 0x0000fc00, 0x00000000), -+ DECL_RFK_WM(0x5810, 0x00010000, 0x00000001), -+ DECL_RFK_WM(0x5810, 0x00fe0000, 0x00000000), -+ DECL_RFK_WM(0x5810, 0x01000000, 0x00000001), -+ DECL_RFK_WM(0x5810, 0x06000000, 0x00000000), -+ DECL_RFK_WM(0x5810, 0x38000000, 0x00000003), -+ DECL_RFK_WM(0x5810, 0x40000000, 0x00000001), -+ DECL_RFK_WM(0x5810, 0x80000000, 0x00000000), -+ DECL_RFK_WM(0x5814, 0x000003ff, 0x00000000), -+ DECL_RFK_WM(0x5814, 0x00000c00, 0x00000000), -+ DECL_RFK_WM(0x5814, 0x00001000, 0x00000001), -+ DECL_RFK_WM(0x5814, 0x00002000, 0x00000000), -+ DECL_RFK_WM(0x5814, 0x00004000, 0x00000001), -+ DECL_RFK_WM(0x5814, 0x00038000, 0x00000005), -+ DECL_RFK_WM(0x5814, 0x003c0000, 0x00000000), -+ DECL_RFK_WM(0x5814, 0x01c00000, 0x00000000), -+ DECL_RFK_WM(0x5814, 0x18000000, 0x00000000), -+ DECL_RFK_WM(0x5814, 0xe0000000, 0x00000000), -+ DECL_RFK_WM(0x5818, 0x000000ff, 0x00000000), -+ DECL_RFK_WM(0x5818, 0x0001ff00, 0x00000018), -+ DECL_RFK_WM(0x5818, 0x03fe0000, 0x00000016), -+ DECL_RFK_WM(0x5818, 0xfc000000, 0x00000000), -+ DECL_RFK_WM(0x581c, 0x000003ff, 0x00000280), -+ DECL_RFK_WM(0x581c, 0x000ffc00, 0x00000200), -+ DECL_RFK_WM(0x581c, 0x00100000, 0x00000000), -+ DECL_RFK_WM(0x581c, 0x01e00000, 0x00000008), -+ DECL_RFK_WM(0x581c, 0x01e00000, 0x0000000e), -+ DECL_RFK_WM(0x581c, 0x1e000000, 0x00000008), -+ DECL_RFK_WM(0x581c, 0x1e000000, 0x0000000e), -+ DECL_RFK_WM(0x581c, 0x20000000, 0x00000000), -+ DECL_RFK_WM(0x5820, 0x00000fff, 0x00000080), -+ DECL_RFK_WM(0x5820, 0x0000f000, 0x0000000f), -+ DECL_RFK_WM(0x5820, 0x001f0000, 0x00000000), -+ DECL_RFK_WM(0x5820, 0xffe00000, 0x00000000), -+ DECL_RFK_WM(0x5824, 0x0003ffff, 0x000115f2), -+ DECL_RFK_WM(0x5824, 0x3ffc0000, 0x00000000), -+ DECL_RFK_WM(0x5828, 0x00000fff, 0x00000121), -+ DECL_RFK_WM(0x582c, 0x0003ffff, 0x000115f2), -+ DECL_RFK_WM(0x582c, 0x3ffc0000, 0x00000000), -+ DECL_RFK_WM(0x5830, 0x00000fff, 0x00000121), -+ DECL_RFK_WM(0x5834, 0x0003ffff, 0x000115f2), -+ DECL_RFK_WM(0x5834, 0x3ffc0000, 0x00000000), -+ DECL_RFK_WM(0x5838, 0x00000fff, 0x00000121), -+ DECL_RFK_WM(0x583c, 0x0003ffff, 0x000115f2), -+ DECL_RFK_WM(0x583c, 0x3ffc0000, 0x00000000), -+ DECL_RFK_WM(0x5840, 0x00000fff, 0x00000121), -+ DECL_RFK_WM(0x5844, 0x0003ffff, 0x000115f2), -+ DECL_RFK_WM(0x5844, 0x3ffc0000, 0x00000000), -+ DECL_RFK_WM(0x5848, 0x00000fff, 0x00000121), -+ DECL_RFK_WM(0x584c, 0x0003ffff, 0x000115f2), -+ DECL_RFK_WM(0x584c, 0x3ffc0000, 0x00000000), -+ DECL_RFK_WM(0x5850, 0x00000fff, 0x00000121), -+ DECL_RFK_WM(0x5854, 0x0003ffff, 0x000115f2), -+ DECL_RFK_WM(0x5854, 0x3ffc0000, 0x00000000), -+ DECL_RFK_WM(0x5858, 0x00000fff, 0x00000121), -+ DECL_RFK_WM(0x585c, 0x0003ffff, 0x000115f2), -+ DECL_RFK_WM(0x585c, 0x3ffc0000, 0x00000000), -+ DECL_RFK_WM(0x5860, 0x00000fff, 0x00000121), -+ DECL_RFK_WM(0x5828, 0x003ff000, 0x00000000), -+ DECL_RFK_WM(0x5828, 0x7fc00000, 0x00000000), -+ DECL_RFK_WM(0x5830, 0x003ff000, 0x00000000), -+ DECL_RFK_WM(0x5830, 0x7fc00000, 0x00000000), -+ DECL_RFK_WM(0x5838, 0x003ff000, 0x00000000), -+ DECL_RFK_WM(0x5838, 0x7fc00000, 0x00000000), -+ DECL_RFK_WM(0x5840, 0x003ff000, 0x00000000), -+ DECL_RFK_WM(0x5840, 0x7fc00000, 0x00000000), -+ DECL_RFK_WM(0x5848, 0x003ff000, 0x00000000), -+ DECL_RFK_WM(0x5848, 0x7fc00000, 0x00000000), -+ DECL_RFK_WM(0x5850, 0x003ff000, 0x00000000), -+ DECL_RFK_WM(0x5850, 0x7fc00000, 0x00000000), -+ DECL_RFK_WM(0x5858, 0x003ff000, 0x00000000), -+ DECL_RFK_WM(0x5858, 0x7fc00000, 0x00000000), -+ DECL_RFK_WM(0x5860, 0x003ff000, 0x00000000), -+ DECL_RFK_WM(0x5860, 0x7fc00000, 0x00000000), -+ DECL_RFK_WM(0x5860, 0x80000000, 0x00000000), -+ DECL_RFK_WM(0x5864, 0x000003ff, 0x000001ff), -+ DECL_RFK_WM(0x5864, 0x000ffc00, 0x00000200), -+ DECL_RFK_WM(0x5864, 0x03f00000, 0x00000000), -+ DECL_RFK_WM(0x5864, 0x04000000, 0x00000000), -+ DECL_RFK_WM(0x5898, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x589c, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x58a0, 0x000000ff, 0x000000fd), -+ DECL_RFK_WM(0x58a0, 0x0000ff00, 0x000000e5), -+ DECL_RFK_WM(0x58a0, 0x00ff0000, 0x000000cd), -+ DECL_RFK_WM(0x58a0, 0xff000000, 0x000000b5), -+ DECL_RFK_WM(0x58a4, 0x000000ff, 0x00000016), -+ DECL_RFK_WM(0x58a4, 0x0001ff00, 0x00000000), -+ DECL_RFK_WM(0x58a4, 0x03fe0000, 0x00000000), -+ DECL_RFK_WM(0x58a8, 0x000001ff, 0x00000000), -+ DECL_RFK_WM(0x58a8, 0x0003fe00, 0x00000000), -+ DECL_RFK_WM(0x58a8, 0x07fc0000, 0x00000000), -+ DECL_RFK_WM(0x58ac, 0x000001ff, 0x00000000), -+ DECL_RFK_WM(0x58ac, 0x0003fe00, 0x00000000), -+ DECL_RFK_WM(0x58ac, 0x07fc0000, 0x00000000), -+ DECL_RFK_WM(0x58b0, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x58b4, 0x0000001f, 0x00000000), -+ DECL_RFK_WM(0x58b4, 0x00000020, 0x00000000), -+ DECL_RFK_WM(0x58b4, 0x000001c0, 0x00000000), -+ DECL_RFK_WM(0x58b4, 0x00000200, 0x00000000), -+ DECL_RFK_WM(0x58b4, 0x0000f000, 0x00000002), -+ DECL_RFK_WM(0x58b4, 0x00ff0000, 0x00000000), -+ DECL_RFK_WM(0x58b4, 0x7f000000, 0x0000000a), -+ DECL_RFK_WM(0x58b8, 0x0000007f, 0x00000028), -+ DECL_RFK_WM(0x58b8, 0x00007f00, 0x00000076), -+ DECL_RFK_WM(0x58b8, 0x007f0000, 0x00000000), -+ DECL_RFK_WM(0x58b8, 0x7f000000, 0x00000000), -+ DECL_RFK_WM(0x58bc, 0x000000ff, 0x0000007f), -+ DECL_RFK_WM(0x58bc, 0x0000ff00, 0x00000080), -+ DECL_RFK_WM(0x58bc, 0x00030000, 0x00000003), -+ DECL_RFK_WM(0x58bc, 0x000c0000, 0x00000001), -+ DECL_RFK_WM(0x58bc, 0x00300000, 0x00000002), -+ DECL_RFK_WM(0x58bc, 0x00c00000, 0x00000002), -+ DECL_RFK_WM(0x58bc, 0x07000000, 0x00000007), -+ DECL_RFK_WM(0x58c0, 0x00fe0000, 0x0000003f), -+ DECL_RFK_WM(0x58c0, 0xff000000, 0x00000000), -+ DECL_RFK_WM(0x58c4, 0x0003ffff, 0x0003ffff), -+ DECL_RFK_WM(0x58c4, 0x3ffc0000, 0x00000000), -+ DECL_RFK_WM(0x58c4, 0xc0000000, 0x00000000), -+ DECL_RFK_WM(0x58c8, 0x00ffffff, 0x00000000), -+ DECL_RFK_WM(0x58c8, 0xf0000000, 0x00000000), -+ DECL_RFK_WM(0x58cc, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x58d0, 0x00001fff, 0x00000101), -+ DECL_RFK_WM(0x58d0, 0x0001e000, 0x00000004), -+ DECL_RFK_WM(0x58d0, 0x03fe0000, 0x00000100), -+ DECL_RFK_WM(0x58d0, 0x04000000, 0x00000000), -+ DECL_RFK_WM(0x58d4, 0x000000ff, 0x00000000), -+ DECL_RFK_WM(0x58d4, 0x0003fe00, 0x000000ff), -+ DECL_RFK_WM(0x58d4, 0x07fc0000, 0x00000100), -+ DECL_RFK_WM(0x58d8, 0x000001ff, 0x0000016c), -+ DECL_RFK_WM(0x58d8, 0x0003fe00, 0x0000005c), -+ DECL_RFK_WM(0x58d8, 0x000c0000, 0x00000002), -+ DECL_RFK_WM(0x58d8, 0xfff00000, 0x00000800), -+ DECL_RFK_WM(0x58dc, 0x000000ff, 0x0000007f), -+ DECL_RFK_WM(0x58dc, 0x0000ff00, 0x00000080), -+ DECL_RFK_WM(0x58dc, 0x00010000, 0x00000000), -+ DECL_RFK_WM(0x58dc, 0x3ff00000, 0x00000000), -+ DECL_RFK_WM(0x58dc, 0x80000000, 0x00000001), -+ DECL_RFK_WM(0x58f0, 0x000001ff, 0x000001ff), -+ DECL_RFK_WM(0x58f0, 0x0003fe00, 0x00000000), -+ DECL_RFK_WM(0x58f4, 0x000003ff, 0x00000000), -+ DECL_RFK_WM(0x58f4, 0x000ffc00, 0x00000000), -+ DECL_RFK_WM(0x58f4, 0x000003ff, 0x00000000), -+ DECL_RFK_WM(0x58f4, 0x000ffc00, 0x00000000), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_tssi_txpwr_ctrl_bb_defs_a); -+ -+static const struct rtw89_reg5_def rtw8852a_tssi_txpwr_ctrl_bb_defs_b[] = { -+ DECL_RFK_WM(0x7800, 0x000000ff, 0x0000007f), -+ DECL_RFK_WM(0x7800, 0x0000ff00, 0x00000080), -+ DECL_RFK_WM(0x7800, 0x003f0000, 0x0000003f), -+ DECL_RFK_WM(0x7800, 0x10000000, 0x00000000), -+ DECL_RFK_WM(0x7800, 0x20000000, 0x00000000), -+ DECL_RFK_WM(0x7800, 0xc0000000, 0x00000000), -+ DECL_RFK_WM(0x7804, 0xf8000000, 0x00000000), -+ DECL_RFK_WM(0x780c, 0x0000007f, 0x00000040), -+ DECL_RFK_WM(0x780c, 0x00007f00, 0x00000040), -+ DECL_RFK_WM(0x780c, 0x00008000, 0x00000000), -+ DECL_RFK_WM(0x780c, 0x0fff0000, 0x00000000), -+ DECL_RFK_WM(0x7810, 0x000001ff, 0x00000000), -+ DECL_RFK_WM(0x7810, 0x00000200, 0x00000000), -+ DECL_RFK_WM(0x7810, 0x0000fc00, 0x00000000), -+ DECL_RFK_WM(0x7810, 0x00010000, 0x00000001), -+ DECL_RFK_WM(0x7810, 0x00fe0000, 0x00000000), -+ DECL_RFK_WM(0x7810, 0x01000000, 0x00000001), -+ DECL_RFK_WM(0x7810, 0x06000000, 0x00000000), -+ DECL_RFK_WM(0x7810, 0x38000000, 0x00000003), -+ DECL_RFK_WM(0x7810, 0x40000000, 0x00000001), -+ DECL_RFK_WM(0x7810, 0x80000000, 0x00000000), -+ DECL_RFK_WM(0x7814, 0x000003ff, 0x00000000), -+ DECL_RFK_WM(0x7814, 0x00000c00, 0x00000000), -+ DECL_RFK_WM(0x7814, 0x00001000, 0x00000001), -+ DECL_RFK_WM(0x7814, 0x00002000, 0x00000000), -+ DECL_RFK_WM(0x7814, 0x00004000, 0x00000001), -+ DECL_RFK_WM(0x7814, 0x00038000, 0x00000005), -+ DECL_RFK_WM(0x7814, 0x003c0000, 0x00000000), -+ DECL_RFK_WM(0x7814, 0x01c00000, 0x00000000), -+ DECL_RFK_WM(0x7814, 0x18000000, 0x00000000), -+ DECL_RFK_WM(0x7814, 0xe0000000, 0x00000000), -+ DECL_RFK_WM(0x7818, 0x000000ff, 0x00000000), -+ DECL_RFK_WM(0x7818, 0x0001ff00, 0x00000018), -+ DECL_RFK_WM(0x7818, 0x03fe0000, 0x00000016), -+ DECL_RFK_WM(0x7818, 0xfc000000, 0x00000000), -+ DECL_RFK_WM(0x781c, 0x000003ff, 0x00000280), -+ DECL_RFK_WM(0x781c, 0x000ffc00, 0x00000200), -+ DECL_RFK_WM(0x781c, 0x00100000, 0x00000000), -+ DECL_RFK_WM(0x781c, 0x01e00000, 0x00000008), -+ DECL_RFK_WM(0x781c, 0x01e00000, 0x0000000e), -+ DECL_RFK_WM(0x781c, 0x1e000000, 0x00000008), -+ DECL_RFK_WM(0x781c, 0x1e000000, 0x0000000e), -+ DECL_RFK_WM(0x781c, 0x20000000, 0x00000000), -+ DECL_RFK_WM(0x7820, 0x00000fff, 0x00000080), -+ DECL_RFK_WM(0x7820, 0x0000f000, 0x00000000), -+ DECL_RFK_WM(0x7820, 0x001f0000, 0x00000000), -+ DECL_RFK_WM(0x7820, 0xffe00000, 0x00000000), -+ DECL_RFK_WM(0x7824, 0x0003ffff, 0x000115f2), -+ DECL_RFK_WM(0x7824, 0x3ffc0000, 0x00000000), -+ DECL_RFK_WM(0x7828, 0x00000fff, 0x00000121), -+ DECL_RFK_WM(0x782c, 0x0003ffff, 0x000115f2), -+ DECL_RFK_WM(0x782c, 0x3ffc0000, 0x00000000), -+ DECL_RFK_WM(0x7830, 0x00000fff, 0x00000121), -+ DECL_RFK_WM(0x7834, 0x0003ffff, 0x000115f2), -+ DECL_RFK_WM(0x7834, 0x3ffc0000, 0x00000000), -+ DECL_RFK_WM(0x7838, 0x00000fff, 0x00000121), -+ DECL_RFK_WM(0x783c, 0x0003ffff, 0x000115f2), -+ DECL_RFK_WM(0x783c, 0x3ffc0000, 0x00000000), -+ DECL_RFK_WM(0x7840, 0x00000fff, 0x00000121), -+ DECL_RFK_WM(0x7844, 0x0003ffff, 0x000115f2), -+ DECL_RFK_WM(0x7844, 0x3ffc0000, 0x00000000), -+ DECL_RFK_WM(0x7848, 0x00000fff, 0x00000121), -+ DECL_RFK_WM(0x784c, 0x0003ffff, 0x000115f2), -+ DECL_RFK_WM(0x784c, 0x3ffc0000, 0x00000000), -+ DECL_RFK_WM(0x7850, 0x00000fff, 0x00000121), -+ DECL_RFK_WM(0x7854, 0x0003ffff, 0x000115f2), -+ DECL_RFK_WM(0x7854, 0x3ffc0000, 0x00000000), -+ DECL_RFK_WM(0x7858, 0x00000fff, 0x00000121), -+ DECL_RFK_WM(0x785c, 0x0003ffff, 0x000115f2), -+ DECL_RFK_WM(0x785c, 0x3ffc0000, 0x00000000), -+ DECL_RFK_WM(0x7860, 0x00000fff, 0x00000121), -+ DECL_RFK_WM(0x7828, 0x003ff000, 0x00000000), -+ DECL_RFK_WM(0x7828, 0x7fc00000, 0x00000000), -+ DECL_RFK_WM(0x7830, 0x003ff000, 0x00000000), -+ DECL_RFK_WM(0x7830, 0x7fc00000, 0x00000000), -+ DECL_RFK_WM(0x7838, 0x003ff000, 0x00000000), -+ DECL_RFK_WM(0x7838, 0x7fc00000, 0x00000000), -+ DECL_RFK_WM(0x7840, 0x003ff000, 0x00000000), -+ DECL_RFK_WM(0x7840, 0x7fc00000, 0x00000000), -+ DECL_RFK_WM(0x7848, 0x003ff000, 0x00000000), -+ DECL_RFK_WM(0x7848, 0x7fc00000, 0x00000000), -+ DECL_RFK_WM(0x7850, 0x003ff000, 0x00000000), -+ DECL_RFK_WM(0x7850, 0x7fc00000, 0x00000000), -+ DECL_RFK_WM(0x7858, 0x003ff000, 0x00000000), -+ DECL_RFK_WM(0x7858, 0x7fc00000, 0x00000000), -+ DECL_RFK_WM(0x7860, 0x003ff000, 0x00000000), -+ DECL_RFK_WM(0x7860, 0x7fc00000, 0x00000000), -+ DECL_RFK_WM(0x7860, 0x80000000, 0x00000000), -+ DECL_RFK_WM(0x7864, 0x000003ff, 0x000001ff), -+ DECL_RFK_WM(0x7864, 0x000ffc00, 0x00000200), -+ DECL_RFK_WM(0x7864, 0x03f00000, 0x00000000), -+ DECL_RFK_WM(0x7864, 0x04000000, 0x00000000), -+ DECL_RFK_WM(0x7898, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x789c, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x78a0, 0x000000ff, 0x000000fd), -+ DECL_RFK_WM(0x78a0, 0x0000ff00, 0x000000e5), -+ DECL_RFK_WM(0x78a0, 0x00ff0000, 0x000000cd), -+ DECL_RFK_WM(0x78a0, 0xff000000, 0x000000b5), -+ DECL_RFK_WM(0x78a4, 0x000000ff, 0x00000016), -+ DECL_RFK_WM(0x78a4, 0x0001ff00, 0x00000000), -+ DECL_RFK_WM(0x78a4, 0x03fe0000, 0x00000000), -+ DECL_RFK_WM(0x78a8, 0x000001ff, 0x00000000), -+ DECL_RFK_WM(0x78a8, 0x0003fe00, 0x00000000), -+ DECL_RFK_WM(0x78a8, 0x07fc0000, 0x00000000), -+ DECL_RFK_WM(0x78ac, 0x000001ff, 0x00000000), -+ DECL_RFK_WM(0x78ac, 0x0003fe00, 0x00000000), -+ DECL_RFK_WM(0x78ac, 0x07fc0000, 0x00000000), -+ DECL_RFK_WM(0x78b0, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x78b4, 0x0000001f, 0x00000000), -+ DECL_RFK_WM(0x78b4, 0x00000020, 0x00000000), -+ DECL_RFK_WM(0x78b4, 0x000001c0, 0x00000000), -+ DECL_RFK_WM(0x78b4, 0x00000200, 0x00000000), -+ DECL_RFK_WM(0x78b4, 0x0000f000, 0x00000002), -+ DECL_RFK_WM(0x78b4, 0x00ff0000, 0x00000000), -+ DECL_RFK_WM(0x78b4, 0x7f000000, 0x0000000a), -+ DECL_RFK_WM(0x78b8, 0x0000007f, 0x00000028), -+ DECL_RFK_WM(0x78b8, 0x00007f00, 0x00000076), -+ DECL_RFK_WM(0x78b8, 0x007f0000, 0x00000000), -+ DECL_RFK_WM(0x78b8, 0x7f000000, 0x00000000), -+ DECL_RFK_WM(0x78bc, 0x000000ff, 0x0000007f), -+ DECL_RFK_WM(0x78bc, 0x0000ff00, 0x00000080), -+ DECL_RFK_WM(0x78bc, 0x00030000, 0x00000003), -+ DECL_RFK_WM(0x78bc, 0x000c0000, 0x00000001), -+ DECL_RFK_WM(0x78bc, 0x00300000, 0x00000002), -+ DECL_RFK_WM(0x78bc, 0x00c00000, 0x00000002), -+ DECL_RFK_WM(0x78bc, 0x07000000, 0x00000007), -+ DECL_RFK_WM(0x78c0, 0x00fe0000, 0x0000003f), -+ DECL_RFK_WM(0x78c0, 0xff000000, 0x00000000), -+ DECL_RFK_WM(0x78c4, 0x0003ffff, 0x0003ffff), -+ DECL_RFK_WM(0x78c4, 0x3ffc0000, 0x00000000), -+ DECL_RFK_WM(0x78c4, 0xc0000000, 0x00000000), -+ DECL_RFK_WM(0x78c8, 0x00ffffff, 0x00000000), -+ DECL_RFK_WM(0x78c8, 0xf0000000, 0x00000000), -+ DECL_RFK_WM(0x78cc, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x78d0, 0x00001fff, 0x00000101), -+ DECL_RFK_WM(0x78d0, 0x0001e000, 0x00000004), -+ DECL_RFK_WM(0x78d0, 0x03fe0000, 0x00000100), -+ DECL_RFK_WM(0x78d0, 0x04000000, 0x00000000), -+ DECL_RFK_WM(0x78d4, 0x000000ff, 0x00000000), -+ DECL_RFK_WM(0x78d4, 0x0003fe00, 0x000000ff), -+ DECL_RFK_WM(0x78d4, 0x07fc0000, 0x00000100), -+ DECL_RFK_WM(0x78d8, 0x000001ff, 0x0000016c), -+ DECL_RFK_WM(0x78d8, 0x0003fe00, 0x0000005c), -+ DECL_RFK_WM(0x78d8, 0x000c0000, 0x00000002), -+ DECL_RFK_WM(0x78d8, 0xfff00000, 0x00000800), -+ DECL_RFK_WM(0x78dc, 0x000000ff, 0x0000007f), -+ DECL_RFK_WM(0x78dc, 0x0000ff00, 0x00000080), -+ DECL_RFK_WM(0x78dc, 0x00010000, 0x00000000), -+ DECL_RFK_WM(0x78dc, 0x3ff00000, 0x00000000), -+ DECL_RFK_WM(0x78dc, 0x80000000, 0x00000001), -+ DECL_RFK_WM(0x78f0, 0x000001ff, 0x000001ff), -+ DECL_RFK_WM(0x78f0, 0x0003fe00, 0x00000000), -+ DECL_RFK_WM(0x78f4, 0x000003ff, 0x00000000), -+ DECL_RFK_WM(0x78f4, 0x000ffc00, 0x00000000), -+ DECL_RFK_WM(0x78f4, 0x000003ff, 0x00000000), -+ DECL_RFK_WM(0x78f4, 0x000ffc00, 0x00000000), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_tssi_txpwr_ctrl_bb_defs_b); -+ -+static const struct rtw89_reg5_def rtw8852a_tssi_txpwr_ctrl_bb_defs_2g[] = { -+ DECL_RFK_WM(0x58d8, 0x000001ff, 0x0000013c), -+ DECL_RFK_WM(0x78d8, 0x000001ff, 0x0000013c), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_tssi_txpwr_ctrl_bb_defs_2g); -+ -+static const struct rtw89_reg5_def rtw8852a_tssi_txpwr_ctrl_bb_defs_5g[] = { -+ DECL_RFK_WM(0x58d8, 0x000001ff, 0x0000016c), -+ DECL_RFK_WM(0x78d8, 0x000001ff, 0x0000016c), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_tssi_txpwr_ctrl_bb_defs_5g); -+ -+static const struct rtw89_reg5_def rtw8852a_tssi_txpwr_ctrl_bb_he_tb_defs_a[] = { -+ DECL_RFK_WM(0x58a0, 0xffffffff, 0x000000fc), -+ DECL_RFK_WM(0x58e4, 0x0000007f, 0x00000020), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_tssi_txpwr_ctrl_bb_he_tb_defs_a); -+ -+static const struct rtw89_reg5_def rtw8852a_tssi_txpwr_ctrl_bb_he_tb_defs_b[] = { -+ DECL_RFK_WM(0x78a0, 0xffffffff, 0x000000fc), -+ DECL_RFK_WM(0x78e4, 0x0000007f, 0x00000020), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_tssi_txpwr_ctrl_bb_he_tb_defs_b); -+ -+static const struct rtw89_reg5_def rtw8852a_tssi_dck_defs_a[] = { -+ DECL_RFK_WM(0x580c, 0x0fff0000, 0x00000000), -+ DECL_RFK_WM(0x5814, 0x00001000, 0x00000001), -+ DECL_RFK_WM(0x5814, 0x00002000, 0x00000001), -+ DECL_RFK_WM(0x5814, 0x00004000, 0x00000001), -+ DECL_RFK_WM(0x5814, 0x00038000, 0x00000005), -+ DECL_RFK_WM(0x5814, 0x003c0000, 0x00000003), -+ DECL_RFK_WM(0x5814, 0x18000000, 0x00000000), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_tssi_dck_defs_a); -+ -+static const struct rtw89_reg5_def rtw8852a_tssi_dck_defs_b[] = { -+ DECL_RFK_WM(0x780c, 0x0fff0000, 0x00000000), -+ DECL_RFK_WM(0x7814, 0x00001000, 0x00000001), -+ DECL_RFK_WM(0x7814, 0x00002000, 0x00000001), -+ DECL_RFK_WM(0x7814, 0x00004000, 0x00000001), -+ DECL_RFK_WM(0x7814, 0x00038000, 0x00000005), -+ DECL_RFK_WM(0x7814, 0x003c0000, 0x00000003), -+ DECL_RFK_WM(0x7814, 0x18000000, 0x00000000), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_tssi_dck_defs_b); -+ -+static const struct rtw89_reg5_def rtw8852a_tssi_dac_gain_tbl_defs_a[] = { -+ DECL_RFK_WM(0x58b0, 0x00000fff, 0x00000000), -+ DECL_RFK_WM(0x58b0, 0x00000800, 0x00000001), -+ DECL_RFK_WM(0x5a00, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x5a04, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x5a08, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x5a0c, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x5a10, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x5a14, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x5a18, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x5a1c, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x5a20, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x5a24, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x5a28, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x5a2c, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x5a30, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x5a34, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x5a38, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x5a3c, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x5a40, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x5a44, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x5a48, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x5a4c, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x5a50, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x5a54, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x5a58, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x5a5c, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x5a60, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x5a64, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x5a68, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x5a6c, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x5a70, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x5a74, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x5a78, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x5a7c, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x5a80, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x5a84, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x5a88, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x5a8c, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x5a90, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x5a94, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x5a98, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x5a9c, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x5aa0, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x5aa4, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x5aa8, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x5aac, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x5ab0, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x5ab4, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x5ab8, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x5abc, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x5ac0, 0xffffffff, 0x00000000), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_tssi_dac_gain_tbl_defs_a); -+ -+static const struct rtw89_reg5_def rtw8852a_tssi_dac_gain_tbl_defs_b[] = { -+ DECL_RFK_WM(0x78b0, 0x00000fff, 0x00000000), -+ DECL_RFK_WM(0x78b0, 0x00000800, 0x00000001), -+ DECL_RFK_WM(0x7a00, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x7a04, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x7a08, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x7a0c, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x7a10, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x7a14, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x7a18, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x7a1c, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x7a20, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x7a24, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x7a28, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x7a2c, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x7a30, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x7a34, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x7a38, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x7a3c, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x7a40, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x7a44, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x7a48, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x7a4c, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x7a50, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x7a54, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x7a58, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x7a5c, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x7a60, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x7a64, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x7a68, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x7a6c, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x7a70, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x7a74, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x7a78, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x7a7c, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x7a80, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x7a84, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x7a88, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x7a8c, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x7a90, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x7a94, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x7a98, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x7a9c, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x7aa0, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x7aa4, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x7aa8, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x7aac, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x7ab0, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x7ab4, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x7ab8, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x7abc, 0xffffffff, 0x00000000), -+ DECL_RFK_WM(0x7ac0, 0xffffffff, 0x00000000), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_tssi_dac_gain_tbl_defs_b); -+ -+static const struct rtw89_reg5_def rtw8852a_tssi_slope_cal_org_defs_a[] = { -+ DECL_RFK_WM(0x581c, 0x00100000, 0x00000000), -+ DECL_RFK_WM(0x58cc, 0x00001000, 0x00000001), -+ DECL_RFK_WM(0x58cc, 0x00000007, 0x00000000), -+ DECL_RFK_WM(0x58cc, 0x00000038, 0x00000001), -+ DECL_RFK_WM(0x58cc, 0x000001c0, 0x00000002), -+ DECL_RFK_WM(0x58cc, 0x00000e00, 0x00000003), -+ DECL_RFK_WM(0x5828, 0x7fc00000, 0x00000040), -+ DECL_RFK_WM(0x5898, 0x000000ff, 0x00000040), -+ DECL_RFK_WM(0x5830, 0x7fc00000, 0x00000040), -+ DECL_RFK_WM(0x5898, 0x0000ff00, 0x00000040), -+ DECL_RFK_WM(0x5838, 0x7fc00000, 0x00000040), -+ DECL_RFK_WM(0x5898, 0x00ff0000, 0x00000040), -+ DECL_RFK_WM(0x5840, 0x7fc00000, 0x00000040), -+ DECL_RFK_WM(0x5898, 0xff000000, 0x00000040), -+ DECL_RFK_WM(0x5848, 0x7fc00000, 0x00000040), -+ DECL_RFK_WM(0x589c, 0x000000ff, 0x00000040), -+ DECL_RFK_WM(0x5850, 0x7fc00000, 0x00000040), -+ DECL_RFK_WM(0x589c, 0x0000ff00, 0x00000040), -+ DECL_RFK_WM(0x5858, 0x7fc00000, 0x00000040), -+ DECL_RFK_WM(0x589c, 0x00ff0000, 0x00000040), -+ DECL_RFK_WM(0x5860, 0x7fc00000, 0x00000040), -+ DECL_RFK_WM(0x589c, 0xff000000, 0x00000040), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_tssi_slope_cal_org_defs_a); -+ -+static const struct rtw89_reg5_def rtw8852a_tssi_slope_cal_org_defs_b[] = { -+ DECL_RFK_WM(0x781c, 0x00100000, 0x00000000), -+ DECL_RFK_WM(0x78cc, 0x00001000, 0x00000001), -+ DECL_RFK_WM(0x78cc, 0x00000007, 0x00000000), -+ DECL_RFK_WM(0x78cc, 0x00000038, 0x00000001), -+ DECL_RFK_WM(0x78cc, 0x000001c0, 0x00000002), -+ DECL_RFK_WM(0x78cc, 0x00000e00, 0x00000003), -+ DECL_RFK_WM(0x7828, 0x7fc00000, 0x00000040), -+ DECL_RFK_WM(0x7898, 0x000000ff, 0x00000040), -+ DECL_RFK_WM(0x7830, 0x7fc00000, 0x00000040), -+ DECL_RFK_WM(0x7898, 0x0000ff00, 0x00000040), -+ DECL_RFK_WM(0x7838, 0x7fc00000, 0x00000040), -+ DECL_RFK_WM(0x7898, 0x00ff0000, 0x00000040), -+ DECL_RFK_WM(0x7840, 0x7fc00000, 0x00000040), -+ DECL_RFK_WM(0x7898, 0xff000000, 0x00000040), -+ DECL_RFK_WM(0x7848, 0x7fc00000, 0x00000040), -+ DECL_RFK_WM(0x789c, 0x000000ff, 0x00000040), -+ DECL_RFK_WM(0x7850, 0x7fc00000, 0x00000040), -+ DECL_RFK_WM(0x789c, 0x0000ff00, 0x00000040), -+ DECL_RFK_WM(0x7878, 0x7fc00000, 0x00000040), -+ DECL_RFK_WM(0x789c, 0x00ff0000, 0x00000040), -+ DECL_RFK_WM(0x7860, 0x7fc00000, 0x00000040), -+ DECL_RFK_WM(0x789c, 0xff000000, 0x00000040), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_tssi_slope_cal_org_defs_b); -+ -+static const struct rtw89_reg5_def rtw8852a_tssi_rf_gap_tbl_defs_a[] = { -+ DECL_RFK_WM(0x5814, 0x000003ff, 0x00000000), -+ DECL_RFK_WM(0x58f4, 0x000003ff, 0x00000000), -+ DECL_RFK_WM(0x58f4, 0x000ffc00, 0x00000000), -+ DECL_RFK_WM(0x58f8, 0x000003ff, 0x00000000), -+ DECL_RFK_WM(0x58f8, 0x000ffc00, 0x00000000), -+ DECL_RFK_WM(0x58a4, 0x0001ff00, 0x00000000), -+ DECL_RFK_WM(0x58a4, 0x03fe0000, 0x00000000), -+ DECL_RFK_WM(0x58a8, 0x000001ff, 0x00000000), -+ DECL_RFK_WM(0x58a8, 0x0003fe00, 0x00000000), -+ DECL_RFK_WM(0x58a8, 0x07fc0000, 0x00000000), -+ DECL_RFK_WM(0x58ac, 0x000001ff, 0x00000000), -+ DECL_RFK_WM(0x58ac, 0x0003fe00, 0x00000000), -+ DECL_RFK_WM(0x58ac, 0x07fc0000, 0x00000000), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_tssi_rf_gap_tbl_defs_a); -+ -+static const struct rtw89_reg5_def rtw8852a_tssi_rf_gap_tbl_defs_b[] = { -+ DECL_RFK_WM(0x7814, 0x000003ff, 0x00000000), -+ DECL_RFK_WM(0x78f4, 0x000003ff, 0x00000000), -+ DECL_RFK_WM(0x78f4, 0x000ffc00, 0x00000000), -+ DECL_RFK_WM(0x78f8, 0x000003ff, 0x00000000), -+ DECL_RFK_WM(0x78f8, 0x000ffc00, 0x00000000), -+ DECL_RFK_WM(0x78a4, 0x0001ff00, 0x00000000), -+ DECL_RFK_WM(0x78a4, 0x03fe0000, 0x00000000), -+ DECL_RFK_WM(0x78a8, 0x000001ff, 0x00000000), -+ DECL_RFK_WM(0x78a8, 0x0003fe00, 0x00000000), -+ DECL_RFK_WM(0x78a8, 0x07fc0000, 0x00000000), -+ DECL_RFK_WM(0x78ac, 0x000001ff, 0x00000000), -+ DECL_RFK_WM(0x78ac, 0x0003fe00, 0x00000000), -+ DECL_RFK_WM(0x78ac, 0x07fc0000, 0x00000000), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_tssi_rf_gap_tbl_defs_b); -+ -+static const struct rtw89_reg5_def rtw8852a_tssi_slope_defs_a[] = { -+ DECL_RFK_WM(0x5820, 0x80000000, 0x00000000), -+ DECL_RFK_WM(0x5818, 0x10000000, 0x00000000), -+ DECL_RFK_WM(0x5814, 0x00000800, 0x00000001), -+ DECL_RFK_WM(0x581c, 0x20000000, 0x00000001), -+ DECL_RFK_WM(0x5820, 0x0000f000, 0x00000001), -+ DECL_RFK_WM(0x581c, 0x000003ff, 0x00000280), -+ DECL_RFK_WM(0x581c, 0x000ffc00, 0x00000200), -+ DECL_RFK_WM(0x58b8, 0x007f0000, 0x00000000), -+ DECL_RFK_WM(0x58b8, 0x7f000000, 0x00000000), -+ DECL_RFK_WM(0x58b4, 0x7f000000, 0x0000000a), -+ DECL_RFK_WM(0x58b8, 0x0000007f, 0x00000028), -+ DECL_RFK_WM(0x58b8, 0x00007f00, 0x00000076), -+ DECL_RFK_WM(0x5810, 0x20000000, 0x00000000), -+ DECL_RFK_WM(0x5814, 0x20000000, 0x00000001), -+ DECL_RFK_WM(0x580c, 0x10000000, 0x00000001), -+ DECL_RFK_WM(0x580c, 0x40000000, 0x00000001), -+ DECL_RFK_WM(0x5838, 0x003ff000, 0x00000000), -+ DECL_RFK_WM(0x5858, 0x003ff000, 0x00000000), -+ DECL_RFK_WM(0x5834, 0x0003ffff, 0x000115f2), -+ DECL_RFK_WM(0x5834, 0x3ffc0000, 0x00000000), -+ DECL_RFK_WM(0x5838, 0x00000fff, 0x00000121), -+ DECL_RFK_WM(0x5854, 0x0003ffff, 0x000115f2), -+ DECL_RFK_WM(0x5854, 0x3ffc0000, 0x00000000), -+ DECL_RFK_WM(0x5858, 0x00000fff, 0x00000121), -+ DECL_RFK_WM(0x5824, 0x0003ffff, 0x000115f2), -+ DECL_RFK_WM(0x5824, 0x3ffc0000, 0x00000000), -+ DECL_RFK_WM(0x5828, 0x00000fff, 0x00000121), -+ DECL_RFK_WM(0x582c, 0x0003ffff, 0x000115f2), -+ DECL_RFK_WM(0x582c, 0x3ffc0000, 0x00000000), -+ DECL_RFK_WM(0x5830, 0x00000fff, 0x00000121), -+ DECL_RFK_WM(0x583c, 0x0003ffff, 0x000115f2), -+ DECL_RFK_WM(0x583c, 0x3ffc0000, 0x00000000), -+ DECL_RFK_WM(0x5840, 0x00000fff, 0x00000121), -+ DECL_RFK_WM(0x5844, 0x0003ffff, 0x000115f2), -+ DECL_RFK_WM(0x5844, 0x3ffc0000, 0x00000000), -+ DECL_RFK_WM(0x5848, 0x00000fff, 0x00000121), -+ DECL_RFK_WM(0x584c, 0x0003ffff, 0x000115f2), -+ DECL_RFK_WM(0x584c, 0x3ffc0000, 0x00000000), -+ DECL_RFK_WM(0x5850, 0x00000fff, 0x00000121), -+ DECL_RFK_WM(0x585c, 0x0003ffff, 0x000115f2), -+ DECL_RFK_WM(0x585c, 0x3ffc0000, 0x00000000), -+ DECL_RFK_WM(0x5860, 0x00000fff, 0x00000121), -+ DECL_RFK_WM(0x5828, 0x003ff000, 0x00000000), -+ DECL_RFK_WM(0x5830, 0x003ff000, 0x00000000), -+ DECL_RFK_WM(0x5840, 0x003ff000, 0x00000000), -+ DECL_RFK_WM(0x5848, 0x003ff000, 0x00000000), -+ DECL_RFK_WM(0x5850, 0x003ff000, 0x00000000), -+ DECL_RFK_WM(0x5860, 0x003ff000, 0x00000000), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_tssi_slope_defs_a); -+ -+static const struct rtw89_reg5_def rtw8852a_tssi_slope_defs_b[] = { -+ DECL_RFK_WM(0x7820, 0x80000000, 0x00000000), -+ DECL_RFK_WM(0x7818, 0x10000000, 0x00000000), -+ DECL_RFK_WM(0x7814, 0x00000800, 0x00000001), -+ DECL_RFK_WM(0x781c, 0x20000000, 0x00000001), -+ DECL_RFK_WM(0x7820, 0x0000f000, 0x00000001), -+ DECL_RFK_WM(0x781c, 0x000003ff, 0x00000280), -+ DECL_RFK_WM(0x781c, 0x000ffc00, 0x00000200), -+ DECL_RFK_WM(0x78b8, 0x007f0000, 0x00000000), -+ DECL_RFK_WM(0x78b8, 0x7f000000, 0x00000000), -+ DECL_RFK_WM(0x78b4, 0x7f000000, 0x0000000a), -+ DECL_RFK_WM(0x78b8, 0x0000007f, 0x00000028), -+ DECL_RFK_WM(0x78b8, 0x00007f00, 0x00000076), -+ DECL_RFK_WM(0x7810, 0x20000000, 0x00000000), -+ DECL_RFK_WM(0x7814, 0x20000000, 0x00000001), -+ DECL_RFK_WM(0x780c, 0x10000000, 0x00000001), -+ DECL_RFK_WM(0x780c, 0x40000000, 0x00000001), -+ DECL_RFK_WM(0x7838, 0x003ff000, 0x00000000), -+ DECL_RFK_WM(0x7858, 0x003ff000, 0x00000000), -+ DECL_RFK_WM(0x7834, 0x0003ffff, 0x000115f2), -+ DECL_RFK_WM(0x7834, 0x3ffc0000, 0x00000000), -+ DECL_RFK_WM(0x7838, 0x00000fff, 0x00000121), -+ DECL_RFK_WM(0x7854, 0x0003ffff, 0x000115f2), -+ DECL_RFK_WM(0x7854, 0x3ffc0000, 0x00000000), -+ DECL_RFK_WM(0x7858, 0x00000fff, 0x00000121), -+ DECL_RFK_WM(0x7824, 0x0003ffff, 0x000115f2), -+ DECL_RFK_WM(0x7824, 0x3ffc0000, 0x00000000), -+ DECL_RFK_WM(0x7828, 0x00000fff, 0x00000121), -+ DECL_RFK_WM(0x782c, 0x0003ffff, 0x000115f2), -+ DECL_RFK_WM(0x782c, 0x3ffc0000, 0x00000000), -+ DECL_RFK_WM(0x7830, 0x00000fff, 0x00000121), -+ DECL_RFK_WM(0x783c, 0x0003ffff, 0x000115f2), -+ DECL_RFK_WM(0x783c, 0x3ffc0000, 0x00000000), -+ DECL_RFK_WM(0x7840, 0x00000fff, 0x00000121), -+ DECL_RFK_WM(0x7844, 0x0003ffff, 0x000115f2), -+ DECL_RFK_WM(0x7844, 0x3ffc0000, 0x00000000), -+ DECL_RFK_WM(0x7848, 0x00000fff, 0x00000121), -+ DECL_RFK_WM(0x784c, 0x0003ffff, 0x000115f2), -+ DECL_RFK_WM(0x784c, 0x3ffc0000, 0x00000000), -+ DECL_RFK_WM(0x7850, 0x00000fff, 0x00000121), -+ DECL_RFK_WM(0x785c, 0x0003ffff, 0x000115f2), -+ DECL_RFK_WM(0x785c, 0x3ffc0000, 0x00000000), -+ DECL_RFK_WM(0x7860, 0x00000fff, 0x00000121), -+ DECL_RFK_WM(0x7828, 0x003ff000, 0x00000000), -+ DECL_RFK_WM(0x7830, 0x003ff000, 0x00000000), -+ DECL_RFK_WM(0x7840, 0x003ff000, 0x00000000), -+ DECL_RFK_WM(0x7848, 0x003ff000, 0x00000000), -+ DECL_RFK_WM(0x7850, 0x003ff000, 0x00000000), -+ DECL_RFK_WM(0x7860, 0x003ff000, 0x00000000), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_tssi_slope_defs_b); -+ -+static const struct rtw89_reg5_def rtw8852a_tssi_track_defs_a[] = { -+ DECL_RFK_WM(0x5820, 0x80000000, 0x00000000), -+ DECL_RFK_WM(0x5818, 0x18000000, 0x00000000), -+ DECL_RFK_WM(0x5814, 0x00000800, 0x00000000), -+ DECL_RFK_WM(0x581c, 0x20000000, 0x00000001), -+ DECL_RFK_WM(0x5864, 0x000003ff, 0x000001ff), -+ DECL_RFK_WM(0x5864, 0x000ffc00, 0x00000200), -+ DECL_RFK_WM(0x5820, 0x00000fff, 0x00000080), -+ DECL_RFK_WM(0x5814, 0x01000000, 0x00000000), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_tssi_track_defs_a); -+ -+static const struct rtw89_reg5_def rtw8852a_tssi_track_defs_b[] = { -+ DECL_RFK_WM(0x7820, 0x80000000, 0x00000000), -+ DECL_RFK_WM(0x7818, 0x18000000, 0x00000000), -+ DECL_RFK_WM(0x7814, 0x00000800, 0x00000000), -+ DECL_RFK_WM(0x781c, 0x20000000, 0x00000001), -+ DECL_RFK_WM(0x7864, 0x000003ff, 0x000001ff), -+ DECL_RFK_WM(0x7864, 0x000ffc00, 0x00000200), -+ DECL_RFK_WM(0x7820, 0x00000fff, 0x00000080), -+ DECL_RFK_WM(0x7814, 0x01000000, 0x00000000), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_tssi_track_defs_b); -+ -+static const struct rtw89_reg5_def rtw8852a_tssi_txagc_ofst_mv_avg_defs_a[] = { -+ DECL_RFK_WM(0x58e4, 0x00004000, 0x00000000), -+ DECL_RFK_WM(0x58e4, 0x00004000, 0x00000001), -+ DECL_RFK_WM(0x58e4, 0x00004000, 0x00000000), -+ DECL_RFK_WM(0x58e4, 0x00008000, 0x00000000), -+ DECL_RFK_WM(0x58e4, 0x000f0000, 0x00000000), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_tssi_txagc_ofst_mv_avg_defs_a); -+ -+static const struct rtw89_reg5_def rtw8852a_tssi_txagc_ofst_mv_avg_defs_b[] = { -+ DECL_RFK_WM(0x78e4, 0x00004000, 0x00000000), -+ DECL_RFK_WM(0x78e4, 0x00004000, 0x00000001), -+ DECL_RFK_WM(0x78e4, 0x00004000, 0x00000000), -+ DECL_RFK_WM(0x78e4, 0x00008000, 0x00000000), -+ DECL_RFK_WM(0x78e4, 0x000f0000, 0x00000000), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_tssi_txagc_ofst_mv_avg_defs_b); -+ -+static const struct rtw89_reg5_def rtw8852a_tssi_pak_defs_a_2g[] = { -+ DECL_RFK_WM(0x5814, 0x000003ff, 0x00000000), -+ DECL_RFK_WM(0x58f4, 0x000003ff, 0x00000000), -+ DECL_RFK_WM(0x58f4, 0x000ffc00, 0x00000000), -+ DECL_RFK_WM(0x58f8, 0x000003ff, 0x00000000), -+ DECL_RFK_WM(0x58f8, 0x000ffc00, 0x00000000), -+ DECL_RFK_WM(0x58a4, 0x0001ff00, 0x00000000), -+ DECL_RFK_WM(0x58a4, 0x03fe0000, 0x000001d0), -+ DECL_RFK_WM(0x58a8, 0x000001ff, 0x00000000), -+ DECL_RFK_WM(0x58a8, 0x0003fe00, 0x000001e8), -+ DECL_RFK_WM(0x58a8, 0x07fc0000, 0x00000000), -+ DECL_RFK_WM(0x58ac, 0x000001ff, 0x0000000b), -+ DECL_RFK_WM(0x58ac, 0x0003fe00, 0x00000000), -+ DECL_RFK_WM(0x58ac, 0x07fc0000, 0x00000088), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_tssi_pak_defs_a_2g); -+ -+static const struct rtw89_reg5_def rtw8852a_tssi_pak_defs_a_5g_1[] = { -+ DECL_RFK_WM(0x5814, 0x000003ff, 0x00000000), -+ DECL_RFK_WM(0x58f4, 0x000003ff, 0x00000000), -+ DECL_RFK_WM(0x58f4, 0x000ffc00, 0x00000000), -+ DECL_RFK_WM(0x58f8, 0x000003ff, 0x00000000), -+ DECL_RFK_WM(0x58f8, 0x000ffc00, 0x00000000), -+ DECL_RFK_WM(0x58a4, 0x0001ff00, 0x00000000), -+ DECL_RFK_WM(0x58a4, 0x03fe0000, 0x000001d7), -+ DECL_RFK_WM(0x58a8, 0x000001ff, 0x00000000), -+ DECL_RFK_WM(0x58a8, 0x0003fe00, 0x000001fb), -+ DECL_RFK_WM(0x58a8, 0x07fc0000, 0x00000000), -+ DECL_RFK_WM(0x58ac, 0x000001ff, 0x00000000), -+ DECL_RFK_WM(0x58ac, 0x0003fe00, 0x00000005), -+ DECL_RFK_WM(0x58ac, 0x07fc0000, 0x0000007c), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_tssi_pak_defs_a_5g_1); -+ -+static const struct rtw89_reg5_def rtw8852a_tssi_pak_defs_a_5g_3[] = { -+ DECL_RFK_WM(0x5814, 0x000003ff, 0x00000000), -+ DECL_RFK_WM(0x58f4, 0x000003ff, 0x00000000), -+ DECL_RFK_WM(0x58f4, 0x000ffc00, 0x00000000), -+ DECL_RFK_WM(0x58f8, 0x000003ff, 0x00000000), -+ DECL_RFK_WM(0x58f8, 0x000ffc00, 0x00000000), -+ DECL_RFK_WM(0x58a4, 0x0001ff00, 0x00000000), -+ DECL_RFK_WM(0x58a4, 0x03fe0000, 0x000001d8), -+ DECL_RFK_WM(0x58a8, 0x000001ff, 0x00000000), -+ DECL_RFK_WM(0x58a8, 0x0003fe00, 0x000001fc), -+ DECL_RFK_WM(0x58a8, 0x07fc0000, 0x00000000), -+ DECL_RFK_WM(0x58ac, 0x000001ff, 0x00000000), -+ DECL_RFK_WM(0x58ac, 0x0003fe00, 0x00000006), -+ DECL_RFK_WM(0x58ac, 0x07fc0000, 0x00000078), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_tssi_pak_defs_a_5g_3); -+ -+static const struct rtw89_reg5_def rtw8852a_tssi_pak_defs_a_5g_4[] = { -+ DECL_RFK_WM(0x5814, 0x000003ff, 0x00000000), -+ DECL_RFK_WM(0x58f4, 0x000003ff, 0x00000000), -+ DECL_RFK_WM(0x58f4, 0x000ffc00, 0x00000000), -+ DECL_RFK_WM(0x58f8, 0x000003ff, 0x00000000), -+ DECL_RFK_WM(0x58f8, 0x000ffc00, 0x00000000), -+ DECL_RFK_WM(0x58a4, 0x0001ff00, 0x00000000), -+ DECL_RFK_WM(0x58a4, 0x03fe0000, 0x000001e5), -+ DECL_RFK_WM(0x58a8, 0x000001ff, 0x00000000), -+ DECL_RFK_WM(0x58a8, 0x0003fe00, 0x0000000a), -+ DECL_RFK_WM(0x58a8, 0x07fc0000, 0x00000000), -+ DECL_RFK_WM(0x58ac, 0x000001ff, 0x00000000), -+ DECL_RFK_WM(0x58ac, 0x0003fe00, 0x00000011), -+ DECL_RFK_WM(0x58ac, 0x07fc0000, 0x00000075), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_tssi_pak_defs_a_5g_4); -+ -+static const struct rtw89_reg5_def rtw8852a_tssi_pak_defs_b_2g[] = { -+ DECL_RFK_WM(0x7814, 0x000003ff, 0x00000000), -+ DECL_RFK_WM(0x78f4, 0x000003ff, 0x00000000), -+ DECL_RFK_WM(0x78f4, 0x000ffc00, 0x00000000), -+ DECL_RFK_WM(0x78f8, 0x000003ff, 0x00000000), -+ DECL_RFK_WM(0x78f8, 0x000ffc00, 0x00000000), -+ DECL_RFK_WM(0x78a4, 0x0001ff00, 0x00000000), -+ DECL_RFK_WM(0x78a4, 0x03fe0000, 0x000001cc), -+ DECL_RFK_WM(0x78a8, 0x000001ff, 0x00000000), -+ DECL_RFK_WM(0x78a8, 0x0003fe00, 0x000001e2), -+ DECL_RFK_WM(0x78a8, 0x07fc0000, 0x00000000), -+ DECL_RFK_WM(0x78ac, 0x000001ff, 0x00000005), -+ DECL_RFK_WM(0x78ac, 0x0003fe00, 0x00000000), -+ DECL_RFK_WM(0x78ac, 0x07fc0000, 0x00000089), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_tssi_pak_defs_b_2g); -+ -+static const struct rtw89_reg5_def rtw8852a_tssi_pak_defs_b_5g_1[] = { -+ DECL_RFK_WM(0x7814, 0x000003ff, 0x00000000), -+ DECL_RFK_WM(0x78f4, 0x000003ff, 0x00000000), -+ DECL_RFK_WM(0x78f4, 0x000ffc00, 0x00000000), -+ DECL_RFK_WM(0x78f8, 0x000003ff, 0x00000000), -+ DECL_RFK_WM(0x78f8, 0x000ffc00, 0x00000000), -+ DECL_RFK_WM(0x78a4, 0x0001ff00, 0x00000000), -+ DECL_RFK_WM(0x78a4, 0x03fe0000, 0x000001d5), -+ DECL_RFK_WM(0x78a8, 0x000001ff, 0x00000000), -+ DECL_RFK_WM(0x78a8, 0x0003fe00, 0x000001fc), -+ DECL_RFK_WM(0x78a8, 0x07fc0000, 0x00000000), -+ DECL_RFK_WM(0x78ac, 0x000001ff, 0x00000000), -+ DECL_RFK_WM(0x78ac, 0x0003fe00, 0x00000005), -+ DECL_RFK_WM(0x78ac, 0x07fc0000, 0x00000079), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_tssi_pak_defs_b_5g_1); -+ -+static const struct rtw89_reg5_def rtw8852a_tssi_pak_defs_b_5g_3[] = { -+ DECL_RFK_WM(0x7814, 0x000003ff, 0x00000000), -+ DECL_RFK_WM(0x78f4, 0x000003ff, 0x00000000), -+ DECL_RFK_WM(0x78f4, 0x000ffc00, 0x00000000), -+ DECL_RFK_WM(0x78f8, 0x000003ff, 0x00000000), -+ DECL_RFK_WM(0x78f8, 0x000ffc00, 0x00000000), -+ DECL_RFK_WM(0x78a4, 0x0001ff00, 0x00000000), -+ DECL_RFK_WM(0x78a4, 0x03fe0000, 0x000001dc), -+ DECL_RFK_WM(0x78a8, 0x000001ff, 0x00000000), -+ DECL_RFK_WM(0x78a8, 0x0003fe00, 0x00000002), -+ DECL_RFK_WM(0x78a8, 0x07fc0000, 0x00000000), -+ DECL_RFK_WM(0x78ac, 0x000001ff, 0x00000000), -+ DECL_RFK_WM(0x78ac, 0x0003fe00, 0x0000000b), -+ DECL_RFK_WM(0x78ac, 0x07fc0000, 0x00000076), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_tssi_pak_defs_b_5g_3); -+ -+static const struct rtw89_reg5_def rtw8852a_tssi_pak_defs_b_5g_4[] = { -+ DECL_RFK_WM(0x7814, 0x000003ff, 0x00000000), -+ DECL_RFK_WM(0x78f4, 0x000003ff, 0x00000000), -+ DECL_RFK_WM(0x78f4, 0x000ffc00, 0x00000000), -+ DECL_RFK_WM(0x78f8, 0x000003ff, 0x00000000), -+ DECL_RFK_WM(0x78f8, 0x000ffc00, 0x00000000), -+ DECL_RFK_WM(0x78a4, 0x0001ff00, 0x00000000), -+ DECL_RFK_WM(0x78a4, 0x03fe0000, 0x000001f0), -+ DECL_RFK_WM(0x78a8, 0x000001ff, 0x00000000), -+ DECL_RFK_WM(0x78a8, 0x0003fe00, 0x00000016), -+ DECL_RFK_WM(0x78a8, 0x07fc0000, 0x00000000), -+ DECL_RFK_WM(0x78ac, 0x000001ff, 0x00000000), -+ DECL_RFK_WM(0x78ac, 0x0003fe00, 0x0000001f), -+ DECL_RFK_WM(0x78ac, 0x07fc0000, 0x00000072), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_tssi_pak_defs_b_5g_4); -+ -+static const struct rtw89_reg5_def rtw8852a_tssi_enable_defs_a[] = { -+ DECL_RFK_WRF(0x0, 0x55, 0x00080, 0x00001), -+ DECL_RFK_WM(0x5818, 0x000000ff, 0x000000c0), -+ DECL_RFK_WM(0x5818, 0x10000000, 0x00000000), -+ DECL_RFK_WM(0x5818, 0x10000000, 0x00000001), -+ DECL_RFK_WM(0x5820, 0x80000000, 0x00000000), -+ DECL_RFK_WM(0x5820, 0x80000000, 0x00000001), -+ DECL_RFK_WM(0x5818, 0x18000000, 0x00000003), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_tssi_enable_defs_a); -+ -+static const struct rtw89_reg5_def rtw8852a_tssi_enable_defs_b[] = { -+ DECL_RFK_WRF(0x1, 0x55, 0x00080, 0x00001), -+ DECL_RFK_WM(0x7818, 0x000000ff, 0x000000c0), -+ DECL_RFK_WM(0x7818, 0x10000000, 0x00000000), -+ DECL_RFK_WM(0x7818, 0x10000000, 0x00000001), -+ DECL_RFK_WM(0x7820, 0x80000000, 0x00000000), -+ DECL_RFK_WM(0x7820, 0x80000000, 0x00000001), -+ DECL_RFK_WM(0x7818, 0x18000000, 0x00000003), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_tssi_enable_defs_b); -+ -+static const struct rtw89_reg5_def rtw8852a_tssi_disable_defs[] = { -+ DECL_RFK_WM(0x5820, 0x80000000, 0x00000000), -+ DECL_RFK_WM(0x5818, 0x18000000, 0x00000001), -+ DECL_RFK_WM(0x7820, 0x80000000, 0x00000000), -+ DECL_RFK_WM(0x7818, 0x18000000, 0x00000001), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_tssi_disable_defs); -+ -+static const struct rtw89_reg5_def rtw8852a_tssi_enable_defs_ab[] = { -+ DECL_RFK_WM(0x5820, 0x80000000, 0x0), -+ DECL_RFK_WM(0x5820, 0x80000000, 0x1), -+ DECL_RFK_WM(0x5818, 0x18000000, 0x3), -+ DECL_RFK_WM(0x7820, 0x80000000, 0x0), -+ DECL_RFK_WM(0x7820, 0x80000000, 0x1), -+ DECL_RFK_WM(0x7818, 0x18000000, 0x3), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_tssi_enable_defs_ab); -+ -+static const struct rtw89_reg5_def rtw8852a_tssi_tracking_defs[] = { -+ DECL_RFK_WM(0x5800, 0x10000000, 0x00000000), -+ DECL_RFK_WM(0x58f0, 0x00080000, 0x00000000), -+ DECL_RFK_WM(0x5804, 0xf8000000, 0x00000000), -+ DECL_RFK_WM(0x58f0, 0xfff00000, 0x00000400), -+ DECL_RFK_WM(0x7800, 0x10000000, 0x00000000), -+ DECL_RFK_WM(0x78f0, 0x00080000, 0x00000000), -+ DECL_RFK_WM(0x7804, 0xf8000000, 0x00000000), -+ DECL_RFK_WM(0x78f0, 0xfff00000, 0x00000400), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_tssi_tracking_defs); -+ -+static const struct rtw89_reg5_def rtw8852a_rfk_afe_init_defs[] = { -+ DECL_RFK_WC(0x12ec, 0x00008000), -+ DECL_RFK_WS(0x12ec, 0x00008000), -+ DECL_RFK_WC(0x5e00, 0x00000001), -+ DECL_RFK_WS(0x5e00, 0x00000001), -+ DECL_RFK_WC(0x32ec, 0x00008000), -+ DECL_RFK_WS(0x32ec, 0x00008000), -+ DECL_RFK_WC(0x7e00, 0x00000001), -+ DECL_RFK_WS(0x7e00, 0x00000001), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_rfk_afe_init_defs); -+ -+static const struct rtw89_reg5_def rtw8852a_rfk_dack_reload_defs_a[] = { -+ DECL_RFK_WS(0x5e00, 0x00000008), -+ DECL_RFK_WS(0x5e50, 0x00000008), -+ DECL_RFK_WS(0x5e10, 0x80000000), -+ DECL_RFK_WS(0x5e60, 0x80000000), -+ DECL_RFK_WC(0x5e00, 0x00000008), -+ DECL_RFK_WC(0x5e50, 0x00000008), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_rfk_dack_reload_defs_a); -+ -+static const struct rtw89_reg5_def rtw8852a_rfk_dack_reload_defs_b[] = { -+ DECL_RFK_WS(0x7e00, 0x00000008), -+ DECL_RFK_WS(0x7e50, 0x00000008), -+ DECL_RFK_WS(0x7e10, 0x80000000), -+ DECL_RFK_WS(0x7e60, 0x80000000), -+ DECL_RFK_WC(0x7e00, 0x00000008), -+ DECL_RFK_WC(0x7e50, 0x00000008), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_rfk_dack_reload_defs_b); -+ -+static const struct rtw89_reg5_def rtw8852a_rfk_check_addc_defs_a[] = { -+ DECL_RFK_WC(0x20f4, 0x01000000), -+ DECL_RFK_WS(0x20f8, 0x80000000), -+ DECL_RFK_WM(0x20f0, 0x00ff0000, 0x00000001), -+ DECL_RFK_WM(0x20f0, 0x00000f00, 0x00000002), -+ DECL_RFK_WC(0x20f0, 0x0000000f), -+ DECL_RFK_WM(0x20f0, 0x000000c0, 0x00000002), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_rfk_check_addc_defs_a); -+ -+static const struct rtw89_reg5_def rtw8852a_rfk_check_addc_defs_b[] = { -+ DECL_RFK_WC(0x20f4, 0x01000000), -+ DECL_RFK_WS(0x20f8, 0x80000000), -+ DECL_RFK_WM(0x20f0, 0x00ff0000, 0x00000001), -+ DECL_RFK_WM(0x20f0, 0x00000f00, 0x00000002), -+ DECL_RFK_WC(0x20f0, 0x0000000f), -+ DECL_RFK_WM(0x20f0, 0x000000c0, 0x00000003), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_rfk_check_addc_defs_b); -+ -+static const struct rtw89_reg5_def rtw8852a_rfk_addck_reset_defs_a[] = { -+ DECL_RFK_WC(0x12d8, 0x00000030), -+ DECL_RFK_WC(0x32d8, 0x00000030), -+ DECL_RFK_WS(0x12b8, 0x40000000), -+ DECL_RFK_WC(0x032c, 0x40000000), -+ DECL_RFK_WC(0x032c, 0x00400000), -+ DECL_RFK_WS(0x032c, 0x00400000), -+ DECL_RFK_WS(0x030c, 0x0f000000), -+ DECL_RFK_WC(0x032c, 0x00010000), -+ DECL_RFK_WS(0x12dc, 0x00000002), -+ DECL_RFK_WM(0x030c, 0x0f000000, 0x00000003), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_rfk_addck_reset_defs_a); -+ -+static const struct rtw89_reg5_def rtw8852a_rfk_addck_trigger_defs_a[] = { -+ DECL_RFK_WS(0x12d8, 0x000000c0), -+ DECL_RFK_WS(0x12d8, 0x00000800), -+ DECL_RFK_WC(0x12d8, 0x00000800), -+ DECL_RFK_DELAY(1), -+ DECL_RFK_WM(0x12d8, 0x00000300, 0x00000001), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_rfk_addck_trigger_defs_a); -+ -+static const struct rtw89_reg5_def rtw8852a_rfk_addck_restore_defs_a[] = { -+ DECL_RFK_WC(0x12dc, 0x00000002), -+ DECL_RFK_WS(0x032c, 0x00010000), -+ DECL_RFK_WM(0x030c, 0x0f000000, 0x0000000c), -+ DECL_RFK_WS(0x032c, 0x40000000), -+ DECL_RFK_WC(0x12b8, 0x40000000), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_rfk_addck_restore_defs_a); -+ -+static const struct rtw89_reg5_def rtw8852a_rfk_addck_reset_defs_b[] = { -+ DECL_RFK_WS(0x32b8, 0x40000000), -+ DECL_RFK_WC(0x032c, 0x40000000), -+ DECL_RFK_WC(0x032c, 0x00400000), -+ DECL_RFK_WS(0x032c, 0x00400000), -+ DECL_RFK_WS(0x030c, 0x0f000000), -+ DECL_RFK_WC(0x032c, 0x00010000), -+ DECL_RFK_WS(0x32dc, 0x00000002), -+ DECL_RFK_WM(0x030c, 0x0f000000, 0x00000003), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_rfk_addck_reset_defs_b); -+ -+static const struct rtw89_reg5_def rtw8852a_rfk_addck_trigger_defs_b[] = { -+ DECL_RFK_WS(0x32d8, 0x000000c0), -+ DECL_RFK_WS(0x32d8, 0x00000800), -+ DECL_RFK_WC(0x32d8, 0x00000800), -+ DECL_RFK_DELAY(1), -+ DECL_RFK_WM(0x32d8, 0x00000300, 0x00000001), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_rfk_addck_trigger_defs_b); -+ -+static const struct rtw89_reg5_def rtw8852a_rfk_addck_restore_defs_b[] = { -+ DECL_RFK_WC(0x32dc, 0x00000002), -+ DECL_RFK_WS(0x032c, 0x00010000), -+ DECL_RFK_WM(0x030c, 0x0f000000, 0x0000000c), -+ DECL_RFK_WS(0x032c, 0x40000000), -+ DECL_RFK_WC(0x32b8, 0x40000000), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_rfk_addck_restore_defs_b); -+ -+static const struct rtw89_reg5_def rtw8852a_rfk_check_dadc_defs_f_a[] = { -+ DECL_RFK_WC(0x032c, 0x40000000), -+ DECL_RFK_WS(0x030c, 0x0f000000), -+ DECL_RFK_WM(0x030c, 0x0f000000, 0x00000003), -+ DECL_RFK_WC(0x032c, 0x00010000), -+ DECL_RFK_WS(0x12dc, 0x00000001), -+ DECL_RFK_WS(0x12e8, 0x00000004), -+ DECL_RFK_WRF(0x0, 0x8f, 0x02000, 0x00001), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_rfk_check_dadc_defs_f_a); -+ -+static const struct rtw89_reg5_def rtw8852a_rfk_check_dadc_defs_f_b[] = { -+ DECL_RFK_WC(0x032c, 0x40000000), -+ DECL_RFK_WS(0x030c, 0x0f000000), -+ DECL_RFK_WM(0x030c, 0x0f000000, 0x00000003), -+ DECL_RFK_WC(0x032c, 0x00010000), -+ DECL_RFK_WS(0x32dc, 0x00000001), -+ DECL_RFK_WS(0x32e8, 0x00000004), -+ DECL_RFK_WRF(0x1, 0x8f, 0x02000, 0x00001), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_rfk_check_dadc_defs_f_b); -+ -+static const struct rtw89_reg5_def rtw8852a_rfk_check_dadc_defs_r_a[] = { -+ DECL_RFK_WC(0x12dc, 0x00000001), -+ DECL_RFK_WC(0x12e8, 0x00000004), -+ DECL_RFK_WRF(0x0, 0x8f, 0x02000, 0x00000), -+ DECL_RFK_WM(0x032c, 0x00010000, 0x00000001), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_rfk_check_dadc_defs_r_a); -+ -+static const struct rtw89_reg5_def rtw8852a_rfk_check_dadc_defs_r_b[] = { -+ DECL_RFK_WC(0x32dc, 0x00000001), -+ DECL_RFK_WC(0x32e8, 0x00000004), -+ DECL_RFK_WRF(0x1, 0x8f, 0x02000, 0x00000), -+ DECL_RFK_WM(0x032c, 0x00010000, 0x00000001), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_rfk_check_dadc_defs_r_b); -+ -+static const struct rtw89_reg5_def rtw8852a_rfk_dack_defs_f_a[] = { -+ DECL_RFK_WS(0x5e00, 0x00000008), -+ DECL_RFK_WC(0x5e10, 0x80000000), -+ DECL_RFK_WS(0x5e50, 0x00000008), -+ DECL_RFK_WC(0x5e60, 0x80000000), -+ DECL_RFK_WS(0x12a0, 0x00008000), -+ DECL_RFK_WM(0x12a0, 0x00007000, 0x00000003), -+ DECL_RFK_WS(0x12b8, 0x40000000), -+ DECL_RFK_WS(0x030c, 0x10000000), -+ DECL_RFK_WC(0x032c, 0x80000000), -+ DECL_RFK_WS(0x12e0, 0x00010000), -+ DECL_RFK_WS(0x12e4, 0x0c000000), -+ DECL_RFK_WM(0x5e00, 0x03ff0000, 0x00000030), -+ DECL_RFK_WM(0x5e50, 0x03ff0000, 0x00000030), -+ DECL_RFK_WC(0x5e00, 0x0c000000), -+ DECL_RFK_WC(0x5e50, 0x0c000000), -+ DECL_RFK_WC(0x5e0c, 0x00000008), -+ DECL_RFK_WC(0x5e5c, 0x00000008), -+ DECL_RFK_WS(0x5e0c, 0x00000001), -+ DECL_RFK_WS(0x5e5c, 0x00000001), -+ DECL_RFK_DELAY(1), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_rfk_dack_defs_f_a); -+ -+static const struct rtw89_reg5_def rtw8852a_rfk_dack_defs_m_a[] = { -+ DECL_RFK_WC(0x12e4, 0x0c000000), -+ DECL_RFK_WS(0x5e0c, 0x00000008), -+ DECL_RFK_WS(0x5e5c, 0x00000008), -+ DECL_RFK_DELAY(1), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_rfk_dack_defs_m_a); -+ -+static const struct rtw89_reg5_def rtw8852a_rfk_dack_defs_r_a[] = { -+ DECL_RFK_WC(0x5e0c, 0x00000001), -+ DECL_RFK_WC(0x5e5c, 0x00000001), -+ DECL_RFK_WC(0x12e0, 0x00010000), -+ DECL_RFK_WC(0x12a0, 0x00008000), -+ DECL_RFK_WS(0x12a0, 0x00007000), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_rfk_dack_defs_r_a); -+ -+static const struct rtw89_reg5_def rtw8852a_rfk_dack_defs_f_b[] = { -+ DECL_RFK_WS(0x7e00, 0x00000008), -+ DECL_RFK_WC(0x7e10, 0x80000000), -+ DECL_RFK_WS(0x7e50, 0x00000008), -+ DECL_RFK_WC(0x7e60, 0x80000000), -+ DECL_RFK_WS(0x32a0, 0x00008000), -+ DECL_RFK_WM(0x32a0, 0x00007000, 0x00000003), -+ DECL_RFK_WS(0x32b8, 0x40000000), -+ DECL_RFK_WS(0x030c, 0x10000000), -+ DECL_RFK_WC(0x032c, 0x80000000), -+ DECL_RFK_WS(0x32e0, 0x00010000), -+ DECL_RFK_WS(0x32e4, 0x0c000000), -+ DECL_RFK_WM(0x7e00, 0x03ff0000, 0x00000030), -+ DECL_RFK_WM(0x7e50, 0x03ff0000, 0x00000030), -+ DECL_RFK_WC(0x7e00, 0x0c000000), -+ DECL_RFK_WC(0x7e50, 0x0c000000), -+ DECL_RFK_WC(0x7e0c, 0x00000008), -+ DECL_RFK_WC(0x7e5c, 0x00000008), -+ DECL_RFK_WS(0x7e0c, 0x00000001), -+ DECL_RFK_WS(0x7e5c, 0x00000001), -+ DECL_RFK_DELAY(1), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_rfk_dack_defs_f_b); -+ -+static const struct rtw89_reg5_def rtw8852a_rfk_dack_defs_m_b[] = { -+ DECL_RFK_WC(0x32e4, 0x0c000000), -+ DECL_RFK_WM(0x7e0c, 0x00000008, 0x00000001), -+ DECL_RFK_WM(0x7e5c, 0x00000008, 0x00000001), -+ DECL_RFK_DELAY(1), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_rfk_dack_defs_m_b); -+ -+static const struct rtw89_reg5_def rtw8852a_rfk_dack_defs_r_b[] = { -+ DECL_RFK_WC(0x7e0c, 0x00000001), -+ DECL_RFK_WC(0x7e5c, 0x00000001), -+ DECL_RFK_WC(0x32e0, 0x00010000), -+ DECL_RFK_WC(0x32a0, 0x00008000), -+ DECL_RFK_WS(0x32a0, 0x00007000), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_rfk_dack_defs_r_b); -+ -+static const struct rtw89_reg5_def rtw8852a_rfk_dpk_bb_afe_sf_defs_a[] = { -+ DECL_RFK_WM(0x20fc, 0xffff0000, 0x00000101), -+ DECL_RFK_WS(0x12b8, 0x40000000), -+ DECL_RFK_WM(0x030c, 0xff000000, 0x00000013), -+ DECL_RFK_WM(0x032c, 0xffff0000, 0x00000041), -+ DECL_RFK_WS(0x12b8, 0x10000000), -+ DECL_RFK_WS(0x58c8, 0x01000000), -+ DECL_RFK_WS(0x5864, 0xc0000000), -+ DECL_RFK_WS(0x2008, 0x01ffffff), -+ DECL_RFK_WS(0x0c1c, 0x00000004), -+ DECL_RFK_WS(0x0700, 0x08000000), -+ DECL_RFK_WS(0x0c70, 0x000003ff), -+ DECL_RFK_WS(0x0c60, 0x00000003), -+ DECL_RFK_WS(0x0c6c, 0x00000001), -+ DECL_RFK_WS(0x58ac, 0x08000000), -+ DECL_RFK_WS(0x0c3c, 0x00000200), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_rfk_dpk_bb_afe_sf_defs_a); -+ -+static const struct rtw89_reg5_def rtw8852a_rfk_dpk_bb_afe_sr_defs_a[] = { -+ DECL_RFK_WS(0x4490, 0x80000000), -+ DECL_RFK_WS(0x12a0, 0x00007000), -+ DECL_RFK_WS(0x12a0, 0x00008000), -+ DECL_RFK_WM(0x12a0, 0x00070000, 0x00000003), -+ DECL_RFK_WS(0x12a0, 0x00080000), -+ DECL_RFK_WS(0x0700, 0x01000000), -+ DECL_RFK_WM(0x0700, 0x06000000, 0x00000002), -+ DECL_RFK_WM(0x20fc, 0xffff0000, 0x00001111), -+ DECL_RFK_WM(0x58f0, 0x00080000, 0x00000000), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_rfk_dpk_bb_afe_sr_defs_a); -+ -+static const struct rtw89_reg5_def rtw8852a_rfk_dpk_bb_afe_sf_defs_b[] = { -+ DECL_RFK_WM(0x20fc, 0xffff0000, 0x00000202), -+ DECL_RFK_WS(0x32b8, 0x40000000), -+ DECL_RFK_WM(0x030c, 0xff000000, 0x00000013), -+ DECL_RFK_WM(0x032c, 0xffff0000, 0x00000041), -+ DECL_RFK_WS(0x32b8, 0x10000000), -+ DECL_RFK_WS(0x78c8, 0x01000000), -+ DECL_RFK_WS(0x7864, 0xc0000000), -+ DECL_RFK_WS(0x2008, 0x01ffffff), -+ DECL_RFK_WS(0x2c1c, 0x00000004), -+ DECL_RFK_WS(0x2700, 0x08000000), -+ DECL_RFK_WS(0x0c70, 0x000003ff), -+ DECL_RFK_WS(0x0c60, 0x00000003), -+ DECL_RFK_WS(0x0c6c, 0x00000001), -+ DECL_RFK_WS(0x78ac, 0x08000000), -+ DECL_RFK_WS(0x2c3c, 0x00000200), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_rfk_dpk_bb_afe_sf_defs_b); -+ -+static const struct rtw89_reg5_def rtw8852a_rfk_dpk_bb_afe_sr_defs_b[] = { -+ DECL_RFK_WS(0x6490, 0x80000000), -+ DECL_RFK_WS(0x32a0, 0x00007000), -+ DECL_RFK_WS(0x32a0, 0x00008000), -+ DECL_RFK_WM(0x32a0, 0x00070000, 0x00000003), -+ DECL_RFK_WS(0x32a0, 0x00080000), -+ DECL_RFK_WS(0x2700, 0x01000000), -+ DECL_RFK_WM(0x2700, 0x06000000, 0x00000002), -+ DECL_RFK_WM(0x20fc, 0xffff0000, 0x00002222), -+ DECL_RFK_WM(0x78f0, 0x00080000, 0x00000000), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_rfk_dpk_bb_afe_sr_defs_b); -+ -+static const struct rtw89_reg5_def rtw8852a_rfk_dpk_bb_afe_s_defs_ab[] = { -+ DECL_RFK_WM(0x20fc, 0xffff0000, 0x00000303), -+ DECL_RFK_WS(0x12b8, 0x40000000), -+ DECL_RFK_WS(0x32b8, 0x40000000), -+ DECL_RFK_WM(0x030c, 0xff000000, 0x00000013), -+ DECL_RFK_WM(0x032c, 0xffff0000, 0x00000041), -+ DECL_RFK_WS(0x12b8, 0x10000000), -+ DECL_RFK_WS(0x58c8, 0x01000000), -+ DECL_RFK_WS(0x78c8, 0x01000000), -+ DECL_RFK_WS(0x5864, 0xc0000000), -+ DECL_RFK_WS(0x7864, 0xc0000000), -+ DECL_RFK_WS(0x2008, 0x01ffffff), -+ DECL_RFK_WS(0x0c1c, 0x00000004), -+ DECL_RFK_WS(0x0700, 0x08000000), -+ DECL_RFK_WS(0x0c70, 0x000003ff), -+ DECL_RFK_WS(0x0c60, 0x00000003), -+ DECL_RFK_WS(0x0c6c, 0x00000001), -+ DECL_RFK_WS(0x58ac, 0x08000000), -+ DECL_RFK_WS(0x78ac, 0x08000000), -+ DECL_RFK_WS(0x0c3c, 0x00000200), -+ DECL_RFK_WS(0x2344, 0x80000000), -+ DECL_RFK_WS(0x4490, 0x80000000), -+ DECL_RFK_WS(0x12a0, 0x00007000), -+ DECL_RFK_WS(0x12a0, 0x00008000), -+ DECL_RFK_WM(0x12a0, 0x00070000, 0x00000003), -+ DECL_RFK_WS(0x12a0, 0x00080000), -+ DECL_RFK_WM(0x32a0, 0x00070000, 0x00000003), -+ DECL_RFK_WS(0x32a0, 0x00080000), -+ DECL_RFK_WS(0x0700, 0x01000000), -+ DECL_RFK_WM(0x0700, 0x06000000, 0x00000002), -+ DECL_RFK_WM(0x20fc, 0xffff0000, 0x00003333), -+ DECL_RFK_WM(0x58f0, 0x00080000, 0x00000000), -+ DECL_RFK_WM(0x78f0, 0x00080000, 0x00000000), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_rfk_dpk_bb_afe_s_defs_ab); -+ -+static const struct rtw89_reg5_def rtw8852a_rfk_dpk_bb_afe_r_defs_a[] = { -+ DECL_RFK_WM(0x20fc, 0xffff0000, 0x00000101), -+ DECL_RFK_WC(0x12b8, 0x40000000), -+ DECL_RFK_WC(0x5864, 0xc0000000), -+ DECL_RFK_WC(0x2008, 0x01ffffff), -+ DECL_RFK_WC(0x0c1c, 0x00000004), -+ DECL_RFK_WC(0x0700, 0x08000000), -+ DECL_RFK_WM(0x0c70, 0x0000001f, 0x00000003), -+ DECL_RFK_WM(0x0c70, 0x000003e0, 0x00000003), -+ DECL_RFK_WC(0x12a0, 0x000ff000), -+ DECL_RFK_WC(0x0700, 0x07000000), -+ DECL_RFK_WC(0x5864, 0x20000000), -+ DECL_RFK_WC(0x0c3c, 0x00000200), -+ DECL_RFK_WC(0x20fc, 0xffff0000), -+ DECL_RFK_WC(0x58c8, 0x01000000), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_rfk_dpk_bb_afe_r_defs_a); -+ -+static const struct rtw89_reg5_def rtw8852a_rfk_dpk_bb_afe_r_defs_b[] = { -+ DECL_RFK_WM(0x20fc, 0xffff0000, 0x00000202), -+ DECL_RFK_WC(0x32b8, 0x40000000), -+ DECL_RFK_WC(0x7864, 0xc0000000), -+ DECL_RFK_WC(0x2008, 0x01ffffff), -+ DECL_RFK_WC(0x2c1c, 0x00000004), -+ DECL_RFK_WC(0x2700, 0x08000000), -+ DECL_RFK_WM(0x0c70, 0x0000001f, 0x00000003), -+ DECL_RFK_WM(0x0c70, 0x000003e0, 0x00000003), -+ DECL_RFK_WC(0x32a0, 0x000ff000), -+ DECL_RFK_WC(0x2700, 0x07000000), -+ DECL_RFK_WC(0x7864, 0x20000000), -+ DECL_RFK_WC(0x2c3c, 0x00000200), -+ DECL_RFK_WC(0x20fc, 0xffff0000), -+ DECL_RFK_WC(0x78c8, 0x01000000), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_rfk_dpk_bb_afe_r_defs_b); -+ -+static const struct rtw89_reg5_def rtw8852a_rfk_dpk_bb_afe_r_defs_ab[] = { -+ DECL_RFK_WM(0x20fc, 0xffff0000, 0x00000303), -+ DECL_RFK_WC(0x12b8, 0x40000000), -+ DECL_RFK_WC(0x32b8, 0x40000000), -+ DECL_RFK_WC(0x5864, 0xc0000000), -+ DECL_RFK_WC(0x7864, 0xc0000000), -+ DECL_RFK_WC(0x2008, 0x01ffffff), -+ DECL_RFK_WC(0x0c1c, 0x00000004), -+ DECL_RFK_WC(0x0700, 0x08000000), -+ DECL_RFK_WM(0x0c70, 0x0000001f, 0x00000003), -+ DECL_RFK_WM(0x0c70, 0x000003e0, 0x00000003), -+ DECL_RFK_WC(0x12a0, 0x000ff000), -+ DECL_RFK_WC(0x32a0, 0x000ff000), -+ DECL_RFK_WC(0x0700, 0x07000000), -+ DECL_RFK_WC(0x5864, 0x20000000), -+ DECL_RFK_WC(0x7864, 0x20000000), -+ DECL_RFK_WC(0x0c3c, 0x00000200), -+ DECL_RFK_WC(0x20fc, 0xffff0000), -+ DECL_RFK_WC(0x58c8, 0x01000000), -+ DECL_RFK_WC(0x78c8, 0x01000000), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_rfk_dpk_bb_afe_r_defs_ab); -+ -+static const struct rtw89_reg5_def rtw8852a_rfk_dpk_lbk_rxiqk_defs_f[] = { -+ DECL_RFK_WM(0x030c, 0xff000000, 0x0000000f), -+ DECL_RFK_DELAY(1), -+ DECL_RFK_WM(0x030c, 0xff000000, 0x00000003), -+ DECL_RFK_WM(0x032c, 0xffff0000, 0x0000a001), -+ DECL_RFK_DELAY(1), -+ DECL_RFK_WM(0x032c, 0xffff0000, 0x0000a041), -+ DECL_RFK_WS(0x8074, 0x80000000), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_rfk_dpk_lbk_rxiqk_defs_f); -+ -+static const struct rtw89_reg5_def rtw8852a_rfk_dpk_lbk_rxiqk_defs_r[] = { -+ DECL_RFK_WC(0x8074, 0x80000000), -+ DECL_RFK_WM(0x030c, 0xff000000, 0x0000001f), -+ DECL_RFK_DELAY(1), -+ DECL_RFK_WM(0x030c, 0xff000000, 0x00000013), -+ DECL_RFK_WM(0x032c, 0xffff0000, 0x00000001), -+ DECL_RFK_DELAY(1), -+ DECL_RFK_WM(0x032c, 0xffff0000, 0x00000041), -+ DECL_RFK_WM(0x20fc, 0xffff0000, 0x00000303), -+ DECL_RFK_WM(0x20fc, 0xffff0000, 0x00003333), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_rfk_dpk_lbk_rxiqk_defs_r); -+ -+static const struct rtw89_reg5_def rtw8852a_rfk_dpk_pas_read_defs[] = { -+ DECL_RFK_WM(0x80d4, 0x00ff0000, 0x00000006), -+ DECL_RFK_WC(0x80bc, 0x00004000), -+ DECL_RFK_WM(0x80c0, 0x00ff0000, 0x00000008), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_rfk_dpk_pas_read_defs); -+ -+static const struct rtw89_reg5_def rtw8852a_rfk_iqk_set_defs_nondbcc_path01[] = { -+ DECL_RFK_WM(0x20fc, 0xffff0000, 0x00000303), -+ DECL_RFK_WM(0x5864, 0x18000000, 0x00000003), -+ DECL_RFK_WM(0x7864, 0x18000000, 0x00000003), -+ DECL_RFK_WM(0x12b8, 0x40000000, 0x00000001), -+ DECL_RFK_WM(0x32b8, 0x40000000, 0x00000001), -+ DECL_RFK_WM(0x030c, 0xff000000, 0x00000013), -+ DECL_RFK_WM(0x032c, 0xffff0000, 0x00000001), -+ DECL_RFK_WM(0x12b8, 0x10000000, 0x00000001), -+ DECL_RFK_WM(0x58c8, 0x01000000, 0x00000001), -+ DECL_RFK_WM(0x78c8, 0x01000000, 0x00000001), -+ DECL_RFK_WM(0x5864, 0xc0000000, 0x00000003), -+ DECL_RFK_WM(0x7864, 0xc0000000, 0x00000003), -+ DECL_RFK_WM(0x2008, 0x01ffffff, 0x01ffffff), -+ DECL_RFK_WM(0x0c1c, 0x00000004, 0x00000001), -+ DECL_RFK_WM(0x0700, 0x08000000, 0x00000001), -+ DECL_RFK_WM(0x0c70, 0x000003ff, 0x000003ff), -+ DECL_RFK_WM(0x0c60, 0x00000003, 0x00000003), -+ DECL_RFK_WM(0x0c6c, 0x00000001, 0x00000001), -+ DECL_RFK_WM(0x58ac, 0x08000000, 0x00000001), -+ DECL_RFK_WM(0x78ac, 0x08000000, 0x00000001), -+ DECL_RFK_WM(0x0c3c, 0x00000200, 0x00000001), -+ DECL_RFK_WM(0x2344, 0x80000000, 0x00000001), -+ DECL_RFK_WM(0x4490, 0x80000000, 0x00000001), -+ DECL_RFK_WM(0x12a0, 0x00007000, 0x00000007), -+ DECL_RFK_WM(0x12a0, 0x00008000, 0x00000001), -+ DECL_RFK_WM(0x12a0, 0x00070000, 0x00000003), -+ DECL_RFK_WM(0x12a0, 0x00080000, 0x00000001), -+ DECL_RFK_WM(0x32a0, 0x00070000, 0x00000003), -+ DECL_RFK_WM(0x32a0, 0x00080000, 0x00000001), -+ DECL_RFK_WM(0x0700, 0x01000000, 0x00000001), -+ DECL_RFK_WM(0x0700, 0x06000000, 0x00000002), -+ DECL_RFK_WM(0x20fc, 0xffff0000, 0x00003333), -+ DECL_RFK_WM(0x58f0, 0x00080000, 0x00000000), -+ DECL_RFK_WM(0x78f0, 0x00080000, 0x00000000), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_rfk_iqk_set_defs_nondbcc_path01); -+ -+static const struct rtw89_reg5_def rtw8852a_rfk_iqk_set_defs_dbcc_path0[] = { -+ DECL_RFK_WM(0x20fc, 0xffff0000, 0x00000101), -+ DECL_RFK_WM(0x5864, 0x18000000, 0x00000003), -+ DECL_RFK_WM(0x7864, 0x18000000, 0x00000003), -+ DECL_RFK_WM(0x12b8, 0x40000000, 0x00000001), -+ DECL_RFK_WM(0x030c, 0xff000000, 0x00000013), -+ DECL_RFK_WM(0x032c, 0xffff0000, 0x00000001), -+ DECL_RFK_WM(0x12b8, 0x10000000, 0x00000001), -+ DECL_RFK_WM(0x58c8, 0x01000000, 0x00000001), -+ DECL_RFK_WM(0x5864, 0xc0000000, 0x00000003), -+ DECL_RFK_WM(0x2008, 0x01ffffff, 0x01ffffff), -+ DECL_RFK_WM(0x0c1c, 0x00000004, 0x00000001), -+ DECL_RFK_WM(0x0700, 0x08000000, 0x00000001), -+ DECL_RFK_WM(0x0c70, 0x000003ff, 0x000003ff), -+ DECL_RFK_WM(0x0c60, 0x00000003, 0x00000003), -+ DECL_RFK_WM(0x0c6c, 0x00000001, 0x00000001), -+ DECL_RFK_WM(0x58ac, 0x08000000, 0x00000001), -+ DECL_RFK_WM(0x0c3c, 0x00000200, 0x00000001), -+ DECL_RFK_WM(0x2320, 0x00000001, 0x00000001), -+ DECL_RFK_WM(0x4490, 0x80000000, 0x00000001), -+ DECL_RFK_WM(0x12a0, 0x00007000, 0x00000007), -+ DECL_RFK_WM(0x12a0, 0x00008000, 0x00000001), -+ DECL_RFK_WM(0x12a0, 0x00070000, 0x00000003), -+ DECL_RFK_WM(0x12a0, 0x00080000, 0x00000001), -+ DECL_RFK_WM(0x0700, 0x01000000, 0x00000001), -+ DECL_RFK_WM(0x0700, 0x06000000, 0x00000002), -+ DECL_RFK_WM(0x20fc, 0xffff0000, 0x00001111), -+ DECL_RFK_WM(0x58f0, 0x00080000, 0x00000000), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_rfk_iqk_set_defs_dbcc_path0); -+ -+static const struct rtw89_reg5_def rtw8852a_rfk_iqk_set_defs_dbcc_path1[] = { -+ DECL_RFK_WM(0x20fc, 0xffff0000, 0x00000202), -+ DECL_RFK_WM(0x7864, 0x18000000, 0x00000003), -+ DECL_RFK_WM(0x32b8, 0x40000000, 0x00000001), -+ DECL_RFK_WM(0x030c, 0xff000000, 0x00000013), -+ DECL_RFK_WM(0x032c, 0xffff0000, 0x00000001), -+ DECL_RFK_WM(0x32b8, 0x10000000, 0x00000001), -+ DECL_RFK_WM(0x78c8, 0x01000000, 0x00000001), -+ DECL_RFK_WM(0x7864, 0xc0000000, 0x00000003), -+ DECL_RFK_WM(0x2008, 0x01ffffff, 0x01ffffff), -+ DECL_RFK_WM(0x2c1c, 0x00000004, 0x00000001), -+ DECL_RFK_WM(0x2700, 0x08000000, 0x00000001), -+ DECL_RFK_WM(0x0c70, 0x000003ff, 0x000003ff), -+ DECL_RFK_WM(0x0c60, 0x00000003, 0x00000003), -+ DECL_RFK_WM(0x0c6c, 0x00000001, 0x00000001), -+ DECL_RFK_WM(0x78ac, 0x08000000, 0x00000001), -+ DECL_RFK_WM(0x2c3c, 0x00000200, 0x00000001), -+ DECL_RFK_WM(0x6490, 0x80000000, 0x00000001), -+ DECL_RFK_WM(0x32a0, 0x00007000, 0x00000007), -+ DECL_RFK_WM(0x32a0, 0x00008000, 0x00000001), -+ DECL_RFK_WM(0x32a0, 0x00070000, 0x00000003), -+ DECL_RFK_WM(0x32a0, 0x00080000, 0x00000001), -+ DECL_RFK_WM(0x2700, 0x01000000, 0x00000001), -+ DECL_RFK_WM(0x2700, 0x06000000, 0x00000002), -+ DECL_RFK_WM(0x20fc, 0xffff0000, 0x00002222), -+ DECL_RFK_WM(0x78f0, 0x00080000, 0x00000000), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_rfk_iqk_set_defs_dbcc_path1); -+ -+static const struct rtw89_reg5_def rtw8852a_rfk_iqk_restore_defs_nondbcc_path01[] = { -+ DECL_RFK_WM(0x20fc, 0xffff0000, 0x00000303), -+ DECL_RFK_WM(0x12b8, 0x40000000, 0x00000000), -+ DECL_RFK_WM(0x32b8, 0x40000000, 0x00000000), -+ DECL_RFK_WM(0x5864, 0xc0000000, 0x00000000), -+ DECL_RFK_WM(0x7864, 0xc0000000, 0x00000000), -+ DECL_RFK_WM(0x2008, 0x01ffffff, 0x00000000), -+ DECL_RFK_WM(0x0c1c, 0x00000004, 0x00000000), -+ DECL_RFK_WM(0x0700, 0x08000000, 0x00000000), -+ DECL_RFK_WM(0x0c70, 0x0000001f, 0x00000003), -+ DECL_RFK_WM(0x0c70, 0x000003e0, 0x00000003), -+ DECL_RFK_WM(0x12a0, 0x000ff000, 0x00000000), -+ DECL_RFK_WM(0x32a0, 0x000ff000, 0x00000000), -+ DECL_RFK_WM(0x0700, 0x07000000, 0x00000000), -+ DECL_RFK_WM(0x5864, 0x20000000, 0x00000000), -+ DECL_RFK_WM(0x7864, 0x20000000, 0x00000000), -+ DECL_RFK_WM(0x0c3c, 0x00000200, 0x00000000), -+ DECL_RFK_WM(0x2320, 0x00000001, 0x00000000), -+ DECL_RFK_WM(0x20fc, 0xffff0000, 0x00000000), -+ DECL_RFK_WM(0x58c8, 0x01000000, 0x00000000), -+ DECL_RFK_WM(0x78c8, 0x01000000, 0x00000000), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_rfk_iqk_restore_defs_nondbcc_path01); -+ -+static const struct rtw89_reg5_def rtw8852a_rfk_iqk_restore_defs_dbcc_path0[] = { -+ DECL_RFK_WM(0x20fc, 0xffff0000, 0x00000101), -+ DECL_RFK_WM(0x12b8, 0x40000000, 0x00000000), -+ DECL_RFK_WM(0x5864, 0xc0000000, 0x00000000), -+ DECL_RFK_WM(0x2008, 0x01ffffff, 0x00000000), -+ DECL_RFK_WM(0x0c1c, 0x00000004, 0x00000000), -+ DECL_RFK_WM(0x0700, 0x08000000, 0x00000000), -+ DECL_RFK_WM(0x0c70, 0x0000001f, 0x00000003), -+ DECL_RFK_WM(0x0c70, 0x000003e0, 0x00000003), -+ DECL_RFK_WM(0x12a0, 0x000ff000, 0x00000000), -+ DECL_RFK_WM(0x0700, 0x07000000, 0x00000000), -+ DECL_RFK_WM(0x5864, 0x20000000, 0x00000000), -+ DECL_RFK_WM(0x0c3c, 0x00000200, 0x00000000), -+ DECL_RFK_WM(0x20fc, 0xffff0000, 0x00000000), -+ DECL_RFK_WM(0x58c8, 0x01000000, 0x00000000), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_rfk_iqk_restore_defs_dbcc_path0); -+ -+static const struct rtw89_reg5_def rtw8852a_rfk_iqk_restore_defs_dbcc_path1[] = { -+ DECL_RFK_WM(0x20fc, 0xffff0000, 0x00000202), -+ DECL_RFK_WM(0x32b8, 0x40000000, 0x00000000), -+ DECL_RFK_WM(0x7864, 0xc0000000, 0x00000000), -+ DECL_RFK_WM(0x2008, 0x01ffffff, 0x00000000), -+ DECL_RFK_WM(0x2c1c, 0x00000004, 0x00000000), -+ DECL_RFK_WM(0x2700, 0x08000000, 0x00000000), -+ DECL_RFK_WM(0x0c70, 0x0000001f, 0x00000003), -+ DECL_RFK_WM(0x0c70, 0x000003e0, 0x00000003), -+ DECL_RFK_WM(0x32a0, 0x000ff000, 0x00000000), -+ DECL_RFK_WM(0x2700, 0x07000000, 0x00000000), -+ DECL_RFK_WM(0x7864, 0x20000000, 0x00000000), -+ DECL_RFK_WM(0x2c3c, 0x00000200, 0x00000000), -+ DECL_RFK_WM(0x20fc, 0xffff0000, 0x00000000), -+ DECL_RFK_WM(0x78c8, 0x01000000, 0x00000000), -+}; -+ -+DECLARE_RFK_TBL(rtw8852a_rfk_iqk_restore_defs_dbcc_path1); -diff --git a/drivers/net/wireless/realtek/rtw89/rtw8852a_rfk_table.h b/drivers/net/wireless/realtek/rtw89/rtw8852a_rfk_table.h -new file mode 100644 -index 000000000000..4a4a45d778ff ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852a_rfk_table.h -@@ -0,0 +1,133 @@ -+/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ -+/* Copyright(c) 2019-2020 Realtek Corporation -+ */ -+ -+#ifndef __RTW89_8852A_RFK_TABLE_H__ -+#define __RTW89_8852A_RFK_TABLE_H__ -+ -+#include "core.h" -+ -+enum rtw89_rfk_flag { -+ RTW89_RFK_F_WRF = 0, -+ RTW89_RFK_F_WM = 1, -+ RTW89_RFK_F_WS = 2, -+ RTW89_RFK_F_WC = 3, -+ RTW89_RFK_F_DELAY = 4, -+ RTW89_RFK_F_NUM, -+}; -+ -+struct rtw89_rfk_tbl { -+ const struct rtw89_reg5_def *defs; -+ u32 size; -+}; -+ -+#define DECLARE_RFK_TBL(_name) \ -+const struct rtw89_rfk_tbl _name ## _tbl = { \ -+ .defs = _name, \ -+ .size = ARRAY_SIZE(_name), \ -+} -+ -+#define DECL_RFK_WRF(_path, _addr, _mask, _data) \ -+ {.flag = RTW89_RFK_F_WRF, \ -+ .path = _path, \ -+ .addr = _addr, \ -+ .mask = _mask, \ -+ .data = _data,} -+ -+#define DECL_RFK_WM(_addr, _mask, _data) \ -+ {.flag = RTW89_RFK_F_WM, \ -+ .addr = _addr, \ -+ .mask = _mask, \ -+ .data = _data,} -+ -+#define DECL_RFK_WS(_addr, _mask) \ -+ {.flag = RTW89_RFK_F_WS, \ -+ .addr = _addr, \ -+ .mask = _mask,} -+ -+#define DECL_RFK_WC(_addr, _mask) \ -+ {.flag = RTW89_RFK_F_WC, \ -+ .addr = _addr, \ -+ .mask = _mask,} -+ -+#define DECL_RFK_DELAY(_data) \ -+ {.flag = RTW89_RFK_F_DELAY, \ -+ .data = _data,} -+ -+extern const struct rtw89_rfk_tbl rtw8852a_tssi_sys_defs_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_tssi_sys_defs_2g_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_tssi_sys_defs_5g_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_tssi_txpwr_ctrl_bb_defs_a_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_tssi_txpwr_ctrl_bb_defs_b_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_tssi_txpwr_ctrl_bb_defs_2g_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_tssi_txpwr_ctrl_bb_defs_5g_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_tssi_txpwr_ctrl_bb_he_tb_defs_a_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_tssi_txpwr_ctrl_bb_he_tb_defs_b_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_tssi_dck_defs_a_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_tssi_dck_defs_b_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_tssi_dac_gain_tbl_defs_a_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_tssi_dac_gain_tbl_defs_b_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_tssi_slope_cal_org_defs_a_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_tssi_slope_cal_org_defs_b_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_tssi_rf_gap_tbl_defs_a_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_tssi_rf_gap_tbl_defs_b_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_tssi_slope_defs_a_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_tssi_slope_defs_b_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_tssi_track_defs_a_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_tssi_track_defs_b_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_tssi_txagc_ofst_mv_avg_defs_a_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_tssi_txagc_ofst_mv_avg_defs_b_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_tssi_pak_defs_a_2g_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_tssi_pak_defs_a_5g_1_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_tssi_pak_defs_a_5g_3_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_tssi_pak_defs_a_5g_4_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_tssi_pak_defs_b_2g_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_tssi_pak_defs_b_5g_1_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_tssi_pak_defs_b_5g_3_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_tssi_pak_defs_b_5g_4_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_tssi_enable_defs_a_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_tssi_enable_defs_b_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_tssi_enable_defs_ab_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_tssi_disable_defs_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_tssi_tracking_defs_tbl; -+ -+extern const struct rtw89_rfk_tbl rtw8852a_rfk_afe_init_defs_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_rfk_dack_reload_defs_a_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_rfk_dack_reload_defs_b_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_rfk_check_addc_defs_a_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_rfk_check_addc_defs_b_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_rfk_addck_reset_defs_a_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_rfk_addck_trigger_defs_a_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_rfk_addck_restore_defs_a_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_rfk_addck_reset_defs_b_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_rfk_addck_trigger_defs_b_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_rfk_addck_restore_defs_b_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_rfk_check_dadc_defs_f_a_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_rfk_check_dadc_defs_f_b_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_rfk_check_dadc_defs_r_a_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_rfk_check_dadc_defs_r_b_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_rfk_dack_defs_f_a_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_rfk_dack_defs_m_a_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_rfk_dack_defs_r_a_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_rfk_dack_defs_f_b_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_rfk_dack_defs_m_b_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_rfk_dack_defs_r_b_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_rfk_dpk_bb_afe_sf_defs_a_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_rfk_dpk_bb_afe_sr_defs_a_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_rfk_dpk_bb_afe_sf_defs_b_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_rfk_dpk_bb_afe_sr_defs_b_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_rfk_dpk_bb_afe_s_defs_ab_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_rfk_dpk_bb_afe_r_defs_a_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_rfk_dpk_bb_afe_r_defs_b_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_rfk_dpk_bb_afe_r_defs_ab_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_rfk_dpk_lbk_rxiqk_defs_f_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_rfk_dpk_lbk_rxiqk_defs_r_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_rfk_dpk_pas_read_defs_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_rfk_iqk_set_defs_nondbcc_path01_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_rfk_iqk_set_defs_dbcc_path0_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_rfk_iqk_set_defs_dbcc_path1_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_rfk_iqk_restore_defs_nondbcc_path01_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_rfk_iqk_restore_defs_dbcc_path0_tbl; -+extern const struct rtw89_rfk_tbl rtw8852a_rfk_iqk_restore_defs_dbcc_path1_tbl; -+ -+#endif -diff --git a/drivers/net/wireless/realtek/rtw89/rtw8852a_table.c b/drivers/net/wireless/realtek/rtw89/rtw8852a_table.c -new file mode 100644 -index 000000000000..3a4fe7207420 ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852a_table.c -@@ -0,0 +1,48725 @@ -+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause -+/* Copyright(c) 2019-2020 Realtek Corporation -+ */ -+ -+#include "phy.h" -+#include "reg.h" -+#include "rtw8852a_table.h" -+ -+static const struct rtw89_reg2_def rtw89_8852a_phy_bb_regs[] = { -+ {0xF0FF0001, 0x00000000}, -+ {0xF03300FF, 0x00000001}, -+ {0xF03500FF, 0x00000002}, -+ {0xF03200FF, 0x00000003}, -+ {0xF03400FF, 0x00000004}, -+ {0xF03600FF, 0x00000005}, -+ {0x704, 0x601E0100}, -+ {0x714, 0x00000000}, -+ {0x718, 0x13332333}, -+ {0x714, 0x00010000}, -+ {0x720, 0x20000000}, -+ {0x980, 0x10002250}, -+ {0x994, 0x00000010}, -+ {0x644, 0x2314283C}, -+ {0x644, 0x3426283C}, -+ {0x994, 0x00000010}, -+ {0xC3C, 0x2840E1BF}, -+ {0xC40, 0x00000000}, -+ {0xC44, 0x00000007}, -+ {0xC48, 0x410E4000}, -+ {0xC54, 0x1001436E}, -+ {0xC58, 0x41000000}, -+ {0x730, 0x00000002}, -+ {0xC60, 0x017FFFF2}, -+ {0xC64, 0x0010A130}, -+ {0xC64, 0x0010A130}, -+ {0x80ff0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0xC68, 0x10000068}, -+ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0xC68, 0x90000068}, -+ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0xC68, 0x90000068}, -+ {0x903200ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0xC68, 0x10000068}, -+ {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0xC68, 0x90000068}, -+ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0xC68, 0x90000068}, -+ {0xA0000000, 0x00000000}, -+ {0xC68, 0x10000068}, -+ {0xB0000000, 0x00000000}, -+ {0xC64, 0x0010A130}, -+ {0xC54, 0x1EE1436E}, -+ {0xC6C, 0x00000020}, -+ {0x708, 0x00000000}, -+ {0xC6C, 0x00000020}, -+ {0x804, 0x0043F01D}, -+ {0x12D0, 0x00000000}, -+ {0x12EC, 0x888CA72B}, -+ {0x32D0, 0x00000000}, -+ {0x32EC, 0x888CA72B}, -+ {0xD40, 0xF64FA0F7}, -+ {0xD44, 0x0400063F}, -+ {0xD48, 0x0003FF7F}, -+ {0xD4C, 0x00000000}, -+ {0xD50, 0xF64FA0F7}, -+ {0xD54, 0x04100437}, -+ {0xD58, 0x0000FF7F}, -+ {0xD5C, 0x00000000}, -+ {0xD60, 0x00000000}, -+ {0xD64, 0x00000000}, -+ {0xD70, 0x0000001D}, -+ {0xD90, 0x000003FF}, -+ {0xD94, 0x00000000}, -+ {0xD98, 0x0000003F}, -+ {0xD9C, 0x00000000}, -+ {0xDA0, 0x000003FF}, -+ {0xDA4, 0x00000000}, -+ {0xDA8, 0x0000003F}, -+ {0xDAC, 0x00000000}, -+ {0xD00, 0x77777777}, -+ {0xD04, 0xBBBBBBBB}, -+ {0xD08, 0xBBBBBBBB}, -+ {0xD0C, 0x00000070}, -+ {0xD10, 0x20110900}, -+ {0xD10, 0x20110FFF}, -+ {0xD7C, 0x001D050C}, -+ {0xD84, 0x00006207}, -+ {0xD18, 0x50209900}, -+ {0xD80, 0x00804100}, -+ {0x714, 0x00010000}, -+ {0x704, 0x601E00FD}, -+ {0x710, 0xF3810000}, -+ {0x000, 0x0580801F}, -+ {0x000, 0x8580801F}, -+ {0x334, 0xFFFFFFFF}, -+ {0x33C, 0x55000000}, -+ {0x340, 0x00005555}, -+ {0x724, 0x00111200}, -+ {0x5868, 0xA9550000}, -+ {0x5870, 0x33221100}, -+ {0x5874, 0x77665544}, -+ {0x5878, 0xBBAA9988}, -+ {0x587C, 0xFFEEDDCC}, -+ {0x5880, 0x76543210}, -+ {0x5884, 0xFEDCBA98}, -+ {0x5888, 0x00000000}, -+ {0x588C, 0x00000000}, -+ {0x5894, 0x00000008}, -+ {0x7868, 0xA9550000}, -+ {0x7870, 0x33221100}, -+ {0x7874, 0x77665544}, -+ {0x7878, 0xBBAA9988}, -+ {0x787C, 0xFFEEDDCC}, -+ {0x7880, 0x76543210}, -+ {0x7884, 0xFEDCBA98}, -+ {0x7888, 0x00000000}, -+ {0x788C, 0x00000000}, -+ {0x7894, 0x00000008}, -+ {0x240C, 0x00000000}, -+ {0xC70, 0x00000400}, -+ {0x700, 0x00000030}, -+ {0x704, 0x601E00FF}, -+ {0x704, 0x601E00FD}, -+ {0x704, 0x601E00FF}, -+ {0x586C, 0x000000F0}, -+ {0x586C, 0x000000E0}, -+ {0x586C, 0x000000D0}, -+ {0x586C, 0x000000C0}, -+ {0x586C, 0x000000B0}, -+ {0x586C, 0x000000A0}, -+ {0x586C, 0x00000090}, -+ {0x586C, 0x00000080}, -+ {0x586C, 0x00000070}, -+ {0x586C, 0x00000060}, -+ {0x586C, 0x00000050}, -+ {0x586C, 0x00000040}, -+ {0x586C, 0x00000030}, -+ {0x586C, 0x00000020}, -+ {0x586C, 0x00000010}, -+ {0x80ff0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x586C, 0x00000000}, -+ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x586C, 0x03E00000}, -+ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x586C, 0x03E00000}, -+ {0x903200ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x586C, 0x00000000}, -+ {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x586C, 0x03E00000}, -+ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x586C, 0x03E00000}, -+ {0xA0000000, 0x00000000}, -+ {0x586C, 0x00000000}, -+ {0xB0000000, 0x00000000}, -+ {0x786C, 0x000000F0}, -+ {0x786C, 0x000000E0}, -+ {0x786C, 0x000000D0}, -+ {0x786C, 0x000000C0}, -+ {0x786C, 0x000000B0}, -+ {0x786C, 0x000000A0}, -+ {0x786C, 0x00000090}, -+ {0x786C, 0x00000080}, -+ {0x786C, 0x00000070}, -+ {0x786C, 0x00000060}, -+ {0x786C, 0x00000050}, -+ {0x786C, 0x00000040}, -+ {0x786C, 0x00000030}, -+ {0x786C, 0x00000020}, -+ {0x786C, 0x00000010}, -+ {0x80ff0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x786C, 0x00000000}, -+ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x786C, 0x03E00000}, -+ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x786C, 0x03E00000}, -+ {0x903200ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x786C, 0x00000000}, -+ {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x786C, 0x03E00000}, -+ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x786C, 0x03E00000}, -+ {0xA0000000, 0x00000000}, -+ {0x786C, 0x00000000}, -+ {0xB0000000, 0x00000000}, -+ {0x5864, 0x080801FF}, -+ {0x7864, 0x080801FF}, -+ {0xC60, 0x017FFFF3}, -+ {0xC6C, 0x00000021}, -+ {0x58AC, 0x08000000}, -+ {0x78AC, 0x08000000}, -+ {0x5864, 0x180801FF}, -+ {0x7864, 0x180801FF}, -+ {0xC60, 0x017FFFF3}, -+ {0xC60, 0x017FFFF3}, -+ {0x2C60, 0x013FFF0A}, -+ {0xC70, 0x00000600}, -+ {0xC70, 0x00000660}, -+ {0xC6C, 0x10001021}, -+ {0x58AC, 0x08000000}, -+ {0x78AC, 0x08000000}, -+ {0x5864, 0x100801FF}, -+ {0x7864, 0x100801FF}, -+ {0x5864, 0x180801FF}, -+ {0x7864, 0x180801FF}, -+ {0x704, 0x601C01FF}, -+ {0x58D4, 0x0401FE00}, -+ {0x78D4, 0x0401FE00}, -+ {0x58F0, 0x000401FF}, -+ {0x78F0, 0x000401FF}, -+ {0x58F0, 0x400401FF}, -+ {0x78F0, 0x400401FF}, -+ {0x12A8, 0x333378A5}, -+ {0x32A8, 0x333378A5}, -+ {0x2300, 0x02748790}, -+ {0x2304, 0x00558670}, -+ {0x2308, 0x002883F0}, -+ {0x230C, 0x00090120}, -+ {0x2310, 0x00000000}, -+ {0x2314, 0x06000000}, -+ {0x2318, 0x00000000}, -+ {0x231C, 0x00000000}, -+ {0x2320, 0x03020100}, -+ {0x2324, 0x07060504}, -+ {0x2328, 0x0B0A0908}, -+ {0x232C, 0x0F0E0D0C}, -+ {0x2330, 0x13121110}, -+ {0x2334, 0x17161514}, -+ {0x2338, 0x0C700022}, -+ {0x233C, 0x0A05298F}, -+ {0x2340, 0x0005298E}, -+ {0x2344, 0x0006318A}, -+ {0x2348, 0xB7E6318A}, -+ {0x234C, 0x80039CE7}, -+ {0x2350, 0x80039CE7}, -+ {0x2354, 0x0005298F}, -+ {0x2358, 0x0015296E}, -+ {0x235C, 0x0C07FC31}, -+ {0x2360, 0x0219A6AE}, -+ {0x2364, 0xE4F624C3}, -+ {0x2368, 0x53626F15}, -+ {0x236C, 0x48000000}, -+ {0x2370, 0x48000000}, -+ {0x2374, 0x074C0000}, -+ {0x2378, 0x202401B5}, -+ {0x237C, 0x00F7000E}, -+ {0x2380, 0x0F0A1111}, -+ {0x2384, 0x30D9000F}, -+ {0x2388, 0x0400EA02}, -+ {0x238C, 0x003CB061}, -+ {0x2390, 0x69C00000}, -+ {0x2394, 0x00000000}, -+ {0x2398, 0x000000F0}, -+ {0x239C, 0x0001FFFF}, -+ {0x23A0, 0x00C80064}, -+ {0x23A4, 0x0190012C}, -+ {0x23A8, 0x001917BE}, -+ {0x23AC, 0x0B308800}, -+ {0x23B0, 0x0001D5B0}, -+ {0x23B4, 0x000285D2}, -+ {0x23B8, 0x00000000}, -+ {0x23BC, 0x00000000}, -+ {0x23C0, 0x00000000}, -+ {0x23C4, 0x00000000}, -+ {0x23C8, 0x00000000}, -+ {0x23CC, 0x00000000}, -+ {0x23D0, 0x00000000}, -+ {0x23D4, 0x00000000}, -+ {0x23D8, 0x00000000}, -+ {0x23DC, 0x00000000}, -+ {0x23E0, 0x00000000}, -+ {0x23E4, 0x00000000}, -+ {0x23E8, 0x00000000}, -+ {0x23EC, 0x00000000}, -+ {0x23F0, 0x00000000}, -+ {0x23F4, 0x00000000}, -+ {0x23F8, 0x00000000}, -+ {0x23FC, 0x00000000}, -+ {0x804, 0x0043F01D}, -+ {0x300, 0xF30CE31C}, -+ {0x304, 0x13EF1F19}, -+ {0x308, 0x0C0CF3F3}, -+ {0x30C, 0x0C0C0C0C}, -+ {0x310, 0x80416000}, -+ {0x314, 0x0041E000}, -+ {0x318, 0x20022042}, -+ {0x31C, 0x20448001}, -+ {0x320, 0x00410040}, -+ {0x324, 0xE000E000}, -+ {0x328, 0xE000E000}, -+ {0x32C, 0xE000E000}, -+ {0x12BC, 0x10104041}, -+ {0x12C0, 0x14411111}, -+ {0x32BC, 0x10104041}, -+ {0x32C0, 0x14411111}, -+ {0x010, 0x0005FFFF}, -+ {0x604, 0x1E1E1E28}, -+ {0x650, 0x00200888}, -+ {0x620, 0x00141230}, -+ {0x35C, 0x000004C4}, -+ {0x80ff0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x5804, 0x04237040}, -+ {0x7804, 0x04237040}, -+ {0x5808, 0x04237040}, -+ {0x7808, 0x04237040}, -+ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x5804, 0x04231040}, -+ {0x7804, 0x04231040}, -+ {0x5808, 0x04231040}, -+ {0x7808, 0x04231040}, -+ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x5804, 0x04231040}, -+ {0x7804, 0x04231040}, -+ {0x5808, 0x04231040}, -+ {0x7808, 0x04231040}, -+ {0x903200ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x5804, 0x04237040}, -+ {0x7804, 0x04237040}, -+ {0x5808, 0x04237040}, -+ {0x7808, 0x04237040}, -+ {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x5804, 0x04231040}, -+ {0x7804, 0x04231040}, -+ {0x5808, 0x04231040}, -+ {0x7808, 0x04231040}, -+ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x5804, 0x04231040}, -+ {0x7804, 0x04231040}, -+ {0x5808, 0x04231040}, -+ {0x7808, 0x04231040}, -+ {0xA0000000, 0x00000000}, -+ {0x5804, 0x04237040}, -+ {0x7804, 0x04237040}, -+ {0x5808, 0x04237040}, -+ {0x7808, 0x04237040}, -+ {0xB0000000, 0x00000000}, -+ {0x12A0, 0x24903156}, -+ {0x32A0, 0x24903156}, -+ {0x640, 0x1414141E}, -+ {0x12B8, 0x30020000}, -+ {0x12AC, 0x02333121}, -+ {0x9A4, 0x0000001C}, -+ {0x624, 0x01010301}, -+ {0x628, 0x00010101}, -+ {0x5800, 0x03FF807F}, -+ {0x7800, 0x03FF807F}, -+ {0x4000, 0x00000000}, -+ {0x4004, 0xCA014000}, -+ {0x4008, 0xC751D4F0}, -+ {0x400C, 0x44511475}, -+ {0x4010, 0x00000000}, -+ {0x4014, 0x00000000}, -+ {0x4018, 0x4F4C084B}, -+ {0x401C, 0x084A4E52}, -+ {0x4020, 0x4D504E4B}, -+ {0x4024, 0x4F4C0849}, -+ {0x4028, 0x08484C50}, -+ {0x402C, 0x4C50504C}, -+ {0x4030, 0x5454084A}, -+ {0x4034, 0x084B5654}, -+ {0x4038, 0x6A6C605A}, -+ {0x403C, 0x4C4C084C}, -+ {0x4040, 0x084B4E4D}, -+ {0x4044, 0x4E4C4B4B}, -+ {0x4048, 0x4B4B084A}, -+ {0x404C, 0x084A4E4C}, -+ {0x4050, 0x514F4C4A}, -+ {0x4054, 0x524E084A}, -+ {0x4058, 0x084A5154}, -+ {0x405C, 0x53555554}, -+ {0x4060, 0x45450845}, -+ {0x4064, 0x08454144}, -+ {0x4068, 0x40434445}, -+ {0x406C, 0x44450845}, -+ {0x4070, 0x08444043}, -+ {0x4074, 0x42434444}, -+ {0x4078, 0x46450844}, -+ {0x407C, 0x08444843}, -+ {0x4080, 0x4B4E4A47}, -+ {0x4084, 0x4F4C084B}, -+ {0x4088, 0x084A4E52}, -+ {0x408C, 0x4D504E4B}, -+ {0x4090, 0x4F4C0849}, -+ {0x4094, 0x08484C50}, -+ {0x4098, 0x4C50504C}, -+ {0x409C, 0x5454084A}, -+ {0x40A0, 0x084B5654}, -+ {0x40A4, 0x6A6C605A}, -+ {0x40A8, 0x4C4C084C}, -+ {0x40AC, 0x084B4E4D}, -+ {0x40B0, 0x4E4C4B4B}, -+ {0x40B4, 0x4B4B084A}, -+ {0x40B8, 0x084A4E4C}, -+ {0x40BC, 0x514F4C4A}, -+ {0x40C0, 0x524E084A}, -+ {0x40C4, 0x084A5154}, -+ {0x40C8, 0x53555554}, -+ {0x40CC, 0x45450845}, -+ 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{0x4638, 0x6FFF0C06}, -+ {0x463C, 0xB8FA4435}, -+ {0x4640, 0xB7C4FEF8}, -+ {0x4644, 0x2A72AD07}, -+ {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x462C, 0x76078E8C}, -+ {0x4630, 0x8EDB50F6}, -+ {0x4634, 0xB5B8DD75}, -+ {0x4638, 0x6FFF4C06}, -+ {0x463C, 0xB8FA4434}, -+ {0x4640, 0xB7C4FEF8}, -+ {0x4644, 0x2A72AD07}, -+ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x462C, 0x76078E8C}, -+ {0x4630, 0x8EDB50F6}, -+ {0x4634, 0xB5B8DD75}, -+ {0x4638, 0x6FFF4C06}, -+ {0x463C, 0xB8FA4434}, -+ {0x4640, 0xB7C4FEF8}, -+ {0x4644, 0x2A72AD07}, -+ {0xA0000000, 0x00000000}, -+ {0x462C, 0x76067E8C}, -+ {0x4630, 0x8EA350E8}, -+ {0x4634, 0xB3B8D8F5}, -+ {0x4638, 0x6FFF0C06}, -+ {0x463C, 0xB8FA4435}, -+ {0x4640, 0xB7C4FEF8}, -+ {0x4644, 0x2A72AD07}, -+ {0xB0000000, 0x00000000}, -+ {0x4648, 0x64204FB2}, -+ {0x464C, 0x4C823404}, -+ {0x4650, 0x9084C800}, -+ {0x4654, 0x9889314F}, -+ {0x4658, 0x5ECC3FF4}, -+ {0x465C, 0xFEECAECE}, -+ {0x4660, 0x47806638}, -+ {0x4664, 0x0F5AF843}, -+ {0x80ff0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4668, 0x56452994}, -+ {0x466C, 0x54D89ADB}, -+ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4668, 0x55452994}, -+ {0x466C, 0x56D89ADB}, -+ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4668, 0x55452994}, -+ {0x466C, 0x56D89ADB}, -+ {0x903200ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4668, 0x56452994}, -+ {0x466C, 0x54D89ADB}, -+ {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4668, 0x55452994}, -+ {0x466C, 0x56D89ADB}, -+ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4668, 0x55452994}, -+ {0x466C, 0x56D89ADB}, -+ {0xA0000000, 0x00000000}, -+ {0x4668, 0x56452994}, -+ {0x466C, 0x54D89ADB}, -+ {0xB0000000, 0x00000000}, -+ {0x4670, 0xE8DF38D8}, -+ {0x80ff0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4674, 0x002ACC30}, -+ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4674, 0x0028CC30}, -+ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4674, 0x0028CC30}, -+ {0x903200ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4674, 0x002ACC30}, -+ {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4674, 0x0028CC30}, -+ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4674, 0x0028CC30}, -+ {0xA0000000, 0x00000000}, -+ {0x4674, 0x002ACC30}, -+ {0xB0000000, 0x00000000}, -+ {0x4678, 0x00000000}, -+ {0x467C, 0x00000000}, -+ {0x4680, 0x00000219}, -+ {0x4684, 0x00000000}, -+ {0x4688, 0x00000000}, -+ {0x468C, 0x00000001}, -+ {0x4690, 0x00000001}, -+ {0x4694, 0x00000000}, -+ {0x4698, 0x00000000}, -+ {0x469C, 0x00000151}, -+ {0x46A0, 0x00000498}, -+ {0x46A4, 0x00000498}, -+ {0x46A8, 0x00000000}, -+ {0x46AC, 0x00000000}, -+ {0x46B0, 0x00001146}, -+ {0x46B4, 0x00000000}, -+ {0x46B8, 0x00000000}, -+ {0x46BC, 0x00E2E100}, -+ {0x46C0, 0xCB00B6B6}, -+ {0x46C4, 0x59100FCA}, -+ {0x46C8, 0x08882550}, -+ {0x46CC, 0x08CC2660}, -+ {0x46D0, 0x09102660}, -+ {0x46D4, 0x00000154}, -+ {0x46D8, 0x00000800}, -+ {0x46DC, 0x31BF0400}, -+ {0x46E0, 0x00E0C0A0}, -+ {0x46E4, 0x30604020}, -+ {0x46E8, 0x4F346D50}, -+ {0x46EC, 0x2E36B6E2}, -+ {0x46F0, 0x3E7EF86B}, -+ {0x46F4, 0x001FC004}, -+ {0x46F8, 0xA8068010}, -+ {0x46FC, 0x4602CA80}, -+ {0x80ff0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4700, 0x7806FECC}, -+ {0x4704, 0x8EC360F1}, -+ {0x4708, 0xB4C4DA7A}, -+ {0x470C, 0x72FF2CC6}, -+ {0x4710, 0xB8FA4439}, -+ {0x4714, 0xB7C4FEF8}, -+ {0x4718, 0x2A72AD09}, -+ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4700, 0x78078ECC}, -+ {0x4704, 0x8EDB60F6}, -+ {0x4708, 0xB5C4DD7A}, -+ {0x470C, 0x72FF4CC6}, -+ {0x4710, 0xB8FA4434}, -+ {0x4714, 0xB7C4FEF8}, -+ {0x4718, 0x2A72AD09}, -+ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4700, 0x78078ECC}, -+ {0x4704, 0x8EDB60F6}, -+ {0x4708, 0xB5C4DD7A}, -+ {0x470C, 0x72FF4CC6}, -+ {0x4710, 0xB8FA4434}, -+ {0x4714, 0xB7C4FEF8}, -+ {0x4718, 0x2A72AD09}, -+ {0x903200ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4700, 0x7806FECC}, -+ {0x4704, 0x8EC360F1}, -+ {0x4708, 0xB4C4DA7A}, -+ {0x470C, 0x72FF2CC6}, -+ {0x4710, 0xB8FA4439}, -+ {0x4714, 0xB7C4FEF8}, -+ {0x4718, 0x2A72AD09}, -+ {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4700, 0x78078ECC}, -+ {0x4704, 0x8EDB60F6}, -+ {0x4708, 0xB5C4DD7A}, -+ {0x470C, 0x72FF4CC6}, -+ {0x4710, 0xB8FA4434}, -+ {0x4714, 0xB7C4FEF8}, -+ {0x4718, 0x2A72AD09}, -+ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4700, 0x78078ECC}, -+ {0x4704, 0x8EDB60F6}, -+ {0x4708, 0xB5C4DD7A}, -+ {0x470C, 0x72FF4CC6}, -+ {0x4710, 0xB8FA4434}, -+ {0x4714, 0xB7C4FEF8}, -+ {0x4718, 0x2A72AD09}, -+ {0xA0000000, 0x00000000}, -+ {0x4700, 0x7806FECC}, -+ {0x4704, 0x8EC360F1}, -+ {0x4708, 0xB4C4DA7A}, -+ {0x470C, 0x72FF2CC6}, -+ {0x4710, 0xB8FA4439}, -+ {0x4714, 0xB7C4FEF8}, -+ {0x4718, 0x2A72AD09}, -+ {0xB0000000, 0x00000000}, -+ {0x471C, 0x64204FB2}, -+ {0x4720, 0x4C823404}, -+ {0x4724, 0x9084C800}, -+ {0x4728, 0x9889314F}, -+ {0x472C, 0x5ECC3FF4}, -+ {0x4730, 0xFEECAECE}, -+ {0x4734, 0x47806638}, -+ {0x4738, 0x0F4A7843}, -+ {0x80ff0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x473C, 0x56452994}, -+ {0x4740, 0x54D89ADB}, -+ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x473C, 0x55452994}, -+ {0x4740, 0x56D89ADB}, -+ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x473C, 0x55452994}, -+ {0x4740, 0x56D89ADB}, -+ {0x903200ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x473C, 0x56452994}, -+ {0x4740, 0x54D89ADB}, -+ {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x473C, 0x55452994}, -+ {0x4740, 0x56D89ADB}, -+ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x473C, 0x55452994}, -+ {0x4740, 0x56D89ADB}, -+ {0xA0000000, 0x00000000}, -+ {0x473C, 0x56452994}, -+ {0x4740, 0x54D89ADB}, -+ {0xB0000000, 0x00000000}, -+ {0x4744, 0xE8DF38D8}, -+ {0x80ff0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4748, 0x002ACC30}, -+ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4748, 0x0028CC30}, -+ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4748, 0x0028CC30}, -+ {0x903200ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4748, 0x002ACC30}, -+ {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4748, 0x0028CC30}, -+ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4748, 0x0028CC30}, -+ {0xA0000000, 0x00000000}, -+ {0x4748, 0x002ACC30}, -+ {0xB0000000, 0x00000000}, -+ {0x474C, 0x00000000}, -+ {0x4750, 0x00000000}, -+ {0x4754, 0x00000219}, -+ {0x4758, 0x00000000}, -+ {0x475C, 0x00000000}, -+ {0x4760, 0x00000001}, -+ {0x4764, 0x00000001}, -+ {0x4768, 0x00000000}, -+ {0x476C, 0x00000000}, -+ {0x4770, 0x00000151}, -+ {0x4774, 0x00000498}, -+ {0x4778, 0x00000498}, -+ {0x477C, 0x00000000}, -+ {0x4780, 0x00000000}, -+ {0x4784, 0x00001147}, -+ {0x4788, 0x00000000}, -+ {0x478C, 0xA32103FE}, -+ {0x4790, 0x320A7B28}, -+ {0x4794, 0xC6A7B14F}, -+ {0x4798, 0x000006D7}, -+ {0x479C, 0x009B902A}, -+ {0x47A0, 0x009B902A}, -+ {0x47A4, 0x98682C18}, -+ {0x47A8, 0x6308C4C1}, -+ {0x47AC, 0x6248C631}, -+ {0x47B0, 0x922A8253}, -+ {0x47B4, 0x00000005}, -+ {0x47B8, 0x00001759}, -+ {0x47BC, 0x4B802000}, -+ {0x47C0, 0x831408BE}, -+ {0x47C4, 0x9ABBCACB}, -+ {0x47C8, 0x56767578}, -+ {0x47CC, 0xBBCCBBB3}, -+ {0x47D0, 0x57889989}, -+ {0x47D4, 0x00000F45}, -+ {0x47D8, 0x27039CE9}, -+ {0x47DC, 0x31413432}, -+ {0x47E0, 0x26058342}, -+ {0x47E4, 0x00000006}, -+ {0x47E8, 0x00000005}, -+ {0x47EC, 0x00000005}, -+ {0x47F0, 0xC7013016}, -+ {0x47F4, 0x84413016}, -+ {0x47F8, 0x84413016}, -+ {0x47FC, 0x8C413016}, -+ {0x4800, 0x8C40B028}, -+ {0x4804, 0x3140B028}, -+ {0x4808, 0x2940B028}, -+ {0x480C, 0x8440B028}, -+ {0x4810, 0x2318C610}, -+ {0x4814, 0x45334753}, -+ {0x4818, 0x236A6A88}, -+ {0x481C, 0x576DF814}, -+ {0x4820, 0xA08877AC}, -+ {0x4824, 0x0000087A}, -+ {0x4828, 0xBCEB4A14}, -+ {0x482C, 0x000A3A4A}, -+ {0x4830, 0xBCEB4A14}, -+ {0x4834, 0x000A3A4A}, -+ {0x4838, 0xBCBDBD85}, -+ {0x483C, 0x0CABB99A}, -+ {0x4840, 0x38384242}, -+ {0x4844, 0x8086102E}, -+ {0x4848, 0xCA24C82A}, -+ {0x484C, 0x00008A62}, -+ {0x4850, 0x00000008}, -+ {0x4854, 0x009B902A}, -+ {0x4858, 0x009B902A}, -+ {0x485C, 0x98682C18}, -+ {0x4860, 0x6308C4C1}, -+ {0x4864, 0x6248C631}, -+ {0x4868, 0x922A8253}, -+ {0x486C, 0x00000005}, -+ {0x4870, 0x00001759}, -+ {0x4874, 0x4B802000}, -+ {0x4878, 0x831408BE}, -+ {0x487C, 0x9898A8BB}, -+ {0x4880, 0x54535368}, -+ {0x4884, 0x999999B3}, -+ {0x4888, 0x35555589}, -+ {0x488C, 0x00000745}, -+ {0x4890, 0x27039CE9}, -+ {0x4894, 0x31413432}, -+ {0x4898, 0x26058342}, -+ {0x489C, 0x00000006}, -+ {0x48A0, 0x00000005}, -+ {0x48A4, 0x00000005}, -+ {0x48A8, 0xC7013016}, -+ {0x48AC, 0x84413016}, -+ {0x48B0, 0x84413016}, -+ {0x48B4, 0x8C413016}, -+ {0x48B8, 0x8C40B028}, -+ {0x48BC, 0x3140B028}, -+ {0x48C0, 0x2940B028}, -+ {0x48C4, 0x8440B028}, -+ {0x48C8, 0x2318C610}, -+ {0x48CC, 0x45334753}, -+ {0x48D0, 0x236A6A88}, -+ {0x48D4, 0x576DF814}, -+ {0x48D8, 0xA08877AC}, -+ {0x48DC, 0x0000007A}, -+ {0x48E0, 0xBCEB4A14}, -+ {0x48E4, 0x000A3A4A}, -+ {0x48E8, 0xBCEB4A14}, -+ {0x48EC, 0x000A3A4A}, -+ {0x48F0, 0x9A8A8A85}, -+ {0x48F4, 0x0CA3B99A}, -+ {0x48F8, 0x38384242}, -+ {0x48FC, 0x8086102E}, -+ {0x4900, 0xCA24C82A}, -+ {0x4904, 0x00008A62}, -+ {0x4908, 0x00000008}, -+ {0x490C, 0x80040000}, -+ {0x4910, 0x80040000}, -+ {0x4914, 0xFE800000}, -+ {0x4918, 0x834C0000}, -+ {0x491C, 0x00000000}, -+ {0x4920, 0x00000000}, -+ {0x4924, 0x00000000}, -+ {0x4928, 0x00000000}, -+ {0x492C, 0x00000000}, -+ {0x4930, 0x00000000}, -+ {0x4934, 0x40000000}, -+ {0x4938, 0x00000000}, -+ {0x493C, 0x00000000}, -+ {0x4940, 0x00000000}, -+ {0x4944, 0x00000000}, -+ {0x4948, 0x04065800}, -+ {0x494C, 0x32004080}, -+ {0x4950, 0x0E1E3E05}, -+ {0x4954, 0x0A163068}, -+ {0x4958, 0x00206040}, -+ {0x495C, 0x02020202}, -+ {0x4960, 0x00A16020}, -+ {0x4964, 0x031F4284}, -+ {0x4968, 0x00A10285}, -+ {0x496C, 0x00000005}, -+ {0x4970, 0x00000000}, -+ {0x4974, 0x800CD62D}, -+ {0x4978, 0x00000103}, -+ {0x497C, 0x00000000}, -+ {0x4980, 0x00000000}, -+ {0x4984, 0x00000000}, -+ {0x4988, 0x00000000}, -+ {0x498C, 0x00000000}, -+ {0x4990, 0x00000000}, -+ {0x4994, 0x00000000}, -+ {0x4998, 0x00000000}, -+ {0x499C, 0x00000000}, -+ {0x49A0, 0x00000000}, -+ {0x2404, 0x00000001}, -+ {0xC7C, 0x0000BFE0}, -+ {0x020, 0x0000F381}, -+ {0x024, 0x0000F381}, -+ {0x028, 0x0000F381}, -+ {0x02C, 0x0000F381}, -+ {0xD78, 0x00000005}, -+ {0x12CC, 0x00000CC1}, -+ {0x12D0, 0x00000000}, -+ {0x12D4, 0x00000000}, -+ {0x12D8, 0x00000040}, -+ {0x12DC, 0x4486888C}, -+ {0x12E0, 0xC43A10E1}, -+ {0x12E4, 0x30D52C68}, -+ {0x12E8, 0x02024128}, -+ {0x12EC, 0x888C272B}, -+ {0x12EC, 0x888CA72B}, -+ {0x32CC, 0x00000CC1}, -+ {0x32D0, 0x00000000}, -+ {0x32D4, 0x00000000}, -+ {0x32D8, 0x00000040}, -+ {0x32DC, 0x4486888C}, -+ {0x32E0, 0xC43A10E1}, -+ {0x32E4, 0x30D52C68}, -+ {0x32E8, 0x02024128}, -+ {0x32EC, 0x888C272B}, -+ {0x32EC, 0x888CA72B}, -+ {0x12AC, 0x12333121}, -+ {0x32AC, 0x12333121}, -+ {0x738, 0x004100CC}, -+ {0x80ff0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x5820, 0x80001080}, -+ {0x7820, 0x80001080}, -+ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x5820, 0xC0001080}, -+ {0x7820, 0xC0001080}, -+ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x5820, 0xC0001080}, -+ {0x7820, 0xC0001080}, -+ {0x903200ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x5820, 0x80001080}, -+ {0x7820, 0x80001080}, -+ {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x5820, 0x80001080}, -+ {0x7820, 0x80001080}, -+ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x5820, 0x80001080}, -+ {0x7820, 0x80001080}, -+ {0xA0000000, 0x00000000}, -+ {0x5820, 0x80001080}, -+ {0x7820, 0x80001080}, -+ {0xB0000000, 0x00000000}, -+ {0x2000, 0x18BBBF84}, -+ {0x0F0, 0x00000002}, -+ {0x0F4, 0x00000016}, -+ {0x0F8, 0x20201013}, -+}; -+ -+static const struct rtw89_reg2_def rtw89_8852a_phy_radioa_regs[] = { -+ {0xF0010000, 0x00000000}, -+ {0xF0010001, 0x00000001}, -+ {0xF0020001, 0x00000002}, -+ {0xF0030001, 0x00000003}, -+ {0xF0250001, 0x00000004}, -+ {0xF0260001, 0x00000005}, -+ {0xF0320001, 0x00000006}, -+ {0xF0330001, 0x00000007}, -+ {0xF0340001, 0x00000008}, -+ {0xF0350001, 0x00000009}, -+ {0xF0360001, 0x0000000A}, -+ {0xF0010002, 0x0000000B}, -+ {0xF0020002, 0x0000000C}, -+ {0xF0030002, 0x0000000D}, -+ {0xF0250002, 0x0000000E}, -+ {0xF0260002, 0x0000000F}, -+ {0xF0320002, 0x00000010}, -+ {0xF0330002, 0x00000011}, -+ {0xF0340002, 0x00000012}, -+ {0xF0350002, 0x00000013}, -+ {0xF0360002, 0x00000014}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x005, 0x00000001}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x005, 0x00000000}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x005, 0x00000000}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x005, 0x00000000}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x005, 0x00000000}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x005, 0x00000000}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x005, 0x00000000}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x005, 0x00000000}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x005, 0x00000000}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x005, 0x00000000}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x005, 0x00000000}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x005, 0x00000000}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x005, 0x00000000}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x005, 0x00000000}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x005, 0x00000000}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x005, 0x00000000}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x005, 0x00000000}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x005, 0x00000000}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x005, 0x00000000}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x005, 0x00000000}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x005, 0x00000000}, -+ {0xA0000000, 0x00000000}, -+ {0x005, 0x00000001}, -+ {0xB0000000, 0x00000000}, -+ {0x000, 0x00030000}, -+ {0x018, 0x00011124}, -+ {0x000, 0x00033C00}, -+ {0x01A, 0x00040004}, -+ {0x0FE, 0x00000000}, -+ {0x055, 0x00080000}, -+ {0x056, 0x0008FFF0}, -+ {0x057, 0x0000C485}, -+ {0x058, 0x000A4164}, -+ {0x059, 0x00010000}, -+ {0x05A, 0x00060000}, -+ {0x05B, 0x0000A000}, -+ {0x05C, 0x00000000}, -+ {0x05D, 0x0001C013}, -+ {0x05E, 0x00000000}, -+ {0x05F, 0x00001FF0}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x060, 0x00011000}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x060, 0x00011008}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x060, 0x00011008}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x060, 0x00011008}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x060, 0x00011008}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x060, 0x00011008}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x060, 0x00011008}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x060, 0x00011008}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x060, 0x00011008}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x060, 0x00011008}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x060, 0x00011008}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x060, 0x00011008}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x060, 0x00011008}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x060, 0x00011008}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x060, 0x00011008}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x060, 0x00011008}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x060, 0x00011008}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x060, 0x00011008}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x060, 0x00011008}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x060, 0x00011008}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x060, 0x00011008}, -+ {0xA0000000, 0x00000000}, -+ {0x060, 0x00011000}, -+ {0xB0000000, 0x00000000}, -+ {0x061, 0x0009F338}, -+ {0x062, 0x0009233A}, -+ {0x063, 0x000D6002}, -+ {0x064, 0x000A0CB0}, -+ {0x065, 0x00030EFE}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x066, 0x00010000}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x066, 0x00010000}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x066, 0x00010000}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x066, 0x00010000}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x066, 0x00020000}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x066, 0x00020000}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x066, 0x00010000}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x066, 0x00020000}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x066, 0x00020000}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x066, 0x00020000}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x066, 0x00020000}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x066, 0x00010000}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x066, 0x00010000}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x066, 0x00010000}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x066, 0x00020000}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x066, 0x00020000}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x066, 0x00010000}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x066, 0x00020000}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x066, 0x00020000}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x066, 0x00020000}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x066, 0x00020000}, -+ {0xA0000000, 0x00000000}, -+ {0x066, 0x00020000}, -+ {0xB0000000, 0x00000000}, -+ {0x068, 0x00000000}, -+ {0x069, 0x00030F0A}, -+ {0x06A, 0x00000000}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x051, 0x000AD6A4}, -+ {0x052, 0x00091345}, -+ {0x053, 0x00080081}, -+ {0x054, 0x0009BC24}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x051, 0x000BD267}, -+ {0x052, 0x00091345}, -+ {0x053, 0x000B0081}, -+ {0x054, 0x0007BCA4}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x051, 0x000BD267}, -+ {0x052, 0x00091345}, -+ {0x053, 0x000B0081}, -+ {0x054, 0x0007BCA4}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x051, 0x000BD267}, -+ {0x052, 0x00091345}, -+ {0x053, 0x000B0081}, -+ {0x054, 0x0007BCA4}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x051, 0x000BD267}, -+ {0x052, 0x00091345}, -+ {0x053, 0x000B0081}, -+ {0x054, 0x0007BCA4}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x051, 0x000BD267}, -+ {0x052, 0x00091345}, -+ {0x053, 0x000B0081}, -+ {0x054, 0x0007BCA4}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x051, 0x000BD267}, -+ {0x052, 0x00091345}, -+ {0x053, 0x000B0081}, -+ {0x054, 0x0007BCA4}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x051, 0x000BD267}, -+ {0x052, 0x00091345}, -+ {0x053, 0x000B0081}, -+ {0x054, 0x0007BCA4}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x051, 0x000BD267}, -+ {0x052, 0x00091345}, -+ {0x053, 0x000B0081}, -+ {0x054, 0x0007BCA4}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x051, 0x000BD267}, -+ {0x052, 0x00091345}, -+ {0x053, 0x000B0081}, -+ {0x054, 0x0007BCA4}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x051, 0x000BD267}, -+ {0x052, 0x00091345}, -+ {0x053, 0x000B0081}, -+ {0x054, 0x0007BCA4}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x051, 0x000BD267}, -+ {0x052, 0x00091345}, -+ {0x053, 0x000B0081}, -+ {0x054, 0x0007BCA4}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x051, 0x000BD267}, -+ {0x052, 0x00091345}, -+ {0x053, 0x000B0081}, -+ {0x054, 0x0007BCA4}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x051, 0x000BD267}, -+ {0x052, 0x00091345}, -+ {0x053, 0x000B0081}, -+ {0x054, 0x0007BCA4}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x051, 0x000BD267}, -+ {0x052, 0x00091345}, -+ {0x053, 0x000B0081}, -+ {0x054, 0x0007BCA4}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x051, 0x000BD267}, -+ {0x052, 0x00091345}, -+ {0x053, 0x000B0081}, -+ {0x054, 0x0007BCA4}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x051, 0x000BD267}, -+ {0x052, 0x00091345}, -+ {0x053, 0x000B0081}, -+ {0x054, 0x0007BCA4}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x051, 0x000BD267}, -+ {0x052, 0x00091345}, -+ {0x053, 0x000B0081}, -+ {0x054, 0x0007BCA4}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x051, 0x000BD267}, -+ {0x052, 0x00091345}, -+ {0x053, 0x000B0081}, -+ {0x054, 0x0007BCA4}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x051, 0x000BD267}, -+ {0x052, 0x00091345}, -+ {0x053, 0x000B0081}, -+ {0x054, 0x0007BCA4}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x051, 0x000BD267}, -+ {0x052, 0x00091345}, -+ {0x053, 0x000B0081}, -+ {0x054, 0x0007BCA4}, -+ {0xA0000000, 0x00000000}, -+ {0x051, 0x000AD6A4}, -+ {0x052, 0x00091345}, -+ {0x053, 0x00080081}, -+ {0x054, 0x0009BC24}, -+ {0xB0000000, 0x00000000}, -+ {0x0D3, 0x00000143}, -+ {0x043, 0x00005000}, -+ {0x0DD, 0x000003A0}, -+ {0x0B0, 0x000E6700}, -+ {0x0AF, 0x0001F82E}, -+ {0x0B2, 0x000210A7}, -+ {0x0B1, 0x00065FFF}, -+ {0x0BB, 0x000F7A00}, -+ {0x0B3, 0x00013F7A}, -+ {0x0D4, 0x0000000E}, -+ {0x0B7, 0x00001E0C}, -+ {0x0A0, 0x0000004F}, -+ {0x0B4, 0x0007C03E}, -+ {0x0B5, 0x0007E301}, -+ {0x0B6, 0x00080800}, -+ {0x0CA, 0x00002000}, -+ {0x0DD, 0x000003A0}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0CC, 0x00080000}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0CC, 0x000E0000}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0CC, 0x000E0000}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0CC, 0x000E0000}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0CC, 0x000E0000}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0CC, 0x000E0000}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0CC, 0x000E0000}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0CC, 0x000E0000}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0CC, 0x000E0000}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0CC, 0x000E0000}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0CC, 0x000E0000}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0CC, 0x000E0000}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0CC, 0x000E0000}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0CC, 0x000E0000}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0CC, 0x000E0000}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0CC, 0x000E0000}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0CC, 0x000E0000}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0CC, 0x000E0000}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0CC, 0x000E0000}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0CC, 0x000E0000}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0CC, 0x000E0000}, -+ {0xA0000000, 0x00000000}, -+ {0x0CC, 0x00080000}, -+ {0xB0000000, 0x00000000}, -+ {0x0A1, 0x0006F300}, -+ {0x0A2, 0x00080500}, -+ {0x0A3, 0x0008050B}, -+ {0x0A4, 0x0006DB12}, -+ {0x0A5, 0x00000000}, -+ {0x0A6, 0x00000000}, -+ {0x0A7, 0x00000000}, -+ {0x0A8, 0x00000000}, -+ {0x0A9, 0x00000000}, -+ {0x0AA, 0x00000000}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0A5, 0x000B0000}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0A5, 0x00000000}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0A5, 0x00000000}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0A5, 0x00000000}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0A5, 0x00000000}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0A5, 0x00000000}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0A5, 0x00000000}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0A5, 0x00000000}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0A5, 0x00000000}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0A5, 0x00000000}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0A5, 0x00000000}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0A5, 0x00000000}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0A5, 0x00000000}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0A5, 0x00000000}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0A5, 0x00000000}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0A5, 0x00000000}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0A5, 0x00000000}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0A5, 0x00000000}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0A5, 0x00000000}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0A5, 0x00000000}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0A5, 0x00000000}, -+ {0xA0000000, 0x00000000}, -+ {0x0A5, 0x000B0000}, -+ {0xB0000000, 0x00000000}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0ED, 0x00008000}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0ED, 0x00000000}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0ED, 0x00000000}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0ED, 0x00000000}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0ED, 0x00000000}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0ED, 0x00000000}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0ED, 0x00000000}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0ED, 0x00000000}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0ED, 0x00000000}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0ED, 0x00000000}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0ED, 0x00000000}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0ED, 0x00000000}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0ED, 0x00000000}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0ED, 0x00000000}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0ED, 0x00000000}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0ED, 0x00000000}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0ED, 0x00000000}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0ED, 0x00000000}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0ED, 0x00000000}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0ED, 0x00000000}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0ED, 0x00000000}, -+ {0xA0000000, 0x00000000}, -+ {0x0ED, 0x00008000}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000000}, -+ {0x03E, 0x00008000}, -+ {0x03F, 0x000E1333}, -+ {0x033, 0x00000001}, -+ {0x03E, 0x00008000}, -+ {0x03F, 0x000E7333}, -+ {0x033, 0x00000002}, -+ {0x03E, 0x00008000}, -+ {0x03F, 0x000FA000}, -+ {0x033, 0x00000003}, -+ {0x03E, 0x00004000}, -+ {0x03F, 0x000FA400}, -+ {0x033, 0x00000004}, -+ {0x03E, 0x00004000}, -+ {0x03F, 0x000F5000}, -+ {0x033, 0x00000005}, -+ {0x03E, 0x00004001}, -+ {0x03F, 0x00029400}, -+ {0x033, 0x00000006}, -+ {0x03E, 0x0000AAA1}, -+ {0x03F, 0x00041999}, -+ {0x033, 0x00000007}, -+ {0x03E, 0x0000AAA1}, -+ {0x03F, 0x00034444}, -+ {0x033, 0x00000008}, -+ {0x03E, 0x0000AAA1}, -+ {0x03F, 0x0004D555}, -+ {0x033, 0x00000009}, -+ {0x03E, 0x00005551}, -+ {0x03F, 0x00046AAA}, -+ {0x033, 0x0000000A}, -+ {0x03E, 0x00005551}, -+ {0x03F, 0x00046AAA}, -+ {0x033, 0x0000000B}, -+ {0x03E, 0x00005551}, -+ {0x03F, 0x0008C555}, -+ {0x033, 0x0000000C}, -+ {0x03E, 0x0000CCC1}, -+ {0x03F, 0x00081EB8}, -+ {0x033, 0x0000000D}, -+ {0x03E, 0x0000CCC1}, -+ {0x03F, 0x00071EB8}, -+ {0x033, 0x0000000E}, -+ {0x03E, 0x0000CCC1}, -+ {0x03F, 0x00090000}, -+ {0x033, 0x0000000F}, -+ {0x03E, 0x00006661}, -+ {0x03F, 0x00088000}, -+ {0x033, 0x00000010}, -+ {0x03E, 0x00006661}, -+ {0x03F, 0x00088000}, -+ {0x033, 0x00000011}, -+ {0x03E, 0x00006661}, -+ {0x03F, 0x000DB999}, -+ {0x0ED, 0x00000000}, -+ {0x0ED, 0x00002000}, -+ {0x033, 0x00000002}, -+ {0x03D, 0x0004A883}, -+ {0x03E, 0x00000000}, -+ {0x03F, 0x00000001}, -+ {0x033, 0x00000006}, -+ {0x03D, 0x0004A883}, -+ {0x03E, 0x00000000}, -+ {0x03F, 0x00000001}, -+ {0x0ED, 0x00000000}, -+ {0x018, 0x00001001}, -+ {0x002, 0x0000000D}, -+ {0x0EE, 0x00000004}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x033, 0x0000000B}, -+ {0x03F, 0x0000000B}, -+ {0x033, 0x0000000C}, -+ {0x03F, 0x00000012}, -+ {0x033, 0x0000000D}, -+ {0x03F, 0x00000019}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x033, 0x0000000B}, -+ {0x03F, 0x0000000B}, -+ {0x033, 0x0000000C}, -+ {0x03F, 0x00000012}, -+ {0x033, 0x0000000D}, -+ {0x03F, 0x00000019}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x033, 0x0000000B}, -+ {0x03F, 0x0000000B}, -+ {0x033, 0x0000000C}, -+ {0x03F, 0x00000012}, -+ {0x033, 0x0000000D}, -+ {0x03F, 0x00000019}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x033, 0x0000000B}, -+ {0x03F, 0x0000000B}, -+ {0x033, 0x0000000C}, -+ {0x03F, 0x00000012}, -+ {0x033, 0x0000000D}, -+ {0x03F, 0x00000019}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x033, 0x0000000B}, -+ {0x03F, 0x0000000A}, -+ {0x033, 0x0000000C}, -+ {0x03F, 0x00000011}, -+ {0x033, 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{0x40000000, 0x00000000}, -+ {0x03F, 0x00014B00}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00000B00}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000001}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001A00}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001A00}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001A00}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001A00}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001A00}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001A00}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001A00}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004A00}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004A00}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004A00}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004A00}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001A00}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001A00}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001A00}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001A00}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001A00}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001A00}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004A00}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004A00}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004A00}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004A00}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00001A00}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000000}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00002900}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00002900}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00002900}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00002900}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00002900}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00002900}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00002900}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004900}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004900}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004900}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004900}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00002900}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00002900}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00002900}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00002900}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00002900}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00002900}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004900}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004900}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004900}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004900}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00002900}, -+ {0xB0000000, 0x00000000}, -+ {0x0EF, 0x00000000}, -+ {0x0EF, 0x00001000}, -+ {0x033, 0x00000000}, -+ {0x03F, 0x00000015}, -+ {0x033, 0x00000001}, -+ {0x03F, 0x00000017}, -+ {0x0EF, 0x00000000}, -+ {0x0EF, 0x00008000}, -+ {0x033, 0x00000000}, -+ {0x03F, 0x000FECFC}, -+ {0x033, 0x00000001}, -+ {0x03F, 0x000BECFC}, -+ {0x033, 0x00000002}, -+ {0x03F, 0x0003E4FC}, -+ {0x033, 0x00000003}, -+ {0x03F, 0x0001D0FC}, -+ {0x033, 0x00000004}, -+ {0x03F, 0x0001C3FC}, -+ {0x033, 0x00000005}, -+ {0x03F, 0x000103FC}, -+ {0x033, 0x00000006}, -+ {0x03F, 0x0000007C}, -+ {0x033, 0x00000007}, -+ {0x03F, 0x0000007C}, -+ {0x033, 0x00000008}, -+ {0x03F, 0x000FECFC}, -+ {0x033, 0x00000009}, -+ {0x03F, 0x000BECFC}, -+ {0x033, 0x0000000A}, -+ {0x03F, 0x0003E4FC}, -+ {0x033, 0x0000000B}, -+ {0x03F, 0x0001D0FC}, -+ {0x033, 0x0000000C}, -+ {0x03F, 0x0001C3FC}, -+ {0x033, 0x0000000D}, -+ {0x03F, 0x000103FC}, -+ {0x033, 0x0000000E}, -+ {0x03F, 0x0000007C}, -+ {0x033, 0x0000000F}, -+ {0x03F, 0x0000007C}, -+ {0x033, 0x00000010}, -+ {0x03F, 0x000FECFC}, -+ {0x033, 0x00000011}, -+ {0x03F, 0x000BECFC}, -+ {0x033, 0x00000012}, -+ {0x03F, 0x0003E4FC}, -+ {0x033, 0x00000013}, -+ {0x03F, 0x0001D0FC}, -+ {0x033, 0x00000014}, -+ {0x03F, 0x0001C3FC}, -+ {0x033, 0x00000015}, -+ {0x03F, 0x000103FC}, -+ {0x033, 0x00000016}, -+ {0x03F, 0x0000007C}, -+ {0x033, 0x00000017}, -+ {0x03F, 0x0000007C}, -+ {0x0EF, 0x00000000}, -+ {0x0EF, 0x00000100}, -+ {0x033, 0x00000000}, -+ {0x03F, 0x00003317}, -+ {0x033, 0x00000001}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000002}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000003}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000004}, -+ {0x03F, 0x00003317}, -+ {0x033, 0x00000005}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000006}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000007}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000008}, -+ {0x03F, 0x00003317}, -+ {0x033, 0x00000009}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000A}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000D}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000E}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000F}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000010}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000011}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000012}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000013}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000014}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000015}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000016}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000017}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000018}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000019}, -+ {0x03F, 0x00003338}, -+ {0x033, 0x0000001A}, -+ {0x03F, 0x00003338}, -+ {0x033, 0x0000001B}, -+ {0x03F, 0x00003338}, -+ {0x033, 0x0000001C}, -+ {0x03F, 0x00003338}, -+ {0x033, 0x0000001D}, -+ {0x03F, 0x00003338}, -+ {0x033, 0x0000001E}, -+ {0x03F, 0x00003338}, -+ {0x033, 0x0000001F}, -+ {0x03F, 0x00003338}, -+ {0x033, 0x00000020}, -+ {0x03F, 0x00003338}, -+ {0x033, 0x00000021}, -+ {0x03F, 0x00003338}, -+ {0x033, 0x00000022}, -+ {0x03F, 0x00003338}, -+ {0x033, 0x00000023}, -+ {0x03F, 0x00003338}, -+ {0x033, 0x00000024}, -+ {0x03F, 0x00003338}, -+ {0x033, 0x00000025}, -+ {0x03F, 0x00003338}, -+ {0x033, 0x00000026}, -+ {0x03F, 0x00003338}, -+ {0x033, 0x00000027}, -+ {0x03F, 0x00003338}, -+ {0x033, 0x00000028}, -+ {0x03F, 0x00003338}, -+ {0x033, 0x00000029}, -+ {0x03F, 0x00003338}, -+ {0x033, 0x0000002A}, -+ {0x03F, 0x00003338}, -+ {0x033, 0x0000002B}, -+ {0x03F, 0x00003338}, -+ {0x033, 0x0000002C}, -+ {0x03F, 0x00003338}, -+ {0x033, 0x0000002D}, -+ {0x03F, 0x00003338}, -+ {0x033, 0x0000002E}, -+ {0x03F, 0x00003338}, -+ {0x033, 0x0000002F}, -+ {0x03F, 0x00003338}, -+ {0x033, 0x00000030}, -+ {0x03F, 0x00003338}, -+ {0x0EF, 0x00000000}, -+ {0x0EF, 0x00000040}, -+ {0x033, 0x00000001}, -+ {0x03F, 0x000004BA}, -+ {0x033, 0x00000002}, -+ {0x03F, 0x000004BA}, -+ {0x033, 0x00000003}, -+ {0x03F, 0x000004BA}, -+ {0x033, 0x00000004}, -+ {0x03F, 0x000004BA}, -+ {0x033, 0x00000005}, -+ {0x03F, 0x000004BA}, -+ {0x033, 0x00000006}, -+ {0x03F, 0x000004BA}, -+ {0x033, 0x00000007}, -+ {0x03F, 0x000004BA}, -+ {0x033, 0x00000008}, -+ {0x03F, 0x000004BA}, -+ {0x033, 0x00000009}, -+ {0x03F, 0x000004BA}, -+ {0x033, 0x0000000A}, -+ {0x03F, 0x000004BA}, -+ {0x033, 0x0000000B}, -+ {0x03F, 0x000004BA}, -+ {0x0EF, 0x00000000}, -+ {0x0EF, 0x00000010}, -+ {0x033, 0x00000001}, -+ {0x03F, 0x00000CB0}, -+ {0x033, 0x00000002}, -+ {0x03F, 0x00000CB0}, -+ {0x033, 0x00000003}, -+ {0x03F, 0x00000870}, -+ {0x033, 0x00000004}, -+ {0x03F, 0x00000870}, -+ {0x033, 0x00000005}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000430}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000730}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000730}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000430}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000430}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000430}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000430}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000430}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000430}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000430}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000430}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000730}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000730}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000430}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000430}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000430}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000430}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000430}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000430}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000430}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000430}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00000430}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000006}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000430}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000730}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000730}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000430}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000430}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000430}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000430}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000430}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000430}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000430}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000430}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000730}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000730}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000430}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000430}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000430}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000430}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000430}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000430}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000430}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000430}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00000430}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000007}, -+ {0x03F, 0x00000CB0}, -+ {0x033, 0x00000008}, -+ {0x03F, 0x00000CB0}, -+ {0x033, 0x00000009}, -+ {0x03F, 0x00000870}, -+ {0x033, 0x0000000A}, -+ {0x03F, 0x00000870}, -+ {0x033, 0x0000000B}, -+ {0x03F, 0x00000430}, -+ {0x033, 0x0000000C}, -+ {0x03F, 0x00000430}, -+ {0x033, 0x0000000D}, -+ {0x03F, 0x00000000}, -+ {0x033, 0x0000000E}, -+ {0x03F, 0x00000000}, -+ {0x0EF, 0x00000000}, -+ {0x0EF, 0x00000080}, -+ {0x033, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023458}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023858}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023858}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023858}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023858}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023858}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023858}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023858}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023858}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00023458}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000001}, -+ {0x03E, 0x0000000B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023458}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023858}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023858}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023858}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023858}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023858}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023858}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023858}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023858}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00023458}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000002}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00023458}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002F358}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00023858}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00023858}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00023858}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00023858}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002F358}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00023858}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00023858}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00023858}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00023858}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00023458}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000003}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00023458}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025758}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025758}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025758}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00023858}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00023858}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00023858}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00023858}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025758}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025758}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025758}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025758}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025758}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00023858}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00023858}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00023858}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00023858}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00023458}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000004}, -+ {0x03E, 0x0000000B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023458}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023858}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023858}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023858}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023858}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023858}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023858}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023858}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023858}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00023458}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000005}, -+ {0x03E, 0x0000000B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023458}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023858}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023858}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023858}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023858}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023858}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023858}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023858}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023858}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00023458}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000006}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00023458}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00023858}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00023858}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00023858}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00023858}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00023858}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00023858}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00023858}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00023858}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00023458}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000007}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00023458}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025758}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025758}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025758}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00023858}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00023858}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00023858}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00023858}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025758}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025758}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025758}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025758}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025758}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00023858}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00023858}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00023858}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00023858}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00023458}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000008}, -+ {0x03E, 0x0000000B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023458}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023858}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023858}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023858}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023858}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023858}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023858}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023858}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023858}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00023458}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000009}, -+ {0x03E, 0x0000000B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002E358}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023858}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023858}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023858}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023858}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023858}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023858}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023858}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023858}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0002E358}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000A}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002E358}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00023858}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00023858}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00023858}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00023858}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00023858}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00023858}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00023858}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00023858}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002E358}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002E358}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025758}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025758}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025758}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00023858}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00023858}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00023858}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00023858}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025758}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025758}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025758}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025758}, -+ {0x90260002, 0x00000000}, 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-+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002E358}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000014}, -+ {0x03E, 0x0000000B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002E358}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002E758}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002E758}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002E758}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, 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-+ {0x03F, 0x0002E358}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002E758}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002E758}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002E758}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002E758}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023758}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002E758}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002E758}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002E758}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002E758}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0002E358}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000016}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002E358}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ 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0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002E758}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002E758}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002E758}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002E758}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002E358}, -+ {0xB0000000, 0x00000000}, -+ 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0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002E758}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002E758}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025758}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025758}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025758}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025758}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025758}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002E758}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002E758}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002E758}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002E758}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002E358}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000018}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F258}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00026658}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00026658}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00026658}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00026658}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00026658}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00026658}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002E758}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002E758}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002E758}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002E758}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00026658}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00026658}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00026658}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00026658}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00026658}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00026658}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002E758}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002E758}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002E758}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002E758}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F258}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000019}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F258}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00026658}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00026658}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00026658}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00026658}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00026658}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00026658}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002E758}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002E758}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002E758}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002E758}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00026658}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00026658}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00026658}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00026658}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00026658}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x00026658}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002E758}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002E758}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002E758}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002E758}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F258}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000001A}, -+ {0x80010000, 0x00000000}, {0x40000000, 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-+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F258}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000021}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F258}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F258}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000022}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002E258}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002E258}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000023}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F258}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00027758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00027758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00027758}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00027758}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00027758}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00027758}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00027758}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00027758}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00027758}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00027758}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F258}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000024}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F258}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F258}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000025}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F258}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F258}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000026}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F258}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90030001, 0x00000000}, {0x40000000, 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0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002E658}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002E658}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002E658}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002E658}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002E658}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002E658}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002E658}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002E658}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002E658}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000002E}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000002F}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00027758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00027758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00027758}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00027758}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00027758}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00027758}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00027758}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00027758}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00027758}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00027758}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000030}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000031}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000032}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000033}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00027758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00027758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00027758}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00027758}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00027758}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00027758}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00027758}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00027758}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00027758}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00027758}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000034}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000035}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000036}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000037}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00027758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00027758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00027758}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00027758}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00027758}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00027758}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00027758}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00027758}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00027758}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00027758}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000038}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000039}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90250002, 0x00000000}, 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0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90010002, 0x00000000}, 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0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00027758}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00027758}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00027758}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00027758}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00027758}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C758}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000E}, -+ {0x03F, 0x0002F658}, -+ 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0x00000000}, -+ {0x03F, 0x000001F6}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A3}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A3}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A3}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A3}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F6}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F6}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F6}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F6}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F6}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F6}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A3}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A3}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A3}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A3}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001F9}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000001}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F6}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A0}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A0}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A0}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A0}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A0}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A0}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A0}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A0}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001F6}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000002}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F0}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F0}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F0}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F0}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F0}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F0}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000067}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000067}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000067}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000067}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F0}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F0}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F0}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F0}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F0}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F0}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000067}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000067}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000067}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000067}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000003}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F0}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001ED}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, 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{0x40000000, 0x00000000}, -+ {0x03F, 0x000001ED}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001ED}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000064}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000064}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000064}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000064}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001F0}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000004}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001ED}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001EA}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001EA}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001EA}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001EA}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, 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0x00000000}, -+ {0x03F, 0x00000163}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000163}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000163}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000058}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000058}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000058}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000058}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001A7}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000008}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E8}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E4}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E4}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E4}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E4}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E4}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E4}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000055}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000055}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000055}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000055}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E4}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E4}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E4}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E4}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E4}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E4}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000055}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000055}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000055}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000055}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000000E8}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000009}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E5}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E1}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E1}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E1}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E1}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E1}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E1}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, 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{0x40000000, 0x00000000}, -+ {0x03F, 0x00000052}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000000E5}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000A}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000068}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000064}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000064}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000064}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000064}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000064}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000064}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004F}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004F}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004F}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, 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0x00000000}, -+ {0x03F, 0x00000061}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000061}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000061}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000061}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004C}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004C}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004C}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004C}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00000065}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000062}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005E}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005E}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 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0x00000000}, -+ {0x03F, 0x00000055}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000055}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000055}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000055}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000055}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004C}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004C}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004C}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004C}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00000059}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000010}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000056}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000052}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 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{0x40000000, 0x00000000}, -+ {0x03F, 0x000000E0}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E0}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E0}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001F9}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000012}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F6}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F2}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F2}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000006D}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000006D}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F0}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000DD}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, 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{0x40000000, 0x00000000}, -+ {0x03F, 0x000000DD}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001F6}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000024}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001ED}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001ED}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F0}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000006A}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000006A}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001ED}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000063}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000063}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000063}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, 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0x00000000}, -+ {0x03F, 0x000001A7}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E0}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001A7}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000004D}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A4}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A4}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A4}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 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0x00000000}, -+ {0x03F, 0x000001F0}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000006C}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000006C}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E7}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001F0}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000005A}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001ED}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001ED}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001ED}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 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0x00000000}, -+ {0x03F, 0x000001A7}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A7}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E0}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001A7}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000005E}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A4}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A4}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 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{0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0000006C}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000060}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000069}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000069}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000069}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000069}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000057}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000057}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, 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0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005A}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00000063}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000063}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 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0x00000000}, -+ {0x03F, 0x000001FC}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000078}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000078}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E0}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E0}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E0}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E0}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001FC}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000067}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F9}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F9}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F9}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F9}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000075}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000075}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F0}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000DD}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000DD}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000DD}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000DD}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F9}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F9}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F9}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000075}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000075}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F0}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000DD}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000DD}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000DD}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000DD}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001F9}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000068}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F6}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F6}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F6}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F6}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000072}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000072}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, 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{0x40000000, 0x00000000}, -+ {0x03F, 0x00000063}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000063}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001F6}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000069}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000006F}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000006F}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001EA}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, 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{0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0000006C}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000071}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000069}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000069}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000069}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000069}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000057}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000057}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, 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{0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00000069}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000072}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000066}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000066}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000066}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000066}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000054}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000054}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, 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-+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000063}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000063}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000063}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005A}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000063}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000063}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000063}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005A}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00000063}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000074}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004E}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004E}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000057}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004E}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004E}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000057}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000075}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004B}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004B}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000054}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004B}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004B}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000054}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000076}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005A}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005A}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005A}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005A}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000048}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000048}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005A}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005A}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005A}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000048}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000048}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0000005A}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000077}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FC}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FC}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FC}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FC}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000078}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000078}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E0}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E0}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E0}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E0}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FC}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FC}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FC}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000078}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000078}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E0}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E0}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E0}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E0}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001FC}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000078}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F9}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F9}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F9}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F9}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000075}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000075}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F0}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000DD}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000DD}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000DD}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000DD}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F9}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F9}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F9}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000075}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000075}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F0}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000DD}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000DD}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000DD}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000DD}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001F9}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000079}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F6}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F6}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F6}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F6}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000072}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000072}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001ED}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000063}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000063}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000063}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000063}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F6}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F6}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F6}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000072}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000072}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001ED}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000063}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000063}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000063}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000063}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001F6}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000007A}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000006F}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000006F}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001EA}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, 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-+ {0x03F, 0x000001F3}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000007B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F0}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F0}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F0}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F0}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000006C}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000006C}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E7}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, 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0x00000000}, -+ {0x03F, 0x00000069}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000069}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E4}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005A}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005A}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005A}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005A}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001ED}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000007D}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001AC}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001AC}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001AC}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001AC}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 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{0x40000000, 0x00000000}, -+ {0x03F, 0x00000054}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001AA}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000007F}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A7}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A7}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A7}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A7}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E0}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, 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0x00000000}, -+ {0x03F, 0x000001A4}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000DD}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001A4}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000081}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000006C}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000006C}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000006C}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 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{0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00000069}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000083}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000066}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000066}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000066}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000066}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000054}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000054}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, 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-+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000063}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000063}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000063}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000063}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005A}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000063}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000063}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000063}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005A}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00000063}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000085}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004E}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004E}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000057}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004E}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004E}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000057}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000086}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004B}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004B}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000054}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004B}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004B}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000054}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000087}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005A}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005A}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005A}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005A}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000048}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000048}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005A}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005A}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005A}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000048}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000048}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0000005A}, -+ {0xB0000000, 0x00000000}, -+ {0x0EE, 0x00000000}, -+ {0x0EE, 0x00004000}, -+ {0x033, 0x00000000}, -+ {0x03F, 0x00003BEF}, -+ {0x033, 0x00000001}, -+ {0x03F, 0x00003BE9}, -+ {0x033, 0x00000002}, -+ {0x03F, 0x00003BE3}, -+ {0x033, 0x00000003}, -+ {0x03F, 0x00003BDD}, -+ {0x033, 0x00000004}, -+ {0x03F, 0x00003BD7}, -+ {0x033, 0x00000005}, -+ {0x03F, 0x00003BD1}, -+ {0x033, 0x00000006}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BD9}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003BCB}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003BCB}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003BCB}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003BCB}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003BCB}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003BCB}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BD7}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BD7}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BD7}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BD7}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003BCB}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003BCB}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003BCB}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003BCB}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003BCB}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003BCB}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BD7}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BD7}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BD7}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BD7}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00001BD9}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000007}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BD3}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BD3}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BD3}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BD3}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BD3}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BD3}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BD3}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BD1}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BD1}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BD1}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BD1}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BD3}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BD3}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BD3}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BD3}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BD3}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BD3}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BD1}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BD1}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BD1}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BD1}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00001BD3}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000008}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000BD9}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BCD}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BCD}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BCD}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BCD}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BCD}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BCD}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000BD7}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000BD7}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000BD7}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000BD7}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BCD}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BCD}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BCD}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BCD}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BCD}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BCD}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000BD7}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000BD7}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000BD7}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000BD7}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00000BD9}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000009}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000BD3}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000BD3}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000BD3}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, 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{0x40000000, 0x00000000}, -+ {0x03F, 0x00000BD3}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000BD1}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000BD1}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000BD1}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000BD1}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00000BD3}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000A}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D9}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000BCD}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000BCD}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000BCD}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000BCD}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000BCD}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, 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{0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000032}, -+ {0x03F, 0x0000084D}, -+ {0x033, 0x00000033}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000034}, -+ {0x03F, 0x0000080D}, -+ {0x033, 0x00000035}, -+ {0x03F, 0x00000807}, -+ {0x033, 0x00000036}, -+ {0x03F, 0x000039EE}, -+ {0x033, 0x00000037}, -+ {0x03F, 0x000039E8}, -+ {0x033, 0x00000038}, -+ {0x03F, 0x000039E2}, -+ {0x033, 0x00000039}, -+ {0x03F, 0x000039DC}, -+ {0x033, 0x0000003A}, -+ {0x03F, 0x000039D6}, -+ {0x033, 0x0000003B}, -+ {0x03F, 0x000039D0}, -+ {0x033, 0x0000003C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D8}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CA}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CA}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CA}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CA}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CA}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CA}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CA}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CA}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CA}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CA}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CA}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CA}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CA}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CA}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CA}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CA}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CA}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CA}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CA}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CA}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000019D8}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000003D}, -+ {0x03F, 0x000019D2}, -+ {0x033, 0x0000003E}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D8}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000009D8}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000003F}, -+ {0x03F, 0x000009D2}, -+ {0x033, 0x00000040}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008D9}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009CC}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009CC}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009CC}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009CD}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009CD}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009CC}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009CD}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009CD}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009CD}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009CD}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009CC}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009CC}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009CC}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009CD}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009CD}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009CC}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009CD}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009CD}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009CD}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009CD}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000008D9}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000041}, -+ {0x03F, 0x000008D3}, -+ {0x033, 0x00000042}, -+ {0x03F, 0x000008CD}, -+ {0x033, 0x00000043}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000044}, -+ {0x03F, 0x0000084D}, -+ {0x033, 0x00000045}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000046}, -+ {0x03F, 0x0000080D}, -+ {0x033, 0x00000047}, -+ {0x03F, 0x00000807}, -+ {0x033, 0x00000048}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EE}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EE}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EE}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EE}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000049}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E8}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E8}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E8}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E8}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000004A}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E2}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E2}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E2}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E2}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000004B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DC}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DC}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DC}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DC}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000004C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D6}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D6}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D6}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D6}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000004D}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D0}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D0}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D0}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D0}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000004E}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CA}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CA}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CA}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CA}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000004F}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D2}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D2}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D2}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D2}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000050}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000051}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, 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0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D2}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D2}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000052}, -+ {0x03F, 0x000009CD}, -+ {0x033, 0x00000053}, -+ {0x03F, 0x000008D3}, -+ {0x033, 0x00000054}, -+ {0x03F, 0x000008CD}, -+ {0x033, 0x00000055}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ 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0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000063}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D2}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D2}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 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{0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000064}, -+ {0x03F, 0x000009CD}, -+ {0x033, 0x00000065}, -+ {0x03F, 0x000008D3}, -+ {0x033, 0x00000066}, -+ {0x03F, 0x000008CD}, -+ {0x033, 0x00000067}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 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{0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000068}, -+ {0x03F, 0x0000084D}, -+ {0x033, 0x00000069}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ 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{0x03F, 0x000039EF}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EE}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EE}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000006D}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ 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0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000006F}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DC}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DC}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 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{0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000070}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D6}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D6}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, 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0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D0}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D0}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000072}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 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{0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000074}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000075}, 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0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D2}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D2}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000076}, -+ {0x03F, 0x000009CD}, -+ {0x033, 0x00000077}, -+ {0x03F, 0x000008D3}, -+ {0x033, 0x00000078}, -+ {0x03F, 0x000008CD}, -+ {0x033, 0x00000079}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000007A}, -+ {0x03F, 0x0000084D}, -+ {0x033, 0x0000007B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000007C}, -+ {0x03F, 0x0000080D}, -+ {0x033, 0x0000007D}, -+ {0x03F, 0x00000807}, -+ {0x033, 0x0000007E}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EE}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EE}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EE}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EE}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000007F}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E8}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E8}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E8}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E8}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000080}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E2}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E2}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E2}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E2}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000081}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DC}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DC}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DC}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DC}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000082}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D6}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D6}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D6}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D6}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000083}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D0}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D0}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D0}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D0}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000084}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CA}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CA}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, 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{0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000009}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, 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-+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000D}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000E}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000F}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000010}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000011}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, 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-+ {0x03F, 0x000001FF}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000012}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, 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0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000014}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 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{0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000016}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, 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0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000018}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 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{0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000019}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, 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{0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000001A}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, 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0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000001C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 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{0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000001E}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000001F}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, 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0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000021}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000022}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000017F}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, 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{0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0000017F}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000023}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000017F}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, 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0x00000000}, -+ {0x03F, 0x0000013F}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000013F}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000013F}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000013F}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000013F}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000000FF}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000029}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000013F}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000013F}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000013F}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000013F}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000013F}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000013F}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000013F}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000013F}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000013F}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000013F}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000013F}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000013F}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000000FF}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000002A}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000013F}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000013F}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000013F}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000013F}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, 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{0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000000FF}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000002B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000013F}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000013F}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000013F}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000013F}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000013F}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000013F}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, 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-+ {0x03F, 0x000000FF}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000002C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000013F}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000013F}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000013F}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000013F}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000013F}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000013F}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, 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0x00000000}, -+ {0x03F, 0x0000013F}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000013F}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000013F}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000000FF}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000002E}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000002F}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, 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{0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000030}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, 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0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000032}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000033}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, 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{0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000034}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, 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{0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000038}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, 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0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000003B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 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{0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000003C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000003D}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000003E}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000003F}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0xB0000000, 0x00000000}, -+ {0x0EF, 0x00000000}, -+ {0x0EF, 0x00000200}, -+ {0x033, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000001}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000002}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000003}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000004}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000005}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000006}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000007}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000008}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000009}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x0000000A}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x0000000B}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x0000000C}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x0000000D}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x0000000E}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x0000000F}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000010}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000011}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000012}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000013}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000014}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000015}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000016}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000017}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000018}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000019}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x0000001A}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x0000001B}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x0000001C}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x0000001D}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x0000001E}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x0000001F}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000020}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000021}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000022}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000023}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000024}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000025}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000026}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000027}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000028}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000000FF}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000029}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000000FF}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000002A}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000000FF}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000002B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000000FF}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000002C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, 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0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000000FF}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000002D}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 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0x000000FF}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000002E}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003B}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003B}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000002F}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ 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0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000031}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003B}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003B}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000032}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003B}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, 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-+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003B}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003B}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000003D}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003B}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003B}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000003E}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003B}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003B}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000003F}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003B}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003B}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0xB0000000, 0x00000000}, -+ {0x0EF, 0x00000000}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06E, 0x00077A7C}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06E, 0x00077A7C}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06E, 0x00077A7C}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06E, 0x00077A7C}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06E, 0x00077A7C}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06E, 0x00077A7C}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06E, 0x00077A7C}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06E, 0x00067A7C}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06E, 0x00067A7C}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06E, 0x00067A7C}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06E, 0x00067A7C}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06E, 0x00077A7C}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06E, 0x00077A7C}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06E, 0x00077A7C}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06E, 0x00077A7C}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06E, 0x00077A7C}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06E, 0x00077A7C}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06E, 0x00067A7C}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06E, 0x00067A7C}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06E, 0x00067A7C}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06E, 0x00067A7C}, -+ {0xA0000000, 0x00000000}, -+ {0x06E, 0x00077A7C}, -+ {0xB0000000, 0x00000000}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06F, 0x00077A7C}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06F, 0x00077A7C}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06F, 0x00077A7C}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06F, 0x00077A7C}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06F, 0x00077A7C}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06F, 0x00077A7C}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06F, 0x00077A7C}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06F, 0x00067A7C}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06F, 0x00067A7C}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06F, 0x00067A7C}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06F, 0x00067A7C}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06F, 0x00077A7C}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06F, 0x00077A7C}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06F, 0x00077A7C}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06F, 0x00077A7C}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06F, 0x00077A7C}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06F, 0x00077A7C}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06F, 0x00067A7C}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06F, 0x00067A7C}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06F, 0x00067A7C}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06F, 0x00067A7C}, -+ {0xA0000000, 0x00000000}, -+ {0x06F, 0x00077A7C}, -+ {0xB0000000, 0x00000000}, -+ {0x06D, 0x00000C31}, -+ {0x0EF, 0x00020000}, -+ {0x033, 0x00000000}, -+ {0x03F, 0x000005FF}, -+ {0x0EF, 0x00000000}, -+ {0x005, 0x00000001}, -+ {0x0EF, 0x00080000}, -+ {0x033, 0x00000001}, -+ {0x03E, 0x00000001}, -+ {0x03F, 0x00022020}, -+ {0x0EF, 0x00000000}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x087, 0x00000427}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x087, 0x00000427}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x087, 0x00000427}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x087, 0x00000427}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x087, 0x00000427}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x087, 0x00000427}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x087, 0x0000042F}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x087, 0x0000042F}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x087, 0x0000042F}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x087, 0x0000042F}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x087, 0x0000042F}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x087, 0x00000427}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x087, 0x00000427}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x087, 0x00000427}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x087, 0x00000427}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x087, 0x00000427}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x087, 0x0000042F}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x087, 0x0000042F}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x087, 0x0000042F}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x087, 0x0000042F}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x087, 0x0000042F}, -+ {0xA0000000, 0x00000000}, -+ {0x087, 0x00000427}, -+ {0xB0000000, 0x00000000}, -+ {0x002, 0x00000000}, -+ {0x067, 0x00000052}, -+ -+}; -+ -+static const struct rtw89_reg2_def rtw89_8852a_phy_radiob_regs[] = { -+ {0xF0010000, 0x00000000}, -+ {0xF0010001, 0x00000001}, -+ {0xF0020001, 0x00000002}, -+ {0xF0030001, 0x00000003}, -+ {0xF0250001, 0x00000004}, -+ {0xF0260001, 0x00000005}, -+ {0xF0320001, 0x00000006}, -+ {0xF0330001, 0x00000007}, -+ {0xF0340001, 0x00000008}, -+ {0xF0350001, 0x00000009}, -+ {0xF0360001, 0x0000000A}, -+ {0xF0010002, 0x0000000B}, -+ {0xF0020002, 0x0000000C}, -+ {0xF0030002, 0x0000000D}, -+ {0xF0250002, 0x0000000E}, -+ {0xF0260002, 0x0000000F}, -+ {0xF0320002, 0x00000010}, -+ {0xF0330002, 0x00000011}, -+ {0xF0340002, 0x00000012}, -+ {0xF0350002, 0x00000013}, -+ {0xF0360002, 0x00000014}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x005, 0x00000001}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x005, 0x00000000}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x005, 0x00000000}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x005, 0x00000000}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x005, 0x00000000}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x005, 0x00000000}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x005, 0x00000000}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x005, 0x00000000}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x005, 0x00000000}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x005, 0x00000000}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x005, 0x00000000}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x005, 0x00000000}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x005, 0x00000000}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x005, 0x00000000}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x005, 0x00000000}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x005, 0x00000000}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x005, 0x00000000}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x005, 0x00000000}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x005, 0x00000000}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x005, 0x00000000}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x005, 0x00000000}, -+ {0xA0000000, 0x00000000}, -+ {0x005, 0x00000001}, -+ {0xB0000000, 0x00000000}, -+ {0x000, 0x00030000}, -+ {0x018, 0x00011124}, -+ {0x000, 0x00033C00}, -+ {0x01A, 0x00040004}, -+ {0x0FE, 0x00000000}, -+ {0x055, 0x00080000}, -+ {0x056, 0x0008FFF0}, -+ {0x057, 0x0000C485}, -+ {0x058, 0x000A4164}, -+ {0x059, 0x00010000}, -+ {0x05A, 0x00060000}, -+ {0x05B, 0x0000A000}, -+ {0x05C, 0x00000000}, -+ {0x05D, 0x0001C013}, -+ {0x05E, 0x00000000}, -+ {0x05F, 0x00001FF0}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x060, 0x00011000}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x060, 0x00011008}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x060, 0x00011008}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x060, 0x00011008}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x060, 0x00011008}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x060, 0x00011008}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x060, 0x00011008}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x060, 0x00011008}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x060, 0x00011008}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x060, 0x00011008}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x060, 0x00011008}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x060, 0x00011008}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x060, 0x00011008}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x060, 0x00011008}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x060, 0x00011008}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x060, 0x00011008}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x060, 0x00011008}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x060, 0x00011008}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x060, 0x00011008}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x060, 0x00011008}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x060, 0x00011008}, -+ {0xA0000000, 0x00000000}, -+ {0x060, 0x00011000}, -+ {0xB0000000, 0x00000000}, -+ {0x061, 0x0009F338}, -+ {0x062, 0x0009233A}, -+ {0x063, 0x000D6002}, -+ {0x064, 0x000A0CB0}, -+ {0x065, 0x00030EFE}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x066, 0x00010000}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x066, 0x00010000}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x066, 0x00010000}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x066, 0x00010000}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x066, 0x00020000}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x066, 0x00020000}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x066, 0x00010000}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x066, 0x00020000}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x066, 0x00020000}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x066, 0x00020000}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x066, 0x00020000}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x066, 0x00010000}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x066, 0x00010000}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x066, 0x00010000}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x066, 0x00020000}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x066, 0x00020000}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x066, 0x00010000}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x066, 0x00020000}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x066, 0x00020000}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x066, 0x00020000}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x066, 0x00020000}, -+ {0xA0000000, 0x00000000}, -+ {0x066, 0x00010000}, -+ {0xB0000000, 0x00000000}, -+ {0x068, 0x00000000}, -+ {0x069, 0x00030F0A}, -+ {0x06A, 0x00000000}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x051, 0x000AD6A4}, -+ {0x052, 0x00091345}, -+ {0x053, 0x00080081}, -+ {0x054, 0x0007BC24}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x051, 0x000BD267}, -+ {0x052, 0x00091345}, -+ {0x053, 0x000B0081}, -+ {0x054, 0x0007BCA4}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x051, 0x000BD267}, -+ {0x052, 0x00091345}, -+ {0x053, 0x000B0081}, -+ {0x054, 0x0007BCA4}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x051, 0x000BD267}, -+ {0x052, 0x00091345}, -+ {0x053, 0x000B0081}, -+ {0x054, 0x0007BCA4}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x051, 0x000BD267}, -+ {0x052, 0x00091345}, -+ {0x053, 0x000B0081}, -+ {0x054, 0x0007BCA4}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x051, 0x000BD267}, -+ {0x052, 0x00091345}, -+ {0x053, 0x000B0081}, -+ {0x054, 0x0007BCA4}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x051, 0x000BD267}, -+ {0x052, 0x00091345}, -+ {0x053, 0x000B0081}, -+ {0x054, 0x0007BCA4}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x051, 0x000BD267}, -+ {0x052, 0x00091345}, -+ {0x053, 0x000B0081}, -+ {0x054, 0x0007BCA4}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x051, 0x000BD267}, -+ {0x052, 0x00091345}, -+ {0x053, 0x000B0081}, -+ {0x054, 0x0007BCA4}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x051, 0x000BD267}, -+ {0x052, 0x00091345}, -+ {0x053, 0x000B0081}, -+ {0x054, 0x0007BCA4}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x051, 0x000BD267}, -+ {0x052, 0x00091345}, -+ {0x053, 0x000B0081}, -+ {0x054, 0x0007BCA4}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x051, 0x000BD267}, -+ {0x052, 0x00091345}, -+ {0x053, 0x000B0081}, -+ {0x054, 0x0007BCA4}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x051, 0x000BD267}, -+ {0x052, 0x00091345}, -+ {0x053, 0x000B0081}, -+ {0x054, 0x0007BCA4}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x051, 0x000BD267}, -+ {0x052, 0x00091345}, -+ {0x053, 0x000B0081}, -+ {0x054, 0x0007BCA4}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x051, 0x000BD267}, -+ {0x052, 0x00091345}, -+ {0x053, 0x000B0081}, -+ {0x054, 0x0007BCA4}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x051, 0x000BD267}, -+ {0x052, 0x00091345}, -+ {0x053, 0x000B0081}, -+ {0x054, 0x0007BCA4}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x051, 0x000BD267}, -+ {0x052, 0x00091345}, -+ {0x053, 0x000B0081}, -+ {0x054, 0x0007BCA4}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x051, 0x000BD267}, -+ {0x052, 0x00091345}, -+ {0x053, 0x000B0081}, -+ {0x054, 0x0007BCA4}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x051, 0x000BD267}, -+ {0x052, 0x00091345}, -+ {0x053, 0x000B0081}, -+ {0x054, 0x0007BCA4}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x051, 0x000BD267}, -+ {0x052, 0x00091345}, -+ {0x053, 0x000B0081}, -+ {0x054, 0x0007BCA4}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x051, 0x000BD267}, -+ {0x052, 0x00091345}, -+ {0x053, 0x000B0081}, -+ {0x054, 0x0007BCA4}, -+ {0xA0000000, 0x00000000}, -+ {0x051, 0x000AD6A4}, -+ {0x052, 0x00091345}, -+ {0x053, 0x00080081}, -+ {0x054, 0x0007BC24}, -+ {0xB0000000, 0x00000000}, -+ {0x0D3, 0x00000143}, -+ {0x043, 0x00005000}, -+ {0x0DD, 0x000003A0}, -+ {0x0B0, 0x000E6700}, -+ {0x0AF, 0x0001F82E}, -+ {0x0B2, 0x000210A7}, -+ {0x0B1, 0x00065FFF}, -+ {0x0BB, 0x000F7A00}, -+ {0x0B3, 0x00013F7A}, -+ {0x0D4, 0x0000000E}, -+ {0x0B7, 0x00001E0C}, -+ {0x0A0, 0x0000004F}, -+ {0x0B4, 0x0007C03E}, -+ {0x0B5, 0x0007E301}, -+ {0x0B6, 0x00080800}, -+ {0x0CA, 0x00002000}, -+ {0x0DD, 0x000003A0}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0CC, 0x00080000}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0CC, 0x000E0000}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0CC, 0x000E0000}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0CC, 0x000E0000}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0CC, 0x000E0000}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0CC, 0x000E0000}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0CC, 0x000E0000}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0CC, 0x000E0000}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0CC, 0x000E0000}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0CC, 0x000E0000}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0CC, 0x000E0000}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0CC, 0x000E0000}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0CC, 0x000E0000}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0CC, 0x000E0000}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0CC, 0x000E0000}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0CC, 0x000E0000}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0CC, 0x000E0000}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0CC, 0x000E0000}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0CC, 0x000E0000}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0CC, 0x000E0000}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0CC, 0x000E0000}, -+ {0xA0000000, 0x00000000}, -+ {0x0CC, 0x00080000}, -+ {0xB0000000, 0x00000000}, -+ {0x0A1, 0x0006F300}, -+ {0x0A2, 0x00080500}, -+ {0x0A3, 0x0008050B}, -+ {0x0A4, 0x0006DB12}, -+ {0x0A5, 0x00000000}, -+ {0x0A6, 0x00000000}, -+ {0x0A7, 0x00000000}, -+ {0x0A8, 0x00000000}, -+ {0x0A9, 0x00000000}, -+ {0x0AA, 0x00000000}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0A5, 0x000B0000}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0A5, 0x00000000}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0A5, 0x00000000}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0A5, 0x00000000}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0A5, 0x00000000}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0A5, 0x00000000}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0A5, 0x00000000}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0A5, 0x00000000}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0A5, 0x00000000}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0A5, 0x00000000}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0A5, 0x00000000}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0A5, 0x00000000}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0A5, 0x00000000}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0A5, 0x00000000}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0A5, 0x00000000}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0A5, 0x00000000}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0A5, 0x00000000}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0A5, 0x00000000}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0A5, 0x00000000}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0A5, 0x00000000}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0A5, 0x00000000}, -+ {0xA0000000, 0x00000000}, -+ {0x0A5, 0x000B0000}, -+ {0xB0000000, 0x00000000}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0ED, 0x00008000}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0ED, 0x00000000}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0ED, 0x00000000}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0ED, 0x00000000}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0ED, 0x00000000}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0ED, 0x00000000}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0ED, 0x00000000}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0ED, 0x00000000}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0ED, 0x00000000}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0ED, 0x00000000}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0ED, 0x00000000}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0ED, 0x00000000}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0ED, 0x00000000}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0ED, 0x00000000}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0ED, 0x00000000}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0ED, 0x00000000}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0ED, 0x00000000}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0ED, 0x00000000}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0ED, 0x00000000}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0ED, 0x00000000}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0ED, 0x00000000}, -+ {0xA0000000, 0x00000000}, -+ {0x0ED, 0x00008000}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000000}, -+ {0x03E, 0x00008000}, -+ {0x03F, 0x000E1333}, -+ {0x033, 0x00000001}, -+ {0x03E, 0x00008000}, -+ {0x03F, 0x000E7333}, -+ {0x033, 0x00000002}, -+ {0x03E, 0x00008000}, -+ {0x03F, 0x000FA000}, -+ {0x033, 0x00000003}, -+ {0x03E, 0x00004000}, -+ {0x03F, 0x000FA400}, -+ {0x033, 0x00000004}, -+ {0x03E, 0x00004000}, -+ {0x03F, 0x000F5000}, -+ {0x033, 0x00000005}, -+ {0x03E, 0x00004001}, -+ {0x03F, 0x00029400}, -+ {0x033, 0x00000006}, -+ {0x03E, 0x0000AAA1}, -+ {0x03F, 0x00041999}, -+ {0x033, 0x00000007}, -+ {0x03E, 0x0000AAA1}, -+ {0x03F, 0x00034444}, -+ {0x033, 0x00000008}, -+ {0x03E, 0x0000AAA1}, -+ {0x03F, 0x0004D555}, -+ {0x033, 0x00000009}, -+ {0x03E, 0x00005551}, -+ {0x03F, 0x00046AAA}, -+ {0x033, 0x0000000A}, -+ {0x03E, 0x00005551}, -+ {0x03F, 0x00046AAA}, -+ {0x033, 0x0000000B}, -+ {0x03E, 0x00005551}, -+ {0x03F, 0x0008C555}, -+ {0x033, 0x0000000C}, -+ {0x03E, 0x0000CCC1}, -+ {0x03F, 0x00081EB8}, -+ {0x033, 0x0000000D}, -+ {0x03E, 0x0000CCC1}, -+ {0x03F, 0x00071EB8}, -+ {0x033, 0x0000000E}, -+ {0x03E, 0x0000CCC1}, -+ {0x03F, 0x00090000}, -+ {0x033, 0x0000000F}, -+ {0x03E, 0x00006661}, -+ {0x03F, 0x00088000}, -+ {0x033, 0x00000010}, -+ {0x03E, 0x00006661}, -+ {0x03F, 0x00088000}, -+ {0x033, 0x00000011}, -+ {0x03E, 0x00006661}, -+ {0x03F, 0x000DB999}, -+ {0x0ED, 0x00000000}, -+ {0x0ED, 0x00002000}, -+ {0x033, 0x00000002}, -+ {0x03D, 0x0004A883}, -+ {0x03E, 0x00000000}, -+ {0x03F, 0x00000001}, -+ {0x033, 0x00000006}, -+ {0x03D, 0x0004A883}, -+ {0x03E, 0x00000000}, -+ {0x03F, 0x00000001}, -+ {0x0ED, 0x00000000}, -+ {0x018, 0x00001001}, -+ {0x002, 0x0000000D}, -+ {0x0EE, 0x00000004}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x033, 0x0000000B}, -+ {0x03F, 0x0000000B}, -+ {0x033, 0x0000000C}, -+ {0x03F, 0x00000012}, -+ {0x033, 0x0000000D}, -+ {0x03F, 0x00000019}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x033, 0x0000000B}, -+ {0x03F, 0x0000000B}, -+ {0x033, 0x0000000C}, -+ {0x03F, 0x00000012}, -+ {0x033, 0x0000000D}, -+ {0x03F, 0x00000019}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x033, 0x0000000B}, -+ {0x03F, 0x0000000B}, -+ {0x033, 0x0000000C}, -+ {0x03F, 0x00000012}, -+ {0x033, 0x0000000D}, -+ {0x03F, 0x00000019}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x033, 0x0000000B}, -+ {0x03F, 0x0000000B}, -+ {0x033, 0x0000000C}, -+ {0x03F, 0x00000012}, -+ {0x033, 0x0000000D}, -+ {0x03F, 0x00000019}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x033, 0x0000000B}, -+ {0x03F, 0x0000000A}, -+ {0x033, 0x0000000C}, -+ {0x03F, 0x00000011}, -+ {0x033, 0x0000000D}, -+ {0x03F, 0x00000018}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x033, 0x0000000B}, -+ {0x03F, 0x0000000A}, -+ {0x033, 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0x00000000}, -+ {0x03F, 0x00001A00}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001A00}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001A00}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001A00}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001A00}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004A00}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004A00}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004A00}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004A00}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00001A00}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000000}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00002900}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00002900}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00002900}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00002900}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00002900}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00002900}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00002900}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004900}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004900}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004900}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004900}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00002900}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00002900}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00002900}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00002900}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00002900}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00002900}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004900}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004900}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004900}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004900}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00002900}, -+ {0xB0000000, 0x00000000}, -+ {0x0EF, 0x00000000}, -+ {0x0EF, 0x00001000}, -+ {0x033, 0x00000000}, -+ {0x03F, 0x00000015}, -+ {0x033, 0x00000001}, -+ {0x03F, 0x00000017}, -+ {0x033, 0x00000002}, -+ {0x03F, 0x00000015}, -+ {0x033, 0x00000003}, -+ {0x03F, 0x00000017}, -+ {0x0EF, 0x00000000}, -+ {0x0EF, 0x00008000}, -+ {0x033, 0x00000000}, -+ {0x03F, 0x000FECFC}, -+ {0x033, 0x00000001}, -+ {0x03F, 0x000BECFC}, -+ {0x033, 0x00000002}, -+ {0x03F, 0x0003E4FC}, -+ {0x033, 0x00000003}, -+ {0x03F, 0x0001D0FC}, -+ {0x033, 0x00000004}, -+ {0x03F, 0x0001C3FC}, -+ {0x033, 0x00000005}, -+ {0x03F, 0x000103FC}, -+ {0x033, 0x00000006}, -+ {0x03F, 0x0000007C}, -+ {0x033, 0x00000007}, -+ {0x03F, 0x0000007C}, -+ {0x033, 0x00000008}, -+ {0x03F, 0x000FECFC}, -+ {0x033, 0x00000009}, -+ {0x03F, 0x000BECFC}, -+ {0x033, 0x0000000A}, -+ {0x03F, 0x0003E4FC}, -+ {0x033, 0x0000000B}, -+ {0x03F, 0x0001D0FC}, -+ {0x033, 0x0000000C}, -+ {0x03F, 0x0001C3FC}, -+ {0x033, 0x0000000D}, -+ {0x03F, 0x000103FC}, -+ {0x033, 0x0000000E}, -+ {0x03F, 0x0000007C}, -+ {0x033, 0x0000000F}, -+ {0x03F, 0x0000007C}, -+ {0x033, 0x00000010}, -+ {0x03F, 0x000FECFC}, -+ {0x033, 0x00000011}, -+ {0x03F, 0x000BECFC}, -+ {0x033, 0x00000012}, -+ {0x03F, 0x0003E4FC}, -+ {0x033, 0x00000013}, -+ {0x03F, 0x0001D0FC}, -+ {0x033, 0x00000014}, -+ {0x03F, 0x0001C3FC}, -+ {0x033, 0x00000015}, -+ {0x03F, 0x000103FC}, -+ {0x033, 0x00000016}, -+ {0x03F, 0x0000007C}, -+ {0x033, 0x00000017}, -+ {0x03F, 0x0000007C}, -+ {0x0EF, 0x00000000}, -+ {0x0EF, 0x00000100}, -+ {0x033, 0x00000000}, -+ {0x03F, 0x00003317}, -+ {0x033, 0x00000001}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000002}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000003}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000004}, -+ {0x03F, 0x00003317}, -+ {0x033, 0x00000005}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000006}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000007}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000008}, -+ {0x03F, 0x00003317}, -+ {0x033, 0x00000009}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000A}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000D}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000E}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000F}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000010}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000011}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000012}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00003336}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000013}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00003338}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000014}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000015}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000016}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000017}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000018}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003337}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00003356}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000019}, -+ {0x03F, 0x00003338}, -+ {0x033, 0x0000001A}, -+ {0x03F, 0x00003338}, -+ {0x033, 0x0000001B}, -+ {0x03F, 0x00003338}, -+ {0x033, 0x0000001C}, -+ {0x03F, 0x00003338}, -+ {0x033, 0x0000001D}, -+ {0x03F, 0x00003338}, -+ {0x033, 0x0000001E}, -+ {0x03F, 0x00003338}, -+ {0x033, 0x0000001F}, -+ {0x03F, 0x00003338}, -+ {0x033, 0x00000020}, -+ {0x03F, 0x00003338}, -+ {0x033, 0x00000021}, -+ {0x03F, 0x00003338}, -+ {0x033, 0x00000022}, -+ {0x03F, 0x00003338}, -+ {0x033, 0x00000023}, -+ {0x03F, 0x00003338}, -+ {0x033, 0x00000024}, -+ {0x03F, 0x00003338}, -+ {0x033, 0x00000025}, -+ {0x03F, 0x00003338}, -+ {0x033, 0x00000026}, -+ {0x03F, 0x00003338}, -+ {0x033, 0x00000027}, -+ {0x03F, 0x00003338}, -+ {0x033, 0x00000028}, -+ {0x03F, 0x00003338}, -+ {0x033, 0x00000029}, -+ {0x03F, 0x00003338}, -+ {0x033, 0x0000002A}, -+ {0x03F, 0x00003338}, -+ {0x033, 0x0000002B}, -+ {0x03F, 0x00003338}, -+ {0x033, 0x0000002C}, -+ {0x03F, 0x00003338}, -+ {0x033, 0x0000002D}, -+ {0x03F, 0x00003338}, -+ {0x033, 0x0000002E}, -+ {0x03F, 0x00003338}, -+ {0x033, 0x0000002F}, -+ {0x03F, 0x00003338}, -+ {0x033, 0x00000030}, -+ {0x03F, 0x00003338}, -+ {0x0EF, 0x00000000}, -+ {0x0EF, 0x00000040}, -+ {0x033, 0x00000001}, -+ {0x03F, 0x000004BA}, -+ {0x033, 0x00000002}, -+ {0x03F, 0x000004BA}, -+ {0x033, 0x00000003}, -+ {0x03F, 0x000004BA}, -+ {0x033, 0x00000004}, -+ {0x03F, 0x000004BA}, -+ {0x033, 0x00000005}, -+ {0x03F, 0x000004BA}, -+ {0x033, 0x00000006}, -+ {0x03F, 0x000004BA}, -+ {0x033, 0x00000007}, -+ {0x03F, 0x000004BA}, -+ {0x033, 0x00000008}, -+ {0x03F, 0x000004BA}, -+ {0x033, 0x00000009}, -+ {0x03F, 0x000004BA}, -+ {0x033, 0x0000000A}, -+ {0x03F, 0x000004BA}, -+ {0x033, 0x0000000B}, -+ {0x03F, 0x000004BA}, -+ {0x0EF, 0x00000000}, -+ {0x0EF, 0x00000010}, -+ {0x033, 0x00000001}, -+ {0x03F, 0x00000CB0}, -+ {0x033, 0x00000002}, -+ {0x03F, 0x00000CB0}, -+ {0x033, 0x00000003}, -+ {0x03F, 0x00000870}, -+ {0x033, 0x00000004}, -+ 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{0x40000000, 0x00000000}, -+ {0x03F, 0x00000730}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000430}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000430}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000430}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000430}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000430}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000430}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000430}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000430}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000730}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000730}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000430}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000430}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000430}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000430}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000430}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000430}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000430}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000430}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00000430}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000007}, -+ {0x03F, 0x00000CB0}, -+ {0x033, 0x00000008}, -+ {0x03F, 0x00000CB0}, -+ {0x033, 0x00000009}, -+ {0x03F, 0x00000870}, -+ {0x033, 0x0000000A}, -+ {0x03F, 0x00000870}, -+ {0x033, 0x0000000B}, -+ {0x03F, 0x00000430}, -+ {0x033, 0x0000000C}, -+ {0x03F, 0x00000430}, -+ {0x033, 0x0000000D}, -+ {0x03F, 0x00000000}, -+ {0x033, 0x0000000E}, -+ {0x03F, 0x00000000}, -+ {0x0EF, 0x00000000}, -+ {0x0EF, 0x00000080}, -+ {0x033, 0x00000000}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C258}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036458}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036458}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C258}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000001}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C258}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036458}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036458}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C258}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000002}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C258}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002F258}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002F258}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C258}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000003}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C258}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C258}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000004}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C258}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036458}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036458}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C258}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000005}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C258}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036458}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036458}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C258}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000006}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C258}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C258}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000007}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C258}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C258}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000008}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C258}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036458}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036458}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C258}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000009}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C358}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036458}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036658}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00036458}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C358}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000A}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C358}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C358}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C358}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0003C458}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C358}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C358}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026458}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026458}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C358}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000D}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C358}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026458}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026458}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C358}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000E}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C358}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C358}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000F}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C358}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C358}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000010}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C358}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026458}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026458}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C358}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000011}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C358}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026458}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026658}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00026458}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C358}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000012}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C358}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C358}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000013}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C358}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C358}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000014}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C358}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023558}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023558}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C358}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000015}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C358}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023558}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023558}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C358}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000016}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C358}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00028558}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C358}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000017}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C358}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C358}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000018}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F258}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023558}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023558}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F258}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000019}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F258}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023558}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023558}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F258}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000001A}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F258}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F258}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000001B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F258}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F258}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000001C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F258}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023558}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023558}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F258}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000001D}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F258}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023558}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C358}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C358}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C358}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C358}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023558}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C358}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C358}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C358}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C358}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F258}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000001E}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F258}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F258}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000001F}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F258}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0002C558}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F258}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000020}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F258}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023558}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023558}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F258}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000021}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F258}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023558}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023558}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F258}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000022}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F258}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F258}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000023}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F258}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F258}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000024}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F258}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023558}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023558}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F258}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000025}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F258}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023558}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023558}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F258}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000026}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F258}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F258}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000027}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F258}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F258}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000028}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F258}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023558}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023558}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F258}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000029}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F258}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023558}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023558}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F258}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000002A}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F258}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002F358}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002F358}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F258}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000002B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F258}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F258}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000002C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F258}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023558}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023558}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F258}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000002D}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023558}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023558}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000002E}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000002F}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000030}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023558}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023558}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000031}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023558}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023558}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000032}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000033}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000034}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023558}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023558}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000035}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023558}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023558}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000036}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000037}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000038}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023558}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023558}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000039}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023558}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023758}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00023558}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000003A}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00025558}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000003B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x00024558}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000C}, -+ {0x03F, 0x0002C558}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x03F, 0x0006F458}, -+ {0xB0000000, 0x00000000}, -+ {0x0EF, 0x00000000}, -+ {0x0EE, 0x00002000}, -+ {0x033, 0x00000000}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F9}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F6}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F6}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F6}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F6}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F6}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F6}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A3}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A3}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A3}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A3}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F6}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F6}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F6}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F6}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F6}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F6}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A3}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A3}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A3}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A3}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001F9}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000001}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F6}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A0}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A0}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A0}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A0}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A0}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A0}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A0}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A0}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001F6}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000002}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F0}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F0}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F0}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F0}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F0}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F0}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000067}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000067}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000067}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000067}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F0}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F0}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F0}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F0}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F0}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F0}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000067}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000067}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000067}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000067}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000003}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F0}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001ED}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001ED}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001ED}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001ED}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001ED}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001ED}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000064}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000064}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000064}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000064}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001ED}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001ED}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001ED}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001ED}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001ED}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001ED}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000064}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000064}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000064}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000064}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001F0}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000004}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001ED}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001EA}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001EA}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001EA}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001EA}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001EA}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001EA}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000061}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000061}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000061}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000061}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001EA}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001EA}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001EA}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001EA}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001EA}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001EA}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000061}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000061}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000061}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000061}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001ED}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000005}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001EA}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E7}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E7}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E7}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E7}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E7}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E7}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005E}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005E}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005E}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005E}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E7}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E7}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E7}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E7}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E7}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E7}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005E}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005E}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005E}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005E}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001EA}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000006}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001AA}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000166}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000166}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000166}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000166}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000166}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000166}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005B}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005B}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005B}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005B}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000166}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000166}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000166}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000166}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000166}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000166}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005B}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005B}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005B}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005B}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001AA}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000007}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A7}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000163}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000163}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000163}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000163}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000163}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000163}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000058}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000058}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000058}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000058}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000163}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000163}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000163}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000163}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000163}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000163}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000058}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000058}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000058}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000058}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001A7}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000008}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E8}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E4}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E4}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E4}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E4}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E4}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E4}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000055}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000055}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000055}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000055}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E4}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E4}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E4}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E4}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E4}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E4}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000055}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000055}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000055}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000055}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000000E8}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000009}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E5}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E1}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E1}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E1}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E1}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E1}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E1}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000052}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000052}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000052}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000052}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E1}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E1}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E1}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E1}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E1}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E1}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000052}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000052}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000052}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000052}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000000E5}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000A}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000068}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000064}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000064}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000064}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000064}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000064}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000064}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004F}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004F}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004F}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004F}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000064}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000064}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000064}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000064}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000064}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000064}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004F}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004F}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004F}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004F}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00000068}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000065}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000061}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000061}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000061}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000061}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000061}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000061}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004C}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004C}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004C}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004C}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000061}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000061}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000061}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000061}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000061}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000061}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004C}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004C}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004C}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004C}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00000065}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000062}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005E}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005E}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005E}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005E}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005E}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005E}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004C}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004C}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004C}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004C}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005E}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005E}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005E}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005E}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005E}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005E}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004C}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004C}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004C}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004C}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00000062}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000D}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005F}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005B}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005B}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005B}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005B}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005B}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005B}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004C}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004C}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004C}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004C}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005B}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005B}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005B}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005B}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005B}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005B}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004C}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004C}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004C}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004C}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0000005F}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000E}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005C}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000058}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000058}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000058}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000058}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000058}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000058}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004C}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, 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-+ {0x03F, 0x0000005C}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000F}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000059}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000055}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000055}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000055}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000055}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000055}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000055}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004C}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004C}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004C}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004C}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, 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0x00000000}, -+ {0x03F, 0x00000052}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000052}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000052}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004C}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004C}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004C}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004C}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00000056}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000011}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F9}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F5}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F5}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F6}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 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{0x40000000, 0x00000000}, -+ {0x03F, 0x000000DD}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001F6}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000013}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001EF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001EF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F0}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000006A}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000006A}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001ED}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000063}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000063}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000063}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, 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0x00000000}, -+ {0x03F, 0x000001ED}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000067}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000067}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001EA}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001F0}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000015}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001ED}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E9}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E9}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 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{0x40000000, 0x00000000}, -+ {0x03F, 0x000001E7}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001ED}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000016}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001EA}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E6}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E6}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E7}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000061}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000061}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, 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{0x40000000, 0x00000000}, -+ {0x03F, 0x0000005A}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005A}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001EA}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000017}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A9}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A5}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A5}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A6}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005E}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005E}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A3}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000057}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000057}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, 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0x00000000}, -+ {0x03F, 0x000001A2}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A3}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005B}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005B}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E3}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000054}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000054}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000054}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000054}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001A6}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000019}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E5}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E2}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E2}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E3}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000058}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000058}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E0}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E2}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E2}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E3}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000058}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000058}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E0}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000000E5}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000001A}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E2}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000DF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000DF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E0}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000055}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000055}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000DD}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000DF}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000DF}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E0}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000055}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000055}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000DD}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000000E2}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000001B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000DF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000DC}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000DC}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000DD}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000052}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000052}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000063}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000DC}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000DC}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000DD}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000052}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000052}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000063}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000000DF}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000001C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000065}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000062}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000062}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000063}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004F}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004F}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000062}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000062}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000063}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004F}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004F}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00000065}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000001D}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000062}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005F}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005F}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004C}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004C}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005F}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005F}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004C}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004C}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00000062}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000001E}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005F}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005C}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005C}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000049}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000049}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005A}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005C}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005C}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000049}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000049}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005A}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0000005F}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000001F}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005C}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000059}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000059}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005A}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000046}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000046}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000057}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, 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{0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0000005C}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000020}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000059}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000056}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000056}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000057}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000043}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000043}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000054}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, 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0x00000000}, -+ {0x03F, 0x00000054}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000040}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000040}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00000056}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000022}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F9}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 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{0x40000000, 0x00000000}, -+ {0x03F, 0x00000064}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E7}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001ED}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000027}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001EA}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E4}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E4}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E7}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000061}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, 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-+ {0x03F, 0x000001A9}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000029}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A6}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A0}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A0}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A3}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005B}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005B}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E3}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000054}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000054}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000054}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000054}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, 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0x00000000}, -+ {0x03F, 0x00000058}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000058}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E0}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000000E5}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000002B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E2}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000DD}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000DD}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E0}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000055}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000055}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000DD}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000DD}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000DD}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E0}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000055}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000055}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000DD}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000000E2}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000002C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000DF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000DA}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000DA}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000DD}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000052}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000052}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000063}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, 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{0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000000DF}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000002D}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000065}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000063}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004F}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004F}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, 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0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004C}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004C}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00000062}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000002F}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005F}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005A}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005A}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000049}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000049}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005A}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005A}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005A}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000049}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000049}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005A}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0000005F}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000030}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005C}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000057}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000057}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005A}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000046}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000046}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, 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0x00000000}, -+ {0x03F, 0x00000064}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000064}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E7}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001ED}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000038}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001EA}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E4}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E4}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E7}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 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{0x40000000, 0x00000000}, -+ {0x03F, 0x00000057}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001A9}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000003A}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A6}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A0}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A0}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A3}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005B}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005B}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E3}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000054}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000054}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000054}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, 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0x00000000}, -+ {0x03F, 0x000000E3}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000058}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000058}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E0}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000000E5}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000003C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E2}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000DD}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000DD}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E0}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000055}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000055}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000DD}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000DD}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000DD}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E0}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000055}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000055}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000DD}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000000E2}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000003D}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000DF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000DA}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000DA}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000DD}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000052}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000052}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, 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{0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000000DF}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000003E}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000065}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000063}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004F}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004F}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, 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-+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000062}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004C}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004C}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004C}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004C}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00000062}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000040}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005F}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005A}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005A}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000049}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000049}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005A}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005A}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005A}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000049}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000049}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005A}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0000005F}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000041}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005C}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000057}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000057}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005A}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000046}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, 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{0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0000005C}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000042}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000059}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000054}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000054}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000057}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000043}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000043}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000054}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, 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{0x40000000, 0x00000000}, -+ {0x03F, 0x00000063}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001F6}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000047}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000006F}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000006F}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001EA}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, 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0x00000000}, -+ {0x03F, 0x000001F0}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000006C}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000006C}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E7}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001F0}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000049}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001ED}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001ED}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001ED}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 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0x00000000}, -+ {0x03F, 0x000001A7}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A7}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E0}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001A7}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000004D}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A4}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A4}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 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{0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000DD}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001A4}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000004E}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000006C}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000006C}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000006C}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000006C}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005A}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005A}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000063}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000006C}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000006C}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000006C}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005A}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005A}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000063}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0000006C}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000004F}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000069}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000069}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000069}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000069}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000057}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000057}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, 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-+ {0x03F, 0x00000069}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000050}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000066}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000066}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000066}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000066}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000054}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000054}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, 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0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005A}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00000063}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000052}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004E}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004E}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000057}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004E}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004E}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000057}, -+ {0x90330002, 0x00000000}, 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0x00000000}, -+ {0x03F, 0x000001FC}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000078}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000078}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E0}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E0}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E0}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E0}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001FC}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000056}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F9}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F9}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F9}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 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0x00000000}, -+ {0x03F, 0x000001F0}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F0}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000006C}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000006C}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E7}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001F0}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000005A}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001ED}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001ED}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 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{0x40000000, 0x00000000}, -+ {0x03F, 0x00000057}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000057}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000057}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001AC}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000005C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001AA}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001AA}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001AA}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001AA}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000063}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000063}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E3}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000054}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, 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-+ {0x03F, 0x000001AA}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000005D}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A7}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A7}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A7}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A7}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E0}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, 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0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000DD}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001A4}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000005F}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000006C}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000006C}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000006C}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000006C}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005A}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005A}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000063}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000006C}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000006C}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000006C}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005A}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005A}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000063}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0000006C}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000060}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000069}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000069}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000069}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000069}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000057}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000057}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, 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{0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00000069}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000061}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000066}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000066}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000066}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000066}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000054}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000054}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, 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0x00000000}, -+ {0x03F, 0x00000063}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005A}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00000063}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000063}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004E}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004E}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000057}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004E}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004E}, -+ {0x90320002, 0x00000000}, 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0x00000000}, -+ {0x03F, 0x000001FC}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FC}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000078}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000078}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E0}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E0}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E0}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000E0}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001FC}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000067}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F9}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F9}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 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{0x40000000, 0x00000000}, -+ {0x03F, 0x00000063}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000063}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000063}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001F6}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000069}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000006F}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000006F}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001EA}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, 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{0x40000000, 0x00000000}, -+ {0x03F, 0x00000063}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000063}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000063}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000063}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001F6}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000007A}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000006F}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000006F}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001EA}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, 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{0x40000000, 0x00000000}, -+ {0x03F, 0x00000060}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001F3}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000007B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F0}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F0}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F0}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001F0}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000006C}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000006C}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E7}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, 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0x0000004B}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004B}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000054}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000005D}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004B}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000004B}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000054}, -+ {0x90330002, 0x00000000}, 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{0x40000000, 0x00000000}, -+ {0x03F, 0x00000051}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0000005A}, -+ {0xB0000000, 0x00000000}, -+ {0x0EE, 0x00000000}, -+ {0x0EE, 0x00004000}, -+ {0x033, 0x00000000}, -+ {0x03F, 0x00003BEF}, -+ {0x033, 0x00000001}, -+ {0x03F, 0x00003BE9}, -+ {0x033, 0x00000002}, -+ {0x03F, 0x00003BE3}, -+ {0x033, 0x00000003}, -+ {0x03F, 0x00003BDD}, -+ {0x033, 0x00000004}, -+ {0x03F, 0x00003BD7}, -+ {0x033, 0x00000005}, -+ {0x03F, 0x00003BD1}, -+ {0x033, 0x00000006}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BD9}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003BCB}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003BCB}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003BCB}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003BCB}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003BCB}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003BCB}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BD7}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BD7}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BD7}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BD7}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003BCB}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003BCB}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003BCB}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003BCB}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003BCB}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003BCB}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BD7}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BD7}, -+ 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{0x40000000, 0x00000000}, -+ {0x03F, 0x00001BD1}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BD1}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BD3}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BD3}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BD3}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BD3}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BD3}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BD3}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BD1}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BD1}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BD1}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BD1}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00001BD3}, -+ {0xB0000000, 0x00000000}, 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{0x40000000, 0x00000000}, -+ {0x03F, 0x00001BCD}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BCD}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BCD}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BCD}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001BCD}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000BD7}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000BD7}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000BD7}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000BD7}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00000BD9}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000009}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000BD3}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000BD3}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, 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{0x40000000, 0x00000000}, -+ {0x03F, 0x00000BD3}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000BD3}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000BD1}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000BD1}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000BD1}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000BD1}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00000BD3}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000A}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D9}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000BCD}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000BCD}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000BCD}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000BCD}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, 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{0x40000000, 0x00000000}, -+ {0x03F, 0x000009D7}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D7}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D7}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000009D9}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D1}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, 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{0x40000000, 0x00000000}, -+ {0x03F, 0x00000851}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000010}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000819}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000084D}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000084D}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000084D}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000084D}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000084D}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000084D}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000817}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000817}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000817}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, 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{0x40000000, 0x00000000}, -+ {0x03F, 0x000039CA}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CA}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CA}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CA}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CA}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CA}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CA}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CA}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000019D8}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000003D}, -+ {0x03F, 0x000019D2}, -+ {0x033, 0x0000003E}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D8}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000009D8}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000003F}, -+ {0x03F, 0x000009D2}, -+ {0x033, 0x00000040}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008D9}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009CC}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009CC}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009CC}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009CD}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009CD}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009CC}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009CD}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009CD}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009CD}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009CD}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009CC}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009CC}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009CC}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009CD}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009CD}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009CC}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009CD}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009CD}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009CD}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009CD}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000008D9}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000041}, -+ {0x03F, 0x000008D3}, -+ {0x033, 0x00000042}, -+ {0x03F, 0x000008CD}, -+ {0x033, 0x00000043}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000044}, -+ {0x03F, 0x0000084D}, -+ {0x033, 0x00000045}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000046}, -+ {0x03F, 0x0000080D}, -+ {0x033, 0x00000047}, -+ {0x03F, 0x00000807}, -+ {0x033, 0x00000048}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EE}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EE}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EE}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EE}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000049}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E8}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E8}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E8}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E8}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000004A}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E2}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E2}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E2}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E2}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000004B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DC}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DC}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DC}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DC}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000004C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D6}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D6}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D6}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D6}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000004D}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D0}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D0}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D0}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D0}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000004E}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CA}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CA}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CA}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CA}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000004F}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D2}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D2}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D2}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D2}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000050}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000051}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D2}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D2}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D2}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D2}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000052}, -+ {0x03F, 0x000009CD}, -+ {0x033, 0x00000053}, -+ {0x03F, 0x000008D3}, -+ {0x033, 0x00000054}, -+ {0x03F, 0x000008CD}, -+ {0x033, 0x00000055}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000056}, -+ {0x03F, 0x0000084D}, -+ {0x033, 0x00000057}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000058}, -+ {0x03F, 0x0000080D}, -+ {0x033, 0x00000059}, -+ {0x03F, 0x00000807}, -+ {0x033, 0x0000005A}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EE}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EE}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EE}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EE}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000005B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E8}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E8}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E8}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E8}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000039E9}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000005C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E2}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E2}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E2}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E2}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000039E3}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000005D}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DC}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DC}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DC}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DC}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000039DD}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000005E}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D6}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D6}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D6}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D6}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000039D7}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000005F}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D0}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D0}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D0}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D0}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000060}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CA}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CA}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CA}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CA}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000061}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D2}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D2}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D2}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D2}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000062}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 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-+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D0}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D0}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D0}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D0}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000039D1}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000072}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CA}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CA}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CA}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CA}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000039CB}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000073}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D2}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D2}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D2}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D2}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000019D3}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000074}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CC}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000019CD}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000075}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D2}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D2}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D2}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D2}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000009D3}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000076}, -+ {0x03F, 0x000009CD}, -+ {0x033, 0x00000077}, -+ {0x03F, 0x000008D3}, -+ {0x033, 0x00000078}, -+ {0x03F, 0x000008CD}, -+ {0x033, 0x00000079}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000008C7}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00000853}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000007A}, -+ {0x03F, 0x0000084D}, -+ {0x033, 0x0000007B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000847}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00000813}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000007C}, -+ {0x03F, 0x0000080D}, -+ {0x033, 0x0000007D}, -+ {0x03F, 0x00000807}, -+ {0x033, 0x0000007E}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EE}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EE}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EF}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EE}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000039EE}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 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{0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000004}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000005}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000006}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000007}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000008}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000009}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000A}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320002, 0x00000000}, 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{0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0000017F}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000023}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000017F}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, 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0x000000FB}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FB}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FA}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0xB0000000, 0x00000000}, -+ {0x0EF, 0x00000000}, -+ {0x0EF, 0x00000200}, -+ {0x033, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000001}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000002}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000003}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000004}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000005}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000006}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000007}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000008}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000009}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x0000000A}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x0000000B}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x0000000C}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x0000000D}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x0000000E}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x0000000F}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000010}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000011}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000012}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000013}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000014}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000015}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000016}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000017}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000018}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000019}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x0000001A}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x0000001B}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x0000001C}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x0000001D}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x0000001E}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x0000001F}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000020}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000021}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000022}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000023}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000024}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000025}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000026}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000027}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000028}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000000FF}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000029}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000000FF}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000002A}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000000FF}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000002B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000000FF}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000002C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x000000FF}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000002D}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000FF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 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-+ {0x03F, 0x0000003F}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003B}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000003F}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003B}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003B}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0000003F}, -+ {0xB0000000, 0x00000000}, -+ {0x0EF, 0x00000000}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06E, 0x00077A7C}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06E, 0x00077A7C}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06E, 0x00077A7C}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06E, 0x00077A7C}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06E, 0x00077A7C}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06E, 0x00077A7C}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06E, 0x00077A7C}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06E, 0x00067A7C}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06E, 0x00067A7C}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06E, 0x00067A7C}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06E, 0x00067A7C}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06E, 0x00077A7C}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06E, 0x00077A7C}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06E, 0x00077A7C}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06E, 0x00077A7C}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06E, 0x00077A7C}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06E, 0x00077A7C}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06E, 0x00067A7C}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06E, 0x00067A7C}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06E, 0x00067A7C}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06E, 0x00067A7C}, -+ {0xA0000000, 0x00000000}, -+ {0x06E, 0x00077A7C}, -+ {0xB0000000, 0x00000000}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06F, 0x00077A7C}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06F, 0x00077A7C}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06F, 0x00077A7C}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06F, 0x00077A7C}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06F, 0x00077A7C}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06F, 0x00077A7C}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06F, 0x00077A7C}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06F, 0x00067A7C}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06F, 0x00067A7C}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06F, 0x00067A7C}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06F, 0x00067A7C}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06F, 0x00077A7C}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06F, 0x00077A7C}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06F, 0x00077A7C}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06F, 0x00077A7C}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06F, 0x00077A7C}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06F, 0x00077A7C}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06F, 0x00067A7C}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06F, 0x00067A7C}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06F, 0x00067A7C}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06F, 0x00067A7C}, -+ {0xA0000000, 0x00000000}, -+ {0x06F, 0x00077A7C}, -+ {0xB0000000, 0x00000000}, -+ {0x06D, 0x00000C31}, -+ {0x0EF, 0x00020000}, -+ {0x033, 0x00000000}, -+ {0x03F, 0x000005FF}, -+ {0x0EF, 0x00000000}, -+ {0x0A0, 0x00000043}, -+ {0x005, 0x00000001}, -+ {0x0EF, 0x00080000}, -+ {0x033, 0x00000001}, -+ {0x03E, 0x00000001}, -+ {0x03F, 0x00022020}, -+ {0x0EF, 0x00000000}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x087, 0x00000427}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x087, 0x00000427}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x087, 0x00000427}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x087, 0x00000427}, -+ {0x90250001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x087, 0x00000427}, -+ {0x90260001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x087, 0x00000427}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x087, 0x0000042F}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x087, 0x0000042F}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x087, 0x0000042F}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x087, 0x0000042F}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x087, 0x0000042F}, -+ {0x90010002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x087, 0x00000427}, -+ {0x90020002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x087, 0x00000427}, -+ {0x90030002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x087, 0x00000427}, -+ {0x90250002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x087, 0x00000427}, -+ {0x90260002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x087, 0x00000427}, -+ {0x90320002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x087, 0x0000042F}, -+ {0x90330002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x087, 0x0000042F}, -+ {0x90340002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x087, 0x0000042F}, -+ {0x90350002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x087, 0x0000042F}, -+ {0x90360002, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x087, 0x0000042F}, -+ {0xA0000000, 0x00000000}, -+ {0x087, 0x00000427}, -+ {0xB0000000, 0x00000000}, -+ {0x002, 0x00000000}, -+ {0x067, 0x00000052}, -+ -+}; -+ -+static const struct rtw89_reg2_def rtw89_8852a_phy_nctl_regs[] = { -+ {0x8000, 0x00000008}, -+ {0x8008, 0x00000000}, -+ {0x8004, 0xf0862966}, -+ {0x800c, 0x78000000}, -+ {0x8010, 0x88015000}, -+ {0x8014, 0x80010100}, -+ {0x8018, 0x10010100}, -+ {0x801c, 0xa210bc00}, -+ {0x8020, 0x000403e0}, -+ {0x8024, 0x00072160}, -+ {0x8028, 0x00180e00}, -+ {0x8030, 0x400000c0}, -+ {0x8034, 0x56000800}, -+ {0x8038, 0x00000009}, -+ {0x803c, 0x00000008}, -+ {0x8040, 0x00000046}, -+ {0x8044, 0x0010001f}, -+ {0x8048, 0xf0000003}, -+ {0x804c, 0x62ac6162}, -+ {0x8050, 0xf2acf162}, -+ {0x8054, 0x62ac6162}, -+ {0x8058, 0xf2acf162}, -+ {0x805c, 0x150c0b02}, -+ {0x8060, 0x150c0b02}, -+ {0x8064, 0x2aa00047}, -+ {0x8074, 0x80000000}, -+ {0x807c, 0x000000ee}, -+ {0x8088, 0x80000000}, -+ {0x8098, 0x0000ff00}, -+ {0x809c, 0x0000001f}, -+ {0x80a0, 0x00010300}, -+ {0x80b0, 0x00000000}, -+ {0x80d0, 0x00000000}, -+ {0x8114, 0x00000000}, -+ {0x8120, 0x10010000}, -+ {0x8124, 0x00000000}, -+ {0x812c, 0x0000c000}, -+ {0x8138, 0x40000002}, -+ {0x813c, 0x40000002}, -+ {0x8140, 0x00000000}, -+ {0x8144, 0x0b040b03}, -+ {0x8148, 0x0b040b04}, -+ {0x814c, 0x0b040b03}, -+ {0x8150, 0x00000000}, -+ {0x8158, 0xffffffff}, -+ {0x815c, 0xffffffff}, -+ {0x8160, 0xffffffff}, -+ {0x8164, 0xffffffff}, -+ {0x8168, 0xffffffff}, -+ {0x816c, 0x1fffffff}, -+ {0x81ac, 0x003f1a00}, -+ {0x81b0, 0x003f1a00}, -+ {0x81bc, 0x005b5b5b}, -+ {0x81c0, 0x005b5b5b}, -+ {0x81b4, 0x00600060}, -+ {0x81b8, 0x00600060}, -+ {0x81cc, 0x00000000}, -+ {0x81dc, 0x00000002}, -+ {0x8214, 0x00000000}, -+ {0x8220, 0x10010000}, -+ {0x8224, 0x00000000}, -+ {0x822c, 0x0000d000}, -+ {0x8238, 0x40000002}, -+ {0x823c, 0x40000002}, -+ {0x8240, 0x00000000}, -+ {0x8244, 0x0b040b03}, -+ {0x8248, 0x0b040b03}, -+ {0x824c, 0x0b030b03}, -+ {0x8250, 0x00000000}, -+ {0x8258, 0xffffffff}, -+ {0x825c, 0xffffffff}, -+ {0x8260, 0xffffffff}, -+ {0x8264, 0xffffffff}, -+ {0x8268, 0xffffffff}, -+ {0x826c, 0x1fffffff}, -+ {0x82ac, 0x003f1a00}, -+ {0x82b0, 0x003f1a00}, -+ {0x82bc, 0x005b5b5b}, -+ {0x82c0, 0x005b5b5b}, -+ {0x82b4, 0x00600060}, -+ {0x82b8, 0x00600060}, -+ {0x82cc, 0x00000000}, -+ {0x82dc, 0x00000002}, -+ {0x81d8, 0x00000001}, -+ {0x82d8, 0x00000001}, -+ {0x8d00, 0x00000000}, -+ {0x8d04, 0x00000000}, -+ {0x8d08, 0x00000000}, -+ {0x8d0c, 0x00000000}, -+ {0x8d10, 0x00000000}, -+ {0x8d14, 0x00000000}, -+ {0x8d18, 0x00000000}, -+ {0x8d1c, 0x00000000}, -+ {0x8d20, 0x00000000}, -+ {0x8d24, 0x00000000}, -+ {0x8d28, 0x00000000}, -+ {0x8d2c, 0x00000000}, -+ {0x8d30, 0x00000000}, -+ {0x8d34, 0x00000000}, -+ {0x8d38, 0x00000000}, -+ {0x8d3c, 0x00000000}, -+ {0x8d40, 0x00000000}, -+ {0x8d44, 0x00000000}, -+ {0x8d48, 0x00000000}, -+ {0x8d4c, 0x00000000}, -+ {0x8d50, 0x00000000}, -+ {0x8d54, 0x00000000}, -+ {0x8d58, 0x00000000}, -+ {0x8d5c, 0x00000000}, -+ {0x8d60, 0x00000000}, -+ {0x8d64, 0x00000000}, -+ {0x8d68, 0x00000000}, -+ {0x8d6c, 0x00000000}, -+ {0x8d70, 0x00000000}, -+ {0x8d74, 0x00000000}, -+ {0x8d78, 0x00000000}, -+ {0x8d7c, 0x00000000}, -+ {0x8d80, 0x00000000}, -+ {0x8d84, 0x00000000}, -+ {0x8d88, 0x00000000}, -+ {0x8d8c, 0x00000000}, -+ {0x8d90, 0x00000000}, -+ {0x8d94, 0x00000000}, -+ {0x8d98, 0x00000000}, -+ {0x8d9c, 0x00000000}, -+ {0x8da0, 0x00000000}, -+ {0x8da4, 0x00000000}, -+ {0x8da8, 0x00000000}, -+ {0x8dac, 0x00000000}, -+ {0x8db0, 0x00000000}, -+ {0x8db4, 0x00000000}, -+ {0x8db8, 0x00000000}, -+ {0x8dbc, 0x00000000}, -+ {0x8dc0, 0x00000000}, -+ {0x8dc4, 0x00000000}, -+ {0x8dc8, 0x00000000}, -+ {0x8dcc, 0x00000000}, -+ {0x8dd0, 0x00000000}, -+ {0x8dd4, 0x00000000}, -+ {0x8dd8, 0x00000000}, -+ {0x8ddc, 0x00000000}, -+ {0x8de0, 0x00000000}, -+ {0x8de4, 0x00000000}, -+ {0x8de8, 0x00000000}, -+ {0x8dec, 0x00000000}, -+ {0x8df0, 0x00000000}, -+ {0x8df4, 0x00000000}, -+ {0x8df8, 0x00000000}, -+ {0x8dfc, 0x00000000}, -+ {0x8e00, 0x00000000}, -+ {0x8e04, 0x00000000}, -+ {0x8e08, 0x00000000}, -+ {0x8e0c, 0x00000000}, -+ {0x8e10, 0x00000000}, -+ {0x8e14, 0x00000000}, -+ {0x8e18, 0x00000000}, -+ {0x8e1c, 0x00000000}, -+ {0x8e20, 0x00000000}, -+ {0x8e24, 0x00000000}, -+ {0x8e28, 0x00000000}, -+ {0x8e2c, 0x00000000}, -+ {0x8e30, 0x00000000}, -+ {0x8e34, 0x00000000}, -+ {0x8e38, 0x00000000}, -+ {0x8e3c, 0x00000000}, -+ {0x8e40, 0x00000000}, -+ {0x8e44, 0x00000000}, -+ {0x8e48, 0x00000000}, -+ {0x8e4c, 0x00000000}, -+ {0x8e50, 0x00000000}, -+ {0x8e54, 0x00000000}, -+ {0x8e58, 0x00000000}, -+ {0x8e5c, 0x00000000}, -+ {0x8e60, 0x00000000}, -+ {0x8e64, 0x00000000}, -+ {0x8e68, 0x00000000}, -+ {0x8e6c, 0x00000000}, -+ {0x8e70, 0x00000000}, -+ {0x8e74, 0x00000000}, -+ {0x8e78, 0x00000000}, -+ {0x8e7c, 0x00000000}, -+ {0x8e80, 0x00000000}, -+ {0x8e84, 0x00000000}, -+ {0x8e88, 0x00000000}, -+ {0x8e8c, 0x00000000}, -+ {0x8e90, 0x00000000}, -+ {0x8e94, 0x00000000}, -+ {0x8e98, 0x00000000}, -+ {0x8e9c, 0x00000000}, -+ {0x8ea0, 0x00000000}, -+ {0x8ea4, 0x00000000}, -+ {0x8ea8, 0x00000000}, -+ {0x8eac, 0x00000000}, -+ {0x8eb0, 0x00000000}, -+ {0x8eb4, 0x00000000}, -+ {0x8eb8, 0x00000000}, -+ {0x8ebc, 0x00000000}, -+ {0x8ec0, 0x00000000}, -+ {0x8ec4, 0x00000000}, -+ {0x8ec8, 0x00000000}, -+ {0x8ecc, 0x00000000}, -+ {0x8ed0, 0x00000000}, -+ {0x8ed4, 0x00000000}, -+ {0x8ed8, 0x00000000}, -+ {0x8edc, 0x00000000}, -+ {0x8ee0, 0x00000000}, -+ {0x8ee4, 0x00000000}, -+ {0x8ee8, 0x00000000}, -+ {0x8eec, 0x00000000}, -+ {0x8ef0, 0x00000000}, -+ {0x8ef4, 0x00000000}, -+ {0x8ef8, 0x00000000}, -+ {0x8efc, 0x00000000}, -+ {0x8f00, 0x00000000}, -+ {0x8f04, 0x00000000}, -+ {0x8f08, 0x00000000}, -+ {0x8f0c, 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0xe312e32b}, -+ {0x8810, 0xfc86e365}, -+ {0x8814, 0x21e07410}, -+ {0x8818, 0x21e80017}, -+ {0x881c, 0x6e610017}, -+ {0x8820, 0xe312e32b}, -+ {0x8824, 0x7410e365}, -+ {0x8828, 0x001821e0}, -+ {0x882c, 0x001821e8}, -+ {0x8830, 0xe32b6e75}, -+ {0x8834, 0xe365e312}, -+ {0x8838, 0x21e07410}, -+ {0x883c, 0x21e80019}, -+ {0x8840, 0x6e890019}, -+ {0x8844, 0xe312e32b}, -+ {0x8848, 0x7410e365}, -+ {0x884c, 0x001a21e0}, -+ {0x8850, 0x001a21e8}, -+ {0x8854, 0xe32b6e99}, -+ {0x8858, 0xe365e312}, -+ {0x885c, 0xe287e330}, -+ {0x8860, 0x00040001}, -+ {0x8864, 0x0007775c}, -+ {0x8868, 0x62006220}, -+ {0x886c, 0x55010004}, -+ {0x8870, 0xe2d15b00}, -+ {0x8874, 0x66055b40}, -+ {0x8878, 0x62000007}, -+ {0x887c, 0xe3506300}, -+ {0x8880, 0xe2d10004}, -+ {0x8884, 0x0a010900}, -+ {0x8888, 0x0d000b40}, -+ {0x888c, 0x00320e01}, -+ {0x8890, 0x95060004}, -+ {0x8894, 0x00074380}, -+ {0x8898, 0x00044d01}, -+ {0x889c, 0x00074300}, -+ {0x88a0, 0x05a30562}, -+ {0x88a4, 0xe3509617}, -+ {0x88a8, 0xe2d10004}, -+ {0x88ac, 0x06a20007}, -+ {0x88b0, 0xe35007a3}, -+ {0x88b4, 0xe2d10004}, -+ {0x88b8, 0x0002e340}, -+ {0x88bc, 0x4380e348}, -+ {0x88c0, 0x4d000007}, -+ {0x88c4, 0x43000004}, -+ {0x88c8, 0x00017900}, -+ {0x88cc, 0x775e0004}, -+ {0x88d0, 0x000731b3}, -+ {0x88d4, 0x07a306a2}, -+ {0x88d8, 0xe29331dd}, -+ {0x88dc, 0x73000005}, -+ {0x88e0, 0xe2930001}, -+ {0x88e4, 0x5d000006}, -+ {0x88e8, 0x42f70004}, -+ {0x88ec, 0x6c000005}, -+ {0x88f0, 0x42000004}, -+ {0x88f4, 0x0004e2ab}, -+ {0x88f8, 0x00074380}, -+ {0x88fc, 0x4a004e00}, -+ {0x8900, 0x00064c00}, -+ {0x8904, 0x60007f00}, -+ {0x8908, 0x00046f00}, -+ {0x890c, 0x00054300}, -+ {0x8910, 0x00017300}, -+ {0x8914, 0xe2930001}, -+ {0x8918, 0x5d010006}, -+ {0x891c, 0x61006002}, -+ {0x8920, 0x00055601}, -+ {0x8924, 0xe2ab7710}, -+ {0x8928, 0x73000005}, -+ {0x892c, 0x43800004}, -+ {0x8930, 0x5e010007}, -+ {0x8934, 0x4d205e00}, -+ {0x8938, 0x4a084e20}, -+ {0x893c, 0x4c3f4960}, -+ {0x8940, 0x00064301}, -+ {0x8944, 0x63807f01}, -+ {0x8948, 0x00046010}, -+ {0x894c, 0x00064300}, -+ {0x8950, 0x00077402}, -+ {0x8954, 0x40004001}, -+ {0x8958, 0x0006ab00}, -+ {0x895c, 0x00077404}, -+ {0x8960, 0x40004001}, -+ {0x8964, 0x0004ab00}, -+ {0x8968, 0x00074380}, -+ {0x896c, 0x4e004d00}, -+ {0x8970, 0x4c004a00}, -+ {0x8974, 0x00064300}, -+ {0x8978, 0x63007f00}, -+ {0x897c, 0x6f006000}, -+ {0x8980, 0x43000004}, -+ {0x8984, 0x00040001}, -+ {0x8988, 0x42bf4380}, -+ {0x898c, 0x48400007}, -+ {0x8990, 0x42ef0004}, -+ {0x8994, 0x4d100007}, -+ {0x8998, 0x42000004}, -+ {0x899c, 0x5f800006}, -+ {0x89a0, 0x5a010007}, -+ {0x89a4, 0x00044a08}, -+ {0x89a8, 0x00054300}, -+ {0x89ac, 0x73807381}, -+ {0x89b0, 0x003f9300}, -+ {0x89b4, 0x00000000}, -+ {0x89b8, 0x00000000}, -+ {0x89bc, 0x00020000}, -+ {0x89c0, 0x5f800006}, -+ {0x89c4, 0x99005f00}, -+ {0x89c8, 0x43800004}, -+ {0x89cc, 0x00074280}, -+ {0x89d0, 0x00044800}, -+ {0x89d4, 0x000742ef}, -+ {0x89d8, 0x00044d00}, -+ {0x89dc, 0x00064200}, -+ {0x89e0, 0x60005f00}, -+ {0x89e4, 0x5a000007}, -+ {0x89e8, 0x48004a00}, -+ {0x89ec, 0x43000004}, -+ {0x89f0, 0x73000005}, -+ {0x89f4, 0x43800001}, -+ {0x89f8, 0x78006505}, -+ {0x89fc, 0x7a007900}, -+ {0x8a00, 0x43007b00}, -+ {0x8a04, 0x43800001}, -+ {0x8a08, 0x43006500}, -+ {0x8a0c, 0x43800001}, -+ {0x8a10, 0x7c006405}, -+ {0x8a14, 0x7e007d00}, -+ {0x8a18, 0x43007f00}, -+ {0x8a1c, 0x43800001}, -+ {0x8a20, 0x43006400}, -+ {0x8a24, 0x00060001}, -+ {0x8a28, 0x55025601}, -+ {0x8a2c, 0x00055400}, -+ {0x8a30, 0x7e127f00}, -+ {0x8a34, 0x76007710}, -+ {0x8a38, 0x74007500}, -+ {0x8a3c, 0x42700004}, -+ {0x8a40, 0x73810005}, -+ {0x8a44, 0x00047380}, -+ {0x8a48, 0x93004200}, -+ {0x8a4c, 0x77000005}, -+ {0x8a50, 0x56000006}, -+ {0x8a54, 0x00060001}, -+ {0x8a58, 0x5f005f80}, -+ {0x8a5c, 0x00059900}, -+ {0x8a60, 0x00067300}, -+ {0x8a64, 0x63006380}, -+ {0x8a68, 0x00019800}, -+ {0x8a6c, 0x7b484380}, -+ {0x8a70, 0x79007a90}, -+ {0x8a74, 0x43007802}, -+ {0x8a78, 0x32cd5503}, -+ {0x8a7c, 0x7b384380}, -+ {0x8a80, 0x79007a80}, -+ {0x8a84, 0x43007802}, -+ {0x8a88, 0x32cd5513}, -+ {0x8a8c, 0x7b404380}, -+ {0x8a90, 0x79007a00}, -+ {0x8a94, 0x43007802}, -+ {0x8a98, 0x74315523}, -+ {0x8a9c, 0x8e007430}, -+ {0x8aa0, 0x74010001}, -+ {0x8aa4, 0x8e007400}, -+ {0x8aa8, 0x74310001}, -+ {0x8aac, 0x8e007430}, -+ {0x8ab0, 0x57020001}, -+ {0x8ab4, 0x97005700}, -+ {0x8ab8, 0x42ef0001}, -+ {0x8abc, 0x56005610}, -+ {0x8ac0, 0x8c004200}, -+ {0x8ac4, 0x4f780001}, -+ {0x8ac8, 0x53884e00}, -+ {0x8acc, 0x5b205201}, -+ {0x8ad0, 0x5480e2f2}, -+ {0x8ad4, 0x54815400}, -+ {0x8ad8, 0x54825400}, -+ {0x8adc, 0xe2fd5400}, -+ {0x8ae0, 0x3012bf1d}, -+ {0x8ae4, 0xe2bee2b6}, -+ {0x8ae8, 0xe2d9e2c6}, -+ {0x8aec, 0x5523e359}, -+ {0x8af0, 0x5525e2cd}, -+ {0x8af4, 0xe359e2d9}, -+ {0x8af8, 0x54bf0001}, -+ {0x8afc, 0x54a354c0}, -+ {0x8b00, 0x54a454c1}, -+ {0x8b04, 0xbf074c18}, -+ {0x8b08, 0x54a454c2}, -+ {0x8b0c, 0x54c1bf04}, -+ {0x8b10, 0xbf0154a3}, -+ {0x8b14, 0x54dfe36a}, -+ {0x8b18, 0x54bf0001}, -+ {0x8b1c, 0x050a54e5}, -+ {0x8b20, 0x000154df}, -+ {0x8b24, 0x43807b80}, -+ {0x8b28, 0x7e007f40}, -+ {0x8b2c, 0x7c027d00}, -+ {0x8b30, 0x5b404300}, -+ {0x8b34, 0x5c015501}, -+ {0x8b38, 0x5480e2dd}, -+ {0x8b3c, 0x54815400}, -+ {0x8b40, 0x54825400}, -+ {0x8b44, 0x7b005400}, -+ {0x8b48, 0xbfe8e2fd}, -+ {0x8b4c, 0x56103012}, -+ {0x8b50, 0x8c005600}, -+ {0x8b54, 0xe36d0001}, -+ {0x8b58, 0xe36de36d}, -+ {0x8b5c, 0x0001e36d}, -+ {0x8b60, 0x57005704}, -+ {0x8b64, 0x57089700}, -+ {0x8b68, 0x97005700}, -+ {0x8b6c, 0x57805781}, -+ {0x8b70, 0x43809700}, -+ {0x8b74, 0x5c010007}, -+ {0x8b78, 0x00045c00}, -+ {0x8b7c, 0x00014300}, -+ {0x8b80, 0x0007427f}, -+ {0x8b84, 0x62006280}, -+ {0x8b88, 0x00049200}, -+ {0x8b8c, 0x00014200}, -+ {0x8b90, 0x0007427f}, -+ {0x8b94, 0x63146394}, -+ {0x8b98, 0x00049100}, -+ {0x8b9c, 0x00014200}, -+ {0x8ba0, 0x79010004}, -+ {0x8ba4, 0xe3757420}, -+ {0x8ba8, 0x57005710}, -+ {0x8bac, 0xe375e375}, -+ {0x8bb0, 0x549f0001}, -+ {0x8bb4, 0x5c015400}, -+ {0x8bb8, 0x540054df}, -+ {0x8bbc, 0x00015c02}, -+ {0x8bc0, 0x07145c01}, -+ {0x8bc4, 0x5c025400}, -+ {0x8bc8, 0x5c020001}, -+ {0x8bcc, 0x54000714}, -+ {0x8bd0, 0x00015c01}, -+ {0x8bd4, 0x4c184c98}, -+ {0x8bd8, 0x003f0001}, -+ {0x8bdc, 0x00000000}, -+ {0x8be0, 0x00000000}, -+ {0x8be4, 0x00020000}, -+ {0x8be8, 0x00000001}, -+ {0x8bec, 0x00000000}, -+ {0x8bf0, 0x00000000}, -+ {0x8bf4, 0x00000000}, -+ {0x8bf8, 0x00010000}, -+ {0x8bfc, 0x5c020004}, -+ {0x8c00, 0x66076204}, -+ {0x8c04, 0x743070c0}, -+ {0x8c08, 0x0c010901}, -+ {0x8c0c, 0x00010ba6}, -+ {0x8080, 0x00000004}, -+ {0x8080, 0x00000000}, -+ {0x8088, 0x00000000}, -+}; -+ -+static const struct rtw89_txpwr_byrate_cfg rtw89_8852a_txpwr_byrate[] = { -+ { 0, 0, 0, 0, 4, 0x50505050, }, -+ { 0, 0, 1, 0, 4, 0x50505050, }, -+ { 0, 0, 1, 4, 4, 0x484c5050, }, -+ { 0, 0, 2, 0, 4, 0x50505050, }, -+ { 0, 0, 2, 4, 4, 0x44484c50, }, -+ { 0, 0, 2, 8, 4, 0x34383c40, }, -+ { 0, 0, 3, 0, 4, 0x50505050, }, -+ { 0, 1, 2, 0, 4, 0x50505050, }, -+ { 0, 1, 2, 4, 4, 0x44484c50, }, -+ { 0, 1, 2, 8, 4, 0x34383c40, }, -+ { 0, 1, 3, 0, 4, 0x50505050, }, -+ { 0, 0, 4, 1, 4, 0x00000000, }, -+ { 0, 0, 4, 0, 1, 0x00000000, }, -+ { 1, 0, 1, 0, 4, 0x50505050, }, -+ { 1, 0, 1, 4, 4, 0x484c5050, }, -+ { 1, 0, 2, 0, 4, 0x50505050, }, -+ { 1, 0, 2, 4, 4, 0x44484c50, }, -+ { 1, 0, 2, 8, 4, 0x34383c40, }, -+ { 1, 0, 3, 0, 4, 0x50505050, }, -+ { 1, 1, 2, 0, 4, 0x50505050, }, -+ { 1, 1, 2, 4, 4, 0x44484c50, }, -+ { 1, 1, 2, 8, 4, 0x34383c40, }, -+ { 1, 1, 3, 0, 4, 0x50505050, }, -+ { 1, 0, 4, 0, 4, 0x00000000, }, -+}; -+ -+static const u8 _txpwr_track_delta_swingidx_5gb_n[][DELTA_SWINGIDX_SIZE] = { -+ {0, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 5, 6, 6, 7, -+ 7, 7, 8, 8, 9, 9, 9, 10, 10, 10, 11, 11, 11}, -+ {0, 1, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 4, 4, -+ 5, 5, 5, 5, 6, 6, 6, 6, 7, 7, 7, 7, 8, 8}, -+ {0, 1, 1, 1, 2, 2, 2, 3, 3, 3, 3, 4, 4, 4, 5, 5, -+ 5, 6, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9}, -+}; -+ -+static const u8 _txpwr_track_delta_swingidx_5gb_p[][DELTA_SWINGIDX_SIZE] = { -+ {0, 1, 1, 1, 2, 2, 3, 3, 3, 4, 4, 4, 5, 5, 6, 6, -+ 6, 7, 7, 7, 8, 8, 8, 9, 9, 10, 10, 10, 11, 11}, -+ {0, 1, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 4, 4, -+ 5, 5, 5, 5, 6, 6, 6, 6, 7, 7, 7, 7, 8, 8}, -+ {0, 1, 1, 1, 2, 2, 2, 3, 3, 3, 3, 4, 4, 4, 5, 5, -+ 5, 6, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9}, -+}; -+ -+static const u8 _txpwr_track_delta_swingidx_5ga_n[][DELTA_SWINGIDX_SIZE] = { -+ {0, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 5, 6, 6, 7, -+ 7, 7, 8, 8, 9, 9, 9, 10, 10, 10, 11, 11, 11}, -+ {0, 1, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 4, 4, -+ 5, 5, 5, 5, 6, 6, 6, 6, 7, 7, 7, 7, 8, 8}, -+ {0, 1, 1, 1, 2, 2, 2, 3, 3, 3, 3, 4, 4, 4, 5, 5, -+ 5, 6, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9}, -+}; -+ -+static const u8 _txpwr_track_delta_swingidx_5ga_p[][DELTA_SWINGIDX_SIZE] = { -+ {0, 1, 1, 1, 2, 2, 3, 3, 3, 4, 4, 4, 5, 5, 6, 6, -+ 6, 7, 7, 7, 8, 8, 8, 9, 9, 10, 10, 10, 11, 11}, -+ {0, 1, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 4, 4, -+ 5, 5, 5, 5, 6, 6, 6, 6, 7, 7, 7, 7, 8, 8}, -+ {0, 1, 1, 1, 2, 2, 2, 3, 3, 3, 3, 4, 4, 4, 5, 5, -+ 5, 6, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9}, -+}; -+ -+static const u8 _txpwr_track_delta_swingidx_2gb_n[] = { -+ 0, 1, 1, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 3, 3, 4, -+ 4, 4, 4, 5, 5, 5, 5, 5, 6, 6, 6, 6, 7, 7}; -+ -+static const u8 _txpwr_track_delta_swingidx_2gb_p[] = { -+ 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2, -+ 2, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 3, 3, 3}; -+ -+static const u8 _txpwr_track_delta_swingidx_2ga_n[] = { -+ 0, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2, 2, 3, 3, 3, -+ 3, 3, 3, 4, 4, 4, 4, 4, 4, 5, 5, 5, 5, 5}; -+ -+static const u8 _txpwr_track_delta_swingidx_2ga_p[] = { -+ 0, 1, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, 5, 5, -+ 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 10, 10}; -+ -+static const u8 _txpwr_track_delta_swingidx_2g_cck_b_n[] = { -+ 0, 1, 1, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 3, 3, 4, -+ 4, 4, 4, 5, 5, 5, 5, 5, 6, 6, 6, 6, 7, 7}; -+ -+static const u8 _txpwr_track_delta_swingidx_2g_cck_b_p[] = { -+ 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2, -+ 2, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 3, 3, 3}; -+ -+static const u8 _txpwr_track_delta_swingidx_2g_cck_a_n[] = { -+ 0, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2, 2, 3, 3, 3, -+ 3, 3, 3, 4, 4, 4, 4, 4, 4, 5, 5, 5, 5, 5}; -+ -+static const u8 _txpwr_track_delta_swingidx_2g_cck_a_p[] = { -+ 0, 1, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, 5, 5, -+ 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 10, 10}; -+ -+const s8 rtw89_8852a_txpwr_lmt_2g[RTW89_2G_BW_NUM][RTW89_NTX_NUM] -+ [RTW89_RS_LMT_NUM][RTW89_BF_NUM] -+ [RTW89_REGD_NUM][RTW89_2G_CH_NUM] = { -+ [0][0][0][0][0][0] = 56, -+ [0][0][0][0][0][1] = 56, -+ [0][0][0][0][0][2] = 56, -+ [0][0][0][0][0][3] = 56, -+ [0][0][0][0][0][4] = 56, -+ [0][0][0][0][0][5] = 56, -+ [0][0][0][0][0][6] = 56, -+ [0][0][0][0][0][7] = 56, -+ [0][0][0][0][0][8] = 56, -+ [0][0][0][0][0][9] = 56, -+ [0][0][0][0][0][10] = 56, -+ [0][0][0][0][0][11] = 56, -+ [0][0][0][0][0][12] = 48, -+ [0][0][0][0][0][13] = 76, -+ [0][1][0][0][0][0] = 44, -+ [0][1][0][0][0][1] = 44, -+ [0][1][0][0][0][2] = 44, -+ [0][1][0][0][0][3] = 44, -+ [0][1][0][0][0][4] = 44, -+ [0][1][0][0][0][5] = 44, -+ [0][1][0][0][0][6] = 44, -+ [0][1][0][0][0][7] = 44, -+ [0][1][0][0][0][8] = 44, -+ [0][1][0][0][0][9] = 44, -+ [0][1][0][0][0][10] = 44, -+ [0][1][0][0][0][11] = 44, -+ [0][1][0][0][0][12] = 38, -+ [0][1][0][0][0][13] = 64, -+ [1][0][0][0][0][0] = 0, -+ [1][0][0][0][0][1] = 0, -+ [1][0][0][0][0][2] = 58, -+ [1][0][0][0][0][3] = 58, -+ [1][0][0][0][0][4] = 58, -+ [1][0][0][0][0][5] = 58, -+ [1][0][0][0][0][6] = 46, -+ [1][0][0][0][0][7] = 46, -+ [1][0][0][0][0][8] = 46, -+ [1][0][0][0][0][9] = 32, -+ [1][0][0][0][0][10] = 32, -+ [1][0][0][0][0][11] = 0, -+ [1][0][0][0][0][12] = 0, -+ [1][0][0][0][0][13] = 0, -+ [1][1][0][0][0][0] = 0, -+ [1][1][0][0][0][1] = 0, -+ [1][1][0][0][0][2] = 46, -+ [1][1][0][0][0][3] = 46, -+ [1][1][0][0][0][4] = 46, -+ [1][1][0][0][0][5] = 46, -+ [1][1][0][0][0][6] = 46, -+ [1][1][0][0][0][7] = 46, -+ [1][1][0][0][0][8] = 46, -+ [1][1][0][0][0][9] = 24, -+ [1][1][0][0][0][10] = 24, -+ [1][1][0][0][0][11] = 0, -+ [1][1][0][0][0][12] = 0, -+ [1][1][0][0][0][13] = 0, -+ [0][0][1][0][0][0] = 58, -+ [0][0][1][0][0][1] = 58, -+ [0][0][1][0][0][2] = 58, -+ [0][0][1][0][0][3] = 58, -+ [0][0][1][0][0][4] = 58, -+ [0][0][1][0][0][5] = 58, -+ [0][0][1][0][0][6] = 58, -+ [0][0][1][0][0][7] = 58, -+ [0][0][1][0][0][8] = 58, -+ [0][0][1][0][0][9] = 58, -+ [0][0][1][0][0][10] = 58, -+ [0][0][1][0][0][11] = 56, -+ [0][0][1][0][0][12] = 52, -+ [0][0][1][0][0][13] = 0, -+ [0][1][1][0][0][0] = 46, -+ [0][1][1][0][0][1] = 46, -+ [0][1][1][0][0][2] = 46, -+ [0][1][1][0][0][3] = 46, -+ [0][1][1][0][0][4] = 46, -+ [0][1][1][0][0][5] = 46, -+ [0][1][1][0][0][6] = 46, -+ [0][1][1][0][0][7] = 46, -+ [0][1][1][0][0][8] = 46, -+ [0][1][1][0][0][9] = 46, -+ [0][1][1][0][0][10] = 46, -+ [0][1][1][0][0][11] = 42, -+ [0][1][1][0][0][12] = 40, -+ [0][1][1][0][0][13] = 0, -+ [0][0][2][0][0][0] = 58, -+ [0][0][2][0][0][1] = 58, -+ [0][0][2][0][0][2] = 58, -+ [0][0][2][0][0][3] = 58, -+ [0][0][2][0][0][4] = 58, -+ [0][0][2][0][0][5] = 58, -+ [0][0][2][0][0][6] = 58, -+ [0][0][2][0][0][7] = 58, -+ [0][0][2][0][0][8] = 58, -+ [0][0][2][0][0][9] = 58, -+ [0][0][2][0][0][10] = 58, -+ [0][0][2][0][0][11] = 54, -+ [0][0][2][0][0][12] = 50, -+ [0][0][2][0][0][13] = 0, -+ [0][1][2][0][0][0] = 46, -+ [0][1][2][0][0][1] = 46, -+ [0][1][2][0][0][2] = 46, -+ [0][1][2][0][0][3] = 46, -+ [0][1][2][0][0][4] = 46, -+ [0][1][2][0][0][5] = 46, -+ [0][1][2][0][0][6] = 46, -+ [0][1][2][0][0][7] = 46, -+ [0][1][2][0][0][8] = 46, -+ [0][1][2][0][0][9] = 46, -+ [0][1][2][0][0][10] = 46, -+ [0][1][2][0][0][11] = 42, -+ [0][1][2][0][0][12] = 40, -+ [0][1][2][0][0][13] = 0, -+ [0][1][2][1][0][0] = 34, -+ [0][1][2][1][0][1] = 34, -+ [0][1][2][1][0][2] = 34, -+ [0][1][2][1][0][3] = 34, -+ [0][1][2][1][0][4] = 34, -+ [0][1][2][1][0][5] = 34, -+ [0][1][2][1][0][6] = 34, -+ [0][1][2][1][0][7] = 34, -+ [0][1][2][1][0][8] = 34, -+ [0][1][2][1][0][9] = 34, -+ [0][1][2][1][0][10] = 34, -+ [0][1][2][1][0][11] = 34, -+ [0][1][2][1][0][12] = 34, -+ [0][1][2][1][0][13] = 0, -+ [1][0][2][0][0][0] = 0, -+ [1][0][2][0][0][1] = 0, -+ [1][0][2][0][0][2] = 56, -+ [1][0][2][0][0][3] = 56, -+ [1][0][2][0][0][4] = 58, -+ [1][0][2][0][0][5] = 58, -+ [1][0][2][0][0][6] = 54, -+ [1][0][2][0][0][7] = 50, -+ [1][0][2][0][0][8] = 50, -+ [1][0][2][0][0][9] = 42, -+ [1][0][2][0][0][10] = 40, -+ [1][0][2][0][0][11] = 0, -+ [1][0][2][0][0][12] = 0, -+ [1][0][2][0][0][13] = 0, -+ [1][1][2][0][0][0] = 0, -+ [1][1][2][0][0][1] = 0, -+ [1][1][2][0][0][2] = 46, -+ [1][1][2][0][0][3] = 46, -+ [1][1][2][0][0][4] = 46, -+ [1][1][2][0][0][5] = 46, -+ [1][1][2][0][0][6] = 46, -+ [1][1][2][0][0][7] = 46, -+ [1][1][2][0][0][8] = 46, -+ [1][1][2][0][0][9] = 38, -+ [1][1][2][0][0][10] = 36, -+ [1][1][2][0][0][11] = 0, -+ [1][1][2][0][0][12] = 0, -+ [1][1][2][0][0][13] = 0, -+ [1][1][2][1][0][0] = 0, -+ [1][1][2][1][0][1] = 0, -+ [1][1][2][1][0][2] = 34, -+ [1][1][2][1][0][3] = 34, -+ [1][1][2][1][0][4] = 34, -+ [1][1][2][1][0][5] = 34, -+ [1][1][2][1][0][6] = 34, -+ [1][1][2][1][0][7] = 34, -+ [1][1][2][1][0][8] = 34, -+ [1][1][2][1][0][9] = 34, -+ [1][1][2][1][0][10] = 34, -+ [1][1][2][1][0][11] = 0, -+ [1][1][2][1][0][12] = 0, -+ [1][1][2][1][0][13] = 0, -+ [0][0][0][0][2][0] = 76, -+ [0][0][0][0][1][0] = 56, -+ [0][0][0][0][3][0] = 68, -+ [0][0][0][0][5][0] = 76, -+ [0][0][0][0][6][0] = 56, -+ [0][0][0][0][9][0] = 56, -+ [0][0][0][0][8][0] = 60, -+ [0][0][0][0][11][0] = 56, -+ [0][0][0][0][2][1] = 76, -+ [0][0][0][0][1][1] = 56, -+ [0][0][0][0][3][1] = 68, -+ [0][0][0][0][5][1] = 76, -+ [0][0][0][0][6][1] = 56, -+ [0][0][0][0][9][1] = 56, -+ [0][0][0][0][8][1] = 60, -+ [0][0][0][0][11][1] = 56, -+ [0][0][0][0][2][2] = 76, -+ [0][0][0][0][1][2] = 56, -+ [0][0][0][0][3][2] = 68, -+ [0][0][0][0][5][2] = 76, -+ [0][0][0][0][6][2] = 56, -+ [0][0][0][0][9][2] = 56, -+ [0][0][0][0][8][2] = 60, -+ [0][0][0][0][11][2] = 56, -+ [0][0][0][0][2][3] = 76, -+ [0][0][0][0][1][3] = 56, -+ [0][0][0][0][3][3] = 68, -+ [0][0][0][0][5][3] = 76, -+ [0][0][0][0][6][3] = 56, -+ [0][0][0][0][9][3] = 56, -+ [0][0][0][0][8][3] = 60, -+ [0][0][0][0][11][3] = 56, -+ [0][0][0][0][2][4] = 76, -+ [0][0][0][0][1][4] = 56, -+ [0][0][0][0][3][4] = 68, -+ [0][0][0][0][5][4] = 76, -+ [0][0][0][0][6][4] = 56, -+ [0][0][0][0][9][4] = 56, -+ [0][0][0][0][8][4] = 60, -+ [0][0][0][0][11][4] = 56, -+ [0][0][0][0][2][5] = 76, -+ [0][0][0][0][1][5] = 56, -+ [0][0][0][0][3][5] = 68, -+ [0][0][0][0][5][5] = 76, -+ [0][0][0][0][6][5] = 56, -+ [0][0][0][0][9][5] = 56, -+ [0][0][0][0][8][5] = 60, -+ [0][0][0][0][11][5] = 56, -+ [0][0][0][0][2][6] = 76, -+ [0][0][0][0][1][6] = 56, -+ [0][0][0][0][3][6] = 68, -+ [0][0][0][0][5][6] = 76, -+ [0][0][0][0][6][6] = 56, -+ [0][0][0][0][9][6] = 56, -+ [0][0][0][0][8][6] = 60, -+ [0][0][0][0][11][6] = 56, -+ [0][0][0][0][2][7] = 76, -+ [0][0][0][0][1][7] = 56, -+ [0][0][0][0][3][7] = 68, -+ [0][0][0][0][5][7] = 76, -+ [0][0][0][0][6][7] = 56, -+ [0][0][0][0][9][7] = 56, -+ [0][0][0][0][8][7] = 60, -+ [0][0][0][0][11][7] = 56, -+ [0][0][0][0][2][8] = 76, -+ [0][0][0][0][1][8] = 56, -+ [0][0][0][0][3][8] = 68, -+ [0][0][0][0][5][8] = 76, -+ [0][0][0][0][6][8] = 56, -+ [0][0][0][0][9][8] = 56, -+ [0][0][0][0][8][8] = 60, -+ [0][0][0][0][11][8] = 56, -+ [0][0][0][0][2][9] = 76, -+ [0][0][0][0][1][9] = 56, -+ [0][0][0][0][3][9] = 68, -+ [0][0][0][0][5][9] = 76, -+ [0][0][0][0][6][9] = 56, -+ [0][0][0][0][9][9] = 56, -+ [0][0][0][0][8][9] = 60, -+ [0][0][0][0][11][9] = 56, -+ [0][0][0][0][2][10] = 76, -+ [0][0][0][0][1][10] = 56, -+ [0][0][0][0][3][10] = 68, -+ [0][0][0][0][5][10] = 76, -+ [0][0][0][0][6][10] = 56, -+ [0][0][0][0][9][10] = 56, -+ [0][0][0][0][8][10] = 60, -+ [0][0][0][0][11][10] = 56, -+ [0][0][0][0][2][11] = 68, -+ [0][0][0][0][1][11] = 56, -+ [0][0][0][0][3][11] = 68, -+ [0][0][0][0][5][11] = 68, -+ [0][0][0][0][6][11] = 56, -+ [0][0][0][0][9][11] = 56, -+ [0][0][0][0][8][11] = 60, -+ [0][0][0][0][11][11] = 56, -+ [0][0][0][0][2][12] = 48, -+ [0][0][0][0][1][12] = 56, -+ [0][0][0][0][3][12] = 68, -+ [0][0][0][0][5][12] = 48, -+ [0][0][0][0][6][12] = 56, -+ [0][0][0][0][9][12] = 56, -+ [0][0][0][0][8][12] = 60, -+ [0][0][0][0][11][12] = 56, -+ [0][0][0][0][2][13] = 127, -+ [0][0][0][0][1][13] = 127, -+ [0][0][0][0][3][13] = 76, -+ [0][0][0][0][5][13] = 127, -+ [0][0][0][0][6][13] = 127, -+ [0][0][0][0][9][13] = 127, -+ [0][0][0][0][8][13] = 127, -+ [0][0][0][0][11][13] = 127, -+ [0][1][0][0][2][0] = 74, -+ [0][1][0][0][1][0] = 44, -+ [0][1][0][0][3][0] = 56, -+ [0][1][0][0][5][0] = 74, -+ [0][1][0][0][6][0] = 44, -+ [0][1][0][0][9][0] = 44, -+ [0][1][0][0][8][0] = 48, -+ [0][1][0][0][11][0] = 44, -+ [0][1][0][0][2][1] = 76, -+ [0][1][0][0][1][1] = 44, -+ [0][1][0][0][3][1] = 56, -+ [0][1][0][0][5][1] = 76, -+ [0][1][0][0][6][1] = 44, -+ [0][1][0][0][9][1] = 44, -+ [0][1][0][0][8][1] = 48, -+ [0][1][0][0][11][1] = 44, -+ [0][1][0][0][2][2] = 76, -+ [0][1][0][0][1][2] = 44, -+ [0][1][0][0][3][2] = 56, -+ [0][1][0][0][5][2] = 76, -+ [0][1][0][0][6][2] = 44, -+ [0][1][0][0][9][2] = 44, -+ [0][1][0][0][8][2] = 48, -+ [0][1][0][0][11][2] = 44, -+ [0][1][0][0][2][3] = 76, -+ [0][1][0][0][1][3] = 44, -+ [0][1][0][0][3][3] = 56, -+ [0][1][0][0][5][3] = 76, -+ [0][1][0][0][6][3] = 44, -+ [0][1][0][0][9][3] = 44, -+ [0][1][0][0][8][3] = 48, -+ [0][1][0][0][11][3] = 44, -+ [0][1][0][0][2][4] = 76, -+ [0][1][0][0][1][4] = 44, -+ [0][1][0][0][3][4] = 56, -+ [0][1][0][0][5][4] = 76, -+ [0][1][0][0][6][4] = 44, -+ [0][1][0][0][9][4] = 44, -+ [0][1][0][0][8][4] = 48, -+ [0][1][0][0][11][4] = 44, -+ [0][1][0][0][2][5] = 76, -+ [0][1][0][0][1][5] = 44, -+ [0][1][0][0][3][5] = 56, -+ [0][1][0][0][5][5] = 76, -+ [0][1][0][0][6][5] = 44, -+ [0][1][0][0][9][5] = 44, -+ [0][1][0][0][8][5] = 48, -+ [0][1][0][0][11][5] = 44, -+ [0][1][0][0][2][6] = 76, -+ [0][1][0][0][1][6] = 44, -+ [0][1][0][0][3][6] = 56, -+ [0][1][0][0][5][6] = 76, -+ [0][1][0][0][6][6] = 44, -+ [0][1][0][0][9][6] = 44, -+ [0][1][0][0][8][6] = 48, -+ [0][1][0][0][11][6] = 44, -+ [0][1][0][0][2][7] = 76, -+ [0][1][0][0][1][7] = 44, -+ [0][1][0][0][3][7] = 56, -+ [0][1][0][0][5][7] = 76, -+ [0][1][0][0][6][7] = 44, -+ [0][1][0][0][9][7] = 44, -+ [0][1][0][0][8][7] = 48, -+ [0][1][0][0][11][7] = 44, -+ [0][1][0][0][2][8] = 76, -+ [0][1][0][0][1][8] = 44, -+ [0][1][0][0][3][8] = 56, -+ [0][1][0][0][5][8] = 76, -+ [0][1][0][0][6][8] = 44, -+ [0][1][0][0][9][8] = 44, -+ [0][1][0][0][8][8] = 48, -+ [0][1][0][0][11][8] = 44, -+ [0][1][0][0][2][9] = 76, -+ [0][1][0][0][1][9] = 44, -+ [0][1][0][0][3][9] = 56, -+ [0][1][0][0][5][9] = 76, -+ [0][1][0][0][6][9] = 44, -+ [0][1][0][0][9][9] = 44, -+ [0][1][0][0][8][9] = 48, -+ [0][1][0][0][11][9] = 44, -+ [0][1][0][0][2][10] = 62, -+ [0][1][0][0][1][10] = 44, -+ [0][1][0][0][3][10] = 56, -+ [0][1][0][0][5][10] = 62, -+ [0][1][0][0][6][10] = 44, -+ [0][1][0][0][9][10] = 44, -+ [0][1][0][0][8][10] = 48, -+ [0][1][0][0][11][10] = 44, -+ [0][1][0][0][2][11] = 52, -+ [0][1][0][0][1][11] = 44, -+ [0][1][0][0][3][11] = 56, -+ [0][1][0][0][5][11] = 52, -+ [0][1][0][0][6][11] = 44, -+ [0][1][0][0][9][11] = 44, -+ [0][1][0][0][8][11] = 48, -+ [0][1][0][0][11][11] = 44, -+ [0][1][0][0][2][12] = 38, -+ [0][1][0][0][1][12] = 44, -+ [0][1][0][0][3][12] = 56, -+ [0][1][0][0][5][12] = 38, -+ [0][1][0][0][6][12] = 44, -+ [0][1][0][0][9][12] = 44, -+ [0][1][0][0][8][12] = 48, -+ [0][1][0][0][11][12] = 44, -+ [0][1][0][0][2][13] = 127, -+ [0][1][0][0][1][13] = 127, -+ [0][1][0][0][3][13] = 64, -+ [0][1][0][0][5][13] = 127, -+ [0][1][0][0][6][13] = 127, -+ [0][1][0][0][9][13] = 127, -+ [0][1][0][0][8][13] = 127, -+ [0][1][0][0][11][13] = 127, -+ [1][0][0][0][2][0] = 127, -+ [1][0][0][0][1][0] = 127, -+ [1][0][0][0][3][0] = 127, -+ [1][0][0][0][5][0] = 127, -+ [1][0][0][0][6][0] = 127, -+ [1][0][0][0][9][0] = 127, -+ [1][0][0][0][8][0] = 127, -+ [1][0][0][0][11][0] = 127, -+ [1][0][0][0][2][1] = 127, -+ [1][0][0][0][1][1] = 127, -+ [1][0][0][0][3][1] = 127, -+ [1][0][0][0][5][1] = 127, -+ [1][0][0][0][6][1] = 127, -+ [1][0][0][0][9][1] = 127, -+ [1][0][0][0][8][1] = 127, -+ [1][0][0][0][11][1] = 127, -+ [1][0][0][0][2][2] = 60, -+ [1][0][0][0][1][2] = 58, -+ [1][0][0][0][3][2] = 68, -+ [1][0][0][0][5][2] = 60, -+ [1][0][0][0][6][2] = 58, -+ [1][0][0][0][9][2] = 58, -+ [1][0][0][0][8][2] = 60, -+ [1][0][0][0][11][2] = 58, -+ [1][0][0][0][2][3] = 60, -+ [1][0][0][0][1][3] = 58, -+ [1][0][0][0][3][3] = 68, -+ [1][0][0][0][5][3] = 60, -+ [1][0][0][0][6][3] = 58, -+ [1][0][0][0][9][3] = 58, -+ [1][0][0][0][8][3] = 60, -+ [1][0][0][0][11][3] = 58, -+ [1][0][0][0][2][4] = 60, -+ [1][0][0][0][1][4] = 58, -+ [1][0][0][0][3][4] = 68, -+ [1][0][0][0][5][4] = 60, -+ [1][0][0][0][6][4] = 58, -+ [1][0][0][0][9][4] = 58, -+ [1][0][0][0][8][4] = 60, -+ [1][0][0][0][11][4] = 58, -+ [1][0][0][0][2][5] = 60, -+ [1][0][0][0][1][5] = 58, -+ [1][0][0][0][3][5] = 68, -+ [1][0][0][0][5][5] = 60, -+ [1][0][0][0][6][5] = 58, -+ [1][0][0][0][9][5] = 58, -+ [1][0][0][0][8][5] = 60, -+ [1][0][0][0][11][5] = 58, -+ [1][0][0][0][2][6] = 46, -+ [1][0][0][0][1][6] = 58, -+ [1][0][0][0][3][6] = 68, -+ [1][0][0][0][5][6] = 46, -+ [1][0][0][0][6][6] = 58, -+ [1][0][0][0][9][6] = 58, -+ [1][0][0][0][8][6] = 60, -+ [1][0][0][0][11][6] = 58, -+ [1][0][0][0][2][7] = 46, -+ [1][0][0][0][1][7] = 58, -+ [1][0][0][0][3][7] = 68, -+ [1][0][0][0][5][7] = 46, -+ [1][0][0][0][6][7] = 58, -+ [1][0][0][0][9][7] = 58, -+ [1][0][0][0][8][7] = 60, -+ [1][0][0][0][11][7] = 58, -+ [1][0][0][0][2][8] = 46, -+ [1][0][0][0][1][8] = 58, -+ [1][0][0][0][3][8] = 68, -+ [1][0][0][0][5][8] = 46, -+ [1][0][0][0][6][8] = 58, -+ [1][0][0][0][9][8] = 58, -+ [1][0][0][0][8][8] = 60, -+ [1][0][0][0][11][8] = 58, -+ [1][0][0][0][2][9] = 32, -+ [1][0][0][0][1][9] = 58, -+ [1][0][0][0][3][9] = 68, -+ [1][0][0][0][5][9] = 32, -+ [1][0][0][0][6][9] = 58, -+ [1][0][0][0][9][9] = 58, -+ [1][0][0][0][8][9] = 60, -+ [1][0][0][0][11][9] = 58, -+ [1][0][0][0][2][10] = 32, -+ [1][0][0][0][1][10] = 58, -+ [1][0][0][0][3][10] = 68, -+ [1][0][0][0][5][10] = 32, -+ [1][0][0][0][6][10] = 58, -+ [1][0][0][0][9][10] = 58, -+ [1][0][0][0][8][10] = 60, -+ [1][0][0][0][11][10] = 58, -+ [1][0][0][0][2][11] = 127, -+ [1][0][0][0][1][11] = 127, -+ [1][0][0][0][3][11] = 127, -+ [1][0][0][0][5][11] = 127, -+ [1][0][0][0][6][11] = 127, -+ [1][0][0][0][9][11] = 127, -+ [1][0][0][0][8][11] = 127, -+ [1][0][0][0][11][11] = 127, -+ [1][0][0][0][2][12] = 127, -+ [1][0][0][0][1][12] = 127, -+ [1][0][0][0][3][12] = 127, -+ [1][0][0][0][5][12] = 127, -+ [1][0][0][0][6][12] = 127, -+ [1][0][0][0][9][12] = 127, -+ [1][0][0][0][8][12] = 127, -+ [1][0][0][0][11][12] = 127, -+ [1][0][0][0][2][13] = 127, -+ [1][0][0][0][1][13] = 127, -+ [1][0][0][0][3][13] = 127, -+ [1][0][0][0][5][13] = 127, -+ [1][0][0][0][6][13] = 127, -+ [1][0][0][0][9][13] = 127, -+ [1][0][0][0][8][13] = 127, -+ [1][0][0][0][11][13] = 127, -+ [1][1][0][0][2][0] = 127, -+ [1][1][0][0][1][0] = 127, -+ [1][1][0][0][3][0] = 127, -+ [1][1][0][0][5][0] = 127, -+ [1][1][0][0][6][0] = 127, -+ [1][1][0][0][9][0] = 127, -+ [1][1][0][0][8][0] = 127, -+ [1][1][0][0][11][0] = 127, -+ [1][1][0][0][2][1] = 127, -+ [1][1][0][0][1][1] = 127, -+ [1][1][0][0][3][1] = 127, -+ [1][1][0][0][5][1] = 127, -+ [1][1][0][0][6][1] = 127, -+ [1][1][0][0][9][1] = 127, -+ [1][1][0][0][8][1] = 127, -+ [1][1][0][0][11][1] = 127, -+ [1][1][0][0][2][2] = 48, -+ [1][1][0][0][1][2] = 46, -+ [1][1][0][0][3][2] = 56, -+ [1][1][0][0][5][2] = 48, -+ [1][1][0][0][6][2] = 46, -+ [1][1][0][0][9][2] = 46, -+ [1][1][0][0][8][2] = 48, -+ [1][1][0][0][11][2] = 46, -+ [1][1][0][0][2][3] = 48, -+ [1][1][0][0][1][3] = 46, -+ [1][1][0][0][3][3] = 56, -+ [1][1][0][0][5][3] = 48, -+ [1][1][0][0][6][3] = 46, -+ [1][1][0][0][9][3] = 46, -+ [1][1][0][0][8][3] = 48, -+ [1][1][0][0][11][3] = 46, -+ [1][1][0][0][2][4] = 48, -+ [1][1][0][0][1][4] = 46, -+ [1][1][0][0][3][4] = 56, -+ [1][1][0][0][5][4] = 48, -+ [1][1][0][0][6][4] = 46, -+ [1][1][0][0][9][4] = 46, -+ [1][1][0][0][8][4] = 48, -+ [1][1][0][0][11][4] = 46, -+ [1][1][0][0][2][5] = 58, -+ [1][1][0][0][1][5] = 46, -+ [1][1][0][0][3][5] = 56, -+ [1][1][0][0][5][5] = 58, -+ [1][1][0][0][6][5] = 46, -+ [1][1][0][0][9][5] = 46, -+ [1][1][0][0][8][5] = 48, -+ [1][1][0][0][11][5] = 46, -+ [1][1][0][0][2][6] = 46, -+ [1][1][0][0][1][6] = 46, -+ [1][1][0][0][3][6] = 56, -+ [1][1][0][0][5][6] = 46, -+ [1][1][0][0][6][6] = 46, -+ [1][1][0][0][9][6] = 46, -+ [1][1][0][0][8][6] = 48, -+ [1][1][0][0][11][6] = 46, -+ [1][1][0][0][2][7] = 46, -+ [1][1][0][0][1][7] = 46, -+ [1][1][0][0][3][7] = 56, -+ [1][1][0][0][5][7] = 46, -+ [1][1][0][0][6][7] = 46, -+ [1][1][0][0][9][7] = 46, -+ [1][1][0][0][8][7] = 48, -+ [1][1][0][0][11][7] = 46, -+ [1][1][0][0][2][8] = 46, -+ [1][1][0][0][1][8] = 46, -+ [1][1][0][0][3][8] = 56, -+ [1][1][0][0][5][8] = 46, -+ [1][1][0][0][6][8] = 46, -+ [1][1][0][0][9][8] = 46, -+ [1][1][0][0][8][8] = 48, -+ [1][1][0][0][11][8] = 46, -+ [1][1][0][0][2][9] = 24, -+ [1][1][0][0][1][9] = 46, -+ [1][1][0][0][3][9] = 56, -+ [1][1][0][0][5][9] = 24, -+ [1][1][0][0][6][9] = 46, -+ [1][1][0][0][9][9] = 46, -+ [1][1][0][0][8][9] = 48, -+ [1][1][0][0][11][9] = 46, -+ [1][1][0][0][2][10] = 24, -+ [1][1][0][0][1][10] = 46, -+ [1][1][0][0][3][10] = 56, -+ [1][1][0][0][5][10] = 24, -+ [1][1][0][0][6][10] = 46, -+ [1][1][0][0][9][10] = 46, -+ [1][1][0][0][8][10] = 48, -+ [1][1][0][0][11][10] = 46, -+ [1][1][0][0][2][11] = 127, -+ [1][1][0][0][1][11] = 127, -+ [1][1][0][0][3][11] = 127, -+ [1][1][0][0][5][11] = 127, -+ [1][1][0][0][6][11] = 127, -+ [1][1][0][0][9][11] = 127, -+ [1][1][0][0][8][11] = 127, -+ [1][1][0][0][11][11] = 127, -+ [1][1][0][0][2][12] = 127, -+ [1][1][0][0][1][12] = 127, -+ [1][1][0][0][3][12] = 127, -+ [1][1][0][0][5][12] = 127, -+ [1][1][0][0][6][12] = 127, -+ [1][1][0][0][9][12] = 127, -+ [1][1][0][0][8][12] = 127, -+ [1][1][0][0][11][12] = 127, -+ [1][1][0][0][2][13] = 127, -+ [1][1][0][0][1][13] = 127, -+ [1][1][0][0][3][13] = 127, -+ [1][1][0][0][5][13] = 127, -+ [1][1][0][0][6][13] = 127, -+ [1][1][0][0][9][13] = 127, -+ [1][1][0][0][8][13] = 127, -+ [1][1][0][0][11][13] = 127, -+ [0][0][1][0][2][0] = 66, -+ [0][0][1][0][1][0] = 58, -+ [0][0][1][0][3][0] = 76, -+ [0][0][1][0][5][0] = 66, -+ [0][0][1][0][6][0] = 58, -+ [0][0][1][0][9][0] = 58, -+ [0][0][1][0][8][0] = 60, -+ [0][0][1][0][11][0] = 58, -+ [0][0][1][0][2][1] = 66, -+ [0][0][1][0][1][1] = 58, -+ [0][0][1][0][3][1] = 76, -+ [0][0][1][0][5][1] = 66, -+ [0][0][1][0][6][1] = 58, -+ [0][0][1][0][9][1] = 58, -+ [0][0][1][0][8][1] = 60, -+ [0][0][1][0][11][1] = 58, -+ [0][0][1][0][2][2] = 70, -+ [0][0][1][0][1][2] = 58, -+ [0][0][1][0][3][2] = 76, -+ [0][0][1][0][5][2] = 70, -+ [0][0][1][0][6][2] = 58, -+ [0][0][1][0][9][2] = 58, -+ [0][0][1][0][8][2] = 60, -+ [0][0][1][0][11][2] = 58, -+ [0][0][1][0][2][3] = 74, -+ [0][0][1][0][1][3] = 58, -+ [0][0][1][0][3][3] = 76, -+ [0][0][1][0][5][3] = 74, -+ [0][0][1][0][6][3] = 58, -+ [0][0][1][0][9][3] = 58, -+ [0][0][1][0][8][3] = 60, -+ [0][0][1][0][11][3] = 58, -+ [0][0][1][0][2][4] = 78, -+ [0][0][1][0][1][4] = 58, -+ [0][0][1][0][3][4] = 76, -+ [0][0][1][0][5][4] = 78, -+ [0][0][1][0][6][4] = 58, -+ [0][0][1][0][9][4] = 58, -+ [0][0][1][0][8][4] = 60, -+ [0][0][1][0][11][4] = 58, -+ [0][0][1][0][2][5] = 78, -+ [0][0][1][0][1][5] = 58, -+ [0][0][1][0][3][5] = 76, -+ [0][0][1][0][5][5] = 78, -+ [0][0][1][0][6][5] = 58, -+ [0][0][1][0][9][5] = 58, -+ [0][0][1][0][8][5] = 60, -+ [0][0][1][0][11][5] = 58, -+ [0][0][1][0][2][6] = 78, -+ [0][0][1][0][1][6] = 58, -+ [0][0][1][0][3][6] = 76, -+ [0][0][1][0][5][6] = 78, -+ [0][0][1][0][6][6] = 58, -+ [0][0][1][0][9][6] = 58, -+ [0][0][1][0][8][6] = 60, -+ [0][0][1][0][11][6] = 58, -+ [0][0][1][0][2][7] = 74, -+ [0][0][1][0][1][7] = 58, -+ [0][0][1][0][3][7] = 76, -+ [0][0][1][0][5][7] = 74, -+ [0][0][1][0][6][7] = 58, -+ [0][0][1][0][9][7] = 58, -+ [0][0][1][0][8][7] = 60, -+ [0][0][1][0][11][7] = 58, -+ [0][0][1][0][2][8] = 70, -+ [0][0][1][0][1][8] = 58, -+ [0][0][1][0][3][8] = 76, -+ [0][0][1][0][5][8] = 70, -+ [0][0][1][0][6][8] = 58, -+ [0][0][1][0][9][8] = 58, -+ [0][0][1][0][8][8] = 60, -+ [0][0][1][0][11][8] = 58, -+ [0][0][1][0][2][9] = 66, -+ [0][0][1][0][1][9] = 58, -+ [0][0][1][0][3][9] = 76, -+ [0][0][1][0][5][9] = 66, -+ [0][0][1][0][6][9] = 58, -+ [0][0][1][0][9][9] = 58, -+ [0][0][1][0][8][9] = 60, -+ [0][0][1][0][11][9] = 58, -+ [0][0][1][0][2][10] = 66, -+ [0][0][1][0][1][10] = 58, -+ [0][0][1][0][3][10] = 76, -+ [0][0][1][0][5][10] = 66, -+ [0][0][1][0][6][10] = 58, -+ [0][0][1][0][9][10] = 58, -+ [0][0][1][0][8][10] = 60, -+ [0][0][1][0][11][10] = 58, -+ [0][0][1][0][2][11] = 56, -+ [0][0][1][0][1][11] = 58, -+ [0][0][1][0][3][11] = 76, -+ [0][0][1][0][5][11] = 56, -+ [0][0][1][0][6][11] = 58, -+ [0][0][1][0][9][11] = 58, -+ [0][0][1][0][8][11] = 60, -+ [0][0][1][0][11][11] = 58, -+ [0][0][1][0][2][12] = 52, -+ [0][0][1][0][1][12] = 58, -+ [0][0][1][0][3][12] = 76, -+ [0][0][1][0][5][12] = 52, -+ [0][0][1][0][6][12] = 58, -+ [0][0][1][0][9][12] = 58, -+ [0][0][1][0][8][12] = 60, -+ [0][0][1][0][11][12] = 58, -+ [0][0][1][0][2][13] = 127, -+ [0][0][1][0][1][13] = 127, -+ [0][0][1][0][3][13] = 127, -+ [0][0][1][0][5][13] = 127, -+ [0][0][1][0][6][13] = 127, -+ [0][0][1][0][9][13] = 127, -+ [0][0][1][0][8][13] = 127, -+ [0][0][1][0][11][13] = 127, -+ [0][1][1][0][2][0] = 62, -+ [0][1][1][0][1][0] = 46, -+ [0][1][1][0][3][0] = 64, -+ [0][1][1][0][5][0] = 62, -+ [0][1][1][0][6][0] = 46, -+ [0][1][1][0][9][0] = 46, -+ [0][1][1][0][8][0] = 48, -+ [0][1][1][0][11][0] = 46, -+ [0][1][1][0][2][1] = 62, -+ [0][1][1][0][1][1] = 46, -+ [0][1][1][0][3][1] = 64, -+ [0][1][1][0][5][1] = 62, -+ [0][1][1][0][6][1] = 46, -+ [0][1][1][0][9][1] = 46, -+ [0][1][1][0][8][1] = 48, -+ [0][1][1][0][11][1] = 46, -+ [0][1][1][0][2][2] = 66, -+ [0][1][1][0][1][2] = 46, -+ [0][1][1][0][3][2] = 64, -+ [0][1][1][0][5][2] = 66, -+ [0][1][1][0][6][2] = 46, -+ [0][1][1][0][9][2] = 46, -+ [0][1][1][0][8][2] = 48, -+ [0][1][1][0][11][2] = 46, -+ [0][1][1][0][2][3] = 70, -+ [0][1][1][0][1][3] = 46, -+ [0][1][1][0][3][3] = 64, -+ [0][1][1][0][5][3] = 70, -+ [0][1][1][0][6][3] = 46, -+ [0][1][1][0][9][3] = 46, -+ [0][1][1][0][8][3] = 48, -+ [0][1][1][0][11][3] = 46, -+ [0][1][1][0][2][4] = 78, -+ [0][1][1][0][1][4] = 46, -+ [0][1][1][0][3][4] = 64, -+ [0][1][1][0][5][4] = 78, -+ [0][1][1][0][6][4] = 46, -+ [0][1][1][0][9][4] = 46, -+ [0][1][1][0][8][4] = 48, -+ [0][1][1][0][11][4] = 46, -+ [0][1][1][0][2][5] = 78, -+ [0][1][1][0][1][5] = 46, -+ [0][1][1][0][3][5] = 64, -+ [0][1][1][0][5][5] = 78, -+ [0][1][1][0][6][5] = 46, -+ [0][1][1][0][9][5] = 46, -+ [0][1][1][0][8][5] = 48, -+ [0][1][1][0][11][5] = 46, -+ [0][1][1][0][2][6] = 78, -+ [0][1][1][0][1][6] = 46, -+ [0][1][1][0][3][6] = 64, -+ [0][1][1][0][5][6] = 78, -+ [0][1][1][0][6][6] = 46, -+ [0][1][1][0][9][6] = 46, -+ [0][1][1][0][8][6] = 48, -+ [0][1][1][0][11][6] = 46, -+ [0][1][1][0][2][7] = 70, -+ [0][1][1][0][1][7] = 46, -+ [0][1][1][0][3][7] = 64, -+ [0][1][1][0][5][7] = 70, -+ [0][1][1][0][6][7] = 46, -+ [0][1][1][0][9][7] = 46, -+ [0][1][1][0][8][7] = 48, -+ [0][1][1][0][11][7] = 46, -+ [0][1][1][0][2][8] = 66, -+ [0][1][1][0][1][8] = 46, -+ [0][1][1][0][3][8] = 64, -+ [0][1][1][0][5][8] = 66, -+ [0][1][1][0][6][8] = 46, -+ [0][1][1][0][9][8] = 46, -+ [0][1][1][0][8][8] = 48, -+ [0][1][1][0][11][8] = 46, -+ [0][1][1][0][2][9] = 62, -+ [0][1][1][0][1][9] = 46, -+ [0][1][1][0][3][9] = 64, -+ [0][1][1][0][5][9] = 62, -+ [0][1][1][0][6][9] = 46, -+ [0][1][1][0][9][9] = 46, -+ [0][1][1][0][8][9] = 48, -+ [0][1][1][0][11][9] = 46, -+ [0][1][1][0][2][10] = 62, -+ [0][1][1][0][1][10] = 46, -+ [0][1][1][0][3][10] = 64, -+ [0][1][1][0][5][10] = 62, -+ [0][1][1][0][6][10] = 46, -+ [0][1][1][0][9][10] = 46, -+ [0][1][1][0][8][10] = 48, -+ [0][1][1][0][11][10] = 46, -+ [0][1][1][0][2][11] = 42, -+ [0][1][1][0][1][11] = 46, -+ [0][1][1][0][3][11] = 64, -+ [0][1][1][0][5][11] = 42, -+ [0][1][1][0][6][11] = 46, -+ [0][1][1][0][9][11] = 46, -+ [0][1][1][0][8][11] = 48, -+ [0][1][1][0][11][11] = 46, -+ [0][1][1][0][2][12] = 40, -+ [0][1][1][0][1][12] = 46, -+ [0][1][1][0][3][12] = 64, -+ [0][1][1][0][5][12] = 40, -+ [0][1][1][0][6][12] = 46, -+ [0][1][1][0][9][12] = 46, -+ [0][1][1][0][8][12] = 48, -+ [0][1][1][0][11][12] = 46, -+ [0][1][1][0][2][13] = 127, -+ [0][1][1][0][1][13] = 127, -+ [0][1][1][0][3][13] = 127, -+ [0][1][1][0][5][13] = 127, -+ [0][1][1][0][6][13] = 127, -+ [0][1][1][0][9][13] = 127, -+ [0][1][1][0][8][13] = 127, -+ [0][1][1][0][11][13] = 127, -+ [0][0][2][0][2][0] = 66, -+ [0][0][2][0][1][0] = 58, -+ [0][0][2][0][3][0] = 76, -+ [0][0][2][0][5][0] = 66, -+ [0][0][2][0][6][0] = 58, -+ [0][0][2][0][9][0] = 58, -+ [0][0][2][0][8][0] = 60, -+ [0][0][2][0][11][0] = 58, -+ [0][0][2][0][2][1] = 66, -+ [0][0][2][0][1][1] = 58, -+ [0][0][2][0][3][1] = 76, -+ [0][0][2][0][5][1] = 66, -+ [0][0][2][0][6][1] = 58, -+ [0][0][2][0][9][1] = 58, -+ [0][0][2][0][8][1] = 60, -+ [0][0][2][0][11][1] = 58, -+ [0][0][2][0][2][2] = 70, -+ [0][0][2][0][1][2] = 58, -+ [0][0][2][0][3][2] = 76, -+ [0][0][2][0][5][2] = 70, -+ [0][0][2][0][6][2] = 58, -+ [0][0][2][0][9][2] = 58, -+ [0][0][2][0][8][2] = 60, -+ [0][0][2][0][11][2] = 58, -+ [0][0][2][0][2][3] = 74, -+ [0][0][2][0][1][3] = 58, -+ [0][0][2][0][3][3] = 76, -+ [0][0][2][0][5][3] = 74, -+ [0][0][2][0][6][3] = 58, -+ [0][0][2][0][9][3] = 58, -+ [0][0][2][0][8][3] = 60, -+ [0][0][2][0][11][3] = 58, -+ [0][0][2][0][2][4] = 76, -+ [0][0][2][0][1][4] = 58, -+ [0][0][2][0][3][4] = 76, -+ [0][0][2][0][5][4] = 76, -+ [0][0][2][0][6][4] = 58, -+ [0][0][2][0][9][4] = 58, -+ [0][0][2][0][8][4] = 60, -+ [0][0][2][0][11][4] = 58, -+ [0][0][2][0][2][5] = 76, -+ [0][0][2][0][1][5] = 58, -+ [0][0][2][0][3][5] = 76, -+ [0][0][2][0][5][5] = 76, -+ [0][0][2][0][6][5] = 58, -+ [0][0][2][0][9][5] = 58, -+ [0][0][2][0][8][5] = 60, -+ [0][0][2][0][11][5] = 58, -+ [0][0][2][0][2][6] = 76, -+ [0][0][2][0][1][6] = 58, -+ [0][0][2][0][3][6] = 76, -+ [0][0][2][0][5][6] = 76, -+ [0][0][2][0][6][6] = 58, -+ [0][0][2][0][9][6] = 58, -+ [0][0][2][0][8][6] = 60, -+ [0][0][2][0][11][6] = 58, -+ [0][0][2][0][2][7] = 74, -+ [0][0][2][0][1][7] = 58, -+ [0][0][2][0][3][7] = 76, -+ [0][0][2][0][5][7] = 74, -+ [0][0][2][0][6][7] = 58, -+ [0][0][2][0][9][7] = 58, -+ [0][0][2][0][8][7] = 60, -+ [0][0][2][0][11][7] = 58, -+ [0][0][2][0][2][8] = 70, -+ [0][0][2][0][1][8] = 58, -+ [0][0][2][0][3][8] = 76, -+ [0][0][2][0][5][8] = 70, -+ [0][0][2][0][6][8] = 58, -+ [0][0][2][0][9][8] = 58, -+ [0][0][2][0][8][8] = 60, -+ [0][0][2][0][11][8] = 58, -+ [0][0][2][0][2][9] = 66, -+ [0][0][2][0][1][9] = 58, -+ [0][0][2][0][3][9] = 76, -+ [0][0][2][0][5][9] = 66, -+ [0][0][2][0][6][9] = 58, -+ [0][0][2][0][9][9] = 58, -+ [0][0][2][0][8][9] = 60, -+ [0][0][2][0][11][9] = 58, -+ [0][0][2][0][2][10] = 66, -+ [0][0][2][0][1][10] = 58, -+ [0][0][2][0][3][10] = 76, -+ [0][0][2][0][5][10] = 66, -+ [0][0][2][0][6][10] = 58, -+ [0][0][2][0][9][10] = 58, -+ [0][0][2][0][8][10] = 60, -+ [0][0][2][0][11][10] = 58, -+ [0][0][2][0][2][11] = 54, -+ [0][0][2][0][1][11] = 58, -+ [0][0][2][0][3][11] = 76, -+ [0][0][2][0][5][11] = 54, -+ [0][0][2][0][6][11] = 58, -+ [0][0][2][0][9][11] = 58, -+ [0][0][2][0][8][11] = 60, -+ [0][0][2][0][11][11] = 58, -+ [0][0][2][0][2][12] = 50, -+ [0][0][2][0][1][12] = 58, -+ [0][0][2][0][3][12] = 76, -+ [0][0][2][0][5][12] = 50, -+ [0][0][2][0][6][12] = 58, -+ [0][0][2][0][9][12] = 58, -+ [0][0][2][0][8][12] = 60, -+ [0][0][2][0][11][12] = 58, -+ [0][0][2][0][2][13] = 127, -+ [0][0][2][0][1][13] = 127, -+ [0][0][2][0][3][13] = 127, -+ [0][0][2][0][5][13] = 127, -+ [0][0][2][0][6][13] = 127, -+ [0][0][2][0][9][13] = 127, -+ [0][0][2][0][8][13] = 127, -+ [0][0][2][0][11][13] = 127, -+ [0][1][2][0][2][0] = 62, -+ [0][1][2][0][1][0] = 46, -+ [0][1][2][0][3][0] = 64, -+ [0][1][2][0][5][0] = 62, -+ [0][1][2][0][6][0] = 46, -+ [0][1][2][0][9][0] = 46, -+ [0][1][2][0][8][0] = 48, -+ [0][1][2][0][11][0] = 46, -+ [0][1][2][0][2][1] = 62, -+ [0][1][2][0][1][1] = 46, -+ [0][1][2][0][3][1] = 64, -+ [0][1][2][0][5][1] = 62, -+ [0][1][2][0][6][1] = 46, -+ [0][1][2][0][9][1] = 46, -+ [0][1][2][0][8][1] = 48, -+ [0][1][2][0][11][1] = 46, -+ [0][1][2][0][2][2] = 66, -+ [0][1][2][0][1][2] = 46, -+ [0][1][2][0][3][2] = 64, -+ [0][1][2][0][5][2] = 66, -+ [0][1][2][0][6][2] = 46, -+ [0][1][2][0][9][2] = 46, -+ [0][1][2][0][8][2] = 48, -+ [0][1][2][0][11][2] = 46, -+ [0][1][2][0][2][3] = 70, -+ [0][1][2][0][1][3] = 46, -+ [0][1][2][0][3][3] = 64, -+ [0][1][2][0][5][3] = 70, -+ [0][1][2][0][6][3] = 46, -+ [0][1][2][0][9][3] = 46, -+ [0][1][2][0][8][3] = 48, -+ [0][1][2][0][11][3] = 46, -+ [0][1][2][0][2][4] = 76, -+ [0][1][2][0][1][4] = 46, -+ [0][1][2][0][3][4] = 64, -+ [0][1][2][0][5][4] = 76, -+ [0][1][2][0][6][4] = 46, -+ [0][1][2][0][9][4] = 46, -+ [0][1][2][0][8][4] = 48, -+ [0][1][2][0][11][4] = 46, -+ [0][1][2][0][2][5] = 76, -+ [0][1][2][0][1][5] = 46, -+ [0][1][2][0][3][5] = 64, -+ [0][1][2][0][5][5] = 76, -+ [0][1][2][0][6][5] = 46, -+ [0][1][2][0][9][5] = 46, -+ [0][1][2][0][8][5] = 48, -+ [0][1][2][0][11][5] = 46, -+ [0][1][2][0][2][6] = 76, -+ [0][1][2][0][1][6] = 46, -+ [0][1][2][0][3][6] = 64, -+ [0][1][2][0][5][6] = 76, -+ [0][1][2][0][6][6] = 46, -+ [0][1][2][0][9][6] = 46, -+ [0][1][2][0][8][6] = 48, -+ [0][1][2][0][11][6] = 46, -+ [0][1][2][0][2][7] = 68, -+ [0][1][2][0][1][7] = 46, -+ [0][1][2][0][3][7] = 64, -+ [0][1][2][0][5][7] = 68, -+ [0][1][2][0][6][7] = 46, -+ [0][1][2][0][9][7] = 46, -+ [0][1][2][0][8][7] = 48, -+ [0][1][2][0][11][7] = 46, -+ [0][1][2][0][2][8] = 64, -+ [0][1][2][0][1][8] = 46, -+ [0][1][2][0][3][8] = 64, -+ [0][1][2][0][5][8] = 64, -+ [0][1][2][0][6][8] = 46, -+ [0][1][2][0][9][8] = 46, -+ [0][1][2][0][8][8] = 48, -+ [0][1][2][0][11][8] = 46, -+ [0][1][2][0][2][9] = 60, -+ [0][1][2][0][1][9] = 46, -+ [0][1][2][0][3][9] = 64, -+ [0][1][2][0][5][9] = 60, -+ [0][1][2][0][6][9] = 46, -+ [0][1][2][0][9][9] = 46, -+ [0][1][2][0][8][9] = 48, -+ [0][1][2][0][11][9] = 46, -+ [0][1][2][0][2][10] = 60, -+ [0][1][2][0][1][10] = 46, -+ [0][1][2][0][3][10] = 64, -+ [0][1][2][0][5][10] = 60, -+ [0][1][2][0][6][10] = 46, -+ [0][1][2][0][9][10] = 46, -+ [0][1][2][0][8][10] = 48, -+ [0][1][2][0][11][10] = 46, -+ [0][1][2][0][2][11] = 42, -+ [0][1][2][0][1][11] = 46, -+ [0][1][2][0][3][11] = 64, -+ [0][1][2][0][5][11] = 42, -+ [0][1][2][0][6][11] = 46, -+ [0][1][2][0][9][11] = 46, -+ [0][1][2][0][8][11] = 48, -+ [0][1][2][0][11][11] = 46, -+ [0][1][2][0][2][12] = 40, -+ [0][1][2][0][1][12] = 46, -+ [0][1][2][0][3][12] = 64, -+ [0][1][2][0][5][12] = 40, -+ [0][1][2][0][6][12] = 46, -+ [0][1][2][0][9][12] = 46, -+ [0][1][2][0][8][12] = 48, -+ [0][1][2][0][11][12] = 46, -+ [0][1][2][0][2][13] = 127, -+ [0][1][2][0][1][13] = 127, -+ [0][1][2][0][3][13] = 127, -+ [0][1][2][0][5][13] = 127, -+ [0][1][2][0][6][13] = 127, -+ [0][1][2][0][9][13] = 127, -+ [0][1][2][0][8][13] = 127, -+ [0][1][2][0][11][13] = 127, -+ [0][1][2][1][2][0] = 62, -+ [0][1][2][1][1][0] = 34, -+ [0][1][2][1][3][0] = 64, -+ [0][1][2][1][5][0] = 62, -+ [0][1][2][1][6][0] = 34, -+ [0][1][2][1][9][0] = 34, -+ [0][1][2][1][8][0] = 36, -+ [0][1][2][1][11][0] = 34, -+ [0][1][2][1][2][1] = 62, -+ [0][1][2][1][1][1] = 34, -+ [0][1][2][1][3][1] = 64, -+ [0][1][2][1][5][1] = 62, -+ [0][1][2][1][6][1] = 34, -+ [0][1][2][1][9][1] = 34, -+ [0][1][2][1][8][1] = 36, -+ [0][1][2][1][11][1] = 34, -+ [0][1][2][1][2][2] = 66, -+ [0][1][2][1][1][2] = 34, -+ [0][1][2][1][3][2] = 64, -+ [0][1][2][1][5][2] = 66, -+ [0][1][2][1][6][2] = 34, -+ [0][1][2][1][9][2] = 34, -+ [0][1][2][1][8][2] = 36, -+ [0][1][2][1][11][2] = 34, -+ [0][1][2][1][2][3] = 70, -+ [0][1][2][1][1][3] = 34, -+ [0][1][2][1][3][3] = 64, -+ [0][1][2][1][5][3] = 70, -+ [0][1][2][1][6][3] = 34, -+ [0][1][2][1][9][3] = 34, -+ [0][1][2][1][8][3] = 36, -+ [0][1][2][1][11][3] = 34, -+ [0][1][2][1][2][4] = 76, -+ [0][1][2][1][1][4] = 34, -+ [0][1][2][1][3][4] = 64, -+ [0][1][2][1][5][4] = 76, -+ [0][1][2][1][6][4] = 34, -+ [0][1][2][1][9][4] = 34, -+ [0][1][2][1][8][4] = 36, -+ [0][1][2][1][11][4] = 34, -+ [0][1][2][1][2][5] = 76, -+ [0][1][2][1][1][5] = 34, -+ [0][1][2][1][3][5] = 64, -+ [0][1][2][1][5][5] = 76, -+ [0][1][2][1][6][5] = 34, -+ [0][1][2][1][9][5] = 34, -+ [0][1][2][1][8][5] = 36, -+ [0][1][2][1][11][5] = 34, -+ [0][1][2][1][2][6] = 76, -+ [0][1][2][1][1][6] = 34, -+ [0][1][2][1][3][6] = 64, -+ [0][1][2][1][5][6] = 76, -+ [0][1][2][1][6][6] = 34, -+ [0][1][2][1][9][6] = 34, -+ [0][1][2][1][8][6] = 36, -+ [0][1][2][1][11][6] = 34, -+ [0][1][2][1][2][7] = 68, -+ [0][1][2][1][1][7] = 34, -+ [0][1][2][1][3][7] = 64, -+ [0][1][2][1][5][7] = 68, -+ [0][1][2][1][6][7] = 34, -+ [0][1][2][1][9][7] = 34, -+ [0][1][2][1][8][7] = 36, -+ [0][1][2][1][11][7] = 34, -+ [0][1][2][1][2][8] = 64, -+ [0][1][2][1][1][8] = 34, -+ [0][1][2][1][3][8] = 64, -+ [0][1][2][1][5][8] = 64, -+ [0][1][2][1][6][8] = 34, -+ [0][1][2][1][9][8] = 34, -+ [0][1][2][1][8][8] = 36, -+ [0][1][2][1][11][8] = 34, -+ [0][1][2][1][2][9] = 60, -+ [0][1][2][1][1][9] = 34, -+ [0][1][2][1][3][9] = 64, -+ [0][1][2][1][5][9] = 60, -+ [0][1][2][1][6][9] = 34, -+ [0][1][2][1][9][9] = 34, -+ [0][1][2][1][8][9] = 36, -+ [0][1][2][1][11][9] = 34, -+ [0][1][2][1][2][10] = 60, -+ [0][1][2][1][1][10] = 34, -+ [0][1][2][1][3][10] = 64, -+ [0][1][2][1][5][10] = 60, -+ [0][1][2][1][6][10] = 34, -+ [0][1][2][1][9][10] = 34, -+ [0][1][2][1][8][10] = 36, -+ [0][1][2][1][11][10] = 34, -+ [0][1][2][1][2][11] = 42, -+ [0][1][2][1][1][11] = 34, -+ [0][1][2][1][3][11] = 64, -+ [0][1][2][1][5][11] = 42, -+ [0][1][2][1][6][11] = 34, -+ [0][1][2][1][9][11] = 34, -+ [0][1][2][1][8][11] = 36, -+ [0][1][2][1][11][11] = 34, -+ [0][1][2][1][2][12] = 40, -+ [0][1][2][1][1][12] = 34, -+ [0][1][2][1][3][12] = 64, -+ [0][1][2][1][5][12] = 40, -+ [0][1][2][1][6][12] = 34, -+ [0][1][2][1][9][12] = 34, -+ [0][1][2][1][8][12] = 36, -+ [0][1][2][1][11][12] = 34, -+ [0][1][2][1][2][13] = 127, -+ [0][1][2][1][1][13] = 127, -+ [0][1][2][1][3][13] = 127, -+ [0][1][2][1][5][13] = 127, -+ [0][1][2][1][6][13] = 127, -+ [0][1][2][1][9][13] = 127, -+ [0][1][2][1][8][13] = 127, -+ [0][1][2][1][11][13] = 127, -+ [1][0][2][0][2][0] = 127, -+ [1][0][2][0][1][0] = 127, -+ [1][0][2][0][3][0] = 127, -+ [1][0][2][0][5][0] = 127, -+ [1][0][2][0][6][0] = 127, -+ [1][0][2][0][9][0] = 127, -+ [1][0][2][0][8][0] = 127, -+ [1][0][2][0][11][0] = 127, -+ [1][0][2][0][2][1] = 127, -+ [1][0][2][0][1][1] = 127, -+ [1][0][2][0][3][1] = 127, -+ [1][0][2][0][5][1] = 127, -+ [1][0][2][0][6][1] = 127, -+ [1][0][2][0][9][1] = 127, -+ [1][0][2][0][8][1] = 127, -+ [1][0][2][0][11][1] = 127, -+ [1][0][2][0][2][2] = 56, -+ [1][0][2][0][1][2] = 58, -+ [1][0][2][0][3][2] = 76, -+ [1][0][2][0][5][2] = 56, -+ [1][0][2][0][6][2] = 58, -+ [1][0][2][0][9][2] = 58, -+ [1][0][2][0][8][2] = 60, -+ [1][0][2][0][11][2] = 58, -+ [1][0][2][0][2][3] = 56, -+ [1][0][2][0][1][3] = 58, -+ [1][0][2][0][3][3] = 76, -+ [1][0][2][0][5][3] = 56, -+ [1][0][2][0][6][3] = 58, -+ [1][0][2][0][9][3] = 58, -+ [1][0][2][0][8][3] = 60, -+ [1][0][2][0][11][3] = 58, -+ [1][0][2][0][2][4] = 60, -+ [1][0][2][0][1][4] = 58, -+ [1][0][2][0][3][4] = 76, -+ [1][0][2][0][5][4] = 60, -+ [1][0][2][0][6][4] = 58, -+ [1][0][2][0][9][4] = 58, -+ [1][0][2][0][8][4] = 60, -+ [1][0][2][0][11][4] = 58, -+ [1][0][2][0][2][5] = 64, -+ [1][0][2][0][1][5] = 58, -+ [1][0][2][0][3][5] = 76, -+ [1][0][2][0][5][5] = 64, -+ [1][0][2][0][6][5] = 58, -+ [1][0][2][0][9][5] = 58, -+ [1][0][2][0][8][5] = 60, -+ [1][0][2][0][11][5] = 58, -+ [1][0][2][0][2][6] = 54, -+ [1][0][2][0][1][6] = 58, -+ [1][0][2][0][3][6] = 76, -+ [1][0][2][0][5][6] = 54, -+ [1][0][2][0][6][6] = 58, -+ [1][0][2][0][9][6] = 58, -+ [1][0][2][0][8][6] = 60, -+ [1][0][2][0][11][6] = 58, -+ [1][0][2][0][2][7] = 50, -+ [1][0][2][0][1][7] = 58, -+ [1][0][2][0][3][7] = 76, -+ [1][0][2][0][5][7] = 50, -+ [1][0][2][0][6][7] = 58, -+ [1][0][2][0][9][7] = 58, -+ [1][0][2][0][8][7] = 60, -+ [1][0][2][0][11][7] = 58, -+ [1][0][2][0][2][8] = 50, -+ [1][0][2][0][1][8] = 58, -+ [1][0][2][0][3][8] = 76, -+ [1][0][2][0][5][8] = 50, -+ [1][0][2][0][6][8] = 58, -+ [1][0][2][0][9][8] = 58, -+ [1][0][2][0][8][8] = 60, -+ [1][0][2][0][11][8] = 58, -+ [1][0][2][0][2][9] = 42, -+ [1][0][2][0][1][9] = 58, -+ [1][0][2][0][3][9] = 76, -+ [1][0][2][0][5][9] = 42, -+ [1][0][2][0][6][9] = 58, -+ [1][0][2][0][9][9] = 58, -+ [1][0][2][0][8][9] = 60, -+ [1][0][2][0][11][9] = 58, -+ [1][0][2][0][2][10] = 40, -+ [1][0][2][0][1][10] = 58, -+ [1][0][2][0][3][10] = 76, -+ [1][0][2][0][5][10] = 40, -+ [1][0][2][0][6][10] = 58, -+ [1][0][2][0][9][10] = 58, -+ [1][0][2][0][8][10] = 60, -+ [1][0][2][0][11][10] = 58, -+ [1][0][2][0][2][11] = 127, -+ [1][0][2][0][1][11] = 127, -+ [1][0][2][0][3][11] = 127, -+ [1][0][2][0][5][11] = 127, -+ [1][0][2][0][6][11] = 127, -+ [1][0][2][0][9][11] = 127, -+ [1][0][2][0][8][11] = 127, -+ [1][0][2][0][11][11] = 127, -+ [1][0][2][0][2][12] = 127, -+ [1][0][2][0][1][12] = 127, -+ [1][0][2][0][3][12] = 127, -+ [1][0][2][0][5][12] = 127, -+ [1][0][2][0][6][12] = 127, -+ [1][0][2][0][9][12] = 127, -+ [1][0][2][0][8][12] = 127, -+ [1][0][2][0][11][12] = 127, -+ [1][0][2][0][2][13] = 127, -+ [1][0][2][0][1][13] = 127, -+ [1][0][2][0][3][13] = 127, -+ [1][0][2][0][5][13] = 127, -+ [1][0][2][0][6][13] = 127, -+ [1][0][2][0][9][13] = 127, -+ [1][0][2][0][8][13] = 127, -+ [1][0][2][0][11][13] = 127, -+ [1][1][2][0][2][0] = 127, -+ [1][1][2][0][1][0] = 127, -+ [1][1][2][0][3][0] = 127, -+ [1][1][2][0][5][0] = 127, -+ [1][1][2][0][6][0] = 127, -+ [1][1][2][0][9][0] = 127, -+ [1][1][2][0][8][0] = 127, -+ [1][1][2][0][11][0] = 127, -+ [1][1][2][0][2][1] = 127, -+ [1][1][2][0][1][1] = 127, -+ [1][1][2][0][3][1] = 127, -+ [1][1][2][0][5][1] = 127, -+ [1][1][2][0][6][1] = 127, -+ [1][1][2][0][9][1] = 127, -+ [1][1][2][0][8][1] = 127, -+ [1][1][2][0][11][1] = 127, -+ [1][1][2][0][2][2] = 52, -+ [1][1][2][0][1][2] = 46, -+ [1][1][2][0][3][2] = 64, -+ [1][1][2][0][5][2] = 52, -+ [1][1][2][0][6][2] = 46, -+ [1][1][2][0][9][2] = 46, -+ [1][1][2][0][8][2] = 48, -+ [1][1][2][0][11][2] = 46, -+ [1][1][2][0][2][3] = 52, -+ [1][1][2][0][1][3] = 46, -+ [1][1][2][0][3][3] = 64, -+ [1][1][2][0][5][3] = 52, -+ [1][1][2][0][6][3] = 46, -+ [1][1][2][0][9][3] = 46, -+ [1][1][2][0][8][3] = 48, -+ [1][1][2][0][11][3] = 46, -+ [1][1][2][0][2][4] = 56, -+ [1][1][2][0][1][4] = 46, -+ [1][1][2][0][3][4] = 64, -+ [1][1][2][0][5][4] = 56, -+ [1][1][2][0][6][4] = 46, -+ [1][1][2][0][9][4] = 46, -+ [1][1][2][0][8][4] = 48, -+ [1][1][2][0][11][4] = 46, -+ [1][1][2][0][2][5] = 60, -+ [1][1][2][0][1][5] = 46, -+ [1][1][2][0][3][5] = 64, -+ [1][1][2][0][5][5] = 60, -+ [1][1][2][0][6][5] = 46, -+ [1][1][2][0][9][5] = 46, -+ [1][1][2][0][8][5] = 48, -+ [1][1][2][0][11][5] = 46, -+ [1][1][2][0][2][6] = 54, -+ [1][1][2][0][1][6] = 46, -+ [1][1][2][0][3][6] = 64, -+ [1][1][2][0][5][6] = 52, -+ [1][1][2][0][6][6] = 46, -+ [1][1][2][0][9][6] = 46, -+ [1][1][2][0][8][6] = 48, -+ [1][1][2][0][11][6] = 46, -+ [1][1][2][0][2][7] = 50, -+ [1][1][2][0][1][7] = 46, -+ [1][1][2][0][3][7] = 64, -+ [1][1][2][0][5][7] = 48, -+ [1][1][2][0][6][7] = 46, -+ [1][1][2][0][9][7] = 46, -+ [1][1][2][0][8][7] = 48, -+ [1][1][2][0][11][7] = 46, -+ [1][1][2][0][2][8] = 50, -+ [1][1][2][0][1][8] = 46, -+ [1][1][2][0][3][8] = 64, -+ [1][1][2][0][5][8] = 48, -+ [1][1][2][0][6][8] = 46, -+ [1][1][2][0][9][8] = 46, -+ [1][1][2][0][8][8] = 48, -+ [1][1][2][0][11][8] = 46, -+ [1][1][2][0][2][9] = 38, -+ [1][1][2][0][1][9] = 46, -+ [1][1][2][0][3][9] = 64, -+ [1][1][2][0][5][9] = 38, -+ [1][1][2][0][6][9] = 46, -+ [1][1][2][0][9][9] = 46, -+ [1][1][2][0][8][9] = 48, -+ [1][1][2][0][11][9] = 46, -+ [1][1][2][0][2][10] = 36, -+ [1][1][2][0][1][10] = 46, -+ [1][1][2][0][3][10] = 64, -+ [1][1][2][0][5][10] = 36, -+ [1][1][2][0][6][10] = 46, -+ [1][1][2][0][9][10] = 46, -+ [1][1][2][0][8][10] = 48, -+ [1][1][2][0][11][10] = 46, -+ [1][1][2][0][2][11] = 127, -+ [1][1][2][0][1][11] = 127, -+ [1][1][2][0][3][11] = 127, -+ [1][1][2][0][5][11] = 127, -+ [1][1][2][0][6][11] = 127, -+ [1][1][2][0][9][11] = 127, -+ [1][1][2][0][8][11] = 127, -+ [1][1][2][0][11][11] = 127, -+ [1][1][2][0][2][12] = 127, -+ [1][1][2][0][1][12] = 127, -+ [1][1][2][0][3][12] = 127, -+ [1][1][2][0][5][12] = 127, -+ [1][1][2][0][6][12] = 127, -+ [1][1][2][0][9][12] = 127, -+ [1][1][2][0][8][12] = 127, -+ [1][1][2][0][11][12] = 127, -+ [1][1][2][0][2][13] = 127, -+ [1][1][2][0][1][13] = 127, -+ [1][1][2][0][3][13] = 127, -+ [1][1][2][0][5][13] = 127, -+ [1][1][2][0][6][13] = 127, -+ [1][1][2][0][9][13] = 127, -+ [1][1][2][0][8][13] = 127, -+ [1][1][2][0][11][13] = 127, -+ [1][1][2][1][2][0] = 127, -+ [1][1][2][1][1][0] = 127, -+ [1][1][2][1][3][0] = 127, -+ [1][1][2][1][5][0] = 127, -+ [1][1][2][1][6][0] = 127, -+ [1][1][2][1][9][0] = 127, -+ [1][1][2][1][8][0] = 127, -+ [1][1][2][1][11][0] = 127, -+ [1][1][2][1][2][1] = 127, -+ [1][1][2][1][1][1] = 127, -+ [1][1][2][1][3][1] = 127, -+ [1][1][2][1][5][1] = 127, -+ [1][1][2][1][6][1] = 127, -+ [1][1][2][1][9][1] = 127, -+ [1][1][2][1][8][1] = 127, -+ [1][1][2][1][11][1] = 127, -+ [1][1][2][1][2][2] = 52, -+ [1][1][2][1][1][2] = 34, -+ [1][1][2][1][3][2] = 64, -+ [1][1][2][1][5][2] = 52, -+ [1][1][2][1][6][2] = 34, -+ [1][1][2][1][9][2] = 34, -+ [1][1][2][1][8][2] = 36, -+ [1][1][2][1][11][2] = 34, -+ [1][1][2][1][2][3] = 52, -+ [1][1][2][1][1][3] = 34, -+ [1][1][2][1][3][3] = 64, -+ [1][1][2][1][5][3] = 52, -+ [1][1][2][1][6][3] = 34, -+ [1][1][2][1][9][3] = 34, -+ [1][1][2][1][8][3] = 36, -+ [1][1][2][1][11][3] = 34, -+ [1][1][2][1][2][4] = 56, -+ [1][1][2][1][1][4] = 34, -+ [1][1][2][1][3][4] = 64, -+ [1][1][2][1][5][4] = 56, -+ [1][1][2][1][6][4] = 34, -+ [1][1][2][1][9][4] = 34, -+ [1][1][2][1][8][4] = 36, -+ [1][1][2][1][11][4] = 34, -+ [1][1][2][1][2][5] = 60, -+ [1][1][2][1][1][5] = 34, -+ [1][1][2][1][3][5] = 64, -+ [1][1][2][1][5][5] = 60, -+ [1][1][2][1][6][5] = 34, -+ [1][1][2][1][9][5] = 34, -+ [1][1][2][1][8][5] = 36, -+ [1][1][2][1][11][5] = 34, -+ [1][1][2][1][2][6] = 54, -+ [1][1][2][1][1][6] = 34, -+ [1][1][2][1][3][6] = 64, -+ [1][1][2][1][5][6] = 52, -+ [1][1][2][1][6][6] = 34, -+ [1][1][2][1][9][6] = 34, -+ [1][1][2][1][8][6] = 36, -+ [1][1][2][1][11][6] = 34, -+ [1][1][2][1][2][7] = 50, -+ [1][1][2][1][1][7] = 34, -+ [1][1][2][1][3][7] = 64, -+ [1][1][2][1][5][7] = 48, -+ [1][1][2][1][6][7] = 34, -+ [1][1][2][1][9][7] = 34, -+ [1][1][2][1][8][7] = 36, -+ [1][1][2][1][11][7] = 34, -+ [1][1][2][1][2][8] = 50, -+ [1][1][2][1][1][8] = 34, -+ [1][1][2][1][3][8] = 64, -+ [1][1][2][1][5][8] = 48, -+ [1][1][2][1][6][8] = 34, -+ [1][1][2][1][9][8] = 34, -+ [1][1][2][1][8][8] = 36, -+ [1][1][2][1][11][8] = 34, -+ [1][1][2][1][2][9] = 38, -+ [1][1][2][1][1][9] = 34, -+ [1][1][2][1][3][9] = 64, -+ [1][1][2][1][5][9] = 38, -+ [1][1][2][1][6][9] = 34, -+ [1][1][2][1][9][9] = 34, -+ [1][1][2][1][8][9] = 36, -+ [1][1][2][1][11][9] = 34, -+ [1][1][2][1][2][10] = 36, -+ [1][1][2][1][1][10] = 34, -+ [1][1][2][1][3][10] = 64, -+ [1][1][2][1][5][10] = 36, -+ [1][1][2][1][6][10] = 34, -+ [1][1][2][1][9][10] = 34, -+ [1][1][2][1][8][10] = 36, -+ [1][1][2][1][11][10] = 34, -+ [1][1][2][1][2][11] = 127, -+ [1][1][2][1][1][11] = 127, -+ [1][1][2][1][3][11] = 127, -+ [1][1][2][1][5][11] = 127, -+ [1][1][2][1][6][11] = 127, -+ [1][1][2][1][9][11] = 127, -+ [1][1][2][1][8][11] = 127, -+ [1][1][2][1][11][11] = 127, -+ [1][1][2][1][2][12] = 127, -+ [1][1][2][1][1][12] = 127, -+ [1][1][2][1][3][12] = 127, -+ [1][1][2][1][5][12] = 127, -+ [1][1][2][1][6][12] = 127, -+ [1][1][2][1][9][12] = 127, -+ [1][1][2][1][8][12] = 127, -+ [1][1][2][1][11][12] = 127, -+ [1][1][2][1][2][13] = 127, -+ [1][1][2][1][1][13] = 127, -+ [1][1][2][1][3][13] = 127, -+ [1][1][2][1][5][13] = 127, -+ [1][1][2][1][6][13] = 127, -+ [1][1][2][1][9][13] = 127, -+ [1][1][2][1][8][13] = 127, -+ [1][1][2][1][11][13] = 127, -+}; -+ -+const s8 rtw89_8852a_txpwr_lmt_5g[RTW89_5G_BW_NUM][RTW89_NTX_NUM] -+ [RTW89_RS_LMT_NUM][RTW89_BF_NUM] -+ [RTW89_REGD_NUM][RTW89_5G_CH_NUM] = { -+ [0][0][1][0][0][0] = 30, -+ [0][0][1][0][0][2] = 30, -+ [0][0][1][0][0][4] = 30, -+ [0][0][1][0][0][6] = 30, -+ [0][0][1][0][0][8] = 52, -+ [0][0][1][0][0][10] = 52, -+ [0][0][1][0][0][12] = 52, -+ [0][0][1][0][0][14] = 52, -+ [0][0][1][0][0][15] = 52, -+ [0][0][1][0][0][17] = 52, -+ [0][0][1][0][0][19] = 52, -+ [0][0][1][0][0][21] = 52, -+ [0][0][1][0][0][23] = 52, -+ [0][0][1][0][0][25] = 52, -+ [0][0][1][0][0][27] = 52, -+ [0][0][1][0][0][29] = 52, -+ [0][0][1][0][0][31] = 52, -+ [0][0][1][0][0][33] = 52, -+ [0][0][1][0][0][35] = 52, -+ [0][0][1][0][0][37] = 54, -+ [0][0][1][0][0][38] = 28, -+ [0][0][1][0][0][40] = 28, -+ [0][0][1][0][0][42] = 28, -+ [0][0][1][0][0][44] = 28, -+ [0][0][1][0][0][46] = 28, -+ [0][1][1][0][0][0] = 18, -+ [0][1][1][0][0][2] = 18, -+ [0][1][1][0][0][4] = 18, -+ [0][1][1][0][0][6] = 18, -+ [0][1][1][0][0][8] = 40, -+ [0][1][1][0][0][10] = 40, -+ [0][1][1][0][0][12] = 40, -+ [0][1][1][0][0][14] = 40, -+ [0][1][1][0][0][15] = 40, -+ [0][1][1][0][0][17] = 40, -+ [0][1][1][0][0][19] = 40, -+ [0][1][1][0][0][21] = 40, -+ [0][1][1][0][0][23] = 40, -+ [0][1][1][0][0][25] = 40, -+ [0][1][1][0][0][27] = 40, -+ [0][1][1][0][0][29] = 40, -+ [0][1][1][0][0][31] = 40, -+ [0][1][1][0][0][33] = 40, -+ [0][1][1][0][0][35] = 40, -+ [0][1][1][0][0][37] = 42, -+ [0][1][1][0][0][38] = 16, -+ [0][1][1][0][0][40] = 16, -+ [0][1][1][0][0][42] = 16, -+ [0][1][1][0][0][44] = 16, -+ [0][1][1][0][0][46] = 16, -+ [0][0][2][0][0][0] = 30, -+ [0][0][2][0][0][2] = 30, -+ [0][0][2][0][0][4] = 30, -+ [0][0][2][0][0][6] = 30, -+ [0][0][2][0][0][8] = 52, -+ [0][0][2][0][0][10] = 52, -+ [0][0][2][0][0][12] = 52, -+ [0][0][2][0][0][14] = 52, -+ [0][0][2][0][0][15] = 52, -+ [0][0][2][0][0][17] = 52, -+ [0][0][2][0][0][19] = 52, -+ [0][0][2][0][0][21] = 52, -+ [0][0][2][0][0][23] = 52, -+ [0][0][2][0][0][25] = 52, -+ [0][0][2][0][0][27] = 52, -+ [0][0][2][0][0][29] = 52, -+ [0][0][2][0][0][31] = 52, -+ [0][0][2][0][0][33] = 52, -+ [0][0][2][0][0][35] = 52, -+ [0][0][2][0][0][37] = 54, -+ [0][0][2][0][0][38] = 28, -+ [0][0][2][0][0][40] = 28, -+ [0][0][2][0][0][42] = 28, -+ [0][0][2][0][0][44] = 28, -+ [0][0][2][0][0][46] = 28, -+ [0][1][2][0][0][0] = 18, -+ [0][1][2][0][0][2] = 18, -+ [0][1][2][0][0][4] = 18, -+ [0][1][2][0][0][6] = 18, -+ [0][1][2][0][0][8] = 40, -+ [0][1][2][0][0][10] = 40, -+ [0][1][2][0][0][12] = 40, -+ [0][1][2][0][0][14] = 40, -+ [0][1][2][0][0][15] = 40, -+ [0][1][2][0][0][17] = 40, -+ [0][1][2][0][0][19] = 40, -+ [0][1][2][0][0][21] = 40, -+ [0][1][2][0][0][23] = 40, -+ [0][1][2][0][0][25] = 40, -+ [0][1][2][0][0][27] = 40, -+ [0][1][2][0][0][29] = 40, -+ [0][1][2][0][0][31] = 40, -+ [0][1][2][0][0][33] = 40, -+ [0][1][2][0][0][35] = 40, -+ [0][1][2][0][0][37] = 42, -+ [0][1][2][0][0][38] = 16, -+ [0][1][2][0][0][40] = 16, -+ [0][1][2][0][0][42] = 16, -+ [0][1][2][0][0][44] = 16, -+ [0][1][2][0][0][46] = 16, -+ [0][1][2][1][0][0] = 6, -+ [0][1][2][1][0][2] = 6, -+ [0][1][2][1][0][4] = 6, -+ [0][1][2][1][0][6] = 6, -+ [0][1][2][1][0][8] = 28, -+ [0][1][2][1][0][10] = 28, -+ [0][1][2][1][0][12] = 28, -+ [0][1][2][1][0][14] = 28, -+ [0][1][2][1][0][15] = 28, -+ [0][1][2][1][0][17] = 28, -+ [0][1][2][1][0][19] = 28, -+ [0][1][2][1][0][21] = 28, -+ [0][1][2][1][0][23] = 28, -+ [0][1][2][1][0][25] = 28, -+ [0][1][2][1][0][27] = 28, -+ [0][1][2][1][0][29] = 28, -+ [0][1][2][1][0][31] = 28, -+ [0][1][2][1][0][33] = 28, -+ [0][1][2][1][0][35] = 28, -+ [0][1][2][1][0][37] = 30, -+ [0][1][2][1][0][38] = 4, -+ [0][1][2][1][0][40] = 4, -+ [0][1][2][1][0][42] = 4, -+ [0][1][2][1][0][44] = 4, -+ [0][1][2][1][0][46] = 4, -+ [1][0][2][0][0][1] = 30, -+ [1][0][2][0][0][5] = 30, -+ [1][0][2][0][0][9] = 52, -+ [1][0][2][0][0][13] = 52, -+ [1][0][2][0][0][16] = 52, -+ [1][0][2][0][0][20] = 52, -+ [1][0][2][0][0][24] = 52, -+ [1][0][2][0][0][28] = 52, -+ [1][0][2][0][0][32] = 52, -+ [1][0][2][0][0][36] = 54, -+ [1][0][2][0][0][39] = 28, -+ [1][0][2][0][0][43] = 28, -+ [1][1][2][0][0][1] = 18, -+ [1][1][2][0][0][5] = 18, -+ [1][1][2][0][0][9] = 40, -+ [1][1][2][0][0][13] = 40, -+ [1][1][2][0][0][16] = 40, -+ [1][1][2][0][0][20] = 40, -+ [1][1][2][0][0][24] = 40, -+ [1][1][2][0][0][28] = 40, -+ [1][1][2][0][0][32] = 40, -+ [1][1][2][0][0][36] = 42, -+ [1][1][2][0][0][39] = 16, -+ [1][1][2][0][0][43] = 16, -+ [1][1][2][1][0][1] = 6, -+ [1][1][2][1][0][5] = 6, -+ [1][1][2][1][0][9] = 28, -+ [1][1][2][1][0][13] = 28, -+ [1][1][2][1][0][16] = 28, -+ [1][1][2][1][0][20] = 28, -+ [1][1][2][1][0][24] = 28, -+ [1][1][2][1][0][28] = 28, -+ [1][1][2][1][0][32] = 28, -+ [1][1][2][1][0][36] = 30, -+ [1][1][2][1][0][39] = 4, -+ [1][1][2][1][0][43] = 4, -+ [2][0][2][0][0][3] = 30, -+ [2][0][2][0][0][11] = 52, -+ [2][0][2][0][0][18] = 52, -+ [2][0][2][0][0][26] = 52, -+ [2][0][2][0][0][34] = 54, -+ [2][0][2][0][0][41] = 28, -+ [2][1][2][0][0][3] = 18, -+ [2][1][2][0][0][11] = 40, -+ [2][1][2][0][0][18] = 40, -+ [2][1][2][0][0][26] = 40, -+ [2][1][2][0][0][34] = 42, -+ [2][1][2][0][0][41] = 16, -+ [2][1][2][1][0][3] = 6, -+ [2][1][2][1][0][11] = 28, -+ [2][1][2][1][0][18] = 28, -+ [2][1][2][1][0][26] = 28, -+ [2][1][2][1][0][34] = 30, -+ [2][1][2][1][0][41] = 4, -+ [0][0][1][0][2][0] = 76, -+ [0][0][1][0][1][0] = 58, -+ [0][0][1][0][3][0] = 62, -+ [0][0][1][0][5][0] = 62, -+ [0][0][1][0][6][0] = 58, -+ [0][0][1][0][9][0] = 58, -+ [0][0][1][0][8][0] = 30, -+ [0][0][1][0][11][0] = 52, -+ [0][0][1][0][2][2] = 76, -+ [0][0][1][0][1][2] = 58, -+ [0][0][1][0][3][2] = 62, -+ [0][0][1][0][5][2] = 62, -+ [0][0][1][0][6][2] = 58, -+ [0][0][1][0][9][2] = 58, -+ [0][0][1][0][8][2] = 30, -+ [0][0][1][0][11][2] = 52, -+ [0][0][1][0][2][4] = 76, -+ [0][0][1][0][1][4] = 58, -+ [0][0][1][0][3][4] = 62, -+ [0][0][1][0][5][4] = 62, -+ [0][0][1][0][6][4] = 58, -+ [0][0][1][0][9][4] = 58, -+ [0][0][1][0][8][4] = 30, -+ [0][0][1][0][11][4] = 52, -+ [0][0][1][0][2][6] = 76, -+ [0][0][1][0][1][6] = 58, -+ [0][0][1][0][3][6] = 62, -+ [0][0][1][0][5][6] = 62, -+ [0][0][1][0][6][6] = 54, -+ [0][0][1][0][9][6] = 58, -+ [0][0][1][0][8][6] = 30, -+ [0][0][1][0][11][6] = 52, -+ [0][0][1][0][2][8] = 76, -+ [0][0][1][0][1][8] = 58, -+ [0][0][1][0][3][8] = 62, -+ [0][0][1][0][5][8] = 64, -+ [0][0][1][0][6][8] = 58, -+ [0][0][1][0][9][8] = 58, -+ [0][0][1][0][8][8] = 54, -+ [0][0][1][0][11][8] = 52, -+ [0][0][1][0][2][10] = 76, -+ [0][0][1][0][1][10] = 58, -+ [0][0][1][0][3][10] = 62, -+ [0][0][1][0][5][10] = 64, -+ [0][0][1][0][6][10] = 58, -+ [0][0][1][0][9][10] = 58, -+ [0][0][1][0][8][10] = 54, -+ [0][0][1][0][11][10] = 52, -+ [0][0][1][0][2][12] = 76, -+ [0][0][1][0][1][12] = 58, -+ [0][0][1][0][3][12] = 62, -+ [0][0][1][0][5][12] = 64, -+ [0][0][1][0][6][12] = 58, -+ [0][0][1][0][9][12] = 58, -+ [0][0][1][0][8][12] = 54, -+ [0][0][1][0][11][12] = 52, -+ [0][0][1][0][2][14] = 76, -+ [0][0][1][0][1][14] = 58, -+ [0][0][1][0][3][14] = 62, -+ [0][0][1][0][5][14] = 64, -+ [0][0][1][0][6][14] = 58, -+ [0][0][1][0][9][14] = 58, -+ [0][0][1][0][8][14] = 54, -+ [0][0][1][0][11][14] = 52, -+ [0][0][1][0][2][15] = 76, -+ [0][0][1][0][1][15] = 58, -+ [0][0][1][0][3][15] = 76, -+ [0][0][1][0][5][15] = 76, -+ [0][0][1][0][6][15] = 58, -+ [0][0][1][0][9][15] = 58, -+ [0][0][1][0][8][15] = 54, -+ [0][0][1][0][11][15] = 52, -+ [0][0][1][0][2][17] = 76, -+ [0][0][1][0][1][17] = 58, -+ [0][0][1][0][3][17] = 76, -+ [0][0][1][0][5][17] = 76, -+ [0][0][1][0][6][17] = 58, -+ [0][0][1][0][9][17] = 58, -+ [0][0][1][0][8][17] = 54, -+ [0][0][1][0][11][17] = 52, -+ [0][0][1][0][2][19] = 76, -+ [0][0][1][0][1][19] = 58, -+ [0][0][1][0][3][19] = 76, -+ [0][0][1][0][5][19] = 76, -+ [0][0][1][0][6][19] = 58, -+ [0][0][1][0][9][19] = 58, -+ [0][0][1][0][8][19] = 54, -+ [0][0][1][0][11][19] = 52, -+ [0][0][1][0][2][21] = 76, -+ [0][0][1][0][1][21] = 58, -+ [0][0][1][0][3][21] = 76, -+ [0][0][1][0][5][21] = 76, -+ [0][0][1][0][6][21] = 58, -+ [0][0][1][0][9][21] = 58, -+ [0][0][1][0][8][21] = 54, -+ [0][0][1][0][11][21] = 52, -+ [0][0][1][0][2][23] = 76, -+ [0][0][1][0][1][23] = 58, -+ [0][0][1][0][3][23] = 76, -+ [0][0][1][0][5][23] = 76, -+ [0][0][1][0][6][23] = 58, -+ [0][0][1][0][9][23] = 58, -+ [0][0][1][0][8][23] = 54, -+ [0][0][1][0][11][23] = 52, -+ [0][0][1][0][2][25] = 76, -+ [0][0][1][0][1][25] = 58, -+ [0][0][1][0][3][25] = 76, -+ [0][0][1][0][5][25] = 127, -+ [0][0][1][0][6][25] = 58, -+ [0][0][1][0][9][25] = 127, -+ [0][0][1][0][8][25] = 54, -+ [0][0][1][0][11][25] = 52, -+ [0][0][1][0][2][27] = 76, -+ [0][0][1][0][1][27] = 58, -+ [0][0][1][0][3][27] = 76, -+ [0][0][1][0][5][27] = 127, -+ [0][0][1][0][6][27] = 58, -+ [0][0][1][0][9][27] = 127, -+ [0][0][1][0][8][27] = 54, -+ [0][0][1][0][11][27] = 52, -+ [0][0][1][0][2][29] = 76, -+ [0][0][1][0][1][29] = 58, -+ [0][0][1][0][3][29] = 76, -+ [0][0][1][0][5][29] = 127, -+ [0][0][1][0][6][29] = 58, -+ [0][0][1][0][9][29] = 127, -+ [0][0][1][0][8][29] = 54, -+ [0][0][1][0][11][29] = 52, -+ [0][0][1][0][2][31] = 76, -+ [0][0][1][0][1][31] = 58, -+ [0][0][1][0][3][31] = 76, -+ [0][0][1][0][5][31] = 76, -+ [0][0][1][0][6][31] = 58, -+ [0][0][1][0][9][31] = 58, -+ [0][0][1][0][8][31] = 54, -+ [0][0][1][0][11][31] = 52, -+ [0][0][1][0][2][33] = 76, -+ [0][0][1][0][1][33] = 58, -+ [0][0][1][0][3][33] = 76, -+ [0][0][1][0][5][33] = 76, -+ [0][0][1][0][6][33] = 58, -+ [0][0][1][0][9][33] = 58, -+ [0][0][1][0][8][33] = 54, -+ [0][0][1][0][11][33] = 52, -+ [0][0][1][0][2][35] = 74, -+ [0][0][1][0][1][35] = 58, -+ [0][0][1][0][3][35] = 76, -+ [0][0][1][0][5][35] = 74, -+ [0][0][1][0][6][35] = 58, -+ [0][0][1][0][9][35] = 58, -+ [0][0][1][0][8][35] = 54, -+ [0][0][1][0][11][35] = 52, -+ [0][0][1][0][2][37] = 76, -+ [0][0][1][0][1][37] = 127, -+ [0][0][1][0][3][37] = 76, -+ [0][0][1][0][5][37] = 76, -+ [0][0][1][0][6][37] = 58, -+ [0][0][1][0][9][37] = 76, -+ [0][0][1][0][8][37] = 54, -+ [0][0][1][0][11][37] = 127, -+ [0][0][1][0][2][38] = 76, -+ [0][0][1][0][1][38] = 28, -+ [0][0][1][0][3][38] = 127, -+ [0][0][1][0][5][38] = 76, -+ [0][0][1][0][6][38] = 28, -+ [0][0][1][0][9][38] = 76, -+ [0][0][1][0][8][38] = 54, -+ [0][0][1][0][11][38] = 52, -+ [0][0][1][0][2][40] = 76, -+ [0][0][1][0][1][40] = 28, -+ [0][0][1][0][3][40] = 127, -+ [0][0][1][0][5][40] = 76, -+ [0][0][1][0][6][40] = 28, -+ [0][0][1][0][9][40] = 76, -+ [0][0][1][0][8][40] = 54, -+ [0][0][1][0][11][40] = 52, -+ [0][0][1][0][2][42] = 76, -+ [0][0][1][0][1][42] = 28, -+ [0][0][1][0][3][42] = 127, -+ [0][0][1][0][5][42] = 76, -+ [0][0][1][0][6][42] = 28, -+ [0][0][1][0][9][42] = 76, -+ [0][0][1][0][8][42] = 54, -+ [0][0][1][0][11][42] = 52, -+ [0][0][1][0][2][44] = 76, -+ [0][0][1][0][1][44] = 28, -+ [0][0][1][0][3][44] = 127, -+ [0][0][1][0][5][44] = 76, -+ [0][0][1][0][6][44] = 28, -+ [0][0][1][0][9][44] = 76, -+ [0][0][1][0][8][44] = 54, -+ [0][0][1][0][11][44] = 52, -+ [0][0][1][0][2][46] = 76, -+ [0][0][1][0][1][46] = 28, -+ [0][0][1][0][3][46] = 127, -+ [0][0][1][0][5][46] = 76, -+ [0][0][1][0][6][46] = 28, -+ [0][0][1][0][9][46] = 76, -+ [0][0][1][0][8][46] = 54, -+ [0][0][1][0][11][46] = 52, -+ [0][1][1][0][2][0] = 68, -+ [0][1][1][0][1][0] = 46, -+ [0][1][1][0][3][0] = 50, -+ [0][1][1][0][5][0] = 40, -+ [0][1][1][0][6][0] = 46, -+ [0][1][1][0][9][0] = 46, -+ [0][1][1][0][8][0] = 18, -+ [0][1][1][0][11][0] = 40, -+ [0][1][1][0][2][2] = 68, -+ [0][1][1][0][1][2] = 46, -+ [0][1][1][0][3][2] = 50, -+ [0][1][1][0][5][2] = 40, -+ [0][1][1][0][6][2] = 46, -+ [0][1][1][0][9][2] = 46, -+ [0][1][1][0][8][2] = 18, -+ [0][1][1][0][11][2] = 40, -+ [0][1][1][0][2][4] = 68, -+ [0][1][1][0][1][4] = 46, -+ [0][1][1][0][3][4] = 50, -+ [0][1][1][0][5][4] = 40, -+ [0][1][1][0][6][4] = 46, -+ [0][1][1][0][9][4] = 46, -+ [0][1][1][0][8][4] = 18, -+ [0][1][1][0][11][4] = 40, -+ [0][1][1][0][2][6] = 68, -+ [0][1][1][0][1][6] = 46, -+ [0][1][1][0][3][6] = 50, -+ [0][1][1][0][5][6] = 40, -+ [0][1][1][0][6][6] = 36, -+ [0][1][1][0][9][6] = 46, -+ [0][1][1][0][8][6] = 18, -+ [0][1][1][0][11][6] = 40, -+ [0][1][1][0][2][8] = 68, -+ [0][1][1][0][1][8] = 46, -+ [0][1][1][0][3][8] = 50, -+ [0][1][1][0][5][8] = 52, -+ [0][1][1][0][6][8] = 46, -+ [0][1][1][0][9][8] = 46, -+ [0][1][1][0][8][8] = 42, -+ [0][1][1][0][11][8] = 40, -+ [0][1][1][0][2][10] = 68, -+ [0][1][1][0][1][10] = 46, -+ [0][1][1][0][3][10] = 50, -+ [0][1][1][0][5][10] = 52, -+ [0][1][1][0][6][10] = 46, -+ [0][1][1][0][9][10] = 46, -+ [0][1][1][0][8][10] = 42, -+ [0][1][1][0][11][10] = 40, -+ [0][1][1][0][2][12] = 68, -+ [0][1][1][0][1][12] = 46, -+ [0][1][1][0][3][12] = 50, -+ [0][1][1][0][5][12] = 52, -+ [0][1][1][0][6][12] = 46, -+ [0][1][1][0][9][12] = 46, -+ [0][1][1][0][8][12] = 42, -+ [0][1][1][0][11][12] = 40, -+ [0][1][1][0][2][14] = 68, -+ [0][1][1][0][1][14] = 46, -+ [0][1][1][0][3][14] = 50, -+ [0][1][1][0][5][14] = 52, -+ [0][1][1][0][6][14] = 46, -+ [0][1][1][0][9][14] = 46, -+ [0][1][1][0][8][14] = 42, -+ [0][1][1][0][11][14] = 40, -+ [0][1][1][0][2][15] = 68, -+ [0][1][1][0][1][15] = 46, -+ [0][1][1][0][3][15] = 70, -+ [0][1][1][0][5][15] = 68, -+ [0][1][1][0][6][15] = 46, -+ [0][1][1][0][9][15] = 46, -+ [0][1][1][0][8][15] = 42, -+ [0][1][1][0][11][15] = 40, -+ [0][1][1][0][2][17] = 68, -+ [0][1][1][0][1][17] = 46, -+ [0][1][1][0][3][17] = 70, -+ [0][1][1][0][5][17] = 68, -+ [0][1][1][0][6][17] = 46, -+ [0][1][1][0][9][17] = 46, -+ [0][1][1][0][8][17] = 42, -+ [0][1][1][0][11][17] = 40, -+ [0][1][1][0][2][19] = 68, -+ [0][1][1][0][1][19] = 46, -+ [0][1][1][0][3][19] = 70, -+ [0][1][1][0][5][19] = 68, -+ [0][1][1][0][6][19] = 46, -+ [0][1][1][0][9][19] = 46, -+ [0][1][1][0][8][19] = 42, -+ [0][1][1][0][11][19] = 40, -+ [0][1][1][0][2][21] = 68, -+ [0][1][1][0][1][21] = 46, -+ [0][1][1][0][3][21] = 70, -+ [0][1][1][0][5][21] = 68, -+ [0][1][1][0][6][21] = 46, -+ [0][1][1][0][9][21] = 46, -+ [0][1][1][0][8][21] = 42, -+ [0][1][1][0][11][21] = 40, -+ [0][1][1][0][2][23] = 68, -+ [0][1][1][0][1][23] = 46, -+ [0][1][1][0][3][23] = 70, -+ [0][1][1][0][5][23] = 68, -+ [0][1][1][0][6][23] = 46, -+ [0][1][1][0][9][23] = 46, -+ [0][1][1][0][8][23] = 42, -+ [0][1][1][0][11][23] = 40, -+ [0][1][1][0][2][25] = 68, -+ [0][1][1][0][1][25] = 46, -+ [0][1][1][0][3][25] = 70, -+ [0][1][1][0][5][25] = 127, -+ [0][1][1][0][6][25] = 46, -+ [0][1][1][0][9][25] = 127, -+ [0][1][1][0][8][25] = 42, -+ [0][1][1][0][11][25] = 40, -+ [0][1][1][0][2][27] = 68, -+ [0][1][1][0][1][27] = 46, -+ [0][1][1][0][3][27] = 70, -+ [0][1][1][0][5][27] = 127, -+ [0][1][1][0][6][27] = 46, -+ [0][1][1][0][9][27] = 127, -+ [0][1][1][0][8][27] = 42, -+ [0][1][1][0][11][27] = 40, -+ [0][1][1][0][2][29] = 68, -+ [0][1][1][0][1][29] = 46, -+ [0][1][1][0][3][29] = 70, -+ [0][1][1][0][5][29] = 127, -+ [0][1][1][0][6][29] = 46, -+ [0][1][1][0][9][29] = 127, -+ [0][1][1][0][8][29] = 42, -+ [0][1][1][0][11][29] = 40, -+ [0][1][1][0][2][31] = 68, -+ [0][1][1][0][1][31] = 46, -+ [0][1][1][0][3][31] = 70, -+ [0][1][1][0][5][31] = 68, -+ [0][1][1][0][6][31] = 46, -+ [0][1][1][0][9][31] = 46, -+ [0][1][1][0][8][31] = 42, -+ [0][1][1][0][11][31] = 40, -+ [0][1][1][0][2][33] = 68, -+ [0][1][1][0][1][33] = 46, -+ [0][1][1][0][3][33] = 70, -+ [0][1][1][0][5][33] = 68, -+ [0][1][1][0][6][33] = 46, -+ [0][1][1][0][9][33] = 46, -+ [0][1][1][0][8][33] = 42, -+ [0][1][1][0][11][33] = 40, -+ [0][1][1][0][2][35] = 66, -+ [0][1][1][0][1][35] = 46, -+ [0][1][1][0][3][35] = 70, -+ [0][1][1][0][5][35] = 66, -+ [0][1][1][0][6][35] = 46, -+ [0][1][1][0][9][35] = 46, -+ [0][1][1][0][8][35] = 42, -+ [0][1][1][0][11][35] = 40, -+ [0][1][1][0][2][37] = 68, -+ [0][1][1][0][1][37] = 127, -+ [0][1][1][0][3][37] = 70, -+ [0][1][1][0][5][37] = 68, -+ [0][1][1][0][6][37] = 46, -+ [0][1][1][0][9][37] = 68, -+ [0][1][1][0][8][37] = 42, -+ [0][1][1][0][11][37] = 127, -+ [0][1][1][0][2][38] = 76, -+ [0][1][1][0][1][38] = 16, -+ [0][1][1][0][3][38] = 127, -+ [0][1][1][0][5][38] = 76, -+ [0][1][1][0][6][38] = 16, -+ [0][1][1][0][9][38] = 76, -+ [0][1][1][0][8][38] = 42, -+ [0][1][1][0][11][38] = 40, -+ [0][1][1][0][2][40] = 76, -+ [0][1][1][0][1][40] = 16, -+ [0][1][1][0][3][40] = 127, -+ [0][1][1][0][5][40] = 76, -+ [0][1][1][0][6][40] = 16, -+ [0][1][1][0][9][40] = 76, -+ [0][1][1][0][8][40] = 42, -+ [0][1][1][0][11][40] = 40, -+ [0][1][1][0][2][42] = 76, -+ [0][1][1][0][1][42] = 16, -+ [0][1][1][0][3][42] = 127, -+ [0][1][1][0][5][42] = 76, -+ [0][1][1][0][6][42] = 16, -+ [0][1][1][0][9][42] = 76, -+ [0][1][1][0][8][42] = 42, -+ [0][1][1][0][11][42] = 40, -+ [0][1][1][0][2][44] = 76, -+ [0][1][1][0][1][44] = 16, -+ [0][1][1][0][3][44] = 127, -+ [0][1][1][0][5][44] = 76, -+ [0][1][1][0][6][44] = 16, -+ [0][1][1][0][9][44] = 76, -+ [0][1][1][0][8][44] = 42, -+ [0][1][1][0][11][44] = 40, -+ [0][1][1][0][2][46] = 76, -+ [0][1][1][0][1][46] = 16, -+ [0][1][1][0][3][46] = 127, -+ [0][1][1][0][5][46] = 76, -+ [0][1][1][0][6][46] = 16, -+ [0][1][1][0][9][46] = 76, -+ [0][1][1][0][8][46] = 42, -+ [0][1][1][0][11][46] = 40, -+ [0][0][2][0][2][0] = 76, -+ [0][0][2][0][1][0] = 58, -+ [0][0][2][0][3][0] = 62, -+ [0][0][2][0][5][0] = 62, -+ [0][0][2][0][6][0] = 58, -+ [0][0][2][0][9][0] = 58, -+ [0][0][2][0][8][0] = 30, -+ [0][0][2][0][11][0] = 52, -+ [0][0][2][0][2][2] = 76, -+ [0][0][2][0][1][2] = 58, -+ [0][0][2][0][3][2] = 62, -+ [0][0][2][0][5][2] = 62, -+ [0][0][2][0][6][2] = 58, -+ [0][0][2][0][9][2] = 58, -+ [0][0][2][0][8][2] = 30, -+ [0][0][2][0][11][2] = 52, -+ [0][0][2][0][2][4] = 76, -+ [0][0][2][0][1][4] = 58, -+ [0][0][2][0][3][4] = 62, -+ [0][0][2][0][5][4] = 62, -+ [0][0][2][0][6][4] = 58, -+ [0][0][2][0][9][4] = 58, -+ [0][0][2][0][8][4] = 30, -+ [0][0][2][0][11][4] = 52, -+ [0][0][2][0][2][6] = 76, -+ [0][0][2][0][1][6] = 58, -+ [0][0][2][0][3][6] = 62, -+ [0][0][2][0][5][6] = 62, -+ [0][0][2][0][6][6] = 54, -+ [0][0][2][0][9][6] = 58, -+ [0][0][2][0][8][6] = 30, -+ [0][0][2][0][11][6] = 52, -+ [0][0][2][0][2][8] = 76, -+ [0][0][2][0][1][8] = 58, -+ [0][0][2][0][3][8] = 62, -+ [0][0][2][0][5][8] = 64, -+ [0][0][2][0][6][8] = 58, -+ [0][0][2][0][9][8] = 58, -+ [0][0][2][0][8][8] = 54, -+ [0][0][2][0][11][8] = 52, -+ [0][0][2][0][2][10] = 76, -+ [0][0][2][0][1][10] = 58, -+ [0][0][2][0][3][10] = 62, -+ [0][0][2][0][5][10] = 64, -+ [0][0][2][0][6][10] = 58, -+ [0][0][2][0][9][10] = 58, -+ [0][0][2][0][8][10] = 54, -+ [0][0][2][0][11][10] = 52, -+ [0][0][2][0][2][12] = 76, -+ [0][0][2][0][1][12] = 58, -+ [0][0][2][0][3][12] = 62, -+ [0][0][2][0][5][12] = 64, -+ [0][0][2][0][6][12] = 58, -+ [0][0][2][0][9][12] = 58, -+ [0][0][2][0][8][12] = 54, -+ [0][0][2][0][11][12] = 52, -+ [0][0][2][0][2][14] = 76, -+ [0][0][2][0][1][14] = 58, -+ [0][0][2][0][3][14] = 62, -+ [0][0][2][0][5][14] = 64, -+ [0][0][2][0][6][14] = 58, -+ [0][0][2][0][9][14] = 58, -+ [0][0][2][0][8][14] = 54, -+ [0][0][2][0][11][14] = 52, -+ [0][0][2][0][2][15] = 74, -+ [0][0][2][0][1][15] = 58, -+ [0][0][2][0][3][15] = 76, -+ [0][0][2][0][5][15] = 74, -+ [0][0][2][0][6][15] = 58, -+ [0][0][2][0][9][15] = 58, -+ [0][0][2][0][8][15] = 54, -+ [0][0][2][0][11][15] = 52, -+ [0][0][2][0][2][17] = 76, -+ [0][0][2][0][1][17] = 58, -+ [0][0][2][0][3][17] = 76, -+ [0][0][2][0][5][17] = 76, -+ [0][0][2][0][6][17] = 58, -+ [0][0][2][0][9][17] = 58, -+ [0][0][2][0][8][17] = 54, -+ [0][0][2][0][11][17] = 52, -+ [0][0][2][0][2][19] = 76, -+ [0][0][2][0][1][19] = 58, -+ [0][0][2][0][3][19] = 76, -+ [0][0][2][0][5][19] = 76, -+ [0][0][2][0][6][19] = 58, -+ [0][0][2][0][9][19] = 58, -+ [0][0][2][0][8][19] = 54, -+ [0][0][2][0][11][19] = 52, -+ [0][0][2][0][2][21] = 76, -+ [0][0][2][0][1][21] = 58, -+ [0][0][2][0][3][21] = 76, -+ [0][0][2][0][5][21] = 76, -+ [0][0][2][0][6][21] = 58, -+ [0][0][2][0][9][21] = 58, -+ [0][0][2][0][8][21] = 54, -+ [0][0][2][0][11][21] = 52, -+ [0][0][2][0][2][23] = 76, -+ [0][0][2][0][1][23] = 58, -+ [0][0][2][0][3][23] = 76, -+ [0][0][2][0][5][23] = 76, -+ [0][0][2][0][6][23] = 58, -+ [0][0][2][0][9][23] = 58, -+ [0][0][2][0][8][23] = 54, -+ [0][0][2][0][11][23] = 52, -+ [0][0][2][0][2][25] = 76, -+ [0][0][2][0][1][25] = 58, -+ [0][0][2][0][3][25] = 76, -+ [0][0][2][0][5][25] = 127, -+ [0][0][2][0][6][25] = 58, -+ [0][0][2][0][9][25] = 127, -+ [0][0][2][0][8][25] = 54, -+ [0][0][2][0][11][25] = 52, -+ [0][0][2][0][2][27] = 76, -+ [0][0][2][0][1][27] = 58, -+ [0][0][2][0][3][27] = 76, -+ [0][0][2][0][5][27] = 127, -+ [0][0][2][0][6][27] = 58, -+ [0][0][2][0][9][27] = 127, -+ [0][0][2][0][8][27] = 54, -+ [0][0][2][0][11][27] = 52, -+ [0][0][2][0][2][29] = 76, -+ [0][0][2][0][1][29] = 58, -+ [0][0][2][0][3][29] = 76, -+ [0][0][2][0][5][29] = 127, -+ [0][0][2][0][6][29] = 58, -+ [0][0][2][0][9][29] = 127, -+ [0][0][2][0][8][29] = 54, -+ [0][0][2][0][11][29] = 52, -+ [0][0][2][0][2][31] = 76, -+ [0][0][2][0][1][31] = 58, -+ [0][0][2][0][3][31] = 76, -+ [0][0][2][0][5][31] = 76, -+ [0][0][2][0][6][31] = 58, -+ [0][0][2][0][9][31] = 58, -+ [0][0][2][0][8][31] = 54, -+ [0][0][2][0][11][31] = 52, -+ [0][0][2][0][2][33] = 76, -+ [0][0][2][0][1][33] = 58, -+ [0][0][2][0][3][33] = 76, -+ [0][0][2][0][5][33] = 76, -+ [0][0][2][0][6][33] = 58, -+ [0][0][2][0][9][33] = 58, -+ [0][0][2][0][8][33] = 54, -+ [0][0][2][0][11][33] = 52, -+ [0][0][2][0][2][35] = 70, -+ [0][0][2][0][1][35] = 58, -+ [0][0][2][0][3][35] = 76, -+ [0][0][2][0][5][35] = 70, -+ [0][0][2][0][6][35] = 58, -+ [0][0][2][0][9][35] = 58, -+ [0][0][2][0][8][35] = 54, -+ [0][0][2][0][11][35] = 52, -+ [0][0][2][0][2][37] = 76, -+ [0][0][2][0][1][37] = 127, -+ [0][0][2][0][3][37] = 76, -+ [0][0][2][0][5][37] = 76, -+ [0][0][2][0][6][37] = 58, -+ [0][0][2][0][9][37] = 76, -+ [0][0][2][0][8][37] = 54, -+ [0][0][2][0][11][37] = 127, -+ [0][0][2][0][2][38] = 76, -+ [0][0][2][0][1][38] = 28, -+ [0][0][2][0][3][38] = 127, -+ [0][0][2][0][5][38] = 76, -+ [0][0][2][0][6][38] = 28, -+ [0][0][2][0][9][38] = 76, -+ [0][0][2][0][8][38] = 54, -+ [0][0][2][0][11][38] = 52, -+ [0][0][2][0][2][40] = 76, -+ [0][0][2][0][1][40] = 28, -+ [0][0][2][0][3][40] = 127, -+ [0][0][2][0][5][40] = 76, -+ [0][0][2][0][6][40] = 28, -+ [0][0][2][0][9][40] = 76, -+ [0][0][2][0][8][40] = 54, -+ [0][0][2][0][11][40] = 52, -+ [0][0][2][0][2][42] = 76, -+ [0][0][2][0][1][42] = 28, -+ [0][0][2][0][3][42] = 127, -+ [0][0][2][0][5][42] = 76, -+ [0][0][2][0][6][42] = 28, -+ [0][0][2][0][9][42] = 76, -+ [0][0][2][0][8][42] = 54, -+ [0][0][2][0][11][42] = 52, -+ [0][0][2][0][2][44] = 76, -+ [0][0][2][0][1][44] = 28, -+ [0][0][2][0][3][44] = 127, -+ [0][0][2][0][5][44] = 76, -+ [0][0][2][0][6][44] = 28, -+ [0][0][2][0][9][44] = 76, -+ [0][0][2][0][8][44] = 54, -+ [0][0][2][0][11][44] = 52, -+ [0][0][2][0][2][46] = 76, -+ [0][0][2][0][1][46] = 28, -+ [0][0][2][0][3][46] = 127, -+ [0][0][2][0][5][46] = 76, -+ [0][0][2][0][6][46] = 28, -+ [0][0][2][0][9][46] = 76, -+ [0][0][2][0][8][46] = 54, -+ [0][0][2][0][11][46] = 52, -+ [0][1][2][0][2][0] = 68, -+ [0][1][2][0][1][0] = 46, -+ [0][1][2][0][3][0] = 50, -+ [0][1][2][0][5][0] = 40, -+ [0][1][2][0][6][0] = 46, -+ [0][1][2][0][9][0] = 46, -+ [0][1][2][0][8][0] = 18, -+ [0][1][2][0][11][0] = 40, -+ [0][1][2][0][2][2] = 68, -+ [0][1][2][0][1][2] = 46, -+ [0][1][2][0][3][2] = 50, -+ [0][1][2][0][5][2] = 40, -+ [0][1][2][0][6][2] = 46, -+ [0][1][2][0][9][2] = 46, -+ [0][1][2][0][8][2] = 18, -+ [0][1][2][0][11][2] = 40, -+ [0][1][2][0][2][4] = 68, -+ [0][1][2][0][1][4] = 46, -+ [0][1][2][0][3][4] = 50, -+ [0][1][2][0][5][4] = 40, -+ [0][1][2][0][6][4] = 46, -+ [0][1][2][0][9][4] = 46, -+ [0][1][2][0][8][4] = 18, -+ [0][1][2][0][11][4] = 40, -+ [0][1][2][0][2][6] = 68, -+ [0][1][2][0][1][6] = 46, -+ [0][1][2][0][3][6] = 50, -+ [0][1][2][0][5][6] = 40, -+ [0][1][2][0][6][6] = 36, -+ [0][1][2][0][9][6] = 46, -+ [0][1][2][0][8][6] = 18, -+ [0][1][2][0][11][6] = 40, -+ [0][1][2][0][2][8] = 68, -+ [0][1][2][0][1][8] = 46, -+ [0][1][2][0][3][8] = 50, -+ [0][1][2][0][5][8] = 52, -+ [0][1][2][0][6][8] = 46, -+ [0][1][2][0][9][8] = 46, -+ [0][1][2][0][8][8] = 42, -+ [0][1][2][0][11][8] = 40, -+ [0][1][2][0][2][10] = 68, -+ [0][1][2][0][1][10] = 46, -+ [0][1][2][0][3][10] = 50, -+ [0][1][2][0][5][10] = 52, -+ [0][1][2][0][6][10] = 46, -+ [0][1][2][0][9][10] = 46, -+ [0][1][2][0][8][10] = 42, -+ [0][1][2][0][11][10] = 40, -+ [0][1][2][0][2][12] = 68, -+ [0][1][2][0][1][12] = 46, -+ [0][1][2][0][3][12] = 50, -+ [0][1][2][0][5][12] = 52, -+ [0][1][2][0][6][12] = 46, -+ [0][1][2][0][9][12] = 46, -+ [0][1][2][0][8][12] = 42, -+ [0][1][2][0][11][12] = 40, -+ [0][1][2][0][2][14] = 68, -+ [0][1][2][0][1][14] = 46, -+ [0][1][2][0][3][14] = 50, -+ [0][1][2][0][5][14] = 52, -+ [0][1][2][0][6][14] = 46, -+ [0][1][2][0][9][14] = 46, -+ [0][1][2][0][8][14] = 42, -+ [0][1][2][0][11][14] = 40, -+ [0][1][2][0][2][15] = 68, -+ [0][1][2][0][1][15] = 46, -+ [0][1][2][0][3][15] = 70, -+ [0][1][2][0][5][15] = 68, -+ [0][1][2][0][6][15] = 46, -+ [0][1][2][0][9][15] = 46, -+ [0][1][2][0][8][15] = 42, -+ [0][1][2][0][11][15] = 40, -+ [0][1][2][0][2][17] = 68, -+ [0][1][2][0][1][17] = 46, -+ [0][1][2][0][3][17] = 70, -+ [0][1][2][0][5][17] = 68, -+ [0][1][2][0][6][17] = 46, -+ [0][1][2][0][9][17] = 46, -+ [0][1][2][0][8][17] = 42, -+ [0][1][2][0][11][17] = 40, -+ [0][1][2][0][2][19] = 68, -+ [0][1][2][0][1][19] = 46, -+ [0][1][2][0][3][19] = 70, -+ [0][1][2][0][5][19] = 68, -+ [0][1][2][0][6][19] = 46, -+ [0][1][2][0][9][19] = 46, -+ [0][1][2][0][8][19] = 42, -+ [0][1][2][0][11][19] = 40, -+ [0][1][2][0][2][21] = 68, -+ [0][1][2][0][1][21] = 46, -+ [0][1][2][0][3][21] = 70, -+ [0][1][2][0][5][21] = 68, -+ [0][1][2][0][6][21] = 46, -+ [0][1][2][0][9][21] = 46, -+ [0][1][2][0][8][21] = 42, -+ [0][1][2][0][11][21] = 40, -+ [0][1][2][0][2][23] = 68, -+ [0][1][2][0][1][23] = 46, -+ [0][1][2][0][3][23] = 70, -+ [0][1][2][0][5][23] = 68, -+ [0][1][2][0][6][23] = 46, -+ [0][1][2][0][9][23] = 46, -+ [0][1][2][0][8][23] = 42, -+ [0][1][2][0][11][23] = 40, -+ [0][1][2][0][2][25] = 68, -+ [0][1][2][0][1][25] = 46, -+ [0][1][2][0][3][25] = 70, -+ [0][1][2][0][5][25] = 127, -+ [0][1][2][0][6][25] = 46, -+ [0][1][2][0][9][25] = 127, -+ [0][1][2][0][8][25] = 42, -+ [0][1][2][0][11][25] = 40, -+ [0][1][2][0][2][27] = 68, -+ [0][1][2][0][1][27] = 46, -+ [0][1][2][0][3][27] = 70, -+ [0][1][2][0][5][27] = 127, -+ [0][1][2][0][6][27] = 46, -+ [0][1][2][0][9][27] = 127, -+ [0][1][2][0][8][27] = 42, -+ [0][1][2][0][11][27] = 40, -+ [0][1][2][0][2][29] = 68, -+ [0][1][2][0][1][29] = 46, -+ [0][1][2][0][3][29] = 70, -+ [0][1][2][0][5][29] = 127, -+ [0][1][2][0][6][29] = 46, -+ [0][1][2][0][9][29] = 127, -+ [0][1][2][0][8][29] = 42, -+ [0][1][2][0][11][29] = 40, -+ [0][1][2][0][2][31] = 68, -+ [0][1][2][0][1][31] = 46, -+ [0][1][2][0][3][31] = 70, -+ [0][1][2][0][5][31] = 68, -+ [0][1][2][0][6][31] = 46, -+ [0][1][2][0][9][31] = 46, -+ [0][1][2][0][8][31] = 42, -+ [0][1][2][0][11][31] = 40, -+ [0][1][2][0][2][33] = 68, -+ [0][1][2][0][1][33] = 46, -+ [0][1][2][0][3][33] = 70, -+ [0][1][2][0][5][33] = 68, -+ [0][1][2][0][6][33] = 46, -+ [0][1][2][0][9][33] = 46, -+ [0][1][2][0][8][33] = 42, -+ [0][1][2][0][11][33] = 40, -+ [0][1][2][0][2][35] = 64, -+ [0][1][2][0][1][35] = 46, -+ [0][1][2][0][3][35] = 70, -+ [0][1][2][0][5][35] = 64, -+ [0][1][2][0][6][35] = 46, -+ [0][1][2][0][9][35] = 46, -+ [0][1][2][0][8][35] = 42, -+ [0][1][2][0][11][35] = 40, -+ [0][1][2][0][2][37] = 68, -+ [0][1][2][0][1][37] = 127, -+ [0][1][2][0][3][37] = 70, -+ [0][1][2][0][5][37] = 68, -+ [0][1][2][0][6][37] = 46, -+ [0][1][2][0][9][37] = 68, -+ [0][1][2][0][8][37] = 42, -+ [0][1][2][0][11][37] = 127, -+ [0][1][2][0][2][38] = 76, -+ [0][1][2][0][1][38] = 16, -+ [0][1][2][0][3][38] = 127, -+ [0][1][2][0][5][38] = 76, -+ [0][1][2][0][6][38] = 16, -+ [0][1][2][0][9][38] = 76, -+ [0][1][2][0][8][38] = 42, -+ [0][1][2][0][11][38] = 40, -+ [0][1][2][0][2][40] = 76, -+ [0][1][2][0][1][40] = 16, -+ [0][1][2][0][3][40] = 127, -+ [0][1][2][0][5][40] = 76, -+ [0][1][2][0][6][40] = 16, -+ [0][1][2][0][9][40] = 76, -+ [0][1][2][0][8][40] = 42, -+ [0][1][2][0][11][40] = 40, -+ [0][1][2][0][2][42] = 76, -+ [0][1][2][0][1][42] = 16, -+ [0][1][2][0][3][42] = 127, -+ [0][1][2][0][5][42] = 76, -+ [0][1][2][0][6][42] = 16, -+ [0][1][2][0][9][42] = 76, -+ [0][1][2][0][8][42] = 42, -+ [0][1][2][0][11][42] = 40, -+ [0][1][2][0][2][44] = 76, -+ [0][1][2][0][1][44] = 16, -+ [0][1][2][0][3][44] = 127, -+ [0][1][2][0][5][44] = 76, -+ [0][1][2][0][6][44] = 16, -+ [0][1][2][0][9][44] = 76, -+ [0][1][2][0][8][44] = 42, -+ [0][1][2][0][11][44] = 40, -+ [0][1][2][0][2][46] = 76, -+ [0][1][2][0][1][46] = 16, -+ [0][1][2][0][3][46] = 127, -+ [0][1][2][0][5][46] = 76, -+ [0][1][2][0][6][46] = 16, -+ [0][1][2][0][9][46] = 76, -+ [0][1][2][0][8][46] = 42, -+ [0][1][2][0][11][46] = 40, -+ [0][1][2][1][2][0] = 68, -+ [0][1][2][1][1][0] = 34, -+ [0][1][2][1][3][0] = 50, -+ [0][1][2][1][5][0] = 38, -+ [0][1][2][1][6][0] = 34, -+ [0][1][2][1][9][0] = 34, -+ [0][1][2][1][8][0] = 6, -+ [0][1][2][1][11][0] = 28, -+ [0][1][2][1][2][2] = 68, -+ [0][1][2][1][1][2] = 34, -+ [0][1][2][1][3][2] = 50, -+ [0][1][2][1][5][2] = 38, -+ [0][1][2][1][6][2] = 34, -+ [0][1][2][1][9][2] = 34, -+ [0][1][2][1][8][2] = 6, -+ [0][1][2][1][11][2] = 28, -+ [0][1][2][1][2][4] = 68, -+ [0][1][2][1][1][4] = 34, -+ [0][1][2][1][3][4] = 50, -+ [0][1][2][1][5][4] = 38, -+ [0][1][2][1][6][4] = 34, -+ [0][1][2][1][9][4] = 34, -+ [0][1][2][1][8][4] = 6, -+ [0][1][2][1][11][4] = 28, -+ [0][1][2][1][2][6] = 68, -+ [0][1][2][1][1][6] = 34, -+ [0][1][2][1][3][6] = 50, -+ [0][1][2][1][5][6] = 38, -+ [0][1][2][1][6][6] = 34, -+ [0][1][2][1][9][6] = 34, -+ [0][1][2][1][8][6] = 6, -+ [0][1][2][1][11][6] = 28, -+ [0][1][2][1][2][8] = 68, -+ [0][1][2][1][1][8] = 34, -+ [0][1][2][1][3][8] = 50, -+ [0][1][2][1][5][8] = 38, -+ [0][1][2][1][6][8] = 34, -+ [0][1][2][1][9][8] = 34, -+ [0][1][2][1][8][8] = 30, -+ [0][1][2][1][11][8] = 28, -+ [0][1][2][1][2][10] = 68, -+ [0][1][2][1][1][10] = 34, -+ [0][1][2][1][3][10] = 50, -+ [0][1][2][1][5][10] = 38, -+ [0][1][2][1][6][10] = 34, -+ [0][1][2][1][9][10] = 34, -+ [0][1][2][1][8][10] = 30, -+ [0][1][2][1][11][10] = 28, -+ [0][1][2][1][2][12] = 68, -+ [0][1][2][1][1][12] = 34, -+ [0][1][2][1][3][12] = 50, -+ [0][1][2][1][5][12] = 38, -+ [0][1][2][1][6][12] = 34, -+ [0][1][2][1][9][12] = 34, -+ [0][1][2][1][8][12] = 30, -+ [0][1][2][1][11][12] = 28, -+ [0][1][2][1][2][14] = 68, -+ [0][1][2][1][1][14] = 34, -+ [0][1][2][1][3][14] = 50, -+ [0][1][2][1][5][14] = 38, -+ [0][1][2][1][6][14] = 34, -+ [0][1][2][1][9][14] = 34, -+ [0][1][2][1][8][14] = 30, -+ [0][1][2][1][11][14] = 28, -+ [0][1][2][1][2][15] = 68, -+ [0][1][2][1][1][15] = 34, -+ [0][1][2][1][3][15] = 70, -+ [0][1][2][1][5][15] = 62, -+ [0][1][2][1][6][15] = 34, -+ [0][1][2][1][9][15] = 34, -+ [0][1][2][1][8][15] = 30, -+ [0][1][2][1][11][15] = 28, -+ [0][1][2][1][2][17] = 68, -+ [0][1][2][1][1][17] = 34, -+ [0][1][2][1][3][17] = 70, -+ [0][1][2][1][5][17] = 62, -+ [0][1][2][1][6][17] = 34, -+ [0][1][2][1][9][17] = 34, -+ [0][1][2][1][8][17] = 30, -+ [0][1][2][1][11][17] = 28, -+ [0][1][2][1][2][19] = 68, -+ [0][1][2][1][1][19] = 34, -+ [0][1][2][1][3][19] = 70, -+ [0][1][2][1][5][19] = 62, -+ [0][1][2][1][6][19] = 34, -+ [0][1][2][1][9][19] = 34, -+ [0][1][2][1][8][19] = 30, -+ [0][1][2][1][11][19] = 28, -+ [0][1][2][1][2][21] = 68, -+ [0][1][2][1][1][21] = 34, -+ [0][1][2][1][3][21] = 70, -+ [0][1][2][1][5][21] = 62, -+ [0][1][2][1][6][21] = 34, -+ [0][1][2][1][9][21] = 34, -+ [0][1][2][1][8][21] = 30, -+ [0][1][2][1][11][21] = 28, -+ [0][1][2][1][2][23] = 68, -+ [0][1][2][1][1][23] = 34, -+ [0][1][2][1][3][23] = 70, -+ [0][1][2][1][5][23] = 62, -+ [0][1][2][1][6][23] = 34, -+ [0][1][2][1][9][23] = 34, -+ [0][1][2][1][8][23] = 30, -+ [0][1][2][1][11][23] = 28, -+ [0][1][2][1][2][25] = 68, -+ [0][1][2][1][1][25] = 34, -+ [0][1][2][1][3][25] = 70, -+ [0][1][2][1][5][25] = 127, -+ [0][1][2][1][6][25] = 34, -+ [0][1][2][1][9][25] = 127, -+ [0][1][2][1][8][25] = 30, -+ [0][1][2][1][11][25] = 28, -+ [0][1][2][1][2][27] = 68, -+ [0][1][2][1][1][27] = 34, -+ [0][1][2][1][3][27] = 70, -+ [0][1][2][1][5][27] = 127, -+ [0][1][2][1][6][27] = 34, -+ [0][1][2][1][9][27] = 127, -+ [0][1][2][1][8][27] = 30, -+ [0][1][2][1][11][27] = 28, -+ [0][1][2][1][2][29] = 68, -+ [0][1][2][1][1][29] = 34, -+ [0][1][2][1][3][29] = 70, -+ [0][1][2][1][5][29] = 127, -+ [0][1][2][1][6][29] = 34, -+ [0][1][2][1][9][29] = 127, -+ [0][1][2][1][8][29] = 30, -+ [0][1][2][1][11][29] = 28, -+ [0][1][2][1][2][31] = 68, -+ [0][1][2][1][1][31] = 34, -+ [0][1][2][1][3][31] = 70, -+ [0][1][2][1][5][31] = 62, -+ [0][1][2][1][6][31] = 34, -+ [0][1][2][1][9][31] = 34, -+ [0][1][2][1][8][31] = 30, -+ [0][1][2][1][11][31] = 28, -+ [0][1][2][1][2][33] = 68, -+ [0][1][2][1][1][33] = 34, -+ [0][1][2][1][3][33] = 70, -+ [0][1][2][1][5][33] = 62, -+ [0][1][2][1][6][33] = 34, -+ [0][1][2][1][9][33] = 34, -+ [0][1][2][1][8][33] = 30, -+ [0][1][2][1][11][33] = 28, -+ [0][1][2][1][2][35] = 64, -+ [0][1][2][1][1][35] = 34, -+ [0][1][2][1][3][35] = 70, -+ [0][1][2][1][5][35] = 62, -+ [0][1][2][1][6][35] = 34, -+ [0][1][2][1][9][35] = 34, -+ [0][1][2][1][8][35] = 30, -+ [0][1][2][1][11][35] = 28, -+ [0][1][2][1][2][37] = 68, -+ [0][1][2][1][1][37] = 127, -+ [0][1][2][1][3][37] = 70, -+ [0][1][2][1][5][37] = 62, -+ [0][1][2][1][6][37] = 34, -+ [0][1][2][1][9][37] = 68, -+ [0][1][2][1][8][37] = 30, -+ [0][1][2][1][11][37] = 127, -+ [0][1][2][1][2][38] = 76, -+ [0][1][2][1][1][38] = 4, -+ [0][1][2][1][3][38] = 127, -+ [0][1][2][1][5][38] = 76, -+ [0][1][2][1][6][38] = 4, -+ [0][1][2][1][9][38] = 76, -+ [0][1][2][1][8][38] = 30, -+ [0][1][2][1][11][38] = 28, -+ [0][1][2][1][2][40] = 76, -+ [0][1][2][1][1][40] = 4, -+ [0][1][2][1][3][40] = 127, -+ [0][1][2][1][5][40] = 76, -+ [0][1][2][1][6][40] = 4, -+ [0][1][2][1][9][40] = 76, -+ [0][1][2][1][8][40] = 30, -+ [0][1][2][1][11][40] = 28, -+ [0][1][2][1][2][42] = 76, -+ [0][1][2][1][1][42] = 4, -+ [0][1][2][1][3][42] = 127, -+ [0][1][2][1][5][42] = 76, -+ [0][1][2][1][6][42] = 4, -+ [0][1][2][1][9][42] = 76, -+ [0][1][2][1][8][42] = 30, -+ [0][1][2][1][11][42] = 28, -+ [0][1][2][1][2][44] = 76, -+ [0][1][2][1][1][44] = 4, -+ [0][1][2][1][3][44] = 127, -+ [0][1][2][1][5][44] = 76, -+ [0][1][2][1][6][44] = 4, -+ [0][1][2][1][9][44] = 76, -+ [0][1][2][1][8][44] = 30, -+ [0][1][2][1][11][44] = 28, -+ [0][1][2][1][2][46] = 76, -+ [0][1][2][1][1][46] = 4, -+ [0][1][2][1][3][46] = 127, -+ [0][1][2][1][5][46] = 76, -+ [0][1][2][1][6][46] = 4, -+ [0][1][2][1][9][46] = 76, -+ [0][1][2][1][8][46] = 30, -+ [0][1][2][1][11][46] = 28, -+ [1][0][2][0][2][1] = 68, -+ [1][0][2][0][1][1] = 64, -+ [1][0][2][0][3][1] = 62, -+ [1][0][2][0][5][1] = 64, -+ [1][0][2][0][6][1] = 64, -+ [1][0][2][0][9][1] = 64, -+ [1][0][2][0][8][1] = 30, -+ [1][0][2][0][11][1] = 52, -+ [1][0][2][0][2][5] = 72, -+ [1][0][2][0][1][5] = 64, -+ [1][0][2][0][3][5] = 62, -+ [1][0][2][0][5][5] = 64, -+ [1][0][2][0][6][5] = 60, -+ [1][0][2][0][9][5] = 64, -+ [1][0][2][0][8][5] = 30, -+ [1][0][2][0][11][5] = 52, -+ [1][0][2][0][2][9] = 72, -+ [1][0][2][0][1][9] = 64, -+ [1][0][2][0][3][9] = 62, -+ [1][0][2][0][5][9] = 64, -+ [1][0][2][0][6][9] = 64, -+ [1][0][2][0][9][9] = 64, -+ [1][0][2][0][8][9] = 54, -+ [1][0][2][0][11][9] = 52, -+ [1][0][2][0][2][13] = 66, -+ [1][0][2][0][1][13] = 64, -+ [1][0][2][0][3][13] = 62, -+ [1][0][2][0][5][13] = 64, -+ [1][0][2][0][6][13] = 64, -+ [1][0][2][0][9][13] = 64, -+ [1][0][2][0][8][13] = 54, -+ [1][0][2][0][11][13] = 52, -+ [1][0][2][0][2][16] = 62, -+ [1][0][2][0][1][16] = 64, -+ [1][0][2][0][3][16] = 72, -+ [1][0][2][0][5][16] = 62, -+ [1][0][2][0][6][16] = 64, -+ [1][0][2][0][9][16] = 64, -+ [1][0][2][0][8][16] = 54, -+ [1][0][2][0][11][16] = 52, -+ [1][0][2][0][2][20] = 72, -+ [1][0][2][0][1][20] = 64, -+ [1][0][2][0][3][20] = 72, -+ [1][0][2][0][5][20] = 72, -+ [1][0][2][0][6][20] = 64, -+ [1][0][2][0][9][20] = 64, -+ [1][0][2][0][8][20] = 54, -+ [1][0][2][0][11][20] = 52, -+ [1][0][2][0][2][24] = 72, -+ [1][0][2][0][1][24] = 64, -+ [1][0][2][0][3][24] = 72, -+ [1][0][2][0][5][24] = 127, -+ [1][0][2][0][6][24] = 64, -+ [1][0][2][0][9][24] = 127, -+ [1][0][2][0][8][24] = 54, -+ [1][0][2][0][11][24] = 52, -+ [1][0][2][0][2][28] = 72, -+ [1][0][2][0][1][28] = 64, -+ [1][0][2][0][3][28] = 72, -+ [1][0][2][0][5][28] = 127, -+ [1][0][2][0][6][28] = 64, -+ [1][0][2][0][9][28] = 127, -+ [1][0][2][0][8][28] = 54, -+ [1][0][2][0][11][28] = 52, -+ [1][0][2][0][2][32] = 72, -+ [1][0][2][0][1][32] = 64, -+ [1][0][2][0][3][32] = 72, -+ [1][0][2][0][5][32] = 72, -+ [1][0][2][0][6][32] = 64, -+ [1][0][2][0][9][32] = 64, -+ [1][0][2][0][8][32] = 54, -+ [1][0][2][0][11][32] = 52, -+ [1][0][2][0][2][36] = 72, -+ [1][0][2][0][1][36] = 127, -+ [1][0][2][0][3][36] = 72, -+ [1][0][2][0][5][36] = 72, -+ [1][0][2][0][6][36] = 64, -+ [1][0][2][0][9][36] = 72, -+ [1][0][2][0][8][36] = 54, -+ [1][0][2][0][11][36] = 127, -+ [1][0][2][0][2][39] = 72, -+ [1][0][2][0][1][39] = 28, -+ [1][0][2][0][3][39] = 127, -+ [1][0][2][0][5][39] = 72, -+ [1][0][2][0][6][39] = 28, -+ [1][0][2][0][9][39] = 72, -+ [1][0][2][0][8][39] = 54, -+ [1][0][2][0][11][39] = 52, -+ [1][0][2][0][2][43] = 72, -+ [1][0][2][0][1][43] = 28, -+ [1][0][2][0][3][43] = 127, -+ [1][0][2][0][5][43] = 72, -+ [1][0][2][0][6][43] = 28, -+ [1][0][2][0][9][43] = 72, -+ [1][0][2][0][8][43] = 54, -+ [1][0][2][0][11][43] = 52, -+ [1][1][2][0][2][1] = 58, -+ [1][1][2][0][1][1] = 52, -+ [1][1][2][0][3][1] = 50, -+ [1][1][2][0][5][1] = 52, -+ [1][1][2][0][6][1] = 52, -+ [1][1][2][0][9][1] = 52, -+ [1][1][2][0][8][1] = 18, -+ [1][1][2][0][11][1] = 40, -+ [1][1][2][0][2][5] = 72, -+ [1][1][2][0][1][5] = 52, -+ [1][1][2][0][3][5] = 50, -+ [1][1][2][0][5][5] = 52, -+ [1][1][2][0][6][5] = 46, -+ [1][1][2][0][9][5] = 52, -+ [1][1][2][0][8][5] = 18, -+ [1][1][2][0][11][5] = 40, -+ [1][1][2][0][2][9] = 72, -+ [1][1][2][0][1][9] = 52, -+ [1][1][2][0][3][9] = 50, -+ [1][1][2][0][5][9] = 52, -+ [1][1][2][0][6][9] = 52, -+ [1][1][2][0][9][9] = 52, -+ [1][1][2][0][8][9] = 42, -+ [1][1][2][0][11][9] = 40, -+ [1][1][2][0][2][13] = 58, -+ [1][1][2][0][1][13] = 52, -+ [1][1][2][0][3][13] = 50, -+ [1][1][2][0][5][13] = 52, -+ [1][1][2][0][6][13] = 52, -+ [1][1][2][0][9][13] = 52, -+ [1][1][2][0][8][13] = 42, -+ [1][1][2][0][11][13] = 40, -+ [1][1][2][0][2][16] = 56, -+ [1][1][2][0][1][16] = 52, -+ [1][1][2][0][3][16] = 72, -+ [1][1][2][0][5][16] = 56, -+ [1][1][2][0][6][16] = 52, -+ [1][1][2][0][9][16] = 52, -+ [1][1][2][0][8][16] = 42, -+ [1][1][2][0][11][16] = 40, -+ [1][1][2][0][2][20] = 72, -+ [1][1][2][0][1][20] = 52, -+ [1][1][2][0][3][20] = 72, -+ [1][1][2][0][5][20] = 72, -+ [1][1][2][0][6][20] = 52, -+ [1][1][2][0][9][20] = 52, -+ [1][1][2][0][8][20] = 42, -+ [1][1][2][0][11][20] = 40, -+ [1][1][2][0][2][24] = 72, -+ [1][1][2][0][1][24] = 52, -+ [1][1][2][0][3][24] = 72, -+ [1][1][2][0][5][24] = 127, -+ [1][1][2][0][6][24] = 52, -+ [1][1][2][0][9][24] = 127, -+ [1][1][2][0][8][24] = 42, -+ [1][1][2][0][11][24] = 40, -+ [1][1][2][0][2][28] = 72, -+ [1][1][2][0][1][28] = 52, -+ [1][1][2][0][3][28] = 72, -+ [1][1][2][0][5][28] = 127, -+ [1][1][2][0][6][28] = 52, -+ [1][1][2][0][9][28] = 127, -+ [1][1][2][0][8][28] = 42, -+ [1][1][2][0][11][28] = 40, -+ [1][1][2][0][2][32] = 68, -+ [1][1][2][0][1][32] = 52, -+ [1][1][2][0][3][32] = 72, -+ [1][1][2][0][5][32] = 68, -+ [1][1][2][0][6][32] = 52, -+ [1][1][2][0][9][32] = 52, -+ [1][1][2][0][8][32] = 42, -+ [1][1][2][0][11][32] = 40, -+ [1][1][2][0][2][36] = 72, -+ [1][1][2][0][1][36] = 127, -+ [1][1][2][0][3][36] = 72, -+ [1][1][2][0][5][36] = 72, -+ [1][1][2][0][6][36] = 52, -+ [1][1][2][0][9][36] = 72, -+ [1][1][2][0][8][36] = 42, -+ [1][1][2][0][11][36] = 127, -+ [1][1][2][0][2][39] = 72, -+ [1][1][2][0][1][39] = 16, -+ [1][1][2][0][3][39] = 127, -+ [1][1][2][0][5][39] = 72, -+ [1][1][2][0][6][39] = 16, -+ [1][1][2][0][9][39] = 72, -+ [1][1][2][0][8][39] = 42, -+ [1][1][2][0][11][39] = 40, -+ [1][1][2][0][2][43] = 72, -+ [1][1][2][0][1][43] = 16, -+ [1][1][2][0][3][43] = 127, -+ [1][1][2][0][5][43] = 72, -+ [1][1][2][0][6][43] = 16, -+ [1][1][2][0][9][43] = 72, -+ [1][1][2][0][8][43] = 42, -+ [1][1][2][0][11][43] = 40, -+ [1][1][2][1][2][1] = 58, -+ [1][1][2][1][1][1] = 40, -+ [1][1][2][1][3][1] = 50, -+ [1][1][2][1][5][1] = 40, -+ [1][1][2][1][6][1] = 40, -+ [1][1][2][1][9][1] = 40, -+ [1][1][2][1][8][1] = 6, -+ [1][1][2][1][11][1] = 28, -+ [1][1][2][1][2][5] = 68, -+ [1][1][2][1][1][5] = 40, -+ [1][1][2][1][3][5] = 50, -+ [1][1][2][1][5][5] = 40, -+ [1][1][2][1][6][5] = 40, -+ [1][1][2][1][9][5] = 40, -+ [1][1][2][1][8][5] = 6, -+ [1][1][2][1][11][5] = 28, -+ [1][1][2][1][2][9] = 68, -+ [1][1][2][1][1][9] = 40, -+ [1][1][2][1][3][9] = 50, -+ [1][1][2][1][5][9] = 40, -+ [1][1][2][1][6][9] = 40, -+ [1][1][2][1][9][9] = 40, -+ [1][1][2][1][8][9] = 30, -+ [1][1][2][1][11][9] = 28, -+ [1][1][2][1][2][13] = 58, -+ [1][1][2][1][1][13] = 40, -+ [1][1][2][1][3][13] = 50, -+ [1][1][2][1][5][13] = 40, -+ [1][1][2][1][6][13] = 40, -+ [1][1][2][1][9][13] = 40, -+ [1][1][2][1][8][13] = 30, -+ [1][1][2][1][11][13] = 28, -+ [1][1][2][1][2][16] = 56, -+ [1][1][2][1][1][16] = 40, -+ [1][1][2][1][3][16] = 72, -+ [1][1][2][1][5][16] = 56, -+ [1][1][2][1][6][16] = 40, -+ [1][1][2][1][9][16] = 40, -+ [1][1][2][1][8][16] = 30, -+ [1][1][2][1][11][16] = 28, -+ [1][1][2][1][2][20] = 68, -+ [1][1][2][1][1][20] = 40, -+ [1][1][2][1][3][20] = 72, -+ [1][1][2][1][5][20] = 68, -+ [1][1][2][1][6][20] = 40, -+ [1][1][2][1][9][20] = 40, -+ [1][1][2][1][8][20] = 30, -+ [1][1][2][1][11][20] = 28, -+ [1][1][2][1][2][24] = 68, -+ [1][1][2][1][1][24] = 40, -+ [1][1][2][1][3][24] = 72, -+ [1][1][2][1][5][24] = 127, -+ [1][1][2][1][6][24] = 40, -+ [1][1][2][1][9][24] = 127, -+ [1][1][2][1][8][24] = 30, -+ [1][1][2][1][11][24] = 28, -+ [1][1][2][1][2][28] = 68, -+ [1][1][2][1][1][28] = 40, -+ [1][1][2][1][3][28] = 72, -+ [1][1][2][1][5][28] = 127, -+ [1][1][2][1][6][28] = 40, -+ [1][1][2][1][9][28] = 127, -+ [1][1][2][1][8][28] = 30, -+ [1][1][2][1][11][28] = 28, -+ [1][1][2][1][2][32] = 68, -+ [1][1][2][1][1][32] = 40, -+ [1][1][2][1][3][32] = 72, -+ [1][1][2][1][5][32] = 68, -+ [1][1][2][1][6][32] = 40, -+ [1][1][2][1][9][32] = 40, -+ [1][1][2][1][8][32] = 30, -+ [1][1][2][1][11][32] = 28, -+ [1][1][2][1][2][36] = 68, -+ [1][1][2][1][1][36] = 127, -+ [1][1][2][1][3][36] = 72, -+ [1][1][2][1][5][36] = 68, -+ [1][1][2][1][6][36] = 40, -+ [1][1][2][1][9][36] = 68, -+ [1][1][2][1][8][36] = 30, -+ [1][1][2][1][11][36] = 127, -+ [1][1][2][1][2][39] = 72, -+ [1][1][2][1][1][39] = 4, -+ [1][1][2][1][3][39] = 127, -+ [1][1][2][1][5][39] = 72, -+ [1][1][2][1][6][39] = 4, -+ [1][1][2][1][9][39] = 72, -+ [1][1][2][1][8][39] = 30, -+ [1][1][2][1][11][39] = 28, -+ [1][1][2][1][2][43] = 72, -+ [1][1][2][1][1][43] = 4, -+ [1][1][2][1][3][43] = 127, -+ [1][1][2][1][5][43] = 72, -+ [1][1][2][1][6][43] = 4, -+ [1][1][2][1][9][43] = 72, -+ [1][1][2][1][8][43] = 30, -+ [1][1][2][1][11][43] = 28, -+ [2][0][2][0][2][3] = 64, -+ [2][0][2][0][1][3] = 64, -+ [2][0][2][0][3][3] = 64, -+ [2][0][2][0][5][3] = 62, -+ [2][0][2][0][6][3] = 64, -+ [2][0][2][0][9][3] = 64, -+ [2][0][2][0][8][3] = 30, -+ [2][0][2][0][11][3] = 52, -+ [2][0][2][0][2][11] = 64, -+ [2][0][2][0][1][11] = 64, -+ [2][0][2][0][3][11] = 64, -+ [2][0][2][0][5][11] = 62, -+ [2][0][2][0][6][11] = 64, -+ [2][0][2][0][9][11] = 64, -+ [2][0][2][0][8][11] = 54, -+ [2][0][2][0][11][11] = 52, -+ [2][0][2][0][2][18] = 62, -+ [2][0][2][0][1][18] = 64, -+ [2][0][2][0][3][18] = 72, -+ [2][0][2][0][5][18] = 66, -+ [2][0][2][0][6][18] = 64, -+ [2][0][2][0][9][18] = 64, -+ [2][0][2][0][8][18] = 54, -+ [2][0][2][0][11][18] = 52, -+ [2][0][2][0][2][26] = 72, -+ [2][0][2][0][1][26] = 64, -+ [2][0][2][0][3][26] = 72, -+ [2][0][2][0][5][26] = 127, -+ [2][0][2][0][6][26] = 64, -+ [2][0][2][0][9][26] = 127, -+ [2][0][2][0][8][26] = 54, -+ [2][0][2][0][11][26] = 52, -+ [2][0][2][0][2][34] = 72, -+ [2][0][2][0][1][34] = 127, -+ [2][0][2][0][3][34] = 72, -+ [2][0][2][0][5][34] = 72, -+ [2][0][2][0][6][34] = 64, -+ [2][0][2][0][9][34] = 72, -+ [2][0][2][0][8][34] = 54, -+ [2][0][2][0][11][34] = 127, -+ [2][0][2][0][2][41] = 72, -+ [2][0][2][0][1][41] = 28, -+ [2][0][2][0][3][41] = 127, -+ [2][0][2][0][5][41] = 72, -+ [2][0][2][0][6][41] = 28, -+ [2][0][2][0][9][41] = 72, -+ [2][0][2][0][8][41] = 54, -+ [2][0][2][0][11][41] = 52, -+ [2][1][2][0][2][3] = 56, -+ [2][1][2][0][1][3] = 52, -+ [2][1][2][0][3][3] = 52, -+ [2][1][2][0][5][3] = 52, -+ [2][1][2][0][6][3] = 52, -+ [2][1][2][0][9][3] = 52, -+ [2][1][2][0][8][3] = 18, -+ [2][1][2][0][11][3] = 40, -+ [2][1][2][0][2][11] = 56, -+ [2][1][2][0][1][11] = 52, -+ [2][1][2][0][3][11] = 52, -+ [2][1][2][0][5][11] = 52, -+ [2][1][2][0][6][11] = 52, -+ [2][1][2][0][9][11] = 52, -+ [2][1][2][0][8][11] = 42, -+ [2][1][2][0][11][11] = 40, -+ [2][1][2][0][2][18] = 56, -+ [2][1][2][0][1][18] = 52, -+ [2][1][2][0][3][18] = 72, -+ [2][1][2][0][5][18] = 56, -+ [2][1][2][0][6][18] = 52, -+ [2][1][2][0][9][18] = 52, -+ [2][1][2][0][8][18] = 42, -+ [2][1][2][0][11][18] = 40, -+ [2][1][2][0][2][26] = 72, -+ [2][1][2][0][1][26] = 52, -+ [2][1][2][0][3][26] = 72, -+ [2][1][2][0][5][26] = 127, -+ [2][1][2][0][6][26] = 52, -+ [2][1][2][0][9][26] = 127, -+ [2][1][2][0][8][26] = 42, -+ [2][1][2][0][11][26] = 40, -+ [2][1][2][0][2][34] = 72, -+ [2][1][2][0][1][34] = 127, -+ [2][1][2][0][3][34] = 72, -+ [2][1][2][0][5][34] = 72, -+ [2][1][2][0][6][34] = 52, -+ [2][1][2][0][9][34] = 72, -+ [2][1][2][0][8][34] = 42, -+ [2][1][2][0][11][34] = 127, -+ [2][1][2][0][2][41] = 72, -+ [2][1][2][0][1][41] = 16, -+ [2][1][2][0][3][41] = 127, -+ [2][1][2][0][5][41] = 72, -+ [2][1][2][0][6][41] = 16, -+ [2][1][2][0][9][41] = 72, -+ [2][1][2][0][8][41] = 42, -+ [2][1][2][0][11][41] = 40, -+ [2][1][2][1][2][3] = 56, -+ [2][1][2][1][1][3] = 40, -+ [2][1][2][1][3][3] = 52, -+ [2][1][2][1][5][3] = 40, -+ [2][1][2][1][6][3] = 40, -+ [2][1][2][1][9][3] = 40, -+ [2][1][2][1][8][3] = 6, -+ [2][1][2][1][11][3] = 28, -+ [2][1][2][1][2][11] = 56, -+ [2][1][2][1][1][11] = 40, -+ [2][1][2][1][3][11] = 52, -+ [2][1][2][1][5][11] = 40, -+ [2][1][2][1][6][11] = 40, -+ [2][1][2][1][9][11] = 40, -+ [2][1][2][1][8][11] = 30, -+ [2][1][2][1][11][11] = 28, -+ [2][1][2][1][2][18] = 56, -+ [2][1][2][1][1][18] = 40, -+ [2][1][2][1][3][18] = 72, -+ [2][1][2][1][5][18] = 56, -+ [2][1][2][1][6][18] = 40, -+ [2][1][2][1][9][18] = 40, -+ [2][1][2][1][8][18] = 30, -+ [2][1][2][1][11][18] = 28, -+ [2][1][2][1][2][26] = 68, -+ [2][1][2][1][1][26] = 40, -+ [2][1][2][1][3][26] = 72, -+ [2][1][2][1][5][26] = 127, -+ [2][1][2][1][6][26] = 40, -+ [2][1][2][1][9][26] = 127, -+ [2][1][2][1][8][26] = 30, -+ [2][1][2][1][11][26] = 28, -+ [2][1][2][1][2][34] = 68, -+ [2][1][2][1][1][34] = 127, -+ [2][1][2][1][3][34] = 72, -+ [2][1][2][1][5][34] = 68, -+ [2][1][2][1][6][34] = 40, -+ [2][1][2][1][9][34] = 68, -+ [2][1][2][1][8][34] = 30, -+ [2][1][2][1][11][34] = 127, -+ [2][1][2][1][2][41] = 72, -+ [2][1][2][1][1][41] = 4, -+ [2][1][2][1][3][41] = 127, -+ [2][1][2][1][5][41] = 72, -+ [2][1][2][1][6][41] = 4, -+ [2][1][2][1][9][41] = 72, -+ [2][1][2][1][8][41] = 30, -+ [2][1][2][1][11][41] = 28, -+}; -+ -+const s8 rtw89_8852a_txpwr_lmt_ru_2g[RTW89_RU_NUM][RTW89_NTX_NUM] -+ [RTW89_REGD_NUM][RTW89_2G_CH_NUM] = { -+ [0][0][0][0] = 32, -+ [0][0][0][1] = 32, -+ [0][0][0][2] = 32, -+ [0][0][0][3] = 32, -+ [0][0][0][4] = 32, -+ [0][0][0][5] = 32, -+ [0][0][0][6] = 32, -+ [0][0][0][7] = 32, -+ [0][0][0][8] = 32, -+ [0][0][0][9] = 32, -+ [0][0][0][10] = 32, -+ [0][0][0][11] = 32, -+ [0][0][0][12] = 32, -+ [0][0][0][13] = 0, -+ [0][1][0][0] = 20, -+ [0][1][0][1] = 20, -+ [0][1][0][2] = 20, -+ [0][1][0][3] = 20, -+ [0][1][0][4] = 20, -+ [0][1][0][5] = 20, -+ [0][1][0][6] = 20, -+ [0][1][0][7] = 20, -+ [0][1][0][8] = 20, -+ [0][1][0][9] = 20, -+ [0][1][0][10] = 20, -+ [0][1][0][11] = 20, -+ [0][1][0][12] = 20, -+ [0][1][0][13] = 0, -+ [1][0][0][0] = 42, -+ [1][0][0][1] = 42, -+ [1][0][0][2] = 42, -+ [1][0][0][3] = 42, -+ [1][0][0][4] = 42, -+ [1][0][0][5] = 42, -+ [1][0][0][6] = 42, -+ [1][0][0][7] = 42, -+ [1][0][0][8] = 42, -+ [1][0][0][9] = 42, -+ [1][0][0][10] = 42, -+ [1][0][0][11] = 42, -+ [1][0][0][12] = 36, -+ [1][0][0][13] = 0, -+ [1][1][0][0] = 30, -+ [1][1][0][1] = 30, -+ [1][1][0][2] = 30, -+ [1][1][0][3] = 30, -+ [1][1][0][4] = 30, -+ [1][1][0][5] = 30, -+ [1][1][0][6] = 30, -+ [1][1][0][7] = 30, -+ [1][1][0][8] = 30, -+ [1][1][0][9] = 30, -+ [1][1][0][10] = 30, -+ [1][1][0][11] = 30, -+ [1][1][0][12] = 30, -+ [1][1][0][13] = 0, -+ [2][0][0][0] = 52, -+ [2][0][0][1] = 52, -+ [2][0][0][2] = 52, -+ [2][0][0][3] = 52, -+ [2][0][0][4] = 52, -+ [2][0][0][5] = 52, -+ [2][0][0][6] = 52, -+ [2][0][0][7] = 52, -+ [2][0][0][8] = 52, -+ [2][0][0][9] = 52, -+ [2][0][0][10] = 52, -+ [2][0][0][11] = 52, -+ [2][0][0][12] = 40, -+ [2][0][0][13] = 0, -+ [2][1][0][0] = 40, -+ [2][1][0][1] = 40, -+ [2][1][0][2] = 40, -+ [2][1][0][3] = 40, -+ [2][1][0][4] = 40, -+ [2][1][0][5] = 40, -+ [2][1][0][6] = 40, -+ [2][1][0][7] = 40, -+ [2][1][0][8] = 40, -+ [2][1][0][9] = 40, -+ [2][1][0][10] = 40, -+ [2][1][0][11] = 40, -+ [2][1][0][12] = 26, -+ [2][1][0][13] = 0, -+ [0][0][2][0] = 70, -+ [0][0][1][0] = 32, -+ [0][0][3][0] = 40, -+ [0][0][5][0] = 70, -+ [0][0][6][0] = 32, -+ [0][0][9][0] = 32, -+ [0][0][8][0] = 60, -+ [0][0][11][0] = 32, -+ [0][0][2][1] = 70, -+ [0][0][1][1] = 32, -+ [0][0][3][1] = 40, -+ [0][0][5][1] = 70, -+ [0][0][6][1] = 32, -+ [0][0][9][1] = 32, -+ [0][0][8][1] = 60, -+ [0][0][11][1] = 32, -+ [0][0][2][2] = 74, -+ [0][0][1][2] = 32, -+ [0][0][3][2] = 40, -+ [0][0][5][2] = 74, -+ [0][0][6][2] = 32, -+ [0][0][9][2] = 32, -+ [0][0][8][2] = 60, -+ [0][0][11][2] = 32, -+ [0][0][2][3] = 78, -+ [0][0][1][3] = 32, -+ [0][0][3][3] = 40, -+ [0][0][5][3] = 78, -+ [0][0][6][3] = 32, -+ [0][0][9][3] = 32, -+ [0][0][8][3] = 60, -+ [0][0][11][3] = 32, -+ [0][0][2][4] = 78, -+ [0][0][1][4] = 32, -+ [0][0][3][4] = 40, -+ [0][0][5][4] = 78, -+ [0][0][6][4] = 32, -+ [0][0][9][4] = 32, -+ [0][0][8][4] = 60, -+ [0][0][11][4] = 32, -+ [0][0][2][5] = 78, -+ [0][0][1][5] = 32, -+ [0][0][3][5] = 40, -+ [0][0][5][5] = 78, -+ [0][0][6][5] = 32, -+ [0][0][9][5] = 32, -+ [0][0][8][5] = 60, -+ [0][0][11][5] = 32, -+ [0][0][2][6] = 78, -+ [0][0][1][6] = 32, -+ [0][0][3][6] = 40, -+ [0][0][5][6] = 78, -+ [0][0][6][6] = 32, -+ [0][0][9][6] = 32, -+ [0][0][8][6] = 60, -+ [0][0][11][6] = 32, -+ [0][0][2][7] = 78, -+ [0][0][1][7] = 32, -+ [0][0][3][7] = 40, -+ [0][0][5][7] = 78, -+ [0][0][6][7] = 32, -+ [0][0][9][7] = 32, -+ [0][0][8][7] = 60, -+ [0][0][11][7] = 32, -+ [0][0][2][8] = 74, -+ [0][0][1][8] = 32, -+ [0][0][3][8] = 40, -+ [0][0][5][8] = 74, -+ [0][0][6][8] = 32, -+ [0][0][9][8] = 32, -+ [0][0][8][8] = 60, -+ [0][0][11][8] = 32, -+ [0][0][2][9] = 70, -+ [0][0][1][9] = 32, -+ [0][0][3][9] = 40, -+ [0][0][5][9] = 70, -+ [0][0][6][9] = 32, -+ [0][0][9][9] = 32, -+ [0][0][8][9] = 60, -+ [0][0][11][9] = 32, -+ [0][0][2][10] = 70, -+ [0][0][1][10] = 32, -+ [0][0][3][10] = 40, -+ [0][0][5][10] = 70, -+ [0][0][6][10] = 32, -+ [0][0][9][10] = 32, -+ [0][0][8][10] = 60, -+ [0][0][11][10] = 32, -+ [0][0][2][11] = 58, -+ [0][0][1][11] = 32, -+ [0][0][3][11] = 40, -+ [0][0][5][11] = 58, -+ [0][0][6][11] = 32, -+ [0][0][9][11] = 32, -+ [0][0][8][11] = 60, -+ [0][0][11][11] = 32, -+ [0][0][2][12] = 34, -+ [0][0][1][12] = 32, -+ [0][0][3][12] = 40, -+ [0][0][5][12] = 34, -+ [0][0][6][12] = 32, -+ [0][0][9][12] = 32, -+ [0][0][8][12] = 60, -+ [0][0][11][12] = 32, -+ [0][0][2][13] = 127, -+ [0][0][1][13] = 127, -+ [0][0][3][13] = 127, -+ [0][0][5][13] = 127, -+ [0][0][6][13] = 127, -+ [0][0][9][13] = 127, -+ [0][0][8][13] = 127, -+ [0][0][11][13] = 127, -+ [0][1][2][0] = 64, -+ [0][1][1][0] = 20, -+ [0][1][3][0] = 28, -+ [0][1][5][0] = 64, -+ [0][1][6][0] = 20, -+ [0][1][9][0] = 20, -+ [0][1][8][0] = 48, -+ [0][1][11][0] = 20, -+ [0][1][2][1] = 64, -+ [0][1][1][1] = 20, -+ [0][1][3][1] = 28, -+ [0][1][5][1] = 64, -+ [0][1][6][1] = 20, -+ [0][1][9][1] = 20, -+ [0][1][8][1] = 48, -+ [0][1][11][1] = 20, -+ [0][1][2][2] = 68, -+ [0][1][1][2] = 20, -+ [0][1][3][2] = 28, -+ [0][1][5][2] = 68, -+ [0][1][6][2] = 20, -+ [0][1][9][2] = 20, -+ [0][1][8][2] = 48, -+ [0][1][11][2] = 20, -+ [0][1][2][3] = 72, -+ [0][1][1][3] = 20, -+ [0][1][3][3] = 28, -+ [0][1][5][3] = 72, -+ [0][1][6][3] = 20, -+ [0][1][9][3] = 20, -+ [0][1][8][3] = 48, -+ [0][1][11][3] = 20, -+ [0][1][2][4] = 76, -+ [0][1][1][4] = 20, -+ [0][1][3][4] = 28, -+ [0][1][5][4] = 76, -+ [0][1][6][4] = 20, -+ [0][1][9][4] = 20, -+ [0][1][8][4] = 48, -+ [0][1][11][4] = 20, -+ [0][1][2][5] = 78, -+ [0][1][1][5] = 20, -+ [0][1][3][5] = 28, -+ [0][1][5][5] = 78, -+ [0][1][6][5] = 20, -+ [0][1][9][5] = 20, -+ [0][1][8][5] = 48, -+ [0][1][11][5] = 20, -+ [0][1][2][6] = 76, -+ [0][1][1][6] = 20, -+ [0][1][3][6] = 28, -+ [0][1][5][6] = 76, -+ [0][1][6][6] = 20, -+ [0][1][9][6] = 20, -+ [0][1][8][6] = 48, -+ [0][1][11][6] = 20, -+ [0][1][2][7] = 72, -+ [0][1][1][7] = 20, -+ [0][1][3][7] = 28, -+ [0][1][5][7] = 72, -+ [0][1][6][7] = 20, -+ [0][1][9][7] = 20, -+ [0][1][8][7] = 48, -+ [0][1][11][7] = 20, -+ [0][1][2][8] = 68, -+ [0][1][1][8] = 20, -+ [0][1][3][8] = 28, -+ [0][1][5][8] = 68, -+ [0][1][6][8] = 20, -+ [0][1][9][8] = 20, -+ [0][1][8][8] = 48, -+ [0][1][11][8] = 20, -+ [0][1][2][9] = 64, -+ [0][1][1][9] = 20, -+ [0][1][3][9] = 28, -+ [0][1][5][9] = 64, -+ [0][1][6][9] = 20, -+ [0][1][9][9] = 20, -+ [0][1][8][9] = 48, -+ [0][1][11][9] = 20, -+ [0][1][2][10] = 64, -+ [0][1][1][10] = 20, -+ [0][1][3][10] = 28, -+ [0][1][5][10] = 64, -+ [0][1][6][10] = 20, -+ [0][1][9][10] = 20, -+ [0][1][8][10] = 48, -+ [0][1][11][10] = 20, -+ [0][1][2][11] = 54, -+ [0][1][1][11] = 20, -+ [0][1][3][11] = 28, -+ [0][1][5][11] = 54, -+ [0][1][6][11] = 20, -+ [0][1][9][11] = 20, -+ [0][1][8][11] = 48, -+ [0][1][11][11] = 20, -+ [0][1][2][12] = 32, -+ [0][1][1][12] = 20, -+ [0][1][3][12] = 28, -+ [0][1][5][12] = 32, -+ [0][1][6][12] = 20, -+ [0][1][9][12] = 20, -+ [0][1][8][12] = 48, -+ [0][1][11][12] = 20, -+ [0][1][2][13] = 127, -+ [0][1][1][13] = 127, -+ [0][1][3][13] = 127, -+ [0][1][5][13] = 127, -+ [0][1][6][13] = 127, -+ [0][1][9][13] = 127, -+ [0][1][8][13] = 127, -+ [0][1][11][13] = 127, -+ [1][0][2][0] = 72, -+ [1][0][1][0] = 42, -+ [1][0][3][0] = 50, -+ [1][0][5][0] = 72, -+ [1][0][6][0] = 42, -+ [1][0][9][0] = 42, -+ [1][0][8][0] = 60, -+ [1][0][11][0] = 42, -+ [1][0][2][1] = 72, -+ [1][0][1][1] = 42, -+ [1][0][3][1] = 50, -+ [1][0][5][1] = 72, -+ [1][0][6][1] = 42, -+ [1][0][9][1] = 42, -+ [1][0][8][1] = 60, -+ [1][0][11][1] = 42, -+ [1][0][2][2] = 76, -+ [1][0][1][2] = 42, -+ [1][0][3][2] = 50, -+ [1][0][5][2] = 76, -+ [1][0][6][2] = 42, -+ [1][0][9][2] = 42, -+ [1][0][8][2] = 60, -+ [1][0][11][2] = 42, -+ [1][0][2][3] = 78, -+ [1][0][1][3] = 42, -+ [1][0][3][3] = 50, -+ [1][0][5][3] = 78, -+ [1][0][6][3] = 42, -+ [1][0][9][3] = 42, -+ [1][0][8][3] = 60, -+ [1][0][11][3] = 42, -+ [1][0][2][4] = 78, -+ [1][0][1][4] = 42, -+ [1][0][3][4] = 50, -+ [1][0][5][4] = 78, -+ [1][0][6][4] = 42, -+ [1][0][9][4] = 42, -+ [1][0][8][4] = 60, -+ [1][0][11][4] = 42, -+ [1][0][2][5] = 78, -+ [1][0][1][5] = 42, -+ [1][0][3][5] = 50, -+ [1][0][5][5] = 78, -+ [1][0][6][5] = 42, -+ [1][0][9][5] = 42, -+ [1][0][8][5] = 60, -+ [1][0][11][5] = 42, -+ [1][0][2][6] = 78, -+ [1][0][1][6] = 42, -+ [1][0][3][6] = 50, -+ [1][0][5][6] = 78, -+ [1][0][6][6] = 42, -+ [1][0][9][6] = 42, -+ [1][0][8][6] = 60, -+ [1][0][11][6] = 42, -+ [1][0][2][7] = 78, -+ [1][0][1][7] = 42, -+ [1][0][3][7] = 50, -+ [1][0][5][7] = 78, -+ [1][0][6][7] = 42, -+ [1][0][9][7] = 42, -+ [1][0][8][7] = 60, -+ [1][0][11][7] = 42, -+ [1][0][2][8] = 78, -+ [1][0][1][8] = 42, -+ [1][0][3][8] = 50, -+ [1][0][5][8] = 78, -+ [1][0][6][8] = 42, -+ [1][0][9][8] = 42, -+ [1][0][8][8] = 60, -+ [1][0][11][8] = 42, -+ [1][0][2][9] = 74, -+ [1][0][1][9] = 42, -+ [1][0][3][9] = 50, -+ [1][0][5][9] = 74, -+ [1][0][6][9] = 42, -+ [1][0][9][9] = 42, -+ [1][0][8][9] = 60, -+ [1][0][11][9] = 42, -+ [1][0][2][10] = 74, -+ [1][0][1][10] = 42, -+ [1][0][3][10] = 50, -+ [1][0][5][10] = 74, -+ [1][0][6][10] = 42, -+ [1][0][9][10] = 42, -+ [1][0][8][10] = 60, -+ [1][0][11][10] = 42, -+ [1][0][2][11] = 64, -+ [1][0][1][11] = 42, -+ [1][0][3][11] = 50, -+ [1][0][5][11] = 64, -+ [1][0][6][11] = 42, -+ [1][0][9][11] = 42, -+ [1][0][8][11] = 60, -+ [1][0][11][11] = 42, -+ [1][0][2][12] = 36, -+ [1][0][1][12] = 42, -+ [1][0][3][12] = 50, -+ [1][0][5][12] = 36, -+ [1][0][6][12] = 42, -+ [1][0][9][12] = 42, -+ [1][0][8][12] = 60, -+ [1][0][11][12] = 42, -+ [1][0][2][13] = 127, -+ [1][0][1][13] = 127, -+ [1][0][3][13] = 127, -+ [1][0][5][13] = 127, -+ [1][0][6][13] = 127, -+ [1][0][9][13] = 127, -+ [1][0][8][13] = 127, -+ [1][0][11][13] = 127, -+ [1][1][2][0] = 66, -+ [1][1][1][0] = 30, -+ [1][1][3][0] = 38, -+ [1][1][5][0] = 66, -+ [1][1][6][0] = 30, -+ [1][1][9][0] = 30, -+ [1][1][8][0] = 48, -+ [1][1][11][0] = 30, -+ [1][1][2][1] = 66, -+ [1][1][1][1] = 30, -+ [1][1][3][1] = 38, -+ [1][1][5][1] = 66, -+ [1][1][6][1] = 30, -+ [1][1][9][1] = 30, -+ [1][1][8][1] = 48, -+ [1][1][11][1] = 30, -+ [1][1][2][2] = 70, -+ [1][1][1][2] = 30, -+ [1][1][3][2] = 38, -+ [1][1][5][2] = 70, -+ [1][1][6][2] = 30, -+ [1][1][9][2] = 30, -+ [1][1][8][2] = 48, -+ [1][1][11][2] = 30, -+ [1][1][2][3] = 74, -+ [1][1][1][3] = 30, -+ [1][1][3][3] = 38, -+ [1][1][5][3] = 74, -+ [1][1][6][3] = 30, -+ [1][1][9][3] = 30, -+ [1][1][8][3] = 48, -+ [1][1][11][3] = 30, -+ [1][1][2][4] = 78, -+ [1][1][1][4] = 30, -+ [1][1][3][4] = 38, -+ [1][1][5][4] = 78, -+ [1][1][6][4] = 30, -+ [1][1][9][4] = 30, -+ [1][1][8][4] = 48, -+ [1][1][11][4] = 30, -+ [1][1][2][5] = 78, -+ [1][1][1][5] = 30, -+ [1][1][3][5] = 38, -+ [1][1][5][5] = 78, -+ [1][1][6][5] = 30, -+ [1][1][9][5] = 30, -+ [1][1][8][5] = 48, -+ [1][1][11][5] = 30, -+ [1][1][2][6] = 78, -+ [1][1][1][6] = 30, -+ [1][1][3][6] = 38, -+ [1][1][5][6] = 78, -+ [1][1][6][6] = 30, -+ [1][1][9][6] = 30, -+ [1][1][8][6] = 48, -+ [1][1][11][6] = 30, -+ [1][1][2][7] = 74, -+ [1][1][1][7] = 30, -+ [1][1][3][7] = 38, -+ [1][1][5][7] = 74, -+ [1][1][6][7] = 30, -+ [1][1][9][7] = 30, -+ [1][1][8][7] = 48, -+ [1][1][11][7] = 30, -+ [1][1][2][8] = 70, -+ [1][1][1][8] = 30, -+ [1][1][3][8] = 38, -+ [1][1][5][8] = 70, -+ [1][1][6][8] = 30, -+ [1][1][9][8] = 30, -+ [1][1][8][8] = 48, -+ [1][1][11][8] = 30, -+ [1][1][2][9] = 66, -+ [1][1][1][9] = 30, -+ [1][1][3][9] = 38, -+ [1][1][5][9] = 66, -+ [1][1][6][9] = 30, -+ [1][1][9][9] = 30, -+ [1][1][8][9] = 48, -+ [1][1][11][9] = 30, -+ [1][1][2][10] = 66, -+ [1][1][1][10] = 30, -+ [1][1][3][10] = 38, -+ [1][1][5][10] = 66, -+ [1][1][6][10] = 30, -+ [1][1][9][10] = 30, -+ [1][1][8][10] = 48, -+ [1][1][11][10] = 30, -+ [1][1][2][11] = 60, -+ [1][1][1][11] = 30, -+ [1][1][3][11] = 38, -+ [1][1][5][11] = 60, -+ [1][1][6][11] = 30, -+ [1][1][9][11] = 30, -+ [1][1][8][11] = 48, -+ [1][1][11][11] = 30, -+ [1][1][2][12] = 32, -+ [1][1][1][12] = 30, -+ [1][1][3][12] = 38, -+ [1][1][5][12] = 32, -+ [1][1][6][12] = 30, -+ [1][1][9][12] = 30, -+ [1][1][8][12] = 48, -+ [1][1][11][12] = 30, -+ [1][1][2][13] = 127, -+ [1][1][1][13] = 127, -+ [1][1][3][13] = 127, -+ [1][1][5][13] = 127, -+ [1][1][6][13] = 127, -+ [1][1][9][13] = 127, -+ [1][1][8][13] = 127, -+ [1][1][11][13] = 127, -+ [2][0][2][0] = 76, -+ [2][0][1][0] = 52, -+ [2][0][3][0] = 64, -+ [2][0][5][0] = 76, -+ [2][0][6][0] = 52, -+ [2][0][9][0] = 52, -+ [2][0][8][0] = 60, -+ [2][0][11][0] = 52, -+ [2][0][2][1] = 76, -+ [2][0][1][1] = 52, -+ [2][0][3][1] = 64, -+ [2][0][5][1] = 76, -+ [2][0][6][1] = 52, -+ [2][0][9][1] = 52, -+ [2][0][8][1] = 60, -+ [2][0][11][1] = 52, -+ [2][0][2][2] = 78, -+ [2][0][1][2] = 52, -+ [2][0][3][2] = 64, -+ [2][0][5][2] = 78, -+ [2][0][6][2] = 52, -+ [2][0][9][2] = 52, -+ [2][0][8][2] = 60, -+ [2][0][11][2] = 52, -+ [2][0][2][3] = 78, -+ [2][0][1][3] = 52, -+ [2][0][3][3] = 64, -+ [2][0][5][3] = 78, -+ [2][0][6][3] = 52, -+ [2][0][9][3] = 52, -+ [2][0][8][3] = 60, -+ [2][0][11][3] = 52, -+ [2][0][2][4] = 78, -+ [2][0][1][4] = 52, -+ [2][0][3][4] = 64, -+ [2][0][5][4] = 78, -+ [2][0][6][4] = 52, -+ [2][0][9][4] = 52, -+ [2][0][8][4] = 60, -+ [2][0][11][4] = 52, -+ [2][0][2][5] = 78, -+ [2][0][1][5] = 52, -+ [2][0][3][5] = 64, -+ [2][0][5][5] = 78, -+ [2][0][6][5] = 52, -+ [2][0][9][5] = 52, -+ [2][0][8][5] = 60, -+ [2][0][11][5] = 52, -+ [2][0][2][6] = 78, -+ [2][0][1][6] = 52, -+ [2][0][3][6] = 64, -+ [2][0][5][6] = 78, -+ [2][0][6][6] = 52, -+ [2][0][9][6] = 52, -+ [2][0][8][6] = 60, -+ [2][0][11][6] = 52, -+ [2][0][2][7] = 78, -+ [2][0][1][7] = 52, -+ [2][0][3][7] = 64, -+ [2][0][5][7] = 78, -+ [2][0][6][7] = 52, -+ [2][0][9][7] = 52, -+ [2][0][8][7] = 60, -+ [2][0][11][7] = 52, -+ [2][0][2][8] = 78, -+ [2][0][1][8] = 52, -+ [2][0][3][8] = 64, -+ [2][0][5][8] = 78, -+ [2][0][6][8] = 52, -+ [2][0][9][8] = 52, -+ [2][0][8][8] = 60, -+ [2][0][11][8] = 52, -+ [2][0][2][9] = 76, -+ [2][0][1][9] = 52, -+ [2][0][3][9] = 64, -+ [2][0][5][9] = 76, -+ [2][0][6][9] = 52, -+ [2][0][9][9] = 52, -+ [2][0][8][9] = 60, -+ [2][0][11][9] = 52, -+ [2][0][2][10] = 76, -+ [2][0][1][10] = 52, -+ [2][0][3][10] = 64, -+ [2][0][5][10] = 76, -+ [2][0][6][10] = 52, -+ [2][0][9][10] = 52, -+ [2][0][8][10] = 60, -+ [2][0][11][10] = 52, -+ [2][0][2][11] = 68, -+ [2][0][1][11] = 52, -+ [2][0][3][11] = 64, -+ [2][0][5][11] = 68, -+ [2][0][6][11] = 52, -+ [2][0][9][11] = 52, -+ [2][0][8][11] = 60, -+ [2][0][11][11] = 52, -+ [2][0][2][12] = 40, -+ [2][0][1][12] = 52, -+ [2][0][3][12] = 64, -+ [2][0][5][12] = 40, -+ [2][0][6][12] = 52, -+ [2][0][9][12] = 52, -+ [2][0][8][12] = 60, -+ [2][0][11][12] = 52, -+ [2][0][2][13] = 127, -+ [2][0][1][13] = 127, -+ [2][0][3][13] = 127, -+ [2][0][5][13] = 127, -+ [2][0][6][13] = 127, -+ [2][0][9][13] = 127, -+ [2][0][8][13] = 127, -+ [2][0][11][13] = 127, -+ [2][1][2][0] = 68, -+ [2][1][1][0] = 40, -+ [2][1][3][0] = 52, -+ [2][1][5][0] = 68, -+ [2][1][6][0] = 40, -+ [2][1][9][0] = 40, -+ [2][1][8][0] = 48, -+ [2][1][11][0] = 40, -+ [2][1][2][1] = 68, -+ [2][1][1][1] = 40, -+ [2][1][3][1] = 52, -+ [2][1][5][1] = 68, -+ [2][1][6][1] = 40, -+ [2][1][9][1] = 40, -+ [2][1][8][1] = 48, -+ [2][1][11][1] = 40, -+ [2][1][2][2] = 72, -+ [2][1][1][2] = 40, -+ [2][1][3][2] = 52, -+ [2][1][5][2] = 72, -+ [2][1][6][2] = 40, -+ [2][1][9][2] = 40, -+ [2][1][8][2] = 48, -+ [2][1][11][2] = 40, -+ [2][1][2][3] = 76, -+ [2][1][1][3] = 40, -+ [2][1][3][3] = 52, -+ [2][1][5][3] = 76, -+ [2][1][6][3] = 40, -+ [2][1][9][3] = 40, -+ [2][1][8][3] = 48, -+ [2][1][11][3] = 40, -+ [2][1][2][4] = 78, -+ [2][1][1][4] = 40, -+ [2][1][3][4] = 52, -+ [2][1][5][4] = 78, -+ [2][1][6][4] = 40, -+ [2][1][9][4] = 40, -+ [2][1][8][4] = 48, -+ [2][1][11][4] = 40, -+ [2][1][2][5] = 78, -+ [2][1][1][5] = 40, -+ [2][1][3][5] = 52, -+ [2][1][5][5] = 78, -+ [2][1][6][5] = 40, -+ [2][1][9][5] = 40, -+ [2][1][8][5] = 48, -+ [2][1][11][5] = 40, -+ [2][1][2][6] = 78, -+ [2][1][1][6] = 40, -+ [2][1][3][6] = 52, -+ [2][1][5][6] = 78, -+ [2][1][6][6] = 40, -+ [2][1][9][6] = 40, -+ [2][1][8][6] = 48, -+ [2][1][11][6] = 40, -+ [2][1][2][7] = 78, -+ [2][1][1][7] = 40, -+ [2][1][3][7] = 52, -+ [2][1][5][7] = 78, -+ [2][1][6][7] = 40, -+ [2][1][9][7] = 40, -+ [2][1][8][7] = 48, -+ [2][1][11][7] = 40, -+ [2][1][2][8] = 74, -+ [2][1][1][8] = 40, -+ [2][1][3][8] = 52, -+ [2][1][5][8] = 74, -+ [2][1][6][8] = 40, -+ [2][1][9][8] = 40, -+ [2][1][8][8] = 48, -+ [2][1][11][8] = 40, -+ [2][1][2][9] = 70, -+ [2][1][1][9] = 40, -+ [2][1][3][9] = 52, -+ [2][1][5][9] = 70, -+ [2][1][6][9] = 40, -+ [2][1][9][9] = 40, -+ [2][1][8][9] = 48, -+ [2][1][11][9] = 40, -+ [2][1][2][10] = 70, -+ [2][1][1][10] = 40, -+ [2][1][3][10] = 52, -+ [2][1][5][10] = 70, -+ [2][1][6][10] = 40, -+ [2][1][9][10] = 40, -+ [2][1][8][10] = 48, -+ [2][1][11][10] = 40, -+ [2][1][2][11] = 48, -+ [2][1][1][11] = 40, -+ [2][1][3][11] = 52, -+ [2][1][5][11] = 48, -+ [2][1][6][11] = 40, -+ [2][1][9][11] = 40, -+ [2][1][8][11] = 48, -+ [2][1][11][11] = 40, -+ [2][1][2][12] = 26, -+ [2][1][1][12] = 40, -+ [2][1][3][12] = 52, -+ [2][1][5][12] = 26, -+ [2][1][6][12] = 40, -+ [2][1][9][12] = 40, -+ [2][1][8][12] = 48, -+ [2][1][11][12] = 40, -+ [2][1][2][13] = 127, -+ [2][1][1][13] = 127, -+ [2][1][3][13] = 127, -+ [2][1][5][13] = 127, -+ [2][1][6][13] = 127, -+ [2][1][9][13] = 127, -+ [2][1][8][13] = 127, -+ [2][1][11][13] = 127, -+}; -+ -+const s8 rtw89_8852a_txpwr_lmt_ru_5g[RTW89_RU_NUM][RTW89_NTX_NUM] -+ [RTW89_REGD_NUM][RTW89_5G_CH_NUM] = { -+ [0][0][0][0] = 22, -+ [0][0][0][2] = 22, -+ [0][0][0][4] = 22, -+ [0][0][0][6] = 22, -+ [0][0][0][8] = 24, -+ [0][0][0][10] = 24, -+ [0][0][0][12] = 24, -+ [0][0][0][14] = 24, -+ [0][0][0][15] = 24, -+ [0][0][0][17] = 24, -+ [0][0][0][19] = 24, -+ [0][0][0][21] = 24, -+ [0][0][0][23] = 24, -+ [0][0][0][25] = 24, -+ [0][0][0][27] = 24, -+ [0][0][0][29] = 24, -+ [0][0][0][31] = 24, -+ [0][0][0][33] = 24, -+ [0][0][0][35] = 24, -+ [0][0][0][37] = 24, -+ [0][0][0][38] = 28, -+ [0][0][0][40] = 28, -+ [0][0][0][42] = 28, -+ [0][0][0][44] = 28, -+ [0][0][0][46] = 28, -+ [0][1][0][0] = 8, -+ [0][1][0][2] = 8, -+ [0][1][0][4] = 8, -+ [0][1][0][6] = 8, -+ [0][1][0][8] = 12, -+ [0][1][0][10] = 12, -+ [0][1][0][12] = 12, -+ [0][1][0][14] = 12, -+ [0][1][0][15] = 12, -+ [0][1][0][17] = 12, -+ [0][1][0][19] = 12, -+ [0][1][0][21] = 12, -+ [0][1][0][23] = 12, -+ [0][1][0][25] = 12, -+ [0][1][0][27] = 12, -+ [0][1][0][29] = 12, -+ [0][1][0][31] = 12, -+ [0][1][0][33] = 12, -+ [0][1][0][35] = 12, -+ [0][1][0][37] = 12, -+ [0][1][0][38] = 16, -+ [0][1][0][40] = 16, -+ [0][1][0][42] = 16, -+ [0][1][0][44] = 16, -+ [0][1][0][46] = 16, -+ [1][0][0][0] = 30, -+ [1][0][0][2] = 30, -+ [1][0][0][4] = 30, -+ [1][0][0][6] = 30, -+ [1][0][0][8] = 36, -+ [1][0][0][10] = 36, -+ [1][0][0][12] = 36, -+ [1][0][0][14] = 36, -+ [1][0][0][15] = 36, -+ [1][0][0][17] = 36, -+ [1][0][0][19] = 36, -+ [1][0][0][21] = 36, -+ [1][0][0][23] = 36, -+ [1][0][0][25] = 36, -+ [1][0][0][27] = 36, -+ [1][0][0][29] = 36, -+ [1][0][0][31] = 36, -+ [1][0][0][33] = 36, -+ [1][0][0][35] = 36, -+ [1][0][0][37] = 36, -+ [1][0][0][38] = 28, -+ [1][0][0][40] = 28, -+ [1][0][0][42] = 28, -+ [1][0][0][44] = 28, -+ [1][0][0][46] = 28, -+ [1][1][0][0] = 18, -+ [1][1][0][2] = 18, -+ [1][1][0][4] = 18, -+ [1][1][0][6] = 18, -+ [1][1][0][8] = 22, -+ [1][1][0][10] = 22, -+ [1][1][0][12] = 22, -+ [1][1][0][14] = 22, -+ [1][1][0][15] = 22, -+ [1][1][0][17] = 22, -+ [1][1][0][19] = 22, -+ [1][1][0][21] = 22, -+ [1][1][0][23] = 22, -+ [1][1][0][25] = 22, -+ [1][1][0][27] = 22, -+ [1][1][0][29] = 22, -+ [1][1][0][31] = 22, -+ [1][1][0][33] = 22, -+ [1][1][0][35] = 22, -+ [1][1][0][37] = 22, -+ [1][1][0][38] = 16, -+ [1][1][0][40] = 16, -+ [1][1][0][42] = 16, -+ [1][1][0][44] = 16, -+ [1][1][0][46] = 16, -+ [2][0][0][0] = 30, -+ [2][0][0][2] = 30, -+ [2][0][0][4] = 30, -+ [2][0][0][6] = 30, -+ [2][0][0][8] = 46, -+ [2][0][0][10] = 46, -+ [2][0][0][12] = 46, -+ [2][0][0][14] = 46, -+ [2][0][0][15] = 46, -+ [2][0][0][17] = 46, -+ [2][0][0][19] = 46, -+ [2][0][0][21] = 46, -+ [2][0][0][23] = 46, -+ [2][0][0][25] = 46, -+ [2][0][0][27] = 46, -+ [2][0][0][29] = 46, -+ [2][0][0][31] = 46, -+ [2][0][0][33] = 46, -+ [2][0][0][35] = 46, -+ [2][0][0][37] = 46, -+ [2][0][0][38] = 28, -+ [2][0][0][40] = 28, -+ [2][0][0][42] = 28, -+ [2][0][0][44] = 28, -+ [2][0][0][46] = 28, -+ [2][1][0][0] = 18, -+ [2][1][0][2] = 18, -+ [2][1][0][4] = 18, -+ [2][1][0][6] = 18, -+ [2][1][0][8] = 32, -+ [2][1][0][10] = 32, -+ [2][1][0][12] = 32, -+ [2][1][0][14] = 32, -+ [2][1][0][15] = 32, -+ [2][1][0][17] = 32, -+ [2][1][0][19] = 32, -+ [2][1][0][21] = 32, -+ [2][1][0][23] = 32, -+ [2][1][0][25] = 32, -+ [2][1][0][27] = 32, -+ [2][1][0][29] = 32, -+ [2][1][0][31] = 32, -+ [2][1][0][33] = 32, -+ [2][1][0][35] = 32, -+ [2][1][0][37] = 32, -+ [2][1][0][38] = 16, -+ [2][1][0][40] = 16, -+ [2][1][0][42] = 16, -+ [2][1][0][44] = 16, -+ [2][1][0][46] = 16, -+ [0][0][2][0] = 48, -+ [0][0][1][0] = 24, -+ [0][0][3][0] = 26, -+ [0][0][5][0] = 22, -+ [0][0][6][0] = 24, -+ [0][0][9][0] = 24, -+ [0][0][8][0] = 30, -+ [0][0][11][0] = 24, -+ [0][0][2][2] = 48, -+ [0][0][1][2] = 24, -+ [0][0][3][2] = 26, -+ [0][0][5][2] = 22, -+ [0][0][6][2] = 24, -+ [0][0][9][2] = 24, -+ [0][0][8][2] = 30, -+ [0][0][11][2] = 24, -+ [0][0][2][4] = 48, -+ [0][0][1][4] = 24, -+ [0][0][3][4] = 26, -+ [0][0][5][4] = 22, -+ [0][0][6][4] = 24, -+ [0][0][9][4] = 24, -+ [0][0][8][4] = 30, -+ [0][0][11][4] = 24, -+ [0][0][2][6] = 48, -+ [0][0][1][6] = 24, -+ [0][0][3][6] = 26, -+ [0][0][5][6] = 22, -+ [0][0][6][6] = 24, -+ [0][0][9][6] = 24, -+ [0][0][8][6] = 30, -+ [0][0][11][6] = 24, -+ [0][0][2][8] = 48, -+ [0][0][1][8] = 24, -+ [0][0][3][8] = 26, -+ [0][0][5][8] = 48, -+ [0][0][6][8] = 24, -+ [0][0][9][8] = 24, -+ [0][0][8][8] = 54, -+ [0][0][11][8] = 24, -+ [0][0][2][10] = 48, -+ [0][0][1][10] = 24, -+ [0][0][3][10] = 26, -+ [0][0][5][10] = 48, -+ [0][0][6][10] = 24, -+ [0][0][9][10] = 24, -+ [0][0][8][10] = 54, -+ [0][0][11][10] = 24, -+ [0][0][2][12] = 48, -+ [0][0][1][12] = 24, -+ [0][0][3][12] = 26, -+ [0][0][5][12] = 48, -+ [0][0][6][12] = 24, -+ [0][0][9][12] = 24, -+ [0][0][8][12] = 54, -+ [0][0][11][12] = 24, -+ [0][0][2][14] = 48, -+ [0][0][1][14] = 24, -+ [0][0][3][14] = 26, -+ [0][0][5][14] = 48, -+ [0][0][6][14] = 24, -+ [0][0][9][14] = 24, -+ [0][0][8][14] = 54, -+ [0][0][11][14] = 24, -+ [0][0][2][15] = 48, -+ [0][0][1][15] = 24, -+ [0][0][3][15] = 44, -+ [0][0][5][15] = 48, -+ [0][0][6][15] = 24, -+ [0][0][9][15] = 24, -+ [0][0][8][15] = 54, -+ [0][0][11][15] = 24, -+ [0][0][2][17] = 48, -+ [0][0][1][17] = 24, -+ [0][0][3][17] = 44, -+ [0][0][5][17] = 48, -+ [0][0][6][17] = 24, -+ [0][0][9][17] = 24, -+ [0][0][8][17] = 54, -+ [0][0][11][17] = 24, -+ [0][0][2][19] = 48, -+ [0][0][1][19] = 24, -+ [0][0][3][19] = 44, -+ [0][0][5][19] = 48, -+ [0][0][6][19] = 24, -+ [0][0][9][19] = 24, -+ [0][0][8][19] = 54, -+ [0][0][11][19] = 24, -+ [0][0][2][21] = 48, -+ [0][0][1][21] = 24, -+ [0][0][3][21] = 44, -+ [0][0][5][21] = 48, -+ [0][0][6][21] = 24, -+ [0][0][9][21] = 24, -+ [0][0][8][21] = 54, -+ [0][0][11][21] = 24, -+ [0][0][2][23] = 48, -+ [0][0][1][23] = 24, -+ [0][0][3][23] = 44, -+ [0][0][5][23] = 48, -+ [0][0][6][23] = 24, -+ [0][0][9][23] = 24, -+ [0][0][8][23] = 54, -+ [0][0][11][23] = 24, -+ [0][0][2][25] = 48, -+ [0][0][1][25] = 24, -+ [0][0][3][25] = 44, -+ [0][0][5][25] = 127, -+ [0][0][6][25] = 24, -+ [0][0][9][25] = 127, -+ [0][0][8][25] = 54, -+ [0][0][11][25] = 24, -+ [0][0][2][27] = 48, -+ [0][0][1][27] = 24, -+ [0][0][3][27] = 44, -+ [0][0][5][27] = 127, -+ [0][0][6][27] = 24, -+ [0][0][9][27] = 127, -+ [0][0][8][27] = 54, -+ [0][0][11][27] = 24, -+ [0][0][2][29] = 48, -+ [0][0][1][29] = 24, -+ [0][0][3][29] = 44, -+ [0][0][5][29] = 127, -+ [0][0][6][29] = 24, -+ [0][0][9][29] = 127, -+ [0][0][8][29] = 54, -+ [0][0][11][29] = 24, -+ [0][0][2][31] = 48, -+ [0][0][1][31] = 24, -+ [0][0][3][31] = 44, -+ [0][0][5][31] = 48, -+ [0][0][6][31] = 24, -+ [0][0][9][31] = 24, -+ [0][0][8][31] = 54, -+ [0][0][11][31] = 24, -+ [0][0][2][33] = 48, -+ [0][0][1][33] = 24, -+ [0][0][3][33] = 44, -+ [0][0][5][33] = 48, -+ [0][0][6][33] = 24, -+ [0][0][9][33] = 24, -+ [0][0][8][33] = 54, -+ [0][0][11][33] = 24, -+ [0][0][2][35] = 48, -+ [0][0][1][35] = 24, -+ [0][0][3][35] = 44, -+ [0][0][5][35] = 48, -+ [0][0][6][35] = 24, -+ [0][0][9][35] = 24, -+ [0][0][8][35] = 54, -+ [0][0][11][35] = 24, -+ [0][0][2][37] = 48, -+ [0][0][1][37] = 127, -+ [0][0][3][37] = 44, -+ [0][0][5][37] = 48, -+ [0][0][6][37] = 24, -+ [0][0][9][37] = 48, -+ [0][0][8][37] = 54, -+ [0][0][11][37] = 127, -+ [0][0][2][38] = 76, -+ [0][0][1][38] = 28, -+ [0][0][3][38] = 127, -+ [0][0][5][38] = 76, -+ [0][0][6][38] = 28, -+ [0][0][9][38] = 76, -+ [0][0][8][38] = 54, -+ [0][0][11][38] = 28, -+ [0][0][2][40] = 76, -+ [0][0][1][40] = 28, -+ [0][0][3][40] = 127, -+ [0][0][5][40] = 76, -+ [0][0][6][40] = 28, -+ [0][0][9][40] = 76, -+ [0][0][8][40] = 54, -+ [0][0][11][40] = 28, -+ [0][0][2][42] = 76, -+ [0][0][1][42] = 28, -+ [0][0][3][42] = 127, -+ [0][0][5][42] = 76, -+ [0][0][6][42] = 28, -+ [0][0][9][42] = 76, -+ [0][0][8][42] = 54, -+ [0][0][11][42] = 28, -+ [0][0][2][44] = 76, -+ [0][0][1][44] = 28, -+ [0][0][3][44] = 127, -+ [0][0][5][44] = 76, -+ [0][0][6][44] = 28, -+ [0][0][9][44] = 76, -+ [0][0][8][44] = 54, -+ [0][0][11][44] = 28, -+ [0][0][2][46] = 76, -+ [0][0][1][46] = 28, -+ [0][0][3][46] = 127, -+ [0][0][5][46] = 76, -+ [0][0][6][46] = 28, -+ [0][0][9][46] = 76, -+ [0][0][8][46] = 54, -+ [0][0][11][46] = 28, -+ [0][1][2][0] = 36, -+ [0][1][1][0] = 12, -+ [0][1][3][0] = 14, -+ [0][1][5][0] = 8, -+ [0][1][6][0] = 12, -+ [0][1][9][0] = 12, -+ [0][1][8][0] = 18, -+ [0][1][11][0] = 12, -+ [0][1][2][2] = 36, -+ [0][1][1][2] = 12, -+ [0][1][3][2] = 14, -+ [0][1][5][2] = 8, -+ [0][1][6][2] = 12, -+ [0][1][9][2] = 12, -+ [0][1][8][2] = 18, -+ [0][1][11][2] = 12, -+ [0][1][2][4] = 36, -+ [0][1][1][4] = 12, -+ [0][1][3][4] = 14, -+ [0][1][5][4] = 8, -+ [0][1][6][4] = 12, -+ [0][1][9][4] = 12, -+ [0][1][8][4] = 18, -+ [0][1][11][4] = 12, -+ [0][1][2][6] = 36, -+ [0][1][1][6] = 12, -+ [0][1][3][6] = 14, -+ [0][1][5][6] = 8, -+ [0][1][6][6] = 12, -+ [0][1][9][6] = 12, -+ [0][1][8][6] = 18, -+ [0][1][11][6] = 12, -+ [0][1][2][8] = 36, -+ [0][1][1][8] = 12, -+ [0][1][3][8] = 14, -+ [0][1][5][8] = 36, -+ [0][1][6][8] = 12, -+ [0][1][9][8] = 12, -+ [0][1][8][8] = 42, -+ [0][1][11][8] = 12, -+ [0][1][2][10] = 36, -+ [0][1][1][10] = 12, -+ [0][1][3][10] = 14, -+ [0][1][5][10] = 36, -+ [0][1][6][10] = 12, -+ [0][1][9][10] = 12, -+ [0][1][8][10] = 42, -+ [0][1][11][10] = 12, -+ [0][1][2][12] = 36, -+ [0][1][1][12] = 12, -+ [0][1][3][12] = 14, -+ [0][1][5][12] = 36, -+ [0][1][6][12] = 12, -+ [0][1][9][12] = 12, -+ [0][1][8][12] = 42, -+ [0][1][11][12] = 12, -+ [0][1][2][14] = 36, -+ [0][1][1][14] = 12, -+ [0][1][3][14] = 14, -+ [0][1][5][14] = 36, -+ [0][1][6][14] = 12, -+ [0][1][9][14] = 12, -+ [0][1][8][14] = 42, -+ [0][1][11][14] = 12, -+ [0][1][2][15] = 36, -+ [0][1][1][15] = 12, -+ [0][1][3][15] = 32, -+ [0][1][5][15] = 36, -+ [0][1][6][15] = 12, -+ [0][1][9][15] = 12, -+ [0][1][8][15] = 42, -+ [0][1][11][15] = 12, -+ [0][1][2][17] = 36, -+ [0][1][1][17] = 12, -+ [0][1][3][17] = 32, -+ [0][1][5][17] = 36, -+ [0][1][6][17] = 12, -+ [0][1][9][17] = 12, -+ [0][1][8][17] = 42, -+ [0][1][11][17] = 12, -+ [0][1][2][19] = 36, -+ [0][1][1][19] = 12, -+ [0][1][3][19] = 32, -+ [0][1][5][19] = 36, -+ [0][1][6][19] = 12, -+ [0][1][9][19] = 12, -+ [0][1][8][19] = 42, -+ [0][1][11][19] = 12, -+ [0][1][2][21] = 36, -+ [0][1][1][21] = 12, -+ [0][1][3][21] = 32, -+ [0][1][5][21] = 36, -+ [0][1][6][21] = 12, -+ [0][1][9][21] = 12, -+ [0][1][8][21] = 42, -+ [0][1][11][21] = 12, -+ [0][1][2][23] = 36, -+ [0][1][1][23] = 12, -+ [0][1][3][23] = 32, -+ [0][1][5][23] = 36, -+ [0][1][6][23] = 12, -+ [0][1][9][23] = 12, -+ [0][1][8][23] = 42, -+ [0][1][11][23] = 12, -+ [0][1][2][25] = 36, -+ [0][1][1][25] = 12, -+ [0][1][3][25] = 32, -+ [0][1][5][25] = 127, -+ [0][1][6][25] = 12, -+ [0][1][9][25] = 127, -+ [0][1][8][25] = 42, -+ [0][1][11][25] = 12, -+ [0][1][2][27] = 36, -+ [0][1][1][27] = 12, -+ [0][1][3][27] = 32, -+ [0][1][5][27] = 127, -+ [0][1][6][27] = 12, -+ [0][1][9][27] = 127, -+ [0][1][8][27] = 42, -+ [0][1][11][27] = 12, -+ [0][1][2][29] = 36, -+ [0][1][1][29] = 12, -+ [0][1][3][29] = 32, -+ [0][1][5][29] = 127, -+ [0][1][6][29] = 12, -+ [0][1][9][29] = 127, -+ [0][1][8][29] = 42, -+ [0][1][11][29] = 12, -+ [0][1][2][31] = 36, -+ [0][1][1][31] = 12, -+ [0][1][3][31] = 32, -+ [0][1][5][31] = 36, -+ [0][1][6][31] = 12, -+ [0][1][9][31] = 12, -+ [0][1][8][31] = 42, -+ [0][1][11][31] = 12, -+ [0][1][2][33] = 36, -+ [0][1][1][33] = 12, -+ [0][1][3][33] = 32, -+ [0][1][5][33] = 36, -+ [0][1][6][33] = 12, -+ [0][1][9][33] = 12, -+ [0][1][8][33] = 42, -+ [0][1][11][33] = 12, -+ [0][1][2][35] = 36, -+ [0][1][1][35] = 12, -+ [0][1][3][35] = 32, -+ [0][1][5][35] = 36, -+ [0][1][6][35] = 12, -+ [0][1][9][35] = 12, -+ [0][1][8][35] = 42, -+ [0][1][11][35] = 12, -+ [0][1][2][37] = 36, -+ [0][1][1][37] = 127, -+ [0][1][3][37] = 32, -+ [0][1][5][37] = 36, -+ [0][1][6][37] = 12, -+ [0][1][9][37] = 36, -+ [0][1][8][37] = 42, -+ [0][1][11][37] = 127, -+ [0][1][2][38] = 72, -+ [0][1][1][38] = 16, -+ [0][1][3][38] = 127, -+ [0][1][5][38] = 72, -+ [0][1][6][38] = 16, -+ [0][1][9][38] = 76, -+ [0][1][8][38] = 42, -+ [0][1][11][38] = 16, -+ [0][1][2][40] = 76, -+ [0][1][1][40] = 16, -+ [0][1][3][40] = 127, -+ [0][1][5][40] = 76, -+ [0][1][6][40] = 16, -+ [0][1][9][40] = 76, -+ [0][1][8][40] = 42, -+ [0][1][11][40] = 16, -+ [0][1][2][42] = 76, -+ [0][1][1][42] = 16, -+ [0][1][3][42] = 127, -+ [0][1][5][42] = 76, -+ [0][1][6][42] = 16, -+ [0][1][9][42] = 76, -+ [0][1][8][42] = 42, -+ [0][1][11][42] = 16, -+ [0][1][2][44] = 76, -+ [0][1][1][44] = 16, -+ [0][1][3][44] = 127, -+ [0][1][5][44] = 76, -+ [0][1][6][44] = 16, -+ [0][1][9][44] = 76, -+ [0][1][8][44] = 42, -+ [0][1][11][44] = 16, -+ [0][1][2][46] = 76, -+ [0][1][1][46] = 16, -+ [0][1][3][46] = 127, -+ [0][1][5][46] = 76, -+ [0][1][6][46] = 16, -+ [0][1][9][46] = 76, -+ [0][1][8][46] = 42, -+ [0][1][11][46] = 16, -+ [1][0][2][0] = 62, -+ [1][0][1][0] = 36, -+ [1][0][3][0] = 36, -+ [1][0][5][0] = 34, -+ [1][0][6][0] = 36, -+ [1][0][9][0] = 36, -+ [1][0][8][0] = 30, -+ [1][0][11][0] = 36, -+ [1][0][2][2] = 62, -+ [1][0][1][2] = 36, -+ [1][0][3][2] = 36, -+ [1][0][5][2] = 34, -+ [1][0][6][2] = 36, -+ [1][0][9][2] = 36, -+ [1][0][8][2] = 30, -+ [1][0][11][2] = 36, -+ [1][0][2][4] = 62, -+ [1][0][1][4] = 36, -+ [1][0][3][4] = 36, -+ [1][0][5][4] = 34, -+ [1][0][6][4] = 36, -+ [1][0][9][4] = 36, -+ [1][0][8][4] = 30, -+ [1][0][11][4] = 36, -+ [1][0][2][6] = 62, -+ [1][0][1][6] = 36, -+ [1][0][3][6] = 36, -+ [1][0][5][6] = 34, -+ [1][0][6][6] = 36, -+ [1][0][9][6] = 36, -+ [1][0][8][6] = 30, -+ [1][0][11][6] = 36, -+ [1][0][2][8] = 62, -+ [1][0][1][8] = 36, -+ [1][0][3][8] = 36, -+ [1][0][5][8] = 62, -+ [1][0][6][8] = 36, -+ [1][0][9][8] = 36, -+ [1][0][8][8] = 54, -+ [1][0][11][8] = 36, -+ [1][0][2][10] = 62, -+ [1][0][1][10] = 36, -+ [1][0][3][10] = 36, -+ [1][0][5][10] = 62, -+ [1][0][6][10] = 36, -+ [1][0][9][10] = 36, -+ [1][0][8][10] = 54, -+ [1][0][11][10] = 36, -+ [1][0][2][12] = 62, -+ [1][0][1][12] = 36, -+ [1][0][3][12] = 36, -+ [1][0][5][12] = 62, -+ [1][0][6][12] = 36, -+ [1][0][9][12] = 36, -+ [1][0][8][12] = 54, -+ [1][0][11][12] = 36, -+ [1][0][2][14] = 62, -+ [1][0][1][14] = 36, -+ [1][0][3][14] = 36, -+ [1][0][5][14] = 62, -+ [1][0][6][14] = 36, -+ [1][0][9][14] = 36, -+ [1][0][8][14] = 54, -+ [1][0][11][14] = 36, -+ [1][0][2][15] = 62, -+ [1][0][1][15] = 36, -+ [1][0][3][15] = 58, -+ [1][0][5][15] = 62, -+ [1][0][6][15] = 36, -+ [1][0][9][15] = 36, -+ [1][0][8][15] = 54, -+ [1][0][11][15] = 36, -+ [1][0][2][17] = 62, -+ [1][0][1][17] = 36, -+ [1][0][3][17] = 58, -+ [1][0][5][17] = 62, -+ [1][0][6][17] = 36, -+ [1][0][9][17] = 36, -+ [1][0][8][17] = 54, -+ [1][0][11][17] = 36, -+ [1][0][2][19] = 62, -+ [1][0][1][19] = 36, -+ [1][0][3][19] = 58, -+ [1][0][5][19] = 62, -+ [1][0][6][19] = 36, -+ [1][0][9][19] = 36, -+ [1][0][8][19] = 54, -+ [1][0][11][19] = 36, -+ [1][0][2][21] = 62, -+ [1][0][1][21] = 36, -+ [1][0][3][21] = 58, -+ [1][0][5][21] = 62, -+ [1][0][6][21] = 36, -+ [1][0][9][21] = 36, -+ [1][0][8][21] = 54, -+ [1][0][11][21] = 36, -+ [1][0][2][23] = 62, -+ [1][0][1][23] = 36, -+ [1][0][3][23] = 58, -+ [1][0][5][23] = 62, -+ [1][0][6][23] = 36, -+ [1][0][9][23] = 36, -+ [1][0][8][23] = 54, -+ [1][0][11][23] = 36, -+ [1][0][2][25] = 62, -+ [1][0][1][25] = 36, -+ [1][0][3][25] = 58, -+ [1][0][5][25] = 127, -+ [1][0][6][25] = 36, -+ [1][0][9][25] = 127, -+ [1][0][8][25] = 54, -+ [1][0][11][25] = 36, -+ [1][0][2][27] = 62, -+ [1][0][1][27] = 36, -+ [1][0][3][27] = 58, -+ [1][0][5][27] = 127, -+ [1][0][6][27] = 36, -+ [1][0][9][27] = 127, -+ [1][0][8][27] = 54, -+ [1][0][11][27] = 36, -+ [1][0][2][29] = 62, -+ [1][0][1][29] = 36, -+ [1][0][3][29] = 58, -+ [1][0][5][29] = 127, -+ [1][0][6][29] = 36, -+ [1][0][9][29] = 127, -+ [1][0][8][29] = 54, -+ [1][0][11][29] = 36, -+ [1][0][2][31] = 62, -+ [1][0][1][31] = 36, -+ [1][0][3][31] = 58, -+ [1][0][5][31] = 62, -+ [1][0][6][31] = 36, -+ [1][0][9][31] = 36, -+ [1][0][8][31] = 54, -+ [1][0][11][31] = 36, -+ [1][0][2][33] = 62, -+ [1][0][1][33] = 36, -+ [1][0][3][33] = 58, -+ [1][0][5][33] = 62, -+ [1][0][6][33] = 36, -+ [1][0][9][33] = 36, -+ [1][0][8][33] = 54, -+ [1][0][11][33] = 36, -+ [1][0][2][35] = 62, -+ [1][0][1][35] = 36, -+ [1][0][3][35] = 58, -+ [1][0][5][35] = 62, -+ [1][0][6][35] = 36, -+ [1][0][9][35] = 36, -+ [1][0][8][35] = 54, -+ [1][0][11][35] = 36, -+ [1][0][2][37] = 56, -+ [1][0][1][37] = 62, -+ [1][0][3][37] = 127, -+ [1][0][5][37] = 58, -+ [1][0][6][37] = 62, -+ [1][0][9][37] = 36, -+ [1][0][8][37] = 62, -+ [1][0][11][37] = 54, -+ [1][0][2][38] = 76, -+ [1][0][1][38] = 28, -+ [1][0][3][38] = 127, -+ [1][0][5][38] = 76, -+ [1][0][6][38] = 28, -+ [1][0][9][38] = 76, -+ [1][0][8][38] = 54, -+ [1][0][11][38] = 28, -+ [1][0][2][40] = 76, -+ [1][0][1][40] = 28, -+ [1][0][3][40] = 127, -+ [1][0][5][40] = 76, -+ [1][0][6][40] = 28, -+ [1][0][9][40] = 76, -+ [1][0][8][40] = 54, -+ [1][0][11][40] = 28, -+ [1][0][2][42] = 76, -+ [1][0][1][42] = 28, -+ [1][0][3][42] = 127, -+ [1][0][5][42] = 76, -+ [1][0][6][42] = 28, -+ [1][0][9][42] = 76, -+ [1][0][8][42] = 54, -+ [1][0][11][42] = 28, -+ [1][0][2][44] = 76, -+ [1][0][1][44] = 28, -+ [1][0][3][44] = 127, -+ [1][0][5][44] = 76, -+ [1][0][6][44] = 28, -+ [1][0][9][44] = 76, -+ [1][0][8][44] = 54, -+ [1][0][11][44] = 28, -+ [1][0][2][46] = 76, -+ [1][0][1][46] = 28, -+ [1][0][3][46] = 127, -+ [1][0][5][46] = 76, -+ [1][0][6][46] = 28, -+ [1][0][9][46] = 76, -+ [1][0][8][46] = 54, -+ [1][0][11][46] = 28, -+ [1][1][2][0] = 46, -+ [1][1][1][0] = 22, -+ [1][1][3][0] = 24, -+ [1][1][5][0] = 18, -+ [1][1][6][0] = 22, -+ [1][1][9][0] = 22, -+ [1][1][8][0] = 18, -+ [1][1][11][0] = 22, -+ [1][1][2][2] = 46, -+ [1][1][1][2] = 22, -+ [1][1][3][2] = 24, -+ [1][1][5][2] = 18, -+ [1][1][6][2] = 22, -+ [1][1][9][2] = 22, -+ [1][1][8][2] = 18, -+ [1][1][11][2] = 22, -+ [1][1][2][4] = 46, -+ [1][1][1][4] = 22, -+ [1][1][3][4] = 24, -+ [1][1][5][4] = 18, -+ [1][1][6][4] = 22, -+ [1][1][9][4] = 22, -+ [1][1][8][4] = 18, -+ [1][1][11][4] = 22, -+ [1][1][2][6] = 46, -+ [1][1][1][6] = 22, -+ [1][1][3][6] = 24, -+ [1][1][5][6] = 18, -+ [1][1][6][6] = 22, -+ [1][1][9][6] = 22, -+ [1][1][8][6] = 18, -+ [1][1][11][6] = 22, -+ [1][1][2][8] = 46, -+ [1][1][1][8] = 22, -+ [1][1][3][8] = 24, -+ [1][1][5][8] = 46, -+ [1][1][6][8] = 22, -+ [1][1][9][8] = 22, -+ [1][1][8][8] = 42, -+ [1][1][11][8] = 22, -+ [1][1][2][10] = 46, -+ [1][1][1][10] = 22, -+ [1][1][3][10] = 24, -+ [1][1][5][10] = 46, -+ [1][1][6][10] = 22, -+ [1][1][9][10] = 22, -+ [1][1][8][10] = 42, -+ [1][1][11][10] = 22, -+ [1][1][2][12] = 46, -+ [1][1][1][12] = 22, -+ [1][1][3][12] = 24, -+ [1][1][5][12] = 46, -+ [1][1][6][12] = 22, -+ [1][1][9][12] = 22, -+ [1][1][8][12] = 42, -+ [1][1][11][12] = 22, -+ [1][1][2][14] = 46, -+ [1][1][1][14] = 22, -+ [1][1][3][14] = 24, -+ [1][1][5][14] = 46, -+ [1][1][6][14] = 22, -+ [1][1][9][14] = 22, -+ [1][1][8][14] = 42, -+ [1][1][11][14] = 22, -+ [1][1][2][15] = 46, -+ [1][1][1][15] = 22, -+ [1][1][3][15] = 46, -+ [1][1][5][15] = 46, -+ [1][1][6][15] = 22, -+ [1][1][9][15] = 22, -+ [1][1][8][15] = 42, -+ [1][1][11][15] = 22, -+ [1][1][2][17] = 46, -+ [1][1][1][17] = 22, -+ [1][1][3][17] = 46, -+ [1][1][5][17] = 46, -+ [1][1][6][17] = 22, -+ [1][1][9][17] = 22, -+ [1][1][8][17] = 42, -+ [1][1][11][17] = 22, -+ [1][1][2][19] = 46, -+ [1][1][1][19] = 22, -+ [1][1][3][19] = 46, -+ [1][1][5][19] = 46, -+ [1][1][6][19] = 22, -+ [1][1][9][19] = 22, -+ [1][1][8][19] = 42, -+ [1][1][11][19] = 22, -+ [1][1][2][21] = 46, -+ [1][1][1][21] = 22, -+ [1][1][3][21] = 46, -+ [1][1][5][21] = 46, -+ [1][1][6][21] = 22, -+ [1][1][9][21] = 22, -+ [1][1][8][21] = 42, -+ [1][1][11][21] = 22, -+ [1][1][2][23] = 46, -+ [1][1][1][23] = 22, -+ [1][1][3][23] = 46, -+ [1][1][5][23] = 46, -+ [1][1][6][23] = 22, -+ [1][1][9][23] = 22, -+ [1][1][8][23] = 42, -+ [1][1][11][23] = 22, -+ [1][1][2][25] = 46, -+ [1][1][1][25] = 22, -+ [1][1][3][25] = 46, -+ [1][1][5][25] = 127, -+ [1][1][6][25] = 22, -+ [1][1][9][25] = 127, -+ [1][1][8][25] = 42, -+ [1][1][11][25] = 22, -+ [1][1][2][27] = 46, -+ [1][1][1][27] = 22, -+ [1][1][3][27] = 46, -+ [1][1][5][27] = 127, -+ [1][1][6][27] = 22, -+ [1][1][9][27] = 127, -+ [1][1][8][27] = 42, -+ [1][1][11][27] = 22, -+ [1][1][2][29] = 46, -+ [1][1][1][29] = 22, -+ [1][1][3][29] = 46, -+ [1][1][5][29] = 127, -+ [1][1][6][29] = 22, -+ [1][1][9][29] = 127, -+ [1][1][8][29] = 42, -+ [1][1][11][29] = 22, -+ [1][1][2][31] = 46, -+ [1][1][1][31] = 22, -+ [1][1][3][31] = 46, -+ [1][1][5][31] = 46, -+ [1][1][6][31] = 22, -+ [1][1][9][31] = 22, -+ [1][1][8][31] = 42, -+ [1][1][11][31] = 22, -+ [1][1][2][33] = 46, -+ [1][1][1][33] = 22, -+ [1][1][3][33] = 46, -+ [1][1][5][33] = 46, -+ [1][1][6][33] = 22, -+ [1][1][9][33] = 22, -+ [1][1][8][33] = 42, -+ [1][1][11][33] = 22, -+ [1][1][2][35] = 46, -+ [1][1][1][35] = 22, -+ [1][1][3][35] = 46, -+ [1][1][5][35] = 46, -+ [1][1][6][35] = 22, -+ [1][1][9][35] = 22, -+ [1][1][8][35] = 42, -+ [1][1][11][35] = 22, -+ [1][1][2][37] = 46, -+ [1][1][1][37] = 127, -+ [1][1][3][37] = 46, -+ [1][1][5][37] = 46, -+ [1][1][6][37] = 22, -+ [1][1][9][37] = 50, -+ [1][1][8][37] = 42, -+ [1][1][11][37] = 127, -+ [1][1][2][38] = 74, -+ [1][1][1][38] = 16, -+ [1][1][3][38] = 127, -+ [1][1][5][38] = 74, -+ [1][1][6][38] = 16, -+ [1][1][9][38] = 76, -+ [1][1][8][38] = 42, -+ [1][1][11][38] = 16, -+ [1][1][2][40] = 76, -+ [1][1][1][40] = 16, -+ [1][1][3][40] = 127, -+ [1][1][5][40] = 76, -+ [1][1][6][40] = 16, -+ [1][1][9][40] = 76, -+ [1][1][8][40] = 42, -+ [1][1][11][40] = 16, -+ [1][1][2][42] = 76, -+ [1][1][1][42] = 16, -+ [1][1][3][42] = 127, -+ [1][1][5][42] = 76, -+ [1][1][6][42] = 16, -+ [1][1][9][42] = 76, -+ [1][1][8][42] = 42, -+ [1][1][11][42] = 16, -+ [1][1][2][44] = 76, -+ [1][1][1][44] = 16, -+ [1][1][3][44] = 127, -+ [1][1][5][44] = 76, -+ [1][1][6][44] = 16, -+ [1][1][9][44] = 76, -+ [1][1][8][44] = 42, -+ [1][1][11][44] = 16, -+ [1][1][2][46] = 76, -+ [1][1][1][46] = 16, -+ [1][1][3][46] = 127, -+ [1][1][5][46] = 76, -+ [1][1][6][46] = 16, -+ [1][1][9][46] = 76, -+ [1][1][8][46] = 42, -+ [1][1][11][46] = 16, -+ [2][0][2][0] = 74, -+ [2][0][1][0] = 46, -+ [2][0][3][0] = 50, -+ [2][0][5][0] = 46, -+ [2][0][6][0] = 46, -+ [2][0][9][0] = 46, -+ [2][0][8][0] = 30, -+ [2][0][11][0] = 46, -+ [2][0][2][2] = 74, -+ [2][0][1][2] = 46, -+ [2][0][3][2] = 50, -+ [2][0][5][2] = 46, -+ [2][0][6][2] = 46, -+ [2][0][9][2] = 46, -+ [2][0][8][2] = 30, -+ [2][0][11][2] = 46, -+ [2][0][2][4] = 74, -+ [2][0][1][4] = 46, -+ [2][0][3][4] = 50, -+ [2][0][5][4] = 46, -+ [2][0][6][4] = 46, -+ [2][0][9][4] = 46, -+ [2][0][8][4] = 30, -+ [2][0][11][4] = 46, -+ [2][0][2][6] = 74, -+ [2][0][1][6] = 46, -+ [2][0][3][6] = 50, -+ [2][0][5][6] = 46, -+ [2][0][6][6] = 46, -+ [2][0][9][6] = 46, -+ [2][0][8][6] = 30, -+ [2][0][11][6] = 46, -+ [2][0][2][8] = 74, -+ [2][0][1][8] = 46, -+ [2][0][3][8] = 50, -+ [2][0][5][8] = 66, -+ [2][0][6][8] = 46, -+ [2][0][9][8] = 46, -+ [2][0][8][8] = 54, -+ [2][0][11][8] = 46, -+ [2][0][2][10] = 74, -+ [2][0][1][10] = 46, -+ [2][0][3][10] = 50, -+ [2][0][5][10] = 66, -+ [2][0][6][10] = 46, -+ [2][0][9][10] = 46, -+ [2][0][8][10] = 54, -+ [2][0][11][10] = 46, -+ [2][0][2][12] = 74, -+ [2][0][1][12] = 46, -+ [2][0][3][12] = 50, -+ [2][0][5][12] = 66, -+ [2][0][6][12] = 46, -+ [2][0][9][12] = 46, -+ [2][0][8][12] = 54, -+ [2][0][11][12] = 46, -+ [2][0][2][14] = 74, -+ [2][0][1][14] = 46, -+ [2][0][3][14] = 50, -+ [2][0][5][14] = 66, -+ [2][0][6][14] = 46, -+ [2][0][9][14] = 46, -+ [2][0][8][14] = 54, -+ [2][0][11][14] = 46, -+ [2][0][2][15] = 74, -+ [2][0][1][15] = 46, -+ [2][0][3][15] = 70, -+ [2][0][5][15] = 74, -+ [2][0][6][15] = 46, -+ [2][0][9][15] = 46, -+ [2][0][8][15] = 54, -+ [2][0][11][15] = 46, -+ [2][0][2][17] = 74, -+ [2][0][1][17] = 46, -+ [2][0][3][17] = 70, -+ [2][0][5][17] = 74, -+ [2][0][6][17] = 46, -+ [2][0][9][17] = 46, -+ [2][0][8][17] = 54, -+ [2][0][11][17] = 46, -+ [2][0][2][19] = 74, -+ [2][0][1][19] = 46, -+ [2][0][3][19] = 70, -+ [2][0][5][19] = 74, -+ [2][0][6][19] = 46, -+ [2][0][9][19] = 46, -+ [2][0][8][19] = 54, -+ [2][0][11][19] = 46, -+ [2][0][2][21] = 74, -+ [2][0][1][21] = 46, -+ [2][0][3][21] = 70, -+ [2][0][5][21] = 74, -+ [2][0][6][21] = 46, -+ [2][0][9][21] = 46, -+ [2][0][8][21] = 54, -+ [2][0][11][21] = 46, -+ [2][0][2][23] = 74, -+ [2][0][1][23] = 46, -+ [2][0][3][23] = 70, -+ [2][0][5][23] = 74, -+ [2][0][6][23] = 46, -+ [2][0][9][23] = 46, -+ [2][0][8][23] = 54, -+ [2][0][11][23] = 46, -+ [2][0][2][25] = 74, -+ [2][0][1][25] = 46, -+ [2][0][3][25] = 70, -+ [2][0][5][25] = 127, -+ [2][0][6][25] = 46, -+ [2][0][9][25] = 127, -+ [2][0][8][25] = 54, -+ [2][0][11][25] = 46, -+ [2][0][2][27] = 74, -+ [2][0][1][27] = 46, -+ [2][0][3][27] = 70, -+ [2][0][5][27] = 127, -+ [2][0][6][27] = 46, -+ [2][0][9][27] = 127, -+ [2][0][8][27] = 54, -+ [2][0][11][27] = 46, -+ [2][0][2][29] = 74, -+ [2][0][1][29] = 46, -+ [2][0][3][29] = 70, -+ [2][0][5][29] = 127, -+ [2][0][6][29] = 46, -+ [2][0][9][29] = 127, -+ [2][0][8][29] = 54, -+ [2][0][11][29] = 46, -+ [2][0][2][31] = 74, -+ [2][0][1][31] = 46, -+ [2][0][3][31] = 70, -+ [2][0][5][31] = 74, -+ [2][0][6][31] = 46, -+ [2][0][9][31] = 46, -+ [2][0][8][31] = 54, -+ [2][0][11][31] = 46, -+ [2][0][2][33] = 74, -+ [2][0][1][33] = 46, -+ [2][0][3][33] = 70, -+ [2][0][5][33] = 74, -+ [2][0][6][33] = 46, -+ [2][0][9][33] = 46, -+ [2][0][8][33] = 54, -+ [2][0][11][33] = 46, -+ [2][0][2][35] = 74, -+ [2][0][1][35] = 46, -+ [2][0][3][35] = 70, -+ [2][0][5][35] = 74, -+ [2][0][6][35] = 46, -+ [2][0][9][35] = 46, -+ [2][0][8][35] = 54, -+ [2][0][11][35] = 46, -+ [2][0][2][37] = 74, -+ [2][0][1][37] = 127, -+ [2][0][3][37] = 70, -+ [2][0][5][37] = 74, -+ [2][0][6][37] = 46, -+ [2][0][9][37] = 74, -+ [2][0][8][37] = 54, -+ [2][0][11][37] = 127, -+ [2][0][2][38] = 76, -+ [2][0][1][38] = 28, -+ [2][0][3][38] = 127, -+ [2][0][5][38] = 76, -+ [2][0][6][38] = 28, -+ [2][0][9][38] = 76, -+ [2][0][8][38] = 54, -+ [2][0][11][38] = 28, -+ [2][0][2][40] = 76, -+ [2][0][1][40] = 28, -+ [2][0][3][40] = 127, -+ [2][0][5][40] = 76, -+ [2][0][6][40] = 28, -+ [2][0][9][40] = 76, -+ [2][0][8][40] = 54, -+ [2][0][11][40] = 28, -+ [2][0][2][42] = 76, -+ [2][0][1][42] = 28, -+ [2][0][3][42] = 127, -+ [2][0][5][42] = 76, -+ [2][0][6][42] = 28, -+ [2][0][9][42] = 76, -+ [2][0][8][42] = 54, -+ [2][0][11][42] = 28, -+ [2][0][2][44] = 76, -+ [2][0][1][44] = 28, -+ [2][0][3][44] = 127, -+ [2][0][5][44] = 76, -+ [2][0][6][44] = 28, -+ [2][0][9][44] = 76, -+ [2][0][8][44] = 54, -+ [2][0][11][44] = 28, -+ [2][0][2][46] = 76, -+ [2][0][1][46] = 28, -+ [2][0][3][46] = 127, -+ [2][0][5][46] = 76, -+ [2][0][6][46] = 28, -+ [2][0][9][46] = 76, -+ [2][0][8][46] = 54, -+ [2][0][11][46] = 28, -+ [2][1][2][0] = 58, -+ [2][1][1][0] = 32, -+ [2][1][3][0] = 38, -+ [2][1][5][0] = 30, -+ [2][1][6][0] = 32, -+ [2][1][9][0] = 32, -+ [2][1][8][0] = 18, -+ [2][1][11][0] = 32, -+ [2][1][2][2] = 58, -+ [2][1][1][2] = 32, -+ [2][1][3][2] = 38, -+ [2][1][5][2] = 30, -+ [2][1][6][2] = 32, -+ [2][1][9][2] = 32, -+ [2][1][8][2] = 18, -+ [2][1][11][2] = 32, -+ [2][1][2][4] = 58, -+ [2][1][1][4] = 32, -+ [2][1][3][4] = 38, -+ [2][1][5][4] = 30, -+ [2][1][6][4] = 32, -+ [2][1][9][4] = 32, -+ [2][1][8][4] = 18, -+ [2][1][11][4] = 32, -+ [2][1][2][6] = 58, -+ [2][1][1][6] = 32, -+ [2][1][3][6] = 38, -+ [2][1][5][6] = 30, -+ [2][1][6][6] = 32, -+ [2][1][9][6] = 32, -+ [2][1][8][6] = 18, -+ [2][1][11][6] = 32, -+ [2][1][2][8] = 58, -+ [2][1][1][8] = 32, -+ [2][1][3][8] = 38, -+ [2][1][5][8] = 52, -+ [2][1][6][8] = 32, -+ [2][1][9][8] = 32, -+ [2][1][8][8] = 42, -+ [2][1][11][8] = 32, -+ [2][1][2][10] = 58, -+ [2][1][1][10] = 32, -+ [2][1][3][10] = 38, -+ [2][1][5][10] = 52, -+ [2][1][6][10] = 32, -+ [2][1][9][10] = 32, -+ [2][1][8][10] = 42, -+ [2][1][11][10] = 32, -+ [2][1][2][12] = 58, -+ [2][1][1][12] = 32, -+ [2][1][3][12] = 38, -+ [2][1][5][12] = 52, -+ [2][1][6][12] = 32, -+ [2][1][9][12] = 32, -+ [2][1][8][12] = 42, -+ [2][1][11][12] = 32, -+ [2][1][2][14] = 58, -+ [2][1][1][14] = 32, -+ [2][1][3][14] = 38, -+ [2][1][5][14] = 52, -+ [2][1][6][14] = 32, -+ [2][1][9][14] = 32, -+ [2][1][8][14] = 42, -+ [2][1][11][14] = 32, -+ [2][1][2][15] = 58, -+ [2][1][1][15] = 32, -+ [2][1][3][15] = 58, -+ [2][1][5][15] = 58, -+ [2][1][6][15] = 32, -+ [2][1][9][15] = 32, -+ [2][1][8][15] = 42, -+ [2][1][11][15] = 32, -+ [2][1][2][17] = 58, -+ [2][1][1][17] = 32, -+ [2][1][3][17] = 58, -+ [2][1][5][17] = 58, -+ [2][1][6][17] = 32, -+ [2][1][9][17] = 32, -+ [2][1][8][17] = 42, -+ [2][1][11][17] = 32, -+ [2][1][2][19] = 58, -+ [2][1][1][19] = 32, -+ [2][1][3][19] = 58, -+ [2][1][5][19] = 58, -+ [2][1][6][19] = 32, -+ [2][1][9][19] = 32, -+ [2][1][8][19] = 42, -+ [2][1][11][19] = 32, -+ [2][1][2][21] = 58, -+ [2][1][1][21] = 32, -+ [2][1][3][21] = 58, -+ [2][1][5][21] = 58, -+ [2][1][6][21] = 32, -+ [2][1][9][21] = 32, -+ [2][1][8][21] = 42, -+ [2][1][11][21] = 32, -+ [2][1][2][23] = 58, -+ [2][1][1][23] = 32, -+ [2][1][3][23] = 58, -+ [2][1][5][23] = 58, -+ [2][1][6][23] = 32, -+ [2][1][9][23] = 32, -+ [2][1][8][23] = 42, -+ [2][1][11][23] = 32, -+ [2][1][2][25] = 58, -+ [2][1][1][25] = 32, -+ [2][1][3][25] = 58, -+ [2][1][5][25] = 127, -+ [2][1][6][25] = 32, -+ [2][1][9][25] = 127, -+ [2][1][8][25] = 42, -+ [2][1][11][25] = 32, -+ [2][1][2][27] = 58, -+ [2][1][1][27] = 32, -+ [2][1][3][27] = 58, -+ [2][1][5][27] = 127, -+ [2][1][6][27] = 32, -+ [2][1][9][27] = 127, -+ [2][1][8][27] = 42, -+ [2][1][11][27] = 32, -+ [2][1][2][29] = 58, -+ [2][1][1][29] = 32, -+ [2][1][3][29] = 58, -+ [2][1][5][29] = 127, -+ [2][1][6][29] = 32, -+ [2][1][9][29] = 127, -+ [2][1][8][29] = 42, -+ [2][1][11][29] = 32, -+ [2][1][2][31] = 58, -+ [2][1][1][31] = 32, -+ [2][1][3][31] = 58, -+ [2][1][5][31] = 58, -+ [2][1][6][31] = 32, -+ [2][1][9][31] = 32, -+ [2][1][8][31] = 42, -+ [2][1][11][31] = 32, -+ [2][1][2][33] = 58, -+ [2][1][1][33] = 32, -+ [2][1][3][33] = 58, -+ [2][1][5][33] = 58, -+ [2][1][6][33] = 32, -+ [2][1][9][33] = 32, -+ [2][1][8][33] = 42, -+ [2][1][11][33] = 32, -+ [2][1][2][35] = 58, -+ [2][1][1][35] = 32, -+ [2][1][3][35] = 58, -+ [2][1][5][35] = 58, -+ [2][1][6][35] = 32, -+ [2][1][9][35] = 32, -+ [2][1][8][35] = 42, -+ [2][1][11][35] = 32, -+ [2][1][2][37] = 58, -+ [2][1][1][37] = 127, -+ [2][1][3][37] = 58, -+ [2][1][5][37] = 58, -+ [2][1][6][37] = 32, -+ [2][1][9][37] = 62, -+ [2][1][8][37] = 42, -+ [2][1][11][37] = 127, -+ [2][1][2][38] = 76, -+ [2][1][1][38] = 16, -+ [2][1][3][38] = 127, -+ [2][1][5][38] = 76, -+ [2][1][6][38] = 16, -+ [2][1][9][38] = 76, -+ [2][1][8][38] = 42, -+ [2][1][11][38] = 16, -+ [2][1][2][40] = 76, -+ [2][1][1][40] = 16, -+ [2][1][3][40] = 127, -+ [2][1][5][40] = 76, -+ [2][1][6][40] = 16, -+ [2][1][9][40] = 76, -+ [2][1][8][40] = 42, -+ [2][1][11][40] = 16, -+ [2][1][2][42] = 76, -+ [2][1][1][42] = 16, -+ [2][1][3][42] = 127, -+ [2][1][5][42] = 76, -+ [2][1][6][42] = 16, -+ [2][1][9][42] = 76, -+ [2][1][8][42] = 42, -+ [2][1][11][42] = 16, -+ [2][1][2][44] = 76, -+ [2][1][1][44] = 16, -+ [2][1][3][44] = 127, -+ [2][1][5][44] = 76, -+ [2][1][6][44] = 16, -+ [2][1][9][44] = 76, -+ [2][1][8][44] = 42, -+ [2][1][11][44] = 16, -+ [2][1][2][46] = 76, -+ [2][1][1][46] = 16, -+ [2][1][3][46] = 127, -+ [2][1][5][46] = 76, -+ [2][1][6][46] = 16, -+ [2][1][9][46] = 76, -+ [2][1][8][46] = 42, -+ [2][1][11][46] = 16, -+}; -+ -+#define DECLARE_DIG_TABLE(name) \ -+static const struct rtw89_phy_dig_gain_cfg name##_table = { \ -+ .table = name, \ -+ .size = ARRAY_SIZE(name) \ -+} -+ -+static const struct rtw89_reg_def rtw89_8852a_lna_gain_g[] = { -+ {R_PATH0_LNA_ERR1, B_PATH0_LNA_ERR_G0_G_MSK}, -+ {R_PATH0_LNA_ERR2, B_PATH0_LNA_ERR_G1_G_MSK}, -+ {R_PATH0_LNA_ERR2, B_PATH0_LNA_ERR_G2_G_MSK}, -+ {R_PATH0_LNA_ERR3, B_PATH0_LNA_ERR_G3_G_MSK}, -+ {R_PATH0_LNA_ERR3, B_PATH0_LNA_ERR_G4_G_MSK}, -+ {R_PATH0_LNA_ERR4, B_PATH0_LNA_ERR_G5_G_MSK}, -+ {R_PATH0_LNA_ERR5, B_PATH0_LNA_ERR_G6_G_MSK}, -+}; -+ -+DECLARE_DIG_TABLE(rtw89_8852a_lna_gain_g); -+ -+static const struct rtw89_reg_def rtw89_8852a_tia_gain_g[] = { -+ {R_PATH0_TIA_ERR_G0, B_PATH0_TIA_ERR_G0_G_MSK}, -+ {R_PATH0_TIA_ERR_G1, B_PATH0_TIA_ERR_G1_G_MSK}, -+}; -+ -+DECLARE_DIG_TABLE(rtw89_8852a_tia_gain_g); -+ -+static const struct rtw89_reg_def rtw89_8852a_lna_gain_a[] = { -+ {R_PATH0_LNA_ERR1, B_PATH0_LNA_ERR_G0_A_MSK}, -+ {R_PATH0_LNA_ERR1, B_PATH0_LNA_ERR_G1_A_MSK}, -+ {R_PATH0_LNA_ERR2, B_PATH0_LNA_ERR_G2_A_MSK}, -+ {R_PATH0_LNA_ERR3, B_PATH0_LNA_ERR_G3_A_MSK}, -+ {R_PATH0_LNA_ERR3, B_PATH0_LNA_ERR_G4_A_MSK}, -+ {R_PATH0_LNA_ERR4, B_PATH0_LNA_ERR_G5_A_MSK}, -+ {R_PATH0_LNA_ERR4, B_PATH0_LNA_ERR_G6_A_MSK}, -+}; -+ -+DECLARE_DIG_TABLE(rtw89_8852a_lna_gain_a); -+ -+static const struct rtw89_reg_def rtw89_8852a_tia_gain_a[] = { -+ {R_PATH0_TIA_ERR_G0, B_PATH0_TIA_ERR_G0_A_MSK}, -+ {R_PATH0_TIA_ERR_G1, B_PATH0_TIA_ERR_G1_A_MSK}, -+}; -+ -+DECLARE_DIG_TABLE(rtw89_8852a_tia_gain_a); -+ -+const struct rtw89_phy_table rtw89_8852a_phy_bb_table = { -+ .regs = rtw89_8852a_phy_bb_regs, -+ .n_regs = ARRAY_SIZE(rtw89_8852a_phy_bb_regs), -+ .rf_path = 0, /* don't care */ -+}; -+ -+const struct rtw89_phy_table rtw89_8852a_phy_radioa_table = { -+ .regs = rtw89_8852a_phy_radioa_regs, -+ .n_regs = ARRAY_SIZE(rtw89_8852a_phy_radioa_regs), -+ .rf_path = RF_PATH_A, -+}; -+ -+const struct rtw89_phy_table rtw89_8852a_phy_radiob_table = { -+ .regs = rtw89_8852a_phy_radiob_regs, -+ .n_regs = ARRAY_SIZE(rtw89_8852a_phy_radiob_regs), -+ .rf_path = RF_PATH_B, -+}; -+ -+const struct rtw89_phy_table rtw89_8852a_phy_nctl_table = { -+ .regs = rtw89_8852a_phy_nctl_regs, -+ .n_regs = ARRAY_SIZE(rtw89_8852a_phy_nctl_regs), -+ .rf_path = 0, /* don't care */ -+}; -+ -+const struct rtw89_txpwr_table rtw89_8852a_byr_table = { -+ .data = rtw89_8852a_txpwr_byrate, -+ .size = ARRAY_SIZE(rtw89_8852a_txpwr_byrate), -+ .load = rtw89_phy_load_txpwr_byrate, -+}; -+ -+const struct rtw89_txpwr_track_cfg rtw89_8852a_trk_cfg = { -+ .delta_swingidx_5gb_n = _txpwr_track_delta_swingidx_5gb_n, -+ .delta_swingidx_5gb_p = _txpwr_track_delta_swingidx_5gb_p, -+ .delta_swingidx_5ga_n = _txpwr_track_delta_swingidx_5ga_n, -+ .delta_swingidx_5ga_p = _txpwr_track_delta_swingidx_5ga_p, -+ .delta_swingidx_2gb_n = _txpwr_track_delta_swingidx_2gb_n, -+ .delta_swingidx_2gb_p = _txpwr_track_delta_swingidx_2gb_p, -+ .delta_swingidx_2ga_n = _txpwr_track_delta_swingidx_2ga_n, -+ .delta_swingidx_2ga_p = _txpwr_track_delta_swingidx_2ga_p, -+ .delta_swingidx_2g_cck_b_n = _txpwr_track_delta_swingidx_2g_cck_b_n, -+ .delta_swingidx_2g_cck_b_p = _txpwr_track_delta_swingidx_2g_cck_b_p, -+ .delta_swingidx_2g_cck_a_n = _txpwr_track_delta_swingidx_2g_cck_a_n, -+ .delta_swingidx_2g_cck_a_p = _txpwr_track_delta_swingidx_2g_cck_a_p, -+}; -+ -+const struct rtw89_phy_dig_gain_table rtw89_8852a_phy_dig_table = { -+ .cfg_lna_g = &rtw89_8852a_lna_gain_g_table, -+ .cfg_tia_g = &rtw89_8852a_tia_gain_g_table, -+ .cfg_lna_a = &rtw89_8852a_lna_gain_a_table, -+ .cfg_tia_a = &rtw89_8852a_tia_gain_a_table -+}; -diff --git a/drivers/net/wireless/realtek/rtw89/rtw8852a_table.h b/drivers/net/wireless/realtek/rtw89/rtw8852a_table.h -new file mode 100644 -index 000000000000..913796506286 ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852a_table.h -@@ -0,0 +1,28 @@ -+/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ -+/* Copyright(c) 2019-2020 Realtek Corporation -+ */ -+ -+#ifndef __RTW89_8852A_TABLE_H__ -+#define __RTW89_8852A_TABLE_H__ -+ -+#include "core.h" -+ -+extern const struct rtw89_phy_table rtw89_8852a_phy_bb_table; -+extern const struct rtw89_phy_table rtw89_8852a_phy_radioa_table; -+extern const struct rtw89_phy_table rtw89_8852a_phy_radiob_table; -+extern const struct rtw89_phy_table rtw89_8852a_phy_nctl_table; -+extern const struct rtw89_txpwr_table rtw89_8852a_byr_table; -+extern const struct rtw89_phy_dig_gain_table rtw89_8852a_phy_dig_table; -+extern const struct rtw89_txpwr_track_cfg rtw89_8852a_trk_cfg; -+extern const s8 rtw89_8852a_txpwr_lmt_2g[RTW89_2G_BW_NUM][RTW89_NTX_NUM] -+ [RTW89_RS_LMT_NUM][RTW89_BF_NUM] -+ [RTW89_REGD_NUM][RTW89_2G_CH_NUM]; -+extern const s8 rtw89_8852a_txpwr_lmt_5g[RTW89_5G_BW_NUM][RTW89_NTX_NUM] -+ [RTW89_RS_LMT_NUM][RTW89_BF_NUM] -+ [RTW89_REGD_NUM][RTW89_5G_CH_NUM]; -+extern const s8 rtw89_8852a_txpwr_lmt_ru_2g[RTW89_RU_NUM][RTW89_NTX_NUM] -+ [RTW89_REGD_NUM][RTW89_2G_CH_NUM]; -+extern const s8 rtw89_8852a_txpwr_lmt_ru_5g[RTW89_RU_NUM][RTW89_NTX_NUM] -+ [RTW89_REGD_NUM][RTW89_5G_CH_NUM]; -+ -+#endif -diff --git a/drivers/net/wireless/realtek/rtw89/sar.c b/drivers/net/wireless/realtek/rtw89/sar.c -new file mode 100644 -index 000000000000..097c87899cea ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/sar.c -@@ -0,0 +1,190 @@ -+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause -+/* Copyright(c) 2019-2020 Realtek Corporation -+ */ -+ -+#include "debug.h" -+#include "sar.h" -+ -+static int rtw89_query_sar_config_common(struct rtw89_dev *rtwdev, s32 *cfg) -+{ -+ struct rtw89_sar_cfg_common *rtwsar = &rtwdev->sar.cfg_common; -+ enum rtw89_subband subband = rtwdev->hal.current_subband; -+ -+ if (!rtwsar->set[subband]) -+ return -ENODATA; -+ -+ *cfg = rtwsar->cfg[subband]; -+ return 0; -+} -+ -+static const -+struct rtw89_sar_handler rtw89_sar_handlers[RTW89_SAR_SOURCE_NR] = { -+ [RTW89_SAR_SOURCE_COMMON] = { -+ .descr_sar_source = "RTW89_SAR_SOURCE_COMMON", -+ .txpwr_factor_sar = 2, -+ .query_sar_config = rtw89_query_sar_config_common, -+ }, -+}; -+ -+#define rtw89_sar_set_src(_dev, _src, _cfg_name, _cfg_data) \ -+ do { \ -+ typeof(_src) _s = (_src); \ -+ typeof(_dev) _d = (_dev); \ -+ BUILD_BUG_ON(!rtw89_sar_handlers[_s].descr_sar_source); \ -+ BUILD_BUG_ON(!rtw89_sar_handlers[_s].query_sar_config); \ -+ lockdep_assert_held(&_d->mutex); \ -+ _d->sar._cfg_name = *(_cfg_data); \ -+ _d->sar.src = _s; \ -+ } while (0) -+ -+static s8 rtw89_txpwr_sar_to_mac(struct rtw89_dev *rtwdev, u8 fct, s32 cfg) -+{ -+ const u8 fct_mac = rtwdev->chip->txpwr_factor_mac; -+ s32 cfg_mac; -+ -+ cfg_mac = fct > fct_mac ? -+ cfg >> (fct - fct_mac) : cfg << (fct_mac - fct); -+ -+ return (s8)clamp_t(s32, cfg_mac, -+ RTW89_SAR_TXPWR_MAC_MIN, -+ RTW89_SAR_TXPWR_MAC_MAX); -+} -+ -+s8 rtw89_query_sar(struct rtw89_dev *rtwdev) -+{ -+ const enum rtw89_sar_sources src = rtwdev->sar.src; -+ /* its members are protected by rtw89_sar_set_src() */ -+ const struct rtw89_sar_handler *sar_hdl = &rtw89_sar_handlers[src]; -+ int ret; -+ s32 cfg; -+ u8 fct; -+ -+ lockdep_assert_held(&rtwdev->mutex); -+ -+ if (src == RTW89_SAR_SOURCE_NONE) -+ return RTW89_SAR_TXPWR_MAC_MAX; -+ -+ ret = sar_hdl->query_sar_config(rtwdev, &cfg); -+ if (ret) -+ return RTW89_SAR_TXPWR_MAC_MAX; -+ -+ fct = sar_hdl->txpwr_factor_sar; -+ -+ return rtw89_txpwr_sar_to_mac(rtwdev, fct, cfg); -+} -+ -+void rtw89_print_sar(struct seq_file *m, struct rtw89_dev *rtwdev) -+{ -+ const enum rtw89_sar_sources src = rtwdev->sar.src; -+ /* its members are protected by rtw89_sar_set_src() */ -+ const struct rtw89_sar_handler *sar_hdl = &rtw89_sar_handlers[src]; -+ const u8 fct_mac = rtwdev->chip->txpwr_factor_mac; -+ int ret; -+ s32 cfg; -+ u8 fct; -+ -+ lockdep_assert_held(&rtwdev->mutex); -+ -+ if (src == RTW89_SAR_SOURCE_NONE) { -+ seq_puts(m, "no SAR is applied\n"); -+ return; -+ } -+ -+ seq_printf(m, "source: %d (%s)\n", src, sar_hdl->descr_sar_source); -+ -+ ret = sar_hdl->query_sar_config(rtwdev, &cfg); -+ if (ret) { -+ seq_printf(m, "config: return code: %d\n", ret); -+ seq_printf(m, "assign: max setting: %d (unit: 1/%lu dBm)\n", -+ RTW89_SAR_TXPWR_MAC_MAX, BIT(fct_mac)); -+ return; -+ } -+ -+ fct = sar_hdl->txpwr_factor_sar; -+ -+ seq_printf(m, "config: %d (unit: 1/%lu dBm)\n", cfg, BIT(fct)); -+} -+ -+static int rtw89_apply_sar_common(struct rtw89_dev *rtwdev, -+ const struct rtw89_sar_cfg_common *sar) -+{ -+ enum rtw89_sar_sources src; -+ int ret = 0; -+ -+ mutex_lock(&rtwdev->mutex); -+ -+ src = rtwdev->sar.src; -+ if (src != RTW89_SAR_SOURCE_NONE && src != RTW89_SAR_SOURCE_COMMON) { -+ rtw89_warn(rtwdev, "SAR source: %d is in use", src); -+ ret = -EBUSY; -+ goto exit; -+ } -+ -+ rtw89_sar_set_src(rtwdev, RTW89_SAR_SOURCE_COMMON, cfg_common, sar); -+ rtw89_chip_set_txpwr(rtwdev); -+ -+exit: -+ mutex_unlock(&rtwdev->mutex); -+ return ret; -+} -+ -+static const u8 rtw89_common_sar_subband_map[] = { -+ RTW89_CH_2G, -+ RTW89_CH_5G_BAND_1, -+ RTW89_CH_5G_BAND_3, -+ RTW89_CH_5G_BAND_4, -+}; -+ -+static const struct cfg80211_sar_freq_ranges rtw89_common_sar_freq_ranges[] = { -+ { .start_freq = 2412, .end_freq = 2484, }, -+ { .start_freq = 5180, .end_freq = 5320, }, -+ { .start_freq = 5500, .end_freq = 5720, }, -+ { .start_freq = 5745, .end_freq = 5825, }, -+}; -+ -+static_assert(ARRAY_SIZE(rtw89_common_sar_subband_map) == -+ ARRAY_SIZE(rtw89_common_sar_freq_ranges)); -+ -+const struct cfg80211_sar_capa rtw89_sar_capa = { -+ .type = NL80211_SAR_TYPE_POWER, -+ .num_freq_ranges = ARRAY_SIZE(rtw89_common_sar_freq_ranges), -+ .freq_ranges = rtw89_common_sar_freq_ranges, -+}; -+ -+int rtw89_ops_set_sar_specs(struct ieee80211_hw *hw, -+ const struct cfg80211_sar_specs *sar) -+{ -+ struct rtw89_dev *rtwdev = hw->priv; -+ struct rtw89_sar_cfg_common sar_common = {0}; -+ u8 fct; -+ u32 freq_start; -+ u32 freq_end; -+ u32 band; -+ s32 power; -+ u32 i, idx; -+ -+ if (sar->type != NL80211_SAR_TYPE_POWER) -+ return -EINVAL; -+ -+ fct = rtw89_sar_handlers[RTW89_SAR_SOURCE_COMMON].txpwr_factor_sar; -+ -+ for (i = 0; i < sar->num_sub_specs; i++) { -+ idx = sar->sub_specs[i].freq_range_index; -+ if (idx >= ARRAY_SIZE(rtw89_common_sar_freq_ranges)) -+ return -EINVAL; -+ -+ freq_start = rtw89_common_sar_freq_ranges[idx].start_freq; -+ freq_end = rtw89_common_sar_freq_ranges[idx].end_freq; -+ band = rtw89_common_sar_subband_map[idx]; -+ power = sar->sub_specs[i].power; -+ -+ rtw89_info(rtwdev, "On freq %u to %u, ", freq_start, freq_end); -+ rtw89_info(rtwdev, "set SAR power limit %d (unit: 1/%lu dBm)\n", -+ power, BIT(fct)); -+ -+ sar_common.set[band] = true; -+ sar_common.cfg[band] = power; -+ } -+ -+ return rtw89_apply_sar_common(rtwdev, &sar_common); -+} -diff --git a/drivers/net/wireless/realtek/rtw89/sar.h b/drivers/net/wireless/realtek/rtw89/sar.h -new file mode 100644 -index 000000000000..7b5484c84eb1 ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/sar.h -@@ -0,0 +1,26 @@ -+/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ -+/* Copyright(c) 2019-2020 Realtek Corporation -+ */ -+ -+#ifndef __RTW89_SAR_H__ -+#define __RTW89_SAR_H__ -+ -+#include "core.h" -+ -+#define RTW89_SAR_TXPWR_MAC_MAX S8_MAX -+#define RTW89_SAR_TXPWR_MAC_MIN S8_MIN -+ -+struct rtw89_sar_handler { -+ const char *descr_sar_source; -+ u8 txpwr_factor_sar; -+ int (*query_sar_config)(struct rtw89_dev *rtwdev, s32 *cfg); -+}; -+ -+extern const struct cfg80211_sar_capa rtw89_sar_capa; -+ -+s8 rtw89_query_sar(struct rtw89_dev *rtwdev); -+void rtw89_print_sar(struct seq_file *m, struct rtw89_dev *rtwdev); -+int rtw89_ops_set_sar_specs(struct ieee80211_hw *hw, -+ const struct cfg80211_sar_specs *sar); -+ -+#endif -diff --git a/drivers/net/wireless/realtek/rtw89/ser.c b/drivers/net/wireless/realtek/rtw89/ser.c -new file mode 100644 -index 000000000000..837cdc366a61 ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/ser.c -@@ -0,0 +1,491 @@ -+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause -+/* Copyright(c) 2019-2020 Realtek Corporation -+ */ -+ -+#include "cam.h" -+#include "debug.h" -+#include "mac.h" -+#include "ps.h" -+#include "ser.h" -+#include "util.h" -+ -+#define SER_RECFG_TIMEOUT 1000 -+ -+enum ser_evt { -+ SER_EV_NONE, -+ SER_EV_STATE_IN, -+ SER_EV_STATE_OUT, -+ SER_EV_L1_RESET, /* M1 */ -+ SER_EV_DO_RECOVERY, /* M3 */ -+ SER_EV_MAC_RESET_DONE, /* M5 */ -+ SER_EV_L2_RESET, -+ SER_EV_L2_RECFG_DONE, -+ SER_EV_L2_RECFG_TIMEOUT, -+ SER_EV_M3_TIMEOUT, -+ SER_EV_FW_M5_TIMEOUT, -+ SER_EV_L0_RESET, -+ SER_EV_MAXX -+}; -+ -+enum ser_state { -+ SER_IDLE_ST, -+ SER_RESET_TRX_ST, -+ SER_DO_HCI_ST, -+ SER_L2_RESET_ST, -+ SER_ST_MAX_ST -+}; -+ -+struct ser_msg { -+ struct list_head list; -+ u8 event; -+}; -+ -+struct state_ent { -+ u8 state; -+ char *name; -+ void (*st_func)(struct rtw89_ser *ser, u8 event); -+}; -+ -+struct event_ent { -+ u8 event; -+ char *name; -+}; -+ -+static char *ser_ev_name(struct rtw89_ser *ser, u8 event) -+{ -+ if (event < SER_EV_MAXX) -+ return ser->ev_tbl[event].name; -+ -+ return "err_ev_name"; -+} -+ -+static char *ser_st_name(struct rtw89_ser *ser) -+{ -+ if (ser->state < SER_ST_MAX_ST) -+ return ser->st_tbl[ser->state].name; -+ -+ return "err_st_name"; -+} -+ -+static void ser_state_run(struct rtw89_ser *ser, u8 evt) -+{ -+ struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_SER, "ser: %s receive %s\n", -+ ser_st_name(ser), ser_ev_name(ser, evt)); -+ -+ rtw89_leave_lps(rtwdev); -+ ser->st_tbl[ser->state].st_func(ser, evt); -+} -+ -+static void ser_state_goto(struct rtw89_ser *ser, u8 new_state) -+{ -+ struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser); -+ -+ if (ser->state == new_state || new_state >= SER_ST_MAX_ST) -+ return; -+ ser_state_run(ser, SER_EV_STATE_OUT); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_SER, "ser: %s goto -> %s\n", -+ ser_st_name(ser), ser->st_tbl[new_state].name); -+ -+ ser->state = new_state; -+ ser_state_run(ser, SER_EV_STATE_IN); -+} -+ -+static struct ser_msg *__rtw89_ser_dequeue_msg(struct rtw89_ser *ser) -+{ -+ struct ser_msg *msg; -+ -+ spin_lock_irq(&ser->msg_q_lock); -+ msg = list_first_entry_or_null(&ser->msg_q, struct ser_msg, list); -+ if (msg) -+ list_del(&msg->list); -+ spin_unlock_irq(&ser->msg_q_lock); -+ -+ return msg; -+} -+ -+static void rtw89_ser_hdl_work(struct work_struct *work) -+{ -+ struct ser_msg *msg; -+ struct rtw89_ser *ser = container_of(work, struct rtw89_ser, -+ ser_hdl_work); -+ -+ while ((msg = __rtw89_ser_dequeue_msg(ser))) { -+ ser_state_run(ser, msg->event); -+ kfree(msg); -+ } -+} -+ -+static int ser_send_msg(struct rtw89_ser *ser, u8 event) -+{ -+ struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser); -+ struct ser_msg *msg = NULL; -+ -+ if (test_bit(RTW89_SER_DRV_STOP_RUN, ser->flags)) -+ return -EIO; -+ -+ msg = kmalloc(sizeof(*msg), GFP_ATOMIC); -+ if (!msg) -+ return -ENOMEM; -+ -+ msg->event = event; -+ -+ spin_lock_irq(&ser->msg_q_lock); -+ list_add(&msg->list, &ser->msg_q); -+ spin_unlock_irq(&ser->msg_q_lock); -+ -+ ieee80211_queue_work(rtwdev->hw, &ser->ser_hdl_work); -+ return 0; -+} -+ -+static void rtw89_ser_alarm_work(struct work_struct *work) -+{ -+ struct rtw89_ser *ser = container_of(work, struct rtw89_ser, -+ ser_alarm_work.work); -+ -+ ser_send_msg(ser, ser->alarm_event); -+ ser->alarm_event = SER_EV_NONE; -+} -+ -+static void ser_set_alarm(struct rtw89_ser *ser, u32 ms, u8 event) -+{ -+ struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser); -+ -+ if (test_bit(RTW89_SER_DRV_STOP_RUN, ser->flags)) -+ return; -+ -+ ser->alarm_event = event; -+ ieee80211_queue_delayed_work(rtwdev->hw, &ser->ser_alarm_work, -+ msecs_to_jiffies(ms)); -+} -+ -+static void ser_del_alarm(struct rtw89_ser *ser) -+{ -+ cancel_delayed_work(&ser->ser_alarm_work); -+ ser->alarm_event = SER_EV_NONE; -+} -+ -+/* driver function */ -+static void drv_stop_tx(struct rtw89_ser *ser) -+{ -+ struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser); -+ -+ ieee80211_stop_queues(rtwdev->hw); -+ set_bit(RTW89_SER_DRV_STOP_TX, ser->flags); -+} -+ -+static void drv_stop_rx(struct rtw89_ser *ser) -+{ -+ struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser); -+ -+ clear_bit(RTW89_FLAG_RUNNING, rtwdev->flags); -+ set_bit(RTW89_SER_DRV_STOP_RX, ser->flags); -+} -+ -+static void drv_trx_reset(struct rtw89_ser *ser) -+{ -+ struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser); -+ -+ rtw89_hci_reset(rtwdev); -+} -+ -+static void drv_resume_tx(struct rtw89_ser *ser) -+{ -+ struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser); -+ -+ if (!test_bit(RTW89_SER_DRV_STOP_TX, ser->flags)) -+ return; -+ -+ ieee80211_wake_queues(rtwdev->hw); -+ clear_bit(RTW89_SER_DRV_STOP_TX, ser->flags); -+} -+ -+static void drv_resume_rx(struct rtw89_ser *ser) -+{ -+ struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser); -+ -+ if (!test_bit(RTW89_SER_DRV_STOP_RX, ser->flags)) -+ return; -+ -+ set_bit(RTW89_FLAG_RUNNING, rtwdev->flags); -+ clear_bit(RTW89_SER_DRV_STOP_RX, ser->flags); -+} -+ -+static void ser_reset_vif(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif) -+{ -+ rtw89_core_release_bit_map(rtwdev->hw_port, rtwvif->port); -+ rtwvif->net_type = RTW89_NET_TYPE_NO_LINK; -+ rtwvif->trigger = false; -+} -+ -+static void ser_reset_mac_binding(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_vif *rtwvif; -+ -+ rtw89_cam_reset_keys(rtwdev); -+ rtw89_core_release_all_bits_map(rtwdev->mac_id_map, RTW89_MAX_MAC_ID_NUM); -+ rtw89_for_each_rtwvif(rtwdev, rtwvif) -+ ser_reset_vif(rtwdev, rtwvif); -+} -+ -+/* hal function */ -+static int hal_enable_dma(struct rtw89_ser *ser) -+{ -+ struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser); -+ int ret; -+ -+ if (!test_bit(RTW89_SER_HAL_STOP_DMA, ser->flags)) -+ return 0; -+ -+ if (!rtwdev->hci.ops->mac_lv1_rcvy) -+ return -EIO; -+ -+ ret = rtwdev->hci.ops->mac_lv1_rcvy(rtwdev, RTW89_LV1_RCVY_STEP_2); -+ if (!ret) -+ clear_bit(RTW89_SER_HAL_STOP_DMA, ser->flags); -+ -+ return ret; -+} -+ -+static int hal_stop_dma(struct rtw89_ser *ser) -+{ -+ struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser); -+ int ret; -+ -+ if (!rtwdev->hci.ops->mac_lv1_rcvy) -+ return -EIO; -+ -+ ret = rtwdev->hci.ops->mac_lv1_rcvy(rtwdev, RTW89_LV1_RCVY_STEP_1); -+ if (!ret) -+ set_bit(RTW89_SER_HAL_STOP_DMA, ser->flags); -+ -+ return ret; -+} -+ -+static void hal_send_m2_event(struct rtw89_ser *ser) -+{ -+ struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser); -+ -+ rtw89_mac_set_err_status(rtwdev, MAC_AX_ERR_L1_DISABLE_EN); -+} -+ -+static void hal_send_m4_event(struct rtw89_ser *ser) -+{ -+ struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser); -+ -+ rtw89_mac_set_err_status(rtwdev, MAC_AX_ERR_L1_RCVY_EN); -+} -+ -+/* state handler */ -+static void ser_idle_st_hdl(struct rtw89_ser *ser, u8 evt) -+{ -+ switch (evt) { -+ case SER_EV_STATE_IN: -+ break; -+ case SER_EV_L1_RESET: -+ ser_state_goto(ser, SER_RESET_TRX_ST); -+ break; -+ case SER_EV_L2_RESET: -+ ser_state_goto(ser, SER_L2_RESET_ST); -+ break; -+ case SER_EV_STATE_OUT: -+ default: -+ break; -+ } -+} -+ -+static void ser_reset_trx_st_hdl(struct rtw89_ser *ser, u8 evt) -+{ -+ switch (evt) { -+ case SER_EV_STATE_IN: -+ drv_stop_tx(ser); -+ -+ if (hal_stop_dma(ser)) { -+ ser_state_goto(ser, SER_L2_RESET_ST); -+ break; -+ } -+ -+ drv_stop_rx(ser); -+ drv_trx_reset(ser); -+ -+ /* wait m3 */ -+ hal_send_m2_event(ser); -+ -+ /* set alarm to prevent FW response timeout */ -+ ser_set_alarm(ser, 1000, SER_EV_M3_TIMEOUT); -+ break; -+ -+ case SER_EV_DO_RECOVERY: -+ ser_state_goto(ser, SER_DO_HCI_ST); -+ break; -+ -+ case SER_EV_M3_TIMEOUT: -+ ser_state_goto(ser, SER_L2_RESET_ST); -+ break; -+ -+ case SER_EV_STATE_OUT: -+ ser_del_alarm(ser); -+ hal_enable_dma(ser); -+ drv_resume_rx(ser); -+ drv_resume_tx(ser); -+ break; -+ -+ default: -+ break; -+ } -+} -+ -+static void ser_do_hci_st_hdl(struct rtw89_ser *ser, u8 evt) -+{ -+ switch (evt) { -+ case SER_EV_STATE_IN: -+ /* wait m5 */ -+ hal_send_m4_event(ser); -+ -+ /* prevent FW response timeout */ -+ ser_set_alarm(ser, 1000, SER_EV_FW_M5_TIMEOUT); -+ break; -+ -+ case SER_EV_FW_M5_TIMEOUT: -+ ser_state_goto(ser, SER_L2_RESET_ST); -+ break; -+ -+ case SER_EV_MAC_RESET_DONE: -+ ser_state_goto(ser, SER_IDLE_ST); -+ break; -+ -+ case SER_EV_STATE_OUT: -+ ser_del_alarm(ser); -+ break; -+ -+ default: -+ break; -+ } -+} -+ -+static void ser_l2_reset_st_hdl(struct rtw89_ser *ser, u8 evt) -+{ -+ struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser); -+ -+ switch (evt) { -+ case SER_EV_STATE_IN: -+ mutex_lock(&rtwdev->mutex); -+ ser_reset_mac_binding(rtwdev); -+ rtw89_core_stop(rtwdev); -+ mutex_unlock(&rtwdev->mutex); -+ -+ ieee80211_restart_hw(rtwdev->hw); -+ ser_set_alarm(ser, SER_RECFG_TIMEOUT, SER_EV_L2_RECFG_TIMEOUT); -+ break; -+ -+ case SER_EV_L2_RECFG_TIMEOUT: -+ rtw89_info(rtwdev, "Err: ser L2 re-config timeout\n"); -+ fallthrough; -+ case SER_EV_L2_RECFG_DONE: -+ ser_state_goto(ser, SER_IDLE_ST); -+ break; -+ -+ case SER_EV_STATE_OUT: -+ ser_del_alarm(ser); -+ break; -+ -+ default: -+ break; -+ } -+} -+ -+static struct event_ent ser_ev_tbl[] = { -+ {SER_EV_NONE, "SER_EV_NONE"}, -+ {SER_EV_STATE_IN, "SER_EV_STATE_IN"}, -+ {SER_EV_STATE_OUT, "SER_EV_STATE_OUT"}, -+ {SER_EV_L1_RESET, "SER_EV_L1_RESET"}, -+ {SER_EV_DO_RECOVERY, "SER_EV_DO_RECOVERY m3"}, -+ {SER_EV_MAC_RESET_DONE, "SER_EV_MAC_RESET_DONE m5"}, -+ {SER_EV_L2_RESET, "SER_EV_L2_RESET"}, -+ {SER_EV_L2_RECFG_DONE, "SER_EV_L2_RECFG_DONE"}, -+ {SER_EV_L2_RECFG_TIMEOUT, "SER_EV_L2_RECFG_TIMEOUT"}, -+ {SER_EV_M3_TIMEOUT, "SER_EV_M3_TIMEOUT"}, -+ {SER_EV_FW_M5_TIMEOUT, "SER_EV_FW_M5_TIMEOUT"}, -+ {SER_EV_L0_RESET, "SER_EV_L0_RESET"}, -+ {SER_EV_MAXX, "SER_EV_MAX"} -+}; -+ -+static struct state_ent ser_st_tbl[] = { -+ {SER_IDLE_ST, "SER_IDLE_ST", ser_idle_st_hdl}, -+ {SER_RESET_TRX_ST, "SER_RESET_TRX_ST", ser_reset_trx_st_hdl}, -+ {SER_DO_HCI_ST, "SER_DO_HCI_ST", ser_do_hci_st_hdl}, -+ {SER_L2_RESET_ST, "SER_L2_RESET_ST", ser_l2_reset_st_hdl} -+}; -+ -+int rtw89_ser_init(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_ser *ser = &rtwdev->ser; -+ -+ memset(ser, 0, sizeof(*ser)); -+ INIT_LIST_HEAD(&ser->msg_q); -+ ser->state = SER_IDLE_ST; -+ ser->st_tbl = ser_st_tbl; -+ ser->ev_tbl = ser_ev_tbl; -+ -+ bitmap_zero(ser->flags, RTW89_NUM_OF_SER_FLAGS); -+ spin_lock_init(&ser->msg_q_lock); -+ INIT_WORK(&ser->ser_hdl_work, rtw89_ser_hdl_work); -+ INIT_DELAYED_WORK(&ser->ser_alarm_work, rtw89_ser_alarm_work); -+ return 0; -+} -+ -+int rtw89_ser_deinit(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_ser *ser = (struct rtw89_ser *)&rtwdev->ser; -+ -+ set_bit(RTW89_SER_DRV_STOP_RUN, ser->flags); -+ cancel_delayed_work_sync(&ser->ser_alarm_work); -+ cancel_work_sync(&ser->ser_hdl_work); -+ clear_bit(RTW89_SER_DRV_STOP_RUN, ser->flags); -+ return 0; -+} -+ -+void rtw89_ser_recfg_done(struct rtw89_dev *rtwdev) -+{ -+ ser_send_msg(&rtwdev->ser, SER_EV_L2_RECFG_DONE); -+} -+ -+int rtw89_ser_notify(struct rtw89_dev *rtwdev, u32 err) -+{ -+ u8 event = SER_EV_NONE; -+ -+ rtw89_info(rtwdev, "ser event = 0x%04x\n", err); -+ -+ switch (err) { -+ case MAC_AX_ERR_L1_ERR_DMAC: -+ case MAC_AX_ERR_L0_PROMOTE_TO_L1: -+ event = SER_EV_L1_RESET; /* M1 */ -+ break; -+ case MAC_AX_ERR_L1_RESET_DISABLE_DMAC_DONE: -+ event = SER_EV_DO_RECOVERY; /* M3 */ -+ break; -+ case MAC_AX_ERR_L1_RESET_RECOVERY_DONE: -+ event = SER_EV_MAC_RESET_DONE; /* M5 */ -+ break; -+ case MAC_AX_ERR_L0_ERR_CMAC0: -+ case MAC_AX_ERR_L0_ERR_CMAC1: -+ case MAC_AX_ERR_L0_RESET_DONE: -+ event = SER_EV_L0_RESET; -+ break; -+ default: -+ if (err == MAC_AX_ERR_L1_PROMOTE_TO_L2 || -+ (err >= MAC_AX_ERR_L2_ERR_AH_DMA && -+ err <= MAC_AX_GET_ERR_MAX)) -+ event = SER_EV_L2_RESET; -+ break; -+ } -+ -+ if (event == SER_EV_NONE) -+ return -EINVAL; -+ -+ ser_send_msg(&rtwdev->ser, event); -+ return 0; -+} -+EXPORT_SYMBOL(rtw89_ser_notify); -diff --git a/drivers/net/wireless/realtek/rtw89/ser.h b/drivers/net/wireless/realtek/rtw89/ser.h -new file mode 100644 -index 000000000000..6b8e62019942 ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/ser.h -@@ -0,0 +1,15 @@ -+/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause -+ * Copyright(c) 2019-2020 Realtek Corporation -+ */ -+#ifndef __SER_H__ -+#define __SER_H__ -+ -+#include "core.h" -+ -+int rtw89_ser_init(struct rtw89_dev *rtwdev); -+int rtw89_ser_deinit(struct rtw89_dev *rtwdev); -+int rtw89_ser_notify(struct rtw89_dev *rtwdev, u32 err); -+void rtw89_ser_recfg_done(struct rtw89_dev *rtwdev); -+ -+#endif /* __SER_H__*/ -+ -diff --git a/drivers/net/wireless/realtek/rtw89/txrx.h b/drivers/net/wireless/realtek/rtw89/txrx.h -new file mode 100644 -index 000000000000..f1e0fe36107d ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/txrx.h -@@ -0,0 +1,358 @@ -+/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ -+/* Copyright(c) 2020 Realtek Corporation -+ */ -+ -+#ifndef __RTW89_TXRX_H__ -+#define __RTW89_TXRX_H__ -+ -+#include "debug.h" -+ -+#define DATA_RATE_MODE_CTRL_MASK GENMASK(8, 7) -+#define DATA_RATE_NOT_HT_IDX_MASK GENMASK(3, 0) -+#define DATA_RATE_MODE_NON_HT 0x0 -+#define DATA_RATE_HT_IDX_MASK GENMASK(4, 0) -+#define DATA_RATE_MODE_HT 0x1 -+#define DATA_RATE_VHT_HE_NSS_MASK GENMASK(6, 4) -+#define DATA_RATE_VHT_HE_IDX_MASK GENMASK(3, 0) -+#define DATA_RATE_MODE_VHT 0x2 -+#define DATA_RATE_MODE_HE 0x3 -+#define GET_DATA_RATE_MODE(r) FIELD_GET(DATA_RATE_MODE_CTRL_MASK, r) -+#define GET_DATA_RATE_NOT_HT_IDX(r) FIELD_GET(DATA_RATE_NOT_HT_IDX_MASK, r) -+#define GET_DATA_RATE_HT_IDX(r) FIELD_GET(DATA_RATE_HT_IDX_MASK, r) -+#define GET_DATA_RATE_VHT_HE_IDX(r) FIELD_GET(DATA_RATE_VHT_HE_IDX_MASK, r) -+#define GET_DATA_RATE_NSS(r) FIELD_GET(DATA_RATE_VHT_HE_NSS_MASK, r) -+ -+/* TX WD BODY DWORD 0 */ -+#define RTW89_TXWD_BODY0_WP_OFFSET GENMASK(31, 24) -+#define RTW89_TXWD_BODY0_MORE_DATA BIT(23) -+#define RTW89_TXWD_BODY0_WD_INFO_EN BIT(22) -+#define RTW89_TXWD_BODY0_FW_DL BIT(20) -+#define RTW89_TXWD_BODY0_CHANNEL_DMA GENMASK(19, 16) -+#define RTW89_TXWD_BODY0_HDR_LLC_LEN GENMASK(15, 11) -+#define RTW89_TXWD_BODY0_WD_PAGE BIT(7) -+#define RTW89_TXWD_BODY0_HW_AMSDU BIT(5) -+ -+/* TX WD BODY DWORD 1 */ -+#define RTW89_TXWD_BODY1_PAYLOAD_ID GENMASK(31, 16) -+ -+/* TX WD BODY DWORD 2 */ -+#define RTW89_TXWD_BODY2_MACID GENMASK(30, 24) -+#define RTW89_TXWD_BODY2_TID_INDICATE BIT(23) -+#define RTW89_TXWD_BODY2_QSEL GENMASK(22, 17) -+#define RTW89_TXWD_BODY2_TXPKT_SIZE GENMASK(13, 0) -+ -+/* TX WD BODY DWORD 3 */ -+#define RTW89_TXWD_BODY3_BK BIT(13) -+#define RTW89_TXWD_BODY3_AGG_EN BIT(12) -+#define RTW89_TXWD_BODY3_SW_SEQ GENMASK(11, 0) -+ -+/* TX WD BODY DWORD 4 */ -+ -+/* TX WD BODY DWORD 5 */ -+ -+/* TX WD INFO DWORD 0 */ -+#define RTW89_TXWD_INFO0_USE_RATE BIT(30) -+#define RTW89_TXWD_INFO0_DATA_BW GENMASK(29, 28) -+#define RTW89_TXWD_INFO0_GI_LTF GENMASK(27, 25) -+#define RTW89_TXWD_INFO0_DATA_RATE GENMASK(24, 16) -+#define RTW89_TXWD_INFO0_DISDATAFB BIT(10) -+ -+/* TX WD INFO DWORD 1 */ -+#define RTW89_TXWD_INFO1_DATA_RTY_LOWEST_RATE GENMASK(24, 16) -+#define RTW89_TXWD_INFO1_A_CTRL_BSR BIT(14) -+#define RTW89_TXWD_INFO1_MAX_AGGNUM GENMASK(7, 0) -+ -+/* TX WD INFO DWORD 2 */ -+#define RTW89_TXWD_INFO2_AMPDU_DENSITY GENMASK(20, 18) -+#define RTW89_TXWD_INFO2_SEC_TYPE GENMASK(12, 9) -+#define RTW89_TXWD_INFO2_SEC_HW_ENC BIT(8) -+#define RTW89_TXWD_INFO2_SEC_CAM_IDX GENMASK(7, 0) -+ -+/* TX WD INFO DWORD 3 */ -+ -+/* TX WD INFO DWORD 4 */ -+#define RTW89_TXWD_INFO4_RTS_EN BIT(27) -+#define RTW89_TXWD_INFO4_HW_RTS_EN BIT(31) -+ -+/* TX WD INFO DWORD 5 */ -+ -+/* RX DESC helpers */ -+/* Short Descriptor */ -+#define RTW89_GET_RXWD_LONG_RXD(rxdesc) \ -+ le32_get_bits((rxdesc)->dword0, BIT(31)) -+#define RTW89_GET_RXWD_DRV_INFO_SIZE(rxdesc) \ -+ le32_get_bits((rxdesc)->dword0, GENMASK(30, 28)) -+#define RTW89_GET_RXWD_RPKT_TYPE(rxdesc) \ -+ le32_get_bits((rxdesc)->dword0, GENMASK(27, 24)) -+#define RTW89_GET_RXWD_MAC_INFO_VALID(rxdesc) \ -+ le32_get_bits((rxdesc)->dword0, BIT(23)) -+#define RTW89_GET_RXWD_BB_SEL(rxdesc) \ -+ le32_get_bits((rxdesc)->dword0, BIT(22)) -+#define RTW89_GET_RXWD_HD_IV_LEN(rxdesc) \ -+ le32_get_bits((rxdesc)->dword0, GENMASK(21, 16)) -+#define RTW89_GET_RXWD_SHIFT(rxdesc) \ -+ le32_get_bits((rxdesc)->dword0, GENMASK(15, 14)) -+#define RTW89_GET_RXWD_PKT_SIZE(rxdesc) \ -+ le32_get_bits((rxdesc)->dword0, GENMASK(13, 0)) -+#define RTW89_GET_RXWD_BW(rxdesc) \ -+ le32_get_bits((rxdesc)->dword1, GENMASK(31, 30)) -+#define RTW89_GET_RXWD_GI_LTF(rxdesc) \ -+ le32_get_bits((rxdesc)->dword1, GENMASK(27, 25)) -+#define RTW89_GET_RXWD_DATA_RATE(rxdesc) \ -+ le32_get_bits((rxdesc)->dword1, GENMASK(24, 16)) -+#define RTW89_GET_RXWD_USER_ID(rxdesc) \ -+ le32_get_bits((rxdesc)->dword1, GENMASK(15, 8)) -+#define RTW89_GET_RXWD_SR_EN(rxdesc) \ -+ le32_get_bits((rxdesc)->dword1, BIT(7)) -+#define RTW89_GET_RXWD_PPDU_CNT(rxdesc) \ -+ le32_get_bits((rxdesc)->dword1, GENMASK(6, 4)) -+#define RTW89_GET_RXWD_PPDU_TYPE(rxdesc) \ -+ le32_get_bits((rxdesc)->dword1, GENMASK(3, 0)) -+#define RTW89_GET_RXWD_FREE_RUN_CNT(rxdesc) \ -+ le32_get_bits((rxdesc)->dword2, GENMASK(31, 0)) -+#define RTW89_GET_RXWD_ICV_ERR(rxdesc) \ -+ le32_get_bits((rxdesc)->dword3, BIT(10)) -+#define RTW89_GET_RXWD_CRC32_ERR(rxdesc) \ -+ le32_get_bits((rxdesc)->dword3, BIT(9)) -+#define RTW89_GET_RXWD_HW_DEC(rxdesc) \ -+ le32_get_bits((rxdesc)->dword3, BIT(2)) -+#define RTW89_GET_RXWD_SW_DEC(rxdesc) \ -+ le32_get_bits((rxdesc)->dword3, BIT(1)) -+#define RTW89_GET_RXWD_A1_MATCH(rxdesc) \ -+ le32_get_bits((rxdesc)->dword3, BIT(0)) -+ -+/* Long Descriptor */ -+#define RTW89_GET_RXWD_FRAG(rxdesc) \ -+ le32_get_bits((rxdesc)->dword4, GENMASK(31, 28)) -+#define RTW89_GET_RXWD_SEQ(rxdesc) \ -+ le32_get_bits((rxdesc)->dword4, GENMASK(27, 16)) -+#define RTW89_GET_RXWD_TYPE(rxdesc) \ -+ le32_get_bits((rxdesc)->dword4, GENMASK(1, 0)) -+#define RTW89_GET_RXWD_ADDR_CAM_VLD(rxdesc) \ -+ le32_get_bits((rxdesc)->dword5, BIT(28)) -+#define RTW89_GET_RXWD_RX_PL_ID(rxdesc) \ -+ le32_get_bits((rxdesc)->dword5, GENMASK(27, 24)) -+#define RTW89_GET_RXWD_MAC_ID(rxdesc) \ -+ le32_get_bits((rxdesc)->dword5, GENMASK(23, 16)) -+#define RTW89_GET_RXWD_ADDR_CAM_ID(rxdesc) \ -+ le32_get_bits((rxdesc)->dword5, GENMASK(15, 8)) -+#define RTW89_GET_RXWD_SEC_CAM_ID(rxdesc) \ -+ le32_get_bits((rxdesc)->dword5, GENMASK(7, 0)) -+ -+#define RTW89_GET_RXINFO_USR_NUM(rpt) \ -+ le32_get_bits(*((__le32 *)rpt), GENMASK(3, 0)) -+#define RTW89_GET_RXINFO_FW_DEFINE(rpt) \ -+ le32_get_bits(*((__le32 *)rpt), GENMASK(15, 8)) -+#define RTW89_GET_RXINFO_LSIG_LEN(rpt) \ -+ le32_get_bits(*((__le32 *)rpt), GENMASK(27, 16)) -+#define RTW89_GET_RXINFO_IS_TO_SELF(rpt) \ -+ le32_get_bits(*((__le32 *)rpt), BIT(28)) -+#define RTW89_GET_RXINFO_RX_CNT_VLD(rpt) \ -+ le32_get_bits(*((__le32 *)rpt), BIT(29)) -+#define RTW89_GET_RXINFO_LONG_RXD(rpt) \ -+ le32_get_bits(*((__le32 *)rpt), GENMASK(31, 30)) -+#define RTW89_GET_RXINFO_SERVICE(rpt) \ -+ le32_get_bits(*((__le32 *)(rpt) + 1), GENMASK(15, 0)) -+#define RTW89_GET_RXINFO_PLCP_LEN(rpt) \ -+ le32_get_bits(*((__le32 *)(rpt) + 1), GENMASK(23, 16)) -+#define RTW89_GET_RXINFO_MAC_ID_VALID(rpt, usr) \ -+ le32_get_bits(*((__le32 *)(rpt) + (usr) + 2), BIT(0)) -+#define RTW89_GET_RXINFO_DATA(rpt, usr) \ -+ le32_get_bits(*((__le32 *)(rpt) + (usr) + 2), BIT(1)) -+#define RTW89_GET_RXINFO_CTRL(rpt, usr) \ -+ le32_get_bits(*((__le32 *)(rpt) + (usr) + 2), BIT(2)) -+#define RTW89_GET_RXINFO_MGMT(rpt, usr) \ -+ le32_get_bits(*((__le32 *)(rpt) + (usr) + 2), BIT(3)) -+#define RTW89_GET_RXINFO_BCM(rpt, usr) \ -+ le32_get_bits(*((__le32 *)(rpt) + (usr) + 2), BIT(4)) -+#define RTW89_GET_RXINFO_MACID(rpt, usr) \ -+ le32_get_bits(*((__le32 *)(rpt) + (usr) + 2), GENMASK(15, 8)) -+ -+#define RTW89_GET_PHY_STS_RSSI_A(sts) \ -+ le32_get_bits(*((__le32 *)(sts) + 1), GENMASK(7, 0)) -+#define RTW89_GET_PHY_STS_RSSI_B(sts) \ -+ le32_get_bits(*((__le32 *)(sts) + 1), GENMASK(15, 8)) -+#define RTW89_GET_PHY_STS_RSSI_C(sts) \ -+ le32_get_bits(*((__le32 *)(sts) + 1), GENMASK(23, 16)) -+#define RTW89_GET_PHY_STS_RSSI_D(sts) \ -+ le32_get_bits(*((__le32 *)(sts) + 1), GENMASK(31, 24)) -+#define RTW89_GET_PHY_STS_LEN(sts) \ -+ le32_get_bits(*((__le32 *)sts), GENMASK(15, 8)) -+#define RTW89_GET_PHY_STS_RSSI_AVG(sts) \ -+ le32_get_bits(*((__le32 *)sts), GENMASK(31, 24)) -+#define RTW89_GET_PHY_STS_IE_TYPE(ie) \ -+ le32_get_bits(*((__le32 *)ie), GENMASK(4, 0)) -+#define RTW89_GET_PHY_STS_IE_LEN(ie) \ -+ le32_get_bits(*((__le32 *)ie), GENMASK(11, 5)) -+#define RTW89_GET_PHY_STS_IE0_CFO(ie) \ -+ le32_get_bits(*((__le32 *)(ie) + 1), GENMASK(31, 20)) -+ -+enum rtw89_tx_channel { -+ RTW89_TXCH_ACH0 = 0, -+ RTW89_TXCH_ACH1 = 1, -+ RTW89_TXCH_ACH2 = 2, -+ RTW89_TXCH_ACH3 = 3, -+ RTW89_TXCH_ACH4 = 4, -+ RTW89_TXCH_ACH5 = 5, -+ RTW89_TXCH_ACH6 = 6, -+ RTW89_TXCH_ACH7 = 7, -+ RTW89_TXCH_CH8 = 8, /* MGMT Band 0 */ -+ RTW89_TXCH_CH9 = 9, /* HI Band 0 */ -+ RTW89_TXCH_CH10 = 10, /* MGMT Band 1 */ -+ RTW89_TXCH_CH11 = 11, /* HI Band 1 */ -+ RTW89_TXCH_CH12 = 12, /* FW CMD */ -+ -+ /* keep last */ -+ RTW89_TXCH_NUM, -+ RTW89_TXCH_MAX = RTW89_TXCH_NUM - 1 -+}; -+ -+enum rtw89_rx_channel { -+ RTW89_RXCH_RXQ = 0, -+ RTW89_RXCH_RPQ = 1, -+ -+ /* keep last */ -+ RTW89_RXCH_NUM, -+ RTW89_RXCH_MAX = RTW89_RXCH_NUM - 1 -+}; -+ -+enum rtw89_tx_qsel { -+ RTW89_TX_QSEL_BE_0 = 0x00, -+ RTW89_TX_QSEL_BK_0 = 0x01, -+ RTW89_TX_QSEL_VI_0 = 0x02, -+ RTW89_TX_QSEL_VO_0 = 0x03, -+ RTW89_TX_QSEL_BE_1 = 0x04, -+ RTW89_TX_QSEL_BK_1 = 0x05, -+ RTW89_TX_QSEL_VI_1 = 0x06, -+ RTW89_TX_QSEL_VO_1 = 0x07, -+ RTW89_TX_QSEL_BE_2 = 0x08, -+ RTW89_TX_QSEL_BK_2 = 0x09, -+ RTW89_TX_QSEL_VI_2 = 0x0a, -+ RTW89_TX_QSEL_VO_2 = 0x0b, -+ RTW89_TX_QSEL_BE_3 = 0x0c, -+ RTW89_TX_QSEL_BK_3 = 0x0d, -+ RTW89_TX_QSEL_VI_3 = 0x0e, -+ RTW89_TX_QSEL_VO_3 = 0x0f, -+ RTW89_TX_QSEL_B0_BCN = 0x10, -+ RTW89_TX_QSEL_B0_HI = 0x11, -+ RTW89_TX_QSEL_B0_MGMT = 0x12, -+ RTW89_TX_QSEL_B0_NOPS = 0x13, -+ RTW89_TX_QSEL_B0_MGMT_FAST = 0x14, -+ /* reserved */ -+ /* reserved */ -+ /* reserved */ -+ RTW89_TX_QSEL_B1_BCN = 0x18, -+ RTW89_TX_QSEL_B1_HI = 0x19, -+ RTW89_TX_QSEL_B1_MGMT = 0x1a, -+ RTW89_TX_QSEL_B1_NOPS = 0x1b, -+ RTW89_TX_QSEL_B1_MGMT_FAST = 0x1c, -+ /* reserved */ -+ /* reserved */ -+ /* reserved */ -+}; -+ -+enum rtw89_phy_status_ie_type { -+ RTW89_PHYSTS_IE00_CMN_CCK = 0, -+ RTW89_PHYSTS_IE01_CMN_OFDM = 1, -+ RTW89_PHYSTS_IE02_CMN_EXT_AX = 2, -+ RTW89_PHYSTS_IE03_CMN_EXT_SEG_1 = 3, -+ RTW89_PHYSTS_IE04_CMN_EXT_PATH_A = 4, -+ RTW89_PHYSTS_IE05_CMN_EXT_PATH_B = 5, -+ RTW89_PHYSTS_IE06_CMN_EXT_PATH_C = 6, -+ RTW89_PHYSTS_IE07_CMN_EXT_PATH_D = 7, -+ RTW89_PHYSTS_IE08_FTR_CH = 8, -+ RTW89_PHYSTS_IE09_FTR_PLCP_0 = 9, -+ RTW89_PHYSTS_IE10_FTR_PLCP_EXT = 10, -+ RTW89_PHYSTS_IE11_FTR_PLCP_HISTOGRAM = 11, -+ RTW89_PHYSTS_IE12_MU_EIGEN_INFO = 12, -+ RTW89_PHYSTS_IE13_DL_MU_DEF = 13, -+ RTW89_PHYSTS_IE14_TB_UL_CQI = 14, -+ RTW89_PHYSTS_IE15_TB_UL_DEF = 15, -+ RTW89_PHYSTS_IE16_RSVD16 = 16, -+ RTW89_PHYSTS_IE17_TB_UL_CTRL = 17, -+ RTW89_PHYSTS_IE18_DBG_OFDM_FD_CMN = 18, -+ RTW89_PHYSTS_IE19_DBG_OFDM_TD_CMN = 19, -+ RTW89_PHYSTS_IE20_DBG_OFDM_FD_USER_SEG_0 = 20, -+ RTW89_PHYSTS_IE21_DBG_OFDM_FD_USER_SEG_1 = 21, -+ RTW89_PHYSTS_IE22_DBG_OFDM_FD_USER_AGC = 22, -+ RTW89_PHYSTS_IE23_RSVD23 = 23, -+ RTW89_PHYSTS_IE24_DBG_OFDM_TD_PATH_A = 24, -+ RTW89_PHYSTS_IE25_DBG_OFDM_TD_PATH_B = 25, -+ RTW89_PHYSTS_IE26_DBG_OFDM_TD_PATH_C = 26, -+ RTW89_PHYSTS_IE27_DBG_OFDM_TD_PATH_D = 27, -+ RTW89_PHYSTS_IE28_DBG_CCK_PATH_A = 28, -+ RTW89_PHYSTS_IE29_DBG_CCK_PATH_B = 29, -+ RTW89_PHYSTS_IE30_DBG_CCK_PATH_C = 30, -+ RTW89_PHYSTS_IE31_DBG_CCK_PATH_D = 31, -+ -+ /* keep last */ -+ RTW89_PHYSTS_IE_NUM, -+ RTW89_PHYSTS_IE_MAX = RTW89_PHYSTS_IE_NUM - 1 -+}; -+ -+static inline u8 rtw89_core_get_qsel(struct rtw89_dev *rtwdev, u8 tid) -+{ -+ switch (tid) { -+ default: -+ rtw89_warn(rtwdev, "Should use tag 1d: %d\n", tid); -+ fallthrough; -+ case 0: -+ case 3: -+ return RTW89_TX_QSEL_BE_0; -+ case 1: -+ case 2: -+ return RTW89_TX_QSEL_BK_0; -+ case 4: -+ case 5: -+ return RTW89_TX_QSEL_VI_0; -+ case 6: -+ case 7: -+ return RTW89_TX_QSEL_VO_0; -+ } -+} -+ -+static inline u8 rtw89_core_get_ch_dma(struct rtw89_dev *rtwdev, u8 qsel) -+{ -+ switch (qsel) { -+ default: -+ rtw89_warn(rtwdev, "Cannot map qsel to dma: %d\n", qsel); -+ fallthrough; -+ case RTW89_TX_QSEL_BE_0: -+ return RTW89_TXCH_ACH0; -+ case RTW89_TX_QSEL_BK_0: -+ return RTW89_TXCH_ACH1; -+ case RTW89_TX_QSEL_VI_0: -+ return RTW89_TXCH_ACH2; -+ case RTW89_TX_QSEL_VO_0: -+ return RTW89_TXCH_ACH3; -+ case RTW89_TX_QSEL_B0_MGMT: -+ return RTW89_TXCH_CH8; -+ case RTW89_TX_QSEL_B0_HI: -+ return RTW89_TXCH_CH9; -+ case RTW89_TX_QSEL_B1_MGMT: -+ return RTW89_TXCH_CH10; -+ case RTW89_TX_QSEL_B1_HI: -+ return RTW89_TXCH_CH11; -+ } -+} -+ -+static inline u8 rtw89_core_get_tid_indicate(struct rtw89_dev *rtwdev, u8 tid) -+{ -+ switch (tid) { -+ case 3: -+ case 2: -+ case 5: -+ case 7: -+ return 1; -+ default: -+ rtw89_warn(rtwdev, "Should use tag 1d: %d\n", tid); -+ fallthrough; -+ case 0: -+ case 1: -+ case 4: -+ case 6: -+ return 0; -+ } -+} -+ -+#endif -diff --git a/drivers/net/wireless/realtek/rtw89/util.h b/drivers/net/wireless/realtek/rtw89/util.h -new file mode 100644 -index 000000000000..229e81009de6 ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/util.h -@@ -0,0 +1,17 @@ -+/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause -+ * Copyright(c) 2019-2020 Realtek Corporation -+ */ -+#ifndef __RTW89_UTIL_H__ -+#define __RTW89_UTIL_H__ -+ -+#include "core.h" -+ -+#define rtw89_iterate_vifs_bh(rtwdev, iterator, data) \ -+ ieee80211_iterate_active_interfaces_atomic((rtwdev)->hw, \ -+ IEEE80211_IFACE_ITER_NORMAL, iterator, data) -+ -+/* call this function with rtwdev->mutex is held */ -+#define rtw89_for_each_rtwvif(rtwdev, rtwvif) \ -+ list_for_each_entry(rtwvif, &(rtwdev)->rtwvifs_list, list) -+ -+#endif --- -2.34.0 - diff --git a/kernel/tools/cpupowertools/files/patches/mageia/platform-x86-add-shuttle-wmi-driver.patch b/kernel/tools/cpupowertools/files/patches/mageia/platform-x86-add-shuttle-wmi-driver.patch index dfe13ed4..c334c54c 100644 --- a/kernel/tools/cpupowertools/files/patches/mageia/platform-x86-add-shuttle-wmi-driver.patch +++ b/kernel/tools/cpupowertools/files/patches/mageia/platform-x86-add-shuttle-wmi-driver.patch @@ -1421,18 +1421,18 @@ diff -Nurp linux-5.15.1/drivers/platform/x86/shuttle-wmi.c linux-5.15.1-shuttle/ + +module_init(shuttle_wmi_init); +module_exit(shuttle_wmi_exit); -diff -Nurp linux-5.15.1/MAINTAINERS linux-5.15.1-shuttle/MAINTAINERS ---- linux-5.15.1/MAINTAINERS 2021-10-31 22:53:10.000000000 +0200 -+++ linux-5.15.1-shuttle/MAINTAINERS 2021-11-08 23:24:45.469092275 +0200 -@@ -16993,6 +16993,12 @@ S: Orphan - F: drivers/media/platform/sh_vou.c +diff -Nurp linux-5.18/MAINTAINERS.orig linux-5.18/MAINTAINERS +--- linux-5.18/MAINTAINERS.orig ++++ linux-5.18/MAINTAINERS +@@ -17888,6 +17888,12 @@ + F: drivers/media/platform/renesas/sh_vou.c F: include/media/drv-intf/sh_vou.h +SHUTTLE WMI EXTRAS DRIVER -+M: Herton Ronaldo Krzesinski -+L: platform-driver-x86@vger.kernel.org -+S: Maintained -+F: drivers/platform/x86/shuttle-wmi.c ++M: Herton Ronaldo Krzesinski ++L: platform-driver-x86@vger.kernel.org ++S: Maintained ++F: drivers/platform/x86/shuttle-wmi.c + SI2157 MEDIA DRIVER M: Antti Palosaari diff --git a/kernel/tools/cpupowertools/files/patches/mageia/staging-rtl8812au-20231117.patch b/kernel/tools/cpupowertools/files/patches/mageia/staging-rtl8812au-20231117.patch new file mode 100644 index 00000000..0ebc0c6a --- /dev/null +++ b/kernel/tools/cpupowertools/files/patches/mageia/staging-rtl8812au-20231117.patch @@ -0,0 +1,1720 @@ +From 8bb11a9489a5af4f23949f0109bf40d65d787095 Mon Sep 17 00:00:00 2001 +From: kimocoder +Date: Tue, 6 Jun 2023 17:50:45 +0200 +Subject: [PATCH 01/13] Revert "Some cleanup of unused chips" + +This reverts commit b3227c731ec957b706f8eb2ebcf42ba1c2f0d610. +--- + drivers/staging/rtl8812au/hal/hal_com.c | 280 ++++++++++++++++++ + drivers/staging/rtl8812au/hal/hal_intf.c | 18 ++ + drivers/staging/rtl8812au/hal/hal_mp.c | 27 ++ + .../hal/phydm/halrf/rtl8814a/halrf_8814a_ap.c | 18 +- + .../hal/phydm/rtl8814a/halphyrf_8814a_ap.c | 28 +- + .../rtl8812au/hal/rtl8814a/usb/usb_halinit.c | 30 +- + .../staging/rtl8812au/include/gspi_osintf.h | 7 + + .../staging/rtl8812au/include/rtl8812a_recv.h | 4 + + .../staging/rtl8812au/include/rtl8814a_recv.h | 4 + + drivers/staging/rtl8812au/include/rtw_cmd.h | 9 +- + drivers/staging/rtl8812au/include/rtw_debug.h | 4 + + drivers/staging/rtl8812au/include/rtw_recv.h | 36 ++- + drivers/staging/rtl8812au/include/rtw_xmit.h | 5 + + .../staging/rtl8812au/include/sdio_osintf.h | 7 + + .../staging/rtl8812au/os_dep/osdep_service.c | 31 ++ + 15 files changed, 478 insertions(+), 30 deletions(-) + +diff --git a/drivers/staging/rtl8812au/hal/hal_com.c b/drivers/staging/rtl8812au/hal/hal_com.c +index 3b7d7dc52..b3b1e16c8 100644 +--- a/drivers/staging/rtl8812au/hal/hal_com.c ++++ b/drivers/staging/rtl8812au/hal/hal_com.c +@@ -4330,6 +4330,28 @@ s32 rtw_hal_set_FwMediaStatusRpt_cmd(_adapter *adapter, bool opmode, bool miraca + if (ret != _SUCCESS) + goto exit; + ++#if defined(CONFIG_RTL8188E) ++ if (rtw_get_chip_type(adapter) == RTL8188E) { ++ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); ++ ++ /* 8188E FW doesn't set macid no link, driver does it by self */ ++ if (opmode) ++ rtw_hal_set_hwreg(adapter, HW_VAR_MACID_LINK, &macid); ++ else ++ rtw_hal_set_hwreg(adapter, HW_VAR_MACID_NOLINK, &macid); ++ ++ /* for 8188E RA */ ++#if (RATE_ADAPTIVE_SUPPORT == 1) ++ if (hal_data->fw_ractrl == _FALSE) { ++ u8 max_macid; ++ ++ max_macid = rtw_search_max_mac_id(adapter); ++ rtw_hal_set_hwreg(adapter, HW_VAR_TX_RPT_MAX_MACID, &max_macid); ++ } ++#endif ++ } ++#endif ++ + #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) + /* TODO: this should move to IOT issue area */ + if (rtw_get_chip_type(adapter) == RTL8812 +@@ -4734,6 +4756,21 @@ static void rtw_hal_force_enable_rxdma(_adapter *adapter) + rtw_write32(adapter, REG_RXPKT_NUM, + (rtw_read32(adapter, REG_RXPKT_NUM) & (~RW_RELEASE_EN))); + } ++#if defined(CONFIG_RTL8188E) ++static void rtw_hal_disable_tx_report(_adapter *adapter) ++{ ++ rtw_write8(adapter, REG_TX_RPT_CTRL, ++ ((rtw_read8(adapter, REG_TX_RPT_CTRL) & ~BIT(1))) & ~BIT(5)); ++ RTW_INFO("disable TXRPT:0x%02x\n", rtw_read8(adapter, REG_TX_RPT_CTRL)); ++} ++ ++static void rtw_hal_enable_tx_report(_adapter *adapter) ++{ ++ rtw_write8(adapter, REG_TX_RPT_CTRL, ++ ((rtw_read8(adapter, REG_TX_RPT_CTRL) | BIT(1))) | BIT(5)); ++ RTW_INFO("enable TX_RPT:0x%02x\n", rtw_read8(adapter, REG_TX_RPT_CTRL)); ++} ++#endif + static void rtw_hal_release_rx_dma(_adapter *adapter) + { + u32 val32 = 0; +@@ -5819,6 +5856,10 @@ static void rtw_hal_ap_wow_enable(_adapter *padapter) + issue_beacon(padapter, 0); + + rtw_msleep_os(2); ++ #if defined(CONFIG_RTL8188E) ++ if (IS_HARDWARE_TYPE_8188E(padapter)) ++ rtw_hal_disable_tx_report(padapter); ++ #endif + /* RX DMA stop */ + res = rtw_hal_pause_rx_dma(padapter); + if (res == _FAIL) +@@ -5879,6 +5920,11 @@ static void rtw_hal_ap_wow_disable(_adapter *padapter) + } + #endif /*DBG_CHECK_FW_PS_STATE*/ + ++ #if defined(CONFIG_RTL8188E) ++ if (IS_HARDWARE_TYPE_8188E(padapter)) ++ rtw_hal_enable_tx_report(padapter); ++ #endif ++ + rtw_hal_force_enable_rxdma(padapter); + + rtw_hal_fw_dl(padapter, _FALSE); +@@ -9558,6 +9604,10 @@ static void rtw_hal_wow_enable(_adapter *adapter) + (u8 *)&media_status_rpt); + + /* RX DMA stop */ ++ #if defined(CONFIG_RTL8188E) ++ if (IS_HARDWARE_TYPE_8188E(adapter)) ++ rtw_hal_disable_tx_report(adapter); ++ #endif + + res = rtw_hal_pause_rx_dma(adapter); + if (res == _FAIL) +@@ -9746,6 +9796,11 @@ static void rtw_hal_wow_disable(_adapter *adapter) + #endif + rtw_hal_release_rx_dma(adapter); + ++ #if defined(CONFIG_RTL8188E) ++ if (IS_HARDWARE_TYPE_8188E(adapter)) ++ rtw_hal_enable_tx_report(adapter); ++ #endif ++ + if ((pwrctl->wowlan_wake_reason != RX_DISASSOC) && + (pwrctl->wowlan_wake_reason != RX_DEAUTH) && + (pwrctl->wowlan_wake_reason != FW_DECISION_DISCONNECT)) { +@@ -12549,6 +12604,61 @@ int hal_efuse_macaddr_offset(_adapter *adapter) + interface_type = rtw_get_intf_type(adapter); + + switch (rtw_get_chip_type(adapter)) { ++#ifdef CONFIG_RTL8723B ++ case RTL8723B: ++ if (interface_type == RTW_USB) ++ addr_offset = EEPROM_MAC_ADDR_8723BU; ++ else if (interface_type == RTW_SDIO) ++ addr_offset = EEPROM_MAC_ADDR_8723BS; ++ else if (interface_type == RTW_PCIE) ++ addr_offset = EEPROM_MAC_ADDR_8723BE; ++ break; ++#endif ++#ifdef CONFIG_RTL8703B ++ case RTL8703B: ++ if (interface_type == RTW_USB) ++ addr_offset = EEPROM_MAC_ADDR_8703BU; ++ else if (interface_type == RTW_SDIO) ++ addr_offset = EEPROM_MAC_ADDR_8703BS; ++ break; ++#endif ++#ifdef CONFIG_RTL8723D ++ case RTL8723D: ++ if (interface_type == RTW_USB) ++ addr_offset = EEPROM_MAC_ADDR_8723DU; ++ else if (interface_type == RTW_SDIO) ++ addr_offset = EEPROM_MAC_ADDR_8723DS; ++ else if (interface_type == RTW_PCIE) ++ addr_offset = EEPROM_MAC_ADDR_8723DE; ++ break; ++#endif ++ ++#ifdef CONFIG_RTL8188E ++ case RTL8188E: ++ if (interface_type == RTW_USB) ++ addr_offset = EEPROM_MAC_ADDR_88EU; ++ else if (interface_type == RTW_SDIO) ++ addr_offset = EEPROM_MAC_ADDR_88ES; ++ else if (interface_type == RTW_PCIE) ++ addr_offset = EEPROM_MAC_ADDR_88EE; ++ break; ++#endif ++#ifdef CONFIG_RTL8188F ++ case RTL8188F: ++ if (interface_type == RTW_USB) ++ addr_offset = EEPROM_MAC_ADDR_8188FU; ++ else if (interface_type == RTW_SDIO) ++ addr_offset = EEPROM_MAC_ADDR_8188FS; ++ break; ++#endif ++#ifdef CONFIG_RTL8188GTV ++ case RTL8188GTV: ++ if (interface_type == RTW_USB) ++ addr_offset = EEPROM_MAC_ADDR_8188GTVU; ++ else if (interface_type == RTW_SDIO) ++ addr_offset = EEPROM_MAC_ADDR_8188GTVS; ++ break; ++#endif + #ifdef CONFIG_RTL8812A + case RTL8812: + if (interface_type == RTW_USB) +@@ -12567,6 +12677,16 @@ int hal_efuse_macaddr_offset(_adapter *adapter) + addr_offset = EEPROM_MAC_ADDR_8821AE; + break; + #endif ++#ifdef CONFIG_RTL8192E ++ case RTL8192E: ++ if (interface_type == RTW_USB) ++ addr_offset = EEPROM_MAC_ADDR_8192EU; ++ else if (interface_type == RTW_SDIO) ++ addr_offset = EEPROM_MAC_ADDR_8192ES; ++ else if (interface_type == RTW_PCIE) ++ addr_offset = EEPROM_MAC_ADDR_8192EE; ++ break; ++#endif + #ifdef CONFIG_RTL8814A + case RTL8814A: + if (interface_type == RTW_USB) +@@ -12576,6 +12696,46 @@ int hal_efuse_macaddr_offset(_adapter *adapter) + break; + #endif + ++#ifdef CONFIG_RTL8822B ++ case RTL8822B: ++ if (interface_type == RTW_USB) ++ addr_offset = EEPROM_MAC_ADDR_8822BU; ++ else if (interface_type == RTW_SDIO) ++ addr_offset = EEPROM_MAC_ADDR_8822BS; ++ else if (interface_type == RTW_PCIE) ++ addr_offset = EEPROM_MAC_ADDR_8822BE; ++ break; ++#endif /* CONFIG_RTL8822B */ ++ ++#ifdef CONFIG_RTL8821C ++ case RTL8821C: ++ if (interface_type == RTW_USB) ++ addr_offset = EEPROM_MAC_ADDR_8821CU; ++ else if (interface_type == RTW_SDIO) ++ addr_offset = EEPROM_MAC_ADDR_8821CS; ++ else if (interface_type == RTW_PCIE) ++ addr_offset = EEPROM_MAC_ADDR_8821CE; ++ break; ++#endif /* CONFIG_RTL8821C */ ++ ++#ifdef CONFIG_RTL8710B ++ case RTL8710B: ++ if (interface_type == RTW_USB) ++ addr_offset = EEPROM_MAC_ADDR_8710B; ++ break; ++#endif ++ ++#ifdef CONFIG_RTL8192F ++ case RTL8192F: ++ if (interface_type == RTW_USB) ++ addr_offset = EEPROM_MAC_ADDR_8192FU; ++ else if (interface_type == RTW_SDIO) ++ addr_offset = EEPROM_MAC_ADDR_8192FS; ++ else if (interface_type == RTW_PCIE) ++ addr_offset = EEPROM_MAC_ADDR_8192FE; ++ break; ++#endif /* CONFIG_RTL8192F */ ++ + } + + if (addr_offset == -1) { +@@ -12793,6 +12953,32 @@ void rtw_bb_rf_gain_offset(_adapter *padapter) + } else + RTW_INFO("Using the default RF gain.\n"); + ++#elif defined(CONFIG_RTL8188E) ++ if (value & BIT4 && (registry_par->RegPwrTrimEnable == 1)) { ++ RTW_INFO("8188ES Offset RF Gain.\n"); ++ RTW_INFO("8188ES Offset RF Gain. EEPROMRFGainVal=0x%x\n", ++ pHalData->EEPROMRFGainVal); ++ ++ if (pHalData->EEPROMRFGainVal != 0xff) { ++ res = rtw_hal_read_rfreg(padapter, RF_PATH_A, ++ REG_RF_BB_GAIN_OFFSET, 0xffffffff); ++ ++ RTW_INFO("Offset RF Gain. reg 0x55=0x%x\n", res); ++ res &= 0xfff87fff; ++ ++ res |= (pHalData->EEPROMRFGainVal & 0x0f) << 15; ++ RTW_INFO("Offset RF Gain. res=0x%x\n", res); ++ ++ rtw_hal_write_rfreg(padapter, RF_PATH_A, ++ REG_RF_BB_GAIN_OFFSET, ++ RF_GAIN_OFFSET_MASK, res); ++ } else { ++ RTW_INFO("Offset RF Gain. EEPROMRFGainVal=0x%x == 0xff, didn't run Kfree\n", ++ pHalData->EEPROMRFGainVal); ++ } ++ } else ++ RTW_INFO("Using the default RF gain.\n"); ++#else + /* TODO: call this when channel switch */ + if (kfree_data->flag & KFREE_FLAG_ON) + rtw_rf_apply_tx_gain_offset(padapter, 6); /* input ch6 to select BB_GAIN_2G */ +@@ -13524,8 +13710,14 @@ u8 rtw_get_current_tx_sgi(_adapter *padapter, struct sta_info *psta) + return curr_tx_sgi; + + if (padapter->fix_rate == 0xff) { ++#if defined(CONFIG_RTL8188E) ++#if (RATE_ADAPTIVE_SUPPORT == 1) ++ curr_tx_sgi = hal_data->odmpriv.ra_info[psta->cmn.mac_id].rate_sgi; ++#endif /* (RATE_ADAPTIVE_SUPPORT == 1)*/ ++#else + ra_info = &psta->cmn.ra_info; + curr_tx_sgi = ((ra_info->curr_tx_rate) & 0x80) >> 7; ++#endif + } else { + curr_tx_sgi = ((padapter->fix_rate) & 0x80) >> 7; + } +@@ -13543,8 +13735,14 @@ u8 rtw_get_current_tx_rate(_adapter *padapter, struct sta_info *psta) + return rate_id; + + if (padapter->fix_rate == 0xff) { ++#if defined(CONFIG_RTL8188E) ++#if (RATE_ADAPTIVE_SUPPORT == 1) ++ rate_id = hal_data->odmpriv.ra_info[psta->cmn.mac_id].decision_rate; ++#endif /* (RATE_ADAPTIVE_SUPPORT == 1)*/ ++#else + ra_info = &psta->cmn.ra_info; + rate_id = ra_info->curr_tx_rate & 0x7f; ++#endif + } else { + rate_id = padapter->fix_rate & 0x7f; + } +@@ -13628,6 +13826,14 @@ void hal_set_crystal_cap(_adapter *adapter, u8 crystal_cap) + crystal_cap = crystal_cap & 0x3F; + + switch (rtw_get_chip_type(adapter)) { ++#if defined(CONFIG_RTL8188E) || defined(CONFIG_RTL8188F) || defined(CONFIG_RTL8188GTV) ++ case RTL8188E: ++ case RTL8188F: ++ case RTL8188GTV: ++ /* write 0x24[16:11] = 0x24[22:17] = CrystalCap */ ++ phy_set_bb_reg(adapter, REG_AFE_XTAL_CTRL, 0x007FF800, (crystal_cap | (crystal_cap << 6))); ++ break; ++#endif + #if defined(CONFIG_RTL8812A) + case RTL8812: + /* write 0x2C[30:25] = 0x2C[24:19] = CrystalCap */ +@@ -13651,6 +13857,25 @@ void hal_set_crystal_cap(_adapter *adapter, u8 crystal_cap) + /* write 0x2C[26:21] = 0x2C[20:15] = CrystalCap*/ + phy_set_bb_reg(adapter, REG_MAC_PHY_CTRL, 0x07FF8000, (crystal_cap | (crystal_cap << 6))); + break; ++#endif ++#if defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8192F) ++ ++ case RTL8822B: ++ case RTL8821C: ++ case RTL8192F: ++ /* write 0x28[6:1] = 0x24[30:25] = CrystalCap */ ++ crystal_cap = crystal_cap & 0x3F; ++ phy_set_bb_reg(adapter, REG_AFE_XTAL_CTRL, 0x7E000000, crystal_cap); ++ phy_set_bb_reg(adapter, REG_AFE_PLL_CTRL, 0x7E, crystal_cap); ++ break; ++#endif ++#if defined(CONFIG_RTL8710B) ++ case RTL8710B: ++ /*Change by ylb 20160728, Becase 0x2C[23:12] is removed to syson 0x60[29:18] */ ++ /* 0x2C[23:18] = 0x2C[29:24] = CrystalCap //Xo:[29:24], Xi:[23:18]*/ ++ crystal_cap = crystal_cap & 0x3F; ++ hal_set_syson_reg(adapter, REG_SYS_XTAL_CTRL0, 0x3FFC0000, (crystal_cap | (crystal_cap << 6))); ++ break; + #endif + default: + rtw_warn_on(1); +@@ -13665,6 +13890,36 @@ int hal_spec_init(_adapter *adapter) + interface_type = rtw_get_intf_type(adapter); + + switch (rtw_get_chip_type(adapter)) { ++#ifdef CONFIG_RTL8723B ++ case RTL8723B: ++ init_hal_spec_8723b(adapter); ++ break; ++#endif ++#ifdef CONFIG_RTL8703B ++ case RTL8703B: ++ init_hal_spec_8703b(adapter); ++ break; ++#endif ++#ifdef CONFIG_RTL8723D ++ case RTL8723D: ++ init_hal_spec_8723d(adapter); ++ break; ++#endif ++#ifdef CONFIG_RTL8188E ++ case RTL8188E: ++ init_hal_spec_8188e(adapter); ++ break; ++#endif ++#ifdef CONFIG_RTL8188F ++ case RTL8188F: ++ init_hal_spec_8188f(adapter); ++ break; ++#endif ++#ifdef CONFIG_RTL8188GTV ++ case RTL8188GTV: ++ init_hal_spec_8188gtv(adapter); ++ break; ++#endif + #ifdef CONFIG_RTL8812A + case RTL8812: + init_hal_spec_8812a(adapter); +@@ -13675,11 +13930,36 @@ int hal_spec_init(_adapter *adapter) + init_hal_spec_8821a(adapter); + break; + #endif ++#ifdef CONFIG_RTL8192E ++ case RTL8192E: ++ init_hal_spec_8192e(adapter); ++ break; ++#endif + #ifdef CONFIG_RTL8814A + case RTL8814A: + init_hal_spec_8814a(adapter); + break; + #endif ++#ifdef CONFIG_RTL8822B ++ case RTL8822B: ++ rtl8822b_init_hal_spec(adapter); ++ break; ++#endif ++#ifdef CONFIG_RTL8821C ++ case RTL8821C: ++ init_hal_spec_rtl8821c(adapter); ++ break; ++#endif ++#ifdef CONFIG_RTL8710B ++ case RTL8710B: ++ init_hal_spec_8710b(adapter); ++ break; ++#endif ++#ifdef CONFIG_RTL8192F ++ case RTL8192F: ++ init_hal_spec_8192f(adapter); ++ break; ++#endif + + default: + RTW_ERR("%s: unknown chip_type:%u\n" +diff --git a/drivers/staging/rtl8812au/hal/hal_intf.c b/drivers/staging/rtl8812au/hal/hal_intf.c +index b20ef6322..66a2954c5 100644 +--- a/drivers/staging/rtl8812au/hal/hal_intf.c ++++ b/drivers/staging/rtl8812au/hal/hal_intf.c +@@ -20,9 +20,20 @@ + + const u32 _chip_type_to_odm_ic_type[] = { + 0, ++ ODM_RTL8188E, ++ ODM_RTL8192E, + ODM_RTL8812, + ODM_RTL8821, ++ ODM_RTL8723B, + ODM_RTL8814A, ++ ODM_RTL8703B, ++ ODM_RTL8188F, ++ ODM_RTL8188F, ++ ODM_RTL8822B, ++ ODM_RTL8723D, ++ ODM_RTL8821C, ++ ODM_RTL8710B, ++ ODM_RTL8192F, + 0, + }; + +@@ -1402,6 +1413,7 @@ bool rtw_hal_rfkill_poll(_adapter *adapter, u8 *valid) + u8 rtw_hal_ops_check(_adapter *padapter) + { + u8 ret = _SUCCESS; ++#if 1 + /*** initialize section ***/ + if (NULL == padapter->hal_func.read_chip_version) { + rtw_hal_error_msg("read_chip_version"); +@@ -1591,6 +1603,12 @@ u8 rtw_hal_ops_check(_adapter *padapter) + rtw_hal_error_msg("hal_mac_c2h_handler"); + ret = _FAIL; + } ++#elif !defined(CONFIG_RTL8188E) ++ if (NULL == padapter->hal_func.c2h_handler) { ++ rtw_hal_error_msg("c2h_handler"); ++ ret = _FAIL; ++ } ++#endif + + #if defined(CONFIG_LPS) || defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) + if (NULL == padapter->hal_func.fill_fake_txdesc) { +diff --git a/drivers/staging/rtl8812au/hal/hal_mp.c b/drivers/staging/rtl8812au/hal/hal_mp.c +index 5dfaf91fe..7960556f2 100644 +--- a/drivers/staging/rtl8812au/hal/hal_mp.c ++++ b/drivers/staging/rtl8812au/hal/hal_mp.c +@@ -21,12 +21,39 @@ + #ifdef RTW_HALMAC + #include /* struct HAL_DATA_TYPE, RF register definition and etc. */ + #else /* !RTW_HALMAC */ ++ #ifdef CONFIG_RTL8188E ++ #include ++ #endif ++ #ifdef CONFIG_RTL8723B ++ #include ++ #endif ++ #ifdef CONFIG_RTL8192E ++ #include ++ #endif + #if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8812A) + #include + #endif + #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) + #include + #endif ++ #ifdef CONFIG_RTL8703B ++ #include ++ #endif ++ #ifdef CONFIG_RTL8723D ++ #include ++ #endif ++ #ifdef CONFIG_RTL8710B ++ #include ++ #endif ++ #ifdef CONFIG_RTL8188F ++ #include ++ #endif ++ #ifdef CONFIG_RTL8188GTV ++ #include ++ #endif ++ #ifdef CONFIG_RTL8192F ++ #include ++ #endif + #endif /* !RTW_HALMAC */ + + +diff --git a/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ap.c b/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ap.c +index 5bfb27041..6c93e5f6f 100644 +--- a/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ap.c ++++ b/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ap.c +@@ -1202,6 +1202,16 @@ VOID + IN BOOLEAN is2T + ) + { ++#if (RT_PLATFORM == PLATFORM_WINDOWS) ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++#endif ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++#endif ++#endif + + u4Byte tmpReg, tmpReg2, index, i; + u1Byte path, pathbound = PATH_NUM; +@@ -1216,12 +1226,12 @@ VOID + rRx_TO_Rx, rStandby, + rSleep, rPMPD_ANAEN }; + +- u4Byte BB_backup[DP_BB_REG_NUM]; ++ u4Byte BB_backup[DP_BB_REG_NUM]; + u4Byte BB_REG[DP_BB_REG_NUM] = { +- rOFDM0_TRxPathEnable, rFPGA0_RFMOD, ++ rOFDM0_TRxPathEnable, rFPGA0_RFMOD, + rOFDM0_TRMuxPar, rFPGA0_XCD_RFInterfaceSW, +- rFPGA0_XAB_RFInterfaceSW, rFPGA0_XA_RFInterfaceOE, +- rFPGA0_XB_RFInterfaceOE}; ++ rFPGA0_XAB_RFInterfaceSW, rFPGA0_XA_RFInterfaceOE, ++ rFPGA0_XB_RFInterfaceOE}; + u4Byte BB_settings[DP_BB_REG_NUM] = { + 0x00a05430, 0x02040000, 0x000800e4, 0x22208000, + 0x0, 0x0, 0x0}; +diff --git a/drivers/staging/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_ap.c b/drivers/staging/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_ap.c +index 81ea9a614..adf2cd9c6 100644 +--- a/drivers/staging/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_ap.c ++++ b/drivers/staging/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_ap.c +@@ -1201,29 +1201,39 @@ VOID + IN BOOLEAN is2T + ) + { ++#if (RT_PLATFORM == PLATFORM_WINDOWS) ++#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++#if (DM_ODM_SUPPORT_TYPE == ODM_CE) ++ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; ++#endif ++#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ++ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ++#endif ++#endif + + u32 tmpReg, tmpReg2, index, i; + u8 path, pathbound = PATH_NUM; + u32 AFE_backup[IQK_ADDA_REG_NUM]; +- u32 AFE_REG[IQK_ADDA_REG_NUM] = { +- rFPGA0_XCD_SwitchControl, rBlue_Tooth, ++ u32 AFE_REG[IQK_ADDA_REG_NUM] = { ++ rFPGA0_XCD_SwitchControl, rBlue_Tooth, + rRx_Wait_CCA, rTx_CCK_RFON, +- rTx_CCK_BBON, rTx_OFDM_RFON, ++ rTx_CCK_BBON, rTx_OFDM_RFON, + rTx_OFDM_BBON, rTx_To_Rx, +- rTx_To_Tx, rRx_CCK, ++ rTx_To_Tx, rRx_CCK, + rRx_OFDM, rRx_Wait_RIFS, +- rRx_TO_Rx, rStandby, ++ rRx_TO_Rx, rStandby, + rSleep, rPMPD_ANAEN }; + +- u32 BB_backup[DP_BB_REG_NUM]; ++ u32 BB_backup[DP_BB_REG_NUM]; + u32 BB_REG[DP_BB_REG_NUM] = { +- rOFDM0_TRxPathEnable, rFPGA0_RFMOD, ++ rOFDM0_TRxPathEnable, rFPGA0_RFMOD, + rOFDM0_TRMuxPar, rFPGA0_XCD_RFInterfaceSW, + rFPGA0_XAB_RFInterfaceSW, rFPGA0_XA_RFInterfaceOE, +- rFPGA0_XB_RFInterfaceOE}; ++ rFPGA0_XB_RFInterfaceOE}; + u32 BB_settings[DP_BB_REG_NUM] = { + 0x00a05430, 0x02040000, 0x000800e4, 0x22208000, +- 0x0, 0x0, 0x0}; ++ 0x0, 0x0, 0x0}; + + u32 RF_backup[DP_PATH_NUM][DP_RF_REG_NUM]; + u32 RF_REG[DP_RF_REG_NUM] = { +diff --git a/drivers/staging/rtl8812au/hal/rtl8814a/usb/usb_halinit.c b/drivers/staging/rtl8812au/hal/rtl8814a/usb/usb_halinit.c +index b2427fe25..5c0bf0d03 100644 +--- a/drivers/staging/rtl8812au/hal/rtl8814a/usb/usb_halinit.c ++++ b/drivers/staging/rtl8812au/hal/rtl8814a/usb/usb_halinit.c +@@ -1585,9 +1585,9 @@ HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_HAL_DM); + // Reset USB mode switch setting + rtw_write8(Adapter, REG_SDIO_CTRL_8814A, 0x0); + rtw_write8(Adapter, REG_ACLK_MON, 0x0); +- ++ + //RT_TRACE(COMP_INIT, DBG_TRACE, ("InitializeAdapter8188EUsb() <====\n")); +- ++ + HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_IQK); + // 2010/08/26 MH Merge from 8192CE. + if(pwrctrlpriv->rf_pwrstate == rf_on) +@@ -2048,19 +2048,19 @@ InitAdapterVariablesByPROM_8814AU( + hal_ReadTxPowerInfo8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); + hal_ReadBoardType8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); + hal_Read_TRX_antenna_8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); +- ++ + // + // Read Bluetooth co-exist and initialize + // + hal_EfuseParseBTCoexistInfo8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); +- ++ + hal_ReadChannelPlan8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); + hal_EfuseParseXtal_8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); + hal_ReadThermalMeter_8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); + hal_ReadRemoteWakeup_8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); + hal_ReadAntennaDiversity8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); + hal_ReadRFEType_8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); +- ++ + ReadLEDSetting_8814AU(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); + + hal_ReadUsbModeSwitch_8814AU(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); +@@ -2074,7 +2074,7 @@ InitAdapterVariablesByPROM_8814AU( + static void hal_ReadPROMContent_8814A( + IN PADAPTER Adapter + ) +-{ ++{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); + u8 eeValue; + +@@ -2097,7 +2097,7 @@ ReadAdapterInfo8814AU( + ) + { + Hal_InitEfuseVars_8814A(Adapter); +- ++ + /* Read all content in Efuse/EEPROM. */ + hal_ReadPROMContent_8814A(Adapter); + +@@ -2118,17 +2118,17 @@ void UpdateInterruptMask8814AU(PADAPTER padapter,u8 bHIMR0 ,u32 AddMSR, u32 Remo + himr = &(pHalData->IntrMask[0]); + else + himr = &(pHalData->IntrMask[1]); +- ++ + if (AddMSR) + *himr |= AddMSR; + + if (RemoveMSR) + *himr &= (~RemoveMSR); + +- if(bHIMR0) ++ if(bHIMR0) + rtw_write32(padapter, REG_HIMR0_8814A, *himr); + else +- rtw_write32(padapter, REG_HIMR1_8814A, *himr); ++ rtw_write32(padapter, REG_HIMR1_8814A, *himr); + + } + +@@ -2223,7 +2223,7 @@ u8 SetHwReg8814AU(PADAPTER Adapter, u8 variable, u8* val) + + void GetHwReg8814AU(PADAPTER Adapter, u8 variable, u8* val) + { +- HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + switch(variable) + { +@@ -2340,7 +2340,7 @@ static void rtl8814au_init_default_value(_adapter * padapter) + } + + static u8 rtl8814au_ps_func(PADAPTER Adapter,HAL_INTF_PS_FUNC efunc_id, u8 *val) +-{ ++{ + u8 bResult = _TRUE; + switch(efunc_id){ + +@@ -2365,7 +2365,7 @@ void rtl8814au_set_hal_ops(_adapter * padapter) + + pHalFunc->hal_power_on = _InitPowerOn_8814AU; + pHalFunc->hal_power_off = hal_carddisable_8814; +- ++ + pHalFunc->hal_init = &rtl8814au_hal_init; + pHalFunc->hal_deinit = &rtl8814au_hal_deinit; + +@@ -2384,11 +2384,11 @@ void rtl8814au_set_hal_ops(_adapter * padapter) + // pHalFunc->InitSwLeds = NULL; + // pHalFunc->DeInitSwLeds = NULL; + #endif//CONFIG_RTW_LED +- ++ + pHalFunc->init_default_value = &rtl8814au_init_default_value; + pHalFunc->intf_chip_configure = &rtl8814au_interface_configure; + pHalFunc->read_adapter_info = &ReadAdapterInfo8814AU; +- ++ + pHalFunc->set_hw_reg_handler = &SetHwReg8814AU; + pHalFunc->GetHwRegHandler = &GetHwReg8814AU; + pHalFunc->get_hal_def_var_handler = &GetHalDefVar8814AUsb; +diff --git a/drivers/staging/rtl8812au/include/gspi_osintf.h b/drivers/staging/rtl8812au/include/gspi_osintf.h +index 2bff22ffd..6393f779d 100644 +--- a/drivers/staging/rtl8812au/include/gspi_osintf.h ++++ b/drivers/staging/rtl8812au/include/gspi_osintf.h +@@ -15,4 +15,11 @@ + #ifndef __SDIO_OSINTF_H__ + #define __SDIO_OSINTF_H__ + ++ ++#ifdef PLATFORM_OS_CE ++ extern NDIS_STATUS ce_sd_get_dev_hdl(PADAPTER padapter); ++ SD_API_STATUS ce_sd_int_callback(SD_DEVICE_HANDLE hDevice, PADAPTER padapter); ++ extern void sd_setup_irs(PADAPTER padapter); ++#endif ++ + #endif +diff --git a/drivers/staging/rtl8812au/include/rtl8812a_recv.h b/drivers/staging/rtl8812au/include/rtl8812a_recv.h +index 07b824550..bf1d4b651 100644 +--- a/drivers/staging/rtl8812au/include/rtl8812a_recv.h ++++ b/drivers/staging/rtl8812au/include/rtl8812a_recv.h +@@ -18,6 +18,9 @@ + #if defined(CONFIG_USB_HCI) + + #ifndef MAX_RECVBUF_SZ ++ #ifdef PLATFORM_OS_CE ++ #define MAX_RECVBUF_SZ (8192+1024) /* 8K+1k */ ++ #else + #ifndef CONFIG_MINIMAL_MEMORY_USAGE + #ifdef CONFIG_PREALLOC_RX_SKB_BUFFER + #define MAX_RECVBUF_SZ (rtw_rtkm_get_buff_size()) /*depend rtkm*/ +@@ -36,6 +39,7 @@ + #else + #define MAX_RECVBUF_SZ (4000) /* about 4K */ + #endif ++ #endif + #endif /* !MAX_RECVBUF_SZ */ + + #elif defined(CONFIG_PCI_HCI) +diff --git a/drivers/staging/rtl8812au/include/rtl8814a_recv.h b/drivers/staging/rtl8812au/include/rtl8814a_recv.h +index f723c0a10..c6792d8a5 100644 +--- a/drivers/staging/rtl8812au/include/rtl8814a_recv.h ++++ b/drivers/staging/rtl8812au/include/rtl8814a_recv.h +@@ -18,6 +18,9 @@ + #if defined(CONFIG_USB_HCI) + + #ifndef MAX_RECVBUF_SZ ++ #ifdef PLATFORM_OS_CE ++ #define MAX_RECVBUF_SZ (8192+1024) /* 8K+1k */ ++ #else + #ifndef CONFIG_MINIMAL_MEMORY_USAGE + #ifdef CONFIG_PLATFORM_MSTAR + #define MAX_RECVBUF_SZ (8192) /* 8K */ +@@ -32,6 +35,7 @@ + #else + #define MAX_RECVBUF_SZ (4000) /* about 4K */ + #endif ++ #endif + #endif /* !MAX_RECVBUF_SZ */ + + #elif defined(CONFIG_PCI_HCI) +diff --git a/drivers/staging/rtl8812au/include/rtw_cmd.h b/drivers/staging/rtl8812au/include/rtw_cmd.h +index 0f549a65a..4df67602f 100644 +--- a/drivers/staging/rtl8812au/include/rtw_cmd.h ++++ b/drivers/staging/rtl8812au/include/rtw_cmd.h +@@ -26,7 +26,11 @@ + #define MAX_RSPSZ 512 + #define MAX_EVTSZ 1024 + +-#define CMDBUFF_ALIGN_SZ 512 ++#ifdef PLATFORM_OS_CE ++ #define CMDBUFF_ALIGN_SZ 4 ++#else ++ #define CMDBUFF_ALIGN_SZ 512 ++#endif + + struct cmd_obj { + _adapter *padapter; +@@ -110,6 +114,9 @@ struct evt_priv { + #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) + u8 *c2h_mem; + u8 *allocated_c2h_mem; ++#ifdef PLATFORM_OS_XP ++ PMDL pc2h_mdl; ++#endif + #endif + + }; +diff --git a/drivers/staging/rtl8812au/include/rtw_debug.h b/drivers/staging/rtl8812au/include/rtw_debug.h +index 93f9e6e3c..e3562ca4a 100644 +--- a/drivers/staging/rtl8812au/include/rtw_debug.h ++++ b/drivers/staging/rtl8812au/include/rtw_debug.h +@@ -28,6 +28,10 @@ enum { + + #define DRIVER_PREFIX "RTW: " + ++#ifdef PLATFORM_OS_CE ++extern void rtl871x_cedbg(const char *fmt, ...); ++#endif ++ + #define RTW_PRINT(x, ...) do {} while (0) + #define RTW_ERR(x, ...) do {} while (0) + #define RTW_WARN(x,...) do {} while (0) +diff --git a/drivers/staging/rtl8812au/include/rtw_recv.h b/drivers/staging/rtl8812au/include/rtw_recv.h +index ee0ec77cb..d6422a1d2 100644 +--- a/drivers/staging/rtl8812au/include/rtw_recv.h ++++ b/drivers/staging/rtl8812au/include/rtw_recv.h +@@ -19,6 +19,19 @@ + #define RTW_RX_MSDU_ACT_INDICATE BIT0 + #define RTW_RX_MSDU_ACT_FORWARD BIT1 + ++#ifdef PLATFORM_OS_XP ++ #ifdef CONFIG_SDIO_HCI ++ #define NR_RECVBUFF 1024/* 512 */ /* 128 */ ++ #else ++ #define NR_RECVBUFF (16) ++ #endif ++#elif defined(PLATFORM_OS_CE) ++ #ifdef CONFIG_SDIO_HCI ++ #define NR_RECVBUFF (128) ++ #else ++ #define NR_RECVBUFF (4) ++ #endif ++#else /* PLATFORM_LINUX /PLATFORM_BSD */ + + #include + +@@ -42,6 +55,7 @@ + #ifdef CONFIG_RTW_NAPI + #define RTL_NAPI_WEIGHT (32) + #endif ++#endif + + #if defined(CONFIG_RTL8821C) && defined(CONFIG_SDIO_HCI) && defined(CONFIG_RECV_THREAD_MODE) + #ifdef NR_RECVBUFF +@@ -340,6 +354,17 @@ struct recv_priv { + + _adapter *adapter; + ++#ifdef PLATFORM_WINDOWS ++ _nic_hdl RxPktPoolHdl; ++ _nic_hdl RxBufPoolHdl; ++ ++#ifdef PLATFORM_OS_XP ++ PMDL pbytecnt_mdl; ++#endif ++ uint counter; /* record the number that up-layer will return to drv; only when counter==0 can we release recv_priv */ ++ NDIS_EVENT recv_resource_evt ; ++#endif ++ + + u32 is_any_non_be_pkts; + +@@ -508,11 +533,20 @@ struct recv_buf { + + #ifdef CONFIG_USB_HCI + +-#if defined(PLATFORM_LINUX) || defined(PLATFORM_FREEBSD) ++#if defined(PLATFORM_OS_XP) || defined(PLATFORM_LINUX) || defined(PLATFORM_FREEBSD) + PURB purb; + dma_addr_t dma_transfer_addr; /* (in) dma addr for transfer_buffer */ + u32 alloc_sz; + #endif ++ ++#ifdef PLATFORM_OS_XP ++ PIRP pirp; ++#endif ++ ++#ifdef PLATFORM_OS_CE ++ USB_TRANSFER usb_transfer_read_port; ++#endif ++ + u8 irp_pending; + int transfer_len; + +diff --git a/drivers/staging/rtl8812au/include/rtw_xmit.h b/drivers/staging/rtl8812au/include/rtw_xmit.h +index 69ec205f4..660a29ae2 100644 +--- a/drivers/staging/rtl8812au/include/rtw_xmit.h ++++ b/drivers/staging/rtl8812au/include/rtw_xmit.h +@@ -60,6 +60,10 @@ + #endif + #define NR_XMITBUFF (128) + #endif ++ ++#ifdef PLATFORM_OS_CE ++ #define XMITBUF_ALIGN_SZ 4 ++#else + #ifdef CONFIG_PCI_HCI + #define XMITBUF_ALIGN_SZ 4 + #else +@@ -68,6 +72,7 @@ + #else + #define XMITBUF_ALIGN_SZ 512 + #endif ++ #endif + #endif + + /* xmit extension buff defination */ +diff --git a/drivers/staging/rtl8812au/include/sdio_osintf.h b/drivers/staging/rtl8812au/include/sdio_osintf.h +index 2bff22ffd..7c2abd14d 100644 +--- a/drivers/staging/rtl8812au/include/sdio_osintf.h ++++ b/drivers/staging/rtl8812au/include/sdio_osintf.h +@@ -15,4 +15,11 @@ + #ifndef __SDIO_OSINTF_H__ + #define __SDIO_OSINTF_H__ + ++ ++#ifdef PLATFORM_OS_CE ++extern NDIS_STATUS ce_sd_get_dev_hdl(PADAPTER padapter); ++SD_API_STATUS ce_sd_int_callback(SD_DEVICE_HANDLE hDevice, PADAPTER padapter); ++extern void sd_setup_irs(PADAPTER padapter); ++#endif ++ + #endif +diff --git a/drivers/staging/rtl8812au/os_dep/osdep_service.c b/drivers/staging/rtl8812au/os_dep/osdep_service.c +index 7d10c0ce5..7553f2c98 100644 +--- a/drivers/staging/rtl8812au/os_dep/osdep_service.c ++++ b/drivers/staging/rtl8812au/os_dep/osdep_service.c +@@ -1135,6 +1135,11 @@ void _rtw_init_sema(_sema *sema, int init_val) + sema_init(sema, init_val, "rtw_drv"); + #endif + ++#ifdef PLATFORM_OS_CE ++ if (*sema == NULL) ++ *sema = CreateSemaphore(NULL, init_val, SEMA_UPBND, NULL); ++#endif ++ + } + + void _rtw_free_sema(_sema *sema) +@@ -1142,6 +1147,9 @@ void _rtw_free_sema(_sema *sema) + #ifdef PLATFORM_FREEBSD + sema_destroy(sema); + #endif ++#ifdef PLATFORM_OS_CE ++ CloseHandle(*sema); ++#endif + + } + +@@ -1156,6 +1164,10 @@ void _rtw_up_sema(_sema *sema) + #ifdef PLATFORM_FREEBSD + sema_post(sema); + #endif ++ ++#ifdef PLATFORM_OS_CE ++ ReleaseSemaphore(*sema, 1, NULL); ++#endif + } + + u32 _rtw_down_sema(_sema *sema) +@@ -1173,6 +1185,13 @@ u32 _rtw_down_sema(_sema *sema) + sema_wait(sema); + return _SUCCESS; + #endif ++ ++#ifdef PLATFORM_OS_CE ++ if (WAIT_OBJECT_0 == WaitForSingleObject(*sema, INFINITE)) ++ return _SUCCESS; ++ else ++ return _FAIL; ++#endif + } + + #if LINUX_VERSION_CODE < KERNEL_VERSION(5, 17, 0) +@@ -1192,6 +1211,10 @@ inline void kthread_thread_exit(_completion *comp) + #ifdef PLATFORM_FREEBSD + printf("%s", "RTKTHREAD_exit"); + #endif ++ ++#ifdef PLATFORM_OS_CE ++ ExitThread(STATUS_SUCCESS); ++#endif + } + + inline void _rtw_init_completion(_completion *comp) +@@ -1227,6 +1250,10 @@ void _rtw_mutex_init(_mutex *pmutex) + #ifdef PLATFORM_FREEBSD + mtx_init(pmutex, "", NULL, MTX_DEF | MTX_RECURSE); + #endif ++ ++#ifdef PLATFORM_OS_CE ++ *pmutex = CreateMutex(NULL, _FALSE, NULL); ++#endif + } + + void _rtw_mutex_free(_mutex *pmutex); +@@ -1243,6 +1270,10 @@ void _rtw_mutex_free(_mutex *pmutex) + sema_destroy(pmutex); + #endif + ++#endif ++ ++#ifdef PLATFORM_OS_CE ++ + #endif + } + +-- +2.41.0 + + +From aae6908f32010c261877371d891c8163a1482572 Mon Sep 17 00:00:00 2001 +From: kimocoder +Date: Sun, 2 Jul 2023 02:50:24 +0200 +Subject: [PATCH 02/13] Address warning in createbss_hdl() + +--- + drivers/staging/rtl8812au/core/rtw_mlme_ext.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +diff --git a/drivers/staging/rtl8812au/core/rtw_mlme_ext.c b/drivers/staging/rtl8812au/core/rtw_mlme_ext.c +index 01136fb37..57e7536c0 100644 +--- a/drivers/staging/rtl8812au/core/rtw_mlme_ext.c ++++ b/drivers/staging/rtl8812au/core/rtw_mlme_ext.c +@@ -13941,14 +13941,14 @@ u8 createbss_hdl(_adapter *padapter, u8 *pbuf) + flush_all_cam_entry(padapter); + + pdev_network->Length = get_WLAN_BSSID_EX_sz(pdev_network); +- _rtw_memcpy(pnetwork, pdev_network, FIELD_OFFSET(WLAN_BSSID_EX, IELength)); +- pnetwork->IELength = pdev_network->IELength; +- +- if (pnetwork->IELength > MAX_IE_SZ) { ++ if (FIELD_OFFSET(WLAN_BSSID_EX, IELength) > MAX_IE_SZ) { + ret = H2C_PARAMETERS_ERROR; + goto ibss_post_hdl; + } + ++ memcpy(pnetwork, pdev_network, FIELD_OFFSET(WLAN_BSSID_EX, IELength)); ++ pnetwork->IELength = pdev_network->IELength; ++ + _rtw_memcpy(pnetwork->IEs, pdev_network->IEs, pnetwork->IELength); + start_create_ibss(padapter); + } else { +-- +2.41.0 + + +From c80d9acb9ea350300cfe0e06065818640d989583 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Carlos=20Garc=C3=A9s?= +Date: Sun, 2 Jul 2023 12:11:29 +0000 +Subject: [PATCH 03/13] Use eth_hw_addr_set instead of dev_addr_set + +--- + drivers/staging/rtl8812au/include/drv_types_linux.h | 6 +++++- + drivers/staging/rtl8812au/os_dep/linux/ioctl_linux.c | 2 +- + drivers/staging/rtl8812au/os_dep/linux/mlme_linux.c | 2 +- + drivers/staging/rtl8812au/os_dep/linux/os_intfs.c | 4 ++-- + drivers/staging/rtl8812au/os_dep/osdep_service.c | 2 +- + 5 files changed, 10 insertions(+), 6 deletions(-) + +diff --git a/drivers/staging/rtl8812au/include/drv_types_linux.h b/drivers/staging/rtl8812au/include/drv_types_linux.h +index 3d428d4d0..97c8576a2 100644 +--- a/drivers/staging/rtl8812au/include/drv_types_linux.h ++++ b/drivers/staging/rtl8812au/include/drv_types_linux.h +@@ -16,7 +16,11 @@ + #define __DRV_TYPES_LINUX_H__ + + #if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 15, 0)) +-#define dev_addr_set(netdev, ethdata) _rtw_memcpy(netdev->dev_addr, ethdata, ETH_ALEN) ++/* Porting from linux kernel v5.15 48eab831ae8b9f7002a533fa4235eed63ea1f1a3 3f6cffb8604b537e3d7ea040d7f4368689638eaf*/ ++static inline void eth_hw_addr_set(struct net_device *dev, const u8 *addr) ++{ ++ memcpy(dev->dev_addr, addr, ETH_ALEN) ++} + #endif + + #endif +diff --git a/drivers/staging/rtl8812au/os_dep/linux/ioctl_linux.c b/drivers/staging/rtl8812au/os_dep/linux/ioctl_linux.c +index b2a7560d9..c5776117f 100644 +--- a/drivers/staging/rtl8812au/os_dep/linux/ioctl_linux.c ++++ b/drivers/staging/rtl8812au/os_dep/linux/ioctl_linux.c +@@ -9725,7 +9725,7 @@ static int rtw_mp_efuse_set(struct net_device *dev, + rtw_hal_read_chip_info(padapter); + /* set mac addr*/ + rtw_macaddr_cfg(adapter_mac_addr(padapter), get_hal_mac_addr(padapter)); +- dev_addr_set(padapter->pnetdev, get_hal_mac_addr(padapter)); /* set mac addr to net_device */ ++ eth_hw_addr_set(padapter->pnetdev, get_hal_mac_addr(padapter)); /* set mac addr to net_device */ + + #ifdef CONFIG_P2P + rtw_init_wifidirect_addrs(padapter, adapter_mac_addr(padapter), adapter_mac_addr(padapter)); +diff --git a/drivers/staging/rtl8812au/os_dep/linux/mlme_linux.c b/drivers/staging/rtl8812au/os_dep/linux/mlme_linux.c +index 771c6272e..74f098277 100644 +--- a/drivers/staging/rtl8812au/os_dep/linux/mlme_linux.c ++++ b/drivers/staging/rtl8812au/os_dep/linux/mlme_linux.c +@@ -404,7 +404,7 @@ int hostapd_mode_init(_adapter *padapter) + mac[4] = 0x11; + mac[5] = 0x12; + +- dev_addr_set(pnetdev, mac); ++ eth_hw_addr_set(pnetdev, mac); + + + rtw_netif_carrier_off(pnetdev); +diff --git a/drivers/staging/rtl8812au/os_dep/linux/os_intfs.c b/drivers/staging/rtl8812au/os_dep/linux/os_intfs.c +index 6d2801357..2dadae098 100644 +--- a/drivers/staging/rtl8812au/os_dep/linux/os_intfs.c ++++ b/drivers/staging/rtl8812au/os_dep/linux/os_intfs.c +@@ -1285,7 +1285,7 @@ static int rtw_net_set_mac_address(struct net_device *pnetdev, void *addr) + } + + _rtw_memcpy(adapter_mac_addr(padapter), sa->sa_data, ETH_ALEN); /* set mac addr to adapter */ +- dev_addr_set(pnetdev, sa->sa_data); /* set mac addr to net_device */ ++ eth_hw_addr_set(pnetdev, sa->sa_data); /* set mac addr to net_device */ + + #if 0 + if (rtw_is_hw_init_completed(padapter)) { +@@ -1754,7 +1754,7 @@ int rtw_os_ndev_register(_adapter *adapter, const char *name) + /* alloc netdev name */ + rtw_init_netdev_name(ndev, name); + +- dev_addr_set(ndev, adapter_mac_addr(adapter)); ++ eth_hw_addr_set(ndev, adapter_mac_addr(adapter)); + #if defined(CONFIG_NET_NS) + dev_net_set(ndev, wiphy_net(adapter_to_wiphy(adapter))); + #endif //defined(CONFIG_NET_NS) +diff --git a/drivers/staging/rtl8812au/os_dep/osdep_service.c b/drivers/staging/rtl8812au/os_dep/osdep_service.c +index 7553f2c98..d24b3e1f0 100644 +--- a/drivers/staging/rtl8812au/os_dep/osdep_service.c ++++ b/drivers/staging/rtl8812au/os_dep/osdep_service.c +@@ -2299,7 +2299,7 @@ int rtw_change_ifname(_adapter *padapter, const char *ifname) + + rtw_init_netdev_name(pnetdev, ifname); + +- dev_addr_set(pnetdev, adapter_mac_addr(padapter)); ++ eth_hw_addr_set(pnetdev, adapter_mac_addr(padapter)); + + if (rtnl_lock_needed) + ret = register_netdev(pnetdev); +-- +2.41.0 + + +From 8084e3fe2acd66f315c221184acea9576039fd35 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Carlos=20Garc=C3=A9s?= +Date: Mon, 3 Jul 2023 18:19:34 +0200 +Subject: [PATCH 04/13] Fix compilation error on kernels < 5.15 + +--- + drivers/staging/rtl8812au/include/drv_types_linux.h | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/staging/rtl8812au/include/drv_types_linux.h b/drivers/staging/rtl8812au/include/drv_types_linux.h +index 97c8576a2..6264a4d30 100644 +--- a/drivers/staging/rtl8812au/include/drv_types_linux.h ++++ b/drivers/staging/rtl8812au/include/drv_types_linux.h +@@ -19,7 +19,7 @@ + /* Porting from linux kernel v5.15 48eab831ae8b9f7002a533fa4235eed63ea1f1a3 3f6cffb8604b537e3d7ea040d7f4368689638eaf*/ + static inline void eth_hw_addr_set(struct net_device *dev, const u8 *addr) + { +- memcpy(dev->dev_addr, addr, ETH_ALEN) ++ memcpy(dev->dev_addr, addr, ETH_ALEN); + } + #endif + +-- +2.41.0 + + +From b042f942026520d86350983bee7419267ba35e6c Mon Sep 17 00:00:00 2001 +From: Christian Stewart +Date: Mon, 3 Jul 2023 13:54:27 -0700 +Subject: [PATCH 05/13] ioctl_cfg80211: fix build against kernels < 4.10.x + +Kernel 4.10.x adjusted cfg80211_connect_bss to accept a timeout as the last +argument. Add a conditional statement which removes this extra parameter if the +kernel is less than version 4.10.x to fix build errors against version 4.9.x. + +Note that the Jetson TX2 kernel is still version 4.9.x even though this version +is technically deprecated upstream. + +Signed-off-by: Christian Stewart +--- + .../staging/rtl8812au/os_dep/linux/ioctl_cfg80211.c | 10 ++++++++++ + 1 file changed, 10 insertions(+) + +diff --git a/drivers/staging/rtl8812au/os_dep/linux/ioctl_cfg80211.c b/drivers/staging/rtl8812au/os_dep/linux/ioctl_cfg80211.c +index 0d2a01326..6cf89b24c 100644 +--- a/drivers/staging/rtl8812au/os_dep/linux/ioctl_cfg80211.c ++++ b/drivers/staging/rtl8812au/os_dep/linux/ioctl_cfg80211.c +@@ -1193,12 +1193,22 @@ void rtw_cfg80211_indicate_connect(_adapter *padapter) + struct cfg80211_bss *bss; + bss = cfg80211_get_bss(pwdev->wiphy, NULL, cur_network->network.MacAddress, NULL, 0, + IEEE80211_BSS_TYPE_ANY, IEEE80211_PRIVACY_ANY); ++ #if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 10, 0) + cfg80211_connect_bss(wdev_to_ndev(pwdev), cur_network->network.MacAddress, bss + , pmlmepriv->assoc_req + sizeof(struct rtw_ieee80211_hdr_3addr) + 2 + , pmlmepriv->assoc_req_len - sizeof(struct rtw_ieee80211_hdr_3addr) - 2 + , pmlmepriv->assoc_rsp + sizeof(struct rtw_ieee80211_hdr_3addr) + 6 + , pmlmepriv->assoc_rsp_len - sizeof(struct rtw_ieee80211_hdr_3addr) - 6 + , WLAN_STATUS_SUCCESS, GFP_ATOMIC, NL80211_TIMEOUT_UNSPECIFIED); ++ #else // (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 10, 0)) ++ // Linux < 4.10.x does not accept the last argument (timeout). ++ cfg80211_connect_bss(wdev_to_ndev(pwdev), cur_network->network.MacAddress, bss ++ , pmlmepriv->assoc_req + sizeof(struct rtw_ieee80211_hdr_3addr) + 2 ++ , pmlmepriv->assoc_req_len - sizeof(struct rtw_ieee80211_hdr_3addr) - 2 ++ , pmlmepriv->assoc_rsp + sizeof(struct rtw_ieee80211_hdr_3addr) + 6 ++ , pmlmepriv->assoc_rsp_len - sizeof(struct rtw_ieee80211_hdr_3addr) - 6 ++ , WLAN_STATUS_SUCCESS, GFP_ATOMIC); ++ #endif + } + #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 11, 0) || defined(COMPAT_KERNEL_RELEASE) + RTW_INFO("pwdev->sme_state(a)=%d\n", pwdev->sme_state); +-- +2.41.0 + + +From 1d7babf42e6f7bd41f772ff9b78f1c242cc9a9c4 Mon Sep 17 00:00:00 2001 +From: seppzer0 +Date: Wed, 19 Jul 2023 00:12:47 +0200 +Subject: [PATCH 06/13] Add an extra definition for cfg80211_connect_bss() + usage + +--- + drivers/staging/rtl8812au/Makefile | 2 ++ + drivers/staging/rtl8812au/os_dep/linux/ioctl_cfg80211.c | 2 +- + 2 files changed, 3 insertions(+), 1 deletion(-) + +diff --git a/drivers/staging/rtl8812au/Makefile b/drivers/staging/rtl8812au/Makefile +index aa3cd789c..127850786 100644 +--- a/drivers/staging/rtl8812au/Makefile ++++ b/drivers/staging/rtl8812au/Makefile +@@ -851,6 +851,8 @@ EXTRA_CFLAGS += -DRTW_ENABLE_WIFI_CONTROL_FUNC -DCONFIG_RADIO_WORK + #EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE + EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT + EXTRA_CFLAGS += -DCONFIG_P2P_IPS ++# A special rule for cfg80211_connect_bss() to receive all 10 arguments in an Android build ++EXTRA_CFLAGS += -DCONFIG_CFG80211_CONNECT_BSS_ANDROID + endif + + ifeq ($(CONFIG_PLATFORM_ANDROID_X86), y) +diff --git a/drivers/staging/rtl8812au/os_dep/linux/ioctl_cfg80211.c b/drivers/staging/rtl8812au/os_dep/linux/ioctl_cfg80211.c +index 6cf89b24c..24cd0c540 100644 +--- a/drivers/staging/rtl8812au/os_dep/linux/ioctl_cfg80211.c ++++ b/drivers/staging/rtl8812au/os_dep/linux/ioctl_cfg80211.c +@@ -1193,7 +1193,7 @@ void rtw_cfg80211_indicate_connect(_adapter *padapter) + struct cfg80211_bss *bss; + bss = cfg80211_get_bss(pwdev->wiphy, NULL, cur_network->network.MacAddress, NULL, 0, + IEEE80211_BSS_TYPE_ANY, IEEE80211_PRIVACY_ANY); +- #if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 10, 0) ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 10, 0) || defined(CONFIG_CFG80211_CONNECT_BSS_ANDROID)) + cfg80211_connect_bss(wdev_to_ndev(pwdev), cur_network->network.MacAddress, bss + , pmlmepriv->assoc_req + sizeof(struct rtw_ieee80211_hdr_3addr) + 2 + , pmlmepriv->assoc_req_len - sizeof(struct rtw_ieee80211_hdr_3addr) - 2 +-- +2.41.0 + + +From 123f15677922b20434acdd63cfc96de4772dd08b Mon Sep 17 00:00:00 2001 +From: kimocoder +Date: Sun, 29 Oct 2023 15:15:50 +0100 +Subject: [PATCH 07/13] Fix the VFS internal message + +--- + drivers/staging/rtl8812au/os_dep/linux/usb_intf.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/drivers/staging/rtl8812au/os_dep/linux/usb_intf.c b/drivers/staging/rtl8812au/os_dep/linux/usb_intf.c +index b319e58c5..2ef96b386 100644 +--- a/drivers/staging/rtl8812au/os_dep/linux/usb_intf.c ++++ b/drivers/staging/rtl8812au/os_dep/linux/usb_intf.c +@@ -1640,6 +1640,8 @@ static void __exit rtw_drv_halt(void) + rtw_mstat_dump(RTW_DBGDUMP); + } + ++MODULE_IMPORT_NS(VFS_internal_I_am_really_a_filesystem_and_am_NOT_a_driver); ++ + module_init(rtw_drv_entry); + module_exit(rtw_drv_halt); + +-- +2.41.0 + + +From 7e786378cc760e2e37d38669ba18488a1be5b139 Mon Sep 17 00:00:00 2001 +From: kimocoder +Date: Sun, 29 Oct 2023 16:29:30 +0100 +Subject: [PATCH 08/13] Add kernel v6.6 support + +--- + drivers/staging/rtl8812au/Makefile | 2 ++ + .../rtl8812au/os_dep/linux/ioctl_cfg80211.c | 19 ++++++++++++------- + .../rtl8812au/os_dep/linux/wifi_regd.c | 4 ++++ + 3 files changed, 18 insertions(+), 7 deletions(-) + +diff --git a/drivers/staging/rtl8812au/Makefile b/drivers/staging/rtl8812au/Makefile +index 127850786..ed3126ec3 100644 +--- a/drivers/staging/rtl8812au/Makefile ++++ b/drivers/staging/rtl8812au/Makefile +@@ -9,6 +9,8 @@ EXTRA_CFLAGS += -Wno-implicit-fallthrough + EXTRA_CFLAGS += -Wno-cast-function-type + #EXTRA_CFLAGS += -Wno-error=cast-function-type + #EXTRA_CFLAGS += -Wno-parentheses-equality ++EXTRA_CFLAGS += -Wno-error=incompatible-pointer-types ++EXTRA_CFLAGS += -Wno-stringop-overread + #EXTRA_CFLAGS += -Wno-pointer-bool-conversion + EXTRA_CFLAGS += -Wno-unknown-pragmas + #EXTRA_CFLAGS += -Wno-unused +diff --git a/drivers/staging/rtl8812au/os_dep/linux/ioctl_cfg80211.c b/drivers/staging/rtl8812au/os_dep/linux/ioctl_cfg80211.c +index 24cd0c540..af77f4c5d 100644 +--- a/drivers/staging/rtl8812au/os_dep/linux/ioctl_cfg80211.c ++++ b/drivers/staging/rtl8812au/os_dep/linux/ioctl_cfg80211.c +@@ -478,7 +478,7 @@ u8 rtw_cfg80211_ch_switch_notify(_adapter *adapter, u8 ch, u8 bw, u8 offset, + + #if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 3, 0)) + cfg80211_ch_switch_notify(adapter->pnetdev, &chdef, 0, 0); +-#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(5,19, 2)) ++#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 2)) + cfg80211_ch_switch_notify(adapter->pnetdev, &chdef, 0); + #else + cfg80211_ch_switch_notify(adapter->pnetdev, &chdef); +@@ -5267,10 +5267,10 @@ static int cfg80211_rtw_change_beacon(struct wiphy *wiphy, struct net_device *nd + return ret; + } + +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 2)) +-static int cfg80211_rtw_stop_ap(struct wiphy *wiphy, struct net_device *ndev, unsigned int link_id) +-#else ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 19, 2)) + static int cfg80211_rtw_stop_ap(struct wiphy *wiphy, struct net_device *ndev) ++#else ++static int cfg80211_rtw_stop_ap(struct wiphy *wiphy, struct net_device *ndev, unsigned int link_id) + #endif + { + _adapter *adapter = (_adapter *)rtw_netdev_priv(ndev); +@@ -7813,6 +7813,9 @@ static int cfg80211_rtw_tdls_mgmt(struct wiphy *wiphy, + const u8 *peer, + #else + u8 *peer, ++#endif ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 5, 0)) ++ int link_id, + #endif + u8 action_code, + u8 dialog_token, +@@ -10155,12 +10158,12 @@ static struct cfg80211_ops rtw_cfg80211_ops = { + .del_pmksa = cfg80211_rtw_del_pmksa, + .flush_pmksa = cfg80211_rtw_flush_pmksa, + +-#ifdef CONFIG_AP_MODE + #ifdef RTW_VIRTUAL_INT + .add_virtual_intf = cfg80211_rtw_add_virtual_intf, + .del_virtual_intf = cfg80211_rtw_del_virtual_intf, + #endif + ++#ifdef CONFIG_AP_MODE + #if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 4, 0)) && !defined(COMPAT_KERNEL_RELEASE) + .add_beacon = cfg80211_rtw_add_beacon, + .set_beacon = cfg80211_rtw_set_beacon, +@@ -10432,7 +10435,7 @@ void rtw_wdev_unregister(struct wireless_dev *wdev) + rtw_cfg80211_indicate_scan_done(adapter, _TRUE); + + #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 11, 0)) || defined(COMPAT_KERNEL_RELEASE) +- #if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 0, 0)) ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 2)) + if (wdev->links[0].client.current_bss) { + #elif (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 2)) + if (wdev->connected) { +@@ -10473,9 +10476,10 @@ int rtw_cfg80211_ndev_res_alloc(_adapter *adapter) + rtw_wiphy_free(wiphy); + adapter->wiphy = NULL; + } +-#endif + + exit: ++#endif ++ + return ret; + } + +@@ -10489,6 +10493,7 @@ void rtw_cfg80211_ndev_res_free(_adapter *adapter) + #endif + } + ++ + int rtw_cfg80211_ndev_res_register(_adapter *adapter) + { + int ret = _FAIL; +diff --git a/drivers/staging/rtl8812au/os_dep/linux/wifi_regd.c b/drivers/staging/rtl8812au/os_dep/linux/wifi_regd.c +index 5f2f90506..a36b7dcd0 100644 +--- a/drivers/staging/rtl8812au/os_dep/linux/wifi_regd.c ++++ b/drivers/staging/rtl8812au/os_dep/linux/wifi_regd.c +@@ -396,6 +396,10 @@ static void _rtw_regd_init_wiphy(struct rtw_regulatory *reg, struct wiphy *wiphy + wiphy->regulatory_flags &= ~REGULATORY_DISABLE_BEACON_HINTS; + #endif + ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 19, 0)) && (LINUX_VERSION_CODE < KERNEL_VERSION(6, 5, 0)) ++ wiphy->regulatory_flags |= REGULATORY_IGNORE_STALE_KICKOFF; ++#endif ++ + regd = _rtw_regdomain_select(reg); + wiphy_apply_custom_regulatory(wiphy, regd); + +-- +2.41.0 + + +From 5e3274cbffe62f0baf4bd39a36af7edd3d359e37 Mon Sep 17 00:00:00 2001 +From: Christian Sarre +Date: Tue, 31 Oct 2023 21:04:54 +0200 +Subject: [PATCH 09/13] Fix build on 6.x kernels. + +It was broken due to kernel changes backported from 6.5 (torvalds/linux@e8c2af6). +Changes have been tested on the following configurations and observed to build: + - Debian Bullseye, kernel 6.1.38-4 (bullseye-backports) + - Debian Bookworm, kernel 6.1.52-1 + - Ubuntu 23.04 Lunar, kernel 6.2.0-36 + +There are also other kernel versions which are affected up to some point in their history, +but there were a few reasons I ended up not including them: + - Kernel 6.2: Not in use on Debian, likely skipped in favor of 6.4+. Ubuntu though has backported the change to 6.2 on Lunar. + - Kernel 6.3: Not in use on Debian/Ubuntu, seems to have been skipped in favor of 6.4/6.5+. + - Kernel 6.4: Not in use on Ubuntu. Debian Bookworm has this available in backports, but they now also offer 6.5 which does not have the issue. + +In case someone tries to build this module running kernel 6.2 on something other than Ubuntu, this fix is most likely necessary. +--- + drivers/staging/rtl8812au/os_dep/linux/wifi_regd.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/staging/rtl8812au/os_dep/linux/wifi_regd.c b/drivers/staging/rtl8812au/os_dep/linux/wifi_regd.c +index a36b7dcd0..2f642f4c4 100644 +--- a/drivers/staging/rtl8812au/os_dep/linux/wifi_regd.c ++++ b/drivers/staging/rtl8812au/os_dep/linux/wifi_regd.c +@@ -396,7 +396,7 @@ static void _rtw_regd_init_wiphy(struct rtw_regulatory *reg, struct wiphy *wiphy + wiphy->regulatory_flags &= ~REGULATORY_DISABLE_BEACON_HINTS; + #endif + +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 19, 0)) && (LINUX_VERSION_CODE < KERNEL_VERSION(6, 5, 0)) ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 19, 0)) && (LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 39)) + wiphy->regulatory_flags |= REGULATORY_IGNORE_STALE_KICKOFF; + #endif + +-- +2.41.0 + + +From 517a6f38648501a02c97cac3ddc3be8e61843cd4 Mon Sep 17 00:00:00 2001 +From: Christian Sarre +Date: Wed, 1 Nov 2023 09:49:57 +0200 +Subject: [PATCH 10/13] Fix build on Ubuntu 23.04 (kernel 6.2). + +This is done by specifying the ranges for 6.3 and 6.4 versions which need the fix. +Kernel 6.2, to my knowledge, is not used in other popular distros than Ubuntu. + +Ubuntu had backported the change from kernel 6.5 to 6.2, which is why this is needed. + +Added a comment instructing what to do if one wants to build the module +running kernel 6.2 on something else than Ubuntu. +--- + drivers/staging/rtl8812au/os_dep/linux/wifi_regd.c | 10 +++++++++- + 1 file changed, 9 insertions(+), 1 deletion(-) + +diff --git a/drivers/staging/rtl8812au/os_dep/linux/wifi_regd.c b/drivers/staging/rtl8812au/os_dep/linux/wifi_regd.c +index 2f642f4c4..45c5bd1a9 100644 +--- a/drivers/staging/rtl8812au/os_dep/linux/wifi_regd.c ++++ b/drivers/staging/rtl8812au/os_dep/linux/wifi_regd.c +@@ -396,7 +396,15 @@ static void _rtw_regd_init_wiphy(struct rtw_regulatory *reg, struct wiphy *wiphy + wiphy->regulatory_flags &= ~REGULATORY_DISABLE_BEACON_HINTS; + #endif + +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 19, 0)) && (LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 39)) ++/* ++ * Ubuntu backported a specific upstream change to kernel 6.2 while others skipped 6.2 altogether. ++ * If build fails on kernel 6.2.x and you're not using Ubuntu, ++ * try changing the version "(6, 3, 0)" below to "(6, 2, 0)". ++ */ ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 19, 0)) && (LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 39)) \ ++ || (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 3, 0)) && (LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 13)) \ ++ || (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 4, 0)) && (LINUX_VERSION_CODE < KERNEL_VERSION(6, 4, 4)) + wiphy->regulatory_flags |= REGULATORY_IGNORE_STALE_KICKOFF; + #endif + +-- +2.41.0 + + +From e6da86ee01805bb64cf2db498767984b90d79877 Mon Sep 17 00:00:00 2001 +From: Ben Hutchings +Date: Thu, 2 Nov 2023 20:36:13 +0100 +Subject: [PATCH 11/13] ioctl_cfg80211: Add support for standard RSSI + notifications + +Currently background scanning with wpa_supplicant does not work very +well because rtl8812au does not notify it about changes to RSSI. To +fix this: + +* Implement the cfg80211_ops::set_cqm_rssi_config operation to set the + parameters for RSSI notifications. +* Add a rtw_cfg80211_cqm_rssi_update() function that calls + cfg80211_cqm_rssi_notify() if the RSSI has changed significantly + (based on those parameters). +* When connected in infrastructure mode, call + rtw_cfg80211_cqm_rssi_update() after processing a beacon and + updating the RSSI. + +Signed-off-by: Ben Hutchings +--- + drivers/staging/rtl8812au/core/rtw_mlme_ext.c | 6 +++ + .../rtl8812au/os_dep/linux/ioctl_cfg80211.c | 42 +++++++++++++++++++ + .../rtl8812au/os_dep/linux/ioctl_cfg80211.h | 7 ++++ + 3 files changed, 55 insertions(+) + +diff --git a/drivers/staging/rtl8812au/core/rtw_mlme_ext.c b/drivers/staging/rtl8812au/core/rtw_mlme_ext.c +index 57e7536c0..527e06dd5 100644 +--- a/drivers/staging/rtl8812au/core/rtw_mlme_ext.c ++++ b/drivers/staging/rtl8812au/core/rtw_mlme_ext.c +@@ -1971,6 +1971,12 @@ unsigned int OnBeacon(_adapter *padapter, union recv_frame *precv_frame) + #if 0 /* move to validate_recv_mgnt_frame */ + psta->sta_stats.rx_mgnt_pkts++; + #endif ++ ++#if defined(CONFIG_IOCTL_CFG80211) ++ rtw_cfg80211_cqm_rssi_update( ++ padapter, ++ pmlmepriv->cur_network_scanned->network.Rssi); ++#endif + } + + } else if ((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE) { +diff --git a/drivers/staging/rtl8812au/os_dep/linux/ioctl_cfg80211.c b/drivers/staging/rtl8812au/os_dep/linux/ioctl_cfg80211.c +index af77f4c5d..8dd6ea924 100644 +--- a/drivers/staging/rtl8812au/os_dep/linux/ioctl_cfg80211.c ++++ b/drivers/staging/rtl8812au/os_dep/linux/ioctl_cfg80211.c +@@ -4476,6 +4476,47 @@ static int cfg80211_rtw_flush_pmksa(struct wiphy *wiphy, + return 0; + } + ++static int cfg80211_rtw_set_cqm_rssi_config(struct wiphy *wiphy, ++ struct net_device *ndev, ++ s32 rssi_thold, u32 rssi_hyst) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); ++ struct rtw_wdev_priv *priv = adapter_wdev_data(padapter); ++ ++ priv->cqm_rssi_thold = rssi_thold; ++ priv->cqm_rssi_hyst = rssi_hyst; ++ priv->cqm_rssi_last = 0; ++ ++ return 0; ++} ++ ++void rtw_cfg80211_cqm_rssi_update(_adapter *padapter, s32 rssi) ++{ ++ struct rtw_wdev_priv *priv = adapter_wdev_data(padapter); ++ enum nl80211_cqm_rssi_threshold_event event; ++ ++ if (priv->cqm_rssi_thold == 0) ++ return; ++ ++ if (rssi < priv->cqm_rssi_thold && ++ (priv->cqm_rssi_last == 0 || ++ rssi < priv->cqm_rssi_last - priv->cqm_rssi_hyst)) ++ event = NL80211_CQM_RSSI_THRESHOLD_EVENT_LOW; ++ else if (rssi > priv->cqm_rssi_thold && ++ (priv->cqm_rssi_last == 0 || ++ rssi > priv->cqm_rssi_last + priv->cqm_rssi_hyst)) ++ event = NL80211_CQM_RSSI_THRESHOLD_EVENT_HIGH; ++ else ++ return; ++ ++ priv->cqm_rssi_last = rssi; ++ cfg80211_cqm_rssi_notify(padapter->pnetdev, event, ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,11,0) ++ rssi, ++#endif ++ GFP_ATOMIC); ++} ++ + #ifdef CONFIG_AP_MODE + void rtw_cfg80211_indicate_sta_assoc(_adapter *padapter, u8 *pmgmt_frame, uint frame_len) + { +@@ -10157,6 +10198,7 @@ static struct cfg80211_ops rtw_cfg80211_ops = { + .set_pmksa = cfg80211_rtw_set_pmksa, + .del_pmksa = cfg80211_rtw_del_pmksa, + .flush_pmksa = cfg80211_rtw_flush_pmksa, ++ .set_cqm_rssi_config = cfg80211_rtw_set_cqm_rssi_config, + + #ifdef RTW_VIRTUAL_INT + .add_virtual_intf = cfg80211_rtw_add_virtual_intf, +diff --git a/drivers/staging/rtl8812au/os_dep/linux/ioctl_cfg80211.h b/drivers/staging/rtl8812au/os_dep/linux/ioctl_cfg80211.h +index e7dd8050e..d40a36e64 100644 +--- a/drivers/staging/rtl8812au/os_dep/linux/ioctl_cfg80211.h ++++ b/drivers/staging/rtl8812au/os_dep/linux/ioctl_cfg80211.h +@@ -185,6 +185,11 @@ struct rtw_wdev_priv { + u16 pno_scan_seq_num; + #endif + ++ /* Standard RSSI notification parameters */ ++ s32 cqm_rssi_thold; ++ u32 cqm_rssi_hyst; ++ s32 cqm_rssi_last; ++ + #ifdef CONFIG_RTW_CFGVEDNOR_RSSIMONITOR + s8 rssi_monitor_max; + s8 rssi_monitor_min; +@@ -351,6 +356,8 @@ void rtw_cfg80211_init_rfkill(struct wiphy *wiphy); + void rtw_cfg80211_deinit_rfkill(struct wiphy *wiphy); + #endif + ++void rtw_cfg80211_cqm_rssi_update(_adapter *padapter, s32 rssi); ++ + #if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 4, 0)) && !defined(COMPAT_KERNEL_RELEASE) + #define rtw_cfg80211_rx_mgmt(wdev, freq, sig_dbm, buf, len, gfp) cfg80211_rx_mgmt(wdev_to_ndev(wdev), freq, buf, len, gfp) + #elif (LINUX_VERSION_CODE < KERNEL_VERSION(3, 6, 0)) +-- +2.41.0 + + +From 18ed5cbdfc47c7021a42277f4c2c89eefd8886c2 Mon Sep 17 00:00:00 2001 +From: Ben Hutchings +Date: Tue, 7 Nov 2023 17:09:16 +0100 +Subject: [PATCH 12/13] Make use of MODULE_IMPORT_NS conditional + +Commit 8954f2b8d8a06db44bef9a1318f6e1cdb001b98d added an unconditional: + + MODULE_IMPORT_NS(VFS_internal_I_am_really_a_filesystem_and_am_NOT_a_driver); + +For compatibility with old kernel versions, guard this declaration +with #ifdef MODULE_IMPORT_NS. + +This specific symbol namespace is also Android-specific, so the +declaration should also be conditional on building for Android, but +there doesn't seem to be a single preprocessor symbol that indicates +that. + +Signed-off-by: Ben Hutchings +--- + drivers/staging/rtl8812au/os_dep/linux/usb_intf.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/drivers/staging/rtl8812au/os_dep/linux/usb_intf.c b/drivers/staging/rtl8812au/os_dep/linux/usb_intf.c +index 2ef96b386..be0f654f0 100644 +--- a/drivers/staging/rtl8812au/os_dep/linux/usb_intf.c ++++ b/drivers/staging/rtl8812au/os_dep/linux/usb_intf.c +@@ -1640,7 +1640,9 @@ static void __exit rtw_drv_halt(void) + rtw_mstat_dump(RTW_DBGDUMP); + } + ++#ifdef MODULE_IMPORT_NS + MODULE_IMPORT_NS(VFS_internal_I_am_really_a_filesystem_and_am_NOT_a_driver); ++#endif + + module_init(rtw_drv_entry); + module_exit(rtw_drv_halt); +-- +2.41.0 + + +From cc61eb8dd2bf753e5c70ea91414c299a6acdf665 Mon Sep 17 00:00:00 2001 +From: Ben Hutchings +Date: Tue, 7 Nov 2023 18:12:18 +0100 +Subject: [PATCH 13/13] Fix eth_hw_addr_set() definition for compatibility with + stable branches + +eth_hw_addr_set() was added in Linux 5.15 but has now been backported +to 4.19.291, 5.4.251, and 5.10.188. This currently results in build +failure for these stable branches. + +There's no simple way to test for the addition of this function since +LINUX_VERSION_CODE limits version components to 255. + +Work around this by defining an inline function rtw_eth_hw_addr_set() +and a macro eth_hw_addr_set(). This effectively shadows any +backported definition of the eth_hw_addr_set() function without any +conflict. + +Signed-off-by: Ben Hutchings +--- + drivers/staging/rtl8812au/include/drv_types_linux.h | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/drivers/staging/rtl8812au/include/drv_types_linux.h b/drivers/staging/rtl8812au/include/drv_types_linux.h +index 6264a4d30..56435c855 100644 +--- a/drivers/staging/rtl8812au/include/drv_types_linux.h ++++ b/drivers/staging/rtl8812au/include/drv_types_linux.h +@@ -17,10 +17,11 @@ + + #if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 15, 0)) + /* Porting from linux kernel v5.15 48eab831ae8b9f7002a533fa4235eed63ea1f1a3 3f6cffb8604b537e3d7ea040d7f4368689638eaf*/ +-static inline void eth_hw_addr_set(struct net_device *dev, const u8 *addr) ++static inline void rtw_eth_hw_addr_set(struct net_device *dev, const u8 *addr) + { + memcpy(dev->dev_addr, addr, ETH_ALEN); + } ++#define eth_hw_addr_set rtw_eth_hw_addr_set + #endif + + #endif +-- +2.41.0 + diff --git a/kernel/tools/cpupowertools/files/patches/mageia/staging-rtl8812au-Kconfig-Makefile.patch b/kernel/tools/cpupowertools/files/patches/mageia/staging-rtl8812au-Kconfig-Makefile.patch new file mode 100644 index 00000000..be0c79d0 --- /dev/null +++ b/kernel/tools/cpupowertools/files/patches/mageia/staging-rtl8812au-Kconfig-Makefile.patch @@ -0,0 +1,33 @@ + +Hook up to module buildsystem. + +Signed-off-by: Thomas Backlund + +--- + drivers/staging/Kconfig | 2 ++ + drivers/staging/Makefile | 1 + + 2 files changed, 3 insertions(+) + +diff -Nurp linux-6.3/drivers/staging/Kconfig linux-6.3.rtl/drivers/staging/Kconfig +--- linux-6.3/drivers/staging/Kconfig 2023-04-23 22:02:52.000000000 +0300 ++++ linux-6.3.rtl/drivers/staging/Kconfig 2023-04-24 20:35:51.404482116 +0300 +@@ -36,6 +36,8 @@ source "drivers/staging/rtl8723bs/Kconfi + + source "drivers/staging/rtl8712/Kconfig" + ++source "drivers/staging/rtl8812au/Kconfig" ++ + source "drivers/staging/rts5208/Kconfig" + + source "drivers/staging/octeon/Kconfig" +diff -Nurp linux-6.3/drivers/staging/Makefile linux-6.3.rtl/drivers/staging/Makefile +--- linux-6.3/drivers/staging/Makefile 2023-04-23 22:02:52.000000000 +0300 ++++ linux-6.3.rtl/drivers/staging/Makefile 2023-04-24 20:36:34.117485089 +0300 +@@ -8,6 +8,7 @@ obj-$(CONFIG_RTL8192U) += rtl8192u/ + obj-$(CONFIG_RTL8192E) += rtl8192e/ + obj-$(CONFIG_RTL8723BS) += rtl8723bs/ + obj-$(CONFIG_R8712U) += rtl8712/ ++obj-$(CONFIG_RTL8812AU) += rtl8812au/ + obj-$(CONFIG_RTS5208) += rts5208/ + obj-$(CONFIG_OCTEON_ETHERNET) += octeon/ + obj-$(CONFIG_VT6655) += vt6655/ diff --git a/kernel/tools/cpupowertools/files/patches/mageia/staging-rtl8812au-rename.patch b/kernel/tools/cpupowertools/files/patches/mageia/staging-rtl8812au-rename.patch new file mode 100644 index 00000000..8eb29f2b --- /dev/null +++ b/kernel/tools/cpupowertools/files/patches/mageia/staging-rtl8812au-rename.patch @@ -0,0 +1,78 @@ + +Adjust driver bits so it keeps the name of the replaced driver + +Signed-off-by: Thomas Backlund + +--- + drivers/staging/rtl8812au/Kconfig | 7 +++---- + drivers/staging/rtl8812au/Makefile | 8 ++++---- + drivers/staging/rtl8812au/hal/hal_com.c | 2 +- + drivers/staging/rtl8812au/os_dep/linux/ioctl_cfg80211.c | 2 +- + 4 files changed, 9 insertions(+), 10 deletions(-) + +diff -Nurp linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/hal_com.c linux-6.3.4-rtl8812au-rename/drivers/staging/rtl8812au/hal/hal_com.c +--- linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/hal_com.c 2023-05-26 22:35:36.543136899 +0300 ++++ linux-6.3.4-rtl8812au-rename/drivers/staging/rtl8812au/hal/hal_com.c 2023-05-26 22:45:07.045079148 +0300 +@@ -12719,7 +12719,7 @@ bypass_hw_pg: + _rtw_memset(hal_data->EEPROMMACAddr, 0, ETH_ALEN); + ret = _FAIL; + exit: +- dev_info(&udev->dev, "88XXau %pM hw_info[%02x]", hw_addr, addr_offset); ++ dev_info(&udev->dev, "8812au %pM hw_info[%02x]", hw_addr, addr_offset); + return ret; + } + +diff -Nurp linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/Kconfig linux-6.3.4-rtl8812au-rename/drivers/staging/rtl8812au/Kconfig +--- linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/Kconfig 2022-01-28 22:59:35.486648197 +0200 ++++ linux-6.3.4-rtl8812au-rename/drivers/staging/rtl8812au/Kconfig 2023-05-26 22:45:07.045079148 +0300 +@@ -1,6 +1,5 @@ +-config 88XXAU +- tristate "Realtek 88XXau USB WiFi" ++config RTL8812AU ++ tristate "Realtek 8812au USB WiFi" + depends on USB + help +- Help message of 88XXau +- ++ Help message of 8812au +diff -Nurp linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/Makefile linux-6.3.4-rtl8812au-rename/drivers/staging/rtl8812au/Makefile +--- linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/Makefile 2023-05-26 22:35:36.539136900 +0300 ++++ linux-6.3.4-rtl8812au-rename/drivers/staging/rtl8812au/Makefile 2023-05-26 22:45:07.045079148 +0300 +@@ -185,9 +185,9 @@ endif + + ifeq ($(CONFIG_RTL8812A)_$(CONFIG_RTL8821A)_$(CONFIG_RTL8814A), y_y_y) + +-EXTRA_CFLAGS += -DDRV_NAME=\"rtl88XXau\" ++EXTRA_CFLAGS += -DDRV_NAME=\"rtl8812au\" + ifeq ($(CONFIG_USB_HCI), y) +-USER_MODULE_NAME = 88XXau ++USER_MODULE_NAME = 8812au + endif + else + EXTRA_CFLAGS += -DDRV_NAME=\"rtl8812au\" +@@ -1712,11 +1712,11 @@ $(MODULE_NAME)-y += $(_PLATFORM_FILES) + + $(MODULE_NAME)-$(CONFIG_MP_INCLUDED) += core/rtw_mp.o + +-obj-$(CONFIG_88XXAU) := $(MODULE_NAME).o ++obj-$(CONFIG_RTL8812AU) := $(MODULE_NAME).o + + else + +-export CONFIG_88XXAU = m ++export CONFIG_RTL8812AU = m + + all: modules + +diff -Nurp linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/os_dep/linux/ioctl_cfg80211.c linux-6.3.4-rtl8812au-rename/drivers/staging/rtl8812au/os_dep/linux/ioctl_cfg80211.c +--- linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/os_dep/linux/ioctl_cfg80211.c 2023-05-26 22:35:36.547136899 +0300 ++++ linux-6.3.4-rtl8812au-rename/drivers/staging/rtl8812au/os_dep/linux/ioctl_cfg80211.c 2023-05-26 22:45:07.046079148 +0300 +@@ -2682,7 +2682,7 @@ void rtw_cfg80211_unlink_bss(_adapter *p + #endif + + if (!wiphy) { +- pr_info("88XXAU: rtw_cfg80211_unlink_bss: wiphy is NULL\n"); ++ pr_info("8812AU: rtw_cfg80211_unlink_bss: wiphy is NULL\n"); + return; + } + diff --git a/kernel/tools/cpupowertools/files/patches/mageia/3rd-rtl8812au.patch b/kernel/tools/cpupowertools/files/patches/mageia/staging-rtl8812au.patch similarity index 95% rename from kernel/tools/cpupowertools/files/patches/mageia/3rd-rtl8812au.patch rename to kernel/tools/cpupowertools/files/patches/mageia/staging-rtl8812au.patch index 891f72c5..c7c7c0e1 100644 --- a/kernel/tools/cpupowertools/files/patches/mageia/3rd-rtl8812au.patch +++ b/kernel/tools/cpupowertools/files/patches/mageia/staging-rtl8812au.patch @@ -1,7 +1,509 @@ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/efuse/rtw_efuse.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/efuse/rtw_efuse.c ---- linux-5.11.4/3rdparty/rtl8812au/core/efuse/rtw_efuse.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/efuse/rtw_efuse.c 2021-03-07 18:16:17.015954210 +0200 -@@ -0,0 +1,3278 @@ + +Cloned from: https://github.com/aircrack-ng/rtl8812au + +Topmost commit: + +commit b3227c731ec957b706f8eb2ebcf42ba1c2f0d610 (HEAD -> v5.6.4.2, origin/v5.6.4.2, origin/HEAD) +Author: kimocoder +Date: Fri May 26 06:36:51 2023 +0200 + + Some cleanup of unused chips + +--- + drivers/staging/rtl8812au/Kconfig | 6 + drivers/staging/rtl8812au/Makefile | 1819 +++++++++++ + drivers/staging/rtl8812au/core/efuse/rtw_efuse.c | 3279 +++++++++++++++++++ + drivers/staging/rtl8812au/core/mesh/rtw_mesh.c | 4080 ++++++++++++++++++++++++ + drivers/staging/rtl8812au/core/mesh/rtw_mesh.h | 534 +++ + drivers/staging/rtl8812au/core/mesh/rtw_mesh_hwmp.c | 1665 ++++++++++ + drivers/staging/rtl8812au/core/mesh/rtw_mesh_hwmp.h | 60 + drivers/staging/rtl8812au/core/mesh/rtw_mesh_pathtbl.c | 1237 +++++++ + drivers/staging/rtl8812au/core/mesh/rtw_mesh_pathtbl.h | 208 + + drivers/staging/rtl8812au/core/rtw_ap.c | 5478 +++++++++++++++++++++++++++++++++ + drivers/staging/rtl8812au/core/rtw_beamforming.c | 3155 +++++++++++++++++++ + drivers/staging/rtl8812au/core/rtw_br_ext.c | 1393 ++++++++ + drivers/staging/rtl8812au/core/rtw_bt_mp.c | 1575 +++++++++ + drivers/staging/rtl8812au/core/rtw_btcoex.c | 1767 ++++++++++ + drivers/staging/rtl8812au/core/rtw_btcoex_wifionly.c | 47 + drivers/staging/rtl8812au/core/rtw_chplan.c | 1193 +++++++ + drivers/staging/rtl8812au/core/rtw_chplan.h | 181 + + drivers/staging/rtl8812au/core/rtw_cmd.c | 5726 ++++++++++++++++++++++++++++++++++ + drivers/staging/rtl8812au/core/rtw_debug.c | 7096 +++++++++++++++++++++++++++++++++++++++++++ + drivers/staging/rtl8812au/core/rtw_eeprom.c | 369 ++ + drivers/staging/rtl8812au/core/rtw_ieee80211.c | 2896 +++++++++++++++++ + drivers/staging/rtl8812au/core/rtw_io.c | 899 +++++ + drivers/staging/rtl8812au/core/rtw_ioctl_query.c | 19 + drivers/staging/rtl8812au/core/rtw_ioctl_rtl.c | 901 +++++ + drivers/staging/rtl8812au/core/rtw_ioctl_set.c | 853 +++++ + drivers/staging/rtl8812au/core/rtw_iol.c | 394 ++ + drivers/staging/rtl8812au/core/rtw_mem.c | 128 + drivers/staging/rtl8812au/core/rtw_mi.c | 1571 +++++++++ + drivers/staging/rtl8812au/core/rtw_mlme.c | 5358 ++++++++++++++++++++++++++++++++ + drivers/staging/rtl8812au/core/rtw_mlme_ext.c |16825 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + drivers/staging/rtl8812au/core/rtw_mp.c | 3871 +++++++++++++++++++++++ + drivers/staging/rtl8812au/core/rtw_mp_ioctl.c | 2382 ++++++++++++++ + drivers/staging/rtl8812au/core/rtw_odm.c | 420 ++ + drivers/staging/rtl8812au/core/rtw_p2p.c | 5456 +++++++++++++++++++++++++++++++++ + drivers/staging/rtl8812au/core/rtw_pwrctrl.c | 2761 ++++++++++++++++ + drivers/staging/rtl8812au/core/rtw_recv.c | 5125 +++++++++++++++++++++++++++++++ + drivers/staging/rtl8812au/core/rtw_rf.c | 1395 ++++++++ + drivers/staging/rtl8812au/core/rtw_rm.c | 2470 +++++++++++++++ + drivers/staging/rtl8812au/core/rtw_rm_fsm.c | 998 ++++++ + drivers/staging/rtl8812au/core/rtw_rson.c | 595 +++ + drivers/staging/rtl8812au/core/rtw_sdio.c | 130 + drivers/staging/rtl8812au/core/rtw_security.c | 3122 ++++++++++++++++++ + drivers/staging/rtl8812au/core/rtw_sreset.c | 314 + + drivers/staging/rtl8812au/core/rtw_sta_mgt.c | 1319 ++++++++ + drivers/staging/rtl8812au/core/rtw_tdls.c | 3505 +++++++++++++++++++++ + drivers/staging/rtl8812au/core/rtw_vht.c | 1135 ++++++ + drivers/staging/rtl8812au/core/rtw_wapi.c | 1312 +++++++ + drivers/staging/rtl8812au/core/rtw_wapi_sms4.c | 922 +++++ + drivers/staging/rtl8812au/core/rtw_wlan_util.c | 4973 ++++++++++++++++++++++++++++++ + drivers/staging/rtl8812au/core/rtw_xmit.c | 6097 +++++++++++++++++++++++++++++++++++++ + drivers/staging/rtl8812au/hal/HalPwrSeqCmd.c | 185 + + drivers/staging/rtl8812au/hal/efuse/efuse_mask.h | 164 + drivers/staging/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8812A_PCIE.c | 94 + drivers/staging/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8812A_PCIE.h | 33 + drivers/staging/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8812A_USB.c | 94 + drivers/staging/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8812A_USB.h | 34 + drivers/staging/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_PCIE.c | 93 + drivers/staging/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_PCIE.h | 33 + drivers/staging/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_SDIO.c | 96 + drivers/staging/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_SDIO.h | 31 + drivers/staging/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_USB.c | 95 + drivers/staging/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_USB.h | 31 + drivers/staging/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_PCIE.c | 93 + drivers/staging/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_PCIE.h | 33 + drivers/staging/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_USB.c | 90 + drivers/staging/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_USB.h | 33 + drivers/staging/rtl8812au/hal/hal_btcoex.c | 5706 ++++++++++++++++++++++++++++++++++ + drivers/staging/rtl8812au/hal/hal_btcoex_wifionly.c | 224 + + drivers/staging/rtl8812au/hal/hal_com.c |14360 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + drivers/staging/rtl8812au/hal/hal_com_c2h.h | 123 + drivers/staging/rtl8812au/hal/hal_com_phycfg.c | 5408 ++++++++++++++++++++++++++++++++ + drivers/staging/rtl8812au/hal/hal_dm.c | 1616 +++++++++ + drivers/staging/rtl8812au/hal/hal_dm.h | 111 + drivers/staging/rtl8812au/hal/hal_dm_acs.c | 556 +++ + drivers/staging/rtl8812au/hal/hal_dm_acs.h | 167 + + drivers/staging/rtl8812au/hal/hal_halmac.c | 5555 +++++++++++++++++++++++++++++++++ + drivers/staging/rtl8812au/hal/hal_halmac.h | 245 + + drivers/staging/rtl8812au/hal/hal_hci/hal_usb.c | 564 +++ + drivers/staging/rtl8812au/hal/hal_intf.c | 1698 ++++++++++ + drivers/staging/rtl8812au/hal/hal_mcc.c | 3488 +++++++++++++++++++++ + drivers/staging/rtl8812au/hal/hal_mp.c | 2244 +++++++++++++ + drivers/staging/rtl8812au/hal/hal_phy.c | 257 + + drivers/staging/rtl8812au/hal/led/hal_led.c | 254 + + drivers/staging/rtl8812au/hal/led/hal_usb_led.c | 4291 ++++++++++++++++++++++++++ + drivers/staging/rtl8812au/hal/phydm/ap_makefile.mk | 188 + + drivers/staging/rtl8812au/hal/phydm/halhwimg.h | 96 + drivers/staging/rtl8812au/hal/phydm/halrf/halphyrf_ap.c | 1359 ++++++++ + drivers/staging/rtl8812au/hal/phydm/halrf/halphyrf_ap.h | 139 + drivers/staging/rtl8812au/hal/phydm/halrf/halphyrf_ce.c | 920 +++++ + drivers/staging/rtl8812au/hal/phydm/halrf/halphyrf_ce.h | 114 + drivers/staging/rtl8812au/hal/phydm/halrf/halphyrf_iot.c | 528 +++ + drivers/staging/rtl8812au/hal/phydm/halrf/halphyrf_iot.h | 124 + drivers/staging/rtl8812au/hal/phydm/halrf/halphyrf_win.c | 841 +++++ + drivers/staging/rtl8812au/hal/phydm/halrf/halphyrf_win.h | 125 + drivers/staging/rtl8812au/hal/phydm/halrf/halrf.c | 2395 ++++++++++++++ + drivers/staging/rtl8812au/hal/phydm/halrf/halrf.h | 573 +++ + drivers/staging/rtl8812au/hal/phydm/halrf/halrf_debug.c | 267 + + drivers/staging/rtl8812au/hal/phydm/halrf/halrf_debug.h | 123 + drivers/staging/rtl8812au/hal/phydm/halrf/halrf_dpk.h | 86 + drivers/staging/rtl8812au/hal/phydm/halrf/halrf_features.h | 43 + drivers/staging/rtl8812au/hal/phydm/halrf/halrf_iqk.h | 103 + drivers/staging/rtl8812au/hal/phydm/halrf/halrf_kfree.c | 1191 +++++++ + drivers/staging/rtl8812au/hal/phydm/halrf/halrf_kfree.h | 119 + drivers/staging/rtl8812au/hal/phydm/halrf/halrf_powertracking.c | 152 + drivers/staging/rtl8812au/hal/phydm/halrf/halrf_powertracking.h | 41 + drivers/staging/rtl8812au/hal/phydm/halrf/halrf_powertracking_ap.c | 1220 +++++++ + drivers/staging/rtl8812au/hal/phydm/halrf/halrf_powertracking_ap.h | 398 ++ + drivers/staging/rtl8812au/hal/phydm/halrf/halrf_powertracking_ce.c | 869 +++++ + drivers/staging/rtl8812au/hal/phydm/halrf/halrf_powertracking_ce.h | 327 + + drivers/staging/rtl8812au/hal/phydm/halrf/halrf_powertracking_iot.c | 741 ++++ + drivers/staging/rtl8812au/hal/phydm/halrf/halrf_powertracking_iot.h | 349 ++ + drivers/staging/rtl8812au/hal/phydm/halrf/halrf_powertracking_win.c | 861 +++++ + drivers/staging/rtl8812au/hal/phydm/halrf/halrf_powertracking_win.h | 302 + + drivers/staging/rtl8812au/hal/phydm/halrf/halrf_psd.c | 428 ++ + drivers/staging/rtl8812au/hal/phydm/halrf/halrf_psd.h | 52 + drivers/staging/rtl8812au/hal/phydm/halrf/halrf_txgapcal.c | 300 + + drivers/staging/rtl8812au/hal/phydm/halrf/halrf_txgapcal.h | 31 + drivers/staging/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_ap.c | 2169 +++++++++++++ + drivers/staging/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_ap.h | 82 + drivers/staging/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_ce.c | 1975 +++++++++++ + drivers/staging/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_ce.h | 63 + drivers/staging/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_win.c | 2881 +++++++++++++++++ + drivers/staging/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_win.h | 99 + drivers/staging/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ap.c | 1742 ++++++++++ + drivers/staging/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ap.h | 164 + drivers/staging/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ce.c | 564 +++ + drivers/staging/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ce.h | 112 + drivers/staging/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_win.c | 528 +++ + drivers/staging/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_win.h | 106 + drivers/staging/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_iqk_8814a.c | 557 +++ + drivers/staging/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_iqk_8814a.h | 58 + drivers/staging/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_8821a_ce.c | 313 + + drivers/staging/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_8821a_ce.h | 53 + drivers/staging/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_8821a_win.c | 1046 ++++++ + drivers/staging/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_8821a_win.h | 72 + drivers/staging/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ap.c | 731 ++++ + drivers/staging/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ap.h | 42 + drivers/staging/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ce.c | 773 ++++ + drivers/staging/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ce.h | 41 + drivers/staging/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_win.c | 774 ++++ + drivers/staging/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_win.h | 42 + drivers/staging/rtl8812au/hal/phydm/mp_precomp.h | 24 + drivers/staging/rtl8812au/hal/phydm/phydm.c | 3265 +++++++++++++++++++ + drivers/staging/rtl8812au/hal/phydm/phydm.h | 1356 ++++++++ + drivers/staging/rtl8812au/hal/phydm/phydm.mk | 226 + + drivers/staging/rtl8812au/hal/phydm/phydm_adaptivity.c | 764 ++++ + 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drivers/staging/rtl8812au/include/rtw_sdio.h | 26 + drivers/staging/rtl8812au/include/rtw_security.h | 499 +++ + drivers/staging/rtl8812au/include/rtw_sreset.h | 66 + drivers/staging/rtl8812au/include/rtw_tdls.h | 185 + + drivers/staging/rtl8812au/include/rtw_version.h | 1 + drivers/staging/rtl8812au/include/rtw_vht.h | 176 + + drivers/staging/rtl8812au/include/rtw_wapi.h | 230 + + drivers/staging/rtl8812au/include/rtw_wifi_regd.h | 34 + drivers/staging/rtl8812au/include/rtw_xmit.h | 1045 ++++++ + drivers/staging/rtl8812au/include/sdio_hal.h | 57 + drivers/staging/rtl8812au/include/sdio_ops.h | 206 + + drivers/staging/rtl8812au/include/sdio_ops_linux.h | 58 + drivers/staging/rtl8812au/include/sdio_osintf.h | 18 + drivers/staging/rtl8812au/include/sta_info.h | 748 ++++ + drivers/staging/rtl8812au/include/usb_hal.h | 74 + drivers/staging/rtl8812au/include/usb_ops.h | 153 + drivers/staging/rtl8812au/include/usb_ops_linux.h | 98 + drivers/staging/rtl8812au/include/usb_osintf.h | 26 + drivers/staging/rtl8812au/include/usb_vendor_req.h | 56 + drivers/staging/rtl8812au/include/wifi.h | 1349 ++++++++ + drivers/staging/rtl8812au/include/wlan_bssdef.h | 655 +++ + drivers/staging/rtl8812au/include/xmit_osdep.h | 68 + drivers/staging/rtl8812au/os_dep/linux/custom_gpio_linux.c | 340 ++ + drivers/staging/rtl8812au/os_dep/linux/ioctl_cfg80211.c |10566 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + drivers/staging/rtl8812au/os_dep/linux/ioctl_cfg80211.h | 427 ++ + drivers/staging/rtl8812au/os_dep/linux/ioctl_linux.c |12823 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + drivers/staging/rtl8812au/os_dep/linux/ioctl_mp.c | 2591 +++++++++++++++ + drivers/staging/rtl8812au/os_dep/linux/mlme_linux.c | 436 ++ + drivers/staging/rtl8812au/os_dep/linux/os_intfs.c | 5188 +++++++++++++++++++++++++++++++ + drivers/staging/rtl8812au/os_dep/linux/recv_linux.c | 729 ++++ + drivers/staging/rtl8812au/os_dep/linux/rhashtable.c | 844 +++++ + drivers/staging/rtl8812au/os_dep/linux/rhashtable.h | 827 +++++ + drivers/staging/rtl8812au/os_dep/linux/rtw_android.c | 1304 +++++++ + drivers/staging/rtl8812au/os_dep/linux/rtw_proc.c | 4777 +++++++++++++++++++++++++++++ + drivers/staging/rtl8812au/os_dep/linux/rtw_proc.h | 63 + drivers/staging/rtl8812au/os_dep/linux/rtw_rhashtable.c | 74 + drivers/staging/rtl8812au/os_dep/linux/rtw_rhashtable.h | 55 + drivers/staging/rtl8812au/os_dep/linux/usb_intf.c | 1652 ++++++++++ + drivers/staging/rtl8812au/os_dep/linux/usb_ops_linux.c | 1135 ++++++ + drivers/staging/rtl8812au/os_dep/linux/wifi_regd.c | 437 ++ + drivers/staging/rtl8812au/os_dep/linux/xmit_linux.c | 567 +++ + drivers/staging/rtl8812au/os_dep/osdep_service.c | 2928 +++++++++++++++++ + drivers/staging/rtl8812au/platform/custom_country_chplan.h | 22 + drivers/staging/rtl8812au/platform/platform_ARM_SUN50IW1P1_sdio.c | 86 + drivers/staging/rtl8812au/platform/platform_ARM_SUNnI_sdio.c | 130 + drivers/staging/rtl8812au/platform/platform_ARM_SUNxI_sdio.c | 90 + drivers/staging/rtl8812au/platform/platform_ARM_SUNxI_usb.c | 136 + drivers/staging/rtl8812au/platform/platform_ARM_WMT_sdio.c | 46 + drivers/staging/rtl8812au/platform/platform_RTK_DMP_usb.c | 30 + drivers/staging/rtl8812au/platform/platform_aml_s905_sdio.c | 54 + drivers/staging/rtl8812au/platform/platform_aml_s905_sdio.h | 32 + drivers/staging/rtl8812au/platform/platform_arm_act_sdio.c | 53 + drivers/staging/rtl8812au/platform/platform_hisilicon_hi3798_sdio.c | 110 + drivers/staging/rtl8812au/platform/platform_hisilicon_hi3798_sdio.h | 28 + drivers/staging/rtl8812au/platform/platform_ops.c | 32 + drivers/staging/rtl8812au/platform/platform_ops.h | 26 + drivers/staging/rtl8812au/platform/platform_sprd_sdio.c | 84 + drivers/staging/rtl8812au/platform/platform_zte_zx296716_sdio.c | 53 + drivers/staging/rtl8812au/platform/platform_zte_zx296716_sdio.h | 25 + 488 files changed, 458937 insertions(+) + +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/core/efuse/rtw_efuse.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/efuse/rtw_efuse.c +--- linux-6.3.4/drivers/staging/rtl8812au/core/efuse/rtw_efuse.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/efuse/rtw_efuse.c 2022-01-28 22:59:35.551651278 +0200 +@@ -0,0 +1,3279 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. @@ -782,13 +1284,14 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/efuse/rtw_efuse.c linux-5.11.4-r + j = 0; + + for (i = 0; i < mapLen; i++) { -+ if (i % 16 == 0) ++ if (i % 16 == 0) { + RTW_PRINT_SEL(RTW_DBGDUMP, "0x%03x: ", i); + _RTW_PRINT_SEL(RTW_DBGDUMP, "%02X%s" + , pEfuseHal->fakeEfuseInitMap[i] + , ((i + 1) % 16 == 0) ? "\n" : (((i + 1) % 8 == 0) ? " " : " ") + ); + } ++ } + _RTW_PRINT_SEL(RTW_DBGDUMP, "\n"); + +out_free_buffer: @@ -3280,9 +3783,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/efuse/rtw_efuse.c linux-5.11.4-r +#endif /* CONFIG_EFUSE_CONFIG_FILE */ + +#endif /* PLATFORM_LINUX */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/mesh/rtw_mesh.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/mesh/rtw_mesh.c ---- linux-5.11.4/3rdparty/rtl8812au/core/mesh/rtw_mesh.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/mesh/rtw_mesh.c 2021-03-07 18:16:17.016954257 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/core/mesh/rtw_mesh.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/mesh/rtw_mesh.c +--- linux-6.3.4/drivers/staging/rtl8812au/core/mesh/rtw_mesh.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/mesh/rtw_mesh.c 2022-01-28 22:59:35.551651278 +0200 @@ -0,0 +1,4080 @@ +/****************************************************************************** + * @@ -7364,9 +7867,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/mesh/rtw_mesh.c linux-5.11.4-rtl +} +#endif /* CONFIG_RTW_MESH */ + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/mesh/rtw_mesh.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/mesh/rtw_mesh.h ---- linux-5.11.4/3rdparty/rtl8812au/core/mesh/rtw_mesh.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/mesh/rtw_mesh.h 2021-03-07 18:16:17.016954257 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/core/mesh/rtw_mesh.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/mesh/rtw_mesh.h +--- linux-6.3.4/drivers/staging/rtl8812au/core/mesh/rtw_mesh.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/mesh/rtw_mesh.h 2022-01-28 22:59:35.551651278 +0200 @@ -0,0 +1,534 @@ +/****************************************************************************** + * @@ -7902,9 +8405,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/mesh/rtw_mesh.h linux-5.11.4-rtl +#include "rtw_mesh_hwmp.h" +#endif /* __RTW_MESH_H_ */ + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/mesh/rtw_mesh_hwmp.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/mesh/rtw_mesh_hwmp.c ---- linux-5.11.4/3rdparty/rtl8812au/core/mesh/rtw_mesh_hwmp.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/mesh/rtw_mesh_hwmp.c 2021-03-07 18:16:17.016954257 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/core/mesh/rtw_mesh_hwmp.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/mesh/rtw_mesh_hwmp.c +--- linux-6.3.4/drivers/staging/rtl8812au/core/mesh/rtw_mesh_hwmp.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/mesh/rtw_mesh_hwmp.c 2022-01-28 22:59:35.551651278 +0200 @@ -0,0 +1,1665 @@ +/****************************************************************************** + * @@ -9571,9 +10074,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/mesh/rtw_mesh_hwmp.c linux-5.11. + +#endif /* CONFIG_RTW_MESH */ + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/mesh/rtw_mesh_hwmp.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/mesh/rtw_mesh_hwmp.h ---- linux-5.11.4/3rdparty/rtl8812au/core/mesh/rtw_mesh_hwmp.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/mesh/rtw_mesh_hwmp.h 2021-03-07 18:16:17.016954257 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/core/mesh/rtw_mesh_hwmp.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/mesh/rtw_mesh_hwmp.h +--- linux-6.3.4/drivers/staging/rtl8812au/core/mesh/rtw_mesh_hwmp.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/mesh/rtw_mesh_hwmp.h 2022-01-28 22:59:35.551651278 +0200 @@ -0,0 +1,60 @@ +/****************************************************************************** + * @@ -9635,9 +10138,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/mesh/rtw_mesh_hwmp.h linux-5.11. +#endif /* __RTW_MESH_HWMP_H_ */ + + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/mesh/rtw_mesh_pathtbl.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/mesh/rtw_mesh_pathtbl.c ---- linux-5.11.4/3rdparty/rtl8812au/core/mesh/rtw_mesh_pathtbl.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/mesh/rtw_mesh_pathtbl.c 2021-03-07 18:16:17.016954257 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/core/mesh/rtw_mesh_pathtbl.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/mesh/rtw_mesh_pathtbl.c +--- linux-6.3.4/drivers/staging/rtl8812au/core/mesh/rtw_mesh_pathtbl.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/mesh/rtw_mesh_pathtbl.c 2022-01-28 22:59:35.552651326 +0200 @@ -0,0 +1,1237 @@ +/****************************************************************************** + * @@ -10876,9 +11379,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/mesh/rtw_mesh_pathtbl.c linux-5. +} +#endif /* CONFIG_RTW_MESH */ + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/mesh/rtw_mesh_pathtbl.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/mesh/rtw_mesh_pathtbl.h ---- linux-5.11.4/3rdparty/rtl8812au/core/mesh/rtw_mesh_pathtbl.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/mesh/rtw_mesh_pathtbl.h 2021-03-07 18:16:17.016954257 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/core/mesh/rtw_mesh_pathtbl.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/mesh/rtw_mesh_pathtbl.h +--- linux-6.3.4/drivers/staging/rtl8812au/core/mesh/rtw_mesh_pathtbl.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/mesh/rtw_mesh_pathtbl.h 2022-01-28 22:59:35.552651326 +0200 @@ -0,0 +1,208 @@ +/****************************************************************************** + * @@ -11088,10 +11591,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/mesh/rtw_mesh_pathtbl.h linux-5. + +#endif /* __RTW_MESH_PATHTBL_H_ */ + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_ap.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_ap.c ---- linux-5.11.4/3rdparty/rtl8812au/core/rtw_ap.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_ap.c 2021-03-07 18:16:17.017954304 +0200 -@@ -0,0 +1,5476 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/core/rtw_ap.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_ap.c +--- linux-6.3.4/drivers/staging/rtl8812au/core/rtw_ap.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_ap.c 2022-01-28 22:59:35.552651326 +0200 +@@ -0,0 +1,5478 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. @@ -15601,12 +16104,14 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_ap.c linux-5.11.4-rtl8812au/ + RT_CHANNEL_INFO *chset = adapter_to_chset(adapter); + u8 ret = _SUCCESS; + ++ // ignore reg domain check ++#if 0 + if (rtw_chset_search_ch(chset, ch) < 0) { + RTW_WARN("%s ch:%u doesn't fit in chplan\n", caller, ch); + ret = _FAIL; + goto exit; + } -+ ++#endif + rtw_adjust_chbw(adapter, ch, bw, offset); + + if (!rtw_get_offset_by_chbw(ch, *bw, offset)) { @@ -16568,9 +17073,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_ap.c linux-5.11.4-rtl8812au/ +} +#endif /* CONFIG_AP_MODE */ + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_beamforming.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_beamforming.c ---- linux-5.11.4/3rdparty/rtl8812au/core/rtw_beamforming.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_beamforming.c 2021-03-07 18:16:17.017954304 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/core/rtw_beamforming.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_beamforming.c +--- linux-6.3.4/drivers/staging/rtl8812au/core/rtw_beamforming.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_beamforming.c 2022-01-28 22:59:35.552651326 +0200 @@ -0,0 +1,3155 @@ +/****************************************************************************** + * @@ -19727,10 +20232,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_beamforming.c linux-5.11.4-r +#endif /* !RTW_BEAMFORMING_VERSION_2 */ + +#endif /* CONFIG_BEAMFORMING */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_br_ext.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_br_ext.c ---- linux-5.11.4/3rdparty/rtl8812au/core/rtw_br_ext.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_br_ext.c 2021-03-07 18:16:17.017954304 +0200 -@@ -0,0 +1,1581 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/core/rtw_br_ext.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_br_ext.c +--- linux-6.3.4/drivers/staging/rtl8812au/core/rtw_br_ext.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_br_ext.c 2023-05-26 22:35:36.539136900 +0300 +@@ -0,0 +1,1393 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. @@ -19750,7 +20255,7 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_br_ext.c linux-5.11.4-rtl881 +#ifdef __KERNEL__ + #include + #include -+ #include ++ #include + #include + #include + #include @@ -19801,6 +20306,29 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_br_ext.c linux-5.11.4-rtl881 +#define MAGIC_CODE_LEN 2 +#define WAIT_TIME_PPPOE 5 /* waiting time for pppoe server in sec */ + ++#define IPX_NODE_LEN 6 ++struct ipx_address { ++ __be32 net; ++ __u8 node[IPX_NODE_LEN]; ++ __be16 sock; ++}; ++ ++struct ipxhdr { ++ __be16 ipx_checksum __packed; ++#define IPX_NO_CHECKSUM cpu_to_be16(0xFFFF) ++ __be16 ipx_pktsize __packed; ++ __u8 ipx_tctrl; ++ __u8 ipx_type; ++#define IPX_TYPE_UNKNOWN 0x00 ++#define IPX_TYPE_RIP 0x01 /* may also be 0 */ ++#define IPX_TYPE_SAP 0x04 /* may also be 0 */ ++#define IPX_TYPE_SPX 0x05 /* SPX protocol */ ++#define IPX_TYPE_NCP 0x11 /* $lots for docs on this (SPIT) */ ++#define IPX_TYPE_PPROP 0x14 /* complicated flood fill brdcast */ ++ struct ipx_address ipx_dest __packed; ++ struct ipx_address ipx_source __packed; ++}; ++ +/*----------------------------------------------------------------- + How database records network address: + 0 1 2 3 4 5 6 7 8 9 10 @@ -19847,7 +20375,13 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_br_ext.c linux-5.11.4-rtl881 + /* have a room for new tag */ + memmove(((unsigned char *)ph->tag + data_len), (unsigned char *)ph->tag, ntohs(ph->length)); + ph->length = htons(ntohs(ph->length) + data_len); ++#if (defined __GNUC__) && (__GNUC__ > 10) ++ #pragma GCC diagnostic ignored "-Wstringop-overread" ++#endif + memcpy((unsigned char *)ph->tag, tag, data_len); ++#if (defined __GNUC__) && (__GNUC__ > 10) ++ #pragma GCC diagnostic pop ++#endif + return data_len; +} + @@ -19902,6 +20436,7 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_br_ext.c linux-5.11.4-rtl881 +} + + ++#ifdef _NET_INET_IPX_H_ +static __inline__ void __nat25_generate_ipx_network_addr_with_node(unsigned char *networkAddr, + unsigned int *ipxNetAddr, unsigned char *ipxNodeAddr) +{ @@ -19922,6 +20457,7 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_br_ext.c linux-5.11.4-rtl881 + memcpy(networkAddr + 1, (unsigned char *)ipxNetAddr, 4); + memcpy(networkAddr + 5, (unsigned char *)ipxSocketAddr, 2); +} ++#endif + + +static __inline__ void __nat25_generate_apple_network_addr(unsigned char *networkAddr, @@ -20063,6 +20599,7 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_br_ext.c linux-5.11.4-rtl881 + x = networkAddr[7] ^ networkAddr[8] ^ networkAddr[9] ^ networkAddr[10]; + + return x & (NAT25_HASH_SIZE - 1); ++#ifdef _NET_INET_IPX_H_ + } else if (networkAddr[0] == NAT25_IPX) { + unsigned long x; + @@ -20070,6 +20607,7 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_br_ext.c linux-5.11.4-rtl881 + networkAddr[6] ^ networkAddr[7] ^ networkAddr[8] ^ networkAddr[9] ^ networkAddr[10]; + + return x & (NAT25_HASH_SIZE - 1); ++#endif + } else if (networkAddr[0] == NAT25_APPLE) { + unsigned long x; + @@ -20623,227 +21161,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_br_ext.c linux-5.11.4-rtl881 + } + + /*---------------------------------------------------*/ -+ /* Handle IPX and Apple Talk frame */ -+ /*---------------------------------------------------*/ -+ else if ((protocol == __constant_htons(ETH_P_IPX)) || -+ (protocol == __constant_htons(ETH_P_ATALK)) || -+ (protocol == __constant_htons(ETH_P_AARP))) { -+ unsigned char ipx_header[2] = {0xFF, 0xFF}; -+ struct ipxhdr *ipx = NULL; -+ struct elapaarp *ea = NULL; -+ struct ddpehdr *ddp = NULL; -+ unsigned char *framePtr = skb->data + ETH_HLEN; -+ -+ if (protocol == __constant_htons(ETH_P_IPX)) { -+ RTW_INFO("NAT25: Protocol=IPX (Ethernet II)\n"); -+ ipx = (struct ipxhdr *)framePtr; -+ } else { /* if(protocol <= __constant_htons(ETH_FRAME_LEN)) */ -+ if (!memcmp(ipx_header, framePtr, 2)) { -+ RTW_INFO("NAT25: Protocol=IPX (Ethernet 802.3)\n"); -+ ipx = (struct ipxhdr *)framePtr; -+ } else { -+ unsigned char ipx_8022_type = 0xE0; -+ unsigned char snap_8022_type = 0xAA; -+ -+ if (*framePtr == snap_8022_type) { -+ unsigned char ipx_snap_id[5] = {0x0, 0x0, 0x0, 0x81, 0x37}; /* IPX SNAP ID */ -+ unsigned char aarp_snap_id[5] = {0x00, 0x00, 0x00, 0x80, 0xF3}; /* Apple Talk AARP SNAP ID */ -+ unsigned char ddp_snap_id[5] = {0x08, 0x00, 0x07, 0x80, 0x9B}; /* Apple Talk DDP SNAP ID */ -+ -+ framePtr += 3; /* eliminate the 802.2 header */ -+ -+ if (!memcmp(ipx_snap_id, framePtr, 5)) { -+ framePtr += 5; /* eliminate the SNAP header */ -+ -+ RTW_INFO("NAT25: Protocol=IPX (Ethernet SNAP)\n"); -+ ipx = (struct ipxhdr *)framePtr; -+ } else if (!memcmp(aarp_snap_id, framePtr, 5)) { -+ framePtr += 5; /* eliminate the SNAP header */ -+ -+ ea = (struct elapaarp *)framePtr; -+ } else if (!memcmp(ddp_snap_id, framePtr, 5)) { -+ framePtr += 5; /* eliminate the SNAP header */ -+ -+ ddp = (struct ddpehdr *)framePtr; -+ } else { -+ DEBUG_WARN("NAT25: Protocol=Ethernet SNAP %02x%02x%02x%02x%02x\n", framePtr[0], -+ framePtr[1], framePtr[2], framePtr[3], framePtr[4]); -+ return -1; -+ } -+ } else if (*framePtr == ipx_8022_type) { -+ framePtr += 3; /* eliminate the 802.2 header */ -+ -+ if (!memcmp(ipx_header, framePtr, 2)) { -+ RTW_INFO("NAT25: Protocol=IPX (Ethernet 802.2)\n"); -+ ipx = (struct ipxhdr *)framePtr; -+ } else -+ return -1; -+ } -+ } -+ } -+ -+ /* IPX */ -+ if (ipx != NULL) { -+ switch (method) { -+ case NAT25_CHECK: -+ if (!memcmp(skb->data + ETH_ALEN, ipx->ipx_source.node, ETH_ALEN)) { -+ RTW_INFO("NAT25: Check IPX skb_copy\n"); -+ return 0; -+ } -+ return -1; -+ -+ case NAT25_INSERT: { -+ RTW_INFO("NAT25: Insert IPX, Dest=%08x,%02x%02x%02x%02x%02x%02x,%04x Source=%08x,%02x%02x%02x%02x%02x%02x,%04x\n", -+ ipx->ipx_dest.net, -+ ipx->ipx_dest.node[0], -+ ipx->ipx_dest.node[1], -+ ipx->ipx_dest.node[2], -+ ipx->ipx_dest.node[3], -+ ipx->ipx_dest.node[4], -+ ipx->ipx_dest.node[5], -+ ipx->ipx_dest.sock, -+ ipx->ipx_source.net, -+ ipx->ipx_source.node[0], -+ ipx->ipx_source.node[1], -+ ipx->ipx_source.node[2], -+ ipx->ipx_source.node[3], -+ ipx->ipx_source.node[4], -+ ipx->ipx_source.node[5], -+ ipx->ipx_source.sock); -+ -+ if (!memcmp(skb->data + ETH_ALEN, ipx->ipx_source.node, ETH_ALEN)) { -+ RTW_INFO("NAT25: Use IPX Net, and Socket as network addr\n"); -+ -+ __nat25_generate_ipx_network_addr_with_socket(networkAddr, &ipx->ipx_source.net, &ipx->ipx_source.sock); -+ -+ /* change IPX source node addr to wlan STA address */ -+ memcpy(ipx->ipx_source.node, GET_MY_HWADDR(priv), ETH_ALEN); -+ } else -+ __nat25_generate_ipx_network_addr_with_node(networkAddr, &ipx->ipx_source.net, ipx->ipx_source.node); -+ -+ __nat25_db_network_insert(priv, skb->data + ETH_ALEN, networkAddr); -+ -+ __nat25_db_print(priv); -+ } -+ return 0; -+ -+ case NAT25_LOOKUP: { -+ if (!memcmp(GET_MY_HWADDR(priv), ipx->ipx_dest.node, ETH_ALEN)) { -+ RTW_INFO("NAT25: Lookup IPX, Modify Destination IPX Node addr\n"); -+ -+ __nat25_generate_ipx_network_addr_with_socket(networkAddr, &ipx->ipx_dest.net, &ipx->ipx_dest.sock); -+ -+ __nat25_db_network_lookup_and_replace(priv, skb, networkAddr); -+ -+ /* replace IPX destination node addr with Lookup destination MAC addr */ -+ memcpy(ipx->ipx_dest.node, skb->data, ETH_ALEN); -+ } else { -+ __nat25_generate_ipx_network_addr_with_node(networkAddr, &ipx->ipx_dest.net, ipx->ipx_dest.node); -+ -+ __nat25_db_network_lookup_and_replace(priv, skb, networkAddr); -+ } -+ } -+ return 0; -+ -+ default: -+ return -1; -+ } -+ } -+ -+ /* AARP */ -+ else if (ea != NULL) { -+ /* Sanity check fields. */ -+ if (ea->hw_len != ETH_ALEN || ea->pa_len != AARP_PA_ALEN) { -+ DEBUG_WARN("NAT25: Appletalk AARP Sanity check fail!\n"); -+ return -1; -+ } -+ -+ switch (method) { -+ case NAT25_CHECK: -+ return 0; -+ -+ case NAT25_INSERT: { -+ /* change to AARP source mac address to wlan STA address */ -+ memcpy(ea->hw_src, GET_MY_HWADDR(priv), ETH_ALEN); -+ -+ RTW_INFO("NAT25: Insert AARP, Source=%d,%d Destination=%d,%d\n", -+ ea->pa_src_net, -+ ea->pa_src_node, -+ ea->pa_dst_net, -+ ea->pa_dst_node); -+ -+ __nat25_generate_apple_network_addr(networkAddr, &ea->pa_src_net, &ea->pa_src_node); -+ -+ __nat25_db_network_insert(priv, skb->data + ETH_ALEN, networkAddr); -+ -+ __nat25_db_print(priv); -+ } -+ return 0; -+ -+ case NAT25_LOOKUP: { -+ RTW_INFO("NAT25: Lookup AARP, Source=%d,%d Destination=%d,%d\n", -+ ea->pa_src_net, -+ ea->pa_src_node, -+ ea->pa_dst_net, -+ ea->pa_dst_node); -+ -+ __nat25_generate_apple_network_addr(networkAddr, &ea->pa_dst_net, &ea->pa_dst_node); -+ -+ __nat25_db_network_lookup_and_replace(priv, skb, networkAddr); -+ -+ /* change to AARP destination mac address to Lookup result */ -+ memcpy(ea->hw_dst, skb->data, ETH_ALEN); -+ } -+ return 0; -+ -+ default: -+ return -1; -+ } -+ } -+ -+ /* DDP */ -+ else if (ddp != NULL) { -+ switch (method) { -+ case NAT25_CHECK: -+ return -1; -+ -+ case NAT25_INSERT: { -+ RTW_INFO("NAT25: Insert DDP, Source=%d,%d Destination=%d,%d\n", -+ ddp->deh_snet, -+ ddp->deh_snode, -+ ddp->deh_dnet, -+ ddp->deh_dnode); -+ -+ __nat25_generate_apple_network_addr(networkAddr, &ddp->deh_snet, &ddp->deh_snode); -+ -+ __nat25_db_network_insert(priv, skb->data + ETH_ALEN, networkAddr); -+ -+ __nat25_db_print(priv); -+ } -+ return 0; -+ -+ case NAT25_LOOKUP: { -+ RTW_INFO("NAT25: Lookup DDP, Source=%d,%d Destination=%d,%d\n", -+ ddp->deh_snet, -+ ddp->deh_snode, -+ ddp->deh_dnet, -+ ddp->deh_dnode); -+ -+ __nat25_generate_apple_network_addr(networkAddr, &ddp->deh_dnet, &ddp->deh_dnode); -+ -+ __nat25_db_network_lookup_and_replace(priv, skb, networkAddr); -+ } -+ return 0; -+ -+ default: -+ return -1; -+ } -+ } -+ -+ return -1; -+ } -+ -+ /*---------------------------------------------------*/ + /* Handle PPPoE frame */ + /*---------------------------------------------------*/ + else if ((protocol == __constant_htons(ETH_P_PPP_DISC)) || @@ -21312,9 +21629,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_br_ext.c linux-5.11.4-rtl881 +} + +#endif /* CONFIG_BR_EXT */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_btcoex.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_btcoex.c ---- linux-5.11.4/3rdparty/rtl8812au/core/rtw_btcoex.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_btcoex.c 2021-03-07 18:16:17.017954304 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/core/rtw_btcoex.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_btcoex.c +--- linux-6.3.4/drivers/staging/rtl8812au/core/rtw_btcoex.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_btcoex.c 2022-01-28 22:59:35.553651373 +0200 @@ -0,0 +1,1767 @@ +/****************************************************************************** + * @@ -23083,9 +23400,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_btcoex.c linux-5.11.4-rtl881 + rtw_btcoex_wifionly_AntInfoSetting(padapter); +} + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_btcoex_wifionly.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_btcoex_wifionly.c ---- linux-5.11.4/3rdparty/rtl8812au/core/rtw_btcoex_wifionly.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_btcoex_wifionly.c 2021-03-07 18:16:17.018954351 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/core/rtw_btcoex_wifionly.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_btcoex_wifionly.c +--- linux-6.3.4/drivers/staging/rtl8812au/core/rtw_btcoex_wifionly.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_btcoex_wifionly.c 2022-01-28 22:59:35.553651373 +0200 @@ -0,0 +1,47 @@ +/****************************************************************************** + * @@ -23134,9 +23451,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_btcoex_wifionly.c linux-5.11 +{ + hal_btcoex_wifionly_AntInfoSetting(padapter); +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_bt_mp.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_bt_mp.c ---- linux-5.11.4/3rdparty/rtl8812au/core/rtw_bt_mp.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_bt_mp.c 2021-03-07 18:16:17.017954304 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/core/rtw_bt_mp.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_bt_mp.c +--- linux-6.3.4/drivers/staging/rtl8812au/core/rtw_bt_mp.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_bt_mp.c 2022-01-28 22:59:35.553651373 +0200 @@ -0,0 +1,1575 @@ +/****************************************************************************** + * @@ -24713,9 +25030,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_bt_mp.c linux-5.11.4-rtl8812 +} + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_chplan.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_chplan.c ---- linux-5.11.4/3rdparty/rtl8812au/core/rtw_chplan.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_chplan.c 2021-03-07 18:16:17.018954351 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/core/rtw_chplan.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_chplan.c +--- linux-6.3.4/drivers/staging/rtl8812au/core/rtw_chplan.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_chplan.c 2022-01-28 22:59:35.553651373 +0200 @@ -0,0 +1,1193 @@ +/****************************************************************************** + * @@ -25910,9 +26227,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_chplan.c linux-5.11.4-rtl881 +{ + RTW_PRINT_SEL(sel, "%s-%s\n", RTW_DOMAIN_MAP_VER, RTW_COUNTRY_MAP_VER); +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_chplan.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_chplan.h ---- linux-5.11.4/3rdparty/rtl8812au/core/rtw_chplan.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_chplan.h 2021-03-07 18:16:17.018954351 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/core/rtw_chplan.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_chplan.h +--- linux-6.3.4/drivers/staging/rtl8812au/core/rtw_chplan.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_chplan.h 2022-01-28 22:59:35.553651373 +0200 @@ -0,0 +1,181 @@ +/****************************************************************************** + * @@ -26095,10 +26412,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_chplan.h linux-5.11.4-rtl881 +void dump_chplan_ver(void *sel); + +#endif /* __RTW_CHPLAN_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_cmd.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_cmd.c ---- linux-5.11.4/3rdparty/rtl8812au/core/rtw_cmd.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_cmd.c 2021-03-07 18:16:17.018954351 +0200 -@@ -0,0 +1,5765 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/core/rtw_cmd.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_cmd.c +--- linux-6.3.4/drivers/staging/rtl8812au/core/rtw_cmd.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_cmd.c 2022-12-18 17:40:24.573937030 +0200 +@@ -0,0 +1,5726 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. @@ -26265,21 +26582,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_cmd.c linux-5.11.4-rtl8812au + + pevtpriv->c2h_mem = pevtpriv->allocated_c2h_mem + 4\ + - ((u32)(pevtpriv->allocated_c2h_mem) & 3); -+#ifdef PLATFORM_OS_XP -+ pevtpriv->pc2h_mdl = IoAllocateMdl((u8 *)pevtpriv->c2h_mem, C2H_MEM_SZ , FALSE, FALSE, NULL); -+ -+ if (pevtpriv->pc2h_mdl == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ MmBuildMdlForNonPagedPool(pevtpriv->pc2h_mdl); -+#endif +#endif /* end of CONFIG_SDIO_HCI */ -+ + _rtw_init_queue(&(pevtpriv->evt_queue)); + +exit: -+ +#endif /* end of CONFIG_EVENT_THREAD_MODE */ + +#ifdef CONFIG_C2H_WK @@ -26287,15 +26593,12 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_cmd.c linux-5.11.4-rtl8812au + pevtpriv->c2h_wk_alive = _FALSE; + pevtpriv->c2h_queue = rtw_cbuf_alloc(C2H_QUEUE_MAX_LEN + 1); +#endif -+ -+ + return res; +} + +void _rtw_free_evt_priv(struct evt_priv *pevtpriv) +{ + -+ +#ifdef CONFIG_EVENT_THREAD_MODE + _rtw_free_sema(&(pevtpriv->evt_notify)); + @@ -26316,9 +26619,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_cmd.c linux-5.11.4-rtl8812au + } + rtw_cbuf_free(pevtpriv->c2h_queue); +#endif -+ -+ -+ +} + +void _rtw_free_cmd_priv(struct cmd_priv *pcmdpriv) @@ -26410,7 +26710,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_cmd.c linux-5.11.4-rtl8812au + +exit: + -+ + return _SUCCESS; +} + @@ -26419,7 +26718,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_cmd.c linux-5.11.4-rtl8812au + _irqL irqL; + struct cmd_obj *obj; + -+ + /* _enter_critical_bh(&(queue->lock), &irqL); */ + _enter_critical(&queue->lock, &irqL); + @@ -26430,7 +26728,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_cmd.c linux-5.11.4-rtl8812au + } +#endif /* DBG_CMD_QUEUE */ + -+ + if (rtw_is_list_empty(&(queue->queue))) + obj = NULL; + else { @@ -27624,25 +27921,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_cmd.c linux-5.11.4-rtl8812au + + pcmd->cmdsz = sizeof(WLAN_BSSID_EX); + -+#ifdef CONFIG_RTL8712 -+ /* wlan_network endian conversion */ -+ psecnetwork->Length = cpu_to_le32(psecnetwork->Length); -+ psecnetwork->Ssid.SsidLength = cpu_to_le32(psecnetwork->Ssid.SsidLength); -+ psecnetwork->Privacy = cpu_to_le32(psecnetwork->Privacy); -+ psecnetwork->Rssi = cpu_to_le32(psecnetwork->Rssi); -+ psecnetwork->NetworkTypeInUse = cpu_to_le32(psecnetwork->NetworkTypeInUse); -+ psecnetwork->Configuration.ATIMWindow = cpu_to_le32(psecnetwork->Configuration.ATIMWindow); -+ psecnetwork->Configuration.BeaconPeriod = cpu_to_le32(psecnetwork->Configuration.BeaconPeriod); -+ psecnetwork->Configuration.DSConfig = cpu_to_le32(psecnetwork->Configuration.DSConfig); -+ psecnetwork->Configuration.FHConfig.DwellTime = cpu_to_le32(psecnetwork->Configuration.FHConfig.DwellTime); -+ psecnetwork->Configuration.FHConfig.HopPattern = cpu_to_le32(psecnetwork->Configuration.FHConfig.HopPattern); -+ psecnetwork->Configuration.FHConfig.HopSet = cpu_to_le32(psecnetwork->Configuration.FHConfig.HopSet); -+ psecnetwork->Configuration.FHConfig.Length = cpu_to_le32(psecnetwork->Configuration.FHConfig.Length); -+ psecnetwork->Configuration.Length = cpu_to_le32(psecnetwork->Configuration.Length); -+ psecnetwork->InfrastructureMode = cpu_to_le32(psecnetwork->InfrastructureMode); -+ psecnetwork->IELength = cpu_to_le32(psecnetwork->IELength); -+#endif -+ + _rtw_init_listhead(&pcmd->list); + pcmd->cmdcode = _JoinBss_CMD_;/* GEN_CMD_CODE(_JoinBss) */ + pcmd->parmbuf = (unsigned char *)psecnetwork; @@ -31864,9 +32142,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_cmd.c linux-5.11.4-rtl8812au + + +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_debug.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_debug.c ---- linux-5.11.4/3rdparty/rtl8812au/core/rtw_debug.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_debug.c 2021-03-07 18:16:17.019954399 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/core/rtw_debug.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_debug.c +--- linux-6.3.4/drivers/staging/rtl8812au/core/rtw_debug.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_debug.c 2022-01-28 22:59:35.554651420 +0200 @@ -0,0 +1,7096 @@ +/****************************************************************************** + * @@ -38964,9 +39242,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_debug.c linux-5.11.4-rtl8812 + return count; +} +#endif /* CONFIG_RTW_SW_LED */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_eeprom.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_eeprom.c ---- linux-5.11.4/3rdparty/rtl8812au/core/rtw_eeprom.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_eeprom.c 2021-03-07 18:16:17.019954399 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/core/rtw_eeprom.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_eeprom.c +--- linux-6.3.4/drivers/staging/rtl8812au/core/rtw_eeprom.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_eeprom.c 2022-01-28 22:59:35.554651420 +0200 @@ -0,0 +1,369 @@ +/****************************************************************************** + * @@ -39337,10 +39615,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_eeprom.c linux-5.11.4-rtl881 + + +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_ieee80211.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_ieee80211.c ---- linux-5.11.4/3rdparty/rtl8812au/core/rtw_ieee80211.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_ieee80211.c 2021-03-07 18:16:17.019954399 +0200 -@@ -0,0 +1,2934 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/core/rtw_ieee80211.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_ieee80211.c +--- linux-6.3.4/drivers/staging/rtl8812au/core/rtw_ieee80211.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_ieee80211.c 2023-05-26 22:35:36.540136899 +0300 +@@ -0,0 +1,2896 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. @@ -39357,9 +39635,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_ieee80211.c linux-5.11.4-rtl + *****************************************************************************/ +#define _IEEE80211_C + -+#ifdef CONFIG_PLATFORM_INTEL_BYT -+ #include -+#endif +#include + + @@ -40894,35 +41169,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_ieee80211.c linux-5.11.4-rtl + return (key_char2num(hch) * 100) + (key_char2num(mch) * 10) + key_char2num(lch); +} + -+#ifdef CONFIG_PLATFORM_INTEL_BYT -+#define MAC_ADDRESS_LEN 12 -+ -+int rtw_get_mac_addr_intel(unsigned char *buf) -+{ -+ int ret = 0; -+ int i; -+ struct file *fp = NULL; -+ mm_segment_t oldfs; -+ unsigned char c_mac[MAC_ADDRESS_LEN]; -+ char fname[] = "/config/wifi/mac.txt"; -+ int jj, kk; -+ -+ RTW_INFO("%s Enter\n", __FUNCTION__); -+ -+ ret = rtw_retrieve_from_file(fname, c_mac, MAC_ADDRESS_LEN); -+ if (ret < MAC_ADDRESS_LEN) -+ return -1; -+ -+ for (jj = 0, kk = 0; jj < ETH_ALEN; jj++, kk += 2) -+ buf[jj] = key_2char2num(c_mac[kk], c_mac[kk + 1]); -+ -+ RTW_INFO("%s: read from file mac address: "MAC_FMT"\n", -+ __FUNCTION__, MAC_ARG(buf)); -+ -+ return 0; -+} -+#endif /* CONFIG_PLATFORM_INTEL_BYT */ -+ +/* + * Description: + * rtw_check_invalid_mac_address: @@ -40996,12 +41242,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_ieee80211.c linux-5.11.4-rtl + goto err_chk; + } + -+ /* platform specified */ -+#ifdef CONFIG_PLATFORM_INTEL_BYT -+ if (rtw_get_mac_addr_intel(mac) == 0) -+ goto err_chk; -+#endif -+ + /* Use the mac address stored in the Efuse */ + if (hw_mac_addr) { + _rtw_memcpy(mac, hw_mac_addr, ETH_ALEN); @@ -42275,9 +42515,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_ieee80211.c linux-5.11.4-rtl + return _action_public_str[action]; +} + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_io.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_io.c ---- linux-5.11.4/3rdparty/rtl8812au/core/rtw_io.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_io.c 2021-03-07 18:16:17.019954399 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/core/rtw_io.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_io.c +--- linux-6.3.4/drivers/staging/rtl8812au/core/rtw_io.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_io.c 2022-01-28 22:59:35.555651468 +0200 @@ -0,0 +1,899 @@ +/****************************************************************************** + * @@ -43178,10 +43418,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_io.c linux-5.11.4-rtl8812au/ +#endif /* CONFIG_SDIO_HCI */ + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_ioctl_query.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_ioctl_query.c ---- linux-5.11.4/3rdparty/rtl8812au/core/rtw_ioctl_query.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_ioctl_query.c 2021-03-07 18:16:17.019954399 +0200 -@@ -0,0 +1,166 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/core/rtw_ioctl_query.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_ioctl_query.c +--- linux-6.3.4/drivers/staging/rtl8812au/core/rtw_ioctl_query.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_ioctl_query.c 2023-05-26 22:35:36.540136899 +0300 +@@ -0,0 +1,19 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. @@ -43201,156 +43441,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_ioctl_query.c linux-5.11.4-r +#include + + -+#ifdef PLATFORM_WINDOWS -+/* -+ * Added for WPA2-PSK, by Annie, 2005-09-20. -+ * */ -+u8 -+query_802_11_capability( -+ _adapter *Adapter, -+ u8 *pucBuf, -+ u32 *pulOutLen -+) -+{ -+ static NDIS_802_11_AUTHENTICATION_ENCRYPTION szAuthEnc[] = { -+ {Ndis802_11AuthModeOpen, Ndis802_11EncryptionDisabled}, -+ {Ndis802_11AuthModeOpen, Ndis802_11Encryption1Enabled}, -+ {Ndis802_11AuthModeShared, Ndis802_11EncryptionDisabled}, -+ {Ndis802_11AuthModeShared, Ndis802_11Encryption1Enabled}, -+ {Ndis802_11AuthModeWPA, Ndis802_11Encryption2Enabled}, -+ {Ndis802_11AuthModeWPA, Ndis802_11Encryption3Enabled}, -+ {Ndis802_11AuthModeWPAPSK, Ndis802_11Encryption2Enabled}, -+ {Ndis802_11AuthModeWPAPSK, Ndis802_11Encryption3Enabled}, -+ {Ndis802_11AuthModeWPANone, Ndis802_11Encryption2Enabled}, -+ {Ndis802_11AuthModeWPANone, Ndis802_11Encryption3Enabled}, -+ {Ndis802_11AuthModeWPA2, Ndis802_11Encryption2Enabled}, -+ {Ndis802_11AuthModeWPA2, Ndis802_11Encryption3Enabled}, -+ {Ndis802_11AuthModeWPA2PSK, Ndis802_11Encryption2Enabled}, -+ {Ndis802_11AuthModeWPA2PSK, Ndis802_11Encryption3Enabled} -+ }; -+ static ULONG ulNumOfPairSupported = sizeof(szAuthEnc) / sizeof(NDIS_802_11_AUTHENTICATION_ENCRYPTION); -+ NDIS_802_11_CAPABILITY *pCap = (NDIS_802_11_CAPABILITY *)pucBuf; -+ u8 *pucAuthEncryptionSupported = (u8 *) pCap->AuthenticationEncryptionSupported; -+ -+ -+ pCap->Length = sizeof(NDIS_802_11_CAPABILITY); -+ if (ulNumOfPairSupported > 1) -+ pCap->Length += (ulNumOfPairSupported - 1) * sizeof(NDIS_802_11_AUTHENTICATION_ENCRYPTION); -+ -+ pCap->Version = 2; -+ pCap->NoOfPMKIDs = NUM_PMKID_CACHE; -+ pCap->NoOfAuthEncryptPairsSupported = ulNumOfPairSupported; -+ -+ if (sizeof(szAuthEnc) <= 240) /* 240 = 256 - 4*4 */ { /* SecurityInfo.szCapability: only 256 bytes in size. */ -+ _rtw_memcpy(pucAuthEncryptionSupported, (u8 *)szAuthEnc, sizeof(szAuthEnc)); -+ *pulOutLen = pCap->Length; -+ return _TRUE; -+ } else { -+ *pulOutLen = 0; -+ return _FALSE; -+ } -+} -+ -+u8 query_802_11_association_information(_adapter *padapter, PNDIS_802_11_ASSOCIATION_INFORMATION pAssocInfo) -+{ -+ struct wlan_network *tgt_network; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct security_priv *psecuritypriv = &(padapter->securitypriv); -+ WLAN_BSSID_EX *psecnetwork = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; -+ u8 *pDest = (u8 *)pAssocInfo + sizeof(NDIS_802_11_ASSOCIATION_INFORMATION); -+ unsigned char i, *auth_ie, *supp_ie; -+ -+ /* NdisZeroMemory(pAssocInfo, sizeof(NDIS_802_11_ASSOCIATION_INFORMATION)); */ -+ _rtw_memset(pAssocInfo, 0, sizeof(NDIS_802_11_ASSOCIATION_INFORMATION)); -+ /* pAssocInfo->Length = sizeof(NDIS_802_11_ASSOCIATION_INFORMATION); */ -+ -+ /* ------------------------------------------------------ */ -+ /* Association Request related information */ -+ /* ------------------------------------------------------ */ -+ /* Req_1. AvailableRequestFixedIEs */ -+ if (psecnetwork != NULL) { -+ -+ pAssocInfo->AvailableRequestFixedIEs |= NDIS_802_11_AI_REQFI_CAPABILITIES | NDIS_802_11_AI_REQFI_CURRENTAPADDRESS; -+ pAssocInfo->RequestFixedIEs.Capabilities = (unsigned short) *&psecnetwork->IEs[10]; -+ _rtw_memcpy(pAssocInfo->RequestFixedIEs.CurrentAPAddress, -+ &psecnetwork->MacAddress, 6); -+ -+ pAssocInfo->OffsetRequestIEs = sizeof(NDIS_802_11_ASSOCIATION_INFORMATION); -+ -+ if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING | _FW_LINKED) == _TRUE) { -+ -+ if (psecuritypriv->ndisauthtype >= Ndis802_11AuthModeWPA2) -+ pDest[0] = 48; /* RSN Information Element */ -+ else -+ pDest[0] = 221; /* WPA(SSN) Information Element */ -+ -+ supp_ie = &psecuritypriv->supplicant_ie[0]; -+ -+ i = 13; /* 0~11 is fixed information element */ -+ while ((i < supp_ie[0]) && (i < 256)) { -+ if ((unsigned char)supp_ie[i] == pDest[0]) { -+ _rtw_memcpy((u8 *)(pDest), -+ &supp_ie[i], -+ supp_ie[1 + i] + 2); -+ -+ break; -+ } -+ -+ i = i + supp_ie[i + 1] + 2; -+ if (supp_ie[1 + i] == 0) -+ i = i + 1; -+ -+ } -+ -+ -+ pAssocInfo->RequestIELength += (2 + supp_ie[1 + i]); /* (2 + psecnetwork->IEs[1+i]+4); */ -+ -+ } -+ -+ -+ -+ } -+ -+ -+ /* ------------------------------------------------------ */ -+ /* Association Response related information */ -+ /* ------------------------------------------------------ */ -+ -+ if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) { -+ tgt_network = &(pmlmepriv->cur_network); -+ if (tgt_network != NULL) { -+ pAssocInfo->AvailableResponseFixedIEs = -+ NDIS_802_11_AI_RESFI_CAPABILITIES -+ | NDIS_802_11_AI_RESFI_ASSOCIATIONID -+ ; -+ -+ pAssocInfo->ResponseFixedIEs.Capabilities = (unsigned short) *&tgt_network->network.IEs[10]; -+ pAssocInfo->ResponseFixedIEs.StatusCode = 0; -+ pAssocInfo->ResponseFixedIEs.AssociationId = (unsigned short) tgt_network->aid; -+ -+ pDest = (u8 *)pAssocInfo + sizeof(NDIS_802_11_ASSOCIATION_INFORMATION) + pAssocInfo->RequestIELength; -+ auth_ie = &psecuritypriv->authenticator_ie[0]; -+ -+ -+ i = auth_ie[0] - 12; -+ if (i > 0) { -+ _rtw_memcpy((u8 *)&pDest[0], &auth_ie[1], i); -+ pAssocInfo->ResponseIELength = i; -+ } -+ -+ -+ pAssocInfo->OffsetResponseIEs = sizeof(NDIS_802_11_ASSOCIATION_INFORMATION) + pAssocInfo->RequestIELength; -+ -+ -+ } -+ } -+ -+ return _TRUE; -+} -+#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_ioctl_rtl.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_ioctl_rtl.c ---- linux-5.11.4/3rdparty/rtl8812au/core/rtw_ioctl_rtl.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_ioctl_rtl.c 2021-03-07 18:16:17.020954446 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/core/rtw_ioctl_rtl.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_ioctl_rtl.c +--- linux-6.3.4/drivers/staging/rtl8812au/core/rtw_ioctl_rtl.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_ioctl_rtl.c 2022-01-28 22:59:35.555651468 +0200 @@ -0,0 +1,901 @@ +/****************************************************************************** + * @@ -44253,10 +44346,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_ioctl_rtl.c linux-5.11.4-rtl + return status; +} +/* ************** oid_rtl_seg_03_00 section end ************** */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_ioctl_set.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_ioctl_set.c ---- linux-5.11.4/3rdparty/rtl8812au/core/rtw_ioctl_set.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_ioctl_set.c 2021-03-07 18:16:17.020954446 +0200 -@@ -0,0 +1,930 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/core/rtw_ioctl_set.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_ioctl_set.c +--- linux-6.3.4/drivers/staging/rtl8812au/core/rtw_ioctl_set.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_ioctl_set.c 2023-05-26 22:35:36.540136899 +0300 +@@ -0,0 +1,853 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. @@ -44456,83 +44549,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_ioctl_set.c linux-5.11.4-rtl + return ret; +} + -+#ifdef PLATFORM_WINDOWS -+u8 rtw_pnp_set_power_wakeup(_adapter *padapter) -+{ -+ u8 res = _SUCCESS; -+ -+ -+ -+ res = rtw_setstandby_cmd(padapter, 0); -+ -+ -+ -+ return res; -+} -+ -+u8 rtw_pnp_set_power_sleep(_adapter *padapter) -+{ -+ u8 res = _SUCCESS; -+ -+ -+ /* DbgPrint("+rtw_pnp_set_power_sleep\n"); */ -+ -+ res = rtw_setstandby_cmd(padapter, 1); -+ -+ -+ -+ return res; -+} -+ -+u8 rtw_set_802_11_reload_defaults(_adapter *padapter, NDIS_802_11_RELOAD_DEFAULTS reloadDefaults) -+{ -+ -+ -+ -+ /* SecClearAllKeys(Adapter); */ -+ /* 8711 CAM was not for En/Decrypt only */ -+ /* so, we can't clear all keys. */ -+ /* should we disable WPAcfg (ox0088) bit 1-2, instead of clear all CAM */ -+ -+ /* TO DO... */ -+ -+ -+ return _TRUE; -+} -+ -+u8 set_802_11_test(_adapter *padapter, NDIS_802_11_TEST *test) -+{ -+ u8 ret = _TRUE; -+ -+ -+ switch (test->Type) { -+ case 1: -+ NdisMIndicateStatus(padapter->hndis_adapter, NDIS_STATUS_MEDIA_SPECIFIC_INDICATION, (PVOID)&test->AuthenticationEvent, test->Length - 8); -+ NdisMIndicateStatusComplete(padapter->hndis_adapter); -+ break; -+ -+ case 2: -+ NdisMIndicateStatus(padapter->hndis_adapter, NDIS_STATUS_MEDIA_SPECIFIC_INDICATION, (PVOID)&test->RssiTrigger, sizeof(NDIS_802_11_RSSI)); -+ NdisMIndicateStatusComplete(padapter->hndis_adapter); -+ break; -+ -+ default: -+ ret = _FALSE; -+ break; -+ } -+ -+ -+ return ret; -+} -+ -+u8 rtw_set_802_11_pmkid(_adapter *padapter, NDIS_802_11_PMKID *pmkid) -+{ -+ u8 ret = _SUCCESS; -+ -+ return ret; -+} -+ -+#endif + +u8 rtw_set_802_11_bssid(_adapter *padapter, u8 *bssid) +{ @@ -45187,9 +45203,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_ioctl_set.c linux-5.11.4-rtl + RTW_PRINT(FUNC_ADPT_FMT" band:%d fail\n", FUNC_ADPT_ARG(adapter), band); + return _FAIL; +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_iol.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_iol.c ---- linux-5.11.4/3rdparty/rtl8812au/core/rtw_iol.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_iol.c 2021-03-07 18:16:17.020954446 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/core/rtw_iol.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_iol.c +--- linux-6.3.4/drivers/staging/rtl8812au/core/rtw_iol.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_iol.c 2022-01-28 22:59:35.555651468 +0200 @@ -0,0 +1,394 @@ +/****************************************************************************** + * @@ -45585,9 +45601,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_iol.c linux-5.11.4-rtl8812au + + +#endif /* CONFIG_IOL */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mem.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_mem.c ---- linux-5.11.4/3rdparty/rtl8812au/core/rtw_mem.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_mem.c 2021-03-07 18:16:17.020954446 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/core/rtw_mem.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_mem.c +--- linux-6.3.4/drivers/staging/rtl8812au/core/rtw_mem.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_mem.c 2022-01-28 22:59:35.555651468 +0200 @@ -0,0 +1,128 @@ +/****************************************************************************** + * @@ -45717,9 +45733,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mem.c linux-5.11.4-rtl8812au + +module_init(rtw_mem_init); +module_exit(rtw_mem_exit); -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mi.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_mi.c ---- linux-5.11.4/3rdparty/rtl8812au/core/rtw_mi.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_mi.c 2021-03-07 18:16:17.020954446 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/core/rtw_mi.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_mi.c +--- linux-6.3.4/drivers/staging/rtl8812au/core/rtw_mi.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_mi.c 2022-01-28 22:59:35.555651468 +0200 @@ -0,0 +1,1571 @@ +/****************************************************************************** + * @@ -47292,10 +47308,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mi.c linux-5.11.4-rtl8812au/ +#endif + return n_assoc_iface; +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mlme.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_mlme.c ---- linux-5.11.4/3rdparty/rtl8812au/core/rtw_mlme.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_mlme.c 2021-03-07 18:16:17.021954493 +0200 -@@ -0,0 +1,5359 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/core/rtw_mlme.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_mlme.c +--- linux-6.3.4/drivers/staging/rtl8812au/core/rtw_mlme.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_mlme.c 2023-05-26 22:35:36.540136899 +0300 +@@ -0,0 +1,5358 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. @@ -50139,10 +50155,8 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mlme.c linux-5.11.4-rtl8812a + psta = rtw_get_stainfo(&adapter->stapriv, tgt_network->network.MacAddress); + if (psta) + rtw_sta_mstatus_disc_rpt(adapter, psta->cmn.mac_id); -+ else { ++ else + RTW_INFO("%s "ADPT_FMT" - mac_addr: "MAC_FMT" psta == NULL\n", __func__, ADPT_ARG(adapter), MAC_ARG(tgt_network->network.MacAddress)); -+ rtw_warn_on(1); -+ } + } +} + @@ -50491,10 +50505,11 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mlme.c linux-5.11.4-rtl8812a + #ifdef CONFIG_LAYER2_ROAMING + if (rtw_chk_roam_flags(padapter, RTW_ROAM_ACTIVE) && pmlmepriv->need_to_roam == _TRUE) + RTW_INFO(FUNC_ADPT_FMT" need to roam, don't care BusyTraffic\n", FUNC_ADPT_ARG(padapter)); -+ else ++ else { + #endif + RTW_INFO(FUNC_ADPT_FMT" exit BusyTraffic\n", FUNC_ADPT_ARG(padapter)); + goto exit; ++ } + } + else if (ssc_chk != SS_ALLOW) + goto exit; @@ -52655,9 +52670,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mlme.c linux-5.11.4-rtl8812a + , MAC_ARG(ARP_TARGET_MAC_ADDR(arp)), IP_ARG(ARP_TARGET_IP_ADDR(arp))); +} + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mlme_ext.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_mlme_ext.c ---- linux-5.11.4/3rdparty/rtl8812au/core/rtw_mlme_ext.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_mlme_ext.c 2021-03-07 18:16:17.023954587 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/core/rtw_mlme_ext.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_mlme_ext.c +--- linux-6.3.4/drivers/staging/rtl8812au/core/rtw_mlme_ext.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_mlme_ext.c 2022-01-28 22:59:35.558651610 +0200 @@ -0,0 +1,16825 @@ +/****************************************************************************** + * @@ -69484,10 +69499,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mlme_ext.c linux-5.11.4-rtl8 +#endif /* CONFIG_IOCTL_CFG80211 */ +} + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_mp.c ---- linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_mp.c 2021-03-07 18:16:17.023954587 +0200 -@@ -0,0 +1,3867 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/core/rtw_mp.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_mp.c +--- linux-6.3.4/drivers/staging/rtl8812au/core/rtw_mp.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_mp.c 2022-12-18 17:40:24.573937030 +0200 +@@ -0,0 +1,3871 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. @@ -70904,7 +70919,11 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp.c linux-5.11.4-rtl8812au/ + pmptx->pallocated_buf = NULL; + pmptx->stop = 1; + ++#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 17, 0) + thread_exit(NULL); ++#else ++ kthread_thread_exit(NULL); ++#endif + return 0; +} + @@ -73355,10 +73374,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp.c linux-5.11.4-rtl8812au/ + +#endif +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp_ioctl.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_mp_ioctl.c ---- linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp_ioctl.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_mp_ioctl.c 2021-03-07 18:16:17.023954587 +0200 -@@ -0,0 +1,2529 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/core/rtw_mp_ioctl.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_mp_ioctl.c +--- linux-6.3.4/drivers/staging/rtl8812au/core/rtw_mp_ioctl.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_mp_ioctl.c 2023-05-26 22:35:36.541136899 +0300 +@@ -0,0 +1,2382 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. @@ -73403,9 +73422,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp_ioctl.c linux-5.11.4-rtl8 +/* **************** oid_rtl_seg_81_87_80 section start **************** */ +NDIS_STATUS oid_rt_pro_write_bb_reg_hdl(struct oid_par_priv *poid_par_priv) +{ -+#ifdef PLATFORM_OS_XP -+ _irqL oldirql; -+#endif + struct bb_reg_param *pbbreg; + u16 offset; + u32 value; @@ -73439,9 +73455,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp_ioctl.c linux-5.11.4-rtl8 +/* ------------------------------------------------------------------------------ */ +NDIS_STATUS oid_rt_pro_read_bb_reg_hdl(struct oid_par_priv *poid_par_priv) +{ -+#ifdef PLATFORM_OS_XP -+ _irqL oldirql; -+#endif + struct bb_reg_param *pbbreg; + u16 offset; + u32 value; @@ -73475,9 +73488,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp_ioctl.c linux-5.11.4-rtl8 +/* ------------------------------------------------------------------------------ */ +NDIS_STATUS oid_rt_pro_write_rf_reg_hdl(struct oid_par_priv *poid_par_priv) +{ -+#ifdef PLATFORM_OS_XP -+ _irqL oldirql; -+#endif + struct rf_reg_param *pbbreg; + u8 path; + u8 offset; @@ -73517,9 +73527,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp_ioctl.c linux-5.11.4-rtl8 +/* ------------------------------------------------------------------------------ */ +NDIS_STATUS oid_rt_pro_read_rf_reg_hdl(struct oid_par_priv *poid_par_priv) +{ -+#ifdef PLATFORM_OS_XP -+ _irqL oldirql; -+#endif + struct rf_reg_param *pbbreg; + u8 path; + u8 offset; @@ -73564,9 +73571,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp_ioctl.c linux-5.11.4-rtl8 + * ------------------------------------------------------------------------------ */ +NDIS_STATUS oid_rt_pro_set_data_rate_hdl(struct oid_par_priv *poid_par_priv) +{ -+#ifdef PLATFORM_OS_XP -+ _irqL oldirql; -+#endif + u32 ratevalue;/* 4 */ + NDIS_STATUS status = NDIS_STATUS_SUCCESS; + PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); @@ -73595,9 +73599,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp_ioctl.c linux-5.11.4-rtl8 +/* ------------------------------------------------------------------------------ */ +NDIS_STATUS oid_rt_pro_start_test_hdl(struct oid_par_priv *poid_par_priv) +{ -+#ifdef PLATFORM_OS_XP -+ _irqL oldirql; -+#endif + u32 mode; + NDIS_STATUS status = NDIS_STATUS_SUCCESS; + PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); @@ -73632,9 +73633,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp_ioctl.c linux-5.11.4-rtl8 +/* ------------------------------------------------------------------------------ */ +NDIS_STATUS oid_rt_pro_stop_test_hdl(struct oid_par_priv *poid_par_priv) +{ -+#ifdef PLATFORM_OS_XP -+ _irqL oldirql; -+#endif + NDIS_STATUS status = NDIS_STATUS_SUCCESS; + PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); + @@ -73654,9 +73652,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp_ioctl.c linux-5.11.4-rtl8 +/* ------------------------------------------------------------------------------ */ +NDIS_STATUS oid_rt_pro_set_channel_direct_call_hdl(struct oid_par_priv *poid_par_priv) +{ -+#ifdef PLATFORM_OS_XP -+ _irqL oldirql; -+#endif + u32 Channel; + NDIS_STATUS status = NDIS_STATUS_SUCCESS; + PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); @@ -73689,9 +73684,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp_ioctl.c linux-5.11.4-rtl8 +/* ------------------------------------------------------------------------------ */ +NDIS_STATUS oid_rt_set_bandwidth_hdl(struct oid_par_priv *poid_par_priv) +{ -+#ifdef PLATFORM_OS_XP -+ _irqL oldirql; -+#endif + u16 bandwidth; + u16 channel_offset; + NDIS_STATUS status = NDIS_STATUS_SUCCESS; @@ -73724,9 +73716,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp_ioctl.c linux-5.11.4-rtl8 +/* ------------------------------------------------------------------------------ */ +NDIS_STATUS oid_rt_pro_set_antenna_bb_hdl(struct oid_par_priv *poid_par_priv) +{ -+#ifdef PLATFORM_OS_XP -+ _irqL oldirql; -+#endif + u32 antenna; + NDIS_STATUS status = NDIS_STATUS_SUCCESS; + PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); @@ -73756,9 +73745,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp_ioctl.c linux-5.11.4-rtl8 + +NDIS_STATUS oid_rt_pro_set_tx_power_control_hdl(struct oid_par_priv *poid_par_priv) +{ -+#ifdef PLATFORM_OS_XP -+ _irqL oldirql; -+#endif + u32 tx_pwr_idx; + NDIS_STATUS status = NDIS_STATUS_SUCCESS; + PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); @@ -73891,9 +73877,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp_ioctl.c linux-5.11.4-rtl8 +/* ------------------------------------------------------------------------------ */ +NDIS_STATUS oid_rt_reset_phy_rx_packet_count_hdl(struct oid_par_priv *poid_par_priv) +{ -+#ifdef PLATFORM_OS_XP -+ _irqL oldirql; -+#endif + NDIS_STATUS status = NDIS_STATUS_SUCCESS; + PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); + @@ -73913,9 +73896,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp_ioctl.c linux-5.11.4-rtl8 +/* ------------------------------------------------------------------------------ */ +NDIS_STATUS oid_rt_get_phy_rx_packet_received_hdl(struct oid_par_priv *poid_par_priv) +{ -+#ifdef PLATFORM_OS_XP -+ _irqL oldirql; -+#endif + NDIS_STATUS status = NDIS_STATUS_SUCCESS; + PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); + @@ -73940,9 +73920,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp_ioctl.c linux-5.11.4-rtl8 +/* ------------------------------------------------------------------------------ */ +NDIS_STATUS oid_rt_get_phy_rx_packet_crc32_error_hdl(struct oid_par_priv *poid_par_priv) +{ -+#ifdef PLATFORM_OS_XP -+ _irqL oldirql; -+#endif + NDIS_STATUS status = NDIS_STATUS_SUCCESS; + PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); + @@ -73968,9 +73945,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp_ioctl.c linux-5.11.4-rtl8 +/* **************** oid_rtl_seg_81_80_20 section end **************** */ +NDIS_STATUS oid_rt_pro_set_continuous_tx_hdl(struct oid_par_priv *poid_par_priv) +{ -+#ifdef PLATFORM_OS_XP -+ _irqL oldirql; -+#endif + u32 bStartTest; + NDIS_STATUS status = NDIS_STATUS_SUCCESS; + PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); @@ -74003,9 +73977,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp_ioctl.c linux-5.11.4-rtl8 + +NDIS_STATUS oid_rt_pro_set_single_carrier_tx_hdl(struct oid_par_priv *poid_par_priv) +{ -+#ifdef PLATFORM_OS_XP -+ _irqL oldirql; -+#endif + u32 bStartTest; + NDIS_STATUS status = NDIS_STATUS_SUCCESS; + PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); @@ -74038,9 +74009,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp_ioctl.c linux-5.11.4-rtl8 + +NDIS_STATUS oid_rt_pro_set_carrier_suppression_tx_hdl(struct oid_par_priv *poid_par_priv) +{ -+#ifdef PLATFORM_OS_XP -+ _irqL oldirql; -+#endif + u32 bStartTest; + NDIS_STATUS status = NDIS_STATUS_SUCCESS; + PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); @@ -74073,9 +74041,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp_ioctl.c linux-5.11.4-rtl8 + +NDIS_STATUS oid_rt_pro_set_single_tone_tx_hdl(struct oid_par_priv *poid_par_priv) +{ -+#ifdef PLATFORM_OS_XP -+ _irqL oldirql; -+#endif + u32 bStartTest; + NDIS_STATUS status = NDIS_STATUS_SUCCESS; + PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); @@ -74104,9 +74069,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp_ioctl.c linux-5.11.4-rtl8 +{ + PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); + -+#ifdef PLATFORM_OS_XP -+ _irqL oldirql; -+#endif + NDIS_STATUS status = NDIS_STATUS_SUCCESS; + + if (poid_par_priv->type_of_oid != SET_OID) @@ -74126,9 +74088,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp_ioctl.c linux-5.11.4-rtl8 +#if 0 + PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); + -+#ifdef PLATFORM_OS_XP -+ _irqL oldirql; -+#endif + NDIS_STATUS status = NDIS_STATUS_SUCCESS; + + PNDIS_802_11_SSID pssid; @@ -74162,9 +74121,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp_ioctl.c linux-5.11.4-rtl8 +/* ------------------------------------------------------------------------------ */ +NDIS_STATUS oid_rt_pro_read_register_hdl(struct oid_par_priv *poid_par_priv) +{ -+#ifdef PLATFORM_OS_XP -+ _irqL oldirql; -+#endif + pRW_Reg RegRWStruct; + u32 offset, width; + NDIS_STATUS status = NDIS_STATUS_SUCCESS; @@ -74207,9 +74163,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp_ioctl.c linux-5.11.4-rtl8 +/* ------------------------------------------------------------------------------ */ +NDIS_STATUS oid_rt_pro_write_register_hdl(struct oid_par_priv *poid_par_priv) +{ -+#ifdef PLATFORM_OS_XP -+ _irqL oldirql; -+#endif + pRW_Reg RegRWStruct; + u32 offset, width, value; + NDIS_STATUS status = NDIS_STATUS_SUCCESS; @@ -74263,9 +74216,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp_ioctl.c linux-5.11.4-rtl8 +NDIS_STATUS oid_rt_pro_burst_read_register_hdl(struct oid_par_priv *poid_par_priv) +{ +#if 0 -+#ifdef PLATFORM_OS_XP -+ _irqL oldirql; -+#endif + pBurst_RW_Reg pBstRwReg; + NDIS_STATUS status = NDIS_STATUS_SUCCESS; + PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); @@ -74294,9 +74244,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp_ioctl.c linux-5.11.4-rtl8 +NDIS_STATUS oid_rt_pro_burst_write_register_hdl(struct oid_par_priv *poid_par_priv) +{ +#if 0 -+#ifdef PLATFORM_OS_XP -+ _irqL oldirql; -+#endif + pBurst_RW_Reg pBstRwReg; + NDIS_STATUS status = NDIS_STATUS_SUCCESS; + PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); @@ -74327,9 +74274,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp_ioctl.c linux-5.11.4-rtl8 + + PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); + -+#ifdef PLATFORM_OS_XP -+ _irqL oldirql; -+#endif + + TX_CMD_Desc *TxCmd_Info; + @@ -74360,9 +74304,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp_ioctl.c linux-5.11.4-rtl8 +NDIS_STATUS oid_rt_pro_read16_eeprom_hdl(struct oid_par_priv *poid_par_priv) +{ +#if 0 -+#ifdef PLATFORM_OS_XP -+ _irqL oldirql; -+#endif + pEEPROM_RWParam pEEPROM; + NDIS_STATUS status = NDIS_STATUS_SUCCESS; + PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); @@ -74392,9 +74333,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp_ioctl.c linux-5.11.4-rtl8 +NDIS_STATUS oid_rt_pro_write16_eeprom_hdl(struct oid_par_priv *poid_par_priv) +{ +#if 0 -+#ifdef PLATFORM_OS_XP -+ _irqL oldirql; -+#endif + pEEPROM_RWParam pEEPROM; + NDIS_STATUS status = NDIS_STATUS_SUCCESS; + PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); @@ -74487,9 +74425,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp_ioctl.c linux-5.11.4-rtl8 + struct io_queue *pio_queue = (struct io_queue *)Adapter->pio_queue; + struct intf_hdl *pintfhdl = &pio_queue->intf; + -+#ifdef PLATFORM_OS_XP -+ _irqL oldirql; -+#endif + NDIS_STATUS status = NDIS_STATUS_SUCCESS; + +#ifdef CONFIG_SDIO_HCI @@ -74527,9 +74462,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp_ioctl.c linux-5.11.4-rtl8 + struct io_queue *pio_queue = (struct io_queue *)Adapter->pio_queue; + struct intf_hdl *pintfhdl = &pio_queue->intf; + -+#ifdef PLATFORM_OS_XP -+ _irqL oldirql; -+#endif + NDIS_STATUS status = NDIS_STATUS_SUCCESS; + +#ifdef CONFIG_SDIO_HCI @@ -74563,9 +74495,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp_ioctl.c linux-5.11.4-rtl8 +#if 0 + PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); + -+#ifdef PLATFORM_OS_XP -+ _irqL oldirql; -+#endif + NDIS_STATUS status = NDIS_STATUS_SUCCESS; + + @@ -74648,9 +74577,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp_ioctl.c linux-5.11.4-rtl8 +{ + PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); + -+#ifdef PLATFORM_OS_XP -+ _irqL oldirql; -+#endif + NDIS_STATUS status = NDIS_STATUS_SUCCESS; + + @@ -74671,9 +74597,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp_ioctl.c linux-5.11.4-rtl8 +/* ----------------------------------------------------------------------------- */ +NDIS_STATUS oid_rt_get_thermal_meter_hdl(struct oid_par_priv *poid_par_priv) +{ -+#ifdef PLATFORM_OS_XP -+ _irqL oldirql; -+#endif + NDIS_STATUS status = NDIS_STATUS_SUCCESS; + u8 thermal = 0; + PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); @@ -74702,9 +74625,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp_ioctl.c linux-5.11.4-rtl8 +#if 0 + PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); + -+#ifdef PLATFORM_OS_XP -+ _irqL oldirql; -+#endif + NDIS_STATUS status = NDIS_STATUS_SUCCESS; + + @@ -74741,9 +74661,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp_ioctl.c linux-5.11.4-rtl8 +/* ------------------------------------------------------------------------------ */ +NDIS_STATUS oid_rt_pro_set_power_tracking_hdl(struct oid_par_priv *poid_par_priv) +{ -+#ifdef PLATFORM_OS_XP -+ _irqL oldirql; -+#endif + NDIS_STATUS status = NDIS_STATUS_SUCCESS; + PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); + @@ -74773,9 +74690,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp_ioctl.c linux-5.11.4-rtl8 +NDIS_STATUS oid_rt_pro_set_basic_rate_hdl(struct oid_par_priv *poid_par_priv) +{ +#if 0 -+#ifdef PLATFORM_OS_XP -+ _irqL oldirql; -+#endif + u32 ratevalue; + u8 datarates[NumRates]; + int i; @@ -74874,9 +74788,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp_ioctl.c linux-5.11.4-rtl8 +#if 0 + PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); + -+#ifdef PLATFORM_OS_XP -+ _irqL oldirql; -+#endif + NDIS_STATUS status = NDIS_STATUS_SUCCESS; + + struct setratable_parm *prate_table; @@ -75048,9 +74959,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp_ioctl.c linux-5.11.4-rtl8 +#if 0 + PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); + -+#ifdef PLATFORM_OS_XP -+ _irqL oldirql; -+#endif + NDIS_STATUS status = NDIS_STATUS_SUCCESS; + + struct sta_info *psta = NULL; @@ -75092,9 +75000,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp_ioctl.c linux-5.11.4-rtl8 +#if 0 + PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); + -+#ifdef PLATFORM_OS_XP -+ _irqL oldirql; -+#endif + NDIS_STATUS status = NDIS_STATUS_SUCCESS; + + struct sta_info *psta = NULL; @@ -75227,9 +75132,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp_ioctl.c linux-5.11.4-rtl8 +#if 0 + PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); + -+#ifdef PLATFORM_OS_XP -+ _irqL oldirql; -+#endif + NDIS_STATUS status = NDIS_STATUS_SUCCESS; + + DR_VARIABLE_STRUCT *pdrv_var; @@ -75291,9 +75193,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp_ioctl.c linux-5.11.4-rtl8 +/* ------------------------------------------------------------------------------ */ +NDIS_STATUS oid_rt_pro_read_efuse_hdl(struct oid_par_priv *poid_par_priv) +{ -+#ifdef PLATFORM_OS_XP -+ _irqL oldirql; -+#endif + PEFUSE_ACCESS_STRUCT pefuse; + u8 *data; + u16 addr = 0, cnts = 0, max_available_size = 0; @@ -75332,9 +75231,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp_ioctl.c linux-5.11.4-rtl8 +/* ------------------------------------------------------------------------------ */ +NDIS_STATUS oid_rt_pro_write_efuse_hdl(struct oid_par_priv *poid_par_priv) +{ -+#ifdef PLATFORM_OS_XP -+ _irqL oldirql; -+#endif + PEFUSE_ACCESS_STRUCT pefuse; + u8 *data; + u16 addr = 0, cnts = 0, max_available_size = 0; @@ -75369,9 +75265,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp_ioctl.c linux-5.11.4-rtl8 +/* ------------------------------------------------------------------------------ */ +NDIS_STATUS oid_rt_pro_rw_efuse_pgpkt_hdl(struct oid_par_priv *poid_par_priv) +{ -+#ifdef PLATFORM_OS_XP -+ _irqL oldirql; -+#endif + PPGPKT_STRUCT ppgpkt; + NDIS_STATUS status = NDIS_STATUS_SUCCESS; + PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); @@ -75414,9 +75307,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp_ioctl.c linux-5.11.4-rtl8 +/* ------------------------------------------------------------------------------ */ +NDIS_STATUS oid_rt_get_efuse_current_size_hdl(struct oid_par_priv *poid_par_priv) +{ -+#ifdef PLATFORM_OS_XP -+ _irqL oldirql; -+#endif + u16 size; + u8 ret; + NDIS_STATUS status = NDIS_STATUS_SUCCESS; @@ -75480,9 +75370,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp_ioctl.c linux-5.11.4-rtl8 +/* ------------------------------------------------------------------------------ */ +NDIS_STATUS oid_rt_pro_efuse_map_hdl(struct oid_par_priv *poid_par_priv) +{ -+#ifdef PLATFORM_OS_XP -+ _irqL oldirql; -+#endif + u8 *data; + NDIS_STATUS status = NDIS_STATUS_SUCCESS; + PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); @@ -75531,9 +75418,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp_ioctl.c linux-5.11.4-rtl8 +#if 0 + PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); + -+#ifdef PLATFORM_OS_XP -+ _irqL oldirql; -+#endif + + u32 crystal_cap = 0; + @@ -75561,9 +75445,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp_ioctl.c linux-5.11.4-rtl8 + +NDIS_STATUS oid_rt_set_rx_packet_type_hdl(struct oid_par_priv *poid_par_priv) +{ -+#ifdef PLATFORM_OS_XP -+ _irqL oldirql; -+#endif + u8 rx_pkt_type; + /* u32 rcr_val32; */ + NDIS_STATUS status = NDIS_STATUS_SUCCESS; @@ -75643,9 +75524,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp_ioctl.c linux-5.11.4-rtl8 +#if 0 + PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); + -+#ifdef PLATFORM_OS_XP -+ _irqL oldirql; -+#endif + NDIS_STATUS status = NDIS_STATUS_SUCCESS; + + u32 txagc; @@ -75821,9 +75699,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp_ioctl.c linux-5.11.4-rtl8 +/* ------------------------------------------------------------------------------ */ +NDIS_STATUS oid_rt_set_power_down_hdl(struct oid_par_priv *poid_par_priv) +{ -+#ifdef PLATFORM_OS_XP -+ _irqL oldirql; -+#endif + u8 bpwrup; + NDIS_STATUS status = NDIS_STATUS_SUCCESS; +#ifdef PLATFORM_LINUX @@ -75862,9 +75737,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp_ioctl.c linux-5.11.4-rtl8 +#if 0 + NDIS_STATUS status = NDIS_STATUS_SUCCESS; + PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); -+ /* #ifdef PLATFORM_OS_XP */ -+ /* _irqL oldirql; -+ * #endif */ + + + if (poid_par_priv->type_of_oid != QUERY_OID) { @@ -75888,9 +75760,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_mp_ioctl.c linux-5.11.4-rtl8 + return 0; +#endif +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_odm.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_odm.c ---- linux-5.11.4/3rdparty/rtl8812au/core/rtw_odm.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_odm.c 2021-03-07 18:16:17.023954587 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/core/rtw_odm.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_odm.c +--- linux-6.3.4/drivers/staging/rtl8812au/core/rtw_odm.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_odm.c 2023-05-26 22:35:36.541136899 +0300 @@ -0,0 +1,420 @@ +/****************************************************************************** + * @@ -76167,7 +76039,7 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_odm.c linux-5.11.4-rtl8812au + RTW_PRINT("phys_t%u ta="MAC_FMT" %s, %s(band:%u, ch:%u, l_rxsc:%u)\n" + , *phys & 0xf + , MAC_ARG(get_ta(wlanhdr)) -+ , is_broadcast_mac_addr(get_ra(wlanhdr)) ? "BC" : is_multicast_mac_addr(get_ra(wlanhdr)) ? "MC" : "UC" ++ , is_broadcast_mac_addr(wifi_get_ra(wlanhdr)) ? "BC" : is_multicast_mac_addr(wifi_get_ra(wlanhdr)) ? "MC" : "UC" + , HDATA_RATE(attrib->data_rate) + , phys_t0->band, phys_t0->channel, phys_t0->rxsc + ); @@ -76283,7 +76155,7 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_odm.c linux-5.11.4-rtl8812au + RTW_PRINT("phys_t%u ta="MAC_FMT" %s, %s(band:%u, ch:%u, rf_mode:%u, l_rxsc:%u, ht_rxsc:%u) => %u,%u\n" + , *phys & 0xf + , MAC_ARG(get_ta(wlanhdr)) -+ , is_broadcast_mac_addr(get_ra(wlanhdr)) ? "BC" : is_multicast_mac_addr(get_ra(wlanhdr)) ? "MC" : "UC" ++ , is_broadcast_mac_addr(wifi_get_ra(wlanhdr)) ? "BC" : is_multicast_mac_addr(wifi_get_ra(wlanhdr)) ? "MC" : "UC" + , HDATA_RATE(attrib->data_rate) + , phys_t1->band, phys_t1->channel, phys_t1->rf_mode, phys_t1->l_rxsc, phys_t1->ht_rxsc + , pkt_cch, pkt_bw @@ -76301,7 +76173,7 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_odm.c linux-5.11.4-rtl8812au + RTW_PRINT("phys_t%u ta="MAC_FMT" %s, %s(band:%u, ch:%u, l_rxsc:%u, ht_rxsc:%u)\n" + , *phys & 0xf + , MAC_ARG(get_ta(wlanhdr)) -+ , is_broadcast_mac_addr(get_ra(wlanhdr)) ? "BC" : is_multicast_mac_addr(get_ra(wlanhdr)) ? "MC" : "UC" ++ , is_broadcast_mac_addr(wifi_get_ra(wlanhdr)) ? "BC" : is_multicast_mac_addr(wifi_get_ra(wlanhdr)) ? "MC" : "UC" + , HDATA_RATE(attrib->data_rate) + , phys_t2->band, phys_t2->channel, phys_t2->l_rxsc, phys_t2->ht_rxsc + ); @@ -76312,9 +76184,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_odm.c linux-5.11.4-rtl8812au + +} + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_p2p.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_p2p.c ---- linux-5.11.4/3rdparty/rtl8812au/core/rtw_p2p.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_p2p.c 2021-03-07 18:16:17.024954635 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/core/rtw_p2p.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_p2p.c +--- linux-6.3.4/drivers/staging/rtl8812au/core/rtw_p2p.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_p2p.c 2022-01-28 22:59:35.559651657 +0200 @@ -0,0 +1,5456 @@ +/****************************************************************************** + * @@ -81772,10 +81644,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_p2p.c linux-5.11.4-rtl8812au +} + +#endif /* CONFIG_P2P */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_pwrctrl.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_pwrctrl.c ---- linux-5.11.4/3rdparty/rtl8812au/core/rtw_pwrctrl.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_pwrctrl.c 2021-03-07 18:16:17.024954635 +0200 -@@ -0,0 +1,2765 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/core/rtw_pwrctrl.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_pwrctrl.c +--- linux-6.3.4/drivers/staging/rtl8812au/core/rtw_pwrctrl.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_pwrctrl.c 2023-05-26 22:35:36.541136899 +0300 +@@ -0,0 +1,2761 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. @@ -83868,10 +83740,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_pwrctrl.c linux-5.11.4-rtl88 + return; +#endif + -+#ifdef PLATFORM_WINDOWS -+ pwrctrlpriv->pnp_current_pwr_state = NdisDeviceStateD0; -+#endif -+ + _init_pwrlock(&pwrctrlpriv->lock); + _init_pwrlock(&pwrctrlpriv->check_32k_lock); + pwrctrlpriv->rf_pwrstate = rf_on; @@ -84541,10 +84409,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_pwrctrl.c linux-5.11.4-rtl88 + _rtw_ssmps(adapter, sta); +} + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_recv.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_recv.c ---- linux-5.11.4/3rdparty/rtl8812au/core/rtw_recv.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_recv.c 2021-03-07 18:16:17.025954682 +0200 -@@ -0,0 +1,5141 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/core/rtw_recv.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_recv.c +--- linux-6.3.4/drivers/staging/rtl8812au/core/rtw_recv.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_recv.c 2023-05-26 22:35:36.541136899 +0300 +@@ -0,0 +1,5125 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. @@ -87119,21 +86987,7 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_recv.c linux-5.11.4-rtl8812a + /* ptr -= 16; */ + /* _rtw_memcpy(ptr, get_rxmem(precvframe), 16); */ + } else { -+#ifdef PLATFORM_OS_XP -+ NDIS_PACKET_8021Q_INFO VlanPriInfo; -+ UINT32 UserPriority = precvframe->u.hdr.attrib.priority; -+ UINT32 VlanID = (pvlan != NULL ? get_vlan_id(pvlan) : 0); + -+ VlanPriInfo.Value = /* Get current value. */ -+ NDIS_PER_PACKET_INFO_FROM_PACKET(precvframe->u.hdr.pkt, Ieee8021QInfo); -+ -+ VlanPriInfo.TagHeader.UserPriority = UserPriority; -+ VlanPriInfo.TagHeader.VlanId = VlanID ; -+ -+ VlanPriInfo.TagHeader.CanonicalFormatId = 0; /* Should be zero. */ -+ VlanPriInfo.TagHeader.Reserved = 0; /* Should be zero. */ -+ NDIS_PER_PACKET_INFO_FROM_PACKET(precvframe->u.hdr.pkt, Ieee8021QInfo) = VlanPriInfo.Value; -+#endif + } + + if (eth_type == 0x8712) { /* append rx status for mp test packets */ @@ -87150,8 +87004,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_recv.c linux-5.11.4-rtl8812a + _rtw_memcpy(ptr + 12, ð_type, 2); + +exit: -+ -+ + return ret; +} +#endif @@ -89398,7 +89250,7 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_recv.c linux-5.11.4-rtl8812a + wlanhdr = get_recvframe_data(precvframe); + + ta = get_ta(wlanhdr); -+ ra = get_ra(wlanhdr); ++ ra = wifi_get_ra(wlanhdr); + is_ra_bmc = IS_MCAST(ra); + + if (_rtw_memcmp(adapter_mac_addr(padapter), ta, ETH_ALEN) == _TRUE) { @@ -89538,7 +89390,7 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_recv.c linux-5.11.4-rtl8812a +{ + s32 ret = _SUCCESS; + u8 *pbuf = precvframe->u.hdr.rx_data; -+ u8 *pda = get_ra(pbuf); ++ u8 *pda = wifi_get_ra(pbuf); + u8 ra_is_bmc = IS_MCAST(pda); + _adapter *primary_padapter = precvframe->u.hdr.adapter; +#ifdef CONFIG_CONCURRENT_MODE @@ -89686,10 +89538,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_recv.c linux-5.11.4-rtl8812a + ); +} +#endif /* DBG_RX_BH_TRACKING */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_rf.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_rf.c ---- linux-5.11.4/3rdparty/rtl8812au/core/rtw_rf.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_rf.c 2021-03-07 18:16:17.025954682 +0200 -@@ -0,0 +1,1394 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/core/rtw_rf.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_rf.c +--- linux-6.3.4/drivers/staging/rtl8812au/core/rtw_rf.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_rf.c 2022-01-28 22:59:35.560651705 +0200 +@@ -0,0 +1,1395 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. @@ -90143,7 +89995,7 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_rf.c linux-5.11.4-rtl8812au/ + return 2484; + else if (chan < 14) + return 2407 + chan * 5; -+ } else if (chan >= 36 && chan <= 177) ++ } else if (chan >= 15 && chan <= 177) + return 5000 + chan * 5; + + return 0; /* not supported */ @@ -90464,9 +90316,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_rf.c linux-5.11.4-rtl8812au/ + + RTW_PRINT_SEL(sel, "txpwr_lmt_2g_cck_ofdm_state:0x%02x\n", rfctl->txpwr_lmt_2g_cck_ofdm_state); + #ifdef CONFIG_IEEE80211_BAND_5GHZ -+ if (IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(adapter)) ++ if (IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(adapter)) { + RTW_PRINT_SEL(sel, "txpwr_lmt_5g_cck_ofdm_state:0x%02x\n", rfctl->txpwr_lmt_5g_cck_ofdm_state); + RTW_PRINT_SEL(sel, "txpwr_lmt_5g_20_40_ref:0x%02x\n", rfctl->txpwr_lmt_5g_20_40_ref); ++ } + #endif + RTW_PRINT_SEL(sel, "\n"); + @@ -91084,9 +90937,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_rf.c linux-5.11.4-rtl8812au/ + + return rtw_is_long_cac_range(hi, lo, dfs_region) ? _TRUE : _FALSE; +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_rm.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_rm.c ---- linux-5.11.4/3rdparty/rtl8812au/core/rtw_rm.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_rm.c 2021-03-07 18:16:17.025954682 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/core/rtw_rm.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_rm.c +--- linux-6.3.4/drivers/staging/rtl8812au/core/rtw_rm.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_rm.c 2022-01-28 22:59:35.561651752 +0200 @@ -0,0 +1,2470 @@ +/****************************************************************************** + * @@ -93558,9 +93411,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_rm.c linux-5.11.4-rtl8812au/ +#endif +} +#endif /* CONFIG_RTW_80211K */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_rm_fsm.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_rm_fsm.c ---- linux-5.11.4/3rdparty/rtl8812au/core/rtw_rm_fsm.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_rm_fsm.c 2021-03-07 18:16:17.025954682 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/core/rtw_rm_fsm.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_rm_fsm.c +--- linux-6.3.4/drivers/staging/rtl8812au/core/rtw_rm_fsm.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_rm_fsm.c 2022-01-28 22:59:35.561651752 +0200 @@ -0,0 +1,998 @@ +/****************************************************************************** + * @@ -94560,9 +94413,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_rm_fsm.c linux-5.11.4-rtl881 + rm_state_run(prm, RM_EV_state_in); +} +#endif /* CONFIG_RTW_80211K */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_rson.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_rson.c ---- linux-5.11.4/3rdparty/rtl8812au/core/rtw_rson.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_rson.c 2021-03-07 18:16:17.025954682 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/core/rtw_rson.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_rson.c +--- linux-6.3.4/drivers/staging/rtl8812au/core/rtw_rson.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_rson.c 2022-01-28 22:59:35.561651752 +0200 @@ -0,0 +1,595 @@ +/****************************************************************************** + * @@ -95159,9 +95012,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_rson.c linux-5.11.4-rtl8812a +} + +#endif /* CONFIG_RTW_REPEATER_SON */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_sdio.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_sdio.c ---- linux-5.11.4/3rdparty/rtl8812au/core/rtw_sdio.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_sdio.c 2021-03-07 18:16:17.025954682 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/core/rtw_sdio.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_sdio.c +--- linux-6.3.4/drivers/staging/rtl8812au/core/rtw_sdio.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_sdio.c 2022-01-28 22:59:35.561651752 +0200 @@ -0,0 +1,130 @@ +/****************************************************************************** + * @@ -95293,9 +95146,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_sdio.c linux-5.11.4-rtl8812a + + return ret; +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_security.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_security.c ---- linux-5.11.4/3rdparty/rtl8812au/core/rtw_security.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_security.c 2021-03-07 18:16:17.026954729 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/core/rtw_security.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_security.c +--- linux-6.3.4/drivers/staging/rtl8812au/core/rtw_security.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_security.c 2022-12-18 17:40:24.573937030 +0200 @@ -0,0 +1,3122 @@ +/****************************************************************************** + * @@ -96872,7 +96725,7 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_security.c linux-5.11.4-rtl8 + pframe = ((struct xmit_frame *)pxmitframe)->buf_addr + hw_hdr_offset; + + /* 4 start to encrypt each fragment */ -+ if ((pattrib->encrypt == _AES_)) { ++ if (pattrib->encrypt == _AES_) { + /* + if(pattrib->psta) + { @@ -97227,7 +97080,7 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_security.c linux-5.11.4-rtl8 + u32 res = _SUCCESS; + pframe = (unsigned char *)((union recv_frame *)precvframe)->u.hdr.rx_data; + /* 4 start to encrypt each fragment */ -+ if ((prxattrib->encrypt == _AES_)) { ++ if (prxattrib->encrypt == _AES_) { + + stainfo = rtw_get_stainfo(&padapter->stapriv , &prxattrib->ta[0]); + if (stainfo != NULL) { @@ -98419,9 +98272,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_security.c linux-5.11.4-rtl8 + return crc; +} +#endif /*CONFIG_WOWLAN*/ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_sreset.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_sreset.c ---- linux-5.11.4/3rdparty/rtl8812au/core/rtw_sreset.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_sreset.c 2021-03-07 18:16:17.026954729 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/core/rtw_sreset.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_sreset.c +--- linux-6.3.4/drivers/staging/rtl8812au/core/rtw_sreset.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_sreset.c 2022-01-28 22:59:35.561651752 +0200 @@ -0,0 +1,314 @@ +/****************************************************************************** + * @@ -98737,10 +98590,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_sreset.c linux-5.11.4-rtl881 + psrtpriv->rx_cnt = 0; +#endif +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_sta_mgt.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_sta_mgt.c ---- linux-5.11.4/3rdparty/rtl8812au/core/rtw_sta_mgt.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_sta_mgt.c 2021-03-07 18:16:17.026954729 +0200 -@@ -0,0 +1,1323 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/core/rtw_sta_mgt.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_sta_mgt.c +--- linux-6.3.4/drivers/staging/rtl8812au/core/rtw_sta_mgt.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_sta_mgt.c 2022-12-18 17:40:24.573937030 +0200 +@@ -0,0 +1,1319 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. @@ -99108,21 +98961,17 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_sta_mgt.c linux-5.11.4-rtl88 + +} + -+void rtw_mfree_stainfo(struct sta_info *psta); +void rtw_mfree_stainfo(struct sta_info *psta) +{ + -+ if (&psta->lock != NULL) -+ _rtw_spinlock_free(&psta->lock); ++ _rtw_spinlock_free(&psta->lock); + + _rtw_free_sta_xmit_priv_lock(&psta->sta_xmitpriv); + _rtw_free_sta_recv_priv_lock(&psta->sta_recvpriv); + +} + -+ +/* this function is used to free the memory of lock || sema for all stainfos */ -+void rtw_mfree_all_stainfo(struct sta_priv *pstapriv); +void rtw_mfree_all_stainfo(struct sta_priv *pstapriv) +{ + _irqL irqL; @@ -100064,9 +99913,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_sta_mgt.c linux-5.11.4-rtl88 +} +#endif /* CONFIG_RTW_PRE_LINK_STA */ + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_tdls.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_tdls.c ---- linux-5.11.4/3rdparty/rtl8812au/core/rtw_tdls.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_tdls.c 2021-03-07 18:16:17.026954729 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/core/rtw_tdls.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_tdls.c +--- linux-6.3.4/drivers/staging/rtl8812au/core/rtw_tdls.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_tdls.c 2022-01-28 22:59:35.562651800 +0200 @@ -0,0 +1,3505 @@ +/****************************************************************************** + * @@ -103573,9 +103422,1148 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_tdls.c linux-5.11.4-rtl8812a +} + +#endif /* CONFIG_TDLS */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_wapi.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_wapi.c ---- linux-5.11.4/3rdparty/rtl8812au/core/rtw_wapi.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_wapi.c 2021-03-07 18:16:17.027954777 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/core/rtw_vht.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_vht.c +--- linux-6.3.4/drivers/staging/rtl8812au/core/rtw_vht.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_vht.c 2022-01-28 22:59:35.562651800 +0200 +@@ -0,0 +1,1135 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2017 Realtek Corporation. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ *****************************************************************************/ ++#define _RTW_VHT_C ++ ++#include ++#include ++ ++#ifdef CONFIG_80211AC_VHT ++const u16 _vht_max_mpdu_len[] = { ++ 3895, ++ 7991, ++ 11454, ++ 0, ++}; ++ ++const u8 _vht_sup_ch_width_set_to_bw_cap[] = { ++ BW_CAP_80M, ++ BW_CAP_80M | BW_CAP_160M, ++ BW_CAP_80M | BW_CAP_160M | BW_CAP_80_80M, ++ 0, ++}; ++ ++const char *const _vht_sup_ch_width_set_str[] = { ++ "80MHz", ++ "160MHz", ++ "160MHz & 80+80MHz", ++ "BW-RSVD", ++}; ++ ++void dump_vht_cap_ie_content(void *sel, const u8 *buf, u32 buf_len) ++{ ++ if (buf_len != VHT_CAP_IE_LEN) { ++ RTW_PRINT_SEL(sel, "Invalid VHT capability IE len:%d != %d\n", buf_len, VHT_CAP_IE_LEN); ++ return; ++ } ++ ++ RTW_PRINT_SEL(sel, "cap_info:%02x %02x %02x %02x: MAX_MPDU_LEN:%u %s%s%s%s%s RX-STBC:%u MAX_AMPDU_LEN:%u\n" ++ , *(buf), *(buf + 1), *(buf + 2), *(buf + 3) ++ , vht_max_mpdu_len(GET_VHT_CAPABILITY_ELE_MAX_MPDU_LENGTH(buf)) ++ , vht_sup_ch_width_set_str(GET_VHT_CAPABILITY_ELE_CHL_WIDTH(buf)) ++ , GET_VHT_CAPABILITY_ELE_RX_LDPC(buf) ? " RX-LDPC" : "" ++ , GET_VHT_CAPABILITY_ELE_SHORT_GI80M(buf) ? " SGI-80" : "" ++ , GET_VHT_CAPABILITY_ELE_SHORT_GI160M(buf) ? " SGI-160" : "" ++ , GET_VHT_CAPABILITY_ELE_TX_STBC(buf) ? " TX-STBC" : "" ++ , GET_VHT_CAPABILITY_ELE_RX_STBC(buf) ++ , VHT_MAX_AMPDU_LEN(GET_VHT_CAPABILITY_ELE_MAX_RXAMPDU_FACTOR(buf)) ++ ); ++} ++ ++void dump_vht_cap_ie(void *sel, const u8 *ie, u32 ie_len) ++{ ++ const u8 *vht_cap_ie; ++ sint vht_cap_ielen; ++ ++ vht_cap_ie = rtw_get_ie(ie, WLAN_EID_VHT_CAPABILITY, &vht_cap_ielen, ie_len); ++ if (!ie || vht_cap_ie != ie) ++ return; ++ ++ dump_vht_cap_ie_content(sel, vht_cap_ie + 2, vht_cap_ielen); ++} ++ ++const char *const _vht_op_ch_width_str[] = { ++ "20 or 40MHz", ++ "80MHz", ++ "160MHz", ++ "80+80MHz", ++ "BW-RSVD", ++}; ++ ++void dump_vht_op_ie_content(void *sel, const u8 *buf, u32 buf_len) ++{ ++ if (buf_len != VHT_OP_IE_LEN) { ++ RTW_PRINT_SEL(sel, "Invalid VHT operation IE len:%d != %d\n", buf_len, VHT_OP_IE_LEN); ++ return; ++ } ++ ++ RTW_PRINT_SEL(sel, "%s, ch0:%u, ch1:%u\n" ++ , vht_op_ch_width_str(GET_VHT_OPERATION_ELE_CHL_WIDTH(buf)) ++ , GET_VHT_OPERATION_ELE_CENTER_FREQ1(buf) ++ , GET_VHT_OPERATION_ELE_CENTER_FREQ2(buf) ++ ); ++} ++ ++void dump_vht_op_ie(void *sel, const u8 *ie, u32 ie_len) ++{ ++ const u8 *vht_op_ie; ++ sint vht_op_ielen; ++ ++ vht_op_ie = rtw_get_ie(ie, WLAN_EID_VHT_OPERATION, &vht_op_ielen, ie_len); ++ if (!ie || vht_op_ie != ie) ++ return; ++ ++ dump_vht_op_ie_content(sel, vht_op_ie + 2, vht_op_ielen); ++} ++ ++/* 20/40/80, ShortGI, MCS Rate */ ++const u16 VHT_MCS_DATA_RATE[3][2][30] = { ++ { { ++ 13, 26, 39, 52, 78, 104, 117, 130, 156, 156, ++ 26, 52, 78, 104, 156, 208, 234, 260, 312, 312, ++ 39, 78, 117, 156, 234, 312, 351, 390, 468, 520 ++ }, /* Long GI, 20MHz */ ++ { ++ 14, 29, 43, 58, 87, 116, 130, 144, 173, 173, ++ 29, 58, 87, 116, 173, 231, 260, 289, 347, 347, ++ 43, 87, 130, 173, 260, 347, 390, 433, 520, 578 ++ } ++ }, /* Short GI, 20MHz */ ++ { { ++ 27, 54, 81, 108, 162, 216, 243, 270, 324, 360, ++ 54, 108, 162, 216, 324, 432, 486, 540, 648, 720, ++ 81, 162, 243, 324, 486, 648, 729, 810, 972, 1080 ++ }, /* Long GI, 40MHz */ ++ { ++ 30, 60, 90, 120, 180, 240, 270, 300, 360, 400, ++ 60, 120, 180, 240, 360, 480, 540, 600, 720, 800, ++ 90, 180, 270, 360, 540, 720, 810, 900, 1080, 1200 ++ } ++ }, /* Short GI, 40MHz */ ++ { { ++ 59, 117, 176, 234, 351, 468, 527, 585, 702, 780, ++ 117, 234, 351, 468, 702, 936, 1053, 1170, 1404, 1560, ++ 176, 351, 527, 702, 1053, 1404, 1580, 1755, 2106, 2340 ++ }, /* Long GI, 80MHz */ ++ { ++ 65, 130, 195, 260, 390, 520, 585, 650, 780, 867, ++ 130, 260, 390, 520, 780, 1040, 1170, 1300, 1560, 1734, ++ 195, 390, 585, 780, 1170, 1560, 1755, 1950, 2340, 2600 ++ } ++ } /* Short GI, 80MHz */ ++}; ++ ++u8 rtw_get_vht_highest_rate(u8 *pvht_mcs_map) ++{ ++ u8 i, j; ++ u8 bit_map; ++ u8 vht_mcs_rate = 0; ++ ++ for (i = 0; i < 2; i++) { ++ if (pvht_mcs_map[i] != 0xff) { ++ for (j = 0; j < 8; j += 2) { ++ bit_map = (pvht_mcs_map[i] >> j) & 3; ++ ++ if (bit_map != 3) ++ vht_mcs_rate = MGN_VHT1SS_MCS7 + 10 * j / 2 + i * 40 + bit_map; /* VHT rate indications begin from 0x90 */ ++ } ++ } ++ } ++ ++ /* RTW_INFO("HighestVHTMCSRate is %x\n", vht_mcs_rate); */ ++ return vht_mcs_rate; ++} ++ ++u8 rtw_vht_mcsmap_to_nss(u8 *pvht_mcs_map) ++{ ++ u8 i, j; ++ u8 bit_map; ++ u8 nss = 0; ++ ++ for (i = 0; i < 2; i++) { ++ if (pvht_mcs_map[i] != 0xff) { ++ for (j = 0; j < 8; j += 2) { ++ bit_map = (pvht_mcs_map[i] >> j) & 3; ++ ++ if (bit_map != 3) ++ nss++; ++ } ++ } ++ } ++ ++ /* RTW_INFO("%s : %dSS\n", __FUNCTION__, nss); */ ++ return nss; ++} ++ ++void rtw_vht_nss_to_mcsmap(u8 nss, u8 *target_mcs_map, u8 *cur_mcs_map) ++{ ++ u8 i, j; ++ u8 cur_rate, target_rate; ++ ++ for (i = 0; i < 2; i++) { ++ target_mcs_map[i] = 0; ++ for (j = 0; j < 8; j += 2) { ++ cur_rate = (cur_mcs_map[i] >> j) & 3; ++ if (cur_rate == 3) /* 0x3 indicates not supported that num of SS */ ++ target_rate = 3; ++ else if (nss <= ((j / 2) + i * 4)) ++ target_rate = 3; ++ else ++ target_rate = cur_rate; ++ ++ target_mcs_map[i] |= (target_rate << j); ++ } ++ } ++ ++ /* RTW_INFO("%s : %dSS\n", __FUNCTION__, nss); */ ++} ++ ++u16 rtw_vht_mcs_to_data_rate(u8 bw, u8 short_GI, u8 vht_mcs_rate) ++{ ++ if (vht_mcs_rate > MGN_VHT3SS_MCS9) ++ vht_mcs_rate = MGN_VHT3SS_MCS9; ++ /* RTW_INFO("bw=%d, short_GI=%d, ((vht_mcs_rate - MGN_VHT1SS_MCS0)&0x3f)=%d\n", bw, short_GI, ((vht_mcs_rate - MGN_VHT1SS_MCS0)&0x3f)); */ ++ return VHT_MCS_DATA_RATE[bw][short_GI][((vht_mcs_rate - MGN_VHT1SS_MCS0) & 0x3f)]; ++} ++ ++void rtw_vht_use_default_setting(_adapter *padapter) ++{ ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; ++ struct registry_priv *pregistrypriv = &padapter->registrypriv; ++ BOOLEAN bHwLDPCSupport = _FALSE, bHwSTBCSupport = _FALSE; ++#ifdef CONFIG_BEAMFORMING ++ BOOLEAN bHwSupportBeamformer = _FALSE, bHwSupportBeamformee = _FALSE; ++ u8 mu_bfer, mu_bfee; ++#endif /* CONFIG_BEAMFORMING */ ++ u8 rf_type = 0; ++ u8 tx_nss, rx_nss; ++ struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ pvhtpriv->sgi_80m = TEST_FLAG(pregistrypriv->short_gi, BIT2) ? _TRUE : _FALSE; ++ ++ /* LDPC support */ ++ rtw_hal_get_def_var(padapter, HAL_DEF_RX_LDPC, (u8 *)&bHwLDPCSupport); ++ CLEAR_FLAGS(pvhtpriv->ldpc_cap); ++ if (bHwLDPCSupport) { ++ if (TEST_FLAG(pregistrypriv->ldpc_cap, BIT0)) ++ SET_FLAG(pvhtpriv->ldpc_cap, LDPC_VHT_ENABLE_RX); ++ } ++ rtw_hal_get_def_var(padapter, HAL_DEF_TX_LDPC, (u8 *)&bHwLDPCSupport); ++ if (bHwLDPCSupport) { ++ if (TEST_FLAG(pregistrypriv->ldpc_cap, BIT1)) ++ SET_FLAG(pvhtpriv->ldpc_cap, LDPC_VHT_ENABLE_TX); ++ } ++ if (pvhtpriv->ldpc_cap) ++ RTW_INFO("[VHT] Support LDPC = 0x%02X\n", pvhtpriv->ldpc_cap); ++ ++ /* STBC */ ++ rtw_hal_get_def_var(padapter, HAL_DEF_TX_STBC, (u8 *)&bHwSTBCSupport); ++ CLEAR_FLAGS(pvhtpriv->stbc_cap); ++ if (bHwSTBCSupport) { ++ if (TEST_FLAG(pregistrypriv->stbc_cap, BIT1)) ++ SET_FLAG(pvhtpriv->stbc_cap, STBC_VHT_ENABLE_TX); ++ } ++ rtw_hal_get_def_var(padapter, HAL_DEF_RX_STBC, (u8 *)&bHwSTBCSupport); ++ if (bHwSTBCSupport) { ++ if (TEST_FLAG(pregistrypriv->stbc_cap, BIT0)) ++ SET_FLAG(pvhtpriv->stbc_cap, STBC_VHT_ENABLE_RX); ++ } ++ if (pvhtpriv->stbc_cap) ++ RTW_INFO("[VHT] Support STBC = 0x%02X\n", pvhtpriv->stbc_cap); ++ ++ /* Beamforming setting */ ++ CLEAR_FLAGS(pvhtpriv->beamform_cap); ++#ifdef CONFIG_BEAMFORMING ++#ifdef RTW_BEAMFORMING_VERSION_2 ++ /* only enable beamforming in STA client mode */ ++ if (MLME_IS_STA(padapter) && !MLME_IS_GC(padapter) ++ && !MLME_IS_ADHOC(padapter) ++ && !MLME_IS_MESH(padapter)) ++#endif ++ { ++ rtw_hal_get_def_var(padapter, HAL_DEF_EXPLICIT_BEAMFORMER, ++ (u8 *)&bHwSupportBeamformer); ++ rtw_hal_get_def_var(padapter, HAL_DEF_EXPLICIT_BEAMFORMEE, ++ (u8 *)&bHwSupportBeamformee); ++ mu_bfer = _FALSE; ++ mu_bfee = _FALSE; ++ rtw_hal_get_def_var(padapter, HAL_DEF_VHT_MU_BEAMFORMER, &mu_bfer); ++ rtw_hal_get_def_var(padapter, HAL_DEF_VHT_MU_BEAMFORMEE, &mu_bfee); ++ if (TEST_FLAG(pregistrypriv->beamform_cap, BIT0) && bHwSupportBeamformer) { ++#ifdef CONFIG_CONCURRENT_MODE ++ if ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE) { ++ SET_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE); ++ RTW_INFO("[VHT] CONCURRENT AP Support Beamformer\n"); ++ if (TEST_FLAG(pregistrypriv->beamform_cap, BIT(2)) ++ && (_TRUE == mu_bfer)) { ++ SET_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_MU_MIMO_AP_ENABLE); ++ RTW_INFO("[VHT] Support MU-MIMO AP\n"); ++ } ++ } else ++ RTW_INFO("[VHT] CONCURRENT not AP ;not allow Support Beamformer\n"); ++#else ++ SET_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE); ++ RTW_INFO("[VHT] Support Beamformer\n"); ++ if (TEST_FLAG(pregistrypriv->beamform_cap, BIT(2)) ++ && (_TRUE == mu_bfer) ++ && ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE)) { ++ SET_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_MU_MIMO_AP_ENABLE); ++ RTW_INFO("[VHT] Support MU-MIMO AP\n"); ++ } ++#endif ++ } ++ if (TEST_FLAG(pregistrypriv->beamform_cap, BIT1) && bHwSupportBeamformee) { ++ SET_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE); ++ RTW_INFO("[VHT] Support Beamformee\n"); ++ if (TEST_FLAG(pregistrypriv->beamform_cap, BIT(3)) ++ && (_TRUE == mu_bfee) ++ && ((pmlmeinfo->state & 0x03) != WIFI_FW_AP_STATE)) { ++ SET_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_MU_MIMO_STA_ENABLE); ++ RTW_INFO("[VHT] Support MU-MIMO STA\n"); ++ } ++ } ++ } ++#endif /* CONFIG_BEAMFORMING */ ++ ++ pvhtpriv->ampdu_len = pregistrypriv->ampdu_factor; ++ ++ rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); ++ tx_nss = rtw_min(rf_type_to_rf_tx_cnt(rf_type), hal_spec->tx_nss_num); ++ rx_nss = rtw_min(rf_type_to_rf_rx_cnt(rf_type), hal_spec->rx_nss_num); ++ ++ /* for now, vhtpriv.vht_mcs_map comes from RX NSS */ ++ rtw_vht_nss_to_mcsmap(rx_nss, pvhtpriv->vht_mcs_map, pregistrypriv->vht_rx_mcs_map); ++ pvhtpriv->vht_highest_rate = rtw_get_vht_highest_rate(pvhtpriv->vht_mcs_map); ++} ++ ++u64 rtw_vht_mcs_map_to_bitmap(u8 *mcs_map, u8 nss) ++{ ++ u8 i, j, tmp; ++ u64 bitmap = 0; ++ u8 bits_nss = nss * 2; ++ ++ for (i = j = 0; i < bits_nss; i += 2, j += 10) { ++ /* every two bits means single sptial stream */ ++ tmp = (mcs_map[i / 8] >> i) & 3; ++ ++ switch (tmp) { ++ case 2: ++ bitmap = bitmap | (0x03ff << j); ++ break; ++ case 1: ++ bitmap = bitmap | (0x01ff << j); ++ break; ++ case 0: ++ bitmap = bitmap | (0x00ff << j); ++ break; ++ default: ++ break; ++ } ++ } ++ ++ RTW_INFO("vht_mcs_map=%02x %02x, nss=%u => bitmap=%016llx\n" ++ , mcs_map[0], mcs_map[1], nss, bitmap); ++ ++ return bitmap; ++} ++ ++#ifdef CONFIG_BEAMFORMING ++void update_sta_vht_info_apmode_bf_cap(_adapter *padapter, struct sta_info *psta) ++{ ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct vht_priv *pvhtpriv_ap = &pmlmepriv->vhtpriv; ++ struct vht_priv *pvhtpriv_sta = &psta->vhtpriv; ++ u16 cur_beamform_cap = 0; ++ ++ /* B11 SU Beamformer Capable, the target supports Beamformer and we are Beamformee */ ++ if (TEST_FLAG(pvhtpriv_ap->beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE) && ++ GET_VHT_CAPABILITY_ELE_SU_BFEE(pvhtpriv_sta->vht_cap)) { ++ SET_FLAG(cur_beamform_cap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE); ++ /*Shift to BEAMFORMING_VHT_BEAMFORMER_STS_CAP*/ ++ SET_FLAG(cur_beamform_cap, GET_VHT_CAPABILITY_ELE_SU_BFEE_STS_CAP(pvhtpriv_sta->vht_cap) << 8); ++ } ++ ++ /* B12 SU Beamformee Capable, the target supports Beamformee and we are Beamformer */ ++ if (TEST_FLAG(pvhtpriv_ap->beamform_cap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE) && ++ GET_VHT_CAPABILITY_ELE_SU_BFER(pvhtpriv_sta->vht_cap)) { ++ SET_FLAG(cur_beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE); ++ /*Shit to BEAMFORMING_VHT_BEAMFORMEE_SOUND_DIM*/ ++ SET_FLAG(cur_beamform_cap, GET_VHT_CAPABILITY_ELE_SU_BFER_SOUND_DIM_NUM(pvhtpriv_sta->vht_cap) << 12); ++ } ++ ++ if (cur_beamform_cap) ++ RTW_INFO("Current STA(%d) VHT Beamforming Setting = %02X\n", psta->cmn.aid, cur_beamform_cap); ++ ++ pvhtpriv_sta->beamform_cap = cur_beamform_cap; ++ psta->cmn.bf_info.vht_beamform_cap = cur_beamform_cap; ++} ++#endif ++ ++void update_sta_vht_info_apmode(_adapter *padapter, PVOID sta) ++{ ++ struct sta_info *psta = (struct sta_info *)sta; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct vht_priv *pvhtpriv_ap = &pmlmepriv->vhtpriv; ++ struct vht_priv *pvhtpriv_sta = &psta->vhtpriv; ++ u8 cur_ldpc_cap = 0, cur_stbc_cap = 0; ++ s8 bw_mode = -1; ++ u8 *pcap_mcs; ++ ++ if (pvhtpriv_sta->vht_option == _FALSE) ++ return; ++ ++ if (pvhtpriv_sta->op_present) { ++ switch (GET_VHT_OPERATION_ELE_CHL_WIDTH(pvhtpriv_sta->vht_op)) { ++ case 1: /* 80MHz */ ++ case 2: /* 160MHz */ ++ case 3: /* 80+80 */ ++ bw_mode = CHANNEL_WIDTH_80; /* only support up to 80MHz for now */ ++ break; ++ } ++ } ++ ++ if (pvhtpriv_sta->notify_present) ++ bw_mode = GET_VHT_OPERATING_MODE_FIELD_CHNL_WIDTH(&pvhtpriv_sta->vht_op_mode_notify); ++ else if (MLME_IS_AP(padapter)) { ++ /* for VHT client without Operating Mode Notify IE; minimal 80MHz */ ++ if (bw_mode < CHANNEL_WIDTH_80) ++ bw_mode = CHANNEL_WIDTH_80; ++ } ++ ++ if (bw_mode != -1) ++ psta->cmn.bw_mode = bw_mode; /* update bw_mode only if get value from VHT IEs */ ++ ++ psta->cmn.ra_info.is_vht_enable = _TRUE; ++ ++ /* B4 Rx LDPC */ ++ if (TEST_FLAG(pvhtpriv_ap->ldpc_cap, LDPC_VHT_ENABLE_TX) && ++ GET_VHT_CAPABILITY_ELE_RX_LDPC(pvhtpriv_sta->vht_cap)) { ++ SET_FLAG(cur_ldpc_cap, (LDPC_VHT_ENABLE_TX | LDPC_VHT_CAP_TX)); ++ RTW_INFO("Current STA(%d) VHT LDPC = %02X\n", psta->cmn.aid, cur_ldpc_cap); ++ } ++ pvhtpriv_sta->ldpc_cap = cur_ldpc_cap; ++ ++ if (psta->cmn.bw_mode > pmlmeext->cur_bwmode) ++ psta->cmn.bw_mode = pmlmeext->cur_bwmode; ++ ++ if (psta->cmn.bw_mode == CHANNEL_WIDTH_80) { ++ /* B5 Short GI for 80 MHz */ ++ pvhtpriv_sta->sgi_80m = (GET_VHT_CAPABILITY_ELE_SHORT_GI80M(pvhtpriv_sta->vht_cap) & pvhtpriv_ap->sgi_80m) ? _TRUE : _FALSE; ++ /* RTW_INFO("Current STA ShortGI80MHz = %d\n", pvhtpriv_sta->sgi_80m); */ ++ } else if (psta->cmn.bw_mode >= CHANNEL_WIDTH_160) { ++ /* B5 Short GI for 80 MHz */ ++ pvhtpriv_sta->sgi_80m = (GET_VHT_CAPABILITY_ELE_SHORT_GI160M(pvhtpriv_sta->vht_cap) & pvhtpriv_ap->sgi_80m) ? _TRUE : _FALSE; ++ /* RTW_INFO("Current STA ShortGI160MHz = %d\n", pvhtpriv_sta->sgi_80m); */ ++ } ++ ++ /* B8 B9 B10 Rx STBC */ ++ if (TEST_FLAG(pvhtpriv_ap->stbc_cap, STBC_VHT_ENABLE_TX) && ++ GET_VHT_CAPABILITY_ELE_RX_STBC(pvhtpriv_sta->vht_cap)) { ++ SET_FLAG(cur_stbc_cap, (STBC_VHT_ENABLE_TX | STBC_VHT_CAP_TX)); ++ RTW_INFO("Current STA(%d) VHT STBC = %02X\n", psta->cmn.aid, cur_stbc_cap); ++ } ++ pvhtpriv_sta->stbc_cap = cur_stbc_cap; ++ ++#ifdef CONFIG_BEAMFORMING ++ update_sta_vht_info_apmode_bf_cap(padapter, psta); ++#endif ++ ++ /* B23 B24 B25 Maximum A-MPDU Length Exponent */ ++ pvhtpriv_sta->ampdu_len = GET_VHT_CAPABILITY_ELE_MAX_RXAMPDU_FACTOR(pvhtpriv_sta->vht_cap); ++ ++ pcap_mcs = GET_VHT_CAPABILITY_ELE_RX_MCS(pvhtpriv_sta->vht_cap); ++ _rtw_memcpy(pvhtpriv_sta->vht_mcs_map, pcap_mcs, 2); ++ pvhtpriv_sta->vht_highest_rate = rtw_get_vht_highest_rate(pvhtpriv_sta->vht_mcs_map); ++} ++ ++void update_hw_vht_param(_adapter *padapter) ++{ ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u8 ht_AMPDU_len; ++ ++ ht_AMPDU_len = pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x03; ++ ++ if (pvhtpriv->ampdu_len > ht_AMPDU_len) ++ rtw_hal_set_hwreg(padapter, HW_VAR_AMPDU_FACTOR, (u8 *)(&pvhtpriv->ampdu_len)); ++} ++ ++#ifdef ROKU_PRIVATE ++u8 VHT_get_ss_from_map(u8 *vht_mcs_map) ++{ ++ u8 i, j; ++ u8 ss = 0; ++ ++ for (i = 0; i < 2; i++) { ++ if (vht_mcs_map[i] != 0xff) { ++ for (j = 0; j < 8; j += 2) { ++ if (((vht_mcs_map[i] >> j) & 0x03) == 0x03) ++ break; ++ ss++; ++ } ++ } ++ ++ } ++ ++return ss; ++} ++ ++void VHT_caps_handler_infra_ap(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) ++{ ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct vht_priv_infra_ap *pvhtpriv = &pmlmepriv->vhtpriv_infra_ap; ++ u8 cur_stbc_cap_infra_ap = 0; ++ u16 cur_beamform_cap_infra_ap = 0; ++ u8 *pcap_mcs; ++ u8 *pcap_mcs_tx; ++ u8 Rx_ss = 0, Tx_ss = 0; ++ ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ if (pIE == NULL) ++ return; ++ ++ pmlmeinfo->ht_vht_received |= BIT(1); ++ ++ pvhtpriv->ldpc_cap_infra_ap = GET_VHT_CAPABILITY_ELE_RX_LDPC(pIE->data); ++ ++ if (GET_VHT_CAPABILITY_ELE_RX_STBC(pIE->data)) ++ SET_FLAG(cur_stbc_cap_infra_ap, STBC_VHT_ENABLE_RX); ++ if (GET_VHT_CAPABILITY_ELE_TX_STBC(pIE->data)) ++ SET_FLAG(cur_stbc_cap_infra_ap, STBC_VHT_ENABLE_TX); ++ pvhtpriv->stbc_cap_infra_ap = cur_stbc_cap_infra_ap; ++ ++ /*store ap info for channel bandwidth*/ ++ pvhtpriv->channel_width_infra_ap = GET_VHT_CAPABILITY_ELE_CHL_WIDTH(pIE->data); ++ ++ /*check B11: SU Beamformer Capable and B12: SU Beamformee B19: MU Beamformer B20:MU Beamformee*/ ++ if (GET_VHT_CAPABILITY_ELE_SU_BFER(pIE->data)) ++ SET_FLAG(cur_beamform_cap_infra_ap, BEAMFORMING_VHT_BEAMFORMER_ENABLE); ++ if (GET_VHT_CAPABILITY_ELE_SU_BFEE(pIE->data)) ++ SET_FLAG(cur_beamform_cap_infra_ap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE); ++ if (GET_VHT_CAPABILITY_ELE_MU_BFER(pIE->data)) ++ SET_FLAG(cur_beamform_cap_infra_ap, BEAMFORMING_VHT_MU_MIMO_AP_ENABLE); ++ if (GET_VHT_CAPABILITY_ELE_MU_BFEE(pIE->data)) ++ SET_FLAG(cur_beamform_cap_infra_ap, BEAMFORMING_VHT_MU_MIMO_STA_ENABLE); ++ pvhtpriv->beamform_cap_infra_ap = cur_beamform_cap_infra_ap; ++ ++ /*store information about vht_mcs_set*/ ++ pcap_mcs = GET_VHT_CAPABILITY_ELE_RX_MCS(pIE->data); ++ pcap_mcs_tx = GET_VHT_CAPABILITY_ELE_TX_MCS(pIE->data); ++ _rtw_memcpy(pvhtpriv->vht_mcs_map_infra_ap, pcap_mcs, 2); ++ _rtw_memcpy(pvhtpriv->vht_mcs_map_tx_infra_ap, pcap_mcs_tx, 2); ++ ++ Rx_ss = VHT_get_ss_from_map(pvhtpriv->vht_mcs_map_infra_ap); ++ Tx_ss = VHT_get_ss_from_map(pvhtpriv->vht_mcs_map_tx_infra_ap); ++ if (Rx_ss >= Tx_ss) { ++ pvhtpriv->number_of_streams_infra_ap = Rx_ss; ++ } else{ ++ pvhtpriv->number_of_streams_infra_ap = Tx_ss; ++ } ++ ++} ++#endif /* ROKU_PRIVATE */ ++ ++void VHT_caps_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) ++{ ++ struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u8 cur_ldpc_cap = 0, cur_stbc_cap = 0, rf_type = RF_1T1R, tx_nss = 0; ++ u16 cur_beamform_cap = 0; ++ u8 *pcap_mcs; ++ ++ if (pIE == NULL) ++ return; ++ ++ if (pvhtpriv->vht_option == _FALSE) ++ return; ++ ++ pmlmeinfo->VHT_enable = 1; ++ ++ /* B4 Rx LDPC */ ++ if (TEST_FLAG(pvhtpriv->ldpc_cap, LDPC_VHT_ENABLE_TX) && ++ GET_VHT_CAPABILITY_ELE_RX_LDPC(pIE->data)) { ++ SET_FLAG(cur_ldpc_cap, (LDPC_VHT_ENABLE_TX | LDPC_VHT_CAP_TX)); ++ RTW_INFO("Current VHT LDPC Setting = %02X\n", cur_ldpc_cap); ++ } ++ pvhtpriv->ldpc_cap = cur_ldpc_cap; ++ ++ /* B5 Short GI for 80 MHz */ ++ pvhtpriv->sgi_80m = (GET_VHT_CAPABILITY_ELE_SHORT_GI80M(pIE->data) & pvhtpriv->sgi_80m) ? _TRUE : _FALSE; ++ /* RTW_INFO("Current ShortGI80MHz = %d\n", pvhtpriv->sgi_80m); */ ++ ++ /* B8 B9 B10 Rx STBC */ ++ if (TEST_FLAG(pvhtpriv->stbc_cap, STBC_VHT_ENABLE_TX) && ++ GET_VHT_CAPABILITY_ELE_RX_STBC(pIE->data)) { ++ SET_FLAG(cur_stbc_cap, (STBC_VHT_ENABLE_TX | STBC_VHT_CAP_TX)); ++ RTW_INFO("Current VHT STBC Setting = %02X\n", cur_stbc_cap); ++ } ++ pvhtpriv->stbc_cap = cur_stbc_cap; ++#ifdef CONFIG_BEAMFORMING ++#ifdef RTW_BEAMFORMING_VERSION_2 ++ /* ++ * B11 SU Beamformer Capable, ++ * the target supports Beamformer and we are Beamformee ++ */ ++ if (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE) ++ && GET_VHT_CAPABILITY_ELE_SU_BFER(pIE->data)) { ++ SET_FLAG(cur_beamform_cap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE); ++ ++ /* Shift to BEAMFORMING_VHT_BEAMFORMEE_STS_CAP */ ++ SET_FLAG(cur_beamform_cap, GET_VHT_CAPABILITY_ELE_SU_BFEE_STS_CAP(pIE->data) << 8); ++ ++ /* ++ * B19 MU Beamformer Capable, ++ * the target supports Beamformer and we are Beamformee ++ */ ++ if (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_MU_MIMO_STA_ENABLE) ++ && GET_VHT_CAPABILITY_ELE_MU_BFER(pIE->data)) ++ SET_FLAG(cur_beamform_cap, BEAMFORMING_VHT_MU_MIMO_STA_ENABLE); ++ } ++ ++ /* ++ * B12 SU Beamformee Capable, ++ * the target supports Beamformee and we are Beamformer ++ */ ++ if (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE) ++ && GET_VHT_CAPABILITY_ELE_SU_BFEE(pIE->data)) { ++ SET_FLAG(cur_beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE); ++ ++ /* Shit to BEAMFORMING_VHT_BEAMFORMER_SOUND_DIM */ ++ SET_FLAG(cur_beamform_cap, GET_VHT_CAPABILITY_ELE_SU_BFER_SOUND_DIM_NUM(pIE->data) << 12); ++ ++ /* ++ * B20 MU Beamformee Capable, ++ * the target supports Beamformee and we are Beamformer ++ */ ++ if (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_MU_MIMO_AP_ENABLE) ++ && GET_VHT_CAPABILITY_ELE_MU_BFEE(pIE->data)) ++ SET_FLAG(cur_beamform_cap, BEAMFORMING_VHT_MU_MIMO_AP_ENABLE); ++ } ++ ++ pvhtpriv->beamform_cap = cur_beamform_cap; ++ RTW_INFO("Current VHT Beamforming Setting=0x%04X\n", cur_beamform_cap); ++#else /* !RTW_BEAMFORMING_VERSION_2 */ ++ /* B11 SU Beamformer Capable, the target supports Beamformer and we are Beamformee */ ++ if (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE) && ++ GET_VHT_CAPABILITY_ELE_SU_BFEE(pIE->data)) { ++ SET_FLAG(cur_beamform_cap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE); ++ /*Shift to BEAMFORMING_VHT_BEAMFORMER_STS_CAP*/ ++ SET_FLAG(cur_beamform_cap, GET_VHT_CAPABILITY_ELE_SU_BFEE_STS_CAP(pIE->data) << 8); ++ } ++ ++ /* B12 SU Beamformee Capable, the target supports Beamformee and we are Beamformer */ ++ if (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE) && ++ GET_VHT_CAPABILITY_ELE_SU_BFER(pIE->data)) { ++ SET_FLAG(cur_beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE); ++ /*Shit to BEAMFORMING_VHT_BEAMFORMEE_SOUND_DIM*/ ++ SET_FLAG(cur_beamform_cap, GET_VHT_CAPABILITY_ELE_SU_BFER_SOUND_DIM_NUM(pIE->data) << 12); ++ ++ } ++ pvhtpriv->beamform_cap = cur_beamform_cap; ++ if (cur_beamform_cap) ++ RTW_INFO("Current VHT Beamforming Setting = %02X\n", cur_beamform_cap); ++#endif /* !RTW_BEAMFORMING_VERSION_2 */ ++#endif /* CONFIG_BEAMFORMING */ ++ /* B23 B24 B25 Maximum A-MPDU Length Exponent */ ++ pvhtpriv->ampdu_len = GET_VHT_CAPABILITY_ELE_MAX_RXAMPDU_FACTOR(pIE->data); ++ ++ pcap_mcs = GET_VHT_CAPABILITY_ELE_RX_MCS(pIE->data); ++ rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); ++ tx_nss = rtw_min(rf_type_to_rf_tx_cnt(rf_type), hal_spec->tx_nss_num); ++ rtw_vht_nss_to_mcsmap(tx_nss, pvhtpriv->vht_mcs_map, pcap_mcs); ++ pvhtpriv->vht_highest_rate = rtw_get_vht_highest_rate(pvhtpriv->vht_mcs_map); ++} ++ ++void VHT_operation_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) ++{ ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; ++ ++ if (pIE == NULL) ++ return; ++ ++ if (pvhtpriv->vht_option == _FALSE) ++ return; ++} ++ ++void rtw_process_vht_op_mode_notify(_adapter *padapter, u8 *pframe, PVOID sta) ++{ ++ struct sta_info *psta = (struct sta_info *)sta; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; ++ struct registry_priv *regsty = adapter_to_regsty(padapter); ++ u8 target_bw; ++ u8 target_rxss, current_rxss; ++ u8 update_ra = _FALSE; ++ u8 tx_nss = 0, rf_type = RF_1T1R; ++ struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter); ++ ++ if (pvhtpriv->vht_option == _FALSE) ++ return; ++ ++ target_bw = GET_VHT_OPERATING_MODE_FIELD_CHNL_WIDTH(pframe); ++ ++ rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); ++ tx_nss = rtw_min(rf_type_to_rf_tx_cnt(rf_type), hal_spec->tx_nss_num); ++ target_rxss = rtw_min(tx_nss, (GET_VHT_OPERATING_MODE_FIELD_RX_NSS(pframe) + 1)); ++ ++ if (target_bw != psta->cmn.bw_mode) { ++ if (hal_is_bw_support(padapter, target_bw) ++ && REGSTY_IS_BW_5G_SUPPORT(regsty, target_bw) ++ ) { ++ update_ra = _TRUE; ++ psta->cmn.bw_mode = target_bw; ++ } ++ } ++ ++ current_rxss = rtw_vht_mcsmap_to_nss(psta->vhtpriv.vht_mcs_map); ++ if (target_rxss != current_rxss) { ++ u8 vht_mcs_map[2] = {}; ++ ++ update_ra = _TRUE; ++ ++ rtw_vht_nss_to_mcsmap(target_rxss, vht_mcs_map, psta->vhtpriv.vht_mcs_map); ++ _rtw_memcpy(psta->vhtpriv.vht_mcs_map, vht_mcs_map, 2); ++ ++ rtw_hal_update_sta_ra_info(padapter, psta); ++ } ++ ++ if (update_ra) ++ rtw_dm_ra_mask_wk_cmd(padapter, (u8 *)psta); ++} ++ ++u32 rtw_build_vht_operation_ie(_adapter *padapter, u8 *pbuf, u8 channel) ++{ ++ struct registry_priv *pregistrypriv = &padapter->registrypriv; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; ++ /* struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; */ ++ u8 ChnlWidth, center_freq, bw_mode; ++ u32 len = 0; ++ u8 operation[5]; ++ ++ _rtw_memset(operation, 0, 5); ++ ++ bw_mode = REGSTY_BW_5G(pregistrypriv); /* TODO: control op bw with other info */ ++ ++ if (hal_chk_bw_cap(padapter, BW_CAP_80M | BW_CAP_160M) ++ && REGSTY_BW_5G(pregistrypriv) >= CHANNEL_WIDTH_80 ++ ) { ++ center_freq = rtw_get_center_ch(channel, bw_mode, HAL_PRIME_CHNL_OFFSET_LOWER); ++ ChnlWidth = 1; ++ } else { ++ center_freq = 0; ++ ChnlWidth = 0; ++ } ++ ++ ++ SET_VHT_OPERATION_ELE_CHL_WIDTH(operation, ChnlWidth); ++ /* center frequency */ ++ SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ1(operation, center_freq);/* Todo: need to set correct center channel */ ++ SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ2(operation, 0); ++ ++ _rtw_memcpy(operation + 3, pvhtpriv->vht_mcs_map, 2); ++ ++ rtw_set_ie(pbuf, EID_VHTOperation, 5, operation, &len); ++ ++ return len; ++} ++ ++u32 rtw_build_vht_op_mode_notify_ie(_adapter *padapter, u8 *pbuf, u8 bw) ++{ ++ /* struct registry_priv *pregistrypriv = &padapter->registrypriv; */ ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; ++ u32 len = 0; ++ u8 opmode = 0; ++ u8 chnl_width, rx_nss; ++ ++ chnl_width = bw; ++ rx_nss = rtw_vht_mcsmap_to_nss(pvhtpriv->vht_mcs_map); ++ ++ SET_VHT_OPERATING_MODE_FIELD_CHNL_WIDTH(&opmode, chnl_width); ++ SET_VHT_OPERATING_MODE_FIELD_RX_NSS(&opmode, (rx_nss - 1)); ++ SET_VHT_OPERATING_MODE_FIELD_RX_NSS_TYPE(&opmode, 0); /* Todo */ ++ ++ pvhtpriv->vht_op_mode_notify = opmode; ++ ++ pbuf = rtw_set_ie(pbuf, EID_OpModeNotification, 1, &opmode, &len); ++ ++ return len; ++} ++ ++u32 rtw_build_vht_cap_ie(_adapter *padapter, u8 *pbuf) ++{ ++ u8 bw, rf_num, rx_stbc_nss = 0; ++ u16 HighestRate; ++ u8 *pcap, *pcap_mcs; ++ u32 len = 0; ++ u32 rx_packet_offset, max_recvbuf_sz; ++ struct registry_priv *pregistrypriv = &padapter->registrypriv; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ pcap = pvhtpriv->vht_cap; ++ _rtw_memset(pcap, 0, 32); ++ ++ /* B0 B1 Maximum MPDU Length */ ++ rtw_hal_get_def_var(padapter, HAL_DEF_RX_PACKET_OFFSET, &rx_packet_offset); ++ rtw_hal_get_def_var(padapter, HAL_DEF_MAX_RECVBUF_SZ, &max_recvbuf_sz); ++ ++ RTW_DBG("%s, line%d, Available RX buf size = %d bytes\n", __FUNCTION__, __LINE__, max_recvbuf_sz - rx_packet_offset); ++ ++ if ((max_recvbuf_sz - rx_packet_offset) >= 11454) { ++ SET_VHT_CAPABILITY_ELE_MAX_MPDU_LENGTH(pcap, 2); ++ RTW_INFO("%s, line%d, Set MAX MPDU len = 11454 bytes\n", __FUNCTION__, __LINE__); ++ } else if ((max_recvbuf_sz - rx_packet_offset) >= 7991) { ++ SET_VHT_CAPABILITY_ELE_MAX_MPDU_LENGTH(pcap, 1); ++ RTW_INFO("%s, line%d, Set MAX MPDU len = 7991 bytes\n", __FUNCTION__, __LINE__); ++ } else if ((max_recvbuf_sz - rx_packet_offset) >= 3895) { ++ SET_VHT_CAPABILITY_ELE_MAX_MPDU_LENGTH(pcap, 0); ++ RTW_INFO("%s, line%d, Set MAX MPDU len = 3895 bytes\n", __FUNCTION__, __LINE__); ++ } else ++ RTW_ERR("%s, line%d, Error!! Available RX buf size < 3895 bytes\n", __FUNCTION__, __LINE__); ++ ++ /* B2 B3 Supported Channel Width Set */ ++ if (hal_chk_bw_cap(padapter, BW_CAP_160M) && REGSTY_IS_BW_5G_SUPPORT(pregistrypriv, CHANNEL_WIDTH_160)) { ++ if (hal_chk_bw_cap(padapter, BW_CAP_80_80M) && REGSTY_IS_BW_5G_SUPPORT(pregistrypriv, CHANNEL_WIDTH_80_80)) ++ SET_VHT_CAPABILITY_ELE_CHL_WIDTH(pcap, 2); ++ else ++ SET_VHT_CAPABILITY_ELE_CHL_WIDTH(pcap, 1); ++ } else ++ SET_VHT_CAPABILITY_ELE_CHL_WIDTH(pcap, 0); ++ ++ /* B4 Rx LDPC */ ++ if (TEST_FLAG(pvhtpriv->ldpc_cap, LDPC_VHT_ENABLE_RX)) { ++ SET_VHT_CAPABILITY_ELE_RX_LDPC(pcap, 1); ++ RTW_INFO("[VHT] Declare supporting RX LDPC\n"); ++ } ++ ++ /* B5 ShortGI for 80MHz */ ++ SET_VHT_CAPABILITY_ELE_SHORT_GI80M(pcap, pvhtpriv->sgi_80m ? 1 : 0); /* We can receive Short GI of 80M */ ++ if (pvhtpriv->sgi_80m) ++ RTW_INFO("[VHT] Declare supporting SGI 80MHz\n"); ++ ++ /* B6 ShortGI for 160MHz */ ++ /* SET_VHT_CAPABILITY_ELE_SHORT_GI160M(pcap, pvhtpriv->sgi_80m? 1 : 0); */ ++ ++ /* B7 Tx STBC */ ++ if (TEST_FLAG(pvhtpriv->stbc_cap, STBC_VHT_ENABLE_TX)) { ++ SET_VHT_CAPABILITY_ELE_TX_STBC(pcap, 1); ++ RTW_INFO("[VHT] Declare supporting TX STBC\n"); ++ } ++ ++ /* B8 B9 B10 Rx STBC */ ++ if (TEST_FLAG(pvhtpriv->stbc_cap, STBC_VHT_ENABLE_RX)) { ++ rtw_hal_get_def_var(padapter, HAL_DEF_RX_STBC, (u8 *)(&rx_stbc_nss)); ++ ++ SET_VHT_CAPABILITY_ELE_RX_STBC(pcap, rx_stbc_nss); ++ RTW_INFO("[VHT] Declare supporting RX STBC = %d\n", rx_stbc_nss); ++ } ++ #ifdef CONFIG_BEAMFORMING ++ /* B11 SU Beamformer Capable */ ++ if (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE)) { ++ SET_VHT_CAPABILITY_ELE_SU_BFER(pcap, 1); ++ RTW_INFO("[VHT] Declare supporting SU Bfer\n"); ++ /* B16 17 18 Number of Sounding Dimensions */ ++ rtw_hal_get_def_var(padapter, HAL_DEF_BEAMFORMER_CAP, (u8 *)&rf_num); ++ SET_VHT_CAPABILITY_ELE_SOUNDING_DIMENSIONS(pcap, rf_num); ++ /* B19 MU Beamformer Capable */ ++ if (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_MU_MIMO_AP_ENABLE)) { ++ SET_VHT_CAPABILITY_ELE_MU_BFER(pcap, 1); ++ RTW_INFO("[VHT] Declare supporting MU Bfer\n"); ++ } ++ } ++ ++ /* B12 SU Beamformee Capable */ ++ if (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE)) { ++ SET_VHT_CAPABILITY_ELE_SU_BFEE(pcap, 1); ++ RTW_INFO("[VHT] Declare supporting SU Bfee\n"); ++ ++ rtw_hal_get_def_var(padapter, HAL_DEF_BEAMFORMEE_CAP, (u8 *)&rf_num); ++ ++ /* IOT action suggested by Yu Chen 2017/3/3 */ ++#ifdef CONFIG_80211AC_VHT ++ if ((pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_BROADCOM) && ++ !pvhtpriv->ap_is_mu_bfer) ++ rf_num = (rf_num >= 2 ? 2 : rf_num); ++#endif ++ /* B13 14 15 Compressed Steering Number of Beamformer Antennas Supported */ ++ SET_VHT_CAPABILITY_ELE_BFER_ANT_SUPP(pcap, rf_num); ++ /* B20 SU Beamformee Capable */ ++ if (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_MU_MIMO_STA_ENABLE)) { ++ SET_VHT_CAPABILITY_ELE_MU_BFEE(pcap, 1); ++ RTW_INFO("[VHT] Declare supporting MU Bfee\n"); ++ } ++ } ++ #endif/*CONFIG_BEAMFORMING*/ ++ ++ /* B21 VHT TXOP PS */ ++ SET_VHT_CAPABILITY_ELE_TXOP_PS(pcap, 0); ++ /* B22 +HTC-VHT Capable */ ++ SET_VHT_CAPABILITY_ELE_HTC_VHT(pcap, 1); ++ /* B23 24 25 Maximum A-MPDU Length Exponent */ ++ if (pregistrypriv->ampdu_factor != 0xFE) ++ SET_VHT_CAPABILITY_ELE_MAX_RXAMPDU_FACTOR(pcap, pregistrypriv->ampdu_factor); ++ else ++ SET_VHT_CAPABILITY_ELE_MAX_RXAMPDU_FACTOR(pcap, 7); ++ /* B26 27 VHT Link Adaptation Capable */ ++ SET_VHT_CAPABILITY_ELE_LINK_ADAPTION(pcap, 0); ++ ++ pcap_mcs = GET_VHT_CAPABILITY_ELE_RX_MCS(pcap); ++ _rtw_memcpy(pcap_mcs, pvhtpriv->vht_mcs_map, 2); ++ ++ pcap_mcs = GET_VHT_CAPABILITY_ELE_TX_MCS(pcap); ++ _rtw_memcpy(pcap_mcs, pvhtpriv->vht_mcs_map, 2); ++ ++ /* find the largest bw supported by both registry and hal */ ++ bw = hal_largest_bw(padapter, REGSTY_BW_5G(pregistrypriv)); ++ ++ HighestRate = VHT_MCS_DATA_RATE[bw][pvhtpriv->sgi_80m][((pvhtpriv->vht_highest_rate - MGN_VHT1SS_MCS0) & 0x3f)]; ++ HighestRate = (HighestRate + 1) >> 1; ++ ++ SET_VHT_CAPABILITY_ELE_MCS_RX_HIGHEST_RATE(pcap, HighestRate); /* indicate we support highest rx rate is 600Mbps. */ ++ SET_VHT_CAPABILITY_ELE_MCS_TX_HIGHEST_RATE(pcap, HighestRate); /* indicate we support highest tx rate is 600Mbps. */ ++ ++ pbuf = rtw_set_ie(pbuf, EID_VHTCapability, 12, pcap, &len); ++ ++ return len; ++} ++ ++u32 rtw_restructure_vht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, uint in_len, uint *pout_len) ++{ ++ struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); ++ RT_CHANNEL_INFO *chset = rfctl->channel_set; ++ u32 ielen; ++ u8 max_bw; ++ u8 oper_ch, oper_bw = CHANNEL_WIDTH_20, oper_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ u8 *out_vht_op_ie, *ht_op_ie, *vht_cap_ie, *vht_op_ie; ++ struct registry_priv *pregistrypriv = &padapter->registrypriv; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; ++ ++ rtw_vht_use_default_setting(padapter); ++ ++ ht_op_ie = rtw_get_ie(in_ie + 12, WLAN_EID_HT_OPERATION, &ielen, in_len - 12); ++ if (!ht_op_ie || ielen != HT_OP_IE_LEN) ++ goto exit; ++ vht_cap_ie = rtw_get_ie(in_ie + 12, EID_VHTCapability, &ielen, in_len - 12); ++ if (!vht_cap_ie || ielen != VHT_CAP_IE_LEN) ++ goto exit; ++ vht_op_ie = rtw_get_ie(in_ie + 12, EID_VHTOperation, &ielen, in_len - 12); ++ if (!vht_op_ie || ielen != VHT_OP_IE_LEN) ++ goto exit; ++ ++ /* VHT Capabilities element */ ++ *pout_len += rtw_build_vht_cap_ie(padapter, out_ie + *pout_len); ++ ++ ++ /* VHT Operation element */ ++ out_vht_op_ie = out_ie + *pout_len; ++ rtw_set_ie(out_vht_op_ie, EID_VHTOperation, VHT_OP_IE_LEN, vht_op_ie + 2 , pout_len); ++ ++ /* get primary channel from HT_OP_IE */ ++ oper_ch = GET_HT_OP_ELE_PRI_CHL(ht_op_ie + 2); ++ ++ /* find the largest bw supported by both registry and hal */ ++ max_bw = hal_largest_bw(padapter, REGSTY_BW_5G(pregistrypriv)); ++ ++ if (max_bw >= CHANNEL_WIDTH_40) { ++ /* get bw offset form HT_OP_IE */ ++ if (GET_HT_OP_ELE_STA_CHL_WIDTH(ht_op_ie + 2)) { ++ switch (GET_HT_OP_ELE_2ND_CHL_OFFSET(ht_op_ie + 2)) { ++ case SCA: ++ oper_bw = CHANNEL_WIDTH_40; ++ oper_offset = HAL_PRIME_CHNL_OFFSET_LOWER; ++ break; ++ case SCB: ++ oper_bw = CHANNEL_WIDTH_40; ++ oper_offset = HAL_PRIME_CHNL_OFFSET_UPPER; ++ break; ++ } ++ } ++ ++ if (oper_bw == CHANNEL_WIDTH_40) { ++ switch (GET_VHT_OPERATION_ELE_CHL_WIDTH(vht_op_ie + 2)) { ++ case 1: /* 80MHz */ ++ case 2: /* 160MHz */ ++ case 3: /* 80+80 */ ++ oper_bw = CHANNEL_WIDTH_80; /* only support up to 80MHz for now */ ++ break; ++ } ++ ++ oper_bw = rtw_min(oper_bw, max_bw); ++ ++ /* try downgrage bw to fit in channel plan setting */ ++ while (!rtw_chset_is_chbw_valid(chset, oper_ch, oper_bw, oper_offset) ++ || (IS_DFS_SLAVE_WITH_RD(rfctl) ++ && !rtw_odm_dfs_domain_unknown(rfctl_to_dvobj(rfctl)) ++ && rtw_chset_is_chbw_non_ocp(chset, oper_ch, oper_bw, oper_offset)) ++ ) { ++ oper_bw--; ++ if (oper_bw == CHANNEL_WIDTH_20) { ++ oper_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ break; ++ } ++ } ++ } ++ } ++ ++ rtw_warn_on(!rtw_chset_is_chbw_valid(chset, oper_ch, oper_bw, oper_offset)); ++ if (IS_DFS_SLAVE_WITH_RD(rfctl) && !rtw_odm_dfs_domain_unknown(rfctl_to_dvobj(rfctl))) ++ rtw_warn_on(rtw_chset_is_chbw_non_ocp(chset, oper_ch, oper_bw, oper_offset)); ++ ++ /* update VHT_OP_IE */ ++ if (oper_bw < CHANNEL_WIDTH_80) { ++ SET_VHT_OPERATION_ELE_CHL_WIDTH(out_vht_op_ie + 2, 0); ++ SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ1(out_vht_op_ie + 2, 0); ++ SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ2(out_vht_op_ie + 2, 0); ++ } else if (oper_bw == CHANNEL_WIDTH_80) { ++ u8 cch = rtw_get_center_ch(oper_ch, oper_bw, oper_offset); ++ ++ SET_VHT_OPERATION_ELE_CHL_WIDTH(out_vht_op_ie + 2, 1); ++ SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ1(out_vht_op_ie + 2, cch); ++ SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ2(out_vht_op_ie + 2, 0); ++ } else { ++ RTW_ERR(FUNC_ADPT_FMT" unsupported BW:%u\n", FUNC_ADPT_ARG(padapter), oper_bw); ++ rtw_warn_on(1); ++ } ++ ++ /* Operating Mode Notification element */ ++ *pout_len += rtw_build_vht_op_mode_notify_ie(padapter, out_ie + *pout_len, oper_bw); ++ ++ pvhtpriv->vht_option = _TRUE; ++ ++exit: ++ return pvhtpriv->vht_option; ++ ++} ++ ++void VHTOnAssocRsp(_adapter *padapter) ++{ ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u8 ht_AMPDU_len; ++ ++ RTW_INFO("%s\n", __FUNCTION__); ++ ++ if (!pmlmeinfo->HT_enable) ++ return; ++ ++ if (!pmlmeinfo->VHT_enable) ++ return; ++ ++ ht_AMPDU_len = pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x03; ++ ++ if (pvhtpriv->ampdu_len > ht_AMPDU_len) ++ rtw_hal_set_hwreg(padapter, HW_VAR_AMPDU_FACTOR, (u8 *)(&pvhtpriv->ampdu_len)); ++ ++ rtw_hal_set_hwreg(padapter, HW_VAR_AMPDU_MAX_TIME, (u8 *)(&pvhtpriv->vht_highest_rate)); ++} ++ ++void rtw_vht_ies_attach(_adapter *padapter, WLAN_BSSID_EX *pnetwork) ++{ ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ u8 cap_len, operation_len; ++ uint len = 0; ++ sint ie_len = 0; ++ u8 *p = NULL; ++ ++ p = rtw_get_ie(pnetwork->IEs + _BEACON_IE_OFFSET_, EID_VHTCapability, &ie_len, ++ (pnetwork->IELength - _BEACON_IE_OFFSET_)); ++ if (p && ie_len > 0) ++ return; ++ ++ rtw_vht_use_default_setting(padapter); ++ ++ /* VHT Operation mode notifiy bit in Extended IE (127) */ ++ SET_EXT_CAPABILITY_ELE_OP_MODE_NOTIF(pmlmepriv->ext_capab_ie_data, 1); ++ pmlmepriv->ext_capab_ie_len = 10; ++ rtw_set_ie(pnetwork->IEs + pnetwork->IELength, EID_EXTCapability, 8, pmlmepriv->ext_capab_ie_data, &len); ++ pnetwork->IELength += pmlmepriv->ext_capab_ie_len; ++ ++ /* VHT Capabilities element */ ++ cap_len = rtw_build_vht_cap_ie(padapter, pnetwork->IEs + pnetwork->IELength); ++ pnetwork->IELength += cap_len; ++ ++ /* VHT Operation element */ ++ operation_len = rtw_build_vht_operation_ie(padapter, pnetwork->IEs + pnetwork->IELength, ++ pnetwork->Configuration.DSConfig); ++ pnetwork->IELength += operation_len; ++ ++ rtw_check_for_vht20(padapter, pnetwork->IEs + _BEACON_IE_OFFSET_, pnetwork->IELength - _BEACON_IE_OFFSET_); ++ ++ pmlmepriv->vhtpriv.vht_option = _TRUE; ++} ++ ++void rtw_vht_ies_detach(_adapter *padapter, WLAN_BSSID_EX *pnetwork) ++{ ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++ rtw_remove_bcn_ie(padapter, pnetwork, EID_EXTCapability); ++ rtw_remove_bcn_ie(padapter, pnetwork, EID_VHTCapability); ++ rtw_remove_bcn_ie(padapter, pnetwork, EID_VHTOperation); ++ ++ pmlmepriv->vhtpriv.vht_option = _FALSE; ++} ++ ++void rtw_check_for_vht20(_adapter *adapter, u8 *ies, int ies_len) ++{ ++ u8 ht_ch, ht_bw, ht_offset; ++ u8 vht_ch, vht_bw, vht_offset; ++ ++ rtw_ies_get_chbw(ies, ies_len, &ht_ch, &ht_bw, &ht_offset, 1, 0); ++ rtw_ies_get_chbw(ies, ies_len, &vht_ch, &vht_bw, &vht_offset, 1, 1); ++ ++ if (ht_bw == CHANNEL_WIDTH_20 && vht_bw >= CHANNEL_WIDTH_80) { ++ u8 *vht_op_ie; ++ int vht_op_ielen; ++ ++ RTW_INFO(FUNC_ADPT_FMT" vht80 is not allowed without ht40\n", FUNC_ADPT_ARG(adapter)); ++ vht_op_ie = rtw_get_ie(ies, EID_VHTOperation, &vht_op_ielen, ies_len); ++ if (vht_op_ie && vht_op_ielen) { ++ RTW_INFO(FUNC_ADPT_FMT" switch to vht20\n", FUNC_ADPT_ARG(adapter)); ++ SET_VHT_OPERATION_ELE_CHL_WIDTH(vht_op_ie + 2, 0); ++ SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ1(vht_op_ie + 2, 0); ++ SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ2(vht_op_ie + 2, 0); ++ } ++ } ++} ++#endif /* CONFIG_80211AC_VHT */ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/core/rtw_wapi.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_wapi.c +--- linux-6.3.4/drivers/staging/rtl8812au/core/rtw_wapi.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_wapi.c 2022-01-28 22:59:35.562651800 +0200 @@ -0,0 +1,1312 @@ +/****************************************************************************** + * @@ -104889,9 +105877,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_wapi.c linux-5.11.4-rtl8812a + } +} +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_wapi_sms4.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_wapi_sms4.c ---- linux-5.11.4/3rdparty/rtl8812au/core/rtw_wapi_sms4.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_wapi_sms4.c 2021-03-07 18:16:17.027954777 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/core/rtw_wapi_sms4.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_wapi_sms4.c +--- linux-6.3.4/drivers/staging/rtl8812au/core/rtw_wapi_sms4.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_wapi_sms4.c 2022-01-28 22:59:35.562651800 +0200 @@ -0,0 +1,922 @@ +/****************************************************************************** + * @@ -105815,1149 +106803,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_wapi_sms4.c linux-5.11.4-rtl +#endif + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_vht.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_vht.c ---- linux-5.11.4/3rdparty/rtl8812au/core/rtw_vht.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_vht.c 2021-03-07 18:16:17.027954777 +0200 -@@ -0,0 +1,1135 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _RTW_VHT_C -+ -+#include -+#include -+ -+#ifdef CONFIG_80211AC_VHT -+const u16 _vht_max_mpdu_len[] = { -+ 3895, -+ 7991, -+ 11454, -+ 0, -+}; -+ -+const u8 _vht_sup_ch_width_set_to_bw_cap[] = { -+ BW_CAP_80M, -+ BW_CAP_80M | BW_CAP_160M, -+ BW_CAP_80M | BW_CAP_160M | BW_CAP_80_80M, -+ 0, -+}; -+ -+const char *const _vht_sup_ch_width_set_str[] = { -+ "80MHz", -+ "160MHz", -+ "160MHz & 80+80MHz", -+ "BW-RSVD", -+}; -+ -+void dump_vht_cap_ie_content(void *sel, const u8 *buf, u32 buf_len) -+{ -+ if (buf_len != VHT_CAP_IE_LEN) { -+ RTW_PRINT_SEL(sel, "Invalid VHT capability IE len:%d != %d\n", buf_len, VHT_CAP_IE_LEN); -+ return; -+ } -+ -+ RTW_PRINT_SEL(sel, "cap_info:%02x %02x %02x %02x: MAX_MPDU_LEN:%u %s%s%s%s%s RX-STBC:%u MAX_AMPDU_LEN:%u\n" -+ , *(buf), *(buf + 1), *(buf + 2), *(buf + 3) -+ , vht_max_mpdu_len(GET_VHT_CAPABILITY_ELE_MAX_MPDU_LENGTH(buf)) -+ , vht_sup_ch_width_set_str(GET_VHT_CAPABILITY_ELE_CHL_WIDTH(buf)) -+ , GET_VHT_CAPABILITY_ELE_RX_LDPC(buf) ? " RX-LDPC" : "" -+ , GET_VHT_CAPABILITY_ELE_SHORT_GI80M(buf) ? " SGI-80" : "" -+ , GET_VHT_CAPABILITY_ELE_SHORT_GI160M(buf) ? " SGI-160" : "" -+ , GET_VHT_CAPABILITY_ELE_TX_STBC(buf) ? " TX-STBC" : "" -+ , GET_VHT_CAPABILITY_ELE_RX_STBC(buf) -+ , VHT_MAX_AMPDU_LEN(GET_VHT_CAPABILITY_ELE_MAX_RXAMPDU_FACTOR(buf)) -+ ); -+} -+ -+void dump_vht_cap_ie(void *sel, const u8 *ie, u32 ie_len) -+{ -+ const u8 *vht_cap_ie; -+ sint vht_cap_ielen; -+ -+ vht_cap_ie = rtw_get_ie(ie, WLAN_EID_VHT_CAPABILITY, &vht_cap_ielen, ie_len); -+ if (!ie || vht_cap_ie != ie) -+ return; -+ -+ dump_vht_cap_ie_content(sel, vht_cap_ie + 2, vht_cap_ielen); -+} -+ -+const char *const _vht_op_ch_width_str[] = { -+ "20 or 40MHz", -+ "80MHz", -+ "160MHz", -+ "80+80MHz", -+ "BW-RSVD", -+}; -+ -+void dump_vht_op_ie_content(void *sel, const u8 *buf, u32 buf_len) -+{ -+ if (buf_len != VHT_OP_IE_LEN) { -+ RTW_PRINT_SEL(sel, "Invalid VHT operation IE len:%d != %d\n", buf_len, VHT_OP_IE_LEN); -+ return; -+ } -+ -+ RTW_PRINT_SEL(sel, "%s, ch0:%u, ch1:%u\n" -+ , vht_op_ch_width_str(GET_VHT_OPERATION_ELE_CHL_WIDTH(buf)) -+ , GET_VHT_OPERATION_ELE_CENTER_FREQ1(buf) -+ , GET_VHT_OPERATION_ELE_CENTER_FREQ2(buf) -+ ); -+} -+ -+void dump_vht_op_ie(void *sel, const u8 *ie, u32 ie_len) -+{ -+ const u8 *vht_op_ie; -+ sint vht_op_ielen; -+ -+ vht_op_ie = rtw_get_ie(ie, WLAN_EID_VHT_OPERATION, &vht_op_ielen, ie_len); -+ if (!ie || vht_op_ie != ie) -+ return; -+ -+ dump_vht_op_ie_content(sel, vht_op_ie + 2, vht_op_ielen); -+} -+ -+/* 20/40/80, ShortGI, MCS Rate */ -+const u16 VHT_MCS_DATA_RATE[3][2][30] = { -+ { { -+ 13, 26, 39, 52, 78, 104, 117, 130, 156, 156, -+ 26, 52, 78, 104, 156, 208, 234, 260, 312, 312, -+ 39, 78, 117, 156, 234, 312, 351, 390, 468, 520 -+ }, /* Long GI, 20MHz */ -+ { -+ 14, 29, 43, 58, 87, 116, 130, 144, 173, 173, -+ 29, 58, 87, 116, 173, 231, 260, 289, 347, 347, -+ 43, 87, 130, 173, 260, 347, 390, 433, 520, 578 -+ } -+ }, /* Short GI, 20MHz */ -+ { { -+ 27, 54, 81, 108, 162, 216, 243, 270, 324, 360, -+ 54, 108, 162, 216, 324, 432, 486, 540, 648, 720, -+ 81, 162, 243, 324, 486, 648, 729, 810, 972, 1080 -+ }, /* Long GI, 40MHz */ -+ { -+ 30, 60, 90, 120, 180, 240, 270, 300, 360, 400, -+ 60, 120, 180, 240, 360, 480, 540, 600, 720, 800, -+ 90, 180, 270, 360, 540, 720, 810, 900, 1080, 1200 -+ } -+ }, /* Short GI, 40MHz */ -+ { { -+ 59, 117, 176, 234, 351, 468, 527, 585, 702, 780, -+ 117, 234, 351, 468, 702, 936, 1053, 1170, 1404, 1560, -+ 176, 351, 527, 702, 1053, 1404, 1580, 1755, 2106, 2340 -+ }, /* Long GI, 80MHz */ -+ { -+ 65, 130, 195, 260, 390, 520, 585, 650, 780, 867, -+ 130, 260, 390, 520, 780, 1040, 1170, 1300, 1560, 1734, -+ 195, 390, 585, 780, 1170, 1560, 1755, 1950, 2340, 2600 -+ } -+ } /* Short GI, 80MHz */ -+}; -+ -+u8 rtw_get_vht_highest_rate(u8 *pvht_mcs_map) -+{ -+ u8 i, j; -+ u8 bit_map; -+ u8 vht_mcs_rate = 0; -+ -+ for (i = 0; i < 2; i++) { -+ if (pvht_mcs_map[i] != 0xff) { -+ for (j = 0; j < 8; j += 2) { -+ bit_map = (pvht_mcs_map[i] >> j) & 3; -+ -+ if (bit_map != 3) -+ vht_mcs_rate = MGN_VHT1SS_MCS7 + 10 * j / 2 + i * 40 + bit_map; /* VHT rate indications begin from 0x90 */ -+ } -+ } -+ } -+ -+ /* RTW_INFO("HighestVHTMCSRate is %x\n", vht_mcs_rate); */ -+ return vht_mcs_rate; -+} -+ -+u8 rtw_vht_mcsmap_to_nss(u8 *pvht_mcs_map) -+{ -+ u8 i, j; -+ u8 bit_map; -+ u8 nss = 0; -+ -+ for (i = 0; i < 2; i++) { -+ if (pvht_mcs_map[i] != 0xff) { -+ for (j = 0; j < 8; j += 2) { -+ bit_map = (pvht_mcs_map[i] >> j) & 3; -+ -+ if (bit_map != 3) -+ nss++; -+ } -+ } -+ } -+ -+ /* RTW_INFO("%s : %dSS\n", __FUNCTION__, nss); */ -+ return nss; -+} -+ -+void rtw_vht_nss_to_mcsmap(u8 nss, u8 *target_mcs_map, u8 *cur_mcs_map) -+{ -+ u8 i, j; -+ u8 cur_rate, target_rate; -+ -+ for (i = 0; i < 2; i++) { -+ target_mcs_map[i] = 0; -+ for (j = 0; j < 8; j += 2) { -+ cur_rate = (cur_mcs_map[i] >> j) & 3; -+ if (cur_rate == 3) /* 0x3 indicates not supported that num of SS */ -+ target_rate = 3; -+ else if (nss <= ((j / 2) + i * 4)) -+ target_rate = 3; -+ else -+ target_rate = cur_rate; -+ -+ target_mcs_map[i] |= (target_rate << j); -+ } -+ } -+ -+ /* RTW_INFO("%s : %dSS\n", __FUNCTION__, nss); */ -+} -+ -+u16 rtw_vht_mcs_to_data_rate(u8 bw, u8 short_GI, u8 vht_mcs_rate) -+{ -+ if (vht_mcs_rate > MGN_VHT3SS_MCS9) -+ vht_mcs_rate = MGN_VHT3SS_MCS9; -+ /* RTW_INFO("bw=%d, short_GI=%d, ((vht_mcs_rate - MGN_VHT1SS_MCS0)&0x3f)=%d\n", bw, short_GI, ((vht_mcs_rate - MGN_VHT1SS_MCS0)&0x3f)); */ -+ return VHT_MCS_DATA_RATE[bw][short_GI][((vht_mcs_rate - MGN_VHT1SS_MCS0) & 0x3f)]; -+} -+ -+void rtw_vht_use_default_setting(_adapter *padapter) -+{ -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; -+ struct registry_priv *pregistrypriv = &padapter->registrypriv; -+ BOOLEAN bHwLDPCSupport = _FALSE, bHwSTBCSupport = _FALSE; -+#ifdef CONFIG_BEAMFORMING -+ BOOLEAN bHwSupportBeamformer = _FALSE, bHwSupportBeamformee = _FALSE; -+ u8 mu_bfer, mu_bfee; -+#endif /* CONFIG_BEAMFORMING */ -+ u8 rf_type = 0; -+ u8 tx_nss, rx_nss; -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ pvhtpriv->sgi_80m = TEST_FLAG(pregistrypriv->short_gi, BIT2) ? _TRUE : _FALSE; -+ -+ /* LDPC support */ -+ rtw_hal_get_def_var(padapter, HAL_DEF_RX_LDPC, (u8 *)&bHwLDPCSupport); -+ CLEAR_FLAGS(pvhtpriv->ldpc_cap); -+ if (bHwLDPCSupport) { -+ if (TEST_FLAG(pregistrypriv->ldpc_cap, BIT0)) -+ SET_FLAG(pvhtpriv->ldpc_cap, LDPC_VHT_ENABLE_RX); -+ } -+ rtw_hal_get_def_var(padapter, HAL_DEF_TX_LDPC, (u8 *)&bHwLDPCSupport); -+ if (bHwLDPCSupport) { -+ if (TEST_FLAG(pregistrypriv->ldpc_cap, BIT1)) -+ SET_FLAG(pvhtpriv->ldpc_cap, LDPC_VHT_ENABLE_TX); -+ } -+ if (pvhtpriv->ldpc_cap) -+ RTW_INFO("[VHT] Support LDPC = 0x%02X\n", pvhtpriv->ldpc_cap); -+ -+ /* STBC */ -+ rtw_hal_get_def_var(padapter, HAL_DEF_TX_STBC, (u8 *)&bHwSTBCSupport); -+ CLEAR_FLAGS(pvhtpriv->stbc_cap); -+ if (bHwSTBCSupport) { -+ if (TEST_FLAG(pregistrypriv->stbc_cap, BIT1)) -+ SET_FLAG(pvhtpriv->stbc_cap, STBC_VHT_ENABLE_TX); -+ } -+ rtw_hal_get_def_var(padapter, HAL_DEF_RX_STBC, (u8 *)&bHwSTBCSupport); -+ if (bHwSTBCSupport) { -+ if (TEST_FLAG(pregistrypriv->stbc_cap, BIT0)) -+ SET_FLAG(pvhtpriv->stbc_cap, STBC_VHT_ENABLE_RX); -+ } -+ if (pvhtpriv->stbc_cap) -+ RTW_INFO("[VHT] Support STBC = 0x%02X\n", pvhtpriv->stbc_cap); -+ -+ /* Beamforming setting */ -+ CLEAR_FLAGS(pvhtpriv->beamform_cap); -+#ifdef CONFIG_BEAMFORMING -+#ifdef RTW_BEAMFORMING_VERSION_2 -+ /* only enable beamforming in STA client mode */ -+ if (MLME_IS_STA(padapter) && !MLME_IS_GC(padapter) -+ && !MLME_IS_ADHOC(padapter) -+ && !MLME_IS_MESH(padapter)) -+#endif -+ { -+ rtw_hal_get_def_var(padapter, HAL_DEF_EXPLICIT_BEAMFORMER, -+ (u8 *)&bHwSupportBeamformer); -+ rtw_hal_get_def_var(padapter, HAL_DEF_EXPLICIT_BEAMFORMEE, -+ (u8 *)&bHwSupportBeamformee); -+ mu_bfer = _FALSE; -+ mu_bfee = _FALSE; -+ rtw_hal_get_def_var(padapter, HAL_DEF_VHT_MU_BEAMFORMER, &mu_bfer); -+ rtw_hal_get_def_var(padapter, HAL_DEF_VHT_MU_BEAMFORMEE, &mu_bfee); -+ if (TEST_FLAG(pregistrypriv->beamform_cap, BIT0) && bHwSupportBeamformer) { -+#ifdef CONFIG_CONCURRENT_MODE -+ if ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE) { -+ SET_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE); -+ RTW_INFO("[VHT] CONCURRENT AP Support Beamformer\n"); -+ if (TEST_FLAG(pregistrypriv->beamform_cap, BIT(2)) -+ && (_TRUE == mu_bfer)) { -+ SET_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_MU_MIMO_AP_ENABLE); -+ RTW_INFO("[VHT] Support MU-MIMO AP\n"); -+ } -+ } else -+ RTW_INFO("[VHT] CONCURRENT not AP ;not allow Support Beamformer\n"); -+#else -+ SET_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE); -+ RTW_INFO("[VHT] Support Beamformer\n"); -+ if (TEST_FLAG(pregistrypriv->beamform_cap, BIT(2)) -+ && (_TRUE == mu_bfer) -+ && ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE)) { -+ SET_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_MU_MIMO_AP_ENABLE); -+ RTW_INFO("[VHT] Support MU-MIMO AP\n"); -+ } -+#endif -+ } -+ if (TEST_FLAG(pregistrypriv->beamform_cap, BIT1) && bHwSupportBeamformee) { -+ SET_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE); -+ RTW_INFO("[VHT] Support Beamformee\n"); -+ if (TEST_FLAG(pregistrypriv->beamform_cap, BIT(3)) -+ && (_TRUE == mu_bfee) -+ && ((pmlmeinfo->state & 0x03) != WIFI_FW_AP_STATE)) { -+ SET_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_MU_MIMO_STA_ENABLE); -+ RTW_INFO("[VHT] Support MU-MIMO STA\n"); -+ } -+ } -+ } -+#endif /* CONFIG_BEAMFORMING */ -+ -+ pvhtpriv->ampdu_len = pregistrypriv->ampdu_factor; -+ -+ rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); -+ tx_nss = rtw_min(rf_type_to_rf_tx_cnt(rf_type), hal_spec->tx_nss_num); -+ rx_nss = rtw_min(rf_type_to_rf_rx_cnt(rf_type), hal_spec->rx_nss_num); -+ -+ /* for now, vhtpriv.vht_mcs_map comes from RX NSS */ -+ rtw_vht_nss_to_mcsmap(rx_nss, pvhtpriv->vht_mcs_map, pregistrypriv->vht_rx_mcs_map); -+ pvhtpriv->vht_highest_rate = rtw_get_vht_highest_rate(pvhtpriv->vht_mcs_map); -+} -+ -+u64 rtw_vht_mcs_map_to_bitmap(u8 *mcs_map, u8 nss) -+{ -+ u8 i, j, tmp; -+ u64 bitmap = 0; -+ u8 bits_nss = nss * 2; -+ -+ for (i = j = 0; i < bits_nss; i += 2, j += 10) { -+ /* every two bits means single sptial stream */ -+ tmp = (mcs_map[i / 8] >> i) & 3; -+ -+ switch (tmp) { -+ case 2: -+ bitmap = bitmap | (0x03ff << j); -+ break; -+ case 1: -+ bitmap = bitmap | (0x01ff << j); -+ break; -+ case 0: -+ bitmap = bitmap | (0x00ff << j); -+ break; -+ default: -+ break; -+ } -+ } -+ -+ RTW_INFO("vht_mcs_map=%02x %02x, nss=%u => bitmap=%016llx\n" -+ , mcs_map[0], mcs_map[1], nss, bitmap); -+ -+ return bitmap; -+} -+ -+#ifdef CONFIG_BEAMFORMING -+void update_sta_vht_info_apmode_bf_cap(_adapter *padapter, struct sta_info *psta) -+{ -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct vht_priv *pvhtpriv_ap = &pmlmepriv->vhtpriv; -+ struct vht_priv *pvhtpriv_sta = &psta->vhtpriv; -+ u16 cur_beamform_cap = 0; -+ -+ /* B11 SU Beamformer Capable, the target supports Beamformer and we are Beamformee */ -+ if (TEST_FLAG(pvhtpriv_ap->beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE) && -+ GET_VHT_CAPABILITY_ELE_SU_BFEE(pvhtpriv_sta->vht_cap)) { -+ SET_FLAG(cur_beamform_cap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE); -+ /*Shift to BEAMFORMING_VHT_BEAMFORMER_STS_CAP*/ -+ SET_FLAG(cur_beamform_cap, GET_VHT_CAPABILITY_ELE_SU_BFEE_STS_CAP(pvhtpriv_sta->vht_cap) << 8); -+ } -+ -+ /* B12 SU Beamformee Capable, the target supports Beamformee and we are Beamformer */ -+ if (TEST_FLAG(pvhtpriv_ap->beamform_cap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE) && -+ GET_VHT_CAPABILITY_ELE_SU_BFER(pvhtpriv_sta->vht_cap)) { -+ SET_FLAG(cur_beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE); -+ /*Shit to BEAMFORMING_VHT_BEAMFORMEE_SOUND_DIM*/ -+ SET_FLAG(cur_beamform_cap, GET_VHT_CAPABILITY_ELE_SU_BFER_SOUND_DIM_NUM(pvhtpriv_sta->vht_cap) << 12); -+ } -+ -+ if (cur_beamform_cap) -+ RTW_INFO("Current STA(%d) VHT Beamforming Setting = %02X\n", psta->cmn.aid, cur_beamform_cap); -+ -+ pvhtpriv_sta->beamform_cap = cur_beamform_cap; -+ psta->cmn.bf_info.vht_beamform_cap = cur_beamform_cap; -+} -+#endif -+ -+void update_sta_vht_info_apmode(_adapter *padapter, PVOID sta) -+{ -+ struct sta_info *psta = (struct sta_info *)sta; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct vht_priv *pvhtpriv_ap = &pmlmepriv->vhtpriv; -+ struct vht_priv *pvhtpriv_sta = &psta->vhtpriv; -+ u8 cur_ldpc_cap = 0, cur_stbc_cap = 0; -+ s8 bw_mode = -1; -+ u8 *pcap_mcs; -+ -+ if (pvhtpriv_sta->vht_option == _FALSE) -+ return; -+ -+ if (pvhtpriv_sta->op_present) { -+ switch (GET_VHT_OPERATION_ELE_CHL_WIDTH(pvhtpriv_sta->vht_op)) { -+ case 1: /* 80MHz */ -+ case 2: /* 160MHz */ -+ case 3: /* 80+80 */ -+ bw_mode = CHANNEL_WIDTH_80; /* only support up to 80MHz for now */ -+ break; -+ } -+ } -+ -+ if (pvhtpriv_sta->notify_present) -+ bw_mode = GET_VHT_OPERATING_MODE_FIELD_CHNL_WIDTH(&pvhtpriv_sta->vht_op_mode_notify); -+ else if (MLME_IS_AP(padapter)) { -+ /* for VHT client without Operating Mode Notify IE; minimal 80MHz */ -+ if (bw_mode < CHANNEL_WIDTH_80) -+ bw_mode = CHANNEL_WIDTH_80; -+ } -+ -+ if (bw_mode != -1) -+ psta->cmn.bw_mode = bw_mode; /* update bw_mode only if get value from VHT IEs */ -+ -+ psta->cmn.ra_info.is_vht_enable = _TRUE; -+ -+ /* B4 Rx LDPC */ -+ if (TEST_FLAG(pvhtpriv_ap->ldpc_cap, LDPC_VHT_ENABLE_TX) && -+ GET_VHT_CAPABILITY_ELE_RX_LDPC(pvhtpriv_sta->vht_cap)) { -+ SET_FLAG(cur_ldpc_cap, (LDPC_VHT_ENABLE_TX | LDPC_VHT_CAP_TX)); -+ RTW_INFO("Current STA(%d) VHT LDPC = %02X\n", psta->cmn.aid, cur_ldpc_cap); -+ } -+ pvhtpriv_sta->ldpc_cap = cur_ldpc_cap; -+ -+ if (psta->cmn.bw_mode > pmlmeext->cur_bwmode) -+ psta->cmn.bw_mode = pmlmeext->cur_bwmode; -+ -+ if (psta->cmn.bw_mode == CHANNEL_WIDTH_80) { -+ /* B5 Short GI for 80 MHz */ -+ pvhtpriv_sta->sgi_80m = (GET_VHT_CAPABILITY_ELE_SHORT_GI80M(pvhtpriv_sta->vht_cap) & pvhtpriv_ap->sgi_80m) ? _TRUE : _FALSE; -+ /* RTW_INFO("Current STA ShortGI80MHz = %d\n", pvhtpriv_sta->sgi_80m); */ -+ } else if (psta->cmn.bw_mode >= CHANNEL_WIDTH_160) { -+ /* B5 Short GI for 80 MHz */ -+ pvhtpriv_sta->sgi_80m = (GET_VHT_CAPABILITY_ELE_SHORT_GI160M(pvhtpriv_sta->vht_cap) & pvhtpriv_ap->sgi_80m) ? _TRUE : _FALSE; -+ /* RTW_INFO("Current STA ShortGI160MHz = %d\n", pvhtpriv_sta->sgi_80m); */ -+ } -+ -+ /* B8 B9 B10 Rx STBC */ -+ if (TEST_FLAG(pvhtpriv_ap->stbc_cap, STBC_VHT_ENABLE_TX) && -+ GET_VHT_CAPABILITY_ELE_RX_STBC(pvhtpriv_sta->vht_cap)) { -+ SET_FLAG(cur_stbc_cap, (STBC_VHT_ENABLE_TX | STBC_VHT_CAP_TX)); -+ RTW_INFO("Current STA(%d) VHT STBC = %02X\n", psta->cmn.aid, cur_stbc_cap); -+ } -+ pvhtpriv_sta->stbc_cap = cur_stbc_cap; -+ -+#ifdef CONFIG_BEAMFORMING -+ update_sta_vht_info_apmode_bf_cap(padapter, psta); -+#endif -+ -+ /* B23 B24 B25 Maximum A-MPDU Length Exponent */ -+ pvhtpriv_sta->ampdu_len = GET_VHT_CAPABILITY_ELE_MAX_RXAMPDU_FACTOR(pvhtpriv_sta->vht_cap); -+ -+ pcap_mcs = GET_VHT_CAPABILITY_ELE_RX_MCS(pvhtpriv_sta->vht_cap); -+ _rtw_memcpy(pvhtpriv_sta->vht_mcs_map, pcap_mcs, 2); -+ pvhtpriv_sta->vht_highest_rate = rtw_get_vht_highest_rate(pvhtpriv_sta->vht_mcs_map); -+} -+ -+void update_hw_vht_param(_adapter *padapter) -+{ -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ u8 ht_AMPDU_len; -+ -+ ht_AMPDU_len = pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x03; -+ -+ if (pvhtpriv->ampdu_len > ht_AMPDU_len) -+ rtw_hal_set_hwreg(padapter, HW_VAR_AMPDU_FACTOR, (u8 *)(&pvhtpriv->ampdu_len)); -+} -+ -+#ifdef ROKU_PRIVATE -+u8 VHT_get_ss_from_map(u8 *vht_mcs_map) -+{ -+ u8 i, j; -+ u8 ss = 0; -+ -+ for (i = 0; i < 2; i++) { -+ if (vht_mcs_map[i] != 0xff) { -+ for (j = 0; j < 8; j += 2) { -+ if (((vht_mcs_map[i] >> j) & 0x03) == 0x03) -+ break; -+ ss++; -+ } -+ } -+ -+ } -+ -+return ss; -+} -+ -+void VHT_caps_handler_infra_ap(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) -+{ -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct vht_priv_infra_ap *pvhtpriv = &pmlmepriv->vhtpriv_infra_ap; -+ u8 cur_stbc_cap_infra_ap = 0; -+ u16 cur_beamform_cap_infra_ap = 0; -+ u8 *pcap_mcs; -+ u8 *pcap_mcs_tx; -+ u8 Rx_ss = 0, Tx_ss = 0; -+ -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ if (pIE == NULL) -+ return; -+ -+ pmlmeinfo->ht_vht_received |= BIT(1); -+ -+ pvhtpriv->ldpc_cap_infra_ap = GET_VHT_CAPABILITY_ELE_RX_LDPC(pIE->data); -+ -+ if (GET_VHT_CAPABILITY_ELE_RX_STBC(pIE->data)) -+ SET_FLAG(cur_stbc_cap_infra_ap, STBC_VHT_ENABLE_RX); -+ if (GET_VHT_CAPABILITY_ELE_TX_STBC(pIE->data)) -+ SET_FLAG(cur_stbc_cap_infra_ap, STBC_VHT_ENABLE_TX); -+ pvhtpriv->stbc_cap_infra_ap = cur_stbc_cap_infra_ap; -+ -+ /*store ap info for channel bandwidth*/ -+ pvhtpriv->channel_width_infra_ap = GET_VHT_CAPABILITY_ELE_CHL_WIDTH(pIE->data); -+ -+ /*check B11: SU Beamformer Capable and B12: SU Beamformee B19: MU Beamformer B20:MU Beamformee*/ -+ if (GET_VHT_CAPABILITY_ELE_SU_BFER(pIE->data)) -+ SET_FLAG(cur_beamform_cap_infra_ap, BEAMFORMING_VHT_BEAMFORMER_ENABLE); -+ if (GET_VHT_CAPABILITY_ELE_SU_BFEE(pIE->data)) -+ SET_FLAG(cur_beamform_cap_infra_ap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE); -+ if (GET_VHT_CAPABILITY_ELE_MU_BFER(pIE->data)) -+ SET_FLAG(cur_beamform_cap_infra_ap, BEAMFORMING_VHT_MU_MIMO_AP_ENABLE); -+ if (GET_VHT_CAPABILITY_ELE_MU_BFEE(pIE->data)) -+ SET_FLAG(cur_beamform_cap_infra_ap, BEAMFORMING_VHT_MU_MIMO_STA_ENABLE); -+ pvhtpriv->beamform_cap_infra_ap = cur_beamform_cap_infra_ap; -+ -+ /*store information about vht_mcs_set*/ -+ pcap_mcs = GET_VHT_CAPABILITY_ELE_RX_MCS(pIE->data); -+ pcap_mcs_tx = GET_VHT_CAPABILITY_ELE_TX_MCS(pIE->data); -+ _rtw_memcpy(pvhtpriv->vht_mcs_map_infra_ap, pcap_mcs, 2); -+ _rtw_memcpy(pvhtpriv->vht_mcs_map_tx_infra_ap, pcap_mcs_tx, 2); -+ -+ Rx_ss = VHT_get_ss_from_map(pvhtpriv->vht_mcs_map_infra_ap); -+ Tx_ss = VHT_get_ss_from_map(pvhtpriv->vht_mcs_map_tx_infra_ap); -+ if (Rx_ss >= Tx_ss) { -+ pvhtpriv->number_of_streams_infra_ap = Rx_ss; -+ } else{ -+ pvhtpriv->number_of_streams_infra_ap = Tx_ss; -+ } -+ -+} -+#endif /* ROKU_PRIVATE */ -+ -+void VHT_caps_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) -+{ -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter); -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ u8 cur_ldpc_cap = 0, cur_stbc_cap = 0, rf_type = RF_1T1R, tx_nss = 0; -+ u16 cur_beamform_cap = 0; -+ u8 *pcap_mcs; -+ -+ if (pIE == NULL) -+ return; -+ -+ if (pvhtpriv->vht_option == _FALSE) -+ return; -+ -+ pmlmeinfo->VHT_enable = 1; -+ -+ /* B4 Rx LDPC */ -+ if (TEST_FLAG(pvhtpriv->ldpc_cap, LDPC_VHT_ENABLE_TX) && -+ GET_VHT_CAPABILITY_ELE_RX_LDPC(pIE->data)) { -+ SET_FLAG(cur_ldpc_cap, (LDPC_VHT_ENABLE_TX | LDPC_VHT_CAP_TX)); -+ RTW_INFO("Current VHT LDPC Setting = %02X\n", cur_ldpc_cap); -+ } -+ pvhtpriv->ldpc_cap = cur_ldpc_cap; -+ -+ /* B5 Short GI for 80 MHz */ -+ pvhtpriv->sgi_80m = (GET_VHT_CAPABILITY_ELE_SHORT_GI80M(pIE->data) & pvhtpriv->sgi_80m) ? _TRUE : _FALSE; -+ /* RTW_INFO("Current ShortGI80MHz = %d\n", pvhtpriv->sgi_80m); */ -+ -+ /* B8 B9 B10 Rx STBC */ -+ if (TEST_FLAG(pvhtpriv->stbc_cap, STBC_VHT_ENABLE_TX) && -+ GET_VHT_CAPABILITY_ELE_RX_STBC(pIE->data)) { -+ SET_FLAG(cur_stbc_cap, (STBC_VHT_ENABLE_TX | STBC_VHT_CAP_TX)); -+ RTW_INFO("Current VHT STBC Setting = %02X\n", cur_stbc_cap); -+ } -+ pvhtpriv->stbc_cap = cur_stbc_cap; -+#ifdef CONFIG_BEAMFORMING -+#ifdef RTW_BEAMFORMING_VERSION_2 -+ /* -+ * B11 SU Beamformer Capable, -+ * the target supports Beamformer and we are Beamformee -+ */ -+ if (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE) -+ && GET_VHT_CAPABILITY_ELE_SU_BFER(pIE->data)) { -+ SET_FLAG(cur_beamform_cap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE); -+ -+ /* Shift to BEAMFORMING_VHT_BEAMFORMEE_STS_CAP */ -+ SET_FLAG(cur_beamform_cap, GET_VHT_CAPABILITY_ELE_SU_BFEE_STS_CAP(pIE->data) << 8); -+ -+ /* -+ * B19 MU Beamformer Capable, -+ * the target supports Beamformer and we are Beamformee -+ */ -+ if (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_MU_MIMO_STA_ENABLE) -+ && GET_VHT_CAPABILITY_ELE_MU_BFER(pIE->data)) -+ SET_FLAG(cur_beamform_cap, BEAMFORMING_VHT_MU_MIMO_STA_ENABLE); -+ } -+ -+ /* -+ * B12 SU Beamformee Capable, -+ * the target supports Beamformee and we are Beamformer -+ */ -+ if (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE) -+ && GET_VHT_CAPABILITY_ELE_SU_BFEE(pIE->data)) { -+ SET_FLAG(cur_beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE); -+ -+ /* Shit to BEAMFORMING_VHT_BEAMFORMER_SOUND_DIM */ -+ SET_FLAG(cur_beamform_cap, GET_VHT_CAPABILITY_ELE_SU_BFER_SOUND_DIM_NUM(pIE->data) << 12); -+ -+ /* -+ * B20 MU Beamformee Capable, -+ * the target supports Beamformee and we are Beamformer -+ */ -+ if (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_MU_MIMO_AP_ENABLE) -+ && GET_VHT_CAPABILITY_ELE_MU_BFEE(pIE->data)) -+ SET_FLAG(cur_beamform_cap, BEAMFORMING_VHT_MU_MIMO_AP_ENABLE); -+ } -+ -+ pvhtpriv->beamform_cap = cur_beamform_cap; -+ RTW_INFO("Current VHT Beamforming Setting=0x%04X\n", cur_beamform_cap); -+#else /* !RTW_BEAMFORMING_VERSION_2 */ -+ /* B11 SU Beamformer Capable, the target supports Beamformer and we are Beamformee */ -+ if (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE) && -+ GET_VHT_CAPABILITY_ELE_SU_BFEE(pIE->data)) { -+ SET_FLAG(cur_beamform_cap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE); -+ /*Shift to BEAMFORMING_VHT_BEAMFORMER_STS_CAP*/ -+ SET_FLAG(cur_beamform_cap, GET_VHT_CAPABILITY_ELE_SU_BFEE_STS_CAP(pIE->data) << 8); -+ } -+ -+ /* B12 SU Beamformee Capable, the target supports Beamformee and we are Beamformer */ -+ if (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE) && -+ GET_VHT_CAPABILITY_ELE_SU_BFER(pIE->data)) { -+ SET_FLAG(cur_beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE); -+ /*Shit to BEAMFORMING_VHT_BEAMFORMEE_SOUND_DIM*/ -+ SET_FLAG(cur_beamform_cap, GET_VHT_CAPABILITY_ELE_SU_BFER_SOUND_DIM_NUM(pIE->data) << 12); -+ -+ } -+ pvhtpriv->beamform_cap = cur_beamform_cap; -+ if (cur_beamform_cap) -+ RTW_INFO("Current VHT Beamforming Setting = %02X\n", cur_beamform_cap); -+#endif /* !RTW_BEAMFORMING_VERSION_2 */ -+#endif /* CONFIG_BEAMFORMING */ -+ /* B23 B24 B25 Maximum A-MPDU Length Exponent */ -+ pvhtpriv->ampdu_len = GET_VHT_CAPABILITY_ELE_MAX_RXAMPDU_FACTOR(pIE->data); -+ -+ pcap_mcs = GET_VHT_CAPABILITY_ELE_RX_MCS(pIE->data); -+ rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); -+ tx_nss = rtw_min(rf_type_to_rf_tx_cnt(rf_type), hal_spec->tx_nss_num); -+ rtw_vht_nss_to_mcsmap(tx_nss, pvhtpriv->vht_mcs_map, pcap_mcs); -+ pvhtpriv->vht_highest_rate = rtw_get_vht_highest_rate(pvhtpriv->vht_mcs_map); -+} -+ -+void VHT_operation_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) -+{ -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; -+ -+ if (pIE == NULL) -+ return; -+ -+ if (pvhtpriv->vht_option == _FALSE) -+ return; -+} -+ -+void rtw_process_vht_op_mode_notify(_adapter *padapter, u8 *pframe, PVOID sta) -+{ -+ struct sta_info *psta = (struct sta_info *)sta; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; -+ struct registry_priv *regsty = adapter_to_regsty(padapter); -+ u8 target_bw; -+ u8 target_rxss, current_rxss; -+ u8 update_ra = _FALSE; -+ u8 tx_nss = 0, rf_type = RF_1T1R; -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter); -+ -+ if (pvhtpriv->vht_option == _FALSE) -+ return; -+ -+ target_bw = GET_VHT_OPERATING_MODE_FIELD_CHNL_WIDTH(pframe); -+ -+ rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); -+ tx_nss = rtw_min(rf_type_to_rf_tx_cnt(rf_type), hal_spec->tx_nss_num); -+ target_rxss = rtw_min(tx_nss, (GET_VHT_OPERATING_MODE_FIELD_RX_NSS(pframe) + 1)); -+ -+ if (target_bw != psta->cmn.bw_mode) { -+ if (hal_is_bw_support(padapter, target_bw) -+ && REGSTY_IS_BW_5G_SUPPORT(regsty, target_bw) -+ ) { -+ update_ra = _TRUE; -+ psta->cmn.bw_mode = target_bw; -+ } -+ } -+ -+ current_rxss = rtw_vht_mcsmap_to_nss(psta->vhtpriv.vht_mcs_map); -+ if (target_rxss != current_rxss) { -+ u8 vht_mcs_map[2] = {}; -+ -+ update_ra = _TRUE; -+ -+ rtw_vht_nss_to_mcsmap(target_rxss, vht_mcs_map, psta->vhtpriv.vht_mcs_map); -+ _rtw_memcpy(psta->vhtpriv.vht_mcs_map, vht_mcs_map, 2); -+ -+ rtw_hal_update_sta_ra_info(padapter, psta); -+ } -+ -+ if (update_ra) -+ rtw_dm_ra_mask_wk_cmd(padapter, (u8 *)psta); -+} -+ -+u32 rtw_build_vht_operation_ie(_adapter *padapter, u8 *pbuf, u8 channel) -+{ -+ struct registry_priv *pregistrypriv = &padapter->registrypriv; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; -+ /* struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; */ -+ u8 ChnlWidth, center_freq, bw_mode; -+ u32 len = 0; -+ u8 operation[5]; -+ -+ _rtw_memset(operation, 0, 5); -+ -+ bw_mode = REGSTY_BW_5G(pregistrypriv); /* TODO: control op bw with other info */ -+ -+ if (hal_chk_bw_cap(padapter, BW_CAP_80M | BW_CAP_160M) -+ && REGSTY_BW_5G(pregistrypriv) >= CHANNEL_WIDTH_80 -+ ) { -+ center_freq = rtw_get_center_ch(channel, bw_mode, HAL_PRIME_CHNL_OFFSET_LOWER); -+ ChnlWidth = 1; -+ } else { -+ center_freq = 0; -+ ChnlWidth = 0; -+ } -+ -+ -+ SET_VHT_OPERATION_ELE_CHL_WIDTH(operation, ChnlWidth); -+ /* center frequency */ -+ SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ1(operation, center_freq);/* Todo: need to set correct center channel */ -+ SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ2(operation, 0); -+ -+ _rtw_memcpy(operation + 3, pvhtpriv->vht_mcs_map, 2); -+ -+ rtw_set_ie(pbuf, EID_VHTOperation, 5, operation, &len); -+ -+ return len; -+} -+ -+u32 rtw_build_vht_op_mode_notify_ie(_adapter *padapter, u8 *pbuf, u8 bw) -+{ -+ /* struct registry_priv *pregistrypriv = &padapter->registrypriv; */ -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; -+ u32 len = 0; -+ u8 opmode = 0; -+ u8 chnl_width, rx_nss; -+ -+ chnl_width = bw; -+ rx_nss = rtw_vht_mcsmap_to_nss(pvhtpriv->vht_mcs_map); -+ -+ SET_VHT_OPERATING_MODE_FIELD_CHNL_WIDTH(&opmode, chnl_width); -+ SET_VHT_OPERATING_MODE_FIELD_RX_NSS(&opmode, (rx_nss - 1)); -+ SET_VHT_OPERATING_MODE_FIELD_RX_NSS_TYPE(&opmode, 0); /* Todo */ -+ -+ pvhtpriv->vht_op_mode_notify = opmode; -+ -+ pbuf = rtw_set_ie(pbuf, EID_OpModeNotification, 1, &opmode, &len); -+ -+ return len; -+} -+ -+u32 rtw_build_vht_cap_ie(_adapter *padapter, u8 *pbuf) -+{ -+ u8 bw, rf_num, rx_stbc_nss = 0; -+ u16 HighestRate; -+ u8 *pcap, *pcap_mcs; -+ u32 len = 0; -+ u32 rx_packet_offset, max_recvbuf_sz; -+ struct registry_priv *pregistrypriv = &padapter->registrypriv; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ pcap = pvhtpriv->vht_cap; -+ _rtw_memset(pcap, 0, 32); -+ -+ /* B0 B1 Maximum MPDU Length */ -+ rtw_hal_get_def_var(padapter, HAL_DEF_RX_PACKET_OFFSET, &rx_packet_offset); -+ rtw_hal_get_def_var(padapter, HAL_DEF_MAX_RECVBUF_SZ, &max_recvbuf_sz); -+ -+ RTW_DBG("%s, line%d, Available RX buf size = %d bytes\n", __FUNCTION__, __LINE__, max_recvbuf_sz - rx_packet_offset); -+ -+ if ((max_recvbuf_sz - rx_packet_offset) >= 11454) { -+ SET_VHT_CAPABILITY_ELE_MAX_MPDU_LENGTH(pcap, 2); -+ RTW_INFO("%s, line%d, Set MAX MPDU len = 11454 bytes\n", __FUNCTION__, __LINE__); -+ } else if ((max_recvbuf_sz - rx_packet_offset) >= 7991) { -+ SET_VHT_CAPABILITY_ELE_MAX_MPDU_LENGTH(pcap, 1); -+ RTW_INFO("%s, line%d, Set MAX MPDU len = 7991 bytes\n", __FUNCTION__, __LINE__); -+ } else if ((max_recvbuf_sz - rx_packet_offset) >= 3895) { -+ SET_VHT_CAPABILITY_ELE_MAX_MPDU_LENGTH(pcap, 0); -+ RTW_INFO("%s, line%d, Set MAX MPDU len = 3895 bytes\n", __FUNCTION__, __LINE__); -+ } else -+ RTW_ERR("%s, line%d, Error!! Available RX buf size < 3895 bytes\n", __FUNCTION__, __LINE__); -+ -+ /* B2 B3 Supported Channel Width Set */ -+ if (hal_chk_bw_cap(padapter, BW_CAP_160M) && REGSTY_IS_BW_5G_SUPPORT(pregistrypriv, CHANNEL_WIDTH_160)) { -+ if (hal_chk_bw_cap(padapter, BW_CAP_80_80M) && REGSTY_IS_BW_5G_SUPPORT(pregistrypriv, CHANNEL_WIDTH_80_80)) -+ SET_VHT_CAPABILITY_ELE_CHL_WIDTH(pcap, 2); -+ else -+ SET_VHT_CAPABILITY_ELE_CHL_WIDTH(pcap, 1); -+ } else -+ SET_VHT_CAPABILITY_ELE_CHL_WIDTH(pcap, 0); -+ -+ /* B4 Rx LDPC */ -+ if (TEST_FLAG(pvhtpriv->ldpc_cap, LDPC_VHT_ENABLE_RX)) { -+ SET_VHT_CAPABILITY_ELE_RX_LDPC(pcap, 1); -+ RTW_INFO("[VHT] Declare supporting RX LDPC\n"); -+ } -+ -+ /* B5 ShortGI for 80MHz */ -+ SET_VHT_CAPABILITY_ELE_SHORT_GI80M(pcap, pvhtpriv->sgi_80m ? 1 : 0); /* We can receive Short GI of 80M */ -+ if (pvhtpriv->sgi_80m) -+ RTW_INFO("[VHT] Declare supporting SGI 80MHz\n"); -+ -+ /* B6 ShortGI for 160MHz */ -+ /* SET_VHT_CAPABILITY_ELE_SHORT_GI160M(pcap, pvhtpriv->sgi_80m? 1 : 0); */ -+ -+ /* B7 Tx STBC */ -+ if (TEST_FLAG(pvhtpriv->stbc_cap, STBC_VHT_ENABLE_TX)) { -+ SET_VHT_CAPABILITY_ELE_TX_STBC(pcap, 1); -+ RTW_INFO("[VHT] Declare supporting TX STBC\n"); -+ } -+ -+ /* B8 B9 B10 Rx STBC */ -+ if (TEST_FLAG(pvhtpriv->stbc_cap, STBC_VHT_ENABLE_RX)) { -+ rtw_hal_get_def_var(padapter, HAL_DEF_RX_STBC, (u8 *)(&rx_stbc_nss)); -+ -+ SET_VHT_CAPABILITY_ELE_RX_STBC(pcap, rx_stbc_nss); -+ RTW_INFO("[VHT] Declare supporting RX STBC = %d\n", rx_stbc_nss); -+ } -+ #ifdef CONFIG_BEAMFORMING -+ /* B11 SU Beamformer Capable */ -+ if (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE)) { -+ SET_VHT_CAPABILITY_ELE_SU_BFER(pcap, 1); -+ RTW_INFO("[VHT] Declare supporting SU Bfer\n"); -+ /* B16 17 18 Number of Sounding Dimensions */ -+ rtw_hal_get_def_var(padapter, HAL_DEF_BEAMFORMER_CAP, (u8 *)&rf_num); -+ SET_VHT_CAPABILITY_ELE_SOUNDING_DIMENSIONS(pcap, rf_num); -+ /* B19 MU Beamformer Capable */ -+ if (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_MU_MIMO_AP_ENABLE)) { -+ SET_VHT_CAPABILITY_ELE_MU_BFER(pcap, 1); -+ RTW_INFO("[VHT] Declare supporting MU Bfer\n"); -+ } -+ } -+ -+ /* B12 SU Beamformee Capable */ -+ if (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE)) { -+ SET_VHT_CAPABILITY_ELE_SU_BFEE(pcap, 1); -+ RTW_INFO("[VHT] Declare supporting SU Bfee\n"); -+ -+ rtw_hal_get_def_var(padapter, HAL_DEF_BEAMFORMEE_CAP, (u8 *)&rf_num); -+ -+ /* IOT action suggested by Yu Chen 2017/3/3 */ -+#ifdef CONFIG_80211AC_VHT -+ if ((pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_BROADCOM) && -+ !pvhtpriv->ap_is_mu_bfer) -+ rf_num = (rf_num >= 2 ? 2 : rf_num); -+#endif -+ /* B13 14 15 Compressed Steering Number of Beamformer Antennas Supported */ -+ SET_VHT_CAPABILITY_ELE_BFER_ANT_SUPP(pcap, rf_num); -+ /* B20 SU Beamformee Capable */ -+ if (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_MU_MIMO_STA_ENABLE)) { -+ SET_VHT_CAPABILITY_ELE_MU_BFEE(pcap, 1); -+ RTW_INFO("[VHT] Declare supporting MU Bfee\n"); -+ } -+ } -+ #endif/*CONFIG_BEAMFORMING*/ -+ -+ /* B21 VHT TXOP PS */ -+ SET_VHT_CAPABILITY_ELE_TXOP_PS(pcap, 0); -+ /* B22 +HTC-VHT Capable */ -+ SET_VHT_CAPABILITY_ELE_HTC_VHT(pcap, 1); -+ /* B23 24 25 Maximum A-MPDU Length Exponent */ -+ if (pregistrypriv->ampdu_factor != 0xFE) -+ SET_VHT_CAPABILITY_ELE_MAX_RXAMPDU_FACTOR(pcap, pregistrypriv->ampdu_factor); -+ else -+ SET_VHT_CAPABILITY_ELE_MAX_RXAMPDU_FACTOR(pcap, 7); -+ /* B26 27 VHT Link Adaptation Capable */ -+ SET_VHT_CAPABILITY_ELE_LINK_ADAPTION(pcap, 0); -+ -+ pcap_mcs = GET_VHT_CAPABILITY_ELE_RX_MCS(pcap); -+ _rtw_memcpy(pcap_mcs, pvhtpriv->vht_mcs_map, 2); -+ -+ pcap_mcs = GET_VHT_CAPABILITY_ELE_TX_MCS(pcap); -+ _rtw_memcpy(pcap_mcs, pvhtpriv->vht_mcs_map, 2); -+ -+ /* find the largest bw supported by both registry and hal */ -+ bw = hal_largest_bw(padapter, REGSTY_BW_5G(pregistrypriv)); -+ -+ HighestRate = VHT_MCS_DATA_RATE[bw][pvhtpriv->sgi_80m][((pvhtpriv->vht_highest_rate - MGN_VHT1SS_MCS0) & 0x3f)]; -+ HighestRate = (HighestRate + 1) >> 1; -+ -+ SET_VHT_CAPABILITY_ELE_MCS_RX_HIGHEST_RATE(pcap, HighestRate); /* indicate we support highest rx rate is 600Mbps. */ -+ SET_VHT_CAPABILITY_ELE_MCS_TX_HIGHEST_RATE(pcap, HighestRate); /* indicate we support highest tx rate is 600Mbps. */ -+ -+ pbuf = rtw_set_ie(pbuf, EID_VHTCapability, 12, pcap, &len); -+ -+ return len; -+} -+ -+u32 rtw_restructure_vht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, uint in_len, uint *pout_len) -+{ -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); -+ RT_CHANNEL_INFO *chset = rfctl->channel_set; -+ u32 ielen; -+ u8 max_bw; -+ u8 oper_ch, oper_bw = CHANNEL_WIDTH_20, oper_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ u8 *out_vht_op_ie, *ht_op_ie, *vht_cap_ie, *vht_op_ie; -+ struct registry_priv *pregistrypriv = &padapter->registrypriv; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; -+ -+ rtw_vht_use_default_setting(padapter); -+ -+ ht_op_ie = rtw_get_ie(in_ie + 12, WLAN_EID_HT_OPERATION, &ielen, in_len - 12); -+ if (!ht_op_ie || ielen != HT_OP_IE_LEN) -+ goto exit; -+ vht_cap_ie = rtw_get_ie(in_ie + 12, EID_VHTCapability, &ielen, in_len - 12); -+ if (!vht_cap_ie || ielen != VHT_CAP_IE_LEN) -+ goto exit; -+ vht_op_ie = rtw_get_ie(in_ie + 12, EID_VHTOperation, &ielen, in_len - 12); -+ if (!vht_op_ie || ielen != VHT_OP_IE_LEN) -+ goto exit; -+ -+ /* VHT Capabilities element */ -+ *pout_len += rtw_build_vht_cap_ie(padapter, out_ie + *pout_len); -+ -+ -+ /* VHT Operation element */ -+ out_vht_op_ie = out_ie + *pout_len; -+ rtw_set_ie(out_vht_op_ie, EID_VHTOperation, VHT_OP_IE_LEN, vht_op_ie + 2 , pout_len); -+ -+ /* get primary channel from HT_OP_IE */ -+ oper_ch = GET_HT_OP_ELE_PRI_CHL(ht_op_ie + 2); -+ -+ /* find the largest bw supported by both registry and hal */ -+ max_bw = hal_largest_bw(padapter, REGSTY_BW_5G(pregistrypriv)); -+ -+ if (max_bw >= CHANNEL_WIDTH_40) { -+ /* get bw offset form HT_OP_IE */ -+ if (GET_HT_OP_ELE_STA_CHL_WIDTH(ht_op_ie + 2)) { -+ switch (GET_HT_OP_ELE_2ND_CHL_OFFSET(ht_op_ie + 2)) { -+ case SCA: -+ oper_bw = CHANNEL_WIDTH_40; -+ oper_offset = HAL_PRIME_CHNL_OFFSET_LOWER; -+ break; -+ case SCB: -+ oper_bw = CHANNEL_WIDTH_40; -+ oper_offset = HAL_PRIME_CHNL_OFFSET_UPPER; -+ break; -+ } -+ } -+ -+ if (oper_bw == CHANNEL_WIDTH_40) { -+ switch (GET_VHT_OPERATION_ELE_CHL_WIDTH(vht_op_ie + 2)) { -+ case 1: /* 80MHz */ -+ case 2: /* 160MHz */ -+ case 3: /* 80+80 */ -+ oper_bw = CHANNEL_WIDTH_80; /* only support up to 80MHz for now */ -+ break; -+ } -+ -+ oper_bw = rtw_min(oper_bw, max_bw); -+ -+ /* try downgrage bw to fit in channel plan setting */ -+ while (!rtw_chset_is_chbw_valid(chset, oper_ch, oper_bw, oper_offset) -+ || (IS_DFS_SLAVE_WITH_RD(rfctl) -+ && !rtw_odm_dfs_domain_unknown(rfctl_to_dvobj(rfctl)) -+ && rtw_chset_is_chbw_non_ocp(chset, oper_ch, oper_bw, oper_offset)) -+ ) { -+ oper_bw--; -+ if (oper_bw == CHANNEL_WIDTH_20) { -+ oper_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ break; -+ } -+ } -+ } -+ } -+ -+ rtw_warn_on(!rtw_chset_is_chbw_valid(chset, oper_ch, oper_bw, oper_offset)); -+ if (IS_DFS_SLAVE_WITH_RD(rfctl) && !rtw_odm_dfs_domain_unknown(rfctl_to_dvobj(rfctl))) -+ rtw_warn_on(rtw_chset_is_chbw_non_ocp(chset, oper_ch, oper_bw, oper_offset)); -+ -+ /* update VHT_OP_IE */ -+ if (oper_bw < CHANNEL_WIDTH_80) { -+ SET_VHT_OPERATION_ELE_CHL_WIDTH(out_vht_op_ie + 2, 0); -+ SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ1(out_vht_op_ie + 2, 0); -+ SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ2(out_vht_op_ie + 2, 0); -+ } else if (oper_bw == CHANNEL_WIDTH_80) { -+ u8 cch = rtw_get_center_ch(oper_ch, oper_bw, oper_offset); -+ -+ SET_VHT_OPERATION_ELE_CHL_WIDTH(out_vht_op_ie + 2, 1); -+ SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ1(out_vht_op_ie + 2, cch); -+ SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ2(out_vht_op_ie + 2, 0); -+ } else { -+ RTW_ERR(FUNC_ADPT_FMT" unsupported BW:%u\n", FUNC_ADPT_ARG(padapter), oper_bw); -+ rtw_warn_on(1); -+ } -+ -+ /* Operating Mode Notification element */ -+ *pout_len += rtw_build_vht_op_mode_notify_ie(padapter, out_ie + *pout_len, oper_bw); -+ -+ pvhtpriv->vht_option = _TRUE; -+ -+exit: -+ return pvhtpriv->vht_option; -+ -+} -+ -+void VHTOnAssocRsp(_adapter *padapter) -+{ -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ u8 ht_AMPDU_len; -+ -+ RTW_INFO("%s\n", __FUNCTION__); -+ -+ if (!pmlmeinfo->HT_enable) -+ return; -+ -+ if (!pmlmeinfo->VHT_enable) -+ return; -+ -+ ht_AMPDU_len = pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x03; -+ -+ if (pvhtpriv->ampdu_len > ht_AMPDU_len) -+ rtw_hal_set_hwreg(padapter, HW_VAR_AMPDU_FACTOR, (u8 *)(&pvhtpriv->ampdu_len)); -+ -+ rtw_hal_set_hwreg(padapter, HW_VAR_AMPDU_MAX_TIME, (u8 *)(&pvhtpriv->vht_highest_rate)); -+} -+ -+void rtw_vht_ies_attach(_adapter *padapter, WLAN_BSSID_EX *pnetwork) -+{ -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ u8 cap_len, operation_len; -+ uint len = 0; -+ sint ie_len = 0; -+ u8 *p = NULL; -+ -+ p = rtw_get_ie(pnetwork->IEs + _BEACON_IE_OFFSET_, EID_VHTCapability, &ie_len, -+ (pnetwork->IELength - _BEACON_IE_OFFSET_)); -+ if (p && ie_len > 0) -+ return; -+ -+ rtw_vht_use_default_setting(padapter); -+ -+ /* VHT Operation mode notifiy bit in Extended IE (127) */ -+ SET_EXT_CAPABILITY_ELE_OP_MODE_NOTIF(pmlmepriv->ext_capab_ie_data, 1); -+ pmlmepriv->ext_capab_ie_len = 10; -+ rtw_set_ie(pnetwork->IEs + pnetwork->IELength, EID_EXTCapability, 8, pmlmepriv->ext_capab_ie_data, &len); -+ pnetwork->IELength += pmlmepriv->ext_capab_ie_len; -+ -+ /* VHT Capabilities element */ -+ cap_len = rtw_build_vht_cap_ie(padapter, pnetwork->IEs + pnetwork->IELength); -+ pnetwork->IELength += cap_len; -+ -+ /* VHT Operation element */ -+ operation_len = rtw_build_vht_operation_ie(padapter, pnetwork->IEs + pnetwork->IELength, -+ pnetwork->Configuration.DSConfig); -+ pnetwork->IELength += operation_len; -+ -+ rtw_check_for_vht20(padapter, pnetwork->IEs + _BEACON_IE_OFFSET_, pnetwork->IELength - _BEACON_IE_OFFSET_); -+ -+ pmlmepriv->vhtpriv.vht_option = _TRUE; -+} -+ -+void rtw_vht_ies_detach(_adapter *padapter, WLAN_BSSID_EX *pnetwork) -+{ -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ -+ rtw_remove_bcn_ie(padapter, pnetwork, EID_EXTCapability); -+ rtw_remove_bcn_ie(padapter, pnetwork, EID_VHTCapability); -+ rtw_remove_bcn_ie(padapter, pnetwork, EID_VHTOperation); -+ -+ pmlmepriv->vhtpriv.vht_option = _FALSE; -+} -+ -+void rtw_check_for_vht20(_adapter *adapter, u8 *ies, int ies_len) -+{ -+ u8 ht_ch, ht_bw, ht_offset; -+ u8 vht_ch, vht_bw, vht_offset; -+ -+ rtw_ies_get_chbw(ies, ies_len, &ht_ch, &ht_bw, &ht_offset, 1, 0); -+ rtw_ies_get_chbw(ies, ies_len, &vht_ch, &vht_bw, &vht_offset, 1, 1); -+ -+ if (ht_bw == CHANNEL_WIDTH_20 && vht_bw >= CHANNEL_WIDTH_80) { -+ u8 *vht_op_ie; -+ int vht_op_ielen; -+ -+ RTW_INFO(FUNC_ADPT_FMT" vht80 is not allowed without ht40\n", FUNC_ADPT_ARG(adapter)); -+ vht_op_ie = rtw_get_ie(ies, EID_VHTOperation, &vht_op_ielen, ies_len); -+ if (vht_op_ie && vht_op_ielen) { -+ RTW_INFO(FUNC_ADPT_FMT" switch to vht20\n", FUNC_ADPT_ARG(adapter)); -+ SET_VHT_OPERATION_ELE_CHL_WIDTH(vht_op_ie + 2, 0); -+ SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ1(vht_op_ie + 2, 0); -+ SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ2(vht_op_ie + 2, 0); -+ } -+ } -+} -+#endif /* CONFIG_80211AC_VHT */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_wlan_util.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_wlan_util.c ---- linux-5.11.4/3rdparty/rtl8812au/core/rtw_wlan_util.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_wlan_util.c 2021-03-07 18:16:17.027954777 +0200 -@@ -0,0 +1,4972 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/core/rtw_wlan_util.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_wlan_util.c +--- linux-6.3.4/drivers/staging/rtl8812au/core/rtw_wlan_util.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_wlan_util.c 2022-01-28 22:59:35.563651847 +0200 +@@ -0,0 +1,4973 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. @@ -110183,12 +110032,13 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_wlan_util.c linux-5.11.4-rtl + goto exit; + else { + if(*(p+1) > 6 ) { -+ for(i=0; i<9;i++) ++ for(i=0; i<9;i++) { + RTW_INFO("p[%d]=0x%x",i,*(p+i) ); + RTW_INFO("\n"); ++ } + if(*(p+6) != 2) + goto exit; -+ ++ + if(*(p+8) == RT_HT_CAP_USE_JAGUAR_BCUT) + sta->vendor_8812 = TRUE; + else if (*(p+8) == RT_HT_CAP_USE_JAGUAR_CCUT) @@ -111930,9 +111780,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_wlan_util.c linux-5.11.4-rtl + /*TODO get offset of bcn's timestamp*/ + /*pmlmeext->bcn_timestamp;*/ +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_xmit.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_xmit.c ---- linux-5.11.4/3rdparty/rtl8812au/core/rtw_xmit.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/core/rtw_xmit.c 2021-03-07 18:16:17.028954824 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/core/rtw_xmit.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_xmit.c +--- linux-6.3.4/drivers/staging/rtl8812au/core/rtw_xmit.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/core/rtw_xmit.c 2022-01-28 22:59:35.563651847 +0200 @@ -0,0 +1,6097 @@ +/****************************************************************************** + * @@ -118031,9 +117881,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/core/rtw_xmit.c linux-5.11.4-rtl8812a + RTW_INFO("%s ack_tx not set\n", __func__); +} +#endif /* CONFIG_XMIT_ACK */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/efuse/efuse_mask.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/efuse/efuse_mask.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/efuse/efuse_mask.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/efuse/efuse_mask.h 2021-03-07 18:16:17.049955817 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/efuse/efuse_mask.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/efuse/efuse_mask.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/efuse/efuse_mask.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/efuse/efuse_mask.h 2022-01-28 22:59:35.584652843 +0200 @@ -0,0 +1,164 @@ +/****************************************************************************** + * @@ -118199,9 +118049,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/efuse/efuse_mask.h linux-5.11.4-r + #endif + +#endif /*CONFIG_SDIO_HCI*/ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8812A_PCIE.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8812A_PCIE.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8812A_PCIE.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8812A_PCIE.c 2021-03-07 18:16:17.049955817 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8812A_PCIE.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8812A_PCIE.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8812A_PCIE.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8812A_PCIE.c 2022-01-28 22:59:35.584652843 +0200 @@ -0,0 +1,94 @@ +/****************************************************************************** + * @@ -118297,9 +118147,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8812A_ + + return (result > 0) ? 0 : 1; +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8812A_PCIE.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8812A_PCIE.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8812A_PCIE.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8812A_PCIE.h 2021-03-07 18:16:17.049955817 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8812A_PCIE.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8812A_PCIE.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8812A_PCIE.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8812A_PCIE.h 2022-01-28 22:59:35.584652843 +0200 @@ -0,0 +1,33 @@ +/****************************************************************************** + * @@ -118334,9 +118184,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8812A_ +EFUSE_IsAddressMasked_MP_8812A_MPCIE(/* TC: Test Chip, MP: MP Chip */ + IN u2Byte Offset +); -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8812A_USB.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8812A_USB.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8812A_USB.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8812A_USB.c 2021-03-07 18:16:17.049955817 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8812A_USB.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8812A_USB.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8812A_USB.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8812A_USB.c 2022-01-28 22:59:35.584652843 +0200 @@ -0,0 +1,94 @@ +/****************************************************************************** + * @@ -118432,9 +118282,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8812A_ + + return (result > 0) ? 0 : 1; +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8812A_USB.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8812A_USB.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8812A_USB.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8812A_USB.h 2021-03-07 18:16:17.049955817 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8812A_USB.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8812A_USB.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8812A_USB.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8812A_USB.h 2022-01-28 22:59:35.584652843 +0200 @@ -0,0 +1,34 @@ +/****************************************************************************** + * @@ -118470,9 +118320,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8812A_ +EFUSE_IsAddressMasked_MP_8812A_MUSB(/* TC: Test Chip, MP: MP Chip */ + IN u2Byte Offset +); -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_PCIE.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_PCIE.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_PCIE.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_PCIE.c 2021-03-07 18:16:17.049955817 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_PCIE.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_PCIE.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_PCIE.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_PCIE.c 2022-01-28 22:59:35.584652843 +0200 @@ -0,0 +1,93 @@ +/****************************************************************************** + * @@ -118567,9 +118417,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_ + + return (result > 0) ? 0 : 1; +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_PCIE.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_PCIE.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_PCIE.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_PCIE.h 2021-03-07 18:16:17.049955817 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_PCIE.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_PCIE.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_PCIE.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_PCIE.h 2022-01-28 22:59:35.584652843 +0200 @@ -0,0 +1,33 @@ +/****************************************************************************** + * @@ -118604,9 +118454,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_ +EFUSE_IsAddressMasked_MP_8821A_MPCIE(/* TC: Test Chip, MP: MP Chip */ + IN u2Byte Offset +); -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_SDIO.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_SDIO.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_SDIO.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_SDIO.c 2021-03-07 18:16:17.049955817 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_SDIO.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_SDIO.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_SDIO.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_SDIO.c 2022-01-28 22:59:35.584652843 +0200 @@ -0,0 +1,96 @@ +/****************************************************************************** + * @@ -118704,9 +118554,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_ + + return (result > 0) ? 0 : 1; +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_SDIO.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_SDIO.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_SDIO.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_SDIO.h 2021-03-07 18:16:17.049955817 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_SDIO.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_SDIO.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_SDIO.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_SDIO.h 2022-01-28 22:59:35.584652843 +0200 @@ -0,0 +1,31 @@ +/****************************************************************************** + * @@ -118739,9 +118589,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_ +EFUSE_IsAddressMasked_MP_8821A_MSDIO(/* TC: Test Chip, MP: MP Chip */ + IN u2Byte Offset +); -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_USB.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_USB.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_USB.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_USB.c 2021-03-07 18:16:17.049955817 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_USB.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_USB.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_USB.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_USB.c 2022-01-28 22:59:35.584652843 +0200 @@ -0,0 +1,95 @@ +/****************************************************************************** + * @@ -118838,9 +118688,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_ + + return (result > 0) ? 0 : 1; +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_USB.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_USB.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_USB.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_USB.h 2021-03-07 18:16:17.049955817 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_USB.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_USB.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_USB.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_USB.h 2022-01-28 22:59:35.584652843 +0200 @@ -0,0 +1,31 @@ +/****************************************************************************** + * @@ -118873,9 +118723,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/efuse/rtl8812a/HalEfuseMask8821A_ +EFUSE_IsAddressMasked_MP_8821A_MUSB(/* TC: Test Chip, MP: MP Chip */ + IN u2Byte Offset +); -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_PCIE.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_PCIE.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_PCIE.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_PCIE.c 2021-03-07 18:16:17.049955817 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_PCIE.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_PCIE.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_PCIE.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_PCIE.c 2022-01-28 22:59:35.584652843 +0200 @@ -0,0 +1,93 @@ +/****************************************************************************** +* @@ -118970,9 +118820,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_ + return (result > 0) ? 0 : 1; +} + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_PCIE.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_PCIE.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_PCIE.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_PCIE.h 2021-03-07 18:16:17.049955817 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_PCIE.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_PCIE.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_PCIE.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_PCIE.h 2022-01-28 22:59:35.584652843 +0200 @@ -0,0 +1,33 @@ +/****************************************************************************** +* @@ -119007,9 +118857,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_ +BOOLEAN EFUSE_IsAddressMasked_MP_8814A_MPCIE(u2Byte Offset); + + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_USB.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_USB.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_USB.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_USB.c 2021-03-07 18:16:17.049955817 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_USB.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_USB.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_USB.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_USB.c 2022-01-28 22:59:35.584652843 +0200 @@ -0,0 +1,90 @@ +/****************************************************************************** +* @@ -119101,9 +118951,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_ + return (result > 0) ? 0 : 1; +} + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_USB.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_USB.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_USB.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_USB.h 2021-03-07 18:16:17.049955817 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_USB.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_USB.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_USB.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_USB.h 2022-01-28 22:59:35.584652843 +0200 @@ -0,0 +1,33 @@ +/****************************************************************************** +* @@ -119138,9 +118988,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_ + +BOOLEAN EFUSE_IsAddressMasked_MP_8814A_MUSB(u2Byte Offset); + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_btcoex.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/hal_btcoex.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/hal_btcoex.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/hal_btcoex.c 2021-03-07 18:16:17.049955817 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/hal_btcoex.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/hal_btcoex.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/hal_btcoex.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/hal_btcoex.c 2022-01-28 22:59:35.585652890 +0200 @@ -0,0 +1,5706 @@ +/****************************************************************************** + * @@ -124848,9 +124698,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_btcoex.c linux-5.11.4-rtl8812 + EXhalbtcoutsrc_rx_rate_change_notify(&GLBtCoexist, is_data_frame, EXhalbtcoutsrc_rate_id_to_btc_rate_id(rate_id)); +} +#endif /* CONFIG_BT_COEXIST */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_btcoex_wifionly.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/hal_btcoex_wifionly.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/hal_btcoex_wifionly.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/hal_btcoex_wifionly.c 2021-03-07 18:16:17.049955817 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/hal_btcoex_wifionly.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/hal_btcoex_wifionly.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/hal_btcoex_wifionly.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/hal_btcoex_wifionly.c 2022-01-28 22:59:35.585652890 +0200 @@ -0,0 +1,224 @@ +/****************************************************************************** + * @@ -125076,10 +124926,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_btcoex_wifionly.c linux-5.11. + +#endif + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_com.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/hal_com.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/hal_com.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/hal_com.c 2021-03-07 18:16:17.051955911 +0200 -@@ -0,0 +1,14640 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/hal_com.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/hal_com.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/hal_com.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/hal_com.c 2023-05-26 22:35:36.543136899 +0300 +@@ -0,0 +1,14360 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. @@ -129412,28 +129262,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_com.c linux-5.11.4-rtl8812au/ + if (ret != _SUCCESS) + goto exit; + -+#if defined(CONFIG_RTL8188E) -+ if (rtw_get_chip_type(adapter) == RTL8188E) { -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ -+ /* 8188E FW doesn't set macid no link, driver does it by self */ -+ if (opmode) -+ rtw_hal_set_hwreg(adapter, HW_VAR_MACID_LINK, &macid); -+ else -+ rtw_hal_set_hwreg(adapter, HW_VAR_MACID_NOLINK, &macid); -+ -+ /* for 8188E RA */ -+#if (RATE_ADAPTIVE_SUPPORT == 1) -+ if (hal_data->fw_ractrl == _FALSE) { -+ u8 max_macid; -+ -+ max_macid = rtw_search_max_mac_id(adapter); -+ rtw_hal_set_hwreg(adapter, HW_VAR_TX_RPT_MAX_MACID, &max_macid); -+ } -+#endif -+ } -+#endif -+ +#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) + /* TODO: this should move to IOT issue area */ + if (rtw_get_chip_type(adapter) == RTL8812 @@ -129838,21 +129666,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_com.c linux-5.11.4-rtl8812au/ + rtw_write32(adapter, REG_RXPKT_NUM, + (rtw_read32(adapter, REG_RXPKT_NUM) & (~RW_RELEASE_EN))); +} -+#if defined(CONFIG_RTL8188E) -+static void rtw_hal_disable_tx_report(_adapter *adapter) -+{ -+ rtw_write8(adapter, REG_TX_RPT_CTRL, -+ ((rtw_read8(adapter, REG_TX_RPT_CTRL) & ~BIT(1))) & ~BIT(5)); -+ RTW_INFO("disable TXRPT:0x%02x\n", rtw_read8(adapter, REG_TX_RPT_CTRL)); -+} -+ -+static void rtw_hal_enable_tx_report(_adapter *adapter) -+{ -+ rtw_write8(adapter, REG_TX_RPT_CTRL, -+ ((rtw_read8(adapter, REG_TX_RPT_CTRL) | BIT(1))) | BIT(5)); -+ RTW_INFO("enable TX_RPT:0x%02x\n", rtw_read8(adapter, REG_TX_RPT_CTRL)); -+} -+#endif +static void rtw_hal_release_rx_dma(_adapter *adapter) +{ + u32 val32 = 0; @@ -130938,10 +130751,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_com.c linux-5.11.4-rtl8812au/ + issue_beacon(padapter, 0); + + rtw_msleep_os(2); -+ #if defined(CONFIG_RTL8188E) -+ if (IS_HARDWARE_TYPE_8188E(padapter)) -+ rtw_hal_disable_tx_report(padapter); -+ #endif + /* RX DMA stop */ + res = rtw_hal_pause_rx_dma(padapter); + if (res == _FAIL) @@ -131002,11 +130811,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_com.c linux-5.11.4-rtl8812au/ + } +#endif /*DBG_CHECK_FW_PS_STATE*/ + -+ #if defined(CONFIG_RTL8188E) -+ if (IS_HARDWARE_TYPE_8188E(padapter)) -+ rtw_hal_enable_tx_report(padapter); -+ #endif -+ + rtw_hal_force_enable_rxdma(padapter); + + rtw_hal_fw_dl(padapter, _FALSE); @@ -134686,10 +134490,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_com.c linux-5.11.4-rtl8812au/ + (u8 *)&media_status_rpt); + + /* RX DMA stop */ -+ #if defined(CONFIG_RTL8188E) -+ if (IS_HARDWARE_TYPE_8188E(adapter)) -+ rtw_hal_disable_tx_report(adapter); -+ #endif + + res = rtw_hal_pause_rx_dma(adapter); + if (res == _FAIL) @@ -134878,11 +134678,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_com.c linux-5.11.4-rtl8812au/ + #endif + rtw_hal_release_rx_dma(adapter); + -+ #if defined(CONFIG_RTL8188E) -+ if (IS_HARDWARE_TYPE_8188E(adapter)) -+ rtw_hal_enable_tx_report(adapter); -+ #endif -+ + if ((pwrctl->wowlan_wake_reason != RX_DISASSOC) && + (pwrctl->wowlan_wake_reason != RX_DEAUTH) && + (pwrctl->wowlan_wake_reason != FW_DECISION_DISCONNECT)) { @@ -137651,7 +137446,7 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_com.c linux-5.11.4-rtl8812au/ + + /*RTW_INFO("=>%s WIFI_DATA_TYPE or WIFI_QOS_DATA_TYPE\n", __FUNCTION__);*/ + if (psta) { -+ if (IS_MCAST(get_ra(get_recvframe_data(prframe)))) ++ if (IS_MCAST(wifi_get_ra(get_recvframe_data(prframe)))) + psta_dframe_info = &psta->sta_dframe_info_bmc; + else + psta_dframe_info = &psta->sta_dframe_info; @@ -137686,61 +137481,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_com.c linux-5.11.4-rtl8812au/ + interface_type = rtw_get_intf_type(adapter); + + switch (rtw_get_chip_type(adapter)) { -+#ifdef CONFIG_RTL8723B -+ case RTL8723B: -+ if (interface_type == RTW_USB) -+ addr_offset = EEPROM_MAC_ADDR_8723BU; -+ else if (interface_type == RTW_SDIO) -+ addr_offset = EEPROM_MAC_ADDR_8723BS; -+ else if (interface_type == RTW_PCIE) -+ addr_offset = EEPROM_MAC_ADDR_8723BE; -+ break; -+#endif -+#ifdef CONFIG_RTL8703B -+ case RTL8703B: -+ if (interface_type == RTW_USB) -+ addr_offset = EEPROM_MAC_ADDR_8703BU; -+ else if (interface_type == RTW_SDIO) -+ addr_offset = EEPROM_MAC_ADDR_8703BS; -+ break; -+#endif -+#ifdef CONFIG_RTL8723D -+ case RTL8723D: -+ if (interface_type == RTW_USB) -+ addr_offset = EEPROM_MAC_ADDR_8723DU; -+ else if (interface_type == RTW_SDIO) -+ addr_offset = EEPROM_MAC_ADDR_8723DS; -+ else if (interface_type == RTW_PCIE) -+ addr_offset = EEPROM_MAC_ADDR_8723DE; -+ break; -+#endif -+ -+#ifdef CONFIG_RTL8188E -+ case RTL8188E: -+ if (interface_type == RTW_USB) -+ addr_offset = EEPROM_MAC_ADDR_88EU; -+ else if (interface_type == RTW_SDIO) -+ addr_offset = EEPROM_MAC_ADDR_88ES; -+ else if (interface_type == RTW_PCIE) -+ addr_offset = EEPROM_MAC_ADDR_88EE; -+ break; -+#endif -+#ifdef CONFIG_RTL8188F -+ case RTL8188F: -+ if (interface_type == RTW_USB) -+ addr_offset = EEPROM_MAC_ADDR_8188FU; -+ else if (interface_type == RTW_SDIO) -+ addr_offset = EEPROM_MAC_ADDR_8188FS; -+ break; -+#endif -+#ifdef CONFIG_RTL8188GTV -+ case RTL8188GTV: -+ if (interface_type == RTW_USB) -+ addr_offset = EEPROM_MAC_ADDR_8188GTVU; -+ else if (interface_type == RTW_SDIO) -+ addr_offset = EEPROM_MAC_ADDR_8188GTVS; -+ break; -+#endif +#ifdef CONFIG_RTL8812A + case RTL8812: + if (interface_type == RTW_USB) @@ -137759,16 +137499,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_com.c linux-5.11.4-rtl8812au/ + addr_offset = EEPROM_MAC_ADDR_8821AE; + break; +#endif -+#ifdef CONFIG_RTL8192E -+ case RTL8192E: -+ if (interface_type == RTW_USB) -+ addr_offset = EEPROM_MAC_ADDR_8192EU; -+ else if (interface_type == RTW_SDIO) -+ addr_offset = EEPROM_MAC_ADDR_8192ES; -+ else if (interface_type == RTW_PCIE) -+ addr_offset = EEPROM_MAC_ADDR_8192EE; -+ break; -+#endif +#ifdef CONFIG_RTL8814A + case RTL8814A: + if (interface_type == RTW_USB) @@ -137778,46 +137508,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_com.c linux-5.11.4-rtl8812au/ + break; +#endif + -+#ifdef CONFIG_RTL8822B -+ case RTL8822B: -+ if (interface_type == RTW_USB) -+ addr_offset = EEPROM_MAC_ADDR_8822BU; -+ else if (interface_type == RTW_SDIO) -+ addr_offset = EEPROM_MAC_ADDR_8822BS; -+ else if (interface_type == RTW_PCIE) -+ addr_offset = EEPROM_MAC_ADDR_8822BE; -+ break; -+#endif /* CONFIG_RTL8822B */ -+ -+#ifdef CONFIG_RTL8821C -+ case RTL8821C: -+ if (interface_type == RTW_USB) -+ addr_offset = EEPROM_MAC_ADDR_8821CU; -+ else if (interface_type == RTW_SDIO) -+ addr_offset = EEPROM_MAC_ADDR_8821CS; -+ else if (interface_type == RTW_PCIE) -+ addr_offset = EEPROM_MAC_ADDR_8821CE; -+ break; -+#endif /* CONFIG_RTL8821C */ -+ -+#ifdef CONFIG_RTL8710B -+ case RTL8710B: -+ if (interface_type == RTW_USB) -+ addr_offset = EEPROM_MAC_ADDR_8710B; -+ break; -+#endif -+ -+#ifdef CONFIG_RTL8192F -+ case RTL8192F: -+ if (interface_type == RTW_USB) -+ addr_offset = EEPROM_MAC_ADDR_8192FU; -+ else if (interface_type == RTW_SDIO) -+ addr_offset = EEPROM_MAC_ADDR_8192FS; -+ else if (interface_type == RTW_PCIE) -+ addr_offset = EEPROM_MAC_ADDR_8192FE; -+ break; -+#endif /* CONFIG_RTL8192F */ -+ + } + + if (addr_offset == -1) { @@ -138035,32 +137725,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_com.c linux-5.11.4-rtl8812au/ + } else + RTW_INFO("Using the default RF gain.\n"); + -+#elif defined(CONFIG_RTL8188E) -+ if (value & BIT4 && (registry_par->RegPwrTrimEnable == 1)) { -+ RTW_INFO("8188ES Offset RF Gain.\n"); -+ RTW_INFO("8188ES Offset RF Gain. EEPROMRFGainVal=0x%x\n", -+ pHalData->EEPROMRFGainVal); -+ -+ if (pHalData->EEPROMRFGainVal != 0xff) { -+ res = rtw_hal_read_rfreg(padapter, RF_PATH_A, -+ REG_RF_BB_GAIN_OFFSET, 0xffffffff); -+ -+ RTW_INFO("Offset RF Gain. reg 0x55=0x%x\n", res); -+ res &= 0xfff87fff; -+ -+ res |= (pHalData->EEPROMRFGainVal & 0x0f) << 15; -+ RTW_INFO("Offset RF Gain. res=0x%x\n", res); -+ -+ rtw_hal_write_rfreg(padapter, RF_PATH_A, -+ REG_RF_BB_GAIN_OFFSET, -+ RF_GAIN_OFFSET_MASK, res); -+ } else { -+ RTW_INFO("Offset RF Gain. EEPROMRFGainVal=0x%x == 0xff, didn't run Kfree\n", -+ pHalData->EEPROMRFGainVal); -+ } -+ } else -+ RTW_INFO("Using the default RF gain.\n"); -+#else + /* TODO: call this when channel switch */ + if (kfree_data->flag & KFREE_FLAG_ON) + rtw_rf_apply_tx_gain_offset(padapter, 6); /* input ch6 to select BB_GAIN_2G */ @@ -138792,14 +138456,8 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_com.c linux-5.11.4-rtl8812au/ + return curr_tx_sgi; + + if (padapter->fix_rate == 0xff) { -+#if defined(CONFIG_RTL8188E) -+#if (RATE_ADAPTIVE_SUPPORT == 1) -+ curr_tx_sgi = hal_data->odmpriv.ra_info[psta->cmn.mac_id].rate_sgi; -+#endif /* (RATE_ADAPTIVE_SUPPORT == 1)*/ -+#else + ra_info = &psta->cmn.ra_info; + curr_tx_sgi = ((ra_info->curr_tx_rate) & 0x80) >> 7; -+#endif + } else { + curr_tx_sgi = ((padapter->fix_rate) & 0x80) >> 7; + } @@ -138817,14 +138475,8 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_com.c linux-5.11.4-rtl8812au/ + return rate_id; + + if (padapter->fix_rate == 0xff) { -+#if defined(CONFIG_RTL8188E) -+#if (RATE_ADAPTIVE_SUPPORT == 1) -+ rate_id = hal_data->odmpriv.ra_info[psta->cmn.mac_id].decision_rate; -+#endif /* (RATE_ADAPTIVE_SUPPORT == 1)*/ -+#else + ra_info = &psta->cmn.ra_info; + rate_id = ra_info->curr_tx_rate & 0x7f; -+#endif + } else { + rate_id = padapter->fix_rate & 0x7f; + } @@ -138908,14 +138560,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_com.c linux-5.11.4-rtl8812au/ + crystal_cap = crystal_cap & 0x3F; + + switch (rtw_get_chip_type(adapter)) { -+#if defined(CONFIG_RTL8188E) || defined(CONFIG_RTL8188F) || defined(CONFIG_RTL8188GTV) -+ case RTL8188E: -+ case RTL8188F: -+ case RTL8188GTV: -+ /* write 0x24[16:11] = 0x24[22:17] = CrystalCap */ -+ phy_set_bb_reg(adapter, REG_AFE_XTAL_CTRL, 0x007FF800, (crystal_cap | (crystal_cap << 6))); -+ break; -+#endif +#if defined(CONFIG_RTL8812A) + case RTL8812: + /* write 0x2C[30:25] = 0x2C[24:19] = CrystalCap */ @@ -138940,25 +138584,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_com.c linux-5.11.4-rtl8812au/ + phy_set_bb_reg(adapter, REG_MAC_PHY_CTRL, 0x07FF8000, (crystal_cap | (crystal_cap << 6))); + break; +#endif -+#if defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8192F) -+ -+ case RTL8822B: -+ case RTL8821C: -+ case RTL8192F: -+ /* write 0x28[6:1] = 0x24[30:25] = CrystalCap */ -+ crystal_cap = crystal_cap & 0x3F; -+ phy_set_bb_reg(adapter, REG_AFE_XTAL_CTRL, 0x7E000000, crystal_cap); -+ phy_set_bb_reg(adapter, REG_AFE_PLL_CTRL, 0x7E, crystal_cap); -+ break; -+#endif -+#if defined(CONFIG_RTL8710B) -+ case RTL8710B: -+ /*Change by ylb 20160728, Becase 0x2C[23:12] is removed to syson 0x60[29:18] */ -+ /* 0x2C[23:18] = 0x2C[29:24] = CrystalCap //Xo:[29:24], Xi:[23:18]*/ -+ crystal_cap = crystal_cap & 0x3F; -+ hal_set_syson_reg(adapter, REG_SYS_XTAL_CTRL0, 0x3FFC0000, (crystal_cap | (crystal_cap << 6))); -+ break; -+#endif + default: + rtw_warn_on(1); + } @@ -138972,36 +138597,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_com.c linux-5.11.4-rtl8812au/ + interface_type = rtw_get_intf_type(adapter); + + switch (rtw_get_chip_type(adapter)) { -+#ifdef CONFIG_RTL8723B -+ case RTL8723B: -+ init_hal_spec_8723b(adapter); -+ break; -+#endif -+#ifdef CONFIG_RTL8703B -+ case RTL8703B: -+ init_hal_spec_8703b(adapter); -+ break; -+#endif -+#ifdef CONFIG_RTL8723D -+ case RTL8723D: -+ init_hal_spec_8723d(adapter); -+ break; -+#endif -+#ifdef CONFIG_RTL8188E -+ case RTL8188E: -+ init_hal_spec_8188e(adapter); -+ break; -+#endif -+#ifdef CONFIG_RTL8188F -+ case RTL8188F: -+ init_hal_spec_8188f(adapter); -+ break; -+#endif -+#ifdef CONFIG_RTL8188GTV -+ case RTL8188GTV: -+ init_hal_spec_8188gtv(adapter); -+ break; -+#endif +#ifdef CONFIG_RTL8812A + case RTL8812: + init_hal_spec_8812a(adapter); @@ -139012,36 +138607,11 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_com.c linux-5.11.4-rtl8812au/ + init_hal_spec_8821a(adapter); + break; +#endif -+#ifdef CONFIG_RTL8192E -+ case RTL8192E: -+ init_hal_spec_8192e(adapter); -+ break; -+#endif +#ifdef CONFIG_RTL8814A + case RTL8814A: + init_hal_spec_8814a(adapter); + break; +#endif -+#ifdef CONFIG_RTL8822B -+ case RTL8822B: -+ rtl8822b_init_hal_spec(adapter); -+ break; -+#endif -+#ifdef CONFIG_RTL8821C -+ case RTL8821C: -+ init_hal_spec_rtl8821c(adapter); -+ break; -+#endif -+#ifdef CONFIG_RTL8710B -+ case RTL8710B: -+ init_hal_spec_8710b(adapter); -+ break; -+#endif -+#ifdef CONFIG_RTL8192F -+ case RTL8192F: -+ init_hal_spec_8192f(adapter); -+ break; -+#endif + + default: + RTW_ERR("%s: unknown chip_type:%u\n" @@ -139720,9 +139290,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_com.c linux-5.11.4-rtl8812au/ +} +#endif /*CONFIG_RTL8812A*/ + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_com_c2h.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/hal_com_c2h.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/hal_com_c2h.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/hal_com_c2h.h 2021-03-07 18:16:17.051955911 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/hal_com_c2h.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/hal_com_c2h.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/hal_com_c2h.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/hal_com_c2h.h 2022-01-28 22:59:35.586652938 +0200 @@ -0,0 +1,123 @@ +/****************************************************************************** + * @@ -139847,9 +139417,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_com_c2h.h linux-5.11.4-rtl881 +#endif + +#endif /* __COMMON_C2H_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_com_phycfg.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/hal_com_phycfg.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/hal_com_phycfg.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/hal_com_phycfg.c 2021-03-07 18:16:17.051955911 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/hal_com_phycfg.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/hal_com_phycfg.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/hal_com_phycfg.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/hal_com_phycfg.c 2022-01-28 22:59:35.587652985 +0200 @@ -0,0 +1,5408 @@ +/****************************************************************************** + * @@ -145259,9 +144829,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_com_phycfg.c linux-5.11.4-rtl +} + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_dm_acs.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/hal_dm_acs.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/hal_dm_acs.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/hal_dm_acs.c 2021-03-07 18:16:17.051955911 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/hal_dm_acs.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/hal_dm_acs.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/hal_dm_acs.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/hal_dm_acs.c 2022-01-28 22:59:35.587652985 +0200 @@ -0,0 +1,556 @@ +/****************************************************************************** + * @@ -145819,9 +145389,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_dm_acs.c linux-5.11.4-rtl8812 +} +#endif /*CONFIG_BACKGROUND_NOISE_MONITOR*/ + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_dm_acs.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/hal_dm_acs.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/hal_dm_acs.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/hal_dm_acs.h 2021-03-07 18:16:17.051955911 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/hal_dm_acs.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/hal_dm_acs.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/hal_dm_acs.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/hal_dm_acs.h 2022-01-28 22:59:35.587652985 +0200 @@ -0,0 +1,167 @@ +/****************************************************************************** + * @@ -145990,9 +145560,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_dm_acs.h linux-5.11.4-rtl8812 +void rtw_noise_info_dump(void *sel, _adapter *adapter); +#endif +#endif /* __HAL_DM_ACS_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_dm.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/hal_dm.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/hal_dm.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/hal_dm.c 2021-03-07 18:16:17.051955911 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/hal_dm.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/hal_dm.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/hal_dm.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/hal_dm.c 2022-12-18 17:40:24.574937030 +0200 @@ -0,0 +1,1616 @@ +/****************************************************************************** + * @@ -146572,7 +146142,7 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_dm.c linux-5.11.4-rtl8812au/3 + return; + } + -+ if ((pregpriv->wifi_spec == 1)) { /* || (pmlmeinfo->HT_enable == 0)) */ ++ if (pregpriv->wifi_spec == 1) { /* || (pmlmeinfo->HT_enable == 0)) */ + precvpriv->is_any_non_be_pkts = _FALSE; + return; + } @@ -147610,9 +147180,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_dm.c linux-5.11.4-rtl8812au/3 + return; +} + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_dm.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/hal_dm.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/hal_dm.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/hal_dm.h 2021-03-07 18:16:17.051955911 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/hal_dm.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/hal_dm.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/hal_dm.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/hal_dm.h 2022-01-28 22:59:35.587652985 +0200 @@ -0,0 +1,111 @@ +/****************************************************************************** + * @@ -147725,9 +147295,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_dm.h linux-5.11.4-rtl8812au/3 +#endif + +#endif /* __HAL_DM_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_halmac.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/hal_halmac.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/hal_halmac.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/hal_halmac.c 2021-03-07 18:16:17.052955958 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/hal_halmac.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/hal_halmac.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/hal_halmac.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/hal_halmac.c 2022-01-28 22:59:35.587652985 +0200 @@ -0,0 +1,5555 @@ +/****************************************************************************** + * @@ -153284,9 +152854,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_halmac.c linux-5.11.4-rtl8812 + +#endif /* RTW_BEAMFORMING_VERSION_2 */ +#endif /* CONFIG_BEAMFORMING */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_halmac.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/hal_halmac.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/hal_halmac.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/hal_halmac.h 2021-03-07 18:16:17.052955958 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/hal_halmac.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/hal_halmac.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/hal_halmac.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/hal_halmac.h 2022-01-28 22:59:35.587652985 +0200 @@ -0,0 +1,245 @@ +/****************************************************************************** + * @@ -153533,9 +153103,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_halmac.h linux-5.11.4-rtl8812 +#endif /* CONFIG_BEAMFORMING */ + +#endif /* _HAL_HALMAC_H_ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_hci/hal_usb.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/hal_hci/hal_usb.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/hal_hci/hal_usb.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/hal_hci/hal_usb.c 2021-03-07 18:16:17.052955958 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/hal_hci/hal_usb.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/hal_hci/hal_usb.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/hal_hci/hal_usb.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/hal_hci/hal_usb.c 2022-01-28 22:59:35.588653032 +0200 @@ -0,0 +1,564 @@ +/****************************************************************************** + * @@ -154101,10 +153671,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_hci/hal_usb.c linux-5.11.4-rt +#endif + +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_intf.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/hal_intf.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/hal_intf.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/hal_intf.c 2021-03-07 18:16:17.052955958 +0200 -@@ -0,0 +1,1716 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/hal_intf.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/hal_intf.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/hal_intf.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/hal_intf.c 2023-05-26 22:35:36.543136899 +0300 +@@ -0,0 +1,1698 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. @@ -154127,20 +153697,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_intf.c linux-5.11.4-rtl8812au + +const u32 _chip_type_to_odm_ic_type[] = { + 0, -+ ODM_RTL8188E, -+ ODM_RTL8192E, + ODM_RTL8812, + ODM_RTL8821, -+ ODM_RTL8723B, + ODM_RTL8814A, -+ ODM_RTL8703B, -+ ODM_RTL8188F, -+ ODM_RTL8188F, -+ ODM_RTL8822B, -+ ODM_RTL8723D, -+ ODM_RTL8821C, -+ ODM_RTL8710B, -+ ODM_RTL8192F, + 0, +}; + @@ -155520,7 +155079,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_intf.c linux-5.11.4-rtl8812au +u8 rtw_hal_ops_check(_adapter *padapter) +{ + u8 ret = _SUCCESS; -+#if 1 + /*** initialize section ***/ + if (NULL == padapter->hal_func.read_chip_version) { + rtw_hal_error_msg("read_chip_version"); @@ -155710,12 +155268,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_intf.c linux-5.11.4-rtl8812au + rtw_hal_error_msg("hal_mac_c2h_handler"); + ret = _FAIL; + } -+#elif !defined(CONFIG_RTL8188E) -+ if (NULL == padapter->hal_func.c2h_handler) { -+ rtw_hal_error_msg("c2h_handler"); -+ ret = _FAIL; -+ } -+#endif + +#if defined(CONFIG_LPS) || defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) + if (NULL == padapter->hal_func.fill_fake_txdesc) { @@ -155821,9 +155373,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_intf.c linux-5.11.4-rtl8812au +#endif + return ret; +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_mcc.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/hal_mcc.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/hal_mcc.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/hal_mcc.c 2021-03-07 18:16:17.052955958 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/hal_mcc.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/hal_mcc.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/hal_mcc.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/hal_mcc.c 2022-01-28 22:59:35.588653032 +0200 @@ -0,0 +1,3488 @@ +/****************************************************************************** + * @@ -159313,10 +158865,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_mcc.c linux-5.11.4-rtl8812au/ +} + +#endif /* CONFIG_MCC_MODE */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_mp.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/hal_mp.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/hal_mp.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/hal_mp.c 2021-03-07 18:16:17.053956006 +0200 -@@ -0,0 +1,2269 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/hal_mp.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/hal_mp.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/hal_mp.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/hal_mp.c 2023-05-26 22:35:36.543136899 +0300 +@@ -0,0 +1,2244 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. @@ -159340,39 +158892,12 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_mp.c linux-5.11.4-rtl8812au/3 +#ifdef RTW_HALMAC + #include /* struct HAL_DATA_TYPE, RF register definition and etc. */ +#else /* !RTW_HALMAC */ -+ #ifdef CONFIG_RTL8188E -+ #include -+ #endif -+ #ifdef CONFIG_RTL8723B -+ #include -+ #endif -+ #ifdef CONFIG_RTL8192E -+ #include -+ #endif + #if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8812A) + #include + #endif + #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) + #include + #endif -+ #ifdef CONFIG_RTL8703B -+ #include -+ #endif -+ #ifdef CONFIG_RTL8723D -+ #include -+ #endif -+ #ifdef CONFIG_RTL8710B -+ #include -+ #endif -+ #ifdef CONFIG_RTL8188F -+ #include -+ #endif -+ #ifdef CONFIG_RTL8188GTV -+ #include -+ #endif -+ #ifdef CONFIG_RTL8192F -+ #include -+ #endif +#endif /* !RTW_HALMAC */ + + @@ -159500,7 +159025,7 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_mp.c linux-5.11.4-rtl8812au/3 + } else if (IS_HARDWARE_TYPE_8723D(Adapter)) { + /* 2.4G CCK TX DFIR */ + /* 2016.01.20 Suggest from RS BB mingzhi*/ -+ if ((u1Channel == 14)) { ++ if (u1Channel == 14) { + phy_set_bb_reg(Adapter, rCCK0_TxFilter2, bMaskDWord, 0x0000B81C); + phy_set_bb_reg(Adapter, rCCK0_DebugPort, bMaskDWord, 0x00000000); + phy_set_bb_reg(Adapter, 0xAAC, bMaskDWord, 0x00003667); @@ -159927,6 +159452,7 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_mp.c linux-5.11.4-rtl8812au/3 + u1Byte Path = 0; + u4Byte IGReg = rA_IGI_Jaguar, IGvalue = 0; + ++ /* // kimocoder: Disable below as it's not in use. + for (Path; Path <= RF_PATH_D; Path++) { + switch (Path) { + case RF_PATH_B: @@ -159942,11 +159468,12 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_mp.c linux-5.11.4-rtl8812au/3 + IGReg = rA_IGI_Jaguar; + break; + } ++ */ ++ ++ IGvalue = phy_query_bb_reg(pAdapter, IGReg, bMaskByte0); ++ phy_set_bb_reg(pAdapter, IGReg, bMaskByte0, IGvalue + 2); ++ phy_set_bb_reg(pAdapter, IGReg, bMaskByte0, IGvalue); + -+ IGvalue = phy_query_bb_reg(pAdapter, IGReg, bMaskByte0); -+ phy_set_bb_reg(pAdapter, IGReg, bMaskByte0, IGvalue + 2); -+ phy_set_bb_reg(pAdapter, IGReg, bMaskByte0, IGvalue); -+ } +} + +VOID mpt_SetRFPath_8814A(PADAPTER pAdapter) @@ -161586,9 +161113,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_mp.c linux-5.11.4-rtl8812au/3 +} + +#endif /* CONFIG_MP_INCLUDE*/ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_phy.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/hal_phy.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/hal_phy.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/hal_phy.c 2021-03-07 18:16:17.053956006 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/hal_phy.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/hal_phy.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/hal_phy.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/hal_phy.c 2022-01-28 22:59:35.588653032 +0200 @@ -0,0 +1,257 @@ +/****************************************************************************** + * @@ -161847,9 +161374,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/hal_phy.c linux-5.11.4-rtl8812au/ + +} /* PHY_RFShadowRead */ +#endif /*CONFIG_RF_SHADOW_RW*/ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/HalPwrSeqCmd.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/HalPwrSeqCmd.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/HalPwrSeqCmd.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/HalPwrSeqCmd.c 2021-03-07 18:16:17.049955817 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/HalPwrSeqCmd.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/HalPwrSeqCmd.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/HalPwrSeqCmd.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/HalPwrSeqCmd.c 2022-01-28 22:59:35.584652843 +0200 @@ -0,0 +1,185 @@ +/****************************************************************************** + * @@ -162036,9 +161563,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/HalPwrSeqCmd.c linux-5.11.4-rtl88 + + return _TRUE; +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/led/hal_led.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/led/hal_led.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/led/hal_led.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/led/hal_led.c 2021-03-07 18:16:17.053956006 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/led/hal_led.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/led/hal_led.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/led/hal_led.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/led/hal_led.c 2022-01-28 22:59:35.588653032 +0200 @@ -0,0 +1,254 @@ +/****************************************************************************** + * @@ -162294,9 +161821,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/led/hal_led.c linux-5.11.4-rtl881 + +#endif /* CONFIG_RTW_LED */ + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/led/hal_usb_led.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/led/hal_usb_led.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/led/hal_usb_led.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/led/hal_usb_led.c 2021-03-07 18:16:17.053956006 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/led/hal_usb_led.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/led/hal_usb_led.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/led/hal_usb_led.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/led/hal_usb_led.c 2022-01-28 22:59:35.589653080 +0200 @@ -0,0 +1,4291 @@ +/****************************************************************************** + * @@ -166589,9 +166116,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/led/hal_usb_led.c linux-5.11.4-rt + ResetLedStatus(pLed); +} +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/ap_makefile.mk linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/ap_makefile.mk ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/ap_makefile.mk 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/ap_makefile.mk 2021-03-07 18:16:17.053956006 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/ap_makefile.mk linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/ap_makefile.mk +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/ap_makefile.mk 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/ap_makefile.mk 2022-01-28 22:59:35.589653080 +0200 @@ -0,0 +1,188 @@ + +_PHYDM_FILES :=\ @@ -166781,9 +166308,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/ap_makefile.mk linux-5.11.4 + + + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halhwimg.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halhwimg.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halhwimg.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halhwimg.h 2021-03-07 18:16:17.053956006 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halhwimg.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halhwimg.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halhwimg.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halhwimg.h 2022-01-28 22:59:35.589653080 +0200 @@ -0,0 +1,96 @@ +/****************************************************************************** + * @@ -166881,9 +166408,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halhwimg.h linux-5.11.4-rtl +#endif + +#endif /* @__INC_HW_IMG_H */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halphyrf_ap.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halphyrf_ap.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halphyrf_ap.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halphyrf_ap.c 2021-03-07 18:16:17.053956006 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halphyrf_ap.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halphyrf_ap.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halphyrf_ap.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halphyrf_ap.c 2022-01-28 22:59:35.589653080 +0200 @@ -0,0 +1,1359 @@ +/****************************************************************************** + * @@ -168244,9 +167771,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halphyrf_ap.c linux-5 + odm_iq_calibrate(dm); +#endif +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halphyrf_ap.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halphyrf_ap.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halphyrf_ap.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halphyrf_ap.h 2021-03-07 18:16:17.053956006 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halphyrf_ap.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halphyrf_ap.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halphyrf_ap.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halphyrf_ap.h 2022-01-28 22:59:35.589653080 +0200 @@ -0,0 +1,139 @@ +/****************************************************************************** + * @@ -168387,9 +167914,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halphyrf_ap.h linux-5 +void phydm_rf_watchdog(void *dm_void); + +#endif /*#ifndef __HALPHYRF_H__*/ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halphyrf_ce.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halphyrf_ce.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halphyrf_ce.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halphyrf_ce.c 2021-03-07 18:16:17.054956052 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halphyrf_ce.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halphyrf_ce.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halphyrf_ce.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halphyrf_ce.c 2022-01-28 22:59:35.589653080 +0200 @@ -0,0 +1,920 @@ +/****************************************************************************** + * @@ -169311,9 +168838,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halphyrf_ce.c linux-5 +#endif +#endif +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halphyrf_ce.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halphyrf_ce.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halphyrf_ce.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halphyrf_ce.h 2021-03-07 18:16:17.054956052 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halphyrf_ce.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halphyrf_ce.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halphyrf_ce.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halphyrf_ce.h 2022-01-28 22:59:35.589653080 +0200 @@ -0,0 +1,114 @@ +/****************************************************************************** + * @@ -169429,9 +168956,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halphyrf_ce.h linux-5 +void phydm_rf_watchdog(void *dm_void); + +#endif /*__HALPHYRF_H__*/ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halphyrf_iot.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halphyrf_iot.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halphyrf_iot.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halphyrf_iot.c 2021-03-07 18:16:17.054956052 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halphyrf_iot.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halphyrf_iot.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halphyrf_iot.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halphyrf_iot.c 2022-01-28 22:59:35.589653080 +0200 @@ -0,0 +1,528 @@ +/****************************************************************************** + * @@ -169961,9 +169488,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halphyrf_iot.c linux- + + odm_txpowertracking_check(dm); +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halphyrf_iot.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halphyrf_iot.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halphyrf_iot.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halphyrf_iot.h 2021-03-07 18:16:17.054956052 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halphyrf_iot.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halphyrf_iot.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halphyrf_iot.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halphyrf_iot.h 2022-01-28 22:59:35.589653080 +0200 @@ -0,0 +1,124 @@ +/****************************************************************************** + * @@ -170089,9 +169616,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halphyrf_iot.h linux- +void phydm_rf_watchdog(void *dm_void); + +#endif /*#ifndef __HALPHYRF_H__*/ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halphyrf_win.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halphyrf_win.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halphyrf_win.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halphyrf_win.c 2021-03-07 18:16:17.054956052 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halphyrf_win.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halphyrf_win.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halphyrf_win.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halphyrf_win.c 2022-01-28 22:59:35.589653080 +0200 @@ -0,0 +1,841 @@ +/****************************************************************************** + * @@ -170934,9 +170461,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halphyrf_win.c linux- + odm_iq_calibrate(dm); +#endif +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halphyrf_win.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halphyrf_win.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halphyrf_win.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halphyrf_win.h 2021-03-07 18:16:17.054956052 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halphyrf_win.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halphyrf_win.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halphyrf_win.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halphyrf_win.h 2022-01-28 22:59:35.589653080 +0200 @@ -0,0 +1,125 @@ +/****************************************************************************** + * @@ -171063,9 +170590,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halphyrf_win.h linux- +void phydm_rf_watchdog(struct dm_struct *dm); + +#endif /*#ifndef __HALPHYRF_H__*/ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halrf.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halrf.c 2021-03-07 18:16:17.054956052 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halrf.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halrf.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halrf.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halrf.c 2022-01-28 22:59:35.590653127 +0200 @@ -0,0 +1,2395 @@ +/****************************************************************************** + * @@ -173462,9 +172989,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf.c linux-5.11.4- +#endif +} + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_debug.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halrf_debug.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_debug.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halrf_debug.c 2021-03-07 18:16:17.055956100 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_debug.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_debug.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_debug.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_debug.c 2022-01-28 22:59:35.590653127 +0200 @@ -0,0 +1,267 @@ +/****************************************************************************** + * @@ -173733,9 +173260,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_debug.c linux-5 +#endif + 0; +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_debug.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halrf_debug.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_debug.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halrf_debug.h 2021-03-07 18:16:17.055956100 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_debug.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_debug.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_debug.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_debug.h 2022-01-28 22:59:35.590653127 +0200 @@ -0,0 +1,123 @@ +/****************************************************************************** + * @@ -173860,9 +173387,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_debug.h linux-5 +void halrf_init_debug_setting(void *dm_void); + +#endif /*__HALRF_H__*/ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_dpk.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halrf_dpk.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_dpk.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halrf_dpk.h 2021-03-07 18:16:17.055956100 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_dpk.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_dpk.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_dpk.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_dpk.h 2022-01-28 22:59:35.590653127 +0200 @@ -0,0 +1,86 @@ +/****************************************************************************** + * @@ -173950,9 +173477,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_dpk.h linux-5.1 +}; + +#endif /*__HALRF_DPK_H__*/ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_features.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halrf_features.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_features.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halrf_features.h 2021-03-07 18:16:17.055956100 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_features.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_features.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_features.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_features.h 2022-01-28 22:59:35.590653127 +0200 @@ -0,0 +1,43 @@ +/****************************************************************************** + * @@ -173997,9 +173524,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_features.h linu +#endif + +#endif /*#ifndef __HALRF_FEATURES_H__*/ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halrf.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halrf.h 2021-03-07 18:16:17.054956052 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halrf.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halrf.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halrf.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halrf.h 2022-01-28 22:59:35.590653127 +0200 @@ -0,0 +1,573 @@ +/****************************************************************************** + * @@ -174574,9 +174101,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf.h linux-5.11.4- +u32 halrf_query_tssi_value(void *dm_void); + +#endif /*__HALRF_H__*/ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_iqk.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halrf_iqk.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_iqk.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halrf_iqk.h 2021-03-07 18:16:17.055956100 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_iqk.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_iqk.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_iqk.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_iqk.h 2022-01-28 22:59:35.590653127 +0200 @@ -0,0 +1,103 @@ +/****************************************************************************** + * @@ -174681,9 +174208,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_iqk.h linux-5.1 +}; + +#endif /*__HALRF_IQK_H__*/ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_kfree.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halrf_kfree.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_kfree.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halrf_kfree.c 2021-03-07 18:16:17.055956100 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_kfree.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_kfree.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_kfree.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_kfree.c 2022-01-28 22:59:35.591653174 +0200 @@ -0,0 +1,1191 @@ +/****************************************************************************** + * @@ -175876,9 +175403,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_kfree.c linux-5 + } + RF_DBG(dm, DBG_RF_MP, "<===[kfree] phy_ConfigKFree()\n"); +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_kfree.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halrf_kfree.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_kfree.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halrf_kfree.h 2021-03-07 18:16:17.055956100 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_kfree.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_kfree.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_kfree.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_kfree.h 2022-01-28 22:59:35.591653174 +0200 @@ -0,0 +1,119 @@ +/****************************************************************************** + * @@ -175999,9 +175526,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_kfree.h linux-5 +void phydm_config_kfree(void *dm_void, u8 channel_to_sw); + +#endif /*__HALRF_KFREE_H__*/ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_powertracking_ap.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halrf_powertracking_ap.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_powertracking_ap.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halrf_powertracking_ap.c 2021-03-07 18:16:17.055956100 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_powertracking_ap.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_powertracking_ap.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_powertracking_ap.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_powertracking_ap.c 2022-01-28 22:59:35.591653174 +0200 @@ -0,0 +1,1220 @@ +/****************************************************************************** + * @@ -177223,9 +176750,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_powertracking_a +#endif + +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_powertracking_ap.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halrf_powertracking_ap.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_powertracking_ap.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halrf_powertracking_ap.h 2021-03-07 18:16:17.055956100 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_powertracking_ap.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_powertracking_ap.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_powertracking_ap.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_powertracking_ap.h 2022-01-28 22:59:35.591653174 +0200 @@ -0,0 +1,398 @@ +/****************************************************************************** + * @@ -177625,9 +177152,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_powertracking_a + + +#endif /*#ifndef __HALRF_POWER_TRACKING_H__*/ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_powertracking.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halrf_powertracking.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_powertracking.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halrf_powertracking.c 2021-03-07 18:16:17.055956100 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_powertracking.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_powertracking.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_powertracking.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_powertracking.c 2022-01-28 22:59:35.591653174 +0200 @@ -0,0 +1,152 @@ +/****************************************************************************** + * @@ -177781,9 +177308,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_powertracking.c + } +} +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_powertracking_ce.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halrf_powertracking_ce.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_powertracking_ce.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halrf_powertracking_ce.c 2021-03-07 18:16:17.055956100 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_powertracking_ce.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_powertracking_ce.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_powertracking_ce.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_powertracking_ce.c 2022-01-28 22:59:35.591653174 +0200 @@ -0,0 +1,869 @@ +/****************************************************************************** + * @@ -178654,9 +178181,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_powertracking_c + +#endif +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_powertracking_ce.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halrf_powertracking_ce.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_powertracking_ce.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halrf_powertracking_ce.h 2021-03-07 18:16:17.056956148 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_powertracking_ce.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_powertracking_ce.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_powertracking_ce.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_powertracking_ce.h 2022-01-28 22:59:35.591653174 +0200 @@ -0,0 +1,327 @@ +/****************************************************************************** + * @@ -178985,9 +178512,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_powertracking_c +#endif + +#endif /*__HALRF_POWER_TRACKING_H__*/ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_powertracking.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halrf_powertracking.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_powertracking.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halrf_powertracking.h 2021-03-07 18:16:17.055956100 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_powertracking.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_powertracking.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_powertracking.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_powertracking.h 2022-01-28 22:59:35.591653174 +0200 @@ -0,0 +1,41 @@ +/****************************************************************************** + * @@ -179030,9 +178557,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_powertracking.h +#endif + +#endif /*#ifndef __HALRF_POWERTRACKING_H__*/ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_powertracking_iot.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halrf_powertracking_iot.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_powertracking_iot.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halrf_powertracking_iot.c 2021-03-07 18:16:17.056956148 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_powertracking_iot.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_powertracking_iot.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_powertracking_iot.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_powertracking_iot.c 2022-01-28 22:59:35.591653174 +0200 @@ -0,0 +1,741 @@ +/****************************************************************************** + * @@ -179775,9 +179302,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_powertracking_i + +#endif +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_powertracking_iot.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halrf_powertracking_iot.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_powertracking_iot.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halrf_powertracking_iot.h 2021-03-07 18:16:17.056956148 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_powertracking_iot.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_powertracking_iot.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_powertracking_iot.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_powertracking_iot.h 2022-01-28 22:59:35.591653174 +0200 @@ -0,0 +1,349 @@ +/****************************************************************************** + * @@ -180128,9 +179655,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_powertracking_i +#endif + +#endif /*#ifndef __HALRF_POWER_TRACKING_H__*/ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_powertracking_win.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halrf_powertracking_win.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_powertracking_win.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halrf_powertracking_win.c 2021-03-07 18:16:17.056956148 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_powertracking_win.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_powertracking_win.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_powertracking_win.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_powertracking_win.c 2022-01-28 22:59:35.591653174 +0200 @@ -0,0 +1,861 @@ +/****************************************************************************** + * @@ -180993,9 +180520,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_powertracking_w +} + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_powertracking_win.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halrf_powertracking_win.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_powertracking_win.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halrf_powertracking_win.h 2021-03-07 18:16:17.056956148 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_powertracking_win.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_powertracking_win.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_powertracking_win.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_powertracking_win.h 2022-01-28 22:59:35.591653174 +0200 @@ -0,0 +1,302 @@ +/****************************************************************************** + * @@ -181299,9 +180826,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_powertracking_w + + +#endif /*#ifndef __HALRF_POWER_TRACKING_H__*/ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_psd.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halrf_psd.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_psd.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halrf_psd.c 2021-03-07 18:16:17.056956148 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_psd.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_psd.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_psd.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_psd.c 2022-01-28 22:59:35.592653222 +0200 @@ -0,0 +1,428 @@ +/****************************************************************************** + * @@ -181731,9 +181258,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_psd.c linux-5.1 +} + +#endif /*#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)*/ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_psd.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halrf_psd.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_psd.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halrf_psd.h 2021-03-07 18:16:17.056956148 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_psd.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_psd.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_psd.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_psd.h 2022-01-28 22:59:35.592653222 +0200 @@ -0,0 +1,52 @@ +/****************************************************************************** + * @@ -181787,9 +181314,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_psd.h linux-5.1 + +#endif /*#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)*/ +#endif /*#__HALRF_PSD_H__*/ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_txgapcal.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halrf_txgapcal.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_txgapcal.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halrf_txgapcal.c 2021-03-07 18:16:17.056956148 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_txgapcal.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_txgapcal.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_txgapcal.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_txgapcal.c 2022-01-28 22:59:35.592653222 +0200 @@ -0,0 +1,300 @@ +/****************************************************************************** + * @@ -182091,9 +181618,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_txgapcal.c linu + odm_tx_gain_gap_calibration_8197f(dm_void); +#endif +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_txgapcal.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halrf_txgapcal.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_txgapcal.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/halrf_txgapcal.h 2021-03-07 18:16:17.056956148 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_txgapcal.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_txgapcal.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_txgapcal.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/halrf_txgapcal.h 2022-01-28 22:59:35.592653222 +0200 @@ -0,0 +1,31 @@ +/****************************************************************************** + * @@ -182126,9 +181653,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/halrf_txgapcal.h linu +void odm_tx_gain_gap_calibration(void *dm_void); + +#endif /*__HALRF_TXGAPCAL_H__*/ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_ap.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_ap.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_ap.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_ap.c 2021-03-07 18:16:17.056956148 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_ap.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_ap.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_ap.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_ap.c 2022-01-28 22:59:35.592653222 +0200 @@ -0,0 +1,2169 @@ +/****************************************************************************** + * @@ -184299,9 +183826,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_ + _phy_set_rf_path_switch_8812a(dm, is_main, false); + } +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_ap.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_ap.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_ap.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_ap.h 2021-03-07 18:16:17.056956148 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_ap.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_ap.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_ap.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_ap.h 2022-01-28 22:59:35.592653222 +0200 @@ -0,0 +1,82 @@ +/****************************************************************************** + * @@ -184385,9 +183912,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_ + + +#endif /*#ifndef __HALRF_8812A_H__*/ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_ce.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_ce.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_ce.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_ce.c 2021-03-07 18:16:17.057956195 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_ce.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_ce.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_ce.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_ce.c 2022-01-28 22:59:35.592653222 +0200 @@ -0,0 +1,1975 @@ +/****************************************************************************** + * @@ -186364,9 +185891,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_ + RF_DBG(dm, DBG_RF_IQK, "<=== %s\n", __func__); +#endif +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_ce.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_ce.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_ce.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_ce.h 2021-03-07 18:16:17.057956195 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_ce.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_ce.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_ce.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_ce.h 2022-01-28 22:59:35.592653222 +0200 @@ -0,0 +1,63 @@ +/****************************************************************************** + * @@ -186431,9 +185958,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_ +#endif + boolean is_main); +#endif /*#ifndef __HALRF_8812A_H__*/ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_win.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_win.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_win.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_win.c 2021-03-07 18:16:17.057956195 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_win.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_win.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_win.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_win.c 2022-01-28 22:59:35.593653269 +0200 @@ -0,0 +1,2881 @@ +/****************************************************************************** + * @@ -189316,9 +188843,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_ +#endif +} +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_win.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_win.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_win.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_win.h 2021-03-07 18:16:17.057956195 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_win.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_win.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_win.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_win.h 2022-01-28 22:59:35.593653269 +0200 @@ -0,0 +1,99 @@ +/****************************************************************************** + * @@ -189419,10 +188946,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_ + + +#endif /*#ifndef __HALRF_8812A_H__*/ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ap.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ap.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ap.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ap.c 2021-03-07 18:16:17.057956195 +0200 -@@ -0,0 +1,1754 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ap.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ap.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ap.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ap.c 2023-05-26 22:35:36.543136899 +0300 +@@ -0,0 +1,1742 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. @@ -190615,11 +190142,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ +#define DP_DPK_VALUE_NUM 2 + + -+ -+ +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) +//digital predistortion -+VOID ++VOID + phy_DigitalPredistortion_8814A( +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PADAPTER pAdapter, @@ -190629,36 +190154,26 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ + IN BOOLEAN is2T + ) +{ -+#if (RT_PLATFORM == PLATFORM_WINDOWS) -+#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; -+#endif -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; -+#endif -+#endif + -+ u4Byte tmpReg, tmpReg2, index, i; ++ u4Byte tmpReg, tmpReg2, index, i; + u1Byte path, pathbound = PATH_NUM; + u4Byte AFE_backup[IQK_ADDA_REG_NUM]; -+ u4Byte AFE_REG[IQK_ADDA_REG_NUM] = { -+ rFPGA0_XCD_SwitchControl, rBlue_Tooth, ++ u4Byte AFE_REG[IQK_ADDA_REG_NUM] = { ++ rFPGA0_XCD_SwitchControl, rBlue_Tooth, + rRx_Wait_CCA, rTx_CCK_RFON, -+ rTx_CCK_BBON, rTx_OFDM_RFON, ++ rTx_CCK_BBON, rTx_OFDM_RFON, + rTx_OFDM_BBON, rTx_To_Rx, -+ rTx_To_Tx, rRx_CCK, ++ rTx_To_Tx, rRx_CCK, + rRx_OFDM, rRx_Wait_RIFS, -+ rRx_TO_Rx, rStandby, ++ rRx_TO_Rx, rStandby, + rSleep, rPMPD_ANAEN }; + -+ u4Byte BB_backup[DP_BB_REG_NUM]; ++ u4Byte BB_backup[DP_BB_REG_NUM]; + u4Byte BB_REG[DP_BB_REG_NUM] = { -+ rOFDM0_TRxPathEnable, rFPGA0_RFMOD, ++ rOFDM0_TRxPathEnable, rFPGA0_RFMOD, + rOFDM0_TRMuxPar, rFPGA0_XCD_RFInterfaceSW, -+ rFPGA0_XAB_RFInterfaceSW, rFPGA0_XA_RFInterfaceOE, -+ rFPGA0_XB_RFInterfaceOE}; ++ rFPGA0_XAB_RFInterfaceSW, rFPGA0_XA_RFInterfaceOE, ++ rFPGA0_XB_RFInterfaceOE}; + u4Byte BB_settings[DP_BB_REG_NUM] = { + 0x00a05430, 0x02040000, 0x000800e4, 0x22208000, + 0x0, 0x0, 0x0}; @@ -191177,9 +190692,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ +#endif + + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ap.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ap.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ap.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ap.h 2021-03-07 18:16:17.057956195 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ap.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ap.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ap.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ap.h 2022-01-28 22:59:35.593653269 +0200 @@ -0,0 +1,164 @@ +/****************************************************************************** + * @@ -191345,9 +190860,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ + +#endif // #ifndef __HAL_PHY_RF_8814A_H__ + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ce.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ce.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ce.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ce.c 2021-03-07 18:16:17.057956195 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ce.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ce.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ce.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ce.c 2022-01-28 22:59:35.593653269 +0200 @@ -0,0 +1,564 @@ +/****************************************************************************** + * @@ -191913,9 +191428,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ + + + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ce.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ce.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ce.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ce.h 2021-03-07 18:16:17.057956195 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ce.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ce.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ce.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ce.h 2022-01-28 22:59:35.593653269 +0200 @@ -0,0 +1,112 @@ +/****************************************************************************** + * @@ -192029,9 +191544,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ + +#endif // #ifndef __HAL_PHY_RF_8188E_H__ + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_win.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_win.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_win.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_win.c 2021-03-07 18:16:17.057956195 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_win.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_win.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_win.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_win.c 2022-01-28 22:59:35.593653269 +0200 @@ -0,0 +1,528 @@ +/****************************************************************************** + * @@ -192561,9 +192076,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ + IN BOOLEAN bReCovery + ){} +#endif /* (RTL8814A_SUPPORT == 0)*/ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_win.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_win.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_win.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_win.h 2021-03-07 18:16:17.057956195 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_win.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_win.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_win.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_win.h 2022-01-28 22:59:35.593653269 +0200 @@ -0,0 +1,106 @@ +/****************************************************************************** + * @@ -192671,9 +192186,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ + +#endif // #ifndef __HAL_PHY_RF_8188E_H__ + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_iqk_8814a.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_iqk_8814a.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_iqk_8814a.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_iqk_8814a.c 2021-03-07 18:16:17.057956195 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_iqk_8814a.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_iqk_8814a.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_iqk_8814a.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_iqk_8814a.c 2022-01-28 22:59:35.593653269 +0200 @@ -0,0 +1,557 @@ +/****************************************************************************** + * @@ -193232,9 +192747,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_iqk_88 + } +} + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_iqk_8814a.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_iqk_8814a.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_iqk_8814a.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_iqk_8814a.h 2021-03-07 18:16:17.058956242 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_iqk_8814a.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_iqk_8814a.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_iqk_8814a.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_iqk_8814a.h 2022-01-28 22:59:35.593653269 +0200 @@ -0,0 +1,58 @@ +/****************************************************************************** + * @@ -193294,9 +192809,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_iqk_88 + ); + + #endif /* #ifndef __PHYDM_IQK_8814A_H__*/ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_8821a_ce.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_8821a_ce.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_8821a_ce.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_8821a_ce.c 2021-03-07 18:16:17.058956242 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_8821a_ce.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_8821a_ce.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_8821a_ce.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_8821a_ce.c 2022-01-28 22:59:35.593653269 +0200 @@ -0,0 +1,313 @@ +/****************************************************************************** + * @@ -193611,9 +193126,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_8821a_ + + phy_lc_calibrate_8812a(dm); +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_8821a_ce.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_8821a_ce.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_8821a_ce.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_8821a_ce.h 2021-03-07 18:16:17.058956242 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_8821a_ce.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_8821a_ce.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_8821a_ce.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_8821a_ce.h 2022-01-28 22:59:35.593653269 +0200 @@ -0,0 +1,53 @@ +/****************************************************************************** + * @@ -193668,9 +193183,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_8821a_ +); + +#endif /* #ifndef __HAL_PHY_RF_8821A_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_8821a_win.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_8821a_win.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_8821a_win.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_8821a_win.c 2021-03-07 18:16:17.058956242 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_8821a_win.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_8821a_win.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_8821a_win.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_8821a_win.c 2022-01-28 22:59:35.593653269 +0200 @@ -0,0 +1,1046 @@ +/****************************************************************************** + * @@ -194718,9 +194233,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_8821a_ + + phy_lc_calibrate_8812a(dm); +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_8821a_win.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_8821a_win.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_8821a_win.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_8821a_win.h 2021-03-07 18:16:17.058956242 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_8821a_win.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_8821a_win.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_8821a_win.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_8821a_win.h 2022-01-28 22:59:35.593653269 +0200 @@ -0,0 +1,72 @@ +/****************************************************************************** + * @@ -194794,9 +194309,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_8821a_ +); + +#endif /* #ifndef __HAL_PHY_RF_8821A_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ap.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ap.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ap.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ap.c 2021-03-07 18:16:17.058956242 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ap.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ap.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ap.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ap.c 2022-01-28 22:59:35.594653317 +0200 @@ -0,0 +1,731 @@ +/****************************************************************************** + * @@ -195530,9 +195045,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_88 + _phy_iq_calibrate_8821a(dm); +} \ Ingen nyrad vid filslut -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ap.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ap.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ap.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ap.h 2021-03-07 18:16:17.058956242 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ap.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ap.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ap.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ap.h 2022-01-28 22:59:35.594653317 +0200 @@ -0,0 +1,42 @@ +/****************************************************************************** + * @@ -195576,9 +195091,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_88 +); +#endif +#endif /* #ifndef __PHYDM_IQK_8821A_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ce.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ce.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ce.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ce.c 2021-03-07 18:16:17.058956242 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ce.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ce.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ce.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ce.c 2022-01-28 22:59:35.594653317 +0200 @@ -0,0 +1,773 @@ +/****************************************************************************** + * @@ -196353,9 +195868,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_88 + _phy_iq_calibrate_8821a(dm); +} +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ce.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ce.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ce.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ce.h 2021-03-07 18:16:17.058956242 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ce.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ce.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ce.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ce.h 2022-01-28 22:59:35.594653317 +0200 @@ -0,0 +1,41 @@ +/****************************************************************************** + * @@ -196398,9 +195913,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_88 +); +#endif +#endif /* #ifndef __PHYDM_IQK_8821A_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_win.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_win.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_win.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_win.c 2021-03-07 18:16:17.058956242 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_win.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_win.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_win.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_win.c 2022-01-28 22:59:35.594653317 +0200 @@ -0,0 +1,774 @@ +/****************************************************************************** + * @@ -197176,9 +196691,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_88 + _phy_iq_calibrate_8821a(dm); +} +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_win.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_win.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_win.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_win.h 2021-03-07 18:16:17.058956242 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_win.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_win.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_win.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_win.h 2022-01-28 22:59:35.594653317 +0200 @@ -0,0 +1,42 @@ +/****************************************************************************** + * @@ -197222,9 +196737,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_88 +); +#endif +#endif /* #ifndef __PHYDM_IQK_8821A_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/mp_precomp.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/mp_precomp.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/mp_precomp.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/mp_precomp.h 2021-03-07 18:16:17.058956242 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/mp_precomp.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/mp_precomp.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/mp_precomp.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/mp_precomp.h 2022-01-28 22:59:35.594653317 +0200 @@ -0,0 +1,24 @@ +/****************************************************************************** + * @@ -197250,9 +196765,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/mp_precomp.h linux-5.11.4-r + * Larry Finger + * + *****************************************************************************/ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_adaptivity.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_adaptivity.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_adaptivity.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_adaptivity.c 2021-03-07 18:16:17.059956289 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_adaptivity.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_adaptivity.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_adaptivity.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_adaptivity.c 2022-01-28 22:59:35.594653317 +0200 @@ -0,0 +1,764 @@ +/****************************************************************************** + * @@ -198018,9 +197533,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_adaptivity.c linux-5. + return; +#endif +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_adaptivity.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_adaptivity.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_adaptivity.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_adaptivity.h 2021-03-07 18:16:17.059956289 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_adaptivity.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_adaptivity.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_adaptivity.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_adaptivity.h 2022-01-28 22:59:35.595653364 +0200 @@ -0,0 +1,122 @@ +/****************************************************************************** + * @@ -198144,9 +197659,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_adaptivity.h linux-5. +void phydm_adaptivity(void *dm_void); + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_adc_sampling.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_adc_sampling.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_adc_sampling.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_adc_sampling.c 2021-03-07 18:16:17.059956289 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_adc_sampling.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_adc_sampling.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_adc_sampling.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_adc_sampling.c 2022-01-28 22:59:35.595653364 +0200 @@ -0,0 +1,1291 @@ +/****************************************************************************** + * @@ -199439,9 +198954,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_adc_sampling.c linux- +} + +#endif /*@endif PHYDM_LA_MODE_SUPPORT*/ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_adc_sampling.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_adc_sampling.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_adc_sampling.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_adc_sampling.h 2021-03-07 18:16:17.059956289 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_adc_sampling.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_adc_sampling.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_adc_sampling.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_adc_sampling.h 2022-01-28 22:59:35.595653364 +0200 @@ -0,0 +1,151 @@ +/****************************************************************************** + * @@ -199594,9 +199109,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_adc_sampling.h linux- + +#endif +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_antdect.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_antdect.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_antdect.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_antdect.c 2021-03-07 18:16:17.059956289 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_antdect.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_antdect.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_antdect.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_antdect.c 2022-01-28 22:59:35.595653364 +0200 @@ -0,0 +1,891 @@ +/****************************************************************************** + * @@ -200489,9 +200004,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_antdect.c linux-5.11. +} +#endif + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_antdect.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_antdect.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_antdect.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_antdect.h 2021-03-07 18:16:17.059956289 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_antdect.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_antdect.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_antdect.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_antdect.h 2022-01-28 22:59:35.595653364 +0200 @@ -0,0 +1,78 @@ +/****************************************************************************** + * @@ -200571,9 +200086,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_antdect.h linux-5.11. +void odm_sw_ant_detect_init(void *dm_void); +#endif +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_antdiv.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_antdiv.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_antdiv.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_antdiv.c 2021-03-07 18:16:17.060956337 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_antdiv.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_antdiv.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_antdiv.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_antdiv.c 2022-01-28 22:59:35.596653411 +0200 @@ -0,0 +1,5897 @@ +/****************************************************************************** + * @@ -206472,9 +205987,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_antdiv.c linux-5.11.4 +} +#endif /*@#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY*/ + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_antdiv.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_antdiv.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_antdiv.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_antdiv.h 2021-03-07 18:16:17.060956337 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_antdiv.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_antdiv.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_antdiv.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_antdiv.h 2022-01-28 22:59:35.596653411 +0200 @@ -0,0 +1,519 @@ +/****************************************************************************** + * @@ -206995,9 +206510,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_antdiv.h linux-5.11.4 +void odm_antenna_diversity(void *dm_void); +#endif /*@#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY*/ +#endif /*@#ifndef __ODMANTDIV_H__*/ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_api.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_api.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_api.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_api.c 2021-03-07 18:16:17.060956337 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_api.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_api.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_api.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_api.c 2022-01-28 22:59:35.596653411 +0200 @@ -0,0 +1,2949 @@ +/****************************************************************************** + * @@ -209948,9 +209463,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_api.c linux-5.11.4-rt +#endif +} +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_api.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_api.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_api.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_api.h 2021-03-07 18:16:17.060956337 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_api.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_api.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_api.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_api.h 2022-01-28 22:59:35.596653411 +0200 @@ -0,0 +1,186 @@ +/****************************************************************************** + * @@ -210138,9 +209653,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_api.h linux-5.11.4-rt +#endif + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_auto_dbg.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_auto_dbg.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_auto_dbg.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_auto_dbg.c 2021-03-07 18:16:17.060956337 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_auto_dbg.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_auto_dbg.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_auto_dbg.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_auto_dbg.c 2022-01-28 22:59:35.596653411 +0200 @@ -0,0 +1,713 @@ +/****************************************************************************** + * @@ -210855,9 +210370,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_auto_dbg.c linux-5.11 + phydm_check_hang_init(dm); +} +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_auto_dbg.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_auto_dbg.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_auto_dbg.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_auto_dbg.h 2021-03-07 18:16:17.060956337 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_auto_dbg.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_auto_dbg.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_auto_dbg.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_auto_dbg.h 2022-01-28 22:59:35.596653411 +0200 @@ -0,0 +1,113 @@ +/****************************************************************************** + * @@ -210972,9 +210487,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_auto_dbg.h linux-5.11 +void phydm_auto_dbg_engine_init(void *dm_void); +#endif +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_beamforming.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_beamforming.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_beamforming.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_beamforming.c 2021-03-07 18:16:17.061956384 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_beamforming.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_beamforming.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_beamforming.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_beamforming.c 2022-01-28 22:59:35.596653411 +0200 @@ -0,0 +1,2050 @@ +/****************************************************************************** + * @@ -213026,9 +212541,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_beamforming.c linux-5 +} + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_beamforming.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_beamforming.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_beamforming.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_beamforming.h 2021-03-07 18:16:17.061956384 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_beamforming.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_beamforming.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_beamforming.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_beamforming.h 2022-01-28 22:59:35.596653411 +0200 @@ -0,0 +1,363 @@ +/****************************************************************************** + * @@ -213393,9 +212908,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_beamforming.h linux-5 +#endif /*@(DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_AP))*/ +#endif /*@#ifdef PHYDM_BEAMFORMING_SUPPORT*/ +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm.c 2021-03-07 18:16:17.058956242 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm.c 2022-01-28 22:59:35.594653317 +0200 @@ -0,0 +1,3265 @@ +/****************************************************************************** + * @@ -216662,9 +216177,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm.c linux-5.11.4-rtl881 + } +#endif +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_cck_pd.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_cck_pd.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_cck_pd.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_cck_pd.c 2021-03-07 18:16:17.061956384 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_cck_pd.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_cck_pd.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_cck_pd.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_cck_pd.c 2022-01-28 22:59:35.597653459 +0200 @@ -0,0 +1,1086 @@ +/****************************************************************************** + * @@ -217752,9 +217267,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_cck_pd.c linux-5.11.4 +} +#endif /*#ifdef PHYDM_SUPPORT_CCKPD*/ + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_cck_pd.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_cck_pd.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_cck_pd.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_cck_pd.h 2021-03-07 18:16:17.061956384 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_cck_pd.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_cck_pd.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_cck_pd.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_cck_pd.h 2022-01-28 22:59:35.597653459 +0200 @@ -0,0 +1,155 @@ +/****************************************************************************** + * @@ -217911,9 +217426,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_cck_pd.h linux-5.11.4 + +void phydm_cck_pd_init(void *dm_void); +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_ccx.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_ccx.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_ccx.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_ccx.c 2021-03-07 18:16:17.061956384 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_ccx.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_ccx.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_ccx.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_ccx.c 2022-01-28 22:59:35.597653459 +0200 @@ -0,0 +1,1802 @@ +/****************************************************************************** + * @@ -219717,9 +219232,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_ccx.c linux-5.11.4-rt + *_out_len = out_len; +} + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_ccx.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_ccx.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_ccx.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_ccx.h 2021-03-07 18:16:17.061956384 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_ccx.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_ccx.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_ccx.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_ccx.h 2022-01-28 22:59:35.597653459 +0200 @@ -0,0 +1,268 @@ +/****************************************************************************** + * @@ -219989,9 +219504,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_ccx.h linux-5.11.4-rt + char *output, u32 *_out_len); + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_cfotracking.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_cfotracking.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_cfotracking.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_cfotracking.c 2021-03-07 18:16:17.061956384 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_cfotracking.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_cfotracking.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_cfotracking.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_cfotracking.c 2022-01-28 22:59:35.597653459 +0200 @@ -0,0 +1,594 @@ +/****************************************************************************** + * @@ -220587,9 +220102,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_cfotracking.c linux-5 + *_out_len = out_len; +} + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_cfotracking.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_cfotracking.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_cfotracking.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_cfotracking.h 2021-03-07 18:16:17.061956384 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_cfotracking.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_cfotracking.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_cfotracking.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_cfotracking.h 2022-01-28 22:59:35.597653459 +0200 @@ -0,0 +1,73 @@ +/****************************************************************************** + * @@ -220664,9 +220179,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_cfotracking.h linux-5 +void phy_Init_crystal_capacity(void *dm_void, u8 crystal_cap); +#endif +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_debug.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_debug.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_debug.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_debug.c 2021-03-07 18:16:17.062956431 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_debug.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_debug.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_debug.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_debug.c 2022-01-28 22:59:35.597653459 +0200 @@ -0,0 +1,4728 @@ +/****************************************************************************** + * @@ -225396,9 +224911,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_debug.c linux-5.11.4- +#endif +#endif /*@#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/ +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_debug.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_debug.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_debug.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_debug.h 2021-03-07 18:16:17.062956431 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_debug.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_debug.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_debug.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_debug.h 2022-01-28 22:59:35.597653459 +0200 @@ -0,0 +1,480 @@ +/****************************************************************************** + * @@ -225880,9 +225395,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_debug.h linux-5.11.4- +void phydm_fw_trace_handler_8051(void *dm_void, u8 *cmd_buf, u8 cmd_len); + +#endif /* @__ODM_DBG_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_dfs.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_dfs.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_dfs.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_dfs.c 2021-03-07 18:16:17.062956431 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_dfs.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_dfs.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_dfs.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_dfs.c 2022-01-28 22:59:35.598653506 +0200 @@ -0,0 +1,2323 @@ +/****************************************************************************** + * @@ -228207,9 +227722,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_dfs.c linux-5.11.4-rt +} +#endif +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_dfs.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_dfs.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_dfs.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_dfs.h 2021-03-07 18:16:17.062956431 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_dfs.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_dfs.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_dfs.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_dfs.h 2022-01-28 22:59:35.598653506 +0200 @@ -0,0 +1,190 @@ +/****************************************************************************** + * @@ -228401,9 +227916,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_dfs.h linux-5.11.4-rt +#endif + +#endif /*@#ifndef __PHYDM_DFS_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_dig.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_dig.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_dig.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_dig.c 2021-03-07 18:16:17.062956431 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_dig.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_dig.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_dig.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_dig.c 2022-01-28 22:59:35.598653506 +0200 @@ -0,0 +1,2858 @@ +/****************************************************************************** + * @@ -231263,9 +230778,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_dig.c linux-5.11.4-rt +} +#endif /*#if (RTL8822B_SUPPORT)*/ +#endif /*#ifdef CONFIG_MCC_DM*/ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_dig.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_dig.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_dig.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_dig.h 2021-03-07 18:16:17.062956431 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_dig.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_dig.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_dig.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_dig.h 2022-01-28 22:59:35.598653506 +0200 @@ -0,0 +1,337 @@ +/****************************************************************************** + * @@ -231604,9 +231119,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_dig.h linux-5.11.4-rt + + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_dynamictxpower.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_dynamictxpower.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_dynamictxpower.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_dynamictxpower.c 2021-03-07 18:16:17.062956431 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_dynamictxpower.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_dynamictxpower.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_dynamictxpower.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_dynamictxpower.c 2022-01-28 22:59:35.598653506 +0200 @@ -0,0 +1,517 @@ +/****************************************************************************** + * @@ -232125,9 +231640,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_dynamictxpower.c linu +} +#endif /*@#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)*/ +#endif /* @#ifdef CONFIG_DYNAMIC_TX_TWR */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_dynamictxpower.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_dynamictxpower.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_dynamictxpower.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_dynamictxpower.h 2021-03-07 18:16:17.062956431 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_dynamictxpower.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_dynamictxpower.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_dynamictxpower.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_dynamictxpower.h 2022-01-28 22:59:35.598653506 +0200 @@ -0,0 +1,103 @@ +/****************************************************************************** + * @@ -232232,9 +231747,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_dynamictxpower.h linu + +#endif +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_features_ap.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_features_ap.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_features_ap.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_features_ap.h 2021-03-07 18:16:17.062956431 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_features_ap.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_features_ap.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_features_ap.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_features_ap.h 2022-01-28 22:59:35.598653506 +0200 @@ -0,0 +1,196 @@ +/****************************************************************************** + * @@ -232432,9 +231947,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_features_ap.h linux-5 +#endif + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_features_ce2_kernel.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_features_ce2_kernel.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_features_ce2_kernel.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_features_ce2_kernel.h 2021-03-07 18:16:17.062956431 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_features_ce2_kernel.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_features_ce2_kernel.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_features_ce2_kernel.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_features_ce2_kernel.h 2022-01-28 22:59:35.598653506 +0200 @@ -0,0 +1,84 @@ +/****************************************************************************** + * @@ -232520,9 +232035,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_features_ce2_kernel.h +#endif + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_features_ce.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_features_ce.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_features_ce.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_features_ce.h 2021-03-07 18:16:17.062956431 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_features_ce.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_features_ce.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_features_ce.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_features_ce.h 2022-01-28 22:59:35.598653506 +0200 @@ -0,0 +1,214 @@ +/****************************************************************************** + * @@ -232738,9 +232253,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_features_ce.h linux-5 + + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_features.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_features.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_features.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_features.h 2021-03-07 18:16:17.062956431 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_features.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_features.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_features.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_features.h 2022-01-28 22:59:35.598653506 +0200 @@ -0,0 +1,72 @@ +/****************************************************************************** + * @@ -232814,9 +232329,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_features.h linux-5.11 +#endif + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_features_iot.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_features_iot.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_features_iot.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_features_iot.h 2021-03-07 18:16:17.062956431 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_features_iot.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_features_iot.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_features_iot.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_features_iot.h 2022-01-28 22:59:35.598653506 +0200 @@ -0,0 +1,174 @@ +/****************************************************************************** + * @@ -232992,9 +232507,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_features_iot.h linux- +#endif + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_features_win.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_features_win.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_features_win.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_features_win.h 2021-03-07 18:16:17.062956431 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_features_win.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_features_win.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_features_win.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_features_win.h 2022-01-28 22:59:35.598653506 +0200 @@ -0,0 +1,185 @@ +/****************************************************************************** + * @@ -233181,9 +232696,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_features_win.h linux- +#endif + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm.h 2021-03-07 18:16:17.059956289 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm.h 2022-01-28 22:59:35.594653317 +0200 @@ -0,0 +1,1356 @@ +/****************************************************************************** + * @@ -234541,9 +234056,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm.h linux-5.11.4-rtl881 +#endif + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_hwconfig.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_hwconfig.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_hwconfig.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_hwconfig.c 2021-03-07 18:16:17.063956478 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_hwconfig.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_hwconfig.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_hwconfig.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_hwconfig.c 2022-01-28 22:59:35.598653506 +0200 @@ -0,0 +1,1419 @@ +/****************************************************************************** + * @@ -235964,9 +235479,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_hwconfig.c linux-5.11 +#endif + return value32; +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_hwconfig.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_hwconfig.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_hwconfig.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_hwconfig.h 2021-03-07 18:16:17.063956478 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_hwconfig.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_hwconfig.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_hwconfig.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_hwconfig.h 2022-01-28 22:59:35.598653506 +0200 @@ -0,0 +1,79 @@ +/****************************************************************************** + * @@ -236047,9 +235562,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_hwconfig.h linux-5.11 +u32 query_phydm_txbf_capability(struct dm_struct *dm); + +#endif /*@#ifndef __HALHWOUTSRC_H__*/ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_interface.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_interface.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_interface.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_interface.c 2021-03-07 18:16:17.063956478 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_interface.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_interface.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_interface.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_interface.c 2022-01-28 22:59:35.598653506 +0200 @@ -0,0 +1,1468 @@ +/****************************************************************************** + * @@ -237519,9 +237034,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_interface.c linux-5.1 + return tx_rate; +} + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_interface.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_interface.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_interface.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_interface.h 2021-03-07 18:16:17.063956478 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_interface.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_interface.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_interface.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_interface.h 2022-01-28 22:59:35.598653506 +0200 @@ -0,0 +1,343 @@ +/****************************************************************************** + * @@ -237866,9 +237381,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_interface.h linux-5.1 + void *context); +u32 phydm_get_tx_rate(struct dm_struct *dm); +#endif /* @__ODM_INTERFACE_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_lna_sat.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_lna_sat.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_lna_sat.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_lna_sat.c 2021-03-07 18:16:17.063956478 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_lna_sat.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_lna_sat.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_lna_sat.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_lna_sat.c 2022-01-28 22:59:35.599653554 +0200 @@ -0,0 +1,1343 @@ +/****************************************************************************** + * @@ -239213,9 +238728,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_lna_sat.c linux-5.11. +} + +#endif /*@#ifdef PHYDM_LNA_SAT_CHK_SUPPORT*/ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_lna_sat.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_lna_sat.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_lna_sat.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_lna_sat.h 2021-03-07 18:16:17.063956478 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_lna_sat.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_lna_sat.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_lna_sat.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_lna_sat.h 2022-01-28 22:59:35.599653554 +0200 @@ -0,0 +1,173 @@ +/****************************************************************************** + * @@ -239390,9 +238905,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_lna_sat.h linux-5.11. + +#endif /*@#if (PHYDM_LNA_SAT_CHK_SUPPORT == 1)*/ +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_math_lib.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_math_lib.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_math_lib.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_math_lib.c 2021-03-07 18:16:17.063956478 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_math_lib.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_math_lib.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_math_lib.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_math_lib.c 2022-01-28 22:59:35.599653554 +0200 @@ -0,0 +1,248 @@ +/****************************************************************************** + * @@ -239642,9 +239157,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_math_lib.c linux-5.11 + return val; +} + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_math_lib.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_math_lib.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_math_lib.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_math_lib.h 2021-03-07 18:16:17.063956478 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_math_lib.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_math_lib.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_math_lib.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_math_lib.h 2022-01-28 22:59:35.599653554 +0200 @@ -0,0 +1,114 @@ +/****************************************************************************** + * @@ -239760,9 +239275,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_math_lib.h linux-5.11 + +s32 phydm_cnvrt_2_sign(u32 val, u8 bit_num); +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm.mk linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm.mk ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm.mk 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm.mk 2021-03-07 18:16:17.059956289 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm.mk linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm.mk +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm.mk 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm.mk 2022-01-28 22:59:35.594653317 +0200 @@ -0,0 +1,226 @@ +EXTRA_CFLAGS += -I$(src)/hal/phydm + @@ -239991,9 +239506,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm.mk linux-5.11.4-rtl88 + hal/phydm/halrf/$(RTL871X)/halrf_rfk_init_8814b.o +endif \ Ingen nyrad vid filslut -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_mp.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_mp.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_mp.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_mp.c 2021-03-07 18:16:17.063956478 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_mp.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_mp.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_mp.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_mp.c 2022-01-28 22:59:35.599653554 +0200 @@ -0,0 +1,348 @@ +/****************************************************************************** + * @@ -240343,9 +239858,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_mp.c linux-5.11.4-rtl + mp->io_value = (u32)mp->rx_phy_ok_cnt; +} +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_mp.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_mp.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_mp.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_mp.h 2021-03-07 18:16:17.063956478 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_mp.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_mp.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_mp.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_mp.h 2022-01-28 22:59:35.599653554 +0200 @@ -0,0 +1,94 @@ +/****************************************************************************** + * @@ -240441,9 +239956,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_mp.h linux-5.11.4-rtl + +void phydm_mp_get_rx_ok(void *dm_void); +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_noisemonitor.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_noisemonitor.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_noisemonitor.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_noisemonitor.c 2021-03-07 18:16:17.063956478 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_noisemonitor.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_noisemonitor.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_noisemonitor.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_noisemonitor.c 2022-01-28 22:59:35.599653554 +0200 @@ -0,0 +1,457 @@ +/****************************************************************************** + * @@ -240902,9 +240417,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_noisemonitor.c linux- + total_cca_cnt, total_fa_cnt, dm->noisy_decision_smooth, score, + score_smooth, dm->noisy_decision); +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_noisemonitor.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_noisemonitor.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_noisemonitor.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_noisemonitor.h 2021-03-07 18:16:17.063956478 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_noisemonitor.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_noisemonitor.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_noisemonitor.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_noisemonitor.h 2022-01-28 22:59:35.599653554 +0200 @@ -0,0 +1,48 @@ +/****************************************************************************** + * @@ -240954,9 +240469,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_noisemonitor.h linux- +void phydm_noisy_detection(void *dm_void); + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_pathdiv.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_pathdiv.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_pathdiv.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_pathdiv.c 2021-03-07 18:16:17.063956478 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_pathdiv.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_pathdiv.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_pathdiv.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_pathdiv.c 2022-01-28 22:59:35.599653554 +0200 @@ -0,0 +1,928 @@ +/****************************************************************************** + * @@ -241886,9 +241401,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_pathdiv.c linux-5.11. +} + +#endif /* @#ifdef CONFIG_PATH_DIVERSITY */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_pathdiv.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_pathdiv.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_pathdiv.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_pathdiv.h 2021-03-07 18:16:17.063956478 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_pathdiv.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_pathdiv.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_pathdiv.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_pathdiv.h 2022-01-28 22:59:35.599653554 +0200 @@ -0,0 +1,123 @@ +/****************************************************************************** + * @@ -242013,9 +241528,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_pathdiv.h linux-5.11. +#endif /* @#ifdef CONFIG_PATH_DIVERSITY */ +#endif /* @#ifndef __PHYDMPATHDIV_H__ */ + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_phystatus.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_phystatus.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_phystatus.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_phystatus.c 2021-03-07 18:16:17.064956526 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_phystatus.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_phystatus.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_phystatus.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_phystatus.c 2022-01-28 22:59:35.599653554 +0200 @@ -0,0 +1,3192 @@ +/****************************************************************************** + * @@ -245209,9 +244724,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_phystatus.c linux-5.1 + + phydm_avg_phystatus_init(dm); +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_phystatus.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_phystatus.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_phystatus.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_phystatus.h 2021-03-07 18:16:17.064956526 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_phystatus.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_phystatus.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_phystatus.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_phystatus.h 2022-01-28 22:59:35.599653554 +0200 @@ -0,0 +1,1137 @@ +/****************************************************************************** + * @@ -246350,9 +245865,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_phystatus.h linux-5.1 +void phydm_rx_phy_status_init(void *dm_void); + +#endif /*@#ifndef __HALHWOUTSRC_H__*/ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_pmac_tx_setting.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_pmac_tx_setting.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_pmac_tx_setting.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_pmac_tx_setting.c 2021-03-07 18:16:17.064956526 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_pmac_tx_setting.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_pmac_tx_setting.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_pmac_tx_setting.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_pmac_tx_setting.c 2022-01-28 22:59:35.599653554 +0200 @@ -0,0 +1,543 @@ +/****************************************************************************** + * @@ -246897,9 +246412,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_pmac_tx_setting.c lin +} + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_pmac_tx_setting.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_pmac_tx_setting.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_pmac_tx_setting.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_pmac_tx_setting.h 2021-03-07 18:16:17.064956526 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_pmac_tx_setting.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_pmac_tx_setting.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_pmac_tx_setting.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_pmac_tx_setting.h 2022-01-28 22:59:35.599653554 +0200 @@ -0,0 +1,152 @@ +/****************************************************************************** + * @@ -247053,9 +246568,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_pmac_tx_setting.h lin +void phydm_set_tmac_tx(void *dm_void); + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_pow_train.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_pow_train.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_pow_train.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_pow_train.c 2021-03-07 18:16:17.064956526 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_pow_train.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_pow_train.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_pow_train.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_pow_train.c 2022-01-28 22:59:35.600653601 +0200 @@ -0,0 +1,171 @@ +/****************************************************************************** + * @@ -247228,9 +246743,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_pow_train.c linux-5.1 +} + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_pow_train.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_pow_train.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_pow_train.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_pow_train.h 2021-03-07 18:16:17.064956526 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_pow_train.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_pow_train.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_pow_train.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_pow_train.h 2022-01-28 22:59:35.600653601 +0200 @@ -0,0 +1,84 @@ +/****************************************************************************** + * @@ -247316,9 +246831,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_pow_train.h linux-5.1 + +#endif +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_precomp.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_precomp.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_precomp.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_precomp.h 2021-03-07 18:16:17.064956526 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_precomp.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_precomp.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_precomp.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_precomp.h 2022-01-28 22:59:35.600653601 +0200 @@ -0,0 +1,514 @@ +/****************************************************************************** + * @@ -247834,9 +247349,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_precomp.h linux-5.11. + #include "rtl8197g/version_rtl8197g.h" +#endif +#endif /* @__ODM_PRECOMP_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_pre_define.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_pre_define.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_pre_define.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_pre_define.h 2021-03-07 18:16:17.064956526 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_pre_define.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_pre_define.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_pre_define.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_pre_define.h 2022-01-28 22:59:35.600653601 +0200 @@ -0,0 +1,849 @@ +/****************************************************************************** + * @@ -248687,9 +248202,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_pre_define.h linux-5. +}; + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_primary_cca.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_primary_cca.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_primary_cca.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_primary_cca.c 2021-03-07 18:16:17.064956526 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_primary_cca.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_primary_cca.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_primary_cca.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_primary_cca.c 2022-01-28 22:59:35.600653601 +0200 @@ -0,0 +1,173 @@ +/****************************************************************************** + * @@ -248864,9 +248379,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_primary_cca.c linux-5 +#endif +} +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_primary_cca.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_primary_cca.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_primary_cca.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_primary_cca.h 2021-03-07 18:16:17.064956526 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_primary_cca.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_primary_cca.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_primary_cca.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_primary_cca.h 2022-01-28 22:59:35.600653601 +0200 @@ -0,0 +1,87 @@ +/****************************************************************************** + * @@ -248955,9 +248470,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_primary_cca.h linux-5 +#endif /*@#ifdef PHYDM_PRIMARY_CCA*/ +#endif /*@#ifndef __PHYDM_PRIMARYCCA_H__*/ + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_psd.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_psd.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_psd.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_psd.c 2021-03-07 18:16:17.064956526 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_psd.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_psd.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_psd.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_psd.c 2022-01-28 22:59:35.600653601 +0200 @@ -0,0 +1,459 @@ +/****************************************************************************** + * @@ -249418,9 +248933,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_psd.c linux-5.11.4-rt +} + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_psd.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_psd.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_psd.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_psd.h 2021-03-07 18:16:17.064956526 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_psd.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_psd.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_psd.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_psd.h 2022-01-28 22:59:35.600653601 +0200 @@ -0,0 +1,66 @@ +/****************************************************************************** + * @@ -249488,9 +249003,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_psd.h linux-5.11.4-rt + +#endif +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_rainfo.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_rainfo.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_rainfo.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_rainfo.c 2021-03-07 18:16:17.064956526 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_rainfo.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_rainfo.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_rainfo.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_rainfo.c 2022-01-28 22:59:35.600653601 +0200 @@ -0,0 +1,2085 @@ +/****************************************************************************** + * @@ -251577,9 +251092,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_rainfo.c linux-5.11.4 +} + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_rainfo.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_rainfo.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_rainfo.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_rainfo.h 2021-03-07 18:16:17.065956573 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_rainfo.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_rainfo.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_rainfo.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_rainfo.h 2022-01-28 22:59:35.600653601 +0200 @@ -0,0 +1,276 @@ +/****************************************************************************** + * @@ -251857,9 +251372,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_rainfo.h linux-5.11.4 + void *dm_void); +#endif +#endif /*@#ifndef __PHYDMRAINFO_H__*/ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_regdefine11ac.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_regdefine11ac.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_regdefine11ac.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_regdefine11ac.h 2021-03-07 18:16:17.065956573 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_regdefine11ac.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_regdefine11ac.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_regdefine11ac.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_regdefine11ac.h 2022-01-28 22:59:35.600653601 +0200 @@ -0,0 +1,109 @@ +/****************************************************************************** + * @@ -251970,9 +251485,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_regdefine11ac.h linux +#define ODM_BIT_BB_ATC_11AC BIT(14) + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_regdefine11n.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_regdefine11n.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_regdefine11n.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_regdefine11n.h 2021-03-07 18:16:17.065956573 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_regdefine11n.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_regdefine11n.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_regdefine11n.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_regdefine11n.h 2022-01-28 22:59:35.600653601 +0200 @@ -0,0 +1,219 @@ +/****************************************************************************** + * @@ -252193,9 +251708,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_regdefine11n.h linux- +#define ODM_BIT_BB_ATC_11N BIT(11) +#endif + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_reg.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_reg.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_reg.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_reg.h 2021-03-07 18:16:17.065956573 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_reg.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_reg.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_reg.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_reg.h 2022-01-28 22:59:35.600653601 +0200 @@ -0,0 +1,241 @@ +/****************************************************************************** + * @@ -252438,9 +251953,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_reg.h linux-5.11.4-rt +#define BIT_FA_RESET BIT(0) + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_regtable.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_regtable.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_regtable.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_regtable.h 2021-03-07 18:16:17.065956573 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_regtable.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_regtable.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_regtable.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_regtable.h 2022-01-28 22:59:35.600653601 +0200 @@ -0,0 +1,849 @@ +#define R_0x0 0x0 +#define R_0x00 0x00 @@ -253291,9 +252806,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_regtable.h linux-5.11 +#define RF_0xee 0xee +#define RF_0xef 0xef +#define RF_0xf5 0xf5 -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_rssi_monitor.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_rssi_monitor.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_rssi_monitor.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_rssi_monitor.c 2021-03-07 18:16:17.065956573 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_rssi_monitor.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_rssi_monitor.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_rssi_monitor.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_rssi_monitor.c 2022-01-28 22:59:35.601653648 +0200 @@ -0,0 +1,170 @@ +/****************************************************************************** + * @@ -253465,9 +252980,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_rssi_monitor.c linux- +} + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_rssi_monitor.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_rssi_monitor.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_rssi_monitor.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_rssi_monitor.h 2021-03-07 18:16:17.065956573 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_rssi_monitor.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_rssi_monitor.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_rssi_monitor.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_rssi_monitor.h 2022-01-28 22:59:35.601653648 +0200 @@ -0,0 +1,55 @@ +/****************************************************************************** + * @@ -253524,9 +253039,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_rssi_monitor.h linux- +void phydm_rssi_monitor_init(void *dm_void); + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_smt_ant.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_smt_ant.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_smt_ant.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_smt_ant.c 2021-03-07 18:16:17.065956573 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_smt_ant.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_smt_ant.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_smt_ant.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_smt_ant.c 2022-01-28 22:59:35.601653648 +0200 @@ -0,0 +1,2277 @@ +/****************************************************************************** + * @@ -255805,9 +255320,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_smt_ant.c linux-5.11. + } +} +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_smt_ant.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_smt_ant.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_smt_ant.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_smt_ant.h 2021-03-07 18:16:17.065956573 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_smt_ant.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_smt_ant.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_smt_ant.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_smt_ant.h 2022-01-28 22:59:35.601653648 +0200 @@ -0,0 +1,210 @@ +/****************************************************************************** + * @@ -256020,9 +255535,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_smt_ant.h linux-5.11. +#endif /*@#if (defined(CONFIG_SMART_ANTENNA))*/ +#endif \ Ingen nyrad vid filslut -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_soml.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_soml.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_soml.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_soml.c 2021-03-07 18:16:17.065956573 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_soml.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_soml.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_soml.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_soml.c 2022-01-28 22:59:35.601653648 +0200 @@ -0,0 +1,1111 @@ +/****************************************************************************** + * @@ -257135,9 +256650,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_soml.c linux-5.11.4-r + } +#endif +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_soml.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_soml.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_soml.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_soml.h 2021-03-07 18:16:17.065956573 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_soml.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_soml.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_soml.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_soml.h 2022-01-28 22:59:35.601653648 +0200 @@ -0,0 +1,185 @@ +/****************************************************************************** + * @@ -257324,9 +256839,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_soml.h linux-5.11.4-r +#endif +void phydm_init_soft_ml_setting(void *dm_void); +#endif /*@#ifndef __PHYDMSOML_H__*/ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_types.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_types.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_types.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/phydm_types.h 2021-03-07 18:16:17.065956573 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_types.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_types.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/phydm_types.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/phydm_types.h 2022-01-28 22:59:35.601653648 +0200 @@ -0,0 +1,330 @@ +/****************************************************************************** + * @@ -257658,9 +257173,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/phydm_types.h linux-5.11.4- +#define MASKL3BYTES 0x00ffffff + +#endif /* __ODM_TYPES_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8812a/halhwimg8812a_bb.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8812a/halhwimg8812a_bb.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8812a/halhwimg8812a_bb.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8812a/halhwimg8812a_bb.c 2021-03-07 18:16:17.066956620 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8812a/halhwimg8812a_bb.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8812a/halhwimg8812a_bb.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8812a/halhwimg8812a_bb.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8812a/halhwimg8812a_bb.c 2022-01-28 22:59:35.601653648 +0200 @@ -0,0 +1,1469 @@ +/****************************************************************************** + * @@ -259131,9 +258646,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8812a/halhwimg8812a_bb.c + +#endif /* end of HWIMG_SUPPORT*/ + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8812a/halhwimg8812a_bb.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8812a/halhwimg8812a_bb.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8812a/halhwimg8812a_bb.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8812a/halhwimg8812a_bb.h 2021-03-07 18:16:17.066956620 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8812a/halhwimg8812a_bb.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8812a/halhwimg8812a_bb.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8812a/halhwimg8812a_bb.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8812a/halhwimg8812a_bb.h 2022-01-28 22:59:35.601653648 +0200 @@ -0,0 +1,107 @@ +/****************************************************************************** + * @@ -259242,9 +258757,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8812a/halhwimg8812a_bb.h +#endif +#endif /* end of HWIMG_SUPPORT*/ + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8812a/halhwimg8812a_mac.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8812a/halhwimg8812a_mac.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8812a/halhwimg8812a_mac.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8812a/halhwimg8812a_mac.c 2021-03-07 18:16:17.066956620 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8812a/halhwimg8812a_mac.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8812a/halhwimg8812a_mac.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8812a/halhwimg8812a_mac.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8812a/halhwimg8812a_mac.c 2022-01-28 22:59:35.601653648 +0200 @@ -0,0 +1,301 @@ +/****************************************************************************** + * @@ -259547,9 +259062,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8812a/halhwimg8812a_mac. + +#endif /* end of HWIMG_SUPPORT*/ + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8812a/halhwimg8812a_mac.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8812a/halhwimg8812a_mac.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8812a/halhwimg8812a_mac.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8812a/halhwimg8812a_mac.h 2021-03-07 18:16:17.066956620 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8812a/halhwimg8812a_mac.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8812a/halhwimg8812a_mac.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8812a/halhwimg8812a_mac.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8812a/halhwimg8812a_mac.h 2022-01-28 22:59:35.601653648 +0200 @@ -0,0 +1,33 @@ +/****************************************************************************** + * @@ -259584,9 +259099,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8812a/halhwimg8812a_mac. +#endif +#endif /* end of HWIMG_SUPPORT*/ + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8812a/halhwimg8812a_rf.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8812a/halhwimg8812a_rf.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8812a/halhwimg8812a_rf.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8812a/halhwimg8812a_rf.c 2021-03-07 18:16:17.066956620 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8812a/halhwimg8812a_rf.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8812a/halhwimg8812a_rf.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8812a/halhwimg8812a_rf.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8812a/halhwimg8812a_rf.c 2022-01-28 22:59:35.602653696 +0200 @@ -0,0 +1,3848 @@ +/****************************************************************************** + * @@ -263436,9 +262951,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8812a/halhwimg8812a_rf.c + +#endif /* end of HWIMG_SUPPORT*/ + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8812a/halhwimg8812a_rf.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8812a/halhwimg8812a_rf.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8812a/halhwimg8812a_rf.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8812a/halhwimg8812a_rf.h 2021-03-07 18:16:17.066956620 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8812a/halhwimg8812a_rf.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8812a/halhwimg8812a_rf.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8812a/halhwimg8812a_rf.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8812a/halhwimg8812a_rf.h 2022-01-28 22:59:35.602653696 +0200 @@ -0,0 +1,124 @@ +/****************************************************************************** + * @@ -263564,9 +263079,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8812a/halhwimg8812a_rf.h +#endif +#endif /* end of HWIMG_SUPPORT*/ + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8812a/phydm_regconfig8812a.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8812a/phydm_regconfig8812a.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8812a/phydm_regconfig8812a.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8812a/phydm_regconfig8812a.c 2021-03-07 18:16:17.066956620 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8812a/phydm_regconfig8812a.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8812a/phydm_regconfig8812a.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8812a/phydm_regconfig8812a.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8812a/phydm_regconfig8812a.c 2022-01-28 22:59:35.602653696 +0200 @@ -0,0 +1,149 @@ +/****************************************************************************** + * @@ -263717,9 +263232,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8812a/phydm_regconfig881 + enum rf_path RF_PATH, u32 reg_addr) {} + +#endif /* #if (RTL8812A_SUPPORT == 1) */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8812a/phydm_regconfig8812a.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8812a/phydm_regconfig8812a.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8812a/phydm_regconfig8812a.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8812a/phydm_regconfig8812a.h 2021-03-07 18:16:17.066956620 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8812a/phydm_regconfig8812a.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8812a/phydm_regconfig8812a.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8812a/phydm_regconfig8812a.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8812a/phydm_regconfig8812a.h 2022-01-28 22:59:35.602653696 +0200 @@ -0,0 +1,44 @@ +/****************************************************************************** + * @@ -263765,9 +263280,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8812a/phydm_regconfig881 + +#endif +#endif /* end of SUPPORT */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8812a/phydm_rtl8812a.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8812a/phydm_rtl8812a.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8812a/phydm_rtl8812a.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8812a/phydm_rtl8812a.c 2021-03-07 18:16:17.066956620 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8812a/phydm_rtl8812a.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8812a/phydm_rtl8812a.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8812a/phydm_rtl8812a.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8812a/phydm_rtl8812a.c 2022-01-28 22:59:35.602653696 +0200 @@ -0,0 +1,113 @@ +/****************************************************************************** + * @@ -263882,9 +263397,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8812a/phydm_rtl8812a.c l +} + +#endif /* #if (RTL8812A_SUPPORT == 1) */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8812a/phydm_rtl8812a.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8812a/phydm_rtl8812a.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8812a/phydm_rtl8812a.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8812a/phydm_rtl8812a.h 2021-03-07 18:16:17.066956620 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8812a/phydm_rtl8812a.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8812a/phydm_rtl8812a.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8812a/phydm_rtl8812a.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8812a/phydm_rtl8812a.h 2022-01-28 22:59:35.602653696 +0200 @@ -0,0 +1,27 @@ +/****************************************************************************** + * @@ -263913,9 +263428,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8812a/phydm_rtl8812a.h l +void phydm_hwsetting_8812a(struct dm_struct *dm); + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8812a/version_rtl8812a.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8812a/version_rtl8812a.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8812a/version_rtl8812a.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8812a/version_rtl8812a.h 2021-03-07 18:16:17.066956620 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8812a/version_rtl8812a.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8812a/version_rtl8812a.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8812a/version_rtl8812a.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8812a/version_rtl8812a.h 2022-01-28 22:59:35.602653696 +0200 @@ -0,0 +1,24 @@ +/****************************************************************************** + * @@ -263941,9 +263456,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8812a/version_rtl8812a.h +#define RELEASE_DATE_8812A 20150920 +#define COMMIT_BY_8812A "BB_LUKE" +#define RELEASE_VERSION_8812A 57 -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8814a/hal8814areg_odm.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8814a/hal8814areg_odm.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8814a/hal8814areg_odm.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8814a/hal8814areg_odm.h 2021-03-07 18:16:17.066956620 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8814a/hal8814areg_odm.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8814a/hal8814areg_odm.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8814a/hal8814areg_odm.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8814a/hal8814areg_odm.h 2022-01-28 22:59:35.602653696 +0200 @@ -0,0 +1,47 @@ +/****************************************************************************** + * @@ -263992,9 +263507,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8814a/hal8814areg_odm.h + +#endif + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_bb.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_bb.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_bb.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_bb.c 2021-03-07 18:16:17.067956667 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_bb.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_bb.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_bb.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_bb.c 2022-01-28 22:59:35.602653696 +0200 @@ -0,0 +1,4308 @@ +/****************************************************************************** + * @@ -268304,9 +267819,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_bb.c + +#endif /* end of HWIMG_SUPPORT*/ + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_bb.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_bb.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_bb.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_bb.h 2021-03-07 18:16:17.067956667 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_bb.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_bb.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_bb.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_bb.h 2022-01-28 22:59:35.602653696 +0200 @@ -0,0 +1,99 @@ +/****************************************************************************** +* @@ -268407,9 +267922,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_bb.h +#endif +#endif /* end of HWIMG_SUPPORT*/ + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_fw.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_fw.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_fw.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_fw.h 2021-03-07 18:16:17.067956667 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_fw.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_fw.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_fw.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_fw.h 2022-01-28 22:59:35.602653696 +0200 @@ -0,0 +1,56 @@ +/****************************************************************************** +* @@ -268467,9 +267982,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_fw.h +#endif +#endif // end of HWIMG_SUPPORT + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_mac.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_mac.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_mac.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_mac.c 2021-03-07 18:16:17.067956667 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_mac.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_mac.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_mac.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_mac.c 2022-01-28 22:59:35.602653696 +0200 @@ -0,0 +1,325 @@ +/****************************************************************************** + * @@ -268796,9 +268311,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_mac. + +#endif /* end of HWIMG_SUPPORT*/ + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_mac.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_mac.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_mac.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_mac.h 2021-03-07 18:16:17.067956667 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_mac.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_mac.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_mac.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_mac.h 2022-01-28 22:59:35.602653696 +0200 @@ -0,0 +1,39 @@ +/****************************************************************************** +* @@ -268839,9 +268354,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_mac. +#endif +#endif /* end of HWIMG_SUPPORT*/ + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_rf.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_rf.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_rf.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_rf.c 2021-03-07 18:16:17.067956667 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_rf.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_rf.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_rf.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_rf.c 2022-01-28 22:59:35.603653744 +0200 @@ -0,0 +1,8838 @@ +/****************************************************************************** + * @@ -277681,9 +277196,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_rf.c + +#endif /* end of HWIMG_SUPPORT*/ + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_rf.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_rf.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_rf.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_rf.h 2021-03-07 18:16:17.067956667 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_rf.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_rf.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_rf.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_rf.h 2022-01-28 22:59:35.603653744 +0200 @@ -0,0 +1,149 @@ +/****************************************************************************** +* @@ -277834,10 +277349,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_rf.h +#endif +#endif /* end of HWIMG_SUPPORT*/ + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_ap.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_ap.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_ap.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_ap.c 2021-03-07 18:16:17.068956715 +0200 -@@ -0,0 +1,1754 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_ap.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_ap.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_ap.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_ap.c 2023-05-26 22:35:36.544136899 +0300 +@@ -0,0 +1,1741 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. @@ -279029,12 +278544,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_ap. +#define DP_DPK_NUM 3 +#define DP_DPK_VALUE_NUM 2 + -+ -+ -+ +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) +//digital predistortion -+VOID ++VOID + phy_DigitalPredistortion_8814A( +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PADAPTER pAdapter, @@ -279044,39 +278556,29 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_ap. + IN BOOLEAN is2T + ) +{ -+#if (RT_PLATFORM == PLATFORM_WINDOWS) -+#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ PDM_ODM_T pDM_Odm = &pHalData->odmpriv; -+#endif -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; -+#endif -+#endif + -+ u32 tmpReg, tmpReg2, index, i; ++ u32 tmpReg, tmpReg2, index, i; + u8 path, pathbound = PATH_NUM; + u32 AFE_backup[IQK_ADDA_REG_NUM]; -+ u32 AFE_REG[IQK_ADDA_REG_NUM] = { -+ rFPGA0_XCD_SwitchControl, rBlue_Tooth, ++ u32 AFE_REG[IQK_ADDA_REG_NUM] = { ++ rFPGA0_XCD_SwitchControl, rBlue_Tooth, + rRx_Wait_CCA, rTx_CCK_RFON, -+ rTx_CCK_BBON, rTx_OFDM_RFON, ++ rTx_CCK_BBON, rTx_OFDM_RFON, + rTx_OFDM_BBON, rTx_To_Rx, -+ rTx_To_Tx, rRx_CCK, ++ rTx_To_Tx, rRx_CCK, + rRx_OFDM, rRx_Wait_RIFS, -+ rRx_TO_Rx, rStandby, ++ rRx_TO_Rx, rStandby, + rSleep, rPMPD_ANAEN }; + -+ u32 BB_backup[DP_BB_REG_NUM]; ++ u32 BB_backup[DP_BB_REG_NUM]; + u32 BB_REG[DP_BB_REG_NUM] = { -+ rOFDM0_TRxPathEnable, rFPGA0_RFMOD, ++ rOFDM0_TRxPathEnable, rFPGA0_RFMOD, + rOFDM0_TRMuxPar, rFPGA0_XCD_RFInterfaceSW, + rFPGA0_XAB_RFInterfaceSW, rFPGA0_XA_RFInterfaceOE, -+ rFPGA0_XB_RFInterfaceOE}; ++ rFPGA0_XB_RFInterfaceOE}; + u32 BB_settings[DP_BB_REG_NUM] = { + 0x00a05430, 0x02040000, 0x000800e4, 0x22208000, -+ 0x0, 0x0, 0x0}; ++ 0x0, 0x0, 0x0}; + + u32 RF_backup[DP_PATH_NUM][DP_RF_REG_NUM]; + u32 RF_REG[DP_RF_REG_NUM] = { @@ -279592,9 +279094,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_ap. +#endif + + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_ap.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_ap.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_ap.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_ap.h 2021-03-07 18:16:17.068956715 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_ap.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_ap.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_ap.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_ap.h 2022-01-28 22:59:35.603653744 +0200 @@ -0,0 +1,164 @@ +/****************************************************************************** + * @@ -279760,9 +279262,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_ap. + +#endif // #ifndef __HAL_PHY_RF_8814A_H__ + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_win.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_win.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_win.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_win.c 2021-03-07 18:16:17.068956715 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_win.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_win.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_win.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_win.c 2022-01-28 22:59:35.603653744 +0200 @@ -0,0 +1,528 @@ +/****************************************************************************** + * @@ -280292,9 +279794,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_win + IN BOOLEAN bReCovery + ){} +#endif /* (RTL8814A_SUPPORT == 0)*/ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_win.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_win.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_win.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_win.h 2021-03-07 18:16:17.068956715 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_win.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_win.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_win.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_win.h 2022-01-28 22:59:35.603653744 +0200 @@ -0,0 +1,106 @@ +/****************************************************************************** + * @@ -280402,9 +279904,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_win + +#endif // #ifndef __HAL_PHY_RF_8188E_H__ + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8814a/phydm_regconfig8814a.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8814a/phydm_regconfig8814a.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8814a/phydm_regconfig8814a.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8814a/phydm_regconfig8814a.c 2021-03-07 18:16:17.068956715 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8814a/phydm_regconfig8814a.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8814a/phydm_regconfig8814a.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8814a/phydm_regconfig8814a.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8814a/phydm_regconfig8814a.c 2022-01-28 22:59:35.603653744 +0200 @@ -0,0 +1,219 @@ +/****************************************************************************** + * @@ -280625,9 +280127,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8814a/phydm_regconfig881 +} +#endif + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8814a/phydm_regconfig8814a.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8814a/phydm_regconfig8814a.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8814a/phydm_regconfig8814a.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8814a/phydm_regconfig8814a.h 2021-03-07 18:16:17.068956715 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8814a/phydm_regconfig8814a.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8814a/phydm_regconfig8814a.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8814a/phydm_regconfig8814a.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8814a/phydm_regconfig8814a.h 2022-01-28 22:59:35.603653744 +0200 @@ -0,0 +1,109 @@ +/****************************************************************************** + * @@ -280738,9 +280240,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8814a/phydm_regconfig881 +#endif +#endif // end of SUPPORT + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8814a/phydm_rtl8814a.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8814a/phydm_rtl8814a.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8814a/phydm_rtl8814a.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8814a/phydm_rtl8814a.c 2021-03-07 18:16:17.068956715 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8814a/phydm_rtl8814a.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8814a/phydm_rtl8814a.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8814a/phydm_rtl8814a.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8814a/phydm_rtl8814a.c 2022-01-28 22:59:35.603653744 +0200 @@ -0,0 +1,503 @@ +/****************************************************************************** + * @@ -281245,9 +280747,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8814a/phydm_rtl8814a.c l + + + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8814a/phydm_rtl8814a.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8814a/phydm_rtl8814a.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8814a/phydm_rtl8814a.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8814a/phydm_rtl8814a.h 2021-03-07 18:16:17.068956715 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8814a/phydm_rtl8814a.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8814a/phydm_rtl8814a.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8814a/phydm_rtl8814a.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8814a/phydm_rtl8814a.h 2022-01-28 22:59:35.603653744 +0200 @@ -0,0 +1,78 @@ +/****************************************************************************** + * @@ -281327,9 +280829,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8814a/phydm_rtl8814a.h l + ); + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8814a/version_rtl8814a.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8814a/version_rtl8814a.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8814a/version_rtl8814a.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8814a/version_rtl8814a.h 2021-03-07 18:16:17.068956715 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8814a/version_rtl8814a.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8814a/version_rtl8814a.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8814a/version_rtl8814a.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8814a/version_rtl8814a.h 2022-01-28 22:59:35.603653744 +0200 @@ -0,0 +1,10 @@ +/*RTL8814A PHY Parameters*/ +/* @@ -281341,9 +280843,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8814a/version_rtl8814a.h +#define RELEASE_DATE_8814A 20150908 +#define COMMIT_BY_8814A "BB_LUKE" +#define RELEASE_VERSION_8814A 81 -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_bb.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_bb.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_bb.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_bb.c 2021-03-07 18:16:17.068956715 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_bb.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_bb.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_bb.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_bb.c 2022-01-28 22:59:35.604653791 +0200 @@ -0,0 +1,923 @@ +/****************************************************************************** + * @@ -282268,9 +281770,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_bb.c + + +#endif /* end of HWIMG_SUPPORT*/ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_bb.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_bb.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_bb.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_bb.h 2021-03-07 18:16:17.068956715 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_bb.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_bb.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_bb.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_bb.h 2022-01-28 22:59:35.604653791 +0200 @@ -0,0 +1,83 @@ +/****************************************************************************** + * @@ -282355,9 +281857,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_bb.h + +#endif +#endif /* end of HWIMG_SUPPORT*/ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_mac.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_mac.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_mac.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_mac.c 2021-03-07 18:16:17.068956715 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_mac.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_mac.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_mac.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_mac.c 2022-01-28 22:59:35.604653791 +0200 @@ -0,0 +1,279 @@ +/****************************************************************************** + * @@ -282638,9 +282140,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_mac. +} + +#endif /* end of HWIMG_SUPPORT*/ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_mac.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_mac.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_mac.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_mac.h 2021-03-07 18:16:17.068956715 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_mac.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_mac.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_mac.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_mac.h 2022-01-28 22:59:35.604653791 +0200 @@ -0,0 +1,33 @@ +/****************************************************************************** + * @@ -282675,9 +282177,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_mac. + +#endif +#endif /* end of HWIMG_SUPPORT*/ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_rf.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_rf.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_rf.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_rf.c 2021-03-07 18:16:17.069956761 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_rf.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_rf.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_rf.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_rf.c 2022-01-28 22:59:35.604653791 +0200 @@ -0,0 +1,5457 @@ +/****************************************************************************** + * @@ -288136,9 +287638,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_rf.c +} + +#endif /* end of HWIMG_SUPPORT*/ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_rf.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_rf.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_rf.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_rf.h 2021-03-07 18:16:17.069956761 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_rf.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_rf.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_rf.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_rf.h 2022-01-28 22:59:35.604653791 +0200 @@ -0,0 +1,143 @@ +/****************************************************************************** + * @@ -288283,9 +287785,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_rf.h + +#endif +#endif /* end of HWIMG_SUPPORT*/ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8821a/phydm_regconfig8821a.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8821a/phydm_regconfig8821a.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8821a/phydm_regconfig8821a.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8821a/phydm_regconfig8821a.c 2021-03-07 18:16:17.069956761 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8821a/phydm_regconfig8821a.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8821a/phydm_regconfig8821a.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8821a/phydm_regconfig8821a.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8821a/phydm_regconfig8821a.c 2022-01-28 22:59:35.604653791 +0200 @@ -0,0 +1,206 @@ +/****************************************************************************** + * @@ -288493,9 +287995,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8821a/phydm_regconfig882 +} + +#endif /* #if (RTL8821A_SUPPORT == 1)*/ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8821a/phydm_regconfig8821a.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8821a/phydm_regconfig8821a.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8821a/phydm_regconfig8821a.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8821a/phydm_regconfig8821a.h 2021-03-07 18:16:17.069956761 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8821a/phydm_regconfig8821a.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8821a/phydm_regconfig8821a.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8821a/phydm_regconfig8821a.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8821a/phydm_regconfig8821a.h 2022-01-28 22:59:35.604653791 +0200 @@ -0,0 +1,90 @@ +/****************************************************************************** + * @@ -288587,9 +288089,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8821a/phydm_regconfig882 + +#endif +#endif /* end of SUPPORT */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8821a/phydm_rtl8821a.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8821a/phydm_rtl8821a.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8821a/phydm_rtl8821a.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8821a/phydm_rtl8821a.c 2021-03-07 18:16:17.069956761 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8821a/phydm_rtl8821a.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8821a/phydm_rtl8821a.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8821a/phydm_rtl8821a.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8821a/phydm_rtl8821a.c 2022-01-28 22:59:35.604653791 +0200 @@ -0,0 +1,129 @@ +/****************************************************************************** + * @@ -288720,9 +288222,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8821a/phydm_rtl8821a.c l +} + +#endif /* #if (RTL8821A_SUPPORT == 1) */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8821a/phydm_rtl8821a.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8821a/phydm_rtl8821a.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8821a/phydm_rtl8821a.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8821a/phydm_rtl8821a.h 2021-03-07 18:16:17.069956761 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8821a/phydm_rtl8821a.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8821a/phydm_rtl8821a.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8821a/phydm_rtl8821a.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8821a/phydm_rtl8821a.h 2022-01-28 22:59:35.604653791 +0200 @@ -0,0 +1,31 @@ +/****************************************************************************** + * @@ -288755,9 +288257,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8821a/phydm_rtl8821a.h l +); + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8821a/version_rtl8821a.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8821a/version_rtl8821a.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8821a/version_rtl8821a.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/rtl8821a/version_rtl8821a.h 2021-03-07 18:16:17.069956761 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8821a/version_rtl8821a.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8821a/version_rtl8821a.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/rtl8821a/version_rtl8821a.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/rtl8821a/version_rtl8821a.h 2022-01-28 22:59:35.604653791 +0200 @@ -0,0 +1,24 @@ +/****************************************************************************** + * @@ -288783,9 +288285,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/rtl8821a/version_rtl8821a.h +#define RELEASE_DATE_8821A 20150920 +#define COMMIT_BY_8821A "BB_LUKE" +#define RELEASE_VERSION_8821A 59 -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/sd4_phydm_2_kernel.mk linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/sd4_phydm_2_kernel.mk ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/sd4_phydm_2_kernel.mk 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/sd4_phydm_2_kernel.mk 2021-03-07 18:16:17.069956761 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/sd4_phydm_2_kernel.mk linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/sd4_phydm_2_kernel.mk +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/sd4_phydm_2_kernel.mk 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/sd4_phydm_2_kernel.mk 2022-01-28 22:59:35.604653791 +0200 @@ -0,0 +1,188 @@ +EXTRA_CFLAGS += -I$(src)/hal/phydm + @@ -288975,9 +288477,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/sd4_phydm_2_kernel.mk linux + hal/phydm/$(RTL871X)/phydm_hal_api8198f.o\ + hal/phydm/$(RTL871X)/phydm_regconfig8198f.o +endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/txbf/halcomtxbf.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/txbf/halcomtxbf.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/txbf/halcomtxbf.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/txbf/halcomtxbf.c 2021-03-07 18:16:17.069956761 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/txbf/halcomtxbf.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/txbf/halcomtxbf.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/txbf/halcomtxbf.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/txbf/halcomtxbf.c 2022-01-28 22:59:35.604653791 +0200 @@ -0,0 +1,520 @@ +/****************************************************************************** + * @@ -289499,9 +289001,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/txbf/halcomtxbf.c linux-5.1 +#endif + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/txbf/halcomtxbf.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/txbf/halcomtxbf.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/txbf/halcomtxbf.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/txbf/halcomtxbf.h 2021-03-07 18:16:17.069956761 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/txbf/halcomtxbf.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/txbf/halcomtxbf.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/txbf/halcomtxbf.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/txbf/halcomtxbf.h 2022-01-28 22:59:35.604653791 +0200 @@ -0,0 +1,183 @@ +/****************************************************************************** + * @@ -289686,9 +289188,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/txbf/halcomtxbf.h linux-5.1 +#endif + +#endif /* @#ifndef __HAL_COM_TXBF_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/txbf/haltxbf8192e.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/txbf/haltxbf8192e.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/txbf/haltxbf8192e.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/txbf/haltxbf8192e.c 2021-03-07 18:16:17.069956761 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/txbf/haltxbf8192e.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/txbf/haltxbf8192e.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/txbf/haltxbf8192e.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/txbf/haltxbf8192e.c 2022-01-28 22:59:35.605653838 +0200 @@ -0,0 +1,384 @@ +/****************************************************************************** + * @@ -290074,9 +289576,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/txbf/haltxbf8192e.c linux-5 +#endif /* @#if (RTL8192E_SUPPORT == 1)*/ + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/txbf/haltxbf8192e.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/txbf/haltxbf8192e.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/txbf/haltxbf8192e.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/txbf/haltxbf8192e.h 2021-03-07 18:16:17.069956761 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/txbf/haltxbf8192e.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/txbf/haltxbf8192e.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/txbf/haltxbf8192e.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/txbf/haltxbf8192e.h 2022-01-28 22:59:35.605653838 +0200 @@ -0,0 +1,71 @@ +/****************************************************************************** + * @@ -290149,9 +289651,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/txbf/haltxbf8192e.h linux-5 +#endif + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/txbf/haltxbf8814a.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/txbf/haltxbf8814a.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/txbf/haltxbf8814a.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/txbf/haltxbf8814a.c 2021-03-07 18:16:17.069956761 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/txbf/haltxbf8814a.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/txbf/haltxbf8814a.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/txbf/haltxbf8814a.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/txbf/haltxbf8814a.c 2022-01-28 22:59:35.605653838 +0200 @@ -0,0 +1,675 @@ +/****************************************************************************** + * @@ -290828,9 +290330,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/txbf/haltxbf8814a.c linux-5 +#endif /* @(RTL8814A_SUPPORT == 1)*/ + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/txbf/haltxbf8814a.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/txbf/haltxbf8814a.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/txbf/haltxbf8814a.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/txbf/haltxbf8814a.h 2021-03-07 18:16:17.069956761 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/txbf/haltxbf8814a.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/txbf/haltxbf8814a.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/txbf/haltxbf8814a.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/txbf/haltxbf8814a.h 2022-01-28 22:59:35.605653838 +0200 @@ -0,0 +1,77 @@ +/****************************************************************************** + * @@ -290909,9 +290411,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/txbf/haltxbf8814a.h linux-5 +#endif + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/txbf/haltxbf8822b.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/txbf/haltxbf8822b.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/txbf/haltxbf8822b.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/txbf/haltxbf8822b.c 2021-03-07 18:16:17.069956761 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/txbf/haltxbf8822b.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/txbf/haltxbf8822b.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/txbf/haltxbf8822b.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/txbf/haltxbf8822b.c 2022-01-28 22:59:35.605653838 +0200 @@ -0,0 +1,1087 @@ +/****************************************************************************** + * @@ -292000,9 +291502,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/txbf/haltxbf8822b.c linux-5 +} +#endif +#endif /* @(RTL8822B_SUPPORT == 1)*/ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/txbf/haltxbf8822b.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/txbf/haltxbf8822b.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/txbf/haltxbf8822b.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/txbf/haltxbf8822b.h 2021-03-07 18:16:17.069956761 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/txbf/haltxbf8822b.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/txbf/haltxbf8822b.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/txbf/haltxbf8822b.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/txbf/haltxbf8822b.h 2022-01-28 22:59:35.605653838 +0200 @@ -0,0 +1,78 @@ +/****************************************************************************** + * @@ -292082,9 +291584,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/txbf/haltxbf8822b.h linux-5 + +#endif +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/txbf/haltxbfinterface.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/txbf/haltxbfinterface.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/txbf/haltxbfinterface.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/txbf/haltxbfinterface.c 2021-03-07 18:16:17.069956761 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/txbf/haltxbfinterface.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/txbf/haltxbfinterface.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/txbf/haltxbfinterface.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/txbf/haltxbfinterface.c 2022-01-28 22:59:35.605653838 +0200 @@ -0,0 +1,1484 @@ +/****************************************************************************** + * @@ -293570,9 +293072,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/txbf/haltxbfinterface.c lin +} + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/txbf/haltxbfinterface.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/txbf/haltxbfinterface.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/txbf/haltxbfinterface.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/txbf/haltxbfinterface.h 2021-03-07 18:16:17.069956761 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/txbf/haltxbfinterface.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/txbf/haltxbfinterface.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/txbf/haltxbfinterface.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/txbf/haltxbfinterface.h 2022-01-28 22:59:35.605653838 +0200 @@ -0,0 +1,167 @@ +/****************************************************************************** + * @@ -293741,9 +293243,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/txbf/haltxbfinterface.h lin +#endif + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/txbf/haltxbfjaguar.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/txbf/haltxbfjaguar.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/txbf/haltxbfjaguar.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/txbf/haltxbfjaguar.c 2021-03-07 18:16:17.070956809 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/txbf/haltxbfjaguar.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/txbf/haltxbfjaguar.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/txbf/haltxbfjaguar.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/txbf/haltxbfjaguar.c 2022-01-28 22:59:35.605653838 +0200 @@ -0,0 +1,510 @@ +/****************************************************************************** + * @@ -294255,9 +293757,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/txbf/haltxbfjaguar.c linux- +#endif + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/txbf/haltxbfjaguar.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/txbf/haltxbfjaguar.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/txbf/haltxbfjaguar.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/txbf/haltxbfjaguar.h 2021-03-07 18:16:17.070956809 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/txbf/haltxbfjaguar.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/txbf/haltxbfjaguar.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/txbf/haltxbfjaguar.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/txbf/haltxbfjaguar.h 2022-01-28 22:59:35.605653838 +0200 @@ -0,0 +1,78 @@ +/****************************************************************************** + * @@ -294337,9 +293839,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/txbf/haltxbfjaguar.h linux- +#endif + +#endif /* @#ifndef __HAL_TXBF_JAGUAR_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/txbf/phydm_hal_txbf_api.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/txbf/phydm_hal_txbf_api.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/txbf/phydm_hal_txbf_api.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/txbf/phydm_hal_txbf_api.c 2021-03-07 18:16:17.070956809 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/txbf/phydm_hal_txbf_api.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/txbf/phydm_hal_txbf_api.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/txbf/phydm_hal_txbf_api.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/txbf/phydm_hal_txbf_api.c 2022-01-28 22:59:35.605653838 +0200 @@ -0,0 +1,425 @@ +/****************************************************************************** + * @@ -294766,9 +294268,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/txbf/phydm_hal_txbf_api.c l +#endif +#endif /*PHYSTS_3RD_TYPE_IC*/ +#endif /*CONFIG_BB_TXBF_API*/ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/txbf/phydm_hal_txbf_api.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/txbf/phydm_hal_txbf_api.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/phydm/txbf/phydm_hal_txbf_api.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/phydm/txbf/phydm_hal_txbf_api.h 2021-03-07 18:16:17.070956809 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/txbf/phydm_hal_txbf_api.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/txbf/phydm_hal_txbf_api.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/phydm/txbf/phydm_hal_txbf_api.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/phydm/txbf/phydm_hal_txbf_api.h 2022-01-28 22:59:35.605653838 +0200 @@ -0,0 +1,74 @@ +/****************************************************************************** + * @@ -294844,9 +294346,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/phydm/txbf/phydm_hal_txbf_api.h l + +#endif +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/hal8812a_fw.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8812a/hal8812a_fw.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/hal8812a_fw.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8812a/hal8812a_fw.c 2021-03-07 18:16:17.074956998 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8812a/hal8812a_fw.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8812a/hal8812a_fw.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8812a/hal8812a_fw.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8812a/hal8812a_fw.c 2022-01-28 22:59:35.610654075 +0200 @@ -0,0 +1,17941 @@ +/****************************************************************************** +* @@ -312789,9 +312291,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/hal8812a_fw.c linux-5.11 +#endif /* end of LOAD_FW_HEADER_FROM_DRIVER */ + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/hal8812a_fw.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8812a/hal8812a_fw.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/hal8812a_fw.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8812a/hal8812a_fw.h 2021-03-07 18:16:17.074956998 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8812a/hal8812a_fw.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8812a/hal8812a_fw.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8812a/hal8812a_fw.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8812a/hal8812a_fw.h 2022-01-28 22:59:35.610654075 +0200 @@ -0,0 +1,47 @@ +/****************************************************************************** +* @@ -312840,9 +312342,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/hal8812a_fw.h linux-5.11 + +#endif + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/Hal8812PwrSeq.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8812a/Hal8812PwrSeq.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/Hal8812PwrSeq.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8812a/Hal8812PwrSeq.c 2021-03-07 18:16:17.070956809 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8812a/Hal8812PwrSeq.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8812a/Hal8812PwrSeq.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8812a/Hal8812PwrSeq.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8812a/Hal8812PwrSeq.c 2022-01-28 22:59:35.605653838 +0200 @@ -0,0 +1,83 @@ +/****************************************************************************** + * @@ -312927,9 +312429,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/Hal8812PwrSeq.c linux-5. + RTL8812_TRANS_LPS_TO_ACT + RTL8812_TRANS_END +}; -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/hal8821a_fw.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8812a/hal8821a_fw.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/hal8821a_fw.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8812a/hal8821a_fw.c 2021-03-07 18:16:17.078957187 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8812a/hal8821a_fw.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8812a/hal8821a_fw.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8812a/hal8821a_fw.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8812a/hal8821a_fw.c 2022-01-28 22:59:35.614654265 +0200 @@ -0,0 +1,14005 @@ +/****************************************************************************** +* @@ -326936,9 +326438,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/hal8821a_fw.c linux-5.11 +#endif /* end of LOAD_FW_HEADER_FROM_DRIVER */ + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/hal8821a_fw.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8812a/hal8821a_fw.h ---- linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/hal8821a_fw.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8812a/hal8821a_fw.h 2021-03-07 18:16:17.078957187 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8812a/hal8821a_fw.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8812a/hal8821a_fw.h +--- linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8812a/hal8821a_fw.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8812a/hal8821a_fw.h 2022-01-28 22:59:35.614654265 +0200 @@ -0,0 +1,47 @@ +/****************************************************************************** +* @@ -326987,9 +326489,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/hal8821a_fw.h linux-5.11 + +#endif + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/Hal8821APwrSeq.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8812a/Hal8821APwrSeq.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/Hal8821APwrSeq.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8812a/Hal8821APwrSeq.c 2021-03-07 18:16:17.070956809 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8812a/Hal8821APwrSeq.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8812a/Hal8821APwrSeq.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8812a/Hal8821APwrSeq.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8812a/Hal8821APwrSeq.c 2022-01-28 22:59:35.605653838 +0200 @@ -0,0 +1,86 @@ +/****************************************************************************** + * @@ -327077,9 +326579,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/Hal8821APwrSeq.c linux-5 + RTL8821A_TRANS_LPS_TO_ACT + RTL8821A_TRANS_END +}; -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/rtl8812a_cmd.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8812a/rtl8812a_cmd.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/rtl8812a_cmd.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8812a/rtl8812a_cmd.c 2021-03-07 18:16:17.079957235 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8812a/rtl8812a_cmd.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8812a/rtl8812a_cmd.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8812a/rtl8812a_cmd.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8812a/rtl8812a_cmd.c 2022-01-28 22:59:35.614654265 +0200 @@ -0,0 +1,860 @@ +/****************************************************************************** + * @@ -327941,9 +327443,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/rtl8812a_cmd.c linux-5.1 +} + +#endif /* CONFIG_BT_COEXIST */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/rtl8812a_dm.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8812a/rtl8812a_dm.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/rtl8812a_dm.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8812a/rtl8812a_dm.c 2021-03-07 18:16:17.079957235 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8812a/rtl8812a_dm.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8812a/rtl8812a_dm.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8812a/rtl8812a_dm.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8812a/rtl8812a_dm.c 2022-01-28 22:59:35.614654265 +0200 @@ -0,0 +1,360 @@ +/****************************************************************************** + * @@ -328305,9 +327807,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/rtl8812a_dm.c linux-5.11 + /* _rtw_spinlock_free(&pHalData->odm_stainfo_lock); */ + odm_cancel_all_timers(podmpriv); +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/rtl8812a_hal_init.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8812a/rtl8812a_hal_init.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/rtl8812a_hal_init.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8812a/rtl8812a_hal_init.c 2021-03-07 18:16:17.079957235 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8812a/rtl8812a_hal_init.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8812a/rtl8812a_hal_init.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8812a/rtl8812a_hal_init.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8812a/rtl8812a_hal_init.c 2022-01-28 22:59:35.615654312 +0200 @@ -0,0 +1,5777 @@ +/****************************************************************************** + * @@ -334086,9 +333588,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/rtl8812a_hal_init.c linu + pHalFunc->fw_dl = &FirmwareDownload8812; + pHalFunc->hal_get_tx_buff_rsvd_page_num = &GetTxBufferRsvdPageNum8812; +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/rtl8812a_phycfg.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8812a/rtl8812a_phycfg.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/rtl8812a_phycfg.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8812a/rtl8812a_phycfg.c 2021-03-07 18:16:17.080957282 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8812a/rtl8812a_phycfg.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8812a/rtl8812a_phycfg.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8812a/rtl8812a_phycfg.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8812a/rtl8812a_phycfg.c 2022-01-28 22:59:35.615654312 +0200 @@ -0,0 +1,2045 @@ +/****************************************************************************** + * @@ -336135,9 +335637,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/rtl8812a_phycfg.c linux- + + /* RTW_INFO("<==%s()\n",__FUNCTION__); */ +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/rtl8812a_rf6052.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8812a/rtl8812a_rf6052.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/rtl8812a_rf6052.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8812a/rtl8812a_rf6052.c 2021-03-07 18:16:17.080957282 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8812a/rtl8812a_rf6052.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8812a/rtl8812a_rf6052.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8812a/rtl8812a_rf6052.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8812a/rtl8812a_rf6052.c 2022-01-28 22:59:35.615654312 +0200 @@ -0,0 +1,158 @@ +/****************************************************************************** + * @@ -336297,9 +335799,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/rtl8812a_rf6052.c linux- + + +/* End of HalRf6052.c */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/rtl8812a_rxdesc.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8812a/rtl8812a_rxdesc.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/rtl8812a_rxdesc.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8812a/rtl8812a_rxdesc.c 2021-03-07 18:16:17.080957282 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8812a/rtl8812a_rxdesc.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8812a/rtl8812a_rxdesc.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8812a/rtl8812a_rxdesc.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8812a/rtl8812a_rxdesc.c 2022-01-28 22:59:35.615654312 +0200 @@ -0,0 +1,62 @@ +/****************************************************************************** + * @@ -336363,9 +335865,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/rtl8812a_rxdesc.c linux- + /* Offset 20 */ + /* pattrib->tsfl=(u8)GET_RX_STATUS_DESC_TSFL_8812(pdesc); */ +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/rtl8812a_sreset.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8812a/rtl8812a_sreset.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/rtl8812a_sreset.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8812a/rtl8812a_sreset.c 2021-03-07 18:16:17.080957282 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8812a/rtl8812a_sreset.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8812a/rtl8812a_sreset.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8812a/rtl8812a_sreset.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8812a/rtl8812a_sreset.c 2022-01-28 22:59:35.615654312 +0200 @@ -0,0 +1,106 @@ +/****************************************************************************** + * @@ -336473,9 +335975,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/rtl8812a_sreset.c linux- + } +} +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/rtl8812a_xmit.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8812a/rtl8812a_xmit.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/rtl8812a_xmit.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8812a/rtl8812a_xmit.c 2021-03-07 18:16:17.080957282 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8812a/rtl8812a_xmit.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8812a/rtl8812a_xmit.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8812a/rtl8812a_xmit.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8812a/rtl8812a_xmit.c 2022-01-28 22:59:35.615654312 +0200 @@ -0,0 +1,515 @@ +/****************************************************************************** + * @@ -336992,9 +336494,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/rtl8812a_xmit.c linux-5. + + return SCSettingOfDesc; +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/usb/rtl8812au_led.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8812a/usb/rtl8812au_led.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/usb/rtl8812au_led.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8812a/usb/rtl8812au_led.c 2021-03-07 18:16:17.080957282 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8812a/usb/rtl8812au_led.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8812a/usb/rtl8812au_led.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8812a/usb/rtl8812au_led.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8812a/usb/rtl8812au_led.c 2022-01-28 22:59:35.615654312 +0200 @@ -0,0 +1,389 @@ +/****************************************************************************** + * @@ -337385,9 +336887,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/usb/rtl8812au_led.c linu + DeInitLed(&(ledpriv->SwLed2)); +} +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/usb/rtl8812au_recv.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8812a/usb/rtl8812au_recv.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/usb/rtl8812au_recv.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8812a/usb/rtl8812au_recv.c 2021-03-07 18:16:17.080957282 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8812a/usb/rtl8812au_recv.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8812a/usb/rtl8812au_recv.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8812a/usb/rtl8812au_recv.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8812a/usb/rtl8812au_recv.c 2022-01-28 22:59:35.615654312 +0200 @@ -0,0 +1,28 @@ +/****************************************************************************** + * @@ -337417,9 +336919,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/usb/rtl8812au_recv.c lin +{ + usb_free_recv_priv(padapter, INTERRUPT_MSG_FORMAT_LEN); +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/usb/rtl8812au_xmit.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8812a/usb/rtl8812au_xmit.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/usb/rtl8812au_xmit.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8812a/usb/rtl8812au_xmit.c 2021-03-07 18:16:17.080957282 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8812a/usb/rtl8812au_xmit.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8812a/usb/rtl8812au_xmit.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8812a/usb/rtl8812au_xmit.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8812a/usb/rtl8812au_xmit.c 2022-01-28 22:59:35.616654360 +0200 @@ -0,0 +1,1169 @@ +/****************************************************************************** + * @@ -338590,9 +338092,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/usb/rtl8812au_xmit.c lin + +} +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/usb/usb_halinit.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8812a/usb/usb_halinit.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/usb/usb_halinit.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8812a/usb/usb_halinit.c 2021-03-07 18:16:17.080957282 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8812a/usb/usb_halinit.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8812a/usb/usb_halinit.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8812a/usb/usb_halinit.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8812a/usb/usb_halinit.c 2022-01-28 22:59:35.616654360 +0200 @@ -0,0 +1,2716 @@ +/****************************************************************************** + * @@ -341310,9 +340812,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/usb/usb_halinit.c linux- + rtl8812_set_hal_ops(pHalFunc); + +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/usb/usb_ops_linux.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8812a/usb/usb_ops_linux.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/usb/usb_ops_linux.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8812a/usb/usb_ops_linux.c 2021-03-07 18:16:17.081957329 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8812a/usb/usb_ops_linux.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8812a/usb/usb_ops_linux.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8812a/usb/usb_ops_linux.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8812a/usb/usb_ops_linux.c 2022-01-28 22:59:35.616654360 +0200 @@ -0,0 +1,244 @@ +/****************************************************************************** + * @@ -341558,9 +341060,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8812a/usb/usb_ops_linux.c linu + RTW_INFO("CHIP TYPE: RTL8811AU or RTL8821U\n"); + } +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/hal8814a_fw.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8814a/hal8814a_fw.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/hal8814a_fw.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8814a/hal8814a_fw.c 2021-03-07 18:16:17.082957376 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8814a/hal8814a_fw.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8814a/hal8814a_fw.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8814a/hal8814a_fw.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8814a/hal8814a_fw.c 2022-01-28 22:59:35.617654407 +0200 @@ -0,0 +1,7741 @@ +/****************************************************************************** +* @@ -349303,9 +348805,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/hal8814a_fw.c linux-5.11 + +#endif // end of HWIMG_SUPPORT + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/Hal8814PwrSeq.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8814a/Hal8814PwrSeq.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/Hal8814PwrSeq.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8814a/Hal8814PwrSeq.c 2021-03-07 18:16:17.081957329 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8814a/Hal8814PwrSeq.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8814a/Hal8814PwrSeq.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8814a/Hal8814PwrSeq.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8814a/Hal8814PwrSeq.c 2022-01-28 22:59:35.616654360 +0200 @@ -0,0 +1,98 @@ +/****************************************************************************** + * @@ -349405,9 +348907,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/Hal8814PwrSeq.c linux-5. + RTL8814A_TRANS_END +}; + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/rtl8814a_cmd.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8814a/rtl8814a_cmd.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/rtl8814a_cmd.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8814a/rtl8814a_cmd.c 2021-03-07 18:16:17.082957376 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8814a/rtl8814a_cmd.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8814a/rtl8814a_cmd.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8814a/rtl8814a_cmd.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8814a/rtl8814a_cmd.c 2022-01-28 22:59:35.617654407 +0200 @@ -0,0 +1,1515 @@ +/****************************************************************************** + * @@ -350924,9 +350426,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/rtl8814a_cmd.c linux-5.1 + +#endif // CONFIG_BT_COEXIST + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/rtl8814a_dm.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8814a/rtl8814a_dm.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/rtl8814a_dm.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8814a/rtl8814a_dm.c 2021-03-07 18:16:17.082957376 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8814a/rtl8814a_dm.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8814a/rtl8814a_dm.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8814a/rtl8814a_dm.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8814a/rtl8814a_dm.c 2022-01-28 22:59:35.617654407 +0200 @@ -0,0 +1,407 @@ +/****************************************************************************** + * @@ -351335,9 +350837,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/rtl8814a_dm.c linux-5.11 +} +#endif //CONFIG_ANTENNA_DIVERSITY + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/rtl8814a_hal_init.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8814a/rtl8814a_hal_init.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/rtl8814a_hal_init.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8814a/rtl8814a_hal_init.c 2021-03-07 18:16:17.083957423 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8814a/rtl8814a_hal_init.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8814a/rtl8814a_hal_init.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8814a/rtl8814a_hal_init.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8814a/rtl8814a_hal_init.c 2022-12-18 17:40:24.574937030 +0200 @@ -0,0 +1,6769 @@ +/****************************************************************************** + * @@ -351389,7 +350891,7 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/rtl8814a_hal_init.c linu + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + PEFUSE_HAL pEfuseHal = &(pHalData->EfuseHal); + pu2Byte ptr; -+ ++ + #define INIT_EFUSE(var,value) ptr = (pu2Byte)&var; *ptr = value + + RTW_INFO("====> %s \n", __func__); @@ -356174,7 +355676,7 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/rtl8814a_hal_init.c linu + rtw_write8(Adapter,REG_BCN_CTRL_1, 0x11);//disable atim wnd and disable beacon function + //rtw_write8(Adapter,REG_BCN_CTRL_1, 0x18); + } -+ else if((mode == _HW_STATE_ADHOC_) /*|| (mode == _HW_STATE_AP_)*/) ++ else if (mode == _HW_STATE_ADHOC_) /*|| (mode == _HW_STATE_AP_)*/ + { +#ifdef RTL8814AE_SW_BCN + /*Beacon is polled to TXBUF*/ @@ -356298,7 +355800,7 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/rtl8814a_hal_init.c linu + rtw_write8(Adapter,REG_BCN_CTRL, 0x19);//disable atim wnd + //rtw_write8(Adapter,REG_BCN_CTRL, 0x18); + } -+ else if((mode == _HW_STATE_ADHOC_) /*|| (mode == _HW_STATE_AP_)*/) ++ else if (mode == _HW_STATE_ADHOC_) /*|| (mode == _HW_STATE_AP_)*/ + { +#ifdef RTL8814AE_SW_BCN + rtw_write16(Adapter, REG_CR, rtw_read16(Adapter, REG_CR)|BIT(8)); @@ -358108,9 +357610,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/rtl8814a_hal_init.c linu +} + + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/rtl8814a_phycfg.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8814a/rtl8814a_phycfg.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/rtl8814a_phycfg.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8814a/rtl8814a_phycfg.c 2021-03-07 18:16:17.083957423 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8814a/rtl8814a_phycfg.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8814a/rtl8814a_phycfg.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8814a/rtl8814a_phycfg.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8814a/rtl8814a_phycfg.c 2022-01-28 22:59:35.618654454 +0200 @@ -0,0 +1,3027 @@ +/****************************************************************************** + * @@ -361139,9 +360641,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/rtl8814a_phycfg.c linux- + //RTW_INFO("<==%s()\n",__FUNCTION__); +} + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/rtl8814a_rf6052.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8814a/rtl8814a_rf6052.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/rtl8814a_rf6052.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8814a/rtl8814a_rf6052.c 2021-03-07 18:16:17.083957423 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8814a/rtl8814a_rf6052.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8814a/rtl8814a_rf6052.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8814a/rtl8814a_rf6052.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8814a/rtl8814a_rf6052.c 2022-01-28 22:59:35.618654454 +0200 @@ -0,0 +1,210 @@ +/****************************************************************************** + * @@ -361353,9 +360855,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/rtl8814a_rf6052.c linux- + +/* End of HalRf6052.c */ + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/rtl8814a_rxdesc.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8814a/rtl8814a_rxdesc.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/rtl8814a_rxdesc.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8814a/rtl8814a_rxdesc.c 2021-03-07 18:16:17.083957423 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8814a/rtl8814a_rxdesc.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8814a/rtl8814a_rxdesc.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8814a/rtl8814a_rxdesc.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8814a/rtl8814a_rxdesc.c 2022-01-28 22:59:35.618654454 +0200 @@ -0,0 +1,68 @@ +/****************************************************************************** + * @@ -361425,9 +360927,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/rtl8814a_rxdesc.c linux- + +} + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/rtl8814a_sreset.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8814a/rtl8814a_sreset.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/rtl8814a_sreset.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8814a/rtl8814a_sreset.c 2021-03-07 18:16:17.083957423 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8814a/rtl8814a_sreset.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8814a/rtl8814a_sreset.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8814a/rtl8814a_sreset.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8814a/rtl8814a_sreset.c 2022-01-28 22:59:35.618654454 +0200 @@ -0,0 +1,114 @@ +/****************************************************************************** + * @@ -361543,9 +361045,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/rtl8814a_sreset.c linux- +} +#endif + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/rtl8814a_xmit.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8814a/rtl8814a_xmit.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/rtl8814a_xmit.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8814a/rtl8814a_xmit.c 2021-03-07 18:16:17.083957423 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8814a/rtl8814a_xmit.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8814a/rtl8814a_xmit.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8814a/rtl8814a_xmit.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8814a/rtl8814a_xmit.c 2022-01-28 22:59:35.618654454 +0200 @@ -0,0 +1,515 @@ +/****************************************************************************** + * @@ -362062,9 +361564,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/rtl8814a_xmit.c linux-5. +} + + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/usb/rtl8814au_led.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8814a/usb/rtl8814au_led.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/usb/rtl8814au_led.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8814a/usb/rtl8814au_led.c 2021-03-07 18:16:17.083957423 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8814a/usb/rtl8814au_led.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8814a/usb/rtl8814au_led.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8814a/usb/rtl8814au_led.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8814a/usb/rtl8814au_led.c 2022-01-28 22:59:35.618654454 +0200 @@ -0,0 +1,147 @@ +/****************************************************************************** + * @@ -362213,9 +361715,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/usb/rtl8814au_led.c linu + DeInitLed( &(ledpriv->SwLed2) ); +} +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/usb/rtl8814au_recv.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8814a/usb/rtl8814au_recv.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/usb/rtl8814au_recv.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8814a/usb/rtl8814au_recv.c 2021-03-07 18:16:17.083957423 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8814a/usb/rtl8814au_recv.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8814a/usb/rtl8814au_recv.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8814a/usb/rtl8814au_recv.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8814a/usb/rtl8814au_recv.c 2022-01-28 22:59:35.618654454 +0200 @@ -0,0 +1,34 @@ +/****************************************************************************** + * @@ -362251,9 +361753,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/usb/rtl8814au_recv.c lin + usb_free_recv_priv(padapter, INTERRUPT_MSG_FORMAT_LEN); +} + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/usb/rtl8814au_xmit.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8814a/usb/rtl8814au_xmit.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/usb/rtl8814au_xmit.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8814a/usb/rtl8814au_xmit.c 2021-03-07 18:16:17.083957423 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8814a/usb/rtl8814au_xmit.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8814a/usb/rtl8814au_xmit.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8814a/usb/rtl8814au_xmit.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8814a/usb/rtl8814au_xmit.c 2022-01-28 22:59:35.619654502 +0200 @@ -0,0 +1,1129 @@ +/****************************************************************************** + * @@ -363384,9 +362886,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/usb/rtl8814au_xmit.c lin +} +#endif + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/usb/usb_halinit.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8814a/usb/usb_halinit.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/usb/usb_halinit.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8814a/usb/usb_halinit.c 2021-03-07 18:16:17.083957423 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8814a/usb/usb_halinit.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8814a/usb/usb_halinit.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8814a/usb/usb_halinit.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8814a/usb/usb_halinit.c 2023-05-26 22:35:36.544136899 +0300 @@ -0,0 +1,2416 @@ +/****************************************************************************** + * @@ -364975,9 +364477,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/usb/usb_halinit.c linux- + // Reset USB mode switch setting + rtw_write8(Adapter, REG_SDIO_CTRL_8814A, 0x0); + rtw_write8(Adapter, REG_ACLK_MON, 0x0); -+ ++ + //RT_TRACE(COMP_INIT, DBG_TRACE, ("InitializeAdapter8188EUsb() <====\n")); -+ ++ +HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_IQK); + // 2010/08/26 MH Merge from 8192CE. + if(pwrctrlpriv->rf_pwrstate == rf_on) @@ -365438,19 +364940,19 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/usb/usb_halinit.c linux- + hal_ReadTxPowerInfo8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); + hal_ReadBoardType8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); + hal_Read_TRX_antenna_8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); -+ ++ + // + // Read Bluetooth co-exist and initialize + // + hal_EfuseParseBTCoexistInfo8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); -+ ++ + hal_ReadChannelPlan8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); + hal_EfuseParseXtal_8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); + hal_ReadThermalMeter_8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); + hal_ReadRemoteWakeup_8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); + hal_ReadAntennaDiversity8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); + hal_ReadRFEType_8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); -+ ++ + ReadLEDSetting_8814AU(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); + + hal_ReadUsbModeSwitch_8814AU(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); @@ -365464,7 +364966,7 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/usb/usb_halinit.c linux- +static void hal_ReadPROMContent_8814A( + IN PADAPTER Adapter + ) -+{ ++{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); + u8 eeValue; + @@ -365487,7 +364989,7 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/usb/usb_halinit.c linux- + ) +{ + Hal_InitEfuseVars_8814A(Adapter); -+ ++ + /* Read all content in Efuse/EEPROM. */ + hal_ReadPROMContent_8814A(Adapter); + @@ -365508,17 +365010,17 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/usb/usb_halinit.c linux- + himr = &(pHalData->IntrMask[0]); + else + himr = &(pHalData->IntrMask[1]); -+ ++ + if (AddMSR) + *himr |= AddMSR; + + if (RemoveMSR) + *himr &= (~RemoveMSR); + -+ if(bHIMR0) ++ if(bHIMR0) + rtw_write32(padapter, REG_HIMR0_8814A, *himr); + else -+ rtw_write32(padapter, REG_HIMR1_8814A, *himr); ++ rtw_write32(padapter, REG_HIMR1_8814A, *himr); + +} + @@ -365613,7 +365115,7 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/usb/usb_halinit.c linux- + +void GetHwReg8814AU(PADAPTER Adapter, u8 variable, u8* val) +{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + switch(variable) + { @@ -365730,7 +365232,7 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/usb/usb_halinit.c linux- +} + +static u8 rtl8814au_ps_func(PADAPTER Adapter,HAL_INTF_PS_FUNC efunc_id, u8 *val) -+{ ++{ + u8 bResult = _TRUE; + switch(efunc_id){ + @@ -365755,7 +365257,7 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/usb/usb_halinit.c linux- + + pHalFunc->hal_power_on = _InitPowerOn_8814AU; + pHalFunc->hal_power_off = hal_carddisable_8814; -+ ++ + pHalFunc->hal_init = &rtl8814au_hal_init; + pHalFunc->hal_deinit = &rtl8814au_hal_deinit; + @@ -365774,11 +365276,11 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/usb/usb_halinit.c linux- +// pHalFunc->InitSwLeds = NULL; +// pHalFunc->DeInitSwLeds = NULL; +#endif//CONFIG_RTW_LED -+ ++ + pHalFunc->init_default_value = &rtl8814au_init_default_value; + pHalFunc->intf_chip_configure = &rtl8814au_interface_configure; + pHalFunc->read_adapter_info = &ReadAdapterInfo8814AU; -+ ++ + pHalFunc->set_hw_reg_handler = &SetHwReg8814AU; + pHalFunc->GetHwRegHandler = &GetHwReg8814AU; + pHalFunc->get_hal_def_var_handler = &GetHalDefVar8814AUsb; @@ -365804,9 +365306,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/usb/usb_halinit.c linux- + +} + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/usb/usb_ops_linux.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8814a/usb/usb_ops_linux.c ---- linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/usb/usb_ops_linux.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/hal/rtl8814a/usb/usb_ops_linux.c 2021-03-07 18:16:17.083957423 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8814a/usb/usb_ops_linux.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8814a/usb/usb_ops_linux.c +--- linux-6.3.4/drivers/staging/rtl8812au/hal/rtl8814a/usb/usb_ops_linux.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/hal/rtl8814a/usb/usb_ops_linux.c 2022-01-28 22:59:35.619654502 +0200 @@ -0,0 +1,312 @@ +/****************************************************************************** + * @@ -366120,9 +365622,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/hal/rtl8814a/usb/usb_ops_linux.c linu + pdvobj->HardwareType = HARDWARE_TYPE_RTL8814AU; + RTW_INFO("CHIP TYPE: RTL8814\n"); +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/basic_types.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/basic_types.h ---- linux-5.11.4/3rdparty/rtl8812au/include/basic_types.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/basic_types.h 2021-03-07 18:16:17.084957471 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/basic_types.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/basic_types.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/basic_types.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/basic_types.h 2022-01-28 22:59:35.619654502 +0200 @@ -0,0 +1,379 @@ +/****************************************************************************** + * @@ -366503,9 +366005,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/basic_types.h linux-5.11.4-rt +#define TEST_FLAGS(__Flag, __testFlags) (((__Flag) & (__testFlags)) == (__testFlags)) + +#endif /* __BASIC_TYPES_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/byteorder/big_endian.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/byteorder/big_endian.h ---- linux-5.11.4/3rdparty/rtl8812au/include/byteorder/big_endian.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/byteorder/big_endian.h 2021-03-07 18:16:17.084957471 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/byteorder/big_endian.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/byteorder/big_endian.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/byteorder/big_endian.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/byteorder/big_endian.h 2022-01-28 22:59:35.619654502 +0200 @@ -0,0 +1,82 @@ +/****************************************************************************** + * @@ -366589,10 +366091,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/byteorder/big_endian.h linux- +#include + +#endif /* _LINUX_BYTEORDER_BIG_ENDIAN_H */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/byteorder/generic.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/byteorder/generic.h ---- linux-5.11.4/3rdparty/rtl8812au/include/byteorder/generic.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/byteorder/generic.h 2021-03-07 18:16:17.084957471 +0200 -@@ -0,0 +1,207 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/byteorder/generic.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/byteorder/generic.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/byteorder/generic.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/byteorder/generic.h 2023-05-26 22:35:36.544136899 +0300 +@@ -0,0 +1,195 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. @@ -366688,7 +366190,7 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/byteorder/generic.h linux-5.1 + */ + + -+#if defined(PLATFORM_LINUX) || defined(PLATFORM_WINDOWS) || defined(PLATFORM_MPIXEL) || defined(PLATFORM_FREEBSD) ++#if defined(PLATFORM_LINUX) || defined(PLATFORM_MPIXEL) || defined(PLATFORM_FREEBSD) + /* + * inside the kernel, we can use nicknames; + * outside of it, we must avoid POSIX namespace pollution... @@ -366787,22 +366289,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/byteorder/generic.h linux-5.1 + #define ntohs(x) ___ntohs(x) + +#endif /* OPTIMIZE */ -+ -+ -+#if defined(PLATFORM_WINDOWS) -+ -+ #define htonl(x) __cpu_to_be32(x) -+ #define ntohl(x) __be32_to_cpu(x) -+ #define htons(x) __cpu_to_be16(x) -+ #define ntohs(x) __be16_to_cpu(x) -+ -+ -+#endif -+ +#endif /* _LINUX_BYTEORDER_GENERIC_H */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/byteorder/little_endian.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/byteorder/little_endian.h ---- linux-5.11.4/3rdparty/rtl8812au/include/byteorder/little_endian.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/byteorder/little_endian.h 2021-03-07 18:16:17.084957471 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/byteorder/little_endian.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/byteorder/little_endian.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/byteorder/little_endian.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/byteorder/little_endian.h 2022-01-28 22:59:35.619654502 +0200 @@ -0,0 +1,84 @@ +/****************************************************************************** + * @@ -366888,9 +366378,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/byteorder/little_endian.h lin +#include + +#endif /* _LINUX_BYTEORDER_LITTLE_ENDIAN_H */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/byteorder/swabb.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/byteorder/swabb.h ---- linux-5.11.4/3rdparty/rtl8812au/include/byteorder/swabb.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/byteorder/swabb.h 2021-03-07 18:16:17.084957471 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/byteorder/swabb.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/byteorder/swabb.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/byteorder/swabb.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/byteorder/swabb.h 2022-01-28 22:59:35.620654549 +0200 @@ -0,0 +1,151 @@ +/****************************************************************************** + * @@ -367043,9 +366533,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/byteorder/swabb.h linux-5.11. +#endif + +#endif /* _LINUX_BYTEORDER_SWABB_H */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/byteorder/swab.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/byteorder/swab.h ---- linux-5.11.4/3rdparty/rtl8812au/include/byteorder/swab.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/byteorder/swab.h 2021-03-07 18:16:17.084957471 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/byteorder/swab.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/byteorder/swab.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/byteorder/swab.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/byteorder/swab.h 2023-05-26 22:35:36.544136899 +0300 @@ -0,0 +1,136 @@ +/****************************************************************************** + * @@ -367170,7 +366660,7 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/byteorder/swab.h linux-5.11.4 + return __arch__swab32(x); +} + -+#if defined(PLATFORM_LINUX) || defined(PLATFORM_WINDOWS) ++#if defined(PLATFORM_LINUX) + #define swab16 __swab16 + #define swab32 __swab32 + #define swab64 __swab64 @@ -367183,9 +366673,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/byteorder/swab.h linux-5.11.4 +#endif + +#endif /* _LINUX_BYTEORDER_SWAB_H */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/circ_buf.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/circ_buf.h ---- linux-5.11.4/3rdparty/rtl8812au/include/circ_buf.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/circ_buf.h 2021-03-07 18:16:17.084957471 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/circ_buf.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/circ_buf.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/circ_buf.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/circ_buf.h 2022-01-28 22:59:35.620654549 +0200 @@ -0,0 +1,23 @@ +/****************************************************************************** + * @@ -367210,9 +366700,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/circ_buf.h linux-5.11.4-rtl88 + +#endif //_CIRC_BUF_H_ + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/cmd_osdep.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/cmd_osdep.h ---- linux-5.11.4/3rdparty/rtl8812au/include/cmd_osdep.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/cmd_osdep.h 2021-03-07 18:16:17.084957471 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/cmd_osdep.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/cmd_osdep.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/cmd_osdep.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/cmd_osdep.h 2022-01-28 22:59:35.620654549 +0200 @@ -0,0 +1,26 @@ +/****************************************************************************** + * @@ -367240,9 +366730,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/cmd_osdep.h linux-5.11.4-rtl8 +extern struct cmd_obj *_rtw_dequeue_cmd(_queue *queue); + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/cmn_info/rtw_sta_info.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/cmn_info/rtw_sta_info.h ---- linux-5.11.4/3rdparty/rtl8812au/include/cmn_info/rtw_sta_info.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/cmn_info/rtw_sta_info.h 2021-03-07 18:16:17.084957471 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/cmn_info/rtw_sta_info.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/cmn_info/rtw_sta_info.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/cmn_info/rtw_sta_info.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/cmn_info/rtw_sta_info.h 2022-01-28 22:59:35.620654549 +0200 @@ -0,0 +1,257 @@ +/****************************************************************************** + * @@ -367501,10 +366991,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/cmn_info/rtw_sta_info.h linux +/*--------------------Function declaration-----------------------------*/ + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/custom_gpio.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/custom_gpio.h ---- linux-5.11.4/3rdparty/rtl8812au/include/custom_gpio.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/custom_gpio.h 2021-03-07 18:16:17.084957471 +0200 -@@ -0,0 +1,46 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/custom_gpio.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/custom_gpio.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/custom_gpio.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/custom_gpio.h 2023-05-26 22:35:36.544136899 +0300 +@@ -0,0 +1,39 @@ +/****************************************************************************** + * + * Copyright(c) 2016 - 2017 Realtek Corporation. @@ -367525,13 +367015,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/custom_gpio.h linux-5.11.4-rt +#include +#include + -+#ifdef PLATFORM_OS_XP -+ #include -+#endif -+ -+#ifdef PLATFORM_OS_CE -+ #include -+#endif + +#ifdef PLATFORM_LINUX + #include @@ -367551,9 +367034,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/custom_gpio.h linux-5.11.4-rt +extern void rtw_wifi_gpio_wlan_ctrl(int onoff); + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/drv_conf.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/drv_conf.h ---- linux-5.11.4/3rdparty/rtl8812au/include/drv_conf.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/drv_conf.h 2021-03-07 18:16:17.084957471 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/drv_conf.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/drv_conf.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/drv_conf.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/drv_conf.h 2022-01-28 22:59:35.620654549 +0200 @@ -0,0 +1,510 @@ +/****************************************************************************** + * @@ -368065,9 +367548,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/drv_conf.h linux-5.11.4-rtl88 +#endif + +#endif /* __DRV_CONF_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/drv_types_ce.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/drv_types_ce.h ---- linux-5.11.4/3rdparty/rtl8812au/include/drv_types_ce.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/drv_types_ce.h 2021-03-07 18:16:17.085957519 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/drv_types_ce.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/drv_types_ce.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/drv_types_ce.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/drv_types_ce.h 2022-01-28 22:59:35.620654549 +0200 @@ -0,0 +1,86 @@ +/****************************************************************************** + * @@ -368155,9 +367638,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/drv_types_ce.h linux-5.11.4-r + + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/drv_types_gspi.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/drv_types_gspi.h ---- linux-5.11.4/3rdparty/rtl8812au/include/drv_types_gspi.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/drv_types_gspi.h 2021-03-07 18:16:17.085957519 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/drv_types_gspi.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/drv_types_gspi.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/drv_types_gspi.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/drv_types_gspi.h 2022-01-28 22:59:35.620654549 +0200 @@ -0,0 +1,49 @@ +/****************************************************************************** + * @@ -368208,10 +367691,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/drv_types_gspi.h linux-5.11.4 +} GSPI_DATA, *PGSPI_DATA; + +#endif /* #ifndef __DRV_TYPES_GSPI_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/drv_types.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/drv_types.h ---- linux-5.11.4/3rdparty/rtl8812au/include/drv_types.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/drv_types.h 2021-03-07 18:16:17.085957519 +0200 -@@ -0,0 +1,1834 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/drv_types.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/drv_types.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/drv_types.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/drv_types.h 2023-05-26 22:35:36.544136899 +0300 +@@ -0,0 +1,1797 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. @@ -368306,7 +367789,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/drv_types.h linux-5.11.4-rtl8 +#include +#include +#include -+#include +#include +#include +#include @@ -369380,31 +368862,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/drv_types.h linux-5.11.4-rtl8 + u8 *usb_vendor_req_buf; +#endif + -+#ifdef PLATFORM_WINDOWS -+ /* related device objects */ -+ PDEVICE_OBJECT pphysdevobj;/* pPhysDevObj; */ -+ PDEVICE_OBJECT pfuncdevobj;/* pFuncDevObj; */ -+ PDEVICE_OBJECT pnextdevobj;/* pNextDevObj; */ -+ -+ u8 nextdevstacksz;/* unsigned char NextDeviceStackSize; */ /* = (CHAR)CEdevice->pUsbDevObj->StackSize + 1; */ -+ -+ /* urb for control diescriptor request */ -+ -+#ifdef PLATFORM_OS_XP -+ struct _URB_CONTROL_DESCRIPTOR_REQUEST descriptor_urb; -+ PUSB_CONFIGURATION_DESCRIPTOR pconfig_descriptor;/* UsbConfigurationDescriptor; */ -+#endif -+ -+#ifdef PLATFORM_OS_CE -+ WCHAR active_path[MAX_ACTIVE_REG_PATH]; /* adapter regpath */ -+ USB_EXTENSION usb_extension; -+ -+ _nic_hdl pipehdls_r8192c[0x10]; -+#endif -+ -+ u32 config_descriptor_len;/* ULONG UsbConfigurationDescriptorLength; */ -+#endif/* PLATFORM_WINDOWS */ -+ +#ifdef PLATFORM_LINUX + struct usb_interface *pusbintf; + struct usb_device *pusbdev; @@ -369745,17 +369202,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/drv_types.h linux-5.11.4-rtl8 + void (*intf_start)(_adapter *adapter); + void (*intf_stop)(_adapter *adapter); + -+#ifdef PLATFORM_WINDOWS -+ _nic_hdl hndis_adapter;/* hNdisAdapter(NDISMiniportAdapterHandle); */ -+ _nic_hdl hndis_config;/* hNdisConfiguration; */ -+ NDIS_STRING fw_img; -+ -+ u32 NdisPacketFilter; -+ u8 MCList[MAX_MCAST_LIST_NUM][6]; -+ u32 MCAddrCount; -+#endif /* end of PLATFORM_WINDOWS */ -+ -+ +#ifdef PLATFORM_LINUX + _nic_hdl pnetdev; + char old_ifname[IFNAMSIZ]; @@ -370046,10 +369492,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/drv_types.h linux-5.11.4-rtl8 +#endif + +#endif /* __DRV_TYPES_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/drv_types_linux.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/drv_types_linux.h ---- linux-5.11.4/3rdparty/rtl8812au/include/drv_types_linux.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/drv_types_linux.h 2021-03-07 18:16:17.085957519 +0200 -@@ -0,0 +1,19 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/drv_types_linux.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/drv_types_linux.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/drv_types_linux.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/drv_types_linux.h 2022-12-18 17:40:24.574937030 +0200 +@@ -0,0 +1,22 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. @@ -370067,11 +369513,14 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/drv_types_linux.h linux-5.11. +#ifndef __DRV_TYPES_LINUX_H__ +#define __DRV_TYPES_LINUX_H__ + ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 15, 0)) ++#define dev_addr_set(netdev, ethdata) _rtw_memcpy(netdev->dev_addr, ethdata, ETH_ALEN) ++#endif + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/drv_types_pci.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/drv_types_pci.h ---- linux-5.11.4/3rdparty/rtl8812au/include/drv_types_pci.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/drv_types_pci.h 2021-03-07 18:16:17.085957519 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/drv_types_pci.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/drv_types_pci.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/drv_types_pci.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/drv_types_pci.h 2022-01-28 22:59:35.620654549 +0200 @@ -0,0 +1,266 @@ +/****************************************************************************** + * @@ -370339,10 +369788,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/drv_types_pci.h linux-5.11.4- + + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/drv_types_sdio.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/drv_types_sdio.h ---- linux-5.11.4/3rdparty/rtl8812au/include/drv_types_sdio.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/drv_types_sdio.h 2021-03-07 18:16:17.085957519 +0200 -@@ -0,0 +1,90 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/drv_types_sdio.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/drv_types_sdio.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/drv_types_sdio.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/drv_types_sdio.h 2023-05-26 22:35:36.544136899 +0300 +@@ -0,0 +1,64 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. @@ -370373,15 +369822,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/drv_types_sdio.h linux-5.11.4 + #endif /* CONFIG_PLATFORM_SPRD */ +#endif + -+#ifdef PLATFORM_OS_XP -+ #include -+ #include -+#endif -+ -+#ifdef PLATFORM_OS_CE -+ #include -+#endif -+ +#define RTW_SDIO_CLK_33M 33000000 +#define RTW_SDIO_CLK_40M 40000000 +#define RTW_SDIO_CLK_80M 80000000 @@ -370401,23 +369841,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/drv_types_sdio.h linux-5.11.4 + unsigned int timing; + u8 sd3_bus_mode; +#endif -+ -+#ifdef PLATFORM_OS_XP -+ PDEVICE_OBJECT pphysdevobj; -+ PDEVICE_OBJECT pfuncdevobj; -+ PDEVICE_OBJECT pnextdevobj; -+ SDBUS_INTERFACE_STANDARD sdbusinft; -+ u8 nextdevstacksz; -+#endif -+ -+#ifdef PLATFORM_OS_CE -+ SD_DEVICE_HANDLE hDevice; -+ SD_CARD_RCA sd_rca; -+ SD_CARD_INTERFACE card_intf; -+ BOOLEAN enableIsarWithStatus; -+ WCHAR active_path[MAX_ACTIVE_REG_PATH]; -+ SD_HOST_BLOCK_CAPABILITY sd_host_blk_cap; -+#endif +} SDIO_DATA, *PSDIO_DATA; + +#define dvobj_to_sdio_func(d) ((d)->intf_data.func) @@ -370433,9 +369856,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/drv_types_sdio.h linux-5.11.4 +#define RTW_SDIO_ADDR_F0_CHK(a) (a&RTW_SDIO_ADDR_F0_BIT ? 1 : 0) + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/drv_types_xp.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/drv_types_xp.h ---- linux-5.11.4/3rdparty/rtl8812au/include/drv_types_xp.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/drv_types_xp.h 2021-03-07 18:16:17.085957519 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/drv_types_xp.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/drv_types_xp.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/drv_types_xp.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/drv_types_xp.h 2022-01-28 22:59:35.620654549 +0200 @@ -0,0 +1,88 @@ +/****************************************************************************** + * @@ -370525,9 +369948,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/drv_types_xp.h linux-5.11.4-r + + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/ethernet.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/ethernet.h ---- linux-5.11.4/3rdparty/rtl8812au/include/ethernet.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/ethernet.h 2021-03-07 18:16:17.085957519 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/ethernet.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/ethernet.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/ethernet.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/ethernet.h 2022-01-28 22:59:35.620654549 +0200 @@ -0,0 +1,36 @@ +/****************************************************************************** + * @@ -370565,9 +369988,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/ethernet.h linux-5.11.4-rtl88 + + +#endif /* #ifndef __INC_ETHERNET_H */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/gspi_hal.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/gspi_hal.h ---- linux-5.11.4/3rdparty/rtl8812au/include/gspi_hal.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/gspi_hal.h 2021-03-07 18:16:17.085957519 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/gspi_hal.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/gspi_hal.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/gspi_hal.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/gspi_hal.h 2022-01-28 22:59:35.620654549 +0200 @@ -0,0 +1,30 @@ +/****************************************************************************** + * @@ -370599,9 +370022,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/gspi_hal.h linux-5.11.4-rtl88 +#endif + +#endif /* __GSPI_HAL_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/gspi_ops.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/gspi_ops.h ---- linux-5.11.4/3rdparty/rtl8812au/include/gspi_ops.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/gspi_ops.h 2021-03-07 18:16:17.085957519 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/gspi_ops.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/gspi_ops.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/gspi_ops.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/gspi_ops.h 2022-01-28 22:59:35.620654549 +0200 @@ -0,0 +1,180 @@ +/****************************************************************************** + * @@ -370783,9 +370206,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/gspi_ops.h linux-5.11.4-rtl88 +#endif /* CONFIG_WOWLAN */ + +#endif /* __GSPI_OPS_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/gspi_ops_linux.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/gspi_ops_linux.h ---- linux-5.11.4/3rdparty/rtl8812au/include/gspi_ops_linux.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/gspi_ops_linux.h 2021-03-07 18:16:17.085957519 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/gspi_ops_linux.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/gspi_ops_linux.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/gspi_ops_linux.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/gspi_ops_linux.h 2022-01-28 22:59:35.620654549 +0200 @@ -0,0 +1,18 @@ +/****************************************************************************** + * @@ -370805,10 +370228,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/gspi_ops_linux.h linux-5.11.4 +#define __SDIO_OPS_LINUX_H__ + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/gspi_osintf.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/gspi_osintf.h ---- linux-5.11.4/3rdparty/rtl8812au/include/gspi_osintf.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/gspi_osintf.h 2021-03-07 18:16:17.085957519 +0200 -@@ -0,0 +1,25 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/gspi_osintf.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/gspi_osintf.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/gspi_osintf.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/gspi_osintf.h 2023-05-26 22:35:36.544136899 +0300 +@@ -0,0 +1,18 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. @@ -370826,17 +370249,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/gspi_osintf.h linux-5.11.4-rt +#ifndef __SDIO_OSINTF_H__ +#define __SDIO_OSINTF_H__ + -+ -+#ifdef PLATFORM_OS_CE -+ extern NDIS_STATUS ce_sd_get_dev_hdl(PADAPTER padapter); -+ SD_API_STATUS ce_sd_int_callback(SD_DEVICE_HANDLE hDevice, PADAPTER padapter); -+ extern void sd_setup_irs(PADAPTER padapter); +#endif -+ -+#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/h2clbk.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/h2clbk.h ---- linux-5.11.4/3rdparty/rtl8812au/include/h2clbk.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/h2clbk.h 2021-03-07 18:16:17.085957519 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/h2clbk.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/h2clbk.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/h2clbk.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/h2clbk.h 2022-01-28 22:59:35.620654549 +0200 @@ -0,0 +1,26 @@ +/****************************************************************************** + * @@ -370864,9 +370280,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/h2clbk.h linux-5.11.4-rtl8812 +void _lbk_evt(IN PADAPTER Adapter); + +void h2c_event_callback(unsigned char *dev, unsigned char *pbuf); -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/Hal8812PhyCfg.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/Hal8812PhyCfg.h ---- linux-5.11.4/3rdparty/rtl8812au/include/Hal8812PhyCfg.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/Hal8812PhyCfg.h 2021-03-07 18:16:17.083957423 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/Hal8812PhyCfg.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/Hal8812PhyCfg.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/Hal8812PhyCfg.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/Hal8812PhyCfg.h 2022-01-28 22:59:35.619654502 +0200 @@ -0,0 +1,143 @@ +/****************************************************************************** + * @@ -371011,9 +370427,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/Hal8812PhyCfg.h linux-5.11.4- + +/*--------------------------Exported Function prototype---------------------*/ +#endif /* __INC_HAL8192CPHYCFG_H */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/Hal8812PhyReg.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/Hal8812PhyReg.h ---- linux-5.11.4/3rdparty/rtl8812au/include/Hal8812PhyReg.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/Hal8812PhyReg.h 2021-03-07 18:16:17.084957471 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/Hal8812PhyReg.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/Hal8812PhyReg.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/Hal8812PhyReg.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/Hal8812PhyReg.h 2022-01-28 22:59:35.619654502 +0200 @@ -0,0 +1,735 @@ +/****************************************************************************** + * @@ -371750,9 +371166,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/Hal8812PhyReg.h linux-5.11.4- + + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/Hal8812PwrSeq.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/Hal8812PwrSeq.h ---- linux-5.11.4/3rdparty/rtl8812au/include/Hal8812PwrSeq.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/Hal8812PwrSeq.h 2021-03-07 18:16:17.084957471 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/Hal8812PwrSeq.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/Hal8812PwrSeq.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/Hal8812PwrSeq.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/Hal8812PwrSeq.h 2022-01-28 22:59:35.619654502 +0200 @@ -0,0 +1,208 @@ +/****************************************************************************** + * @@ -371962,9 +371378,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/Hal8812PwrSeq.h linux-5.11.4- +extern WLAN_PWR_CFG rtl8812_leave_lps_flow[RTL8812_TRANS_LPS_TO_ACT_STEPS + RTL8812_TRANS_END_STEPS]; + +#endif /* __HAL8812PWRSEQ_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/Hal8814PhyCfg.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/Hal8814PhyCfg.h ---- linux-5.11.4/3rdparty/rtl8812au/include/Hal8814PhyCfg.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/Hal8814PhyCfg.h 2021-03-07 18:16:17.084957471 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/Hal8814PhyCfg.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/Hal8814PhyCfg.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/Hal8814PhyCfg.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/Hal8814PhyCfg.h 2022-01-28 22:59:35.619654502 +0200 @@ -0,0 +1,264 @@ +/****************************************************************************** + * @@ -372230,9 +371646,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/Hal8814PhyCfg.h linux-5.11.4- + +/*--------------------------Exported Function prototype---------------------*/ +#endif /* __INC_HAL8192CPHYCFG_H */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/Hal8814PhyReg.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/Hal8814PhyReg.h ---- linux-5.11.4/3rdparty/rtl8812au/include/Hal8814PhyReg.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/Hal8814PhyReg.h 2021-03-07 18:16:17.084957471 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/Hal8814PhyReg.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/Hal8814PhyReg.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/Hal8814PhyReg.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/Hal8814PhyReg.h 2022-01-28 22:59:35.619654502 +0200 @@ -0,0 +1,863 @@ +/****************************************************************************** + * @@ -373097,9 +372513,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/Hal8814PhyReg.h linux-5.11.4- + + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/Hal8814PwrSeq.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/Hal8814PwrSeq.h ---- linux-5.11.4/3rdparty/rtl8812au/include/Hal8814PwrSeq.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/Hal8814PwrSeq.h 2021-03-07 18:16:17.084957471 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/Hal8814PwrSeq.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/Hal8814PwrSeq.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/Hal8814PwrSeq.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/Hal8814PwrSeq.h 2022-01-28 22:59:35.619654502 +0200 @@ -0,0 +1,231 @@ +/****************************************************************************** + * @@ -373332,9 +372748,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/Hal8814PwrSeq.h linux-5.11.4- +extern WLAN_PWR_CFG rtl8814A_leave_lps_flow[RTL8814A_TRANS_LPS_TO_ACT_STEPS + RTL8814A_TRANS_END_STEPS]; + +#endif /* __HAL8814PWRSEQ_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/Hal8821APwrSeq.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/Hal8821APwrSeq.h ---- linux-5.11.4/3rdparty/rtl8812au/include/Hal8821APwrSeq.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/Hal8821APwrSeq.h 2021-03-07 18:16:17.084957471 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/Hal8821APwrSeq.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/Hal8821APwrSeq.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/Hal8821APwrSeq.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/Hal8821APwrSeq.h 2022-01-28 22:59:35.619654502 +0200 @@ -0,0 +1,200 @@ +/****************************************************************************** + * @@ -373536,9 +372952,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/Hal8821APwrSeq.h linux-5.11.4 + extern WLAN_PWR_CFG rtl8821A_leave_lps_flow[RTL8821A_TRANS_LPS_TO_ACT_STEPS + RTL8821A_TRANS_END_STEPS]; + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/hal_btcoex.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/hal_btcoex.h ---- linux-5.11.4/3rdparty/rtl8812au/include/hal_btcoex.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/hal_btcoex.h 2021-03-07 18:16:17.085957519 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/hal_btcoex.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/hal_btcoex.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/hal_btcoex.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/hal_btcoex.h 2022-01-28 22:59:35.620654549 +0200 @@ -0,0 +1,97 @@ +/****************************************************************************** + * @@ -373637,9 +373053,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/hal_btcoex.h linux-5.11.4-rtl +u8 hal_btcoex_get_rf4ce_link_state(void); +#endif +#endif /* !__HAL_BTCOEX_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/hal_btcoex_wifionly.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/hal_btcoex_wifionly.h ---- linux-5.11.4/3rdparty/rtl8812au/include/hal_btcoex_wifionly.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/hal_btcoex_wifionly.h 2021-03-07 18:16:17.085957519 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/hal_btcoex_wifionly.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/hal_btcoex_wifionly.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/hal_btcoex_wifionly.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/hal_btcoex_wifionly.h 2022-01-28 22:59:35.620654549 +0200 @@ -0,0 +1,81 @@ +/****************************************************************************** + * @@ -373722,9 +373138,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/hal_btcoex_wifionly.h linux-5 +#endif + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/hal_com.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/hal_com.h ---- linux-5.11.4/3rdparty/rtl8812au/include/hal_com.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/hal_com.h 2021-03-07 18:16:17.085957519 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/hal_com.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/hal_com.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/hal_com.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/hal_com.h 2022-01-28 22:59:35.621654597 +0200 @@ -0,0 +1,719 @@ +/****************************************************************************** + * @@ -374445,9 +373861,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/hal_com.h linux-5.11.4-rtl881 +#endif + +#endif /* __HAL_COMMON_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/hal_com_h2c.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/hal_com_h2c.h ---- linux-5.11.4/3rdparty/rtl8812au/include/hal_com_h2c.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/hal_com_h2c.h 2021-03-07 18:16:17.085957519 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/hal_com_h2c.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/hal_com_h2c.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/hal_com_h2c.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/hal_com_h2c.h 2022-01-28 22:59:35.621654597 +0200 @@ -0,0 +1,635 @@ +/****************************************************************************** + * @@ -375084,9 +374500,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/hal_com_h2c.h linux-5.11.4-rt +u8 rtw_hal_set_req_per_rpt_cmd(_adapter *adapter, u8 group_macid, + u8 rpt_type, u32 macid_bitmap); +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/hal_com_led.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/hal_com_led.h ---- linux-5.11.4/3rdparty/rtl8812au/include/hal_com_led.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/hal_com_led.h 2021-03-07 18:16:17.085957519 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/hal_com_led.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/hal_com_led.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/hal_com_led.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/hal_com_led.h 2022-01-28 22:59:35.621654597 +0200 @@ -0,0 +1,437 @@ +/****************************************************************************** + * @@ -375525,9 +374941,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/hal_com_led.h linux-5.11.4-rt + +#endif /*__HAL_COMMON_LED_H_*/ + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/hal_com_phycfg.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/hal_com_phycfg.h ---- linux-5.11.4/3rdparty/rtl8812au/include/hal_com_phycfg.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/hal_com_phycfg.h 2021-03-07 18:16:17.085957519 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/hal_com_phycfg.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/hal_com_phycfg.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/hal_com_phycfg.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/hal_com_phycfg.h 2022-01-28 22:59:35.621654597 +0200 @@ -0,0 +1,299 @@ +/****************************************************************************** + * @@ -375828,9 +375244,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/hal_com_phycfg.h linux-5.11.4 +#endif /* CONFIG_LOAD_PHY_PARA_FROM_FILE */ +u8 phy_check_under_survey_ch(_adapter *adapter); +#endif /* __HAL_COMMON_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/hal_com_reg.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/hal_com_reg.h ---- linux-5.11.4/3rdparty/rtl8812au/include/hal_com_reg.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/hal_com_reg.h 2021-03-07 18:16:17.086957566 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/hal_com_reg.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/hal_com_reg.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/hal_com_reg.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/hal_com_reg.h 2022-01-28 22:59:35.621654597 +0200 @@ -0,0 +1,1887 @@ +/****************************************************************************** + * @@ -377719,9 +377135,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/hal_com_reg.h linux-5.11.4-rt +#define HAL_8188E_HW_GPIO_WPS_BIT BIT(7) + +#endif /* __HAL_COMMON_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/hal_data.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/hal_data.h ---- linux-5.11.4/3rdparty/rtl8812au/include/hal_data.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/hal_data.h 2021-03-07 18:16:17.086957566 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/hal_data.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/hal_data.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/hal_data.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/hal_data.h 2022-01-28 22:59:35.621654597 +0200 @@ -0,0 +1,1105 @@ +/****************************************************************************** + * @@ -378828,9 +378244,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/hal_data.h linux-5.11.4-rtl88 +*/ + +#endif /* __HAL_DATA_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/hal_gspi.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/hal_gspi.h ---- linux-5.11.4/3rdparty/rtl8812au/include/hal_gspi.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/hal_gspi.h 2021-03-07 18:16:17.086957566 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/hal_gspi.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/hal_gspi.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/hal_gspi.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/hal_gspi.h 2022-01-28 22:59:35.621654597 +0200 @@ -0,0 +1,26 @@ +/****************************************************************************** + * @@ -378858,9 +378274,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/hal_gspi.h linux-5.11.4-rtl88 +u32 rtw_hal_get_gspi_tx_max_length(PADAPTER padapter, u8 queue_idx); + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/hal_ic_cfg.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/hal_ic_cfg.h ---- linux-5.11.4/3rdparty/rtl8812au/include/hal_ic_cfg.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/hal_ic_cfg.h 2021-03-07 18:16:17.086957566 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/hal_ic_cfg.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/hal_ic_cfg.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/hal_ic_cfg.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/hal_ic_cfg.h 2022-01-28 22:59:35.621654597 +0200 @@ -0,0 +1,313 @@ +/****************************************************************************** + * @@ -379175,9 +378591,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/hal_ic_cfg.h linux-5.11.4-rtl +#endif + +#endif /*__HAL_IC_CFG_H__*/ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/hal_intf.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/hal_intf.h ---- linux-5.11.4/3rdparty/rtl8812au/include/hal_intf.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/hal_intf.h 2021-03-07 18:16:17.086957566 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/hal_intf.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/hal_intf.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/hal_intf.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/hal_intf.h 2022-01-28 22:59:35.621654597 +0200 @@ -0,0 +1,849 @@ +/****************************************************************************** + * @@ -380028,9 +379444,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/hal_intf.h linux-5.11.4-rtl88 +#endif + +#endif /* __HAL_INTF_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/hal_pg.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/hal_pg.h ---- linux-5.11.4/3rdparty/rtl8812au/include/hal_pg.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/hal_pg.h 2021-03-07 18:16:17.086957566 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/hal_pg.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/hal_pg.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/hal_pg.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/hal_pg.h 2022-01-28 22:59:35.622654644 +0200 @@ -0,0 +1,880 @@ +/****************************************************************************** + * @@ -380912,9 +380328,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/hal_pg.h linux-5.11.4-rtl8812 + + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/hal_phy.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/hal_phy.h ---- linux-5.11.4/3rdparty/rtl8812au/include/hal_phy.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/hal_phy.h 2021-03-07 18:16:17.086957566 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/hal_phy.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/hal_phy.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/hal_phy.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/hal_phy.h 2022-01-28 22:59:35.622654644 +0200 @@ -0,0 +1,234 @@ +/****************************************************************************** + * @@ -381150,9 +380566,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/hal_phy.h linux-5.11.4-rtl881 + IN PADAPTER Adapter); +#endif /*#CONFIG_RF_SHADOW_RW*/ +#endif /* __HAL_COMMON_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/hal_phy_reg.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/hal_phy_reg.h ---- linux-5.11.4/3rdparty/rtl8812au/include/hal_phy_reg.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/hal_phy_reg.h 2021-03-07 18:16:17.086957566 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/hal_phy_reg.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/hal_phy_reg.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/hal_phy_reg.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/hal_phy_reg.h 2022-01-28 22:59:35.622654644 +0200 @@ -0,0 +1,25 @@ +/****************************************************************************** + * @@ -381179,9 +380595,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/hal_phy_reg.h linux-5.11.4-rt +/* #endif */ + +#endif /* __HAL_PHY_REG_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/HalPwrSeqCmd.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/HalPwrSeqCmd.h ---- linux-5.11.4/3rdparty/rtl8812au/include/HalPwrSeqCmd.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/HalPwrSeqCmd.h 2021-03-07 18:16:17.084957471 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/HalPwrSeqCmd.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/HalPwrSeqCmd.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/HalPwrSeqCmd.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/HalPwrSeqCmd.h 2022-01-28 22:59:35.619654502 +0200 @@ -0,0 +1,130 @@ +/****************************************************************************** + * @@ -381313,9 +380729,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/HalPwrSeqCmd.h linux-5.11.4-r + WLAN_PWR_CFG PwrCfgCmd[]); + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/hal_sdio.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/hal_sdio.h ---- linux-5.11.4/3rdparty/rtl8812au/include/hal_sdio.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/hal_sdio.h 2021-03-07 18:16:17.086957566 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/hal_sdio.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/hal_sdio.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/hal_sdio.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/hal_sdio.h 2022-01-28 22:59:35.622654644 +0200 @@ -0,0 +1,56 @@ +/****************************************************************************** + * @@ -381373,9 +380789,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/hal_sdio.h linux-5.11.4-rtl88 +u32 cmd53_4byte_alignment(struct intf_hdl *pintfhdl, u32 addr); + +#endif /* __HAL_SDIO_H_ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/HalVerDef.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/HalVerDef.h ---- linux-5.11.4/3rdparty/rtl8812au/include/HalVerDef.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/HalVerDef.h 2021-03-07 18:16:17.084957471 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/HalVerDef.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/HalVerDef.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/HalVerDef.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/HalVerDef.h 2022-01-28 22:59:35.619654502 +0200 @@ -0,0 +1,201 @@ +/****************************************************************************** + * @@ -381578,10 +380994,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/HalVerDef.h linux-5.11.4-rtl8 +#define IS_VENDOR_8814A_MP_CHIP(_Adapter) ((IS_8814A_SERIES(GET_HAL_DATA(_Adapter)->version_id)) ? ((IS_NORMAL_CHIP(GET_HAL_DATA(_Adapter)->version_id)) ? TRUE : FALSE) : FALSE) + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/ieee80211_ext.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/ieee80211_ext.h ---- linux-5.11.4/3rdparty/rtl8812au/include/ieee80211_ext.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/ieee80211_ext.h 2021-03-07 18:16:17.087957613 +0200 -@@ -0,0 +1,471 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/ieee80211_ext.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/ieee80211_ext.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/ieee80211_ext.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/ieee80211_ext.h 2023-05-26 22:35:36.544136899 +0300 +@@ -0,0 +1,309 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. @@ -381684,27 +381100,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/ieee80211_ext.h linux-5.11.4- + +#endif + -+#ifdef PLATFORM_WINDOWS -+ -+#pragma pack(1) -+ -+struct wpa_ie_hdr { -+ u8 elem_id; -+ u8 len; -+ u8 oui[4]; /* 24-bit OUI followed by 8-bit OUI type */ -+ u8 version[2]; /* little endian */ -+}; -+ -+struct rsn_ie_hdr { -+ u8 elem_id; /* WLAN_EID_RSN */ -+ u8 len; -+ u8 version[2]; /* little endian */ -+}; -+ -+#pragma pack() -+ -+#endif -+ +#define WPA_PUT_LE16(a, val) \ + do { \ + (a)[1] = ((u16) (val)) >> 8; \ @@ -381909,154 +381304,13 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/ieee80211_ext.h linux-5.11.4- + +#endif + -+ -+#ifdef PLATFORM_WINDOWS -+ -+#pragma pack(1) -+ -+struct ieee80211_mgmt { -+ u16 frame_control; -+ u16 duration; -+ u8 da[6]; -+ u8 sa[6]; -+ u8 bssid[6]; -+ u16 seq_ctrl; -+ union { -+ struct { -+ u16 auth_alg; -+ u16 auth_transaction; -+ u16 status_code; -+ /* possibly followed by Challenge text */ -+ u8 variable[0]; -+ } auth; -+ struct { -+ u16 reason_code; -+ } deauth; -+ struct { -+ u16 capab_info; -+ u16 listen_interval; -+ /* followed by SSID and Supported rates */ -+ u8 variable[0]; -+ } assoc_req; -+ struct { -+ u16 capab_info; -+ u16 status_code; -+ u16 aid; -+ /* followed by Supported rates */ -+ u8 variable[0]; -+ } assoc_resp, reassoc_resp; -+ struct { -+ u16 capab_info; -+ u16 listen_interval; -+ u8 current_ap[6]; -+ /* followed by SSID and Supported rates */ -+ u8 variable[0]; -+ } reassoc_req; -+ struct { -+ u16 reason_code; -+ } disassoc; -+#if 0 -+ struct { -+ __le64 timestamp; -+ u16 beacon_int; -+ u16 capab_info; -+ /* followed by some of SSID, Supported rates, -+ * FH Params, DS Params, CF Params, IBSS Params, TIM */ -+ u8 variable[0]; -+ } beacon; -+ struct { -+ /* only variable items: SSID, Supported rates */ -+ u8 variable[0]; -+ } probe_req; -+ -+ struct { -+ __le64 timestamp; -+ u16 beacon_int; -+ u16 capab_info; -+ /* followed by some of SSID, Supported rates, -+ * FH Params, DS Params, CF Params, IBSS Params */ -+ u8 variable[0]; -+ } probe_resp; -+#endif -+ struct { -+ u8 category; -+ union { -+ struct { -+ u8 action_code; -+ u8 dialog_token; -+ u8 status_code; -+ u8 variable[0]; -+ } wme_action; -+ #if 0 -+ struct{ -+ u8 action_code; -+ u8 element_id; -+ u8 length; -+ struct ieee80211_channel_sw_ie sw_elem; -+ } chan_switch; -+ struct{ -+ u8 action_code; -+ u8 dialog_token; -+ u8 element_id; -+ u8 length; -+ struct ieee80211_msrment_ie msr_elem; -+ } measurement; -+ #endif -+ struct { -+ u8 action_code; -+ u8 dialog_token; -+ u16 capab; -+ u16 timeout; -+ u16 start_seq_num; -+ } addba_req; -+ struct { -+ u8 action_code; -+ u8 dialog_token; -+ u16 status; -+ u16 capab; -+ u16 timeout; -+ } addba_resp; -+ struct { -+ u8 action_code; -+ u16 params; -+ u16 reason_code; -+ } delba; -+ struct { -+ u8 action_code; -+ /* capab_info for open and confirm, -+ * reason for close -+ */ -+ u16 aux; -+ /* Followed in plink_confirm by status -+ * code, AID and supported rates, -+ * and directly by supported rates in -+ * plink_open and plink_close -+ */ -+ u8 variable[0]; -+ } plink_action; -+ struct { -+ u8 action_code; -+ u8 variable[0]; -+ } mesh_action; -+ } u; -+ } action; -+ } u; -+} ; -+ -+#pragma pack() -+ -+#endif -+ +/* mgmt header + 1 byte category code */ +#define IEEE80211_MIN_ACTION_SIZE FIELD_OFFSET(struct ieee80211_mgmt, u.action.u) -+ -+ -+ +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/ieee80211.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/ieee80211.h ---- linux-5.11.4/3rdparty/rtl8812au/include/ieee80211.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/ieee80211.h 2021-03-07 18:16:17.087957613 +0200 -@@ -0,0 +1,2204 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/ieee80211.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/ieee80211.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/ieee80211.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/ieee80211.h 2023-05-26 22:35:36.544136899 +0300 +@@ -0,0 +1,2044 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. @@ -382075,15 +381329,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/ieee80211.h linux-5.11.4-rtl8 +#define __IEEE80211_H + + -+#ifndef CONFIG_RTL8711FW -+ -+ #if defined PLATFORM_OS_XP -+ #include -+ #endif -+#else -+ -+#endif -+ +#define MGMT_QUEUE_NUM 5 + +#define ETH_ALEN 6 @@ -382557,54 +381802,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/ieee80211.h linux-5.11.4-rtl8 +} __attribute__((packed)); +#endif + -+ -+ -+#ifdef PLATFORM_WINDOWS -+ -+#pragma pack(1) -+struct rtw_ieee80211_hdr { -+ u16 frame_ctl; -+ u16 duration_id; -+ u8 addr1[ETH_ALEN]; -+ u8 addr2[ETH_ALEN]; -+ u8 addr3[ETH_ALEN]; -+ u16 seq_ctl; -+ u8 addr4[ETH_ALEN]; -+}; -+ -+struct rtw_ieee80211_hdr_3addr { -+ u16 frame_ctl; -+ u16 duration_id; -+ u8 addr1[ETH_ALEN]; -+ u8 addr2[ETH_ALEN]; -+ u8 addr3[ETH_ALEN]; -+ u16 seq_ctl; -+}; -+ -+ -+struct rtw_ieee80211_hdr_qos { -+ struct rtw_ieee80211_hdr wlan_hdr; -+ u16 qc; -+}; -+ -+struct rtw_ieee80211_hdr_3addr_qos { -+ struct rtw_ieee80211_hdr_3addr wlan_hdr; -+ u16 qc; -+}; -+ -+struct eapol { -+ u8 snap[6]; -+ u16 ethertype; -+ u8 version; -+ u8 type; -+ u16 length; -+}; -+#pragma pack() -+ -+#endif -+ -+ -+ +enum eap_type { + EAP_PACKET = 0, + EAPOL_START, @@ -382726,22 +381923,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/ieee80211.h linux-5.11.4-rtl8 + +#endif + -+#ifdef PLATFORM_WINDOWS -+ -+#pragma pack(1) -+struct ieee80211_snap_hdr { -+ -+ u8 dsap; /* always 0xAA */ -+ u8 ssap; /* always 0xAA */ -+ u8 ctrl; /* always 0x03 */ -+ u8 oui[P80211_OUI_LEN]; /* organizational universal id */ -+ -+}; -+#pragma pack() -+ -+#endif -+ -+ +#define SNAP_SIZE sizeof(struct ieee80211_snap_hdr) + +#define WLAN_FC_GET_TYPE(fc) ((fc) & RTW_IEEE80211_FCTL_FTYPE) @@ -383317,24 +382498,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/ieee80211.h linux-5.11.4-rtl8 + +#endif + -+#ifdef PLATFORM_WINDOWS -+ -+#pragma pack(1) -+struct ieee80211_security { -+ u16 active_key:2, -+ enabled:1, -+ auth_mode:2, -+ auth_algo:4, -+ unicast_uses_group:1; -+ u8 key_sizes[WEP_KEYS]; -+ u8 keys[WEP_KEYS][WEP_KEY_LEN]; -+ u8 level; -+ u16 flags; -+} ; -+#pragma pack() -+ -+#endif -+ +/* + + 802.11 data frame from AP @@ -383389,24 +382552,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/ieee80211.h linux-5.11.4-rtl8 +} __attribute__((packed)); +#endif + -+#ifdef PLATFORM_WINDOWS -+ -+#pragma pack(1) -+struct ieee80211_info_element_hdr { -+ u8 id; -+ u8 len; -+} ; -+ -+struct ieee80211_info_element { -+ u8 id; -+ u8 len; -+ u8 data[0]; -+} ; -+#pragma pack() -+ -+#endif -+ -+ +/* + * These are the data types that can make up management packets + * @@ -383470,57 +382615,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/ieee80211.h linux-5.11.4-rtl8 +} __attribute__((packed)); +#endif + -+ -+ -+#ifdef PLATFORM_WINDOWS -+ -+#pragma pack(1) -+ -+struct ieee80211_authentication { -+ struct ieee80211_header_data header; -+ u16 algorithm; -+ u16 transaction; -+ u16 status; -+ /* struct ieee80211_info_element_hdr info_element; */ -+} ; -+ -+ -+struct ieee80211_probe_response { -+ struct ieee80211_header_data header; -+ u32 time_stamp[2]; -+ u16 beacon_interval; -+ u16 capability; -+ struct ieee80211_info_element info_element; -+} ; -+ -+struct ieee80211_probe_request { -+ struct ieee80211_header_data header; -+ /*struct ieee80211_info_element info_element;*/ -+} ; -+ -+struct ieee80211_assoc_request_frame { -+ struct rtw_ieee80211_hdr_3addr header; -+ u16 capability; -+ u16 listen_interval; -+ /* u8 current_ap[ETH_ALEN]; */ -+ struct ieee80211_info_element_hdr info_element; -+} ; -+ -+struct ieee80211_assoc_response_frame { -+ struct rtw_ieee80211_hdr_3addr header; -+ u16 capability; -+ u16 status; -+ u16 aid; -+ /* struct ieee80211_info_element info_element; supported rates */ -+}; -+ -+#pragma pack() -+ -+#endif -+ -+ -+ -+ +struct ieee80211_txb { + u8 nr_frags; + u8 encrypted; @@ -383675,18 +382769,18 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/ieee80211.h linux-5.11.4-rtl8 + (((Addr[2]) & 0xff) == 0xff) && (((Addr[3]) & 0xff) == 0xff) && (((Addr[4]) & 0xff) == 0xff) && \ + (((Addr[5]) & 0xff) == 0xff)) +#else -+extern __inline int is_multicast_mac_addr(const u8 *addr) ++static inline int is_multicast_mac_addr(const u8 *addr) +{ + return (addr[0] != 0xff) && (0x01 & addr[0]); +} + -+extern __inline int is_broadcast_mac_addr(const u8 *addr) ++static inline int is_broadcast_mac_addr(const u8 *addr) +{ + return ((addr[0] == 0xff) && (addr[1] == 0xff) && (addr[2] == 0xff) && \ + (addr[3] == 0xff) && (addr[4] == 0xff) && (addr[5] == 0xff)); +} + -+extern __inline int is_zero_mac_addr(const u8 *addr) ++static inline int is_zero_mac_addr(const u8 *addr) +{ + return ((addr[0] == 0x00) && (addr[1] == 0x00) && (addr[2] == 0x00) && \ + (addr[3] == 0x00) && (addr[4] == 0x00) && (addr[5] == 0x00)); @@ -384261,9 +383355,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/ieee80211.h linux-5.11.4-rtl8 + + +#endif /* IEEE80211_H */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/if_ether.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/if_ether.h ---- linux-5.11.4/3rdparty/rtl8812au/include/if_ether.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/if_ether.h 2021-03-07 18:16:17.087957613 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/if_ether.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/if_ether.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/if_ether.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/if_ether.h 2022-01-28 22:59:35.622654644 +0200 @@ -0,0 +1,106 @@ +/****************************************************************************** + * @@ -384371,9 +383465,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/if_ether.h linux-5.11.4-rtl88 + + +#endif /* _LINUX_IF_ETHER_H */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/ip.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/ip.h ---- linux-5.11.4/3rdparty/rtl8812au/include/ip.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/ip.h 2021-03-07 18:16:17.087957613 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/ip.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/ip.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/ip.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/ip.h 2022-01-28 22:59:35.622654644 +0200 @@ -0,0 +1,135 @@ +/****************************************************************************** + * @@ -384510,9 +383604,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/ip.h linux-5.11.4-rtl8812au/3 +}; + +#endif /* _LINUX_IP_H */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/linux/old_unused_rtl_wireless.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/linux/old_unused_rtl_wireless.h ---- linux-5.11.4/3rdparty/rtl8812au/include/linux/old_unused_rtl_wireless.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/linux/old_unused_rtl_wireless.h 2021-03-07 18:16:17.087957613 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/linux/old_unused_rtl_wireless.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/linux/old_unused_rtl_wireless.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/linux/old_unused_rtl_wireless.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/linux/old_unused_rtl_wireless.h 2022-01-28 22:59:35.622654644 +0200 @@ -0,0 +1,87 @@ +/****************************************************************************** + * @@ -384601,9 +383695,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/linux/old_unused_rtl_wireless +}; + +#endif /* _LINUX_WIRELESS_H */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/mlme_osdep.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/mlme_osdep.h ---- linux-5.11.4/3rdparty/rtl8812au/include/mlme_osdep.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/mlme_osdep.h 2021-03-07 18:16:17.087957613 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/mlme_osdep.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/mlme_osdep.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/mlme_osdep.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/mlme_osdep.h 2022-01-28 22:59:35.622654644 +0200 @@ -0,0 +1,25 @@ +/****************************************************************************** + * @@ -384630,9 +383724,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/mlme_osdep.h linux-5.11.4-rtl +void rtw_reset_securitypriv(_adapter *adapter); + +#endif /* _MLME_OSDEP_H_ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/mp_custom_oid.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/mp_custom_oid.h ---- linux-5.11.4/3rdparty/rtl8812au/include/mp_custom_oid.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/mp_custom_oid.h 2021-03-07 18:16:17.087957613 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/mp_custom_oid.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/mp_custom_oid.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/mp_custom_oid.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/mp_custom_oid.h 2022-01-28 22:59:35.622654644 +0200 @@ -0,0 +1,348 @@ +/****************************************************************************** + * @@ -384982,9 +384076,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/mp_custom_oid.h linux-5.11.4- +#define OID_RT_PRO_EFUSE_MAP 0xFF871217 /* Q, S */ + +#endif /* #ifndef __CUSTOM_OID_H */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/nic_spec.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/nic_spec.h ---- linux-5.11.4/3rdparty/rtl8812au/include/nic_spec.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/nic_spec.h 2021-03-07 18:16:17.087957613 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/nic_spec.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/nic_spec.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/nic_spec.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/nic_spec.h 2022-01-28 22:59:35.622654644 +0200 @@ -0,0 +1,41 @@ +/****************************************************************************** + * @@ -385027,10 +384121,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/nic_spec.h linux-5.11.4-rtl88 + + +#endif /* __RTL8711_SPEC_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/osdep_intf.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/osdep_intf.h ---- linux-5.11.4/3rdparty/rtl8812au/include/osdep_intf.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/osdep_intf.h 2021-03-07 18:16:17.087957613 +0200 -@@ -0,0 +1,167 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/osdep_intf.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/osdep_intf.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/osdep_intf.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/osdep_intf.h 2022-12-18 17:40:24.575937030 +0200 +@@ -0,0 +1,146 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. @@ -385090,29 +384184,8 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/osdep_intf.h linux-5.11.4-rtl +#endif +#endif + -+#ifdef PLATFORM_OS_XP -+#ifdef CONFIG_SDIO_HCI -+ /* below is for io_rwmem... */ -+ PMDL pmdl; -+ PSDBUS_REQUEST_PACKET sdrp; -+ PSDBUS_REQUEST_PACKET recv_sdrp; -+ PSDBUS_REQUEST_PACKET xmit_sdrp; -+ -+ PIRP piorw_irp; -+ -+#endif -+#ifdef CONFIG_USB_HCI -+ PURB piorw_urb; -+ PIRP piorw_irp; -+ u8 io_irp_cnt; -+ u8 bio_irp_pending; -+ _sema io_retevt; -+#endif -+#endif -+ +}; + -+ +#ifdef CONFIG_R871X_TEST + int rtw_start_pseudo_adhoc(_adapter *padapter); + int rtw_stop_pseudo_adhoc(_adapter *padapter); @@ -385198,9 +384271,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/osdep_intf.h linux-5.11.4-rtl +int rtw_resume_common(_adapter *padapter); + +#endif /* _OSDEP_INTF_H_ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/osdep_service_bsd.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/osdep_service_bsd.h ---- linux-5.11.4/3rdparty/rtl8812au/include/osdep_service_bsd.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/osdep_service_bsd.h 2021-03-07 18:16:17.087957613 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/osdep_service_bsd.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/osdep_service_bsd.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/osdep_service_bsd.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/osdep_service_bsd.h 2022-01-28 22:59:35.623654691 +0200 @@ -0,0 +1,756 @@ +/****************************************************************************** + * @@ -385958,9 +385031,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/osdep_service_bsd.h linux-5.1 + +#endif + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/osdep_service_ce.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/osdep_service_ce.h ---- linux-5.11.4/3rdparty/rtl8812au/include/osdep_service_ce.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/osdep_service_ce.h 2021-03-07 18:16:17.087957613 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/osdep_service_ce.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/osdep_service_ce.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/osdep_service_ce.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/osdep_service_ce.h 2022-01-28 22:59:35.623654691 +0200 @@ -0,0 +1,200 @@ +/****************************************************************************** + * @@ -386162,10 +385235,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/osdep_service_ce.h linux-5.11 + +#endif + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/osdep_service.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/osdep_service.h ---- linux-5.11.4/3rdparty/rtl8812au/include/osdep_service.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/osdep_service.h 2021-03-07 18:16:17.087957613 +0200 -@@ -0,0 +1,804 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/osdep_service.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/osdep_service.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/osdep_service.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/osdep_service.h 2023-05-26 22:35:36.545136899 +0300 +@@ -0,0 +1,781 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. @@ -386226,14 +385299,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/osdep_service.h linux-5.11.4- + #include +#endif + -+#ifdef PLATFORM_OS_XP -+ #include -+#endif -+ -+#ifdef PLATFORM_OS_CE -+ #include -+#endif -+ +/* #include */ + +#ifndef BIT @@ -386586,7 +385651,11 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/osdep_service.h linux-5.11.4- + printf("%s", "RTKTHREAD_enter"); +#endif +} ++#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 17, 0) +void thread_exit(_completion *comp); ++#else ++void kthread_thread_exit(_completion *comp); ++#endif +void _rtw_init_completion(_completion *comp); +void _rtw_wait_for_comp_timeout(_completion *comp); +void _rtw_wait_for_comp(_completion *comp); @@ -386629,15 +385698,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/osdep_service.h linux-5.11.4- + return res; +#endif + -+#ifdef PLATFORM_WINDOWS -+ -+ if (res == _SUCCESS) -+ return NDIS_STATUS_SUCCESS; -+ else -+ return NDIS_STATUS_FAILURE; -+ -+#endif -+ +} + +__inline static void rtw_dump_stack(void) @@ -386657,16 +385717,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/osdep_service.h linux-5.11.4- +{ + int ret = _TRUE; + -+#ifdef PLATFORM_WINDOWS -+ if (((uint)parg1) <= 0x7fffffff || -+ ((uint)parg2) <= 0x7fffffff || -+ ((uint)parg3) <= 0x7fffffff || -+ ((uint)parg4) <= 0x7fffffff) { -+ ret = _FALSE; -+ KeBugCheckEx(0x87110000, (ULONG_PTR)parg1, (ULONG_PTR)parg2, (ULONG_PTR)parg3, (ULONG_PTR)parg4); -+ } -+#endif -+ + return ret; + +} @@ -386970,9 +386020,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/osdep_service.h linux-5.11.4- +#endif /* !PLATFORM_LINUX */ + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/osdep_service_linux.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/osdep_service_linux.h ---- linux-5.11.4/3rdparty/rtl8812au/include/osdep_service_linux.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/osdep_service_linux.h 2021-03-07 18:16:17.087957613 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/osdep_service_linux.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/osdep_service_linux.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/osdep_service_linux.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/osdep_service_linux.h 2022-01-28 22:59:35.623654691 +0200 @@ -0,0 +1,543 @@ +/****************************************************************************** + * @@ -387517,9 +386567,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/osdep_service_linux.h linux-5 + + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/osdep_service_xp.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/osdep_service_xp.h ---- linux-5.11.4/3rdparty/rtl8812au/include/osdep_service_xp.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/osdep_service_xp.h 2021-03-07 18:16:17.087957613 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/osdep_service_xp.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/osdep_service_xp.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/osdep_service_xp.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/osdep_service_xp.h 2022-01-28 22:59:35.623654691 +0200 @@ -0,0 +1,210 @@ +/****************************************************************************** + * @@ -387731,9 +386781,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/osdep_service_xp.h linux-5.11 + +#endif + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/pci_hal.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/pci_hal.h ---- linux-5.11.4/3rdparty/rtl8812au/include/pci_hal.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/pci_hal.h 2021-03-07 18:16:17.087957613 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/pci_hal.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/pci_hal.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/pci_hal.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/pci_hal.h 2022-01-28 22:59:35.623654691 +0200 @@ -0,0 +1,52 @@ +/****************************************************************************** + * @@ -387787,9 +386837,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/pci_hal.h linux-5.11.4-rtl881 +u8 rtw_set_hal_ops(_adapter *padapter); + +#endif /* __PCIE_HAL_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/pci_ops.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/pci_ops.h ---- linux-5.11.4/3rdparty/rtl8812au/include/pci_ops.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/pci_ops.h 2021-03-07 18:16:17.087957613 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/pci_ops.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/pci_ops.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/pci_ops.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/pci_ops.h 2022-01-28 22:59:35.623654691 +0200 @@ -0,0 +1,109 @@ +/****************************************************************************** + * @@ -387900,9 +386950,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/pci_ops.h linux-5.11.4-rtl881 +#endif + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/pci_osintf.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/pci_osintf.h ---- linux-5.11.4/3rdparty/rtl8812au/include/pci_osintf.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/pci_osintf.h 2021-03-07 18:16:17.087957613 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/pci_osintf.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/pci_osintf.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/pci_osintf.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/pci_osintf.h 2022-01-28 22:59:35.623654691 +0200 @@ -0,0 +1,50 @@ +/****************************************************************************** + * @@ -387954,9 +387004,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/pci_osintf.h linux-5.11.4-rtl +#endif + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/recv_osdep.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/recv_osdep.h ---- linux-5.11.4/3rdparty/rtl8812au/include/recv_osdep.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/recv_osdep.h 2021-03-07 18:16:17.087957613 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/recv_osdep.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/recv_osdep.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/recv_osdep.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/recv_osdep.h 2022-01-28 22:59:35.623654691 +0200 @@ -0,0 +1,67 @@ +/****************************************************************************** + * @@ -388025,9 +387075,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/recv_osdep.h linux-5.11.4-rtl +#endif /* PLATFORM_LINUX */ + +#endif /* */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtl8812a_cmd.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtl8812a_cmd.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtl8812a_cmd.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtl8812a_cmd.h 2021-03-07 18:16:17.088957660 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtl8812a_cmd.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtl8812a_cmd.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtl8812a_cmd.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtl8812a_cmd.h 2022-01-28 22:59:35.623654691 +0200 @@ -0,0 +1,158 @@ +/****************************************************************************** + * @@ -388187,9 +387237,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtl8812a_cmd.h linux-5.11.4-r +s32 c2h_handler_8812a(_adapter *adapter, u8 id, u8 seq, u8 plen, u8 *payload); + +#endif/* __RTL8812A_CMD_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtl8812a_dm.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtl8812a_dm.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtl8812a_dm.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtl8812a_dm.h 2021-03-07 18:16:17.088957660 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtl8812a_dm.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtl8812a_dm.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtl8812a_dm.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtl8812a_dm.h 2022-01-28 22:59:35.623654691 +0200 @@ -0,0 +1,27 @@ +/****************************************************************************** + * @@ -388218,9 +387268,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtl8812a_dm.h linux-5.11.4-rt +/* void rtl8192c_dm_RF_Saving(IN PADAPTER pAdapter, IN u8 bForceInNormal); */ + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtl8812a_hal.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtl8812a_hal.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtl8812a_hal.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtl8812a_hal.h 2021-03-07 18:16:17.088957660 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtl8812a_hal.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtl8812a_hal.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtl8812a_hal.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtl8812a_hal.h 2022-01-28 22:59:35.623654691 +0200 @@ -0,0 +1,369 @@ +/****************************************************************************** + * @@ -388591,9 +387641,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtl8812a_hal.h linux-5.11.4-r +); + +#endif /* __RTL8188E_HAL_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtl8812a_led.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtl8812a_led.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtl8812a_led.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtl8812a_led.h 2021-03-07 18:16:17.088957660 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtl8812a_led.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtl8812a_led.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtl8812a_led.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtl8812a_led.h 2022-01-28 22:59:35.623654691 +0200 @@ -0,0 +1,41 @@ +/****************************************************************************** + * @@ -388636,10 +387686,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtl8812a_led.h linux-5.11.4-r +#endif + +#endif /*__RTL8812A_LED_H__*/ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtl8812a_recv.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtl8812a_recv.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtl8812a_recv.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtl8812a_recv.h 2021-03-07 18:16:17.088957660 +0200 -@@ -0,0 +1,153 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtl8812a_recv.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtl8812a_recv.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtl8812a_recv.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtl8812a_recv.h 2023-05-26 22:35:36.545136899 +0300 +@@ -0,0 +1,149 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. @@ -388660,9 +387710,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtl8812a_recv.h linux-5.11.4- +#if defined(CONFIG_USB_HCI) + + #ifndef MAX_RECVBUF_SZ -+ #ifdef PLATFORM_OS_CE -+ #define MAX_RECVBUF_SZ (8192+1024) /* 8K+1k */ -+ #else + #ifndef CONFIG_MINIMAL_MEMORY_USAGE + #ifdef CONFIG_PREALLOC_RX_SKB_BUFFER + #define MAX_RECVBUF_SZ (rtw_rtkm_get_buff_size()) /*depend rtkm*/ @@ -388681,7 +387728,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtl8812a_recv.h linux-5.11.4- + #else + #define MAX_RECVBUF_SZ (4000) /* about 4K */ + #endif -+ #endif + #endif /* !MAX_RECVBUF_SZ */ + +#elif defined(CONFIG_PCI_HCI) @@ -388793,9 +387839,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtl8812a_recv.h linux-5.11.4- +void rtl8812_query_rx_desc_status(union recv_frame *precvframe, u8 *pdesc); + +#endif /* __RTL8812A_RECV_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtl8812a_rf.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtl8812a_rf.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtl8812a_rf.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtl8812a_rf.h 2021-03-07 18:16:17.088957660 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtl8812a_rf.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtl8812a_rf.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtl8812a_rf.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtl8812a_rf.h 2022-01-28 22:59:35.623654691 +0200 @@ -0,0 +1,28 @@ +/****************************************************************************** + * @@ -388825,9 +387871,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtl8812a_rf.h linux-5.11.4-rt + IN PADAPTER Adapter); + +#endif/* __RTL8188E_RF_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtl8812a_spec.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtl8812a_spec.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtl8812a_spec.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtl8812a_spec.h 2021-03-07 18:16:17.088957660 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtl8812a_spec.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtl8812a_spec.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtl8812a_spec.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtl8812a_spec.h 2022-01-28 22:59:35.623654691 +0200 @@ -0,0 +1,263 @@ +/****************************************************************************** + * @@ -389092,9 +388138,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtl8812a_spec.h linux-5.11.4- +#ifdef CONFIG_RTL8821A +#include "rtl8821a_spec.h" +#endif /* CONFIG_RTL8821A */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtl8812a_sreset.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtl8812a_sreset.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtl8812a_sreset.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtl8812a_sreset.h 2021-03-07 18:16:17.088957660 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtl8812a_sreset.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtl8812a_sreset.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtl8812a_sreset.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtl8812a_sreset.h 2022-01-28 22:59:35.623654691 +0200 @@ -0,0 +1,24 @@ +/****************************************************************************** + * @@ -389120,9 +388166,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtl8812a_sreset.h linux-5.11. +extern void rtl8812_sreset_linked_status_check(_adapter *padapter); +#endif +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtl8812a_xmit.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtl8812a_xmit.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtl8812a_xmit.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtl8812a_xmit.h 2021-03-07 18:16:17.088957660 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtl8812a_xmit.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtl8812a_xmit.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtl8812a_xmit.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtl8812a_xmit.h 2022-01-28 22:59:35.623654691 +0200 @@ -0,0 +1,367 @@ +/****************************************************************************** + * @@ -389491,9 +388537,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtl8812a_xmit.h linux-5.11.4- +#ifdef CONFIG_RTL8821A +#include "rtl8821a_xmit.h" +#endif /* CONFIG_RTL8821A */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtl8814a_cmd.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtl8814a_cmd.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtl8814a_cmd.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtl8814a_cmd.h 2021-03-07 18:16:17.088957660 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtl8814a_cmd.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtl8814a_cmd.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtl8814a_cmd.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtl8814a_cmd.h 2022-01-28 22:59:35.624654739 +0200 @@ -0,0 +1,162 @@ +/****************************************************************************** + * @@ -389657,9 +388703,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtl8814a_cmd.h linux-5.11.4-r +#endif /* CONFIG_P2P */ + +#endif/* __RTL8814A_CMD_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtl8814a_dm.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtl8814a_dm.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtl8814a_dm.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtl8814a_dm.h 2021-03-07 18:16:17.088957660 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtl8814a_dm.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtl8814a_dm.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtl8814a_dm.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtl8814a_dm.h 2022-01-28 22:59:35.624654739 +0200 @@ -0,0 +1,23 @@ +/****************************************************************************** + * @@ -389684,9 +388730,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtl8814a_dm.h linux-5.11.4-rt +void rtl8814_HalDmWatchDog(IN PADAPTER Adapter); + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtl8814a_hal.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtl8814a_hal.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtl8814a_hal.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtl8814a_hal.h 2021-03-07 18:16:17.088957660 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtl8814a_hal.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtl8814a_hal.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtl8814a_hal.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtl8814a_hal.h 2022-01-28 22:59:35.624654739 +0200 @@ -0,0 +1,330 @@ +/****************************************************************************** + * @@ -390018,9 +389064,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtl8814a_hal.h linux-5.11.4-r +#endif + +#endif /* __RTL8188E_HAL_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtl8814a_led.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtl8814a_led.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtl8814a_led.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtl8814a_led.h 2021-03-07 18:16:17.088957660 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtl8814a_led.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtl8814a_led.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtl8814a_led.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtl8814a_led.h 2022-01-28 22:59:35.624654739 +0200 @@ -0,0 +1,36 @@ +/****************************************************************************** + * @@ -390058,10 +389104,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtl8814a_led.h linux-5.11.4-r + +#endif /* __RTL8814A_LED_H__ */ +#endif /*CONFIG_RTW_SW_LED*/ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtl8814a_recv.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtl8814a_recv.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtl8814a_recv.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtl8814a_recv.h 2021-03-07 18:16:17.088957660 +0200 -@@ -0,0 +1,186 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtl8814a_recv.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtl8814a_recv.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtl8814a_recv.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtl8814a_recv.h 2023-05-26 22:35:36.545136899 +0300 +@@ -0,0 +1,182 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. @@ -390082,9 +389128,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtl8814a_recv.h linux-5.11.4- +#if defined(CONFIG_USB_HCI) + + #ifndef MAX_RECVBUF_SZ -+ #ifdef PLATFORM_OS_CE -+ #define MAX_RECVBUF_SZ (8192+1024) /* 8K+1k */ -+ #else + #ifndef CONFIG_MINIMAL_MEMORY_USAGE + #ifdef CONFIG_PLATFORM_MSTAR + #define MAX_RECVBUF_SZ (8192) /* 8K */ @@ -390099,7 +389142,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtl8814a_recv.h linux-5.11.4- + #else + #define MAX_RECVBUF_SZ (4000) /* about 4K */ + #endif -+ #endif + #endif /* !MAX_RECVBUF_SZ */ + +#elif defined(CONFIG_PCI_HCI) @@ -390248,9 +389290,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtl8814a_recv.h linux-5.11.4- +void rtl8814_query_rx_desc_status(union recv_frame *precvframe, u8 *pdesc); + +#endif /* __RTL8814A_RECV_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtl8814a_rf.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtl8814a_rf.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtl8814a_rf.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtl8814a_rf.h 2021-03-07 18:16:17.088957660 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtl8814a_rf.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtl8814a_rf.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtl8814a_rf.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtl8814a_rf.h 2022-01-28 22:59:35.624654739 +0200 @@ -0,0 +1,28 @@ +/****************************************************************************** + * @@ -390280,9 +389322,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtl8814a_rf.h linux-5.11.4-rt + IN PADAPTER Adapter); + +#endif/* __RTL8188E_RF_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtl8814a_spec.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtl8814a_spec.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtl8814a_spec.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtl8814a_spec.h 2021-03-07 18:16:17.088957660 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtl8814a_spec.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtl8814a_spec.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtl8814a_spec.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtl8814a_spec.h 2022-01-28 22:59:35.624654739 +0200 @@ -0,0 +1,656 @@ +/****************************************************************************** + * @@ -390940,9 +389982,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtl8814a_spec.h linux-5.11.4- +#define PROTO_CAP_8814A (PROTO_CAP_11B | PROTO_CAP_11G | PROTO_CAP_11N | PROTO_CAP_11AC) + +#endif /* __RTL8814A_SPEC_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtl8814a_sreset.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtl8814a_sreset.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtl8814a_sreset.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtl8814a_sreset.h 2021-03-07 18:16:17.088957660 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtl8814a_sreset.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtl8814a_sreset.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtl8814a_sreset.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtl8814a_sreset.h 2022-01-28 22:59:35.624654739 +0200 @@ -0,0 +1,24 @@ +/****************************************************************************** + * @@ -390968,9 +390010,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtl8814a_sreset.h linux-5.11. + extern void rtl8814_sreset_linked_status_check(_adapter *padapter); +#endif +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtl8814a_xmit.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtl8814a_xmit.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtl8814a_xmit.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtl8814a_xmit.h 2021-03-07 18:16:17.088957660 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtl8814a_xmit.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtl8814a_xmit.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtl8814a_xmit.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtl8814a_xmit.h 2022-01-28 22:59:35.624654739 +0200 @@ -0,0 +1,311 @@ +/****************************************************************************** + * @@ -391283,9 +390325,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtl8814a_xmit.h linux-5.11.4- + + +#endif /* __RTL8814_XMIT_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtl8821a_spec.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtl8821a_spec.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtl8821a_spec.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtl8821a_spec.h 2021-03-07 18:16:17.089957707 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtl8821a_spec.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtl8821a_spec.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtl8821a_spec.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtl8821a_spec.h 2022-01-28 22:59:35.624654739 +0200 @@ -0,0 +1,90 @@ +/****************************************************************************** + * @@ -391377,9 +390419,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtl8821a_spec.h linux-5.11.4- + * ************************************************************ */ + +#endif /* __RTL8821A_SPEC_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtl8821a_xmit.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtl8821a_xmit.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtl8821a_xmit.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtl8821a_xmit.h 2021-03-07 18:16:17.089957707 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtl8821a_xmit.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtl8821a_xmit.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtl8821a_xmit.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtl8821a_xmit.h 2022-01-28 22:59:35.624654739 +0200 @@ -0,0 +1,173 @@ +/****************************************************************************** + * @@ -391554,9 +390596,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtl8821a_xmit.h linux-5.11.4- +#endif + +#endif /* __RTL8821_XMIT_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtl_autoconf.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtl_autoconf.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtl_autoconf.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtl_autoconf.h 2021-03-07 18:16:17.089957707 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtl_autoconf.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtl_autoconf.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtl_autoconf.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtl_autoconf.h 2022-01-28 22:59:35.624654739 +0200 @@ -0,0 +1,363 @@ +/****************************************************************************** + * @@ -391921,10 +390963,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtl_autoconf.h linux-5.11.4-r +#define DBG_RX_DFRAME_RAW_DATA +/*#define CONFIG_USE_EXTERNAL_POWER */ /* NOT USB2.0 power, so no 500mA power constraint, no limitation in Power by Rate*/ +/*#define DBG_FW_DEBUG_MSG_PKT*/ /* FW use this feature to tx debug broadcast pkt. This pkt include FW debug message*/ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_android.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_android.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtw_android.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_android.h 2021-03-07 18:16:17.089957707 +0200 -@@ -0,0 +1,113 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtw_android.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_android.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtw_android.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_android.h 2023-05-26 22:35:36.545136899 +0300 +@@ -0,0 +1,108 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. @@ -392030,17 +391072,12 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_android.h linux-5.11.4-rt +#endif /* defined(RTW_ENABLE_WIFI_CONTROL_FUNC) */ + +#ifdef CONFIG_GPIO_WAKEUP -+#ifdef CONFIG_PLATFORM_INTEL_BYT -+int wifi_configure_gpio(void); -+#endif /* CONFIG_PLATFORM_INTEL_BYT */ +void wifi_free_gpio(unsigned int gpio); +#endif /* CONFIG_GPIO_WAKEUP */ -+ -+ +#endif /* __RTW_ANDROID_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_ap.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_ap.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtw_ap.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_ap.h 2021-03-07 18:16:17.089957707 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtw_ap.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_ap.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtw_ap.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_ap.h 2022-01-28 22:59:35.624654739 +0200 @@ -0,0 +1,112 @@ +/****************************************************************************** + * @@ -392154,9 +391191,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_ap.h linux-5.11.4-rtl8812 + +#endif /* end of CONFIG_AP_MODE */ +#endif /*__RTW_AP_H_*/ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_beamforming.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_beamforming.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtw_beamforming.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_beamforming.h 2021-03-07 18:16:17.089957707 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtw_beamforming.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_beamforming.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtw_beamforming.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_beamforming.h 2022-01-28 22:59:35.624654739 +0200 @@ -0,0 +1,401 @@ +/****************************************************************************** + * @@ -392559,9 +391596,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_beamforming.h linux-5.11. +#endif /*#ifdef CONFIG_BEAMFORMING */ + +#endif /*__RTW_BEAMFORMING_H_*/ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_br_ext.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_br_ext.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtw_br_ext.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_br_ext.h 2021-03-07 18:16:17.089957707 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtw_br_ext.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_br_ext.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtw_br_ext.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_br_ext.h 2022-01-28 22:59:35.624654739 +0200 @@ -0,0 +1,69 @@ +/****************************************************************************** + * @@ -392632,9 +391669,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_br_ext.h linux-5.11.4-rtl +void nat25_db_cleanup(_adapter *priv); + +#endif /* _RTW_BR_EXT_H_ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_btcoex.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_btcoex.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtw_btcoex.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_btcoex.h 2021-03-07 18:16:17.089957707 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtw_btcoex.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_btcoex.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtw_btcoex.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_btcoex.h 2022-01-28 22:59:35.624654739 +0200 @@ -0,0 +1,455 @@ +/****************************************************************************** + * @@ -393091,9 +392128,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_btcoex.h linux-5.11.4-rtl + +void rtw_btcoex_set_ant_info(PADAPTER padapter); + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_btcoex_wifionly.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_btcoex_wifionly.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtw_btcoex_wifionly.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_btcoex_wifionly.h 2021-03-07 18:16:17.089957707 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtw_btcoex_wifionly.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_btcoex_wifionly.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtw_btcoex_wifionly.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_btcoex_wifionly.h 2022-01-28 22:59:35.624654739 +0200 @@ -0,0 +1,24 @@ +/****************************************************************************** + * @@ -393119,10 +392156,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_btcoex_wifionly.h linux-5 +void rtw_btcoex_wifionly_initialize(PADAPTER padapter); +void rtw_btcoex_wifionly_AntInfoSetting(PADAPTER padapter); +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_bt_mp.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_bt_mp.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtw_bt_mp.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_bt_mp.h 2021-03-07 18:16:17.089957707 +0200 -@@ -0,0 +1,288 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtw_bt_mp.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_bt_mp.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtw_bt_mp.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_bt_mp.h 2023-05-26 22:35:36.545136899 +0300 +@@ -0,0 +1,287 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. @@ -393144,7 +392181,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_bt_mp.h linux-5.11.4-rtl8 + +#if (MP_DRIVER == 1) + -+#pragma pack(1) + +/* definition for BT_UP_OP_BT_READY */ +#define MP_BT_NOT_READY 0 @@ -393411,9 +392447,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_bt_mp.h linux-5.11.4-rtl8 +#endif /* #if(MP_DRIVER == 1) */ + +#endif /* #ifndef __INC_MPT_BT_H */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_byteorder.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_byteorder.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtw_byteorder.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_byteorder.h 2021-03-07 18:16:17.089957707 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtw_byteorder.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_byteorder.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtw_byteorder.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_byteorder.h 2022-01-28 22:59:35.624654739 +0200 @@ -0,0 +1,45 @@ +/****************************************************************************** + * @@ -393460,10 +392496,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_byteorder.h linux-5.11.4- +#endif + +#endif /* _RTL871X_BYTEORDER_H_ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_cmd.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_cmd.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtw_cmd.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_cmd.h 2021-03-07 18:16:17.089957707 +0200 -@@ -0,0 +1,1363 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtw_cmd.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_cmd.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtw_cmd.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_cmd.h 2023-05-26 22:35:36.545136899 +0300 +@@ -0,0 +1,1356 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. @@ -393492,11 +392528,7 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_cmd.h linux-5.11.4-rtl881 +#define MAX_RSPSZ 512 +#define MAX_EVTSZ 1024 + -+#ifdef PLATFORM_OS_CE -+ #define CMDBUFF_ALIGN_SZ 4 -+#else -+ #define CMDBUFF_ALIGN_SZ 512 -+#endif ++#define CMDBUFF_ALIGN_SZ 512 + +struct cmd_obj { + _adapter *padapter; @@ -393580,9 +392612,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_cmd.h linux-5.11.4-rtl881 +#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) + u8 *c2h_mem; + u8 *allocated_c2h_mem; -+#ifdef PLATFORM_OS_XP -+ PMDL pc2h_mdl; -+#endif +#endif + +}; @@ -394827,10 +393856,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_cmd.h linux-5.11.4-rtl881 + (cmd)->cmdcode == GEN_CMD_CODE(_Set_Drv_Extra) ? ((struct drvextra_cmd_parm *)(cmd)->parmbuf)->type : 0 + +#endif /* _CMD_H_ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_debug.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_debug.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtw_debug.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_debug.h 2021-03-07 18:16:17.089957707 +0200 -@@ -0,0 +1,653 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtw_debug.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_debug.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtw_debug.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_debug.h 2023-05-26 22:35:36.545136899 +0300 +@@ -0,0 +1,624 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. @@ -394861,37 +393890,18 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_debug.h linux-5.11.4-rtl8 + +#define DRIVER_PREFIX "RTW: " + -+#ifdef PLATFORM_OS_CE -+extern void rtl871x_cedbg(const char *fmt, ...); -+#endif -+ -+#ifdef PLATFORM_WINDOWS -+ #define RTW_PRINT do {} while (0) -+ #define RTW_ERR do {} while (0) -+ #define RTW_WARN do {} while (0) -+ #define RTW_INFO do {} while (0) -+ #define RTW_DBG do {} while (0) -+ #define RTW_PRINT_SEL do {} while (0) -+ #define _RTW_PRINT do {} while (0) -+ #define _RTW_ERR do {} while (0) -+ #define _RTW_WARN do {} while (0) -+ #define _RTW_INFO do {} while (0) -+ #define _RTW_DBG do {} while (0) -+ #define _RTW_PRINT_SEL do {} while (0) -+#else -+ #define RTW_PRINT(x, ...) do {} while (0) -+ #define RTW_ERR(x, ...) do {} while (0) -+ #define RTW_WARN(x,...) do {} while (0) -+ #define RTW_INFO(x,...) do {} while (0) -+ #define RTW_DBG(x,...) do {} while (0) -+ #define RTW_PRINT_SEL(x,...) do {} while (0) -+ #define _RTW_PRINT(x, ...) do {} while (0) -+ #define _RTW_ERR(x, ...) do {} while (0) -+ #define _RTW_WARN(x,...) do {} while (0) -+ #define _RTW_INFO(x,...) do {} while (0) -+ #define _RTW_DBG(x,...) do {} while (0) -+ #define _RTW_PRINT_SEL(x,...) do {} while (0) -+#endif ++#define RTW_PRINT(x, ...) do {} while (0) ++#define RTW_ERR(x, ...) do {} while (0) ++#define RTW_WARN(x,...) do {} while (0) ++#define RTW_INFO(x,...) do {} while (0) ++#define RTW_DBG(x,...) do {} while (0) ++#define RTW_PRINT_SEL(x,...) do {} while (0) ++#define _RTW_PRINT(x, ...) do {} while (0) ++#define _RTW_ERR(x, ...) do {} while (0) ++#define _RTW_WARN(x,...) do {} while (0) ++#define _RTW_INFO(x,...) do {} while (0) ++#define _RTW_DBG(x,...) do {} while (0) ++#define _RTW_PRINT_SEL(x,...) do {} while (0) + +#define RTW_INFO_DUMP(_TitleString, _HexData, _HexDataLen) do {} while (0) +#define RTW_DBG_DUMP(_TitleString, _HexData, _HexDataLen) do {} while (0) @@ -394901,20 +393911,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_debug.h linux-5.11.4-rtl8 + +#define RTW_DBGDUMP 0 /* 'stream' for _dbgdump */ + -+ -+ +#undef _dbgdump +#undef _seqdump + -+#if defined(PLATFORM_WINDOWS) && defined(PLATFORM_OS_XP) -+ #define _dbgdump DbgPrint -+ #define KERN_CONT -+ #define _seqdump(sel, fmt, arg...) _dbgdump(fmt, ##arg) -+#elif defined(PLATFORM_WINDOWS) && defined(PLATFORM_OS_CE) -+ #define _dbgdump rtl871x_cedbg -+ #define KERN_CONT -+ #define _seqdump(sel, fmt, arg...) _dbgdump(fmt, ##arg) -+#elif defined PLATFORM_LINUX ++#if defined PLATFORM_LINUX + #define _dbgdump printk + #if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 24)) + #define KERN_CONT @@ -395484,9 +394484,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_debug.h linux-5.11.4-rtl8 +#define _module_rtl8712_led_c_ BIT(31) + +#endif /* __RTW_DEBUG_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_eeprom.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_eeprom.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtw_eeprom.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_eeprom.h 2021-03-07 18:16:17.089957707 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtw_eeprom.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_eeprom.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtw_eeprom.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_eeprom.h 2022-01-28 22:59:35.625654787 +0200 @@ -0,0 +1,116 @@ +/****************************************************************************** + * @@ -395604,9 +394604,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_eeprom.h linux-5.11.4-rtl +#endif /* PLATFORM_LINUX */ + +#endif /* __RTL871X_EEPROM_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_efuse.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_efuse.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtw_efuse.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_efuse.h 2021-03-07 18:16:17.089957707 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtw_efuse.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_efuse.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtw_efuse.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_efuse.h 2022-01-28 22:59:35.625654787 +0200 @@ -0,0 +1,255 @@ +/****************************************************************************** + * @@ -395863,9 +394863,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_efuse.h linux-5.11.4-rtl8 +#endif /* PLATFORM_LINUX */ + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_event.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_event.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtw_event.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_event.h 2021-03-07 18:16:17.089957707 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtw_event.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_event.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtw_event.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_event.h 2022-01-28 22:59:35.625654787 +0200 @@ -0,0 +1,130 @@ +/****************************************************************************** + * @@ -395997,9 +394997,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_event.h linux-5.11.4-rtl8 + + +#endif /* _WLANEVENT_H_ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_ht.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_ht.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtw_ht.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_ht.h 2021-03-07 18:16:17.089957707 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtw_ht.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_ht.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtw_ht.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_ht.h 2022-01-28 22:59:35.625654787 +0200 @@ -0,0 +1,217 @@ +/****************************************************************************** + * @@ -396218,10 +395218,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_ht.h linux-5.11.4-rtl8812 +#define SET_HT_OP_ELE_PCO_PHASE(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 5, 3, 1, _val) + +#endif /* _RTL871X_HT_H_ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_ioctl.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_ioctl.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtw_ioctl.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_ioctl.h 2021-03-07 18:16:17.090957755 +0200 -@@ -0,0 +1,319 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtw_ioctl.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_ioctl.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtw_ioctl.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_ioctl.h 2023-05-26 22:35:36.545136899 +0300 +@@ -0,0 +1,127 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. @@ -396239,68 +395239,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_ioctl.h linux-5.11.4-rtl8 +#ifndef _RTW_IOCTL_H_ +#define _RTW_IOCTL_H_ + -+#ifndef PLATFORM_WINDOWS -+/* 00 - Success -+* 11 - Error */ -+#define STATUS_SUCCESS (0x00000000L) -+#define STATUS_PENDING (0x00000103L) -+ -+#define STATUS_UNSUCCESSFUL (0xC0000001L) -+#define STATUS_INSUFFICIENT_RESOURCES (0xC000009AL) -+#define STATUS_NOT_SUPPORTED (0xC00000BBL) -+ -+#define NDIS_STATUS_SUCCESS ((NDIS_STATUS)STATUS_SUCCESS) -+#define NDIS_STATUS_PENDING ((NDIS_STATUS)STATUS_PENDING) -+#define NDIS_STATUS_NOT_RECOGNIZED ((NDIS_STATUS)0x00010001L) -+#define NDIS_STATUS_NOT_COPIED ((NDIS_STATUS)0x00010002L) -+#define NDIS_STATUS_NOT_ACCEPTED ((NDIS_STATUS)0x00010003L) -+#define NDIS_STATUS_CALL_ACTIVE ((NDIS_STATUS)0x00010007L) -+ -+#define NDIS_STATUS_FAILURE ((NDIS_STATUS)STATUS_UNSUCCESSFUL) -+#define NDIS_STATUS_RESOURCES ((NDIS_STATUS)STATUS_INSUFFICIENT_RESOURCES) -+#define NDIS_STATUS_CLOSING ((NDIS_STATUS)0xC0010002L) -+#define NDIS_STATUS_BAD_VERSION ((NDIS_STATUS)0xC0010004L) -+#define NDIS_STATUS_BAD_CHARACTERISTICS ((NDIS_STATUS)0xC0010005L) -+#define NDIS_STATUS_ADAPTER_NOT_FOUND ((NDIS_STATUS)0xC0010006L) -+#define NDIS_STATUS_OPEN_FAILED ((NDIS_STATUS)0xC0010007L) -+#define NDIS_STATUS_DEVICE_FAILED ((NDIS_STATUS)0xC0010008L) -+#define NDIS_STATUS_MULTICAST_FULL ((NDIS_STATUS)0xC0010009L) -+#define NDIS_STATUS_MULTICAST_EXISTS ((NDIS_STATUS)0xC001000AL) -+#define NDIS_STATUS_MULTICAST_NOT_FOUND ((NDIS_STATUS)0xC001000BL) -+#define NDIS_STATUS_REQUEST_ABORTED ((NDIS_STATUS)0xC001000CL) -+#define NDIS_STATUS_RESET_IN_PROGRESS ((NDIS_STATUS)0xC001000DL) -+#define NDIS_STATUS_CLOSING_INDICATING ((NDIS_STATUS)0xC001000EL) -+#define NDIS_STATUS_NOT_SUPPORTED ((NDIS_STATUS)STATUS_NOT_SUPPORTED) -+#define NDIS_STATUS_INVALID_PACKET ((NDIS_STATUS)0xC001000FL) -+#define NDIS_STATUS_OPEN_LIST_FULL ((NDIS_STATUS)0xC0010010L) -+#define NDIS_STATUS_ADAPTER_NOT_READY ((NDIS_STATUS)0xC0010011L) -+#define NDIS_STATUS_ADAPTER_NOT_OPEN ((NDIS_STATUS)0xC0010012L) -+#define NDIS_STATUS_NOT_INDICATING ((NDIS_STATUS)0xC0010013L) -+#define NDIS_STATUS_INVALID_LENGTH ((NDIS_STATUS)0xC0010014L) -+#define NDIS_STATUS_INVALID_DATA ((NDIS_STATUS)0xC0010015L) -+#define NDIS_STATUS_BUFFER_TOO_SHORT ((NDIS_STATUS)0xC0010016L) -+#define NDIS_STATUS_INVALID_OID ((NDIS_STATUS)0xC0010017L) -+#define NDIS_STATUS_ADAPTER_REMOVED ((NDIS_STATUS)0xC0010018L) -+#define NDIS_STATUS_UNSUPPORTED_MEDIA ((NDIS_STATUS)0xC0010019L) -+#define NDIS_STATUS_GROUP_ADDRESS_IN_USE ((NDIS_STATUS)0xC001001AL) -+#define NDIS_STATUS_FILE_NOT_FOUND ((NDIS_STATUS)0xC001001BL) -+#define NDIS_STATUS_ERROR_READING_FILE ((NDIS_STATUS)0xC001001CL) -+#define NDIS_STATUS_ALREADY_MAPPED ((NDIS_STATUS)0xC001001DL) -+#define NDIS_STATUS_RESOURCE_CONFLICT ((NDIS_STATUS)0xC001001EL) -+#define NDIS_STATUS_NO_CABLE ((NDIS_STATUS)0xC001001FL) -+ -+#define NDIS_STATUS_INVALID_SAP ((NDIS_STATUS)0xC0010020L) -+#define NDIS_STATUS_SAP_IN_USE ((NDIS_STATUS)0xC0010021L) -+#define NDIS_STATUS_INVALID_ADDRESS ((NDIS_STATUS)0xC0010022L) -+#define NDIS_STATUS_VC_NOT_ACTIVATED ((NDIS_STATUS)0xC0010023L) -+#define NDIS_STATUS_DEST_OUT_OF_ORDER ((NDIS_STATUS)0xC0010024L) /* cause 27 */ -+#define NDIS_STATUS_VC_NOT_AVAILABLE ((NDIS_STATUS)0xC0010025L) /* cause 35, 45 */ -+#define NDIS_STATUS_CELLRATE_NOT_AVAILABLE ((NDIS_STATUS)0xC0010026L) /* cause 37 */ -+#define NDIS_STATUS_INCOMPATABLE_QOS ((NDIS_STATUS)0xC0010027L) /* cause 49 */ -+#define NDIS_STATUS_AAL_PARAMS_UNSUPPORTED ((NDIS_STATUS)0xC0010028L) /* cause 93 */ -+#define NDIS_STATUS_NO_ROUTE_TO_DESTINATION ((NDIS_STATUS)0xC0010029L) /* cause 3 */ -+#endif /* #ifndef PLATFORM_WINDOWS */ -+ + +#ifndef OID_802_11_CAPABILITY + #define OID_802_11_CAPABILITY 0x0d010122 @@ -396372,143 +395310,13 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_ioctl.h linux-5.11.4-rtl8 +}; + +#if (defined(CONFIG_MP_INCLUDED) && defined(_RTW_MP_IOCTL_C_)) || \ -+ (defined(PLATFORM_WINDOWS) && defined(_RTW_IOCTL_RTL_C_)) ++ (defined(_RTW_IOCTL_RTL_C_)) +static NDIS_STATUS oid_null_function(struct oid_par_priv *poid_par_priv) +{ + return NDIS_STATUS_SUCCESS; +} +#endif + -+#ifdef PLATFORM_WINDOWS -+ -+int TranslateNdisPsToRtPs(IN NDIS_802_11_POWER_MODE ndisPsMode); -+ -+/* OID Handler for Segment 1 */ -+NDIS_STATUS oid_gen_supported_list_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_gen_hardware_status_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_gen_media_supported_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_gen_media_in_use_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_gen_maximum_lookahead_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_gen_maximum_frame_size_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_gen_link_speed_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_gen_transmit_buffer_space_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_gen_receive_buffer_space_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_gen_transmit_block_size_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_gen_receive_block_size_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_gen_vendor_id_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_gen_vendor_description_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_gen_current_packet_filter_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_gen_current_lookahead_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_gen_driver_version_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_gen_maximum_total_size_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_gen_protocol_options_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_gen_mac_options_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_gen_media_connect_status_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_gen_maximum_send_packets_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_gen_vendor_driver_version_hdl(struct oid_par_priv *poid_par_priv); -+ -+ -+/* OID Handler for Segment 2 */ -+NDIS_STATUS oid_gen_physical_medium_hdl(struct oid_par_priv *poid_par_priv); -+ -+/* OID Handler for Segment 3 */ -+NDIS_STATUS oid_gen_xmit_ok_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_gen_rcv_ok_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_gen_xmit_error_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_gen_rcv_error_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_gen_rcv_no_buffer_hdl(struct oid_par_priv *poid_par_priv); -+ -+ -+/* OID Handler for Segment 4 */ -+NDIS_STATUS oid_802_3_permanent_address_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_802_3_current_address_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_802_3_multicast_list_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_802_3_maximum_list_size_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_802_3_mac_options_hdl(struct oid_par_priv *poid_par_priv); -+ -+ -+ -+/* OID Handler for Segment 5 */ -+NDIS_STATUS oid_802_3_rcv_error_alignment_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_802_3_xmit_one_collision_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_802_3_xmit_more_collisions_hdl(struct oid_par_priv *poid_par_priv); -+ -+ -+/* OID Handler for Segment 6 */ -+NDIS_STATUS oid_802_3_xmit_deferred_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_802_3_xmit_max_collisions_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_802_3_rcv_overrun_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_802_3_xmit_underrun_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_802_3_xmit_heartbeat_failure_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_802_3_xmit_times_crs_lost_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_802_3_xmit_late_collisions_hdl(struct oid_par_priv *poid_par_priv); -+ -+ -+ -+/* OID Handler for Segment 7 */ -+NDIS_STATUS oid_pnp_capabilities_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_pnp_set_power_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_pnp_query_power_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_pnp_add_wake_up_pattern_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_pnp_remove_wake_up_pattern_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_pnp_wake_up_pattern_list_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_pnp_enable_wake_up_hdl(struct oid_par_priv *poid_par_priv); -+ -+ -+ -+/* OID Handler for Segment 8 */ -+NDIS_STATUS oid_802_11_bssid_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_802_11_ssid_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_802_11_infrastructure_mode_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_802_11_add_wep_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_802_11_remove_wep_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_802_11_disassociate_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_802_11_authentication_mode_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_802_11_privacy_filter_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_802_11_bssid_list_scan_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_802_11_encryption_status_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_802_11_reload_defaults_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_802_11_add_key_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_802_11_remove_key_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_802_11_association_information_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_802_11_test_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_802_11_media_stream_mode_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_802_11_capability_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_802_11_pmkid_hdl(struct oid_par_priv *poid_par_priv); -+ -+ -+ -+ -+ -+/* OID Handler for Segment 9 */ -+NDIS_STATUS oid_802_11_network_types_supported_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_802_11_network_type_in_use_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_802_11_tx_power_level_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_802_11_rssi_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_802_11_rssi_trigger_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_802_11_fragmentation_threshold_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_802_11_rts_threshold_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_802_11_number_of_antennas_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_802_11_rx_antenna_selected_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_802_11_tx_antenna_selected_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_802_11_supported_rates_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_802_11_desired_rates_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_802_11_configuration_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_802_11_power_mode_hdl(struct oid_par_priv *poid_par_priv); -+NDIS_STATUS oid_802_11_bssid_list_hdl(struct oid_par_priv *poid_par_priv); -+ -+ -+/* OID Handler for Segment 10 */ -+NDIS_STATUS oid_802_11_statistics_hdl(struct oid_par_priv *poid_par_priv); -+ -+ -+/* OID Handler for Segment ED */ -+NDIS_STATUS oid_rt_mh_vender_id_hdl(struct oid_par_priv *poid_par_priv); -+ -+void Set_802_3_MULTICAST_LIST(ADAPTER *pAdapter, UCHAR *MCListbuf, ULONG MCListlen, BOOLEAN bAcceptAllMulticast); -+ -+#endif/* end of PLATFORM_WINDOWS */ -+ +#if defined(PLATFORM_LINUX) && defined(CONFIG_WIRELESS_EXT) +extern struct iw_handler_def rtw_handlers_def; +#endif @@ -396541,38 +395349,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_ioctl.h linux-5.11.4-rtl8 +#endif + +#endif /* #ifndef __INC_CEINFO_ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_ioctl_query.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_ioctl_query.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtw_ioctl_query.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_ioctl_query.h 2021-03-07 18:16:17.090957755 +0200 -@@ -0,0 +1,25 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef _RTW_IOCTL_QUERY_H_ -+#define _RTW_IOCTL_QUERY_H_ -+ -+ -+#ifdef PLATFORM_WINDOWS -+u8 query_802_11_capability(_adapter *padapter, u8 *pucBuf, u32 *pulOutLen); -+u8 query_802_11_association_information(_adapter *padapter, PNDIS_802_11_ASSOCIATION_INFORMATION pAssocInfo); -+#endif -+ -+ -+#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_ioctl_rtl.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_ioctl_rtl.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtw_ioctl_rtl.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_ioctl_rtl.h 2021-03-07 18:16:17.090957755 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtw_ioctl_rtl.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_ioctl_rtl.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtw_ioctl_rtl.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_ioctl_rtl.h 2022-01-28 22:59:35.625654787 +0200 @@ -0,0 +1,75 @@ +/****************************************************************************** + * @@ -396649,10 +395428,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_ioctl_rtl.h linux-5.11.4- + + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_ioctl_set.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_ioctl_set.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtw_ioctl_set.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_ioctl_set.h 2021-03-07 18:16:17.090957755 +0200 -@@ -0,0 +1,67 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtw_ioctl_set.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_ioctl_set.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtw_ioctl_set.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_ioctl_set.h 2023-05-26 22:35:36.545136899 +0300 +@@ -0,0 +1,45 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. @@ -396679,28 +395458,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_ioctl_set.h linux-5.11.4- +} BSSIDInfo, *PBSSIDInfo; + + -+#ifdef PLATFORM_OS_XP -+typedef struct _NDIS_802_11_PMKID { -+ u32 Length; -+ u32 BSSIDInfoCount; -+ BSSIDInfo BSSIDInfo[1]; -+} NDIS_802_11_PMKID, *PNDIS_802_11_PMKID; -+#endif -+ -+ -+#ifdef PLATFORM_WINDOWS -+u8 rtw_set_802_11_reload_defaults(_adapter *padapter, NDIS_802_11_RELOAD_DEFAULTS reloadDefaults); -+u8 rtw_set_802_11_test(_adapter *padapter, NDIS_802_11_TEST *test); -+u8 rtw_set_802_11_pmkid(_adapter *pdapter, NDIS_802_11_PMKID *pmkid); -+ -+u8 rtw_pnp_set_power_sleep(_adapter *padapter); -+u8 rtw_pnp_set_power_wakeup(_adapter *padapter); -+ -+void rtw_pnp_resume_wk(void *context); -+void rtw_pnp_sleep_wk(void *context); -+ -+#endif -+ +u8 rtw_set_802_11_authentication_mode(_adapter *pdapter, NDIS_802_11_AUTHENTICATION_MODE authmode); +u8 rtw_set_802_11_bssid(_adapter *padapter, u8 *bssid); +u8 rtw_set_802_11_add_wep(_adapter *padapter, NDIS_802_11_WEP *wep); @@ -396720,10 +395477,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_ioctl_set.h linux-5.11.4- +int rtw_set_band(_adapter *adapter, u8 band); + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_io.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_io.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtw_io.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_io.h 2021-03-07 18:16:17.090957755 +0200 -@@ -0,0 +1,569 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtw_io.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_io.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtw_io.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_io.h 2023-05-26 22:35:36.545136899 +0300 +@@ -0,0 +1,548 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. @@ -396744,9 +395501,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_io.h linux-5.11.4-rtl8812 + +#define NUM_IOREQ 8 + -+#ifdef PLATFORM_WINDOWS -+ #define MAX_PROT_SZ 64 -+#endif +#ifdef PLATFORM_LINUX + #define MAX_PROT_SZ (64-16) +#endif @@ -396867,27 +395621,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_io.h linux-5.11.4-rtl8812 + u8 *pbuf; + _sema sema; + -+#ifdef PLATFORM_OS_CE -+#ifdef CONFIG_USB_HCI -+ /* URB handler for rtw_write_mem */ -+ USB_TRANSFER usb_transfer_write_mem; -+#endif -+#endif + + void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt); + u8 *cnxt; -+ -+#ifdef PLATFORM_OS_XP -+ PMDL pmdl; -+ PIRP pirp; -+ -+#ifdef CONFIG_SDIO_HCI -+ PSDBUS_REQUEST_PACKET sdrp; -+#endif -+ -+#endif -+ -+ +}; + +struct intf_hdl { @@ -397293,9 +396029,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_io.h linux-5.11.4-rtl8812 + rtw_read32(_a, _b) + +#endif /* _RTL8711_IO_H_ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_iol.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_iol.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtw_iol.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_iol.h 2021-03-07 18:16:17.090957755 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtw_iol.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_iol.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtw_iol.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_iol.h 2022-01-28 22:59:35.625654787 +0200 @@ -0,0 +1,131 @@ +/****************************************************************************** + * @@ -397428,9 +396164,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_iol.h linux-5.11.4-rtl881 + + +#endif /* __RTW_IOL_H_ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_mcc.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_mcc.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtw_mcc.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_mcc.h 2021-03-07 18:16:17.090957755 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtw_mcc.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_mcc.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtw_mcc.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_mcc.h 2022-01-28 22:59:35.625654787 +0200 @@ -0,0 +1,271 @@ +/****************************************************************************** + * @@ -397703,9 +396439,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_mcc.h linux-5.11.4-rtl881 +u8 rtw_set_mcc_duration_cmd(_adapter *adapter, u8 type, u8 val); +#endif /* _RTW_MCC_H_ */ +#endif /* CONFIG_MCC_MODE */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_mem.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_mem.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtw_mem.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_mem.h 2021-03-07 18:16:17.090957755 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtw_mem.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_mem.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtw_mem.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_mem.h 2022-01-28 22:59:35.625654787 +0200 @@ -0,0 +1,36 @@ +/****************************************************************************** + * @@ -397743,9 +396479,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_mem.h linux-5.11.4-rtl881 + + +#endif /* __RTW_MEM_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_mi.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_mi.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtw_mi.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_mi.h 2021-03-07 18:16:17.090957755 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtw_mi.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_mi.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtw_mi.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_mi.h 2022-01-28 22:59:35.625654787 +0200 @@ -0,0 +1,306 @@ +/****************************************************************************** + * @@ -398053,9 +396789,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_mi.h linux-5.11.4-rtl8812 +void rtw_mi_update_ap_bmc_camid(_adapter *padapter, u8 camid_a, u8 camid_b); + +#endif /*__RTW_MI_H_*/ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_mlme_ext.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_mlme_ext.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtw_mlme_ext.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_mlme_ext.h 2021-03-07 18:16:17.090957755 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtw_mlme_ext.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_mlme_ext.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtw_mlme_ext.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_mlme_ext.h 2022-01-28 22:59:35.626654834 +0200 @@ -0,0 +1,1311 @@ +/****************************************************************************** + * @@ -399368,9 +398104,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_mlme_ext.h linux-5.11.4-r +#endif/* _RTW_MLME_EXT_C_ */ + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_mlme.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_mlme.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtw_mlme.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_mlme.h 2021-03-07 18:16:17.090957755 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtw_mlme.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_mlme.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtw_mlme.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_mlme.h 2022-01-28 22:59:35.625654787 +0200 @@ -0,0 +1,1427 @@ +/****************************************************************************** + * @@ -400799,10 +399535,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_mlme.h linux-5.11.4-rtl88 +#define GET_TCP_CWR(_tcphdr) BE_BITS_TO_1BYTE(((u8 *)(_tcphdr)) + 13, 7, 1) + +#endif /* __RTL871X_MLME_H_ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_mp.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_mp.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtw_mp.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_mp.h 2021-03-07 18:16:17.090957755 +0200 -@@ -0,0 +1,938 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtw_mp.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_mp.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtw_mp.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_mp.h 2022-12-18 17:40:24.575937030 +0200 +@@ -0,0 +1,894 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. @@ -400844,14 +399580,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_mp.h linux-5.11.4-rtl8812 + u8 *mem_addr; + u32 sz[8]; + -+#if defined(PLATFORM_OS_XP) || defined(PLATFORM_LINUX) ++#if defined(PLATFORM_LINUX) + PURB pxmit_urb[8]; +#endif + -+#ifdef PLATFORM_OS_XP -+ PIRP pxmit_irp[8]; -+#endif -+ + u8 bpending[8]; + sint ac_tag[8]; + sint last[8]; @@ -400871,21 +399603,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_mp.h linux-5.11.4-rtl8812 + +typedef void(*wi_act_func)(void *padapter); + -+#ifdef PLATFORM_WINDOWS -+struct mp_wi_cntx { -+ u8 bmpdrv_unload; -+ -+ /* Work Item */ -+ NDIS_WORK_ITEM mp_wi; -+ NDIS_EVENT mp_wi_evt; -+ _lock mp_wi_lock; -+ u8 bmp_wi_progress; -+ wi_act_func curractfunc; -+ /* Variable needed in each implementation of CurrActFunc. */ -+ struct mp_wiparam param; -+}; -+#endif -+ +struct mp_tx { + u8 stop; + u32 count, sended; @@ -401188,31 +399905,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_mp.h linux-5.11.4-rtl8812 + struct wlan_network mp_network; + NDIS_802_11_MAC_ADDRESS network_macaddr; + -+#ifdef PLATFORM_WINDOWS -+ u32 rx_testcnt; -+ u32 rx_testcnt1; -+ u32 rx_testcnt2; -+ u32 tx_testcnt; -+ u32 tx_testcnt1; -+ -+ struct mp_wi_cntx wi_cntx; -+ -+ u8 h2c_result; -+ u8 h2c_seqnum; -+ u16 h2c_cmdcode; -+ u8 h2c_resp_parambuf[512]; -+ _lock h2c_lock; -+ _lock wkitm_lock; -+ u32 h2c_cmdcnt; -+ NDIS_EVENT h2c_cmd_evt; -+ NDIS_EVENT c2h_set; -+ NDIS_EVENT h2c_clr; -+ NDIS_EVENT cpwm_int; -+ -+ NDIS_EVENT scsir_full_evt; -+ NDIS_EVENT scsiw_empty_evt; -+#endif -+ + u8 *pallocated_mp_xmitframe_buf; + u8 *pmp_xmtframe_buf; + _queue free_mp_xmitqueue; @@ -401741,10 +400433,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_mp.h linux-5.11.4-rtl8812 + struct iw_request_info *info, + struct iw_point *wrqu, char *extra); +#endif /* _RTW_MP_H_ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_mp_ioctl.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_mp_ioctl.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtw_mp_ioctl.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_mp_ioctl.h 2021-03-07 18:16:17.091957802 +0200 -@@ -0,0 +1,570 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtw_mp_ioctl.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_mp_ioctl.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtw_mp_ioctl.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_mp_ioctl.h 2023-05-26 22:35:36.545136899 +0300 +@@ -0,0 +1,553 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. @@ -401820,24 +400512,7 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_mp_ioctl.h linux-5.11.4-r +/* int mp_start_joinbss(_adapter *padapter, NDIS_802_11_SSID *pssid); */ + +/* void _irqlevel_changed_(_irqL *irqlevel, BOOLEANunsigned char bLower); */ -+#ifdef PLATFORM_OS_XP -+static void _irqlevel_changed_(_irqL *irqlevel, u8 bLower) -+{ -+ -+ if (bLower == LOWER) { -+ *irqlevel = KeGetCurrentIrql(); -+ -+ if (*irqlevel > PASSIVE_LEVEL) -+ KeLowerIrql(PASSIVE_LEVEL); -+ } else { -+ if (KeGetCurrentIrql() == PASSIVE_LEVEL) -+ KeRaiseIrql(DISPATCH_LEVEL, irqlevel); -+ } -+ -+} -+#else +#define _irqlevel_changed_(a, b) -+#endif + +/* oid_rtl_seg_81_80_00 */ +NDIS_STATUS oid_rt_pro_set_data_rate_hdl(struct oid_par_priv *poid_par_priv); @@ -402315,9 +400990,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_mp_ioctl.h linux-5.11.4-r +#endif /* _RTW_MP_IOCTL_C_ */ + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_mp_phy_regdef.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_mp_phy_regdef.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtw_mp_phy_regdef.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_mp_phy_regdef.h 2021-03-07 18:16:17.091957802 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtw_mp_phy_regdef.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_mp_phy_regdef.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtw_mp_phy_regdef.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_mp_phy_regdef.h 2022-01-28 22:59:35.626654834 +0200 @@ -0,0 +1,1094 @@ +/****************************************************************************** + * @@ -403413,9 +402088,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_mp_phy_regdef.h linux-5.1 + + +#endif /* __INC_HAL8192SPHYREG_H */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_odm.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_odm.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtw_odm.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_odm.h 2021-03-07 18:16:17.091957802 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtw_odm.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_odm.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtw_odm.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_odm.h 2022-01-28 22:59:35.626654834 +0200 @@ -0,0 +1,97 @@ +/****************************************************************************** + * @@ -403514,9 +402189,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_odm.h linux-5.11.4-rtl881 +void rtw_odm_parse_rx_phy_status_chinfo(union recv_frame *rframe, u8 *phys); + +#endif /* __RTW_ODM_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_p2p.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_p2p.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtw_p2p.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_p2p.h 2021-03-07 18:16:17.091957802 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtw_p2p.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_p2p.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtw_p2p.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_p2p.h 2022-01-28 22:59:35.626654834 +0200 @@ -0,0 +1,169 @@ +/****************************************************************************** + * @@ -403687,9 +402362,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_p2p.h linux-5.11.4-rtl881 +#endif /* CONFIG_P2P */ + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_pwrctrl.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_pwrctrl.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtw_pwrctrl.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_pwrctrl.h 2021-03-07 18:16:17.091957802 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtw_pwrctrl.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_pwrctrl.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtw_pwrctrl.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_pwrctrl.h 2022-01-28 22:59:35.626654834 +0200 @@ -0,0 +1,609 @@ +/****************************************************************************** + * @@ -404300,9 +402975,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_pwrctrl.h linux-5.11.4-rt +void rtw_ssmps_enter(_adapter *adapter, struct sta_info *sta); +void rtw_ssmps_leave(_adapter *adapter, struct sta_info *sta); +#endif /* __RTL871X_PWRCTRL_H_ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_qos.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_qos.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtw_qos.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_qos.h 2021-03-07 18:16:17.091957802 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtw_qos.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_qos.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtw_qos.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_qos.h 2022-01-28 22:59:35.626654834 +0200 @@ -0,0 +1,66 @@ +/****************************************************************************** + * @@ -404371,10 +403046,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_qos.h linux-5.11.4-rtl881 + +#endif /* _RTL871X_QOS_H_ */ \ Ingen nyrad vid filslut -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_recv.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_recv.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtw_recv.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_recv.h 2021-03-07 18:16:17.091957802 +0200 -@@ -0,0 +1,886 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtw_recv.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_recv.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtw_recv.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_recv.h 2023-05-26 22:35:36.545136899 +0300 +@@ -0,0 +1,852 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. @@ -404396,19 +403071,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_recv.h linux-5.11.4-rtl88 +#define RTW_RX_MSDU_ACT_INDICATE BIT0 +#define RTW_RX_MSDU_ACT_FORWARD BIT1 + -+#ifdef PLATFORM_OS_XP -+ #ifdef CONFIG_SDIO_HCI -+ #define NR_RECVBUFF 1024/* 512 */ /* 128 */ -+ #else -+ #define NR_RECVBUFF (16) -+ #endif -+#elif defined(PLATFORM_OS_CE) -+ #ifdef CONFIG_SDIO_HCI -+ #define NR_RECVBUFF (128) -+ #else -+ #define NR_RECVBUFF (4) -+ #endif -+#else /* PLATFORM_LINUX /PLATFORM_BSD */ + +#include + @@ -404432,7 +403094,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_recv.h linux-5.11.4-rtl88 + #ifdef CONFIG_RTW_NAPI + #define RTL_NAPI_WEIGHT (32) + #endif -+#endif + +#if defined(CONFIG_RTL8821C) && defined(CONFIG_SDIO_HCI) && defined(CONFIG_RECV_THREAD_MODE) + #ifdef NR_RECVBUFF @@ -404731,17 +403392,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_recv.h linux-5.11.4-rtl88 + + _adapter *adapter; + -+#ifdef PLATFORM_WINDOWS -+ _nic_hdl RxPktPoolHdl; -+ _nic_hdl RxBufPoolHdl; -+ -+#ifdef PLATFORM_OS_XP -+ PMDL pbytecnt_mdl; -+#endif -+ uint counter; /* record the number that up-layer will return to drv; only when counter==0 can we release recv_priv */ -+ NDIS_EVENT recv_resource_evt ; -+#endif -+ + + u32 is_any_non_be_pkts; + @@ -404910,20 +403560,11 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_recv.h linux-5.11.4-rtl88 + +#ifdef CONFIG_USB_HCI + -+#if defined(PLATFORM_OS_XP) || defined(PLATFORM_LINUX) || defined(PLATFORM_FREEBSD) ++#if defined(PLATFORM_LINUX) || defined(PLATFORM_FREEBSD) + PURB purb; + dma_addr_t dma_transfer_addr; /* (in) dma addr for transfer_buffer */ + u32 alloc_sz; +#endif -+ -+#ifdef PLATFORM_OS_XP -+ PIRP pirp; -+#endif -+ -+#ifdef PLATFORM_OS_CE -+ USB_TRANSFER usb_transfer_read_port; -+#endif -+ + u8 irp_pending; + int transfer_len; + @@ -405261,9 +403902,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_recv.h linux-5.11.4-rtl88 +void count_rx_stats(_adapter *padapter, union recv_frame *prframe, struct sta_info *sta); + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_rf.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_rf.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtw_rf.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_rf.h 2021-03-07 18:16:17.091957802 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtw_rf.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_rf.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtw_rf.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_rf.h 2022-01-28 22:59:35.626654834 +0200 @@ -0,0 +1,240 @@ +/****************************************************************************** + * @@ -405505,9 +404146,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_rf.h linux-5.11.4-rtl8812 +bool rtw_is_long_cac_ch(u8 ch, u8 bw, u8 offset, u8 dfs_region); + +#endif /* _RTL8711_RF_H_ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_rm_fsm.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_rm_fsm.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtw_rm_fsm.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_rm_fsm.h 2021-03-07 18:16:17.091957802 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtw_rm_fsm.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_rm_fsm.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtw_rm_fsm.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_rm_fsm.h 2022-01-28 22:59:35.626654834 +0200 @@ -0,0 +1,389 @@ + +/****************************************************************************** @@ -405898,9 +404539,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_rm_fsm.h linux-5.11.4-rtl + +#endif /*CONFIG_RTW_80211K*/ +#endif /*__RTW_RM_FSM_H_*/ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_rm.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_rm.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtw_rm.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_rm.h 2021-03-07 18:16:17.091957802 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtw_rm.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_rm.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtw_rm.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_rm.h 2022-01-28 22:59:35.626654834 +0200 @@ -0,0 +1,88 @@ +/****************************************************************************** + * @@ -405990,9 +404631,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_rm.h linux-5.11.4-rtl8812 + +#endif /*CONFIG_RTW_80211K */ +#endif /* __RTW_RM_H_ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_rson.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_rson.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtw_rson.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_rson.h 2021-03-07 18:16:17.091957802 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtw_rson.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_rson.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtw_rson.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_rson.h 2022-01-28 22:59:35.626654834 +0200 @@ -0,0 +1,61 @@ +/****************************************************************************** + * @@ -406055,9 +404696,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_rson.h linux-5.11.4-rtl88 +u8 rtw_rson_scan_wk_cmd(_adapter *padapter, int op); +void rtw_rson_scan_cmd_hdl(_adapter *padapter, int op); +#endif /* __RTW_RSON_H_ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_sdio.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_sdio.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtw_sdio.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_sdio.h 2021-03-07 18:16:17.091957802 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtw_sdio.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_sdio.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtw_sdio.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_sdio.h 2022-01-28 22:59:35.626654834 +0200 @@ -0,0 +1,26 @@ +/****************************************************************************** + * @@ -406085,10 +404726,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_sdio.h linux-5.11.4-rtl88 +u8 rtw_sdio_f0_read(struct dvobj_priv *, u32 addr, void *buf, size_t len); + +#endif /* _RTW_SDIO_H_ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_security.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_security.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtw_security.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_security.h 2021-03-07 18:16:17.091957802 +0200 -@@ -0,0 +1,502 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtw_security.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_security.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtw_security.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_security.h 2023-05-26 22:35:36.545136899 +0300 +@@ -0,0 +1,499 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. @@ -406285,9 +404926,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_security.h linux-5.11.4-r + u32 ndisencryptstatus; /* NDIS_802_11_ENCRYPTION_STATUS */ + + NDIS_802_11_WEP ndiswep; -+#ifdef PLATFORM_WINDOWS -+ u8 KeyMaterial[16];/* variable length depending on above field. */ -+#endif + + u8 assoc_info[600]; + u8 szofcapability[256]; /* for wpa2 usage */ @@ -406591,9 +405229,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_security.h linux-5.11.4-r + ((a)->securitypriv.auth_type == (s)) + +#endif /* __RTL871X_SECURITY_H_ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_sreset.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_sreset.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtw_sreset.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_sreset.h 2021-03-07 18:16:17.091957802 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtw_sreset.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_sreset.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtw_sreset.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_sreset.h 2022-01-28 22:59:35.627654881 +0200 @@ -0,0 +1,66 @@ +/****************************************************************************** + * @@ -406661,9 +405299,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_sreset.h linux-5.11.4-rtl +void sreset_reset(_adapter *padapter); + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_tdls.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_tdls.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtw_tdls.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_tdls.h 2021-03-07 18:16:17.091957802 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtw_tdls.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_tdls.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtw_tdls.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_tdls.h 2022-01-28 22:59:35.627654881 +0200 @@ -0,0 +1,185 @@ +/****************************************************************************** + * @@ -406850,9 +405488,194 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_tdls.h linux-5.11.4-rtl88 +#endif /* CONFIG_TDLS */ + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_wapi.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_wapi.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtw_wapi.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_wapi.h 2021-03-07 18:16:17.091957802 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtw_version.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_version.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtw_version.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_version.h 2022-01-28 22:59:35.627654881 +0200 +@@ -0,0 +1 @@ ++#define DRIVERVERSION "v5.6.4.2_35491.20191025" +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtw_vht.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_vht.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtw_vht.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_vht.h 2022-01-28 22:59:35.627654881 +0200 +@@ -0,0 +1,176 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2017 Realtek Corporation. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ *****************************************************************************/ ++#ifndef _RTW_VHT_H_ ++#define _RTW_VHT_H_ ++ ++#define VHT_CAP_IE_LEN 12 ++#define VHT_OP_IE_LEN 5 ++ ++#define LDPC_VHT_ENABLE_RX BIT0 ++#define LDPC_VHT_ENABLE_TX BIT1 ++#define LDPC_VHT_TEST_TX_ENABLE BIT2 ++#define LDPC_VHT_CAP_TX BIT3 ++ ++#define STBC_VHT_ENABLE_RX BIT0 ++#define STBC_VHT_ENABLE_TX BIT1 ++#define STBC_VHT_TEST_TX_ENABLE BIT2 ++#define STBC_VHT_CAP_TX BIT3 ++ ++/* VHT capability info */ ++#define SET_VHT_CAPABILITY_ELE_MAX_MPDU_LENGTH(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 0, 2, _val) ++#define SET_VHT_CAPABILITY_ELE_CHL_WIDTH(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 2, 2, _val) ++#define SET_VHT_CAPABILITY_ELE_RX_LDPC(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 4, 1, _val) ++#define SET_VHT_CAPABILITY_ELE_SHORT_GI80M(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 5, 1, _val) ++#define SET_VHT_CAPABILITY_ELE_SHORT_GI160M(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 6, 1, _val) ++#define SET_VHT_CAPABILITY_ELE_TX_STBC(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 7, 1, _val) ++#define SET_VHT_CAPABILITY_ELE_RX_STBC(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+1, 0, 3, _val) ++#define SET_VHT_CAPABILITY_ELE_SU_BFER(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+1, 3, 1, _val) ++#define SET_VHT_CAPABILITY_ELE_SU_BFEE(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+1, 4, 1, _val) ++#define SET_VHT_CAPABILITY_ELE_BFER_ANT_SUPP(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+1, 5, 3, _val) ++#define SET_VHT_CAPABILITY_ELE_SOUNDING_DIMENSIONS(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+2, 0, 3, _val) ++ ++#define SET_VHT_CAPABILITY_ELE_MU_BFER(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+2, 3, 1, _val) ++#define SET_VHT_CAPABILITY_ELE_MU_BFEE(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+2, 4, 1, _val) ++#define SET_VHT_CAPABILITY_ELE_TXOP_PS(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+2, 5, 1, _val) ++#define SET_VHT_CAPABILITY_ELE_HTC_VHT(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+2, 6, 1, _val) ++#define SET_VHT_CAPABILITY_ELE_MAX_RXAMPDU_FACTOR(_pEleStart, _val) SET_BITS_TO_LE_2BYTE((_pEleStart)+2, 7, 3, _val) /* B23~B25 */ ++#define SET_VHT_CAPABILITY_ELE_LINK_ADAPTION(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+2, 2, 2, _val) ++#define SET_VHT_CAPABILITY_ELE_MCS_RX_MAP(_pEleStart, _val) SET_BITS_TO_LE_2BYTE((_pEleStart)+4, 0, 16, _val) /* B0~B15 indicate Rx MCS MAP, we write 0 to indicate MCS0~7. by page */ ++#define SET_VHT_CAPABILITY_ELE_MCS_RX_HIGHEST_RATE(_pEleStart, _val) SET_BITS_TO_LE_2BYTE((_pEleStart)+6, 0, 13, _val) ++#define SET_VHT_CAPABILITY_ELE_MCS_TX_MAP(_pEleStart, _val) SET_BITS_TO_LE_2BYTE((_pEleStart)+8, 0, 16, _val) /* B0~B15 indicate Tx MCS MAP, we write 0 to indicate MCS0~7. by page */ ++#define SET_VHT_CAPABILITY_ELE_MCS_TX_HIGHEST_RATE(_pEleStart, _val) SET_BITS_TO_LE_2BYTE((_pEleStart)+10, 0, 13, _val) ++ ++ ++#define GET_VHT_CAPABILITY_ELE_MAX_MPDU_LENGTH(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 0, 2) ++#define GET_VHT_CAPABILITY_ELE_CHL_WIDTH(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 2, 2) ++#define GET_VHT_CAPABILITY_ELE_RX_LDPC(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 4, 1) ++#define GET_VHT_CAPABILITY_ELE_SHORT_GI80M(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 5, 1) ++#define GET_VHT_CAPABILITY_ELE_SHORT_GI160M(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 6, 1) ++#define GET_VHT_CAPABILITY_ELE_TX_STBC(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 7, 1) ++#define GET_VHT_CAPABILITY_ELE_RX_STBC(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+1, 0, 3) ++#define GET_VHT_CAPABILITY_ELE_SU_BFER(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+1, 3, 1) ++#define GET_VHT_CAPABILITY_ELE_SU_BFEE(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+1, 4, 1) ++/*phydm-beamforming*/ ++#define GET_VHT_CAPABILITY_ELE_SU_BFEE_STS_CAP(_pEleStart) LE_BITS_TO_2BYTE((_pEleStart)+1, 5, 3) ++#define GET_VHT_CAPABILITY_ELE_SU_BFER_SOUND_DIM_NUM(_pEleStart) LE_BITS_TO_2BYTE((_pEleStart)+2, 0, 3) ++#define GET_VHT_CAPABILITY_ELE_MU_BFER(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+2, 3, 1) ++#define GET_VHT_CAPABILITY_ELE_MU_BFEE(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+2, 4, 1) ++#define GET_VHT_CAPABILITY_ELE_TXOP_PS(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+2, 5, 1) ++#define GET_VHT_CAPABILITY_ELE_MAX_RXAMPDU_FACTOR(_pEleStart) LE_BITS_TO_2BYTE((_pEleStart)+2, 7, 3) ++#define GET_VHT_CAPABILITY_ELE_RX_MCS(_pEleStart) ((_pEleStart)+4) ++#define GET_VHT_CAPABILITY_ELE_MCS_RX_HIGHEST_RATE(_pEleStart) LE_BITS_TO_2BYTE((_pEleStart)+6, 0, 13) ++#define GET_VHT_CAPABILITY_ELE_TX_MCS(_pEleStart) ((_pEleStart)+8) ++#define GET_VHT_CAPABILITY_ELE_MCS_TX_HIGHEST_RATE(_pEleStart) LE_BITS_TO_2BYTE((_pEleStart)+10, 0, 13) ++ ++ ++/* VHT Operation Information Element */ ++#define SET_VHT_OPERATION_ELE_CHL_WIDTH(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 0, 8, _val) ++#define SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ1(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart+1, 0, 8, _val) ++#define SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ2(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart+2, 0, 8, _val) ++#define SET_VHT_OPERATION_ELE_BASIC_MCS_SET(_pEleStart, _val) SET_BITS_TO_LE_2BYTE((_pEleStart)+3, 0, 16, _val) ++ ++#define GET_VHT_OPERATION_ELE_CHL_WIDTH(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 0, 8) ++#define GET_VHT_OPERATION_ELE_CENTER_FREQ1(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+1, 0, 8) ++#define GET_VHT_OPERATION_ELE_CENTER_FREQ2(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+2, 0, 8) ++ ++/* VHT Operating Mode */ ++#define SET_VHT_OPERATING_MODE_FIELD_CHNL_WIDTH(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 0, 2, _val) ++#define SET_VHT_OPERATING_MODE_FIELD_RX_NSS(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 4, 3, _val) ++#define SET_VHT_OPERATING_MODE_FIELD_RX_NSS_TYPE(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 7, 1, _val) ++#define GET_VHT_OPERATING_MODE_FIELD_CHNL_WIDTH(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 0, 2) ++#define GET_VHT_OPERATING_MODE_FIELD_RX_NSS(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 4, 3) ++#define GET_VHT_OPERATING_MODE_FIELD_RX_NSS_TYPE(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 7, 1) ++ ++#define SET_EXT_CAPABILITY_ELE_OP_MODE_NOTIF(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+7, 6, 1, _val) ++#define GET_EXT_CAPABILITY_ELE_OP_MODE_NOTIF(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+7, 6, 1) ++ ++#define VHT_MAX_MPDU_LEN_MAX 3 ++extern const u16 _vht_max_mpdu_len[]; ++#define vht_max_mpdu_len(val) (((val) >= VHT_MAX_MPDU_LEN_MAX) ? _vht_max_mpdu_len[VHT_MAX_MPDU_LEN_MAX] : _vht_max_mpdu_len[(val)]) ++ ++#define VHT_SUP_CH_WIDTH_SET_MAX 3 ++extern const u8 _vht_sup_ch_width_set_to_bw_cap[]; ++#define vht_sup_ch_width_set_to_bw_cap(set) (((set) >= VHT_SUP_CH_WIDTH_SET_MAX) ? _vht_sup_ch_width_set_to_bw_cap[VHT_SUP_CH_WIDTH_SET_MAX] : _vht_sup_ch_width_set_to_bw_cap[(set)]) ++extern const char *const _vht_sup_ch_width_set_str[]; ++#define vht_sup_ch_width_set_str(set) (((set) >= VHT_SUP_CH_WIDTH_SET_MAX) ? _vht_sup_ch_width_set_str[VHT_SUP_CH_WIDTH_SET_MAX] : _vht_sup_ch_width_set_str[(set)]) ++ ++#define VHT_MAX_AMPDU_LEN(f) ((1 << (13 + f)) - 1) ++void dump_vht_cap_ie(void *sel, const u8 *ie, u32 ie_len); ++ ++#define VHT_OP_CH_WIDTH_MAX 4 ++extern const char *const _vht_op_ch_width_str[]; ++#define vht_op_ch_width_str(ch_width) (((ch_width) >= VHT_OP_CH_WIDTH_MAX) ? _vht_op_ch_width_str[VHT_OP_CH_WIDTH_MAX] : _vht_op_ch_width_str[(ch_width)]) ++ ++void dump_vht_op_ie(void *sel, const u8 *ie, u32 ie_len); ++ ++struct vht_priv { ++ u8 vht_option; ++ ++ u8 ldpc_cap; ++ u8 stbc_cap; ++ u16 beamform_cap; ++ u8 ap_is_mu_bfer; ++ ++ u8 sgi_80m;/* short GI */ ++ u8 ampdu_len; ++ ++ u8 vht_highest_rate; ++ u8 vht_mcs_map[2]; ++ ++ u8 op_present:1; /* vht_op is present */ ++ u8 notify_present:1; /* vht_op_mode_notify is present */ ++ ++ u8 vht_cap[32]; ++ u8 vht_op[VHT_OP_IE_LEN]; ++ u8 vht_op_mode_notify; ++}; ++ ++#ifdef ROKU_PRIVATE ++struct vht_priv_infra_ap { ++ ++ /* Infra mode, only store for AP's info, not intersection of STA and AP*/ ++ u8 ldpc_cap_infra_ap; ++ u8 stbc_cap_infra_ap; ++ u16 beamform_cap_infra_ap; ++ u8 vht_mcs_map_infra_ap[2]; ++ u8 vht_mcs_map_tx_infra_ap[2]; ++ u8 channel_width_infra_ap; ++ u8 number_of_streams_infra_ap; ++}; ++#endif /* ROKU_PRIVATE */ ++ ++u8 rtw_get_vht_highest_rate(u8 *pvht_mcs_map); ++u16 rtw_vht_mcs_to_data_rate(u8 bw, u8 short_GI, u8 vht_mcs_rate); ++u64 rtw_vht_mcs_map_to_bitmap(u8 *mcs_map, u8 nss); ++void rtw_vht_use_default_setting(_adapter *padapter); ++u32 rtw_build_vht_operation_ie(_adapter *padapter, u8 *pbuf, u8 channel); ++u32 rtw_build_vht_op_mode_notify_ie(_adapter *padapter, u8 *pbuf, u8 bw); ++u32 rtw_build_vht_cap_ie(_adapter *padapter, u8 *pbuf); ++void update_sta_vht_info_apmode(_adapter *padapter, PVOID psta); ++void update_hw_vht_param(_adapter *padapter); ++void VHT_caps_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE); ++#ifdef ROKU_PRIVATE ++void VHT_caps_handler_infra_ap(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE); ++#endif /* ROKU_PRIVATE */ ++void VHT_operation_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE); ++void rtw_process_vht_op_mode_notify(_adapter *padapter, u8 *pframe, PVOID sta); ++u32 rtw_restructure_vht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, uint in_len, uint *pout_len); ++void VHTOnAssocRsp(_adapter *padapter); ++u8 rtw_vht_mcsmap_to_nss(u8 *pvht_mcs_map); ++void rtw_vht_nss_to_mcsmap(u8 nss, u8 *target_mcs_map, u8 *cur_mcs_map); ++void rtw_vht_ies_attach(_adapter *padapter, WLAN_BSSID_EX *pcur_network); ++void rtw_vht_ies_detach(_adapter *padapter, WLAN_BSSID_EX *pcur_network); ++void rtw_check_for_vht20(_adapter *adapter, u8 *ies, int ies_len); ++#endif /* _RTW_VHT_H_ */ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtw_wapi.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_wapi.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtw_wapi.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_wapi.h 2022-01-28 22:59:35.627654881 +0200 @@ -0,0 +1,230 @@ +/****************************************************************************** + * @@ -407084,194 +405907,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_wapi.h linux-5.11.4-rtl88 +void rtw_wapi_set_set_encryption(_adapter *padapter, struct ieee_param *param); + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_version.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_version.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtw_version.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_version.h 2021-03-07 18:16:17.091957802 +0200 -@@ -0,0 +1 @@ -+#define DRIVERVERSION "v5.6.4.2_35491.20191025" -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_vht.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_vht.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtw_vht.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_vht.h 2021-03-07 18:16:17.091957802 +0200 -@@ -0,0 +1,176 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef _RTW_VHT_H_ -+#define _RTW_VHT_H_ -+ -+#define VHT_CAP_IE_LEN 12 -+#define VHT_OP_IE_LEN 5 -+ -+#define LDPC_VHT_ENABLE_RX BIT0 -+#define LDPC_VHT_ENABLE_TX BIT1 -+#define LDPC_VHT_TEST_TX_ENABLE BIT2 -+#define LDPC_VHT_CAP_TX BIT3 -+ -+#define STBC_VHT_ENABLE_RX BIT0 -+#define STBC_VHT_ENABLE_TX BIT1 -+#define STBC_VHT_TEST_TX_ENABLE BIT2 -+#define STBC_VHT_CAP_TX BIT3 -+ -+/* VHT capability info */ -+#define SET_VHT_CAPABILITY_ELE_MAX_MPDU_LENGTH(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 0, 2, _val) -+#define SET_VHT_CAPABILITY_ELE_CHL_WIDTH(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 2, 2, _val) -+#define SET_VHT_CAPABILITY_ELE_RX_LDPC(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 4, 1, _val) -+#define SET_VHT_CAPABILITY_ELE_SHORT_GI80M(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 5, 1, _val) -+#define SET_VHT_CAPABILITY_ELE_SHORT_GI160M(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 6, 1, _val) -+#define SET_VHT_CAPABILITY_ELE_TX_STBC(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 7, 1, _val) -+#define SET_VHT_CAPABILITY_ELE_RX_STBC(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+1, 0, 3, _val) -+#define SET_VHT_CAPABILITY_ELE_SU_BFER(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+1, 3, 1, _val) -+#define SET_VHT_CAPABILITY_ELE_SU_BFEE(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+1, 4, 1, _val) -+#define SET_VHT_CAPABILITY_ELE_BFER_ANT_SUPP(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+1, 5, 3, _val) -+#define SET_VHT_CAPABILITY_ELE_SOUNDING_DIMENSIONS(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+2, 0, 3, _val) -+ -+#define SET_VHT_CAPABILITY_ELE_MU_BFER(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+2, 3, 1, _val) -+#define SET_VHT_CAPABILITY_ELE_MU_BFEE(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+2, 4, 1, _val) -+#define SET_VHT_CAPABILITY_ELE_TXOP_PS(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+2, 5, 1, _val) -+#define SET_VHT_CAPABILITY_ELE_HTC_VHT(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+2, 6, 1, _val) -+#define SET_VHT_CAPABILITY_ELE_MAX_RXAMPDU_FACTOR(_pEleStart, _val) SET_BITS_TO_LE_2BYTE((_pEleStart)+2, 7, 3, _val) /* B23~B25 */ -+#define SET_VHT_CAPABILITY_ELE_LINK_ADAPTION(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+2, 2, 2, _val) -+#define SET_VHT_CAPABILITY_ELE_MCS_RX_MAP(_pEleStart, _val) SET_BITS_TO_LE_2BYTE((_pEleStart)+4, 0, 16, _val) /* B0~B15 indicate Rx MCS MAP, we write 0 to indicate MCS0~7. by page */ -+#define SET_VHT_CAPABILITY_ELE_MCS_RX_HIGHEST_RATE(_pEleStart, _val) SET_BITS_TO_LE_2BYTE((_pEleStart)+6, 0, 13, _val) -+#define SET_VHT_CAPABILITY_ELE_MCS_TX_MAP(_pEleStart, _val) SET_BITS_TO_LE_2BYTE((_pEleStart)+8, 0, 16, _val) /* B0~B15 indicate Tx MCS MAP, we write 0 to indicate MCS0~7. by page */ -+#define SET_VHT_CAPABILITY_ELE_MCS_TX_HIGHEST_RATE(_pEleStart, _val) SET_BITS_TO_LE_2BYTE((_pEleStart)+10, 0, 13, _val) -+ -+ -+#define GET_VHT_CAPABILITY_ELE_MAX_MPDU_LENGTH(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 0, 2) -+#define GET_VHT_CAPABILITY_ELE_CHL_WIDTH(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 2, 2) -+#define GET_VHT_CAPABILITY_ELE_RX_LDPC(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 4, 1) -+#define GET_VHT_CAPABILITY_ELE_SHORT_GI80M(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 5, 1) -+#define GET_VHT_CAPABILITY_ELE_SHORT_GI160M(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 6, 1) -+#define GET_VHT_CAPABILITY_ELE_TX_STBC(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 7, 1) -+#define GET_VHT_CAPABILITY_ELE_RX_STBC(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+1, 0, 3) -+#define GET_VHT_CAPABILITY_ELE_SU_BFER(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+1, 3, 1) -+#define GET_VHT_CAPABILITY_ELE_SU_BFEE(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+1, 4, 1) -+/*phydm-beamforming*/ -+#define GET_VHT_CAPABILITY_ELE_SU_BFEE_STS_CAP(_pEleStart) LE_BITS_TO_2BYTE((_pEleStart)+1, 5, 3) -+#define GET_VHT_CAPABILITY_ELE_SU_BFER_SOUND_DIM_NUM(_pEleStart) LE_BITS_TO_2BYTE((_pEleStart)+2, 0, 3) -+#define GET_VHT_CAPABILITY_ELE_MU_BFER(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+2, 3, 1) -+#define GET_VHT_CAPABILITY_ELE_MU_BFEE(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+2, 4, 1) -+#define GET_VHT_CAPABILITY_ELE_TXOP_PS(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+2, 5, 1) -+#define GET_VHT_CAPABILITY_ELE_MAX_RXAMPDU_FACTOR(_pEleStart) LE_BITS_TO_2BYTE((_pEleStart)+2, 7, 3) -+#define GET_VHT_CAPABILITY_ELE_RX_MCS(_pEleStart) ((_pEleStart)+4) -+#define GET_VHT_CAPABILITY_ELE_MCS_RX_HIGHEST_RATE(_pEleStart) LE_BITS_TO_2BYTE((_pEleStart)+6, 0, 13) -+#define GET_VHT_CAPABILITY_ELE_TX_MCS(_pEleStart) ((_pEleStart)+8) -+#define GET_VHT_CAPABILITY_ELE_MCS_TX_HIGHEST_RATE(_pEleStart) LE_BITS_TO_2BYTE((_pEleStart)+10, 0, 13) -+ -+ -+/* VHT Operation Information Element */ -+#define SET_VHT_OPERATION_ELE_CHL_WIDTH(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 0, 8, _val) -+#define SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ1(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart+1, 0, 8, _val) -+#define SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ2(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart+2, 0, 8, _val) -+#define SET_VHT_OPERATION_ELE_BASIC_MCS_SET(_pEleStart, _val) SET_BITS_TO_LE_2BYTE((_pEleStart)+3, 0, 16, _val) -+ -+#define GET_VHT_OPERATION_ELE_CHL_WIDTH(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 0, 8) -+#define GET_VHT_OPERATION_ELE_CENTER_FREQ1(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+1, 0, 8) -+#define GET_VHT_OPERATION_ELE_CENTER_FREQ2(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+2, 0, 8) -+ -+/* VHT Operating Mode */ -+#define SET_VHT_OPERATING_MODE_FIELD_CHNL_WIDTH(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 0, 2, _val) -+#define SET_VHT_OPERATING_MODE_FIELD_RX_NSS(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 4, 3, _val) -+#define SET_VHT_OPERATING_MODE_FIELD_RX_NSS_TYPE(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 7, 1, _val) -+#define GET_VHT_OPERATING_MODE_FIELD_CHNL_WIDTH(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 0, 2) -+#define GET_VHT_OPERATING_MODE_FIELD_RX_NSS(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 4, 3) -+#define GET_VHT_OPERATING_MODE_FIELD_RX_NSS_TYPE(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 7, 1) -+ -+#define SET_EXT_CAPABILITY_ELE_OP_MODE_NOTIF(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+7, 6, 1, _val) -+#define GET_EXT_CAPABILITY_ELE_OP_MODE_NOTIF(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+7, 6, 1) -+ -+#define VHT_MAX_MPDU_LEN_MAX 3 -+extern const u16 _vht_max_mpdu_len[]; -+#define vht_max_mpdu_len(val) (((val) >= VHT_MAX_MPDU_LEN_MAX) ? _vht_max_mpdu_len[VHT_MAX_MPDU_LEN_MAX] : _vht_max_mpdu_len[(val)]) -+ -+#define VHT_SUP_CH_WIDTH_SET_MAX 3 -+extern const u8 _vht_sup_ch_width_set_to_bw_cap[]; -+#define vht_sup_ch_width_set_to_bw_cap(set) (((set) >= VHT_SUP_CH_WIDTH_SET_MAX) ? _vht_sup_ch_width_set_to_bw_cap[VHT_SUP_CH_WIDTH_SET_MAX] : _vht_sup_ch_width_set_to_bw_cap[(set)]) -+extern const char *const _vht_sup_ch_width_set_str[]; -+#define vht_sup_ch_width_set_str(set) (((set) >= VHT_SUP_CH_WIDTH_SET_MAX) ? _vht_sup_ch_width_set_str[VHT_SUP_CH_WIDTH_SET_MAX] : _vht_sup_ch_width_set_str[(set)]) -+ -+#define VHT_MAX_AMPDU_LEN(f) ((1 << (13 + f)) - 1) -+void dump_vht_cap_ie(void *sel, const u8 *ie, u32 ie_len); -+ -+#define VHT_OP_CH_WIDTH_MAX 4 -+extern const char *const _vht_op_ch_width_str[]; -+#define vht_op_ch_width_str(ch_width) (((ch_width) >= VHT_OP_CH_WIDTH_MAX) ? _vht_op_ch_width_str[VHT_OP_CH_WIDTH_MAX] : _vht_op_ch_width_str[(ch_width)]) -+ -+void dump_vht_op_ie(void *sel, const u8 *ie, u32 ie_len); -+ -+struct vht_priv { -+ u8 vht_option; -+ -+ u8 ldpc_cap; -+ u8 stbc_cap; -+ u16 beamform_cap; -+ u8 ap_is_mu_bfer; -+ -+ u8 sgi_80m;/* short GI */ -+ u8 ampdu_len; -+ -+ u8 vht_highest_rate; -+ u8 vht_mcs_map[2]; -+ -+ u8 op_present:1; /* vht_op is present */ -+ u8 notify_present:1; /* vht_op_mode_notify is present */ -+ -+ u8 vht_cap[32]; -+ u8 vht_op[VHT_OP_IE_LEN]; -+ u8 vht_op_mode_notify; -+}; -+ -+#ifdef ROKU_PRIVATE -+struct vht_priv_infra_ap { -+ -+ /* Infra mode, only store for AP's info, not intersection of STA and AP*/ -+ u8 ldpc_cap_infra_ap; -+ u8 stbc_cap_infra_ap; -+ u16 beamform_cap_infra_ap; -+ u8 vht_mcs_map_infra_ap[2]; -+ u8 vht_mcs_map_tx_infra_ap[2]; -+ u8 channel_width_infra_ap; -+ u8 number_of_streams_infra_ap; -+}; -+#endif /* ROKU_PRIVATE */ -+ -+u8 rtw_get_vht_highest_rate(u8 *pvht_mcs_map); -+u16 rtw_vht_mcs_to_data_rate(u8 bw, u8 short_GI, u8 vht_mcs_rate); -+u64 rtw_vht_mcs_map_to_bitmap(u8 *mcs_map, u8 nss); -+void rtw_vht_use_default_setting(_adapter *padapter); -+u32 rtw_build_vht_operation_ie(_adapter *padapter, u8 *pbuf, u8 channel); -+u32 rtw_build_vht_op_mode_notify_ie(_adapter *padapter, u8 *pbuf, u8 bw); -+u32 rtw_build_vht_cap_ie(_adapter *padapter, u8 *pbuf); -+void update_sta_vht_info_apmode(_adapter *padapter, PVOID psta); -+void update_hw_vht_param(_adapter *padapter); -+void VHT_caps_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE); -+#ifdef ROKU_PRIVATE -+void VHT_caps_handler_infra_ap(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE); -+#endif /* ROKU_PRIVATE */ -+void VHT_operation_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE); -+void rtw_process_vht_op_mode_notify(_adapter *padapter, u8 *pframe, PVOID sta); -+u32 rtw_restructure_vht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, uint in_len, uint *pout_len); -+void VHTOnAssocRsp(_adapter *padapter); -+u8 rtw_vht_mcsmap_to_nss(u8 *pvht_mcs_map); -+void rtw_vht_nss_to_mcsmap(u8 nss, u8 *target_mcs_map, u8 *cur_mcs_map); -+void rtw_vht_ies_attach(_adapter *padapter, WLAN_BSSID_EX *pcur_network); -+void rtw_vht_ies_detach(_adapter *padapter, WLAN_BSSID_EX *pcur_network); -+void rtw_check_for_vht20(_adapter *adapter, u8 *ies, int ies_len); -+#endif /* _RTW_VHT_H_ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_wifi_regd.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_wifi_regd.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtw_wifi_regd.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_wifi_regd.h 2021-03-07 18:16:17.091957802 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtw_wifi_regd.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_wifi_regd.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtw_wifi_regd.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_wifi_regd.h 2022-01-28 22:59:35.627654881 +0200 @@ -0,0 +1,34 @@ +/****************************************************************************** + * @@ -407307,10 +405945,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_wifi_regd.h linux-5.11.4- +int rtw_regd_init(struct wiphy *wiphy); + +#endif /* __RTW_WIFI_REGD_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_xmit.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_xmit.h ---- linux-5.11.4/3rdparty/rtl8812au/include/rtw_xmit.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/rtw_xmit.h 2021-03-07 18:16:17.091957802 +0200 -@@ -0,0 +1,1072 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/rtw_xmit.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_xmit.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/rtw_xmit.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/rtw_xmit.h 2023-05-26 22:35:36.545136899 +0300 +@@ -0,0 +1,1045 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. @@ -407373,10 +406011,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_xmit.h linux-5.11.4-rtl88 +#endif + #define NR_XMITBUFF (128) +#endif -+ -+#ifdef PLATFORM_OS_CE -+ #define XMITBUF_ALIGN_SZ 4 -+#else + #ifdef CONFIG_PCI_HCI + #define XMITBUF_ALIGN_SZ 4 + #else @@ -407385,7 +406019,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_xmit.h linux-5.11.4-rtl88 + #else + #define XMITBUF_ALIGN_SZ 512 + #endif -+ #endif +#endif + +/* xmit extension buff defination */ @@ -407907,19 +406540,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_xmit.h linux-5.11.4-rtl88 + u8 bulkout_id; /* for halmac */ +#endif /* RTW_HALMAC */ + -+#if defined(PLATFORM_OS_XP) || defined(PLATFORM_LINUX) || defined(PLATFORM_FREEBSD) ++#if defined(PLATFORM_LINUX) || defined(PLATFORM_FREEBSD) + PURB pxmit_urb[8]; + dma_addr_t dma_transfer_addr; /* (in) dma addr for transfer_buffer */ +#endif -+ -+#ifdef PLATFORM_OS_XP -+ PIRP pxmit_irp[8]; -+#endif -+ -+#ifdef PLATFORM_OS_CE -+ USB_TRANSFER usb_transfer_write_port; -+#endif -+ + u8 bpending[8]; + + sint last[8]; @@ -407934,11 +406558,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_xmit.h linux-5.11.4-rtl88 + u32 ff_hwaddr; + u8 pg_num; + u8 agg_num; -+#ifdef PLATFORM_OS_XP -+ PMDL pxmitbuf_mdl; -+ PIRP pxmitbuf_irp; -+ PSDBUS_REQUEST_PACKET pxmitbuf_sdrp; -+#endif +#endif + +#ifdef CONFIG_PCI_HCI @@ -407952,10 +406571,8 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_xmit.h linux-5.11.4-rtl88 +#if defined(DBG_XMIT_BUF) || defined(DBG_XMIT_BUF_EXT) + u8 no; +#endif -+ +}; + -+ +struct xmit_frame { + _list list; + @@ -408004,7 +406621,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_xmit.h linux-5.11.4-rtl88 + sint option; + sint apsd_setting; /* When bit mask is on, the associated edca queue supports APSD. */ + -+ + /* struct tx_servq blk_q[MAX_NUMBLKS]; */ + struct tx_servq be_q; /* priority == 0,3 */ + struct tx_servq bk_q; /* priority == 1,2 */ @@ -408019,7 +406635,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_xmit.h linux-5.11.4-rtl88 + /* u64 sta_tx_pkts; */ + /* uint sta_tx_fail; */ + -+ +}; + + @@ -408105,10 +406720,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_xmit.h linux-5.11.4-rtl88 + _sema tx_retevt;/* all tx return event; */ + u8 txirp_cnt; + -+#ifdef PLATFORM_OS_CE -+ USB_TRANSFER usb_transfer_write_port; -+ /* USB_TRANSFER usb_transfer_write_mem; */ -+#endif +#ifdef PLATFORM_LINUX + struct tasklet_struct xmit_tasklet; +#endif @@ -408383,9 +406994,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/rtw_xmit.h linux-5.11.4-rtl88 +#include + +#endif /* _RTL871X_XMIT_H_ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/sdio_hal.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/sdio_hal.h ---- linux-5.11.4/3rdparty/rtl8812au/include/sdio_hal.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/sdio_hal.h 2021-03-07 18:16:17.092957849 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/sdio_hal.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/sdio_hal.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/sdio_hal.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/sdio_hal.h 2022-01-28 22:59:35.627654881 +0200 @@ -0,0 +1,57 @@ +/****************************************************************************** + * @@ -408444,63 +407055,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/sdio_hal.h linux-5.11.4-rtl88 +#endif + +#endif /* __SDIO_HAL_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/sdio_ops_ce.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/sdio_ops_ce.h ---- linux-5.11.4/3rdparty/rtl8812au/include/sdio_ops_ce.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/sdio_ops_ce.h 2021-03-07 18:16:17.092957849 +0200 -@@ -0,0 +1,49 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef _SDIO_OPS_WINCE_H_ -+#define _SDIO_OPS_WINCE_H_ -+ -+#include -+#include -+#include -+#include -+ -+ -+#ifdef PLATFORM_OS_CE -+ -+ -+extern u8 sdbus_cmd52r_ce(struct intf_priv *pintfpriv, u32 addr); -+ -+ -+extern void sdbus_cmd52w_ce(struct intf_priv *pintfpriv, u32 addr, u8 val8); -+ -+ -+uint sdbus_read_blocks_to_membuf_ce(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf); -+ -+extern uint sdbus_read_bytes_to_membuf_ce(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf); -+ -+ -+extern uint sdbus_write_blocks_from_membuf_ce(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf, u8 async); -+ -+extern uint sdbus_write_bytes_from_membuf_ce(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf); -+extern u8 sdbus_func1cmd52r_ce(struct intf_priv *pintfpriv, u32 addr); -+extern void sdbus_func1cmd52w_ce(struct intf_priv *pintfpriv, u32 addr, u8 val8); -+extern uint sdbus_read_reg(struct intf_priv *pintfpriv, u32 addr, u32 cnt, void *pdata); -+extern uint sdbus_write_reg(struct intf_priv *pintfpriv, u32 addr, u32 cnt, void *pdata); -+extern void sdio_read_int(_adapter *padapter, u32 addr, u8 sz, void *pdata); -+ -+#endif -+ -+#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/sdio_ops.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/sdio_ops.h ---- linux-5.11.4/3rdparty/rtl8812au/include/sdio_ops.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/sdio_ops.h 2021-03-07 18:16:17.092957849 +0200 -@@ -0,0 +1,224 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/sdio_ops.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/sdio_ops.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/sdio_ops.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/sdio_ops.h 2023-05-26 22:35:36.546136899 +0300 +@@ -0,0 +1,206 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. @@ -408528,24 +407086,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/sdio_ops.h linux-5.11.4-rtl88 +#include +#endif + -+#ifdef PLATFORM_WINDOWS -+ -+#ifdef PLATFORM_OS_XP -+#include -+struct async_context { -+ PMDL pmdl; -+ PSDBUS_REQUEST_PACKET sdrp; -+ unsigned char *r_buf; -+ unsigned char *padapter; -+}; -+#endif -+ -+#ifdef PLATFORM_OS_CE -+#include -+#endif -+ -+#endif /* PLATFORM_WINDOWS */ -+ + +extern void sdio_set_intf_ops(_adapter *padapter, struct _io_ops *pops); +void dump_sdio_card_info(void *sel, struct dvobj_priv *dvobj); @@ -408725,9 +407265,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/sdio_ops.h linux-5.11.4-rtl88 +} + +#endif /* !__SDIO_OPS_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/sdio_ops_linux.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/sdio_ops_linux.h ---- linux-5.11.4/3rdparty/rtl8812au/include/sdio_ops_linux.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/sdio_ops_linux.h 2021-03-07 18:16:17.092957849 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/sdio_ops_linux.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/sdio_ops_linux.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/sdio_ops_linux.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/sdio_ops_linux.h 2022-01-28 22:59:35.627654881 +0200 @@ -0,0 +1,58 @@ +/****************************************************************************** + * @@ -408787,63 +407327,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/sdio_ops_linux.h linux-5.11.4 + +#endif /* __SDIO_OPS_LINUX_H__ */ + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/sdio_ops_xp.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/sdio_ops_xp.h ---- linux-5.11.4/3rdparty/rtl8812au/include/sdio_ops_xp.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/sdio_ops_xp.h 2021-03-07 18:16:17.092957849 +0200 -@@ -0,0 +1,49 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef _SDIO_OPS_XP_H_ -+#define _SDIO_OPS_XP_H_ -+ -+#include -+#include -+#include -+#include -+ -+ -+#ifdef PLATFORM_OS_XP -+ -+ -+extern u8 sdbus_cmd52r_xp(struct intf_priv *pintfpriv, u32 addr); -+ -+ -+extern void sdbus_cmd52w_xp(struct intf_priv *pintfpriv, u32 addr, u8 val8); -+ -+ -+uint sdbus_read_blocks_to_membuf_xp(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf); -+ -+extern uint sdbus_read_bytes_to_membuf_xp(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf); -+ -+ -+extern uint sdbus_write_blocks_from_membuf_xp(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf, u8 async); -+ -+extern uint sdbus_write_bytes_from_membuf_xp(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf); -+extern u8 sdbus_func1cmd52r_xp(struct intf_priv *pintfpriv, u32 addr); -+extern void sdbus_func1cmd52w_xp(struct intf_priv *pintfpriv, u32 addr, u8 val8); -+extern uint sdbus_read_reg(struct intf_priv *pintfpriv, u32 addr, u32 cnt, void *pdata); -+extern uint sdbus_write_reg(struct intf_priv *pintfpriv, u32 addr, u32 cnt, void *pdata); -+extern void sdio_read_int(_adapter *padapter, u32 addr, u8 sz, void *pdata); -+ -+#endif -+ -+#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/sdio_osintf.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/sdio_osintf.h ---- linux-5.11.4/3rdparty/rtl8812au/include/sdio_osintf.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/sdio_osintf.h 2021-03-07 18:16:17.092957849 +0200 -@@ -0,0 +1,25 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/sdio_osintf.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/sdio_osintf.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/sdio_osintf.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/sdio_osintf.h 2023-05-26 22:35:36.546136899 +0300 +@@ -0,0 +1,18 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. @@ -408861,17 +407348,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/sdio_osintf.h linux-5.11.4-rt +#ifndef __SDIO_OSINTF_H__ +#define __SDIO_OSINTF_H__ + -+ -+#ifdef PLATFORM_OS_CE -+extern NDIS_STATUS ce_sd_get_dev_hdl(PADAPTER padapter); -+SD_API_STATUS ce_sd_int_callback(SD_DEVICE_HANDLE hDevice, PADAPTER padapter); -+extern void sd_setup_irs(PADAPTER padapter); +#endif -+ -+#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/sta_info.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/sta_info.h ---- linux-5.11.4/3rdparty/rtl8812au/include/sta_info.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/sta_info.h 2021-03-07 18:16:17.092957849 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/sta_info.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/sta_info.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/sta_info.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/sta_info.h 2022-01-28 22:59:35.627654881 +0200 @@ -0,0 +1,748 @@ +/****************************************************************************** + * @@ -409621,9 +408101,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/sta_info.h linux-5.11.4-rtl88 +#endif /* CONFIG_RTW_PRE_LINK_STA */ + +#endif /* _STA_INFO_H_ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/usb_hal.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/usb_hal.h ---- linux-5.11.4/3rdparty/rtl8812au/include/usb_hal.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/usb_hal.h 2021-03-07 18:16:17.092957849 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/usb_hal.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/usb_hal.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/usb_hal.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/usb_hal.h 2022-01-28 22:59:35.627654881 +0200 @@ -0,0 +1,74 @@ +/****************************************************************************** + * @@ -409699,9 +408179,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/usb_hal.h linux-5.11.4-rtl881 +extern _adapter *rtw_usb_get_sw_pointer(void); +#endif /* CONFIG_INTEL_PROXIM */ +#endif /* __USB_HAL_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/usb_ops.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/usb_ops.h ---- linux-5.11.4/3rdparty/rtl8812au/include/usb_ops.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/usb_ops.h 2021-03-07 18:16:17.092957849 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/usb_ops.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/usb_ops.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/usb_ops.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/usb_ops.h 2022-01-28 22:59:35.627654881 +0200 @@ -0,0 +1,153 @@ +/****************************************************************************** + * @@ -409856,9 +408336,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/usb_ops.h linux-5.11.4-rtl881 + + +#endif /* __USB_OPS_H_ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/usb_ops_linux.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/usb_ops_linux.h ---- linux-5.11.4/3rdparty/rtl8812au/include/usb_ops_linux.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/usb_ops_linux.h 2021-03-07 18:16:17.092957849 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/usb_ops_linux.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/usb_ops_linux.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/usb_ops_linux.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/usb_ops_linux.h 2023-05-26 22:35:36.546136899 +0300 @@ -0,0 +1,98 @@ +/****************************************************************************** + * @@ -409951,16 +408431,16 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/usb_ops_linux.h linux-5.11.4- +int usb_write32(struct intf_hdl *pintfhdl, u32 addr, u32 val); +int usb_writeN(struct intf_hdl *pintfhdl, u32 addr, u32 length, u8 *pdata); +u32 usb_read_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem); -+void usb_recv_tasklet(void *priv); ++void usb_recv_tasklet(unsigned long priv); + +#ifdef CONFIG_USB_INTERRUPT_IN_PIPE +void usb_read_interrupt_complete(struct urb *purb, struct pt_regs *regs); +u32 usb_read_interrupt(struct intf_hdl *pintfhdl, u32 addr); +#endif +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/usb_osintf.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/usb_osintf.h ---- linux-5.11.4/3rdparty/rtl8812au/include/usb_osintf.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/usb_osintf.h 2021-03-07 18:16:17.092957849 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/usb_osintf.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/usb_osintf.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/usb_osintf.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/usb_osintf.h 2022-01-28 22:59:35.627654881 +0200 @@ -0,0 +1,26 @@ +/****************************************************************************** + * @@ -409988,9 +408468,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/usb_osintf.h linux-5.11.4-rtl + + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/usb_vendor_req.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/usb_vendor_req.h ---- linux-5.11.4/3rdparty/rtl8812au/include/usb_vendor_req.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/usb_vendor_req.h 2021-03-07 18:16:17.092957849 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/usb_vendor_req.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/usb_vendor_req.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/usb_vendor_req.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/usb_vendor_req.h 2022-01-28 22:59:35.627654881 +0200 @@ -0,0 +1,56 @@ +/****************************************************************************** + * @@ -410048,10 +408528,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/usb_vendor_req.h linux-5.11.4 +#endif + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/wifi.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/wifi.h ---- linux-5.11.4/3rdparty/rtl8812au/include/wifi.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/wifi.h 2021-03-07 18:16:17.092957849 +0200 -@@ -0,0 +1,1419 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/wifi.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/wifi.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/wifi.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/wifi.h 2023-05-26 22:35:36.546136899 +0300 +@@ -0,0 +1,1349 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. @@ -410508,7 +408988,7 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/wifi.h linux-5.11.4-rtl8812au + return _FALSE; +} + -+__inline static unsigned char *get_ra(unsigned char *pframe) ++__inline static unsigned char *wifi_get_ra(unsigned char *pframe) +{ + unsigned char *ra; + ra = GetAddr1Ptr(pframe); @@ -410934,76 +409414,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/wifi.h linux-5.11.4-rtl8812au + unsigned short BA_timeout_value; + unsigned short BA_starting_seqctrl; +} __attribute__((packed)); -+ -+ -+ -+#endif -+ -+ -+#ifdef PLATFORM_WINDOWS -+ -+#pragma pack(1) -+ -+struct rtw_ieee80211_ht_cap { -+ unsigned short cap_info; -+ unsigned char ampdu_params_info; -+ unsigned char supp_mcs_set[16]; -+ unsigned short extended_ht_cap_info; -+ unsigned int tx_BF_cap_info; -+ unsigned char antenna_selection_info; -+}; -+ -+ -+struct ieee80211_ht_addt_info { -+ unsigned char control_chan; -+ unsigned char ht_param; -+ unsigned short operation_mode; -+ unsigned short stbc_param; -+ unsigned char basic_set[16]; -+}; -+ -+struct HT_caps_element { -+ union { -+ struct { -+ unsigned short HT_caps_info; -+ unsigned char AMPDU_para; -+ unsigned char MCS_rate[16]; -+ unsigned short HT_ext_caps; -+ unsigned int Beamforming_caps; -+ unsigned char ASEL_caps; -+ } HT_cap_element; -+ unsigned char HT_cap[26]; -+ }; -+}; -+ -+struct HT_info_element { -+ unsigned char primary_channel; -+ unsigned char infos[5]; -+ unsigned char MCS_rate[16]; -+}; -+ -+struct AC_param { -+ unsigned char ACI_AIFSN; -+ unsigned char CW; -+ unsigned short TXOP_limit; -+}; -+ -+struct WMM_para_element { -+ unsigned char QoS_info; -+ unsigned char reserved; -+ struct AC_param ac_param[4]; -+}; -+ -+struct ADDBA_request { -+ unsigned char dialog_token; -+ unsigned short BA_para_set; -+ unsigned short BA_timeout_value; -+ unsigned short BA_starting_seqctrl; -+}; -+ -+ -+#pragma pack() -+ +#endif + +typedef enum _HT_CAP_AMPDU_FACTOR { @@ -411471,10 +409881,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/wifi.h linux-5.11.4-rtl8812au +#endif + +#endif /* _WIFI_H_ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/wlan_bssdef.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/wlan_bssdef.h ---- linux-5.11.4/3rdparty/rtl8812au/include/wlan_bssdef.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/wlan_bssdef.h 2021-03-07 18:16:17.092957849 +0200 -@@ -0,0 +1,704 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/wlan_bssdef.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/wlan_bssdef.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/wlan_bssdef.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/wlan_bssdef.h 2023-05-26 22:35:36.546136899 +0300 +@@ -0,0 +1,655 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. @@ -412030,10 +410440,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/wlan_bssdef.h linux-5.11.4-rt +/* temporally add #pragma pack for structure alignment issue of +* WLAN_BSSID_EX and get_WLAN_BSSID_EX_sz() +*/ -+#ifdef PLATFORM_WINDOWS -+#pragma pack(push) -+#pragma pack(1) -+#endif +typedef struct _WLAN_BSSID_EX { + ULONG Length; + NDIS_802_11_MAC_ADDRESS MacAddress; @@ -412050,13 +410456,7 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/wlan_bssdef.h linux-5.11.4-rt + ULONG IELength; + UCHAR IEs[MAX_IE_SZ]; /* (timestamp, beacon interval, and capability information) */ +} -+#ifndef PLATFORM_WINDOWS -+__attribute__((packed)) -+#endif +WLAN_BSSID_EX, *PWLAN_BSSID_EX; -+#ifdef PLATFORM_WINDOWS -+#pragma pack(pop) -+#endif + +#define BSS_EX_IES(bss_ex) ((bss_ex)->IEs) +#define BSS_EX_IES_LEN(bss_ex) ((bss_ex)->IELength) @@ -412104,10 +410504,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/wlan_bssdef.h linux-5.11.4-rt + int aid; /* will only be valid when a BSS is joinned. */ + int join_res; + WLAN_BSSID_EX network; /* must be the last item */ -+#ifdef PLATFORM_WINDOWS -+ unsigned char iebuf[MAX_IE_SZ]; -+#endif -+ +}; + +enum VRTL_CARRIER_SENSE { @@ -412122,16 +410518,12 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/wlan_bssdef.h linux-5.11.4-rt + CTS_TO_SELF +}; + -+ -+ -+ +#define PWR_CAM 0 +#define PWR_MINPS 1 +#define PWR_MAXPS 2 +#define PWR_UAPSD 3 +#define PWR_VOIP 4 + -+ +enum UAPSD_MAX_SP { + NO_LIMIT, + TWO_MSDU, @@ -412139,7 +410531,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/wlan_bssdef.h linux-5.11.4-rt + SIX_MSDU +}; + -+ +/* john */ +#define NUM_PRE_AUTH_KEY 16 +#define NUM_PMKID_CACHE NUM_PRE_AUTH_KEY @@ -412148,41 +410539,11 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/wlan_bssdef.h linux-5.11.4-rt +* WPA2 +*/ + -+#ifndef PLATFORM_OS_CE -+typedef struct _PMKID_CANDIDATE { -+ NDIS_802_11_MAC_ADDRESS BSSID; -+ ULONG Flags; -+} PMKID_CANDIDATE, *PPMKID_CANDIDATE; -+ -+typedef struct _NDIS_802_11_PMKID_CANDIDATE_LIST { -+ ULONG Version; /* Version of the structure */ -+ ULONG NumCandidates; /* No. of pmkid candidates */ -+ PMKID_CANDIDATE CandidateList[1]; -+} NDIS_802_11_PMKID_CANDIDATE_LIST, *PNDIS_802_11_PMKID_CANDIDATE_LIST; -+ -+ -+typedef struct _NDIS_802_11_AUTHENTICATION_ENCRYPTION { -+ NDIS_802_11_AUTHENTICATION_MODE AuthModeSupported; -+ NDIS_802_11_ENCRYPTION_STATUS EncryptStatusSupported; -+ -+} NDIS_802_11_AUTHENTICATION_ENCRYPTION, *PNDIS_802_11_AUTHENTICATION_ENCRYPTION; -+ -+typedef struct _NDIS_802_11_CAPABILITY { -+ ULONG Length; -+ ULONG Version; -+ ULONG NoOfPMKIDs; -+ ULONG NoOfAuthEncryptPairsSupported; -+ NDIS_802_11_AUTHENTICATION_ENCRYPTION AuthenticationEncryptionSupported[1]; -+ -+} NDIS_802_11_CAPABILITY, *PNDIS_802_11_CAPABILITY; -+#endif -+ -+ +#endif /* #ifndef WLAN_BSSDEF_H_ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/xmit_osdep.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/xmit_osdep.h ---- linux-5.11.4/3rdparty/rtl8812au/include/xmit_osdep.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/include/xmit_osdep.h 2021-03-07 18:16:17.092957849 +0200 -@@ -0,0 +1,94 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/include/xmit_osdep.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/xmit_osdep.h +--- linux-6.3.4/drivers/staging/rtl8812au/include/xmit_osdep.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/include/xmit_osdep.h 2023-05-26 22:35:36.546136899 +0300 +@@ -0,0 +1,68 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. @@ -412210,32 +410571,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/xmit_osdep.h linux-5.11.4-rtl + SIZE_T buf_len; +}; + -+#ifdef PLATFORM_WINDOWS -+ -+#ifdef PLATFORM_OS_XP -+#ifdef CONFIG_USB_HCI -+#include -+#include -+#include -+#endif -+#endif -+ -+#ifdef CONFIG_GSPI_HCI -+ #define NR_XMITFRAME 64 -+#else -+ #define NR_XMITFRAME 128 -+#endif -+ -+#define ETH_ALEN 6 -+ -+extern NDIS_STATUS rtw_xmit_entry( -+ IN _nic_hdl cnxt, -+ IN NDIS_PACKET *pkt, -+ IN UINT flags -+); -+ -+#endif /* PLATFORM_WINDOWS */ -+ +#ifdef PLATFORM_FREEBSD +#define NR_XMITFRAME 256 +extern int rtw_xmit_entry(_pkt *pkt, _nic_hdl pnetdev); @@ -412252,8 +410587,8 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/xmit_osdep.h linux-5.11.4-rtl +struct xmit_frame; +struct xmit_buf; + -+extern int _rtw_xmit_entry(_pkt *pkt, _nic_hdl pnetdev); -+extern int rtw_xmit_entry(_pkt *pkt, _nic_hdl pnetdev); ++extern netdev_tx_t _rtw_xmit_entry(struct sk_buff *pkt, struct net_device *pnetdev); ++extern netdev_tx_t rtw_xmit_entry(struct sk_buff *pkt, struct net_device *pnetdev); + +#endif /* PLATFORM_LINUX */ + @@ -412277,9 +410612,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/include/xmit_osdep.h linux-5.11.4-rtl +void dump_os_queue(void *sel, _adapter *padapter); + +#endif /* __XMIT_OSDEP_H_ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/Kconfig linux-5.11.4-rtl8812au/3rdparty/rtl8812au/Kconfig ---- linux-5.11.4/3rdparty/rtl8812au/Kconfig 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/Kconfig 2021-03-07 18:16:16.978952460 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/Kconfig linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/Kconfig +--- linux-6.3.4/drivers/staging/rtl8812au/Kconfig 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/Kconfig 2022-01-28 22:59:35.486648197 +0200 @@ -0,0 +1,6 @@ +config 88XXAU + tristate "Realtek 88XXau USB WiFi" @@ -412287,10 +410622,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/Kconfig linux-5.11.4-rtl8812au/3rdpar + help + Help message of 88XXau + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/Makefile linux-5.11.4-rtl8812au/3rdparty/rtl8812au/Makefile ---- linux-5.11.4/3rdparty/rtl8812au/Makefile 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/Makefile 2021-03-07 18:16:16.978952460 +0200 -@@ -0,0 +1,2328 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/Makefile linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/Makefile +--- linux-6.3.4/drivers/staging/rtl8812au/Makefile 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/Makefile 2023-05-26 22:35:36.539136900 +0300 +@@ -0,0 +1,1819 @@ +EXTRA_CFLAGS += $(USER_EXTRA_CFLAGS) -fno-pie +EXTRA_CFLAGS += -O3 +EXTRA_CFLAGS += -Wno-unused-variable @@ -412298,25 +410633,24 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/Makefile linux-5.11.4-rtl8812au/3rdpa +EXTRA_CFLAGS += -Wno-unused-label +#EXTRA_CFLAGS += -Wno-unused-parameter +EXTRA_CFLAGS += -Wno-unused-function -+EXTRA_CFLAGS += -Wimplicit-fallthrough=0 ++EXTRA_CFLAGS += -Wno-implicit-fallthrough ++EXTRA_CFLAGS += -Wno-cast-function-type ++#EXTRA_CFLAGS += -Wno-error=cast-function-type +#EXTRA_CFLAGS += -Wno-parentheses-equality +#EXTRA_CFLAGS += -Wno-pointer-bool-conversion +EXTRA_CFLAGS += -Wno-unknown-pragmas +#EXTRA_CFLAGS += -Wno-unused ++EXTRA_CFLAGS += -Wno-address +EXTRA_CFLAGS += -Wno-vla -g + -+#GCC_VER_49 := $(shell echo `$(CC) -dumpversion | cut -f1-2 -d.` \>= 4.9 | bc ) -+#ifeq ($(GCC_VER_49),1) -+#EXTRA_CFLAGS += -Wno-date-time # Fix compile error && warning on gcc 4.9 and later -+#endif -+ -+EXTRA_CFLAGS += -I$(src)/include ++EXTRA_CFLAGS += -I$(src)/include -I$(srctree)/$(src)/include ++EXTRA_CFLAGS += -I$(src)/hal/phydm -I$(srctree)/$(src)/hal/phydm +EXTRA_LDFLAGS += --strip-all -O3 + +########################## WIFI IC ############################ +CONFIG_RTL8812A = y +CONFIG_RTL8821A = y -+CONFIG_RTL8814A = n ++CONFIG_RTL8814A = y +######################### Interface ########################### +CONFIG_USB_HCI = y +########################### Android ########################### @@ -412359,6 +410693,8 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/Makefile linux-5.11.4-rtl8812au/3rdpa +CONFIG_RTW_WIFI_HAL = n +CONFIG_ICMP_VOQ = n +CONFIG_IP_R_MONITOR = n #arp VOQ and high rate ++# disable virtual intf for openwrt 21.02 ++CONFIG_RTW_VIRTUAL_INTF = n +########################## Debug ########################### +CONFIG_RTW_DEBUG = n +# default log level is _DRV_INFO_ = 4, @@ -412458,6 +410794,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/Makefile linux-5.11.4-rtl8812au/3rdpa + +CONFIG_DRVEXT_MODULE = n + ++ifeq ("","$(wildcard MOK.der)") ++NO_SKIP_SIGN := y ++endif ++ +ifeq ($(CONFIG_RTL8812AU), ) +ifneq (,$(findstring /usr/lib/dkms,$(PATH))) + export TopDIR ?= $(shell pwd) @@ -412471,7 +410811,7 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/Makefile linux-5.11.4-rtl8812au/3rdpa +HCI_NAME = usb +endif + -+ifeq ($(CONFIG_RTL8812A)_$(CONFIG_RTL8821A)_$(CONFIG_RTL8814A), y_y_n) ++ifeq ($(CONFIG_RTL8812A)_$(CONFIG_RTL8821A)_$(CONFIG_RTL8814A), y_y_y) + +EXTRA_CFLAGS += -DDRV_NAME=\"rtl88XXau\" +ifeq ($(CONFIG_USB_HCI), y) @@ -412514,85 +410854,19 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/Makefile linux-5.11.4-rtl8812au/3rdpa + hal/led/hal_$(HCI_NAME)_led.o + + -+EXTRA_CFLAGS += -I$(src)/platform ++EXTRA_CFLAGS += -I$(src)/platform -I$(srctree)/$(src)/platform +_PLATFORM_FILES := platform/platform_ops.o + -+EXTRA_CFLAGS += -I$(src)/hal/btc ++EXTRA_CFLAGS += -I$(src)/hal/btc -I$(srctree)/$(src)/hal/btc + -+########### HAL_RTL8188E ################################# -+ifeq ($(CONFIG_RTL8188E), y) -+ -+RTL871X = rtl8188e -+ifeq ($(CONFIG_SDIO_HCI), y) -+MODULE_NAME = 8189es -+endif -+ -+ifeq ($(CONFIG_GSPI_HCI), y) -+MODULE_NAME = 8189es -+endif -+ -+ifeq ($(CONFIG_USB_HCI), y) -+MODULE_NAME = 8188eu -+endif -+ -+ifeq ($(CONFIG_PCI_HCI), y) -+MODULE_NAME = 8188ee -+endif -+EXTRA_CFLAGS += -DCONFIG_RTL8188E -+ -+_HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \ -+ hal/$(RTL871X)/Hal8188EPwrSeq.o\ -+ hal/$(RTL871X)/$(RTL871X)_xmit.o\ -+ hal/$(RTL871X)/$(RTL871X)_sreset.o -+ -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_hal_init.o \ -+ hal/$(RTL871X)/$(RTL871X)_phycfg.o \ -+ hal/$(RTL871X)/$(RTL871X)_rf6052.o \ -+ hal/$(RTL871X)/$(RTL871X)_dm.o \ -+ hal/$(RTL871X)/$(RTL871X)_rxdesc.o \ -+ hal/$(RTL871X)/$(RTL871X)_cmd.o \ -+ hal/$(RTL871X)/hal8188e_s_fw.o \ -+ hal/$(RTL871X)/hal8188e_t_fw.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_halinit.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_led.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_xmit.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_recv.o -+ -+ifeq ($(CONFIG_SDIO_HCI), y) -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o -+else -+ifeq ($(CONFIG_GSPI_HCI), y) -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o -+else -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops_linux.o -+endif -+endif -+ -+ifeq ($(CONFIG_USB_HCI), y) -+_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8188E_USB.o -+endif -+ifeq ($(CONFIG_PCI_HCI), y) -+_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8188E_PCIE.o -+endif -+ifeq ($(CONFIG_SDIO_HCI), y) -+_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8188E_SDIO.o -+endif -+endif + +########### HAL_RTL8812A_RTL8821A ################################# -+ +ifneq ($(CONFIG_RTL8812A)_$(CONFIG_RTL8821A), n_n) + +RTL871X = rtl8812a +ifeq ($(CONFIG_USB_HCI), y) +MODULE_NAME = 8812au +endif -+ifeq ($(CONFIG_PCI_HCI), y) -+MODULE_NAME = 8812ae -+endif -+ifeq ($(CONFIG_SDIO_HCI), y) -+MODULE_NAME = 8812as -+endif + +_HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \ + hal/$(RTL871X)/Hal8812PwrSeq.o \ @@ -412658,19 +410932,11 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/Makefile linux-5.11.4-rtl8812au/3rdpa +MODULE_NAME := 8811au +endif +endif -+ifeq ($(CONFIG_PCI_HCI), y) -+MODULE_NAME := 8821ae -+endif -+ifeq ($(CONFIG_SDIO_HCI), y) -+MODULE_NAME := 8821as -+endif -+ +endif + +EXTRA_CFLAGS += -DCONFIG_RTL8821A + +_HAL_INTFS_FILES += hal/rtl8812a/hal8821a_fw.o -+ +endif + +ifeq ($(CONFIG_BT_COEXIST), y) @@ -412683,66 +410949,8 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/Makefile linux-5.11.4-rtl8812au/3rdpa + hal/btc/halbtc8821a2ant.o +endif +endif -+ +endif + -+########### HAL_RTL8723B ################################# -+ifeq ($(CONFIG_RTL8723B), y) -+ -+RTL871X = rtl8723b -+ifeq ($(CONFIG_USB_HCI), y) -+MODULE_NAME = 8723bu -+endif -+ifeq ($(CONFIG_PCI_HCI), y) -+MODULE_NAME = 8723be -+endif -+ifeq ($(CONFIG_SDIO_HCI), y) -+MODULE_NAME = 8723bs -+endif -+ -+EXTRA_CFLAGS += -DCONFIG_RTL8723B -+ -+_HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \ -+ hal/$(RTL871X)/Hal8723BPwrSeq.o\ -+ hal/$(RTL871X)/$(RTL871X)_sreset.o -+ -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_hal_init.o \ -+ hal/$(RTL871X)/$(RTL871X)_phycfg.o \ -+ hal/$(RTL871X)/$(RTL871X)_rf6052.o \ -+ hal/$(RTL871X)/$(RTL871X)_dm.o \ -+ hal/$(RTL871X)/$(RTL871X)_rxdesc.o \ -+ hal/$(RTL871X)/$(RTL871X)_cmd.o \ -+ hal/$(RTL871X)/hal8723b_fw.o -+ -+_HAL_INTFS_FILES += \ -+ hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_halinit.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_led.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_xmit.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_recv.o -+ -+ifeq ($(CONFIG_PCI_HCI), y) -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops_linux.o -+else -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o -+endif -+ -+ifeq ($(CONFIG_USB_HCI), y) -+_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8723B_USB.o -+endif -+ifeq ($(CONFIG_PCI_HCI), y) -+_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8723B_PCIE.o -+endif -+ifeq ($(CONFIG_SDIO_HCI), y) -+_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8723B_SDIO.o -+endif -+ -+_BTC_FILES += hal/btc/halbtc8723bwifionly.o -+ifeq ($(CONFIG_BT_COEXIST), y) -+_BTC_FILES += hal/btc/halbtc8723b1ant.o \ -+ hal/btc/halbtc8723b2ant.o -+endif -+ -+endif + +########### HAL_RTL8814A ################################# +ifeq ($(CONFIG_RTL8814A), y) @@ -412750,7 +410958,7 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/Makefile linux-5.11.4-rtl8812au/3rdpa +#EXTRA_CFLAGS += -DCONFIG_MP_VHT_HW_TX_MODE +CONFIG_MP_VHT_HW_TX_MODE = n +########################################## -+#RTL871X = rtl8814a ++RTL871X = rtl8814a +ifeq ($(CONFIG_USB_HCI), y) +MODULE_NAME = 8814au +endif @@ -412770,7 +410978,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/Makefile linux-5.11.4-rtl8812au/3rdpa + hal/$(RTL871X)/$(RTL871X)_cmd.o \ + hal/$(RTL871X)/hal8814a_fw.o + -+ +_HAL_INTFS_FILES += \ + hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_halinit.o \ + hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_led.o \ @@ -412793,371 +411000,16 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/Makefile linux-5.11.4-rtl8812au/3rdpa +ifeq ($(CONFIG_PCI_HCI), y) +_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8814A_PCIE.o +endif -+ +endif + -+########### HAL_RTL8723C ################################# -+ifeq ($(CONFIG_RTL8723C), y) + -+RTL871X = rtl8703b -+ifeq ($(CONFIG_USB_HCI), y) -+MODULE_NAME = 8723cu -+MODULE_SUB_NAME = 8703bu -+endif -+ifeq ($(CONFIG_PCI_HCI), y) -+MODULE_NAME = 8723ce -+MODULE_SUB_NAME = 8703be -+endif -+ifeq ($(CONFIG_SDIO_HCI), y) -+MODULE_NAME = 8723cs -+MODULE_SUB_NAME = 8703bs -+endif -+ -+EXTRA_CFLAGS += -DCONFIG_RTL8703B -+ -+_HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \ -+ hal/$(RTL871X)/Hal8703BPwrSeq.o\ -+ hal/$(RTL871X)/$(RTL871X)_sreset.o -+ -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_hal_init.o \ -+ hal/$(RTL871X)/$(RTL871X)_phycfg.o \ -+ hal/$(RTL871X)/$(RTL871X)_rf6052.o \ -+ hal/$(RTL871X)/$(RTL871X)_dm.o \ -+ hal/$(RTL871X)/$(RTL871X)_rxdesc.o \ -+ hal/$(RTL871X)/$(RTL871X)_cmd.o \ -+ hal/$(RTL871X)/hal8703b_fw.o -+ -+_HAL_INTFS_FILES += \ -+ hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_halinit.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_SUB_NAME)_led.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_SUB_NAME)_xmit.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_SUB_NAME)_recv.o -+ -+ifeq ($(CONFIG_PCI_HCI), y) -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops_linux.o -+else -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o -+endif -+ -+ifeq ($(CONFIG_USB_HCI), y) -+_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8703B_USB.o -+endif -+ifeq ($(CONFIG_PCI_HCI), y) -+_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8703B_PCIE.o -+endif -+ -+ifeq ($(CONFIG_BT_COEXIST), y) -+_BTC_FILES += hal/btc/halbtc8703b1ant.o -+endif -+ -+endif -+ -+########### HAL_RTL8723D ################################# -+ifeq ($(CONFIG_RTL8723D), y) -+ -+RTL871X = rtl8723d -+ifeq ($(CONFIG_USB_HCI), y) -+MODULE_NAME = 8723du -+MODULE_SUB_NAME = 8723du -+endif -+ifeq ($(CONFIG_PCI_HCI), y) -+MODULE_NAME = 8723de -+MODULE_SUB_NAME = 8723de -+endif -+ifeq ($(CONFIG_SDIO_HCI), y) -+MODULE_NAME = 8723ds -+MODULE_SUB_NAME = 8723ds -+endif -+ -+EXTRA_CFLAGS += -DCONFIG_RTL8723D -+ -+_HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \ -+ hal/$(RTL871X)/Hal8723DPwrSeq.o\ -+ hal/$(RTL871X)/$(RTL871X)_sreset.o -+ -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_hal_init.o \ -+ hal/$(RTL871X)/$(RTL871X)_phycfg.o \ -+ hal/$(RTL871X)/$(RTL871X)_rf6052.o \ -+ hal/$(RTL871X)/$(RTL871X)_dm.o \ -+ hal/$(RTL871X)/$(RTL871X)_rxdesc.o \ -+ hal/$(RTL871X)/$(RTL871X)_cmd.o \ -+ hal/$(RTL871X)/hal8723d_fw.o \ -+ hal/$(RTL871X)/$(RTL871X)_lps_poff.o -+ -+ -+_HAL_INTFS_FILES += \ -+ hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_halinit.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_SUB_NAME)_led.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_SUB_NAME)_xmit.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_SUB_NAME)_recv.o -+ -+ifeq ($(CONFIG_PCI_HCI), y) -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops_linux.o -+else -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o -+endif -+ -+ifeq ($(CONFIG_USB_HCI), y) -+_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8723D_USB.o -+endif -+ifeq ($(CONFIG_PCI_HCI), y) -+_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8723D_PCIE.o -+endif -+ -+ifeq ($(CONFIG_BT_COEXIST), y) -+_BTC_FILES += hal/btc/halbtc8723d1ant.o \ -+ hal/btc/halbtc8723d2ant.o -+endif -+ -+endif -+ -+########### HAL_RTL8188F ################################# -+ifeq ($(CONFIG_RTL8188F), y) -+ -+RTL871X = rtl8188f -+ifeq ($(CONFIG_USB_HCI), y) -+MODULE_NAME = 8188fu -+endif -+ifeq ($(CONFIG_PCI_HCI), y) -+MODULE_NAME = 8188fe -+endif -+ifeq ($(CONFIG_SDIO_HCI), y) -+MODULE_NAME = 8189fs -+endif -+ -+EXTRA_CFLAGS += -DCONFIG_RTL8188F -+ -+_HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \ -+ hal/$(RTL871X)/Hal8188FPwrSeq.o\ -+ hal/$(RTL871X)/$(RTL871X)_sreset.o -+ -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_hal_init.o \ -+ hal/$(RTL871X)/$(RTL871X)_phycfg.o \ -+ hal/$(RTL871X)/$(RTL871X)_rf6052.o \ -+ hal/$(RTL871X)/$(RTL871X)_dm.o \ -+ hal/$(RTL871X)/$(RTL871X)_rxdesc.o \ -+ hal/$(RTL871X)/$(RTL871X)_cmd.o \ -+ hal/$(RTL871X)/hal8188f_fw.o -+ -+_HAL_INTFS_FILES += \ -+ hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_halinit.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_led.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_xmit.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_recv.o -+ -+ifeq ($(CONFIG_PCI_HCI), y) -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops_linux.o -+else -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o -+endif -+ -+ifeq ($(CONFIG_USB_HCI), y) -+_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8188F_USB.o -+endif -+ -+ifeq ($(CONFIG_SDIO_HCI), y) -+_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8188F_SDIO.o -+endif -+ -+endif -+ -+########### HAL_RTL8188GTV ################################# -+ifeq ($(CONFIG_RTL8188GTV), y) -+ -+RTL871X = rtl8188gtv -+ifeq ($(CONFIG_USB_HCI), y) -+MODULE_NAME = 8188gtvu -+endif -+ifeq ($(CONFIG_SDIO_HCI), y) -+MODULE_NAME = 8189gtvs -+endif -+ -+EXTRA_CFLAGS += -DCONFIG_RTL8188GTV -+ -+_HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \ -+ hal/$(RTL871X)/Hal8188GTVPwrSeq.o\ -+ hal/$(RTL871X)/$(RTL871X)_sreset.o -+ -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_hal_init.o \ -+ hal/$(RTL871X)/$(RTL871X)_phycfg.o \ -+ hal/$(RTL871X)/$(RTL871X)_rf6052.o \ -+ hal/$(RTL871X)/$(RTL871X)_dm.o \ -+ hal/$(RTL871X)/$(RTL871X)_rxdesc.o \ -+ hal/$(RTL871X)/$(RTL871X)_cmd.o \ -+ hal/$(RTL871X)/hal8188gtv_fw.o -+ -+_HAL_INTFS_FILES += \ -+ hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_halinit.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_led.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_xmit.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_recv.o -+ -+ifeq ($(CONFIG_PCI_HCI), y) -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops_linux.o -+else -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o -+endif -+ -+ifeq ($(CONFIG_USB_HCI), y) -+_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8188GTV_USB.o -+endif -+ -+ifeq ($(CONFIG_SDIO_HCI), y) -+_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8188GTV_SDIO.o -+endif -+ -+endif -+ -+########### HAL_RTL8822B ################################# -+ifeq ($(CONFIG_RTL8822B), y) -+RTL871X := rtl8822b -+ifeq ($(CONFIG_USB_HCI), y) -+ifeq ($(CONFIG_BT_COEXIST), n) -+MODULE_NAME = 8812bu -+else -+MODULE_NAME = 88x2bu -+endif -+endif -+ifeq ($(CONFIG_PCI_HCI), y) -+MODULE_NAME = 88x2be -+endif -+ifeq ($(CONFIG_SDIO_HCI), y) -+MODULE_NAME = 88x2bs -+endif -+ -+endif -+########### HAL_RTL8821C ################################# -+ifeq ($(CONFIG_RTL8821C), y) -+RTL871X := rtl8821c -+ifeq ($(CONFIG_USB_HCI), y) -+MODULE_NAME = 8821cu -+endif -+ifeq ($(CONFIG_PCI_HCI), y) -+MODULE_NAME = 8821ce -+endif -+ifeq ($(CONFIG_SDIO_HCI), y) -+MODULE_NAME = 8821cs -+endif -+ -+endif -+ -+########### HAL_RTL8710B ################################# -+ifeq ($(CONFIG_RTL8710B), y) -+ -+RTL871X = rtl8710b -+ifeq ($(CONFIG_USB_HCI), y) -+MODULE_NAME = 8710bu -+MODULE_SUB_NAME = 8710bu -+endif -+ -+EXTRA_CFLAGS += -DCONFIG_RTL8710B -+ -+_HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \ -+ hal/$(RTL871X)/Hal8710BPwrSeq.o\ -+ hal/$(RTL871X)/$(RTL871X)_sreset.o -+ -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_hal_init.o \ -+ hal/$(RTL871X)/$(RTL871X)_phycfg.o \ -+ hal/$(RTL871X)/$(RTL871X)_rf6052.o \ -+ hal/$(RTL871X)/$(RTL871X)_dm.o \ -+ hal/$(RTL871X)/$(RTL871X)_rxdesc.o \ -+ hal/$(RTL871X)/$(RTL871X)_cmd.o \ -+ hal/$(RTL871X)/hal8710b_fw.o \ -+ hal/$(RTL871X)/$(RTL871X)_lps_poff.o -+ -+ -+_HAL_INTFS_FILES += \ -+ hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_halinit.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_SUB_NAME)_led.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_SUB_NAME)_xmit.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_SUB_NAME)_recv.o -+ -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o -+ -+ifeq ($(CONFIG_USB_HCI), y) -+_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8710B_USB.o -+endif -+ -+endif -+ -+########### HAL_RTL8192F ################################# -+ifeq ($(CONFIG_RTL8192F), y) -+ -+RTL871X = rtl8192f -+ifeq ($(CONFIG_USB_HCI), y) -+MODULE_NAME = 8192fu -+MODULE_SUB_NAME = 8192fu -+endif -+ifeq ($(CONFIG_PCI_HCI), y) -+MODULE_NAME = 8192fe -+MODULE_SUB_NAME = 8192fe -+endif -+ifeq ($(CONFIG_SDIO_HCI), y) -+MODULE_NAME = 8192fs -+MODULE_SUB_NAME = 8192fs -+endif -+ -+EXTRA_CFLAGS += -DCONFIG_RTL8192F -+ -+_HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \ -+ hal/$(RTL871X)/Hal8192FPwrSeq.o\ -+ hal/$(RTL871X)/$(RTL871X)_sreset.o -+ -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_hal_init.o \ -+ hal/$(RTL871X)/$(RTL871X)_phycfg.o \ -+ hal/$(RTL871X)/$(RTL871X)_rf6052.o \ -+ hal/$(RTL871X)/$(RTL871X)_dm.o \ -+ hal/$(RTL871X)/$(RTL871X)_rxdesc.o \ -+ hal/$(RTL871X)/$(RTL871X)_cmd.o \ -+ hal/$(RTL871X)/hal8192f_fw.o \ -+ hal/$(RTL871X)/$(RTL871X)_lps_poff.o -+ -+ -+_HAL_INTFS_FILES += \ -+ hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_halinit.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_SUB_NAME)_led.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_SUB_NAME)_xmit.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_SUB_NAME)_recv.o -+ -+ifeq ($(CONFIG_PCI_HCI), y) -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops_linux.o -+else -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o -+endif -+ -+ifeq ($(CONFIG_SDIO_HCI), y) -+_HAL_INTFS_FILES += hal/efuse/$(RTL871X)/HalEfuseMask8192F_SDIO.o -+endif -+ -+ifeq ($(CONFIG_USB_HCI), y) -+_HAL_INTFS_FILES += hal/efuse/$(RTL871X)/HalEfuseMask8192F_USB.o -+endif -+ -+ifeq ($(CONFIG_PCI_HCI), y) -+_HAL_INTFS_FILES += hal/efuse/$(RTL871X)/HalEfuseMask8192F_PCIE.o -+endif -+ -+endif +########### AUTO_CFG ################################# -+ +ifeq ($(CONFIG_AUTOCFG_CP), y) + +ifeq ($(CONFIG_MULTIDRV), y) +$(shell cp $(TopDIR)/autoconf_multidrv_$(HCI_NAME)_linux.h $(TopDIR)/include/autoconf.h) -+else -+ifeq ($(CONFIG_RTL8188E)$(CONFIG_SDIO_HCI),yy) -+$(shell cp $(TopDIR)/autoconf_rtl8189e_$(HCI_NAME)_linux.h $(TopDIR)/include/autoconf.h) -+else ifeq ($(CONFIG_RTL8188F)$(CONFIG_SDIO_HCI),yy) -+$(shell cp $(TopDIR)/autoconf_rtl8189f_$(HCI_NAME)_linux.h $(TopDIR)/include/autoconf.h) -+else ifeq ($(CONFIG_RTL8723C),y) -+$(shell cp $(TopDIR)/autoconf_rtl8723c_$(HCI_NAME)_linux.h $(TopDIR)/include/autoconf.h) -+else -+$(shell cp $(TopDIR)/autoconf_$(RTL871X)_$(HCI_NAME)_linux.h $(TopDIR)/include/autoconf.h) +endif +endif -+ -+endif -+ +########### END OF PATH ################################# + +ifeq ($(CONFIG_USB_HCI), y) @@ -413191,7 +411043,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/Makefile linux-5.11.4-rtl8812au/3rdpa +EXTRA_CFLAGS += -DCONFIG_WAPI_SUPPORT +endif + -+ +ifeq ($(CONFIG_EFUSE_CONFIG_FILE), y) +EXTRA_CFLAGS += -DCONFIG_EFUSE_CONFIG_FILE + @@ -413424,13 +411275,17 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/Makefile linux-5.11.4-rtl8812au/3rdpa + +EXTRA_CFLAGS += -DDM_ODM_SUPPORT_TYPE=0x04 + ++ifeq ($(CONFIG_RTW_VIRTUAL_INTF), y) ++EXTRA_CFLAGS += -DRTW_VIRTUAL_INTF=1 ++endif ++ +ifeq ($(CONFIG_PLATFORM_I386_PC), y) +EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN +EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT -+SUBARCH := $(shell uname -m | sed -e "s/i.86/i386/; s/ppc/powerpc/; s/armv.l/arm/; s/aarch64/arm64/;") ++SUBARCH := $(shell uname -m | sed -e "s/i.86/i386/; s/ppc/powerpc/; s/armv.l/arm/; s/aarch64/arm64/; s/riscv.*/riscv/;") +ARCH ?= $(SUBARCH) +CROSS_COMPILE ?= -+KVER := $(shell uname -r) ++KVER ?= $(shell if [ -n "${NEW_VERSION}" ] && [ -n "${FLAVOR}" ]; then echo "${NEW_VERSION}-${FLAVOR}"; else uname -r; fi) +KSRC := /lib/modules/$(KVER)/build +MODDESTDIR := /lib/modules/$(KVER)/kernel/drivers/net/wireless/ +INSTALL_PREFIX := @@ -413483,6 +411338,7 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/Makefile linux-5.11.4-rtl8812au/3rdpa + +ifeq ($(CONFIG_PLATFORM_PPC), y) +EXTRA_CFLAGS += -DCONFIG_BIG_ENDIAN ++EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT +SUBARCH := $(shell uname -m | sed -e s/ppc/powerpc/) +ARCH ?= $(SUBARCH) +CROSS_COMPILE ?= @@ -413636,7 +411492,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/Makefile linux-5.11.4-rtl8812au/3rdpa + +ifeq ($(CONFIG_PLATFORM_ANDROID_INTEL_X86), y) +EXTRA_CFLAGS += -DCONFIG_PLATFORM_ANDROID_INTEL_X86 -+EXTRA_CFLAGS += -DCONFIG_PLATFORM_INTEL_BYT +EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_ANDROID +EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE +EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT @@ -414162,14 +412017,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/Makefile linux-5.11.4-rtl8812au/3rdpa +KSRC := /HiSTBAndroidV600R003C00SPC021_git_0512/device/hisilicon/bigfish/sdk/source/kernel/linux-3.18.y +KSRC += O=/HiSTBAndroidV600R003C00SPC021_git_0512/out/target/product/Hi3798MV200/obj/KERNEL_OBJ +endif -+ -+ifeq ($(CONFIG_RTL8822B), y) -+ifeq ($(CONFIG_SDIO_HCI), y) -+CONFIG_RTL8822BS ?= m -+USER_MODULE_NAME := rtl8822bs -+endif -+endif -+ +endif + +# Platform setting @@ -414180,9 +412027,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/Makefile linux-5.11.4-rtl8812au/3rdpa +EXTRA_CFLAGS += -DCONFIG_PLATFORM_SPRD +EXTRA_CFLAGS += -DPLATFORM_SPREADTRUM_6820 +EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -+ifeq ($(RTL871X), rtl8188e) -+EXTRA_CFLAGS += -DSOFTAP_PS_DURATION=50 -+endif +ifeq ($(CONFIG_SDIO_HCI), y) +EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS +_PLATFORM_FILES += platform/platform_sprd_sdio.o @@ -414196,9 +412040,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/Makefile linux-5.11.4-rtl8812au/3rdpa +EXTRA_CFLAGS += -DCONFIG_PLATFORM_SPRD +EXTRA_CFLAGS += -DPLATFORM_SPREADTRUM_8810 +EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -+ifeq ($(RTL871X), rtl8188e) -+EXTRA_CFLAGS += -DSOFTAP_PS_DURATION=50 -+endif +ifeq ($(CONFIG_SDIO_HCI), y) +EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS +_PLATFORM_FILES += platform/platform_sprd_sdio.o @@ -414377,14 +412218,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/Makefile linux-5.11.4-rtl8812au/3rdpa +# To locate output files in a separate directory. +KSRC += O=/4.4_S905L_8822bs_compile/KERNEL_OBJ +endif -+ -+ifeq ($(CONFIG_RTL8822B), y) -+ifeq ($(CONFIG_SDIO_HCI), y) -+CONFIG_RTL8822BS ?= m -+USER_MODULE_NAME := 8822bs -+endif -+endif -+ +endif + +ifeq ($(CONFIG_PLATFORM_ZTE_ZX296716), y) @@ -414407,14 +412240,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/Makefile linux-5.11.4-rtl8812au/3rdpa +ARCH ?= arm64 +CROSS_COMPILE ?= +KSRC ?= -+ -+ifeq ($(CONFIG_RTL8822B), y) -+ifeq ($(CONFIG_SDIO_HCI), y) -+CONFIG_RTL8822BS ?= m -+USER_MODULE_NAME := 8822bs -+endif -+endif -+ +endif + +ifeq ($(ARCH), i386) @@ -414460,16 +412285,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/Makefile linux-5.11.4-rtl8812au/3rdpa +########### this part for *.mk ############################ +include $(src)/hal/phydm/phydm.mk + -+########### HAL_RTL8822B ################################# -+ifeq ($(CONFIG_RTL8822B), y) -+include $(src)/rtl8822b.mk -+endif -+ -+########### HAL_RTL8821C ################################# -+ifeq ($(CONFIG_RTL8821C), y) -+include $(src)/rtl8821c.mk -+endif -+ +rtk_core := core/rtw_cmd.o \ + core/rtw_security.o \ + core/rtw_debug.o \ @@ -414591,12 +412406,12 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/Makefile linux-5.11.4-rtl8812au/3rdpa +DRIVER_VERSION = $(shell grep "\#define DRIVERVERSION" include/rtw_version.h | awk '{print $$3}' | tr -d v\") + +dkms_install: -+ mkdir -p /usr/src/8812au-$(DRIVER_VERSION) ++ @mkdir -vp /usr/src/8812au-$(DRIVER_VERSION) + cp -r * /usr/src/8812au-$(DRIVER_VERSION) + dkms add -m 8812au -v $(DRIVER_VERSION) -+ dkms build -m 8812au -v $(DRIVER_VERSION) ++ + dkms build -m 8812au -v $(DRIVER_VERSION) + dkms install -m 8812au -v $(DRIVER_VERSION) -+ dkms status ++ dkms status -m 8812au + +dkms_remove: + dkms remove 8812au/$(DRIVER_VERSION) --all @@ -414617,11 +412432,22 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/Makefile linux-5.11.4-rtl8812au/3rdpa + cd platform ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko + rm -fr Module.symvers ; rm -fr Module.markers ; rm -fr modules.order + rm -fr *.mod.c *.mod *.o .*.cmd *.ko *~ -+ rm -fr .tmp_versions ++ rm -fr .tmp_versions *.der *.priv +endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/custom_gpio_linux.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/os_dep/linux/custom_gpio_linux.c ---- linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/custom_gpio_linux.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/os_dep/linux/custom_gpio_linux.c 2021-03-07 18:16:17.092957849 +0200 ++ ++sign: ++ifeq ($(NO_SKIP_SIGN), y) ++ @openssl req -new -x509 -newkey rsa:2048 -keyout MOK.priv -outform DER -out MOK.der -nodes -days 36500 -subj "/CN=Custom MOK/" ++ @mokutil --import MOK.der ++else ++ echo "Skipping key creation" ++endif ++ @$(KSRC)/scripts/sign-file sha256 MOK.priv MOK.der 88XXau.ko ++ ++sign-install: all sign install +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/os_dep/linux/custom_gpio_linux.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/os_dep/linux/custom_gpio_linux.c +--- linux-6.3.4/drivers/staging/rtl8812au/os_dep/linux/custom_gpio_linux.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/os_dep/linux/custom_gpio_linux.c 2022-01-28 22:59:35.628654929 +0200 @@ -0,0 +1,340 @@ +/****************************************************************************** + * @@ -414963,10 +412789,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/custom_gpio_linux.c linu +{ +} +#endif /* CONFIG_PLATFORM_SPRD */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_cfg80211.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/os_dep/linux/ioctl_cfg80211.c ---- linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_cfg80211.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/os_dep/linux/ioctl_cfg80211.c 2021-03-07 18:16:17.093957896 +0200 -@@ -0,0 +1,10531 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/os_dep/linux/ioctl_cfg80211.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/os_dep/linux/ioctl_cfg80211.c +--- linux-6.3.4/drivers/staging/rtl8812au/os_dep/linux/ioctl_cfg80211.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/os_dep/linux/ioctl_cfg80211.c 2023-05-26 22:35:36.547136899 +0300 +@@ -0,0 +1,10566 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. @@ -415429,7 +413255,11 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_cfg80211.c linux-5 + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 19, 0)) + if (started) { -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 11, 0)) ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 3, 0)) ++ cfg80211_ch_switch_started_notify(adapter->pnetdev, &chdef, 0, 0, false, 0); ++#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 1, 0)) ++ cfg80211_ch_switch_started_notify(adapter->pnetdev, &chdef, 0, 0, false); ++#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 11, 0)) || (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(8,0)) + cfg80211_ch_switch_started_notify(adapter->pnetdev, &chdef, 0, false); +#else + cfg80211_ch_switch_started_notify(adapter->pnetdev, &chdef, 0); @@ -415441,7 +413271,13 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_cfg80211.c linux-5 + if (!rtw_cfg80211_allow_ch_switch_notify(adapter)) + goto exit; + ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 3, 0)) ++ cfg80211_ch_switch_notify(adapter->pnetdev, &chdef, 0, 0); ++#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(5,19, 2)) ++ cfg80211_ch_switch_notify(adapter->pnetdev, &chdef, 0); ++#else + cfg80211_ch_switch_notify(adapter->pnetdev, &chdef); ++#endif + +#else + int freq = rtw_ch2freq(ch); @@ -416114,7 +413950,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_cfg80211.c linux-5 + #endif + + #if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 12, 0) ++ #if LINUX_VERSION_CODE < KERNEL_VERSION(6, 0, 0) ++ roam_info.channel = notify_channel; + roam_info.bssid = cur_network->network.MacAddress; ++ #endif + roam_info.req_ie = pmlmepriv->assoc_req + sizeof(struct rtw_ieee80211_hdr_3addr) + 2; + roam_info.req_ie_len = pmlmepriv->assoc_req_len - sizeof(struct rtw_ieee80211_hdr_3addr) - 2; + roam_info.resp_ie = pmlmepriv->assoc_rsp + sizeof(struct rtw_ieee80211_hdr_3addr) + 6; @@ -416145,13 +413984,17 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_cfg80211.c linux-5 + RTW_INFO("pwdev->sme_state(b)=%d\n", pwdev->sme_state); + #endif + -+ if (check_fwstate(pmlmepriv, WIFI_MONITOR_STATE) != _TRUE) -+ rtw_cfg80211_connect_result(pwdev, cur_network->network.MacAddress -+ , pmlmepriv->assoc_req + sizeof(struct rtw_ieee80211_hdr_3addr) + 2 -+ , pmlmepriv->assoc_req_len - sizeof(struct rtw_ieee80211_hdr_3addr) - 2 -+ , pmlmepriv->assoc_rsp + sizeof(struct rtw_ieee80211_hdr_3addr) + 6 -+ , pmlmepriv->assoc_rsp_len - sizeof(struct rtw_ieee80211_hdr_3addr) - 6 -+ , WLAN_STATUS_SUCCESS, GFP_ATOMIC); ++ if (check_fwstate(pmlmepriv, WIFI_MONITOR_STATE) != _TRUE) { ++ struct cfg80211_bss *bss; ++ bss = cfg80211_get_bss(pwdev->wiphy, NULL, cur_network->network.MacAddress, NULL, 0, ++ IEEE80211_BSS_TYPE_ANY, IEEE80211_PRIVACY_ANY); ++ cfg80211_connect_bss(wdev_to_ndev(pwdev), cur_network->network.MacAddress, bss ++ , pmlmepriv->assoc_req + sizeof(struct rtw_ieee80211_hdr_3addr) + 2 ++ , pmlmepriv->assoc_req_len - sizeof(struct rtw_ieee80211_hdr_3addr) - 2 ++ , pmlmepriv->assoc_rsp + sizeof(struct rtw_ieee80211_hdr_3addr) + 6 ++ , pmlmepriv->assoc_rsp_len - sizeof(struct rtw_ieee80211_hdr_3addr) - 6 ++ , WLAN_STATUS_SUCCESS, GFP_ATOMIC, NL80211_TIMEOUT_UNSPECIFIED); ++ } + #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 11, 0) || defined(COMPAT_KERNEL_RELEASE) + RTW_INFO("pwdev->sme_state(a)=%d\n", pwdev->sme_state); + #endif @@ -416680,6 +414523,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_cfg80211.c linux-5 +} + +static int cfg80211_rtw_add_key(struct wiphy *wiphy, struct net_device *ndev ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 1, 0)) ++ , int link_id ++#endif + , u8 key_index +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE) + , bool pairwise @@ -416824,6 +414670,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_cfg80211.c linux-5 +} + +static int cfg80211_rtw_get_key(struct wiphy *wiphy, struct net_device *ndev ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 1, 0)) ++ , int link_id ++#endif + , u8 keyid +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE) + , bool pairwise @@ -416989,6 +414838,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_cfg80211.c linux-5 +} + +static int cfg80211_rtw_del_key(struct wiphy *wiphy, struct net_device *ndev, ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 1, 0)) ++ int link_id, ++#endif +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE) + u8 key_index, bool pairwise, const u8 *mac_addr) +#else /* (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) */ @@ -417009,7 +414861,11 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_cfg80211.c linux-5 +} + +static int cfg80211_rtw_set_default_key(struct wiphy *wiphy, -+ struct net_device *ndev, u8 key_index ++ struct net_device *ndev, ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 1, 0)) ++ int link_id, ++#endif ++ u8 key_index + #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 38)) || defined(COMPAT_KERNEL_RELEASE) + , bool unicast, bool multicast + #endif @@ -417057,7 +414913,11 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_cfg80211.c linux-5 + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 30)) +int cfg80211_rtw_set_default_mgmt_key(struct wiphy *wiphy, -+ struct net_device *ndev, u8 key_index) ++ struct net_device *ndev, ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 1, 0)) ++ int link_id, ++#endif ++ u8 key_index) +{ +#define SET_DEF_KEY_PARAM_FMT " key_index=%d" +#define SET_DEF_KEY_PARAM_ARG , key_index @@ -417302,6 +415162,7 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_cfg80211.c linux-5 + + sinfo->filled |= STATION_INFO_BSS_PARAM; + ++#if defined (LINUX_VERSION_CODE) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 20, 0)) + if (!psta->no_short_preamble_set) + sinfo->bss_param.flags |= STATION_INFO_BSS_PARAM_SHORT_PREAMBLE; + @@ -417317,6 +415178,7 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_cfg80211.c linux-5 + sinfo->bss_param.dtim_period = pwrctl->dtim; + + sinfo->bss_param.beacon_interval = get_beacon_interval(&cur_network->network); ++#endif + + } + @@ -417741,6 +415603,8 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_cfg80211.c linux-5 + RTW_INFO("%s, ielen=%d\n", __func__, len); +#endif + ++ if (!pmlmepriv) ++ return -EINVAL; + if (len > 0) { + wps_ie = rtw_get_wps_ie(buf, len, NULL, &wps_ielen); + if (wps_ie) { @@ -419803,6 +417667,7 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_cfg80211.c linux-5 + return ret; +} + ++#ifdef RTW_VIRTUAL_INT +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) +static struct wireless_dev * +#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 38)) || defined(COMPAT_KERNEL_RELEASE) @@ -419958,6 +417823,7 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_cfg80211.c linux-5 + rtw_set_rtnl_lock_holder(dvobj, NULL); + return ret; +} ++#endif /* RTW_VIRTUAL_INT */ + +static int rtw_add_beacon(_adapter *adapter, const u8 *head, size_t head_len, const u8 *tail, size_t tail_len) +{ @@ -420186,7 +418052,11 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_cfg80211.c linux-5 + return ret; +} + ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 2)) ++static int cfg80211_rtw_stop_ap(struct wiphy *wiphy, struct net_device *ndev, unsigned int link_id) ++#else +static int cfg80211_rtw_stop_ap(struct wiphy *wiphy, struct net_device *ndev) ++#endif +{ + _adapter *adapter = (_adapter *)rtw_netdev_priv(ndev); + @@ -421030,7 +418900,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_cfg80211.c linux-5 +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 35)) + RTW_INFO(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); +#endif -+ + switch (channel_type) { + case NL80211_CHAN_NO_HT: + case NL80211_CHAN_HT20: @@ -421059,7 +418928,11 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_cfg80211.c linux-5 + return 0; +} + ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 2)) ++static int cfg80211_rtw_get_channel(struct wiphy *wiphy, struct wireless_dev *wdev, unsigned int link_id, struct cfg80211_chan_def *chandef){ ++#else +static int cfg80211_rtw_get_channel(struct wiphy *wiphy, struct wireless_dev *wdev, struct cfg80211_chan_def *chandef){ ++#endif + _adapter *padapter= wiphy_to_adapter(wiphy); + int channel; + int control_freq; @@ -421076,37 +418949,18 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_cfg80211.c linux-5 + + if (!ndev) + return -ENODEV; -+ offset = rtw_get_oper_choffset(padapter); -+ //channel = adapter_to_dvobj(padapter)->oper_channel; -+ channel = pHalData->current_channel; ++ offset = rtw_get_oper_choffset(padapter); ++ bandWidth = rtw_get_oper_bw(padapter); ++ channel = rtw_get_oper_ch(padapter); + if(channel >= 1){ + if(channel <= 14) + band = NL80211_BAND_2GHZ; + else + band = NL80211_BAND_5GHZ; -+#if 0 -+ switch(pHalData->current_band_type){ -+ case 0: -+ band = NL80211_BAND_2GHZ; -+ break; -+ case 1: -+ band = NL80211_BAND_5GHZ; -+ break; -+ default: -+ return -EINVAL; -+ } -+#endif ++ + control_freq = ieee80211_channel_to_frequency(channel, band); + -+ dvobj = adapter_to_dvobj(padapter); -+ if(dvobj != NULL){ -+ bandWidth = adapter_to_dvobj(padapter)->oper_bwmode; -+ RTW_INFO("%s bw %d\n", __func__, adapter_to_dvobj(padapter)->oper_bwmode); -+ }else{ -+ bandWidth = pHalData->current_channel_bw; -+ RTW_INFO("%s dvobj null\n", __func__); -+ } -+ switch(pHalData->current_channel_bw){ ++ switch(bandWidth){ + case CHANNEL_WIDTH_5: + width = NL80211_CHAN_WIDTH_5; + center_freq = control_freq; @@ -421414,7 +419268,7 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_cfg80211.c linux-5 + +indicate: + #if defined(RTW_DEDICATED_P2P_DEVICE) -+ if (rtw_cfg80211_redirect_pd_wdev(dvobj_to_wiphy(dvobj), get_ra(frame), &wdev)) ++ if (rtw_cfg80211_redirect_pd_wdev(dvobj_to_wiphy(dvobj), wifi_get_ra(frame), &wdev)) + if (0) + RTW_INFO("redirect to pd_wdev:%p\n", wdev); + #endif @@ -422702,7 +420556,7 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_cfg80211.c linux-5 + return ret; +} + -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,8,0)) ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,8,0)) || (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(8,0)) +static void cfg80211_rtw_update_mgmt_frame_register(struct wiphy *wiphy, + struct wireless_dev *wdev, + struct mgmt_frame_regs *upd) @@ -425087,8 +422941,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_cfg80211.c linux-5 + .flush_pmksa = cfg80211_rtw_flush_pmksa, + +#ifdef CONFIG_AP_MODE ++#ifdef RTW_VIRTUAL_INT + .add_virtual_intf = cfg80211_rtw_add_virtual_intf, + .del_virtual_intf = cfg80211_rtw_del_virtual_intf, ++#endif + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 4, 0)) && !defined(COMPAT_KERNEL_RELEASE) + .add_beacon = cfg80211_rtw_add_beacon, @@ -425154,7 +423010,7 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_cfg80211.c linux-5 + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE) + .mgmt_tx = cfg80211_rtw_mgmt_tx, -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,8,0)) ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,8,0)) || (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(8,0)) + .update_mgmt_frame_registrations = cfg80211_rtw_update_mgmt_frame_register, +#else + .mgmt_frame_register = cfg80211_rtw_mgmt_frame_register, @@ -425311,7 +423167,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_cfg80211.c linux-5 + pwdev_priv->rssi_monitor_min = 0; +#endif + -+ +exit: + return ret; +} @@ -425362,7 +423217,13 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_cfg80211.c linux-5 + rtw_cfg80211_indicate_scan_done(adapter, _TRUE); + + #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 11, 0)) || defined(COMPAT_KERNEL_RELEASE) ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 0, 0)) ++ if (wdev->links[0].client.current_bss) { ++ #elif (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 2)) ++ if (wdev->connected) { ++ #else + if (wdev->current_bss) { ++ #endif + RTW_INFO(FUNC_ADPT_FMT" clear current_bss by cfg80211_disconnected\n", FUNC_ADPT_ARG(adapter)); + rtw_cfg80211_indicate_disconnect(adapter, 0, 1); + } @@ -425498,9 +423359,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_cfg80211.c linux-5 +} + +#endif /* CONFIG_IOCTL_CFG80211 */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_cfg80211.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/os_dep/linux/ioctl_cfg80211.h ---- linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_cfg80211.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/os_dep/linux/ioctl_cfg80211.h 2021-03-07 18:16:17.093957896 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/os_dep/linux/ioctl_cfg80211.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/os_dep/linux/ioctl_cfg80211.h +--- linux-6.3.4/drivers/staging/rtl8812au/os_dep/linux/ioctl_cfg80211.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/os_dep/linux/ioctl_cfg80211.h 2022-01-28 22:59:35.629654976 +0200 @@ -0,0 +1,427 @@ +/****************************************************************************** + * @@ -425929,10 +423790,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_cfg80211.h linux-5 + + +#endif /* __IOCTL_CFG80211_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_linux.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/os_dep/linux/ioctl_linux.c ---- linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_linux.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/os_dep/linux/ioctl_linux.c 2021-03-07 18:16:17.095957991 +0200 -@@ -0,0 +1,12876 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/os_dep/linux/ioctl_linux.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/os_dep/linux/ioctl_linux.c +--- linux-6.3.4/drivers/staging/rtl8812au/os_dep/linux/ioctl_linux.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/os_dep/linux/ioctl_linux.c 2022-12-18 17:40:24.577937030 +0200 +@@ -0,0 +1,12823 @@ + +/****************************************************************************** + * @@ -425967,7 +423828,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_linux.c linux-5.11 +extern int rtw_ht_enable; +#endif + -+ +#define RTL_IOCTL_WPA_SUPPLICANT (SIOCIWFIRSTPRIV+30) + +#define SCAN_ITEM_SIZE 768 @@ -426055,18 +423915,14 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_linux.c linux-5.11 +#ifndef CONFIG_IOCTL_CFG80211 + wireless_send_event(padapter->pnetdev, IWEVCUSTOM, &wrqu, buff); +#endif -+ + rtw_mfree(buff, IW_CUSTOM_MAX + 1); -+ +} + -+ +static void request_wps_pbc_event(_adapter *padapter) +{ + u8 *buff, *p; + union iwreq_data wrqu; + -+ + buff = rtw_malloc(IW_CUSTOM_MAX); + if (!buff) + return; @@ -426104,7 +423960,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_linux.c linux-5.11 + kobject_hotplug(&padapter->pnetdev->class_dev.kobj, KOBJ_NET_PBC); +#endif +#else -+ + if (padapter->pid[0] == 0) { + /* 0 is the default value and it means the application monitors the HW PBC doesn't privde its pid to driver. */ + return; @@ -426113,7 +423968,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_linux.c linux-5.11 + rtw_signal_process(padapter->pid[0], SIGUSR1); + +#endif -+ + rtw_led_control(padapter, LED_CTL_START_WPS_BOTTON); +} +#endif/* #ifdef CONFIG_SUPPORT_HW_WPS_PBC */ @@ -426130,7 +423984,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_linux.c linux-5.11 +#endif +} + -+ +void rtw_indicate_wx_assoc_event(_adapter *padapter) +{ + union iwreq_data wrqu; @@ -426508,7 +424361,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_linux.c linux-5.11 + u8 *p; + sint out_len = 0; + -+ + if (pbuf) { + p = pbuf; + @@ -426616,7 +424468,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_linux.c linux-5.11 + RTW_INFO("rtw_wx_get_scan: %s ", pnetwork->network.Ssid.Ssid); + RTW_INFO("rtw_wx_get_scan: ssid = %d ", wapi_len); + -+ + if (wapi_len > 0) { + p = buf_wapi; + /* _rtw_memset(buf_wapi, 0, MAX_WAPI_IE_LEN*2); */ @@ -426809,8 +424660,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_linux.c linux-5.11 +#ifdef CONFIG_P2P + struct wifidirect_info *pwdinfo = &padapter->wdinfo; +#endif /* CONFIG_P2P */ -+ -+ + param->u.crypt.err = 0; + param->u.crypt.alg[IEEE_CRYPT_ALG_NAME_LEN - 1] = '\0'; + @@ -426972,8 +424821,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_linux.c linux-5.11 +#endif + +exit: -+ -+ + return ret; +} + @@ -427128,7 +424975,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_linux.c linux-5.11 + * || check_fwstate(&padapter->mlmepriv, WIFI_UNDER_WPS) == _TRUE) */ + rtw_hal_set_hwreg(padapter, HW_VAR_OFF_RCR_AM, null_addr); + -+ +exit: + + if (buf) @@ -427151,8 +424997,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_linux.c linux-5.11 + WLAN_BSSID_EX *pcur_bss = &pmlmepriv->cur_network.network; + NDIS_802_11_RATES_EX *prates = NULL; + -+ -+ + if (check_fwstate(pmlmepriv, _FW_LINKED | WIFI_ADHOC_MASTER_STATE) == _TRUE) { + /* parsing HT_CAP_IE */ + if( is_supported_ht(padapter->registrypriv.wireless_mode)&&(padapter->registrypriv.ht_enable)) { @@ -427206,8 +425050,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_linux.c linux-5.11 + /* snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11g"); */ + snprintf(wrqu->name, IFNAMSIZ, "unassociated"); + } -+ -+ + return 0; +} + @@ -427371,8 +425213,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_linux.c linux-5.11 + rtw_indicate_connect(padapter); + +exit: -+ -+ + return ret; + +} @@ -427383,8 +425223,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_linux.c linux-5.11 + _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); + struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); + -+ -+ + if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) + wrqu->mode = IW_MODE_INFRA; + else if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) || @@ -427398,12 +425236,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_linux.c linux-5.11 + else + wrqu->mode = IW_MODE_AUTO; + -+ + return 0; + +} + -+ +static int rtw_wx_set_pmkid(struct net_device *dev, + struct iw_request_info *a, + union iwreq_data *wrqu, char *extra) @@ -427522,8 +425358,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_linux.c linux-5.11 + u16 val; + int i; + -+ -+ + wrqu->data.length = sizeof(*range); + _rtw_memset(range, 0, sizeof(*range)); + @@ -427659,9 +425493,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_linux.c linux-5.11 + range->scan_capa = IW_SCAN_CAPA_ESSID | IW_SCAN_CAPA_TYPE | IW_SCAN_CAPA_BSSID | + IW_SCAN_CAPA_CHANNEL | IW_SCAN_CAPA_MODE | IW_SCAN_CAPA_RATE; +#endif -+ -+ -+ + return 0; + +} @@ -427796,8 +425627,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_linux.c linux-5.11 + + _rtw_memset(wrqu->ap_addr.sa_data, 0, ETH_ALEN); + -+ -+ + if (((check_fwstate(pmlmepriv, _FW_LINKED)) == _TRUE) || + ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) == _TRUE) || + ((check_fwstate(pmlmepriv, WIFI_AP_STATE)) == _TRUE)) @@ -427806,7 +425635,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_linux.c linux-5.11 + else + _rtw_memset(wrqu->ap_addr.sa_data, 0, ETH_ALEN); + -+ + return 0; + +} @@ -427829,7 +425657,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_linux.c linux-5.11 + _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); + struct iw_mlme *mlme = (struct iw_mlme *) extra; + -+ + if (mlme == NULL) + return -1; + @@ -427837,10 +425664,8 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_linux.c linux-5.11 + + reason = cpu_to_le16(mlme->reason_code); + -+ + RTW_INFO("%s, cmd=%d, reason=%d\n", __FUNCTION__, mlme->cmd, reason); + -+ + switch (mlme->cmd) { + case IW_MLME_DEAUTH: + if (!rtw_set_802_11_disassociate(padapter)) @@ -428047,7 +425872,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_linux.c linux-5.11 + len -= sec_len; + break; + -+ + case WEXT_CSCAN_CHANNEL_SECTION: + /* RTW_INFO("WEXT_CSCAN_CHANNEL_SECTION\n"); */ + pos += 1; @@ -428220,13 +426044,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_linux.c linux-5.11 + +exit: + -+ +#ifdef DBG_IOCTL + RTW_INFO("DBG_IOCTL %s:%d return %d\n", __FUNCTION__, __LINE__, ret); +#endif -+ + return ret ; -+ +} + +/* set ssid flow @@ -428250,7 +426071,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_linux.c linux-5.11 + + uint ret = 0, len; + -+ +#ifdef DBG_IOCTL + RTW_INFO("DBG_IOCTL %s:%d\n", __FUNCTION__, __LINE__); +#endif @@ -428268,8 +426088,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_linux.c linux-5.11 + goto exit; + } + -+ -+ + rtw_ps_deny(padapter, PS_DENY_JOIN); + if (_FAIL == rtw_pwr_wakeup(padapter)) { + ret = -1; @@ -428344,7 +426162,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_linux.c linux-5.11 + + dst_ssid = pnetwork->network.Ssid.Ssid; + -+ + if ((_rtw_memcmp(dst_ssid, src_ssid, ndis_ssid.SsidLength) == _TRUE) && + (pnetwork->network.Ssid.SsidLength == ndis_ssid.SsidLength)) { + @@ -428380,8 +426197,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_linux.c linux-5.11 +#ifdef DBG_IOCTL + RTW_INFO("DBG_IOCTL %s:%d return %d\n", __FUNCTION__, __LINE__, ret); +#endif -+ -+ + return ret; +} + @@ -428489,7 +426304,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_linux.c linux-5.11 + ret = -1; + } + -+ + return ret; +} + @@ -428529,7 +426343,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_linux.c linux-5.11 + + RTW_INFO("%s, rts_thresh=%d\n", __func__, padapter->registrypriv.rts_thresh); + -+ + return 0; + +} @@ -428588,7 +426401,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_linux.c linux-5.11 + wrqu->frag.fixed = 0; /* no auto select */ + /* wrqu->frag.disabled = (wrqu->frag.value == DEFAULT_FRAG_THRESHOLD); */ + -+ + return 0; +} + @@ -428598,7 +426410,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_linux.c linux-5.11 +{ + /* _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); */ + -+ + wrqu->retry.value = 7; + wrqu->retry.fixed = 0; /* no auto select */ + wrqu->retry.disabled = 1; @@ -428648,7 +426459,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_linux.c linux-5.11 + + key = erq->flags & IW_ENCODE_INDEX; + -+ + if (erq->flags & IW_ENCODE_DISABLED) { + RTW_INFO("EncryptionDisabled\n"); + padapter->securitypriv.ndisencryptstatus = Ndis802_11EncryptionDisabled; @@ -428754,8 +426564,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_linux.c linux-5.11 + } + +exit: -+ -+ + return ret; + +} @@ -428840,7 +426648,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_linux.c linux-5.11 + + } + -+ + return ret; + +} @@ -429277,7 +427084,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_linux.c linux-5.11 + u32 data32; + u32 bytes; + -+ + bytes = 0; + addr = 0; + data32 = 0; @@ -429667,7 +427473,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_linux.c linux-5.11 + break; + } + -+ + /* pdata->length = 0; */ /* ? */ + pdata->flags = 0; + if (pdata->length >= 32) { @@ -429731,7 +427536,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_linux.c linux-5.11 + } + +exit: -+ + return ret; + +} @@ -435717,7 +433521,7 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_linux.c linux-5.11 + rtw_hal_read_chip_info(padapter); + /* set mac addr*/ + rtw_macaddr_cfg(adapter_mac_addr(padapter), get_hal_mac_addr(padapter)); -+ _rtw_memcpy(padapter->pnetdev->dev_addr, get_hal_mac_addr(padapter), ETH_ALEN); /* set mac addr to net_device */ ++ dev_addr_set(padapter->pnetdev, get_hal_mac_addr(padapter)); /* set mac addr to net_device */ + +#ifdef CONFIG_P2P + rtw_init_wifidirect_addrs(padapter, adapter_mac_addr(padapter), adapter_mac_addr(padapter)); @@ -437739,7 +435543,11 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_linux.c linux-5.11 + + ploopback->bstop = _TRUE; + ++#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 17, 0) + thread_exit(NULL); ++#else ++ kthread_thread_exit(NULL); ++#endif + return 0; +} + @@ -438809,9 +436617,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_linux.c linux-5.11 + return ret; +} + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_mp.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/os_dep/linux/ioctl_mp.c ---- linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_mp.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/os_dep/linux/ioctl_mp.c 2021-03-07 18:16:17.095957991 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/os_dep/linux/ioctl_mp.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/os_dep/linux/ioctl_mp.c +--- linux-6.3.4/drivers/staging/rtl8812au/os_dep/linux/ioctl_mp.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/os_dep/linux/ioctl_mp.c 2022-01-28 22:59:35.631655071 +0200 @@ -0,0 +1,2591 @@ +/****************************************************************************** + * @@ -441404,9 +439212,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/ioctl_mp.c linux-5.11.4- +#endif /*#ifdef CONFIG_RTL8723B*/ + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/mlme_linux.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/os_dep/linux/mlme_linux.c ---- linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/mlme_linux.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/os_dep/linux/mlme_linux.c 2021-03-07 18:16:17.095957991 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/os_dep/linux/mlme_linux.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/os_dep/linux/mlme_linux.c +--- linux-6.3.4/drivers/staging/rtl8812au/os_dep/linux/mlme_linux.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/os_dep/linux/mlme_linux.c 2022-12-18 17:40:24.577937030 +0200 @@ -0,0 +1,436 @@ +/****************************************************************************** + * @@ -441814,7 +439622,7 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/mlme_linux.c linux-5.11. + mac[4] = 0x11; + mac[5] = 0x12; + -+ _rtw_memcpy(pnetdev->dev_addr, mac, ETH_ALEN); ++ dev_addr_set(pnetdev, mac); + + + rtw_netif_carrier_off(pnetdev); @@ -441844,10 +439652,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/mlme_linux.c linux-5.11. + +#endif +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/os_intfs.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/os_dep/linux/os_intfs.c ---- linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/os_intfs.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/os_dep/linux/os_intfs.c 2021-03-07 18:16:17.096958038 +0200 -@@ -0,0 +1,5252 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/os_dep/linux/os_intfs.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/os_dep/linux/os_intfs.c +--- linux-6.3.4/drivers/staging/rtl8812au/os_dep/linux/os_intfs.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/os_dep/linux/os_intfs.c 2023-05-26 22:35:36.548136899 +0300 +@@ -0,0 +1,5188 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. @@ -442584,9 +440392,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/os_intfs.c linux-5.11.4- +int _netdev_open(struct net_device *pnetdev); +int netdev_open(struct net_device *pnetdev); +static int netdev_close(struct net_device *pnetdev); -+#ifdef CONFIG_PLATFORM_INTEL_BYT -+extern int rtw_sdio_set_power(int on); -+#endif /* CONFIG_PLATFORM_INTEL_BYT */ + +#ifdef CONFIG_MCC_MODE +/* enable MCC mode or not */ @@ -443138,7 +440943,7 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/os_intfs.c linux-5.11.4- + } + + _rtw_memcpy(adapter_mac_addr(padapter), sa->sa_data, ETH_ALEN); /* set mac addr to adapter */ -+ _rtw_memcpy(pnetdev->dev_addr, sa->sa_data, ETH_ALEN); /* set mac addr to net_device */ ++ dev_addr_set(pnetdev, sa->sa_data); /* set mac addr to net_device */ + +#if 0 + if (rtw_is_hw_init_completed(padapter)) { @@ -443587,7 +441392,11 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/os_intfs.c linux-5.11.4- + u8 rtnl_lock_needed = rtw_rtnl_lock_needed(dvobj); + +#ifdef CONFIG_RTW_NAPI ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 1, 0)) ++ netif_napi_add_weight(ndev, &adapter->napi, rtw_recv_napi_poll, RTL_NAPI_WEIGHT); ++#else + netif_napi_add(ndev, &adapter->napi, rtw_recv_napi_poll, RTL_NAPI_WEIGHT); ++#endif +#endif /* CONFIG_RTW_NAPI */ + +#if defined(CONFIG_IOCTL_CFG80211) @@ -443603,7 +441412,7 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/os_intfs.c linux-5.11.4- + /* alloc netdev name */ + rtw_init_netdev_name(ndev, name); + -+ _rtw_memcpy(ndev->dev_addr, adapter_mac_addr(adapter), ETH_ALEN); ++ dev_addr_set(ndev, adapter_mac_addr(adapter)); +#if defined(CONFIG_NET_NS) + dev_net_set(ndev, wiphy_net(adapter_to_wiphy(adapter))); +#endif //defined(CONFIG_NET_NS) @@ -444550,32 +442359,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/os_intfs.c linux-5.11.4- + if (!primary_padapter) + goto _netdev_virtual_iface_open_error; + -+#ifdef CONFIG_PLATFORM_INTEL_BYT -+ if (padapter->bup == _FALSE) { -+ u8 mac[ETH_ALEN]; -+ -+ /* get mac address from primary_padapter */ -+ if (primary_padapter->bup == _FALSE) -+ rtw_macaddr_cfg(adapter_mac_addr(primary_padapter), get_hal_mac_addr(primary_padapter)); -+ -+ _rtw_memcpy(mac, adapter_mac_addr(primary_padapter), ETH_ALEN); -+ -+ /* -+ * If the BIT1 is 0, the address is universally administered. -+ * If it is 1, the address is locally administered -+ */ -+ mac[0] |= BIT(1); -+ -+ _rtw_memcpy(adapter_mac_addr(padapter), mac, ETH_ALEN); -+ -+#ifdef CONFIG_MI_WITH_MBSSID_CAM -+ rtw_mbid_camid_alloc(padapter, adapter_mac_addr(padapter)); -+#endif -+ rtw_init_wifidirect_addrs(padapter, adapter_mac_addr(padapter), adapter_mac_addr(padapter)); -+ _rtw_memcpy(pnetdev->dev_addr, adapter_mac_addr(padapter), ETH_ALEN); -+ } -+#endif /*CONFIG_PLATFORM_INTEL_BYT*/ -+ + if (primary_padapter->bup == _FALSE || !rtw_is_hw_init_completed(primary_padapter)) + _netdev_open(primary_padapter->pnetdev); + @@ -445303,10 +443086,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/os_intfs.c linux-5.11.4- + + padapter->netif_up = _TRUE; + -+#ifdef CONFIG_PLATFORM_INTEL_BYT -+ rtw_sdio_set_power(1); -+#endif /* CONFIG_PLATFORM_INTEL_BYT */ -+ + #ifdef CONFIG_AUTOSUSPEND + if (pwrctrlpriv->ps_flag == _TRUE) { + padapter->net_closed = _FALSE; @@ -445315,15 +443094,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/os_intfs.c linux-5.11.4- + #endif + + if (padapter->bup == _FALSE) { -+#ifdef CONFIG_PLATFORM_INTEL_BYT -+ rtw_macaddr_cfg(adapter_mac_addr(padapter), get_hal_mac_addr(padapter)); -+#ifdef CONFIG_MI_WITH_MBSSID_CAM -+ rtw_mbid_camid_alloc(padapter, adapter_mac_addr(padapter)); -+#endif -+ rtw_init_wifidirect_addrs(padapter, adapter_mac_addr(padapter), adapter_mac_addr(padapter)); -+ _rtw_memcpy(pnetdev->dev_addr, adapter_mac_addr(padapter), ETH_ALEN); -+#endif /* CONFIG_PLATFORM_INTEL_BYT */ -+ + rtw_clr_surprise_removed(padapter); + rtw_clr_drv_stopped(padapter); + @@ -445366,11 +443136,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/os_intfs.c linux-5.11.4- + padapter->bup = _TRUE; + pwrctrlpriv->bips_processing = _FALSE; + -+#ifdef CONFIG_PLATFORM_INTEL_BYT -+#ifdef CONFIG_BT_COEXIST -+ rtw_btcoex_IpsNotify(padapter, IPS_NONE); -+#endif /* CONFIG_BT_COEXIST */ -+#endif /* CONFIG_PLATFORM_INTEL_BYT */ + } + padapter->net_closed = _FALSE; + @@ -445709,7 +443474,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/os_intfs.c linux-5.11.4- +#endif /* CONFIG_BT_COEXIST_SOCKET_TRX */ + + RTW_INFO(FUNC_NDEV_FMT" , bup=%d\n", FUNC_NDEV_ARG(pnetdev), padapter->bup); -+#ifndef CONFIG_PLATFORM_INTEL_BYT + #ifdef CONFIG_AUTOSUSPEND + if (pwrctl->bInternalAutoSuspend == _TRUE) { + /* rtw_pwr_wakeup(padapter); */ @@ -445782,26 +443546,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/os_intfs.c linux-5.11.4- + else + RTW_INFO("CONFIG_BT_COEXIST: VIRTUAL_ADAPTER\n"); +#endif /* CONFIG_BT_COEXIST_SOCKET_TRX */ -+#else /* !CONFIG_PLATFORM_INTEL_BYT */ -+ -+ if (pwrctl->bInSuspend == _TRUE) { -+ RTW_INFO("+871x_drv - drv_close, bInSuspend=%d\n", pwrctl->bInSuspend); -+ return 0; -+ } -+ -+ rtw_scan_abort(padapter); /* stop scanning process before wifi is going to down */ -+#ifdef CONFIG_IOCTL_CFG80211 -+ rtw_cfg80211_wait_scan_req_empty(padapter, 200); -+#endif -+ -+ RTW_INFO("netdev_close, bips_processing=%d\n", pwrctl->bips_processing); -+ while (pwrctl->bips_processing == _TRUE) /* waiting for ips_processing done before call rtw_dev_unload() */ -+ rtw_msleep_os(1); -+ -+ rtw_dev_unload(padapter); -+ rtw_sdio_set_power(0); -+ -+#endif /* !CONFIG_PLATFORM_INTEL_BYT */ + + RTW_INFO("-871x_drv - drv_close, bup=%d\n", padapter->bup); + @@ -447100,10 +444844,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/os_intfs.c linux-5.11.4- +EXPORT_SYMBOL(rtw_vendor_ie_set_api); + +#endif -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/recv_linux.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/os_dep/linux/recv_linux.c ---- linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/recv_linux.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/os_dep/linux/recv_linux.c 2021-03-07 18:16:17.096958038 +0200 -@@ -0,0 +1,739 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/os_dep/linux/recv_linux.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/os_dep/linux/recv_linux.c +--- linux-6.3.4/drivers/staging/rtl8812au/os_dep/linux/recv_linux.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/os_dep/linux/recv_linux.c 2022-12-18 17:40:24.577937030 +0200 +@@ -0,0 +1,729 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. @@ -447173,7 +444917,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/recv_linux.c linux-5.11. + return res; + } + -+ + /* Modified by Albert 20101213 */ + /* For 8 bytes IP header alignment. */ + shift_sz = pattrib->qos ? 6 : 0; /* Qos data, wireless lan header length is 26 */ @@ -447280,7 +445023,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/recv_linux.c linux-5.11. +#ifdef CONFIG_RTW_NAPI + skb_queue_head_init(&precvpriv->rx_napi_skb_queue); +#endif /* CONFIG_RTW_NAPI */ -+ + return res; +} + @@ -447288,9 +445030,7 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/recv_linux.c linux-5.11. +int rtw_os_recv_resource_alloc(_adapter *padapter, union recv_frame *precvframe) +{ + int res = _SUCCESS; -+ + precvframe->u.hdr.pkt = NULL; -+ + return res; +} + @@ -447300,14 +445040,11 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/recv_linux.c linux-5.11. + sint i; + union recv_frame *precvframe; + precvframe = (union recv_frame *) precvpriv->precv_frame_buf; -+ -+ +#ifdef CONFIG_RTW_NAPI + if (skb_queue_len(&precvpriv->rx_napi_skb_queue)) + RTW_WARN("rx_napi_skb_queue not empty\n"); + rtw_skb_queue_purge(&precvpriv->rx_napi_skb_queue); +#endif /* CONFIG_RTW_NAPI */ -+ + for (i = 0; i < NR_RECVFRAME; i++) { + rtw_os_free_recvframe(precvframe); + precvframe++; @@ -447346,9 +445083,7 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/recv_linux.c linux-5.11. + if (precvbuf->pallocated_buf == NULL) + return _FAIL; +#endif /* CONFIG_USE_USB_BUFFER_ALLOC_RX */ -+ +#endif /* CONFIG_USB_HCI */ -+ + return res; +} + @@ -447358,7 +445093,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/recv_linux.c linux-5.11. + int ret = _SUCCESS; + +#ifdef CONFIG_USB_HCI -+ +#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX + + struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); @@ -447385,7 +445119,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/recv_linux.c linux-5.11. + rtw_skb_free(precvbuf->pskb); + } + return ret; -+ +} + +_pkt *rtw_os_alloc_msdu_pkt(union recv_frame *prframe, const u8 *da, const u8 *sa, u8 *msdu ,u16 msdu_len) @@ -447461,8 +445194,13 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/recv_linux.c linux-5.11. + +#ifdef CONFIG_RTW_GRO + if (pregistrypriv->en_gro) { ++#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 12, 0) + if (rtw_napi_gro_receive(&padapter->napi, pskb) != GRO_DROP) + rx_ok = _TRUE; ++#else ++ rtw_napi_gro_receive(&padapter->napi, pskb); ++ rx_ok = _TRUE; ++#endif + goto next; + } +#endif /* CONFIG_RTW_GRO */ @@ -447510,7 +445248,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/recv_linux.c linux-5.11. + if (adapter->registrypriv.en_napi) { + struct dvobj_priv *dvobj; + struct registry_priv *registry; -+ + dvobj = adapter_to_dvobj(adapter); + registry = &adapter->registrypriv; + if (dvobj->traffic_stat.cur_rx_tp > registry->napi_threshold) @@ -447626,8 +445363,7 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/recv_linux.c linux-5.11. +#ifdef CONFIG_RTW_NAPI +#ifdef CONFIG_RTW_NAPI_DYNAMIC + if (!skb_queue_empty(&precvpriv->rx_napi_skb_queue) -+ && !adapter_to_dvobj(padapter)->en_napi_dynamic -+ ) ++ && !adapter_to_dvobj(padapter)->en_napi_dynamic) + napi_recv(padapter, RTL_NAPI_WEIGHT); +#endif + @@ -447835,17 +445571,15 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/recv_linux.c linux-5.11. + if (precvbuf->irp_pending == _FALSE) + rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); + -+ +#endif +#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) + precvbuf->pskb = NULL; +#endif + +} -+ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/rhashtable.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/os_dep/linux/rhashtable.c ---- linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/rhashtable.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/os_dep/linux/rhashtable.c 2021-03-07 18:16:17.096958038 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/os_dep/linux/rhashtable.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/os_dep/linux/rhashtable.c +--- linux-6.3.4/drivers/staging/rtl8812au/os_dep/linux/rhashtable.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/os_dep/linux/rhashtable.c 2022-01-28 22:59:35.631655071 +0200 @@ -0,0 +1,844 @@ +/* + * Resizable, Scalable, Concurrent Hash Table @@ -448691,9 +446425,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/rhashtable.c linux-5.11. + return rhashtable_free_and_destroy(ht, NULL, NULL); +} + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/rhashtable.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/os_dep/linux/rhashtable.h ---- linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/rhashtable.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/os_dep/linux/rhashtable.h 2021-03-07 18:16:17.096958038 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/os_dep/linux/rhashtable.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/os_dep/linux/rhashtable.h +--- linux-6.3.4/drivers/staging/rtl8812au/os_dep/linux/rhashtable.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/os_dep/linux/rhashtable.h 2022-01-28 22:59:35.632655118 +0200 @@ -0,0 +1,827 @@ +/* + * Resizable, Scalable, Concurrent Hash Table @@ -449522,10 +447256,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/rhashtable.h linux-5.11. + +#endif /* _LINUX_RHASHTABLE_H */ + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/rtw_android.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/os_dep/linux/rtw_android.c ---- linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/rtw_android.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/os_dep/linux/rtw_android.c 2021-03-07 18:16:17.096958038 +0200 -@@ -0,0 +1,1335 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/os_dep/linux/rtw_android.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/os_dep/linux/rtw_android.c +--- linux-6.3.4/drivers/staging/rtl8812au/os_dep/linux/rtw_android.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/os_dep/linux/rtw_android.c 2023-05-26 22:35:36.548136899 +0300 +@@ -0,0 +1,1304 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. @@ -450192,7 +447926,7 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/rtw_android.c linux-5.11 + goto exit; + } + #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 0, 0)) || (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(8,0)) -+ if (!access_ok(priv_cmd.buf, priv_cmd.total_len)) { ++ if (!access_ok(&priv_cmd.buf, priv_cmd.total_len)) { + #else + if (!access_ok(VERIFY_READ, priv_cmd.buf, priv_cmd.total_len)) { + #endif @@ -450641,13 +448375,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/rtw_android.c linux-5.11 + (int)wifi_irqres->start, wifi_wake_gpio); + + if (wifi_wake_gpio > 0) { -+#ifdef CONFIG_PLATFORM_INTEL_BYT -+ wifi_configure_gpio(); -+#else /* CONFIG_PLATFORM_INTEL_BYT */ + gpio_request(wifi_wake_gpio, "oob_irq"); + gpio_direction_input(wifi_wake_gpio); + oob_irq = gpio_to_irq(wifi_wake_gpio); -+#endif /* CONFIG_PLATFORM_INTEL_BYT */ + RTW_INFO("%s oob_irq:%d\n", __func__, oob_irq); + } else if (wifi_irqres) { + oob_irq = wifi_irqres->start; @@ -450830,41 +448560,14 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/rtw_android.c linux-5.11 +#endif /* defined(RTW_ENABLE_WIFI_CONTROL_FUNC) */ + +#ifdef CONFIG_GPIO_WAKEUP -+#ifdef CONFIG_PLATFORM_INTEL_BYT -+int wifi_configure_gpio(void) -+{ -+ if (gpio_request(oob_gpio, "oob_irq")) { -+ RTW_INFO("## %s Cannot request GPIO\n", __FUNCTION__); -+ return -1; -+ } -+ gpio_export(oob_gpio, 0); -+ if (gpio_direction_input(oob_gpio)) { -+ RTW_INFO("## %s Cannot set GPIO direction input\n", __FUNCTION__); -+ return -1; -+ } -+ oob_irq = gpio_to_irq(oob_gpio); -+ if (oob_irq < 0) { -+ RTW_INFO("## %s Cannot convert GPIO to IRQ\n", __FUNCTION__); -+ return -1; -+ } -+ -+ RTW_INFO("## %s OOB_IRQ=%d\n", __FUNCTION__, oob_irq); -+ -+ return 0; -+} -+#endif /* CONFIG_PLATFORM_INTEL_BYT */ +void wifi_free_gpio(unsigned int gpio) +{ -+#ifdef CONFIG_PLATFORM_INTEL_BYT -+ if (gpio) -+ gpio_free(gpio); -+#endif /* CONFIG_PLATFORM_INTEL_BYT */ +} +#endif /* CONFIG_GPIO_WAKEUP */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/rtw_proc.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/os_dep/linux/rtw_proc.c ---- linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/rtw_proc.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/os_dep/linux/rtw_proc.c 2021-03-07 18:16:17.097958085 +0200 -@@ -0,0 +1,4745 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/os_dep/linux/rtw_proc.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/os_dep/linux/rtw_proc.c +--- linux-6.3.4/drivers/staging/rtl8812au/os_dep/linux/rtw_proc.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/os_dep/linux/rtw_proc.c 2022-12-18 17:40:24.578937030 +0200 +@@ -0,0 +1,4777 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. @@ -451080,7 +448783,11 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/rtw_proc.c linux-5.11.4- +static int rtw_drv_proc_open(struct inode *inode, struct file *file) +{ + /* struct net_device *dev = proc_get_parent_data(inode); */ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 17, 0) + ssize_t index = (ssize_t)PDE_DATA(inode); ++#else ++ ssize_t index = (ssize_t)inode->i_private; ++#endif + const struct rtw_proc_hdl *hdl = drv_proc_hdls + index; + void *private = NULL; + @@ -451102,7 +448809,11 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/rtw_proc.c linux-5.11.4- + +static ssize_t rtw_drv_proc_write(struct file *file, const char __user *buffer, size_t count, loff_t *pos) +{ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 17, 0) + ssize_t index = (ssize_t)PDE_DATA(file_inode(file)); ++#else ++ ssize_t index = (ssize_t)file_inode(file)->i_private; ++#endif + const struct rtw_proc_hdl *hdl = drv_proc_hdls + index; + ssize_t (*write)(struct file *, const char __user *, size_t, loff_t *, void *) = hdl->write; + @@ -455022,7 +452733,11 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/rtw_proc.c linux-5.11.4- + +static int rtw_adapter_proc_open(struct inode *inode, struct file *file) +{ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 17, 0) + ssize_t index = (ssize_t)PDE_DATA(inode); ++#else ++ ssize_t index = (ssize_t)inode->i_private; ++#endif + const struct rtw_proc_hdl *hdl = adapter_proc_hdls + index; + void *private = proc_get_parent_data(inode); + @@ -455044,7 +452759,11 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/rtw_proc.c linux-5.11.4- + +static ssize_t rtw_adapter_proc_write(struct file *file, const char __user *buffer, size_t count, loff_t *pos) +{ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 17, 0) + ssize_t index = (ssize_t)PDE_DATA(file_inode(file)); ++#else ++ ssize_t index = (ssize_t)file_inode(file)->i_private; ++#endif + const struct rtw_proc_hdl *hdl = adapter_proc_hdls + index; + ssize_t (*write)(struct file *, const char __user *, size_t, loff_t *, void *) = hdl->write; + @@ -455209,7 +452928,11 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/rtw_proc.c linux-5.11.4- + +static int rtw_odm_proc_open(struct inode *inode, struct file *file) +{ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 17, 0) + ssize_t index = (ssize_t)PDE_DATA(inode); ++#else ++ ssize_t index = (ssize_t)inode->i_private; ++#endif + const struct rtw_proc_hdl *hdl = odm_proc_hdls + index; + void *private = proc_get_parent_data(inode); + @@ -455231,7 +452954,11 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/rtw_proc.c linux-5.11.4- + +static ssize_t rtw_odm_proc_write(struct file *file, const char __user *buffer, size_t count, loff_t *pos) +{ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 17, 0) + ssize_t index = (ssize_t)PDE_DATA(file_inode(file)); ++#else ++ ssize_t index = (ssize_t)file_inode(file)->i_private; ++#endif + const struct rtw_proc_hdl *hdl = odm_proc_hdls + index; + ssize_t (*write)(struct file *, const char __user *, size_t, loff_t *, void *) = hdl->write; + @@ -455368,7 +453095,11 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/rtw_proc.c linux-5.11.4- + +static int rtw_mcc_proc_open(struct inode *inode, struct file *file) +{ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 17, 0) + ssize_t index = (ssize_t)PDE_DATA(inode); ++#else ++ ssize_t index = (ssize_t)inode->i_private; ++#endif + const struct rtw_proc_hdl *hdl = mcc_proc_hdls + index; + void *private = proc_get_parent_data(inode); + @@ -455390,7 +453121,11 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/rtw_proc.c linux-5.11.4- + +static ssize_t rtw_mcc_proc_write(struct file *file, const char __user *buffer, size_t count, loff_t *pos) +{ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 17, 0) + ssize_t index = (ssize_t)PDE_DATA(file_inode(file)); ++#else ++ ssize_t index = (ssize_t)file_inode(file)->i_private; ++#endif + const struct rtw_proc_hdl *hdl = mcc_proc_hdls + index; + ssize_t (*write)(struct file *, const char __user *, size_t, loff_t *, void *) = hdl->write; + @@ -455610,10 +453345,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/rtw_proc.c linux-5.11.4- +} + +#endif /* CONFIG_PROC_DEBUG */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/rtw_proc.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/os_dep/linux/rtw_proc.h ---- linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/rtw_proc.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/os_dep/linux/rtw_proc.h 2021-03-07 18:16:17.097958085 +0200 -@@ -0,0 +1,60 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/os_dep/linux/rtw_proc.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/os_dep/linux/rtw_proc.h +--- linux-6.3.4/drivers/staging/rtl8812au/os_dep/linux/rtw_proc.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/os_dep/linux/rtw_proc.h 2022-12-18 17:40:24.578937030 +0200 +@@ -0,0 +1,63 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. @@ -455633,6 +453368,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/rtw_proc.h linux-5.11.4- + +#include +#include ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 17, 0) ++#define PDE_DATA pde_data ++#endif + +#define RTW_PROC_HDL_TYPE_SEQ 0 +#define RTW_PROC_HDL_TYPE_SSEQ 1 @@ -455674,9 +453412,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/rtw_proc.h linux-5.11.4- +#endif /* !CONFIG_PROC_DEBUG */ + +#endif /* __RTW_PROC_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/rtw_rhashtable.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/os_dep/linux/rtw_rhashtable.c ---- linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/rtw_rhashtable.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/os_dep/linux/rtw_rhashtable.c 2021-03-07 18:16:17.097958085 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/os_dep/linux/rtw_rhashtable.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/os_dep/linux/rtw_rhashtable.c +--- linux-6.3.4/drivers/staging/rtl8812au/os_dep/linux/rtw_rhashtable.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/os_dep/linux/rtw_rhashtable.c 2022-01-28 22:59:35.632655118 +0200 @@ -0,0 +1,74 @@ +/****************************************************************************** + * @@ -455752,9 +453490,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/rtw_rhashtable.c linux-5 + +#endif /* CONFIG_RTW_MESH */ + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/rtw_rhashtable.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/os_dep/linux/rtw_rhashtable.h ---- linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/rtw_rhashtable.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/os_dep/linux/rtw_rhashtable.h 2021-03-07 18:16:17.097958085 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/os_dep/linux/rtw_rhashtable.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/os_dep/linux/rtw_rhashtable.h +--- linux-6.3.4/drivers/staging/rtl8812au/os_dep/linux/rtw_rhashtable.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/os_dep/linux/rtw_rhashtable.h 2022-01-28 22:59:35.632655118 +0200 @@ -0,0 +1,55 @@ +/****************************************************************************** + * @@ -455811,10 +453549,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/rtw_rhashtable.h linux-5 + +#endif /* __RTW_RHASHTABLE_H__ */ + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/usb_intf.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/os_dep/linux/usb_intf.c ---- linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/usb_intf.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/os_dep/linux/usb_intf.c 2021-03-07 18:16:17.097958085 +0200 -@@ -0,0 +1,1658 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/os_dep/linux/usb_intf.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/os_dep/linux/usb_intf.c +--- linux-6.3.4/drivers/staging/rtl8812au/os_dep/linux/usb_intf.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/os_dep/linux/usb_intf.c 2023-05-26 22:35:36.548136899 +0300 +@@ -0,0 +1,1652 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. @@ -455967,40 +453705,36 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/usb_intf.c linux-5.11.4- + {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x881B), .driver_info = RTL8812}, /* Default ID */ + {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x881C), .driver_info = RTL8812}, /* Default ID */ + /*=== Customer ID ===*/ -+ {USB_DEVICE(0x050D, 0x1106), .driver_info = RTL8812}, /* Belkin - sercomm */ -+ {USB_DEVICE(0x7392, 0xA822), .driver_info = RTL8812}, /* Edimax - Edimax */ -+ {USB_DEVICE(0x0DF6, 0x0074), .driver_info = RTL8812}, /* Sitecom - Edimax */ -+ {USB_DEVICE(0x04BB, 0x0952), .driver_info = RTL8812}, /* I-O DATA - Edimax */ -+ {USB_DEVICE(0x0789, 0x016E), .driver_info = RTL8812}, /* Logitec - Edimax */ + {USB_DEVICE(0x0409, 0x0408), .driver_info = RTL8812}, /* NEC - */ -+ {USB_DEVICE(0x0B05, 0x17D2), .driver_info = RTL8812}, /* ASUS - Edimax */ -+ {USB_DEVICE(0x0E66, 0x0022), .driver_info = RTL8812}, /* HAWKING - Edimax */ ++ {USB_DEVICE(0x0411, 0x025D), .driver_info = RTL8812}, /* Buffalo - WI-U3-866D */ ++ {USB_DEVICE(0x04BB, 0x0952), .driver_info = RTL8812}, /* I-O DATA - Edimax */ ++ {USB_DEVICE(0x050D, 0x1106), .driver_info = RTL8812}, /* Belkin - sercomm */ ++ {USB_DEVICE(0x050D, 0x1109), .driver_info = RTL8812}, /* Belkin F9L1109 - SerComm */ + {USB_DEVICE(0x0586, 0x3426), .driver_info = RTL8812}, /* ZyXEL - */ -+ {USB_DEVICE(0x2001, 0x3313), .driver_info = RTL8812}, /* D-Link - ALPHA */ -+ {USB_DEVICE(0x1058, 0x0632), .driver_info = RTL8812}, /* WD - Cybertan */ -+ {USB_DEVICE(0x1740, 0x0100), .driver_info = RTL8812}, /* EnGenius - EnGenius */ -+ {USB_DEVICE(0x2019, 0xAB30), .driver_info = RTL8812}, /* Planex - Abocom */ ++ {USB_DEVICE(0x0789, 0x016E), .driver_info = RTL8812}, /* Logitec - Edimax */ + {USB_DEVICE(0x07B8, 0x8812), .driver_info = RTL8812}, /* Abocom - Abocom */ + {USB_DEVICE(0x0846, 0x9051), .driver_info = RTL8812}, /* Netgear A6200 v2 */ ++ {USB_DEVICE(0x0B05, 0x17D2), .driver_info = RTL8812}, /* ASUS - Edimax */ ++ {USB_DEVICE(0x0DF6, 0x0074), .driver_info = RTL8812}, /* Sitecom - Edimax */ ++ {USB_DEVICE(0x0E66, 0x0022), .driver_info = RTL8812}, /* HAWKING - Edimax */ ++ {USB_DEVICE(0x1058, 0x0632), .driver_info = RTL8812}, /* WD - Cybertan */ ++ {USB_DEVICE(0x13B1, 0x003F), .driver_info = RTL8812}, /* Linksys - WUSB6300 */ ++ {USB_DEVICE(0x148F, 0x9097), .driver_info = RTL8812}, /* Amped Wireless ACA1 */ ++ {USB_DEVICE(0x1740, 0x0100), .driver_info = RTL8812}, /* EnGenius - EnGenius */ + {USB_DEVICE(0x2001, 0x330E), .driver_info = RTL8812}, /* D-Link - ALPHA */ + {USB_DEVICE(0x2001, 0x3313), .driver_info = RTL8812}, /* D-Link - ALPHA */ + {USB_DEVICE(0x2001, 0x3315), .driver_info = RTL8812}, /* D-Link - Cameo */ + {USB_DEVICE(0x2001, 0x3316), .driver_info = RTL8812}, /* D-Link - Cameo */ -+ {USB_DEVICE(0x13B1, 0x003F), .driver_info = RTL8812}, /* Linksys - WUSB6300 */ ++ {USB_DEVICE(0x2019, 0xAB30), .driver_info = RTL8812}, /* Planex - Abocom */ ++ {USB_DEVICE(0x20F4, 0x805B), .driver_info = RTL8812}, /* TRENDnet - */ + {USB_DEVICE(0x2357, 0x0101), .driver_info = RTL8812}, /* TP-Link - Archer T4U AC1200 */ + {USB_DEVICE(0x2357, 0x0103), .driver_info = RTL8812}, /* TP-Link - T4UH */ + {USB_DEVICE(0x2357, 0x010D), .driver_info = RTL8812}, /* TP-Link - Archer T4U AC1300 */ -+ {USB_DEVICE(0x2357, 0x0115), .driver_info = RTL8812}, /* TP-Link - Archer T4U AC1300 */ + {USB_DEVICE(0x2357, 0x010E), .driver_info = RTL8812}, /* TP-Link - Archer T4UH AC1300 */ + {USB_DEVICE(0x2357, 0x010F), .driver_info = RTL8812}, /* TP-Link - T4UHP */ + {USB_DEVICE(0x2357, 0x0122), .driver_info = RTL8812}, /* TP-Link - T4UHP (other) */ -+ {USB_DEVICE(0x20F4, 0x805B), .driver_info = RTL8812}, /* TRENDnet - */ -+ {USB_DEVICE(0x0411, 0x025D), .driver_info = RTL8812}, /* Buffalo - WI-U3-866D */ -+ {USB_DEVICE(0x050D, 0x1109), .driver_info = RTL8812}, /* Belkin F9L1109 - SerComm */ -+ {USB_DEVICE(0x148F, 0x9097), .driver_info = RTL8812}, /* Amped Wireless ACA1 */ -+ {USB_DEVICE(0x0BDA, 0x8812), .driver_info = RTL8812}, /* Alfa - AWUS036AC, AWUS036ACH & AWUS036EAC */ + {USB_DEVICE(0x2604, 0x0012), .driver_info = RTL8812}, /* Tenda U12 */ -+ {USB_DEVICE(0x0BDA, 0x881A), .driver_info = RTL8812}, /* Unex DAUK-W8812 */ ++ {USB_DEVICE(0x7392, 0xA822), .driver_info = RTL8812}, /* Edimax - Edimax */ +#endif + +#ifdef CONFIG_RTL8821A @@ -456012,45 +453746,43 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/usb_intf.c linux-5.11.4- + {USB_DEVICE_AND_INTERFACE_INFO(USB_VENDER_ID_REALTEK, 0x0820, 0xff, 0xff, 0xff), .driver_info = RTL8821}, /* 8821AU */ + {USB_DEVICE_AND_INTERFACE_INFO(USB_VENDER_ID_REALTEK, 0x0823, 0xff, 0xff, 0xff), .driver_info = RTL8821}, /* 8821AU */ + /*=== Customer ID ===*/ ++ {USB_DEVICE(0x0411, 0x0242), .driver_info = RTL8821}, /* ELECOM - WDC-433DU2H */ ++ {USB_DEVICE(0x0411, 0x029B), .driver_info = RTL8821}, /* Buffalo - WI-U2-433DHP */ ++ {USB_DEVICE(0x04BB, 0x0953), .driver_info = RTL8821}, /* I-O DATA - Edimax */ ++ {USB_DEVICE(0x056E, 0x4007), .driver_info = RTL8821}, /* Elecom - WDC-433DU2HBK */ ++ {USB_DEVICE(0x056E, 0x400E), .driver_info = RTL8821}, /* ELECOM - ELECOM */ ++ {USB_DEVICE(0x056E, 0x400F), .driver_info = RTL8821}, /* ELECOM - ELECOM */ ++ {USB_DEVICE(0x056E, 0x4010), .driver_info = RTL8821}, /* ELECOM - ELECOM */ ++ {USB_DEVICE(0x0846, 0x9052), .driver_info = RTL8821}, /* Netgear - A6100 */ ++ {USB_DEVICE(0x0E66, 0x0023), .driver_info = RTL8821}, /* HAWKING - Edimax */ ++ {USB_DEVICE(0x2001, 0x3314), .driver_info = RTL8821}, /* D-Link - Cameo */ ++ {USB_DEVICE(0x2001, 0x3318), .driver_info = RTL8821}, /* D-Link - Cameo */ ++ {USB_DEVICE(0x2019, 0xAB32), .driver_info = RTL8821}, /* Planex - GW-450S */ ++ {USB_DEVICE(0x2357, 0x011E), .driver_info = RTL8821}, /* TP Link - T2U Nano */ ++ {USB_DEVICE(0x2357, 0x011F), .driver_info = RTL8821}, /* TP-Link - Archer AC600 T2U Nano */ ++ {USB_DEVICE(0x2357, 0x0120), .driver_info = RTL8821}, /* TP Link - T2U Plus */ ++ {USB_DEVICE(0x3823, 0x6249), .driver_info = RTL8821}, /* Obihai - OBiWiFi */ + {USB_DEVICE(0x7392, 0xA811), .driver_info = RTL8821}, /* Edimax - Edimax */ + {USB_DEVICE(0x7392, 0xA812), .driver_info = RTL8821}, /* Edimax - EW-7811UTC */ + {USB_DEVICE(0x7392, 0xA813), .driver_info = RTL8821}, /* Edimax - EW-7811UAC */ + {USB_DEVICE(0x7392, 0xB611), .driver_info = RTL8821}, /* Edimax - EW-7811UCB */ -+ {USB_DEVICE(0x04BB, 0x0953), .driver_info = RTL8821}, /* I-O DATA - Edimax */ -+ {USB_DEVICE(0x2001, 0x3314), .driver_info = RTL8821}, /* D-Link - Cameo */ -+ {USB_DEVICE(0x2001, 0x3318), .driver_info = RTL8821}, /* D-Link - Cameo */ -+ {USB_DEVICE(0x0E66, 0x0023), .driver_info = RTL8821}, /* HAWKING - Edimax */ -+ {USB_DEVICE(0x056E, 0x400E), .driver_info = RTL8821}, /* ELECOM - ELECOM */ -+ {USB_DEVICE(0x056E, 0x400F), .driver_info = RTL8821}, /* ELECOM - ELECOM */ -+ {USB_DEVICE(0x0411, 0x0242), .driver_info = RTL8821}, /* ELECOM - WDC-433DU2H */ -+ {USB_DEVICE(0x2019, 0xAB32), .driver_info = RTL8821}, /* Planex - GW-450S */ -+ {USB_DEVICE(0x0846, 0x9052), .driver_info = RTL8821}, /* Netgear - A6100 */ -+ {USB_DEVICE(0x0411, 0x029B), .driver_info = RTL8821}, /* Buffalo - WI-U2-433DHP */ -+ {USB_DEVICE(0x056E, 0x4007), .driver_info = RTL8821}, /* Elecom - WDC-433DU2HBK */ -+ {USB_DEVICE(0x0BDA, 0xA811), .driver_info = RTL8821}, /* GMYLE - AC450 */ -+ {USB_DEVICE(0x3823, 0x6249), .driver_info = RTL8821}, /* Obihai - OBiWiFi */ -+ {USB_DEVICE(0x2357, 0x011E), .driver_info = RTL8821}, /* TP Link - T2U Nano */ -+ {USB_DEVICE(0x2357, 0x0122), .driver_info = RTL8821}, /* TP Link - T2U Nano */ -+ {USB_DEVICE(0x2357, 0x0120), .driver_info = RTL8821}, /* TP Link - T2U Plus */ -+ {USB_DEVICE(0x2357, 0x011F), .driver_info = RTL8821}, /* TP-Link - Archer AC600 T2U Nano */ +#endif + +#ifdef CONFIG_RTL8814A + {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8813), .driver_info = RTL8814A}, -+ {USB_DEVICE(0x2001, 0x331A), .driver_info = RTL8814A}, /* D-Link - D-Link */ + {USB_DEVICE(0x0B05, 0x1817), .driver_info = RTL8814A}, /* ASUS - ASUSTeK */ + {USB_DEVICE(0x0B05, 0x1852), .driver_info = RTL8814A}, /* ASUS - ASUSTeK */ + {USB_DEVICE(0x0B05, 0x1853), .driver_info = RTL8814A}, /* ASUS - ASUSTeK */ + {USB_DEVICE(0x056E, 0x400B), .driver_info = RTL8814A}, /* ELECOM - ELECOM */ + {USB_DEVICE(0x056E, 0x400D), .driver_info = RTL8814A}, /* ELECOM - ELECOM */ -+ {USB_DEVICE(0x7392, 0xA834), .driver_info = RTL8814A}, /* Edimax - Edimax */ -+ {USB_DEVICE(0x7392, 0xA833), .driver_info = RTL8814A}, /* Edimax - AC1750 */ -+ {USB_DEVICE(0x0BDA, 0x8813), .driver_info = RTL8814A}, /* Edimax - EDUP Adapters */ -+ {USB_DEVICE(0x0e66, 0x0026), .driver_info = RTL8814A}, /* Hawking Technologies - HW17ACU*/ -+ {USB_DEVICE(0x2357, 0x0106), .driver_info = RTL8814A}, /* TP-LINK Archer T9UH */ ++ {USB_DEVICE(0x0846, 0x9054), .driver_info = RTL8814A}, /* Netgear A7000 */ ++ {USB_DEVICE(0x0E66, 0x0026), .driver_info = RTL8814A}, /* Hawking Technologies - HW17ACU*/ ++ {USB_DEVICE(0x2001, 0x331A), .driver_info = RTL8814A}, /* D-Link - D-Link */ + {USB_DEVICE(0x20F4, 0x809A), .driver_info = RTL8814A}, /* TRENDnet - TRENDnet */ + {USB_DEVICE(0x20F4, 0x809B), .driver_info = RTL8814A}, /* TRENDnet TEW-809UB */ -+ {USB_DEVICE(0x0846, 0x9054), .driver_info = RTL8814A}, /* Netgear A7000 */ ++ {USB_DEVICE(0x2357, 0x0106), .driver_info = RTL8814A}, /* TP-LINK Archer T9UH */ ++ {USB_DEVICE(0x7392, 0xA834), .driver_info = RTL8814A}, /* Edimax - Edimax */ ++ {USB_DEVICE(0x7392, 0xA833), .driver_info = RTL8814A}, /* Edimax - AC1750 */ +#endif /* CONFIG_RTL8814A */ + + {} /* Terminating entry */ @@ -457473,9 +455205,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/usb_intf.c linux-5.11.4- +} +EXPORT_SYMBOL(rtw_usb_get_sw_pointer); +#endif /* CONFIG_INTEL_PROXIM */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/usb_ops_linux.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/os_dep/linux/usb_ops_linux.c ---- linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/usb_ops_linux.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/os_dep/linux/usb_ops_linux.c 2021-03-07 18:16:17.097958085 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/os_dep/linux/usb_ops_linux.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/os_dep/linux/usb_ops_linux.c +--- linux-6.3.4/drivers/staging/rtl8812au/os_dep/linux/usb_ops_linux.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/os_dep/linux/usb_ops_linux.c 2023-05-26 22:35:36.548136899 +0300 @@ -0,0 +1,1135 @@ +/****************************************************************************** + * @@ -458203,7 +455935,7 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/usb_ops_linux.c linux-5. +int recvbuf2recvframe(PADAPTER padapter, void *ptr); + +#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX -+void usb_recv_tasklet(void *priv) ++void usb_recv_tasklet(unsigned long priv) +{ + struct recv_buf *precvbuf = NULL; + _adapter *padapter = (_adapter *)priv; @@ -458341,7 +456073,7 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/usb_ops_linux.c linux-5. +} +#else /* CONFIG_USE_USB_BUFFER_ALLOC_RX */ + -+void usb_recv_tasklet(void *priv) ++void usb_recv_tasklet(unsigned long priv) +{ + _pkt *pskb; + _adapter *padapter = (_adapter *)priv; @@ -458612,9 +456344,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/usb_ops_linux.c linux-5. + return ret; +} +#endif /* CONFIG_USB_INTERRUPT_IN_PIPE */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/wifi_regd.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/os_dep/linux/wifi_regd.c ---- linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/wifi_regd.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/os_dep/linux/wifi_regd.c 2021-03-07 18:16:17.097958085 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/os_dep/linux/wifi_regd.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/os_dep/linux/wifi_regd.c +--- linux-6.3.4/drivers/staging/rtl8812au/os_dep/linux/wifi_regd.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/os_dep/linux/wifi_regd.c 2022-01-28 22:59:35.632655118 +0200 @@ -0,0 +1,437 @@ +/****************************************************************************** + * @@ -459053,9 +456785,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/wifi_regd.c linux-5.11.4 + return 0; +} +#endif /* CONFIG_IOCTL_CFG80211 */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/xmit_linux.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/os_dep/linux/xmit_linux.c ---- linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/xmit_linux.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/os_dep/linux/xmit_linux.c 2021-03-07 18:16:17.097958085 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/os_dep/linux/xmit_linux.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/os_dep/linux/xmit_linux.c +--- linux-6.3.4/drivers/staging/rtl8812au/os_dep/linux/xmit_linux.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/os_dep/linux/xmit_linux.c 2023-05-26 22:35:36.548136899 +0300 @@ -0,0 +1,567 @@ +/****************************************************************************** + * @@ -459503,7 +457235,7 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/xmit_linux.c linux-5.11. +#endif /* CONFIG_TX_MCAST2UNI */ + + -+int _rtw_xmit_entry(_pkt *pkt, _nic_hdl pnetdev) ++netdev_tx_t _rtw_xmit_entry(struct sk_buff *pkt, struct net_device *pnetdev) +{ + _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; @@ -459603,11 +457335,11 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/xmit_linux.c linux-5.11. + return 0; +} + -+int rtw_xmit_entry(_pkt *pkt, _nic_hdl pnetdev) ++netdev_tx_t rtw_xmit_entry(struct sk_buff *pkt, struct net_device *pnetdev) +{ + _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); + struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ int ret = 0; ++ netdev_tx_t ret = NETDEV_TX_OK; + + if (pkt) { + if (check_fwstate(pmlmepriv, WIFI_MONITOR_STATE) == _TRUE) { @@ -459624,10 +457356,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/linux/xmit_linux.c linux-5.11. + + return ret; +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/os_dep/osdep_service.c ---- linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/os_dep/osdep_service.c 2021-03-07 18:16:17.098958132 +0200 -@@ -0,0 +1,3172 @@ +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/os_dep/osdep_service.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/os_dep/osdep_service.c +--- linux-6.3.4/drivers/staging/rtl8812au/os_dep/osdep_service.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/os_dep/osdep_service.c 2023-05-26 22:35:36.548136899 +0300 +@@ -0,0 +1,2928 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. @@ -459656,6 +457388,10 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c linux-5.11.4-r +#endif +#endif /* DBG_MEMORY_LEAK */ + ++#if defined(MODULE_IMPORT_NS) ++MODULE_IMPORT_NS(VFS_internal_I_am_really_a_filesystem_and_am_NOT_a_driver); ++#endif ++ +#if defined(PLATFORM_LINUX) +/* +* Translate the OS dependent @param error_code to OS independent RTW_STATUS_CODE @@ -459711,10 +457447,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c linux-5.11.4-r + pbuf = malloc(sz, M_DEVBUF, M_NOWAIT); +#endif + -+#ifdef PLATFORM_WINDOWS -+ NdisAllocateMemoryWithTag(&pbuf, sz, RT_TAG); -+#endif -+ +#ifdef DBG_MEMORY_LEAK +#ifdef PLATFORM_LINUX + if (pbuf != NULL) { @@ -459738,11 +457470,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c linux-5.11.4-r +#ifdef PLATFORM_FREEBSD + pbuf = malloc(sz, M_DEVBUF, M_ZERO | M_NOWAIT); +#endif -+#ifdef PLATFORM_WINDOWS -+ NdisAllocateMemoryWithTag(&pbuf, sz, RT_TAG); -+ if (pbuf != NULL) -+ NdisFillMemory(pbuf, sz, 0); -+#endif + + return pbuf; +} @@ -459755,9 +457482,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c linux-5.11.4-r +#ifdef PLATFORM_FREEBSD + free(pbuf, M_DEVBUF); +#endif -+#ifdef PLATFORM_WINDOWS -+ NdisFreeMemory(pbuf, sz, 0); -+#endif + +#ifdef DBG_MEMORY_LEAK +#ifdef PLATFORM_LINUX @@ -459783,11 +457507,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c linux-5.11.4-r +#ifdef PLATFORM_FREEBSD + pbuf = malloc(sz, M_DEVBUF, M_NOWAIT); +#endif -+#ifdef PLATFORM_WINDOWS -+ -+ NdisAllocateMemoryWithTag(&pbuf, sz, RT_TAG); -+ -+#endif + +#ifdef DBG_MEMORY_LEAK +#ifdef PLATFORM_LINUX @@ -459816,10 +457535,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c linux-5.11.4-r + memset(pbuf, 0, sz); +#endif + -+#ifdef PLATFORM_WINDOWS -+ NdisFillMemory(pbuf, sz, 0); -+#endif -+ + } + + return pbuf; @@ -459841,11 +457556,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c linux-5.11.4-r +#ifdef PLATFORM_FREEBSD + free(pbuf, M_DEVBUF); +#endif -+#ifdef PLATFORM_WINDOWS -+ -+ NdisFreeMemory(pbuf, sz, 0); -+ -+#endif + +#ifdef DBG_MEMORY_LEAK +#ifdef PLATFORM_LINUX @@ -460559,12 +458269,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c linux-5.11.4-r + +#endif + -+#ifdef PLATFORM_WINDOWS -+ -+ NdisMoveMemory(dst, src, sz); -+ -+#endif -+ +} + +inline void _rtw_memmove(void *dst, const void *src, u32 sz) @@ -460588,19 +458292,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c linux-5.11.4-r + return _FALSE; +#endif + -+ -+#ifdef PLATFORM_WINDOWS -+ /* under Windows, the return value of NdisEqualMemory for two same mem. chunk is 1 */ -+ -+ if (NdisEqualMemory(dst, src, sz)) -+ return _TRUE; -+ else -+ return _FALSE; -+ -+#endif -+ -+ -+ +} + +void _rtw_memset(void *pbuf, int c, u32 sz) @@ -460612,16 +458303,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c linux-5.11.4-r + +#endif + -+#ifdef PLATFORM_WINDOWS -+#if 0 -+ NdisZeroMemory(pbuf, sz); -+ if (c != 0) -+ memset(pbuf, c, sz); -+#else -+ NdisFillMemory(pbuf, sz, c); -+#endif -+#endif -+ +} + +#ifdef PLATFORM_FREEBSD @@ -460648,11 +458329,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c linux-5.11.4-r + list->next = list; + list->prev = list; +#endif -+#ifdef PLATFORM_WINDOWS -+ -+ NdisInitializeListHead(list); -+ -+#endif + +} + @@ -460682,17 +458358,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c linux-5.11.4-r + +#endif + -+ -+#ifdef PLATFORM_WINDOWS -+ -+ if (IsListEmpty(phead)) -+ return _TRUE; -+ else -+ return _FALSE; -+ -+#endif -+ -+ +} + +void rtw_list_insert_head(_list *plist, _list *phead) @@ -460706,9 +458371,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c linux-5.11.4-r + __list_add(plist, phead, phead->next); +#endif + -+#ifdef PLATFORM_WINDOWS -+ InsertHeadList(phead, plist); -+#endif +} + +void rtw_list_insert_tail(_list *plist, _list *phead) @@ -460724,11 +458386,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c linux-5.11.4-r + __list_add(plist, phead->prev, phead); + +#endif -+#ifdef PLATFORM_WINDOWS -+ -+ InsertTailList(phead, plist); -+ -+#endif + +} + @@ -460819,9 +458476,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c linux-5.11.4-r +#ifdef PLATFORM_FREEBSD + _init_timer(ptimer, adapter->pifp, pfunc, ctx); +#endif -+#ifdef PLATFORM_WINDOWS -+ _init_timer(ptimer, adapter->hndis_adapter, pfunc, ctx); -+#endif +} + +/* @@ -460842,16 +458496,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c linux-5.11.4-r +#ifdef PLATFORM_FREEBSD + sema_init(sema, init_val, "rtw_drv"); +#endif -+#ifdef PLATFORM_OS_XP -+ -+ KeInitializeSemaphore(sema, init_val, SEMA_UPBND); /* count=0; */ -+ -+#endif -+ -+#ifdef PLATFORM_OS_CE -+ if (*sema == NULL) -+ *sema = CreateSemaphore(NULL, init_val, SEMA_UPBND, NULL); -+#endif + +} + @@ -460860,9 +458504,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c linux-5.11.4-r +#ifdef PLATFORM_FREEBSD + sema_destroy(sema); +#endif -+#ifdef PLATFORM_OS_CE -+ CloseHandle(*sema); -+#endif + +} + @@ -460877,15 +458518,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c linux-5.11.4-r +#ifdef PLATFORM_FREEBSD + sema_post(sema); +#endif -+#ifdef PLATFORM_OS_XP -+ -+ KeReleaseSemaphore(sema, IO_NETWORK_INCREMENT, 1, FALSE); -+ -+#endif -+ -+#ifdef PLATFORM_OS_CE -+ ReleaseSemaphore(*sema, 1, NULL); -+#endif +} + +u32 _rtw_down_sema(_sema *sema) @@ -460903,39 +458535,25 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c linux-5.11.4-r + sema_wait(sema); + return _SUCCESS; +#endif -+#ifdef PLATFORM_OS_XP -+ -+ if (STATUS_SUCCESS == KeWaitForSingleObject(sema, Executive, KernelMode, TRUE, NULL)) -+ return _SUCCESS; -+ else -+ return _FAIL; -+#endif -+ -+#ifdef PLATFORM_OS_CE -+ if (WAIT_OBJECT_0 == WaitForSingleObject(*sema, INFINITE)) -+ return _SUCCESS; -+ else -+ return _FAIL; -+#endif +} + ++#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 17, 0) +inline void thread_exit(_completion *comp) ++#else ++inline void kthread_thread_exit(_completion *comp) ++#endif +{ +#ifdef PLATFORM_LINUX ++#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 17, 0) + complete_and_exit(comp, 0); ++#else ++ kthread_complete_and_exit(comp, 0); ++#endif +#endif + +#ifdef PLATFORM_FREEBSD + printf("%s", "RTKTHREAD_exit"); +#endif -+ -+#ifdef PLATFORM_OS_CE -+ ExitThread(STATUS_SUCCESS); -+#endif -+ -+#ifdef PLATFORM_OS_XP -+ PsTerminateSystemThread(STATUS_SUCCESS); -+#endif +} + +inline void _rtw_init_completion(_completion *comp) @@ -460971,15 +458589,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c linux-5.11.4-r +#ifdef PLATFORM_FREEBSD + mtx_init(pmutex, "", NULL, MTX_DEF | MTX_RECURSE); +#endif -+#ifdef PLATFORM_OS_XP -+ -+ KeInitializeMutex(pmutex, 0); -+ -+#endif -+ -+#ifdef PLATFORM_OS_CE -+ *pmutex = CreateMutex(NULL, _FALSE, NULL); -+#endif +} + +void _rtw_mutex_free(_mutex *pmutex); @@ -460997,14 +458606,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c linux-5.11.4-r +#endif + +#endif -+ -+#ifdef PLATFORM_OS_XP -+ -+#endif -+ -+#ifdef PLATFORM_OS_CE -+ -+#endif +} + +void _rtw_spinlock_init(_lock *plock) @@ -461018,11 +458619,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c linux-5.11.4-r +#ifdef PLATFORM_FREEBSD + mtx_init(plock, "", NULL, MTX_DEF | MTX_RECURSE); +#endif -+#ifdef PLATFORM_WINDOWS -+ -+ NdisAllocateSpinLock(plock); -+ -+#endif + +} + @@ -461032,12 +458628,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c linux-5.11.4-r + mtx_destroy(plock); +#endif + -+#ifdef PLATFORM_WINDOWS -+ -+ NdisFreeSpinLock(plock); -+ -+#endif -+ +} +#ifdef PLATFORM_FREEBSD +extern PADAPTER prtw_lock; @@ -461071,11 +458661,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c linux-5.11.4-r +#ifdef PLATFORM_FREEBSD + mtx_lock(plock); +#endif -+#ifdef PLATFORM_WINDOWS -+ -+ NdisAcquireSpinLock(plock); -+ -+#endif + +} + @@ -461090,11 +458675,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c linux-5.11.4-r +#ifdef PLATFORM_FREEBSD + mtx_unlock(plock); +#endif -+#ifdef PLATFORM_WINDOWS -+ -+ NdisReleaseSpinLock(plock); -+ -+#endif +} + + @@ -461109,11 +458689,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c linux-5.11.4-r +#ifdef PLATFORM_FREEBSD + mtx_lock(plock); +#endif -+#ifdef PLATFORM_WINDOWS -+ -+ NdisDprAcquireSpinLock(plock); -+ -+#endif + +} + @@ -461128,15 +458703,8 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c linux-5.11.4-r +#ifdef PLATFORM_FREEBSD + mtx_unlock(plock); +#endif -+#ifdef PLATFORM_WINDOWS -+ -+ NdisDprReleaseSpinLock(plock); -+ -+#endif +} + -+ -+ +void _rtw_init_queue(_queue *pqueue) +{ + _rtw_init_listhead(&(pqueue->queue)); @@ -461174,11 +458742,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c linux-5.11.4-r + getmicrotime(&tvp); + return tvp.tv_sec; +#endif -+#ifdef PLATFORM_WINDOWS -+ LARGE_INTEGER SystemTime; -+ NdisGetCurrentSystemTime(&SystemTime); -+ return SystemTime.LowPart;/* count of 100-nanosecond intervals */ -+#endif +} + +inline u32 _rtw_systime_to_ms(systime stime) @@ -461189,9 +458752,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c linux-5.11.4-r +#ifdef PLATFORM_FREEBSD + return stime * 1000; +#endif -+#ifdef PLATFORM_WINDOWS -+ return stime / 10000 ; -+#endif +} + +inline systime _rtw_ms_to_systime(u32 ms) @@ -461202,9 +458762,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c linux-5.11.4-r +#ifdef PLATFORM_FREEBSD + return ms / 1000; +#endif -+#ifdef PLATFORM_WINDOWS -+ return ms * 10000 ; -+#endif +} + +inline systime _rtw_us_to_systime(u32 us) @@ -461263,15 +458820,8 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c linux-5.11.4-r + return ; +#endif + -+#ifdef PLATFORM_WINDOWS -+ -+ NdisMSleep(ms * 1000); /* (us)*1000=(ms) */ -+ -+#endif -+ +} + -+ +void rtw_msleep_os(int ms) +{ + @@ -461290,13 +458840,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c linux-5.11.4-r + DELAY(ms * 1000); + return ; +#endif -+#ifdef PLATFORM_WINDOWS -+ -+ NdisMSleep(ms * 1000); /* (us)*1000=(ms) */ -+ -+#endif -+ -+ +} +void rtw_usleep_os(int us) +{ @@ -461319,16 +458862,8 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c linux-5.11.4-r + + return ; +#endif -+#ifdef PLATFORM_WINDOWS -+ -+ NdisMSleep(us); /* (us) */ -+ -+#endif -+ -+ +} + -+ +#ifdef DBG_DELAY_OS +void _rtw_mdelay_os(int ms, const char *func, const int line) +{ @@ -461346,10 +458881,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c linux-5.11.4-r + + mdelay((unsigned long)ms); + -+#elif defined(PLATFORM_WINDOWS) -+ -+ NdisStallExecution(ms * 1000); /* (us)*1000=(ms) */ -+ +#endif + + @@ -461373,10 +458904,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c linux-5.11.4-r + + udelay((unsigned long)us); + -+#elif defined(PLATFORM_WINDOWS) -+ -+ NdisStallExecution(us); /* (us) */ -+ +#endif + +} @@ -461393,13 +458920,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c linux-5.11.4-r + DELAY(ms * 1000); + return ; +#endif -+#ifdef PLATFORM_WINDOWS -+ -+ NdisStallExecution(ms * 1000); /* (us)*1000=(ms) */ -+ -+#endif -+ -+ +} +void rtw_udelay_os(int us) +{ @@ -461414,11 +458934,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c linux-5.11.4-r + DELAY(us); + return ; +#endif -+#ifdef PLATFORM_WINDOWS -+ -+ NdisStallExecution(us); /* (us) */ -+ -+#endif + +} +#endif @@ -461431,9 +458946,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c linux-5.11.4-r +#ifdef PLATFORM_FREEBSD + yield(); +#endif -+#ifdef PLATFORM_WINDOWS -+ SwitchToThread(); -+#endif +} + +bool rtw_macaddr_is_larger(const u8 *a, const u8 *b) @@ -461598,8 +459110,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c linux-5.11.4-r +{ +#ifdef PLATFORM_LINUX + atomic_set(v, i); -+#elif defined(PLATFORM_WINDOWS) -+ *v = i; /* other choice???? */ +#elif defined(PLATFORM_FREEBSD) + atomic_set_int(v, i); +#endif @@ -461609,8 +459119,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c linux-5.11.4-r +{ +#ifdef PLATFORM_LINUX + return atomic_read(v); -+#elif defined(PLATFORM_WINDOWS) -+ return *v; /* other choice???? */ +#elif defined(PLATFORM_FREEBSD) + return atomic_load_acq_32(v); +#endif @@ -461620,8 +459128,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c linux-5.11.4-r +{ +#ifdef PLATFORM_LINUX + atomic_add(i, v); -+#elif defined(PLATFORM_WINDOWS) -+ InterlockedAdd(v, i); +#elif defined(PLATFORM_FREEBSD) + atomic_add_int(v, i); +#endif @@ -461630,8 +459136,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c linux-5.11.4-r +{ +#ifdef PLATFORM_LINUX + atomic_sub(i, v); -+#elif defined(PLATFORM_WINDOWS) -+ InterlockedAdd(v, -i); +#elif defined(PLATFORM_FREEBSD) + atomic_subtract_int(v, i); +#endif @@ -461641,8 +459145,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c linux-5.11.4-r +{ +#ifdef PLATFORM_LINUX + atomic_inc(v); -+#elif defined(PLATFORM_WINDOWS) -+ InterlockedIncrement(v); +#elif defined(PLATFORM_FREEBSD) + atomic_add_int(v, 1); +#endif @@ -461652,8 +459154,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c linux-5.11.4-r +{ +#ifdef PLATFORM_LINUX + atomic_dec(v); -+#elif defined(PLATFORM_WINDOWS) -+ InterlockedDecrement(v); +#elif defined(PLATFORM_FREEBSD) + atomic_subtract_int(v, 1); +#endif @@ -461663,8 +459163,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c linux-5.11.4-r +{ +#ifdef PLATFORM_LINUX + return atomic_add_return(i, v); -+#elif defined(PLATFORM_WINDOWS) -+ return InterlockedAdd(v, i); +#elif defined(PLATFORM_FREEBSD) + atomic_add_int(v, i); + return atomic_load_acq_32(v); @@ -461675,8 +459173,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c linux-5.11.4-r +{ +#ifdef PLATFORM_LINUX + return atomic_sub_return(i, v); -+#elif defined(PLATFORM_WINDOWS) -+ return InterlockedAdd(v, -i); +#elif defined(PLATFORM_FREEBSD) + atomic_subtract_int(v, i); + return atomic_load_acq_32(v); @@ -461687,8 +459183,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c linux-5.11.4-r +{ +#ifdef PLATFORM_LINUX + return atomic_inc_return(v); -+#elif defined(PLATFORM_WINDOWS) -+ return InterlockedIncrement(v); +#elif defined(PLATFORM_FREEBSD) + atomic_add_int(v, 1); + return atomic_load_acq_32(v); @@ -461699,8 +459193,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c linux-5.11.4-r +{ +#ifdef PLATFORM_LINUX + return atomic_dec_return(v); -+#elif defined(PLATFORM_WINDOWS) -+ return InterlockedDecrement(v); +#elif defined(PLATFORM_FREEBSD) + atomic_subtract_int(v, 1); + return atomic_load_acq_32(v); @@ -462138,7 +459630,7 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c linux-5.11.4-r + + rtw_init_netdev_name(pnetdev, ifname); + -+ _rtw_memcpy(pnetdev->dev_addr, adapter_mac_addr(padapter), ETH_ALEN); ++ dev_addr_set(pnetdev, adapter_mac_addr(padapter)); + + if (rtnl_lock_needed) + ret = register_netdev(pnetdev); @@ -462239,8 +459731,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c linux-5.11.4-r +{ +#ifdef PLATFORM_LINUX + return do_div(x, y); -+#elif defined(PLATFORM_WINDOWS) -+ return x % y; +#elif defined(PLATFORM_FREEBSD) + return x % y; +#endif @@ -462251,8 +459741,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c linux-5.11.4-r +#ifdef PLATFORM_LINUX + do_div(x, y); + return x; -+#elif defined(PLATFORM_WINDOWS) -+ return x / y; +#elif defined(PLATFORM_FREEBSD) + return x / y; +#endif @@ -462261,7 +459749,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c linux-5.11.4-r +inline u32 rtw_random32(void) +{ +#ifdef PLATFORM_LINUX -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0)) ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 1, 0)) ++ return get_random_u32(); ++#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0)) + return prandom_u32(); +#elif (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 18)) + u32 random_int; @@ -462270,8 +459760,6 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c linux-5.11.4-r +#else + return random32(); +#endif -+#elif defined(PLATFORM_WINDOWS) -+#error "to be implemented\n" +#elif defined(PLATFORM_FREEBSD) +#error "to be implemented\n" +#endif @@ -462800,9 +460288,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/os_dep/osdep_service.c linux-5.11.4-r + return 0; +} + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/platform/custom_country_chplan.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/platform/custom_country_chplan.h ---- linux-5.11.4/3rdparty/rtl8812au/platform/custom_country_chplan.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/platform/custom_country_chplan.h 2021-03-07 18:16:17.098958132 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/platform/custom_country_chplan.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/platform/custom_country_chplan.h +--- linux-6.3.4/drivers/staging/rtl8812au/platform/custom_country_chplan.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/platform/custom_country_chplan.h 2022-01-28 22:59:35.633655166 +0200 @@ -0,0 +1,22 @@ +/****************************************************************************** + * @@ -462826,9 +460314,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/platform/custom_country_chplan.h linu + COUNTRY_CHPLAN_ENT("TW", 0x76, 1, 0x3FF), /* Taiwan */ +}; + -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/platform/platform_aml_s905_sdio.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/platform/platform_aml_s905_sdio.c ---- linux-5.11.4/3rdparty/rtl8812au/platform/platform_aml_s905_sdio.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/platform/platform_aml_s905_sdio.c 2021-03-07 18:16:17.098958132 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/platform/platform_aml_s905_sdio.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/platform/platform_aml_s905_sdio.c +--- linux-6.3.4/drivers/staging/rtl8812au/platform/platform_aml_s905_sdio.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/platform/platform_aml_s905_sdio.c 2022-01-28 22:59:35.633655166 +0200 @@ -0,0 +1,54 @@ +/****************************************************************************** + * @@ -462884,9 +460372,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/platform/platform_aml_s905_sdio.c lin + wifi_teardown_dt(); +#endif /* kernel < 3.14.0 */ +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/platform/platform_aml_s905_sdio.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/platform/platform_aml_s905_sdio.h ---- linux-5.11.4/3rdparty/rtl8812au/platform/platform_aml_s905_sdio.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/platform/platform_aml_s905_sdio.h 2021-03-07 18:16:17.098958132 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/platform/platform_aml_s905_sdio.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/platform/platform_aml_s905_sdio.h +--- linux-6.3.4/drivers/staging/rtl8812au/platform/platform_aml_s905_sdio.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/platform/platform_aml_s905_sdio.h 2022-01-28 22:59:35.633655166 +0200 @@ -0,0 +1,32 @@ +/****************************************************************************** + * @@ -462920,9 +460408,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/platform/platform_aml_s905_sdio.h lin +#endif /* kernel < 3.14.0 */ + +#endif /* __PLATFORM_AML_S905_SDIO_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/platform/platform_arm_act_sdio.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/platform/platform_arm_act_sdio.c ---- linux-5.11.4/3rdparty/rtl8812au/platform/platform_arm_act_sdio.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/platform/platform_arm_act_sdio.c 2021-03-07 18:16:17.098958132 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/platform/platform_arm_act_sdio.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/platform/platform_arm_act_sdio.c +--- linux-6.3.4/drivers/staging/rtl8812au/platform/platform_arm_act_sdio.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/platform/platform_arm_act_sdio.c 2022-01-28 22:59:35.633655166 +0200 @@ -0,0 +1,53 @@ +/****************************************************************************** + * @@ -462977,9 +460465,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/platform/platform_arm_act_sdio.c linu + acts_wifi_cleanup(); +#endif +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/platform/platform_ARM_SUN50IW1P1_sdio.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/platform/platform_ARM_SUN50IW1P1_sdio.c ---- linux-5.11.4/3rdparty/rtl8812au/platform/platform_ARM_SUN50IW1P1_sdio.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/platform/platform_ARM_SUN50IW1P1_sdio.c 2021-03-07 18:16:17.098958132 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/platform/platform_ARM_SUN50IW1P1_sdio.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/platform/platform_ARM_SUN50IW1P1_sdio.c +--- linux-6.3.4/drivers/staging/rtl8812au/platform/platform_ARM_SUN50IW1P1_sdio.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/platform/platform_ARM_SUN50IW1P1_sdio.c 2022-01-28 22:59:35.633655166 +0200 @@ -0,0 +1,86 @@ +/****************************************************************************** + * @@ -463067,9 +460555,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/platform/platform_ARM_SUN50IW1P1_sdio + RTW_INFO("%s: remove card, power off.\n", __FUNCTION__); +#endif /* CONFIG_MMC */ +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/platform/platform_ARM_SUNnI_sdio.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/platform/platform_ARM_SUNnI_sdio.c ---- linux-5.11.4/3rdparty/rtl8812au/platform/platform_ARM_SUNnI_sdio.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/platform/platform_ARM_SUNnI_sdio.c 2021-03-07 18:16:17.098958132 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/platform/platform_ARM_SUNnI_sdio.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/platform/platform_ARM_SUNnI_sdio.c +--- linux-6.3.4/drivers/staging/rtl8812au/platform/platform_ARM_SUNnI_sdio.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/platform/platform_ARM_SUNnI_sdio.c 2022-01-28 22:59:35.633655166 +0200 @@ -0,0 +1,130 @@ +/****************************************************************************** + * @@ -463201,9 +460689,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/platform/platform_ARM_SUNnI_sdio.c li + RTW_INFO("%s: remove card, power off.\n", __FUNCTION__); +#endif /* CONFIG_MMC */ +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/platform/platform_ARM_SUNxI_sdio.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/platform/platform_ARM_SUNxI_sdio.c ---- linux-5.11.4/3rdparty/rtl8812au/platform/platform_ARM_SUNxI_sdio.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/platform/platform_ARM_SUNxI_sdio.c 2021-03-07 18:16:17.098958132 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/platform/platform_ARM_SUNxI_sdio.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/platform/platform_ARM_SUNxI_sdio.c +--- linux-6.3.4/drivers/staging/rtl8812au/platform/platform_ARM_SUNxI_sdio.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/platform/platform_ARM_SUNxI_sdio.c 2022-01-28 22:59:35.633655166 +0200 @@ -0,0 +1,90 @@ +/****************************************************************************** + * @@ -463295,9 +460783,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/platform/platform_ARM_SUNxI_sdio.c li +#endif /* CONFIG_RTL8188E */ +#endif /* CONFIG_MMC_SUNXI_POWER_CONTROL */ +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/platform/platform_ARM_SUNxI_usb.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/platform/platform_ARM_SUNxI_usb.c ---- linux-5.11.4/3rdparty/rtl8812au/platform/platform_ARM_SUNxI_usb.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/platform/platform_ARM_SUNxI_usb.c 2021-03-07 18:16:17.098958132 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/platform/platform_ARM_SUNxI_usb.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/platform/platform_ARM_SUNxI_usb.c +--- linux-6.3.4/drivers/staging/rtl8812au/platform/platform_ARM_SUNxI_usb.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/platform/platform_ARM_SUNxI_usb.c 2022-01-28 22:59:35.633655166 +0200 @@ -0,0 +1,136 @@ +/****************************************************************************** + * @@ -463435,9 +460923,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/platform/platform_ARM_SUNxI_usb.c lin +#endif /* defined(CONFIG_PLATFORM_ARM_SUN8I) */ + +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/platform/platform_ARM_WMT_sdio.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/platform/platform_ARM_WMT_sdio.c ---- linux-5.11.4/3rdparty/rtl8812au/platform/platform_ARM_WMT_sdio.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/platform/platform_ARM_WMT_sdio.c 2021-03-07 18:16:17.098958132 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/platform/platform_ARM_WMT_sdio.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/platform/platform_ARM_WMT_sdio.c +--- linux-6.3.4/drivers/staging/rtl8812au/platform/platform_ARM_WMT_sdio.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/platform/platform_ARM_WMT_sdio.c 2022-01-28 22:59:35.633655166 +0200 @@ -0,0 +1,46 @@ +/****************************************************************************** + * @@ -463485,9 +460973,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/platform/platform_ARM_WMT_sdio.c linu + gpio_free(WMT_PIN_GP62_SUSGPIO1); + printk("[rtl8189es] %s: remove card, power off.\n", __FUNCTION__); +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/platform/platform_hisilicon_hi3798_sdio.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/platform/platform_hisilicon_hi3798_sdio.c ---- linux-5.11.4/3rdparty/rtl8812au/platform/platform_hisilicon_hi3798_sdio.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/platform/platform_hisilicon_hi3798_sdio.c 2021-03-07 18:16:17.098958132 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/platform/platform_hisilicon_hi3798_sdio.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/platform/platform_hisilicon_hi3798_sdio.c +--- linux-6.3.4/drivers/staging/rtl8812au/platform/platform_hisilicon_hi3798_sdio.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/platform/platform_hisilicon_hi3798_sdio.c 2022-01-28 22:59:35.633655166 +0200 @@ -0,0 +1,110 @@ +/****************************************************************************** + * @@ -463599,9 +461087,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/platform/platform_hisilicon_hi3798_sd + mdelay(100); + hi_gpio_set_value(gpio_wlan_reg_on, 0); +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/platform/platform_hisilicon_hi3798_sdio.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/platform/platform_hisilicon_hi3798_sdio.h ---- linux-5.11.4/3rdparty/rtl8812au/platform/platform_hisilicon_hi3798_sdio.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/platform/platform_hisilicon_hi3798_sdio.h 2021-03-07 18:16:17.098958132 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/platform/platform_hisilicon_hi3798_sdio.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/platform/platform_hisilicon_hi3798_sdio.h +--- linux-6.3.4/drivers/staging/rtl8812au/platform/platform_hisilicon_hi3798_sdio.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/platform/platform_hisilicon_hi3798_sdio.h 2022-01-28 22:59:35.633655166 +0200 @@ -0,0 +1,28 @@ +/****************************************************************************** + * @@ -463631,9 +461119,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/platform/platform_hisilicon_hi3798_sd +extern HI_S32 HI_DRV_GPIO_WriteBit(HI_U32 u32GpioNo, HI_U32 u32BitValue); + +#endif /* __PLATFORM_HISILICON_HI3798_SDIO_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/platform/platform_ops.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/platform/platform_ops.c ---- linux-5.11.4/3rdparty/rtl8812au/platform/platform_ops.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/platform/platform_ops.c 2021-03-07 18:16:17.098958132 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/platform/platform_ops.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/platform/platform_ops.c +--- linux-6.3.4/drivers/staging/rtl8812au/platform/platform_ops.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/platform/platform_ops.c 2022-01-28 22:59:35.633655166 +0200 @@ -0,0 +1,32 @@ +/****************************************************************************** + * @@ -463667,9 +461155,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/platform/platform_ops.c linux-5.11.4- +{ +} +#endif /* !CONFIG_PLATFORM_OPS */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/platform/platform_ops.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/platform/platform_ops.h ---- linux-5.11.4/3rdparty/rtl8812au/platform/platform_ops.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/platform/platform_ops.h 2021-03-07 18:16:17.098958132 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/platform/platform_ops.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/platform/platform_ops.h +--- linux-6.3.4/drivers/staging/rtl8812au/platform/platform_ops.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/platform/platform_ops.h 2022-01-28 22:59:35.633655166 +0200 @@ -0,0 +1,26 @@ +/****************************************************************************** + * @@ -463697,9 +461185,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/platform/platform_ops.h linux-5.11.4- +void platform_wifi_power_off(void); + +#endif /* __PLATFORM_OPS_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/platform/platform_RTK_DMP_usb.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/platform/platform_RTK_DMP_usb.c ---- linux-5.11.4/3rdparty/rtl8812au/platform/platform_RTK_DMP_usb.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/platform/platform_RTK_DMP_usb.c 2021-03-07 18:16:17.098958132 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/platform/platform_RTK_DMP_usb.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/platform/platform_RTK_DMP_usb.c +--- linux-6.3.4/drivers/staging/rtl8812au/platform/platform_RTK_DMP_usb.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/platform/platform_RTK_DMP_usb.c 2022-01-28 22:59:35.633655166 +0200 @@ -0,0 +1,30 @@ +/****************************************************************************** + * @@ -463731,9 +461219,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/platform/platform_RTK_DMP_usb.c linux +void platform_wifi_power_off(void) +{ +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/platform/platform_sprd_sdio.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/platform/platform_sprd_sdio.c ---- linux-5.11.4/3rdparty/rtl8812au/platform/platform_sprd_sdio.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/platform/platform_sprd_sdio.c 2021-03-07 18:16:17.098958132 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/platform/platform_sprd_sdio.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/platform/platform_sprd_sdio.c +--- linux-6.3.4/drivers/staging/rtl8812au/platform/platform_sprd_sdio.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/platform/platform_sprd_sdio.c 2022-01-28 22:59:35.633655166 +0200 @@ -0,0 +1,84 @@ +/****************************************************************************** + * @@ -463819,9 +461307,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/platform/platform_sprd_sdio.c linux-5 + mmc_host->pm_flags &= ~MMC_PM_KEEP_POWER; +#endif /* CONFIG_WOWLAN */ +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/platform/platform_zte_zx296716_sdio.c linux-5.11.4-rtl8812au/3rdparty/rtl8812au/platform/platform_zte_zx296716_sdio.c ---- linux-5.11.4/3rdparty/rtl8812au/platform/platform_zte_zx296716_sdio.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/platform/platform_zte_zx296716_sdio.c 2021-03-07 18:16:17.098958132 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/platform/platform_zte_zx296716_sdio.c linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/platform/platform_zte_zx296716_sdio.c +--- linux-6.3.4/drivers/staging/rtl8812au/platform/platform_zte_zx296716_sdio.c 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/platform/platform_zte_zx296716_sdio.c 2022-01-28 22:59:35.633655166 +0200 @@ -0,0 +1,53 @@ +/****************************************************************************** + * @@ -463876,9 +461364,9 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/platform/platform_zte_zx296716_sdio.c + + /*msleep(500);*/ +} -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/platform/platform_zte_zx296716_sdio.h linux-5.11.4-rtl8812au/3rdparty/rtl8812au/platform/platform_zte_zx296716_sdio.h ---- linux-5.11.4/3rdparty/rtl8812au/platform/platform_zte_zx296716_sdio.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/platform/platform_zte_zx296716_sdio.h 2021-03-07 18:16:17.098958132 +0200 +diff -Nurp linux-6.3.4/drivers/staging/rtl8812au/platform/platform_zte_zx296716_sdio.h linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/platform/platform_zte_zx296716_sdio.h +--- linux-6.3.4/drivers/staging/rtl8812au/platform/platform_zte_zx296716_sdio.h 1970-01-01 02:00:00.000000000 +0200 ++++ linux-6.3.4-rtl8812au/drivers/staging/rtl8812au/platform/platform_zte_zx296716_sdio.h 2022-01-28 22:59:35.633655166 +0200 @@ -0,0 +1,25 @@ +/****************************************************************************** + * @@ -463905,14028 +461393,3 @@ diff -Nurp linux-5.11.4/3rdparty/rtl8812au/platform/platform_zte_zx296716_sdio.h +#endif /* CONFIG_A16T03_BOARD */ + +#endif /* __PLATFORM_ZTE_ZX296716_SDIO_H__ */ -diff -Nurp linux-5.11.4/3rdparty/rtl8812au/tools/analyze_suspend.py linux-5.11.4-rtl8812au/3rdparty/rtl8812au/tools/analyze_suspend.py ---- linux-5.11.4/3rdparty/rtl8812au/tools/analyze_suspend.py 1970-01-01 02:00:00.000000000 +0200 -+++ linux-5.11.4-rtl8812au/3rdparty/rtl8812au/tools/analyze_suspend.py 2021-03-07 18:16:17.101958275 +0200 -@@ -0,0 +1,3441 @@ -+#!/usr/bin/python -+# -+# Tool for analyzing suspend/resume timing -+# Copyright (c) 2013, Intel Corporation. -+# -+# This program is free software; you can redistribute it and/or modify it -+# under the terms and conditions of the GNU General Public License, -+# version 2, as published by the Free Software Foundation. -+# -+# This program is distributed in the hope it will be useful, but WITHOUT -+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+# more details. -+# -+# You should have received a copy of the GNU General Public License along with -+# this program; if not, write to the Free Software Foundation, Inc., -+# 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. -+# -+# Authors: -+# Todd Brandt -+# -+# Description: -+# This tool is designed to assist kernel and OS developers in optimizing -+# their linux stack's suspend/resume time. Using a kernel image built -+# with a few extra options enabled, the tool will execute a suspend and -+# will capture dmesg and ftrace data until resume is complete. This data -+# is transformed into a device timeline and a callgraph to give a quick -+# and detailed view of which devices and callbacks are taking the most -+# time in suspend/resume. The output is a single html file which can be -+# viewed in firefox or chrome. -+# -+# The following kernel build options are required: -+# CONFIG_PM_DEBUG=y -+# CONFIG_PM_SLEEP_DEBUG=y -+# CONFIG_FTRACE=y -+# CONFIG_FUNCTION_TRACER=y -+# CONFIG_FUNCTION_GRAPH_TRACER=y -+# -+# For kernel versions older than 3.15: -+# The following additional kernel parameters are required: -+# (e.g. in file /etc/default/grub) -+# GRUB_CMDLINE_LINUX_DEFAULT="... initcall_debug log_buf_len=16M ..." -+# -+# ----------------- LIBRARIES -------------------- -+import sys -+import time -+import os -+import string -+import re -+import platform -+from datetime import datetime -+import struct -+# ----------------- CLASSES -------------------- -+# Class: SystemValues -+# Description: -+# A global, single-instance container used to -+# store system values and test parameters -+class SystemValues: -+ version = 3.0 -+ verbose = False -+ testdir = '.' -+ tpath = '/sys/kernel/debug/tracing/' -+ fpdtpath = '/sys/firmware/acpi/tables/FPDT' -+ epath = '/sys/kernel/debug/tracing/events/power/' -+ traceevents = [ -+ 'suspend_resume', -+ 'device_pm_callback_end', -+ 'device_pm_callback_start' -+ ] -+ modename = { -+ 'freeze': 'Suspend-To-Idle (S0)', -+ 'standby': 'Power-On Suspend (S1)', -+ 'mem': 'Suspend-to-RAM (S3)', -+ 'disk': 'Suspend-to-disk (S4)' -+ } -+ mempath = '/dev/mem' -+ powerfile = '/sys/power/state' -+ suspendmode = 'mem' -+ hostname = 'localhost' -+ prefix = 'test' -+ teststamp = '' -+ dmesgfile = '' -+ ftracefile = '' -+ htmlfile = '' -+ rtcwake = False -+ rtcwaketime = 10 -+ rtcpath = '' -+ android = False -+ adb = 'adb' -+ devicefilter = [] -+ stamp = 0 -+ execcount = 1 -+ x2delay = 0 -+ usecallgraph = False -+ usetraceevents = False -+ usetraceeventsonly = False -+ notestrun = False -+ altdevname = dict() -+ postresumetime = 0 -+ tracertypefmt = '# tracer: (?P.*)' -+ firmwarefmt = '# fwsuspend (?P[0-9]*) fwresume (?P[0-9]*)$' -+ postresumefmt = '# post resume time (?P[0-9]*)$' -+ stampfmt = '# suspend-(?P[0-9]{2})(?P[0-9]{2})(?P[0-9]{2})-'+\ -+ '(?P[0-9]{2})(?P[0-9]{2})(?P[0-9]{2})'+\ -+ ' (?P.*) (?P.*) (?P.*)$' -+ def __init__(self): -+ self.hostname = platform.node() -+ if(self.hostname == ''): -+ self.hostname = 'localhost' -+ rtc = "rtc0" -+ if os.path.exists('/dev/rtc'): -+ rtc = os.readlink('/dev/rtc') -+ rtc = '/sys/class/rtc/'+rtc -+ if os.path.exists(rtc) and os.path.exists(rtc+'/date') and \ -+ os.path.exists(rtc+'/time') and os.path.exists(rtc+'/wakealarm'): -+ self.rtcpath = rtc -+ def setOutputFile(self): -+ if((self.htmlfile == '') and (self.dmesgfile != '')): -+ m = re.match('(?P.*)_dmesg\.txt$', self.dmesgfile) -+ if(m): -+ self.htmlfile = m.group('name')+'.html' -+ if((self.htmlfile == '') and (self.ftracefile != '')): -+ m = re.match('(?P.*)_ftrace\.txt$', self.ftracefile) -+ if(m): -+ self.htmlfile = m.group('name')+'.html' -+ if(self.htmlfile == ''): -+ self.htmlfile = 'output.html' -+ def initTestOutput(self, subdir): -+ if(not self.android): -+ self.prefix = self.hostname -+ v = open('/proc/version', 'r').read().strip() -+ kver = string.split(v)[2] -+ else: -+ self.prefix = 'android' -+ v = os.popen(self.adb+' shell cat /proc/version').read().strip() -+ kver = string.split(v)[2] -+ testtime = datetime.now().strftime('suspend-%m%d%y-%H%M%S') -+ if(subdir != "."): -+ self.testdir = subdir+"/"+testtime -+ else: -+ self.testdir = testtime -+ self.teststamp = \ -+ '# '+testtime+' '+self.prefix+' '+self.suspendmode+' '+kver -+ self.dmesgfile = \ -+ self.testdir+'/'+self.prefix+'_'+self.suspendmode+'_dmesg.txt' -+ self.ftracefile = \ -+ self.testdir+'/'+self.prefix+'_'+self.suspendmode+'_ftrace.txt' -+ self.htmlfile = \ -+ self.testdir+'/'+self.prefix+'_'+self.suspendmode+'.html' -+ os.mkdir(self.testdir) -+ def setDeviceFilter(self, devnames): -+ self.devicefilter = string.split(devnames) -+ def rtcWakeAlarm(self): -+ os.system('echo 0 > '+self.rtcpath+'/wakealarm') -+ outD = open(self.rtcpath+'/date', 'r').read().strip() -+ outT = open(self.rtcpath+'/time', 'r').read().strip() -+ mD = re.match('^(?P[0-9]*)-(?P[0-9]*)-(?P[0-9]*)', outD) -+ mT = re.match('^(?P[0-9]*):(?P[0-9]*):(?P[0-9]*)', outT) -+ if(mD and mT): -+ # get the current time from hardware -+ utcoffset = int((datetime.now() - datetime.utcnow()).total_seconds()) -+ dt = datetime(\ -+ int(mD.group('y')), int(mD.group('m')), int(mD.group('d')), -+ int(mT.group('h')), int(mT.group('m')), int(mT.group('s'))) -+ nowtime = int(dt.strftime('%s')) + utcoffset -+ else: -+ # if hardware time fails, use the software time -+ nowtime = int(datetime.now().strftime('%s')) -+ alarm = nowtime + self.rtcwaketime -+ os.system('echo %d > %s/wakealarm' % (alarm, self.rtcpath)) -+sysvals = SystemValues() -+# Class: DeviceNode -+# Description: -+# A container used to create a device hierachy, with a single root node -+# and a tree of child nodes. Used by Data.deviceTopology() -+class DeviceNode: -+ name = '' -+ children = 0 -+ depth = 0 -+ def __init__(self, nodename, nodedepth): -+ self.name = nodename -+ self.children = [] -+ self.depth = nodedepth -+# Class: Data -+# Description: -+# The primary container for suspend/resume test data. There is one for -+# each test run. The data is organized into a cronological hierarchy: -+# Data.dmesg { -+# root structure, started as dmesg & ftrace, but now only ftrace -+# contents: times for suspend start/end, resume start/end, fwdata -+# phases { -+# 10 sequential, non-overlapping phases of S/R -+# contents: times for phase start/end, order/color data for html -+# devlist { -+# device callback or action list for this phase -+# device { -+# a single device callback or generic action -+# contents: start/stop times, pid/cpu/driver info -+# parents/children, html id for timeline/callgraph -+# optionally includes an ftrace callgraph -+# optionally includes intradev trace events -+# } -+# } -+# } -+# } -+# -+class Data: -+ dmesg = {} # root data structure -+ phases = [] # ordered list of phases -+ start = 0.0 # test start -+ end = 0.0 # test end -+ tSuspended = 0.0 # low-level suspend start -+ tResumed = 0.0 # low-level resume start -+ tLow = 0.0 # time spent in low-level suspend (standby/freeze) -+ fwValid = False # is firmware data available -+ fwSuspend = 0 # time spent in firmware suspend -+ fwResume = 0 # time spent in firmware resume -+ dmesgtext = [] # dmesg text file in memory -+ testnumber = 0 -+ idstr = '' -+ html_device_id = 0 -+ stamp = 0 -+ outfile = '' -+ def __init__(self, num): -+ idchar = 'abcdefghijklmnopqrstuvwxyz' -+ self.testnumber = num -+ self.idstr = idchar[num] -+ self.dmesgtext = [] -+ self.phases = [] -+ self.dmesg = { # fixed list of 10 phases -+ 'suspend_prepare': {'list': dict(), 'start': -1.0, 'end': -1.0, -+ 'row': 0, 'color': '#CCFFCC', 'order': 0}, -+ 'suspend': {'list': dict(), 'start': -1.0, 'end': -1.0, -+ 'row': 0, 'color': '#88FF88', 'order': 1}, -+ 'suspend_late': {'list': dict(), 'start': -1.0, 'end': -1.0, -+ 'row': 0, 'color': '#00AA00', 'order': 2}, -+ 'suspend_noirq': {'list': dict(), 'start': -1.0, 'end': -1.0, -+ 'row': 0, 'color': '#008888', 'order': 3}, -+ 'suspend_machine': {'list': dict(), 'start': -1.0, 'end': -1.0, -+ 'row': 0, 'color': '#0000FF', 'order': 4}, -+ 'resume_machine': {'list': dict(), 'start': -1.0, 'end': -1.0, -+ 'row': 0, 'color': '#FF0000', 'order': 5}, -+ 'resume_noirq': {'list': dict(), 'start': -1.0, 'end': -1.0, -+ 'row': 0, 'color': '#FF9900', 'order': 6}, -+ 'resume_early': {'list': dict(), 'start': -1.0, 'end': -1.0, -+ 'row': 0, 'color': '#FFCC00', 'order': 7}, -+ 'resume': {'list': dict(), 'start': -1.0, 'end': -1.0, -+ 'row': 0, 'color': '#FFFF88', 'order': 8}, -+ 'resume_complete': {'list': dict(), 'start': -1.0, 'end': -1.0, -+ 'row': 0, 'color': '#FFFFCC', 'order': 9} -+ } -+ self.phases = self.sortedPhases() -+ def getStart(self): -+ return self.dmesg[self.phases[0]]['start'] -+ def setStart(self, time): -+ self.start = time -+ self.dmesg[self.phases[0]]['start'] = time -+ def getEnd(self): -+ return self.dmesg[self.phases[-1]]['end'] -+ def setEnd(self, time): -+ self.end = time -+ self.dmesg[self.phases[-1]]['end'] = time -+ def isTraceEventOutsideDeviceCalls(self, pid, time): -+ for phase in self.phases: -+ list = self.dmesg[phase]['list'] -+ for dev in list: -+ d = list[dev] -+ if(d['pid'] == pid and time >= d['start'] and -+ time <= d['end']): -+ return False -+ return True -+ def addIntraDevTraceEvent(self, action, name, pid, time): -+ if(action == 'mutex_lock_try'): -+ color = 'red' -+ elif(action == 'mutex_lock_pass'): -+ color = 'green' -+ elif(action == 'mutex_unlock'): -+ color = 'blue' -+ else: -+ # create separate colors based on the name -+ v1 = len(name)*10 % 256 -+ v2 = string.count(name, 'e')*100 % 256 -+ v3 = ord(name[0])*20 % 256 -+ color = '#%06X' % ((v1*0x10000) + (v2*0x100) + v3) -+ for phase in self.phases: -+ list = self.dmesg[phase]['list'] -+ for dev in list: -+ d = list[dev] -+ if(d['pid'] == pid and time >= d['start'] and -+ time <= d['end']): -+ e = TraceEvent(action, name, color, time) -+ if('traceevents' not in d): -+ d['traceevents'] = [] -+ d['traceevents'].append(e) -+ return d -+ break -+ return 0 -+ def capIntraDevTraceEvent(self, action, name, pid, time): -+ for phase in self.phases: -+ list = self.dmesg[phase]['list'] -+ for dev in list: -+ d = list[dev] -+ if(d['pid'] == pid and time >= d['start'] and -+ time <= d['end']): -+ if('traceevents' not in d): -+ return -+ for e in d['traceevents']: -+ if(e.action == action and -+ e.name == name and not e.ready): -+ e.length = time - e.time -+ e.ready = True -+ break -+ return -+ def trimTimeVal(self, t, t0, dT, left): -+ if left: -+ if(t > t0): -+ if(t - dT < t0): -+ return t0 -+ return t - dT -+ else: -+ return t -+ else: -+ if(t < t0 + dT): -+ if(t > t0): -+ return t0 + dT -+ return t + dT -+ else: -+ return t -+ def trimTime(self, t0, dT, left): -+ self.tSuspended = self.trimTimeVal(self.tSuspended, t0, dT, left) -+ self.tResumed = self.trimTimeVal(self.tResumed, t0, dT, left) -+ self.start = self.trimTimeVal(self.start, t0, dT, left) -+ self.end = self.trimTimeVal(self.end, t0, dT, left) -+ for phase in self.phases: -+ p = self.dmesg[phase] -+ p['start'] = self.trimTimeVal(p['start'], t0, dT, left) -+ p['end'] = self.trimTimeVal(p['end'], t0, dT, left) -+ list = p['list'] -+ for name in list: -+ d = list[name] -+ d['start'] = self.trimTimeVal(d['start'], t0, dT, left) -+ d['end'] = self.trimTimeVal(d['end'], t0, dT, left) -+ if('ftrace' in d): -+ cg = d['ftrace'] -+ cg.start = self.trimTimeVal(cg.start, t0, dT, left) -+ cg.end = self.trimTimeVal(cg.end, t0, dT, left) -+ for line in cg.list: -+ line.time = self.trimTimeVal(line.time, t0, dT, left) -+ if('traceevents' in d): -+ for e in d['traceevents']: -+ e.time = self.trimTimeVal(e.time, t0, dT, left) -+ def normalizeTime(self, tZero): -+ # first trim out any standby or freeze clock time -+ if(self.tSuspended != self.tResumed): -+ if(self.tResumed > tZero): -+ self.trimTime(self.tSuspended, \ -+ self.tResumed-self.tSuspended, True) -+ else: -+ self.trimTime(self.tSuspended, \ -+ self.tResumed-self.tSuspended, False) -+ # shift the timeline so that tZero is the new 0 -+ self.tSuspended -= tZero -+ self.tResumed -= tZero -+ self.start -= tZero -+ self.end -= tZero -+ for phase in self.phases: -+ p = self.dmesg[phase] -+ p['start'] -= tZero -+ p['end'] -= tZero -+ list = p['list'] -+ for name in list: -+ d = list[name] -+ d['start'] -= tZero -+ d['end'] -= tZero -+ if('ftrace' in d): -+ cg = d['ftrace'] -+ cg.start -= tZero -+ cg.end -= tZero -+ for line in cg.list: -+ line.time -= tZero -+ if('traceevents' in d): -+ for e in d['traceevents']: -+ e.time -= tZero -+ def newPhaseWithSingleAction(self, phasename, devname, start, end, color): -+ for phase in self.phases: -+ self.dmesg[phase]['order'] += 1 -+ self.html_device_id += 1 -+ devid = '%s%d' % (self.idstr, self.html_device_id) -+ list = dict() -+ list[devname] = \ -+ {'start': start, 'end': end, 'pid': 0, 'par': '', -+ 'length': (end-start), 'row': 0, 'id': devid, 'drv': '' }; -+ self.dmesg[phasename] = \ -+ {'list': list, 'start': start, 'end': end, -+ 'row': 0, 'color': color, 'order': 0} -+ self.phases = self.sortedPhases() -+ def newPhase(self, phasename, start, end, color, order): -+ if(order < 0): -+ order = len(self.phases) -+ for phase in self.phases[order:]: -+ self.dmesg[phase]['order'] += 1 -+ if(order > 0): -+ p = self.phases[order-1] -+ self.dmesg[p]['end'] = start -+ if(order < len(self.phases)): -+ p = self.phases[order] -+ self.dmesg[p]['start'] = end -+ list = dict() -+ self.dmesg[phasename] = \ -+ {'list': list, 'start': start, 'end': end, -+ 'row': 0, 'color': color, 'order': order} -+ self.phases = self.sortedPhases() -+ def setPhase(self, phase, ktime, isbegin): -+ if(isbegin): -+ self.dmesg[phase]['start'] = ktime -+ else: -+ self.dmesg[phase]['end'] = ktime -+ def dmesgSortVal(self, phase): -+ return self.dmesg[phase]['order'] -+ def sortedPhases(self): -+ return sorted(self.dmesg, key=self.dmesgSortVal) -+ def sortedDevices(self, phase): -+ list = self.dmesg[phase]['list'] -+ slist = [] -+ tmp = dict() -+ for devname in list: -+ dev = list[devname] -+ tmp[dev['start']] = devname -+ for t in sorted(tmp): -+ slist.append(tmp[t]) -+ return slist -+ def fixupInitcalls(self, phase, end): -+ # if any calls never returned, clip them at system resume end -+ phaselist = self.dmesg[phase]['list'] -+ for devname in phaselist: -+ dev = phaselist[devname] -+ if(dev['end'] < 0): -+ dev['end'] = end -+ vprint('%s (%s): callback didnt return' % (devname, phase)) -+ def deviceFilter(self, devicefilter): -+ # remove all by the relatives of the filter devnames -+ filter = [] -+ for phase in self.phases: -+ list = self.dmesg[phase]['list'] -+ for name in devicefilter: -+ dev = name -+ while(dev in list): -+ if(dev not in filter): -+ filter.append(dev) -+ dev = list[dev]['par'] -+ children = self.deviceDescendants(name, phase) -+ for dev in children: -+ if(dev not in filter): -+ filter.append(dev) -+ for phase in self.phases: -+ list = self.dmesg[phase]['list'] -+ rmlist = [] -+ for name in list: -+ pid = list[name]['pid'] -+ if(name not in filter and pid >= 0): -+ rmlist.append(name) -+ for name in rmlist: -+ del list[name] -+ def fixupInitcallsThatDidntReturn(self): -+ # if any calls never returned, clip them at system resume end -+ for phase in self.phases: -+ self.fixupInitcalls(phase, self.getEnd()) -+ def newActionGlobal(self, name, start, end): -+ # which phase is this device callback or action "in" -+ targetphase = "none" -+ overlap = 0.0 -+ for phase in self.phases: -+ pstart = self.dmesg[phase]['start'] -+ pend = self.dmesg[phase]['end'] -+ o = max(0, min(end, pend) - max(start, pstart)) -+ if(o > overlap): -+ targetphase = phase -+ overlap = o -+ if targetphase in self.phases: -+ self.newAction(targetphase, name, -1, '', start, end, '') -+ return True -+ return False -+ def newAction(self, phase, name, pid, parent, start, end, drv): -+ # new device callback for a specific phase -+ self.html_device_id += 1 -+ devid = '%s%d' % (self.idstr, self.html_device_id) -+ list = self.dmesg[phase]['list'] -+ length = -1.0 -+ if(start >= 0 and end >= 0): -+ length = end - start -+ list[name] = {'start': start, 'end': end, 'pid': pid, 'par': parent, -+ 'length': length, 'row': 0, 'id': devid, 'drv': drv } -+ def deviceIDs(self, devlist, phase): -+ idlist = [] -+ list = self.dmesg[phase]['list'] -+ for devname in list: -+ if devname in devlist: -+ idlist.append(list[devname]['id']) -+ return idlist -+ def deviceParentID(self, devname, phase): -+ pdev = '' -+ pdevid = '' -+ list = self.dmesg[phase]['list'] -+ if devname in list: -+ pdev = list[devname]['par'] -+ if pdev in list: -+ return list[pdev]['id'] -+ return pdev -+ def deviceChildren(self, devname, phase): -+ devlist = [] -+ list = self.dmesg[phase]['list'] -+ for child in list: -+ if(list[child]['par'] == devname): -+ devlist.append(child) -+ return devlist -+ def deviceDescendants(self, devname, phase): -+ children = self.deviceChildren(devname, phase) -+ family = children -+ for child in children: -+ family += self.deviceDescendants(child, phase) -+ return family -+ def deviceChildrenIDs(self, devname, phase): -+ devlist = self.deviceChildren(devname, phase) -+ return self.deviceIDs(devlist, phase) -+ def printDetails(self): -+ vprint(' test start: %f' % self.start) -+ for phase in self.phases: -+ dc = len(self.dmesg[phase]['list']) -+ vprint(' %16s: %f - %f (%d devices)' % (phase, \ -+ self.dmesg[phase]['start'], self.dmesg[phase]['end'], dc)) -+ vprint(' test end: %f' % self.end) -+ def masterTopology(self, name, list, depth): -+ node = DeviceNode(name, depth) -+ for cname in list: -+ clist = self.deviceChildren(cname, 'resume') -+ cnode = self.masterTopology(cname, clist, depth+1) -+ node.children.append(cnode) -+ return node -+ def printTopology(self, node): -+ html = '' -+ if node.name: -+ info = '' -+ drv = '' -+ for phase in self.phases: -+ list = self.dmesg[phase]['list'] -+ if node.name in list: -+ s = list[node.name]['start'] -+ e = list[node.name]['end'] -+ if list[node.name]['drv']: -+ drv = ' {'+list[node.name]['drv']+'}' -+ info += ('
  • %s: %.3fms
    • ' % (phase, (e-s)*1000)) -+ html += '
  • '+node.name+drv+'' -+ if info: -+ html += '
      '+info+'
    ' -+ html += '
    • ' -+ if len(node.children) > 0: -+ html += '
      ' -+ for cnode in node.children: -+ html += self.printTopology(cnode) -+ html += '
    ' -+ return html -+ def rootDeviceList(self): -+ # list of devices graphed -+ real = [] -+ for phase in self.dmesg: -+ list = self.dmesg[phase]['list'] -+ for dev in list: -+ if list[dev]['pid'] >= 0 and dev not in real: -+ real.append(dev) -+ # list of top-most root devices -+ rootlist = [] -+ for phase in self.dmesg: -+ list = self.dmesg[phase]['list'] -+ for dev in list: -+ pdev = list[dev]['par'] -+ if(re.match('[0-9]*-[0-9]*\.[0-9]*[\.0-9]*\:[\.0-9]*$', pdev)): -+ continue -+ if pdev and pdev not in real and pdev not in rootlist: -+ rootlist.append(pdev) -+ return rootlist -+ def deviceTopology(self): -+ rootlist = self.rootDeviceList() -+ master = self.masterTopology('', rootlist, 0) -+ return self.printTopology(master) -+# Class: TraceEvent -+# Description: -+# A container for trace event data found in the ftrace file -+class TraceEvent: -+ ready = False -+ name = '' -+ time = 0.0 -+ color = '#FFFFFF' -+ length = 0.0 -+ action = '' -+ def __init__(self, a, n, c, t): -+ self.action = a -+ self.name = n -+ self.color = c -+ self.time = t -+# Class: FTraceLine -+# Description: -+# A container for a single line of ftrace data. There are six basic types: -+# callgraph line: -+# call: " dpm_run_callback() {" -+# return: " }" -+# leaf: " dpm_run_callback();" -+# trace event: -+# tracing_mark_write: SUSPEND START or RESUME COMPLETE -+# suspend_resume: phase or custom exec block data -+# device_pm_callback: device callback info -+class FTraceLine: -+ time = 0.0 -+ length = 0.0 -+ fcall = False -+ freturn = False -+ fevent = False -+ depth = 0 -+ name = '' -+ type = '' -+ def __init__(self, t, m, d): -+ self.time = float(t) -+ # is this a trace event -+ if(d == 'traceevent' or re.match('^ *\/\* *(?P.*) \*\/ *$', m)): -+ if(d == 'traceevent'): -+ # nop format trace event -+ msg = m -+ else: -+ # function_graph format trace event -+ em = re.match('^ *\/\* *(?P.*) \*\/ *$', m) -+ msg = em.group('msg') -+ emm = re.match('^(?P.*?): (?P.*)', msg) -+ if(emm): -+ self.name = emm.group('msg') -+ self.type = emm.group('call') -+ else: -+ self.name = msg -+ self.fevent = True -+ return -+ # convert the duration to seconds -+ if(d): -+ self.length = float(d)/1000000 -+ # the indentation determines the depth -+ match = re.match('^(?P *)(?P.*)$', m) -+ if(not match): -+ return -+ self.depth = self.getDepth(match.group('d')) -+ m = match.group('o') -+ # function return -+ if(m[0] == '}'): -+ self.freturn = True -+ if(len(m) > 1): -+ # includes comment with function name -+ match = re.match('^} *\/\* *(?P.*) *\*\/$', m) -+ if(match): -+ self.name = match.group('n') -+ # function call -+ else: -+ self.fcall = True -+ # function call with children -+ if(m[-1] == '{'): -+ match = re.match('^(?P.*) *\(.*', m) -+ if(match): -+ self.name = match.group('n') -+ # function call with no children (leaf) -+ elif(m[-1] == ';'): -+ self.freturn = True -+ match = re.match('^(?P.*) *\(.*', m) -+ if(match): -+ self.name = match.group('n') -+ # something else (possibly a trace marker) -+ else: -+ self.name = m -+ def getDepth(self, str): -+ return len(str)/2 -+ def debugPrint(self, dev): -+ if(self.freturn and self.fcall): -+ print('%s -- %f (%02d): %s(); (%.3f us)' % (dev, self.time, \ -+ self.depth, self.name, self.length*1000000)) -+ elif(self.freturn): -+ print('%s -- %f (%02d): %s} (%.3f us)' % (dev, self.time, \ -+ self.depth, self.name, self.length*1000000)) -+ else: -+ print('%s -- %f (%02d): %s() { (%.3f us)' % (dev, self.time, \ -+ self.depth, self.name, self.length*1000000)) -+# Class: FTraceCallGraph -+# Description: -+# A container for the ftrace callgraph of a single recursive function. -+# This can be a dpm_run_callback, dpm_prepare, or dpm_complete callgraph -+# Each instance is tied to a single device in a single phase, and is -+# comprised of an ordered list of FTraceLine objects -+class FTraceCallGraph: -+ start = -1.0 -+ end = -1.0 -+ list = [] -+ invalid = False -+ depth = 0 -+ def __init__(self): -+ self.start = -1.0 -+ self.end = -1.0 -+ self.list = [] -+ self.depth = 0 -+ def setDepth(self, line): -+ if(line.fcall and not line.freturn): -+ line.depth = self.depth -+ self.depth += 1 -+ elif(line.freturn and not line.fcall): -+ self.depth -= 1 -+ line.depth = self.depth -+ else: -+ line.depth = self.depth -+ def addLine(self, line, match): -+ if(not self.invalid): -+ self.setDepth(line) -+ if(line.depth == 0 and line.freturn): -+ if(self.start < 0): -+ self.start = line.time -+ self.end = line.time -+ self.list.append(line) -+ return True -+ if(self.invalid): -+ return False -+ if(len(self.list) >= 1000000 or self.depth < 0): -+ if(len(self.list) > 0): -+ first = self.list[0] -+ self.list = [] -+ self.list.append(first) -+ self.invalid = True -+ if(not match): -+ return False -+ id = 'task %s cpu %s' % (match.group('pid'), match.group('cpu')) -+ window = '(%f - %f)' % (self.start, line.time) -+ if(self.depth < 0): -+ print('Too much data for '+id+\ -+ ' (buffer overflow), ignoring this callback') -+ else: -+ print('Too much data for '+id+\ -+ ' '+window+', ignoring this callback') -+ return False -+ self.list.append(line) -+ if(self.start < 0): -+ self.start = line.time -+ return False -+ def slice(self, t0, tN): -+ minicg = FTraceCallGraph() -+ count = -1 -+ firstdepth = 0 -+ for l in self.list: -+ if(l.time < t0 or l.time > tN): -+ continue -+ if(count < 0): -+ if(not l.fcall or l.name == 'dev_driver_string'): -+ continue -+ firstdepth = l.depth -+ count = 0 -+ l.depth -= firstdepth -+ minicg.addLine(l, 0) -+ if((count == 0 and l.freturn and l.fcall) or -+ (count > 0 and l.depth <= 0)): -+ break -+ count += 1 -+ return minicg -+ def sanityCheck(self): -+ stack = dict() -+ cnt = 0 -+ for l in self.list: -+ if(l.fcall and not l.freturn): -+ stack[l.depth] = l -+ cnt += 1 -+ elif(l.freturn and not l.fcall): -+ if(l.depth not in stack): -+ return False -+ stack[l.depth].length = l.length -+ stack[l.depth] = 0 -+ l.length = 0 -+ cnt -= 1 -+ if(cnt == 0): -+ return True -+ return False -+ def debugPrint(self, filename): -+ if(filename == 'stdout'): -+ print('[%f - %f]') % (self.start, self.end) -+ for l in self.list: -+ if(l.freturn and l.fcall): -+ print('%f (%02d): %s(); (%.3f us)' % (l.time, \ -+ l.depth, l.name, l.length*1000000)) -+ elif(l.freturn): -+ print('%f (%02d): %s} (%.3f us)' % (l.time, \ -+ l.depth, l.name, l.length*1000000)) -+ else: -+ print('%f (%02d): %s() { (%.3f us)' % (l.time, \ -+ l.depth, l.name, l.length*1000000)) -+ print(' ') -+ else: -+ fp = open(filename, 'w') -+ print(filename) -+ for l in self.list: -+ if(l.freturn and l.fcall): -+ fp.write('%f (%02d): %s(); (%.3f us)\n' % (l.time, \ -+ l.depth, l.name, l.length*1000000)) -+ elif(l.freturn): -+ fp.write('%f (%02d): %s} (%.3f us)\n' % (l.time, \ -+ l.depth, l.name, l.length*1000000)) -+ else: -+ fp.write('%f (%02d): %s() { (%.3f us)\n' % (l.time, \ -+ l.depth, l.name, l.length*1000000)) -+ fp.close() -+# Class: Timeline -+# Description: -+# A container for a suspend/resume html timeline. In older versions -+# of the script there were multiple timelines, but in the latest -+# there is only one. -+class Timeline: -+ html = {} -+ scaleH = 0.0 # height of the row as a percent of the timeline height -+ rowH = 0.0 # height of each row in percent of the timeline height -+ row_height_pixels = 30 -+ maxrows = 0 -+ height = 0 -+ def __init__(self): -+ self.html = { -+ 'timeline': '', -+ 'legend': '', -+ 'scale': '' -+ } -+ def setRows(self, rows): -+ self.maxrows = int(rows) -+ self.scaleH = 100.0/float(self.maxrows) -+ self.height = self.maxrows*self.row_height_pixels -+ r = float(self.maxrows - 1) -+ if(r < 1.0): -+ r = 1.0 -+ self.rowH = (100.0 - self.scaleH)/r -+# Class: TestRun -+# Description: -+# A container for a suspend/resume test run. This is necessary as -+# there could be more than one, and they need to be separate. -+class TestRun: -+ ftrace_line_fmt_fg = \ -+ '^ *(?P