llvm rebuild

This commit is contained in:
Rmys
2021-02-21 00:31:08 +03:00
committed by GitHub
parent 964a512779
commit b3bce9f3b1
2 changed files with 87 additions and 1 deletions
@@ -0,0 +1,85 @@
commit b08a140a8fe8d0b0d16a93042b4952d6e34ab913
Author: Piotr Sobczak <Piotr.Sobczak@amd.com>
Date: Wed Jan 27 16:02:49 2021 +0100
[AMDGPU] Avoid an illegal operand in si-shrink-instructions
Before the patch it was possible to trigger a constant bus
violation when folding immediates into a shrunk instruction.
The patch adds a check to enforce the legality of the new operand.
Differential Revision: https://reviews.llvm.org/D95527
diff --git a/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp b/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
index 9c6833a7dab6..6c1b16eddc84 100644
--- a/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
+++ b/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
@@ -84,21 +84,23 @@ static bool foldImmediates(MachineInstr &MI, const SIInstrInfo *TII,
MachineOperand &MovSrc = Def->getOperand(1);
bool ConstantFolded = false;
- if (MovSrc.isImm() && (isInt<32>(MovSrc.getImm()) ||
- isUInt<32>(MovSrc.getImm()))) {
- // It's possible to have only one component of a super-reg defined by
- // a single mov, so we need to clear any subregister flag.
- Src0.setSubReg(0);
- Src0.ChangeToImmediate(MovSrc.getImm());
- ConstantFolded = true;
- } else if (MovSrc.isFI()) {
- Src0.setSubReg(0);
- Src0.ChangeToFrameIndex(MovSrc.getIndex());
- ConstantFolded = true;
- } else if (MovSrc.isGlobal()) {
- Src0.ChangeToGA(MovSrc.getGlobal(), MovSrc.getOffset(),
- MovSrc.getTargetFlags());
- ConstantFolded = true;
+ if (TII->isOperandLegal(MI, Src0Idx, &MovSrc)) {
+ if (MovSrc.isImm() &&
+ (isInt<32>(MovSrc.getImm()) || isUInt<32>(MovSrc.getImm()))) {
+ // It's possible to have only one component of a super-reg defined
+ // by a single mov, so we need to clear any subregister flag.
+ Src0.setSubReg(0);
+ Src0.ChangeToImmediate(MovSrc.getImm());
+ ConstantFolded = true;
+ } else if (MovSrc.isFI()) {
+ Src0.setSubReg(0);
+ Src0.ChangeToFrameIndex(MovSrc.getIndex());
+ ConstantFolded = true;
+ } else if (MovSrc.isGlobal()) {
+ Src0.ChangeToGA(MovSrc.getGlobal(), MovSrc.getOffset(),
+ MovSrc.getTargetFlags());
+ ConstantFolded = true;
+ }
}
if (ConstantFolded) {
diff --git a/llvm/test/CodeGen/AMDGPU/shrink-instructions-illegal-fold.mir b/llvm/test/CodeGen/AMDGPU/shrink-instructions-illegal-fold.mir
new file mode 100644
index 000000000000..7889f437facf
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/shrink-instructions-illegal-fold.mir
@@ -0,0 +1,23 @@
+# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=si-shrink-instructions --verify-machineinstrs %s -o - | FileCheck %s
+
+# Make sure immediate folding into V_CNDMASK respects constant bus restrictions.
+---
+
+name: shrink_cndmask_illegal_imm_folding
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $vgpr0, $vgpr1
+ ; CHECK-LABEL: name: shrink_cndmask_illegal_imm_folding
+ ; CHECK: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+ ; CHECK: [[MOV:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 32768, implicit $exec
+ ; CHECK: V_CMP_EQ_U32_e32 0, [[COPY]], implicit-def $vcc, implicit $exec
+ ; CHECK: V_CNDMASK_B32_e32 [[MOV]], killed [[COPY]], implicit $vcc, implicit $exec
+
+ %0:vgpr_32 = COPY $vgpr0
+ %1:vgpr_32 = V_MOV_B32_e32 32768, implicit $exec
+ V_CMP_EQ_U32_e32 0, %0:vgpr_32, implicit-def $vcc, implicit $exec
+ %2:vgpr_32 = V_CNDMASK_B32_e64 0, %1:vgpr_32, 0, killed %0:vgpr_32, $vcc, implicit $exec
+ S_NOP 0
+
+...
+2 -1
View File
@@ -37,7 +37,7 @@
</AdditionalFiles>-->
<Patches>
<Patch level="2">0001-SystemZ-Use-LA-instead-of-AGR-in-eliminateFrameIndex.patch</Patch>
<!-- <Patch level="2">0001-backport-D88371-guard-find_library-tensorflow_c_api.patch</Patch> -->
<Patch level="2">amdgpu-avoid-an-illegal-operand-in-si-shrink-instr.patch</Patch>
<!-- <Patch>stack-clash-fixes.patch</Patch> -->
</Patches>
</Source>
@@ -298,6 +298,7 @@
<Summary>32-bit shared libraries for llvm</Summary>
<BuildType>emul32</BuildType>
<BuildDependencies>
<!-- <Dependency>llvm-32bit</Dependency> -->
<Dependency>zlib-32bit</Dependency>
<Dependency>libffi-32bit</Dependency>
<Dependency>libxml2-32bit</Dependency>