diff -Nuar a/CMakeLists.txt b/CMakeLists.txt --- a/CMakeLists.txt 2017-06-04 23:15:53.000000000 +0300 +++ b/CMakeLists.txt 2019-06-10 00:48:46.000000000 +0300 @@ -61,6 +61,8 @@ set(WTF_CPU_ARM 1) elseif (LOWERCASE_CMAKE_SYSTEM_PROCESSOR MATCHES "^aarch64") set(WTF_CPU_ARM64 1) +elseif (LOWERCASE_CMAKE_SYSTEM_PROCESSOR MATCHES "alpha*") + set(WTF_CPU_ALPHA 1) elseif (LOWERCASE_CMAKE_SYSTEM_PROCESSOR MATCHES "^mips") set(WTF_CPU_MIPS 1) elseif (LOWERCASE_CMAKE_SYSTEM_PROCESSOR MATCHES "sh4") diff -Nuar a/dist/changes-5.4.0 b/dist/changes-5.4.0 --- a/dist/changes-5.4.0 1970-01-01 02:00:00.000000000 +0200 +++ b/dist/changes-5.4.0 2019-06-10 00:48:46.000000000 +0300 @@ -0,0 +1,56 @@ +Qt 5.4 introduces many new features and improvements as well as bugfixes +over the 5.3.x series. For more details, refer to the online documentation +included in this distribution. The documentation is also available online: + + http://qt-project.org/doc/qt-5.4 + +The Qt version 5.4 series is binary compatible with the 5.3.x series. +Applications compiled for 5.3 will continue to run with 5.4. + +Some of the changes listed in this file include issue tracking numbers +corresponding to tasks in the Qt Bug Tracker: + + http://bugreports.qt-project.org/ + +Each of these identifiers can be entered in the bug tracker to obtain more +information about a particular change. + +**************************************************************************** +* Library * +**************************************************************************** + +QtWebkit +-------- + + - The Qt WebKit module is considered done. Users should consider migrating to Qt WebEngine to keep up with new web features. + - [QTBUG-41877] Fixed regression causing network crashes on high bandwidth websites. + + +QtWebkitWidgets +--------------- + + - Accelerated compositing is now also supported with a QOpenGLWidget as the viewport. + - Accelerated 2D Canvas can now be activated to make HTML canvas elements render using the OpenGL painter. + +QtWebkitQML +----------- + + - Integration with QWebChannel. + + +**************************************************************************** +* Platform Specific Changes * +**************************************************************************** + +Windows +------- + + - Support for dynamic GL builds. + - [QTBUG-42417] Fixed occational crashes in Windows 64-bit JavaScript JIT. + + +Machine architectures +--------------------- + + - [QTBUG-41896] Fixed common JavaScript crashes on big-endian architectures. + - [QTBUG-35681] Low level interpreter is now enabled on softfp ARM ABI if VFP is available. diff -Nuar a/dist/changes-5.4.1 b/dist/changes-5.4.1 --- a/dist/changes-5.4.1 1970-01-01 02:00:00.000000000 +0200 +++ b/dist/changes-5.4.1 2019-06-10 00:48:46.000000000 +0300 @@ -0,0 +1,42 @@ +Qt 5.4.1 is a bug-fix release. It maintains both forward and backward +compatibility (source and binary) with Qt 5.4.0. + +For more details, refer to the online documentation included in this +distribution. The documentation is also available online: + + http://doc.qt.io/qt-5.4 + +The Qt version 5.4 series is binary compatible with the 5.3.x series. +Applications compiled for 5.3 will continue to run with 5.4. + +Some of the changes listed in this file include issue tracking numbers +corresponding to tasks in the Qt Bug Tracker: + + http://bugreports.qt.io/ + +Each of these identifiers can be entered in the bug tracker to obtain more +information about a particular change. + +**************************************************************************** +* Library * +**************************************************************************** + +QtWebkit +-------- + - [QTBUG-43149] Support for MSIE compatible pasteboard types. + - [QTBUG-44024] Fixed memory leak when opening webviews on images. + + +**************************************************************************** +* Platform Specific Changes * +**************************************************************************** + +Windows +------- + - Fixed various build issues with MSVC. + - [QTBUG-43831] Avoid crash if a too old version of OpenGL is being used. + +Linux +------- + - [QTBUG-43520] Optimized HTML5 video by avoiding an unnecessary image transform on every frame. + - [QTBUG-43479] Fixed setting system volume to 100% on HTML5 video if channel and system volume have been tied. diff -Nuar a/dist/changes-5.4.2 b/dist/changes-5.4.2 --- a/dist/changes-5.4.2 1970-01-01 02:00:00.000000000 +0200 +++ b/dist/changes-5.4.2 2019-06-10 00:48:46.000000000 +0300 @@ -0,0 +1,54 @@ +Qt 5.4.2 is a bug-fix release. It maintains both forward and backward +compatibility (source and binary) with Qt 5.4.1. + +For more details, refer to the online documentation included in this +distribution. The documentation is also available online: + + http://doc.qt.io/qt-5.4 + +The Qt version 5.4 series is binary compatible with the 5.3.x series. +Applications compiled for 5.3 will continue to run with 5.4. + +Some of the changes listed in this file include issue tracking numbers +corresponding to tasks in the Qt Bug Tracker: + + http://bugreports.qt.io/ + +Each of these identifiers can be entered in the bug tracker to obtain more +information about a particular change. + +**************************************************************************** +* Library * +**************************************************************************** + +QtWebkit +-------- + - Fixed privacy breaking icon database usage in private browsing mode. + - Fixed possible OpenGL crashes on exit. + - [QTBUG-44475] Improved performance of initializing large JSON objects. + - [QTBUG-44829] Fixed g++5 builds. + - [QTBUG-44912] Fixed crash on loading svg.js + - [QTBUG-44524] Fixed possible out-of-memory crash and performance issues + on some pages caused by very large accelerated layers. + - [QTBUG-45299] Fixed segmentation fault in JSC::DFG::prepareOSREntry. + + +**************************************************************************** +* Platform Specific Changes * +**************************************************************************** + +Windows +------- + - [QTBUG-44401,QTBUG-42588,QTBUG-43024] Forwarding show and hide events so + videos in non-visible widgets are hidden. + +ARM +------- + - [QTBUG-44700] Fixed JavaScript crash caused by misbehaving gold linker. + - [QTBUG-44740] Fixed alignment issue in WebKit2 IPC. + +Linux +------- + - [QTBUG-44245] Fixed crash on some HTML5 videos caused by invalid + frame-data from GStreamer. + - [QTBUG-44714] Fixed linking with glib 2.43 and newer. diff -Nuar a/dist/changes-5.5.0 b/dist/changes-5.5.0 --- a/dist/changes-5.5.0 1970-01-01 02:00:00.000000000 +0200 +++ b/dist/changes-5.5.0 2019-06-10 00:48:46.000000000 +0300 @@ -0,0 +1,53 @@ +Qt 5.5 introduces many new features and improvements as well as bugfixes +over the 5.4.x series. + +For more details, refer to the online documentation included in this +distribution. The documentation is also available online: + + http://doc.qt.io/qt-5.5 + +The Qt version 5.5 series is binary compatible with the 5.4.x series. +Applications compiled for 5.4 will continue to run with 5.5. + +Some of the changes listed in this file include issue tracking numbers +corresponding to tasks in the Qt Bug Tracker: + + http://bugreports.qt.io/ + +Each of these identifiers can be entered in the bug tracker to obtain more +information about a particular change. + +**************************************************************************** +* Important * +**************************************************************************** + +- QtWebKit is now deprecated. It will continue to be supported in Qt 5, but +it is recommended new projects switch to the QtWebEngine APIs. + + +**************************************************************************** +* Library * +**************************************************************************** + +QtWebkit +-------- + - [QTBUG-45556] Fixed case where local pages could request remote content + when remote access was disabled. + - Support for more font-weight using new weight in QFont. + - [QTBUG-43628] Support authentication of POST requests. + + +**************************************************************************** +* Platform Specific Changes * +**************************************************************************** + +Windows +------- + - [QTBUG-46344] Support building with MSVC 2015 + +Linux +------- + - NS plugins are now linking using RTLD_DEEPBIND, making it possible to + load plugins using conflicting symbols such as Qt4 libraries. + - Plugins loading Qt4-using plugins of their own without using deepbind + are blacklisted. diff -Nuar a/dist/changes-5.6.0 b/dist/changes-5.6.0 --- a/dist/changes-5.6.0 1970-01-01 02:00:00.000000000 +0200 +++ b/dist/changes-5.6.0 2019-06-10 00:48:46.000000000 +0300 @@ -0,0 +1,51 @@ +Qt 5.6 introduces many new features and improvements as well as bugfixes +over the 5.5.x series. + +For more details, refer to the online documentation included in this +distribution. The documentation is also available online: + + http://doc.qt.io/qt-5.6 + +The Qt version 5.6 series is binary compatible with the 5.5.x series. +Applications compiled for 5.5 will continue to run with 5.6. + +Some of the changes listed in this file include issue tracking numbers +corresponding to tasks in the Qt Bug Tracker: + + http://bugreports.qt.io/ + +Each of these identifiers can be entered in the bug tracker to obtain more +information about a particular change. + + +**************************************************************************** +* Important Behavior Changes * +**************************************************************************** + + - The quality parameter in canvas.toDataURL only applies to JPEG images + now, in accordance with section 4.12.4.4 of the HTML5 spec. + +**************************************************************************** +* Library * +**************************************************************************** + +QtWebkit +-------- + - [QTBUG-44563] Render anchors as clickable links in PDF documents + - % unit heights didn't work if parent block height was set in vh + - Fixed regression: some errors were not reported to ErrorPageExtension + +QtWebkitQML +----------- + - WebView.experimental got several features which were previously available + only via widgets API: spatial navigation, links included in focus chain, + and user style sheets + - Fixed missing text in QQuickItem::inputMethodQuery when text element is + focused in WebView + + +**************************************************************************** +* Platform Specific Changes * +**************************************************************************** + +- Various build fixes diff -Nuar a/dist/changes-5.6.1 b/dist/changes-5.6.1 --- a/dist/changes-5.6.1 1970-01-01 02:00:00.000000000 +0200 +++ b/dist/changes-5.6.1 2019-06-10 00:48:46.000000000 +0300 @@ -0,0 +1,49 @@ +Qt 5.6.1 is a bug-fix release. It maintains both forward and backward +compatibility (source and binary) with Qt 5.6.0. + +For more details, refer to the online documentation included in this +distribution. The documentation is also available online: + + http://doc.qt.io/qt-5.6 + +The Qt version 5.6 series is binary compatible with the 5.5.x series. +Applications compiled for 5.5 will continue to run with 5.6. + +Some of the changes listed in this file include issue tracking numbers +corresponding to tasks in the Qt Bug Tracker: + + http://bugreports.qt.io/ + +Each of these identifiers can be entered in the bug tracker to obtain more +information about a particular change. + + +**************************************************************************** +* Important Behavior Changes * +**************************************************************************** + + - QtWebKit will no longer support any QImageIO plugin with the Size option, + but instead only decode formats that have been whitelisted. If you are + using QtWebKit for controlled content and wish to override the white list + it can now be done with the environment variable + QTWEBKIT_IMAGEFORMAT_WHITELIST which takes a comma-separated list of + QImageIO formats. + +**************************************************************************** +* Library * +**************************************************************************** + +QtWebkit +-------- + - Fixed memory leaks and crashes related to SVG animated properties. + - Fixed compilation with libjpeg v9. + + +**************************************************************************** +* Platform Specific Changes * +**************************************************************************** + +Windows +------- +- QtWebKit does not require Qt configured with ICU support anymore to be + built. diff -Nuar a/README b/README --- a/README 1970-01-01 02:00:00.000000000 +0200 +++ b/README 2019-06-10 00:48:46.000000000 +0300 @@ -0,0 +1,15 @@ +# Qt Port of WebKit + +WebKit is an open source web browser engine. WebKit's HTML and JavaScript code began as a branch of the KHTML and KJS libraries from KDE. As part of KDE framework KHTML was based on Qt but during their porting efforts Apple's engineers made WebKit toolkit independent. QtWebKit is a project aiming at porting this fabulous engine back to Qt. + +The Qt port of WebKit currently compiles and runs on Linux, *BSD, Windows and macOS. + +# Building + +See instructions at https://github.com/annulen/webkit/wiki + +# Contacts + +* Mailing list: webkit-qt@lists.webkit.org +* IRC: #qtwebkit on irc.freenode.net +* Blog: http://qtwebkit.blogspot.com diff -Nuar a/Source/bmalloc/bmalloc/BPlatform.h b/Source/bmalloc/bmalloc/BPlatform.h --- a/Source/bmalloc/bmalloc/BPlatform.h 2017-06-04 23:16:07.000000000 +0300 +++ b/Source/bmalloc/bmalloc/BPlatform.h 2019-06-10 00:48:46.000000000 +0300 @@ -120,7 +120,8 @@ || defined(__ARM_ARCH_7S__) #define BARM_ARCH_VERSION 7 -#elif defined(__ARM_ARCH_8__) +#elif defined(__ARM_ARCH_8__) \ +|| defined(__ARM_ARCH_8A__) #define BARM_ARCH_VERSION 8 /* MSVC sets _M_ARM */ diff -Nuar a/Source/cmake/ECMEnableSanitizers.cmake b/Source/cmake/ECMEnableSanitizers.cmake --- a/Source/cmake/ECMEnableSanitizers.cmake 1970-01-01 02:00:00.000000000 +0200 +++ b/Source/cmake/ECMEnableSanitizers.cmake 2019-06-10 00:48:46.000000000 +0300 @@ -0,0 +1,173 @@ +#.rst: +# ECMEnableSanitizers +# ------------------- +# +# Enable compiler sanitizer flags. +# +# The following sanitizers are supported: +# +# - Address Sanitizer +# - Memory Sanitizer +# - Thread Sanitizer +# - Leak Sanitizer +# - Undefined Behaviour Sanitizer +# +# All of them are implemented in Clang, depending on your version, and +# there is an work in progress in GCC, where some of them are currently +# implemented. +# +# This module will check your current compiler version to see if it +# supports the sanitizers that you want to enable +# +# Usage +# ===== +# +# Simply add:: +# +# include(ECMEnableSanitizers) +# +# to your ``CMakeLists.txt``. Note that this module is included in +# KDECompilerSettings, so projects using that module do not need to also +# include this one. +# +# The sanitizers are not enabled by default. Instead, you must set +# ``ECM_ENABLE_SANITIZERS`` (either in your ``CMakeLists.txt`` or on the +# command line) to a semicolon-separated list of sanitizers you wish to enable. +# The options are: +# +# - address +# - memory +# - thread +# - leak +# - undefined +# +# The sanitizers "address", "memory" and "thread" are mutually exclusive. You +# cannot enable two of them in the same build. +# +# "leak" requires the "address" sanitizer. +# +# .. note:: +# +# To reduce the overhead induced by the instrumentation of the sanitizers, it +# is advised to enable compiler optimizations (``-O1`` or higher). +# +# Example +# ======= +# +# This is an example of usage:: +# +# mkdir build +# cd build +# cmake -DECM_ENABLE_SANITIZERS='address;leak;undefined' .. +# +# .. note:: +# +# Most of the sanitizers will require Clang. To enable it, use:: +# +# -DCMAKE_CXX_COMPILER=clang++ +# +# Since 1.3.0. + +#============================================================================= +# Copyright 2014 Mathieu Tarral +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# 3. The name of the author may not be used to endorse or promote products +# derived from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR +# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +# MACRO check_compiler_version +#----------------------------- +macro (check_compiler_version gcc_required_version clang_required_version) + if ( + ( + CMAKE_CXX_COMPILER_ID MATCHES "GNU" + AND + CMAKE_CXX_COMPILER_VERSION VERSION_LESS ${gcc_required_version} + ) + OR + ( + CMAKE_CXX_COMPILER_ID MATCHES "Clang" + AND + CMAKE_CXX_COMPILER_VERSION VERSION_LESS ${clang_required_version} + ) + ) + # error ! + message(FATAL_ERROR "You ask to enable the sanitizer ${CUR_SANITIZER}, + but your compiler ${CMAKE_CXX_COMPILER_ID} version ${CMAKE_CXX_COMPILER_VERSION} + does not support it ! + You should use at least GCC ${gcc_required_version} or Clang ${clang_required_version} + (99.99 means not implemented yet)") + endif () +endmacro () + +# MACRO check_compiler_support +#------------------------------ +macro (enable_sanitizer_flags sanitize_option) + if (${sanitize_option} MATCHES "address") + check_compiler_version("4.8" "3.1") + set(XSAN_COMPILE_FLAGS "-fsanitize=address -fno-omit-frame-pointer -fno-optimize-sibling-calls") + set(XSAN_LINKER_FLAGS "asan") + elseif (${sanitize_option} MATCHES "thread") + check_compiler_version("4.8" "3.1") + set(XSAN_COMPILE_FLAGS "-fsanitize=thread") + set(XSAN_LINKER_FLAGS "tsan") + elseif (${sanitize_option} MATCHES "memory") + check_compiler_version("99.99" "3.1") + set(XSAN_COMPILE_FLAGS "-fsanitize=memory") + elseif (${sanitize_option} MATCHES "leak") + check_compiler_version("4.9" "3.4") + set(XSAN_COMPILE_FLAGS "-fsanitize=leak") + set(XSAN_LINKER_FLAGS "lsan") + elseif (${sanitize_option} MATCHES "undefined") + check_compiler_version("4.9" "3.1") + set(XSAN_COMPILE_FLAGS "-fsanitize=undefined -fno-omit-frame-pointer -fno-optimize-sibling-calls") + else () + message(FATAL_ERROR "Compiler sanitizer option \"${sanitize_option}\" not supported.") + endif () +endmacro () + +if (ECM_ENABLE_SANITIZERS) + if (CMAKE_CXX_COMPILER_ID MATCHES "GNU" OR CMAKE_CXX_COMPILER_ID MATCHES "Clang") + # for each element of the ECM_ENABLE_SANITIZERS list + foreach ( CUR_SANITIZER ${ECM_ENABLE_SANITIZERS} ) + # lowercase filter + string(TOLOWER ${CUR_SANITIZER} CUR_SANITIZER) + # check option and enable appropriate flags + enable_sanitizer_flags ( ${CUR_SANITIZER} ) + # TODO: GCC will not link pthread library if enabled ASan + if(CMAKE_C_COMPILER_ID MATCHES "Clang") + set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} ${XSAN_COMPILE_FLAGS}" ) + endif() + set( CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} ${XSAN_COMPILE_FLAGS}" ) + if(CMAKE_CXX_COMPILER_ID MATCHES "GNU") + link_libraries(${XSAN_LINKER_FLAGS}) + endif() + if (CMAKE_CXX_COMPILER_ID STREQUAL "Clang") + string(REPLACE "-Wl,--no-undefined" "" CMAKE_SHARED_LINKER_FLAGS "${CMAKE_SHARED_LINKER_FLAGS}") + string(REPLACE "-Wl,--no-undefined" "" CMAKE_MODULE_LINKER_FLAGS "${CMAKE_MODULE_LINKER_FLAGS}") + endif () + endforeach() + else() + message(STATUS "Tried to enable sanitizers (-DECM_ENABLE_SANITIZERS=${ECM_ENABLE_SANITIZERS}), \ +but compiler (${CMAKE_CXX_COMPILER_ID}) does not have sanitizer support") + endif() +endif() diff -Nuar a/Source/cmake/ECMGeneratePkgConfigFile.cmake b/Source/cmake/ECMGeneratePkgConfigFile.cmake --- a/Source/cmake/ECMGeneratePkgConfigFile.cmake 2017-06-04 23:16:07.000000000 +0300 +++ b/Source/cmake/ECMGeneratePkgConfigFile.cmake 2019-06-10 00:48:46.000000000 +0300 @@ -16,6 +16,7 @@ # [INCLUDE_INSTALL_DIR ] # [LIB_INSTALL_DIR ] # [DEFINES -D...] +# [DESCRIPTION ] # [INSTALL]) # # ``BASE_NAME`` is the name of the module. It's the name projects will use to @@ -42,6 +43,10 @@ # ``DEFINES`` is a list of preprocessor defines that it is recommended users of # the library pass to the compiler when using it. # +# ``DESCRIPTION`` describes what this library is. If it's not specified, CMake +# will first try to get the description from the metainfo.yaml file or will +# create one based on ``LIB_NAME``. +# # ``INSTALL`` will cause the module to be installed to the ``pkgconfig`` # subdirectory of ``LIB_INSTALL_DIR``, unless the ``ECM_PKGCONFIG_INSTALL_DIR`` # cache variable is set to something different. Note that the first call to @@ -66,24 +71,39 @@ # ) # # Since 1.3.0. +# ``DESCRIPTION`` available since 5.1.41 +# #============================================================================= # Copyright 2014 Aleix Pol Gonzalez # Copyright 2014 David Faure # -# Distributed under the OSI-approved BSD License (the "License"); -# see accompanying file COPYING-CMAKE-SCRIPTS for details. -# -# This software is distributed WITHOUT ANY WARRANTY; without even the -# implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. -# See the License for more information. -#============================================================================= -# (To distribute this file outside of extra-cmake-modules, substitute the full -# License text for the above reference.) +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# 3. The name of the author may not be used to endorse or promote products +# derived from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR +# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. function(ECM_GENERATE_PKGCONFIG_FILE) set(options INSTALL) - set(oneValueArgs BASE_NAME LIB_NAME FILENAME_VAR INCLUDE_INSTALL_DIR LIB_INSTALL_DIR) + set(oneValueArgs BASE_NAME LIB_NAME FILENAME_VAR INCLUDE_INSTALL_DIR LIB_INSTALL_DIR DESCRIPTION) set(multiValueArgs DEPS DEFINES) cmake_parse_arguments(EGPF "${options}" "${oneValueArgs}" "${multiValueArgs}" ${ARGN}) @@ -119,6 +139,17 @@ set(EGPF_LIB_INSTALL_DIR "lib") endif() endif() + if(NOT EGPF_DESCRIPTION) + if(EXISTS ${CMAKE_SOURCE_DIR}/metainfo.yaml) + file(STRINGS "${CMAKE_SOURCE_DIR}/metainfo.yaml" _EGPF_METAINFO_DESCRIPTION_STRING REGEX "^description:.*$") + if(_EGPF_METAINFO_DESCRIPTION_STRING) + string(REGEX REPLACE "^description:[ ]*(.*)" "\\1" EGPF_DESCRIPTION ${_EGPF_METAINFO_DESCRIPTION_STRING}) + endif() + endif() + if("${EGPF_DESCRIPTION}" STREQUAL "") + set(EGPF_DESCRIPTION "${EGPF_LIB_NAME} library.") + endif() + endif() set(PKGCONFIG_TARGET_BASENAME ${EGPF_BASE_NAME}) set(PKGCONFIG_TARGET_LIBNAME ${EGPF_LIB_NAME}) @@ -135,6 +166,7 @@ else() set(PKGCONFIG_TARGET_LIBS "${CMAKE_INSTALL_PREFIX}/${EGPF_LIB_INSTALL_DIR}") endif() + set(PKGCONFIG_TARGET_DESCRIPTION "${EGPF_DESCRIPTION}") set(PKGCONFIG_TARGET_DEFINES "") if(EGPF_DEFINES) set(PKGCONFIG_TARGET_DEFINES "${EGPF_DEFINE}") @@ -148,6 +180,7 @@ file(WRITE ${PKGCONFIG_FILENAME} " Name: ${PKGCONFIG_TARGET_LIBNAME} +Description: ${PKGCONFIG_TARGET_DESCRIPTION} Version: ${PROJECT_VERSION} Libs: -L${CMAKE_INSTALL_PREFIX}/${EGPF_LIB_INSTALL_DIR} -l${PKGCONFIG_TARGET_LIBNAME} Cflags: ${PKGCONFIG_TARGET_INCLUDES} ${PKGCONFIG_TARGET_DEFINES} @@ -156,8 +189,11 @@ ) if(EGPF_INSTALL) - set(ECM_PKGCONFIG_INSTALL_DIR "${EGPF_LIB_INSTALL_DIR}/pkgconfig" CACHE PATH "The directory where pkgconfig will be installed to.") + if(CMAKE_SYSTEM_NAME MATCHES "FreeBSD") + set(ECM_PKGCONFIG_INSTALL_DIR "${CMAKE_INSTALL_PREFIX}/libdata/pkgconfig" CACHE PATH "The directory where pkgconfig will be installed to.") + else() + set(ECM_PKGCONFIG_INSTALL_DIR "${EGPF_LIB_INSTALL_DIR}/pkgconfig" CACHE PATH "The directory where pkgconfig will be installed to.") + endif() install(FILES ${PKGCONFIG_FILENAME} DESTINATION ${ECM_PKGCONFIG_INSTALL_DIR}) endif() endfunction() - diff -Nuar a/Source/cmake/FindGeoClue2.cmake b/Source/cmake/FindGeoClue2.cmake --- a/Source/cmake/FindGeoClue2.cmake 2017-06-04 23:16:07.000000000 +0300 +++ b/Source/cmake/FindGeoClue2.cmake 2019-06-10 00:48:46.000000000 +0300 @@ -48,4 +48,5 @@ endif () include(FindPackageHandleStandardArgs) -FIND_PACKAGE_HANDLE_STANDARD_ARGS(GEOCLUE2 DEFAULT_MSG VERSION_OK) +find_package_handle_standard_args(GeoClue2 REQUIRED_VARS VERSION_OK + FOUND_VAR GEOCLUE2_FOUND) diff -Nuar a/Source/cmake/FindGTKUnixPrint.cmake b/Source/cmake/FindGTKUnixPrint.cmake --- a/Source/cmake/FindGTKUnixPrint.cmake 2017-06-04 23:16:07.000000000 +0300 +++ b/Source/cmake/FindGTKUnixPrint.cmake 2019-06-10 00:48:46.000000000 +0300 @@ -1,7 +1,7 @@ # - Try to find gtk-unix-print # Once done, this will define # -# GTK_UNIX_PRINT_FOUND - system has gtk-unix-print +# GTKUnixPrint_FOUND - system has gtk-unix-print # GTK_UNIX_PRINT_INCLUDE_DIRS - the gtk-unix-print include directories # GTK_UNIX_PRINT_LIBRARIES - link these to use gtk-unix-print # @@ -46,4 +46,4 @@ endif () include(FindPackageHandleStandardArgs) -FIND_PACKAGE_HANDLE_STANDARD_ARGS(GTK_UNIX_PRINT DEFAULT_MSG GTK_UNIX_PRINT_INCLUDE_DIRS GTK_UNIX_PRINT_LIBRARIES VERSION_OK) +find_package_handle_standard_args(GTKUnixPrint REQUIRED_VARS GTK_UNIX_PRINT_INCLUDE_DIRS GTK_UNIX_PRINT_LIBRARIES VERSION_OK) diff -Nuar a/Source/cmake/FindHyphen.cmake b/Source/cmake/FindHyphen.cmake --- a/Source/cmake/FindHyphen.cmake 2017-06-04 23:16:07.000000000 +0300 +++ b/Source/cmake/FindHyphen.cmake 2019-06-10 00:48:46.000000000 +0300 @@ -34,7 +34,8 @@ find_library(HYPHEN_LIBRARIES NAMES hyphen hnj) include(FindPackageHandleStandardArgs) -FIND_PACKAGE_HANDLE_STANDARD_ARGS(HYPHEN DEFAULT_MSG HYPHEN_INCLUDE_DIR HYPHEN_LIBRARIES) +find_package_handle_standard_args(Hyphen REQUIRED_VARS HYPHEN_INCLUDE_DIR HYPHEN_LIBRARIES + FOUND_VAR HYPHEN_FOUND) if (HYPHEN_INCLUDE_DIR AND HYPHEN_LIBRARIES) set(HYPHEN_FOUND 1) diff -Nuar a/Source/cmake/FindLibsecret.cmake b/Source/cmake/FindLibsecret.cmake --- a/Source/cmake/FindLibsecret.cmake 2017-06-04 23:16:07.000000000 +0300 +++ b/Source/cmake/FindLibsecret.cmake 2019-06-10 00:48:46.000000000 +0300 @@ -46,4 +46,5 @@ endif () include(FindPackageHandleStandardArgs) -FIND_PACKAGE_HANDLE_STANDARD_ARGS(LIBSECRET DEFAULT_MSG LIBSECRET_INCLUDE_DIRS LIBSECRET_LIBRARIES VERSION_OK) +find_package_handle_standard_args(Libsecret REQUIRED_VARS LIBSECRET_INCLUDE_DIRS LIBSECRET_LIBRARIES VERSION_OK + FOUND_VAR LIBSECRET_FOUND) diff -Nuar a/Source/cmake/FindOpenGL.cmake b/Source/cmake/FindOpenGL.cmake --- a/Source/cmake/FindOpenGL.cmake 2017-06-04 23:16:07.000000000 +0300 +++ b/Source/cmake/FindOpenGL.cmake 2019-06-10 00:48:46.000000000 +0300 @@ -48,7 +48,8 @@ ) include(FindPackageHandleStandardArgs) -FIND_PACKAGE_HANDLE_STANDARD_ARGS(OPENGL DEFAULT_MSG OPENGL_INCLUDE_DIRS OPENGL_LIBRARIES) +find_package_handle_standard_args(OpenGL REQUIRED_VARS OPENGL_INCLUDE_DIRS OPENGL_LIBRARIES + FOUND_VAR OPENGL_FOUND) mark_as_advanced(OPENGL_INCLUDE_DIRS OPENGL_LIBRARIES) diff -Nuar a/Source/cmake/FindOpenGLES2.cmake b/Source/cmake/FindOpenGLES2.cmake --- a/Source/cmake/FindOpenGLES2.cmake 2017-06-04 23:16:07.000000000 +0300 +++ b/Source/cmake/FindOpenGLES2.cmake 2019-06-10 00:48:46.000000000 +0300 @@ -22,6 +22,7 @@ ) include(FindPackageHandleStandardArgs) -FIND_PACKAGE_HANDLE_STANDARD_ARGS(OPENGLES2 DEFAULT_MSG OPENGLES2_INCLUDE_DIRS OPENGLES2_LIBRARIES) +find_package_handle_standard_args(OpenGLES2 REQUIRED_VARS OPENGLES2_INCLUDE_DIRS OPENGLES2_LIBRARIES + FOUND_VAR OPENGLES2_FOUND) mark_as_advanced(OPENGLES2_INCLUDE_DIRS OPENGLES2_LIBRARIES) diff -Nuar a/Source/cmake/FindOpenWebRTC.cmake b/Source/cmake/FindOpenWebRTC.cmake --- a/Source/cmake/FindOpenWebRTC.cmake 2017-06-04 23:16:07.000000000 +0300 +++ b/Source/cmake/FindOpenWebRTC.cmake 2019-06-10 00:48:46.000000000 +0300 @@ -46,4 +46,5 @@ endif () include(FindPackageHandleStandardArgs) -FIND_PACKAGE_HANDLE_STANDARD_ARGS(OPENWEBRTC DEFAULT_MSG OPENWEBRTC_INCLUDE_DIRS OPENWEBRTC_LIBRARIES VERSION_OK) +find_package_handle_standard_args(OpenWebRTC REQUIRED_VARS OPENWEBRTC_INCLUDE_DIRS OPENWEBRTC_LIBRARIES VERSION_OK + FOUND_VAR OPENWEBRTC_FOUND) diff -Nuar a/Source/cmake/FindWayland.cmake b/Source/cmake/FindWayland.cmake --- a/Source/cmake/FindWayland.cmake 2017-06-04 23:16:07.000000000 +0300 +++ b/Source/cmake/FindWayland.cmake 2019-06-10 00:48:46.000000000 +0300 @@ -32,4 +32,5 @@ pkg_check_modules(WAYLAND wayland-client wayland-server wayland-egl) include(FindPackageHandleStandardArgs) -FIND_PACKAGE_HANDLE_STANDARD_ARGS(WAYLAND DEFAULT_MSG WAYLAND_LIBRARIES) +find_package_handle_standard_args(Wayland REQUIRED_VARS WAYLAND_LIBRARIES + FOUND_VAR WAYLAND_FOUND) diff -Nuar a/Source/cmake/FindWebP.cmake b/Source/cmake/FindWebP.cmake --- a/Source/cmake/FindWebP.cmake 2017-06-04 23:16:07.000000000 +0300 +++ b/Source/cmake/FindWebP.cmake 2019-06-10 00:48:46.000000000 +0300 @@ -48,4 +48,5 @@ mark_as_advanced(WEBP_LIBRARIES) include(FindPackageHandleStandardArgs) -FIND_PACKAGE_HANDLE_STANDARD_ARGS(WEBP DEFAULT_MSG WEBP_INCLUDE_DIRS WEBP_LIBRARIES) +find_package_handle_standard_args(WebP REQUIRED_VARS WEBP_INCLUDE_DIRS WEBP_LIBRARIES + FOUND_VAR WEBP_FOUND) diff -Nuar a/Source/cmake/FindWOFF2Dec.cmake b/Source/cmake/FindWOFF2Dec.cmake --- a/Source/cmake/FindWOFF2Dec.cmake 1970-01-01 02:00:00.000000000 +0200 +++ b/Source/cmake/FindWOFF2Dec.cmake 2019-06-10 00:48:46.000000000 +0300 @@ -0,0 +1,53 @@ +# - Try to find WOFF2Dec. +# Once done, this will define +# +# WOFF2DEC_FOUND - system has WOFF2Dec. +# WOFF2DEC_INCLUDE_DIRS - the WOFF2Dec include directories +# WOFF2DEC_LIBRARIES - link these to use WOFF2Dec. +# +# Copyright (C) 2017 Igalia S.L. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDER AND ITS CONTRIBUTORS ``AS +# IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, +# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR +# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR ITS +# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, +# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, +# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; +# OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, +# WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR +# OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF +# ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +find_package(PkgConfig) +pkg_check_modules(PC_WOFF2DEC libwoff2dec) + +find_path(WOFF2DEC_INCLUDE_DIRS + NAMES woff2/decode.h + HINTS ${PC_WOFF2DEC_INCLUDEDIR} +) + +find_library(WOFF2DEC_LIBRARIES + NAMES woff2dec + HINTS ${PC_WOFF2DEC_LIBDIR} +) + +include(FindPackageHandleStandardArgs) +find_package_handle_standard_args(WOFF2Dec + REQUIRED_VARS WOFF2DEC_INCLUDE_DIRS WOFF2DEC_LIBRARIES + FOUND_VAR WOFF2DEC_FOUND + VERSION_VAR PC_WOFF2DEC_VERSION) + +mark_as_advanced( + WOFF2DEC_INCLUDE_DIRS + WOFF2DEC_LIBRARIES +) diff -Nuar a/Source/cmake/OptionsCommon.cmake b/Source/cmake/OptionsCommon.cmake --- a/Source/cmake/OptionsCommon.cmake 2017-06-15 14:56:11.000000000 +0300 +++ b/Source/cmake/OptionsCommon.cmake 2019-06-10 00:48:46.000000000 +0300 @@ -32,10 +32,6 @@ set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -fno-exceptions -fno-strict-aliasing") set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -fno-exceptions -fno-strict-aliasing -fno-rtti") set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -std=c++11") - if (NOT (COMPILER_IS_CLANG AND "${CLANG_VERSION}" VERSION_LESS 4.0.0)) - set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -Wno-expansion-to-defined") - set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -Wno-expansion-to-defined") - endif () endif () if (COMPILER_IS_CLANG AND CMAKE_GENERATOR STREQUAL "Ninja") diff -Nuar a/Source/cmake/OptionsQt.cmake b/Source/cmake/OptionsQt.cmake --- a/Source/cmake/OptionsQt.cmake 2017-06-16 02:36:48.000000000 +0300 +++ b/Source/cmake/OptionsQt.cmake 2019-06-10 00:48:46.000000000 +0300 @@ -1,4 +1,6 @@ +include(CheckCXXSourceCompiles) include(FeatureSummary) +include(ECMEnableSanitizers) include(ECMPackageConfigHelpers) set(ECM_MODULE_DIR ${CMAKE_MODULE_PATH}) @@ -52,6 +54,30 @@ endif () endmacro() +macro(CHECK_QT5_PRIVATE_INCLUDE_DIRS _qt_component _header) + set(INCLUDE_TEST_SOURCE + " + #include <${_header}> + int main() { return 0; } + " + ) + set(CMAKE_REQUIRED_INCLUDES ${Qt5${_qt_component}_PRIVATE_INCLUDE_DIRS}) + set(CMAKE_REQUIRED_LIBRARIES Qt5::${_qt_component}) + + # Avoid check_include_file_cxx() because it performs linking but doesn't support CMAKE_REQUIRED_LIBRARIES (doh!) + check_cxx_source_compiles("${INCLUDE_TEST_SOURCE}" Qt5${_qt_component}_PRIVATE_HEADER_FOUND) + + unset(INCLUDE_TEST_SOURCE) + unset(CMAKE_REQUIRED_INCLUDES) + unset(CMAKE_REQUIRED_LIBRARIES) + + if (NOT Qt5${_qt_component}_PRIVATE_HEADER_FOUND) + message(FATAL_ERROR "Header ${_header} is not found. Please make sure that: + 1. Private headers of Qt5${_qt_component} are installed + 2. Qt5${_qt_component}_PRIVATE_INCLUDE_DIRS is correctly defined in Qt5${_qt_component}Config.cmake") + endif () +endmacro() + macro(QT_ADD_EXTRA_WEBKIT_TARGET_EXPORT target) if (QT_STATIC_BUILD OR SHARED_CORE) install(TARGETS ${target} EXPORT WebKitTargets @@ -59,7 +85,16 @@ endif () endmacro() -macro(QTWEBKIT_GENERATE_MOC_FILES_CPP) +macro(QTWEBKIT_SKIP_AUTOMOC _target) + foreach (_src ${${_target}_SOURCES}) + set_property(SOURCE ${_src} PROPERTY SKIP_AUTOMOC ON) + endforeach () +endmacro() + +macro(QTWEBKIT_GENERATE_MOC_FILES_CPP _target) + if (${ARGC} LESS 2) + message(FATAL_ERROR "QTWEBKIT_GENERATE_MOC_FILES_CPP must be called with at least 2 arguments") + endif () foreach (_file ${ARGN}) get_filename_component(_ext ${_file} EXT) if (NOT _ext STREQUAL ".cpp") @@ -67,12 +102,12 @@ endif () get_filename_component(_name_we ${_file} NAME_WE) set(_moc_name "${CMAKE_CURRENT_BINARY_DIR}/${_name_we}.moc") - qt5_generate_moc(${_file} ${_moc_name}) + qt5_generate_moc(${_file} ${_moc_name} TARGET ${_target}) ADD_SOURCE_DEPENDENCIES(${_file} ${_moc_name}) endforeach () endmacro() -macro(QTWEBKIT_GENERATE_MOC_FILE_H _header _source) +macro(QTWEBKIT_GENERATE_MOC_FILE_H _target _header _source) get_filename_component(_header_ext ${_header} EXT) get_filename_component(_source_ext ${_source} EXT) if ((NOT _header_ext STREQUAL ".h") OR (NOT _source_ext STREQUAL ".cpp")) @@ -80,16 +115,19 @@ endif () get_filename_component(_name_we ${_header} NAME_WE) set(_moc_name "${CMAKE_CURRENT_BINARY_DIR}/moc_${_name_we}.cpp") - qt5_generate_moc(${_header} ${_moc_name}) + qt5_generate_moc(${_header} ${_moc_name} TARGET ${_target}) ADD_SOURCE_DEPENDENCIES(${_source} ${_moc_name}) endmacro() -macro(QTWEBKIT_GENERATE_MOC_FILES_H) +macro(QTWEBKIT_GENERATE_MOC_FILES_H _target) + if (${ARGC} LESS 2) + message(FATAL_ERROR "QTWEBKIT_GENERATE_MOC_FILES_H must be called with at least 2 arguments") + endif () foreach (_header ${ARGN}) get_filename_component(_header_dir ${_header} DIRECTORY) get_filename_component(_name_we ${_header} NAME_WE) set(_source "${_header_dir}/${_name_we}.cpp") - QTWEBKIT_GENERATE_MOC_FILE_H(${_header} ${_source}) + QTWEBKIT_GENERATE_MOC_FILE_H(${_target} ${_header} ${_source}) endforeach () endmacro() @@ -118,8 +156,18 @@ WEBKIT_OPTION_BEGIN() if (APPLE) + set(MACOS_COMPATIBILITY_VERSION "${PROJECT_VERSION_MAJOR}.${PROJECT_VERSION_MINOR}" CACHE STRING "Compatibility version that macOS dylibs should have") + option(MACOS_FORCE_SYSTEM_XML_LIBRARIES "Use system installation of libxml2 and libxslt on macOS" ON) - set(MACOS_BUILD_FRAMEWORKS ON) # TODO: Make it an option + option(MACOS_USE_SYSTEM_ICU "Use system installation of ICU on macOS" ON) + option(USE_UNIX_DOMAIN_SOCKETS "Use Unix domain sockets instead of native IPC code on macOS" OFF) + option(USE_APPSTORE_COMPLIANT_CODE "Avoid using private macOS APIs which are not allowed on App Store (experimental)" OFF) + option(MACOS_BUILD_FRAMEWORKS "Build QtWebKit as framework bundles" ON) + + if (USE_APPSTORE_COMPLIANT_CODE) + set(MACOS_USE_SYSTEM_ICU OFF) + set(USE_UNIX_DOMAIN_SOCKETS ON) + endif () endif () if (WIN32 OR APPLE) @@ -152,7 +200,28 @@ endif () # FIXME: Move Qt handling here -find_package(Qt5Gui QUIET) +set(REQUIRED_QT_VERSION 5.2.0) +find_package(Qt5 ${REQUIRED_QT_VERSION} REQUIRED COMPONENTS Core Gui QUIET) + +get_target_property(QT_CORE_TYPE Qt5::Core TYPE) +if (QT_CORE_TYPE MATCHES STATIC) + set(QT_STATIC_BUILD ON) + set(SHARED_CORE OFF) + set(MACOS_BUILD_FRAMEWORKS OFF) +endif () + +# static icu libraries on windows are build with 's' prefix +if (QT_STATIC_BUILD AND MSVC) + set(ICU_LIBRARY_PREFIX "s") +else () + set(ICU_LIBRARY_PREFIX "") +endif () + +if (QT_STATIC_BUILD) + set(ENABLE_WEBKIT2_DEFAULT OFF) +else () + set(ENABLE_WEBKIT2_DEFAULT ON) +endif () if (UNIX AND TARGET Qt5::QXcbIntegrationPlugin AND NOT APPLE) set(ENABLE_X11_TARGET_DEFAULT ON) @@ -179,7 +248,7 @@ WEBKIT_OPTION_DEFINE(ENABLE_PRINT_SUPPORT "Enable support for printing web pages" PUBLIC ON) WEBKIT_OPTION_DEFINE(ENABLE_QT_GESTURE_EVENTS "Enable support for gesture events (required for mouse in WK2)" PUBLIC ON) WEBKIT_OPTION_DEFINE(ENABLE_QT_WEBCHANNEL "Enable support for Qt WebChannel" PUBLIC ON) -WEBKIT_OPTION_DEFINE(ENABLE_WEBKIT2 "Enable WebKit2 (QML API)" PUBLIC ON) +WEBKIT_OPTION_DEFINE(ENABLE_WEBKIT2 "Enable WebKit2 (QML API)" PUBLIC ${ENABLE_WEBKIT2_DEFAULT}) WEBKIT_OPTION_DEFINE(ENABLE_X11_TARGET "Whether to enable support for the X11 windowing target." PUBLIC ${ENABLE_X11_TARGET_DEFAULT}) option(GENERATE_DOCUMENTATION "Generate HTML and QCH documentation" OFF) @@ -190,6 +259,7 @@ # Private options specific to the Qt port. Changing these options is # completely unsupported. They are intended for use only by WebKit developers. WEBKIT_OPTION_DEFINE(ENABLE_TOUCH_ADJUSTMENT "Whether to use touch adjustment" PRIVATE ON) +WEBKIT_OPTION_DEFINE(USE_LIBJPEG "Support JPEG format directly. If it is disabled, QImageReader will be used with possible degradation of user experience" PUBLIC ON) # Public options shared with other WebKit ports. There must be strong reason @@ -249,11 +319,17 @@ endif () WEBKIT_OPTION_CONFLICT(USE_GSTREAMER USE_QT_MULTIMEDIA) +WEBKIT_OPTION_CONFLICT(USE_GSTREAMER USE_MEDIA_FOUNDATION) +WEBKIT_OPTION_CONFLICT(USE_QT_MULTIMEDIA USE_MEDIA_FOUNDATION) WEBKIT_OPTION_DEPEND(ENABLE_3D_TRANSFORMS ENABLE_OPENGL) WEBKIT_OPTION_DEPEND(ENABLE_ACCELERATED_2D_CANVAS ENABLE_OPENGL) WEBKIT_OPTION_DEPEND(ENABLE_WEBGL ENABLE_OPENGL) +# Building video without these options is not supported +WEBKIT_OPTION_DEPEND(ENABLE_VIDEO ENABLE_VIDEO_TRACK) +WEBKIT_OPTION_DEPEND(ENABLE_VIDEO ENABLE_MEDIA_CONTROLS_SCRIPT) + # WebAudio and MediaSource are supported with GStreamer only WEBKIT_OPTION_DEPEND(ENABLE_WEB_AUDIO USE_GSTREAMER) WEBKIT_OPTION_DEPEND(ENABLE_LEGACY_WEB_AUDIO USE_GSTREAMER) @@ -261,6 +337,8 @@ WEBKIT_OPTION_DEPEND(ENABLE_QT_WEBCHANNEL ENABLE_WEBKIT2) +WEBKIT_OPTION_DEPEND(ENABLE_TOUCH_ADJUSTMENT ENABLE_QT_GESTURE_EVENTS) + # While it's possible to have UI-less NPAPI plugins without X11, we don't support this case yet if (UNIX AND NOT APPLE) WEBKIT_OPTION_DEPEND(ENABLE_NETSCAPE_PLUGIN_API ENABLE_X11_TARGET) @@ -271,9 +349,9 @@ # FTL JIT and IndexedDB support require GCC 4.9 # TODO: Patch code to avoid variadic lambdas if (CMAKE_CXX_COMPILER_ID STREQUAL "GNU") - if (ENABLE_FTL_JIT OR ENABLE_INDEXED_DATABASE) + if (ENABLE_FTL_JIT OR ENABLE_INDEXED_DATABASE OR (ENABLE_WEBKIT2 AND ENABLE_DATABASE_PROCESS)) if (CMAKE_CXX_COMPILER_VERSION VERSION_LESS "4.9.0") - message(FATAL_ERROR "GCC 4.9.0 is required to build QtWebKit with FTL JIT and Indexed Database, use a newer GCC version or clang, or disable these features") + message(FATAL_ERROR "GCC 4.9.0 is required to build QtWebKit with FTL JIT, Indexed Database, and Database Process (WebKit 2). Use a newer GCC version or clang, or disable these features") endif () else () if (CMAKE_CXX_COMPILER_VERSION VERSION_LESS "4.8.0") @@ -291,13 +369,6 @@ set(ENABLE_WEBKIT ON) set(WTF_USE_UDIS86 1) -get_target_property(QT_CORE_TYPE Qt5::Core TYPE) -if (QT_CORE_TYPE MATCHES STATIC) - set(QT_STATIC_BUILD ON) - set(SHARED_CORE OFF) - set(MACOS_BUILD_FRAMEWORKS OFF) -endif () - if (SHARED_CORE) set(WebCoreTestSupport_LIBRARY_TYPE SHARED) else () @@ -360,6 +431,7 @@ add_library(qtsqlite STATIC ${SQLITE_SOURCE_FILE}) target_compile_definitions(qtsqlite PUBLIC -DSQLITE_CORE -DSQLITE_OMIT_LOAD_EXTENSION -DSQLITE_OMIT_COMPLETE) WEBKIT_SET_EXTRA_COMPILER_FLAGS(qtsqlite) + QT_ADD_EXTRA_WEBKIT_TARGET_EXPORT(qtsqlite) set(SQLITE_LIBRARIES qtsqlite) set(SQLITE_FOUND 1) else () @@ -368,10 +440,13 @@ find_package(Threads REQUIRED) -if (NOT QT_BUNDLED_JPEG) - find_package(JPEG REQUIRED) +if (USE_LIBJPEG) + find_package(JPEG) + if (NOT JPEG_FOUND) + message(FATAL_ERROR "libjpeg not found. Please make sure that CMake can find its header files and libraries, or build with -DUSE_LIBJPEG=OFF with possible degradation of user experience") + endif () else () - set(JPEG_FOUND 1) + message(WARNING "USE_LIBJPEG is disabled, will attempt using QImageReader to decode JPEG with possible degradation of user experience") endif () if (NOT QT_BUNDLED_PNG) @@ -386,15 +461,19 @@ set(ZLIB_FOUND 1) endif () -if (NOT APPLE) - find_package(ICU REQUIRED) -else () +if (MACOS_USE_SYSTEM_ICU) + # Use system ICU library and bundled headers set(ICU_INCLUDE_DIRS "${WEBCORE_DIR}/icu" "${JAVASCRIPTCORE_DIR}/icu" "${WTF_DIR}/icu" ) set(ICU_LIBRARIES libicucore.dylib) +else () + find_package(ICU REQUIRED) +endif () + +if (APPLE) find_library(COREFOUNDATION_LIBRARY CoreFoundation) if (QT_STATIC_BUILD) find_library(CARBON_LIBRARY Carbon) @@ -419,10 +498,11 @@ endif () endif () -find_package(Fontconfig) - -if (FONTCONFIG_FOUND) - SET_AND_EXPOSE_TO_BUILD(HAVE_FONTCONFIG 1) +if (ENABLE_TEST_SUPPORT) + find_package(Fontconfig) + if (FONTCONFIG_FOUND) + SET_AND_EXPOSE_TO_BUILD(HAVE_FONTCONFIG 1) + endif () endif () find_package(WebP) @@ -431,7 +511,6 @@ SET_AND_EXPOSE_TO_BUILD(USE_WEBP 1) endif () -set(REQUIRED_QT_VERSION 5.2.0) set(QT_REQUIRED_COMPONENTS Core Gui Network) # FIXME: Allow building w/o these components @@ -461,6 +540,33 @@ SET_AND_EXPOSE_TO_BUILD(HAVE_QTSENSORS 1) endif () +if (ENABLE_OPENGL) + # Note: Gui module is already found + # Warning: quotes are sinificant here! + if (NOT DEFINED Qt5Gui_OPENGL_IMPLEMENTATION OR "${Qt5Gui_OPENGL_IMPLEMENTATION}" STREQUAL "") + message(FATAL_ERROR "Qt with OpenGL support is required for ENABLE_OPENGL") + endif () + + SET_AND_EXPOSE_TO_BUILD(USE_TEXTURE_MAPPER_GL TRUE) + SET_AND_EXPOSE_TO_BUILD(ENABLE_GRAPHICS_CONTEXT_3D TRUE) + + if (WIN32) + include(CheckCXXSymbolExists) + set(CMAKE_REQUIRED_INCLUDES ${Qt5Gui_INCLUDE_DIRS}) + set(CMAKE_REQUIRED_FLAGS ${Qt5Gui_EXECUTABLE_COMPILE_FLAGS}) + check_cxx_symbol_exists(QT_OPENGL_DYNAMIC qopenglcontext.h HAVE_QT_OPENGL_DYNAMIC) + if (HAVE_QT_OPENGL_DYNAMIC) + set(Qt5Gui_OPENGL_IMPLEMENTATION DynamicGL) + endif () + unset(CMAKE_REQUIRED_INCLUDES) + unset(CMAKE_REQUIRED_FLAGS) + endif () + + message(STATUS "Qt OpenGL implementation: ${Qt5Gui_OPENGL_IMPLEMENTATION}") + message(STATUS "Qt OpenGL libraries: ${Qt5Gui_OPENGL_LIBRARIES}") + message(STATUS "Qt EGL libraries: ${Qt5Gui_EGL_LIBRARIES}") +endif () + if (ENABLE_PRINT_SUPPORT) list(APPEND QT_REQUIRED_COMPONENTS PrintSupport) SET_AND_EXPOSE_TO_BUILD(HAVE_QTPRINTSUPPORT 1) @@ -480,7 +586,7 @@ # Mach ports and Unix sockets are currently used by WK2, but their USE() values # affect building WorkQueue -if (APPLE) +if (APPLE AND NOT USE_UNIX_DOMAIN_SOCKETS) SET_AND_EXPOSE_TO_BUILD(USE_MACH_PORTS 1) # Qt-specific elseif (UNIX) SET_AND_EXPOSE_TO_BUILD(USE_UNIX_DOMAIN_SOCKETS 1) @@ -493,6 +599,12 @@ endif () find_package(Qt5 ${REQUIRED_QT_VERSION} REQUIRED COMPONENTS ${QT_REQUIRED_COMPONENTS}) + +CHECK_QT5_PRIVATE_INCLUDE_DIRS(Gui private/qhexstring_p.h) +if (ENABLE_WEBKIT2) + CHECK_QT5_PRIVATE_INCLUDE_DIRS(Quick private/qsgrendernode_p.h) +endif () + if (QT_STATIC_BUILD) foreach (qt_module ${QT_REQUIRED_COMPONENTS}) CONVERT_PRL_LIBS_TO_CMAKE(${qt_module}) @@ -549,6 +661,14 @@ endif () endif () +# Improvised backport of r222112 - not needed with current WebKit +# -Wexpansion-to-defined produces false positives with GCC but not Clang +# https://bugs.webkit.org/show_bug.cgi?id=167643#c13 +if (CMAKE_COMPILER_IS_GNUCXX AND (NOT CMAKE_CXX_COMPILER_VERSION VERSION_LESS "7.0.0")) + set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -Wno-expansion-to-defined") + set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -Wno-expansion-to-defined") +endif () + if (WIN32 AND COMPILER_IS_GCC_OR_CLANG) set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -fno-keep-inline-dllexport") endif () @@ -597,22 +717,8 @@ endif () endif () -if (ENABLE_OPENGL) - SET_AND_EXPOSE_TO_BUILD(USE_TEXTURE_MAPPER_GL TRUE) - SET_AND_EXPOSE_TO_BUILD(ENABLE_GRAPHICS_CONTEXT_3D TRUE) - - # TODO: Add proper support of DynamicGL detection to Qt and use it - if (WIN32) - if (QT_USES_GLES2_ONLY) - # FIXME: Fix build with ANGLE-only Qt - message(FATAL_ERROR "Only dynamic GL is supported on Windows at the moment") - else () - set(Qt5Gui_OPENGL_IMPLEMENTATION GL) - endif () - endif () -endif () - if (NOT ENABLE_VIDEO) + set(USE_MEDIA_FOUNDATION OFF) set(USE_QT_MULTIMEDIA OFF) if (NOT ENABLE_WEB_AUDIO) @@ -678,6 +784,15 @@ endif () endif () +if (USE_WOFF2) + find_package(WOFF2Dec 1.0.1) + if (WOFF2DEC_FOUND) + message(STATUS "Using system WOFF2Dec library.") + else () + message(STATUS "WOFF2Dec not found, using the bundled library.") + endif () +endif () + # From OptionsGTK.cmake if (CMAKE_MAJOR_VERSION LESS 3) # Before CMake 3 it was necessary to use a build script instead of using cmake --build directly @@ -800,7 +915,7 @@ endif () if (NOT QT_CONAN_DIR) - set(ICU_LIBRARIES icuuc${CMAKE_DEBUG_POSTFIX} icuin${CMAKE_DEBUG_POSTFIX} icudt${CMAKE_DEBUG_POSTFIX}) + set(ICU_LIBRARIES ${ICU_LIBRARY_PREFIX}icuuc${CMAKE_DEBUG_POSTFIX} ${ICU_LIBRARY_PREFIX}icuin${CMAKE_DEBUG_POSTFIX} ${ICU_LIBRARY_PREFIX}icudt${CMAKE_DEBUG_POSTFIX}) endif () endif () diff -Nuar a/Source/cmake/OptionsWin.cmake b/Source/cmake/OptionsWin.cmake --- a/Source/cmake/OptionsWin.cmake 2017-06-04 23:16:07.000000000 +0300 +++ b/Source/cmake/OptionsWin.cmake 2019-06-10 00:48:46.000000000 +0300 @@ -128,6 +128,9 @@ /wd6255 /wd6387 ) + # Eliminate C2139 errors + add_compile_options(/D_ENABLE_EXTENDED_ALIGNED_STORAGE) + # Create pdb files for debugging purposes, also for Release builds add_compile_options(/Zi /GS) diff -Nuar a/Source/cmake/WebKitCommon.cmake b/Source/cmake/WebKitCommon.cmake --- a/Source/cmake/WebKitCommon.cmake 2017-06-04 23:16:07.000000000 +0300 +++ b/Source/cmake/WebKitCommon.cmake 2019-06-10 00:48:46.000000000 +0300 @@ -25,6 +25,9 @@ find_package(Perl 5.10.0 REQUIRED) find_package(PythonInterp 2.7.0 REQUIRED) + if (PYTHON_VERSION_MAJOR GREATER 2) + message(FATAL_ERROR "Python 2 is required, but Python ${PYTHON_VERSION_MAJOR} was found.") + endif () # We cannot check for RUBY_FOUND because it is set only when the full package is installed and # the only thing we need is the interpreter. Unlike Python, cmake does not provide a macro @@ -38,6 +41,9 @@ # Helper macros and feature defines # ----------------------------------------------------------------------------- + # To prevent multiple inclusion, most modules should be included once here. + include(CheckFunctionExists) + include(WebKitMacros) include(WebKitFS) include(WebKitHelpers) diff -Nuar a/Source/cmake/WebKitFeatures.cmake b/Source/cmake/WebKitFeatures.cmake --- a/Source/cmake/WebKitFeatures.cmake 2017-06-04 23:16:07.000000000 +0300 +++ b/Source/cmake/WebKitFeatures.cmake 2019-06-10 00:48:46.000000000 +0300 @@ -101,7 +101,7 @@ WEBKIT_OPTION_DEFINE(ENABLE_DFG_JIT "Toggle data flow graph JIT tier" PRIVATE ON) WEBKIT_OPTION_DEFINE(ENABLE_DOM4_EVENTS_CONSTRUCTOR "Toggle DOM4 Events constructors" PRIVATE OFF) WEBKIT_OPTION_DEFINE(ENABLE_DOWNLOAD_ATTRIBUTE "Toggle download attribute support" PRIVATE OFF) - WEBKIT_OPTION_DEFINE(ENABLE_DRAG_SUPPORT "Toggle Drag Support" PRIVATE OFF) + WEBKIT_OPTION_DEFINE(ENABLE_DRAG_SUPPORT "Toggle support of drag actions (including selection of text with mouse)" PRIVATE OFF) WEBKIT_OPTION_DEFINE(ENABLE_ENCRYPTED_MEDIA "Toggle EME support" PRIVATE OFF) WEBKIT_OPTION_DEFINE(ENABLE_ENCRYPTED_MEDIA_V2 "Support EME v2" PRIVATE OFF) WEBKIT_OPTION_DEFINE(ENABLE_ES6_ARROWFUNCTION_SYNTAX "Toggle ES6 arrow function syntax support" PRIVATE ON) diff -Nuar a/Source/cmake/WebKitMacros.cmake b/Source/cmake/WebKitMacros.cmake --- a/Source/cmake/WebKitMacros.cmake 2017-06-16 02:36:48.000000000 +0300 +++ b/Source/cmake/WebKitMacros.cmake 2019-06-10 00:48:46.000000000 +0300 @@ -373,26 +373,20 @@ WORKING_DIRECTORY ${WEBKIT2_DIR} VERBATIM) + if (${PORT} STREQUAL "Qt") + set_property(SOURCE ${DERIVED_SOURCES_WEBKIT2_DIR}/${_name}MessageReceiver.cpp PROPERTY SKIP_AUTOMOC ON) + endif () + list(APPEND ${_output_source} ${DERIVED_SOURCES_WEBKIT2_DIR}/${_name}MessageReceiver.cpp) endforeach () endmacro() -macro(MAKE_JS_FILE_ARRAYS _output_cpp _output_h _scripts _scripts_dependencies) - if (NOT CMAKE_VERSION VERSION_LESS 3.1) - set(_python_path ${CMAKE_COMMAND} -E env "PYTHONPATH=${JavaScriptCore_SCRIPTS_DIR}") - elseif (WIN32) - set(_python_path set "PYTHONPATH=${JavaScriptCore_SCRIPTS_DIR}" &&) - else () - set(_python_path "PYTHONPATH=${JavaScriptCore_SCRIPTS_DIR}") - endif () - +macro(MAKE_JS_FILE_ARRAYS _output_cpp _output_h _namespace _scripts _scripts_dependencies) add_custom_command( OUTPUT ${_output_h} ${_output_cpp} - MAIN_DEPENDENCY ${WEBCORE_DIR}/Scripts/make-js-file-arrays.py - DEPENDS ${${_scripts}} - COMMAND ${_python_path} ${PYTHON_EXECUTABLE} ${WEBCORE_DIR}/Scripts/make-js-file-arrays.py ${_output_h} ${_output_cpp} ${${_scripts}} + DEPENDS ${JavaScriptCore_SCRIPTS_DIR}/make-js-file-arrays.py ${${_scripts}} + COMMAND ${PYTHON_EXECUTABLE} ${JavaScriptCore_SCRIPTS_DIR}/make-js-file-arrays.py -n ${_namespace} ${_output_h} ${_output_cpp} ${${_scripts}} VERBATIM) - list(APPEND WebCore_DERIVED_SOURCES ${_output_cpp}) ADD_SOURCE_DEPENDENCIES(${${_scripts_dependencies}} ${_output_h} ${_output_cpp}) endmacro() diff -Nuar a/Source/CMakeLists.txt b/Source/CMakeLists.txt --- a/Source/CMakeLists.txt 2017-06-04 23:16:05.000000000 +0300 +++ b/Source/CMakeLists.txt 2019-06-10 00:48:46.000000000 +0300 @@ -19,7 +19,7 @@ add_subdirectory(ThirdParty/gtest) endif () -if (USE_WOFF2) +if (USE_WOFF2 AND NOT WOFF2DEC_FOUND) add_subdirectory(ThirdParty/brotli) add_subdirectory(ThirdParty/woff2) endif () diff -Nuar a/Source/JavaScriptCore/assembler/AbstractMacroAssembler.h b/Source/JavaScriptCore/assembler/AbstractMacroAssembler.h --- a/Source/JavaScriptCore/assembler/AbstractMacroAssembler.h 2017-06-04 23:16:05.000000000 +0300 +++ b/Source/JavaScriptCore/assembler/AbstractMacroAssembler.h 2019-06-10 00:48:46.000000000 +0300 @@ -58,6 +58,15 @@ #endif } +inline bool isMIPS() +{ +#if CPU(MIPS) + return true; +#else + return false; +#endif +} + inline bool isX86() { #if CPU(X86_64) || CPU(X86) @@ -86,6 +95,11 @@ return isARM64() && Options::useArchitectureSpecificOptimizations(); } +inline bool optimizeForMIPS() +{ + return isMIPS() && Options::useArchitectureSpecificOptimizations(); +} + inline bool optimizeForX86() { return isX86() && Options::useArchitectureSpecificOptimizations(); diff -Nuar a/Source/JavaScriptCore/assembler/MacroAssemblerMIPS.h b/Source/JavaScriptCore/assembler/MacroAssemblerMIPS.h --- a/Source/JavaScriptCore/assembler/MacroAssemblerMIPS.h 2017-06-04 23:16:05.000000000 +0300 +++ b/Source/JavaScriptCore/assembler/MacroAssemblerMIPS.h 2019-06-10 00:48:46.000000000 +0300 @@ -816,7 +816,53 @@ void load16Unaligned(BaseIndex address, RegisterID dest) { - load16(address, dest); + if (address.offset >= -32768 && address.offset <= 32767 && !m_fixedWidth) { + /* + sll addrtemp, address.index, address.scale + addu addrtemp, addrtemp, address.base + lbu immTemp, address.offset+x(addrtemp) (x=0 for LE, x=1 for BE) + lbu dest, address.offset+x(addrtemp) (x=1 for LE, x=0 for BE) + sll dest, dest, 8 + or dest, dest, immTemp + */ + m_assembler.sll(addrTempRegister, address.index, address.scale); + m_assembler.addu(addrTempRegister, addrTempRegister, address.base); +#if CPU(BIG_ENDIAN) + m_assembler.lbu(immTempRegister, addrTempRegister, address.offset + 1); + m_assembler.lbu(dest, addrTempRegister, address.offset); +#else + m_assembler.lbu(immTempRegister, addrTempRegister, address.offset); + m_assembler.lbu(dest, addrTempRegister, address.offset + 1); +#endif + m_assembler.sll(dest, dest, 8); + m_assembler.orInsn(dest, dest, immTempRegister); + } else { + /* + sll addrTemp, address.index, address.scale + addu addrTemp, addrTemp, address.base + lui immTemp, address.offset >> 16 + ori immTemp, immTemp, address.offset & 0xffff + addu addrTemp, addrTemp, immTemp + lbu immTemp, x(addrtemp) (x=0 for LE, x=1 for BE) + lbu dest, x(addrtemp) (x=1 for LE, x=0 for BE) + sll dest, dest, 8 + or dest, dest, immTemp + */ + m_assembler.sll(addrTempRegister, address.index, address.scale); + m_assembler.addu(addrTempRegister, addrTempRegister, address.base); + m_assembler.lui(immTempRegister, address.offset >> 16); + m_assembler.ori(immTempRegister, immTempRegister, address.offset); + m_assembler.addu(addrTempRegister, addrTempRegister, immTempRegister); +#if CPU(BIG_ENDIAN) + m_assembler.lbu(immTempRegister, addrTempRegister, 1); + m_assembler.lbu(dest, addrTempRegister, 0); +#else + m_assembler.lbu(immTempRegister, addrTempRegister, 0); + m_assembler.lbu(dest, addrTempRegister, 1); +#endif + m_assembler.sll(dest, dest, 8); + m_assembler.orInsn(dest, dest, immTempRegister); + } } void load32WithUnalignedHalfWords(BaseIndex address, RegisterID dest) @@ -2645,8 +2691,6 @@ Jump branchEqual(RegisterID rs, RegisterID rt) { - m_assembler.nop(); - m_assembler.nop(); m_assembler.appendJump(); m_assembler.beq(rs, rt, 0); m_assembler.nop(); @@ -2656,8 +2700,6 @@ Jump branchNotEqual(RegisterID rs, RegisterID rt) { - m_assembler.nop(); - m_assembler.nop(); m_assembler.appendJump(); m_assembler.bne(rs, rt, 0); m_assembler.nop(); diff -Nuar a/Source/JavaScriptCore/assembler/MIPSAssembler.h b/Source/JavaScriptCore/assembler/MIPSAssembler.h --- a/Source/JavaScriptCore/assembler/MIPSAssembler.h 2017-06-04 23:16:05.000000000 +0300 +++ b/Source/JavaScriptCore/assembler/MIPSAssembler.h 2019-06-10 00:48:46.000000000 +0300 @@ -733,35 +733,6 @@ // writable region of memory; to modify the code in an execute-only execuable // pool the 'repatch' and 'relink' methods should be used. - static size_t linkDirectJump(void* code, void* to) - { - MIPSWord* insn = reinterpret_cast(reinterpret_cast(code)); - size_t ops = 0; - int32_t slotAddr = reinterpret_cast(insn) + 4; - int32_t toAddr = reinterpret_cast(to); - - if ((slotAddr & 0xf0000000) != (toAddr & 0xf0000000)) { - // lui - *insn = 0x3c000000 | (MIPSRegisters::t9 << OP_SH_RT) | ((toAddr >> 16) & 0xffff); - ++insn; - // ori - *insn = 0x34000000 | (MIPSRegisters::t9 << OP_SH_RT) | (MIPSRegisters::t9 << OP_SH_RS) | (toAddr & 0xffff); - ++insn; - // jr - *insn = 0x00000008 | (MIPSRegisters::t9 << OP_SH_RS); - ++insn; - ops = 4 * sizeof(MIPSWord); - } else { - // j - *insn = 0x08000000 | ((toAddr & 0x0fffffff) >> 2); - ++insn; - ops = 2 * sizeof(MIPSWord); - } - // nop - *insn = 0x00000000; - return ops; - } - void linkJump(AssemblerLabel from, AssemblerLabel to) { ASSERT(to.isSet()); @@ -881,34 +852,42 @@ static ptrdiff_t maxJumpReplacementSize() { - return sizeof(MIPSWord) * 4; + return sizeof(MIPSWord) * 2; } static void revertJumpToMove(void* instructionStart, RegisterID rt, int imm) { MIPSWord* insn = static_cast(instructionStart); - size_t codeSize = 2 * sizeof(MIPSWord); // lui *insn = 0x3c000000 | (rt << OP_SH_RT) | ((imm >> 16) & 0xffff); ++insn; // ori *insn = 0x34000000 | (rt << OP_SH_RS) | (rt << OP_SH_RT) | (imm & 0xffff); - ++insn; - // if jr $t9 - if (*insn == 0x03200008) { - *insn = 0x00000000; - codeSize += sizeof(MIPSWord); - } - cacheFlush(insn, codeSize); + cacheFlush(insn, 2 * sizeof(MIPSWord)); + } + + static bool canJumpWithJ(void* instructionStart, void* to) + { + intptr_t slotAddr = reinterpret_cast(instructionStart) + 4; + intptr_t toAddr = reinterpret_cast(to); + return (slotAddr & 0xf0000000) == (toAddr & 0xf0000000); } static void replaceWithJump(void* instructionStart, void* to) { ASSERT(!(bitwise_cast(instructionStart) & 3)); ASSERT(!(bitwise_cast(to) & 3)); - size_t ops = linkDirectJump(instructionStart, to); - cacheFlush(instructionStart, ops); + ASSERT(canJumpWithJ(instructionStart, to)); + MIPSWord* insn = reinterpret_cast(instructionStart); + int32_t toAddr = reinterpret_cast(to); + + // j + *insn = 0x08000000 | ((toAddr & 0x0fffffff) >> 2); + ++insn; + // nop + *insn = 0x00000000; + cacheFlush(instructionStart, 2 * sizeof(MIPSWord)); } static void replaceWithLoad(void* instructionStart) diff -Nuar a/Source/JavaScriptCore/bytecode/Opcode.cpp b/Source/JavaScriptCore/bytecode/Opcode.cpp --- a/Source/JavaScriptCore/bytecode/Opcode.cpp 2017-06-04 23:16:05.000000000 +0300 +++ b/Source/JavaScriptCore/bytecode/Opcode.cpp 2019-06-10 00:48:46.000000000 +0300 @@ -49,6 +49,18 @@ #if ENABLE(OPCODE_STATS) +inline const char* padOpcodeName(OpcodeID op, unsigned width) +{ + auto padding = " "; + auto paddingLength = strlen(padding); + auto opcodeNameLength = strlen(opcodeNames[op]); + if (opcodeNameLength >= width) + return ""; + if (paddingLength + opcodeNameLength < width) + return padding; + return &padding[paddingLength + opcodeNameLength - width]; +} + long long OpcodeStats::opcodeCounts[numOpcodeIDs]; long long OpcodeStats::opcodePairCounts[numOpcodeIDs][numOpcodeIDs]; int OpcodeStats::lastOpcode = -1; @@ -80,9 +92,9 @@ static int compareOpcodePairIndices(const void* left, const void* right) { - std::pair leftPair = *(pair*) left; + std::pair leftPair = *(std::pair*) left; long long leftValue = OpcodeStats::opcodePairCounts[leftPair.first][leftPair.second]; - std::pair rightPair = *(pair*) right; + std::pair rightPair = *(std::pair*) right; long long rightValue = OpcodeStats::opcodePairCounts[rightPair.first][rightPair.second]; if (leftValue < rightValue) diff -Nuar a/Source/JavaScriptCore/bytecode/Opcode.h b/Source/JavaScriptCore/bytecode/Opcode.h --- a/Source/JavaScriptCore/bytecode/Opcode.h 2017-06-04 23:16:05.000000000 +0300 +++ b/Source/JavaScriptCore/bytecode/Opcode.h 2019-06-10 00:48:46.000000000 +0300 @@ -85,21 +85,8 @@ typedef OpcodeID Opcode; #endif -#define PADDING_STRING " " -#define PADDING_STRING_LENGTH static_cast(strlen(PADDING_STRING)) - extern const char* const opcodeNames[]; -inline const char* padOpcodeName(OpcodeID op, unsigned width) -{ - unsigned pad = width - strlen(opcodeNames[op]); - pad = std::min(pad, PADDING_STRING_LENGTH); - return PADDING_STRING + PADDING_STRING_LENGTH - pad; -} - -#undef PADDING_STRING_LENGTH -#undef PADDING_STRING - #if ENABLE(OPCODE_STATS) struct OpcodeStats { diff -Nuar a/Source/JavaScriptCore/CMakeLists.txt b/Source/JavaScriptCore/CMakeLists.txt --- a/Source/JavaScriptCore/CMakeLists.txt 2017-06-04 23:16:05.000000000 +0300 +++ b/Source/JavaScriptCore/CMakeLists.txt 2019-06-10 00:48:46.000000000 +0300 @@ -388,7 +388,6 @@ disassembler/udis86/udis86.c disassembler/udis86/udis86_decode.c - disassembler/udis86/udis86_input.c disassembler/udis86/udis86_itab_holder.c disassembler/udis86/udis86_syn-att.c disassembler/udis86/udis86_syn-intel.c @@ -909,14 +908,13 @@ set(UDIS_GEN_DEP disassembler/udis86/ud_opcode.py - disassembler/udis86/ud_optable.py ) add_custom_command( OUTPUT ${DERIVED_SOURCES_JAVASCRIPTCORE_DIR}/udis86_itab.c ${DERIVED_SOURCES_JAVASCRIPTCORE_DIR}/udis86_itab.h DEPENDS ${UDIS_GEN_DEP} WORKING_DIRECTORY ${DERIVED_SOURCES_JAVASCRIPTCORE_DIR} - COMMAND ${PYTHON_EXECUTABLE} ${JAVASCRIPTCORE_DIR}/disassembler/udis86/itab.py ${JAVASCRIPTCORE_DIR}/disassembler/udis86/optable.xml + COMMAND ${PYTHON_EXECUTABLE} ${JAVASCRIPTCORE_DIR}/disassembler/udis86/ud_itab.py ${JAVASCRIPTCORE_DIR}/disassembler/udis86/optable.xml ${DERIVED_SOURCES_JAVASCRIPTCORE_DIR} VERBATIM) list(APPEND JavaScriptCore_HEADERS @@ -1279,6 +1277,7 @@ if (WTF_CPU_ARM) elseif (WTF_CPU_ARM64) +elseif (WTF_CPU_ALPHA) elseif (WTF_CPU_HPPA) elseif (WTF_CPU_PPC) elseif (WTF_CPU_PPC64) diff -Nuar a/Source/JavaScriptCore/DerivedSources.make b/Source/JavaScriptCore/DerivedSources.make --- a/Source/JavaScriptCore/DerivedSources.make 2017-06-04 23:16:05.000000000 +0300 +++ b/Source/JavaScriptCore/DerivedSources.make 2019-06-10 00:48:46.000000000 +0300 @@ -171,8 +171,8 @@ # udis86 instruction tables -udis86_itab.h: $(JavaScriptCore)/disassembler/udis86/itab.py $(JavaScriptCore)/disassembler/udis86/optable.xml - $(PYTHON) $(JavaScriptCore)/disassembler/udis86/itab.py $(JavaScriptCore)/disassembler/udis86/optable.xml +udis86_itab.h: $(JavaScriptCore)/disassembler/udis86/ud_itab.py $(JavaScriptCore)/disassembler/udis86/optable.xml + $(PYTHON) $(JavaScriptCore)/disassembler/udis86/ud_itab.py $(JavaScriptCore)/disassembler/udis86/optable.xml . # Bytecode files diff -Nuar a/Source/JavaScriptCore/dfg/DFGFixupPhase.cpp b/Source/JavaScriptCore/dfg/DFGFixupPhase.cpp --- a/Source/JavaScriptCore/dfg/DFGFixupPhase.cpp 2017-06-04 23:16:05.000000000 +0300 +++ b/Source/JavaScriptCore/dfg/DFGFixupPhase.cpp 2019-06-10 00:48:46.000000000 +0300 @@ -282,7 +282,7 @@ break; } if (m_graph.binaryArithShouldSpeculateInt32(node, FixupPass)) { - if (optimizeForX86() || optimizeForARM64() || optimizeForARMv7IDIVSupported()) { + if (optimizeForX86() || optimizeForARM64() || optimizeForARMv7IDIVSupported() || optimizeForMIPS()) { fixIntOrBooleanEdge(leftChild); fixIntOrBooleanEdge(rightChild); if (bytecodeCanTruncateInteger(node->arithNodeFlags())) diff -Nuar a/Source/JavaScriptCore/dfg/DFGSpeculativeJIT.cpp b/Source/JavaScriptCore/dfg/DFGSpeculativeJIT.cpp --- a/Source/JavaScriptCore/dfg/DFGSpeculativeJIT.cpp 2017-06-04 23:16:05.000000000 +0300 +++ b/Source/JavaScriptCore/dfg/DFGSpeculativeJIT.cpp 2019-06-10 00:48:46.000000000 +0300 @@ -4014,6 +4014,46 @@ } int32Result(quotient.gpr(), node); +#elif CPU(MIPS) + SpeculateInt32Operand op1(this, node->child1()); + SpeculateInt32Operand op2(this, node->child2()); + GPRTemporary quotient(this); + GPRReg op1GPR = op1.gpr(); + GPRReg op2GPR = op2.gpr(); + GPRReg quotientGPR = quotient.gpr(); + JITCompiler::Jump done; + + // If the user cares about negative zero, then speculate that we're not about + // to produce negative zero. + if (!bytecodeCanIgnoreNegativeZero(node->arithNodeFlags())) { + MacroAssembler::Jump numeratorNonZero = m_jit.branchTest32(MacroAssembler::NonZero, op1GPR); + speculationCheck(NegativeZero, JSValueRegs(), 0, m_jit.branch32(MacroAssembler::LessThan, op2GPR, TrustedImm32(0))); + numeratorNonZero.link(&m_jit); + } + + if (bytecodeUsesAsNumber(node->arithNodeFlags())) { + speculationCheck(Overflow, JSValueRegs(), 0, m_jit.branchTest32(JITCompiler::Zero, op2GPR)); + speculationCheck(Overflow, JSValueRegs(), 0, m_jit.branch32(JITCompiler::Equal, op1GPR, TrustedImm32(-2147483647-1))); + } else { + JITCompiler::Jump notZero = m_jit.branchTest32(JITCompiler::NonZero, op2GPR); + m_jit.move(TrustedImm32(0), quotientGPR); + done = m_jit.jump(); + notZero.link(&m_jit); + } + + m_jit.assembler().div(op1GPR, op2GPR); + m_jit.assembler().mflo(quotientGPR); + + // Check that there was no remainder. If there had been, then we'd be obligated to + // produce a double result instead. + if (bytecodeUsesAsNumber(node->arithNodeFlags())) { + GPRTemporary remainder(this); + m_jit.assembler().mfhi(remainder.gpr()); + speculationCheck(Overflow, JSValueRegs(), 0, m_jit.branchTest32(MacroAssembler::NonZero, remainder.gpr())); + } else + done.link(&m_jit); + + int32Result(quotientGPR, node); #else RELEASE_ASSERT_NOT_REACHED(); #endif @@ -4394,6 +4434,24 @@ done.link(&m_jit); int32Result(quotientThenRemainderGPR, node); +#elif CPU(MIPS) + GPRTemporary remainder(this); + GPRReg dividendGPR = op1.gpr(); + GPRReg divisorGPR = op2.gpr(); + GPRReg remainderGPR = remainder.gpr(); + + speculationCheck(Overflow, JSValueRegs(), 0, m_jit.branch32(JITCompiler::Equal, dividendGPR, TrustedImm32(-2147483647-1))); + m_jit.assembler().div(dividendGPR, divisorGPR); + m_jit.assembler().mfhi(remainderGPR); + + if (!bytecodeCanIgnoreNegativeZero(node->arithNodeFlags())) { + // Check that we're not about to create negative zero. + JITCompiler::Jump numeratorPositive = m_jit.branch32(JITCompiler::GreaterThanOrEqual, dividendGPR, TrustedImm32(0)); + speculationCheck(NegativeZero, JSValueRegs(), 0, m_jit.branchTest32(JITCompiler::Zero, remainderGPR)); + numeratorPositive.link(&m_jit); + } + + int32Result(remainderGPR, node); #else // not architecture that can do integer division RELEASE_ASSERT_NOT_REACHED(); #endif diff -Nuar a/Source/JavaScriptCore/disassembler/udis86/differences.txt b/Source/JavaScriptCore/disassembler/udis86/differences.txt --- a/Source/JavaScriptCore/disassembler/udis86/differences.txt 2016-05-21 18:54:11.000000000 +0300 +++ b/Source/JavaScriptCore/disassembler/udis86/differences.txt 2019-06-10 00:48:46.000000000 +0300 @@ -5,20 +5,5 @@ - assert() has been changed to ASSERT() -- Mass rename of udis86_input.h inp_ prefixed functions and macros to ud_inp_ to - avoid namespace pollution. - -- Removal of KERNEL checks. - -- Added #include of udis86_extern.h in udis86_decode.c. - -- Removed s_ie__pause and s_ie__nop from udis86_decode.c, since they weren't used. - -- Made udis86_syn.h use WTF_ATTRIBUTE_PRINTF. This required making a bunch of little - fixes to make the compiler's format string warnings go away. - -- Made the code in udis86_syn.h use vsnprintf() instead of vsprintf(). - - Fixed udis86_syn-att.c's jump destination printing to work correctly in 64-bit mode. -- Add --outputDir option to itab.py. diff -Nuar a/Source/JavaScriptCore/disassembler/udis86/itab.py b/Source/JavaScriptCore/disassembler/udis86/itab.py --- a/Source/JavaScriptCore/disassembler/udis86/itab.py 2017-06-04 23:16:05.000000000 +0300 +++ b/Source/JavaScriptCore/disassembler/udis86/itab.py 1970-01-01 02:00:00.000000000 +0200 @@ -1,360 +0,0 @@ -# udis86 - scripts/itab.py -# -# Copyright (c) 2009 Vivek Thampi -# All rights reserved. -# -# Redistribution and use in source and binary forms, with or without modification, -# are permitted provided that the following conditions are met: -# -# * Redistributions of source code must retain the above copyright notice, -# this list of conditions and the following disclaimer. -# * Redistributions in binary form must reproduce the above copyright notice, -# this list of conditions and the following disclaimer in the documentation -# and/or other materials provided with the distribution. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -# ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -# ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - -from optparse import OptionParser -import os -import sys - -sys.path.append( '../scripts' ); - -import ud_optable -import ud_opcode - -class UdItabGenerator( ud_opcode.UdOpcodeTables ): - - OperandDict = { - "Ap" : [ "OP_A" , "SZ_P" ], - "E" : [ "OP_E" , "SZ_NA" ], - "Eb" : [ "OP_E" , "SZ_B" ], - "Ew" : [ "OP_E" , "SZ_W" ], - "Ev" : [ "OP_E" , "SZ_V" ], - "Ed" : [ "OP_E" , "SZ_D" ], - "Eq" : [ "OP_E" , "SZ_Q" ], - "Ez" : [ "OP_E" , "SZ_Z" ], - "Ex" : [ "OP_E" , "SZ_MDQ" ], - "Ep" : [ "OP_E" , "SZ_P" ], - "G" : [ "OP_G" , "SZ_NA" ], - "Gb" : [ "OP_G" , "SZ_B" ], - "Gw" : [ "OP_G" , "SZ_W" ], - "Gv" : [ "OP_G" , "SZ_V" ], - "Gy" : [ "OP_G" , "SZ_MDQ" ], - "Gy" : [ "OP_G" , "SZ_MDQ" ], - "Gd" : [ "OP_G" , "SZ_D" ], - "Gq" : [ "OP_G" , "SZ_Q" ], - "Gx" : [ "OP_G" , "SZ_MDQ" ], - "Gz" : [ "OP_G" , "SZ_Z" ], - "M" : [ "OP_M" , "SZ_NA" ], - "Mb" : [ "OP_M" , "SZ_B" ], - "Mw" : [ "OP_M" , "SZ_W" ], - "Ms" : [ "OP_M" , "SZ_W" ], - "Md" : [ "OP_M" , "SZ_D" ], - "Mq" : [ "OP_M" , "SZ_Q" ], - "Mt" : [ "OP_M" , "SZ_T" ], - "Mo" : [ "OP_M" , "SZ_O" ], - "MwRv" : [ "OP_MR" , "SZ_WV" ], - "MdRy" : [ "OP_MR" , "SZ_DY" ], - "MbRv" : [ "OP_MR" , "SZ_BV" ], - "I1" : [ "OP_I1" , "SZ_NA" ], - "I3" : [ "OP_I3" , "SZ_NA" ], - "Ib" : [ "OP_I" , "SZ_B" ], - "Isb" : [ "OP_I" , "SZ_SB" ], - "Iw" : [ "OP_I" , "SZ_W" ], - "Iv" : [ "OP_I" , "SZ_V" ], - "Iz" : [ "OP_I" , "SZ_Z" ], - "Jv" : [ "OP_J" , "SZ_V" ], - "Jz" : [ "OP_J" , "SZ_Z" ], - "Jb" : [ "OP_J" , "SZ_B" ], - "R" : [ "OP_R" , "SZ_RDQ" ], - "C" : [ "OP_C" , "SZ_NA" ], - "D" : [ "OP_D" , "SZ_NA" ], - "S" : [ "OP_S" , "SZ_NA" ], - "Ob" : [ "OP_O" , "SZ_B" ], - "Ow" : [ "OP_O" , "SZ_W" ], - "Ov" : [ "OP_O" , "SZ_V" ], - "V" : [ "OP_V" , "SZ_O" ], - "W" : [ "OP_W" , "SZ_O" ], - "Wsd" : [ "OP_W" , "SZ_O" ], - "Wss" : [ "OP_W" , "SZ_O" ], - "P" : [ "OP_P" , "SZ_Q" ], - "Q" : [ "OP_Q" , "SZ_Q" ], - "VR" : [ "OP_VR" , "SZ_O" ], - "PR" : [ "OP_PR" , "SZ_Q" ], - "AL" : [ "OP_AL" , "SZ_NA" ], - "CL" : [ "OP_CL" , "SZ_NA" ], - "DL" : [ "OP_DL" , "SZ_NA" ], - "BL" : [ "OP_BL" , "SZ_NA" ], - "AH" : [ "OP_AH" , "SZ_NA" ], - "CH" : [ "OP_CH" , "SZ_NA" ], - "DH" : [ "OP_DH" , "SZ_NA" ], - "BH" : [ "OP_BH" , "SZ_NA" ], - "AX" : [ "OP_AX" , "SZ_NA" ], - "CX" : [ "OP_CX" , "SZ_NA" ], - "DX" : [ "OP_DX" , "SZ_NA" ], - "BX" : [ "OP_BX" , "SZ_NA" ], - "SI" : [ "OP_SI" , "SZ_NA" ], - "DI" : [ "OP_DI" , "SZ_NA" ], - "SP" : [ "OP_SP" , "SZ_NA" ], - "BP" : [ "OP_BP" , "SZ_NA" ], - "eAX" : [ "OP_eAX" , "SZ_NA" ], - "eCX" : [ "OP_eCX" , "SZ_NA" ], - "eDX" : [ "OP_eDX" , "SZ_NA" ], - "eBX" : [ "OP_eBX" , "SZ_NA" ], - "eSI" : [ "OP_eSI" , "SZ_NA" ], - "eDI" : [ "OP_eDI" , "SZ_NA" ], - "eSP" : [ "OP_eSP" , "SZ_NA" ], - "eBP" : [ "OP_eBP" , "SZ_NA" ], - "rAX" : [ "OP_rAX" , "SZ_NA" ], - "rCX" : [ "OP_rCX" , "SZ_NA" ], - "rBX" : [ "OP_rBX" , "SZ_NA" ], - "rDX" : [ "OP_rDX" , "SZ_NA" ], - "rSI" : [ "OP_rSI" , "SZ_NA" ], - "rDI" : [ "OP_rDI" , "SZ_NA" ], - "rSP" : [ "OP_rSP" , "SZ_NA" ], - "rBP" : [ "OP_rBP" , "SZ_NA" ], - "ES" : [ "OP_ES" , "SZ_NA" ], - "CS" : [ "OP_CS" , "SZ_NA" ], - "DS" : [ "OP_DS" , "SZ_NA" ], - "SS" : [ "OP_SS" , "SZ_NA" ], - "GS" : [ "OP_GS" , "SZ_NA" ], - "FS" : [ "OP_FS" , "SZ_NA" ], - "ST0" : [ "OP_ST0" , "SZ_NA" ], - "ST1" : [ "OP_ST1" , "SZ_NA" ], - "ST2" : [ "OP_ST2" , "SZ_NA" ], - "ST3" : [ "OP_ST3" , "SZ_NA" ], - "ST4" : [ "OP_ST4" , "SZ_NA" ], - "ST5" : [ "OP_ST5" , "SZ_NA" ], - "ST6" : [ "OP_ST6" , "SZ_NA" ], - "ST7" : [ "OP_ST7" , "SZ_NA" ], - "NONE" : [ "OP_NONE" , "SZ_NA" ], - "ALr8b" : [ "OP_ALr8b" , "SZ_NA" ], - "CLr9b" : [ "OP_CLr9b" , "SZ_NA" ], - "DLr10b" : [ "OP_DLr10b" , "SZ_NA" ], - "BLr11b" : [ "OP_BLr11b" , "SZ_NA" ], - "AHr12b" : [ "OP_AHr12b" , "SZ_NA" ], - "CHr13b" : [ "OP_CHr13b" , "SZ_NA" ], - "DHr14b" : [ "OP_DHr14b" , "SZ_NA" ], - "BHr15b" : [ "OP_BHr15b" , "SZ_NA" ], - "rAXr8" : [ "OP_rAXr8" , "SZ_NA" ], - "rCXr9" : [ "OP_rCXr9" , "SZ_NA" ], - "rDXr10" : [ "OP_rDXr10" , "SZ_NA" ], - "rBXr11" : [ "OP_rBXr11" , "SZ_NA" ], - "rSPr12" : [ "OP_rSPr12" , "SZ_NA" ], - "rBPr13" : [ "OP_rBPr13" , "SZ_NA" ], - "rSIr14" : [ "OP_rSIr14" , "SZ_NA" ], - "rDIr15" : [ "OP_rDIr15" , "SZ_NA" ], - "jWP" : [ "OP_J" , "SZ_WP" ], - "jDP" : [ "OP_J" , "SZ_DP" ], - - } - - # - # opcode prefix dictionary - # - PrefixDict = { - "aso" : "P_aso", - "oso" : "P_oso", - "rexw" : "P_rexw", - "rexb" : "P_rexb", - "rexx" : "P_rexx", - "rexr" : "P_rexr", - "seg" : "P_seg", - "inv64" : "P_inv64", - "def64" : "P_def64", - "depM" : "P_depM", - "cast1" : "P_c1", - "cast2" : "P_c2", - "cast3" : "P_c3", - "cast" : "P_cast", - "sext" : "P_sext" - } - - InvalidEntryIdx = 0 - InvalidEntry = { 'type' : 'invalid', - 'mnemonic' : 'invalid', - 'operands' : '', - 'prefixes' : '', - 'meta' : '' } - - Itab = [] # instruction table - ItabIdx = 1 # instruction table index - GtabIdx = 0 # group table index - GtabMeta = [] - - ItabLookup = {} - - MnemonicAliases = ( "invalid", "3dnow", "none", "db", "pause" ) - - def __init__( self, outputDir ): - # first itab entry (0) is Invalid - self.Itab.append( self.InvalidEntry ) - self.MnemonicsTable.extend( self.MnemonicAliases ) - self.outputDir = outputDir - - def toGroupId( self, id ): - return 0x8000 | id - - def genLookupTable( self, table, scope = '' ): - idxArray = [ ] - ( tabIdx, self.GtabIdx ) = ( self.GtabIdx, self.GtabIdx + 1 ) - self.GtabMeta.append( { 'type' : table[ 'type' ], 'meta' : table[ 'meta' ] } ) - - for _idx in range( self.sizeOfTable( table[ 'type' ] ) ): - idx = "%02x" % _idx - - e = self.InvalidEntry - i = self.InvalidEntryIdx - - if idx in table[ 'entries' ].keys(): - e = table[ 'entries' ][ idx ] - - # leaf node (insn) - if e[ 'type' ] == 'insn': - ( i, self.ItabIdx ) = ( self.ItabIdx, self.ItabIdx + 1 ) - self.Itab.append( e ) - elif e[ 'type' ] != 'invalid': - i = self.genLookupTable( e, 'static' ) - - idxArray.append( i ) - - name = "ud_itab__%s" % tabIdx - self.ItabLookup[ tabIdx ] = name - - self.ItabC.write( "\n" ); - if len( scope ): - self.ItabC.write( scope + ' ' ) - self.ItabC.write( "const uint16_t %s[] = {\n" % name ) - for i in range( len( idxArray ) ): - if i > 0 and i % 4 == 0: - self.ItabC.write( "\n" ) - if ( i%4 == 0 ): - self.ItabC.write( " /* %2x */" % i) - if idxArray[ i ] >= 0x8000: - self.ItabC.write( "%12s," % ("GROUP(%d)" % ( ~0x8000 & idxArray[ i ] ))) - else: - self.ItabC.write( "%12d," % ( idxArray[ i ] )) - self.ItabC.write( "\n" ) - self.ItabC.write( "};\n" ) - - return self.toGroupId( tabIdx ) - - def genLookupTableList( self ): - self.ItabC.write( "\n\n" ); - self.ItabC.write( "struct ud_lookup_table_list_entry ud_lookup_table_list[] = {\n" ) - for i in range( len( self.GtabMeta ) ): - f0 = self.ItabLookup[ i ] + "," - f1 = ( self.nameOfTable( self.GtabMeta[ i ][ 'type' ] ) ) + "," - f2 = "\"%s\"" % self.GtabMeta[ i ][ 'meta' ] - self.ItabC.write( " /* %03d */ { %s %s %s },\n" % ( i, f0, f1, f2 ) ) - self.ItabC.write( "};" ) - - def genInsnTable( self ): - self.ItabC.write( "struct ud_itab_entry ud_itab[] = {\n" ); - idx = 0 - for e in self.Itab: - opr_c = [ "O_NONE", "O_NONE", "O_NONE" ] - pfx_c = [] - opr = e[ 'operands' ] - for i in range(len(opr)): - if not (opr[i] in self.OperandDict.keys()): - print("error: invalid operand declaration: %s\n" % opr[i]) - opr_c[i] = "O_" + opr[i] - opr = "%s %s %s" % (opr_c[0] + ",", opr_c[1] + ",", opr_c[2]) - - for p in e['prefixes']: - if not ( p in self.PrefixDict.keys() ): - print("error: invalid prefix specification: %s \n" % pfx) - pfx_c.append( self.PrefixDict[p] ) - if len(e['prefixes']) == 0: - pfx_c.append( "P_none" ) - pfx = "|".join( pfx_c ) - - self.ItabC.write( " /* %04d */ { UD_I%s %s, %s },\n" \ - % ( idx, e[ 'mnemonic' ] + ',', opr, pfx ) ) - idx += 1 - self.ItabC.write( "};\n" ) - - self.ItabC.write( "\n\n" ); - self.ItabC.write( "const char * ud_mnemonics_str[] = {\n" ) - self.ItabC.write( ",\n ".join( [ "\"%s\"" % m for m in self.MnemonicsTable ] ) ) - self.ItabC.write( "\n};\n" ) - - - def genItabH( self ): - self.ItabH = open( os.path.join(self.outputDir, "udis86_itab.h"), "w" ) - - # Generate Table Type Enumeration - self.ItabH.write( "#ifndef UD_ITAB_H\n" ) - self.ItabH.write( "#define UD_ITAB_H\n\n" ) - - # table type enumeration - self.ItabH.write( "/* ud_table_type -- lookup table types (see lookup.c) */\n" ) - self.ItabH.write( "enum ud_table_type {\n " ) - enum = [ self.TableInfo[ k ][ 'name' ] for k in self.TableInfo.keys() ] - self.ItabH.write( ",\n ".join( enum ) ) - self.ItabH.write( "\n};\n\n" ); - - # mnemonic enumeration - self.ItabH.write( "/* ud_mnemonic -- mnemonic constants */\n" ) - enum = "enum ud_mnemonic_code {\n " - enum += ",\n ".join( [ "UD_I%s" % m for m in self.MnemonicsTable ] ) - enum += "\n} UD_ATTR_PACKED;\n" - self.ItabH.write( enum ) - self.ItabH.write( "\n" ) - - self.ItabH.write("\n/* itab entry operand definitions */\n"); - operands = self.OperandDict.keys() - operands.sort() - for o in operands: - self.ItabH.write("#define O_%-7s { %-12s %-8s }\n" % - (o, self.OperandDict[o][0] + ",", self.OperandDict[o][1])); - self.ItabH.write("\n\n"); - - self.ItabH.write( "extern const char * ud_mnemonics_str[];\n" ) - - self.ItabH.write( "#define GROUP(n) (0x8000 | (n))" ) - - self.ItabH.write( "\n#endif /* UD_ITAB_H */\n" ) - - self.ItabH.close() - - - def genItabC( self ): - self.ItabC = open( os.path.join(self.outputDir, "udis86_itab.c"), "w" ) - self.ItabC.write( "/* itab.c -- generated by itab.py, do no edit" ) - self.ItabC.write( " */\n" ); - self.ItabC.write( "#include \"udis86_decode.h\"\n\n" ); - - self.genLookupTable( self.OpcodeTable0 ) - self.genLookupTableList() - self.genInsnTable() - - self.ItabC.close() - - def genItab( self ): - self.genItabC() - self.genItabH() - -def main(): - parser = OptionParser() - parser.add_option("--outputDir", dest="outputDir", default="") - options, args = parser.parse_args() - generator = UdItabGenerator(os.path.normpath(options.outputDir)) - optableXmlParser = ud_optable.UdOptableXmlParser() - optableXmlParser.parse( args[ 0 ], generator.addInsnDef ) - - generator.genItab() - -if __name__ == '__main__': - main() diff -Nuar a/Source/JavaScriptCore/disassembler/udis86/optable.xml b/Source/JavaScriptCore/disassembler/udis86/optable.xml --- a/Source/JavaScriptCore/disassembler/udis86/optable.xml 2016-05-21 18:54:11.000000000 +0300 +++ b/Source/JavaScriptCore/disassembler/udis86/optable.xml 2019-06-10 00:48:46.000000000 +0300 @@ -2,37 +2,132 @@ + + aaa - 37 - inv64 + 37 /m=!64 aad - d5 + d5 /m=!64 Ib - inv64 aam - d4 + d4 /m=!64 Ib - inv64 aas - 3f - inv64 + 3f /m=!64 @@ -65,8 +160,7 @@ oso rexw 15 - rAX Iz - sext + rAX sIz aso rexr rexx rexb @@ -75,21 +169,19 @@ aso rexr rexx rexb - 82 /reg=2 + 82 /reg=2 /m=!64 Eb Ib inv64 aso oso rexw rexr rexx rexb 81 /reg=2 - Ev Iz - sext + Ev sIz aso oso rexw rexr rexx rexb 83 /reg=2 - Ev Ib - sext + Ev sIb @@ -122,8 +214,7 @@ oso rexw 05 - rAX Iz - sext + rAX sIz aso rexr rexx rexb @@ -132,43 +223,39 @@ aso rexr rexx rexb - 82 /reg=0 + 82 /reg=0 /m=!64 Eb Ib inv64 aso oso rexw rexr rexx rexb 81 /reg=0 - Ev Iz - sext + Ev sIz aso oso rexw rexr rexx rexb 83 /reg=0 - Ev Ib - sext + Ev sIb - - addpd - aso rexr rexx rexb - sse66 0f 58 - V W + aso rexr rexx rexb vexl + /sse=66 0f 58 + V H W + sse2 avx addps - aso rexr rexx rexb + aso rexr rexx rexb vexl 0f 58 - V W + V H W + sse avx @@ -176,8 +263,9 @@ addsd aso rexr rexx rexb - ssef2 0f 58 - V W + /sse=f2 0f 58 + V H W + sse2 avx @@ -185,12 +273,94 @@ addss aso rexr rexx rexb - ssef3 0f 58 + /sse=f3 0f 58 + V H W + sse avx + + + + + addsubpd + + aso rexr rexx rexb + /sse=66 0f d0 + V H W + sse3 avx + + + + + addsubps + + aso rexr rexx rexb + /sse=f2 0f d0 + V H W + sse3 avx + + + + + aesdec + + aso rexr rexx rexb + /sse=66 0f 38 de + V H W + aesni avx + + + + + aesdeclast + + aso rexr rexx rexb + /sse=66 0f 38 df V W + aesni avx - + + aesenc + aesni + + aso rexr rexx rexb + /sse=66 0f 38 dc + V W + aesni avx + + + + + aesenclast + aesni avx + + aso rexr rexx rexb + /sse=66 0f 38 dd + V H W + + + + + aesimc + + aso rexr rexx rexb + /sse=66 0f 38 db + V W + aesni avx + + + + + aeskeygenassist + + aso rexr rexx rexb + /sse=66 0f 3a df + V W Ib + aesni avx + + + + and aso rexr rexx rexb @@ -219,8 +389,7 @@ oso rexw 25 - rAX Iz - sext + rAX sIz aso rexw rexr rexx rexb @@ -229,30 +398,29 @@ aso rexr rexx rexb - 82 /reg=4 + 82 /reg=4 /m=!64 Eb Ib inv64 aso oso rexw rexr rexx rexb 81 /reg=4 - Ev Iz - sext + Ev sIz aso oso rexw rexr rexx rexb 83 /reg=4 - Ev Ib - sext + Ev sIb andpd - aso rexr rexx rexb - sse66 0f 54 - V W + aso rexr rexx rexb vexl + /sse=66 0f 54 + V H W + sse2 avx @@ -261,7 +429,8 @@ aso rexr rexx rexb 0f 54 - V W + V H W + sse avx @@ -269,8 +438,9 @@ andnpd aso rexr rexx rexb - sse66 0f 55 - V W + /sse=66 0f 55 + V H W + sse2 avx @@ -279,7 +449,8 @@ aso rexr rexx rexb 0f 55 - V W + V H W + sse2 avx @@ -287,15 +458,8 @@ arpl aso - 63 /m=16 - Ew Gw - inv64 - - - aso - 63 /m=32 + 63 /m=!64 Ew Gw - inv64 @@ -304,150 +468,27 @@ aso oso rexw rexx rexr rexb 63 /m=64 - Gv Ed - - - - - bound - - aso oso - 62 - Gv M - inv64 - - - - - bsf - - aso oso rexw rexr rexx rexb - 0f bc - Gv Ev - - - - - bsr - - aso oso rexw rexr rexx rexb - 0f bd - Gv Ev - - - - - bswap - - oso rexw rexb - 0f c8 - rAXr8 - - - oso rexw rexb - 0f c9 - rCXr9 - - - oso rexw rexb - 0f ca - rDXr10 - - - oso rexw rexb - 0f cb - rBXr11 - - - oso rexw rexb - 0f cc - rSPr12 - - - oso rexw rexb - 0f cd - rBPr13 - - - oso rexw rexb - 0f ce - rSIr14 - - - oso rexw rexb - 0f cf - rDIr15 - - - - - bt - - aso oso rexw rexr rexx rexb - 0f ba /reg=4 - Ev Ib - - - aso oso rexw rexr rexx rexb - 0f a3 - Ev Gv - - - - - btc - - aso oso rexw rexr rexx rexb - 0f bb - Ev Gv - - - aso oso rexw rexr rexx rexb - 0f ba /reg=7 - Ev Ib - - - - - btr - - aso oso rexw rexr rexx rexb - 0f b3 - Ev Gv - - - aso oso rexw rexr rexx rexb - 0f ba /reg=6 - Ev Ib + Gq Ed - bts - - aso oso rexw rexr rexx rexb - 0f ab - Ev Gv - + call aso oso rexw rexr rexx rexb - 0f ba /reg=5 - Ev Ib + ff /reg=2 /m=!64 + Ev - - - - call aso oso rexw rexr rexx rexb - ff /reg=2 - Ev + ff /reg=2 /m=64 + Eq def64 aso oso rexw rexr rexx rexb ff /reg=3 - Ep + Fv oso @@ -457,9 +498,8 @@ oso - 9a - Ap - inv64 + 9a /m=!64 + Av @@ -712,7 +752,7 @@ oso rexw 3d - rAX Iz + rAX sIz aso rexr rexx rexb @@ -721,43 +761,46 @@ aso rexr rexx rexb - 82 /reg=7 + 82 /reg=7 /m=!64 Eb Ib inv64 aso oso rexw rexr rexx rexb 81 /reg=7 - Ev Iz + Ev sIz aso oso rexw rexr rexx rexb 83 /reg=7 - Ev Ib + Ev sIb cmppd - aso rexr rexx rexb - sse66 0f c2 - V W Ib + aso rexr rexx rexb vexl + /sse=66 0f c2 + V H W Ib + sse2 avx cmpps - aso rexr rexx rexb + aso rexr rexx rexb vexl 0f c2 - V W Ib + V H W Ib + sse2 avx cmpsb + repz seg a6 @@ -765,7 +808,7 @@ cmpsw - oso rexw + repz oso rexw seg a7 /o=16 @@ -773,20 +816,21 @@ cmpsd - oso rexw + repz oso rexw seg a7 /o=32 aso rexr rexx rexb - ssef2 0f c2 - V W Ib + /sse=f2 0f c2 + V H W Ib + sse2 avx cmpsq - oso rexw + repz oso rexw seg a7 /o=64 @@ -795,8 +839,9 @@ cmpss aso rexr rexx rexb - ssef3 0f c2 - V W Ib + /sse=f3 0f c2 + V H W Ib + sse2 avx @@ -818,7 +863,21 @@ cmpxchg8b aso rexr rexx rexb - 0f c7 /reg=1 + 0f c7 /mod=!11 /reg=1 /o=16 + M + + + aso rexr rexx rexb + 0f c7 /mod=!11 /reg=1 /o=32 + M + + + + + cmpxchg16b + + aso rexr rexx rexb + 0f c7 /mod=!11 /reg=1 /o=64 M @@ -827,8 +886,9 @@ comisd aso rexr rexx rexb - sse66 0f 2f - V W + /sse=66 0f 2f + Vsd Wsd + sse2 avx @@ -838,6 +898,7 @@ aso rexr rexx rexb 0f 2f V W + sse2 avx @@ -851,9 +912,10 @@ cvtdq2pd - aso rexr rexx rexb - ssef3 0f e6 - V W + aso rexr rexx rexb vexl + /sse=f3 0f e6 + V Wdq + sse2 avx @@ -863,15 +925,17 @@ aso rexr rexx rexb 0f 5b V W + sse2 avx cvtpd2dq - aso rexr rexx rexb - ssef2 0f e6 - V W + aso rexr rexx rexb vexl + /sse=f2 0f e6 + Vdq W + sse2 avx @@ -879,7 +943,7 @@ cvtpd2pi aso rexr rexx rexb - sse66 0f 2d + /sse=66 0f 2d P W @@ -887,9 +951,10 @@ cvtpd2ps - aso rexr rexx rexb - sse66 0f 5a - V W + aso rexr rexx rexb vexl + /sse=66 0f 5a + Vdq W + sse2 avx @@ -906,7 +971,7 @@ cvtpi2pd aso rexr rexx rexb - sse66 0f 2a + /sse=66 0f 2a V Q @@ -914,27 +979,29 @@ cvtps2dq - aso rexr rexx rexb - sse66 0f 5b + aso rexr rexx rexb vexl + /sse=66 0f 5b V W + sse2 avx - cvtps2pi + cvtps2pd - aso rexr rexx rexb - 0f 2d - P W + aso rexr rexx rexb vexl + 0f 5a + V Wdq + sse2 avx - cvtps2pd + cvtps2pi aso rexr rexx rexb - 0f 5a - V W + 0f 2d + P MqU @@ -942,8 +1009,9 @@ cvtsd2si aso rexw rexr rexx rexb - ssef2 0f 2d - Gy W + /sse=f2 0f 2d + Gy MqU + sse2 avx @@ -951,26 +1019,29 @@ cvtsd2ss aso rexr rexx rexb - ssef2 0f 5a - V W + /sse=f2 0f 5a + V H W + sse2 avx - cvtsi2ss + cvtsi2sd aso rexw rexr rexx rexb - ssef3 0f 2a - V Ex + /sse=f2 0f 2a + V H Ey + sse2 avx - cvtss2si + cvtsi2ss aso rexw rexr rexx rexb - ssef3 0f 2d - Gy W + /sse=f3 0f 2a + V H Ey + sse avx @@ -978,35 +1049,48 @@ cvtss2sd aso rexr rexx rexb - ssef3 0f 5a - V W + /sse=f3 0f 5a + V H W + sse2 avx - cvttpd2pi + cvtss2si - aso rexr rexx rexb - sse66 0f 2c - P W + aso rexw rexr rexx rexb + /sse=f3 0f 2d + Gy MdU + sse avx cvttpd2dq + aso rexr rexx rexb vexl + /sse=66 0f e6 + Vdq W + sse2 avx + + + + + cvttpd2pi + aso rexr rexx rexb - sse66 0f e6 - V W + /sse=66 0f 2c + P W cvttps2dq - aso rexr rexx rexb - ssef3 0f 5b + aso rexr rexx rexb vexl + /sse=f3 0f 5b V W + sse2 avx @@ -1023,17 +1107,9 @@ cvttsd2si aso rexw rexr rexx rexb - ssef2 0f 2c - Gy Wsd - - - - - cvtsi2sd - - aso rexw rexr rexx rexb - ssef2 0f 2a - V Ex + /sse=f2 0f 2c + Gy MqU + sse2 avx @@ -1041,8 +1117,9 @@ cvttss2si aso rexw rexr rexx rexb - ssef3 0f 2c - Gy Wsd + /sse=f3 0f 2c + Gy MdU + sse2 avx @@ -1073,7 +1150,7 @@ daa - 27 + 27 /m=!64 inv64 @@ -1081,7 +1158,7 @@ das - 2f + 2f /m=!64 inv64 @@ -1091,42 +1168,42 @@ oso 48 - eAX + R0z oso 49 - eCX + R1z oso 4a - eDX + R2z oso 4b - eBX + R3z oso 4c - eSP + R4z oso 4d - eBP + R5z oso 4e - eSI + R6z oso 4f - eDI + R7z aso rexw rexr rexx rexb @@ -1157,9 +1234,10 @@ divpd - aso rexr rexx rexb - sse66 0f 5e - V W + aso rexr rexx rexb vexl + /sse=66 0f 5e + V H W + sse2 avx @@ -1168,7 +1246,8 @@ aso rexr rexx rexb 0f 5e - V W + V H W + sse avx @@ -1176,8 +1255,9 @@ divsd aso rexr rexx rexb - ssef2 0f 5e - V W + /sse=f2 0f 5e + V H MqU + sse2 avx @@ -1185,8 +1265,29 @@ divss aso rexr rexx rexb - ssef3 0f 5e - V W + /sse=f3 0f 5e + V H MdU + sse avx + + + + + dppd + + aso rexr rexx rexb + /sse=66 0f 3a 41 + V H W Ib + sse4.1 avx + + + + + dpps + + aso rexr rexx rexb vexl + /sse=66 0f 3a 40 + V H W Ib + sse4.1 avx @@ -1202,13 +1303,23 @@ c8 Iw Ib - def64 depM + def64 + + + + + extractps + + aso rexr rexw rexx rexb + /sse=66 0f 3a 17 + MdRy V Ib + sse4.1 avx f2xm1 - X87 + X87 d9 /mod=11 /x87=30 @@ -1216,7 +1327,7 @@ fabs - X87 + X87 d9 /mod=11 /x87=21 @@ -1224,7 +1335,7 @@ fadd - X87 + X87 aso rexr rexx rexb dc /mod=!11 /reg=0 @@ -1303,7 +1414,7 @@ faddp - X87 + X87 de /mod=11 /x87=00 ST0 ST0 @@ -1340,7 +1451,7 @@ fbld - X87 + X87 aso rexr rexx rexb df /mod=!11 /reg=4 @@ -1350,7 +1461,7 @@ fbstp - X87 + X87 aso rexr rexx rexb df /mod=!11 /reg=6 @@ -1360,7 +1471,7 @@ fchs - X87 + X87 d9 /mod=11 /x87=20 @@ -1368,7 +1479,7 @@ fclex - X87 + X87 db /mod=11 /x87=22 @@ -1376,7 +1487,7 @@ fcmovb - X87 + X87 da /mod=11 /x87=00 ST0 ST0 @@ -1413,7 +1524,7 @@ fcmove - X87 + X87 da /mod=11 /x87=08 ST0 ST0 @@ -1450,7 +1561,7 @@ fcmovbe - X87 + X87 da /mod=11 /x87=10 ST0 ST0 @@ -1487,7 +1598,7 @@ fcmovu - X87 + X87 da /mod=11 /x87=18 ST0 ST0 @@ -1524,7 +1635,7 @@ fcmovnb - X87 + X87 db /mod=11 /x87=00 ST0 ST0 @@ -1561,7 +1672,7 @@ fcmovne - X87 + X87 db /mod=11 /x87=08 ST0 ST0 @@ -1598,7 +1709,7 @@ fcmovnbe - X87 + X87 db /mod=11 /x87=10 ST0 ST0 @@ -1635,7 +1746,7 @@ fcmovnu - X87 + X87 db /mod=11 /x87=18 ST0 ST0 @@ -1672,7 +1783,7 @@ fucomi - X87 + X87 db /mod=11 /x87=28 ST0 ST0 @@ -1709,7 +1820,7 @@ fcom - X87 + X87 aso rexr rexx rexb d8 /mod=!11 /reg=2 @@ -1756,7 +1867,7 @@ fcom2 - X87 UNDOC + X87 UNDOC dc /mod=11 /x87=10 ST0 @@ -1793,7 +1904,7 @@ fcomp3 - X87 UNDOC + X87 UNDOC dc /mod=11 /x87=18 ST0 @@ -1830,7 +1941,7 @@ fcomi - X87 + X87 db /mod=11 /x87=30 ST0 ST0 @@ -1867,7 +1978,7 @@ fucomip - X87 + X87 df /mod=11 /x87=28 ST0 ST0 @@ -1904,7 +2015,7 @@ fcomip - X87 + X87 df /mod=11 /x87=30 ST0 ST0 @@ -1941,7 +2052,7 @@ fcomp - X87 + X87 aso rexr rexx rexb d8 /mod=!11 /reg=3 @@ -1988,7 +2099,7 @@ fcomp5 - X87 UNDOC + X87 UNDOC de /mod=11 /x87=10 ST0 @@ -2025,7 +2136,7 @@ fcompp - X87 + X87 de /mod=11 /x87=19 @@ -2033,7 +2144,7 @@ fcos - X87 + X87 d9 /mod=11 /x87=3f @@ -2041,7 +2152,7 @@ fdecstp - X87 + X87 d9 /mod=11 /x87=36 @@ -2049,7 +2160,7 @@ fdiv - X87 + X87 aso rexr rexx rexb dc /mod=!11 /reg=6 @@ -2128,7 +2239,7 @@ fdivp - X87 + X87 de /mod=11 /x87=38 ST0 ST0 @@ -2165,7 +2276,7 @@ fdivr - X87 + X87 aso rexr rexx rexb dc /mod=!11 /reg=7 @@ -2244,7 +2355,7 @@ fdivrp - X87 + X87 de /mod=11 /x87=30 ST0 ST0 @@ -2288,7 +2399,7 @@ ffree - X87 + X87 dd /mod=11 /x87=00 ST0 @@ -2325,7 +2436,7 @@ ffreep - X87 + X87 df /mod=11 /x87=00 ST0 @@ -2362,7 +2473,7 @@ ficom - X87 + X87 aso rexr rexx rexb de /mod=!11 /reg=2 @@ -2377,7 +2488,7 @@ ficomp - X87 + X87 aso rexr rexx rexb de /mod=!11 /reg=3 @@ -2392,7 +2503,7 @@ fild - X87 + X87 aso rexr rexx rexb df /mod=!11 /reg=0 @@ -2411,8 +2522,8 @@ - fncstp - X87 + fincstp + X87 d9 /mod=11 /x87=37 @@ -2420,7 +2531,7 @@ fninit - X87 + X87 db /mod=11 /x87=23 @@ -2428,7 +2539,7 @@ fiadd - X87 + X87 aso rexr rexx rexb da /mod=!11 /reg=0 @@ -2443,7 +2554,7 @@ fidivr - X87 + X87 aso rexr rexx rexb da /mod=!11 /reg=7 @@ -2458,7 +2569,7 @@ fidiv - X87 + X87 aso rexr rexx rexb da /mod=!11 /reg=6 @@ -2473,7 +2584,7 @@ fisub - X87 + X87 aso rexr rexx rexb da /mod=!11 /reg=4 @@ -2488,7 +2599,7 @@ fisubr - X87 + X87 aso rexr rexx rexb da /mod=!11 /reg=5 @@ -2503,7 +2614,7 @@ fist - X87 + X87 aso rexr rexx rexb df /mod=!11 /reg=2 @@ -2518,7 +2629,7 @@ fistp - X87 + X87 aso rexr rexx rexb df /mod=!11 /reg=3 @@ -2538,7 +2649,7 @@ fisttp - X87 + X87 aso rexr rexx rexb db /mod=!11 /reg=1 @@ -2558,7 +2669,7 @@ fld - X87 + X87 aso rexr rexx rexb db /mod=!11 /reg=5 @@ -2610,7 +2721,7 @@ fld1 - X87 + X87 d9 /mod=11 /x87=28 @@ -2618,7 +2729,7 @@ fldl2t - X87 + X87 d9 /mod=11 /x87=29 @@ -2626,15 +2737,15 @@ fldl2e - X87 + X87 d9 /mod=11 /x87=2a - fldlpi - X87 + fldpi + X87 d9 /mod=11 /x87=2b @@ -2642,7 +2753,7 @@ fldlg2 - X87 + X87 d9 /mod=11 /x87=2c @@ -2650,7 +2761,7 @@ fldln2 - X87 + X87 d9 /mod=11 /x87=2d @@ -2658,7 +2769,7 @@ fldz - X87 + X87 d9 /mod=11 /x87=2e @@ -2666,7 +2777,7 @@ fldcw - X87 + X87 aso rexr rexx rexb d9 /mod=!11 /reg=5 @@ -2676,7 +2787,7 @@ fldenv - X87 + X87 aso rexr rexx rexb d9 /mod=!11 /reg=4 @@ -2686,7 +2797,7 @@ fmul - X87 + X87 aso rexr rexx rexb dc /mod=!11 /reg=1 @@ -2765,7 +2876,7 @@ fmulp - X87 + X87 de /mod=11 /x87=08 ST0 ST0 @@ -2802,7 +2913,7 @@ fimul - X87 + X87 aso rexr rexx rexb da /mod=!11 /reg=1 @@ -2817,15 +2928,39 @@ fnop - X87 + X87 d9 /mod=11 /x87=10 + + + fndisi + X87 + + db /mod=11 /x87=21 + + + + + fneni + X87 + + db /mod=11 /x87=20 + + + + + fnsetpm + X87 + + db /mod=11 /x87=24 + + fpatan - X87 + X87 d9 /mod=11 /x87=33 @@ -2833,7 +2968,7 @@ fprem - X87 + X87 d9 /mod=11 /x87=38 @@ -2841,7 +2976,7 @@ fprem1 - X87 + X87 d9 /mod=11 /x87=35 @@ -2849,7 +2984,7 @@ fptan - X87 + X87 d9 /mod=11 /x87=32 @@ -2857,7 +2992,7 @@ frndint - X87 + X87 d9 /mod=11 /x87=3c @@ -2865,17 +3000,25 @@ frstor - X87 + X87 aso rexr rexx rexb dd /mod=!11 /reg=4 M + + + frstpm + X87 + + db /mod=11 /x87=25 + + fnsave - X87 + X87 aso rexr rexx rexb dd /mod=!11 /reg=6 @@ -2885,7 +3028,7 @@ fscale - X87 + X87 d9 /mod=11 /x87=3d @@ -2893,7 +3036,7 @@ fsin - X87 + X87 d9 /mod=11 /x87=3e @@ -2901,7 +3044,7 @@ fsincos - X87 + X87 d9 /mod=11 /x87=3b @@ -2909,7 +3052,7 @@ fsqrt - X87 + X87 d9 /mod=11 /x87=3a @@ -2917,7 +3060,7 @@ fstp - X87 + X87 aso rexr rexx rexb db /mod=!11 /reg=7 @@ -3077,7 +3220,7 @@ fst - X87 + X87 aso rexr rexx rexb d9 /mod=!11 /reg=2 @@ -3124,7 +3267,7 @@ fnstcw - X87 + X87 aso rexr rexx rexb d9 /mod=!11 /reg=7 @@ -3134,7 +3277,7 @@ fnstenv - X87 + X87 aso rexr rexx rexb d9 /mod=!11 /reg=6 @@ -3144,7 +3287,7 @@ fnstsw - X87 + X87 aso rexr rexx rexb dd /mod=!11 /reg=7 @@ -3158,7 +3301,7 @@ fsub - X87 + X87 aso rexr rexx rexb d8 /mod=!11 /reg=4 @@ -3237,7 +3380,7 @@ fsubp - X87 + X87 de /mod=11 /x87=28 ST0 ST0 @@ -3274,7 +3417,7 @@ fsubr - X87 + X87 aso rexr rexx rexb dc /mod=!11 /reg=5 @@ -3353,7 +3496,7 @@ fsubrp - X87 + X87 de /mod=11 /x87=20 ST0 ST0 @@ -3390,7 +3533,7 @@ ftst - X87 + X87 d9 /mod=11 /x87=24 @@ -3398,7 +3541,7 @@ fucom - X87 + X87 dd /mod=11 /x87=20 ST0 @@ -3435,7 +3578,7 @@ fucomp - X87 + X87 dd /mod=11 /x87=28 ST0 @@ -3472,7 +3615,7 @@ fucompp - X87 + X87 da /mod=11 /x87=29 @@ -3480,7 +3623,7 @@ fxam - X87 + X87 d9 /mod=11 /x87=25 @@ -3488,7 +3631,7 @@ fxch - X87 + X87 d9 /mod=11 /x87=08 ST0 ST0 @@ -3525,7 +3668,7 @@ fxch4 - X87 + X87 dd /mod=11 /x87=08 ST0 @@ -3562,7 +3705,7 @@ fxch7 - X87 + X87 df /mod=11 /x87=08 ST0 @@ -3601,7 +3744,7 @@ fxrstor aso rexw rexr rexx rexb - 0f ae /mod=11 /reg=1 + 0f ae /mod=!11 /reg=1 M @@ -3610,14 +3753,14 @@ fxsave aso rexw rexr rexx rexb - 0f ae /mod=11 /reg=0 + 0f ae /mod=!11 /reg=0 M - fpxtract - X87 + fxtract + X87 d9 /mod=11 /x87=34 @@ -3625,7 +3768,7 @@ fyl2x - X87 + X87 d9 /mod=11 /x87=31 @@ -3633,7 +3776,7 @@ fyl2xp1 - X87 + X87 d9 /mod=11 /x87=39 @@ -3703,13 +3846,11 @@ aso oso rexw rexr rexx rexb 69 Gv Ev Iz - sext aso oso rexw rexr rexx rexb 6b - Gv Ev Ib - sext + Gv Ev sIb @@ -3718,42 +3859,42 @@ oso 40 - eAX + R0z oso 41 - eCX + R1z oso 42 - eDX + R2z oso 43 - eBX + R3z oso 44 - eSP + R4z oso 45 - eBP + R5z oso 46 - eSI + R6z oso 47 - eDI + R7z aso oso rexw rexr rexx rexb @@ -3770,6 +3911,7 @@ insb + rep seg 6c @@ -3777,7 +3919,7 @@ insw - oso + rep oso seg 6d /o=16 @@ -3785,7 +3927,7 @@ insd - oso + rep oso seg 6d /o=32 @@ -3815,7 +3957,7 @@ into - ce + ce /m=!64 inv64 @@ -3831,11 +3973,11 @@ invept intel - sse66 0f 38 80 /m=32 + /sse=66 0f 38 80 /m=32 Gd Mo - sse66 0f 38 80 /m=64 + /sse=66 0f 38 80 /m=64 Gq Mo @@ -3861,11 +4003,11 @@ invvpid intel - sse66 0f 38 81 /m=32 + /sse=66 0f 38 81 /m=32 Gd Mo - sse66 0f 38 81 /m=64 + /sse=66 0f 38 81 /m=64 Gq Mo @@ -3904,7 +4046,7 @@ oso 0f 80 Jz - def64 depM + def64 @@ -3918,7 +4060,7 @@ oso 0f 81 Jz - def64 depM + def64 @@ -3932,7 +4074,7 @@ oso 0f 82 Jz - def64 depM + def64 @@ -3946,7 +4088,7 @@ oso 0f 83 Jz - def64 depM + def64 @@ -3960,7 +4102,7 @@ oso 0f 84 Jz - def64 depM + def64 @@ -3974,7 +4116,7 @@ oso 0f 85 Jz - def64 depM + def64 @@ -3988,7 +4130,7 @@ oso 0f 86 Jz - def64 depM + def64 @@ -4002,7 +4144,7 @@ oso 0f 87 Jz - def64 depM + def64 @@ -4016,7 +4158,7 @@ oso 0f 88 Jz - def64 depM + def64 @@ -4030,7 +4172,7 @@ oso 0f 89 Jz - def64 depM + def64 @@ -4044,7 +4186,7 @@ oso 0f 8a Jz - def64 depM + def64 @@ -4058,7 +4200,7 @@ oso 0f 8b Jz - def64 depM + def64 @@ -4072,7 +4214,7 @@ oso 0f 8c Jz - def64 depM + def64 @@ -4086,7 +4228,7 @@ oso 0f 8d Jz - def64 depM + def64 @@ -4100,7 +4242,7 @@ oso 0f 8e Jz - def64 depM + def64 @@ -4114,7 +4256,7 @@ oso 0f 8f Jz - def64 depM + def64 @@ -4151,28 +4293,28 @@ aso oso rexw rexr rexx rexb ff /reg=4 Ev - def64 depM + def64 aso oso rexw rexr rexx rexb ff /reg=5 - Ep + Fv oso e9 Jz - def64 depM - cast + def64 - ea - Ap - inv64 + oso + ea /m=!64 + Av eb Jb + def64 @@ -4193,19 +4335,10 @@ - lddqu - - aso rexr rexx rexb - ssef2 0f f0 - V M - - - - ldmxcsr aso rexw rexr rexx rexb - 0f ae /reg=2 /mod=11 + 0f ae /reg=2 /mod=!11 Md @@ -4214,9 +4347,8 @@ lds aso oso - c5 + c5 /vex=none /m=!64 Gv M - inv64 @@ -4233,9 +4365,8 @@ les aso oso - c4 + c4 /m=!64 Gv M - inv64 @@ -4271,7 +4402,7 @@ aso oso rexw rexr rexx rexb 0f b2 - Gz M + Gv M @@ -4335,6 +4466,11 @@ 0f 01 /reg=6 /mod=!11 Ew + + aso rexr rexx rexb + 0f 01 /reg=6 /mod=11 + Ew + @@ -4347,7 +4483,7 @@ lodsb - seg + rep seg ac @@ -4355,7 +4491,7 @@ lodsw - seg oso rexw + rep seg oso rexw ad /o=16 @@ -4363,7 +4499,7 @@ lodsd - seg oso rexw + rep seg oso rexw ad /o=32 @@ -4371,13 +4507,13 @@ lodsq - seg oso rexw + rep seg oso rexw ad /o=64 - loopnz + loopne e0 Jb @@ -4422,26 +4558,28 @@ maskmovq aso rexr rexx rexb - 0f f7 - P PR + 0f f7 /mod=11 + P N maxpd - aso rexr rexx rexb - sse66 0f 5f - V W + aso rexr rexx rexb vexl + /sse=66 0f 5f + V H W + sse2 avx maxps - aso rexr rexx rexb + aso rexr rexx rexb vexl 0f 5f - V W + V H W + sse avx @@ -4449,8 +4587,9 @@ maxsd aso rexr rexx rexb - ssef2 0f 5f - V W + /sse=f2 0f 5f + V H W + sse2 avx @@ -4458,8 +4597,9 @@ maxss aso rexr rexx rexb - ssef3 0f 5f - V W + /sse=f3 0f 5f + V H W + sse avx @@ -4494,9 +4634,10 @@ minpd - aso rexr rexx rexb - sse66 0f 5d - V W + aso rexr rexx rexb vexl + /sse=66 0f 5d + V H W + sse2 avx @@ -4505,7 +4646,8 @@ aso rexr rexx rexb 0f 5d - V W + V H W + sse2 avx @@ -4513,8 +4655,9 @@ minsd aso rexr rexx rexb - ssef2 0f 5d - V W + /sse=f2 0f 5d + V H MqU + sse2 avx @@ -4522,8 +4665,9 @@ minss aso rexr rexx rexb - ssef3 0f 5d - V W + /sse=f3 0f 5d + V H MdU + sse avx @@ -4551,7 +4695,7 @@ aso oso rexw rexr rexx rexb c7 /reg=0 - Ev Iz + Ev sIz aso rexr rexx rexb @@ -4574,14 +4718,14 @@ Gv Ev - aso oso rexr rexx rexb + aso oso rexw rexr rexx rexb 8c - Ev S + MwRv S - aso oso rexr rexx rexb + aso oso rexw rexr rexx rexb 8e - S Ev + S MwRv a0 @@ -4604,100 +4748,100 @@ rexb b0 - ALr8b Ib + R0b Ib rexb b1 - CLr9b Ib + R1b Ib rexb b2 - DLr10b Ib + R2b Ib rexb b3 - BLr11b Ib + R3b Ib rexb b4 - AHr12b Ib + R4b Ib rexb b5 - CHr13b Ib + R5b Ib rexb b6 - DHr14b Ib + R6b Ib rexb b7 - BHr15b Ib + R7b Ib oso rexw rexb b8 - rAXr8 Iv + R0v Iv oso rexw rexb b9 - rCXr9 Iv + R1v Iv oso rexw rexb ba - rDXr10 Iv + R2v Iv oso rexw rexb bb - rBXr11 Iv + R3v Iv oso rexw rexb bc - rSPr12 Iv + R4v Iv oso rexw rexb bd - rBPr13 Iv + R5v Iv oso rexw rexb be - rSIr14 Iv + R6v Iv oso rexw rexb bf - rDIr15 Iv + R7v Iv - rexr + rexr rexw rexb 0f 20 R C - rexr + rexr rexw rexb 0f 21 R D - rexr + rexr rexw rexb 0f 22 C R - rexr + rexr rexw rexb 0f 23 D R @@ -4706,28 +4850,32 @@ movapd - aso rexr rexx rexb - sse66 0f 28 + aso rexr rexx rexb vexl + /sse=66 0f 28 V W + sse2 avx - aso rexr rexx rexb - sse66 0f 29 + aso rexr rexx rexb vexl + /sse=66 0f 29 W V + sse2 avx movaps - aso rexr rexx rexb + aso rexr rexx rexb vexl 0f 28 V W + sse avx - aso rexr rexx rexb + aso rexr rexx rexb vexl 0f 29 W V + sse avx @@ -4735,23 +4883,52 @@ movd aso rexw rexr rexx rexb - sse66 0f 6e - V Ex + 0f 6e /o=16 + P Ey + mmx - aso rexr rexx rexb - 0f 6e - P Ex + aso rexw rexr rexx rexb + 0f 6e /o=32 + P Ey + mmx + aso rexw rexr rexx rexb - sse66 0f 7e - Ex V + /sse=66 0f 6e /o=16 + V Ey + sse2 avx - aso rexr rexx rexb - 0f 7e - Ex P + aso rexw rexr rexx rexb + /sse=66 0f 6e /o=32 + V Ey + sse2 avx + + + aso rexw rexr rexx rexb + 0f 7e /o=16 + Ey P + mmx + + + aso rexw rexr rexx rexb + 0f 7e /o=32 + Ey P + mmx + + + aso rexw rexr rexx rexb + /sse=66 0f 7e /o=16 + Ey V + sse2 avx + + + aso rexw rexr rexx rexb + /sse=66 0f 7e /o=32 + Ey V + sse2 avx @@ -4759,13 +4936,15 @@ movhpd aso rexr rexx rexb - sse66 0f 16 /mod=!11 - V M + /sse=66 0f 16 /mod=!11 + V H M + sse2 avx aso rexr rexx rexb - sse66 0f 17 + /sse=66 0f 17 M V + sse2 avx @@ -4774,12 +4953,14 @@ aso rexr rexx rexb 0f 16 /mod=!11 - V M + V H M + sse avx aso rexr rexx rexb 0f 17 M V + sse avx @@ -4788,7 +4969,8 @@ aso rexr rexx rexb 0f 16 /mod=11 - V VR + V H U + sse avx @@ -4796,14 +4978,15 @@ movlpd aso rexr rexx rexb - sse66 0f 12 /mod=!11 + /sse=66 0f 12 /mod=!11 V M aso rexr rexx rexb - sse66 0f 13 + /sse=66 0f 13 M V + sse2 avx @@ -4818,6 +5001,7 @@ 0f 13 M V + sse avx @@ -4825,16 +5009,18 @@ aso rexr rexx rexb 0f 12 /mod=11 - V VR + V U + sse avx movmskpd - oso rexr rexb - sse66 0f 50 - Gd VR + oso rexr rexb vexl + /sse=66 0f 50 + Gd U + sse2 avx @@ -4843,16 +5029,18 @@ oso rexr rexb 0f 50 - Gd VR + Gd U + sse2 avx movntdq - aso rexr rexx rexb - sse66 0f e7 + aso rexr rexx rexb vexl + /sse=66 0f e7 M V + sse2 avx @@ -4868,24 +5056,27 @@ movntpd - aso rexr rexx rexb - sse66 0f 2b + aso rexr rexx rexb vexl + /sse=66 0f 2b M V + sse2 avx movntps - aso rexr rexx rexb + aso rexr rexx rexb vexl 0f 2b M V + sse2 avx movntq + aso rexr rexx rexb 0f e7 M P @@ -4894,31 +5085,59 @@ movq - aso rexr rexx rexb - 0f 6f - P Q + aso rexw rexr rexx rexb + 0f 6e /o=64 + P Eq + mmx - aso rexr rexx rexb - sse66 0f d6 - W V + aso rexw rexr rexx rexb + /sse=66 0f 6e /o=64 + V Eq + sse2 avx - aso rexr rexx rexb - ssef3 0f 7e + aso rexw rexr rexx rexb + 0f 7e /o=64 + Eq P + mmx + + + aso rexw rexr rexx rexb + /sse=66 0f 7e /o=64 + Eq V + sse2 avx + + + aso rexw rexr rexx rexb + /sse=f3 0f 7e V W + sse2 avx - aso rexr rexx rexb + aso rexw rexr rexx rexb + /sse=66 0f d6 + W V + sse2 avx + + + aso rexw rexr rexx rexb + 0f 6f + P Q + mmx + + + aso rexw rexr rexx rexb 0f 7f Q P + mmx movsb - seg + rep seg a4 @@ -4926,7 +5145,7 @@ movsw - seg oso rexw + rep seg oso rexw a5 /o=16 @@ -4934,25 +5153,27 @@ movsd - seg oso rexw + rep seg oso rexw a5 /o=32 aso rexr rexx rexb - ssef2 0f 10 - V W + /sse=f2 0f 10 + V MqU + sse2 aso rexr rexx rexb - ssef2 0f 11 + /sse=f2 0f 11 W V + sse2 movsq - seg oso rexw + rep seg oso rexw a5 /o=64 @@ -4961,13 +5182,15 @@ movss aso rexr rexx rexb - ssef3 0f 10 - V W + /sse=f3 0f 10 + V MdU + sse aso rexr rexx rexb - ssef3 0f 11 + /sse=f3 0f 11 W V + sse @@ -4981,35 +5204,39 @@ aso oso rexw rexr rexx rexb 0f bf - Gv Ew + Gy Ew movupd - aso rexr rexx rexb - sse66 0f 10 + aso rexr rexx rexb vexl + /sse=66 0f 10 V W + sse2 avx - aso rexr rexx rexb - sse66 0f 11 + aso rexr rexx rexb vexl + /sse=66 0f 11 W V + sse2 avx movups - aso rexr rexx rexb + aso rexr rexx rexb vexl 0f 10 V W + sse2 avx - aso rexr rexx rexb + aso rexr rexx rexb vexl 0f 11 W V + sse2 avx @@ -5023,7 +5250,7 @@ aso oso rexw rexr rexx rexb 0f b7 - Gv Ew + Gy Ew @@ -5044,18 +5271,20 @@ mulpd - aso rexr rexx rexb - sse66 0f 59 - V W + aso rexr rexx rexb vexl + /sse=66 0f 59 + V H W + sse2 avx mulps - aso rexr rexx rexb + aso rexr rexx rexb vexl 0f 59 - V W + V H W + sse2 avx @@ -5063,8 +5292,9 @@ mulsd aso rexr rexx rexb - ssef2 0f 59 - V W + /sse=f2 0f 59 + V H W + sse2 avx @@ -5072,8 +5302,9 @@ mulss aso rexr rexx rexb - ssef3 0f 59 - V W + /sse=f3 0f 59 + V H W + sse avx @@ -5101,9 +5332,6 @@ nop - 90 - - aso rexr rexx rexb 0f 19 M @@ -5183,8 +5411,7 @@ oso rexw 0d - rAX Iz - sext + rAX sIz aso rexr rexx rexb @@ -5194,38 +5421,37 @@ aso oso rexw rexr rexx rexb 81 /reg=1 - Ev Iz - sext + Ev sIz aso rexr rexx rexb - 82 /reg=1 + 82 /reg=1 /m=!64 Eb Ib - inv64 aso oso rexw rexr rexx rexb 83 /reg=1 - Ev Ib - sext + Ev sIb orpd - aso rexr rexx rexb - sse66 0f 56 - V W + aso rexr rexx rexb vexl + /sse=66 0f 56 + V H W + sse2 avx orps - aso rexr rexx rexb + aso rexr rexx rexb vexl 0f 56 - V W + V H W + sse avx @@ -5254,6 +5480,7 @@ outsb + rep seg 6e @@ -5261,7 +5488,7 @@ outsw - oso + rep oso seg 6f /o=16 @@ -5269,72 +5496,72 @@ outsd - oso + rep oso seg 6f /o=32 - outsq - - oso - 6f /o=64 - - - - packsswb - aso rexr rexx rexb - sse66 0f 63 - V W + aso rexr rexx rexb vexl + /sse=66 0f 63 + V H W + sse2 avx aso rexr rexx rexb 0f 63 P Q + mmx packssdw - aso rexr rexx rexb - sse66 0f 6b - V W + aso rexr rexx rexb vexl + /sse=66 0f 6b + V H W + sse2 avx aso rexr rexx rexb 0f 6b P Q + mmx packuswb - aso rexr rexx rexb - sse66 0f 67 - V W + aso rexr rexx rexb vexl + /sse=66 0f 67 + V H W + sse2 avx aso rexr rexx rexb 0f 67 P Q + mmx paddb - aso rexr rexx rexb - sse66 0f fc - V W + aso rexr rexx rexb vexl + /sse=66 0f fc + V H W + sse2 avx aso rexr rexx rexb 0f fc P Q + mmx @@ -5344,11 +5571,13 @@ aso rexr rexx rexb 0f fd P Q + mmx - aso rexr rexx rexb - sse66 0f fd - V W + aso rexr rexx rexb vexl + /sse=66 0f fd + V H W + sse2 avx @@ -5358,11 +5587,13 @@ aso rexr rexx rexb 0f fe P Q + mmx - aso rexr rexx rexb - sse66 0f fe - V W + aso rexr rexx rexb vexl + /sse=66 0f fe + V H W + sse2 avx @@ -5376,8 +5607,9 @@ aso rexr rexx rexb - sse66 0f ec - V W + /sse=66 0f ec + V H W + sse2 avx @@ -5390,8 +5622,9 @@ aso rexr rexx rexb - sse66 0f ed - V W + /sse=66 0f ed + V H W + sse2 avx @@ -5404,8 +5637,9 @@ aso rexr rexx rexb - sse66 0f dc - V W + /sse=66 0f dc + V H W + sse2 avx @@ -5418,8 +5652,9 @@ aso rexr rexx rexb - sse66 0f dd - V W + /sse=66 0f dd + V H W + sse2 avx @@ -5427,8 +5662,9 @@ pand aso rexr rexx rexb - sse66 0f db - V W + /sse=66 0f db + V H W + sse2 avx aso rexr rexx rexb @@ -5441,8 +5677,9 @@ pandn aso rexr rexx rexb - sse66 0f df - V W + /sse=66 0f df + V H W + sse2 avx aso rexr rexx rexb @@ -5455,8 +5692,9 @@ pavgb aso rexr rexx rexb - sse66 0f e0 - V W + /sse=66 0f e0 + V H W + sse2 avx aso rexr rexx rexb @@ -5469,8 +5707,9 @@ pavgw aso rexr rexx rexb - sse66 0f e3 - V W + /sse=66 0f e3 + V H W + sse2 avx aso rexr rexx rexb @@ -5488,8 +5727,9 @@ aso rexr rexx rexb - sse66 0f 74 - V W + /sse=66 0f 74 + V H W + sse2 avx @@ -5502,8 +5742,9 @@ aso rexr rexx rexb - sse66 0f 75 - V W + /sse=66 0f 75 + V H W + sse2 avx @@ -5516,8 +5757,9 @@ aso rexr rexx rexb - sse66 0f 76 - V W + /sse=66 0f 76 + V H W + sse2 avx @@ -5525,8 +5767,9 @@ pcmpgtb aso rexr rexx rexb - sse66 0f 64 - V W + /sse=66 0f 64 + V H W + sse2 avx aso rexr rexx rexb @@ -5539,8 +5782,9 @@ pcmpgtw aso rexr rexx rexb - sse66 0f 65 - V W + /sse=66 0f 65 + V H W + sse2 avx aso rexr rexx rexb @@ -5553,8 +5797,9 @@ pcmpgtd aso rexr rexx rexb - sse66 0f 66 - V W + /sse=66 0f 66 + V H W + sse2 avx aso rexr rexx rexb @@ -5566,24 +5811,27 @@ pextrb - aso rexr rexb - sse66 0f 3a 14 + aso rexx rexr rexb + /sse=66 0f 3a 14 /vexw=0 MbRv V Ib def64 + sse4.1 avx pextrd - aso rexr rexw rexb - sse66 0f 3a 16 /o=16 - Ev V Ib + aso rexr rexx rexw rexb + /sse=66 0f 3a 16 /o=16 /vexw=0 + Ed V Ib + sse4.1 avx - aso rexr rexw rexb - sse66 0f 3a 16 /o=32 - Ev V Ib + aso rexr rexx rexw rexb + /sse=66 0f 3a 16 /o=32 /vexw=0 + Ed V Ib + sse4.1 avx @@ -5591,40 +5839,126 @@ pextrq aso rexr rexw rexb - sse66 0f 3a 16 /o=64 - Ev V Ib + /sse=66 0f 3a 16 /o=64 /vexw=1 + Eq V Ib def64 + sse4.1 avx pextrw - aso rexr rexb - sse66 0f c5 - Gd VR Ib + aso rexw rexr rexb + /sse=66 0f c5 + Gd U Ib + sse avx - aso oso rexw rexr rexx rexb + aso rexw rexr rexx rexb 0f c5 - Gd PR Ib + Gd N Ib + + + aso rexw rexx rexr rexb + /sse=66 0f 3a 15 + MwRd V Ib + sse4.1 avx + + + + + pinsrb + + aso rexw rexr rexx rexb + /sse=66 0f 3a 20 + V MbRd Ib + sse4.1 pinsrw - aso oso rexw rexr rexx rexb + aso rexw rexr rexx rexb 0f c4 - P Ew Ib + P MwRy Ib + def64 aso rexw rexr rexx rexb - sse66 0f c4 - V Ew Ib + /sse=66 0f c4 + V MwRy Ib + def64 + sse2 avx + + + + + pinsrd + + aso rexw rexr rexx rexb + /sse=66 0f 3a 22 /o=16 + V Ed Ib + sse4.1 + + + + aso rexw rexr rexx rexb + /sse=66 0f 3a 22 /o=32 + V Ed Ib + sse4.1 + + + + + pinsrq + + aso oso rexw rexr rexx rexb + /sse=66 0f 3a 22 /o=64 + V Eq Ib + sse4.1 + + + + + vpinsrb + + aso rexw rexr rexx rexb + /vex=66_0f3a 20 /vexw=0 /vexl=0 + V H MbRd Ib + avx + + + + + vpinsrd + + aso oso rexw rexr rexx rexb + /vex=66_0f3a 22 /m=!64 /vexw=0 /vexl=0 + V H Ed Ib + avx + + + aso oso rexw rexr rexx rexb + /vex=66_0f3a 22 /m=64 /vexw=0 /vexl=0 + V H Ed Ib + avx + + + + + + vpinsrq + + aso oso rexw rexr rexx rexb + /vex=66_0f3a 22 /m=64 /vexw=1 /vexl=0 + V H Eq Ib + avx + pmaddwd @@ -5634,8 +5968,9 @@ aso rexr rexx rexb - sse66 0f f5 - V W + /sse=66 0f f5 + V H W + sse4.1 avx @@ -5643,8 +5978,9 @@ pmaxsw aso rexr rexx rexb - sse66 0f ee - V W + /sse=66 0f ee + V H W + sse4.1 avx aso rexr rexx rexb @@ -5662,8 +5998,9 @@ aso rexr rexx rexb - sse66 0f de - V W + /sse=66 0f de + V H W + sse2 avx @@ -5671,8 +6008,9 @@ pminsw aso rexr rexx rexb - sse66 0f ea - V W + /sse=66 0f ea + V H W + sse2 avx aso rexr rexx rexb @@ -5685,8 +6023,9 @@ pminub aso rexr rexx rexb - sse66 0f da - V W + /sse=66 0f da + V H W + sse2 avx aso rexr rexx rexb @@ -5698,14 +6037,15 @@ pmovmskb - rexr rexb - sse66 0f d7 - Gd VR + oso rexr rexw rexb + /sse=66 0f d7 /vexl=0 + Gd U + sse2 avx - oso rexr rexb + oso rexr rexw rexb 0f d7 - Gd PR + Gd N @@ -5718,8 +6058,9 @@ aso rexr rexx rexb - sse66 0f e4 - V W + /sse=66 0f e4 + V H W + sse2 avx @@ -5727,8 +6068,9 @@ pmulhw aso rexr rexx rexb - sse66 0f e5 - V W + /sse=66 0f e5 + V H W + sse2 avx aso rexr rexx rexb @@ -5746,25 +6088,26 @@ aso rexr rexx rexb - sse66 0f d5 - V W + /sse=66 0f d5 + V H W + sse2 avx pop - 07 + 07 /m=!64 ES inv64 - 17 + 17 /m=!64 SS inv64 - 1f + 1f /m=!64 DS inv64 @@ -5779,56 +6122,56 @@ oso rexb 58 - rAXr8 - def64 depM + R0v + def64 oso rexb 59 - rCXr9 - def64 depM + R1v + def64 oso rexb 5a - rDXr10 - def64 depM + R2v + def64 oso rexb 5b - rBXr11 - def64 depM + R3v + def64 oso rexb 5c - rSPr12 - def64 depM + R4v + def64 oso rexb 5d - rBPr13 - def64 depM + R5v + def64 oso rexb 5e - rSIr14 - def64 depM + R6v + def64 oso rexb 5f - rDIr15 - def64 depM + R7v + def64 aso oso rexw rexr rexx rexb 8f /reg=0 Ev - def64 depM + def64 @@ -5836,7 +6179,7 @@ popa oso - 61 /o=16 + 61 /o=16 /m=!64 inv64 @@ -5845,7 +6188,7 @@ popad oso - 61 /o=32 + 61 /o=32 /m=!64 inv64 @@ -5854,13 +6197,7 @@ popfw oso - 9d /m=32 /o=16 - def64 depM - - - oso - 9d /m=16 /o=16 - def64 depM + 9d /m=!64 /o=16 @@ -5868,13 +6205,7 @@ popfd oso - 9d /m=16 /o=32 - def64 depM - - - oso - 9d /m=32 /o=32 - def64 depM + 9d /m=!64 /o=32 @@ -5882,8 +6213,13 @@ popfq oso + 9d /m=64 /o=32 + def64 + + + oso 9d /m=64 /o=64 - def64 depM + def64 @@ -5891,8 +6227,9 @@ por aso rexr rexx rexb - sse66 0f eb - V W + /sse=66 0f eb + V H W + sse2 avx aso rexr rexx rexb @@ -5985,8 +6322,9 @@ psadbw aso rexr rexx rexb - sse66 0f f6 - V W + /sse=66 0f f6 + V H W + sse2 avx aso rexr rexx rexb @@ -6004,12 +6342,13 @@ - + psllw aso rexr rexx rexb - sse66 0f f1 + /sse=66 0f f1 V W + sse2 aso rexr rexx rexb @@ -6018,12 +6357,13 @@ rexb - sse66 0f 71 /reg=6 - VR Ib + /sse=66 0f 71 /reg=6 + U Ib + sse2 0f 71 /reg=6 - PR Ib + N Ib @@ -6031,8 +6371,9 @@ pslld aso rexr rexx rexb - sse66 0f f2 + /sse=66 0f f2 V W + sse2 aso rexr rexx rexb @@ -6041,12 +6382,13 @@ rexb - sse66 0f 72 /reg=6 - VR Ib + /sse=66 0f 72 /reg=6 + U Ib + sse2 0f 72 /reg=6 - PR Ib + N Ib @@ -6054,8 +6396,9 @@ psllq aso rexr rexx rexb - sse66 0f f3 + /sse=66 0f f3 V W + sse2 aso rexr rexx rexb @@ -6064,12 +6407,13 @@ rexb - sse66 0f 73 /reg=6 - VR Ib + /sse=66 0f 73 /reg=6 + U Ib + sse2 0f 73 /reg=6 - PR Ib + N Ib @@ -6082,17 +6426,19 @@ aso rexr rexx rexb - sse66 0f e1 - V W + /sse=66 0f e1 + V H W + sse2 avx rexb - sse66 0f 71 /reg=4 - VR Ib + /sse=66 0f 71 /reg=4 + H U Ib + sse2 avx 0f 71 /reg=4 - PR Ib + N Ib @@ -6100,12 +6446,13 @@ psrad 0f 72 /reg=4 - PR Ib + N Ib aso rexr rexx rexb - sse66 0f e2 - V W + /sse=66 0f e2 + V H W + sse2 avx aso rexr rexx rexb @@ -6114,8 +6461,9 @@ rexb - sse66 0f 72 /reg=4 - VR Ib + /sse=66 0f 72 /reg=4 + H U Ib + sse2 avx @@ -6123,7 +6471,7 @@ psrlw 0f 71 /reg=2 - PR Ib + N Ib aso rexr rexx rexb @@ -6132,13 +6480,15 @@ aso rexr rexx rexb - sse66 0f d1 - V W + /sse=66 0f d1 + V H W + sse2 avx rexb - sse66 0f 71 /reg=2 - VR Ib + /sse=66 0f 71 /reg=2 + H U Ib + sse2 avx @@ -6146,7 +6496,7 @@ psrld 0f 72 /reg=2 - PR Ib + N Ib aso rexr rexx rexb @@ -6155,13 +6505,15 @@ aso rexr rexx rexb - sse66 0f d2 - V W + /sse=66 0f d2 + V H W + sse2 avx rexb - sse66 0f 72 /reg=2 - VR Ib + /sse=66 0f 72 /reg=2 + H U Ib + sse2 avx @@ -6169,7 +6521,7 @@ psrlq 0f 73 /reg=2 - PR Ib + N Ib aso rexr rexx rexb @@ -6178,13 +6530,15 @@ aso rexr rexx rexb - sse66 0f d3 - V W + /sse=66 0f d3 + V H W + sse2 avx rexb - sse66 0f 73 /reg=2 - VR Ib + /sse=66 0f 73 /reg=2 + H U Ib + sse2 avx @@ -6192,8 +6546,9 @@ psubb aso rexr rexx rexb - sse66 0f f8 - V W + /sse=66 0f f8 + V H W + sse2 avx aso rexr rexx rexb @@ -6206,8 +6561,9 @@ psubw aso rexr rexx rexb - sse66 0f f9 - V W + /sse=66 0f f9 + V H W + sse2 avx aso rexr rexx rexb @@ -6225,8 +6581,9 @@ aso rexr rexx rexb - sse66 0f fa - V W + /sse=66 0f fa + V H W + sse2 avx @@ -6239,8 +6596,9 @@ aso rexr rexx rexb - sse66 0f e8 - V W + /sse=66 0f e8 + V H W + sse2 avx @@ -6253,8 +6611,9 @@ aso rexr rexx rexb - sse66 0f e9 - V W + /sse=66 0f e9 + V H W + sse2 avx @@ -6267,8 +6626,9 @@ aso rexr rexx rexb - sse66 0f d8 - V W + /sse=66 0f d8 + V H W + sse2 avx @@ -6281,8 +6641,9 @@ aso rexr rexx rexb - sse66 0f d9 - V W + /sse=66 0f d9 + V H W + sse2 avx @@ -6290,8 +6651,9 @@ punpckhbw aso rexr rexx rexb - sse66 0f 68 - V W + /sse=66 0f 68 + V H W + sse2 avx aso rexr rexx rexb @@ -6304,8 +6666,9 @@ punpckhwd aso rexr rexx rexb - sse66 0f 69 - V W + /sse=66 0f 69 + V H W + sse2 avx aso rexr rexx rexb @@ -6318,8 +6681,9 @@ punpckhdq aso rexr rexx rexb - sse66 0f 6a - V W + /sse=66 0f 6a + V H W + sse2 avx aso rexr rexx rexb @@ -6332,8 +6696,9 @@ punpcklbw aso rexr rexx rexb - sse66 0f 60 - V W + /sse=66 0f 60 + V H W + sse2 avx aso rexr rexx rexb @@ -6346,8 +6711,9 @@ punpcklwd aso rexr rexx rexb - sse66 0f 61 - V W + /sse=66 0f 61 + V H W + sse2 avx aso rexr rexx rexb @@ -6360,8 +6726,9 @@ punpckldq aso rexr rexx rexb - sse66 0f 62 - V W + /sse=66 0f 62 + V H W + sse2 avx aso rexr rexx rexb @@ -6373,6 +6740,7 @@ pi2fw + aso rexr rexx rexb 0f 0f /3dnow=0c P Q @@ -6381,6 +6749,7 @@ pi2fd + aso rexr rexx rexb 0f 0f /3dnow=0d P Q @@ -6389,6 +6758,7 @@ pf2iw + aso rexr rexx rexb 0f 0f /3dnow=1c P Q @@ -6397,6 +6767,7 @@ pf2id + aso rexr rexx rexb 0f 0f /3dnow=1d P Q @@ -6405,6 +6776,7 @@ pfnacc + aso rexr rexx rexb 0f 0f /3dnow=8a P Q @@ -6413,6 +6785,7 @@ pfpnacc + aso rexr rexx rexb 0f 0f /3dnow=8e P Q @@ -6421,6 +6794,7 @@ pfcmpge + aso rexr rexx rexb 0f 0f /3dnow=90 P Q @@ -6429,6 +6803,7 @@ pfmin + aso rexr rexx rexb 0f 0f /3dnow=94 P Q @@ -6437,6 +6812,7 @@ pfrcp + aso rexr rexx rexb 0f 0f /3dnow=96 P Q @@ -6445,6 +6821,7 @@ pfrsqrt + aso rexr rexx rexb 0f 0f /3dnow=97 P Q @@ -6453,6 +6830,7 @@ pfsub + aso rexr rexx rexb 0f 0f /3dnow=9a P Q @@ -6461,6 +6839,7 @@ pfadd + aso rexr rexx rexb 0f 0f /3dnow=9e P Q @@ -6469,6 +6848,7 @@ pfcmpgt + aso rexr rexx rexb 0f 0f /3dnow=a0 P Q @@ -6477,6 +6857,7 @@ pfmax + aso rexr rexx rexb 0f 0f /3dnow=a4 P Q @@ -6485,6 +6866,7 @@ pfrcpit1 + aso rexr rexx rexb 0f 0f /3dnow=a6 P Q @@ -6493,6 +6875,7 @@ pfrsqit1 + aso rexr rexx rexb 0f 0f /3dnow=a7 P Q @@ -6501,6 +6884,7 @@ pfsubr + aso rexr rexx rexb 0f 0f /3dnow=aa P Q @@ -6509,6 +6893,7 @@ pfacc + aso rexr rexx rexb 0f 0f /3dnow=ae P Q @@ -6517,6 +6902,7 @@ pfcmpeq + aso rexr rexx rexb 0f 0f /3dnow=b0 P Q @@ -6525,6 +6911,7 @@ pfmul + aso rexr rexx rexb 0f 0f /3dnow=b4 P Q @@ -6533,6 +6920,7 @@ pfrcpit2 + aso rexr rexx rexb 0f 0f /3dnow=b6 P Q @@ -6541,6 +6929,7 @@ pmulhrw + aso rexr rexx rexb 0f 0f /3dnow=b7 P Q @@ -6549,6 +6938,7 @@ pswapd + aso rexr rexx rexb 0f 0f /3dnow=bb P Q @@ -6557,6 +6947,7 @@ pavgusb + aso rexr rexx rexb 0f 0f /3dnow=bf P Q @@ -6565,22 +6956,22 @@ push - 06 + 06 /m=!64 ES inv64 - 0e + 0e /m=!64 CS inv64 - 16 + 16 /m=!64 SS inv64 - 1e + 1e /m=!64 DS inv64 @@ -6595,56 +6986,56 @@ oso rexb 50 - rAXr8 - def64 depM + R0v + def64 oso rexb 51 - rCXr9 - def64 depM + R1v + def64 oso rexb 52 - rDXr10 - def64 depM + R2v + def64 oso rexb 53 - rBXr11 - def64 depM + R3v + def64 oso rexb 54 - rSPr12 - def64 depM + R4v + def64 oso rexb 55 - rBPr13 - def64 depM + R5v + def64 oso rexb 56 - rSIr14 - def64 depM + R6v + def64 oso rexb 57 - rDIr15 - def64 depM + R7v + def64 oso 68 - Iz - cast + sIz + def64 aso oso rexw rexr rexx rexb @@ -6653,9 +7044,10 @@ def64 + oso 6a - Ib - sext + sIb + def64 @@ -6663,7 +7055,7 @@ pusha oso - 60 /o=16 + 60 /o=16 /m=!64 inv64 @@ -6672,7 +7064,7 @@ pushad oso - 60 /o=32 + 60 /o=32 /m=!64 inv64 @@ -6681,13 +7073,7 @@ pushfw oso - 9c /m=32 /o=16 - def64 - - - oso - 9c /m=16 /o=16 - def64 + 9c /m=!64 /o=16 oso rexw @@ -6700,13 +7086,7 @@ pushfd oso - 9c /m=16 /o=32 - def64 - - - oso - 9c /m=32 /o=32 - def64 + 9c /m=!64 /o=32 @@ -6728,8 +7108,9 @@ pxor aso rexr rexx rexb - sse66 0f ef - V W + /sse=66 0f ef + V H W + sse2 avx aso rexr rexx rexb @@ -6759,13 +7140,11 @@ aso rexw rexr rexx rexb d2 /reg=2 Eb CL - cast aso oso rexw rexr rexx rexb d3 /reg=2 Ev CL - cast aso oso rexw rexr rexx rexb @@ -6800,13 +7179,11 @@ aso rexw rexr rexx rexb d2 /reg=3 Eb CL - cast aso oso rexw rexr rexx rexb d3 /reg=3 Ev CL - cast @@ -6831,13 +7208,11 @@ aso rexw rexr rexx rexb d2 /reg=0 Eb CL - cast aso oso rexw rexr rexx rexb d3 /reg=0 Ev CL - cast aso oso rexw rexr rexx rexb @@ -6872,22 +7247,21 @@ aso rexw rexr rexx rexb d2 /reg=1 Eb CL - cast aso oso rexw rexr rexx rexb d3 /reg=1 Ev CL - cast rcpps - aso rexr rexx rexb + aso rexr rexx rexb vexl 0f 53 V W + sse avx @@ -6895,8 +7269,9 @@ rcpss aso rexr rexx rexb - ssef3 0f 53 + /sse=f3 0f 53 V W + sse avx @@ -6975,9 +7350,10 @@ rsqrtps - aso rexr rexx rexb + aso rexr rexx rexb vexl 0f 52 V W + sse avx @@ -6985,8 +7361,9 @@ rsqrtss aso rexr rexx rexb - ssef3 0f 52 + /sse=f3 0f 52 V W + sse avx @@ -7004,7 +7381,7 @@ salc - d6 + d6 /m=!64 inv64 @@ -7035,13 +7412,11 @@ aso rexw rexr rexx rexb d2 /reg=7 Eb CL - cast aso oso rexw rexr rexx rexb d3 /reg=7 Ev CL - cast @@ -7066,13 +7441,11 @@ aso rexw rexr rexx rexb d2 /reg=6 Eb CL - cast aso oso rexw rexr rexx rexb d3 /reg=6 Ev CL - cast aso oso rexw rexr rexx rexb @@ -7083,7 +7456,6 @@ aso rexr rexx rexb d2 /reg=4 Eb CL - cast aso oso rexw rexr rexx rexb @@ -7123,7 +7495,6 @@ aso rexw rexr rexx rexb d2 /reg=5 Eb CL - cast aso oso rexw rexr rexx rexb @@ -7144,7 +7515,6 @@ aso oso rexw rexr rexx rexb d3 /reg=5 Ev CL - cast @@ -7177,8 +7547,7 @@ oso rexw 1d - rAX Iz - sext + rAX sIz aso rexr rexx rexb @@ -7188,26 +7557,25 @@ aso oso rexw rexr rexx rexb 81 /reg=3 - Ev Iz - sext + Ev sIz aso rexr rexx rexb - 82 /reg=3 + 82 /reg=3 /m=!64 Eb Ib inv64 aso oso rexw rexr rexx rexb 83 /reg=3 - Ev Ib - sext + Ev sIb scasb + repz ae @@ -7215,7 +7583,7 @@ scasw - oso rexw + repz oso rexw af /o=16 @@ -7223,7 +7591,7 @@ scasd - oso rexw + repz oso rexw af /o=32 @@ -7231,7 +7599,7 @@ scasq - oso rexw + repz oso rexw af /o=64 @@ -7264,7 +7632,7 @@ - setnb + setae aso rexr rexx rexb 0f 93 @@ -7448,9 +7816,10 @@ shufpd - aso rexr rexx rexb - sse66 0f c6 - V W Ib + aso rexr rexx rexb vexl + /sse=66 0f c6 + V H W Ib + sse2 avx @@ -7459,7 +7828,8 @@ aso rexr rexx rexb 0f c6 - V W Ib + V H W Ib + sse2 avx @@ -7475,7 +7845,7 @@ sldt - aso oso rexr rexx rexb + aso oso rexr rexw rexx rexb 0f 00 /reg=0 MwRv @@ -7484,18 +7854,24 @@ smsw - aso rexr rexx rexb + aso oso rexr rexw rexx rexb 0f 01 /reg=4 /mod=!11 - M + MwRv + + + aso oso rexr rexw rexx rexb + 0f 01 /reg=4 /mod=11 + MwRv sqrtps - aso rexr rexx rexb + aso rexr rexx rexb vexl 0f 51 V W + sse avx @@ -7503,8 +7879,9 @@ sqrtpd aso rexr rexx rexb - sse66 0f 51 + /sse=66 0f 51 V W + sse2 avx @@ -7512,8 +7889,9 @@ sqrtsd aso rexr rexx rexb - ssef2 0f 51 - V W + /sse=f2 0f 51 + V H W + sse2 avx @@ -7521,8 +7899,9 @@ sqrtss aso rexr rexx rexb - ssef3 0f 51 - V W + /sse=f3 0f 51 + V H W + sse avx @@ -7567,15 +7946,16 @@ stmxcsr aso rexw rexr rexx rexb - 0f ae /mod=11 /reg=3 + 0f ae /mod=!11 /reg=3 Md + sse avx stosb - seg + rep seg aa @@ -7583,7 +7963,7 @@ stosw - seg oso rexw + rep seg oso rexw ab /o=16 @@ -7591,7 +7971,7 @@ stosd - seg oso rexw + rep seg oso rexw ab /o=32 @@ -7599,7 +7979,7 @@ stosq - seg oso rexw + rep seg oso rexw ab /o=64 @@ -7607,9 +7987,9 @@ str - aso oso rexr rexx rexb + aso oso rexr rexw rexx rexb 0f 00 /reg=1 - Ev + MwRv @@ -7642,8 +8022,7 @@ oso rexw 2d - rAX Iz - sext + rAX sIz aso rexr rexx rexb @@ -7653,38 +8032,38 @@ aso oso rexw rexr rexx rexb 81 /reg=5 - Ev Iz - sext + Ev sIz aso rexr rexx rexb - 82 /reg=5 + 82 /reg=5 /m=!64 Eb Ib inv64 aso oso rexw rexr rexx rexb 83 /reg=5 - Ev Ib - sext + Ev sIb subpd - aso rexr rexx rexb - sse66 0f 5c - V W + aso rexr rexx rexb vexl + /sse=66 0f 5c + V H W + sse2 avx subps - aso rexr rexx rexb + aso rexr rexx rexb vexl 0f 5c - V W + V H W + sse avx @@ -7692,8 +8071,9 @@ subsd aso rexr rexx rexb - ssef2 0f 5c - V W + /sse=f2 0f 5c + V H W + sse2 avx @@ -7701,8 +8081,9 @@ subss aso rexr rexx rexb - ssef3 0f 5c - V W + /sse=f3 0f 5c + V H W + sse avx @@ -7723,15 +8104,22 @@ sysenter - 0f 34 - inv64 + 0f 34 /m=!64 + + + 0f 34 /m=64 + intel sysexit - 0f 35 + 0f 35 /m=!64 + + + 0f 35 /m=64 + intel @@ -7766,8 +8154,7 @@ oso rexw a9 - rAX Iz - sext + rAX sIz aso rexw rexr rexx rexb @@ -7777,14 +8164,12 @@ aso oso rexw rexr rexx rexb f7 /reg=0 - Ev Iz - sext + Ev sIz aso oso rexw rexr rexx rexb f7 /reg=1 Ev Iz - sext @@ -7792,8 +8177,9 @@ ucomisd aso rexr rexx rexb - sse66 0f 2e + /sse=66 0f 2e V W + sse2 avx @@ -7803,6 +8189,7 @@ aso rexr rexx rexb 0f 2e V W + sse avx @@ -7816,9 +8203,10 @@ unpckhpd - aso rexr rexx rexb - sse66 0f 15 - V W + aso rexr rexx rexb vexl + /sse=66 0f 15 + V H W + sse2 avx @@ -7827,7 +8215,8 @@ aso rexr rexx rexb 0f 15 - V W + V H W + sse avx @@ -7836,16 +8225,18 @@ aso rexr rexx rexb 0f 14 - V W + V H W + sse avx unpcklpd - aso rexr rexx rexb - sse66 0f 14 - V W + aso rexr rexx rexb vexl + /sse=66 0f 14 + V H W + sse2 avx @@ -7876,11 +8267,21 @@ + rdrand + + oso rexr rexw rexx rexb + 0f c7 /mod=11 /reg=6 + R + + rdrand + + + vmclear intel aso rexr rexx rexb - sse66 0f c7 /reg=6 + /sse=66 0f c7 /mod=!11 /reg=6 Mq @@ -7890,7 +8291,7 @@ intel aso rexr rexx rexb - ssef3 0f c7 /reg=6 + /sse=f3 0f c7 /mod=!11 /reg=6 Mq @@ -7900,7 +8301,7 @@ intel aso rexr rexx rexb - 0f c7 /reg=6 + 0f c7 /mod=!11 /reg=6 Mq @@ -7910,7 +8311,7 @@ intel aso rexr rexx rexb - 0f c7 /reg=7 + 0f c7 /mod=!11 /reg=7 Mq @@ -7944,20 +8345,8 @@ intel aso rexr rexx rexb - 0f 78 /m=16 - Ed Gd - def64 - - - aso rexr rexx rexb - 0f 78 /m=32 - Ed Gd - def64 - - - aso rexr rexx rexb - 0f 78 /m=64 - Eq Gq + 0f 78 + Ey Gy def64 @@ -7967,20 +8356,8 @@ intel aso rexr rexx rexb - 0f 79 /m=16 - Gd Ed - def64 - - - aso rexr rexx rexb - 0f 79 /m=32 - Gd Ed - def64 - - - aso rexr rexx rexb - 0f 79 /m=64 - Gq Eq + 0f 79 + Gy Ey def64 @@ -8067,49 +8444,56 @@ oso rexw rexb 90 - rAXr8 rAX + R0v rAX oso rexw rexb 91 - rCXr9 rAX + R1v rAX oso rexw rexb 92 - rDXr10 rAX + R2v rAX oso rexw rexb 93 - rBXr11 rAX + R3v rAX oso rexw rexb 94 - rSPr12 rAX + R4v rAX oso rexw rexb 95 - rBPr13 rAX + R5v rAX oso rexw rexb 96 - rSIr14 rAX + R6v rAX oso rexw rexb 97 - rDIr15 rAX + R7v rAX + xgetbv + + 0f 01 /mod=11 /reg=2 /rm=0 + + + + xlatb - rexw + rexw seg d7 @@ -8143,8 +8527,7 @@ oso rexw 35 - rAX Iz - sext + rAX sIz aso rexr rexx rexb @@ -8154,29 +8537,28 @@ aso oso rexw rexr rexx rexb 81 /reg=6 - Ev Iz - sext + Ev sIz aso rexr rexx rexb - 82 /reg=6 + 82 /reg=6 /m=!64 Eb Ib inv64 aso oso rexw rexr rexx rexb 83 /reg=6 - Ev Ib - sext + Ev sIb xorpd - aso rexr rexx rexb - sse66 0f 57 - V W + aso rexr rexx rexb vexl + /sse=66 0f 57 + V H W + sse2 avx @@ -8185,7 +8567,8 @@ aso rexr rexx rexb 0f 57 - V W + V H W + sse2 avx @@ -8225,6 +8608,31 @@ + xrstor + + aso rexw rexr rexx rexb + 0f ae /reg=5 /mod=!11 + M + + + + + xsave + + aso rexw rexr rexx rexb + 0f ae /reg=4 /mod=!11 + M + + + + + xsetbv + + 0f 01 /mod=11 /reg=2 /rm=1 + + + + xsha1 0f a6 /mod=11 /rm=0 /reg=1 @@ -8246,7 +8654,25 @@ - db + pclmulqdq + + aso rexr rexx rexb + /sse=66 0f 3a 44 + V H W Ib + aesni avx + + + + + + + getsec + smx + + 0f 37 + - - addsubpd + haddpd - aso rexr rexx rexb - sse66 0f d0 - V W + aso rexr rexx rexb vexl + /sse=66 0f 7c + V H W + sse3 avx - addsubps + haddps - aso rexr rexx rexb - ssef2 0f d0 - V W + aso rexr rexx rexb vexl + /sse=f2 0f 7c + V H W + sse3 avx - haddpd + hsubpd - aso rexr rexx rexb - sse66 0f 7c - V W + aso rexr rexx rexb vexl + /sse=66 0f 7d + V H W + sse3 avx - haddps + hsubps - aso rexr rexx rexb - ssef2 0f 7c - V W + aso rexr rexx rexb vexl + /sse=f2 0f 7d + V H W + sse3 avx - hsubpd + insertps - aso rexr rexx rexb - sse66 0f 7d - V W + aso rexr rexw rexx rexb + /sse=66 0f 3a 21 + V H Md Ib + sse4.1 avx - hsubps + lddqu - aso rexr rexx rexb - ssef2 0f 7d - V W + aso rexr rexx rexb vexl + /sse=f2 0f f0 + V M + sse3 avx @@ -8466,41 +8915,46 @@ movddup aso rexr rexx rexb - ssef2 0f 12 /mod=11 + /sse=f2 0f 12 /mod=11 V W aso rexr rexx rexb - ssef2 0f 12 /mod=!11 + /sse=f2 0f 12 /mod=!11 V W + sse3 avx movshdup - aso rexr rexx rexb - ssef3 0f 16 /mod=11 + aso rexr rexx rexb vexl + /sse=f3 0f 16 /mod=11 V W + sse3 avx - aso rexr rexx rexb - ssef3 0f 16 /mod=!11 + aso rexr rexx rexb vexl + /sse=f3 0f 16 /mod=!11 V W + sse3 avx movsldup - aso rexr rexx rexb - ssef3 0f 12 /mod=11 + aso rexr rexx rexb vexl + /sse=f3 0f 12 /mod=11 V W + sse3 avx - aso rexr rexx rexb - ssef3 0f 12 /mod=!11 + aso rexr rexx rexb vexl + /sse=f3 0f 12 /mod=!11 V W + sse3 avx @@ -8514,11 +8968,13 @@ aso rexr rexx rexb 0f 38 1c P Q + ssse3 - aso rexr rexx rexb - sse66 0f 38 1c + aso rexr rexx rexb vexl + /sse=66 0f 38 1c V W + ssse3 avx @@ -8528,11 +8984,13 @@ aso rexr rexx rexb 0f 38 1d P Q + ssse3 - aso rexr rexx rexb - sse66 0f 38 1d + aso rexr rexx rexb vexl + /sse=66 0f 38 1d V W + ssse3 avx @@ -8542,16 +9000,18 @@ aso rexr rexx rexb 0f 38 1e P Q + ssse3 - aso rexr rexx rexb - sse66 0f 38 1e + aso rexr rexx rexb vexl + /sse=66 0f 38 1e V W + ssse3 avx - psignb + pshufb aso rexr rexx rexb 0f 38 00 @@ -8559,8 +9019,9 @@ aso rexr rexx rexb - sse66 0f 38 00 - V W + /sse=66 0f 38 00 + V H W + ssse3 avx @@ -8573,8 +9034,9 @@ aso rexr rexx rexb - sse66 0f 38 01 - V W + /sse=66 0f 38 01 + V H W + ssse3 avx @@ -8587,8 +9049,9 @@ aso rexr rexx rexb - sse66 0f 38 02 - V W + /sse=66 0f 38 02 + V H W + ssse3 avx @@ -8601,8 +9064,9 @@ aso rexr rexx rexb - sse66 0f 38 03 - V W + /sse=66 0f 38 03 + V H W + ssse3 avx @@ -8615,8 +9079,9 @@ aso rexr rexx rexb - sse66 0f 38 04 - V W + /sse=66 0f 38 04 + V H W + ssse3 avx @@ -8629,8 +9094,9 @@ aso rexr rexx rexb - sse66 0f 38 05 - V W + /sse=66 0f 38 05 + V H W + ssse3 avx @@ -8643,8 +9109,9 @@ aso rexr rexx rexb - sse66 0f 38 06 - V W + /sse=66 0f 38 06 + V H W + ssse3 avx @@ -8657,8 +9124,9 @@ aso rexr rexx rexb - sse66 0f 38 07 - V W + /sse=66 0f 38 07 + V H W + ssse3 avx @@ -8671,8 +9139,9 @@ aso rexr rexx rexb - sse66 0f 38 08 - V W + /sse=66 0f 38 08 + V H W + ssse3 avx @@ -8685,8 +9154,9 @@ aso rexr rexx rexb - sse66 0f 38 0a - V W + /sse=66 0f 38 0a + V H W + ssse3 avx @@ -8699,8 +9169,9 @@ aso rexr rexx rexb - sse66 0f 38 09 - V W + /sse=66 0f 38 09 + V H W + ssse3 avx @@ -8713,8 +9184,9 @@ aso rexr rexx rexb - sse66 0f 38 0b - V W + /sse=66 0f 38 0b + V H W + ssse3 avx @@ -8727,8 +9199,9 @@ aso rexr rexx rexb - sse66 0f 3a 0f - V W Ib + /sse=66 0f 3a 0f + V H W Ib + ssse3 avx @@ -8740,8 +9213,9 @@ pblendvb aso rexr rexx rexb - sse66 0f 38 10 + /sse=66 0f 38 10 V W + sse4.1 @@ -8749,8 +9223,9 @@ pmuldq aso rexr rexx rexb - sse66 0f 38 28 - V W + /sse=66 0f 38 28 + V H W + sse4.1 avx @@ -8758,8 +9233,9 @@ pminsb aso rexr rexx rexb - sse66 0f 38 38 - V W + /sse=66 0f 38 38 + V H W + sse4.1 avx @@ -8767,8 +9243,9 @@ pminsd aso rexr rexx rexb - sse66 0f 38 39 - V W + /sse=66 0f 38 39 + V H W + sse4.1 avx @@ -8776,8 +9253,9 @@ pminuw aso rexr rexx rexb - sse66 0f 38 3a - V W + /sse=66 0f 38 3a + V H W + sse4.1 avx @@ -8785,8 +9263,9 @@ pminud aso rexr rexx rexb - sse66 0f 38 3b - V W + /sse=66 0f 38 3b + V H W + sse4.1 avx @@ -8794,8 +9273,9 @@ pmaxsb aso rexr rexx rexb - sse66 0f 38 3c - V W + /sse=66 0f 38 3c + V H W + sse4.1 avx @@ -8803,8 +9283,9 @@ pmaxsd aso rexr rexx rexb - sse66 0f 38 3d - V W + /sse=66 0f 38 3d + V H W + sse4.1 avx @@ -8812,8 +9293,19 @@ pmaxud aso rexr rexx rexb - sse66 0f 38 3f - V W + /sse=66 0f 38 3f + V H W + sse4.1 avx + + + + + pmaxuw + + aso rexr rexx rexb + /sse=66 0f 38 3e + V H W + sse4.1 avx @@ -8821,8 +9313,9 @@ pmulld aso rexr rexx rexb - sse66 0f 38 40 - V W + /sse=66 0f 38 40 + V H W + sse4.1 avx @@ -8830,26 +9323,29 @@ phminposuw aso rexr rexx rexb - sse66 0f 38 41 + /sse=66 0f 38 41 V W + sse4.1 avx roundps - aso rexr rexx rexb - sse66 0f 3a 08 + aso rexr rexx rexb vexl + /sse=66 0f 3a 08 V W Ib + sse avx roundpd - aso rexr rexx rexb - sse66 0f 3a 09 + aso rexr rexx rexb vexl + /sse=66 0f 3a 09 V W Ib + sse4.1 avx @@ -8857,8 +9353,9 @@ roundss aso rexr rexx rexb - sse66 0f 3a 0a - V W Ib + /sse=66 0f 3a 0a + V H W Ib + sse4.1 avx @@ -8866,89 +9363,448 @@ roundsd aso rexr rexx rexb - sse66 0f 3a 0b - V W Ib + /sse=66 0f 3a 0b + V H W Ib + sse4.1 avx blendpd - aso rexr rexx rexb - sse66 0f 3a 0d - V W Ib + aso rexr rexx rexb vexl + /sse=66 0f 3a 0d + V H W Ib + sse4.1 avx - pblendw + blendps aso rexr rexx rexb - sse66 0f 3a 0e - V W Ib + /sse=66 0f 3a 0c + V H W Ib + sse4.1 avx - blendps + blendvpd aso rexr rexx rexb - sse66 0f 3a 0c - V W Ib + /sse=66 0f 38 15 + V W + sse4.1 - blendvpd + blendvps aso rexr rexx rexb - sse66 0f 38 15 + /sse=66 0f 38 14 V W + sse4.1 - blendvps + bound + + aso oso + 62 /m=!64 + Gv M + + + + + bsf + + aso oso rexw rexr rexx rexb + 0f bc + Gv Ev + + + + + bsr + + aso oso rexw rexr rexx rexb + 0f bd + Gv Ev + + + + + bswap + + oso rexw rexb + 0f c8 + R0y + + + oso rexw rexb + 0f c9 + R1y + + + oso rexw rexb + 0f ca + R2y + + + oso rexw rexb + 0f cb + R3y + + + oso rexw rexb + 0f cc + R4y + + + oso rexw rexb + 0f cd + R5y + + + oso rexw rexb + 0f ce + R6y + + + oso rexw rexb + 0f cf + R7y + + + + + bt + + aso oso rexw rexr rexx rexb + 0f ba /reg=4 + Ev Ib + + + aso oso rexw rexr rexx rexb + 0f a3 + Ev Gv + + + + + btc + + aso oso rexw rexr rexx rexb + 0f bb + Ev Gv + + + aso oso rexw rexr rexx rexb + 0f ba /reg=7 + Ev Ib + + + + + btr + + aso oso rexw rexr rexx rexb + 0f b3 + Ev Gv + + + aso oso rexw rexr rexx rexb + 0f ba /reg=6 + Ev Ib + + + + + bts + + aso oso rexw rexr rexx rexb + 0f ab + Ev Gv + + + aso oso rexw rexr rexx rexb + 0f ba /reg=5 + Ev Ib + + + + + pblendw aso rexr rexx rexb - sse66 0f 38 14 + /sse=66 0f 3a 0e + V H W Ib + sse4.1 avx + + + + + mpsadbw + + aso rexr rexx rexb vexl + /sse=66 0f 3a 42 + V H W Ib + sse4.1 avx + + + + + movntdqa + + aso rexr rexw rexx rexb vexl + /sse=66 0f 38 2a + V M + sse4.1 avx + + + + + packusdw + + aso rexr rexw rexx rexb vexl + /sse=66 0f 38 2b + V H W + sse2 avx + + + + + pmovsxbw + + aso rexr rexw rexx rexb + /sse=66 0f 38 20 + V MqU + sse4.1 avx + + + + + pmovsxbd + + aso rexr rexw rexx rexb + /sse=66 0f 38 21 + V MdU + sse4.1 avx + + + + + pmovsxbq + + aso rexr rexw rexx rexb + /sse=66 0f 38 22 + V MwU + sse4.1 avx + + + + + pmovsxwd + + aso rexr rexw rexx rexb + /sse=66 0f 38 23 + V MqU + sse4.1 avx + + + + + pmovsxwq + + aso rexr rexw rexx rexb + /sse=66 0f 38 24 + V MdU + sse4.1 avx + + + + + pmovsxdq + + aso rexr rexw rexx rexb + /sse=66 0f 38 25 + V MqU + sse4.1 + + + + + pmovzxbw + + aso rexr rexw rexx rexb + /sse=66 0f 38 30 + V MqU + sse4.1 avx + + + + + pmovzxbd + + aso rexr rexw rexx rexb + /sse=66 0f 38 31 + V MdU + sse4.1 avx + + + + + pmovzxbq + + aso rexr rexw rexx rexb + /sse=66 0f 38 32 + V MwU + sse4.1 avx + + + + + pmovzxwd + + aso rexr rexw rexx rexb + /sse=66 0f 38 33 + V MqU + sse4.1 avx + + + + + pmovzxwq + + aso rexr rexw rexx rexb + /sse=66 0f 38 34 + V MdU + sse4.1 avx + + + + + pmovzxdq + + aso rexr rexw rexx rexb + /sse=66 0f 38 35 + V MqU + sse4.1 avx + + + + + pcmpeqq + + aso rexr rexw rexx rexb + /sse=66 0f 38 29 + V H W + sse4.1 avx + + + + + popcnt + + aso oso rexr rexw rexx rexb + /sse=f3 0f b8 + Gv Ev + + sse4.2 + + + + ptest + + aso rexr rexw rexx rexb vexl + /sse=66 0f 38 17 V W + sse4.1 avx - dpps + pcmpestri - aso rexr rexx rexb - sse66 0f 3a 40 + aso rexr rexw rexx rexb + /sse=66 0f 3a 61 V W Ib + sse4.2 avx - dppd + pcmpestrm - aso rexr rexx rexb - sse66 0f 3a 41 + aso rexr rexw rexx rexb + /sse=66 0f 3a 60 V W Ib + sse4.2 avx - mpsadbw + pcmpgtq - aso rexr rexx rexb - sse66 0f 3a 42 + aso rexr rexw rexx rexb + /sse=66 0f 38 37 + V H W + sse4.2 avx + + + + + pcmpistri + + aso rexr rexw rexx rexb + /sse=66 0f 3a 63 V W Ib + sse4.2 avx - extractps + pcmpistrm - aso rexr rexw rexb - sse66 0f 3a 17 - MdRy V Ib + aso rexr rexw rexx rexb + /sse=66 0f 3a 62 + V W Ib + sse4.2 avx + + + + + movbe + + aso oso rexr rexw rexx rexb + 0f 38 f0 + Gv Mv + sse3 atom + + + aso oso rexr rexw rexx rexb + 0f 38 f1 + Mv Gv + sse3 atom + + + + + crc32 + + aso oso rexr rexw rexx rexb + /sse=f2 0f 38 f0 + Gy Eb + sse4.2 + + + aso oso rexr rexw rexx rexb + /sse=f2 0f 38 f1 + Gy Ev + sse4.2 @@ -8956,4 +9812,288 @@ invalid + + vbroadcastss + + aso rexr rexx rexb vexl + /vex=66_0f38 18 /vexw=0 + V Md + avx + + + + + vbroadcastsd + + aso rexr rexx rexb vexl + /vex=66_0f38 19 /vexw=0 /vexl=1 + Vqq Mq + avx + + + + + vextractf128 + + aso rexr rexx rexb vexl + /vex=66_0f3a 19 /vexw=0 /vexl=1 + Wdq Vqq Ib + avx + + + + + vinsertf128 + + aso rexr rexx rexb vexl + /vex=66_0f3a 18 /vexw=0 /vexl=1 + Vqq Hqq Wdq Ib + avx + + + + + vmaskmovps + + aso rexr rexx rexb vexl + /vex=66_0f38 2c /vexw=0 + V H M + avx + + + aso rexr rexx rexb vexl + /vex=66_0f38 2e /vexw=0 + M H V + avx + + + + + vmaskmovpd + + aso rexr rexx rexb vexl + /vex=66_0f38 2d /vexw=0 + V H M + avx + + + aso rexr rexx rexb vexl + /vex=66_0f38 2f /vexw=0 + M H V + avx + + + + + vpermilpd + + aso rexr rexx rexb vexl + /vex=66_0f38 0d /vexw=0 + Vx Hx Wx + avx + + + aso rexr rexx rexb vexl + /vex=66_0f3a 05 /vexw=0 + V W Ib + avx + + + + + vpermilps + + aso rexr rexx rexb vexl + /vex=66_0f38 0c /vexw=0 + Vx Hx Wx + avx + + + aso rexr rexx rexb vexl + /vex=66_0f3a 04 /vexw=0 + Vx Wx Ib + avx + + + + + vperm2f128 + + aso rexr rexx rexb vexl + /vex=66_0f3a 06 /vexw=0 /vexl=1 + Vqq Hqq Wqq Ib + avx + + + + + vtestps + + aso rexr rexx rexb vexl + /vex=66_0f38 0e /vexw=0 + Vx Wx + avx + + + + + vtestpd + + aso rexr rexx rexb vexl + /vex=66_0f38 0f /vexw=0 + Vx Wx + avx + + + + + vzeroupper + + /vex=0f 77 /vexl=0 + avx + + + + + vzeroall + + /vex=0f 77 /vexl=1 + avx + + + + + vblendvpd + + aso rexr rexx rexb vexl + /vex=66_0f3a 4b /vexw=0 + Vx Hx Wx Lx + avx + + + + + vblendvps + + aso rexr rexx rexb vexl + /vex=66_0f3a 4a /vexw=0 + Vx Hx Wx Lx + avx + + + + + vmovsd + + aso rexr rexx rexb + /vex=f2_0f 10 /mod=11 + V H U + avx + + + aso rexr rexx rexb + /vex=f2_0f 10 /mod=!11 + V Mq + avx + + + aso rexr rexx rexb + /vex=f2_0f 11 /mod=11 + U H V + avx + + + aso rexr rexx rexb + /vex=f2_0f 11 /mod=!11 + Mq V + avx + + + + + vmovss + + aso rexr rexx rexb + /vex=f3_0f 10 /mod=11 + V H U + avx + + + aso rexr rexx rexb + /vex=f3_0f 10 /mod=!11 + V Md + avx + + + aso rexr rexx rexb + /vex=f3_0f 11 /mod=11 + U H V + avx + + + aso rexr rexx rexb + /vex=f3_0f 11 /mod=!11 + Md V + avx + + + + + vpblendvb + + aso rexr rexx rexb + /vex=66_0f3a 4c /vexw=0 + V H W L + avx + + + + + vpsllw + + aso rexr rexx rexb + /vex=66_0f f1 /vexl=0 + V H W + avx + + + aso rexr rexx rexb + /vex=66_0f 71 /reg=6 /vexl=0 + H V W + avx + + + + + vpslld + + aso rexr rexx rexb + /vex=66_0f f2 /vexl=0 + V H W + avx + + + aso rexr rexx rexb + /vex=66_0f 72 /reg=6 /vexl=0 + H V W + avx + + + + + vpsllq + + aso rexr rexx rexb + /vex=66_0f f3 /vexl=0 + V H W + avx + + + aso rexr rexx rexb + /vex=66_0f 73 /reg=6 /vexl=0 + H V W + avx + + + diff -Nuar a/Source/JavaScriptCore/disassembler/udis86/udis86.c b/Source/JavaScriptCore/disassembler/udis86/udis86.c --- a/Source/JavaScriptCore/disassembler/udis86/udis86.c 2016-05-21 18:54:11.000000000 +0300 +++ b/Source/JavaScriptCore/disassembler/udis86/udis86.c 2019-06-10 00:48:46.000000000 +0300 @@ -1,6 +1,6 @@ /* udis86 - libudis86/udis86.c * - * Copyright (c) 2002-2009 Vivek Thampi + * Copyright (c) 2002-2013 Vivek Thampi * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification, @@ -28,16 +28,19 @@ #if USE(UDIS86) -#include "udis86_input.h" +#include "udis86_udint.h" #include "udis86_extern.h" +#include "udis86_decode.h" -#ifndef __UD_STANDALONE__ -# include -# include -#endif /* __UD_STANDALONE__ */ +#if !defined(__UD_STANDALONE__) +#include +#endif /* !__UD_STANDALONE__ */ + +static void ud_inp_init(struct ud *u); /* ============================================================================= - * ud_init() - Initializes ud_t object. + * ud_init + * Initializes ud_t object. * ============================================================================= */ extern void @@ -50,30 +53,34 @@ #ifndef __UD_STANDALONE__ ud_set_input_file(u, stdin); #endif /* __UD_STANDALONE__ */ + + ud_set_asm_buffer(u, u->asm_buf_int, sizeof(u->asm_buf_int)); } + /* ============================================================================= - * ud_disassemble() - disassembles one instruction and returns the number of - * bytes disassembled. A zero means end of disassembly. + * ud_disassemble + * Disassembles one instruction and returns the number of + * bytes disassembled. A zero means end of disassembly. * ============================================================================= */ extern unsigned int ud_disassemble(struct ud* u) { - if (ud_input_end(u)) - return 0; - - - u->insn_buffer[0] = u->insn_hexcode[0] = 0; - - - if (ud_decode(u) == 0) - return 0; - if (u->translator) - u->translator(u); - return ud_insn_len(u); + int len; + if (u->inp_end) { + return 0; + } + if ((len = ud_decode(u)) > 0) { + if (u->translator != NULL) { + u->asm_buf[0] = '\0'; + u->translator(u); + } + } + return len; } + /* ============================================================================= * ud_set_mode() - Set Disassemly Mode. * ============================================================================= @@ -82,10 +89,10 @@ ud_set_mode(struct ud* u, uint8_t m) { switch(m) { - case 16: - case 32: - case 64: u->dis_mode = m ; return; - default: u->dis_mode = 16; return; + case 16: + case 32: + case 64: u->dis_mode = m ; return; + default: u->dis_mode = 16; return; } } @@ -97,14 +104,14 @@ ud_set_vendor(struct ud* u, unsigned v) { switch(v) { - case UD_VENDOR_INTEL: - u->vendor = v; - break; - case UD_VENDOR_ANY: - u->vendor = v; - break; - default: - u->vendor = UD_VENDOR_AMD; + case UD_VENDOR_INTEL: + u->vendor = v; + break; + case UD_VENDOR_ANY: + u->vendor = v; + break; + default: + u->vendor = UD_VENDOR_AMD; } } @@ -132,18 +139,18 @@ * ud_insn() - returns the disassembled instruction * ============================================================================= */ -extern char* -ud_insn_asm(struct ud* u) +const char* +ud_insn_asm(const struct ud* u) { - return u->insn_buffer; + return u->asm_buf; } /* ============================================================================= * ud_insn_offset() - Returns the offset. * ============================================================================= */ -extern uint64_t -ud_insn_off(struct ud* u) +uint64_t +ud_insn_off(const struct ud* u) { return u->insn_offset; } @@ -153,30 +160,303 @@ * ud_insn_hex() - Returns hex form of disassembled instruction. * ============================================================================= */ -extern char* +const char* ud_insn_hex(struct ud* u) { + u->insn_hexcode[0] = 0; + if (!u->error) { + unsigned int i; + const unsigned char *src_ptr = ud_insn_ptr(u); + char* src_hex = (char*) u->insn_hexcode; + char* const src_hex_base = src_hex; + /* for each byte used to decode instruction */ + for (i = 0; i < ud_insn_len(u) && i < sizeof(u->insn_hexcode) / 2; + ++i, ++src_ptr) { + snprintf(src_hex, sizeof(u->insn_hexcode) - (src_hex - src_hex_base), "%02x", *src_ptr & 0xFF); + src_hex += 2; + } + } return u->insn_hexcode; } + /* ============================================================================= - * ud_insn_ptr() - Returns code disassembled. + * ud_insn_ptr + * Returns a pointer to buffer containing the bytes that were + * disassembled. * ============================================================================= */ -extern uint8_t* -ud_insn_ptr(struct ud* u) +extern const uint8_t* +ud_insn_ptr(const struct ud* u) { - return u->inp_sess; + return (u->inp_buf == NULL) ? + u->inp_sess : u->inp_buf + (u->inp_buf_index - u->inp_ctr); } + /* ============================================================================= - * ud_insn_len() - Returns the count of bytes disassembled. + * ud_insn_len + * Returns the count of bytes disassembled. * ============================================================================= */ extern unsigned int -ud_insn_len(struct ud* u) +ud_insn_len(const struct ud* u) { return u->inp_ctr; } + +/* ============================================================================= + * ud_insn_get_opr + * Return the operand struct representing the nth operand of + * the currently disassembled instruction. Returns NULL if + * there's no such operand. + * ============================================================================= + */ +const struct ud_operand* +ud_insn_opr(const struct ud *u, unsigned int n) +{ + if (n > 3 || u->operand[n].type == UD_NONE) { + return NULL; + } else { + return &u->operand[n]; + } +} + + +/* ============================================================================= + * ud_opr_is_sreg + * Returns non-zero if the given operand is of a segment register type. + * ============================================================================= + */ +int +ud_opr_is_sreg(const struct ud_operand *opr) +{ + return opr->type == UD_OP_REG && + opr->base >= UD_R_ES && + opr->base <= UD_R_GS; +} + + +/* ============================================================================= + * ud_opr_is_sreg + * Returns non-zero if the given operand is of a general purpose + * register type. + * ============================================================================= + */ +int +ud_opr_is_gpr(const struct ud_operand *opr) +{ + return opr->type == UD_OP_REG && + opr->base >= UD_R_AL && + opr->base <= UD_R_R15; +} + + +/* ============================================================================= + * ud_set_user_opaque_data + * ud_get_user_opaque_data + * Get/set user opaqute data pointer + * ============================================================================= + */ +void +ud_set_user_opaque_data(struct ud * u, void* opaque) +{ + u->user_opaque_data = opaque; +} + +void* +ud_get_user_opaque_data(const struct ud *u) +{ + return u->user_opaque_data; +} + + +/* ============================================================================= + * ud_set_asm_buffer + * Allow the user to set an assembler output buffer. If `buf` is NULL, + * we switch back to the internal buffer. + * ============================================================================= + */ +void +ud_set_asm_buffer(struct ud *u, char *buf, size_t size) +{ + if (buf == NULL) { + ud_set_asm_buffer(u, u->asm_buf_int, sizeof(u->asm_buf_int)); + } else { + u->asm_buf = buf; + u->asm_buf_size = size; + } +} + + +/* ============================================================================= + * ud_set_sym_resolver + * Set symbol resolver for relative targets used in the translation + * phase. + * + * The resolver is a function that takes a uint64_t address and returns a + * symbolic name for the that address. The function also takes a second + * argument pointing to an integer that the client can optionally set to a + * non-zero value for offsetted targets. (symbol+offset) The function may + * also return NULL, in which case the translator only prints the target + * address. + * + * The function pointer maybe NULL which resets symbol resolution. + * ============================================================================= + */ +void +ud_set_sym_resolver(struct ud *u, const char* (*resolver)(struct ud*, + uint64_t addr, + int64_t *offset)) +{ + u->sym_resolver = resolver; +} + + +/* ============================================================================= + * ud_insn_mnemonic + * Return the current instruction mnemonic. + * ============================================================================= + */ +enum ud_mnemonic_code +ud_insn_mnemonic(const struct ud *u) +{ + return u->mnemonic; +} + + +/* ============================================================================= + * ud_lookup_mnemonic + * Looks up mnemonic code in the mnemonic string table. + * Returns NULL if the mnemonic code is invalid. + * ============================================================================= + */ +const char* +ud_lookup_mnemonic(enum ud_mnemonic_code c) +{ + if (c < UD_MAX_MNEMONIC_CODE) { + return ud_mnemonics_str[c]; + } else { + return NULL; + } +} + + +/* + * ud_inp_init + * Initializes the input system. + */ +static void +ud_inp_init(struct ud *u) +{ + u->inp_hook = NULL; + u->inp_buf = NULL; + u->inp_buf_size = 0; + u->inp_buf_index = 0; + u->inp_curr = 0; + u->inp_ctr = 0; + u->inp_end = 0; + u->inp_peek = UD_EOI; + UD_NON_STANDALONE(u->inp_file = NULL); +} + + +/* ============================================================================= + * ud_inp_set_hook + * Sets input hook. + * ============================================================================= + */ +void +ud_set_input_hook(register struct ud* u, int (*hook)(struct ud*)) +{ + ud_inp_init(u); + u->inp_hook = hook; +} + +/* ============================================================================= + * ud_inp_set_buffer + * Set buffer as input. + * ============================================================================= + */ +void +ud_set_input_buffer(register struct ud* u, const uint8_t* buf, size_t len) +{ + ud_inp_init(u); + u->inp_buf = buf; + u->inp_buf_size = len; + u->inp_buf_index = 0; +} + + +#ifndef __UD_STANDALONE__ +/* ============================================================================= + * ud_input_set_file + * Set FILE as input. + * ============================================================================= + */ +static int +inp_file_hook(struct ud* u) +{ + return fgetc(u->inp_file); +} + +void +ud_set_input_file(register struct ud* u, FILE* f) +{ + ud_inp_init(u); + u->inp_hook = inp_file_hook; + u->inp_file = f; +} +#endif /* __UD_STANDALONE__ */ + + +/* ============================================================================= + * ud_input_skip + * Skip n input bytes. + * ============================================================================ + */ +void +ud_input_skip(struct ud* u, size_t n) +{ + if (u->inp_end) { + return; + } + if (u->inp_buf == NULL) { + while (n--) { + int c = u->inp_hook(u); + if (c == UD_EOI) { + goto eoi; + } + } + return; + } else { + if (n > u->inp_buf_size || + u->inp_buf_index > u->inp_buf_size - n) { + u->inp_buf_index = u->inp_buf_size; + goto eoi; + } + u->inp_buf_index += n; + return; + } +eoi: + u->inp_end = 1; + UDERR(u, "cannot skip, eoi received\b"); + return; +} + + +/* ============================================================================= + * ud_input_end + * Returns non-zero on end-of-input. + * ============================================================================= + */ +int +ud_input_end(const struct ud *u) +{ + return u->inp_end; +} + #endif // USE(UDIS86) + +/* vim:set ts=2 sw=2 expandtab */ diff -Nuar a/Source/JavaScriptCore/disassembler/udis86/udis86_decode.c b/Source/JavaScriptCore/disassembler/udis86/udis86_decode.c --- a/Source/JavaScriptCore/disassembler/udis86/udis86_decode.c 2017-06-04 23:16:05.000000000 +0300 +++ b/Source/JavaScriptCore/disassembler/udis86/udis86_decode.c 2019-06-10 00:48:46.000000000 +0300 @@ -28,14 +28,10 @@ #if USE(UDIS86) -#include "udis86_extern.h" +#include "udis86_udint.h" #include "udis86_types.h" -#include "udis86_input.h" +#include "udis86_extern.h" #include "udis86_decode.h" -#include - -#define dbg(x, n...) -/* #define dbg printf */ #ifndef __UD_STANDALONE__ # include @@ -44,15 +40,164 @@ /* The max number of prefixes to an instruction */ #define MAX_PREFIXES 15 -/* instruction aliases and special cases */ -static struct ud_itab_entry s_ie__invalid = - { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }; +/* rex prefix bits */ +#define REX_W(r) ( ( 0xF & ( r ) ) >> 3 ) +#define REX_R(r) ( ( 0x7 & ( r ) ) >> 2 ) +#define REX_X(r) ( ( 0x3 & ( r ) ) >> 1 ) +#define REX_B(r) ( ( 0x1 & ( r ) ) >> 0 ) +#define REX_PFX_MASK(n) ( ( P_REXW(n) << 3 ) | \ + ( P_REXR(n) << 2 ) | \ + ( P_REXX(n) << 1 ) | \ + ( P_REXB(n) << 0 ) ) + +/* scable-index-base bits */ +#define SIB_S(b) ( ( b ) >> 6 ) +#define SIB_I(b) ( ( ( b ) >> 3 ) & 7 ) +#define SIB_B(b) ( ( b ) & 7 ) + +/* modrm bits */ +#define MODRM_REG(b) ( ( ( b ) >> 3 ) & 7 ) +#define MODRM_NNN(b) ( ( ( b ) >> 3 ) & 7 ) +#define MODRM_MOD(b) ( ( ( b ) >> 6 ) & 3 ) +#define MODRM_RM(b) ( ( b ) & 7 ) + +static int decode_ext(struct ud *u, uint16_t ptr); +static int decode_opcode(struct ud *u); + +enum reg_class { /* register classes */ + REGCLASS_GPR, + REGCLASS_MMX, + REGCLASS_CR, + REGCLASS_DB, + REGCLASS_SEG, + REGCLASS_XMM +}; + + /* + * inp_start + * Should be called before each de-code operation. + */ +static void +inp_start(struct ud *u) +{ + u->inp_ctr = 0; +} -static int -decode_ext(struct ud *u, uint16_t ptr); +static uint8_t +inp_peek(struct ud *u) +{ + if (u->inp_end == 0) { + if (u->inp_buf != NULL) { + if (u->inp_buf_index < u->inp_buf_size) { + return u->inp_buf[u->inp_buf_index]; + } + } else if (u->inp_peek != UD_EOI) { + return u->inp_peek; + } else { + int c; + if ((c = u->inp_hook(u)) != UD_EOI) { + u->inp_peek = c; + return u->inp_peek; + } + } + } + u->inp_end = 1; + UDERR(u, "byte expected, eoi received\n"); + return 0; +} + +static uint8_t +inp_next(struct ud *u) +{ + if (u->inp_end == 0) { + if (u->inp_buf != NULL) { + if (u->inp_buf_index < u->inp_buf_size) { + u->inp_ctr++; + return (u->inp_curr = u->inp_buf[u->inp_buf_index++]); + } + } else { + int c = u->inp_peek; + if (c != UD_EOI || (c = u->inp_hook(u)) != UD_EOI) { + u->inp_peek = UD_EOI; + u->inp_curr = c; + u->inp_sess[u->inp_ctr++] = u->inp_curr; + return u->inp_curr; + } + } + } + u->inp_end = 1; + UDERR(u, "byte expected, eoi received\n"); + return 0; +} + +static uint8_t +inp_curr(struct ud *u) +{ + return u->inp_curr; +} + + +/* + * inp_uint8 + * int_uint16 + * int_uint32 + * int_uint64 + * Load little-endian values from input + */ +static uint8_t +inp_uint8(struct ud* u) +{ + return inp_next(u); +} + +static uint16_t +inp_uint16(struct ud* u) +{ + uint16_t r, ret; + ret = inp_next(u); + r = inp_next(u); + return ret | (r << 8); +} -static inline int +static uint32_t +inp_uint32(struct ud* u) +{ + uint32_t r, ret; + + ret = inp_next(u); + r = inp_next(u); + ret = ret | (r << 8); + r = inp_next(u); + ret = ret | (r << 16); + r = inp_next(u); + return ret | (r << 24); +} + +static uint64_t +inp_uint64(struct ud* u) +{ + uint64_t r, ret; + + ret = inp_next(u); + r = inp_next(u); + ret = ret | (r << 8); + r = inp_next(u); + ret = ret | (r << 16); + r = inp_next(u); + ret = ret | (r << 24); + r = inp_next(u); + ret = ret | (r << 32); + r = inp_next(u); + ret = ret | (r << 40); + r = inp_next(u); + ret = ret | (r << 48); + r = inp_next(u); + return ret | (r << 56); +} + + +static UD_INLINE int eff_opr_mode(int dis_mode, int rex_w, int pfx_opr) { if (dis_mode == 64) { @@ -60,13 +205,13 @@ } else if (dis_mode == 32) { return pfx_opr ? 16 : 32; } else { - ASSERT(dis_mode == 16); + UD_ASSERT(dis_mode == 16); return pfx_opr ? 32 : 16; } } -static inline int +static UD_INLINE int eff_adr_mode(int dis_mode, int pfx_adr) { if (dis_mode == 64) { @@ -74,21 +219,12 @@ } else if (dis_mode == 32) { return pfx_adr ? 16 : 32; } else { - ASSERT(dis_mode == 16); + UD_ASSERT(dis_mode == 16); return pfx_adr ? 32 : 16; } } -/* Looks up mnemonic code in the mnemonic string table - * Returns NULL if the mnemonic code is invalid - */ -const char * ud_lookup_mnemonic( enum ud_mnemonic_code c ) -{ - return ud_mnemonics_str[ c ]; -} - - /* * decode_prefixes * @@ -97,164 +233,128 @@ static int decode_prefixes(struct ud *u) { - unsigned int have_pfx = 1; - unsigned int i; - uint8_t curr; - - /* if in error state, bail out */ - if ( u->error ) - return -1; - - /* keep going as long as there are prefixes available */ - for ( i = 0; have_pfx ; ++i ) { - - /* Get next byte. */ - ud_inp_next(u); - if ( u->error ) - return -1; - curr = ud_inp_curr( u ); - - /* rex prefixes in 64bit mode */ - if ( u->dis_mode == 64 && ( curr & 0xF0 ) == 0x40 ) { - u->pfx_rex = curr; - } else { - switch ( curr ) - { - case 0x2E : - u->pfx_seg = UD_R_CS; - u->pfx_rex = 0; - break; - case 0x36 : - u->pfx_seg = UD_R_SS; - u->pfx_rex = 0; - break; - case 0x3E : - u->pfx_seg = UD_R_DS; - u->pfx_rex = 0; - break; - case 0x26 : - u->pfx_seg = UD_R_ES; - u->pfx_rex = 0; - break; - case 0x64 : - u->pfx_seg = UD_R_FS; - u->pfx_rex = 0; - break; - case 0x65 : - u->pfx_seg = UD_R_GS; - u->pfx_rex = 0; - break; - case 0x67 : /* adress-size override prefix */ - u->pfx_adr = 0x67; - u->pfx_rex = 0; - break; - case 0xF0 : - u->pfx_lock = 0xF0; - u->pfx_rex = 0; - break; - case 0x66: - /* the 0x66 sse prefix is only effective if no other sse prefix - * has already been specified. - */ - if ( !u->pfx_insn ) u->pfx_insn = 0x66; - u->pfx_opr = 0x66; - u->pfx_rex = 0; - break; - case 0xF2: - u->pfx_insn = 0xF2; - u->pfx_repne = 0xF2; - u->pfx_rex = 0; - break; - case 0xF3: - u->pfx_insn = 0xF3; - u->pfx_rep = 0xF3; - u->pfx_repe = 0xF3; - u->pfx_rex = 0; - break; - default : - /* No more prefixes */ - have_pfx = 0; - break; - } - } - - /* check if we reached max instruction length */ - if ( i + 1 == MAX_INSN_LENGTH ) { - u->error = 1; - break; - } + int done = 0; + uint8_t curr = 0, last = 0; + UD_RETURN_ON_ERROR(u); + + do { + last = curr; + curr = inp_next(u); + UD_RETURN_ON_ERROR(u); + if (u->inp_ctr == MAX_INSN_LENGTH) { + UD_RETURN_WITH_ERROR(u, "max instruction length"); } + + switch (curr) + { + case 0x2E: + u->pfx_seg = UD_R_CS; + break; + case 0x36: + u->pfx_seg = UD_R_SS; + break; + case 0x3E: + u->pfx_seg = UD_R_DS; + break; + case 0x26: + u->pfx_seg = UD_R_ES; + break; + case 0x64: + u->pfx_seg = UD_R_FS; + break; + case 0x65: + u->pfx_seg = UD_R_GS; + break; + case 0x67: /* adress-size override prefix */ + u->pfx_adr = 0x67; + break; + case 0xF0: + u->pfx_lock = 0xF0; + break; + case 0x66: + u->pfx_opr = 0x66; + break; + case 0xF2: + u->pfx_str = 0xf2; + break; + case 0xF3: + u->pfx_str = 0xf3; + break; + default: + /* consume if rex */ + done = (u->dis_mode == 64 && (curr & 0xF0) == 0x40) ? 0 : 1; + break; + } + } while (!done); + /* rex prefixes in 64bit mode, must be the last prefix */ + if (u->dis_mode == 64 && (last & 0xF0) == 0x40) { + u->pfx_rex = last; + } + return 0; +} - /* return status */ - if ( u->error ) - return -1; - /* rewind back one byte in stream, since the above loop - * stops with a non-prefix byte. - */ - ud_inp_back(u); - return 0; +/* + * vex_l, vex_w + * Return the vex.L and vex.W bits + */ +static UD_INLINE uint8_t +vex_l(const struct ud *u) +{ + UD_ASSERT(u->vex_op != 0); + return ((u->vex_op == 0xc4 ? u->vex_b2 : u->vex_b1) >> 2) & 1; } +static UD_INLINE uint8_t +vex_w(const struct ud *u) +{ + UD_ASSERT(u->vex_op != 0); + return u->vex_op == 0xc4 ? ((u->vex_b2 >> 7) & 1) : 0; +} -static inline unsigned int modrm( struct ud * u ) + +static UD_INLINE uint8_t +modrm(struct ud * u) { if ( !u->have_modrm ) { - u->modrm = ud_inp_next( u ); + u->modrm = inp_next( u ); + u->modrm_offset = (uint8_t) (u->inp_ctr - 1); u->have_modrm = 1; } return u->modrm; } -static unsigned int resolve_operand_size( const struct ud * u, unsigned int s ) +static unsigned int +resolve_operand_size(const struct ud* u, ud_operand_size_t osize) { - switch ( s ) - { - case SZ_V: - return ( u->opr_mode ); - case SZ_Z: - return ( u->opr_mode == 16 ) ? 16 : 32; - case SZ_P: - return ( u->opr_mode == 16 ) ? SZ_WP : SZ_DP; - case SZ_MDQ: - return ( u->opr_mode == 16 ) ? 32 : u->opr_mode; - case SZ_RDQ: - return ( u->dis_mode == 64 ) ? 64 : 32; - default: - return s; - } + switch (osize) { + case SZ_V: + return u->opr_mode; + case SZ_Z: + return u->opr_mode == 16 ? 16 : 32; + case SZ_Y: + return u->opr_mode == 16 ? 32 : u->opr_mode; + case SZ_RDQ: + return u->dis_mode == 64 ? 64 : 32; + case SZ_X: + UD_ASSERT(u->vex_op != 0); + return (P_VEXL(u->itab_entry->prefix) && vex_l(u)) ? SZ_QQ : SZ_DQ; + default: + return osize; + } } static int resolve_mnemonic( struct ud* u ) { - /* far/near flags */ - u->br_far = 0; - u->br_near = 0; - /* readjust operand sizes for call/jmp instrcutions */ - if ( u->mnemonic == UD_Icall || u->mnemonic == UD_Ijmp ) { - /* WP: 16:16 pointer */ - if ( u->operand[ 0 ].size == SZ_WP ) { - u->operand[ 0 ].size = 16; - u->br_far = 1; - u->br_near= 0; - /* DP: 32:32 pointer */ - } else if ( u->operand[ 0 ].size == SZ_DP ) { - u->operand[ 0 ].size = 32; - u->br_far = 1; - u->br_near= 0; - } else { - u->br_far = 0; - u->br_near= 1; - } /* resolve 3dnow weirdness. */ - } else if ( u->mnemonic == UD_I3dnow ) { - u->mnemonic = ud_itab[ u->le->table[ ud_inp_curr( u ) ] ].mnemonic; + if ( u->mnemonic == UD_I3dnow ) { + u->mnemonic = ud_itab[ u->le->table[ inp_curr( u ) ] ].mnemonic; } /* SWAPGS is only valid in 64bits mode */ if ( u->mnemonic == UD_Iswapgs && u->dis_mode != 64 ) { - u->error = 1; + UDERR(u, "swapgs invalid in 64bits mode\n"); return -1; } @@ -269,8 +369,8 @@ } } - if (u->mnemonic == UD_Inop && u->pfx_rep) { - u->pfx_rep = 0; + if (u->mnemonic == UD_Inop && u->pfx_repe) { + u->pfx_repe = 0; u->mnemonic = UD_Ipause; } return 0; @@ -288,14 +388,14 @@ /* seg16:off16 */ op->type = UD_OP_PTR; op->size = 32; - op->lval.ptr.off = ud_inp_uint16(u); - op->lval.ptr.seg = ud_inp_uint16(u); + op->lval.ptr.off = inp_uint16(u); + op->lval.ptr.seg = inp_uint16(u); } else { /* seg16:off32 */ op->type = UD_OP_PTR; op->size = 48; - op->lval.ptr.off = ud_inp_uint32(u); - op->lval.ptr.seg = ud_inp_uint16(u); + op->lval.ptr.off = inp_uint32(u); + op->lval.ptr.seg = inp_uint16(u); } } @@ -306,15 +406,11 @@ static enum ud_type decode_gpr(register struct ud* u, unsigned int s, unsigned char rm) { - s = resolve_operand_size(u, s); - switch (s) { case 64: return UD_R_RAX + rm; - case SZ_DP: case 32: return UD_R_EAX + rm; - case SZ_WP: case 16: return UD_R_AX + rm; case 8: @@ -323,94 +419,103 @@ return UD_R_SPL + (rm-4); return UD_R_AL + rm; } else return UD_R_AL + rm; + case 0: + /* invalid size in case of a decode error */ + UD_ASSERT(u->error); + return UD_NONE; default: - return 0; - } -} - -/* ----------------------------------------------------------------------------- - * resolve_gpr64() - 64bit General Purpose Register-Selection. - * ----------------------------------------------------------------------------- - */ -static enum ud_type -resolve_gpr64(struct ud* u, enum ud_operand_code gpr_op, enum ud_operand_size * size) -{ - if (gpr_op >= OP_rAXr8 && gpr_op <= OP_rDIr15) - gpr_op = (gpr_op - OP_rAXr8) | (REX_B(u->pfx_rex) << 3); - else gpr_op = (gpr_op - OP_rAX); - - if (u->opr_mode == 16) { - *size = 16; - return gpr_op + UD_R_AX; + UD_ASSERT(!"invalid operand size"); + return UD_NONE; } - if (u->dis_mode == 32 || - (u->opr_mode == 32 && ! (REX_W(u->pfx_rex) || u->default64))) { - *size = 32; - return gpr_op + UD_R_EAX; - } - - *size = 64; - return gpr_op + UD_R_RAX; } -/* ----------------------------------------------------------------------------- - * resolve_gpr32 () - 32bit General Purpose Register-Selection. - * ----------------------------------------------------------------------------- - */ -static enum ud_type -resolve_gpr32(struct ud* u, enum ud_operand_code gpr_op) -{ - gpr_op = gpr_op - OP_eAX; - - if (u->opr_mode == 16) - return gpr_op + UD_R_AX; - - return gpr_op + UD_R_EAX; -} - -/* ----------------------------------------------------------------------------- - * resolve_reg() - Resolves the register type - * ----------------------------------------------------------------------------- - */ -static enum ud_type -resolve_reg(struct ud* u, unsigned int type, unsigned char i) +static void +decode_reg(struct ud *u, + struct ud_operand *opr, + int type, + int num, + int size) { + int reg; + size = resolve_operand_size(u, size); switch (type) { - case T_MMX : return UD_R_MM0 + (i & 7); - case T_XMM : return UD_R_XMM0 + i; - case T_CRG : return UD_R_CR0 + i; - case T_DBG : return UD_R_DR0 + i; - case T_SEG : { + case REGCLASS_GPR : reg = decode_gpr(u, size, num); break; + case REGCLASS_MMX : reg = UD_R_MM0 + (num & 7); break; + case REGCLASS_XMM : + reg = num + (size == SZ_QQ ? UD_R_YMM0 : UD_R_XMM0); + break; + case REGCLASS_CR : reg = UD_R_CR0 + num; break; + case REGCLASS_DB : reg = UD_R_DR0 + num; break; + case REGCLASS_SEG : { /* * Only 6 segment registers, anything else is an error. */ - if ((i & 7) > 5) { - u->error = 1; + if ((num & 7) > 5) { + UDERR(u, "invalid segment register value\n"); + return; } else { - return UD_R_ES + (i & 7); + reg = UD_R_ES + (num & 7); } + break; } - case T_NONE: - default: return UD_NONE; + default: + UD_ASSERT(!"invalid register type"); + return; } + opr->type = UD_OP_REG; + opr->base = reg; + opr->size = size; } -/* ----------------------------------------------------------------------------- - * decode_imm() - Decodes Immediate values. - * ----------------------------------------------------------------------------- + +/* + * decode_imm + * + * Decode Immediate values. */ static void -decode_imm(struct ud* u, unsigned int s, struct ud_operand *op) +decode_imm(struct ud* u, unsigned int size, struct ud_operand *op) { - op->size = resolve_operand_size(u, s); + op->size = resolve_operand_size(u, size); op->type = UD_OP_IMM; switch (op->size) { - case 8: op->lval.sbyte = ud_inp_uint8(u); break; - case 16: op->lval.uword = ud_inp_uint16(u); break; - case 32: op->lval.udword = ud_inp_uint32(u); break; - case 64: op->lval.uqword = ud_inp_uint64(u); break; - default: return; + case 8: op->lval.sbyte = inp_uint8(u); break; + case 16: op->lval.uword = inp_uint16(u); break; + case 32: op->lval.udword = inp_uint32(u); break; + case 64: op->lval.uqword = inp_uint64(u); break; + default: return; + } +} + + +/* + * decode_mem_disp + * + * Decode mem address displacement. + */ +static void +decode_mem_disp(struct ud* u, unsigned int size, struct ud_operand *op) +{ + switch (size) { + case 8: + op->offset = 8; + op->lval.ubyte = inp_uint8(u); + break; + case 16: + op->offset = 16; + op->lval.uword = inp_uint16(u); + break; + case 32: + op->offset = 32; + op->lval.udword = inp_uint32(u); + break; + case 64: + op->offset = 64; + op->lval.uqword = inp_uint64(u); + break; + default: + return; } } @@ -421,21 +526,14 @@ * Decodes reg field of mod/rm byte * */ -static void +static UD_INLINE void decode_modrm_reg(struct ud *u, struct ud_operand *operand, unsigned int type, unsigned int size) { - uint8_t reg = (REX_R(u->pfx_rex) << 3) | MODRM_REG(modrm(u)); - operand->type = UD_OP_REG; - operand->size = resolve_operand_size(u, size); - - if (type == T_GPR) { - operand->base = decode_gpr(u, operand->size, reg); - } else { - operand->base = resolve_reg(u, type, reg); - } + uint8_t reg = (REX_R(u->_rex) << 3) | MODRM_REG(modrm(u)); + decode_reg(u, operand, type, reg, size); } @@ -448,67 +546,58 @@ static void decode_modrm_rm(struct ud *u, struct ud_operand *op, - unsigned char type, - unsigned int size) + unsigned char type, /* register type */ + unsigned int size) /* operand size */ { - unsigned char mod, rm, reg; + size_t offset = 0; + unsigned char mod, rm; /* get mod, r/m and reg fields */ mod = MODRM_MOD(modrm(u)); - rm = (REX_B(u->pfx_rex) << 3) | MODRM_RM(modrm(u)); - reg = (REX_R(u->pfx_rex) << 3) | MODRM_REG(modrm(u)); - - UNUSED_PARAM(reg); - - op->size = resolve_operand_size(u, size); + rm = (REX_B(u->_rex) << 3) | MODRM_RM(modrm(u)); /* * If mod is 11b, then the modrm.rm specifies a register. * */ if (mod == 3) { - op->type = UD_OP_REG; - if (type == T_GPR) { - op->base = decode_gpr(u, op->size, rm); - } else { - op->base = resolve_reg(u, type, (REX_B(u->pfx_rex) << 3) | (rm & 7)); - } + decode_reg(u, op, type, rm, size); return; - } - + } /* - * !11 => Memory Address + * !11b => Memory Address */ op->type = UD_OP_MEM; + op->size = resolve_operand_size(u, size); if (u->adr_mode == 64) { op->base = UD_R_RAX + rm; if (mod == 1) { - op->offset = 8; + offset = 8; } else if (mod == 2) { - op->offset = 32; + offset = 32; } else if (mod == 0 && (rm & 7) == 5) { op->base = UD_R_RIP; - op->offset = 32; + offset = 32; } else { - op->offset = 0; + offset = 0; } /* * Scale-Index-Base (SIB) */ if ((rm & 7) == 4) { - ud_inp_next(u); + inp_next(u); - op->scale = (1 << SIB_S(ud_inp_curr(u))) & ~1; - op->index = UD_R_RAX + (SIB_I(ud_inp_curr(u)) | (REX_X(u->pfx_rex) << 3)); - op->base = UD_R_RAX + (SIB_B(ud_inp_curr(u)) | (REX_B(u->pfx_rex) << 3)); - + op->base = UD_R_RAX + (SIB_B(inp_curr(u)) | (REX_B(u->_rex) << 3)); + op->index = UD_R_RAX + (SIB_I(inp_curr(u)) | (REX_X(u->_rex) << 3)); /* special conditions for base reference */ if (op->index == UD_R_RSP) { op->index = UD_NONE; op->scale = UD_NONE; + } else { + op->scale = (1 << SIB_S(inp_curr(u))) & ~1; } if (op->base == UD_R_RBP || op->base == UD_R_R13) { @@ -516,32 +605,35 @@ op->base = UD_NONE; } if (mod == 1) { - op->offset = 8; + offset = 8; } else { - op->offset = 32; + offset = 32; } } + } else { + op->scale = UD_NONE; + op->index = UD_NONE; } } else if (u->adr_mode == 32) { op->base = UD_R_EAX + rm; if (mod == 1) { - op->offset = 8; + offset = 8; } else if (mod == 2) { - op->offset = 32; + offset = 32; } else if (mod == 0 && rm == 5) { op->base = UD_NONE; - op->offset = 32; + offset = 32; } else { - op->offset = 0; + offset = 0; } /* Scale-Index-Base (SIB) */ if ((rm & 7) == 4) { - ud_inp_next(u); + inp_next(u); - op->scale = (1 << SIB_S(ud_inp_curr(u))) & ~1; - op->index = UD_R_EAX + (SIB_I(ud_inp_curr(u)) | (REX_X(u->pfx_rex) << 3)); - op->base = UD_R_EAX + (SIB_B(ud_inp_curr(u)) | (REX_B(u->pfx_rex) << 3)); + op->scale = (1 << SIB_S(inp_curr(u))) & ~1; + op->index = UD_R_EAX + (SIB_I(inp_curr(u)) | (REX_X(u->pfx_rex) << 3)); + op->base = UD_R_EAX + (SIB_B(inp_curr(u)) | (REX_B(u->pfx_rex) << 3)); if (op->index == UD_R_ESP) { op->index = UD_NONE; @@ -554,11 +646,14 @@ op->base = UD_NONE; } if (mod == 1) { - op->offset = 8; + offset = 8; } else { - op->offset = 32; + offset = 32; } } + } else { + op->scale = UD_NONE; + op->index = UD_NONE; } } else { const unsigned int bases[] = { UD_R_BX, UD_R_BX, UD_R_BP, UD_R_BP, @@ -567,58 +662,72 @@ UD_NONE, UD_NONE, UD_NONE, UD_NONE }; op->base = bases[rm & 7]; op->index = indices[rm & 7]; + op->scale = UD_NONE; if (mod == 0 && rm == 6) { - op->offset= 16; + offset = 16; op->base = UD_NONE; } else if (mod == 1) { - op->offset = 8; + offset = 8; } else if (mod == 2) { - op->offset = 16; + offset = 16; } } - /* - * extract offset, if any - */ - switch (op->offset) { - case 8 : op->lval.ubyte = ud_inp_uint8(u); break; - case 16: op->lval.uword = ud_inp_uint16(u); break; - case 32: op->lval.udword = ud_inp_uint32(u); break; - case 64: op->lval.uqword = ud_inp_uint64(u); break; - default: break; + if (offset) { + decode_mem_disp(u, offset, op); + } else { + op->offset = 0; } } -/* ----------------------------------------------------------------------------- - * decode_o() - Decodes offset - * ----------------------------------------------------------------------------- + +/* + * decode_moffset + * Decode offset-only memory operand */ -static void -decode_o(struct ud* u, unsigned int s, struct ud_operand *op) +static void +decode_moffset(struct ud *u, unsigned int size, struct ud_operand *opr) { - switch (u->adr_mode) { - case 64: - op->offset = 64; - op->lval.uqword = ud_inp_uint64(u); - break; - case 32: - op->offset = 32; - op->lval.udword = ud_inp_uint32(u); - break; - case 16: - op->offset = 16; - op->lval.uword = ud_inp_uint16(u); - break; - default: - return; - } - op->type = UD_OP_MEM; - op->size = resolve_operand_size(u, s); + opr->type = UD_OP_MEM; + opr->base = UD_NONE; + opr->index = UD_NONE; + opr->scale = UD_NONE; + opr->size = resolve_operand_size(u, size); + decode_mem_disp(u, u->adr_mode, opr); } -/* ----------------------------------------------------------------------------- - * decode_operands() - Disassembles Operands. - * ----------------------------------------------------------------------------- + +static void +decode_vex_vvvv(struct ud *u, struct ud_operand *opr, unsigned size) +{ + uint8_t vvvv; + UD_ASSERT(u->vex_op != 0); + vvvv = ((u->vex_op == 0xc4 ? u->vex_b2 : u->vex_b1) >> 3) & 0xf; + decode_reg(u, opr, REGCLASS_XMM, (0xf & ~vvvv), size); +} + + +/* + * decode_vex_immreg + * Decode source operand encoded in immediate byte [7:4] + */ +static int +decode_vex_immreg(struct ud *u, struct ud_operand *opr, unsigned size) +{ + uint8_t imm = inp_next(u); + uint8_t mask = u->dis_mode == 64 ? 0xf : 0x7; + UD_RETURN_ON_ERROR(u); + UD_ASSERT(u->vex_op != 0); + decode_reg(u, opr, REGCLASS_XMM, mask & (imm >> 4), size); + return 0; +} + + +/* + * decode_operand + * + * Decodes a single operand. + * Returns the type of the operand (UD_NONE if none) */ static int decode_operand(struct ud *u, @@ -626,35 +735,33 @@ enum ud_operand_code type, unsigned int size) { + operand->type = UD_NONE; + operand->_oprcode = type; + switch (type) { case OP_A : decode_a(u, operand); break; case OP_MR: - if (MODRM_MOD(modrm(u)) == 3) { - decode_modrm_rm(u, operand, T_GPR, - size == SZ_DY ? SZ_MDQ : SZ_V); - } else if (size == SZ_WV) { - decode_modrm_rm( u, operand, T_GPR, SZ_W); - } else if (size == SZ_BV) { - decode_modrm_rm( u, operand, T_GPR, SZ_B); - } else if (size == SZ_DY) { - decode_modrm_rm( u, operand, T_GPR, SZ_D); - } else { - ASSERT(!"unexpected size"); - } + decode_modrm_rm(u, operand, REGCLASS_GPR, + MODRM_MOD(modrm(u)) == 3 ? + Mx_reg_size(size) : Mx_mem_size(size)); break; + case OP_F: + u->br_far = 1; + /* intended fall through */ case OP_M: if (MODRM_MOD(modrm(u)) == 3) { - u->error = 1; + UDERR(u, "expected modrm.mod != 3\n"); } /* intended fall through */ case OP_E: - decode_modrm_rm(u, operand, T_GPR, size); + decode_modrm_rm(u, operand, REGCLASS_GPR, size); break; case OP_G: - decode_modrm_reg(u, operand, T_GPR, size); + decode_modrm_reg(u, operand, REGCLASS_GPR, size); break; + case OP_sI: case OP_I: decode_imm(u, size, operand); break; @@ -662,96 +769,68 @@ operand->type = UD_OP_CONST; operand->lval.udword = 1; break; - case OP_PR: + case OP_N: if (MODRM_MOD(modrm(u)) != 3) { - u->error = 1; + UDERR(u, "expected modrm.mod == 3\n"); } - decode_modrm_rm(u, operand, T_MMX, size); + /* intended fall through */ + case OP_Q: + decode_modrm_rm(u, operand, REGCLASS_MMX, size); break; case OP_P: - decode_modrm_reg(u, operand, T_MMX, size); + decode_modrm_reg(u, operand, REGCLASS_MMX, size); break; - case OP_VR: + case OP_U: if (MODRM_MOD(modrm(u)) != 3) { - u->error = 1; + UDERR(u, "expected modrm.mod == 3\n"); } /* intended fall through */ case OP_W: - decode_modrm_rm(u, operand, T_XMM, size); + decode_modrm_rm(u, operand, REGCLASS_XMM, size); break; case OP_V: - decode_modrm_reg(u, operand, T_XMM, size); + decode_modrm_reg(u, operand, REGCLASS_XMM, size); break; - case OP_S: - decode_modrm_reg(u, operand, T_SEG, size); + case OP_H: + decode_vex_vvvv(u, operand, size); break; - case OP_AL: - case OP_CL: - case OP_DL: - case OP_BL: - case OP_AH: - case OP_CH: - case OP_DH: - case OP_BH: - operand->type = UD_OP_REG; - operand->base = UD_R_AL + (type - OP_AL); - operand->size = 8; + case OP_MU: + decode_modrm_rm(u, operand, REGCLASS_XMM, + MODRM_MOD(modrm(u)) == 3 ? + Mx_reg_size(size) : Mx_mem_size(size)); break; - case OP_DX: - operand->type = UD_OP_REG; - operand->base = UD_R_DX; - operand->size = 16; + case OP_S: + decode_modrm_reg(u, operand, REGCLASS_SEG, size); break; case OP_O: - decode_o(u, size, operand); + decode_moffset(u, size, operand); break; - case OP_rAXr8: - case OP_rCXr9: - case OP_rDXr10: - case OP_rBXr11: - case OP_rSPr12: - case OP_rBPr13: - case OP_rSIr14: - case OP_rDIr15: - case OP_rAX: - case OP_rCX: - case OP_rDX: - case OP_rBX: - case OP_rSP: - case OP_rBP: - case OP_rSI: - case OP_rDI: - operand->type = UD_OP_REG; - operand->base = resolve_gpr64(u, type, &operand->size); + case OP_R0: + case OP_R1: + case OP_R2: + case OP_R3: + case OP_R4: + case OP_R5: + case OP_R6: + case OP_R7: + decode_reg(u, operand, REGCLASS_GPR, + (REX_B(u->_rex) << 3) | (type - OP_R0), size); break; - case OP_ALr8b: - case OP_CLr9b: - case OP_DLr10b: - case OP_BLr11b: - case OP_AHr12b: - case OP_CHr13b: - case OP_DHr14b: - case OP_BHr15b: { - ud_type_t gpr = (type - OP_ALr8b) + UD_R_AL - + (REX_B(u->pfx_rex) << 3); - if (UD_R_AH <= gpr && u->pfx_rex) { - gpr = gpr + 4; - } - operand->type = UD_OP_REG; - operand->base = gpr; + case OP_AL: + case OP_AX: + case OP_eAX: + case OP_rAX: + decode_reg(u, operand, REGCLASS_GPR, 0, size); break; - } - case OP_eAX: - case OP_eCX: - case OP_eDX: - case OP_eBX: - case OP_eSP: - case OP_eBP: - case OP_eSI: - case OP_eDI: - operand->type = UD_OP_REG; - operand->base = resolve_gpr32(u, type); - operand->size = u->opr_mode == 16 ? 16 : 32; + case OP_CL: + case OP_CX: + case OP_eCX: + decode_reg(u, operand, REGCLASS_GPR, 1, size); + break; + case OP_DL: + case OP_DX: + case OP_eDX: + decode_reg(u, operand, REGCLASS_GPR, 2, size); break; case OP_ES: case OP_CS: @@ -762,7 +841,7 @@ /* in 64bits mode, only fs and gs are allowed */ if (u->dis_mode == 64) { if (type != OP_FS && type != OP_GS) { - u->error= 1; + UDERR(u, "invalid segment register in 64bits\n"); } } operand->type = UD_OP_REG; @@ -773,17 +852,17 @@ decode_imm(u, size, operand); operand->type = UD_OP_JIMM; break ; - case OP_Q: - decode_modrm_rm(u, operand, T_MMX, size); - break; case OP_R : - decode_modrm_rm(u, operand, T_GPR, size); + if (MODRM_MOD(modrm(u)) != 3) { + UDERR(u, "expected modrm.mod == 3\n"); + } + decode_modrm_rm(u, operand, REGCLASS_GPR, size); break; case OP_C: - decode_modrm_reg(u, operand, T_CRG, size); + decode_modrm_reg(u, operand, REGCLASS_CR, size); break; case OP_D: - decode_modrm_reg(u, operand, T_DBG, size); + decode_modrm_reg(u, operand, REGCLASS_DB, size); break; case OP_I3 : operand->type = UD_OP_CONST; @@ -799,18 +878,16 @@ case OP_ST7: operand->type = UD_OP_REG; operand->base = (type - OP_ST0) + UD_R_ST0; - operand->size = 0; + operand->size = 80; break; - case OP_AX: - operand->type = UD_OP_REG; - operand->base = UD_R_AX; - operand->size = 16; + case OP_L: + decode_vex_immreg(u, operand, size); break; default : operand->type = UD_NONE; break; } - return 0; + return operand->type; } @@ -827,12 +904,21 @@ decode_operand(u, &u->operand[0], u->itab_entry->operand1.type, u->itab_entry->operand1.size); - decode_operand(u, &u->operand[1], - u->itab_entry->operand2.type, - u->itab_entry->operand2.size); - decode_operand(u, &u->operand[2], - u->itab_entry->operand3.type, - u->itab_entry->operand3.size); + if (u->operand[0].type != UD_NONE) { + decode_operand(u, &u->operand[1], + u->itab_entry->operand2.type, + u->itab_entry->operand2.size); + } + if (u->operand[1].type != UD_NONE) { + decode_operand(u, &u->operand[2], + u->itab_entry->operand3.type, + u->itab_entry->operand3.size); + } + if (u->operand[2].type != UD_NONE) { + decode_operand(u, &u->operand[3], + u->itab_entry->operand4.type, + u->itab_entry->operand4.size); + } return 0; } @@ -852,19 +938,40 @@ u->pfx_rep = 0; u->pfx_repe = 0; u->pfx_rex = 0; - u->pfx_insn = 0; + u->pfx_str = 0; u->mnemonic = UD_Inone; u->itab_entry = NULL; u->have_modrm = 0; + u->br_far = 0; + u->vex_op = 0; + u->_rex = 0; + u->operand[0].type = UD_NONE; + u->operand[1].type = UD_NONE; + u->operand[2].type = UD_NONE; + u->operand[3].type = UD_NONE; +} - memset( &u->operand[ 0 ], 0, sizeof( struct ud_operand ) ); - memset( &u->operand[ 1 ], 0, sizeof( struct ud_operand ) ); - memset( &u->operand[ 2 ], 0, sizeof( struct ud_operand ) ); + +static UD_INLINE int +resolve_pfx_str(struct ud* u) +{ + if (u->pfx_str == 0xf3) { + if (P_STR(u->itab_entry->prefix)) { + u->pfx_rep = 0xf3; + } else { + u->pfx_repe = 0xf3; + } + } else if (u->pfx_str == 0xf2) { + u->pfx_repne = 0xf3; + } + return 0; } + static int resolve_mode( struct ud* u ) { + int default64; /* if in error state, bail out */ if ( u->error ) return -1; @@ -873,22 +980,34 @@ /* Check validity of instruction m64 */ if ( P_INV64( u->itab_entry->prefix ) ) { - u->error = 1; - return -1; + UDERR(u, "instruction invalid in 64bits\n"); + return -1; } - /* effective rex prefix is the effective mask for the - * instruction hard-coded in the opcode map. + /* compute effective rex based on, + * - vex prefix (if any) + * - rex prefix (if any, and not vex) + * - allowed prefixes specified by the opcode map */ - u->pfx_rex = ( u->pfx_rex & 0x40 ) | - ( u->pfx_rex & REX_PFX_MASK( u->itab_entry->prefix ) ); + if (u->vex_op == 0xc4) { + /* vex has rex.rxb in 1's complement */ + u->_rex = ((~(u->vex_b1 >> 5) & 0x7) /* rex.0rxb */ | + ((u->vex_b2 >> 4) & 0x8) /* rex.w000 */); + } else if (u->vex_op == 0xc5) { + /* vex has rex.r in 1's complement */ + u->_rex = (~(u->vex_b1 >> 5)) & 4; + } else { + UD_ASSERT(u->vex_op == 0); + u->_rex = u->pfx_rex; + } + u->_rex &= REX_PFX_MASK(u->itab_entry->prefix); /* whether this instruction has a default operand size of * 64bit, also hardcoded into the opcode map. */ - u->default64 = P_DEF64( u->itab_entry->prefix ); + default64 = P_DEF64( u->itab_entry->prefix ); /* calculate effective operand size */ - if ( REX_W( u->pfx_rex ) ) { + if (REX_W(u->_rex)) { u->opr_mode = 64; } else if ( u->pfx_opr ) { u->opr_mode = 16; @@ -897,7 +1016,7 @@ * the effective operand size in the absence of rex.w * prefix is 32. */ - u->opr_mode = ( u->default64 ) ? 64 : 32; + u->opr_mode = default64 ? 64 : 32; } /* calculate effective address size */ @@ -910,45 +1029,18 @@ u->adr_mode = ( u->pfx_adr ) ? 32 : 16; } - /* These flags determine which operand to apply the operand size - * cast to. - */ - u->c1 = ( P_C1( u->itab_entry->prefix ) ) ? 1 : 0; - u->c2 = ( P_C2( u->itab_entry->prefix ) ) ? 1 : 0; - u->c3 = ( P_C3( u->itab_entry->prefix ) ) ? 1 : 0; - - /* set flags for implicit addressing */ - u->implicit_addr = P_IMPADDR( u->itab_entry->prefix ); - return 0; } -static int gen_hex( struct ud *u ) -{ - unsigned int i; - unsigned char *src_ptr = ud_inp_sess( u ); - char* src_hex; - /* bail out if in error stat. */ - if ( u->error ) return -1; - /* output buffer pointe */ - src_hex = ( char* ) u->insn_hexcode; - /* for each byte used to decode instruction */ - for ( i = 0; i < u->inp_ctr; ++i, ++src_ptr) { - sprintf( src_hex, "%02x", *src_ptr & 0xFF ); - src_hex += 2; - } - return 0; -} - - -static inline int +static UD_INLINE int decode_insn(struct ud *u, uint16_t ptr) { - ASSERT((ptr & 0x8000) == 0); + UD_ASSERT((ptr & 0x8000) == 0); u->itab_entry = &ud_itab[ ptr ]; u->mnemonic = u->itab_entry->mnemonic; - return (resolve_mode(u) == 0 && + return (resolve_pfx_str(u) == 0 && + resolve_mode(u) == 0 && decode_operands(u) == 0 && resolve_mnemonic(u) == 0) ? 0 : -1; } @@ -965,19 +1057,19 @@ * valid entry in the table, decode the operands, and read the final * byte to resolve the menmonic. */ -static inline int +static UD_INLINE int decode_3dnow(struct ud* u) { uint16_t ptr; - ASSERT(u->le->type == UD_TAB__OPC_3DNOW); - ASSERT(u->le->table[0xc] != 0); + UD_ASSERT(u->le->type == UD_TAB__OPC_3DNOW); + UD_ASSERT(u->le->table[0xc] != 0); decode_insn(u, u->le->table[0xc]); - ud_inp_next(u); + inp_next(u); if (u->error) { return -1; } - ptr = u->le->table[ud_inp_curr(u)]; - ASSERT((ptr & 0x8000) == 0); + ptr = u->le->table[inp_curr(u)]; + UD_ASSERT((ptr & 0x8000) == 0); u->mnemonic = ud_itab[ptr].mnemonic; return 0; } @@ -986,7 +1078,18 @@ static int decode_ssepfx(struct ud *u) { - uint8_t idx = ((u->pfx_insn & 0xf) + 1) / 2; + uint8_t idx; + uint8_t pfx; + + /* + * String prefixes (f2, f3) take precedence over operand + * size prefix (66). + */ + pfx = u->pfx_str; + if (pfx == 0) { + pfx = u->pfx_opr; + } + idx = ((pfx & 0xf) + 1) / 2; if (u->le->table[idx] == 0) { idx = 0; } @@ -995,23 +1098,50 @@ * "Consume" the prefix as a part of the opcode, so it is no * longer exported as an instruction prefix. */ - switch (u->pfx_insn) { - case 0xf2: - u->pfx_repne = 0; - break; - case 0xf3: - u->pfx_rep = 0; - u->pfx_repe = 0; - break; - case 0x66: + u->pfx_str = 0; + if (pfx == 0x66) { + /* + * consume "66" only if it was used for decoding, leaving + * it to be used as an operands size override for some + * simd instructions. + */ u->pfx_opr = 0; - break; } } return decode_ext(u, u->le->table[idx]); } +static int +decode_vex(struct ud *u) +{ + uint8_t index; + if (u->dis_mode != 64 && MODRM_MOD(inp_peek(u)) != 0x3) { + index = 0; + } else { + u->vex_op = inp_curr(u); + u->vex_b1 = inp_next(u); + if (u->vex_op == 0xc4) { + uint8_t pp, m; + /* 3-byte vex */ + u->vex_b2 = inp_next(u); + UD_RETURN_ON_ERROR(u); + m = u->vex_b1 & 0x1f; + if (m == 0 || m > 3) { + UD_RETURN_WITH_ERROR(u, "reserved vex.m-mmmm value"); + } + pp = u->vex_b2 & 0x3; + index = (pp << 2) | m; + } else { + /* 2-byte vex */ + UD_ASSERT(u->vex_op == 0xc5); + index = 0x1 | ((u->vex_b1 & 0x3) << 2); + } + } + return decode_ext(u, u->le->table[index]); +} + + /* * decode_ext() * @@ -1038,7 +1168,7 @@ * 16 = 0,, 32 = 1, 64 = 2 */ case UD_TAB__OPC_MODE: - idx = u->dis_mode / 32; + idx = u->dis_mode != 64 ? 0 : 1; break; case UD_TAB__OPC_OSIZE: idx = eff_opr_mode(u->dis_mode, REX_W(u->pfx_rex), u->pfx_opr) / 32; @@ -1067,8 +1197,19 @@ break; case UD_TAB__OPC_SSE: return decode_ssepfx(u); + case UD_TAB__OPC_VEX: + return decode_vex(u); + case UD_TAB__OPC_VEX_W: + idx = vex_w(u); + break; + case UD_TAB__OPC_VEX_L: + idx = vex_l(u); + break; + case UD_TAB__OPC_TABLE: + inp_next(u); + return decode_opcode(u); default: - ASSERT(!"not reached"); + UD_ASSERT(!"not reached"); break; } @@ -1076,22 +1217,13 @@ } -static inline int +static int decode_opcode(struct ud *u) { uint16_t ptr; - ASSERT(u->le->type == UD_TAB__OPC_TABLE); - ud_inp_next(u); - if (u->error) { - return -1; - } - ptr = u->le->table[ud_inp_curr(u)]; - if (ptr & 0x8000) { - u->le = &ud_lookup_table_list[ptr & ~0x8000]; - if (u->le->type == UD_TAB__OPC_TABLE) { - return decode_opcode(u); - } - } + UD_ASSERT(u->le->type == UD_TAB__OPC_TABLE); + UD_RETURN_ON_ERROR(u); + ptr = u->le->table[inp_curr(u)]; return decode_ext(u, ptr); } @@ -1103,7 +1235,7 @@ unsigned int ud_decode(struct ud *u) { - ud_inp_start(u); + inp_start(u); clear_insn(u); u->le = &ud_lookup_table_list[0]; u->error = decode_prefixes(u) == -1 || @@ -1114,7 +1246,7 @@ /* clear out the decode data. */ clear_insn(u); /* mark the sequence of bytes as invalid. */ - u->itab_entry = & s_ie__invalid; + u->itab_entry = &ud_itab[0]; /* entry 0 is invalid */ u->mnemonic = u->itab_entry->mnemonic; } @@ -1127,16 +1259,15 @@ u->pfx_seg = 0; u->insn_offset = u->pc; /* set offset of instruction */ - u->insn_fill = 0; /* set translation buffer index to 0 */ + u->asm_buf_fill = 0; /* set translation buffer index to 0 */ u->pc += u->inp_ctr; /* move program counter by bytes decoded */ - gen_hex( u ); /* generate hex code */ /* return number of bytes disassembled. */ return u->inp_ctr; } +#endif // USE(UDIS86) + /* vim: set ts=2 sw=2 expandtab */ - -#endif // USE(UDIS86) diff -Nuar a/Source/JavaScriptCore/disassembler/udis86/udis86_decode.h b/Source/JavaScriptCore/disassembler/udis86/udis86_decode.h --- a/Source/JavaScriptCore/disassembler/udis86/udis86_decode.h 2016-05-21 18:54:11.000000000 +0300 +++ b/Source/JavaScriptCore/disassembler/udis86/udis86_decode.h 2019-06-10 00:48:46.000000000 +0300 @@ -27,74 +27,45 @@ #define UD_DECODE_H #include "udis86_types.h" +#include "udis86_udint.h" #include "udis86_itab.h" #define MAX_INSN_LENGTH 15 -/* register classes */ -#define T_NONE 0 -#define T_GPR 1 -#define T_MMX 2 -#define T_CRG 3 -#define T_DBG 4 -#define T_SEG 5 -#define T_XMM 6 - /* itab prefix bits */ #define P_none ( 0 ) -#define P_cast ( 1 << 0 ) -#define P_CAST(n) ( ( n >> 0 ) & 1 ) -#define P_c1 ( 1 << 0 ) -#define P_C1(n) ( ( n >> 0 ) & 1 ) -#define P_rexb ( 1 << 1 ) -#define P_REXB(n) ( ( n >> 1 ) & 1 ) -#define P_depM ( 1 << 2 ) -#define P_DEPM(n) ( ( n >> 2 ) & 1 ) -#define P_c3 ( 1 << 3 ) -#define P_C3(n) ( ( n >> 3 ) & 1 ) -#define P_inv64 ( 1 << 4 ) -#define P_INV64(n) ( ( n >> 4 ) & 1 ) + +#define P_inv64 ( 1 << 0 ) +#define P_INV64(n) ( ( n >> 0 ) & 1 ) +#define P_def64 ( 1 << 1 ) +#define P_DEF64(n) ( ( n >> 1 ) & 1 ) + +#define P_oso ( 1 << 2 ) +#define P_OSO(n) ( ( n >> 2 ) & 1 ) +#define P_aso ( 1 << 3 ) +#define P_ASO(n) ( ( n >> 3 ) & 1 ) + +#define P_rexb ( 1 << 4 ) +#define P_REXB(n) ( ( n >> 4 ) & 1 ) #define P_rexw ( 1 << 5 ) #define P_REXW(n) ( ( n >> 5 ) & 1 ) -#define P_c2 ( 1 << 6 ) -#define P_C2(n) ( ( n >> 6 ) & 1 ) -#define P_def64 ( 1 << 7 ) -#define P_DEF64(n) ( ( n >> 7 ) & 1 ) -#define P_rexr ( 1 << 8 ) -#define P_REXR(n) ( ( n >> 8 ) & 1 ) -#define P_oso ( 1 << 9 ) -#define P_OSO(n) ( ( n >> 9 ) & 1 ) -#define P_aso ( 1 << 10 ) -#define P_ASO(n) ( ( n >> 10 ) & 1 ) -#define P_rexx ( 1 << 11 ) -#define P_REXX(n) ( ( n >> 11 ) & 1 ) -#define P_ImpAddr ( 1 << 12 ) -#define P_IMPADDR(n) ( ( n >> 12 ) & 1 ) -#define P_seg ( 1 << 13 ) -#define P_SEG(n) ( ( n >> 13 ) & 1 ) -#define P_sext ( 1 << 14 ) -#define P_SEXT(n) ( ( n >> 14 ) & 1 ) - -/* rex prefix bits */ -#define REX_W(r) ( ( 0xF & ( r ) ) >> 3 ) -#define REX_R(r) ( ( 0x7 & ( r ) ) >> 2 ) -#define REX_X(r) ( ( 0x3 & ( r ) ) >> 1 ) -#define REX_B(r) ( ( 0x1 & ( r ) ) >> 0 ) -#define REX_PFX_MASK(n) ( ( P_REXW(n) << 3 ) | \ - ( P_REXR(n) << 2 ) | \ - ( P_REXX(n) << 1 ) | \ - ( P_REXB(n) << 0 ) ) - -/* scable-index-base bits */ -#define SIB_S(b) ( ( b ) >> 6 ) -#define SIB_I(b) ( ( ( b ) >> 3 ) & 7 ) -#define SIB_B(b) ( ( b ) & 7 ) - -/* modrm bits */ -#define MODRM_REG(b) ( ( ( b ) >> 3 ) & 7 ) -#define MODRM_NNN(b) ( ( ( b ) >> 3 ) & 7 ) -#define MODRM_MOD(b) ( ( ( b ) >> 6 ) & 3 ) -#define MODRM_RM(b) ( ( b ) & 7 ) +#define P_rexr ( 1 << 6 ) +#define P_REXR(n) ( ( n >> 6 ) & 1 ) +#define P_rexx ( 1 << 7 ) +#define P_REXX(n) ( ( n >> 7 ) & 1 ) + +#define P_seg ( 1 << 8 ) +#define P_SEG(n) ( ( n >> 8 ) & 1 ) + +#define P_vexl ( 1 << 9 ) +#define P_VEXL(n) ( ( n >> 9 ) & 1 ) +#define P_vexw ( 1 << 10 ) +#define P_VEXW(n) ( ( n >> 10 ) & 1 ) + +#define P_str ( 1 << 11 ) +#define P_STR(n) ( ( n >> 11 ) & 1 ) +#define P_strz ( 1 << 12 ) +#define P_STR_ZF(n) ( ( n >> 12 ) & 1 ) /* operand type constants -- order is important! */ @@ -102,25 +73,15 @@ OP_NONE, OP_A, OP_E, OP_M, OP_G, - OP_I, - - OP_AL, OP_CL, OP_DL, OP_BL, - OP_AH, OP_CH, OP_DH, OP_BH, - - OP_ALr8b, OP_CLr9b, OP_DLr10b, OP_BLr11b, - OP_AHr12b, OP_CHr13b, OP_DHr14b, OP_BHr15b, + OP_I, OP_F, - OP_AX, OP_CX, OP_DX, OP_BX, - OP_SI, OP_DI, OP_SP, OP_BP, + OP_R0, OP_R1, OP_R2, OP_R3, + OP_R4, OP_R5, OP_R6, OP_R7, - OP_rAX, OP_rCX, OP_rDX, OP_rBX, - OP_rSP, OP_rBP, OP_rSI, OP_rDI, - - OP_rAXr8, OP_rCXr9, OP_rDXr10, OP_rBXr11, - OP_rSPr12, OP_rBPr13, OP_rSIr14, OP_rDIr15, - - OP_eAX, OP_eCX, OP_eDX, OP_eBX, - OP_eSP, OP_eBP, OP_eSI, OP_eDI, + OP_AL, OP_CL, OP_DL, + OP_AX, OP_CX, OP_DX, + OP_eAX, OP_eCX, OP_eDX, + OP_rAX, OP_rCX, OP_rDX, OP_ES, OP_CS, OP_SS, OP_DS, OP_FS, OP_GS, @@ -129,45 +90,71 @@ OP_ST4, OP_ST5, OP_ST6, OP_ST7, OP_J, OP_S, OP_O, - OP_I1, OP_I3, + OP_I1, OP_I3, OP_sI, OP_V, OP_W, OP_Q, OP_P, + OP_U, OP_N, OP_MU, OP_H, + OP_L, - OP_R, OP_C, OP_D, OP_VR, OP_PR, + OP_R, OP_C, OP_D, OP_MR } UD_ATTR_PACKED; -/* operand size constants */ +/* + * Operand size constants + * + * Symbolic constants for various operand sizes. Some of these constants + * are given a value equal to the width of the data (SZ_B == 8), such + * that they maybe used interchangeably in the internals. Modifying them + * will most certainly break things! + */ +typedef uint16_t ud_operand_size_t; + +#define SZ_NA 0 +#define SZ_Z 1 +#define SZ_V 2 +#define SZ_Y 3 +#define SZ_X 4 +#define SZ_RDQ 7 +#define SZ_B 8 +#define SZ_W 16 +#define SZ_D 32 +#define SZ_Q 64 +#define SZ_T 80 +#define SZ_O 12 +#define SZ_DQ 128 /* double quad */ +#define SZ_QQ 256 /* quad quad */ + +/* + * Complex size types; that encode sizes for operands of type MR (memory or + * register); for internal use only. Id space above 256. + */ +#define SZ_BD ((SZ_B << 8) | SZ_D) +#define SZ_BV ((SZ_B << 8) | SZ_V) +#define SZ_WD ((SZ_W << 8) | SZ_D) +#define SZ_WV ((SZ_W << 8) | SZ_V) +#define SZ_WY ((SZ_W << 8) | SZ_Y) +#define SZ_DY ((SZ_D << 8) | SZ_Y) +#define SZ_WO ((SZ_W << 8) | SZ_O) +#define SZ_DO ((SZ_D << 8) | SZ_O) +#define SZ_QO ((SZ_Q << 8) | SZ_O) -enum ud_operand_size { - SZ_NA = 0, - SZ_Z = 1, - SZ_V = 2, - SZ_P = 3, - SZ_WP = 4, - SZ_DP = 5, - SZ_MDQ = 6, - SZ_RDQ = 7, - - /* the following values are used as is, - * and thus hard-coded. changing them - * will break internals - */ - SZ_B = 8, - SZ_W = 16, - SZ_D = 32, - SZ_Q = 64, - SZ_T = 80, - SZ_O = 128, - - SZ_WV = 17, - SZ_BV = 18, - SZ_DY = 19 -} UD_ATTR_PACKED; +/* resolve complex size type. + */ +static UD_INLINE ud_operand_size_t +Mx_mem_size(ud_operand_size_t size) +{ + return (size >> 8) & 0xff; +} +static UD_INLINE ud_operand_size_t +Mx_reg_size(ud_operand_size_t size) +{ + return size & 0xff; +} /* A single operand of an entry in the instruction table. * (internal use only) @@ -175,7 +162,7 @@ struct ud_itab_entry_operand { enum ud_operand_code type; - enum ud_operand_size size; + ud_operand_size_t size; }; @@ -188,6 +175,7 @@ struct ud_itab_entry_operand operand1; struct ud_itab_entry_operand operand2; struct ud_itab_entry_operand operand3; + struct ud_itab_entry_operand operand4; uint32_t prefix; }; @@ -197,55 +185,6 @@ const char *meta; }; - -static inline unsigned int sse_pfx_idx( const unsigned int pfx ) -{ - /* 00 = 0 - * f2 = 1 - * f3 = 2 - * 66 = 3 - */ - return ( ( pfx & 0xf ) + 1 ) / 2; -} - -static inline unsigned int mode_idx( const unsigned int mode ) -{ - /* 16 = 0 - * 32 = 1 - * 64 = 2 - */ - return ( mode / 32 ); -} - -static inline unsigned int modrm_mod_idx( const unsigned int mod ) -{ - /* !11 = 0 - * 11 = 1 - */ - return ( mod + 1 ) / 4; -} - -static inline unsigned int vendor_idx( const unsigned int vendor ) -{ - switch ( vendor ) { - case UD_VENDOR_AMD: return 0; - case UD_VENDOR_INTEL: return 1; - case UD_VENDOR_ANY: return 2; - default: return 2; - } -} - -static inline unsigned int is_group_ptr( uint16_t ptr ) -{ - return ( 0x8000 & ptr ); -} - -static inline unsigned int group_idx( uint16_t ptr ) -{ - return ( ~0x8000 & ptr ); -} - - extern struct ud_itab_entry ud_itab[]; extern struct ud_lookup_table_list_entry ud_lookup_table_list[]; diff -Nuar a/Source/JavaScriptCore/disassembler/udis86/udis86_extern.h b/Source/JavaScriptCore/disassembler/udis86/udis86_extern.h --- a/Source/JavaScriptCore/disassembler/udis86/udis86_extern.h 2016-05-21 18:54:11.000000000 +0300 +++ b/Source/JavaScriptCore/disassembler/udis86/udis86_extern.h 2019-06-10 00:48:46.000000000 +0300 @@ -1,6 +1,6 @@ /* udis86 - libudis86/extern.h * - * Copyright (c) 2002-2009 Vivek Thampi + * Copyright (c) 2002-2009, 2013 Vivek Thampi * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification, @@ -32,57 +32,82 @@ #include "udis86_types.h" +#if defined(_MSC_VER) && defined(_USRDLL) +# ifdef LIBUDIS86_EXPORTS +# define LIBUDIS86_DLLEXTERN __declspec(dllexport) +# else +# define LIBUDIS86_DLLEXTERN __declspec(dllimport) +# endif +#else +# define LIBUDIS86_DLLEXTERN +#endif + /* ============================= PUBLIC API ================================= */ -extern void ud_init(struct ud*); +extern LIBUDIS86_DLLEXTERN void ud_init(struct ud*); -extern void ud_set_mode(struct ud*, uint8_t); +extern LIBUDIS86_DLLEXTERN void ud_set_mode(struct ud*, uint8_t); -extern void ud_set_pc(struct ud*, uint64_t); +extern LIBUDIS86_DLLEXTERN void ud_set_pc(struct ud*, uint64_t); -extern void ud_set_input_hook(struct ud*, int (*)(struct ud*)); +extern LIBUDIS86_DLLEXTERN void ud_set_input_hook(struct ud*, int (*)(struct ud*)); -extern void ud_set_input_buffer(struct ud*, uint8_t*, size_t); +extern LIBUDIS86_DLLEXTERN void ud_set_input_buffer(struct ud*, const uint8_t*, size_t); #ifndef __UD_STANDALONE__ -extern void ud_set_input_file(struct ud*, FILE*); +extern LIBUDIS86_DLLEXTERN void ud_set_input_file(struct ud*, FILE*); #endif /* __UD_STANDALONE__ */ -extern void ud_set_vendor(struct ud*, unsigned); +extern LIBUDIS86_DLLEXTERN void ud_set_vendor(struct ud*, unsigned); + +extern LIBUDIS86_DLLEXTERN void ud_set_syntax(struct ud*, void (*)(struct ud*)); + +extern LIBUDIS86_DLLEXTERN void ud_input_skip(struct ud*, size_t); + +extern LIBUDIS86_DLLEXTERN int ud_input_end(const struct ud*); -extern void ud_set_syntax(struct ud*, void (*)(struct ud*)); +extern LIBUDIS86_DLLEXTERN unsigned int ud_decode(struct ud*); -extern void ud_input_skip(struct ud*, size_t); +extern LIBUDIS86_DLLEXTERN unsigned int ud_disassemble(struct ud*); -extern int ud_input_end(struct ud*); +extern LIBUDIS86_DLLEXTERN void ud_translate_intel(struct ud*); -extern unsigned int ud_decode(struct ud*); +extern LIBUDIS86_DLLEXTERN void ud_translate_att(struct ud*); -extern unsigned int ud_disassemble(struct ud*); +extern LIBUDIS86_DLLEXTERN const char* ud_insn_asm(const struct ud* u); -extern void ud_translate_intel(struct ud*); +extern LIBUDIS86_DLLEXTERN const uint8_t* ud_insn_ptr(const struct ud* u); -extern void ud_translate_att(struct ud*); +extern LIBUDIS86_DLLEXTERN uint64_t ud_insn_off(const struct ud*); -extern char* ud_insn_asm(struct ud* u); +extern LIBUDIS86_DLLEXTERN const char* ud_insn_hex(struct ud*); -extern uint8_t* ud_insn_ptr(struct ud* u); +extern LIBUDIS86_DLLEXTERN unsigned int ud_insn_len(const struct ud* u); -extern uint64_t ud_insn_off(struct ud*); +extern LIBUDIS86_DLLEXTERN const struct ud_operand* ud_insn_opr(const struct ud *u, unsigned int n); -extern char* ud_insn_hex(struct ud*); +extern LIBUDIS86_DLLEXTERN int ud_opr_is_sreg(const struct ud_operand *opr); -extern unsigned int ud_insn_len(struct ud* u); +extern LIBUDIS86_DLLEXTERN int ud_opr_is_gpr(const struct ud_operand *opr); -extern const char* ud_lookup_mnemonic(enum ud_mnemonic_code c); +extern LIBUDIS86_DLLEXTERN enum ud_mnemonic_code ud_insn_mnemonic(const struct ud *u); -extern void ud_set_user_opaque_data(struct ud*, void*); +extern LIBUDIS86_DLLEXTERN const char* ud_lookup_mnemonic(enum ud_mnemonic_code c); -extern void *ud_get_user_opaque_data(struct ud*); +extern LIBUDIS86_DLLEXTERN void ud_set_user_opaque_data(struct ud*, void*); + +extern LIBUDIS86_DLLEXTERN void* ud_get_user_opaque_data(const struct ud*); + +extern LIBUDIS86_DLLEXTERN void ud_set_asm_buffer(struct ud *u, char *buf, size_t size); + +extern LIBUDIS86_DLLEXTERN void ud_set_sym_resolver(struct ud *u, + const char* (*resolver)(struct ud*, + uint64_t addr, + int64_t *offset)); /* ========================================================================== */ #ifdef __cplusplus } #endif -#endif +#endif /* UD_EXTERN_H */ diff -Nuar a/Source/JavaScriptCore/disassembler/udis86/udis86_input.c b/Source/JavaScriptCore/disassembler/udis86/udis86_input.c --- a/Source/JavaScriptCore/disassembler/udis86/udis86_input.c 2016-05-21 18:54:11.000000000 +0300 +++ b/Source/JavaScriptCore/disassembler/udis86/udis86_input.c 1970-01-01 02:00:00.000000000 +0200 @@ -1,262 +0,0 @@ -/* udis86 - libudis86/input.c - * - * Copyright (c) 2002-2009 Vivek Thampi - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * * Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -#include "config.h" - -#if USE(UDIS86) - -#include "udis86_extern.h" -#include "udis86_types.h" -#include "udis86_input.h" - -/* ----------------------------------------------------------------------------- - * inp_buff_hook() - Hook for buffered inputs. - * ----------------------------------------------------------------------------- - */ -static int -inp_buff_hook(struct ud* u) -{ - if (u->inp_buff < u->inp_buff_end) - return *u->inp_buff++; - else return -1; -} - -#ifndef __UD_STANDALONE__ -/* ----------------------------------------------------------------------------- - * inp_file_hook() - Hook for FILE inputs. - * ----------------------------------------------------------------------------- - */ -static int -inp_file_hook(struct ud* u) -{ - return fgetc(u->inp_file); -} -#endif /* __UD_STANDALONE__*/ - -/* ============================================================================= - * ud_inp_set_hook() - Sets input hook. - * ============================================================================= - */ -extern void -ud_set_input_hook(register struct ud* u, int (*hook)(struct ud*)) -{ - u->inp_hook = hook; - ud_inp_init(u); -} - -extern void -ud_set_user_opaque_data( struct ud * u, void * opaque ) -{ - u->user_opaque_data = opaque; -} - -extern void * -ud_get_user_opaque_data( struct ud * u ) -{ - return u->user_opaque_data; -} - -/* ============================================================================= - * ud_inp_set_buffer() - Set buffer as input. - * ============================================================================= - */ -extern void -ud_set_input_buffer(register struct ud* u, uint8_t* buf, size_t len) -{ - u->inp_hook = inp_buff_hook; - u->inp_buff = buf; - u->inp_buff_end = buf + len; - ud_inp_init(u); -} - -#ifndef __UD_STANDALONE__ -/* ============================================================================= - * ud_input_set_file() - Set buffer as input. - * ============================================================================= - */ -extern void -ud_set_input_file(register struct ud* u, FILE* f) -{ - u->inp_hook = inp_file_hook; - u->inp_file = f; - ud_inp_init(u); -} -#endif /* __UD_STANDALONE__ */ - -/* ============================================================================= - * ud_input_skip() - Skip n input bytes. - * ============================================================================= - */ -extern void -ud_input_skip(struct ud* u, size_t n) -{ - while (n--) { - u->inp_hook(u); - } -} - -/* ============================================================================= - * ud_input_end() - Test for end of input. - * ============================================================================= - */ -extern int -ud_input_end(struct ud* u) -{ - return (u->inp_curr == u->inp_fill) && u->inp_end; -} - -/* ----------------------------------------------------------------------------- - * ud_inp_next() - Loads and returns the next byte from input. - * - * inp_curr and inp_fill are pointers to the cache. The program is written based - * on the property that they are 8-bits in size, and will eventually wrap around - * forming a circular buffer. So, the size of the cache is 256 in size, kind of - * unnecessary yet optimized. - * - * A buffer inp_sess stores the bytes disassembled for a single session. - * ----------------------------------------------------------------------------- - */ -extern uint8_t ud_inp_next(struct ud* u) -{ - int c = -1; - /* if current pointer is not upto the fill point in the - * input cache. - */ - if ( u->inp_curr != u->inp_fill ) { - c = u->inp_cache[ ++u->inp_curr ]; - /* if !end-of-input, call the input hook and get a byte */ - } else if ( u->inp_end || ( c = u->inp_hook( u ) ) == -1 ) { - /* end-of-input, mark it as an error, since the decoder, - * expected a byte more. - */ - u->error = 1; - /* flag end of input */ - u->inp_end = 1; - return 0; - } else { - /* increment pointers, we have a new byte. */ - u->inp_curr = ++u->inp_fill; - /* add the byte to the cache */ - u->inp_cache[ u->inp_fill ] = c; - } - /* record bytes input per decode-session. */ - u->inp_sess[ u->inp_ctr++ ] = c; - /* return byte */ - return ( uint8_t ) c; -} - -/* ----------------------------------------------------------------------------- - * ud_inp_back() - Move back a single byte in the stream. - * ----------------------------------------------------------------------------- - */ -extern void -ud_inp_back(struct ud* u) -{ - if ( u->inp_ctr > 0 ) { - --u->inp_curr; - --u->inp_ctr; - } -} - -/* ----------------------------------------------------------------------------- - * ud_inp_peek() - Peek into the next byte in source. - * ----------------------------------------------------------------------------- - */ -extern uint8_t -ud_inp_peek(struct ud* u) -{ - uint8_t r = ud_inp_next(u); - if ( !u->error ) ud_inp_back(u); /* Don't backup if there was an error */ - return r; -} - -/* ----------------------------------------------------------------------------- - * ud_inp_move() - Move ahead n input bytes. - * ----------------------------------------------------------------------------- - */ -extern void -ud_inp_move(struct ud* u, size_t n) -{ - while (n--) - ud_inp_next(u); -} - -/*------------------------------------------------------------------------------ - * ud_inp_uintN() - return uintN from source. - *------------------------------------------------------------------------------ - */ -extern uint8_t -ud_inp_uint8(struct ud* u) -{ - return ud_inp_next(u); -} - -extern uint16_t -ud_inp_uint16(struct ud* u) -{ - uint16_t r, ret; - - ret = ud_inp_next(u); - r = ud_inp_next(u); - return ret | (r << 8); -} - -extern uint32_t -ud_inp_uint32(struct ud* u) -{ - uint32_t r, ret; - - ret = ud_inp_next(u); - r = ud_inp_next(u); - ret = ret | (r << 8); - r = ud_inp_next(u); - ret = ret | (r << 16); - r = ud_inp_next(u); - return ret | (r << 24); -} - -extern uint64_t -ud_inp_uint64(struct ud* u) -{ - uint64_t r, ret; - - ret = ud_inp_next(u); - r = ud_inp_next(u); - ret = ret | (r << 8); - r = ud_inp_next(u); - ret = ret | (r << 16); - r = ud_inp_next(u); - ret = ret | (r << 24); - r = ud_inp_next(u); - ret = ret | (r << 32); - r = ud_inp_next(u); - ret = ret | (r << 40); - r = ud_inp_next(u); - ret = ret | (r << 48); - r = ud_inp_next(u); - return ret | (r << 56); -} - -#endif // USE(UDIS86) diff -Nuar a/Source/JavaScriptCore/disassembler/udis86/udis86_input.h b/Source/JavaScriptCore/disassembler/udis86/udis86_input.h --- a/Source/JavaScriptCore/disassembler/udis86/udis86_input.h 2016-05-21 18:54:11.000000000 +0300 +++ b/Source/JavaScriptCore/disassembler/udis86/udis86_input.h 1970-01-01 02:00:00.000000000 +0200 @@ -1,67 +0,0 @@ -/* udis86 - libudis86/input.h - * - * Copyright (c) 2002-2009 Vivek Thampi - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * * Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -#ifndef UD_INPUT_H -#define UD_INPUT_H - -#include "udis86_types.h" - -uint8_t ud_inp_next(struct ud*); -uint8_t ud_inp_peek(struct ud*); -uint8_t ud_inp_uint8(struct ud*); -uint16_t ud_inp_uint16(struct ud*); -uint32_t ud_inp_uint32(struct ud*); -uint64_t ud_inp_uint64(struct ud*); -void ud_inp_move(struct ud*, size_t); -void ud_inp_back(struct ud*); - -/* ud_inp_init() - Initializes the input system. */ -#define ud_inp_init(u) \ -do { \ - u->inp_curr = 0; \ - u->inp_fill = 0; \ - u->inp_ctr = 0; \ - u->inp_end = 0; \ -} while (0) - -/* ud_inp_start() - Should be called before each de-code operation. */ -#define ud_inp_start(u) u->inp_ctr = 0 - -/* ud_inp_back() - Resets the current pointer to its position before the current - * instruction disassembly was started. - */ -#define ud_inp_reset(u) \ -do { \ - u->inp_curr -= u->inp_ctr; \ - u->inp_ctr = 0; \ -} while (0) - -/* ud_inp_sess() - Returns the pointer to current session. */ -#define ud_inp_sess(u) (u->inp_sess) - -/* inp_cur() - Returns the current input byte. */ -#define ud_inp_curr(u) ((u)->inp_cache[(u)->inp_curr]) - -#endif diff -Nuar a/Source/JavaScriptCore/disassembler/udis86/udis86_syn-att.c b/Source/JavaScriptCore/disassembler/udis86/udis86_syn-att.c --- a/Source/JavaScriptCore/disassembler/udis86/udis86_syn-att.c 2017-06-04 23:16:05.000000000 +0300 +++ b/Source/JavaScriptCore/disassembler/udis86/udis86_syn-att.c 2019-06-10 00:48:46.000000000 +0300 @@ -23,6 +23,7 @@ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ + #include "config.h" #if USE(UDIS86) @@ -32,6 +33,7 @@ #include "udis86_decode.h" #include "udis86_itab.h" #include "udis86_syn.h" +#include "udis86_udint.h" /* ----------------------------------------------------------------------------- * opr_cast() - Prints an operand cast. @@ -41,9 +43,9 @@ opr_cast(struct ud* u, struct ud_operand* op) { switch(op->size) { - case 16 : case 32 : - mkasm(u, "*"); break; - default: break; + case 16 : case 32 : + ud_asmprintf(u, "*"); break; + default: break; } } @@ -55,107 +57,66 @@ gen_operand(struct ud* u, struct ud_operand* op) { switch(op->type) { - case UD_OP_REG: - mkasm(u, "%%%s", ud_reg_tab[op->base - UD_R_AL]); - break; - - case UD_OP_MEM: - if (u->br_far) opr_cast(u, op); - if (u->pfx_seg) - mkasm(u, "%%%s:", ud_reg_tab[u->pfx_seg - UD_R_AL]); - if (op->offset == 8) { - if (op->lval.sbyte < 0) - mkasm(u, "-0x%x", (-op->lval.sbyte) & 0xff); - else - mkasm(u, "0x%x", op->lval.sbyte); - } - else if (op->offset == 16) { - if (op->lval.sword < 0) - mkasm(u, "-0x%x", (-op->lval.sword) & 0xffff); - else - mkasm(u, "0x%x", op->lval.sword); - } else if (op->offset == 32) { - if (op->lval.sdword < 0) - mkasm(u, "-0x%x", (-op->lval.sdword) & 0xffffffff); - else - mkasm(u, "0x%x", op->lval.sdword); - } else if (op->offset == 64) { - if (op->lval.sdword < 0) - mkasm(u, "-0x" FMT64 "x", (uint64_t)-op->lval.sqword); - else - mkasm(u, "0x" FMT64 "x", (uint64_t)op->lval.sqword); - } - - if (op->base) - mkasm(u, "(%%%s", ud_reg_tab[op->base - UD_R_AL]); - if (op->index) { - if (op->base) - mkasm(u, ","); - else mkasm(u, "("); - mkasm(u, "%%%s", ud_reg_tab[op->index - UD_R_AL]); - } - if (op->scale) - mkasm(u, ",%d", op->scale); - if (op->base || op->index) - mkasm(u, ")"); - break; - - case UD_OP_IMM: { - int64_t imm = 0; - uint64_t sext_mask = 0xffffffffffffffffull; - unsigned sext_size = op->size; - - switch (op->size) { - case 8: imm = op->lval.sbyte; break; - case 16: imm = op->lval.sword; break; - case 32: imm = op->lval.sdword; break; - case 64: imm = op->lval.sqword; break; - } - if ( P_SEXT( u->itab_entry->prefix ) ) { - sext_size = u->operand[ 0 ].size; - if ( u->mnemonic == UD_Ipush ) - /* push sign-extends to operand size */ - sext_size = u->opr_mode; - } - if ( sext_size < 64 ) - sext_mask = ( 1ull << sext_size ) - 1; - mkasm( u, "$0x" FMT64 "x", (uint64_t)(imm & sext_mask) ); - - break; - } - - case UD_OP_JIMM: - switch (op->size) { - case 8: - mkasm(u, "0x" FMT64 "x", (uint64_t)(u->pc + op->lval.sbyte)); - break; - case 16: - mkasm(u, "0x" FMT64 "x", (uint64_t)((u->pc + op->lval.sword) & 0xffff) ); - break; - case 32: - if (u->dis_mode == 32) - mkasm(u, "0x" FMT64 "x", (uint64_t)((u->pc + op->lval.sdword) & 0xffffffff)); - else - mkasm(u, "0x" FMT64 "x", (uint64_t)(u->pc + op->lval.sdword)); - break; - default:break; - } - break; - - case UD_OP_PTR: - switch (op->size) { - case 32: - mkasm(u, "$0x%x, $0x%x", op->lval.ptr.seg, - op->lval.ptr.off & 0xFFFF); - break; - case 48: - mkasm(u, "$0x%x, $0x%lx", op->lval.ptr.seg, - (unsigned long)op->lval.ptr.off); - break; - } - break; - - default: return; + case UD_OP_CONST: + ud_asmprintf(u, "$0x%x", op->lval.udword); + break; + + case UD_OP_REG: + ud_asmprintf(u, "%%%s", ud_reg_tab[op->base - UD_R_AL]); + break; + + case UD_OP_MEM: + if (u->br_far) { + opr_cast(u, op); + } + if (u->pfx_seg) { + ud_asmprintf(u, "%%%s:", ud_reg_tab[u->pfx_seg - UD_R_AL]); + } + if (op->offset != 0) { + ud_syn_print_mem_disp(u, op, 0); + } + if (op->base) { + ud_asmprintf(u, "(%%%s", ud_reg_tab[op->base - UD_R_AL]); + } + if (op->index) { + if (op->base) { + ud_asmprintf(u, ","); + } else { + ud_asmprintf(u, "("); + } + ud_asmprintf(u, "%%%s", ud_reg_tab[op->index - UD_R_AL]); + } + if (op->scale) { + ud_asmprintf(u, ",%d", op->scale); + } + if (op->base || op->index) { + ud_asmprintf(u, ")"); + } + break; + + case UD_OP_IMM: + ud_asmprintf(u, "$"); + ud_syn_print_imm(u, op); + break; + + case UD_OP_JIMM: + ud_syn_print_addr(u, ud_syn_rel_target(u, op)); + break; + + case UD_OP_PTR: + switch (op->size) { + case 32: + ud_asmprintf(u, "$0x%x, $0x%x", op->lval.ptr.seg, + op->lval.ptr.off & 0xFFFF); + break; + case 48: + ud_asmprintf(u, "$0x%x, $0x%x", op->lval.ptr.seg, + op->lval.ptr.off); + break; + } + break; + + default: return; } } @@ -167,99 +128,108 @@ ud_translate_att(struct ud *u) { int size = 0; - unsigned i; + int star = 0; /* check if P_OSO prefix is used */ if (! P_OSO(u->itab_entry->prefix) && u->pfx_opr) { - switch (u->dis_mode) { - case 16: - mkasm(u, "o32 "); - break; - case 32: - case 64: - mkasm(u, "o16 "); - break; - } + switch (u->dis_mode) { + case 16: + ud_asmprintf(u, "o32 "); + break; + case 32: + case 64: + ud_asmprintf(u, "o16 "); + break; + } } /* check if P_ASO prefix was used */ if (! P_ASO(u->itab_entry->prefix) && u->pfx_adr) { - switch (u->dis_mode) { - case 16: - mkasm(u, "a32 "); - break; - case 32: - mkasm(u, "a16 "); - break; - case 64: - mkasm(u, "a32 "); - break; - } + switch (u->dis_mode) { + case 16: + ud_asmprintf(u, "a32 "); + break; + case 32: + ud_asmprintf(u, "a16 "); + break; + case 64: + ud_asmprintf(u, "a32 "); + break; + } } if (u->pfx_lock) - mkasm(u, "lock "); - if (u->pfx_rep) - mkasm(u, "rep "); - if (u->pfx_repne) - mkasm(u, "repne "); + ud_asmprintf(u, "lock "); + if (u->pfx_rep) { + ud_asmprintf(u, "rep "); + } else if (u->pfx_repe) { + ud_asmprintf(u, "repe "); + } else if (u->pfx_repne) { + ud_asmprintf(u, "repne "); + } /* special instructions */ switch (u->mnemonic) { - case UD_Iretf: - mkasm(u, "lret "); - break; - case UD_Idb: - mkasm(u, ".byte 0x%x", u->operand[0].lval.ubyte); - return; - case UD_Ijmp: - case UD_Icall: - if (u->br_far) mkasm(u, "l"); - mkasm(u, "%s", ud_lookup_mnemonic(u->mnemonic)); - break; - case UD_Ibound: - case UD_Ienter: - if (u->operand[0].type != UD_NONE) - gen_operand(u, &u->operand[0]); - if (u->operand[1].type != UD_NONE) { - mkasm(u, ","); - gen_operand(u, &u->operand[1]); - } - return; - default: - mkasm(u, "%s", ud_lookup_mnemonic(u->mnemonic)); - } - - for (i = 3; i--;) { - if (u->operand[i].size > size - && u->operand[i].type != UD_OP_JIMM) - size = u->operand[i].size; - } - - if (size == 8) - mkasm(u, "b"); - else if (size == 16) - mkasm(u, "w"); - else if (size == 32) - mkasm(u, "l"); - else if (size == 64) - mkasm(u, "q"); + case UD_Iretf: + ud_asmprintf(u, "lret "); + break; + case UD_Idb: + ud_asmprintf(u, ".byte 0x%x", u->operand[0].lval.ubyte); + return; + case UD_Ijmp: + case UD_Icall: + if (u->br_far) ud_asmprintf(u, "l"); + if (u->operand[0].type == UD_OP_REG) { + star = 1; + } + ud_asmprintf(u, "%s", ud_lookup_mnemonic(u->mnemonic)); + break; + case UD_Ibound: + case UD_Ienter: + if (u->operand[0].type != UD_NONE) + gen_operand(u, &u->operand[0]); + if (u->operand[1].type != UD_NONE) { + ud_asmprintf(u, ","); + gen_operand(u, &u->operand[1]); + } + return; + default: + ud_asmprintf(u, "%s", ud_lookup_mnemonic(u->mnemonic)); + } + + if (size == 8) { + ud_asmprintf(u, "b"); + } else if (size == 16) { + ud_asmprintf(u, "w"); + } else if (size == 64) { + ud_asmprintf(u, "q"); + } - mkasm(u, " "); + if (star) { + ud_asmprintf(u, " *"); + } else { + ud_asmprintf(u, " "); + } + if (u->operand[3].type != UD_NONE) { + gen_operand(u, &u->operand[3]); + ud_asmprintf(u, ", "); + } if (u->operand[2].type != UD_NONE) { - gen_operand(u, &u->operand[2]); - mkasm(u, ", "); + gen_operand(u, &u->operand[2]); + ud_asmprintf(u, ", "); } - if (u->operand[1].type != UD_NONE) { - gen_operand(u, &u->operand[1]); - mkasm(u, ", "); + gen_operand(u, &u->operand[1]); + ud_asmprintf(u, ", "); + } + if (u->operand[0].type != UD_NONE) { + gen_operand(u, &u->operand[0]); } - - if (u->operand[0].type != UD_NONE) - gen_operand(u, &u->operand[0]); } #endif // USE(UDIS86) +/* +vim: set ts=2 sw=2 expandtab +*/ diff -Nuar a/Source/JavaScriptCore/disassembler/udis86/udis86_syn.c b/Source/JavaScriptCore/disassembler/udis86/udis86_syn.c --- a/Source/JavaScriptCore/disassembler/udis86/udis86_syn.c 2016-05-21 18:54:11.000000000 +0300 +++ b/Source/JavaScriptCore/disassembler/udis86/udis86_syn.c 2019-06-10 00:48:46.000000000 +0300 @@ -1,6 +1,6 @@ /* udis86 - libudis86/syn.c * - * Copyright (c) 2002-2009 Vivek Thampi + * Copyright (c) 2002-2013 Vivek Thampi * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification, @@ -28,59 +28,192 @@ #if USE(UDIS86) -/* ----------------------------------------------------------------------------- - * Intel Register Table - Order Matters (types.h)! - * ----------------------------------------------------------------------------- +#include "udis86_types.h" +#include "udis86_decode.h" +#include "udis86_syn.h" +#include "udis86_udint.h" + +/* + * Register Table - Order Matters (types.h)! + * */ const char* ud_reg_tab[] = { - "al", "cl", "dl", "bl", - "ah", "ch", "dh", "bh", - "spl", "bpl", "sil", "dil", - "r8b", "r9b", "r10b", "r11b", - "r12b", "r13b", "r14b", "r15b", - - "ax", "cx", "dx", "bx", - "sp", "bp", "si", "di", - "r8w", "r9w", "r10w", "r11w", - "r12w", "r13W" , "r14w", "r15w", - - "eax", "ecx", "edx", "ebx", - "esp", "ebp", "esi", "edi", - "r8d", "r9d", "r10d", "r11d", - "r12d", "r13d", "r14d", "r15d", - - "rax", "rcx", "rdx", "rbx", - "rsp", "rbp", "rsi", "rdi", - "r8", "r9", "r10", "r11", - "r12", "r13", "r14", "r15", - - "es", "cs", "ss", "ds", - "fs", "gs", - - "cr0", "cr1", "cr2", "cr3", - "cr4", "cr5", "cr6", "cr7", - "cr8", "cr9", "cr10", "cr11", - "cr12", "cr13", "cr14", "cr15", - - "dr0", "dr1", "dr2", "dr3", - "dr4", "dr5", "dr6", "dr7", - "dr8", "dr9", "dr10", "dr11", - "dr12", "dr13", "dr14", "dr15", - - "mm0", "mm1", "mm2", "mm3", - "mm4", "mm5", "mm6", "mm7", - - "st0", "st1", "st2", "st3", - "st4", "st5", "st6", "st7", - - "xmm0", "xmm1", "xmm2", "xmm3", - "xmm4", "xmm5", "xmm6", "xmm7", - "xmm8", "xmm9", "xmm10", "xmm11", - "xmm12", "xmm13", "xmm14", "xmm15", + "al", "cl", "dl", "bl", + "ah", "ch", "dh", "bh", + "spl", "bpl", "sil", "dil", + "r8b", "r9b", "r10b", "r11b", + "r12b", "r13b", "r14b", "r15b", + + "ax", "cx", "dx", "bx", + "sp", "bp", "si", "di", + "r8w", "r9w", "r10w", "r11w", + "r12w", "r13w", "r14w", "r15w", + + "eax", "ecx", "edx", "ebx", + "esp", "ebp", "esi", "edi", + "r8d", "r9d", "r10d", "r11d", + "r12d", "r13d", "r14d", "r15d", + + "rax", "rcx", "rdx", "rbx", + "rsp", "rbp", "rsi", "rdi", + "r8", "r9", "r10", "r11", + "r12", "r13", "r14", "r15", + + "es", "cs", "ss", "ds", + "fs", "gs", + + "cr0", "cr1", "cr2", "cr3", + "cr4", "cr5", "cr6", "cr7", + "cr8", "cr9", "cr10", "cr11", + "cr12", "cr13", "cr14", "cr15", + + "dr0", "dr1", "dr2", "dr3", + "dr4", "dr5", "dr6", "dr7", + "dr8", "dr9", "dr10", "dr11", + "dr12", "dr13", "dr14", "dr15", + + "mm0", "mm1", "mm2", "mm3", + "mm4", "mm5", "mm6", "mm7", + + "st0", "st1", "st2", "st3", + "st4", "st5", "st6", "st7", + + "xmm0", "xmm1", "xmm2", "xmm3", + "xmm4", "xmm5", "xmm6", "xmm7", + "xmm8", "xmm9", "xmm10", "xmm11", + "xmm12", "xmm13", "xmm14", "xmm15", + + "ymm0", "ymm1", "ymm2", "ymm3", + "ymm4", "ymm5", "ymm6", "ymm7", + "ymm8", "ymm9", "ymm10", "ymm11", + "ymm12", "ymm13", "ymm14", "ymm15", "rip" }; + +uint64_t +ud_syn_rel_target(struct ud *u, struct ud_operand *opr) +{ + const uint64_t trunc_mask = 0xffffffffffffffffull >> (64 - u->opr_mode); + switch (opr->size) { + case 8 : return (u->pc + opr->lval.sbyte) & trunc_mask; + case 16: return (u->pc + opr->lval.sword) & trunc_mask; + case 32: return (u->pc + opr->lval.sdword) & trunc_mask; + default: UD_ASSERT(!"invalid relative offset size."); + return 0ull; + } +} + + +/* + * asmprintf + * Printf style function for printing translated assembly + * output. Returns the number of characters written and + * moves the buffer pointer forward. On an overflow, + * returns a negative number and truncates the output. + */ +int +ud_asmprintf(struct ud *u, const char *fmt, ...) +{ + int ret; + int avail; + va_list ap; + va_start(ap, fmt); + avail = u->asm_buf_size - u->asm_buf_fill - 1 /* nullchar */; + ret = vsnprintf((char*) u->asm_buf + u->asm_buf_fill, avail, fmt, ap); + if (ret < 0 || ret > avail) { + u->asm_buf_fill = u->asm_buf_size - 1; + } else { + u->asm_buf_fill += ret; + } + va_end(ap); + return ret; +} + + +void +ud_syn_print_addr(struct ud *u, uint64_t addr) +{ + const char *name = NULL; + if (u->sym_resolver) { + int64_t offset = 0; + name = u->sym_resolver(u, addr, &offset); + if (name) { + if (offset) { + ud_asmprintf(u, "%s%+" FMT64 "d", name, offset); + } else { + ud_asmprintf(u, "%s", name); + } + return; + } + } + ud_asmprintf(u, "0x%" FMT64 "x", addr); +} + + +void +ud_syn_print_imm(struct ud* u, const struct ud_operand *op) +{ + uint64_t v; + if (op->_oprcode == OP_sI && op->size != u->opr_mode) { + if (op->size == 8) { + v = (int64_t)op->lval.sbyte; + } else { + UD_ASSERT(op->size == 32); + v = (int64_t)op->lval.sdword; + } + if (u->opr_mode < 64) { + v = v & ((1ull << u->opr_mode) - 1ull); + } + } else { + switch (op->size) { + case 8 : v = op->lval.ubyte; break; + case 16: v = op->lval.uword; break; + case 32: v = op->lval.udword; break; + case 64: v = op->lval.uqword; break; + default: UD_ASSERT(!"invalid offset"); v = 0; /* keep cc happy */ + } + } + ud_asmprintf(u, "0x%" FMT64 "x", v); +} + + +void +ud_syn_print_mem_disp(struct ud* u, const struct ud_operand *op, int sign) +{ + UD_ASSERT(op->offset != 0); + if (op->base == UD_NONE && op->index == UD_NONE) { + uint64_t v; + UD_ASSERT(op->scale == UD_NONE && op->offset != 8); + /* unsigned mem-offset */ + switch (op->offset) { + case 16: v = op->lval.uword; break; + case 32: v = op->lval.udword; break; + case 64: v = op->lval.uqword; break; + default: UD_ASSERT(!"invalid offset"); v = 0; /* keep cc happy */ + } + ud_asmprintf(u, "0x%" FMT64 "x", v); + } else { + int64_t v; + UD_ASSERT(op->offset != 64); + switch (op->offset) { + case 8 : v = op->lval.sbyte; break; + case 16: v = op->lval.sword; break; + case 32: v = op->lval.sdword; break; + default: UD_ASSERT(!"invalid offset"); v = 0; /* keep cc happy */ + } + if (v < 0) { + ud_asmprintf(u, "-0x%" FMT64 "x", -v); + } else if (v > 0) { + ud_asmprintf(u, "%s0x%" FMT64 "x", sign? "+" : "", v); + } + } +} + #endif // USE(UDIS86) +/* +vim: set ts=2 sw=2 expandtab +*/ diff -Nuar a/Source/JavaScriptCore/disassembler/udis86/udis86_syn.h b/Source/JavaScriptCore/disassembler/udis86/udis86_syn.h --- a/Source/JavaScriptCore/disassembler/udis86/udis86_syn.h 2016-05-21 18:54:11.000000000 +0300 +++ b/Source/JavaScriptCore/disassembler/udis86/udis86_syn.h 2019-06-10 00:48:46.000000000 +0300 @@ -27,21 +27,27 @@ #define UD_SYN_H #include "udis86_types.h" -#include - #ifndef __UD_STANDALONE__ # include #endif /* __UD_STANDALONE__ */ extern const char* ud_reg_tab[]; -static void mkasm(struct ud* u, const char* fmt, ...) WTF_ATTRIBUTE_PRINTF(2, 3); -static void mkasm(struct ud* u, const char* fmt, ...) -{ - va_list ap; - va_start(ap, fmt); - u->insn_fill += vsnprintf((char*) u->insn_buffer + u->insn_fill, UD_STRING_BUFFER_SIZE - u->insn_fill, fmt, ap); - va_end(ap); -} +uint64_t ud_syn_rel_target(struct ud*, struct ud_operand*); +#ifdef __GNUC__ +int ud_asmprintf(struct ud *u, const char *fmt, ...) + __attribute__ ((format (printf, 2, 3))); +#else +int ud_asmprintf(struct ud *u, const char *fmt, ...); #endif + +void ud_syn_print_addr(struct ud *u, uint64_t addr); +void ud_syn_print_imm(struct ud* u, const struct ud_operand *op); +void ud_syn_print_mem_disp(struct ud* u, const struct ud_operand *, int sign); + +#endif /* UD_SYN_H */ + +/* +vim: set ts=2 sw=2 expandtab +*/ diff -Nuar a/Source/JavaScriptCore/disassembler/udis86/udis86_syn-intel.c b/Source/JavaScriptCore/disassembler/udis86/udis86_syn-intel.c --- a/Source/JavaScriptCore/disassembler/udis86/udis86_syn-intel.c 2017-06-04 23:16:05.000000000 +0300 +++ b/Source/JavaScriptCore/disassembler/udis86/udis86_syn-intel.c 2019-06-10 00:48:46.000000000 +0300 @@ -1,6 +1,6 @@ /* udis86 - libudis86/syn-intel.c * - * Copyright (c) 2002-2009 Vivek Thampi + * Copyright (c) 2002-2013 Vivek Thampi * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification, @@ -23,6 +23,7 @@ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ + #include "config.h" #if USE(UDIS86) @@ -32,6 +33,7 @@ #include "udis86_decode.h" #include "udis86_itab.h" #include "udis86_syn.h" +#include "udis86_udint.h" /* ----------------------------------------------------------------------------- * opr_cast() - Prints an operand cast. @@ -40,16 +42,19 @@ static void opr_cast(struct ud* u, struct ud_operand* op) { + if (u->br_far) { + ud_asmprintf(u, "far "); + } switch(op->size) { - case 8: mkasm(u, "byte " ); break; - case 16: mkasm(u, "word " ); break; - case 32: mkasm(u, "dword "); break; - case 64: mkasm(u, "qword "); break; - case 80: mkasm(u, "tword "); break; - default: break; + case 8: ud_asmprintf(u, "byte " ); break; + case 16: ud_asmprintf(u, "word " ); break; + case 32: ud_asmprintf(u, "dword "); break; + case 64: ud_asmprintf(u, "qword "); break; + case 80: ud_asmprintf(u, "tword "); break; + case 128: ud_asmprintf(u, "oword "); break; + case 256: ud_asmprintf(u, "yword "); break; + default: break; } - if (u->br_far) - mkasm(u, "far "); } /* ----------------------------------------------------------------------------- @@ -59,121 +64,63 @@ static void gen_operand(struct ud* u, struct ud_operand* op, int syn_cast) { switch(op->type) { - case UD_OP_REG: - mkasm(u, "%s", ud_reg_tab[op->base - UD_R_AL]); - break; - - case UD_OP_MEM: { - - int op_f = 0; - - if (syn_cast) - opr_cast(u, op); - - mkasm(u, "["); - - if (u->pfx_seg) - mkasm(u, "%s:", ud_reg_tab[u->pfx_seg - UD_R_AL]); - - if (op->base) { - mkasm(u, "%s", ud_reg_tab[op->base - UD_R_AL]); - op_f = 1; - } - - if (op->index) { - if (op_f) - mkasm(u, "+"); - mkasm(u, "%s", ud_reg_tab[op->index - UD_R_AL]); - op_f = 1; - } - - if (op->scale) - mkasm(u, "*%d", op->scale); - - if (op->offset == 8) { - if (op->lval.sbyte < 0) - mkasm(u, "-0x%x", -op->lval.sbyte); - else mkasm(u, "%s0x%x", (op_f) ? "+" : "", op->lval.sbyte); - } - else if (op->offset == 16) - mkasm(u, "%s0x%x", (op_f) ? "+" : "", op->lval.uword); - else if (op->offset == 32) { - if (u->adr_mode == 64) { - if (op->lval.sdword < 0) - mkasm(u, "-0x%x", -op->lval.sdword); - else mkasm(u, "%s0x%x", (op_f) ? "+" : "", op->lval.sdword); - } - else mkasm(u, "%s0x%lx", (op_f) ? "+" : "", (unsigned long)op->lval.udword); - } - else if (op->offset == 64) - mkasm(u, "%s0x" FMT64 "x", (op_f) ? "+" : "", (uint64_t)op->lval.uqword); - - mkasm(u, "]"); - break; - } - - case UD_OP_IMM: { - int64_t imm = 0; - uint64_t sext_mask = 0xffffffffffffffffull; - unsigned sext_size = op->size; - - if (syn_cast) - opr_cast(u, op); - switch (op->size) { - case 8: imm = op->lval.sbyte; break; - case 16: imm = op->lval.sword; break; - case 32: imm = op->lval.sdword; break; - case 64: imm = op->lval.sqword; break; - } - if ( P_SEXT( u->itab_entry->prefix ) ) { - sext_size = u->operand[ 0 ].size; - if ( u->mnemonic == UD_Ipush ) - /* push sign-extends to operand size */ - sext_size = u->opr_mode; - } - if ( sext_size < 64 ) - sext_mask = ( 1ull << sext_size ) - 1; - mkasm( u, "0x" FMT64 "x", (uint64_t)(imm & sext_mask) ); - - break; - } - - - case UD_OP_JIMM: - if (syn_cast) opr_cast(u, op); - switch (op->size) { - case 8: - mkasm(u, "0x" FMT64 "x", (uint64_t)(u->pc + op->lval.sbyte)); - break; - case 16: - mkasm(u, "0x" FMT64 "x", (uint64_t)(( u->pc + op->lval.sword ) & 0xffff) ); - break; - case 32: - mkasm(u, "0x" FMT64 "x", (uint64_t)(( u->pc + op->lval.sdword ) & 0xfffffffful) ); - break; - default:break; - } - break; - - case UD_OP_PTR: - switch (op->size) { - case 32: - mkasm(u, "word 0x%x:0x%x", op->lval.ptr.seg, - op->lval.ptr.off & 0xFFFF); - break; - case 48: - mkasm(u, "dword 0x%x:0x%lx", op->lval.ptr.seg, - (unsigned long)op->lval.ptr.off); - break; - } - break; - - case UD_OP_CONST: - if (syn_cast) opr_cast(u, op); - mkasm(u, "%d", op->lval.udword); - break; + case UD_OP_REG: + ud_asmprintf(u, "%s", ud_reg_tab[op->base - UD_R_AL]); + break; + + case UD_OP_MEM: + if (syn_cast) { + opr_cast(u, op); + } + ud_asmprintf(u, "["); + if (u->pfx_seg) { + ud_asmprintf(u, "%s:", ud_reg_tab[u->pfx_seg - UD_R_AL]); + } + if (op->base) { + ud_asmprintf(u, "%s", ud_reg_tab[op->base - UD_R_AL]); + } + if (op->index) { + ud_asmprintf(u, "%s%s", op->base != UD_NONE? "+" : "", + ud_reg_tab[op->index - UD_R_AL]); + if (op->scale) { + ud_asmprintf(u, "*%d", op->scale); + } + } + if (op->offset != 0) { + ud_syn_print_mem_disp(u, op, (op->base != UD_NONE || + op->index != UD_NONE) ? 1 : 0); + } + ud_asmprintf(u, "]"); + break; + + case UD_OP_IMM: + ud_syn_print_imm(u, op); + break; + + + case UD_OP_JIMM: + ud_syn_print_addr(u, ud_syn_rel_target(u, op)); + break; + + case UD_OP_PTR: + switch (op->size) { + case 32: + ud_asmprintf(u, "word 0x%x:0x%x", op->lval.ptr.seg, + op->lval.ptr.off & 0xFFFF); + break; + case 48: + ud_asmprintf(u, "dword 0x%x:0x%x", op->lval.ptr.seg, + op->lval.ptr.off); + break; + } + break; + + case UD_OP_CONST: + if (syn_cast) opr_cast(u, op); + ud_asmprintf(u, "%d", op->lval.udword); + break; - default: return; + default: return; } } @@ -181,98 +128,104 @@ * translates to intel syntax * ============================================================================= */ -extern void ud_translate_intel(struct ud* u) +extern void +ud_translate_intel(struct ud* u) { - /* -- prefixes -- */ - /* check if P_OSO prefix is used */ - if (! P_OSO(u->itab_entry->prefix) && u->pfx_opr) { - switch (u->dis_mode) { - case 16: - mkasm(u, "o32 "); - break; - case 32: - case 64: - mkasm(u, "o16 "); - break; - } + if (!P_OSO(u->itab_entry->prefix) && u->pfx_opr) { + switch (u->dis_mode) { + case 16: ud_asmprintf(u, "o32 "); break; + case 32: + case 64: ud_asmprintf(u, "o16 "); break; + } } /* check if P_ASO prefix was used */ - if (! P_ASO(u->itab_entry->prefix) && u->pfx_adr) { - switch (u->dis_mode) { - case 16: - mkasm(u, "a32 "); - break; - case 32: - mkasm(u, "a16 "); - break; - case 64: - mkasm(u, "a32 "); - break; - } - } - - if ( u->pfx_seg && - u->operand[0].type != UD_OP_MEM && - u->operand[1].type != UD_OP_MEM ) { - mkasm(u, "%s ", ud_reg_tab[u->pfx_seg - UD_R_AL]); - } - if (u->pfx_lock) - mkasm(u, "lock "); - if (u->pfx_rep) - mkasm(u, "rep "); - if (u->pfx_repne) - mkasm(u, "repne "); + if (!P_ASO(u->itab_entry->prefix) && u->pfx_adr) { + switch (u->dis_mode) { + case 16: ud_asmprintf(u, "a32 "); break; + case 32: ud_asmprintf(u, "a16 "); break; + case 64: ud_asmprintf(u, "a32 "); break; + } + } + + if (u->pfx_seg && + u->operand[0].type != UD_OP_MEM && + u->operand[1].type != UD_OP_MEM ) { + ud_asmprintf(u, "%s ", ud_reg_tab[u->pfx_seg - UD_R_AL]); + } + + if (u->pfx_lock) { + ud_asmprintf(u, "lock "); + } + if (u->pfx_rep) { + ud_asmprintf(u, "rep "); + } else if (u->pfx_repe) { + ud_asmprintf(u, "repe "); + } else if (u->pfx_repne) { + ud_asmprintf(u, "repne "); + } /* print the instruction mnemonic */ - mkasm(u, "%s ", ud_lookup_mnemonic(u->mnemonic)); + ud_asmprintf(u, "%s", ud_lookup_mnemonic(u->mnemonic)); - /* operand 1 */ if (u->operand[0].type != UD_NONE) { int cast = 0; - if ( u->operand[0].type == UD_OP_IMM && - u->operand[1].type == UD_NONE ) - cast = u->c1; - if ( u->operand[0].type == UD_OP_MEM ) { - cast = u->c1; - if ( u->operand[1].type == UD_OP_IMM || - u->operand[1].type == UD_OP_CONST ) - cast = 1; - if ( u->operand[1].type == UD_NONE ) - cast = 1; - if ( ( u->operand[0].size != u->operand[1].size ) && u->operand[1].size ) - cast = 1; - } else if ( u->operand[ 0 ].type == UD_OP_JIMM ) { - if ( u->operand[ 0 ].size > 8 ) cast = 1; + ud_asmprintf(u, " "); + if (u->operand[0].type == UD_OP_MEM) { + if (u->operand[1].type == UD_OP_IMM || + u->operand[1].type == UD_OP_CONST || + u->operand[1].type == UD_NONE || + (u->operand[0].size != u->operand[1].size)) { + cast = 1; + } else if (u->operand[1].type == UD_OP_REG && + u->operand[1].base == UD_R_CL) { + switch (u->mnemonic) { + case UD_Ircl: + case UD_Irol: + case UD_Iror: + case UD_Ircr: + case UD_Ishl: + case UD_Ishr: + case UD_Isar: + cast = 1; + break; + default: break; + } + } } - gen_operand(u, &u->operand[0], cast); + gen_operand(u, &u->operand[0], cast); } - /* operand 2 */ + if (u->operand[1].type != UD_NONE) { int cast = 0; - mkasm(u, ", "); - if ( u->operand[1].type == UD_OP_MEM ) { - cast = u->c1; - - if ( u->operand[0].type != UD_OP_REG ) - cast = 1; - if ( u->operand[0].size != u->operand[1].size && u->operand[1].size ) - cast = 1; - if ( u->operand[0].type == UD_OP_REG && - u->operand[0].base >= UD_R_ES && - u->operand[0].base <= UD_R_GS ) - cast = 0; + ud_asmprintf(u, ", "); + if (u->operand[1].type == UD_OP_MEM && + u->operand[0].size != u->operand[1].size && + !ud_opr_is_sreg(&u->operand[0])) { + cast = 1; } - gen_operand(u, &u->operand[1], cast ); + gen_operand(u, &u->operand[1], cast); } - /* operand 3 */ if (u->operand[2].type != UD_NONE) { - mkasm(u, ", "); - gen_operand(u, &u->operand[2], u->c3); + int cast = 0; + ud_asmprintf(u, ", "); + if (u->operand[2].type == UD_OP_MEM && + u->operand[2].size != u->operand[1].size) { + cast = 1; + } + gen_operand(u, &u->operand[2], cast); + } + + if (u->operand[3].type != UD_NONE) { + ud_asmprintf(u, ", "); + gen_operand(u, &u->operand[3], 0); } } #endif // USE(UDIS86) +/* +vim: set ts=2 sw=2 expandtab +*/ diff -Nuar a/Source/JavaScriptCore/disassembler/udis86/udis86_types.h b/Source/JavaScriptCore/disassembler/udis86/udis86_types.h --- a/Source/JavaScriptCore/disassembler/udis86/udis86_types.h 2017-06-04 23:16:05.000000000 +0300 +++ b/Source/JavaScriptCore/disassembler/udis86/udis86_types.h 2019-06-10 00:48:46.000000000 +0300 @@ -1,6 +1,6 @@ /* udis86 - libudis86/types.h * - * Copyright (c) 2002-2009 Vivek Thampi + * Copyright (c) 2002-2013 Vivek Thampi * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification, @@ -26,9 +26,23 @@ #ifndef UD_TYPES_H #define UD_TYPES_H -#ifndef __UD_STANDALONE__ +#ifdef __KERNEL__ + /* + * -D__KERNEL__ is automatically passed on the command line when + * building something as part of the Linux kernel. Assume standalone + * mode. + */ +# include +# include +# ifndef __UD_STANDALONE__ +# define __UD_STANDALONE__ 1 +# endif +#endif /* __KERNEL__ */ + +#if !defined(__UD_STANDALONE__) +# include # include -#endif /* __UD_STANDALONE__ */ +#endif /* gcc specific extensions */ #ifdef __GNUC__ @@ -37,26 +51,6 @@ # define UD_ATTR_PACKED #endif /* UD_ATTR_PACKED */ -#ifdef _MSC_VER -# define FMT64 "%I64" - typedef unsigned __int8 uint8_t; - typedef unsigned __int16 uint16_t; - typedef unsigned __int32 uint32_t; - typedef unsigned __int64 uint64_t; - typedef __int8 int8_t; - typedef __int16 int16_t; - typedef __int32 int32_t; - typedef __int64 int64_t; -#else -# if defined(__GNU_LIBRARY__) && defined(__WORDSIZE) && (__WORDSIZE == 64) -# define FMT64 "%l" -# else -# define FMT64 "%ll" -# endif -# ifndef __UD_STANDALONE__ -# include -# endif /* __UD_STANDALONE__ */ -#endif /* ----------------------------------------------------------------------------- * All possible "types" of objects in udis86. Order is Important! @@ -67,152 +61,176 @@ UD_NONE, /* 8 bit GPRs */ - UD_R_AL, UD_R_CL, UD_R_DL, UD_R_BL, - UD_R_AH, UD_R_CH, UD_R_DH, UD_R_BH, - UD_R_SPL, UD_R_BPL, UD_R_SIL, UD_R_DIL, - UD_R_R8B, UD_R_R9B, UD_R_R10B, UD_R_R11B, - UD_R_R12B, UD_R_R13B, UD_R_R14B, UD_R_R15B, + UD_R_AL, UD_R_CL, UD_R_DL, UD_R_BL, + UD_R_AH, UD_R_CH, UD_R_DH, UD_R_BH, + UD_R_SPL, UD_R_BPL, UD_R_SIL, UD_R_DIL, + UD_R_R8B, UD_R_R9B, UD_R_R10B, UD_R_R11B, + UD_R_R12B, UD_R_R13B, UD_R_R14B, UD_R_R15B, /* 16 bit GPRs */ - UD_R_AX, UD_R_CX, UD_R_DX, UD_R_BX, - UD_R_SP, UD_R_BP, UD_R_SI, UD_R_DI, - UD_R_R8W, UD_R_R9W, UD_R_R10W, UD_R_R11W, - UD_R_R12W, UD_R_R13W, UD_R_R14W, UD_R_R15W, - + UD_R_AX, UD_R_CX, UD_R_DX, UD_R_BX, + UD_R_SP, UD_R_BP, UD_R_SI, UD_R_DI, + UD_R_R8W, UD_R_R9W, UD_R_R10W, UD_R_R11W, + UD_R_R12W, UD_R_R13W, UD_R_R14W, UD_R_R15W, + /* 32 bit GPRs */ - UD_R_EAX, UD_R_ECX, UD_R_EDX, UD_R_EBX, - UD_R_ESP, UD_R_EBP, UD_R_ESI, UD_R_EDI, - UD_R_R8D, UD_R_R9D, UD_R_R10D, UD_R_R11D, - UD_R_R12D, UD_R_R13D, UD_R_R14D, UD_R_R15D, - + UD_R_EAX, UD_R_ECX, UD_R_EDX, UD_R_EBX, + UD_R_ESP, UD_R_EBP, UD_R_ESI, UD_R_EDI, + UD_R_R8D, UD_R_R9D, UD_R_R10D, UD_R_R11D, + UD_R_R12D, UD_R_R13D, UD_R_R14D, UD_R_R15D, + /* 64 bit GPRs */ - UD_R_RAX, UD_R_RCX, UD_R_RDX, UD_R_RBX, - UD_R_RSP, UD_R_RBP, UD_R_RSI, UD_R_RDI, - UD_R_R8, UD_R_R9, UD_R_R10, UD_R_R11, - UD_R_R12, UD_R_R13, UD_R_R14, UD_R_R15, + UD_R_RAX, UD_R_RCX, UD_R_RDX, UD_R_RBX, + UD_R_RSP, UD_R_RBP, UD_R_RSI, UD_R_RDI, + UD_R_R8, UD_R_R9, UD_R_R10, UD_R_R11, + UD_R_R12, UD_R_R13, UD_R_R14, UD_R_R15, /* segment registers */ - UD_R_ES, UD_R_CS, UD_R_SS, UD_R_DS, - UD_R_FS, UD_R_GS, + UD_R_ES, UD_R_CS, UD_R_SS, UD_R_DS, + UD_R_FS, UD_R_GS, /* control registers*/ - UD_R_CR0, UD_R_CR1, UD_R_CR2, UD_R_CR3, - UD_R_CR4, UD_R_CR5, UD_R_CR6, UD_R_CR7, - UD_R_CR8, UD_R_CR9, UD_R_CR10, UD_R_CR11, - UD_R_CR12, UD_R_CR13, UD_R_CR14, UD_R_CR15, - + UD_R_CR0, UD_R_CR1, UD_R_CR2, UD_R_CR3, + UD_R_CR4, UD_R_CR5, UD_R_CR6, UD_R_CR7, + UD_R_CR8, UD_R_CR9, UD_R_CR10, UD_R_CR11, + UD_R_CR12, UD_R_CR13, UD_R_CR14, UD_R_CR15, + /* debug registers */ - UD_R_DR0, UD_R_DR1, UD_R_DR2, UD_R_DR3, - UD_R_DR4, UD_R_DR5, UD_R_DR6, UD_R_DR7, - UD_R_DR8, UD_R_DR9, UD_R_DR10, UD_R_DR11, - UD_R_DR12, UD_R_DR13, UD_R_DR14, UD_R_DR15, + UD_R_DR0, UD_R_DR1, UD_R_DR2, UD_R_DR3, + UD_R_DR4, UD_R_DR5, UD_R_DR6, UD_R_DR7, + UD_R_DR8, UD_R_DR9, UD_R_DR10, UD_R_DR11, + UD_R_DR12, UD_R_DR13, UD_R_DR14, UD_R_DR15, /* mmx registers */ - UD_R_MM0, UD_R_MM1, UD_R_MM2, UD_R_MM3, - UD_R_MM4, UD_R_MM5, UD_R_MM6, UD_R_MM7, + UD_R_MM0, UD_R_MM1, UD_R_MM2, UD_R_MM3, + UD_R_MM4, UD_R_MM5, UD_R_MM6, UD_R_MM7, /* x87 registers */ - UD_R_ST0, UD_R_ST1, UD_R_ST2, UD_R_ST3, - UD_R_ST4, UD_R_ST5, UD_R_ST6, UD_R_ST7, + UD_R_ST0, UD_R_ST1, UD_R_ST2, UD_R_ST3, + UD_R_ST4, UD_R_ST5, UD_R_ST6, UD_R_ST7, /* extended multimedia registers */ - UD_R_XMM0, UD_R_XMM1, UD_R_XMM2, UD_R_XMM3, - UD_R_XMM4, UD_R_XMM5, UD_R_XMM6, UD_R_XMM7, - UD_R_XMM8, UD_R_XMM9, UD_R_XMM10, UD_R_XMM11, - UD_R_XMM12, UD_R_XMM13, UD_R_XMM14, UD_R_XMM15, + UD_R_XMM0, UD_R_XMM1, UD_R_XMM2, UD_R_XMM3, + UD_R_XMM4, UD_R_XMM5, UD_R_XMM6, UD_R_XMM7, + UD_R_XMM8, UD_R_XMM9, UD_R_XMM10, UD_R_XMM11, + UD_R_XMM12, UD_R_XMM13, UD_R_XMM14, UD_R_XMM15, + + /* 256B multimedia registers */ + UD_R_YMM0, UD_R_YMM1, UD_R_YMM2, UD_R_YMM3, + UD_R_YMM4, UD_R_YMM5, UD_R_YMM6, UD_R_YMM7, + UD_R_YMM8, UD_R_YMM9, UD_R_YMM10, UD_R_YMM11, + UD_R_YMM12, UD_R_YMM13, UD_R_YMM14, UD_R_YMM15, UD_R_RIP, /* Operand Types */ - UD_OP_REG, UD_OP_MEM, UD_OP_PTR, UD_OP_IMM, - UD_OP_JIMM, UD_OP_CONST + UD_OP_REG, UD_OP_MEM, UD_OP_PTR, UD_OP_IMM, + UD_OP_JIMM, UD_OP_CONST }; #include "udis86_itab.h" +union ud_lval { + int8_t sbyte; + uint8_t ubyte; + int16_t sword; + uint16_t uword; + int32_t sdword; + uint32_t udword; + int64_t sqword; + uint64_t uqword; + struct { + uint16_t seg; + uint32_t off; + } ptr; +}; + /* ----------------------------------------------------------------------------- * struct ud_operand - Disassembled instruction Operand. * ----------------------------------------------------------------------------- */ -struct ud_operand -{ - enum ud_type type; - uint8_t size; - union { - int8_t sbyte; - uint8_t ubyte; - int16_t sword; - uint16_t uword; - int32_t sdword; - uint32_t udword; - int64_t sqword; - uint64_t uqword; - - struct { - uint16_t seg; - uint32_t off; - } ptr; - } lval; - - enum ud_type base; - enum ud_type index; - uint8_t offset; - uint8_t scale; +struct ud_operand { + enum ud_type type; + uint16_t size; + enum ud_type base; + enum ud_type index; + uint8_t scale; + uint8_t offset; + union ud_lval lval; + /* + * internal use only + */ + uint64_t _legacy; /* this will be removed in 1.8 */ + uint8_t _oprcode; }; -#define UD_STRING_BUFFER_SIZE 64 - /* ----------------------------------------------------------------------------- * struct ud - The udis86 object. * ----------------------------------------------------------------------------- */ struct ud { - int (*inp_hook) (struct ud*); - uint8_t inp_curr; - uint8_t inp_fill; + /* + * input buffering + */ + int (*inp_hook) (struct ud*); #ifndef __UD_STANDALONE__ - FILE* inp_file; + FILE* inp_file; #endif - uint8_t inp_ctr; - uint8_t* inp_buff; - uint8_t* inp_buff_end; - uint8_t inp_end; - void (*translator)(struct ud*); - uint64_t insn_offset; - char insn_hexcode[32]; - char insn_buffer[UD_STRING_BUFFER_SIZE]; - unsigned int insn_fill; - uint8_t dis_mode; - uint64_t pc; - uint8_t vendor; - struct map_entry* mapen; - enum ud_mnemonic_code mnemonic; - struct ud_operand operand[3]; - uint8_t error; - uint8_t pfx_rex; - uint8_t pfx_seg; - uint8_t pfx_opr; - uint8_t pfx_adr; - uint8_t pfx_lock; - uint8_t pfx_rep; - uint8_t pfx_repe; - uint8_t pfx_repne; - uint8_t pfx_insn; - uint8_t default64; - uint8_t opr_mode; - uint8_t adr_mode; - uint8_t br_far; - uint8_t br_near; - uint8_t implicit_addr; - uint8_t c1; - uint8_t c2; - uint8_t c3; - uint8_t inp_cache[256]; - uint8_t inp_sess[64]; - uint8_t have_modrm; - uint8_t modrm; - void * user_opaque_data; + const uint8_t* inp_buf; + size_t inp_buf_size; + size_t inp_buf_index; + uint8_t inp_curr; + size_t inp_ctr; + uint8_t inp_sess[64]; + int inp_end; + int inp_peek; + + void (*translator)(struct ud*); + uint64_t insn_offset; + char insn_hexcode[64]; + + /* + * Assembly output buffer + */ + char *asm_buf; + size_t asm_buf_size; + size_t asm_buf_fill; + char asm_buf_int[128]; + + /* + * Symbol resolver for use in the translation phase. + */ + const char* (*sym_resolver)(struct ud*, uint64_t addr, int64_t *offset); + + uint8_t dis_mode; + uint64_t pc; + uint8_t vendor; + enum ud_mnemonic_code mnemonic; + struct ud_operand operand[4]; + uint8_t error; + uint8_t _rex; + uint8_t pfx_rex; + uint8_t pfx_seg; + uint8_t pfx_opr; + uint8_t pfx_adr; + uint8_t pfx_lock; + uint8_t pfx_str; + uint8_t pfx_rep; + uint8_t pfx_repe; + uint8_t pfx_repne; + uint8_t opr_mode; + uint8_t adr_mode; + uint8_t br_far; + uint8_t br_near; + uint8_t have_modrm; + uint8_t modrm; + uint8_t modrm_offset; + uint8_t vex_op; + uint8_t vex_b1; + uint8_t vex_b2; + uint8_t primary_opcode; + void * user_opaque_data; struct ud_itab_entry * itab_entry; struct ud_lookup_table_list_entry *le; }; @@ -221,22 +239,22 @@ * Type-definitions * ----------------------------------------------------------------------------- */ -typedef enum ud_type ud_type_t; -typedef enum ud_mnemonic_code ud_mnemonic_code_t; +typedef enum ud_type ud_type_t; +typedef enum ud_mnemonic_code ud_mnemonic_code_t; -typedef struct ud ud_t; -typedef struct ud_operand ud_operand_t; +typedef struct ud ud_t; +typedef struct ud_operand ud_operand_t; -#define UD_SYN_INTEL ud_translate_intel -#define UD_SYN_ATT ud_translate_att -#define UD_EOI -1 -#define UD_INP_CACHE_SZ 32 -#define UD_VENDOR_AMD 0 -#define UD_VENDOR_INTEL 1 -#define UD_VENDOR_ANY 2 - -#define bail_out(ud,error_code) longjmp( (ud)->bailout, error_code ) -#define try_decode(ud) if ( setjmp( (ud)->bailout ) == 0 ) -#define catch_error() else +#define UD_SYN_INTEL ud_translate_intel +#define UD_SYN_ATT ud_translate_att +#define UD_EOI (-1) +#define UD_INP_CACHE_SZ 32 +#define UD_VENDOR_AMD 0 +#define UD_VENDOR_INTEL 1 +#define UD_VENDOR_ANY 2 #endif + +/* +vim: set ts=2 sw=2 expandtab +*/ diff -Nuar a/Source/JavaScriptCore/disassembler/udis86/udis86_udint.h b/Source/JavaScriptCore/disassembler/udis86/udis86_udint.h --- a/Source/JavaScriptCore/disassembler/udis86/udis86_udint.h 1970-01-01 02:00:00.000000000 +0200 +++ b/Source/JavaScriptCore/disassembler/udis86/udis86_udint.h 2019-06-10 00:48:46.000000000 +0300 @@ -0,0 +1,98 @@ +/* udis86 - libudis86/udint.h -- definitions for internal use only + * + * Copyright (c) 2002-2009 Vivek Thampi + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * * Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +#ifndef _UDINT_H_ +#define _UDINT_H_ + +#include "udis86_types.h" + +#ifdef HAVE_CONFIG_H +# include +#endif /* HAVE_CONFIG_H */ + +#if defined(UD_DEBUG) && HAVE_ASSERT_H +# define UD_ASSERT(_x) ASSERT(_x) +#else +# define UD_ASSERT(_x) +#endif /* !HAVE_ASSERT_H */ + +#if defined(UD_DEBUG) + #define UDERR(u, msg) \ + do { \ + (u)->error = 1; \ + fprintf(stderr, "decode-error: %s:%d: %s", \ + __FILE__, __LINE__, (msg)); \ + } while (0) +#else + #define UDERR(u, m) \ + do { \ + (u)->error = 1; \ + } while (0) +#endif /* !LOGERR */ + +#define UD_RETURN_ON_ERROR(u) \ + do { \ + if ((u)->error != 0) { \ + return (u)->error; \ + } \ + } while (0) + +#define UD_RETURN_WITH_ERROR(u, m) \ + do { \ + UDERR(u, m); \ + return (u)->error; \ + } while (0) + +#ifndef __UD_STANDALONE__ +# define UD_NON_STANDALONE(x) x +#else +# define UD_NON_STANDALONE(x) +#endif + +/* printf formatting int64 specifier */ +#ifdef FMT64 +# undef FMT64 +#endif +#if defined(_MSC_VER) || defined(__BORLANDC__) +# define FMT64 "I64" +#else +# if defined(__APPLE__) +# define FMT64 "ll" +# elif defined(__amd64__) || defined(__x86_64__) +# define FMT64 "l" +# else +# define FMT64 "ll" +# endif /* !x64 */ +#endif + +/* define an inline macro */ +#if defined(_MSC_VER) || defined(__BORLANDC__) +# define UD_INLINE __inline /* MS Visual Studio requires __inline + instead of inline for C code */ +#else +# define UD_INLINE inline +#endif + +#endif /* _UDINT_H_ */ diff -Nuar a/Source/JavaScriptCore/disassembler/udis86/ud_itab.py b/Source/JavaScriptCore/disassembler/udis86/ud_itab.py --- a/Source/JavaScriptCore/disassembler/udis86/ud_itab.py 1970-01-01 02:00:00.000000000 +0200 +++ b/Source/JavaScriptCore/disassembler/udis86/ud_itab.py 2019-06-10 00:48:46.000000000 +0300 @@ -0,0 +1,379 @@ +# udis86 - scripts/ud_itab.py +# +# Copyright (c) 2009, 2013 Vivek Thampi +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without modification, +# are permitted provided that the following conditions are met: +# +# * Redistributions of source code must retain the above copyright notice, +# this list of conditions and the following disclaimer. +# * Redistributions in binary form must reproduce the above copyright notice, +# this list of conditions and the following disclaimer in the documentation +# and/or other materials provided with the distribution. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR +# ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +# ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +import os +import sys +from ud_opcode import UdOpcodeTable, UdOpcodeTables, UdInsnDef + +class UdItabGenerator: + + OperandDict = { + "Av" : [ "OP_A" , "SZ_V" ], + "E" : [ "OP_E" , "SZ_NA" ], + "Eb" : [ "OP_E" , "SZ_B" ], + "Ew" : [ "OP_E" , "SZ_W" ], + "Ev" : [ "OP_E" , "SZ_V" ], + "Ed" : [ "OP_E" , "SZ_D" ], + "Ey" : [ "OP_E" , "SZ_Y" ], + "Eq" : [ "OP_E" , "SZ_Q" ], + "Ez" : [ "OP_E" , "SZ_Z" ], + "Fv" : [ "OP_F" , "SZ_V" ], + "G" : [ "OP_G" , "SZ_NA" ], + "Gb" : [ "OP_G" , "SZ_B" ], + "Gw" : [ "OP_G" , "SZ_W" ], + "Gv" : [ "OP_G" , "SZ_V" ], + "Gy" : [ "OP_G" , "SZ_Y" ], + "Gd" : [ "OP_G" , "SZ_D" ], + "Gq" : [ "OP_G" , "SZ_Q" ], + "Gz" : [ "OP_G" , "SZ_Z" ], + "M" : [ "OP_M" , "SZ_NA" ], + "Mb" : [ "OP_M" , "SZ_B" ], + "Mw" : [ "OP_M" , "SZ_W" ], + "Ms" : [ "OP_M" , "SZ_W" ], + "Md" : [ "OP_M" , "SZ_D" ], + "Mq" : [ "OP_M" , "SZ_Q" ], + "Mdq" : [ "OP_M" , "SZ_DQ" ], + "Mv" : [ "OP_M" , "SZ_V" ], + "Mt" : [ "OP_M" , "SZ_T" ], + "Mo" : [ "OP_M" , "SZ_O" ], + "MbRd" : [ "OP_MR" , "SZ_BD" ], + "MbRv" : [ "OP_MR" , "SZ_BV" ], + "MwRv" : [ "OP_MR" , "SZ_WV" ], + "MwRd" : [ "OP_MR" , "SZ_WD" ], + "MwRy" : [ "OP_MR" , "SZ_WY" ], + "MdRy" : [ "OP_MR" , "SZ_DY" ], + "I1" : [ "OP_I1" , "SZ_NA" ], + "I3" : [ "OP_I3" , "SZ_NA" ], + "Ib" : [ "OP_I" , "SZ_B" ], + "Iw" : [ "OP_I" , "SZ_W" ], + "Iv" : [ "OP_I" , "SZ_V" ], + "Iz" : [ "OP_I" , "SZ_Z" ], + "sIb" : [ "OP_sI" , "SZ_B" ], + "sIz" : [ "OP_sI" , "SZ_Z" ], + "sIv" : [ "OP_sI" , "SZ_V" ], + "Jv" : [ "OP_J" , "SZ_V" ], + "Jz" : [ "OP_J" , "SZ_Z" ], + "Jb" : [ "OP_J" , "SZ_B" ], + "R" : [ "OP_R" , "SZ_RDQ" ], + "C" : [ "OP_C" , "SZ_NA" ], + "D" : [ "OP_D" , "SZ_NA" ], + "S" : [ "OP_S" , "SZ_W" ], + "Ob" : [ "OP_O" , "SZ_B" ], + "Ow" : [ "OP_O" , "SZ_W" ], + "Ov" : [ "OP_O" , "SZ_V" ], + "U" : [ "OP_U" , "SZ_O" ], + "Ux" : [ "OP_U" , "SZ_X" ], + "V" : [ "OP_V" , "SZ_DQ" ], + "Vdq" : [ "OP_V" , "SZ_DQ" ], + "Vqq" : [ "OP_V" , "SZ_QQ" ], + "Vsd" : [ "OP_V" , "SZ_Q" ], + "Vx" : [ "OP_V" , "SZ_X" ], + "H" : [ "OP_H" , "SZ_X" ], + "Hx" : [ "OP_H" , "SZ_X" ], + "Hqq" : [ "OP_H" , "SZ_QQ" ], + "W" : [ "OP_W" , "SZ_DQ" ], + "Wdq" : [ "OP_W" , "SZ_DQ" ], + "Wqq" : [ "OP_W" , "SZ_QQ" ], + "Wsd" : [ "OP_W" , "SZ_Q" ], + "Wx" : [ "OP_W" , "SZ_X" ], + "L" : [ "OP_L" , "SZ_O" ], + "Lx" : [ "OP_L" , "SZ_X" ], + "MwU" : [ "OP_MU" , "SZ_WO" ], + "MdU" : [ "OP_MU" , "SZ_DO" ], + "MqU" : [ "OP_MU" , "SZ_QO" ], + "N" : [ "OP_N" , "SZ_Q" ], + "P" : [ "OP_P" , "SZ_Q" ], + "Q" : [ "OP_Q" , "SZ_Q" ], + "AL" : [ "OP_AL" , "SZ_B" ], + "AX" : [ "OP_AX" , "SZ_W" ], + "eAX" : [ "OP_eAX" , "SZ_Z" ], + "rAX" : [ "OP_rAX" , "SZ_V" ], + "CL" : [ "OP_CL" , "SZ_B" ], + "CX" : [ "OP_CX" , "SZ_W" ], + "eCX" : [ "OP_eCX" , "SZ_Z" ], + "rCX" : [ "OP_rCX" , "SZ_V" ], + "DL" : [ "OP_DL" , "SZ_B" ], + "DX" : [ "OP_DX" , "SZ_W" ], + "eDX" : [ "OP_eDX" , "SZ_Z" ], + "rDX" : [ "OP_rDX" , "SZ_V" ], + "R0b" : [ "OP_R0" , "SZ_B" ], + "R1b" : [ "OP_R1" , "SZ_B" ], + "R2b" : [ "OP_R2" , "SZ_B" ], + "R3b" : [ "OP_R3" , "SZ_B" ], + "R4b" : [ "OP_R4" , "SZ_B" ], + "R5b" : [ "OP_R5" , "SZ_B" ], + "R6b" : [ "OP_R6" , "SZ_B" ], + "R7b" : [ "OP_R7" , "SZ_B" ], + "R0w" : [ "OP_R0" , "SZ_W" ], + "R1w" : [ "OP_R1" , "SZ_W" ], + "R2w" : [ "OP_R2" , "SZ_W" ], + "R3w" : [ "OP_R3" , "SZ_W" ], + "R4w" : [ "OP_R4" , "SZ_W" ], + "R5w" : [ "OP_R5" , "SZ_W" ], + "R6w" : [ "OP_R6" , "SZ_W" ], + "R7w" : [ "OP_R7" , "SZ_W" ], + "R0v" : [ "OP_R0" , "SZ_V" ], + "R1v" : [ "OP_R1" , "SZ_V" ], + "R2v" : [ "OP_R2" , "SZ_V" ], + "R3v" : [ "OP_R3" , "SZ_V" ], + "R4v" : [ "OP_R4" , "SZ_V" ], + "R5v" : [ "OP_R5" , "SZ_V" ], + "R6v" : [ "OP_R6" , "SZ_V" ], + "R7v" : [ "OP_R7" , "SZ_V" ], + "R0z" : [ "OP_R0" , "SZ_Z" ], + "R1z" : [ "OP_R1" , "SZ_Z" ], + "R2z" : [ "OP_R2" , "SZ_Z" ], + "R3z" : [ "OP_R3" , "SZ_Z" ], + "R4z" : [ "OP_R4" , "SZ_Z" ], + "R5z" : [ "OP_R5" , "SZ_Z" ], + "R6z" : [ "OP_R6" , "SZ_Z" ], + "R7z" : [ "OP_R7" , "SZ_Z" ], + "R0y" : [ "OP_R0" , "SZ_Y" ], + "R1y" : [ "OP_R1" , "SZ_Y" ], + "R2y" : [ "OP_R2" , "SZ_Y" ], + "R3y" : [ "OP_R3" , "SZ_Y" ], + "R4y" : [ "OP_R4" , "SZ_Y" ], + "R5y" : [ "OP_R5" , "SZ_Y" ], + "R6y" : [ "OP_R6" , "SZ_Y" ], + "R7y" : [ "OP_R7" , "SZ_Y" ], + "ES" : [ "OP_ES" , "SZ_NA" ], + "CS" : [ "OP_CS" , "SZ_NA" ], + "DS" : [ "OP_DS" , "SZ_NA" ], + "SS" : [ "OP_SS" , "SZ_NA" ], + "GS" : [ "OP_GS" , "SZ_NA" ], + "FS" : [ "OP_FS" , "SZ_NA" ], + "ST0" : [ "OP_ST0" , "SZ_NA" ], + "ST1" : [ "OP_ST1" , "SZ_NA" ], + "ST2" : [ "OP_ST2" , "SZ_NA" ], + "ST3" : [ "OP_ST3" , "SZ_NA" ], + "ST4" : [ "OP_ST4" , "SZ_NA" ], + "ST5" : [ "OP_ST5" , "SZ_NA" ], + "ST6" : [ "OP_ST6" , "SZ_NA" ], + "ST7" : [ "OP_ST7" , "SZ_NA" ], + "NONE" : [ "OP_NONE" , "SZ_NA" ], + } + + # + # opcode prefix dictionary + # + PrefixDict = { + "rep" : "P_str", + "repz" : "P_strz", + "aso" : "P_aso", + "oso" : "P_oso", + "rexw" : "P_rexw", + "rexb" : "P_rexb", + "rexx" : "P_rexx", + "rexr" : "P_rexr", + "vexl" : "P_vexl", + "vexw" : "P_vexw", + "seg" : "P_seg", + "inv64" : "P_inv64", + "def64" : "P_def64", + "cast" : "P_cast", + } + + MnemonicAliases = ( "invalid", "3dnow", "none", "db", "pause" ) + + def __init__(self, tables): + self.tables = tables + self._insnIndexMap, i = {}, 0 + for insn in tables.getInsnList(): + self._insnIndexMap[insn], i = i, i + 1 + + self._tableIndexMap, i = {}, 0 + for table in tables.getTableList(): + self._tableIndexMap[table], i = i, i + 1 + + def getInsnIndex(self, insn): + assert isinstance(insn, UdInsnDef) + return self._insnIndexMap[insn] + + def getTableIndex(self, table): + assert isinstance(table, UdOpcodeTable) + return self._tableIndexMap[table] + + def getTableName(self, table): + return "ud_itab__%d" % self.getTableIndex(table) + + def genOpcodeTable(self, table, isGlobal=False): + """Emit Opcode Table in C. + """ + self.ItabC.write( "\n" ); + if not isGlobal: + self.ItabC.write('static ') + self.ItabC.write( "const uint16_t %s[] = {\n" % self.getTableName(table)) + for i in range(table.size()): + if i > 0 and i % 4 == 0: + self.ItabC.write( "\n" ) + if i % 4 == 0: + self.ItabC.write( " /* %2x */" % i) + e = table.entryAt(i) + if e is None: + self.ItabC.write("%12s," % "INVALID") + elif isinstance(e, UdOpcodeTable): + self.ItabC.write("%12s," % ("GROUP(%d)" % self.getTableIndex(e))) + elif isinstance(e, UdInsnDef): + self.ItabC.write("%12s," % self.getInsnIndex(e)) + self.ItabC.write( "\n" ) + self.ItabC.write( "};\n" ) + + + def genOpcodeTables(self): + tables = self.tables.getTableList() + for table in tables: + self.genOpcodeTable(table, table is self.tables.root) + + + def genOpcodeTablesLookupIndex(self): + self.ItabC.write( "\n\n" ); + self.ItabC.write( "struct ud_lookup_table_list_entry ud_lookup_table_list[] = {\n" ) + for table in self.tables.getTableList(): + f0 = self.getTableName(table) + "," + f1 = table.label() + "," + f2 = "\"%s\"" % table.meta() + self.ItabC.write(" /* %03d */ { %s %s %s },\n" % + (self.getTableIndex(table), f0, f1, f2)) + self.ItabC.write( "};" ) + + + def genInsnTable( self ): + self.ItabC.write( "struct ud_itab_entry ud_itab[] = {\n" ); + for insn in self.tables.getInsnList(): + opr_c = [ "O_NONE", "O_NONE", "O_NONE", "O_NONE" ] + pfx_c = [] + opr = insn.operands + for i in range(len(opr)): + if not (opr[i] in self.OperandDict.keys()): + print("error: invalid operand declaration: %s\n" % opr[i]) + opr_c[i] = "O_" + opr[i] + opr = "%s %s %s %s" % (opr_c[0] + ",", opr_c[1] + ",", + opr_c[2] + ",", opr_c[3]) + + for p in insn.prefixes: + if not ( p in self.PrefixDict.keys() ): + print("error: invalid prefix specification: %s \n" % pfx) + pfx_c.append( self.PrefixDict[p] ) + if len(insn.prefixes) == 0: + pfx_c.append( "P_none" ) + pfx = "|".join( pfx_c ) + + self.ItabC.write( " /* %04d */ { UD_I%s %s, %s },\n" \ + % ( self.getInsnIndex(insn), insn.mnemonic + ',', opr, pfx ) ) + self.ItabC.write( "};\n" ) + + + def getMnemonicsList(self): + mnemonics = self.tables.getMnemonicsList() + mnemonics.extend(self.MnemonicAliases) + return mnemonics + + def genMnemonicsList(self): + mnemonics = self.getMnemonicsList() + self.ItabC.write( "\n\n" ); + self.ItabC.write( "const char* ud_mnemonics_str[] = {\n " ) + self.ItabC.write( ",\n ".join( [ "\"%s\"" % m for m in mnemonics ] ) ) + self.ItabC.write( "\n};\n" ) + + + def genItabH( self, filePath ): + self.ItabH = open( filePath, "w" ) + + # Generate Table Type Enumeration + self.ItabH.write( "#ifndef UD_ITAB_H\n" ) + self.ItabH.write( "#define UD_ITAB_H\n\n" ) + + self.ItabH.write("/* itab.h -- generated by udis86:scripts/ud_itab.py, do no edit */\n\n") + + # table type enumeration + self.ItabH.write( "/* ud_table_type -- lookup table types (see decode.c) */\n" ) + self.ItabH.write( "enum ud_table_type {\n " ) + enum = UdOpcodeTable.getLabels() + self.ItabH.write( ",\n ".join( enum ) ) + self.ItabH.write( "\n};\n\n" ); + + # mnemonic enumeration + self.ItabH.write( "/* ud_mnemonic -- mnemonic constants */\n" ) + enum = "enum ud_mnemonic_code {\n " + enum += ",\n ".join( [ "UD_I%s" % m for m in self.getMnemonicsList() ] ) + enum += ",\n UD_MAX_MNEMONIC_CODE" + enum += "\n};\n" + self.ItabH.write( enum ) + self.ItabH.write( "\n" ) + + self.ItabH.write( "extern const char * ud_mnemonics_str[];\n" ) + + self.ItabH.write( "\n#endif /* UD_ITAB_H */\n" ) + + self.ItabH.close() + + + def genItabC(self, filePath): + self.ItabC = open(filePath, "w") + self.ItabC.write("/* itab.c -- generated by udis86:scripts/ud_itab.py, do no edit") + self.ItabC.write(" */\n"); + self.ItabC.write("#include \"udis86_decode.h\"\n\n"); + + self.ItabC.write("#define GROUP(n) (0x8000 | (n))\n") + self.ItabC.write("#define INVALID %d\n\n" % self.getInsnIndex(self.tables.invalidInsn)) + + self.genOpcodeTables() + self.genOpcodeTablesLookupIndex() + + # + # Macros defining short-names for operands + # + self.ItabC.write("\n\n/* itab entry operand definitions (for readability) */\n"); + operands = self.OperandDict.keys() + operands = sorted(operands) + for o in operands: + self.ItabC.write("#define O_%-7s { %-12s %-8s }\n" % + (o, self.OperandDict[o][0] + ",", self.OperandDict[o][1])); + self.ItabC.write("\n"); + + self.genInsnTable() + self.genMnemonicsList() + + self.ItabC.close() + + def genItab( self, location ): + self.genItabC(os.path.join(location, "udis86_itab.c")) + self.genItabH(os.path.join(location, "udis86_itab.h")) + +def usage(): + print("usage: ud_itab.py ") + +def main(): + + if len(sys.argv) != 3: + usage() + sys.exit(1) + + tables = UdOpcodeTables(xml=sys.argv[1]) + itab = UdItabGenerator(tables) + itab.genItab(sys.argv[2]) + +if __name__ == '__main__': + main() diff -Nuar a/Source/JavaScriptCore/disassembler/udis86/ud_opcode.py b/Source/JavaScriptCore/disassembler/udis86/ud_opcode.py --- a/Source/JavaScriptCore/disassembler/udis86/ud_opcode.py 2017-06-04 23:16:05.000000000 +0300 +++ b/Source/JavaScriptCore/disassembler/udis86/ud_opcode.py 2019-06-10 00:48:46.000000000 +0300 @@ -1,6 +1,6 @@ # udis86 - scripts/ud_opcode.py # -# Copyright (c) 2009 Vivek Thampi +# Copyright (c) 2009, 2013 Vivek Thampi # All rights reserved. # # Redistribution and use in source and binary forms, with or without modification, @@ -23,213 +23,600 @@ # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS # SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -class UdOpcodeTables: +import os - TableInfo = { - 'opctbl' : { 'name' : 'UD_TAB__OPC_TABLE', 'size' : 256 }, - '/sse' : { 'name' : 'UD_TAB__OPC_SSE', 'size' : 4 }, - '/reg' : { 'name' : 'UD_TAB__OPC_REG', 'size' : 8 }, - '/rm' : { 'name' : 'UD_TAB__OPC_RM', 'size' : 8 }, - '/mod' : { 'name' : 'UD_TAB__OPC_MOD', 'size' : 2 }, - '/m' : { 'name' : 'UD_TAB__OPC_MODE', 'size' : 3 }, - '/x87' : { 'name' : 'UD_TAB__OPC_X87', 'size' : 64 }, - '/a' : { 'name' : 'UD_TAB__OPC_ASIZE', 'size' : 3 }, - '/o' : { 'name' : 'UD_TAB__OPC_OSIZE', 'size' : 3 }, - '/3dnow' : { 'name' : 'UD_TAB__OPC_3DNOW', 'size' : 256 }, - 'vendor' : { 'name' : 'UD_TAB__OPC_VENDOR', 'size' : 3 }, - } +# Some compatibility stuff for supporting python 2.x as well as python 3.x +def itemslist(dict): + try: + return dict.iteritems() # python 2.x + except AttributeError: + return list(dict.items()) # python 3.x + +class UdInsnDef: + """An x86 instruction definition + """ + def __init__(self, **insnDef): + self.mnemonic = insnDef['mnemonic'] + self.prefixes = insnDef['prefixes'] + self.opcodes = insnDef['opcodes'] + self.operands = insnDef['operands'] + self._cpuid = insnDef['cpuid'] + self._opcexts = {} + + for opc in self.opcodes: + if opc.startswith('/'): + e, v = opc.split('=') + self._opcexts[e] = v + + def lookupPrefix(self, pfx): + """Lookup prefix (if any, None otherwise), by name""" + return True if pfx in self.prefixes else None + + + @property + def vendor(self): + return self._opcexts.get('/vendor', None) + + @property + def mode(self): + return self._opcexts.get('/m', None) + + @property + def osize(self): + return self._opcexts.get('/o', None) + + def isDef64(self): + return 'def64' in self.prefixes + + def __str__(self): + return self.mnemonic + " " + ', '.join(self.operands) + \ + " " + ' '.join(self.opcodes) + + +class UdOpcodeTable: + """A single table of instruction definitions, indexed by + a decode field. + """ + + class CollisionError(Exception): + pass + + class IndexError(Exception): + """Invalid Index Error""" + pass + + @classmethod + def vendor2idx(cls, v): + return (0 if v == 'amd' + else (1 if v == 'intel' + else 2)) + + @classmethod + def vex2idx(cls, v): + if v.startswith("none_"): + v = v[5:] + vexOpcExtMap = { + 'none' : 0x0, + '0f' : 0x1, + '0f38' : 0x2, + '0f3a' : 0x3, + '66' : 0x4, + '66_0f' : 0x5, + '66_0f38' : 0x6, + '66_0f3a' : 0x7, + 'f3' : 0x8, + 'f3_0f' : 0x9, + 'f3_0f38' : 0xa, + 'f3_0f3a' : 0xb, + 'f2' : 0xc, + 'f2_0f' : 0xd, + 'f2_0f38' : 0xe, + 'f2_0f3a' : 0xf, + } + return vexOpcExtMap[v] - OpcodeTable0 = { - 'type' : 'opctbl', - 'entries' : {}, - 'meta' : 'table0' + + # A mapping of opcode extensions to their representational + # values used in the opcode map. + OpcExtMap = { + '/rm' : lambda v: int(v, 16), + '/x87' : lambda v: int(v, 16), + '/3dnow' : lambda v: int(v, 16), + '/reg' : lambda v: int(v, 16), + # modrm.mod + # (!11, 11) => (00b, 01b) + '/mod' : lambda v: 0 if v == '!11' else 1, + # Mode extensions: + # (16, 32, 64) => (00, 01, 02) + '/o' : lambda v: (int(v) / 32), + '/a' : lambda v: (int(v) / 32), + # Disassembly mode + # (!64, 64) => (00b, 01b) + '/m' : lambda v: 1 if v == '64' else 0, + # SSE + # none => 0 + # f2 => 1 + # f3 => 2 + # 66 => 3 + '/sse' : lambda v: (0 if v == 'none' + else (((int(v, 16) & 0xf) + 1) / 2)), + # AVX + '/vex' : lambda v: UdOpcodeTable.vex2idx(v), + '/vexw' : lambda v: 0 if v == '0' else 1, + '/vexl' : lambda v: 0 if v == '0' else 1, + # Vendor + '/vendor': lambda v: UdOpcodeTable.vendor2idx(v) } - OpcExtIndex = { - # ssef2, ssef3, sse66 - 'sse': { - 'none' : '00', - 'f2' : '01', - 'f3' : '02', - '66' : '03' - }, - - # /mod= - 'mod': { - '!11' : '00', - '11' : '01' - }, - - # /m=, /o=, /a= - 'mode': { - '16' : '00', - '32' : '01', - '64' : '02' - }, - - 'vendor' : { - 'amd' : '00', - 'intel' : '01', - 'any' : '02' - } + _TableInfo = { + 'opctbl' : { 'label' : 'UD_TAB__OPC_TABLE', 'size' : 256 }, + '/sse' : { 'label' : 'UD_TAB__OPC_SSE', 'size' : 4 }, + '/reg' : { 'label' : 'UD_TAB__OPC_REG', 'size' : 8 }, + '/rm' : { 'label' : 'UD_TAB__OPC_RM', 'size' : 8 }, + '/mod' : { 'label' : 'UD_TAB__OPC_MOD', 'size' : 2 }, + '/m' : { 'label' : 'UD_TAB__OPC_MODE', 'size' : 2 }, + '/x87' : { 'label' : 'UD_TAB__OPC_X87', 'size' : 64 }, + '/a' : { 'label' : 'UD_TAB__OPC_ASIZE', 'size' : 3 }, + '/o' : { 'label' : 'UD_TAB__OPC_OSIZE', 'size' : 3 }, + '/3dnow' : { 'label' : 'UD_TAB__OPC_3DNOW', 'size' : 256 }, + '/vendor' : { 'label' : 'UD_TAB__OPC_VENDOR', 'size' : 3 }, + '/vex' : { 'label' : 'UD_TAB__OPC_VEX', 'size' : 16 }, + '/vexw' : { 'label' : 'UD_TAB__OPC_VEX_W', 'size' : 2 }, + '/vexl' : { 'label' : 'UD_TAB__OPC_VEX_L', 'size' : 2 }, } - InsnTable = [] - MnemonicsTable = [] - ThreeDNowTable = {} + def __init__(self, typ): + assert typ in self._TableInfo + self._typ = typ + self._entries = {} - def sizeOfTable( self, t ): - return self.TableInfo[ t ][ 'size' ] - def nameOfTable( self, t ): - return self.TableInfo[ t ][ 'name' ] - - # - # Updates a table entry: If the entry doesn't exist - # it will create the entry, otherwise, it will walk - # while validating the path. - # - def updateTable( self, table, index, type, meta ): - if not index in table[ 'entries' ]: - table[ 'entries' ][ index ] = { 'type' : type, 'entries' : {}, 'meta' : meta } - if table[ 'entries' ][ index ][ 'type' ] != type: - raise NameError( "error: violation in opcode mapping (overwrite) %s with %s." % - ( table[ 'entries' ][ index ][ 'type' ], type) ) - return table[ 'entries' ][ index ] - - class Insn: - """An abstract type representing an instruction in the opcode map. - """ - - # A mapping of opcode extensions to their representational - # values used in the opcode map. - OpcExtMap = { - '/rm' : lambda v: "%02x" % int(v, 16), - '/x87' : lambda v: "%02x" % int(v, 16), - '/3dnow' : lambda v: "%02x" % int(v, 16), - '/reg' : lambda v: "%02x" % int(v, 16), - # modrm.mod - # (!11, 11) => (00, 01) - '/mod' : lambda v: '00' if v == '!11' else '01', - # Mode extensions: - # (16, 32, 64) => (00, 01, 02) - '/o' : lambda v: "%02x" % (int(v) / 32), - '/a' : lambda v: "%02x" % (int(v) / 32), - '/m' : lambda v: "%02x" % (int(v) / 32), - '/sse' : lambda v: UdOpcodeTables.OpcExtIndex['sse'][v] - } + def size(self): + return self._TableInfo[self._typ]['size'] + + def entries(self): + return itemslist(self._entries) + + def numEntries(self): + return len(self._entries.keys()) + + def label(self): + return self._TableInfo[self._typ]['label'] + + def typ(self): + return self._typ + + def meta(self): + return self._typ + + + def __str__(self): + return "table-%s" % self._typ + + + def add(self, opc, obj): + typ = UdOpcodeTable.getOpcodeTyp(opc) + idx = UdOpcodeTable.getOpcodeIdx(opc) + if self._typ != typ or idx in self._entries: + raise CollisionError() + self._entries[idx] = obj + + + def lookup(self, opc): + typ = UdOpcodeTable.getOpcodeTyp(opc) + idx = UdOpcodeTable.getOpcodeIdx(opc) + if self._typ != typ: + raise UdOpcodeTable.CollisionError("%s <-> %s" % (self._typ, typ)) + return self._entries.get(idx, None) - def __init__(self, prefixes, mnemonic, opcodes, operands, vendor): - self.opcodes = opcodes - self.prefixes = prefixes - self.mnemonic = mnemonic - self.operands = operands - self.vendor = vendor - self.opcext = {} - - ssePrefix = None - if self.opcodes[0] in ('ssef2', 'ssef3', 'sse66'): - ssePrefix = self.opcodes[0][3:] - self.opcodes.pop(0) - - # do some preliminary decoding of the instruction type - # 1byte, 2byte or 3byte instruction? - self.nByteInsn = 1 - if self.opcodes[0] == '0f': # 2byte - # 2+ byte opcodes are always disambiguated by an - # sse prefix, unless it is a 3d now instruction - # which is 0f 0f ... - if self.opcodes[1] != '0f' and ssePrefix is None: - ssePrefix = 'none' - if self.opcodes[1] in ('38', '3a'): # 3byte - self.nByteInsn = 3 + + def entryAt(self, index): + """Returns the entry at a given index of the table, + None if there is none. Raises an exception if the + index is out of bounds. + """ + if index < self.size(): + return self._entries.get(index, None) + raise self.IndexError("index out of bounds: %s" % index) + + def setEntryAt(self, index, obj): + if index < self.size(): + self._entries[index] = obj + else: + raise self.IndexError("index out of bounds: %s" % index) + + @classmethod + def getOpcodeTyp(cls, opc): + if opc.startswith('/'): + return opc.split('=')[0] + else: + return 'opctbl' + + + @classmethod + def getOpcodeIdx(cls, opc): + if opc.startswith('/'): + typ, v = opc.split('=') + return cls.OpcExtMap[typ](v) + else: + # plain opctbl opcode + return int(opc, 16) + + + @classmethod + def getLabels(cls): + """Returns a list of all labels""" + return [cls._TableInfo[k]['label'] for k in cls._TableInfo.keys()] + + +class UdOpcodeTables(object): + """Collection of opcode tables + """ + + class CollisionError(Exception): + def __init__(self, obj1, obj2): + self.obj1, self.obj2 = obj1, obj2 + + def newTable(self, typ): + """Create a new opcode table of a give type `typ`. """ + tbl = UdOpcodeTable(typ) + self._tables.append(tbl) + return tbl + + def mkTrie(self, opcodes, obj): + """Recursively contruct a trie entry mapping a string of + opcodes to an object. + """ + if len(opcodes) == 0: + return obj + opc = opcodes[0] + tbl = self.newTable(UdOpcodeTable.getOpcodeTyp(opc)) + tbl.add(opc, self.mkTrie(opcodes[1:], obj)) + return tbl + + def walk(self, tbl, opcodes): + """Walk down the opcode trie, starting at a given opcode + table, given a string of opcodes. Return None if unable + to walk, the object at the leaf otherwise. + """ + opc = opcodes[0] + e = tbl.lookup(opc) + if e is None: + return None + elif isinstance(e, UdOpcodeTable) and len(opcodes[1:]): + return self.walk(e, opcodes[1:]) + return e + + def map(self, tbl, opcodes, obj): + """Create a mapping from a given string of opcodes to an + object in the opcode trie. Constructs trie branches as + needed. + """ + opc = opcodes[0] + e = tbl.lookup(opc) + if e is None: + tbl.add(opc, self.mkTrie(opcodes[1:], obj)) + else: + if len(opcodes[1:]) == 0: + raise self.CollisionError(e, obj) + self.map(e, opcodes[1:], obj) + + def __init__(self, xml): + self._tables = [] + self._insns = [] + self._mnemonics = {} + + # The root table is always a 256 entry opctbl, indexed + # by a plain opcode byte + self.root = self.newTable('opctbl') + + if os.getenv("UD_OPCODE_DEBUG"): + self._logFh = open("opcodeTables.log", "w") + + # add an invalid instruction entry without any mapping + # in the opcode tables. + self.invalidInsn = UdInsnDef(mnemonic="invalid", opcodes=[], cpuid=[], + operands=[], prefixes=[]) + self._insns.append(self.invalidInsn) + + # Construct UdOpcodeTables object from the given + # udis86 optable.xml + for insn in self.__class__.parseOptableXML(xml): + self.addInsnDef(insn) + self.patchAvx2byte() + self.mergeSSENONE() + self.printStats() + + def log(self, s): + if os.getenv("UD_OPCODE_DEBUG"): + self._logFh.write(s + "\n") + + + def mergeSSENONE(self): + """Merge sse tables with only one entry for /sse=none + """ + for table in self._tables: + for k, e in table.entries(): + if isinstance(e, UdOpcodeTable) and e.typ() == '/sse': + if e.numEntries() == 1: + sse = e.lookup("/sse=none") + if sse: + table.setEntryAt(k, sse) + uniqTables = {} + def genTableList(tbl): + if tbl not in uniqTables: + self._tables.append(tbl) + uniqTables[tbl] = 1 + for k, e in tbl.entries(): + if isinstance(e, UdOpcodeTable): + genTableList(e) + self._tables = [] + genTableList(self.root) + + + def patchAvx2byte(self): + # create avx tables + for pp in (None, 'f2', 'f3', '66'): + for m in (None, '0f', '0f38', '0f3a'): + if pp is None and m is None: + continue + if pp is None: + vex = m + elif m is None: + vex = pp else: - self.nByteInsn = 2 - - # The opcode that indexes into the opcode table. - self.opcode = self.opcodes[self.nByteInsn - 1] - - # Record opcode extensions - for opcode in self.opcodes[self.nByteInsn:]: - arg, val = opcode.split('=') - self.opcext[arg] = self.OpcExtMap[arg](val) - - # Record sse extension: the reason sse extension is handled - # separately is that historically sse was handled as a first - # class opcode, not as an extension. Now that sse is handled - # as an extension, we do the manual conversion here, as opposed - # to modifying the opcode xml file. - if ssePrefix is not None: - self.opcext['/sse'] = self.OpcExtMap['/sse'](ssePrefix) - - def parse(self, table, insn): - index = insn.opcodes[0]; - if insn.nByteInsn > 1: - assert index == '0f' - table = self.updateTable(table, index, 'opctbl', '0f') - index = insn.opcodes[1] - - if insn.nByteInsn == 3: - table = self.updateTable(table, index, 'opctbl', index) - index = insn.opcodes[2] + vex = pp + '_' + m + table = self.walk(self.root, ('c4', '/vex=' + vex)) + self.map(self.root, ('c5', '/vex=' + vex), table) + - # Walk down the tree, create levels as needed, for opcode - # extensions. The order is important, and determines how + def addInsn(self, **insnDef): + + # Canonicalize opcode list + opcexts = insnDef['opcexts'] + opcodes = list(insnDef['opcodes']) + + # Re-order vex + if '/vex' in opcexts: + assert opcodes[0] == 'c4' or opcodes[0] == 'c5' + opcodes.insert(1, '/vex=' + opcexts['/vex']) + + # Add extensions. The order is important, and determines how # well the opcode table is packed. Also note, /sse must be # before /o, because /sse may consume operand size prefix # affect the outcome of /o. - for ext in ('/mod', '/x87', '/reg', '/rm', '/sse', - '/o', '/a', '/m', '/3dnow'): - if ext in insn.opcext: - table = self.updateTable(table, index, ext, ext) - index = insn.opcext[ext] - - # additional table for disambiguating vendor - if len(insn.vendor): - table = self.updateTable(table, index, 'vendor', insn.vendor) - index = self.OpcExtIndex['vendor'][insn.vendor] - - # make leaf node entries - leaf = self.updateTable(table, index, 'insn', '') - - leaf['mnemonic'] = insn.mnemonic - leaf['prefixes'] = insn.prefixes - leaf['operands'] = insn.operands - - # add instruction to linear table of instruction forms - self.InsnTable.append({ 'prefixes' : insn.prefixes, - 'mnemonic' : insn.mnemonic, - 'operands' : insn.operands }) - - # add mnemonic to mnemonic table - if not insn.mnemonic in self.MnemonicsTable: - self.MnemonicsTable.append(insn.mnemonic) - - - # Adds an instruction definition to the opcode tables - def addInsnDef( self, prefixes, mnemonic, opcodes, operands, vendor ): - insn = self.Insn(prefixes=prefixes, - mnemonic=mnemonic, - opcodes=opcodes, - operands=operands, - vendor=vendor) - self.parse(self.OpcodeTable0, insn) - - def print_table( self, table, pfxs ): - print("%s |" % pfxs) - keys = table[ 'entries' ].keys() - if ( len( keys ) ): - keys.sort() - for idx in keys: - e = table[ 'entries' ][ idx ] - if e[ 'type' ] == 'insn': - print("%s |-<%s>" % ( pfxs, idx )), - print("%s %s" % ( e[ 'mnemonic' ], ' '.join( e[ 'operands'] ))) + for ext in ('/mod', '/x87', '/reg', '/rm', '/sse', '/o', '/a', '/m', + '/vexw', '/vexl', '/3dnow', '/vendor'): + if ext in opcexts: + opcodes.append(ext + '=' + opcexts[ext]) + + insn = UdInsnDef(mnemonic = insnDef['mnemonic'], + prefixes = insnDef['prefixes'], + operands = insnDef['operands'], + opcodes = opcodes, + cpuid = insnDef['cpuid']) + try: + self.map(self.root, opcodes, insn) + except self.CollisionError as e: + self.pprint() + print(opcodes, insn, str(e.obj1), str(e.obj2)) + raise + except Exception as e: + self.pprint() + raise + self._insns.append(insn) + # add to lookup by mnemonic structure + if insn.mnemonic not in self._mnemonics: + self._mnemonics[insn.mnemonic] = [ insn ] + else: + self._mnemonics[insn.mnemonic].append(insn) + + + def addInsnDef(self, insnDef): + opcodes = [] + opcexts = {} + + # pack plain opcodes first, and collect opcode + # extensions + for opc in insnDef['opcodes']: + if not opc.startswith('/'): + opcodes.append(opc) else: - print("%s |-<%s> %s" % ( pfxs, idx, e['type'] )) - self.print_table( e, pfxs + ' |' ) + e, v = opc.split('=') + opcexts[e] = v + + # treat vendor as an opcode extension + if len(insnDef['vendor']): + opcexts['/vendor'] = insnDef['vendor'][0] + + if insnDef['mnemonic'] in ('lds', 'les'): + # + # Massage lds and les, which share the same prefix as AVX + # instructions, to work well with the opcode tree. + # + opcexts['/vex'] = 'none' + elif '/vex' in opcexts: + # A proper avx instruction definition; make sure there are + # no legacy opcode extensions + assert '/sse' not in opcodes + + # make sure the opcode definitions don't already include + # the avx prefixes. + assert opcodes[0] not in ('c4', 'c5') + + # An avx only instruction is defined by the /vex= opcode + # extension. They do not include the c4 (long form) or + # c5 (short form) prefix. As part of opcode table generate, + # here we create the long form definition, and then patch + # the table for c5 in a later stage. + # Construct a long-form definition of the avx instruction + opcodes.insert(0, 'c4') + elif (opcodes[0] == '0f' and opcodes[1] != '0f' and + '/sse' not in opcexts): + # Make all 2-byte opcode form isntructions play nice with sse + # opcode maps. + opcexts['/sse'] = 'none' + + # legacy sse defs that get promoted to avx + fn = self.addInsn + if 'avx' in insnDef['cpuid'] and '/sse' in opcexts: + fn = self.addSSE2AVXInsn + + fn(mnemonic = insnDef['mnemonic'], + prefixes = insnDef['prefixes'], + opcodes = opcodes, + opcexts = opcexts, + operands = insnDef['operands'], + cpuid = insnDef['cpuid']) + + + def addSSE2AVXInsn(self, **insnDef): + """Add an instruction definition containing an avx cpuid bit, but + declared in its legacy SSE form. The function splits the + definition to create two new definitions, one for SSE and one + promoted to an AVX form. + """ + + # SSE + ssemnemonic = insnDef['mnemonic'] + sseopcodes = insnDef['opcodes'] + # remove vex opcode extensions + sseopcexts = dict([(e, v) for e, v in itemslist(insnDef['opcexts']) + if not e.startswith('/vex')]) + # strip out avx operands, preserving relative ordering + # of remaining operands + sseoperands = [opr for opr in insnDef['operands'] + if opr not in ('H', 'L')] + # strip out avx prefixes + sseprefixes = [pfx for pfx in insnDef['prefixes'] + if not pfx.startswith('vex')] + # strip out avx bits from cpuid + ssecpuid = [flag for flag in insnDef['cpuid'] + if not flag.startswith('avx')] + + self.addInsn(mnemonic = ssemnemonic, + prefixes = sseprefixes, + opcodes = sseopcodes, + opcexts = sseopcexts, + operands = sseoperands, + cpuid = ssecpuid) + + # AVX + vexmnemonic = 'v' + insnDef['mnemonic'] + vexprefixes = insnDef['prefixes'] + vexopcodes = ['c4'] + vexopcexts = dict([(e, insnDef['opcexts'][e]) + for e in insnDef['opcexts'] if e != '/sse']) + vexopcexts['/vex'] = insnDef['opcexts']['/sse'] + '_' + '0f' + if insnDef['opcodes'][1] == '38' or insnDef['opcodes'][1] == '3a': + vexopcexts['/vex'] += insnDef['opcodes'][1] + vexopcodes.extend(insnDef['opcodes'][2:]) + else: + vexopcodes.extend(insnDef['opcodes'][1:]) + vexoperands = [] + for o in insnDef['operands']: + # make the operand size explicit: x + if o in ('V', 'W', 'H', 'U'): + o = o + 'x' + vexoperands.append(o) + vexcpuid = [flag for flag in insnDef['cpuid'] + if not flag.startswith('sse')] + + self.addInsn(mnemonic = vexmnemonic, + prefixes = vexprefixes, + opcodes = vexopcodes, + opcexts = vexopcexts, + operands = vexoperands, + cpuid = vexcpuid) + + def getInsnList(self): + """Returns a list of all instructions in the collection""" + return self._insns + + + def getTableList(self): + """Returns a list of all tables in the collection""" + return self._tables + + def getMnemonicsList(self): + """Returns a sorted list of mnemonics""" + return sorted(self._mnemonics.keys()) + + + def pprint(self): + def printWalk(tbl, indent=""): + entries = tbl.entries() + for k, e in entries: + if isinstance(e, UdOpcodeTable): + self.log("%s |-<%02x> %s" % (indent, k, e)) + printWalk(e, indent + " |") + elif isinstance(e, UdInsnDef): + self.log("%s |-<%02x> %s" % (indent, k, e)) + printWalk(self.root) + + + def printStats(self): + tables = self.getTableList() + self.log("stats: ") + self.log(" Num tables = %d" % len(tables)) + self.log(" Num insnDefs = %d" % len(self.getInsnList())) + self.log(" Num insns = %d" % len(self.getMnemonicsList())) + + totalSize = 0 + totalEntries = 0 + for table in tables: + totalSize += table.size() + totalEntries += table.numEntries() + self.log(" Packing Ratio = %d%%" % ((totalEntries * 100) / totalSize)) + self.log("--------------------") + + self.pprint() + + + @staticmethod + def parseOptableXML(xml): + """Parse udis86 optable.xml file and return list of + instruction definitions. + """ + from xml.dom import minidom - def print_tree( self ): - self.print_table( self.OpcodeTable0, '' ) + xmlDoc = minidom.parse(xml) + tlNode = xmlDoc.firstChild + insns = [] + + while tlNode and tlNode.localName != "x86optable": + tlNode = tlNode.nextSibling + + for insnNode in tlNode.childNodes: + if not insnNode.localName: + continue + if insnNode.localName != "instruction": + raise Exception("warning: invalid insn node - %s" % insnNode.localName) + mnemonic = insnNode.getElementsByTagName('mnemonic')[0].firstChild.data + vendor, cpuid = '', [] + + for node in insnNode.childNodes: + if node.localName == 'vendor': + vendor = node.firstChild.data.split() + elif node.localName == 'cpuid': + cpuid = node.firstChild.data.split() + + for node in insnNode.childNodes: + if node.localName == 'def': + insnDef = { 'pfx' : [] } + for node in node.childNodes: + if not node.localName: + continue + if node.localName in ('pfx', 'opc', 'opr', 'vendor', 'cpuid'): + insnDef[node.localName] = node.firstChild.data.split() + elif node.localName == 'mode': + insnDef['pfx'].extend(node.firstChild.data.split()) + insns.append({'prefixes' : insnDef.get('pfx', []), + 'mnemonic' : mnemonic, + 'opcodes' : insnDef.get('opc', []), + 'operands' : insnDef.get('opr', []), + 'vendor' : insnDef.get('vendor', vendor), + 'cpuid' : insnDef.get('cpuid', cpuid)}) + return insns diff -Nuar a/Source/JavaScriptCore/disassembler/udis86/ud_optable.py b/Source/JavaScriptCore/disassembler/udis86/ud_optable.py --- a/Source/JavaScriptCore/disassembler/udis86/ud_optable.py 2016-05-21 18:54:11.000000000 +0300 +++ b/Source/JavaScriptCore/disassembler/udis86/ud_optable.py 1970-01-01 02:00:00.000000000 +0200 @@ -1,103 +0,0 @@ -# udis86 - scripts/ud_optable.py (optable.xml parser) -# -# Copyright (c) 2009 Vivek Thampi -# All rights reserved. -# -# Redistribution and use in source and binary forms, with or without modification, -# are permitted provided that the following conditions are met: -# -# * Redistributions of source code must retain the above copyright notice, -# this list of conditions and the following disclaimer. -# * Redistributions in binary form must reproduce the above copyright notice, -# this list of conditions and the following disclaimer in the documentation -# and/or other materials provided with the distribution. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -# ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -# ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - -import os -import sys -from xml.dom import minidom - -class UdOptableXmlParser: - - def parseDef( self, node ): - ven = '' - pfx = [] - opc = [] - opr = [] - for def_node in node.childNodes: - if not def_node.localName: - continue - if def_node.localName == 'pfx': - pfx = def_node.firstChild.data.split(); - elif def_node.localName == 'opc': - opc = def_node.firstChild.data.split(); - elif def_node.localName == 'opr': - opr = def_node.firstChild.data.split(); - elif def_node.localName == 'mode': - pfx.extend( def_node.firstChild.data.split() ); - elif def_node.localName == 'syn': - pfx.extend( def_node.firstChild.data.split() ); - elif def_node.localName == 'vendor': - ven = ( def_node.firstChild.data ); - else: - print("warning: invalid node - %s" % def_node.localName) - continue - return ( pfx, opc, opr, ven ) - - def parse( self, xml, fn ): - xmlDoc = minidom.parse( xml ) - self.TlNode = xmlDoc.firstChild - - while self.TlNode and self.TlNode.localName != "x86optable": - self.TlNode = self.TlNode.nextSibling - - for insnNode in self.TlNode.childNodes: - if not insnNode.localName: - continue - if insnNode.localName != "instruction": - print("warning: invalid insn node - %s" % insnNode.localName) - continue - - mnemonic = insnNode.getElementsByTagName( 'mnemonic' )[ 0 ].firstChild.data - vendor = '' - - for node in insnNode.childNodes: - if node.localName == 'vendor': - vendor = node.firstChild.data - elif node.localName == 'def': - ( prefixes, opcodes, operands, local_vendor ) = \ - self.parseDef( node ) - if ( len( local_vendor ) ): - vendor = local_vendor - # callback - fn( prefixes, mnemonic, opcodes, operands, vendor ) - - -def printFn( pfx, mnm, opc, opr, ven ): - print('def: '), - if len( pfx ): - print(' '.join( pfx )), - print("%s %s %s %s" % \ - ( mnm, ' '.join( opc ), ' '.join( opr ), ven )) - - -def parse( xml, callback ): - parser = UdOptableXmlParser() - parser.parse( xml, callback ) - -def main(): - parser = UdOptableXmlParser() - parser.parse( sys.argv[ 1 ], printFn ) - -if __name__ == "__main__": - main() diff -Nuar a/Source/JavaScriptCore/jit/ExecutableAllocator.h b/Source/JavaScriptCore/jit/ExecutableAllocator.h --- a/Source/JavaScriptCore/jit/ExecutableAllocator.h 2017-06-04 23:16:05.000000000 +0300 +++ b/Source/JavaScriptCore/jit/ExecutableAllocator.h 2019-06-10 00:48:46.000000000 +0300 @@ -76,7 +76,7 @@ #if ENABLE(EXECUTABLE_ALLOCATOR_FIXED) #if defined(FIXED_EXECUTABLE_MEMORY_POOL_SIZE_IN_MB) && FIXED_EXECUTABLE_MEMORY_POOL_SIZE_IN_MB > 0 static const size_t fixedExecutableMemoryPoolSize = FIXED_EXECUTABLE_MEMORY_POOL_SIZE_IN_MB * 1024 * 1024; -#elif CPU(ARM) +#elif CPU(ARM) || CPU(MIPS) static const size_t fixedExecutableMemoryPoolSize = 16 * 1024 * 1024; #elif CPU(ARM64) static const size_t fixedExecutableMemoryPoolSize = 32 * 1024 * 1024; diff -Nuar a/Source/JavaScriptCore/parser/Parser.cpp b/Source/JavaScriptCore/parser/Parser.cpp --- a/Source/JavaScriptCore/parser/Parser.cpp 2017-06-04 23:16:05.000000000 +0300 +++ b/Source/JavaScriptCore/parser/Parser.cpp 2019-06-10 00:48:46.000000000 +0300 @@ -90,7 +90,7 @@ return; StringPrintStream stream; printUnexpectedTokenText(stream); - setErrorMessage(stream.toString()); + setErrorMessage(stream.toStringWithLatin1Fallback()); } template template @@ -104,7 +104,7 @@ stream.print(". "); } stream.print(value1, "."); - setErrorMessage(stream.toString()); + setErrorMessage(stream.toStringWithLatin1Fallback()); } template template @@ -118,7 +118,7 @@ stream.print(". "); } stream.print(value1, value2, "."); - setErrorMessage(stream.toString()); + setErrorMessage(stream.toStringWithLatin1Fallback()); } template template @@ -132,7 +132,7 @@ stream.print(". "); } stream.print(value1, value2, value3, "."); - setErrorMessage(stream.toString()); + setErrorMessage(stream.toStringWithLatin1Fallback()); } template template @@ -146,7 +146,7 @@ stream.print(". "); } stream.print(value1, value2, value3, value4, "."); - setErrorMessage(stream.toString()); + setErrorMessage(stream.toStringWithLatin1Fallback()); } template template @@ -160,7 +160,7 @@ stream.print(". "); } stream.print(value1, value2, value3, value4, value5, "."); - setErrorMessage(stream.toString()); + setErrorMessage(stream.toStringWithLatin1Fallback()); } template template @@ -174,7 +174,7 @@ stream.print(". "); } stream.print(value1, value2, value3, value4, value5, value6, "."); - setErrorMessage(stream.toString()); + setErrorMessage(stream.toStringWithLatin1Fallback()); } template template @@ -188,7 +188,7 @@ stream.print(". "); } stream.print(value1, value2, value3, value4, value5, value6, value7, "."); - setErrorMessage(stream.toString()); + setErrorMessage(stream.toStringWithLatin1Fallback()); } template diff -Nuar a/Source/JavaScriptCore/parser/Parser.h b/Source/JavaScriptCore/parser/Parser.h --- a/Source/JavaScriptCore/parser/Parser.h 2017-06-04 23:16:05.000000000 +0300 +++ b/Source/JavaScriptCore/parser/Parser.h 2019-06-10 00:48:46.000000000 +0300 @@ -1114,7 +1114,10 @@ void setErrorMessage(const String& message) { + ASSERT_WITH_MESSAGE(!message.isEmpty(), "Attempted to set the empty string as an error message. Likely caused by invalid UTF8 used when creating the message."); m_errorMessage = message; + if (m_errorMessage.isEmpty()) + m_errorMessage = ASCIILiteral("Unparseable script"); } NEVER_INLINE void logError(bool); diff -Nuar a/Source/JavaScriptCore/runtime/JSGenericTypedArrayViewConstructorInlines.h b/Source/JavaScriptCore/runtime/JSGenericTypedArrayViewConstructorInlines.h --- a/Source/JavaScriptCore/runtime/JSGenericTypedArrayViewConstructorInlines.h 2017-06-04 23:16:05.000000000 +0300 +++ b/Source/JavaScriptCore/runtime/JSGenericTypedArrayViewConstructorInlines.h 2019-06-10 00:48:46.000000000 +0300 @@ -32,6 +32,7 @@ #include "JSCJSValueInlines.h" #include "JSDataView.h" #include "JSGenericTypedArrayViewConstructor.h" +#include "JSGenericTypedArrayViewInlines.h" #include "JSGlobalObject.h" #include "StructureInlines.h" diff -Nuar a/Source/JavaScriptCore/runtime/JSGlobalObject.cpp b/Source/JavaScriptCore/runtime/JSGlobalObject.cpp --- a/Source/JavaScriptCore/runtime/JSGlobalObject.cpp 2017-06-04 23:16:05.000000000 +0300 +++ b/Source/JavaScriptCore/runtime/JSGlobalObject.cpp 2019-06-10 00:48:46.000000000 +0300 @@ -458,7 +458,10 @@ putDirectWithoutTransition(vm, vm.propertyNames->TypeError, m_typeErrorConstructor.get(), DontEnum); putDirectWithoutTransition(vm, vm.propertyNames->URIError, m_URIErrorConstructor.get(), DontEnum); +#if !PLATFORM(QT) + // Disable ES6 Proxy because our implementation is not compliant with what real world code expects putDirectWithoutTransition(vm, vm.propertyNames->Proxy, ProxyConstructor::create(vm, ProxyConstructor::createStructure(vm, this, m_functionPrototype.get())), DontEnum); +#endif #define PUT_CONSTRUCTOR_FOR_SIMPLE_TYPE(capitalName, lowerName, properName, instanceType, jsName) \ diff -Nuar a/Source/JavaScriptCore/Scripts/make-js-file-arrays.py b/Source/JavaScriptCore/Scripts/make-js-file-arrays.py --- a/Source/JavaScriptCore/Scripts/make-js-file-arrays.py 1970-01-01 02:00:00.000000000 +0200 +++ b/Source/JavaScriptCore/Scripts/make-js-file-arrays.py 2019-06-10 00:48:46.000000000 +0300 @@ -0,0 +1,97 @@ +#!/usr/bin/env python +# Copyright (C) 2014 Apple Inc. All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# +# THIS SOFTWARE IS PROVIDED BY APPLE INC. AND ITS CONTRIBUTORS ``AS IS'' AND ANY +# EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +# DISCLAIMED. IN NO EVENT SHALL APPLE INC. OR ITS CONTRIBUTORS BE LIABLE FOR ANY +# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +# ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +import io +import os +from optparse import OptionParser +from StringIO import StringIO +from jsmin import JavascriptMinify + + +def stringifyCodepoint(code): + if code < 128: + return '{0:d}'.format(code) + else: + return "'\\x{0:02x}'".format(code) + + +def chunk(list, chunkSize): + for i in xrange(0, len(list), chunkSize): + yield list[i:i + chunkSize] + + +def main(): + parser = OptionParser(usage="usage: %prog [options] header source [input [input...]]") + parser.add_option('--no-minify', action='store_true', help='Do not run the input files through jsmin') + parser.add_option('-n', '--namespace', help='Namespace to use') + (options, arguments) = parser.parse_args() + if not options.namespace: + print 'Error: must provide a namespace' + parser.print_usage() + exit(-1) + if len(arguments) < 3: + print 'Error: must provide at least 3 arguments' + parser.print_usage() + exit(-1) + + namespace = options.namespace + headerPath = arguments[0] + sourcePath = arguments[1] + inputPaths = arguments[2:] + + headerFile = open(headerPath, 'w') + print >> headerFile, 'namespace {0:s} {{'.format(namespace) + + sourceFile = open(sourcePath, 'w') + print >> sourceFile, '#include "{0:s}"'.format(os.path.basename(headerPath)) + print >> sourceFile, 'namespace {0:s} {{'.format(namespace) + + jsm = JavascriptMinify() + + for inputFileName in inputPaths: + inputStream = io.FileIO(inputFileName) + outputStream = StringIO() + + if not options.no_minify: + jsm.minify(inputStream, outputStream) + characters = outputStream.getvalue() + else: + characters = inputStream.read() + + size = len(characters) + variableName = os.path.splitext(os.path.basename(inputFileName))[0] + + print >> headerFile, 'extern const char {0:s}JavaScript[{1:d}];'.format(variableName, size) + print >> sourceFile, 'const char {0:s}JavaScript[{1:d}] = {{'.format(variableName, size) + + codepoints = map(ord, characters) + for codepointChunk in chunk(codepoints, 16): + print >> sourceFile, ' {0:s},'.format(','.join(map(stringifyCodepoint, codepointChunk))) + + print >> sourceFile, '};' + + print >> headerFile, '}} // namespace {0:s}'.format(namespace) + print >> sourceFile, '}} // namespace {0:s}'.format(namespace) + +if __name__ == '__main__': + main() diff -Nuar a/Source/JavaScriptCore/shell/PlatformQt.cmake b/Source/JavaScriptCore/shell/PlatformQt.cmake --- a/Source/JavaScriptCore/shell/PlatformQt.cmake 2017-06-04 23:16:05.000000000 +0300 +++ b/Source/JavaScriptCore/shell/PlatformQt.cmake 2019-06-10 00:48:46.000000000 +0300 @@ -1,5 +1,5 @@ if (QT_STATIC_BUILD) list(APPEND JSC_LIBRARIES - ${DEPEND_STATIC_LIBS} + ${STATIC_LIB_DEPENDENCIES} ) endif () diff -Nuar a/Source/PlatformQt.cmake b/Source/PlatformQt.cmake --- a/Source/PlatformQt.cmake 2017-06-16 02:36:48.000000000 +0300 +++ b/Source/PlatformQt.cmake 2019-06-10 00:48:46.000000000 +0300 @@ -32,6 +32,9 @@ if (TARGET gtest) target_compile_options(gtest PRIVATE -g0 -O1) endif () + + target_compile_options(WebKit PRIVATE -g1 -O1 -fdebug-types-section) + target_compile_options(WebKit2 PRIVATE -g1 -O1 -fdebug-types-section) endif () if (USE_MINIMAL_DEBUG_INFO_MSVC AND MSVC AND CMAKE_BUILD_TYPE STREQUAL "Debug") @@ -71,6 +74,19 @@ $ ) +set(QTWEBKIT_PACKAGE_INIT " +macro(find_dependency_with_major_and_minor _dep _major _minor) + find_dependency(\${_dep} \"\${_major}.\${_minor}\") + if (NOT(\"\${\${_dep}_VERSION_MAJOR}\" STREQUAL \"\${_major}\" AND \"\${\${_dep}_VERSION_MINOR}\" STREQUAL \"\${_minor}\")) + set(\${CMAKE_FIND_PACKAGE_NAME}_NOT_FOUND_MESSAGE \"\${CMAKE_FIND_PACKAGE_NAME} could not be found because dependency \${dep} is required to have exact version \${_major}.\${_minor}.x.\") + set(\${CMAKE_FIND_PACKAGE_NAME}_FOUND False) + return() + endif () +endmacro () + +#################################################################################### +") + set(_package_footer_template " ####### Expanded from QTWEBKIT_PACKAGE_FOOTER variable ####### diff -Nuar a/Source/Qt5WebKitConfig.cmake.in b/Source/Qt5WebKitConfig.cmake.in --- a/Source/Qt5WebKitConfig.cmake.in 2017-06-04 23:16:06.000000000 +0300 +++ b/Source/Qt5WebKitConfig.cmake.in 2019-06-10 00:48:46.000000000 +0300 @@ -1,8 +1,9 @@ @PACKAGE_INIT@ +@QTWEBKIT_PACKAGE_INIT@ -find_dependency(Qt5Core @Qt5_VERSION@ EXACT) -find_dependency(Qt5Gui @Qt5_VERSION@ EXACT) -find_dependency(Qt5Network @Qt5_VERSION@ EXACT) +find_dependency_with_major_and_minor(Qt5Core @Qt5_VERSION_MAJOR@ @Qt5_VERSION_MINOR@) +find_dependency_with_major_and_minor(Qt5Gui @Qt5_VERSION_MAJOR@ @Qt5_VERSION_MINOR@) +find_dependency_with_major_and_minor(Qt5Network @Qt5_VERSION_MAJOR@ @Qt5_VERSION_MINOR@) include("${CMAKE_CURRENT_LIST_DIR}/WebKitTargets.cmake") diff -Nuar a/Source/Qt5WebKitWidgetsConfig.cmake.in b/Source/Qt5WebKitWidgetsConfig.cmake.in --- a/Source/Qt5WebKitWidgetsConfig.cmake.in 2017-06-04 23:16:06.000000000 +0300 +++ b/Source/Qt5WebKitWidgetsConfig.cmake.in 2019-06-10 00:48:46.000000000 +0300 @@ -1,11 +1,8 @@ @PACKAGE_INIT@ - -find_dependency(Qt5Core @Qt5_VERSION@ EXACT) -find_dependency(Qt5Gui @Qt5_VERSION@ EXACT) -find_dependency(Qt5Network @Qt5_VERSION@ EXACT) -find_dependency(Qt5Widgets @Qt5_VERSION@ EXACT) +@QTWEBKIT_PACKAGE_INIT@ find_dependency(Qt5WebKit @PROJECT_VERSION_STRING@ EXACT) +find_dependency_with_major_and_minor(Qt5Widgets @Qt5_VERSION_MAJOR@ @Qt5_VERSION_MINOR@) include("${CMAKE_CURRENT_LIST_DIR}/Qt5WebKitWidgetsTargets.cmake") diff -Nuar a/Source/qtwebkit.qdocconf b/Source/qtwebkit.qdocconf --- a/Source/qtwebkit.qdocconf 2016-08-12 01:03:09.000000000 +0300 +++ b/Source/qtwebkit.qdocconf 2019-06-10 00:48:46.000000000 +0300 @@ -35,3 +35,5 @@ imagedirs = WebKit/qt/docs depends += qtcore qtwidgets qtgui qtscript qtdoc qtprintsupport qtxml qtwebkitexamples qtquickcontrols + +tagfile = qtwebkit.tags diff -Nuar a/Source/ThirdParty/brotli/CMakeLists.txt b/Source/ThirdParty/brotli/CMakeLists.txt --- a/Source/ThirdParty/brotli/CMakeLists.txt 2017-06-04 23:16:06.000000000 +0300 +++ b/Source/ThirdParty/brotli/CMakeLists.txt 2019-06-10 00:48:46.000000000 +0300 @@ -1,13 +1,15 @@ set(BROTLI_DIR "${THIRDPARTY_DIR}/brotli") set(BROTLI_INCLUDE_DIRECTORIES + "${BROTLI_DIR}/common" "${BROTLI_DIR}/dec" + "${BROTLI_DIR}/include" ) set(BROTLI_SOURCES + ${BROTLI_DIR}/common/dictionary.c ${BROTLI_DIR}/dec/bit_reader.c ${BROTLI_DIR}/dec/decode.c - ${BROTLI_DIR}/dec/dictionary.c ${BROTLI_DIR}/dec/huffman.c ${BROTLI_DIR}/dec/state.c ) diff -Nuar a/Source/ThirdParty/brotli/common/constants.h b/Source/ThirdParty/brotli/common/constants.h --- a/Source/ThirdParty/brotli/common/constants.h 1970-01-01 02:00:00.000000000 +0200 +++ b/Source/ThirdParty/brotli/common/constants.h 2019-06-10 00:48:46.000000000 +0300 @@ -0,0 +1,57 @@ +/* Copyright 2016 Google Inc. All Rights Reserved. + + Distributed under MIT license. + See file LICENSE for detail or copy at https://opensource.org/licenses/MIT +*/ + +#ifndef BROTLI_COMMON_CONSTANTS_H_ +#define BROTLI_COMMON_CONSTANTS_H_ + +/* Specification: 7.3. Encoding of the context map */ +#define BROTLI_CONTEXT_MAP_MAX_RLE 16 + +/* Specification: 2. Compressed representation overview */ +#define BROTLI_MAX_NUMBER_OF_BLOCK_TYPES 256 + +/* Specification: 3.3. Alphabet sizes: insert-and-copy length */ +#define BROTLI_NUM_LITERAL_SYMBOLS 256 +#define BROTLI_NUM_COMMAND_SYMBOLS 704 +#define BROTLI_NUM_BLOCK_LEN_SYMBOLS 26 +#define BROTLI_MAX_CONTEXT_MAP_SYMBOLS (BROTLI_MAX_NUMBER_OF_BLOCK_TYPES + \ + BROTLI_CONTEXT_MAP_MAX_RLE) +#define BROTLI_MAX_BLOCK_TYPE_SYMBOLS (BROTLI_MAX_NUMBER_OF_BLOCK_TYPES + 2) + +/* Specification: 3.5. Complex prefix codes */ +#define BROTLI_REPEAT_PREVIOUS_CODE_LENGTH 16 +#define BROTLI_REPEAT_ZERO_CODE_LENGTH 17 +#define BROTLI_CODE_LENGTH_CODES (BROTLI_REPEAT_ZERO_CODE_LENGTH + 1) +/* "code length of 8 is repeated" */ +#define BROTLI_INITIAL_REPEATED_CODE_LENGTH 8 + +/* Specification: 4. Encoding of distances */ +#define BROTLI_NUM_DISTANCE_SHORT_CODES 16 +#define BROTLI_MAX_NPOSTFIX 3 +#define BROTLI_MAX_NDIRECT 120 +#define BROTLI_MAX_DISTANCE_BITS 24U +/* BROTLI_NUM_DISTANCE_SYMBOLS == 520 */ +#define BROTLI_NUM_DISTANCE_SYMBOLS (BROTLI_NUM_DISTANCE_SHORT_CODES + \ + BROTLI_MAX_NDIRECT + \ + (BROTLI_MAX_DISTANCE_BITS << \ + (BROTLI_MAX_NPOSTFIX + 1))) +/* Distance that is guaranteed to be representable in any stream. */ +#define BROTLI_MAX_DISTANCE 0x3FFFFFC + +/* 7.1. Context modes and context ID lookup for literals */ +/* "context IDs for literals are in the range of 0..63" */ +#define BROTLI_LITERAL_CONTEXT_BITS 6 + +/* 7.2. Context ID for distances */ +#define BROTLI_DISTANCE_CONTEXT_BITS 2 + +/* 9.1. Format of the Stream Header */ +/* Number of slack bytes for window size. Don't confuse + with BROTLI_NUM_DISTANCE_SHORT_CODES. */ +#define BROTLI_WINDOW_GAP 16 +#define BROTLI_MAX_BACKWARD_LIMIT(W) (((size_t)1 << (W)) - BROTLI_WINDOW_GAP) + +#endif /* BROTLI_COMMON_CONSTANTS_H_ */ diff -Nuar a/Source/ThirdParty/brotli/common/dictionary.bin b/Source/ThirdParty/brotli/common/dictionary.bin --- a/Source/ThirdParty/brotli/common/dictionary.bin 1970-01-01 02:00:00.000000000 +0200 +++ b/Source/ThirdParty/brotli/common/dictionary.bin 2019-06-10 00:48:46.000000000 +0300 @@ -0,0 +1,432 @@ +timedownlifeleftbackcodedatashowonlysitecityopenjustlikefreeworktextyearoverbodyloveformbookplaylivelinehelphomesidemorewordlongthemviewfindpagedaysfullheadtermeachareafromtruemarkableuponhighdatelandnewsevennextcasebothpostusedmadehandherewhatnameLinkblogsizebaseheldmakemainuser') +holdendswithNewsreadweresigntakehavegameseencallpathwellplusmenufilmpartjointhislistgoodneedwayswestjobsmindalsologorichuseslastteamarmyfoodkingwilleastwardbestfirePageknowaway.pngmovethanloadgiveselfnotemuchfeedmanyrockicononcelookhidediedHomerulehostajaxinfoclublawslesshalfsomesuchzone100%onescareTimeracebluefourweekfacehopegavehardlostwhenparkkeptpassshiproomHTMLplanTypedonesavekeepflaglinksoldfivetookratetownjumpthusdarkcardfilefearstaykillthatfallautoever.comtalkshopvotedeepmoderestturnbornbandfellroseurl(skinrolecomeactsagesmeetgold.jpgitemvaryfeltthensenddropViewcopy1.0"stopelseliestourpack.gifpastcss?graymean>rideshotlatesaidroadvar feeljohnrickportfast'UA-deadpoorbilltypeU.S.woodmust2px;Inforankwidewantwalllead[0];paulwavesure$('#waitmassarmsgoesgainlangpaid!-- lockunitrootwalkfirmwifexml"songtest20pxkindrowstoolfontmailsafestarmapscorerainflowbabyspansays4px;6px;artsfootrealwikiheatsteptriporg/lakeweaktoldFormcastfansbankveryrunsjulytask1px;goalgrewslowedgeid="sets5px;.js?40pxif (soonseatnonetubezerosentreedfactintogiftharm18pxcamehillboldzoomvoideasyringfillpeakinitcost3px;jacktagsbitsrolleditknewnearironfreddiskwentsoilputs/js/holyT22:ISBNT20:adamsees

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